[
  {
    "path": ".github/ISSUE_TEMPLATE/bug.md",
    "content": "---\nname: There's a bug\nabout: Report a problem with Haasoscope\n---\n\n**What are you trying to do?**\nI want to...\n\n**What is your OS and python version?**\ne.g., 'Windows 10, Python 2.8.8'; use `python -v` to get the python version.\n\n**Have you installed the prerequisites?**\nRead the google document. Many 'getting started' problems are resolved by installing the necessary system and python libraries.\n\n**To Reproduce**\nSteps to reproduce the behavior:\n1. Go to '...'\n2. Click on '....'\n3. Scroll down to '....'\n4. See error\n\n**Expected behavior**\nA clear and concise description of what you expected to happen.\n\n**Screenshots**\nIf applicable, add screenshots to help explain your problem. Text logs are preferred instead of a screenshot of text.\n\n**Additional context**\nAdd any other context about the problem here.\n\n\n\n"
  },
  {
    "path": ".github/ISSUE_TEMPLATE/help.md",
    "content": "---\nname: I need help\nabout: You are having trouble with using the Haasoscope\n---\n\n**What are you trying to do?**\nI want to...\n\n**What is your OS and python version?**\ne.g., 'Windows 10, Python 2.8.8'; use `python -v` to get the python version.\n\n**Have you installed the prerequisites?**\nRead the google document. Many 'getting started' problems are resolved by installing the necessary system and python libraries.\n"
  },
  {
    "path": ".github/ISSUE_TEMPLATE/other.md",
    "content": "---\nname: Other issue\nabout: Problem or other issue not covered in the previous categories\n---\n"
  },
  {
    "path": ".gitignore",
    "content": "max10_adc_firmware/PLLJ_PLLSPE_INFO.txt\r\nmax10_adc_firmware/serial1.qws\r\nmax10_adc_firmware/db/\r\nmax10_adc_firmware/incremental_db/\r\nmax10_adc_firmware/output_files/\r\nmax10_adc_firmware/simulation/\r\neagle/max10adc*.b#*\r\neagle/max10adc*.s#*\r\neagle/max10adc*.job\r\neagle/max10adc*.pro\r\nsoftware/*.pyc\r\nsoftware/__*\r\n.idea\r\n"
  },
  {
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  },
  {
    "path": "LICENSE.md",
    "content": "MIT License\r\n\r\nCopyright (c) 2018 Andrew C. Haas\r\n\r\nPermission is hereby granted, free of charge, to any person obtaining a copy\r\nof this software and associated documentation files (the \"Software\"), to deal\r\nin the Software without restriction, including without limitation the rights\r\nto use, copy, modify, merge, publish, distribute, sublicense, and/or sell\r\ncopies of the Software, and to permit persons to whom the Software is\r\nfurnished to do so, subject to the following conditions:\r\n\r\nThe above copyright notice and this permission notice shall be included in all\r\ncopies or substantial portions of the Software.\r\n\r\nTHE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r\nIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r\nFITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\r\nAUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\r\nLIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\r\nOUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\r\nSOFTWARE.\r\n\r\n"
  },
  {
    "path": "README.md",
    "content": "# Haasoscope\n\nDocs, design, firmware, and software for the Haasoscope!\nRead the guide here: https://goo.gl/1Ry1k4 \n\nOriginal funding campaign: https://www.crowdsupply.com/andy-haas/haasoscope (see the \"updates\" tab for lots of info)\nNow also for sale on eBay - just search for \"Haasoscope\": https://www.ebay.com/sch/i.html?_nkw=haasoscope\n\nA changelog for the python code is here: https://docs.google.com/document/d/18tjrI03KipmFqbNIHOzAKYy1VVE9wWbefSHazbPP8Gc/edit?usp=sharing and it also has pointers to changelogs for the firmware, board, and android app.\n\n3D printable cases are available (see the guide for info)\n"
  },
  {
    "path": "android/.gitignore",
    "content": "\r\n# Key\r\n*.jks\r\n\r\n# Local configuration file (sdk path, etc)\r\nlocal.properties\r\n\r\n# Gradle\r\nbuild/\r\n.gradle\r\n\r\n.idea/workspace.xml\r\n.idea/caches/*\r\n.idea/misc.xml\r\nandroid.iml\r\n\r\n"
  },
  {
    "path": "android/build.gradle",
    "content": "buildscript {\n    repositories {\n        jcenter()\n        google()\n\n    }\n    dependencies {\n        classpath 'com.android.tools.build:gradle:3.1.3'\n    }\n}\n\nallprojects {\n    repositories {\n        jcenter()\n        maven { url \"https://jitpack.io\" }\n    }\n}\n"
  },
  {
    "path": "android/cp_debug_apk.sh",
    "content": "cp -r example/build/outputs/apk/debug .\n"
  },
  {
    "path": "android/debug/output.json",
    "content": "[{\"outputType\":{\"type\":\"APK\"},\"apkInfo\":{\"type\":\"MAIN\",\"splits\":[],\"versionCode\":1,\"versionName\":\"1.0.4\",\"enabled\":true,\"outputFile\":\"example-debug.apk\",\"fullName\":\"debug\",\"baseName\":\"debug\"},\"path\":\"example-debug.apk\",\"properties\":{}}]"
  },
  {
    "path": "android/debug_1.0.3/output.json",
    "content": "[{\"outputType\":{\"type\":\"APK\"},\"apkInfo\":{\"type\":\"MAIN\",\"splits\":[],\"versionCode\":1,\"versionName\":\"1.0.3\",\"enabled\":true,\"outputFile\":\"example-debug.apk\",\"fullName\":\"debug\",\"baseName\":\"debug\"},\"path\":\"example-debug.apk\",\"properties\":{}}]"
  },
  {
    "path": "android/debug_1.0.4/output.json",
    "content": "[{\"outputType\":{\"type\":\"APK\"},\"apkInfo\":{\"type\":\"MAIN\",\"splits\":[],\"versionCode\":1,\"versionName\":\"1.0.4\",\"enabled\":true,\"outputFile\":\"example-debug.apk\",\"fullName\":\"debug\",\"baseName\":\"debug\"},\"path\":\"example-debug.apk\",\"properties\":{}}]"
  },
  {
    "path": "android/example/.gitignore",
    "content": "/build\n*.jks\nsigning.properties"
  },
  {
    "path": "android/example/build.gradle",
    "content": "apply plugin: 'com.android.application'\n\nandroid {\n    signingConfigs {\n        config {\n        }\n    }\n    repositories {\n        // The order in which you list these repositories matter.\n        google()\n        jcenter()\n    }\n    compileSdkVersion Integer.parseInt(project.ANDROID_BUILD_SDK_VERSION)\n    defaultConfig {\n        applicationId \"com.felhr.serialportexample\"\n        minSdkVersion Integer.parseInt(project.ANDROID_BUILD_MIN_SDK_VERSION)\n        targetSdkVersion Integer.parseInt(project.ANDROID_BUILD_TARGET_SDK_VERSION)\n        versionName project.VERSION_NAME\n        versionCode Integer.parseInt(project.VERSION_CODE)\n        minSdkVersion 14\n    }\n    compileOptions {\n        encoding \"UTF-8\"\n        sourceCompatibility JavaVersion.VERSION_1_7\n        targetCompatibility JavaVersion.VERSION_1_7\n    }\n    buildToolsVersion '27.0.3'\n}\n\ndependencies {\n    implementation 'com.android.support:support-v4:27.1.1'\n    implementation 'com.android.support:appcompat-v7:27.1.1'\n    implementation 'com.android.support:design:27.1.1'\n    implementation 'com.github.felHR85:UsbSerial:4.5.2'\n    implementation 'com.jjoe64:graphview:4.2.2'\n}\n"
  },
  {
    "path": "android/example/example.iml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<module external.linked.project.id=\":example\" external.linked.project.path=\"$MODULE_DIR$\" external.root.project.path=\"$MODULE_DIR$/..\" external.system.id=\"GRADLE\" type=\"JAVA_MODULE\" version=\"4\">\n  <component name=\"FacetManager\">\n    <facet type=\"android-gradle\" name=\"Android-Gradle\">\n      <configuration>\n        <option name=\"GRADLE_PROJECT_PATH\" value=\":example\" />\n      </configuration>\n    </facet>\n    <facet type=\"android\" name=\"Android\">\n      <configuration>\n        <option name=\"SELECTED_BUILD_VARIANT\" value=\"debug\" />\n        <option name=\"ASSEMBLE_TASK_NAME\" value=\"assembleDebug\" />\n        <option name=\"COMPILE_JAVA_TASK_NAME\" value=\"compileDebugSources\" />\n        <afterSyncTasks>\n          <task>generateDebugSources</task>\n        </afterSyncTasks>\n        <option name=\"ALLOW_USER_CONFIGURATION\" value=\"false\" />\n        <option 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    "path": "android/example/src/main/java/com/felhr/serialportexample/FFT.java",
    "content": "package com.felhr.serialportexample;\r\n\r\n/******************************************************************************\r\n *  Compilation:  javac FFT.java\r\n *  Execution:    java FFT n\r\n *  Dependencies: Complex.java\r\n *\r\n *  Compute the FFT and inverse FFT of a length n complex sequence\r\n *  using the radix 2 Cooley-Tukey algorithm.\r\n\r\n *  Bare bones implementation that runs in O(n log n) time. Our goal\r\n *  is to optimize the clarity of the code, rather than performance.\r\n *\r\n *  Limitations\r\n *  -----------\r\n *   -  assumes n is a power of 2\r\n *\r\n *   -  not the most memory efficient algorithm (because it uses\r\n *      an object type for representing complex numbers and because\r\n *      it re-allocates memory for the subarray, instead of doing\r\n *      in-place or reusing a single temporary array)\r\n *\r\n *  For an in-place radix 2 Cooley-Tukey FFT, see\r\n *  https://introcs.cs.princeton.edu/java/97data/InplaceFFT.java.html\r\n *\r\n ******************************************************************************/\r\n\r\npublic class FFT {\r\n\r\n    class FFTresult{\r\n        public FFTresult(double[] absSignal, int mPeakPos, double mMaxFFTSample) {\r\n            this.absSignal = absSignal;\r\n            this.mPeakPos = mPeakPos;\r\n            this.mMaxFFTSample = mMaxFFTSample;\r\n        }\r\n        public double[] absSignal;\r\n        public int mPeakPos;\r\n        public double mMaxFFTSample;\r\n    }\r\n\r\n    public FFTresult calculateFFT(double[] signal) {\r\n        int mNumberOfFFTPoints = signal.length;\r\n        double mMaxFFTSample;\r\n        double temp;\r\n        Complex[] y;\r\n        Complex[] complexSignal = new Complex[mNumberOfFFTPoints];\r\n        double[] absSignal = new double[mNumberOfFFTPoints/2];\r\n\r\n        for(int i = 0; i < mNumberOfFFTPoints; i++){\r\n            //temp = (double)((signal[2*i] & 0xFF) | (signal[2*i+1] << 8)) / 32768.0F;\r\n            complexSignal[i] = new Complex(signal[i],0.0);\r\n        }\r\n\r\n        y = FFT.fft(complexSignal); // --> Here I use FFT class\r\n\r\n        mMaxFFTSample = 0.0;\r\n        int mPeakPos = 0;\r\n        for(int i = 0; i < (mNumberOfFFTPoints/2); i++)\r\n        {\r\n            absSignal[i] = Math.sqrt(Math.pow(y[i].re(), 2) + Math.pow(y[i].im(), 2));\r\n            if(i>0 && i<absSignal.length/2 && absSignal[i] > mMaxFFTSample) // ignore DC component\r\n            {\r\n                mMaxFFTSample = absSignal[i];\r\n                mPeakPos = i;\r\n            }\r\n        }\r\n\r\n        return new FFTresult(absSignal, mPeakPos, mMaxFFTSample);\r\n    }\r\n\r\n    // compute the FFT of x[], assuming its length is a power of 2\r\n    public static Complex[] fft(Complex[] x) {\r\n        int n = x.length;\r\n\r\n        // base case\r\n        if (n == 1) return new Complex[] { x[0] };\r\n\r\n        // radix 2 Cooley-Tukey FFT\r\n        if (n % 2 != 0) {\r\n            throw new IllegalArgumentException(\"n is not a power of 2\");\r\n        }\r\n\r\n        // fft of even terms\r\n        Complex[] even = new Complex[n/2];\r\n        for (int k = 0; k < n/2; k++) {\r\n            even[k] = x[2*k];\r\n        }\r\n        Complex[] q = fft(even);\r\n\r\n        // fft of odd terms\r\n        Complex[] odd  = even;  // reuse the array\r\n        for (int k = 0; k < n/2; k++) {\r\n            odd[k] = x[2*k + 1];\r\n        }\r\n        Complex[] r = fft(odd);\r\n\r\n        // combine\r\n        Complex[] y = new Complex[n];\r\n        for (int k = 0; k < n/2; k++) {\r\n            double kth = -2 * k * Math.PI / n;\r\n            Complex wk = new Complex(Math.cos(kth), Math.sin(kth));\r\n            y[k]       = q[k].plus(wk.times(r[k]));\r\n            y[k + n/2] = q[k].minus(wk.times(r[k]));\r\n        }\r\n        return y;\r\n    }\r\n\r\n    // compute the inverse FFT of x[], assuming its length is a power of 2\r\n    public static Complex[] ifft(Complex[] x) {\r\n        int n = x.length;\r\n        Complex[] y = new Complex[n];\r\n\r\n        // take conjugate\r\n        for (int i = 0; i < n; i++) {\r\n            y[i] = x[i].conjugate();\r\n        }\r\n\r\n        // compute forward FFT\r\n        y = fft(y);\r\n\r\n        // take conjugate again\r\n        for (int i = 0; i < n; i++) {\r\n            y[i] = y[i].conjugate();\r\n        }\r\n\r\n        // divide by n\r\n        for (int i = 0; i < n; i++) {\r\n            y[i] = y[i].scale(1.0 / n);\r\n        }\r\n\r\n        return y;\r\n\r\n    }\r\n\r\n    // compute the circular convolution of x and y\r\n    public static Complex[] cconvolve(Complex[] x, Complex[] y) {\r\n\r\n        // should probably pad x and y with 0s so that they have same length\r\n        // and are powers of 2\r\n        if (x.length != y.length) {\r\n            throw new IllegalArgumentException(\"Dimensions don't agree\");\r\n        }\r\n\r\n        int n = x.length;\r\n\r\n        // compute FFT of each sequence\r\n        Complex[] a = fft(x);\r\n        Complex[] b = fft(y);\r\n\r\n        // point-wise multiply\r\n        Complex[] c = new Complex[n];\r\n        for (int i = 0; i < n; i++) {\r\n            c[i] = a[i].times(b[i]);\r\n        }\r\n\r\n        // compute inverse FFT\r\n        return ifft(c);\r\n    }\r\n\r\n    // compute the linear convolution of x and y\r\n    public static Complex[] convolve(Complex[] x, Complex[] y) {\r\n        Complex ZERO = new Complex(0, 0);\r\n\r\n        Complex[] a = new Complex[2 * x.length];\r\n        for (int i = 0; i < x.length; i++) a[i] = x[i];\r\n        for (int i = x.length; i < 2 * x.length; i++) a[i] = ZERO;\r\n\r\n        Complex[] b = new Complex[2 * y.length];\r\n        for (int i = 0; i < y.length; i++) b[i] = y[i];\r\n        for (int i = y.length; i < 2 * y.length; i++) b[i] = ZERO;\r\n\r\n        return cconvolve(a, b);\r\n    }\r\n}\r\n\r\n\r\n/*\r\n *  Data type for complex numbers.\r\n *\r\n *  The data type is \"immutable\" so once you create and initialize\r\n *  a Complex object, you cannot change it. The \"final\" keyword\r\n *  when declaring re and im enforces this rule, making it a\r\n *  compile-time error to change the .re or .im instance variables after\r\n *  they've been initialized.\r\n *\r\n *  % java Complex\r\n *  a            = 5.0 + 6.0i\r\n *  b            = -3.0 + 4.0i\r\n *  Re(a)        = 5.0\r\n *  Im(a)        = 6.0\r\n *  b + a        = 2.0 + 10.0i\r\n *  a - b        = 8.0 + 2.0i\r\n *  a * b        = -39.0 + 2.0i\r\n *  b * a        = -39.0 + 2.0i\r\n *  a / b        = 0.36 - 1.52i\r\n *  (a / b) * b  = 5.0 + 6.0i\r\n *  conj(a)      = 5.0 - 6.0i\r\n *  |a|          = 7.810249675906654\r\n *  tan(a)       = -6.685231390246571E-6 + 1.0000103108981198i\r\n *\r\n*/\r\n\r\nclass Complex {\r\n    private final double re;   // the real part\r\n    private final double im;   // the imaginary part\r\n\r\n    // create a new object with the given real and imaginary parts\r\n    public Complex(double real, double imag) {\r\n        re = real;\r\n        im = imag;\r\n    }\r\n\r\n    // return a string representation of the invoking Complex object\r\n    public String toString() {\r\n        if (im == 0) return re + \"\";\r\n        if (re == 0) return im + \"i\";\r\n        if (im <  0) return re + \" - \" + (-im) + \"i\";\r\n        return re + \" + \" + im + \"i\";\r\n    }\r\n\r\n    // return abs/modulus/magnitude\r\n    public double abs() {\r\n        return Math.hypot(re, im);\r\n    }\r\n\r\n    // return angle/phase/argument, normalized to be between -pi and pi\r\n    public double phase() {\r\n        return Math.atan2(im, re);\r\n    }\r\n\r\n    // return a new Complex object whose value is (this + b)\r\n    public Complex plus(Complex b) {\r\n        Complex a = this;             // invoking object\r\n        double real = a.re + b.re;\r\n        double imag = a.im + b.im;\r\n        return new Complex(real, imag);\r\n    }\r\n\r\n    // return a new Complex object whose value is (this - b)\r\n    public Complex minus(Complex b) {\r\n        Complex a = this;\r\n        double real = a.re - b.re;\r\n        double imag = a.im - b.im;\r\n        return new Complex(real, imag);\r\n    }\r\n\r\n    // return a new Complex object whose value is (this * b)\r\n    public Complex times(Complex b) {\r\n        Complex a = this;\r\n        double real = a.re * b.re - a.im * b.im;\r\n        double imag = a.re * b.im + a.im * b.re;\r\n        return new Complex(real, imag);\r\n    }\r\n\r\n    // return a new object whose value is (this * alpha)\r\n    public Complex scale(double alpha) {\r\n        return new Complex(alpha * re, alpha * im);\r\n    }\r\n\r\n    // return a new Complex object whose value is the conjugate of this\r\n    public Complex conjugate() {\r\n        return new Complex(re, -im);\r\n    }\r\n\r\n    // return a new Complex object whose value is the reciprocal of this\r\n    public Complex reciprocal() {\r\n        double scale = re*re + im*im;\r\n        return new Complex(re / scale, -im / scale);\r\n    }\r\n\r\n    // return the real or imaginary part\r\n    public double re() { return re; }\r\n    public double im() { return im; }\r\n\r\n    // return a / b\r\n    public Complex divides(Complex b) {\r\n        Complex a = this;\r\n        return a.times(b.reciprocal());\r\n    }\r\n\r\n    // return a new Complex object whose value is the complex exponential of this\r\n    public Complex exp() {\r\n        return new Complex(Math.exp(re) * Math.cos(im), Math.exp(re) * Math.sin(im));\r\n    }\r\n\r\n    // return a new Complex object whose value is the complex sine of this\r\n    public Complex sin() {\r\n        return new Complex(Math.sin(re) * Math.cosh(im), Math.cos(re) * Math.sinh(im));\r\n    }\r\n\r\n    // return a new Complex object whose value is the complex cosine of this\r\n    public Complex cos() {\r\n        return new Complex(Math.cos(re) * Math.cosh(im), -Math.sin(re) * Math.sinh(im));\r\n    }\r\n\r\n    // return a new Complex object whose value is the complex tangent of this\r\n    public Complex tan() {\r\n        return sin().divides(cos());\r\n    }\r\n\r\n    // a static version of plus\r\n    public static Complex plus(Complex a, Complex b) {\r\n        double real = a.re + b.re;\r\n        double imag = a.im + b.im;\r\n        Complex sum = new Complex(real, imag);\r\n        return sum;\r\n    }\r\n\r\n    // See Section 3.3.\r\n    public boolean equals(Object x) {\r\n        if (x == null) return false;\r\n        if (this.getClass() != x.getClass()) return false;\r\n        Complex that = (Complex) x;\r\n        return (this.re == that.re) && (this.im == that.im);\r\n    }\r\n}\r\n\r\n"
  },
  {
    "path": "android/example/src/main/java/com/felhr/serialportexample/MainActivity.java",
    "content": "package com.felhr.serialportexample;\n\nimport android.Manifest;\nimport android.annotation.SuppressLint;\nimport android.bluetooth.BluetoothAdapter;\nimport android.bluetooth.BluetoothDevice;\nimport android.bluetooth.BluetoothSocket;\nimport android.content.BroadcastReceiver;\nimport android.content.ComponentName;\nimport android.content.Context;\nimport android.content.Intent;\nimport android.content.IntentFilter;\nimport android.content.ServiceConnection;\nimport android.content.pm.PackageManager;\nimport android.content.res.Configuration;\nimport android.graphics.Color;\nimport android.os.Build;\nimport android.os.Bundle;\nimport android.os.Handler;\nimport android.os.IBinder;\nimport android.os.Message;\nimport android.support.v4.app.ActivityCompat;\nimport android.support.v4.view.GestureDetectorCompat;\nimport android.support.v7.app.AppCompatActivity;\nimport android.view.GestureDetector;\nimport android.view.MotionEvent;\nimport android.view.View;\nimport android.widget.Button;\nimport android.widget.EditText;\nimport android.widget.ImageButton;\nimport android.widget.TextView;\nimport android.widget.Toast;\nimport android.widget.ToggleButton;\n\nimport com.jjoe64.graphview.GraphView;\nimport com.jjoe64.graphview.series.DataPoint;\nimport com.jjoe64.graphview.series.DataPointInterface;\nimport com.jjoe64.graphview.series.LineGraphSeries;\nimport com.jjoe64.graphview.series.OnDataPointTapListener;\nimport com.jjoe64.graphview.series.Series;\n\nimport java.io.IOException;\nimport java.io.InputStream;\nimport java.io.OutputStream;\nimport java.lang.ref.WeakReference;\nimport java.math.BigInteger;\nimport java.nio.ByteBuffer;\nimport java.util.Set;\nimport java.util.UUID;\n\nimport static com.felhr.serialportexample.UsbService.MESSAGE_FROM_SERIAL_PORT;\n\npublic class MainActivity extends AppCompatActivity {\n\n    protected boolean findBT()\n    {\n        mBluetoothAdapter = BluetoothAdapter.getDefaultAdapter();\n        if(mBluetoothAdapter == null)\n        {\n            display.append(\"No bluetooth adapter available\\n\");\n        }\n\n        if(!mBluetoothAdapter.isEnabled())\n        {\n            Intent enableBluetooth = new Intent(BluetoothAdapter.ACTION_REQUEST_ENABLE);\n            startActivityForResult(enableBluetooth, 0);\n        }\n\n        Set<BluetoothDevice> pairedDevices = mBluetoothAdapter.getBondedDevices();\n        if(pairedDevices.size() > 0)\n        {\n            for(BluetoothDevice device : pairedDevices)\n            {\n                if(device.getName().equals(\"HC-05\"))\n                {\n                    mmDevice = device;\n                    display.append(\"Bluetooth Device Paired\\n\");\n                    return true;\n                }\n            }\n        }\n        return false;\n    }\n\n    void openBT() throws IOException\n    {\n        UUID uuid = UUID.fromString(\"00001101-0000-1000-8000-00805F9B34FB\"); //Standard SerialPortService ID\n        mmSocket = mmDevice.createRfcommSocketToServiceRecord(uuid);\n        mmSocket.connect();\n        mmOutputStream = mmSocket.getOutputStream();\n        mmInputStream = mmSocket.getInputStream();\n\n        beginListenForData();\n        doingusb = false;\n        display.append(\"Bluetooth Opened\\n\");\n    }\n\n    void beginListenForData()\n    {\n        final Handler handler = new Handler();\n\n        stopWorker = false;\n        workerThread = new Thread(new Runnable()\n        {\n            public void run()\n            {\n                int bytessofar=0;\n                while(!Thread.currentThread().isInterrupted() && !stopWorker) {\n                    try {\n                        int bytesAvailable = mmInputStream.available();\n                        if(bytesAvailable > 0) {\n                            bytessofar+=bytesAvailable;\n                            byte[] packetBytes = new byte[bytesAvailable];\n                            //noinspection ResultOfMethodCallIgnored\n                            mmInputStream.read(packetBytes);\n                            mHandler.obtainMessage(MESSAGE_FROM_SERIAL_PORT, packetBytes).sendToTarget();\n                            String data = byteArrayToHex(packetBytes);\n                            String deb = \"\";\n                            if (bytessofar==8) {\n                                if (debugme) deb=\" : sync\";\n                                bytessofar=0;\n                            }\n                            if (bytessofar==numsamples*4) {\n                                if (debugme) deb=\" : event\";\n                                bytessofar=0;\n                            }\n                            if (debugme) {\n                                final String dataf = data + deb;\n                                handler.post(new Runnable() {\n                                    public void run() {\n                                        display.append(dataf + \"\\n\");\n                                    }\n                                });\n                            }\n                        }\n                    }\n                    catch (IOException ex){\n                        stopWorker = true;\n                    }\n                }\n            }\n        });\n\n        workerThread.start();\n    }\n\n    void sendData(int x) throws IOException\n    {\n        if (x>127) x -= 256; // since it goes to bytes as twos\n        if (mmOutputStream!=null) mmOutputStream.write(x);\n        //display.append(eventn+\" Data Sent: \"+x+\"\\n\");\n    }\n\n    void closeBT() throws IOException\n    {\n        stopWorker = true;\n        if (mmOutputStream!=null){\n            mmOutputStream.close();\n            mmInputStream.close();\n            mmSocket.close();\n        }\n        //display.append(\"Bluetooth Closed\\n\");\n    }\n\n    protected UsbService usbService;\n    protected TextView display;\n    protected EditText editText;\n    protected MyHandler mHandler;\n    private GestureDetectorCompat mDetector;\n    protected ToggleButton toggle_selectchan;\n    protected LineGraphSeries<DataPoint> _series0;\n    protected LineGraphSeries<DataPoint> _series1;\n    protected LineGraphSeries<DataPoint> _series2;\n    protected LineGraphSeries<DataPoint> _series3;\n    protected LineGraphSeries<DataPoint> _series_hl;\n    protected LineGraphSeries<DataPoint> _series_vl;\n    protected GraphView graph;\n    private int numsamples = (int)Math.pow(2,9)+1; // <4096 please, and odd (why?), and close to a power of 2 for FFT\n    private int eventn = 0;\n    private int downsample = 3;\n    private boolean autogo = true;\n    private boolean oldautogo = autogo;\n    private ByteBuffer myserialBuffer; // for synchronizing serial data\n    private String myboardid = \"\";\n    private boolean synced = false;\n    private double yscale = 7.5;\n    private double clkrate = 125.0; // ADC sample rate in MHz\n    private double xscaling = 1.0; // account for xaxis ns, us, ms\n    protected float lastscreenX=0, lastscreenY=0;\n    protected float lastscreenfracX=0, lastscreenfracY=0;\n    protected int selectedchannel=-1; // the selected channel, or -1 if none\n    protected boolean [] gain = {false,false,false,false}; // true if high gain\n    protected int [] daclevel = {0,0,0,0}; // the dac level of each channel\n    protected boolean doingfft = false;\n    protected static final boolean debugme = false;\n\n    BluetoothAdapter mBluetoothAdapter;\n    BluetoothSocket mmSocket;\n    BluetoothDevice mmDevice;\n    OutputStream mmOutputStream;\n    InputStream mmInputStream;\n    Thread workerThread;\n    volatile boolean stopWorker;\n\n    @Override\n    protected void onDestroy(){\n        super.onDestroy();\n        if (!doingusb) {\n            try {closeBT();}\n            catch (IOException ignored) { }\n        }\n    }\n\n    // this function is called upon creation, and whenever the layout (e.g. portrait/landscape) changes\n    @SuppressLint(\"ClickableViewAccessibility\")\n    @Override\n    protected void onCreate(Bundle savedInstanceState) {\n        super.onCreate(savedInstanceState);\n        setContentView(R.layout.activity_main);\n        mDetector = new GestureDetectorCompat(this, new MyGestureListener());\n\n        if (savedInstanceState!=null) {\n            autogo = savedInstanceState.getBoolean(\"autogo\");\n            doingfft = savedInstanceState.getBoolean(\"doingfft\");\n            downsample = savedInstanceState.getInt(\"downsample\");\n            lastscreenX = savedInstanceState.getFloat(\"lastscreenX\");\n            lastscreenY = savedInstanceState.getFloat(\"lastscreenY\");\n            doingusb = savedInstanceState.getBoolean(\"doingusb\");\n        }\n\n        init_graph();\n        setupgraph();\n\n        graph.setOnTouchListener(new View.OnTouchListener(){\n            public boolean onTouch(View v, MotionEvent event) {\n                mDetector.onTouchEvent(event);\n                if(event.getAction() == MotionEvent.ACTION_DOWN) {\n                    lastscreenfracX = (event.getX()-graph.getGraphContentLeft())/graph.getGraphContentWidth();\n                    lastscreenfracY = (event.getY()-graph.getGraphContentTop())/graph.getGraphContentHeight();\n                    lastscreenX=(float)(graph.getViewport().getMinX(false)+lastscreenfracX*(graph.getViewport().getMaxX(false)-graph.getViewport().getMinX(false)));\n                    lastscreenY= (float)(graph.getViewport().getMaxY(false)-lastscreenfracY*(graph.getViewport().getMaxY(false)-graph.getViewport().getMinY(false)));\n                    //display.append(\"Touch \"+String.valueOf(lastscreenX)+\" \"+String.valueOf(lastscreenY)+\"\\n\");\n                }\n                return false;\n            }\n        });\n        graph.setOnLongClickListener(new View.OnLongClickListener(){\n            public boolean onLongClick(View v) {\n                if (doingfft) return true;\n                //display.append(\"Long click \"+String.valueOf(lastscreenX)+\" \"+String.valueOf(lastscreenY)+\"\\n\");\n                graph.removeSeries(_series_hl);\n                graph.removeSeries(_series_vl);\n                add_vl_hl();\n                int thresh = (int)(255*lastscreenfracY);\n                if (thresh<0) thresh=0;\n                if (thresh>255) thresh=255;\n                waitalot();\n                send2usb(127); send2usb(thresh);\n                int tt = (int)((numsamples-1)*lastscreenfracX);\n                if (tt<5) tt=5;\n                if (tt>numsamples-5) tt=numsamples-5;\n                tt+=Math.pow(2,12);//use the current timebase in the offset\n                send2usb(121); send2usb(tt/256); send2usb(tt%256);\n                display.append(\"Trig \"+String.valueOf(thresh)+\" \"+String.valueOf(tt-Math.pow(2,12))+\"\\n\");\n                donewaitalot();\n                return false;\n            }\n        });\n\n        mHandler = new MyHandler(this);\n        myserialBuffer= ByteBuffer.allocateDirect(numsamples*4*2);//for good luck\n\n        editText = findViewById(R.id.editText1);\n        display = findViewById(R.id.textView1);\n        toggle_selectchan = findViewById(R.id.toggle_selectchan);\n        final ImageButton button_up = findViewById(R.id.button_up);\n        button_up.setOnClickListener(new View.OnClickListener() {\n            @Override\n            public void onClick(View v) {\n                //display.append(\"up\\n\");\n                waitalot(); downsample_plus(); donewaitalot();\n            }\n        });\n        final ImageButton button_down = findViewById(R.id.button_down);\n        button_down.setOnClickListener(new View.OnClickListener() {\n            @Override\n            public void onClick(View v) {\n                //display.append(\"down\\n\");\n                waitalot(); downsample_minus(); donewaitalot();\n            }\n        });\n        final ImageButton button_share = findViewById(R.id.button_share);\n        button_share.setOnClickListener(new View.OnClickListener() {\n            @Override\n            public void onClick(View v) {\n                //display.append(\"share\\n\");\n                if (isStoragePermissionGranted()){\n                    graph.takeSnapshotAndShare(graph.getContext(), \"Haasoscope share\", \"Haasoscope share\");\n                }\n                else{\n                    display.append(\"no permissions?\\n\");\n                }\n            }\n        });\n        final ImageButton button_pause = findViewById(R.id.button_pause);\n        button_pause.setOnClickListener(new View.OnClickListener() {\n            @Override\n            public void onClick(View v) {\n                //display.append(\"pause\\n\");\n                waitalot();\n                autogo = !oldautogo;\n                oldautogo = autogo;\n                donewaitalot();\n            }\n        });\n        toggle_selectchan.setTextOff(\"-1\");\n        toggle_selectchan.setChecked(false);\n        toggle_selectchan.invalidate();\n        toggle_selectchan.setOnClickListener(new View.OnClickListener() {\n            @Override\n            public void onClick(View v) {\n                if (selectedchannel>=0) {\n                    myseries[selectedchannel].setThickness(thickness);\n                    graph.invalidate();\n                    selectedchannel = -1;\n                    toggle_selectchan.setTextOff(\"-1\");\n                    toggle_selectchan.setChecked(false);\n                    toggle_selectchan.invalidate();\n                }\n                else{\n                    selectedchannel = 0;\n                    myseries[selectedchannel].setThickness(2*thickness);\n                    graph.invalidate();\n                    toggle_selectchan.setTextOn(\"0\");\n                    toggle_selectchan.setChecked(true);\n                    toggle_selectchan.invalidate();\n                }\n            }\n        });\n        if (getResources().getConfiguration().orientation == Configuration.ORIENTATION_LANDSCAPE) {\n            display.setVisibility(View.GONE);\n        }\n        else {\n            display.setVisibility(View.VISIBLE);\n        }\n        final Button sendButton = findViewById(R.id.buttonSend);\n        sendButton.setOnClickListener(new View.OnClickListener() {\n            @Override\n            public void onClick(View v) {\n                String data = editText.getText().toString();\n                if (!data.equals(\"\")) {\n                    waitalot();\n                    switch (data) {\n                        case \"G\":\n                        case \"g\":\n                            send_initialize();\n                            editText.setText(\"\");\n                            break;\n                        case \"p\":\n                        case \"P\":\n                            autogo = !oldautogo;\n                            oldautogo = autogo;\n                            break;\n                        case \"f\":\n                        case \"F\":\n                            doingfft = !doingfft;\n                            display.append(\"dofft now = \"+doingfft+\"\\n\");\n                            setupgraph();\n                            break;\n                        case \"(\":\n                        case \"( \":\n                            downsample_plus();\n                            break;\n                        case \")\":\n                        case \") \":\n                            downsample_minus();\n                            break;\n                        case \"x\":\n                            send2usb(134);\n                            send2usb(0);\n                            togglegain(0);\n                            send2usb(134);\n                            send2usb(1);\n                            togglegain(1);\n                            send2usb(134);\n                            send2usb(2);\n                            togglegain(2);\n                            send2usb(134);\n                            send2usb(3);\n                            togglegain(3);\n                            break;\n                        case \"x0\":\n                            send2usb(134);\n                            send2usb(0);\n                            togglegain(0);\n                            break;\n                        case \"x1\":\n                            send2usb(134);\n                            send2usb(1);\n                            togglegain(1);\n                            break;\n                        case \"x2\":\n                            send2usb(134);\n                            send2usb(2);\n                            togglegain(2);\n                            break;\n                        case \"x3\":\n                            send2usb(134);\n                            send2usb(3);\n                            togglegain(3);\n                            break;\n                        default:\n                            display.append(data + \"\\n\");\n                            int di;\n                            try {\n                                di = Integer.parseInt(data);\n                            } catch (NumberFormatException e) {\n                                di = -1;\n                            }\n                            if (di >= 0 && di <= 255) {\n                                send2usb(di); // only send if it was a positive integer, 0-255\n                            }\n                            else {\n                                display.append(\"bad/unknown command!\\n\");\n                                editText.setText(\"\");\n                            }\n                            break;\n                    }\n                    donewaitalot();\n                }\n            }\n        });\n\n        if (findBT()) {\n            try {\n                openBT();\n            } catch (IOException ex) {\n                display.append(\"BT not opened\\n\");\n            }\n        }\n\n        // a little kickstart for autogo...\n        if (autogo) new kickstartThread().start();\n\n        display.append(\"Haasoscope \"+BuildConfig.VERSION_NAME+\"\\n\");\n    }\n\n    private void togglegain(int chan){\n        gain[chan]=!gain[chan];\n        waitalittle();\n        if (gain[chan]) setdac(chan,daclevel[chan]+800);\n        else setdac(chan,daclevel[chan]-800);\n    }\n\n    private void downsample_plus(){\n        if (downsample < 15) {\n            downsample += 1;\n            display.append(\"downsample is \" + String.valueOf(downsample) + \" \\n\");\n            send2usb(124);\n            send2usb(downsample);\n            int ds = downsample - 3;\n            if (ds < 1) ds = 1;\n            if (ds > 8) ds = 8; // otherwise we timeout upon readout\n            send2usb(125);\n            send2usb(ds);\n            setupgraph();\n        }\n    }\n\n    private void downsample_minus(){\n        if (downsample > 0) {\n            downsample -= 1;\n            display.append(\"downsample is \" + String.valueOf(downsample) + \" \\n\");\n            send2usb(124);\n            send2usb(downsample);\n            int ds = downsample - 3;\n            if (ds < 1) ds = 1;\n            if (ds > 8) ds = 8; // otherwise we timeout upon readout\n            send2usb(125);\n            send2usb(ds);\n            setupgraph();\n        }\n    }\n\n    class MyGestureListener extends GestureDetector.SimpleOnGestureListener {\n        @Override\n        public boolean onDown(MotionEvent event) {\n            return true;\n        }\n        @Override\n        public boolean onFling(MotionEvent event1, MotionEvent event2,\n                               float velocityX, float velocityY) {\n            //display.append( \"onFling: \" + event1.toString() + event2.toString() +\"\\n\" + velocityX + \" \" + velocityY +\"\\n\");\n            if (velocityX<-10000) {\n                display.append(\"fling left\\n\");\n                //waitalot(); downsample_minus(); donewaitalot();\n                return true;\n            }\n            if (velocityX>10000) {\n                display.append(\"fling right\\n\");\n                //waitalot(); downsample_plus(); donewaitalot();\n                return true;\n            }\n            if (selectedchannel>=0 && selectedchannel<=3){\n                int dy = (int)(event2.getY() - event1.getY());\n                display.append(\"dy = \"+dy+\"\\n\");\n                waitalot();\n                setdac(selectedchannel,daclevel[selectedchannel]+dy);\n                donewaitalot();\n            }\n\n            return true;\n        }\n    }\n\n    private boolean gotaneventlately=false;\n    private class kickstartThread extends Thread {\n        @Override\n        public void run() {\n            gotaneventlately=false;\n            while (true) {\n                try {\n                    kickstartThread.sleep(1000);\n                } catch (InterruptedException e) {\n                    e.printStackTrace();\n                    return;\n                }\n                if (!gotaneventlately) {\n                    send2usb(10);\n                }\n                else return;\n            }\n        }\n    }\n\n    @Override\n    public void onSaveInstanceState(Bundle savedInstanceState) {\n        super.onSaveInstanceState(savedInstanceState);\n        // Save UI state changes to the savedInstanceState.\n        savedInstanceState.putBoolean(\"autogo\", autogo);\n        savedInstanceState.putBoolean(\"doingfft\",doingfft);\n        savedInstanceState.putInt(\"downsample\",downsample);\n        savedInstanceState.putFloat(\"lastscreenX\",lastscreenX);\n        savedInstanceState.putFloat(\"lastscreenY\",lastscreenY);\n        savedInstanceState.putBoolean(\"doingusb\",doingusb);\n    }\n\n    void send_initialize(){\n        waitalittle();\n        send2usb(0); send2usb(20); // board ID 0\n        send2usb(30); send2usb(142); // get board ID\n        waitalittle();\n        if (doingusb) {\n            send2usb(135); send2usb(3); send2usb(100); // serialdelaytimerwait\n        }\n        else {\n            send2usb(135); send2usb(0); send2usb(0); // serialdelaytimerwait\n        }\n        send2usb(143); // enable highres mode\n        waitalittle(); send2usb(139); // auto-rearm trigger\n        send2usb(100);//final arming\n\n        //send2usb(122); send2usb(1); send2usb(0); // 256 samples per channel\n        send2usb(122); send2usb(numsamples/256); send2usb(numsamples%256); // samples per channel\n\n        send2usb(123); send2usb(0); // send increment\n        send2usb(124); send2usb(downsample); // downsample 3\n        send2usb(125); send2usb(1); // tickstowait 1\n\n        //100, 10 // get event (or just 10 if auto-rearming)\n\n        waitalittle(); send2usb(136); send2usb(2); send2usb(32); send2usb(0); send2usb(0); send2usb(255); send2usb(200);// io expanders on\n        waitalittle(); send2usb(136); send2usb(2); send2usb(32); send2usb(1); send2usb(0); send2usb(255); send2usb(200);// io expanders on\n        waitalittle(); send2usb(136); send2usb(2); send2usb(33); send2usb(0); send2usb(0); send2usb(255); send2usb(200);// io expanders on\n        waitalittle(); send2usb(136); send2usb(2); send2usb(33); send2usb(1); send2usb(0); send2usb(255); send2usb(200);// io expanders on\n        waitalittle(); send2usb(136); send2usb(2); send2usb(32); send2usb(18); send2usb(240); send2usb(255); send2usb(200);// init, and turn on ADCs!\n        waitalittle(); send2usb(136); send2usb(2); send2usb(32); send2usb(19); send2usb(15); send2usb(255); send2usb(200);// init, and turn on ADCs!\n        waitalittle(); send2usb(136); send2usb(2); send2usb(33); send2usb(18); send2usb(0); send2usb(255); send2usb(200);// init, and turn on ADCs!\n        waitalittle(); send2usb(136); send2usb(2); send2usb(33); send2usb(19); send2usb(0); send2usb(255); send2usb(200);// init, and turn on ADCs!\n\n        waitalittle(); send2usb(131);  send2usb(8); send2usb(0); // spi offset\n        waitalittle(); send2usb(131);  send2usb(6); send2usb(16); // spi offset binary output\n        //waitalittle(); send2usb(131);  send2usb(6); send2usb(80); // spi offset binary output - test pattern\n        waitalittle(); send2usb(131);  send2usb(1); send2usb(0 ); // spi not multiplexed output\n\n        //waitalittle(); send2usb(136); send2usb(3); send2usb(96); send2usb(80); send2usb(136); send2usb(22); send2usb(0); // board 0 calib, chan 0\n        //waitalittle(); send2usb(136); send2usb(3); send2usb(96); send2usb(82); send2usb(135); send2usb(248); send2usb(0); // board 0 calib, chan 1\n        //waitalittle(); send2usb(136); send2usb(3); send2usb(96); send2usb(84); send2usb(136); send2usb(52); send2usb(0); // board 0 calib, chan 2\n        //waitalittle(); send2usb(136); send2usb(3); send2usb(96); send2usb(86); send2usb(136); send2usb(52); send2usb(0); // board 0 calib, chan 3\n        waitalittle(); setdac(0,2070);\n        waitalittle(); setdac(1,2040);\n        waitalittle(); setdac(2,2100);\n        waitalittle(); setdac(3,2100);\n\n        waitalittle();\n        display.append(\"sent initialization commands \\n\");\n    }\n\n    protected void setupgraph(){\n        if (doingfft){\n            double range = (clkrate/2.)/Math.pow(2,downsample);\n            graph.getViewport().setMinX(0.);\n            if (range>1.) {\n                xscaling = 1.;\n                graph.getGridLabelRenderer().setHorizontalAxisTitle(\"Frequency (MHz)\");\n            }\n            else if (range<1.){\n                xscaling = .001;\n                graph.getGridLabelRenderer().setHorizontalAxisTitle(\"Frequency (kHz)\");\n            }\n            graph.getViewport().setMaxX(range/xscaling);\n\n            graph.removeSeries(_series_hl);\n            graph.removeSeries(_series_vl);\n        }\n        else {\n            double range = (numsamples/2)*(Math.pow(2,downsample)/clkrate);\n            if (range>1000.) {\n                xscaling=1000.;\n                graph.getGridLabelRenderer().setHorizontalAxisTitle(\"Time (ms)\");\n            }\n            else {\n                graph.getGridLabelRenderer().setHorizontalAxisTitle(\"Time (us)\");\n                xscaling=1.;\n            }\n            graph.getViewport().setMinX(-range/xscaling);\n            graph.getViewport().setMaxX(range/xscaling);\n\n            graph.removeSeries(_series_hl);\n            graph.removeSeries(_series_vl);\n            add_vl_hl();\n        }\n        graph.invalidate();\n    }\n\n    private String processdata(byte [] bd){\n        int histlen=bd.length/4;\n        double yoffset = 0.;\n        String debug = \"\";\n        DataPoint [] [] seriesies = new DataPoint[4][histlen-1];\n        int s=0;\n        for (int ss=0; ss<4; ++ss) {\n            for (int p = 0; p < histlen - 1; ++p) {\n                int bdp = bd[1+p+s];//ignore the first sample in each channel\n                if (bdp < 0) bdp += 256;\n                bdp -= 128;\n                double yval = (yoffset - bdp) * (yscale / 256.); // got to flip it, since it's a negative feedback op amp\n                double xoffset = (p - (p / histlen) * histlen - numsamples / 2) * (Math.pow(2, downsample) / clkrate / xscaling);\n                seriesies[ss][p] = new DataPoint(xoffset, yval);\n            }\n            s+=histlen;\n        }\n\n        if (doingfft){\n            FFT.FFTresult [] ffTresult = new FFT.FFTresult[4];\n            double MaxFFTSample = 0.;\n            for (int ss=0; ss<4; ++ss) {\n                double[] x = new double[seriesies[ss].length];\n                for (int i = 0; i < seriesies[ss].length; ++i) {\n                    x[i] = seriesies[ss][i].getY();\n                    ++i;\n                }\n                FFT myfft = new FFT();\n                ffTresult[ss] = myfft.calculateFFT(x);\n                if (ffTresult[ss].mMaxFFTSample>MaxFFTSample) MaxFFTSample=ffTresult[ss].mMaxFFTSample;\n            }\n            for (int ss=0; ss<4; ++ss) {\n                seriesies[ss] = new DataPoint[ffTresult[ss].absSignal.length/2-1];\n                double fftscale = 8.0/MaxFFTSample;\n                for (int i = 0; i < ffTresult[ss].absSignal.length/2-1; ++i) {\n                    double freq = (clkrate/2./xscaling)*(i+1)/(ffTresult[ss].absSignal.length/2)/Math.pow(2,downsample);\n                    seriesies[ss][i] = new DataPoint(freq, -4.0 + fftscale * ffTresult[ss].absSignal[i+1]);\n                }\n            }\n        }\n\n        _series0.resetData(seriesies[0]);\n        _series1.resetData(seriesies[1]);\n        _series2.resetData(seriesies[2]);\n        _series3.resetData(seriesies[3]);\n\n        eventn++;//count the events\n        gotaneventlately=true;\n        if (eventn%100==0) display.append(\"event \"+String.valueOf(eventn)+\"\\n\");\n        if (autogo) send2usb(10); // get another event\n        return debug;\n    }\n\n    public static String byteArrayToHex(byte[] a) {\n        StringBuilder sb = new StringBuilder(a.length * 2);\n        for(byte b: a)\n            sb.append(String.format(\"%02x\", b));\n        return sb.toString();\n    }\n\n    static class MyHandler extends Handler {\n        private final WeakReference<MainActivity> mActivity;\n\n        private MyHandler(MainActivity activity) {\n            mActivity = new WeakReference<>(activity);\n        }\n\n        @Override\n        public void handleMessage(Message msg) {\n            switch (msg.what) {\n                case MESSAGE_FROM_SERIAL_PORT:\n                    byte [] bd = (byte[])msg.obj;\n                    if (8==bd.length) {\n                        //get the board id and save it, from the initial 142 call probably\n                        if (mActivity.get().myboardid.isEmpty()) {\n                            mActivity.get().myboardid = byteArrayToHex(bd);\n                            if (debugme) mActivity.get().display.append(\"myboardid = \" + mActivity.get().myboardid+\"\\n\");\n                            mActivity.get().synced = true;\n                        } else if (byteArrayToHex(bd).equals(mActivity.get().myboardid)) {\n                            mActivity.get().synced = true; // if we got a matching board id, we're synced up\n                            if (mActivity.get().autogo) mActivity.get().send2usb(10);//get another event\n                        }\n                        else mActivity.get().synced=false;\n                        mActivity.get().myserialBuffer.position(0);\n                        mActivity.get().myserialBuffer.clear();\n                        if (debugme) mActivity.get().display.append(\"synced now \"+String.valueOf(mActivity.get().synced)+\" - \"+String.valueOf(mActivity.get().eventn)+\"\\n\");\n                    }\n                    else{\n                        //deal with other sized packet\n                        mActivity.get().myserialBuffer.put(bd); // hopefully we have enough room in the buffer\n                    }\n\n                    //make sure we have the expected number of bytes\n                    //check via a call to get board id to make sure we know where we are in the serial stream\n                    String res=\"\";\n                    if (mActivity.get().synced && mActivity.get().myserialBuffer.position()==mActivity.get().numsamples*4) {//good!\n                        byte[] dst = new byte[mActivity.get().myserialBuffer.position()];\n                        mActivity.get().myserialBuffer.position(0);\n                        mActivity.get().myserialBuffer.get(dst, 0, dst.length);\n                        mActivity.get().myserialBuffer.clear();\n                        if (debugme) res = mActivity.get().processdata(dst);\n                        else mActivity.get().processdata(dst);\n                    }\n                    else if ((mActivity.get().doingusb) && mActivity.get().myserialBuffer.position()%mActivity.get().numsamples!=0){\n                        //oops, we got a weird amount over usb? better resync! (BT often gives odd sized packets)\n                        mActivity.get().myserialBuffer.position(0);\n                        mActivity.get().myserialBuffer.clear();\n                        mActivity.get().synced=false;\n                    }\n                    else if (mActivity.get().myserialBuffer.position()>mActivity.get().numsamples*4) {\n                        //oops, we got too much data? better resync!\n                        mActivity.get().myserialBuffer.position(0);\n                        mActivity.get().myserialBuffer.clear();\n                        mActivity.get().synced=false;\n                    }\n\n                    if (!mActivity.get().synced){\n                        mActivity.get().myserialBuffer.position(0);\n                        mActivity.get().myserialBuffer.clear();\n                        mActivity.get().send2usb(142);//request the board ID\n                    }\n\n                    //if (mActivity.get().display.getLineCount()>10) mActivity.get().display.setText(\"\");\n                    if (debugme) if (bd.length!=mActivity.get().numsamples || !res.equals(\"\")) mActivity.get().display.append(res +\" - \"+String.valueOf(mActivity.get().eventn)+\" - \"+String.valueOf(bd.length)+\"\\n\");\n\n                    break;\n                case UsbService.CTS_CHANGE:\n                    Toast.makeText(mActivity.get(), \"CTS_CHANGE\",Toast.LENGTH_LONG).show();\n                    break;\n                case UsbService.DSR_CHANGE:\n                    Toast.makeText(mActivity.get(), \"DSR_CHANGE\",Toast.LENGTH_LONG).show();\n                    break;\n            }\n        }\n    }\n\n    final int radius = 6;\n    final int thickness = 4;\n    protected LineGraphSeries [] myseries;\n\n    protected void init_graph() {\n\n        graph = findViewById(R.id.graph);\n        graph.getViewport().setBackgroundColor(Color.WHITE);\n        graph.getViewport().setDrawBorder(true);\n        graph.getGridLabelRenderer().setHighlightZeroLines(false);\n        graph.getGridLabelRenderer().setPadding(60);\n\n        _series0 = new LineGraphSeries<>(new DataPoint[]{\n                new DataPoint(-12, 1),\n                new DataPoint(-6, 2),\n                new DataPoint(0, 3),\n                new DataPoint(6, 2),\n                new DataPoint(12, -2)\n        });\n        _series0.setTitle(\"Chan 0\");\n        _series0.setColor(Color.RED);\n        _series0.setDrawDataPoints(true);\n        _series0.setDataPointsRadius(radius);\n        _series0.setThickness(thickness);\n        graph.addSeries(_series0);\n        _series1 = new LineGraphSeries<>(new DataPoint[]{\n                new DataPoint(-12, 2),\n                new DataPoint(-6, 1),\n                new DataPoint(0, -1),\n                new DataPoint(6, 0),\n                new DataPoint(12, 1)\n        });\n        _series1.setTitle(\"Chan 1\");\n        _series1.setColor(Color.GREEN);\n        _series1.setDrawDataPoints(true);\n        _series1.setDataPointsRadius(radius);\n        _series1.setThickness(thickness);\n        graph.addSeries(_series1);\n        _series2 = new LineGraphSeries<>(new DataPoint[]{\n                new DataPoint(-12, 3),\n                new DataPoint(-6, 2),\n                new DataPoint(0, 2),\n                new DataPoint(6, -1),\n                new DataPoint(12, -2)\n        });\n        _series2.setTitle(\"Chan 2\");\n        _series2.setColor(Color.BLUE);\n        _series2.setDrawDataPoints(true);\n        _series2.setDataPointsRadius(radius);\n        _series2.setThickness(thickness);\n        graph.addSeries(_series2);\n        _series3 = new LineGraphSeries<>(new DataPoint[]{\n                new DataPoint(-12, -3),\n                new DataPoint(-6, -2),\n                new DataPoint(0, -3),\n                new DataPoint(6, -2),\n                new DataPoint(12, -1)\n        });\n        _series3.setTitle(\"Chan 3\");\n        _series3.setColor(Color.MAGENTA);\n        _series3.setDrawDataPoints(true);\n        _series3.setDataPointsRadius(radius);\n        _series3.setThickness(thickness);\n        graph.addSeries(_series3);\n        myseries = new LineGraphSeries[]{_series0, _series1, _series2, _series3};\n\n        for (LineGraphSeries s : myseries) {\n            s.setOnDataPointTapListener(new OnDataPointTapListener() {\n                @Override\n                public void onTap(Series series, DataPointInterface dataPoint) {\n                    display.append(\"clicked: \" + series.getTitle() + \"  \" + dataPoint.toString() + \"\\n\");\n                    int i = 0;\n                    selectedchannel = -1;\n                    for (LineGraphSeries s : myseries) {\n                        if (s.getTitle().equals(series.getTitle())) {\n                            if (toggle_selectchan.isChecked()) {\n                                s.setThickness(2 * thickness);\n                                selectedchannel = i;\n                                toggle_selectchan.setTextOn(String.valueOf(selectedchannel));\n                                toggle_selectchan.setChecked(true);\n                                toggle_selectchan.invalidate();\n                            } else {\n                                display.append(\"Locked! Click -1 button to unlock.\\n\");\n                            }\n                        } else {\n                            s.setThickness(thickness);\n                        }\n                        ++i;\n                    }\n                    graph.invalidate();\n                }\n            });\n        }\n\n        if (!doingfft) {\n            add_vl_hl();\n        }\n\n        graph.getViewport().setXAxisBoundsManual(true);\n        graph.getViewport().setMinY(-yscale/2.-.25);\n        graph.getViewport().setMaxY(yscale/2.+.25);\n        graph.getViewport().setYAxisBoundsManual(true);\n        graph.getViewport().setScrollable(true);\n        graph.getViewport().setScalable(true);\n        graph.getGridLabelRenderer().setNumHorizontalLabels(7);\n        graph.getGridLabelRenderer().setHumanRounding(true,false);\n        graph.getGridLabelRenderer().setVerticalAxisTitle(\"Volts\");\n        graph.getGridLabelRenderer().setNumVerticalLabels(9);\n    }\n\n    protected void add_vl_hl() {\n        if (graph.getSeries().contains(_series_hl)) return;\n        _series_hl = new LineGraphSeries<>(new DataPoint[]{\n                new DataPoint(-numsamples/2/clkrate/xscaling * Math.pow(2, downsample), lastscreenY),\n                new DataPoint( numsamples/2/clkrate/xscaling * Math.pow(2, downsample), lastscreenY)\n        });\n        _series_hl.setTitle(\"Trig thresh\");\n        _series_hl.setColor(Color.GRAY);\n        _series_hl.setDrawDataPoints(false);\n        _series_hl.setThickness(thickness);\n        graph.addSeries(_series_hl);\n\n        _series_vl = new LineGraphSeries<>(new DataPoint[]{\n                new DataPoint(lastscreenX, 4),\n                new DataPoint(lastscreenX, -4)\n        });\n        _series_vl.setTitle(\"Trig pos\");\n        _series_vl.setColor(Color.GRAY);\n        _series_vl.setDrawDataPoints(false);\n        _series_vl.setThickness(thickness);\n        graph.addSeries(_series_vl);\n    }\n\n    public boolean isStoragePermissionGranted() {\n        if (Build.VERSION.SDK_INT >= 23) {\n            if (checkSelfPermission(android.Manifest.permission.WRITE_EXTERNAL_STORAGE)\n                    == PackageManager.PERMISSION_GRANTED) {\n                return true;\n            } else {\n                ActivityCompat.requestPermissions(this, new String[]{Manifest.permission.WRITE_EXTERNAL_STORAGE}, 1);\n                return false;\n            }\n        }\n        else { //permission is automatically granted on sdk<23 upon installation\n            return true;\n        }\n    }\n\n    protected void waitalittle(){\n        try {\n            if (doingusb) Thread.sleep(50);\n            else Thread.sleep(150); // need longer delay for BT??\n        } catch (InterruptedException e) {\n            e.printStackTrace();\n        }\n    }\n\n    protected void waitalot(){\n        oldautogo = autogo;\n        autogo=false;\n        try {\n            Thread.sleep(500);\n        } catch (InterruptedException e) {\n            e.printStackTrace();\n        }\n    }\n    protected void donewaitalot(){\n        autogo=oldautogo;\n        if (autogo) send2usb(10);//for good luck\n\n    }\n\n    protected void setdac(int chan, int val){\n        // channel 0 , board 0 calib\n        // 136, 3, // header for i2c command with 3 bytes of data\n        // 96, // i2c address of dac\n        // 80, // channel 80,82,84,86 for chan 0,1,2,3\n        // 136, 22, // high 4 bits can be 8 or 9 (internal ref 2V or 4V, respectively), next 12 bits are the 0-4095 level\n        // 0 // send to board 0 (200 for all boards)\n\n        if (chan<0 || chan>3) return;\n        if (val>4096*2-1 || val<0) return;\n        daclevel[chan]=val; //remember it\n        int d=8*16; //internal ref, gain=1 (0-2V)\n        if (val>4095) {\n            d=9*16; //internal ref, gain=2 (0-4V)\n            val/=2;\n        }\n        send2usb(136); send2usb(3);\n        send2usb(96);\n        send2usb(80+2*chan);\n        send2usb(d+val/256);\n        send2usb(val%256);\n        send2usb(200);\n    }\n\n    protected void send2usb(int x){\n\n        try{sendData(x);}\n        catch (IOException ex) {\n            display.append(\"IOexception!\");\n        }\n\n        if (x>127) x -= 256; // since it goes to bytes as twos\n        if (usbService != null) usbService.write( BigInteger.valueOf(x).toByteArray() );\n    }\n\n    private final ServiceConnection usbConnection = new ServiceConnection() {\n        @Override\n        public void onServiceConnected(ComponentName arg0, IBinder arg1) {\n            usbService = ((UsbService.UsbBinder) arg1).getService();\n            usbService.setHandler(mHandler);\n        }\n\n        @Override\n        public void onServiceDisconnected(ComponentName arg0) {\n            usbService = null;\n        }\n    };\n\n    public boolean doingusb=false;\n    private final BroadcastReceiver mUsbReceiver = new BroadcastReceiver() {\n        @Override\n        public void onReceive(Context context, Intent intent) {\n            if (intent.getAction() == null) return;\n            switch (intent.getAction()) {\n                case UsbService.ACTION_USB_PERMISSION_GRANTED: // USB PERMISSION GRANTED\n                    doingusb=true;\n                    Toast.makeText(context, \"Haasoscope USB Ready\", Toast.LENGTH_SHORT).show();\n                    waitalot();\n                    send_initialize();\n                    donewaitalot();\n                    break;\n                case UsbService.ACTION_USB_PERMISSION_NOT_GRANTED: // USB PERMISSION NOT GRANTED\n                    doingusb=false;\n                    Toast.makeText(context, \"USB Permission not granted\", Toast.LENGTH_SHORT).show();\n                    break;\n                case UsbService.ACTION_NO_USB: // NO USB CONNECTED\n                    doingusb=false;\n                    Toast.makeText(context, \"No USB connected\", Toast.LENGTH_SHORT).show();\n                    break;\n                case UsbService.ACTION_USB_DISCONNECTED: // USB DISCONNECTED\n                    doingusb=false;\n                    Toast.makeText(context, \"USB disconnected\", Toast.LENGTH_SHORT).show();\n                    break;\n                case UsbService.ACTION_USB_NOT_SUPPORTED: // USB NOT SUPPORTED\n                    doingusb=false;\n                    Toast.makeText(context, \"USB device not supported\", Toast.LENGTH_SHORT).show();\n                    break;\n            }\n        }\n    };\n\n    @Override\n    public void onResume() {\n        super.onResume();\n        setFilters();  // Start listening notifications from UsbService\n        startService(UsbService.class, usbConnection); // Start UsbService(if it was not started before) and Bind it\n    }\n\n    @Override\n    public void onPause() {\n        super.onPause();\n        unregisterReceiver(mUsbReceiver);\n        unbindService(usbConnection);\n    }\n\n    private void startService(Class<?> service, ServiceConnection serviceConnection) {\n        if (!UsbService.SERVICE_CONNECTED) {\n            startService(new Intent(this, service));\n        }\n        Intent bindingIntent = new Intent(this, service);\n        bindService(bindingIntent, serviceConnection, Context.BIND_AUTO_CREATE);\n    }\n\n    private void setFilters() {\n        IntentFilter filter = new IntentFilter();\n        filter.addAction(UsbService.ACTION_USB_PERMISSION_GRANTED);\n        filter.addAction(UsbService.ACTION_NO_USB);\n        filter.addAction(UsbService.ACTION_USB_DISCONNECTED);\n        filter.addAction(UsbService.ACTION_USB_NOT_SUPPORTED);\n        filter.addAction(UsbService.ACTION_USB_PERMISSION_NOT_GRANTED);\n        registerReceiver(mUsbReceiver, filter);\n    }\n\n}\n"
  },
  {
    "path": "android/example/src/main/java/com/felhr/serialportexample/UsbService.java",
    "content": "package com.felhr.serialportexample;\n\nimport android.app.PendingIntent;\nimport android.app.Service;\nimport android.content.BroadcastReceiver;\nimport android.content.Context;\nimport android.content.Intent;\nimport android.content.IntentFilter;\nimport android.hardware.usb.UsbDevice;\nimport android.hardware.usb.UsbDeviceConnection;\nimport android.hardware.usb.UsbManager;\nimport android.os.Binder;\nimport android.os.Handler;\nimport android.os.IBinder;\n\nimport com.felhr.usbserial.CDCSerialDevice;\nimport com.felhr.usbserial.UsbSerialDevice;\nimport com.felhr.usbserial.UsbSerialInterface;\n\n//import java.io.UnsupportedEncodingException;\nimport java.util.HashMap;\nimport java.util.Map;\n\npublic class UsbService extends Service {\n\n    public static final String ACTION_USB_READY = \"com.felhr.connectivityservices.USB_READY\";\n    public static final String ACTION_USB_ATTACHED = \"android.hardware.usb.action.USB_DEVICE_ATTACHED\";\n    public static final String ACTION_USB_DETACHED = \"android.hardware.usb.action.USB_DEVICE_DETACHED\";\n    public static final String ACTION_USB_NOT_SUPPORTED = \"com.felhr.usbservice.USB_NOT_SUPPORTED\";\n    public static final String ACTION_NO_USB = \"com.felhr.usbservice.NO_USB\";\n    public static final String ACTION_USB_PERMISSION_GRANTED = \"com.felhr.usbservice.USB_PERMISSION_GRANTED\";\n    public static final String ACTION_USB_PERMISSION_NOT_GRANTED = \"com.felhr.usbservice.USB_PERMISSION_NOT_GRANTED\";\n    public static final String ACTION_USB_DISCONNECTED = \"com.felhr.usbservice.USB_DISCONNECTED\";\n    public static final String ACTION_CDC_DRIVER_NOT_WORKING = \"com.felhr.connectivityservices.ACTION_CDC_DRIVER_NOT_WORKING\";\n    public static final String ACTION_USB_DEVICE_NOT_WORKING = \"com.felhr.connectivityservices.ACTION_USB_DEVICE_NOT_WORKING\";\n    public static final int MESSAGE_FROM_SERIAL_PORT = 0;\n    public static final int CTS_CHANGE = 1;\n    public static final int DSR_CHANGE = 2;\n    private static final String ACTION_USB_PERMISSION = \"com.android.example.USB_PERMISSION\";\n    private static final int BAUD_RATE = 1500000; //921600; //9600; // BaudRate. Change this value if you need\n    public static boolean SERVICE_CONNECTED = false;\n\n    private IBinder binder = new UsbBinder();\n\n    private Context context;\n    private Handler mHandler;\n    private UsbManager usbManager;\n    private UsbDevice device;\n    private UsbDeviceConnection connection;\n    private UsbSerialDevice serialPort;\n\n    private boolean serialPortConnected;\n    /*\n     *  Data received from serial port will be received here. Just populate onReceivedData with your code\n     *  In this particular example. byte stream is converted to String and send to UI thread to\n     *  be treated there.\n     */\n    private UsbSerialInterface.UsbReadCallback mCallback = new UsbSerialInterface.UsbReadCallback() {\n        @Override\n        public void onReceivedData(byte[] arg0) {\n            if (mHandler != null) {\n                mHandler.obtainMessage(MESSAGE_FROM_SERIAL_PORT, arg0).sendToTarget();\n            }\n        }\n    };\n\n    /*\n     * State changes in the CTS line will be received here\n     */\n    private UsbSerialInterface.UsbCTSCallback ctsCallback = new UsbSerialInterface.UsbCTSCallback() {\n        @Override\n        public void onCTSChanged(boolean state) {\n            if(mHandler != null)\n                mHandler.obtainMessage(CTS_CHANGE).sendToTarget();\n        }\n    };\n\n    /*\n     * State changes in the DSR line will be received here\n     */\n    private UsbSerialInterface.UsbDSRCallback dsrCallback = new UsbSerialInterface.UsbDSRCallback() {\n        @Override\n        public void onDSRChanged(boolean state) {\n            if(mHandler != null)\n                mHandler.obtainMessage(DSR_CHANGE).sendToTarget();\n        }\n    };\n\n    private static final int CH341_REQ_WRITE_REG = 0x9A;\n    private static final int REQTYPE_HOST_TO_DEVICE = 0x40;\n    protected static final int USB_TIMEOUT = 5000;\n\n    // for setting the baud rate >921600\n    private void setBaudRateLinux(int baud)\n    {\n        // ported from linux driver: https://github.com/Ozzadar/CH341SER_LINUX/blob/master/ch34x.c\n        long a, b;\n        long factor;\n        short divisor;\n        factor = (1532620800 / baud);\n        divisor = 3;\n        while ((factor > 0xfff0) && divisor>0) {\n            factor >>= 3;\n            divisor--;\n        }\n        if (factor > 0xfff0) return;\n        factor = 0x10000 - factor;\n        a = (factor & 0xff00) | divisor;\n        b = factor & 0xff;\n\n        //r = ch341_control_out(dev, 0x9a, 0x1312, a);\n        setControlCommandOut(CH341_REQ_WRITE_REG, 0x1312, (int)a);\n        //r = ch341_control_out(dev, 0x9a, 0x0f2c, b);\n        setControlCommandOut(CH341_REQ_WRITE_REG, 0x0f2c, (int)b);\n    }\n\n    private void setControlCommandOut(int request, int value, int index)\n    {\n        int dataLength = 0;\n        connection.controlTransfer(REQTYPE_HOST_TO_DEVICE, request, value, index, null, dataLength, USB_TIMEOUT);\n    }\n\n    /*\n     * Different notifications from OS will be received here (USB attached, detached, permission responses...)\n     * About BroadcastReceiver: http://developer.android.com/reference/android/content/BroadcastReceiver.html\n     */\n    private final BroadcastReceiver usbReceiver = new BroadcastReceiver() {\n        @Override\n        public void onReceive(Context arg0, Intent arg1) {\n            if (arg1.getAction()==null) return;\n            switch (arg1.getAction()) {\n                case ACTION_USB_PERMISSION:\n                    if (arg1.getExtras()==null) return;\n                    boolean granted = arg1.getExtras().getBoolean(UsbManager.EXTRA_PERMISSION_GRANTED);\n                    if (granted) // User accepted our USB connection. Try to open the device as a serial port\n                    {\n                        Intent intent = new Intent(ACTION_USB_PERMISSION_GRANTED);\n                        arg0.sendBroadcast(intent);\n                        connection = usbManager.openDevice(device);\n                        new ConnectionThread().start();\n                    } else // User not accepted our USB connection. Send an Intent to the Main Activity\n                    {\n                        Intent intent = new Intent(ACTION_USB_PERMISSION_NOT_GRANTED);\n                        arg0.sendBroadcast(intent);\n                    }\n                    break;\n                case ACTION_USB_ATTACHED:\n                    if (!serialPortConnected)\n                        findSerialPortDevice(); // A USB device has been attached. Try to open it as a Serial port\n                    break;\n                case ACTION_USB_DETACHED:\n                    // Usb device was disconnected. send an intent to the Main Activity\n                    Intent intent = new Intent(ACTION_USB_DISCONNECTED);\n                    arg0.sendBroadcast(intent);\n                    if (serialPortConnected) {\n                        serialPort.close();\n                    }\n                    serialPortConnected = false;\n                    break;\n            }\n        }\n    };\n\n    /*\n     * onCreate will be executed when service is started. It configures an IntentFilter to listen for\n     * incoming Intents (USB ATTACHED, USB DETACHED...) and it tries to open a serial port.\n     */\n    @Override\n    public void onCreate() {\n        this.context = this;\n        serialPortConnected = false;\n        UsbService.SERVICE_CONNECTED = true;\n        setFilter();\n        usbManager = (UsbManager) getSystemService(Context.USB_SERVICE);\n        findSerialPortDevice();\n    }\n\n    /* MUST READ about services\n     * http://developer.android.com/guide/components/services.html\n     * http://developer.android.com/guide/components/bound-services.html\n     */\n    @Override\n    public IBinder onBind(Intent intent) {\n        return binder;\n    }\n\n    @Override\n    public int onStartCommand(Intent intent, int flags, int startId) {\n        return Service.START_NOT_STICKY;\n    }\n\n    @Override\n    public void onDestroy() {\n        super.onDestroy();\n        UsbService.SERVICE_CONNECTED = false;\n    }\n\n    /*\n     * This function will be called from MainActivity to write data through Serial Port\n     */\n    public void write(byte[] data) {\n        if (serialPort != null)\n            serialPort.write(data);\n    }\n\n    public void setHandler(Handler mHandler) {\n        this.mHandler = mHandler;\n    }\n\n    private void findSerialPortDevice() {\n        // This snippet will try to open the first encountered usb device connected, excluding usb root hubs\n        HashMap<String, UsbDevice> usbDevices = usbManager.getDeviceList();\n        if (!usbDevices.isEmpty()) {\n            boolean keep = true;\n            for (Map.Entry<String, UsbDevice> entry : usbDevices.entrySet()) {\n                device = entry.getValue();\n                int deviceVID = device.getVendorId();\n                int devicePID = device.getProductId();\n\n                if (deviceVID != 0x1d6b && (devicePID != 0x0001 && devicePID != 0x0002 && devicePID != 0x0003) && deviceVID != 0x5c6 && devicePID != 0x904c) {\n              \n                    // There is a device connected to our Android device. Try to open it as a Serial Port.\n                    requestUserPermission();\n                    keep = false;\n                } else {\n                    connection = null;\n                    device = null;\n                }\n\n                if (!keep)\n                    break;\n            }\n            if (!keep) {\n                // There is no USB devices connected (but usb host were listed). Send an intent to MainActivity.\n                Intent intent = new Intent(ACTION_NO_USB);\n                sendBroadcast(intent);\n            }\n        } else {\n            // There is no USB devices connected. Send an intent to MainActivity\n            Intent intent = new Intent(ACTION_NO_USB);\n            sendBroadcast(intent);\n        }\n    }\n\n    private void setFilter() {\n        IntentFilter filter = new IntentFilter();\n        filter.addAction(ACTION_USB_PERMISSION);\n        filter.addAction(ACTION_USB_DETACHED);\n        filter.addAction(ACTION_USB_ATTACHED);\n        registerReceiver(usbReceiver, filter);\n    }\n\n    /*\n     * Request user permission. The response will be received in the BroadcastReceiver\n     */\n    private void requestUserPermission() {\n        PendingIntent mPendingIntent = PendingIntent.getBroadcast(this, 0, new Intent(ACTION_USB_PERMISSION), 0);\n        usbManager.requestPermission(device, mPendingIntent);\n    }\n\n    public class UsbBinder extends Binder {\n        public UsbService getService() {\n            return UsbService.this;\n        }\n    }\n\n    /*\n     * A simple thread to open a serial port.\n     * Although it should be a fast operation. moving usb operations away from UI thread is a good thing.\n     */\n    private class ConnectionThread extends Thread {\n        @Override\n        public void run() {\n            serialPort = UsbSerialDevice.createUsbSerialDevice(device, connection);\n            if (serialPort != null) {\n                if (serialPort.open()) {\n                    serialPortConnected = true;\n                    if (BAUD_RATE>921600) setBaudRateLinux(BAUD_RATE); // ACH\n                    else serialPort.setBaudRate(BAUD_RATE);\n                    serialPort.setDataBits(UsbSerialInterface.DATA_BITS_8);\n                    serialPort.setStopBits(UsbSerialInterface.STOP_BITS_1);\n                    serialPort.setParity(UsbSerialInterface.PARITY_NONE);\n                    /*\n                     * Current flow control Options:\n                     * UsbSerialInterface.FLOW_CONTROL_OFF\n                     * UsbSerialInterface.FLOW_CONTROL_RTS_CTS only for CP2102 and FT232\n                     * UsbSerialInterface.FLOW_CONTROL_DSR_DTR only for CP2102 and FT232\n                     */\n                    serialPort.setFlowControl(UsbSerialInterface.FLOW_CONTROL_OFF);\n                    serialPort.read(mCallback);\n                    serialPort.getCTS(ctsCallback);\n                    serialPort.getDSR(dsrCallback);\n                    \n                    //\n                    // Some Arduinos would need some sleep because firmware wait some time to know whether a new sketch is going \n                    // to be uploaded or not\n                    //Thread.sleep(2000); // sleep some. YMMV with different chips.\n                    \n                    // Everything went as expected. Send an intent to MainActivity\n                    Intent intent = new Intent(ACTION_USB_READY);\n                    context.sendBroadcast(intent);\n                } else {\n                    // Serial port could not be opened, maybe an I/O error or if CDC driver was chosen, it does not really fit\n                    // Send an Intent to Main Activity\n                    if (serialPort instanceof CDCSerialDevice) {\n                        Intent intent = new Intent(ACTION_CDC_DRIVER_NOT_WORKING);\n                        context.sendBroadcast(intent);\n                    } else {\n                        Intent intent = new Intent(ACTION_USB_DEVICE_NOT_WORKING);\n                        context.sendBroadcast(intent);\n                    }\n                }\n            } else {\n                // No driver for given device, even generic CDC driver could not be loaded\n                Intent intent = new Intent(ACTION_USB_NOT_SUPPORTED);\n                context.sendBroadcast(intent);\n            }\n        }\n    }\n}\n"
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  {
    "path": "android/example/src/main/res/drawable/ic_launcher_background.xml",
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  {
    "path": "android/example/src/main/res/layout/activity_main.xml",
    "content": "<RelativeLayout xmlns:android=\"http://schemas.android.com/apk/res/android\"\n    xmlns:app=\"http://schemas.android.com/apk/res-auto\"\n    xmlns:tools=\"http://schemas.android.com/tools\"\n    android:layout_width=\"match_parent\"\n    android:layout_height=\"match_parent\"\n    android:keepScreenOn=\"true\"\n    android:padding=\"5dp\"\n    tools:context=\"com.felhr.serialportexample.MainActivity\">\n\n    <!--android:layout_height=\"160dp\" for debugging-->\n    <TextView\n        android:id=\"@+id/textView1\"\n        android:layout_width=\"match_parent\"\n        android:layout_height=\"75dp\"\n        android:layout_centerHorizontal=\"true\"\n        android:background=\"#FFFFFF\"\n        android:gravity=\"bottom\"\n        android:scrollbars=\"vertical\" />\n\n    <EditText\n        android:id=\"@+id/editText1\"\n        android:layout_width=\"95dp\"\n        android:layout_height=\"wrap_content\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_marginEnd=\"10dp\"\n        android:layout_marginRight=\"10dp\"\n        android:ems=\"10\"\n        android:hint=\"@string/command\"\n        android:inputType=\"text\">\n\n        <requestFocus />\n    </EditText>\n\n    <Button\n        android:id=\"@+id/buttonSend\"\n        android:layout_width=\"80dp\"\n        android:layout_height=\"40dp\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_toEndOf=\"@+id/editText1\"\n        android:layout_toRightOf=\"@+id/editText1\"\n        android:text=\"@string/send\" />\n\n    <com.jjoe64.graphview.GraphView\n        android:id=\"@+id/graph\"\n        android:layout_width=\"wrap_content\"\n        android:layout_height=\"wrap_content\"\n        android:layout_below=\"@+id/editText1\"\n        android:layout_above=\"@id/button_share\"\n        android:background=\"@android:color/white\" />\n\n    <ImageButton\n        android:id=\"@+id/button_share\"\n        android:layout_width=\"40dp\"\n        android:layout_height=\"40dp\"\n        android:layout_alignParentBottom=\"true\"\n        android:layout_alignParentEnd=\"true\"\n        android:contentDescription=\"@string/share\"\n        app:srcCompat=\"@android:drawable/ic_menu_share\"\n        android:layout_alignParentRight=\"true\" />\n\n    <ImageButton\n        android:id=\"@+id/button_down\"\n        android:layout_width=\"wrap_content\"\n        android:layout_height=\"wrap_content\"\n        android:layout_alignParentEnd=\"true\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_marginEnd=\"12dp\"\n        app:srcCompat=\"@android:drawable/arrow_down_float\"\n        android:layout_alignParentRight=\"true\"\n        android:layout_marginRight=\"12dp\"\n        android:contentDescription=\"@string/button_up\" />\n\n    <ImageButton\n        android:id=\"@+id/button_up\"\n        android:layout_width=\"wrap_content\"\n        android:layout_height=\"wrap_content\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_toLeftOf=\"@+id/button_down\"\n        android:layout_toStartOf=\"@+id/button_down\"\n        android:contentDescription=\"@string/button_down\"\n        app:srcCompat=\"@android:drawable/arrow_up_float\" />\n\n    <ImageButton\n        android:id=\"@+id/button_pause\"\n        android:layout_width=\"40dp\"\n        android:layout_height=\"40dp\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_toLeftOf=\"@+id/button_up\"\n        android:layout_toStartOf=\"@+id/button_up\"\n        app:srcCompat=\"@android:drawable/ic_media_pause\"\n        android:contentDescription=\"@string/pause\" />\n\n    <ToggleButton\n        android:id=\"@+id/toggle_selectchan\"\n        android:layout_width=\"40dp\"\n        android:layout_height=\"40dp\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_toLeftOf=\"@+id/button_pause\"\n        android:layout_toStartOf=\"@+id/button_pause\"\n        android:text=\"@string/_1\" />\n\n</RelativeLayout>"
  },
  {
    "path": "android/example/src/main/res/layout-land/activity_main.xml",
    "content": "<RelativeLayout xmlns:android=\"http://schemas.android.com/apk/res/android\"\n    xmlns:app=\"http://schemas.android.com/apk/res-auto\"\n    xmlns:tools=\"http://schemas.android.com/tools\"\n    android:layout_width=\"match_parent\"\n    android:layout_height=\"match_parent\"\n    android:keepScreenOn=\"true\"\n    android:padding=\"5dp\"\n    tools:context=\"com.felhr.serialportexample.MainActivity\">\n\n    <!--android:layout_height=\"160dp\" for debugging-->\n    <TextView\n        android:id=\"@+id/textView1\"\n        android:layout_width=\"match_parent\"\n        android:layout_height=\"10dp\"\n        android:layout_centerHorizontal=\"true\"\n        android:background=\"#FFFFFF\"\n        android:gravity=\"bottom\"\n        android:scrollbars=\"vertical\" />\n\n    <EditText\n        android:id=\"@+id/editText1\"\n        android:layout_width=\"95dp\"\n        android:layout_height=\"wrap_content\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_marginEnd=\"10dp\"\n        android:layout_marginRight=\"10dp\"\n        android:ems=\"10\"\n        android:hint=\"@string/command\"\n        android:inputType=\"text\">\n\n        <requestFocus />\n    </EditText>\n\n    <Button\n        android:id=\"@+id/buttonSend\"\n        android:layout_width=\"80dp\"\n        android:layout_height=\"40dp\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_toEndOf=\"@+id/editText1\"\n        android:layout_toRightOf=\"@+id/editText1\"\n        android:text=\"@string/send\" />\n\n    <com.jjoe64.graphview.GraphView\n        android:id=\"@+id/graph\"\n        android:layout_width=\"wrap_content\"\n        android:layout_height=\"wrap_content\"\n        android:layout_below=\"@+id/editText1\"\n        android:background=\"@android:color/white\" />\n\n    <ImageButton\n        android:id=\"@+id/button_share\"\n        android:layout_width=\"40dp\"\n        android:layout_height=\"40dp\"\n        android:layout_alignParentStart=\"true\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_marginStart=\"212dp\"\n        android:contentDescription=\"@string/share\"\n        app:srcCompat=\"@android:drawable/ic_menu_share\"\n        android:layout_alignParentLeft=\"true\"\n        android:layout_marginLeft=\"212dp\" />\n\n    <ImageButton\n        android:id=\"@+id/button_down\"\n        android:layout_width=\"wrap_content\"\n        android:layout_height=\"wrap_content\"\n        android:layout_alignParentEnd=\"true\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_marginEnd=\"12dp\"\n        app:srcCompat=\"@android:drawable/arrow_down_float\"\n        android:layout_alignParentRight=\"true\"\n        android:layout_marginRight=\"12dp\"\n        android:contentDescription=\"@string/button_up\" />\n\n    <ImageButton\n        android:id=\"@+id/button_up\"\n        android:layout_width=\"wrap_content\"\n        android:layout_height=\"wrap_content\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_toLeftOf=\"@+id/button_down\"\n        android:layout_toStartOf=\"@+id/button_down\"\n        android:contentDescription=\"@string/button_down\"\n        app:srcCompat=\"@android:drawable/arrow_up_float\" />\n\n    <ImageButton\n        android:id=\"@+id/button_pause\"\n        android:layout_width=\"40dp\"\n        android:layout_height=\"40dp\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_toLeftOf=\"@+id/button_up\"\n        android:layout_toStartOf=\"@+id/button_up\"\n        app:srcCompat=\"@android:drawable/ic_media_pause\"\n        android:contentDescription=\"@string/pause\" />\n\n    <ToggleButton\n        android:id=\"@+id/toggle_selectchan\"\n        android:layout_width=\"40dp\"\n        android:layout_height=\"40dp\"\n        android:layout_below=\"@+id/textView1\"\n        android:layout_toLeftOf=\"@+id/button_pause\"\n        android:layout_toStartOf=\"@+id/button_pause\"\n        android:text=\"@string/_1\" />\n\n</RelativeLayout>"
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  {
    "path": "android/example/src/main/res/mipmap-anydpi-v26/ic_launcher.xml",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\r\n<adaptive-icon xmlns:android=\"http://schemas.android.com/apk/res/android\">\r\n    <background android:drawable=\"@drawable/ic_launcher_background\"/>\r\n    <foreground android:drawable=\"@mipmap/ic_launcher_foreground\"/>\r\n</adaptive-icon>"
  },
  {
    "path": "android/example/src/main/res/mipmap-anydpi-v26/ic_launcher_round.xml",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\r\n<adaptive-icon xmlns:android=\"http://schemas.android.com/apk/res/android\">\r\n    <background android:drawable=\"@drawable/ic_launcher_background\"/>\r\n    <foreground android:drawable=\"@mipmap/ic_launcher_foreground\"/>\r\n</adaptive-icon>"
  },
  {
    "path": "android/example/src/main/res/values/dimens.xml",
    "content": "<resources>\n\n    <!-- Default screen margins, per the Android Design guidelines. -->\n    <dimen name=\"activity_horizontal_margin\">16dp</dimen>\n    <dimen name=\"activity_vertical_margin\">16dp</dimen>\n\n</resources>\n"
  },
  {
    "path": "android/example/src/main/res/values/strings.xml",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<resources>\n\n    <string name=\"app_name\">Haasoscope</string>\n    <string name=\"hello_world\">Hello world!</string>\n    <string name=\"action_settings\">Settings</string>\n    <string name=\"serial_port\">Serial Port</string>\n    <string name=\"send\">Send</string>\n    <string name=\"command\">command</string>\n    <string name=\"button_down\">button down</string>\n    <string name=\"button_up\">button_up</string>\n    <string name=\"share\">share</string>\n    <string name=\"pause\">pause</string>\n    <string name=\"_1\">-1</string>\n\n</resources>\n"
  },
  {
    "path": "android/example/src/main/res/values/styles.xml",
    "content": "<resources>\n\n    <!--\n        Base application theme, dependent on API level. This theme is replaced\n        by AppBaseTheme from res/values-vXX/styles.xml on newer devices.\n    -->\n    <style name=\"AppBaseTheme\" parent=\"Theme.AppCompat.Light.NoActionBar\">\n        <!--\n            Theme customizations available in newer API levels can go in\n            res/values-vXX/styles.xml, while customizations related to\n            backward-compatibility can go here.\n        -->\n    </style>\n\n    <!-- Application theme. -->\n    <style name=\"AppTheme\" parent=\"AppBaseTheme\">\n        <!-- All customizations that are NOT specific to a particular API-level can go here. -->\n    </style>\n\n</resources>\n"
  },
  {
    "path": "android/example/src/main/res/values-w820dp/dimens.xml",
    "content": "<resources>\n\n    <!--\n         Example customization of dimensions originally defined in res/values/dimens.xml\n         (such as screen margins) for screens with more than 820dp of available width. This\n         would include 7\" and 10\" devices in landscape (~960dp and ~1280dp respectively).\n    -->\n    <dimen name=\"activity_horizontal_margin\">64dp</dimen>\n\n</resources>\n"
  },
  {
    "path": "android/gradle/wrapper/gradle-wrapper.properties",
    "content": "#Tue Jun 05 04:37:02 EDT 2018\r\ndistributionBase=GRADLE_USER_HOME\r\ndistributionPath=wrapper/dists\r\nzipStoreBase=GRADLE_USER_HOME\r\nzipStorePath=wrapper/dists\r\ndistributionUrl=https\\://services.gradle.org/distributions/gradle-4.4-all.zip\r\n"
  },
  {
    "path": "android/gradle.properties",
    "content": "VERSION_NAME=1.0.4\nVERSION_CODE=1\nANDROID_BUILD_MIN_SDK_VERSION=12\nANDROID_BUILD_TARGET_SDK_VERSION=27\nANDROID_BUILD_SDK_VERSION=27\n"
  },
  {
    "path": "android/settings.gradle",
    "content": "include ':example'"
  },
  {
    "path": "dockerfiles/README-Docker.md",
    "content": "# Run Haasoscope in a Container\n\nContainers provide isolated environments, similar to VMs, but lighter weight, and with performance closer to the native machine they run on.  Containers start quickly from an efficient layered image which provides an identical environment each time the container starts.  This solves the \"it worked on my machine\" issues that often plague development due to differences between versions of the tools or libraries on different machines.  Used properly, they are ideal for building software as part of a continuous integration environment, or deploying software as part of a continuous deployment system (CI/CD.)  Today, Docker is the defacto container ecosystem, which means there are lots of resources for learning Docker, and lots of people familiar with it.  The Dockerfile used to build a container image can be quite simple, and therefore it also provides a form of executable documentation on what is required to build and/or install a piece of software.  A great place to start is the Docker website, which provides links to tutorials and documentation:\n\nhttps://www.docker.com/why-docker\n\nContainers allow you to run or test software without installing it.  This allows you to test new versions or old versions without messing with the version you have installed natively on your machine.  In fact, you can run the software without installing any version natively on your machine.\n\n## Building a container image to run the HaasoscopeQt.py application\n\nThe following command will create a container locally named\n\"haasoscope\" that can be used to run the HaasocopeQt.py graphical\ntool:\n```\ndocker build -t haasoscope -f haasoscope.docker\n```\n\nThe [haasoscope.sh](./haasoscope.sh) script may be used to run\nHaasoscopeQt.py once the above \"haasoscope\" container is built:\n```\n./haasoscope.sh\n```\nThis script attempts to map the Haasoscope USB devices, X-Windows\ndisplay socket, and the `../software/` directory into the container\nprior to running HaasoscopeQt.py.  It may be necessary to copy and\nmodify this script to work on your machine.  See the script for\ndetails.\n\n## Building a container image for the Intel Quartus FPGA software\n\nThe Quartus software is used to compile the FPGA firmware.  It can\nalso be used to program that firmware into the Haasoscope hardware.\n\nThe following command will create a container locally named\n\"quartus\" that can be used to run the Quartus tool:\n```\ndocker build -t quartus -f quartus.docker\n```\n\nImportant! Building this container involves a download of over 6GB and\nthe full installation requires around 25GB of disk space!\n\nOnce the container is built one can run the Quartus GUI in the\ncontainer. See the [quartus.sh](./quartus.sh) file for details.  For\nexample:\n```\n./quartus.sh\n```\n\nIt is also possible to run an FPGA simulation and compilation from the\ncommand line:\n```\n./quartus_compile.sh\n```\n\nThe firmware image can also be uploaded to the Haasoscope hardware\nfrom the command line:\n```\n./quartus_flash.sh\n```\n\nThe above scripts are examples - it may be necessary to copy and\nmodify these scripts for your machine.\n"
  },
  {
    "path": "dockerfiles/haasoscope.docker",
    "content": "# This is a dockerfile for building and running HaasoscopeQt.py\n#\n# Build the docker container with something like:\n#  docker build -t haasoscope -f haasoscope.docker\n# See haasoscope.sh for information on running the container.\n\nFROM ubuntu:20.04\nARG DEBIAN_FRONTEND=noninteractive\n\nRUN apt-get update && apt-get install -y \\\n    dumb-init build-essential \\\n    python3-pip \\\n    gfortran \\\n    libatlas-base-dev \\\n    libblas3 \\\n    liblapack3 \\\n    liblapack-dev \\\n    libblas-dev \\\n    libhdf5-dev \\\n    libgl1-mesa-glx \\\n    libqt5x11extras5 \\\n    libusb-1.0-0 && \\\n    rm -rf /var/lib/apt/lists/*\n\n# Create python virtual environment\nRUN pip3 install pyserial==3.5 numpy==1.23.5 scipy==1.9.3 \\\n    matplotlib==3.6.2 h5py==3.7.0 \\\n    Qt.py==1.3.7 pyqtgraph==0.13.1 PySide2==5.15.2.1 pyftdi==0.54.0\n\n# Use dumb-init as entry point (for proper Unix singal handling)\nENTRYPOINT [\"/usr/bin/dumb-init\", \"--\"]\n"
  },
  {
    "path": "dockerfiles/haasoscope.sh",
    "content": "#!/bin/bash\n# This is an example script for running HaasoscopeQt.py in a docker\n# container.  This is an example - you may need to copy this file and\n# modify it so that it works in your environment.\n#\n# Prior to running this script, the docker image should have been\n# created with something like:\n#  docker build -t haasoscope -f haasoscope.docker\n\n# Map main USB port into container\nU1=\"/dev/serial/by-id/usb-1a86_USB2.0-Serial-if00-port0\"\nDPARAM=\"--device=${U1}\"\n\n# Map ft232h USB port into container (if found)\nU2=( /dev/serial/by-id/usb-FTDI_Haasoscope_USB2_*-if00-port0 )\nif [ -e \"${U2}\" ]; then\n    DPARAM=\"${DPARAM} --device=${U2}\"\nfi\n\n# Map x-windows socket into container\nDPARAM=\"${DPARAM} -v /tmp/.X11-unix:/tmp/.X11-unix -e DISPLAY=${DISPLAY}\"\n\n# If passing the x-windows socket doesn't work, then the following may\n# work instead:\n#xhost +localhost\n#DPARAM=\"${DPARAM} --net=host -e DISPLAY=host.docker.internal:0\"\n\n# Obtain directory of the haasoscope software (based on the location\n# of this script) and map the local \"software/\" directory to /haasoscope .\nSRCDIR=\"$( cd \"$( dirname \"${BASH_SOURCE[0]}\" )\"/.. && pwd )\"\nDPARAM=\"${DPARAM} -v ${SRCDIR}/software:/haasoscope -w /haasoscope\"\n\n# Run HaasoscopeQt.py in container\ndocker run -it --rm ${DPARAM} localhost/haasoscope python3 HaasoscopeQt.py \"$@\"\n\n# If \"xhost +localhost\" was used above then reenable security here.\n#xhost -localhost\n"
  },
  {
    "path": "dockerfiles/quartus.docker",
    "content": "# This is a dockerfile for installing and running the Intel Quartus\n# fpga design tool (version 22.1).\n#\n# Build this docker container with something like:\n#  docker build -t quartus -f quartus.docker\n#\n# Important! The Quartus software is over 6GB to download and the\n# installation size is ~25GB!\n#\n# See quartus.sh, quartus_compile.sh, and quartus_flash.sh for\n# information on running the container.\n\nFROM ubuntu:20.04\n\nARG QUARTUS_URL=https://downloads.intel.com/akdlm/software/acdsinst/22.1std/915/ib_tar/Quartus-lite-22.1std.0.915-linux.tar\n\n# First, get wget so we can download Quartus\nRUN apt-get update && apt-get install -y wget\n\n# Make an install directory, download Quartus and extract Quartus into it.\nRUN mkdir quartus_install \\\n    && wget ${QUARTUS_URL} -O quartus.tar \\\n    && tar -C quartus_install -xf quartus.tar \\\n    && rm quartus.tar\n\n# Define items we don't need in the image. By default, we turn off\n# help and update to keep the image small. The following are valid\n# options: quartus quartus_help devinfo arria_lite cyclone cyclone10lp\n# cyclonev max max10 quartus_update\nARG QUARTUS_DISABLED=\"quartus_help,quartus_update\"\n\n# Run the Quartus installer and cleanup the install directory when done\nRUN quartus_install/setup.sh --mode unattended --accept_eula 1 --installdir /quartus --disable-components ${QUARTUS_DISABLED}\\\n    && rm -rf quartus_install\n\n# Install packages necessary for Quartus to work\nRUN apt-get update && apt-get install -y --no-install-recommends \\\n    libglib2.0-0 \\\n    libpng-dev \\\n    libfreetype6 \\\n    libsm6 \\\n    libxrender1 \\\n    libfontconfig1 \\\n    libxext6 \\\n# for installing locales\n    locales \\\n# java needed for platform designer / qsys\n    default-jre \\\n# needed for normal init environment\n    dumb-init \\\n# Generate the en_US locale\n    && echo \"en_US.UTF-8 UTF-8\" > /etc/locale.gen \\\n    && locale-gen en_US.UTF-8 \\\n    && update-locale LANG=en_US.UTF-8 \\\n# cleanup apt-list\n    && rm -rf /var/lib/apt/lists/*\n\n# Set environment so Quartus is in the path\nENV PATH=\"${PATH}:/quartus/quartus/bin\"\n\n# Force en_US.UTF8\nENV LC_ALL=\"en_US.UTF-8\"\n\n# Use dumb-init as an entry point (for proper Unix signal handling)\nENTRYPOINT [\"/usr/bin/dumb-init\", \"--\"]\n"
  },
  {
    "path": "dockerfiles/quartus.sh",
    "content": "#!/bin/bash\n# This is an example script for running the \"Quartus\" graphical\n# interface in a docker container.  This is an example - you may need\n# to copy this file and modify it so that it works in your\n# environment.\n#\n# Prior to running this script, the docker image should have been\n# created with something like:\n#  docker build -t quartus -f quartus.docker\n\n# Map x-windows socket into container\nDPARAM=\"-v /tmp/.X11-unix:/tmp/.X11-unix -e DISPLAY=${DISPLAY}\"\n\n# If passing the x-windows socket doesn't work, then the following may\n# work instead:\n#xhost +localhost\n#DPARAM=\"${DPARAM} --net=host -e DISPLAY=host.docker.internal:0\"\n\n# Obtain directory of the haasoscope software (based on the location\n# of this script) and map the local firmware directory to /project .\nSRCDIR=\"$( cd \"$( dirname \"${BASH_SOURCE[0]}\" )\"/.. && pwd )\"\nDPARAM=\"${DPARAM} -v ${SRCDIR}/max10_adc_firmware:/project -w /project\"\n\n# Run Quartus in container\ndocker run -it --rm ${DPARAM} localhost/quartus quartus serial1.qpf \"$@\"\n\n# If \"xhost +localhost\" was used above then reenable security here.\n#xhost -localhost\n"
  },
  {
    "path": "dockerfiles/quartus_compile.sh",
    "content": "#!/bin/bash\n# This is an example script for compiling the firmware using the\n# \"Quartus\" software in a docker container.  This is an example - you\n# may need to copy this file and modify it so that it works in your\n# environment.\n#\n# Prior to running this script, the docker image should have been\n# created with something like:\n#  docker build -t quartus -f quartus.docker\n\n# Obtain directory of the haasoscope software (based on the location\n# of this script) and map the local firmware directory to /project .\nSRCDIR=\"$( cd \"$( dirname \"${BASH_SOURCE[0]}\" )\"/.. && pwd )\"\nDPARAM=\"-v ${SRCDIR}/max10_adc_firmware:/project -w /project\"\n\n# Run Quartus compiler in container\ndocker run -it --rm ${DPARAM} localhost/quartus quartus_sh --flow compile serial1.qpf\n"
  },
  {
    "path": "dockerfiles/quartus_flash.sh",
    "content": "#!/bin/bash\n# This is an example script for uploading new code to an fpga using\n# the \"Quartus\" software in a docker container.  This is an example -\n# you may need to copy this file and modify it so that it works in\n# your environment.\n#\n# Prior to running this script, the docker image should have been\n# created with something like:\n#  docker build -t quartus -f quartus.docker\n\n# Map \"USB Blaster\" into container\nUSBBLASTER_VIDPID=\"09fb:6001\"\nBD=\"`lsusb -d ${USBBLASTER_VIDPID}`\" # \"Bus 003 Device 043: ...\"\nBUS=\"${BD:4:3}\"\nDEV=\"${BD:15:3}\"\nDPARAM=\"--device=/dev/bus/usb/${BUS}/${DEV}\"\n\n# Obtain directory of the haasoscope software (based on the location\n# of this script) and map the local firmware directory to /project .\nSRCDIR=\"$( cd \"$( dirname \"${BASH_SOURCE[0]}\" )\"/.. && pwd )\"\nDPARAM=\"${DPARAM} -v ${SRCDIR}/max10_adc_firmware:/project -w /project\"\n\n# Run Quartus in container\ndocker run -it --rm ${DPARAM} localhost/quartus bash -c 'quartus_pgm -l && quartus_pgm -m jtag -o \"p;output_files/serial1.sof\"'\n"
  },
  {
    "path": "eagle/Seeed_AllPCB_MacroFab_haas6mil.dru",
    "content": "description[en] = \\n\\n\\n\\n\\n\\n\\n\\n<b>EAGLE Design Rules</b>\\n<p>\\nThe default Design Rules have been set to cover\\na wide range of applications. Your particular design\\nmay have different requirements, so please make the\\nnecessary adjustments and save your customized\\ndesign rules under a new name.\\n\r\nlayerSetup = (1*2*15*16)\r\nmtCopper = 0.035mm 0.0175mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.0175mm 0.035mm\r\nmtIsolate = 0.2mm 0.3mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm\r\nmdWireWire = 6mil\r\nmdWirePad = 6mil\r\nmdWireVia = 6mil\r\nmdPadPad = 6mil\r\nmdPadVia = 6mil\r\nmdViaVia = 6mil\r\nmdSmdPad = 0mil\r\nmdSmdVia = 0mil\r\nmdSmdSmd = 0mil\r\nmdViaViaSameLayer = 8mil\r\nmnLayersViaInSmd = 2\r\nmdCopperDimension = 6mil\r\nmdDrill = 6mil\r\nmdSmdStop = 0mil\r\nmsWidth = 6mil\r\nmsDrill = 12mil\r\nmsMicroVia = 12mil\r\nmsBlindViaRatio = 0.500000\r\nrvPadTop = 0.250000\r\nrvPadInner = 0.250000\r\nrvPadBottom = 0.250000\r\nrvViaOuter = 0.250000\r\nrvViaInner = 0.250000\r\nrvMicroViaOuter = 0.250000\r\nrvMicroViaInner = 0.250000\r\nrlMinPadTop = 6mil\r\nrlMaxPadTop = 20mil\r\nrlMinPadInner = 6mil\r\nrlMaxPadInner = 20mil\r\nrlMinPadBottom = 6mil\r\nrlMaxPadBottom = 20mil\r\nrlMinViaOuter = 6mil\r\nrlMaxViaOuter = 20mil\r\nrlMinViaInner = 6mil\r\nrlMaxViaInner = 20mil\r\nrlMinMicroViaOuter = 6mil\r\nrlMaxMicroViaOuter = 20mil\r\nrlMinMicroViaInner = 6mil\r\nrlMaxMicroViaInner = 20mil\r\npsTop = -1\r\npsBottom = -1\r\npsFirst = -1\r\npsElongationLong = 100\r\npsElongationOffset = 100\r\nmvStopFrame = 1.000000\r\nmvCreamFrame = 0.000000\r\nmlMinStopFrame = 6mil\r\nmlMaxStopFrame = 6mil\r\nmlMinCreamFrame = 0mil\r\nmlMaxCreamFrame = 0mil\r\nmlViaStopLimit = 25mil\r\nsrRoundness = 0.000000\r\nsrMinRoundness = 0mil\r\nsrMaxRoundness = 0mil\r\nslThermalIsolate = 10mil\r\nslThermalsForVias = 0\r\ndpMaxLengthDifference = 10mm\r\ndpGapFactor = 2.500000\r\ncheckAngle = 0\r\ncheckFont = 1\r\ncheckRestrict = 1\r\ncheckStop = 0\r\ncheckValues = 0\r\ncheckNames = 1\r\ncheckWireStubs = 1\r\ncheckPolygonWidth = 0\r\nuseDiameter = 13\r\nmaxErrors = 999999\r\n"
  },
  {
    "path": "eagle/Seeed_Gerber_Generater_4-layer.cam",
    "content": "[CAM Processor Job]\r\nDescription[de]=\"<b>Erzeugt Extended-Gerber-Format (RS274X)</b><p>\\nDieser CAM-Job besteht aus fnf Arbeitsschritten und erzeugt Fertigungsdaten fr eine zweilagige Platine.<p><p>\\nDie fnf Gerberdateien enthalten Daten fr:<br>\\nBestckungsseite  *.cmp<br>\\nLtseite  *.sol<br>\\nBestckungsdruck oben  *.plc<br>\\nLtstoplack Bestckungsseite  *.stc<br>\\nLtstoplack Ltseite  *.sts<br>\"\r\nDescription[en]=\"<b>Seeed Studio 2-layer PCB Gerber Generator</b><br>\\n<b>You will get 10 RS274-x format gerber files:</b><p>\\n\\nTop Layer: pcbname.GTL<br>\\nSilk Top:  pcbname.GTO<br>\\nSolderMask Top: pcbname.GTS<br>\\nSMD paste Top: pcbname.GTP<p>\\n\\nBottom Layer: pcbname.GBL<br>\\nSilk Bottom: pcbname.GBO<br>\\nSolderMask Bottom: pcbname.GBS<br>\\nSMD paste Bottom: pcbname.GBP<p>\\n\\nSolt Drills/Hole: pcbname.GML ---> the Milling Layer(layer46)<br>\\nNC Drill file:pcbname.TXT<p>\\n\\nIt works well with our Fusion PCB Service:<br>\\n<u>http://www.seeedstudio.com/depot/index.php?main_page=advanced_search_result&search_in_description=1&keyword=Fusion\\n\\n\\n\"\r\nDescription[zh]=\"<b>Seeed Studio Gerber Generater</b><p>\\nThis CAM job consists of 10 sections that generate data for a two layer board.<p><p>\\nYou will get 10 gerber files that contain data for:<br>\\nTop trace layer \t*.GTL<br>\\nTop slikscreen layer \t*.GTO<br>\\nTop pad paste layer \t*.GTP<br>\\nTop solder mask layer \t*.GTS<br>\\nBottom trace layer \t*.GBL<br>\\nBottom slikscreen layer \t*.GBO<br>\\nBottom pad paste layer \t*.GBP<br>\\nBottom solder mask layer \t*.GBS<br>\\nSlot data\t\t*.GML<br>\\nNC Drills\t\t*.TXT<br>\\n\"\r\nSection=Sec_1\r\nSection=Sec_2\r\nSection=Sec_3\r\nSection=Sec_4\r\nSection=Sec_5\r\nSection=Sec_6\r\nSection=Sec_7\r\nSection=Sec_8\r\nSection=Sec_9\r\nSection=Sec_10\r\nSection=Sec_11\r\nSection=Sec_12\r\n\r\n[Sec_1]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Drills&Holes\"\r\nName[zh]=\"drill data\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"EXCELLON\"\r\nWheel=\"\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.TXT\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 44 45\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_2]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Slot drills/holes\"\r\nName[zh]=\"edge milling\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\"\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GML\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 20 46\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_3]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Solder paste bottom\"\r\nName[zh]=\"padmask bottom\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GBP\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 20 32\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_4]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Solder paste top\"\r\nName[zh]=\"padmask top\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GTP\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 20 31\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_5]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Solder Mask bottom\"\r\nName[zh]=\"solder mask bottom\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GBS\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 20 30\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_6]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Solder Mask top\"\r\nName[zh]=\"solder mask top\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GTS\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 20 29\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_7]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Silk bottom\"\r\nName[zh]=\"silk bottom\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GBO\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 20 22 26\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_8]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Silk top\"\r\nName[zh]=\"silk top\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GTO\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 20 21 25\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_9]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Bottom layer\"\r\nName[zh]=\"bottom copper\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GBL\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 16 17 18 20\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_10]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Top Layer\"\r\nName[zh]=\"top copper\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GTL\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 1 17 18 20\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_11]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Layer 2\"\r\nName[zh]=\"top copper\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GL2\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 2 17 18 20\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n\r\n[Sec_12]\r\nName[de]=\"Ltstopmaske Ltseite\"\r\nName[en]=\"Layer 3\"\r\nName[zh]=\"top copper\"\r\nPrompt[en]=\"\"\r\nPrompt[zh]=\"\"\r\nDevice=\"GERBER_RS274X\"\r\nWheel=\".whl\"\r\nRack=\"\"\r\nScale=1\r\nOutput=\"%N.GL3\"\r\nFlags=\"0 0 0 1 0 1 1\"\r\nEmulate=\"0 0 0\"\r\nOffset=\"0.0mil 0.0mil\"\r\nSheet=1\r\nTolerance=\"0 0 0 0 0 0\"\r\nPen=\"0.0mil 0\"\r\nPage=\"12000.0mil 8000.0mil\"\r\nLayers=\" 15 17 18 20\"\r\nColors=\" 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 6 6 4 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 1 1 1 1 3 3 1 2 6 8 8 5 8 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 4 2 4 3 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0\"\r\n"
  },
  {
    "path": "eagle/auto 50ohm layer top.ctl",
    "content": "; EAGLE Autorouter Control File\n\n[Default]\n\n  RoutingGrid     = 25mil\n\n  ; Trace Parameters:\n\n  tpViaShape      = round\n\n  ; Preferred Directions:\n\n  PrefDir.1       = *\n  PrefDir.2       = *\n  PrefDir.3       = 0\n  PrefDir.4       = 0\n  PrefDir.5       = 0\n  PrefDir.6       = 0\n  PrefDir.7       = 0\n  PrefDir.8       = 0\n  PrefDir.9       = 0\n  PrefDir.10      = 0\n  PrefDir.11      = 0\n  PrefDir.12      = 0\n  PrefDir.13      = 0\n  PrefDir.14      = 0\n  PrefDir.15      = *\n  PrefDir.16      = *\n\n  Active          =    1\n  ; Cost Factors:\n\n  cfVia           =   89\n  cfNonPref       =    5\n  cfChangeDir     =    2\n  cfOrthStep      =    2\n  cfDiagStep      =    3\n  cfExtdStep      =    0\n  cfBonusStep     =    1\n  cfMalusStep     =    1\n  cfPadImpact     =    4\n  cfSmdImpact     =    4\n  cfBusImpact     =    0\n  cfHugging       =    3\n  cfAvoid         =    4\n  cfPolygon       =   10\n\n  cfBase.1        =    0\n  cfBase.2        =    9\n  cfBase.3        =    1\n  cfBase.4        =    1\n  cfBase.5        =    1\n  cfBase.6        =    1\n  cfBase.7        =    1\n  cfBase.8        =    1\n  cfBase.9        =    1\n  cfBase.10       =    1\n  cfBase.11       =    1\n  cfBase.12       =    1\n  cfBase.13       =    1\n  cfBase.14       =    1\n  cfBase.15       =    9\n  cfBase.16       =    9\n\n  ; Maximum Number of...:\n\n  mnVias          =   20\n  mnSegments      = 9999\n  mnExtdSteps     = 9999\n  mnRipupLevel    =   10\n  mnRipupSteps    =  100\n  mnRipupTotal    =  100\n\n[Follow-me]\n\n  @Route\n\n  Active          =    1\n  cfVia           =    8\n  cfBase.2        =    1\n  cfBase.15       =    1\n  cfBase.16       =    0\n\n[Busses]\n\n  @Route\n\n  Active          =    1\n  cfNonPref       =    4\n  cfBusImpact     =    4\n  cfHugging       =    0\n  mnVias          =    0\n\n[Route]\n\n  @Default\n\n  Active          =    1\n\n[Optimize1]\n\n  @Route\n\n  Active          =    1\n  cfVia           =   99\n  cfExtdStep      =   10\n  cfHugging       =    1\n  mnExtdSteps     =    1\n  mnRipupLevel    =    0\n\n[Optimize2]\n\n  @Optimize1\n\n  Active          =    1\n  cfNonPref       =    0\n  cfChangeDir     =    6\n  cfExtdStep      =    0\n  cfBonusStep     =    2\n  cfMalusStep     =    2\n  cfPadImpact     =    2\n  cfSmdImpact     =    2\n  cfHugging       =    0\n\n[Optimize3]\n\n  @Optimize2\n\n  Active          =    1\n  cfChangeDir     =    8\n  cfPadImpact     =    0\n  cfSmdImpact     =    0\n\n[Optimize4]\n\n  @Optimize3\n\n  Active          =    1\n  cfChangeDir     =   25\n\n"
  },
  {
    "path": "eagle/auto gnd gndlayer135.ctl",
    "content": "; EAGLE Autorouter Control File\n\n[Default]\n\n  RoutingGrid     = 0.1mm\n\n  ; Trace Parameters:\n\n  tpViaShape      = round\n\n  ; Preferred Directions:\n\n  PrefDir.1       = *\n  PrefDir.2       = *\n  PrefDir.3       = *\n  PrefDir.4       = *\n  PrefDir.5       = 0\n  PrefDir.6       = 0\n  PrefDir.7       = 0\n  PrefDir.8       = 0\n  PrefDir.9       = 0\n  PrefDir.10      = 0\n  PrefDir.11      = 0\n  PrefDir.12      = 0\n  PrefDir.13      = 0\n  PrefDir.14      = 0\n  PrefDir.15      = *\n  PrefDir.16      = *\n\n  Active          =    1\n  ; Cost Factors:\n\n  cfVia           =    1\n  cfNonPref       =    5\n  cfChangeDir     =    2\n  cfOrthStep      =    2\n  cfDiagStep      =    3\n  cfExtdStep      =    0\n  cfBonusStep     =    1\n  cfMalusStep     =    1\n  cfPadImpact     =    4\n  cfSmdImpact     =    4\n  cfBusImpact     =    0\n  cfHugging       =    3\n  cfAvoid         =    4\n  cfPolygon       =   10\n\n  cfBase.1        =    1\n  cfBase.2        =    9\n  cfBase.3        =    1\n  cfBase.4        =    9\n  cfBase.5        =    1\n  cfBase.6        =    1\n  cfBase.7        =    1\n  cfBase.8        =    1\n  cfBase.9        =    1\n  cfBase.10       =    1\n  cfBase.11       =    1\n  cfBase.12       =    1\n  cfBase.13       =    1\n  cfBase.14       =    1\n  cfBase.15       =    1\n  cfBase.16       =    1\n\n  ; Maximum Number of...:\n\n  mnVias          =  999\n  mnSegments      = 9999\n  mnExtdSteps     = 9999\n  mnRipupLevel    =   10\n  mnRipupSteps    =  100\n  mnRipupTotal    =  100\n\n[Follow-me]\n\n  @Route\n\n  Active          =    1\n  cfVia           =    8\n  cfBase.1        =    0\n  cfBase.2        =    1\n  cfBase.4        =    1\n  cfBase.16       =    0\n  mnVias          =   20\n\n[Busses]\n\n  @Route\n\n  Active          =    1\n  cfNonPref       =    4\n  cfBusImpact     =    4\n  cfHugging       =    0\n\n[Route]\n\n  @Default\n\n  Active          =    1\n\n[Optimize1]\n\n  @Route\n\n  Active          =    0\n  cfVia           =   99\n  cfExtdStep      =   10\n  cfHugging       =    1\n  cfBase.1        =    0\n  mnVias          =   20\n  mnExtdSteps     =    1\n  mnRipupLevel    =    0\n\n[Optimize2]\n\n  @Optimize1\n\n  Active          =    0\n  cfNonPref       =    0\n  cfChangeDir     =    6\n  cfExtdStep      =    0\n  cfBonusStep     =    2\n  cfMalusStep     =    2\n  cfPadImpact     =    2\n  cfSmdImpact     =    2\n  cfHugging       =    0\n  cfBase.1        =    1\n\n[Optimize3]\n\n  @Optimize2\n\n  Active          =    0\n  cfChangeDir     =    8\n  cfPadImpact     =    0\n  cfSmdImpact     =    0\n\n[Optimize4]\n\n  @Optimize3\n\n  Active          =    0\n  cfChangeDir     =   25\n\n"
  },
  {
    "path": "eagle/auto gnd layer2.ctl",
    "content": "; EAGLE Autorouter Control File\r\n\r\n[Default]\r\n\r\n  RoutingGrid     = 0.1mm\r\n\r\n  ; Trace Parameters:\r\n\r\n  tpViaShape      = round\r\n\r\n  ; Preferred Directions:\r\n\r\n  PrefDir.1       = *\r\n  PrefDir.2       = *\r\n  PrefDir.3       = 0\r\n  PrefDir.4       = 0\r\n  PrefDir.5       = 0\r\n  PrefDir.6       = 0\r\n  PrefDir.7       = 0\r\n  PrefDir.8       = 0\r\n  PrefDir.9       = 0\r\n  PrefDir.10      = 0\r\n  PrefDir.11      = 0\r\n  PrefDir.12      = 0\r\n  PrefDir.13      = 0\r\n  PrefDir.14      = 0\r\n  PrefDir.15      = *\r\n  PrefDir.16      = *\r\n\r\n  Active          =    1\r\n  ; Cost Factors:\r\n\r\n  cfVia           =    1\r\n  cfNonPref       =    5\r\n  cfChangeDir     =    2\r\n  cfOrthStep      =    2\r\n  cfDiagStep      =    3\r\n  cfExtdStep      =    0\r\n  cfBonusStep     =    1\r\n  cfMalusStep     =    1\r\n  cfPadImpact     =    4\r\n  cfSmdImpact     =    4\r\n  cfBusImpact     =    0\r\n  cfHugging       =    3\r\n  cfAvoid         =    4\r\n  cfPolygon       =   10\r\n\r\n  cfBase.1        =    1\r\n  cfBase.2        =    0\r\n  cfBase.3        =    1\r\n  cfBase.4        =    1\r\n  cfBase.5        =    1\r\n  cfBase.6        =    1\r\n  cfBase.7        =    1\r\n  cfBase.8        =    1\r\n  cfBase.9        =    1\r\n  cfBase.10       =    1\r\n  cfBase.11       =    1\r\n  cfBase.12       =    1\r\n  cfBase.13       =    1\r\n  cfBase.14       =    1\r\n  cfBase.15       =    1\r\n  cfBase.16       =    1\r\n\r\n  ; Maximum Number of...:\r\n\r\n  mnVias          =  999\r\n  mnSegments      = 9999\r\n  mnExtdSteps     = 9999\r\n  mnRipupLevel    =   10\r\n  mnRipupSteps    =  100\r\n  mnRipupTotal    =  100\r\n\r\n[Follow-me]\r\n\r\n  @Route\r\n\r\n  Active          =    1\r\n  cfVia           =    8\r\n  cfBase.1        =    0\r\n  cfBase.2        =    1\r\n  cfBase.16       =    0\r\n  mnVias          =   20\r\n\r\n[Busses]\r\n\r\n  @Route\r\n\r\n  Active          =    1\r\n  cfNonPref       =    4\r\n  cfBusImpact     =    4\r\n  cfHugging       =    0\r\n\r\n[Route]\r\n\r\n  @Default\r\n\r\n  Active          =    1\r\n\r\n[Optimize1]\r\n\r\n  @Route\r\n\r\n  Active          =    0\r\n  cfVia           =   99\r\n  cfExtdStep      =   10\r\n  cfHugging       =    1\r\n  cfBase.1        =    0\r\n  cfBase.2        =    1\r\n  cfBase.16       =    0\r\n  mnVias          =   20\r\n  mnExtdSteps     =    1\r\n  mnRipupLevel    =    0\r\n\r\n[Optimize2]\r\n\r\n  @Optimize1\r\n\r\n  Active          =    0\r\n  cfNonPref       =    0\r\n  cfChangeDir     =    6\r\n  cfExtdStep      =    0\r\n  cfBonusStep     =    2\r\n  cfMalusStep     =    2\r\n  cfPadImpact     =    2\r\n  cfSmdImpact     =    2\r\n  cfHugging       =    0\r\n\r\n[Optimize3]\r\n\r\n  @Optimize2\r\n\r\n  Active          =    0\r\n  cfChangeDir     =    8\r\n  cfPadImpact     =    0\r\n  cfSmdImpact     =    0\r\n\r\n[Optimize4]\r\n\r\n  @Optimize3\r\n\r\n  Active          =    0\r\n  cfChangeDir     =   25\r\n\r\n"
  },
  {
    "path": "eagle/auto gndlayer135.ctl",
    "content": "; EAGLE Autorouter Control File\n\n[Default]\n\n  RoutingGrid     = 0.1mm\n\n  ; Trace Parameters:\n\n  tpViaShape      = round\n\n  ; Preferred Directions:\n\n  PrefDir.1       = *\n  PrefDir.2       = *\n  PrefDir.3       = *\n  PrefDir.4       = *\n  PrefDir.5       = 0\n  PrefDir.6       = 0\n  PrefDir.7       = 0\n  PrefDir.8       = 0\n  PrefDir.9       = 0\n  PrefDir.10      = 0\n  PrefDir.11      = 0\n  PrefDir.12      = 0\n  PrefDir.13      = 0\n  PrefDir.14      = 0\n  PrefDir.15      = *\n  PrefDir.16      = *\n\n  Active          =    1\n  ; Cost Factors:\n\n  cfVia           =    8\n  cfNonPref       =    5\n  cfChangeDir     =    2\n  cfOrthStep      =    2\n  cfDiagStep      =    3\n  cfExtdStep      =    0\n  cfBonusStep     =    1\n  cfMalusStep     =    1\n  cfPadImpact     =    4\n  cfSmdImpact     =    4\n  cfBusImpact     =    0\n  cfHugging       =    3\n  cfAvoid         =    4\n  cfPolygon       =   10\n\n  cfBase.1        =    1\n  cfBase.2        =    9\n  cfBase.3        =    1\n  cfBase.4        =    9\n  cfBase.5        =    1\n  cfBase.6        =    1\n  cfBase.7        =    1\n  cfBase.8        =    1\n  cfBase.9        =    1\n  cfBase.10       =    1\n  cfBase.11       =    1\n  cfBase.12       =    1\n  cfBase.13       =    1\n  cfBase.14       =    1\n  cfBase.15       =    1\n  cfBase.16       =    9\n\n  ; Maximum Number of...:\n\n  mnVias          =   20\n  mnSegments      = 9999\n  mnExtdSteps     = 9999\n  mnRipupLevel    =   10\n  mnRipupSteps    =  100\n  mnRipupTotal    =  100\n\n[Follow-me]\n\n  @Route\n\n  Active          =    1\n  cfBase.1        =    0\n  cfBase.2        =    1\n  cfBase.4        =    1\n  cfBase.16       =    0\n\n[Busses]\n\n  @Route\n\n  Active          =    1\n  cfNonPref       =    4\n  cfBusImpact     =    4\n  cfHugging       =    0\n  mnVias          =    0\n\n[Route]\n\n  @Default\n\n  Active          =    1\n\n[Optimize1]\n\n  @Route\n\n  Active          =    1\n  cfVia           =   99\n  cfExtdStep      =   10\n  cfHugging       =    1\n  mnExtdSteps     =    1\n  mnRipupLevel    =    0\n\n[Optimize2]\n\n  @Optimize1\n\n  Active          =    1\n  cfNonPref       =    0\n  cfChangeDir     =    6\n  cfExtdStep      =    0\n  cfBonusStep     =    2\n  cfMalusStep     =    2\n  cfPadImpact     =    2\n  cfSmdImpact     =    2\n  cfHugging       =    0\n\n[Optimize3]\n\n  @Optimize2\n\n  Active          =    1\n  cfChangeDir     =    8\n  cfPadImpact     =    0\n  cfSmdImpact     =    0\n\n[Optimize4]\n\n  @Optimize3\n\n  Active          =    1\n  cfChangeDir     =   25\n\n"
  },
  {
    "path": "eagle/auto rest after auto gnd vcc layer2.ctl",
    "content": "; EAGLE Autorouter Control File\r\n\r\n[Default]\r\n\r\n  RoutingGrid     = 0.1mm\r\n\r\n  ; Trace Parameters:\r\n\r\n  tpViaShape      = round\r\n\r\n  ; Extended parameters:\r\n\r\n  AutoGrid        = 0\r\n  Efforts         = 1\r\n  TopRouterVariant  = 0\r\n\r\n  ; Preferred Directions:\r\n\r\n  PrefDir.1       = *\r\n  PrefDir.2       = *\r\n  PrefDir.3       = 0\r\n  PrefDir.4       = 0\r\n  PrefDir.5       = 0\r\n  PrefDir.6       = 0\r\n  PrefDir.7       = 0\r\n  PrefDir.8       = 0\r\n  PrefDir.9       = 0\r\n  PrefDir.10      = 0\r\n  PrefDir.11      = 0\r\n  PrefDir.12      = 0\r\n  PrefDir.13      = 0\r\n  PrefDir.14      = 0\r\n  PrefDir.15      = *\r\n  PrefDir.16      = *\r\n\r\n  Active          =    1\r\n  ; Cost Factors:\r\n\r\n  cfVia           =    8\r\n  cfNonPref       =    5\r\n  cfChangeDir     =    2\r\n  cfOrthStep      =    2\r\n  cfDiagStep      =    3\r\n  cfExtdStep      =    0\r\n  cfBonusStep     =    1\r\n  cfMalusStep     =    1\r\n  cfPadImpact     =    4\r\n  cfSmdImpact     =    4\r\n  cfBusImpact     =    0\r\n  cfHugging       =    3\r\n  cfAvoid         =    4\r\n  cfPolygon       =   10\r\n\r\n  cfBase.1        =    1\r\n  cfBase.2        =    9\r\n  cfBase.3        =    1\r\n  cfBase.4        =    1\r\n  cfBase.5        =    1\r\n  cfBase.6        =    1\r\n  cfBase.7        =    1\r\n  cfBase.8        =    1\r\n  cfBase.9        =    1\r\n  cfBase.10       =    1\r\n  cfBase.11       =    1\r\n  cfBase.12       =    1\r\n  cfBase.13       =    1\r\n  cfBase.14       =    1\r\n  cfBase.15       =    0\r\n  cfBase.16       =    0\r\n\r\n  ; Maximum Number of...:\r\n\r\n  mnVias          =   20\r\n  mnSegments      = 9999\r\n  mnExtdSteps     = 9999\r\n  mnRipupLevel    =   10\r\n  mnRipupSteps    =  100\r\n  mnRipupTotal    =  100\r\n\r\n[Follow-me]\r\n\r\n  @Route\r\n\r\n  Active          =    1\r\n  cfBase.1        =    0\r\n  cfBase.2        =    1\r\n  cfBase.15       =    1\r\n\r\n[Busses]\r\n\r\n  @Route\r\n\r\n  Active          =    1\r\n  cfNonPref       =    4\r\n  cfBusImpact     =    4\r\n  cfHugging       =    0\r\n  mnVias          =    0\r\n\r\n[Route]\r\n\r\n  @Default\r\n\r\n  Active          =    1\r\n\r\n[Optimize1]\r\n\r\n  @Route\r\n\r\n  Active          =    1\r\n  cfVia           =   99\r\n  cfExtdStep      =   10\r\n  cfHugging       =    1\r\n  mnExtdSteps     =    1\r\n  mnRipupLevel    =    0\r\n\r\n[Optimize2]\r\n\r\n  @Optimize1\r\n\r\n  Active          =    1\r\n  cfNonPref       =    0\r\n  cfChangeDir     =    6\r\n  cfExtdStep      =    0\r\n  cfBonusStep     =    2\r\n  cfMalusStep     =    2\r\n  cfPadImpact     =    2\r\n  cfSmdImpact     =    2\r\n  cfHugging       =    0\r\n\r\n[Optimize3]\r\n\r\n  @Optimize2\r\n\r\n  Active          =    1\r\n  cfChangeDir     =    8\r\n  cfPadImpact     =    0\r\n  cfSmdImpact     =    0\r\n\r\n[Optimize4]\r\n\r\n  @Optimize3\r\n\r\n  Active          =    1\r\n  cfChangeDir     =   25\r\n\r\n"
  },
  {
    "path": "eagle/auto vcc layer 2.ctl",
    "content": "; EAGLE Autorouter Control File\r\n\r\n[Default]\r\n\r\n  RoutingGrid     = 0.15mm\r\n\r\n  ; Trace Parameters:\r\n\r\n  tpViaShape      = round\r\n\r\n  ; Preferred Directions:\r\n\r\n  PrefDir.1       = *\r\n  PrefDir.2       = *\r\n  PrefDir.3       = 0\r\n  PrefDir.4       = 0\r\n  PrefDir.5       = 0\r\n  PrefDir.6       = 0\r\n  PrefDir.7       = 0\r\n  PrefDir.8       = 0\r\n  PrefDir.9       = 0\r\n  PrefDir.10      = 0\r\n  PrefDir.11      = 0\r\n  PrefDir.12      = 0\r\n  PrefDir.13      = 0\r\n  PrefDir.14      = 0\r\n  PrefDir.15      = *\r\n  PrefDir.16      = *\r\n\r\n  Active          =    1\r\n  ; Cost Factors:\r\n\r\n  cfVia           =    8\r\n  cfNonPref       =    5\r\n  cfChangeDir     =    2\r\n  cfOrthStep      =    2\r\n  cfDiagStep      =    3\r\n  cfExtdStep      =    0\r\n  cfBonusStep     =    1\r\n  cfMalusStep     =    1\r\n  cfPadImpact     =    4\r\n  cfSmdImpact     =    4\r\n  cfBusImpact     =    0\r\n  cfHugging       =    3\r\n  cfAvoid         =    4\r\n  cfPolygon       =   10\r\n\r\n  cfBase.1        =    0\r\n  cfBase.2        =    9\r\n  cfBase.3        =    1\r\n  cfBase.4        =    1\r\n  cfBase.5        =    1\r\n  cfBase.6        =    1\r\n  cfBase.7        =    1\r\n  cfBase.8        =    1\r\n  cfBase.9        =    1\r\n  cfBase.10       =    1\r\n  cfBase.11       =    1\r\n  cfBase.12       =    1\r\n  cfBase.13       =    1\r\n  cfBase.14       =    1\r\n  cfBase.15       =    1\r\n  cfBase.16       =    1\r\n\r\n  ; Maximum Number of...:\r\n\r\n  mnVias          =   20\r\n  mnSegments      = 9999\r\n  mnExtdSteps     = 9999\r\n  mnRipupLevel    =   10\r\n  mnRipupSteps    =  100\r\n  mnRipupTotal    =  100\r\n\r\n[Follow-me]\r\n\r\n  @Route\r\n\r\n  Active          =    1\r\n  cfBase.2        =    1\r\n  cfBase.16       =    0\r\n\r\n[Busses]\r\n\r\n  @Route\r\n\r\n  Active          =    1\r\n  cfNonPref       =    4\r\n  cfBusImpact     =    4\r\n  cfHugging       =    0\r\n  mnVias          =    0\r\n\r\n[Route]\r\n\r\n  @Default\r\n\r\n  Active          =    1\r\n\r\n[Optimize1]\r\n\r\n  @Route\r\n\r\n  Active          =    1\r\n  cfVia           =   99\r\n  cfExtdStep      =   10\r\n  cfHugging       =    1\r\n  mnExtdSteps     =    1\r\n  mnRipupLevel    =    0\r\n\r\n[Optimize2]\r\n\r\n  @Optimize1\r\n\r\n  Active          =    1\r\n  cfNonPref       =    0\r\n  cfChangeDir     =    6\r\n  cfExtdStep      =    0\r\n  cfBonusStep     =    2\r\n  cfMalusStep     =    2\r\n  cfPadImpact     =    2\r\n  cfSmdImpact     =    2\r\n  cfHugging       =    0\r\n\r\n[Optimize3]\r\n\r\n  @Optimize2\r\n\r\n  Active          =    1\r\n  cfChangeDir     =    8\r\n  cfPadImpact     =    0\r\n  cfSmdImpact     =    0\r\n\r\n[Optimize4]\r\n\r\n  @Optimize3\r\n\r\n  Active          =    1\r\n  cfChangeDir     =   25\r\n\r\n"
  },
  {
    "path": "eagle/haasoscope_trigger_board_v1.1.brd",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"9.6.2\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"1\" unitdist=\"mm\" unit=\"mm\" style=\"lines\" multiple=\"1\" display=\"yes\" altdistance=\"0.1\" altunitdist=\"mm\" altunit=\"mm\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"2\" name=\"Route2\" color=\"1\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"no\" active=\"yes\"/>\n<layer number=\"7\" name=\"Route7\" color=\"4\" fill=\"8\" visible=\"no\" active=\"yes\"/>\n<layer number=\"8\" name=\"Route8\" color=\"1\" fill=\"2\" visible=\"no\" active=\"yes\"/>\n<layer number=\"9\" name=\"Route9\" color=\"4\" fill=\"2\" visible=\"no\" active=\"yes\"/>\n<layer number=\"10\" name=\"Route10\" color=\"1\" fill=\"7\" visible=\"no\" active=\"yes\"/>\n<layer number=\"11\" name=\"Route11\" color=\"4\" fill=\"7\" visible=\"no\" active=\"yes\"/>\n<layer number=\"12\" name=\"Route12\" color=\"1\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"13\" name=\"Route13\" color=\"4\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"14\" name=\"Route14\" color=\"1\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"15\" name=\"Route15\" color=\"4\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"24\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"39\" name=\"tKeepout\" color=\"4\" fill=\"11\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"40\" name=\"bKeepout\" color=\"1\" fill=\"11\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"41\" name=\"tRestrict\" color=\"4\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"42\" name=\"bRestrict\" color=\"1\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"43\" name=\"vRestrict\" color=\"2\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"44\" name=\"Drills\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"45\" name=\"Holes\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"46\" name=\"Milling\" color=\"3\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"47\" name=\"Measures\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"48\" name=\"Document\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"49\" name=\"Reference\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"50\" name=\"dxf\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"51\" name=\"tDocu\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"52\" name=\"bDocu\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"53\" name=\"tGND_GNDA\" color=\"7\" fill=\"9\" visible=\"no\" active=\"no\"/>\n<layer number=\"54\" name=\"bGND_GNDA\" color=\"1\" fill=\"9\" visible=\"no\" active=\"no\"/>\n<layer number=\"56\" name=\"wert\" color=\"3\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"57\" name=\"tCAD\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"59\" name=\"tCarbon\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"60\" name=\"bCarbon\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"88\" name=\"SimResults\" color=\"9\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"89\" name=\"SimProbes\" color=\"9\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"90\" name=\"Modules\" color=\"5\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"91\" name=\"Nets\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"92\" name=\"Busses\" color=\"1\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"93\" name=\"Pins\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"94\" name=\"Symbols\" color=\"4\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"95\" name=\"Names\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"96\" name=\"Values\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"97\" name=\"Info\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"98\" name=\"Guide\" color=\"6\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"99\" name=\"SpiceOrder\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"100\" name=\"Muster\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"101\" name=\"Patch_Top\" color=\"12\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"102\" name=\"Vscore\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"103\" name=\"tMap\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"104\" name=\"Name\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"105\" name=\"tPlate\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"106\" name=\"bPlate\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"107\" name=\"Crop\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"108\" name=\"fp8\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"109\" name=\"fp9\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"110\" name=\"110\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"111\" 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width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.62\" y1=\"-1.905\" x2=\"8.255\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"10.16\" y1=\"1.905\" x2=\"10.16\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.255\" y1=\"-2.54\" x2=\"9.525\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-8.89\" y=\"-1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"-8.89\" y=\"1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"-6.35\" y=\"-1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"4\" x=\"-6.35\" y=\"1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"5\" x=\"-3.81\" y=\"-1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"6\" x=\"-3.81\" y=\"1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"7\" x=\"-1.27\" y=\"-1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"8\" x=\"-1.27\" y=\"1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"9\" x=\"1.27\" y=\"-1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"10\" x=\"1.27\" y=\"1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"11\" x=\"3.81\" y=\"-1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"12\" x=\"3.81\" y=\"1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"13\" x=\"6.35\" y=\"-1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"14\" x=\"6.35\" y=\"1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"15\" x=\"8.89\" y=\"-1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"16\" x=\"8.89\" y=\"1.27\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-10.16\" y=\"3.175\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.16\" y=\"-4.445\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-9.144\" y1=\"-1.524\" x2=\"-8.636\" y2=\"-1.016\" layer=\"51\"/>\n<rectangle x1=\"-9.144\" y1=\"1.016\" x2=\"-8.636\" y2=\"1.524\" layer=\"51\"/>\n<rectangle x1=\"-6.604\" y1=\"1.016\" x2=\"-6.096\" y2=\"1.524\" layer=\"51\"/>\n<rectangle x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.096\" y2=\"-1.016\" layer=\"51\"/>\n<rectangle x1=\"-4.064\" y1=\"1.016\" x2=\"-3.556\" y2=\"1.524\" layer=\"51\"/>\n<rectangle x1=\"-4.064\" y1=\"-1.524\" x2=\"-3.556\" y2=\"-1.016\" layer=\"51\"/>\n<rectangle x1=\"-1.524\" y1=\"1.016\" x2=\"-1.016\" y2=\"1.524\" layer=\"51\"/>\n<rectangle x1=\"1.016\" y1=\"1.016\" x2=\"1.524\" y2=\"1.524\" layer=\"51\"/>\n<rectangle x1=\"3.556\" y1=\"1.016\" x2=\"4.064\" y2=\"1.524\" layer=\"51\"/>\n<rectangle x1=\"-1.524\" y1=\"-1.524\" x2=\"-1.016\" y2=\"-1.016\" layer=\"51\"/>\n<rectangle x1=\"1.016\" y1=\"-1.524\" x2=\"1.524\" y2=\"-1.016\" layer=\"51\"/>\n<rectangle x1=\"3.556\" y1=\"-1.524\" x2=\"4.064\" y2=\"-1.016\" layer=\"51\"/>\n<rectangle x1=\"6.096\" y1=\"1.016\" x2=\"6.604\" y2=\"1.524\" layer=\"51\"/>\n<rectangle x1=\"6.096\" y1=\"-1.524\" x2=\"6.604\" y2=\"-1.016\" layer=\"51\"/>\n<rectangle x1=\"8.636\" y1=\"1.016\" x2=\"9.144\" y2=\"1.524\" layer=\"51\"/>\n<rectangle x1=\"8.636\" y1=\"-1.524\" x2=\"9.144\" y2=\"-1.016\" layer=\"51\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"2X08\" urn=\"urn:adsk.eagle:package:22481/2\" type=\"model\" library_version=\"4\">\n<description>PIN HEADER</description>\n<packageinstances>\n<packageinstance name=\"2X08\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.508\" drill=\"0\">\n</class>\n</classes>\n<designrules name=\"MF_Standard_2_Layer\">\n<description language=\"en\">&lt;b&gt;MacroFab, INC. EAGLE Design Rules&lt;/b&gt;\n&lt;p&gt;This DRC check is for 2-Layer Standard Capability boards to be manufactured through the MacroFab, INC. service.</description>\n<param name=\"layerSetup\" value=\"(1*16)\"/>\n<param name=\"mtCopper\" value=\"0.035mm 0.0175mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.0175mm 0.035mm\"/>\n<param name=\"mtIsolate\" value=\"1.5mm 1.1mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm\"/>\n<param name=\"mdWireWire\" value=\"5mil\"/>\n<param name=\"mdWirePad\" value=\"5mil\"/>\n<param name=\"mdWireVia\" value=\"5mil\"/>\n<param name=\"mdPadPad\" value=\"5mil\"/>\n<param name=\"mdPadVia\" value=\"5mil\"/>\n<param name=\"mdViaVia\" value=\"5mil\"/>\n<param name=\"mdSmdPad\" value=\"0mil\"/>\n<param name=\"mdSmdVia\" value=\"0mil\"/>\n<param name=\"mdSmdSmd\" value=\"0mil\"/>\n<param name=\"mdViaViaSameLayer\" value=\"8mil\"/>\n<param name=\"mnLayersViaInSmd\" value=\"2\"/>\n<param name=\"mdCopperDimension\" value=\"10mil\"/>\n<param name=\"mdDrill\" value=\"10mil\"/>\n<param name=\"mdSmdStop\" value=\"0mil\"/>\n<param name=\"msWidth\" value=\"5mil\"/>\n<param name=\"msDrill\" value=\"12mil\"/>\n<param name=\"msMicroVia\" value=\"12mil\"/>\n<param name=\"msBlindViaRatio\" value=\"0.5\"/>\n<param name=\"rvPadTop\" value=\"0.25\"/>\n<param name=\"rvPadInner\" value=\"0.25\"/>\n<param name=\"rvPadBottom\" value=\"0.25\"/>\n<param name=\"rvViaOuter\" value=\"0.25\"/>\n<param name=\"rvViaInner\" value=\"0.25\"/>\n<param name=\"rvMicroViaOuter\" value=\"0.25\"/>\n<param name=\"rvMicroViaInner\" value=\"0.25\"/>\n<param name=\"rlMinPadTop\" value=\"6mil\"/>\n<param name=\"rlMaxPadTop\" value=\"20mil\"/>\n<param name=\"rlMinPadInner\" value=\"6mil\"/>\n<param name=\"rlMaxPadInner\" value=\"20mil\"/>\n<param name=\"rlMinPadBottom\" value=\"6mil\"/>\n<param name=\"rlMaxPadBottom\" value=\"20mil\"/>\n<param name=\"rlMinViaOuter\" value=\"6mil\"/>\n<param name=\"rlMaxViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinViaInner\" value=\"6mil\"/>\n<param name=\"rlMaxViaInner\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaOuter\" value=\"6mil\"/>\n<param name=\"rlMaxMicroViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaInner\" value=\"6mil\"/>\n<param name=\"rlMaxMicroViaInner\" value=\"20mil\"/>\n<param name=\"psTop\" value=\"-1\"/>\n<param name=\"psBottom\" value=\"-1\"/>\n<param name=\"psFirst\" value=\"0\"/>\n<param name=\"psElongationLong\" value=\"100\"/>\n<param name=\"psElongationOffset\" value=\"100\"/>\n<param name=\"mvStopFrame\" value=\"1\"/>\n<param name=\"mvCreamFrame\" value=\"0\"/>\n<param name=\"mlMinStopFrame\" value=\"2mil\"/>\n<param name=\"mlMaxStopFrame\" value=\"2mil\"/>\n<param name=\"mlMinCreamFrame\" value=\"0mil\"/>\n<param name=\"mlMaxCreamFrame\" value=\"0mil\"/>\n<param name=\"mlViaStopLimit\" value=\"25mil\"/>\n<param name=\"srRoundness\" value=\"0\"/>\n<param name=\"srMinRoundness\" value=\"0mil\"/>\n<param name=\"srMaxRoundness\" value=\"0mil\"/>\n<param name=\"slThermalIsolate\" value=\"10mil\"/>\n<param name=\"slThermalsForVias\" value=\"0\"/>\n<param name=\"dpMaxLengthDifference\" value=\"10mm\"/>\n<param name=\"dpGapFactor\" value=\"2.5\"/>\n<param name=\"checkAngle\" value=\"0\"/>\n<param name=\"checkFont\" value=\"1\"/>\n<param name=\"checkRestrict\" value=\"0\"/>\n<param name=\"checkStop\" value=\"0\"/>\n<param name=\"checkValues\" value=\"0\"/>\n<param name=\"checkNames\" value=\"1\"/>\n<param name=\"checkWireStubs\" value=\"1\"/>\n<param name=\"checkPolygonWidth\" value=\"0\"/>\n<param name=\"useDiameter\" value=\"13\"/>\n<param name=\"maxErrors\" value=\"50\"/>\n</designrules>\n<autorouter>\n<pass name=\"Default\">\n<param name=\"RoutingGrid\" value=\"50mil\"/>\n<param name=\"AutoGrid\" value=\"1\"/>\n<param name=\"Efforts\" value=\"0\"/>\n<param name=\"TopRouterVariant\" value=\"1\"/>\n<param name=\"tpViaShape\" value=\"round\"/>\n<param name=\"PrefDir.1\" value=\"a\"/>\n<param name=\"PrefDir.2\" value=\"0\"/>\n<param name=\"PrefDir.3\" value=\"0\"/>\n<param name=\"PrefDir.4\" value=\"0\"/>\n<param name=\"PrefDir.5\" value=\"0\"/>\n<param name=\"PrefDir.6\" value=\"0\"/>\n<param name=\"PrefDir.7\" value=\"0\"/>\n<param name=\"PrefDir.8\" value=\"0\"/>\n<param name=\"PrefDir.9\" value=\"0\"/>\n<param name=\"PrefDir.10\" value=\"0\"/>\n<param name=\"PrefDir.11\" value=\"0\"/>\n<param name=\"PrefDir.12\" value=\"0\"/>\n<param name=\"PrefDir.13\" value=\"0\"/>\n<param name=\"PrefDir.14\" value=\"0\"/>\n<param name=\"PrefDir.15\" value=\"0\"/>\n<param name=\"PrefDir.16\" value=\"a\"/>\n<param name=\"cfVia\" value=\"8\"/>\n<param name=\"cfNonPref\" value=\"5\"/>\n<param name=\"cfChangeDir\" value=\"2\"/>\n<param name=\"cfOrthStep\" value=\"2\"/>\n<param name=\"cfDiagStep\" value=\"3\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"1\"/>\n<param name=\"cfMalusStep\" value=\"1\"/>\n<param name=\"cfPadImpact\" value=\"4\"/>\n<param name=\"cfSmdImpact\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"0\"/>\n<param name=\"cfHugging\" value=\"3\"/>\n<param name=\"cfAvoid\" value=\"4\"/>\n<param name=\"cfPolygon\" value=\"10\"/>\n<param name=\"cfBase.1\" value=\"0\"/>\n<param name=\"cfBase.2\" value=\"1\"/>\n<param name=\"cfBase.3\" value=\"1\"/>\n<param name=\"cfBase.4\" value=\"1\"/>\n<param name=\"cfBase.5\" value=\"1\"/>\n<param name=\"cfBase.6\" value=\"1\"/>\n<param name=\"cfBase.7\" value=\"1\"/>\n<param name=\"cfBase.8\" value=\"1\"/>\n<param name=\"cfBase.9\" value=\"1\"/>\n<param name=\"cfBase.10\" value=\"1\"/>\n<param name=\"cfBase.11\" value=\"1\"/>\n<param name=\"cfBase.12\" value=\"1\"/>\n<param name=\"cfBase.13\" value=\"1\"/>\n<param name=\"cfBase.14\" value=\"1\"/>\n<param name=\"cfBase.15\" value=\"1\"/>\n<param name=\"cfBase.16\" value=\"0\"/>\n<param name=\"mnVias\" value=\"20\"/>\n<param name=\"mnSegments\" value=\"9999\"/>\n<param name=\"mnExtdSteps\" value=\"9999\"/>\n<param name=\"mnRipupLevel\" value=\"10\"/>\n<param name=\"mnRipupSteps\" value=\"100\"/>\n<param name=\"mnRipupTotal\" value=\"100\"/>\n</pass>\n<pass name=\"Follow-me\" refer=\"Default\" active=\"yes\">\n</pass>\n<pass name=\"Busses\" refer=\"Default\" active=\"yes\">\n<param name=\"cfNonPref\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"4\"/>\n<param name=\"cfHugging\" value=\"0\"/>\n<param name=\"mnVias\" value=\"0\"/>\n</pass>\n<pass name=\"Route\" refer=\"Default\" active=\"yes\">\n</pass>\n<pass name=\"Optimize1\" refer=\"Default\" active=\"yes\">\n<param name=\"cfVia\" value=\"99\"/>\n<param name=\"cfExtdStep\" value=\"10\"/>\n<param name=\"cfHugging\" value=\"1\"/>\n<param name=\"mnExtdSteps\" value=\"1\"/>\n<param name=\"mnRipupLevel\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize2\" refer=\"Optimize1\" active=\"yes\">\n<param name=\"cfNonPref\" value=\"0\"/>\n<param name=\"cfChangeDir\" value=\"6\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"2\"/>\n<param name=\"cfMalusStep\" value=\"2\"/>\n<param name=\"cfPadImpact\" value=\"2\"/>\n<param name=\"cfSmdImpact\" value=\"2\"/>\n<param name=\"cfHugging\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize3\" refer=\"Optimize2\" active=\"yes\">\n<param name=\"cfChangeDir\" value=\"8\"/>\n<param name=\"cfPadImpact\" value=\"0\"/>\n<param name=\"cfSmdImpact\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize4\" refer=\"Optimize3\" active=\"yes\">\n<param name=\"cfChangeDir\" value=\"25\"/>\n</pass>\n</autorouter>\n<elements>\n<element name=\"J1\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" package=\"H2-2.54\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\" x=\"25.81\" y=\"-0.99\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" x=\"25.81\" y=\"-0.99\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"J2\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" package=\"H2-2.54\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\" x=\"25.757725\" y=\"10.81\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" x=\"25.757725\" y=\"10.81\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"IO100\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" package=\"BU-SMB-V\" package3d_urn=\"urn:adsk.eagle:package:6209/1\" value=\"BU-SMB-V\" x=\"25.0727\" y=\"4.65\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"25.0727\" y=\"4.65\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"\" x=\"25.0727\" y=\"4.65\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"22.605\" y=\"-2.4673\" size=\"0.8128\" layer=\"21\" rot=\"R90\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"25.0727\" y=\"4.65\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"25.0727\" y=\"4.65\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"IO101\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" package=\"BU-SMB-V\" package3d_urn=\"urn:adsk.eagle:package:6209/1\" value=\"BU-SMB-V\" x=\"25.120425\" y=\"16.35\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"25.120425\" y=\"16.35\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"\" x=\"25.120425\" y=\"16.35\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"22.405\" y=\"9.380425\" size=\"0.8128\" layer=\"21\" rot=\"R90\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"25.120425\" y=\"16.35\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"25.120425\" y=\"16.35\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"JP1\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"Jp1\" x=\"18\" y=\"10\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"POPULARITY\" value=\"6\" x=\"18\" y=\"10\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"JP2\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"JP2\" x=\"9.7\" y=\"10\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"POPULARITY\" value=\"6\" x=\"9.7\" y=\"10\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"IOAIN\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" package=\"BU-SMB-V\" package3d_urn=\"urn:adsk.eagle:package:6209/1\" value=\"BU-SMB-V\" x=\"-0.9\" y=\"16.3\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"-8.9\" y=\"29.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"\" x=\"-8.9\" y=\"29.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"2.355\" y=\"9.16\" size=\"0.8128\" layer=\"25\" rot=\"R90\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"-8.9\" y=\"29.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"-8.9\" y=\"29.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"IO121\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" package=\"BU-SMB-V\" package3d_urn=\"urn:adsk.eagle:package:6209/1\" value=\"BU-SMB-V\" x=\"-0.9\" y=\"4.6\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"-16.9\" y=\"30.6\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"\" x=\"-16.9\" y=\"30.6\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"2.455\" y=\"-2.54\" size=\"0.8128\" layer=\"25\" rot=\"R90\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"-16.9\" y=\"30.6\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"-16.9\" y=\"30.6\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"J3\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" package=\"H2-2.54\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\" x=\"-1.7\" y=\"10.8\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" x=\"11.3\" y=\"36.8\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"J4\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" package=\"H2-2.54\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\" x=\"-1.6\" y=\"-1\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" x=\"18.4\" y=\"14\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n</elements>\n<signals>\n<signal name=\"GND\">\n<polygon width=\"0.4064\" layer=\"16\">\n<vertex x=\"-7\" y=\"22\"/>\n<vertex x=\"31\" y=\"22\"/>\n<vertex x=\"31\" y=\"-4\"/>\n<vertex x=\"-7\" y=\"-4\"/>\n</polygon>\n<contactref element=\"IO100\" pad=\"2\"/>\n<contactref element=\"IO100\" pad=\"3\"/>\n<contactref element=\"IO100\" pad=\"4\"/>\n<contactref element=\"IO100\" pad=\"5\"/>\n<contactref element=\"J1\" pad=\"1\"/>\n<contactref element=\"IO101\" pad=\"2\"/>\n<contactref element=\"IO101\" pad=\"3\"/>\n<contactref element=\"IO101\" pad=\"4\"/>\n<contactref element=\"IO101\" pad=\"5\"/>\n<contactref element=\"J2\" pad=\"1\"/>\n<contactref element=\"JP1\" pad=\"9\"/>\n<contactref element=\"JP2\" pad=\"9\"/>\n<contactref element=\"IOAIN\" pad=\"3\"/>\n<contactref element=\"IOAIN\" pad=\"4\"/>\n<contactref element=\"IOAIN\" pad=\"5\"/>\n<contactref element=\"IOAIN\" pad=\"2\"/>\n<contactref element=\"J3\" pad=\"1\"/>\n<contactref element=\"J4\" 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x2=\"-2.75\" y2=\"-1\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-1\" y1=\"2.25\" x2=\"-2.75\" y2=\"0.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-1\" y1=\"4.5\" x2=\"-1\" y2=\"2.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-2.75\" y1=\"-1\" x2=\"-2.87\" y2=\"-1\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-1\" y1=\"4.5\" x2=\"-0.9\" y2=\"4.6\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-0.75\" y1=\"3.75\" x2=\"8.25\" y2=\"3.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.25\" y1=\"3.75\" x2=\"8.43\" y2=\"3.65\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-0.75\" y1=\"3.75\" x2=\"-0.9\" y2=\"4.6\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"AIN\">\n<contactref element=\"JP1\" pad=\"15\"/>\n<contactref element=\"JP2\" pad=\"15\"/>\n<contactref element=\"IOAIN\" pad=\"1\"/>\n<contactref element=\"J3\" pad=\"2\"/>\n<wire x1=\"9.75\" y1=\"-0.25\" x2=\"8.5\" y2=\"1\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15.25\" y1=\"-0.25\" x2=\"9.75\" y2=\"-0.25\" width=\"0.508\" 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layer=\"16\"/>\n<wire x1=\"-2.97\" y1=\"12.03\" x2=\"-2.97\" y2=\"10.8\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-1\" y1=\"14\" x2=\"-2.97\" y2=\"12.03\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"101\">\n<contactref element=\"JP1\" pad=\"2\"/>\n<contactref element=\"JP2\" pad=\"2\"/>\n<contactref element=\"IO101\" pad=\"1\"/>\n<contactref element=\"J2\" pad=\"2\"/>\n<wire x1=\"12.25\" y1=\"20.25\" x2=\"11\" y2=\"19\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"18\" y1=\"20.25\" x2=\"12.25\" y2=\"20.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"19\" x2=\"18\" y2=\"20.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"19\" x2=\"10.97\" y2=\"18.89\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"19\" x2=\"19.27\" y2=\"18.89\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"16.25\" x2=\"24.5\" y2=\"11\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"16.25\" x2=\"24.5\" y2=\"16.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"11\" x2=\"24.487725\" y2=\"10.81\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"16.25\" x2=\"25.120425\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"16.25\" x2=\"19.5\" y2=\"18.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"24.25\" y1=\"16.25\" x2=\"22\" y2=\"16.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.5\" y1=\"18.75\" x2=\"19.27\" y2=\"18.89\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"24.25\" y1=\"16.25\" x2=\"25.120425\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"91\">\n<contactref element=\"JP1\" pad=\"6\"/>\n<contactref element=\"JP2\" pad=\"6\"/>\n<wire x1=\"11.5\" y1=\"13.25\" x2=\"11\" y2=\"13.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"13.25\" x2=\"11.5\" y2=\"13.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.25\" y1=\"12.5\" x2=\"15.5\" y2=\"13.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"18\" y1=\"12.5\" x2=\"16.25\" y2=\"12.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"13.75\" x2=\"18\" y2=\"12.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"13.75\" x2=\"10.97\" y2=\"13.81\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"13.75\" x2=\"19.27\" y2=\"13.81\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"90\">\n<contactref element=\"JP1\" pad=\"8\"/>\n<contactref element=\"JP2\" pad=\"8\"/>\n<wire x1=\"12.25\" y1=\"10\" x2=\"11\" y2=\"11.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"18\" y1=\"10\" x2=\"12.25\" y2=\"10\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.27\" y1=\"11.27\" x2=\"18\" y2=\"10\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"11.25\" x2=\"10.97\" y2=\"11.27\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"89\">\n<contactref element=\"JP1\" pad=\"10\"/>\n<contactref element=\"JP2\" pad=\"10\"/>\n<wire x1=\"12\" y1=\"7.5\" x2=\"11\" y2=\"8.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"18.25\" y1=\"7.5\" x2=\"12\" y2=\"7.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"8.5\" x2=\"18.25\" y2=\"7.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"8.5\" x2=\"10.97\" y2=\"8.73\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"8.5\" x2=\"19.27\" y2=\"8.73\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"88\">\n<contactref element=\"JP1\" pad=\"12\"/>\n<contactref element=\"JP2\" pad=\"12\"/>\n<wire x1=\"11.25\" y1=\"5.75\" x2=\"11\" y2=\"6\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"5.75\" x2=\"11.25\" y2=\"5.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.25\" y1=\"5\" x2=\"15.5\" y2=\"5.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"18.25\" y1=\"5\" x2=\"16.25\" y2=\"5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"6\" x2=\"18.25\" y2=\"5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"6\" x2=\"10.97\" y2=\"6.19\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"6\" x2=\"19.27\" y2=\"6.19\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"5V\">\n<contactref element=\"JP1\" pad=\"5\"/>\n<contactref element=\"JP1\" pad=\"7\"/>\n<contactref element=\"JP2\" pad=\"7\"/>\n<contactref element=\"JP2\" pad=\"5\"/>\n<wire x1=\"8.5\" y1=\"13.75\" x2=\"8.5\" y2=\"12.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"12.5\" x2=\"8.5\" y2=\"11.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"11.5\" x2=\"8.43\" y2=\"11.27\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"13.75\" x2=\"8.43\" y2=\"13.81\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.25\" y1=\"11.75\" x2=\"16.73\" y2=\"11.27\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"12.25\" y1=\"11.75\" x2=\"16.25\" y2=\"11.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11.5\" y1=\"12.5\" x2=\"12.25\" y2=\"11.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"12.5\" x2=\"11.5\" y2=\"12.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"11.5\" x2=\"16.5\" y2=\"13.75\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"13.75\" x2=\"16.73\" y2=\"13.81\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"11.5\" x2=\"16.73\" y2=\"11.27\" width=\"0.508\" layer=\"16\"/>\n</signal>\n<signal name=\"3V3\">\n<contactref element=\"JP1\" pad=\"1\"/>\n<contactref element=\"JP2\" pad=\"1\"/>\n<contactref element=\"JP1\" pad=\"3\"/>\n<contactref element=\"JP2\" pad=\"3\"/>\n<contactref element=\"JP1\" pad=\"14\"/>\n<contactref element=\"JP2\" pad=\"14\"/>\n<wire x1=\"12\" y1=\"2.5\" x2=\"11\" y2=\"3.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"18.25\" y1=\"2.5\" x2=\"12\" y2=\"2.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"3.5\" x2=\"18.25\" y2=\"2.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"3.5\" x2=\"10.97\" y2=\"3.65\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"3.5\" x2=\"19.27\" y2=\"3.65\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"18.75\" x2=\"8.5\" y2=\"17.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"17.5\" x2=\"8.5\" y2=\"16.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"16.5\" x2=\"8.43\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"18.75\" x2=\"8.43\" y2=\"18.89\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.75\" y1=\"18.75\" x2=\"16.75\" y2=\"17.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.75\" y1=\"17.5\" x2=\"16.75\" y2=\"16.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.75\" y1=\"16.5\" x2=\"16.73\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.75\" y1=\"18.75\" x2=\"16.73\" y2=\"18.89\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.75\" y1=\"17.5\" x2=\"8.5\" y2=\"17.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"14.75\" y1=\"7.5\" x2=\"11\" y2=\"3.75\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"14.75\" y1=\"14.75\" x2=\"14.75\" y2=\"7.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"16.5\" x2=\"14.75\" y2=\"14.75\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"11\" y1=\"3.75\" x2=\"10.97\" y2=\"3.65\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"16.5\" x2=\"16.73\" y2=\"16.35\" width=\"0.508\" layer=\"16\"/>\n</signal>\n<signal name=\"100\">\n<contactref element=\"JP1\" pad=\"4\"/>\n<contactref element=\"JP2\" pad=\"4\"/>\n<contactref element=\"IO100\" pad=\"1\"/>\n<contactref element=\"J1\" pad=\"2\"/>\n<wire x1=\"12.25\" y1=\"15\" x2=\"11\" y2=\"16.25\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"18\" y1=\"15\" x2=\"12.25\" y2=\"15\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"16.25\" x2=\"18\" y2=\"15\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"16.25\" x2=\"10.97\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19.25\" y1=\"16.25\" x2=\"19.27\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"24.75\" y1=\"4.5\" x2=\"24.75\" y2=\"-0.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"4.5\" x2=\"24.75\" y2=\"4.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"24.75\" y1=\"-0.75\" x2=\"24.54\" y2=\"-0.99\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"4.5\" x2=\"25.0727\" y2=\"4.65\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"21\" y1=\"13.75\" x2=\"19\" y2=\"15.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"21\" y1=\"4.75\" x2=\"21\" y2=\"13.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"24.75\" y1=\"4.75\" x2=\"21\" y2=\"4.75\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"15.75\" x2=\"19.27\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"24.75\" y1=\"4.75\" x2=\"25.0727\" y2=\"4.65\" width=\"0.508\" layer=\"1\"/>\n</signal>\n</signals>\n<mfgpreviewcolors>\n<mfgpreviewcolor name=\"soldermaskcolor\" color=\"0xC8008000\"/>\n<mfgpreviewcolor name=\"silkscreencolor\" color=\"0xFFFEFEFE\"/>\n<mfgpreviewcolor name=\"backgroundcolor\" color=\"0xFF282828\"/>\n<mfgpreviewcolor name=\"coppercolor\" color=\"0xFFFFBF00\"/>\n<mfgpreviewcolor name=\"substratecolor\" color=\"0xFF786E46\"/>\n</mfgpreviewcolors>\n</board>\n</drawing>\n<compatibility>\n<note version=\"6.3\" minversion=\"6.2.2\" severity=\"warning\">\nSince Version 6.2.2 text objects can contain more than one line,\nwhich will not be processed correctly with this version.\n</note>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/haasoscope_trigger_board_v1.1.sch",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"9.6.2\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"0.1\" unitdist=\"inch\" unit=\"inch\" style=\"lines\" multiple=\"1\" display=\"no\" altdistance=\"0.01\" altunitdist=\"inch\" altunit=\"inch\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"2\" name=\"Route2\" color=\"1\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"7\" name=\"Route7\" color=\"4\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"8\" name=\"Route8\" color=\"1\" fill=\"2\" visible=\"no\" active=\"no\"/>\n<layer number=\"9\" name=\"Route9\" color=\"4\" fill=\"2\" visible=\"no\" active=\"no\"/>\n<layer number=\"10\" name=\"Route10\" color=\"1\" fill=\"7\" visible=\"no\" active=\"no\"/>\n<layer number=\"11\" name=\"Route11\" color=\"4\" fill=\"7\" visible=\"no\" active=\"no\"/>\n<layer number=\"12\" name=\"Route12\" color=\"1\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"13\" name=\"Route13\" color=\"4\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"14\" name=\"Route14\" color=\"1\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"15\" name=\"Route15\" color=\"4\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"24\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer 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color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"214\" name=\"214bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"215\" name=\"215bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"216\" name=\"216bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"217\" name=\"217bmp\" color=\"18\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"218\" name=\"218bmp\" color=\"19\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"219\" name=\"219bmp\" color=\"20\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"220\" name=\"220bmp\" color=\"21\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"221\" name=\"221bmp\" color=\"22\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"222\" name=\"222bmp\" color=\"23\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"223\" name=\"223bmp\" color=\"24\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"224\" name=\"224bmp\" color=\"25\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"225\" name=\"225bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"226\" name=\"226bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"227\" name=\"227bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"228\" name=\"228bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"229\" name=\"229bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"230\" name=\"230bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"231\" name=\"Eagle3D_PG1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"232\" name=\"Eagle3D_PG2\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"233\" name=\"Eagle3D_PG3\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"248\" name=\"Housing\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"249\" name=\"Edge\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"250\" name=\"Descript\" color=\"3\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"251\" name=\"SMDround\" color=\"12\" fill=\"11\" visible=\"no\" active=\"no\"/>\n<layer number=\"254\" name=\"OrgLBR\" color=\"13\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"255\" name=\"Accent\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n</layers>\n<schematic xreflabel=\"%F%N/%S.%C%R\" xrefpart=\"/%S.%C%R\">\n<libraries>\n<library name=\"con-coax\" urn=\"urn:adsk.eagle:library:133\">\n<description>&lt;b&gt;Coax Connectors&lt;/b&gt;&lt;p&gt;\nRadiall  and M/A COM.&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"BU-SMB-V\" urn=\"urn:adsk.eagle:footprint:6175/1\" locally_modified=\"yes\" library_version=\"1\" library_locally_modified=\"yes\">\n<description>FEMALE &lt;b&gt;SMB CONNECTOR&lt;/b&gt;&lt;p&gt;\nRadiall&lt;p&gt;\ndistributor RS 112-2993</description>\n<wire x1=\"-3.2\" y1=\"-3.2\" x2=\"3.1999\" y2=\"-3.1999\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.1999\" y1=\"-3.1999\" x2=\"3.2\" y2=\"3.2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.2\" y1=\"3.2\" x2=\"-3.1999\" y2=\"3.1999\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.1999\" y1=\"3.1999\" x2=\"-3.2\" y2=\"-3.2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.2\" y1=\"-0.9\" x2=\"-3.2\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1\" y1=\"3.2\" x2=\"1.1\" y2=\"3.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.2\" y1=\"1\" x2=\"3.2\" y2=\"-0.9\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"-3.2\" x2=\"-1\" y2=\"-3.2\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"1.8001\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.3\" width=\"1.016\" layer=\"51\"/>\n<pad name=\"1\" x=\"0\" y=\"0\" drill=\"1.4\"/>\n<pad name=\"2\" x=\"-2.54\" y=\"2.54\" drill=\"1.4\"/>\n<pad name=\"3\" x=\"2.54\" y=\"2.54\" drill=\"1.4\"/>\n<pad name=\"4\" x=\"2.54\" y=\"-2.54\" drill=\"1.4\"/>\n<pad name=\"5\" x=\"-2.54\" y=\"-2.54\" drill=\"1.4\"/>\n<text x=\"-2.54\" y=\"4.445\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-5.715\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"BU-SMB-V\" urn=\"urn:adsk.eagle:package:6209/1\" locally_modified=\"yes\" type=\"box\" library_version=\"1\" library_locally_modified=\"yes\">\n<description>FEMALE SMB CONNECTOR\nRadiall\ndistributor RS 112-2993</description>\n<packageinstances>\n<packageinstance name=\"BU-SMB-V\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"BNC-FGND\" urn=\"urn:adsk.eagle:symbol:6174/1\" library_version=\"1\">\n<wire x1=\"0\" y1=\"-2.54\" x2=\"-0.762\" y2=\"-1.778\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-0.508\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"0.508\" x2=\"-0.762\" y2=\"0.508\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.762\" y1=\"0.508\" x2=\"-0.508\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"-0.762\" y2=\"-0.508\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.762\" y1=\"-0.508\" x2=\"-2.54\" y2=\"-0.508\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"2.54\" x2=\"0\" y2=\"0.508\" width=\"0.3048\" layer=\"94\" curve=\"-79.611142\" cap=\"flat\"/>\n<wire x1=\"-2.54\" y1=\"-2.54\" x2=\"0\" y2=\"-0.508\" width=\"0.3048\" layer=\"94\" curve=\"79.611142\" cap=\"flat\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<text x=\"-2.54\" y=\"3.302\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<pin name=\"1\" x=\"2.54\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R180\"/>\n<pin name=\"2\" x=\"2.54\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"BU-SMB-V\" urn=\"urn:adsk.eagle:component:6235/1\" locally_modified=\"yes\" prefix=\"X\" library_version=\"1\" library_locally_modified=\"yes\">\n<description>FEMALE &lt;b&gt;SMB CONNECTOR&lt;/b&gt;&lt;p&gt;\nRadiall&lt;p&gt;\ndistributor RS 112-2993</description>\n<gates>\n<gate name=\"G1\" symbol=\"BNC-FGND\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"BU-SMB-V\">\n<connects>\n<connect gate=\"G1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G1\" pin=\"2\" pad=\"2 3 4 5\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-Connector\" urn=\"urn:adsk.eagle:library:478\">\n<packages>\n<package name=\"H2-2.54\" urn=\"urn:adsk.eagle:footprint:33040/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"2.54\" x2=\"1.27\" y2=\"2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"2.54\" x2=\"1.27\" y2=\"-2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-2.54\" x2=\"-1.27\" y2=\"-2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-2.54\" x2=\"-1.27\" y2=\"2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"2.54\" x2=\"1.27\" y2=\"2.54\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"2.54\" x2=\"1.27\" y2=\"-2.54\" width=\"0\" layer=\"39\"/>\n<wire x1=\"-1.27\" y1=\"-2.54\" x2=\"-1.27\" y2=\"2.54\" width=\"0\" layer=\"39\"/>\n<pad name=\"1\" x=\"0\" y=\"1.27\" drill=\"0.889\" diameter=\"1.651\" shape=\"square\"/>\n<pad name=\"2\" x=\"0\" y=\"-1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<text x=\"-1.905\" y=\"-1.905\" size=\"0.889\" layer=\"25\" ratio=\"11\" rot=\"R90\">&gt;NAME</text>\n<text x=\"2.54\" y=\"-2.54\" size=\"0.889\" layer=\"27\" ratio=\"11\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.27\" y1=\"-2.54\" x2=\"1.27\" y2=\"2.54\" layer=\"39\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"H2-2.54\" urn=\"urn:adsk.eagle:package:33132/1\" type=\"box\" library_version=\"1\">\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"HEADER-2P\" urn=\"urn:adsk.eagle:symbol:33039/1\" library_version=\"1\">\n<wire x1=\"-2.54\" y1=\"5.08\" x2=\"2.54\" y2=\"5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"5.08\" x2=\"2.54\" y2=\"-5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-5.08\" x2=\"-2.54\" y2=\"-5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"-5.08\" x2=\"-2.54\" y2=\"5.08\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"6.35\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;name</text>\n<text x=\"1.27\" y=\"6.35\" size=\"1.27\" layer=\"96\" ratio=\"10\">&gt;value</text>\n<pin name=\"1\" x=\"-7.62\" y=\"2.54\" length=\"middle\" function=\"dotclk\" swaplevel=\"1\"/>\n<pin name=\"2\" x=\"-7.62\" y=\"-2.54\" length=\"middle\" swaplevel=\"1\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" urn=\"urn:adsk.eagle:component:33184/1\" prefix=\"J\" uservalue=\"yes\" library_version=\"1\">\n<description>320020016</description>\n<gates>\n<gate name=\"G$1\" symbol=\"HEADER-2P\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"H2-2.54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:33132/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"2p-2.54\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"supply1\" urn=\"urn:adsk.eagle:library:371\">\n<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;\n GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;\n Please keep in mind, that these devices are necessary for the\n automatic wiring of the supply signals.&lt;p&gt;\n The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;\n In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;\n &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"GND\" urn=\"urn:adsk.eagle:symbol:26925/1\" library_version=\"1\">\n<wire x1=\"-1.905\" y1=\"0\" x2=\"1.905\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"GND\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R270\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"GND\" urn=\"urn:adsk.eagle:component:26954/1\" prefix=\"GND\" library_version=\"1\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"GND\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"pinhead\" urn=\"urn:adsk.eagle:library:325\">\n<description>&lt;b&gt;Pin Header Connectors&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"2X08\" urn=\"urn:adsk.eagle:footprint:22373/1\" library_version=\"4\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<wire 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x2=\"9.271\" y2=\"-2.921\" layer=\"51\"/>\n<rectangle x1=\"8.509\" y1=\"-5.461\" x2=\"9.271\" y2=\"-4.699\" layer=\"21\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"2X08\" urn=\"urn:adsk.eagle:package:22481/2\" type=\"model\" library_version=\"4\">\n<description>PIN HEADER</description>\n<packageinstances>\n<packageinstance name=\"2X08\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"2X08/90\" urn=\"urn:adsk.eagle:package:22488/2\" type=\"model\" library_version=\"4\">\n<description>PIN HEADER</description>\n<packageinstances>\n<packageinstance name=\"2X08/90\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"PINH2X8\" urn=\"urn:adsk.eagle:symbol:22372/1\" library_version=\"4\">\n<wire x1=\"-6.35\" y1=\"-12.7\" x2=\"8.89\" y2=\"-12.7\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-12.7\" x2=\"8.89\" y2=\"10.16\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"10.16\" x2=\"-6.35\" y2=\"10.16\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"10.16\" x2=\"-6.35\" y2=\"-12.7\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"10.795\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-15.24\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"PINHD-2X8\" urn=\"urn:adsk.eagle:component:22549/4\" prefix=\"JP\" uservalue=\"yes\" library_version=\"4\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X8\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X08\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:22481/2\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"POPULARITY\" value=\"6\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X08/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:22488/2\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"POPULARITY\" value=\"0\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.508\" drill=\"0\">\n</class>\n</classes>\n<parts>\n<part name=\"IO100\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" deviceset=\"BU-SMB-V\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n<part name=\"IO101\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" deviceset=\"BU-SMB-V\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n<part name=\"J1\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" deviceset=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\"/>\n<part name=\"J2\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" deviceset=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\"/>\n<part name=\"GND1\" library=\"supply1\" library_urn=\"urn:adsk.eagle:library:371\" deviceset=\"GND\" device=\"\"/>\n<part name=\"JP1\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"Jp1\"/>\n<part name=\"JP2\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"JP2\"/>\n<part name=\"IOAIN\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" deviceset=\"BU-SMB-V\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n<part name=\"IO121\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" deviceset=\"BU-SMB-V\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n<part name=\"J3\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" deviceset=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\"/>\n<part name=\"J4\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" deviceset=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\"/>\n<part name=\"GND2\" library=\"supply1\" library_urn=\"urn:adsk.eagle:library:371\" deviceset=\"GND\" device=\"\"/>\n</parts>\n<sheets>\n<sheet>\n<plain>\n</plain>\n<instances>\n<instance part=\"IO100\" gate=\"G1\" x=\"-2.54\" y=\"88.9\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-7.62\" y=\"92.202\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"IO101\" gate=\"G1\" x=\"-2.54\" y=\"76.2\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-7.62\" y=\"79.502\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"J1\" gate=\"G$1\" x=\"-17.78\" y=\"88.9\" smashed=\"yes\" rot=\"R180\"/>\n<instance part=\"J2\" gate=\"G$1\" x=\"-17.78\" y=\"76.2\" smashed=\"yes\" rot=\"R180\"/>\n<instance part=\"GND1\" gate=\"1\" x=\"7.62\" y=\"66.04\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"5.08\" y=\"63.5\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"JP1\" gate=\"A\" x=\"30.48\" y=\"78.74\" smashed=\"yes\"/>\n<instance part=\"JP2\" gate=\"A\" x=\"30.48\" y=\"45.72\" smashed=\"yes\"/>\n<instance part=\"IOAIN\" gate=\"G1\" x=\"-2.54\" y=\"55.88\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-7.62\" y=\"59.182\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"IO121\" gate=\"G1\" x=\"-2.54\" y=\"43.18\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-7.62\" y=\"46.482\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"J3\" gate=\"G$1\" x=\"-17.78\" y=\"55.88\" smashed=\"yes\" rot=\"R180\"/>\n<instance part=\"J4\" gate=\"G$1\" x=\"-17.78\" y=\"43.18\" smashed=\"yes\" rot=\"R180\"/>\n<instance part=\"GND2\" gate=\"1\" x=\"7.62\" y=\"33.02\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"5.08\" y=\"30.48\" size=\"1.778\" layer=\"96\"/>\n</instance>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"GND\" class=\"0\">\n<segment>\n<pinref part=\"IO100\" gate=\"G1\" pin=\"2\"/>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-10.16\" y1=\"86.36\" x2=\"0\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"0\" y=\"86.36\"/>\n<wire x1=\"0\" y1=\"86.36\" x2=\"7.62\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"68.58\" x2=\"7.62\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND1\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"IO101\" gate=\"G1\" pin=\"2\"/>\n<wire x1=\"7.62\" y1=\"73.66\" x2=\"7.62\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"73.66\" x2=\"-10.16\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"73.66\" x2=\"7.62\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"0\" y=\"73.66\"/>\n<junction x=\"7.62\" y=\"73.66\"/>\n</segment>\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"27.94\" y1=\"76.2\" x2=\"17.78\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"76.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"27.94\" y1=\"43.18\" x2=\"17.78\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IOAIN\" gate=\"G1\" pin=\"2\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-10.16\" y1=\"53.34\" x2=\"0\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"0\" y=\"53.34\"/>\n<wire x1=\"0\" y1=\"53.34\" x2=\"7.62\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"35.56\" x2=\"7.62\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND2\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"IO121\" gate=\"G1\" pin=\"2\"/>\n<wire x1=\"7.62\" y1=\"40.64\" x2=\"7.62\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"40.64\" x2=\"-10.16\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"40.64\" x2=\"7.62\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"0\" y=\"40.64\"/>\n<junction x=\"7.62\" y=\"40.64\"/>\n</segment>\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"27.94\" y1=\"73.66\" x2=\"17.78\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"73.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"27.94\" y1=\"40.64\" x2=\"17.78\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"40.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"35.56\" y1=\"68.58\" x2=\"45.72\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"68.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"35.56\" y1=\"35.56\" x2=\"45.72\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"121\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"27.94\" y1=\"71.12\" x2=\"17.78\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"71.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"27.94\" y1=\"38.1\" x2=\"17.78\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IO121\" gate=\"G1\" pin=\"1\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"0\" y1=\"43.18\" x2=\"0\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"45.72\" x2=\"-10.16\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"0\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"AIN\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"27.94\" y1=\"68.58\" x2=\"17.78\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"68.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"27.94\" y1=\"35.56\" x2=\"17.78\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IOAIN\" gate=\"G1\" pin=\"1\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"0\" y1=\"55.88\" x2=\"0\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"58.42\" x2=\"-10.16\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"0\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"101\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"2\"/>\n<wire x1=\"35.56\" y1=\"86.36\" x2=\"45.72\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"86.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"2\"/>\n<wire x1=\"35.56\" y1=\"53.34\" x2=\"45.72\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IO101\" gate=\"G1\" pin=\"1\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"0\" y1=\"76.2\" x2=\"0\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"78.74\" x2=\"-10.16\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"0\" y=\"78.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"91\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"6\"/>\n<wire x1=\"35.56\" y1=\"81.28\" x2=\"45.72\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"81.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"6\"/>\n<wire x1=\"35.56\" y1=\"48.26\" x2=\"45.72\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"90\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"35.56\" y1=\"78.74\" x2=\"45.72\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"78.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"35.56\" y1=\"45.72\" x2=\"45.72\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"89\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"10\"/>\n<wire x1=\"35.56\" y1=\"76.2\" x2=\"45.72\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"76.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"10\"/>\n<wire x1=\"35.56\" y1=\"43.18\" x2=\"45.72\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"88\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"35.56\" y1=\"73.66\" x2=\"45.72\" y2=\"73.66\" width=\"0.1524\" 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The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/haasoscope_triggerout_board.brd",
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EAGLE Design Rules&lt;/b&gt;\n&lt;p&gt;This DRC check is for 2-Layer Standard Capability boards to be manufactured through the MacroFab, INC. service.</description>\n<param name=\"layerSetup\" value=\"(1*16)\"/>\n<param name=\"mtCopper\" value=\"0.035mm 0.0175mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.0175mm 0.035mm\"/>\n<param name=\"mtIsolate\" value=\"1.5mm 1.1mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm\"/>\n<param name=\"mdWireWire\" value=\"5mil\"/>\n<param name=\"mdWirePad\" value=\"5mil\"/>\n<param name=\"mdWireVia\" value=\"5mil\"/>\n<param name=\"mdPadPad\" value=\"5mil\"/>\n<param name=\"mdPadVia\" value=\"5mil\"/>\n<param name=\"mdViaVia\" value=\"5mil\"/>\n<param name=\"mdSmdPad\" value=\"0mil\"/>\n<param name=\"mdSmdVia\" value=\"0mil\"/>\n<param name=\"mdSmdSmd\" value=\"0mil\"/>\n<param name=\"mdViaViaSameLayer\" value=\"8mil\"/>\n<param name=\"mnLayersViaInSmd\" value=\"2\"/>\n<param name=\"mdCopperDimension\" value=\"10mil\"/>\n<param name=\"mdDrill\" value=\"10mil\"/>\n<param name=\"mdSmdStop\" value=\"0mil\"/>\n<param name=\"msWidth\" value=\"5mil\"/>\n<param name=\"msDrill\" value=\"12mil\"/>\n<param name=\"msMicroVia\" value=\"12mil\"/>\n<param name=\"msBlindViaRatio\" value=\"0.5\"/>\n<param name=\"rvPadTop\" value=\"0.25\"/>\n<param name=\"rvPadInner\" value=\"0.25\"/>\n<param name=\"rvPadBottom\" value=\"0.25\"/>\n<param name=\"rvViaOuter\" value=\"0.25\"/>\n<param name=\"rvViaInner\" value=\"0.25\"/>\n<param name=\"rvMicroViaOuter\" value=\"0.25\"/>\n<param name=\"rvMicroViaInner\" value=\"0.25\"/>\n<param name=\"rlMinPadTop\" value=\"6mil\"/>\n<param name=\"rlMaxPadTop\" value=\"20mil\"/>\n<param name=\"rlMinPadInner\" value=\"6mil\"/>\n<param name=\"rlMaxPadInner\" value=\"20mil\"/>\n<param name=\"rlMinPadBottom\" value=\"6mil\"/>\n<param name=\"rlMaxPadBottom\" value=\"20mil\"/>\n<param name=\"rlMinViaOuter\" value=\"6mil\"/>\n<param name=\"rlMaxViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinViaInner\" value=\"6mil\"/>\n<param name=\"rlMaxViaInner\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaOuter\" value=\"6mil\"/>\n<param name=\"rlMaxMicroViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaInner\" value=\"6mil\"/>\n<param name=\"rlMaxMicroViaInner\" value=\"20mil\"/>\n<param name=\"psTop\" value=\"-1\"/>\n<param name=\"psBottom\" value=\"-1\"/>\n<param name=\"psFirst\" value=\"0\"/>\n<param name=\"psElongationLong\" value=\"100\"/>\n<param name=\"psElongationOffset\" value=\"100\"/>\n<param name=\"mvStopFrame\" value=\"1\"/>\n<param name=\"mvCreamFrame\" value=\"0\"/>\n<param name=\"mlMinStopFrame\" value=\"2mil\"/>\n<param name=\"mlMaxStopFrame\" value=\"2mil\"/>\n<param name=\"mlMinCreamFrame\" value=\"0mil\"/>\n<param name=\"mlMaxCreamFrame\" value=\"0mil\"/>\n<param name=\"mlViaStopLimit\" value=\"25mil\"/>\n<param name=\"srRoundness\" value=\"0\"/>\n<param name=\"srMinRoundness\" value=\"0mil\"/>\n<param name=\"srMaxRoundness\" value=\"0mil\"/>\n<param name=\"slThermalIsolate\" value=\"10mil\"/>\n<param name=\"slThermalsForVias\" value=\"0\"/>\n<param name=\"dpMaxLengthDifference\" value=\"10mm\"/>\n<param name=\"dpGapFactor\" value=\"2.5\"/>\n<param name=\"checkAngle\" value=\"0\"/>\n<param name=\"checkFont\" value=\"1\"/>\n<param name=\"checkRestrict\" value=\"0\"/>\n<param name=\"checkStop\" value=\"0\"/>\n<param name=\"checkValues\" value=\"0\"/>\n<param name=\"checkNames\" value=\"1\"/>\n<param name=\"checkWireStubs\" value=\"1\"/>\n<param name=\"checkPolygonWidth\" value=\"0\"/>\n<param name=\"useDiameter\" value=\"13\"/>\n<param name=\"maxErrors\" value=\"50\"/>\n</designrules>\n<autorouter>\n<pass name=\"Default\">\n<param name=\"RoutingGrid\" value=\"50mil\"/>\n<param name=\"AutoGrid\" value=\"1\"/>\n<param name=\"Efforts\" value=\"0\"/>\n<param name=\"TopRouterVariant\" value=\"1\"/>\n<param name=\"tpViaShape\" value=\"round\"/>\n<param name=\"PrefDir.1\" value=\"a\"/>\n<param name=\"PrefDir.2\" value=\"0\"/>\n<param name=\"PrefDir.3\" value=\"0\"/>\n<param name=\"PrefDir.4\" value=\"0\"/>\n<param name=\"PrefDir.5\" value=\"0\"/>\n<param name=\"PrefDir.6\" value=\"0\"/>\n<param name=\"PrefDir.7\" value=\"0\"/>\n<param name=\"PrefDir.8\" value=\"0\"/>\n<param name=\"PrefDir.9\" value=\"0\"/>\n<param name=\"PrefDir.10\" value=\"0\"/>\n<param name=\"PrefDir.11\" value=\"0\"/>\n<param name=\"PrefDir.12\" value=\"0\"/>\n<param name=\"PrefDir.13\" value=\"0\"/>\n<param name=\"PrefDir.14\" value=\"0\"/>\n<param name=\"PrefDir.15\" value=\"0\"/>\n<param name=\"PrefDir.16\" value=\"a\"/>\n<param name=\"cfVia\" value=\"8\"/>\n<param name=\"cfNonPref\" value=\"5\"/>\n<param name=\"cfChangeDir\" value=\"2\"/>\n<param name=\"cfOrthStep\" value=\"2\"/>\n<param name=\"cfDiagStep\" value=\"3\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"1\"/>\n<param name=\"cfMalusStep\" value=\"1\"/>\n<param name=\"cfPadImpact\" value=\"4\"/>\n<param name=\"cfSmdImpact\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"0\"/>\n<param name=\"cfHugging\" value=\"3\"/>\n<param name=\"cfAvoid\" value=\"4\"/>\n<param name=\"cfPolygon\" value=\"10\"/>\n<param name=\"cfBase.1\" value=\"0\"/>\n<param name=\"cfBase.2\" value=\"1\"/>\n<param name=\"cfBase.3\" value=\"1\"/>\n<param name=\"cfBase.4\" value=\"1\"/>\n<param name=\"cfBase.5\" value=\"1\"/>\n<param name=\"cfBase.6\" value=\"1\"/>\n<param name=\"cfBase.7\" value=\"1\"/>\n<param name=\"cfBase.8\" value=\"1\"/>\n<param name=\"cfBase.9\" value=\"1\"/>\n<param name=\"cfBase.10\" value=\"1\"/>\n<param name=\"cfBase.11\" value=\"1\"/>\n<param name=\"cfBase.12\" value=\"1\"/>\n<param name=\"cfBase.13\" value=\"1\"/>\n<param name=\"cfBase.14\" value=\"1\"/>\n<param name=\"cfBase.15\" value=\"1\"/>\n<param name=\"cfBase.16\" value=\"0\"/>\n<param name=\"mnVias\" value=\"20\"/>\n<param name=\"mnSegments\" value=\"9999\"/>\n<param name=\"mnExtdSteps\" value=\"9999\"/>\n<param name=\"mnRipupLevel\" value=\"10\"/>\n<param name=\"mnRipupSteps\" value=\"100\"/>\n<param name=\"mnRipupTotal\" value=\"100\"/>\n</pass>\n<pass name=\"Follow-me\" refer=\"Default\" active=\"yes\">\n</pass>\n<pass name=\"Busses\" refer=\"Default\" active=\"yes\">\n<param name=\"cfNonPref\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"4\"/>\n<param name=\"cfHugging\" value=\"0\"/>\n<param name=\"mnVias\" value=\"0\"/>\n</pass>\n<pass name=\"Route\" refer=\"Default\" active=\"yes\">\n</pass>\n<pass name=\"Optimize1\" refer=\"Default\" active=\"yes\">\n<param name=\"cfVia\" value=\"99\"/>\n<param name=\"cfExtdStep\" value=\"10\"/>\n<param name=\"cfHugging\" value=\"1\"/>\n<param name=\"mnExtdSteps\" value=\"1\"/>\n<param name=\"mnRipupLevel\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize2\" refer=\"Optimize1\" active=\"yes\">\n<param name=\"cfNonPref\" value=\"0\"/>\n<param name=\"cfChangeDir\" value=\"6\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"2\"/>\n<param name=\"cfMalusStep\" value=\"2\"/>\n<param name=\"cfPadImpact\" value=\"2\"/>\n<param name=\"cfSmdImpact\" value=\"2\"/>\n<param name=\"cfHugging\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize3\" refer=\"Optimize2\" active=\"yes\">\n<param name=\"cfChangeDir\" value=\"8\"/>\n<param name=\"cfPadImpact\" value=\"0\"/>\n<param name=\"cfSmdImpact\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize4\" refer=\"Optimize3\" active=\"yes\">\n<param name=\"cfChangeDir\" value=\"25\"/>\n</pass>\n</autorouter>\n<elements>\n<element name=\"J1\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" package=\"H2-2.54\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\" x=\"25.81\" y=\"-0.99\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" x=\"25.81\" y=\"-0.99\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"J2\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" package=\"H2-2.54\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\" x=\"25.757725\" y=\"10.81\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" x=\"25.757725\" y=\"10.81\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"O7\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" package=\"BU-SMB-V\" package3d_urn=\"urn:adsk.eagle:package:6209/1\" value=\"BU-SMB-V\" x=\"25.0727\" y=\"4.65\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"25.0727\" y=\"4.65\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"\" x=\"25.0727\" y=\"4.65\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"21.5327\" y=\"-1.305\" size=\"0.8128\" layer=\"21\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"25.0727\" y=\"4.65\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"25.0727\" y=\"4.65\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"O6\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" package=\"BU-SMB-V\" package3d_urn=\"urn:adsk.eagle:package:6209/1\" value=\"BU-SMB-V\" x=\"25.120425\" y=\"16.35\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"25.120425\" y=\"16.35\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"\" x=\"25.120425\" y=\"16.35\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"21.480425\" y=\"10.395\" size=\"0.8128\" layer=\"21\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"25.120425\" y=\"16.35\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"25.120425\" y=\"16.35\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"JP1\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"Jp1\" x=\"18\" y=\"10\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"POPULARITY\" value=\"6\" x=\"18\" y=\"10\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"JP2\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"JP2\" x=\"9.7\" y=\"10\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"POPULARITY\" value=\"6\" x=\"9.7\" y=\"10\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"O8\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" package=\"BU-SMB-V\" package3d_urn=\"urn:adsk.eagle:package:6209/1\" value=\"BU-SMB-V\" x=\"-0.9\" y=\"16.3\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"-8.9\" y=\"29.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"\" x=\"-8.9\" y=\"29.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"1.46\" y=\"10.445\" size=\"0.8128\" layer=\"25\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"-8.9\" y=\"29.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"-8.9\" y=\"29.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"O10\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" package=\"BU-SMB-V\" package3d_urn=\"urn:adsk.eagle:package:6209/1\" value=\"BU-SMB-V\" x=\"-0.9\" y=\"4.6\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"-16.9\" y=\"30.6\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"\" x=\"-16.9\" y=\"30.6\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"1.46\" y=\"-1.255\" size=\"0.8128\" layer=\"25\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"-16.9\" y=\"30.6\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"-16.9\" y=\"30.6\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"J3\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" package=\"H2-2.54\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\" x=\"-1.7\" y=\"10.8\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" x=\"11.3\" y=\"36.8\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"J4\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" package=\"H2-2.54\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\" x=\"-1.6\" y=\"-1\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" x=\"18.4\" y=\"14\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n</elements>\n<signals>\n<signal name=\"GND\">\n<polygon width=\"0.4064\" layer=\"16\">\n<vertex x=\"-7\" y=\"22\"/>\n<vertex x=\"31\" y=\"22\"/>\n<vertex x=\"31\" y=\"-4\"/>\n<vertex x=\"-7\" y=\"-4\"/>\n</polygon>\n<contactref element=\"O7\" pad=\"2\"/>\n<contactref element=\"O7\" pad=\"3\"/>\n<contactref element=\"O7\" pad=\"4\"/>\n<contactref element=\"O7\" pad=\"5\"/>\n<contactref element=\"J1\" pad=\"1\"/>\n<contactref element=\"O6\" pad=\"2\"/>\n<contactref element=\"O6\" pad=\"3\"/>\n<contactref element=\"O6\" pad=\"4\"/>\n<contactref element=\"O6\" pad=\"5\"/>\n<contactref element=\"J2\" pad=\"1\"/>\n<contactref element=\"JP1\" pad=\"9\"/>\n<contactref element=\"JP2\" pad=\"9\"/>\n<contactref element=\"O8\" pad=\"3\"/>\n<contactref element=\"O8\" pad=\"4\"/>\n<contactref element=\"O8\" pad=\"5\"/>\n<contactref element=\"O8\" pad=\"2\"/>\n<contactref element=\"J3\" pad=\"1\"/>\n<contactref element=\"J4\" pad=\"1\"/>\n<contactref element=\"O10\" pad=\"3\"/>\n<contactref element=\"O10\" pad=\"4\"/>\n<contactref element=\"O10\" pad=\"5\"/>\n<contactref element=\"O10\" pad=\"2\"/>\n</signal>\n<signal name=\"E101\">\n<contactref element=\"JP1\" pad=\"1\"/>\n<contactref element=\"JP2\" pad=\"1\"/>\n<wire x1=\"9.5\" y1=\"17.5\" x2=\"8.5\" y2=\"18.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"15\" y1=\"17.5\" x2=\"9.5\" y2=\"17.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16\" y1=\"18.5\" x2=\"15\" y2=\"17.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"18.5\" x2=\"16\" y2=\"18.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"8.5\" y1=\"18.5\" x2=\"8.43\" y2=\"18.89\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"18.5\" x2=\"16.73\" y2=\"18.89\" width=\"0.508\" layer=\"16\"/>\n</signal>\n<signal name=\"E102\">\n<contactref element=\"JP1\" pad=\"3\"/>\n<contactref element=\"JP2\" pad=\"3\"/>\n<wire x1=\"9.5\" y1=\"16.5\" x2=\"8.5\" y2=\"16.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"10.5\" y1=\"17.5\" x2=\"9.5\" y2=\"16.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"17.5\" x2=\"10.5\" y2=\"17.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"16.5\" x2=\"15.5\" y2=\"17.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"16.5\" x2=\"8.43\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"16.5\" x2=\"16.73\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"E103\">\n<contactref element=\"JP1\" pad=\"5\"/>\n<contactref element=\"JP2\" pad=\"5\"/>\n<wire x1=\"9.5\" y1=\"13.5\" x2=\"8.5\" y2=\"13.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"10.5\" y1=\"12.5\" x2=\"9.5\" y2=\"13.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15\" y1=\"12.5\" x2=\"10.5\" y2=\"12.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"14\" x2=\"15\" y2=\"12.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"13.5\" x2=\"8.43\" y2=\"13.81\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"14\" x2=\"16.73\" y2=\"13.81\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"E104\">\n<contactref element=\"JP1\" pad=\"7\"/>\n<contactref element=\"JP2\" pad=\"7\"/>\n<wire x1=\"9.5\" y1=\"12.5\" x2=\"8.5\" y2=\"11.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"15\" y1=\"12.5\" x2=\"9.5\" y2=\"12.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16\" y1=\"11.5\" x2=\"15\" y2=\"12.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"11.5\" x2=\"16\" y2=\"11.5\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"8.5\" y1=\"11.5\" x2=\"8.43\" y2=\"11.27\" width=\"0.508\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"11.5\" x2=\"16.73\" y2=\"11.27\" width=\"0.508\" layer=\"16\"/>\n</signal>\n<signal name=\"SCL\">\n<contactref element=\"JP1\" pad=\"11\"/>\n<contactref element=\"JP2\" pad=\"11\"/>\n<wire x1=\"9.5\" y1=\"6.5\" x2=\"8.5\" y2=\"6.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"10.5\" y1=\"7.5\" x2=\"9.5\" y2=\"6.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"7.5\" x2=\"10.5\" y2=\"7.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"6.5\" x2=\"16.5\" y2=\"7.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"6.5\" x2=\"8.43\" y2=\"6.19\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"6.5\" x2=\"16.73\" y2=\"6.19\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"SDA\">\n<contactref element=\"JP1\" pad=\"13\"/>\n<contactref element=\"JP2\" pad=\"13\"/>\n<wire x1=\"9.5\" y1=\"4\" x2=\"8.5\" y2=\"4\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"10.5\" y1=\"5\" x2=\"9.5\" y2=\"4\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15\" y1=\"5\" x2=\"10.5\" y2=\"5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"3.5\" x2=\"15\" y2=\"5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"4\" x2=\"8.43\" y2=\"3.65\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"3.5\" x2=\"16.73\" y2=\"3.65\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"3V3\">\n<contactref element=\"JP1\" pad=\"15\"/>\n<contactref element=\"JP2\" pad=\"15\"/>\n<wire x1=\"9.5\" y1=\"1.5\" x2=\"8.5\" y2=\"1.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"10.5\" y1=\"2.5\" x2=\"9.5\" y2=\"1.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15\" y1=\"2.5\" x2=\"10.5\" y2=\"2.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"1\" x2=\"15\" y2=\"2.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"1.5\" x2=\"8.43\" y2=\"1.11\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"1\" x2=\"16.73\" y2=\"1.11\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"A6\">\n<contactref element=\"JP1\" pad=\"2\"/>\n<contactref element=\"JP2\" pad=\"2\"/>\n<contactref element=\"O6\" pad=\"1\"/>\n<contactref element=\"J2\" pad=\"2\"/>\n<wire x1=\"15.5\" y1=\"18.5\" x2=\"11\" y2=\"18.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"17.5\" x2=\"15.5\" y2=\"18.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"17.5\" x2=\"16.5\" y2=\"17.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"18.5\" x2=\"19\" y2=\"17.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"18.5\" x2=\"10.97\" y2=\"18.89\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"18.5\" x2=\"19.27\" y2=\"18.89\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"11.5\" x2=\"24.5\" y2=\"11\" width=\"1.016\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"16\" x2=\"25\" y2=\"11.5\" width=\"1.016\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"11\" x2=\"24.487725\" y2=\"10.81\" width=\"1.016\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"16\" x2=\"25.120425\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"16.5\" x2=\"19.61\" y2=\"18.89\" width=\"1.016\" layer=\"1\"/>\n<wire x1=\"19.27\" y1=\"18.89\" x2=\"19.61\" y2=\"18.89\" width=\"1.016\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"16.5\" x2=\"22\" y2=\"16.5\" width=\"1.016\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"16.5\" x2=\"25.120425\" y2=\"16.35\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"A7\">\n<contactref element=\"JP1\" pad=\"4\"/>\n<contactref element=\"JP2\" pad=\"4\"/>\n<contactref element=\"O7\" pad=\"1\"/>\n<contactref element=\"J1\" pad=\"2\"/>\n<wire x1=\"12\" y1=\"15\" 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width=\"0.508\" layer=\"1\"/>\n<wire x1=\"1\" y1=\"9\" x2=\"1\" y2=\"10\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-0.5\" y1=\"7.5\" x2=\"1\" y2=\"9\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-0.5\" y1=\"5\" x2=\"-0.5\" y2=\"7.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"10.5\" y1=\"11\" x2=\"10.97\" y2=\"11.27\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"-0.5\" y1=\"5\" x2=\"-0.9\" y2=\"4.6\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"A11\">\n<contactref element=\"JP1\" pad=\"10\"/>\n<contactref element=\"JP2\" pad=\"10\"/>\n<wire x1=\"15.5\" y1=\"9\" x2=\"11\" y2=\"9\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"9.5\" x2=\"15.5\" y2=\"9\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16\" y1=\"10\" x2=\"15.5\" y2=\"9.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"10\" x2=\"16\" y2=\"10\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"9\" x2=\"19\" y2=\"10\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"9\" x2=\"10.97\" y2=\"8.73\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"9\" x2=\"19.27\" y2=\"8.73\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"A12\">\n<contactref element=\"JP1\" pad=\"12\"/>\n<contactref element=\"JP2\" pad=\"12\"/>\n<wire x1=\"15.5\" y1=\"6\" x2=\"11\" y2=\"6\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"5.5\" x2=\"15.5\" y2=\"6\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16\" y1=\"5\" x2=\"15.5\" y2=\"5.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"5\" x2=\"16\" y2=\"5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"6\" x2=\"19\" y2=\"5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"6\" x2=\"10.97\" y2=\"6.19\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"6\" x2=\"19.27\" y2=\"6.19\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"A13\">\n<contactref element=\"JP1\" pad=\"14\"/>\n<contactref element=\"JP2\" pad=\"14\"/>\n<wire x1=\"15.5\" y1=\"3.5\" x2=\"11\" y2=\"3.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"3\" x2=\"15.5\" y2=\"3.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16\" y1=\"2.5\" x2=\"15.5\" y2=\"3\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"2.5\" x2=\"16\" y2=\"2.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"3.5\" x2=\"19\" y2=\"2.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"3.5\" x2=\"10.97\" y2=\"3.65\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"3.5\" x2=\"19.27\" y2=\"3.65\" width=\"0.508\" layer=\"1\"/>\n</signal>\n<signal name=\"A14\">\n<contactref element=\"JP1\" pad=\"16\"/>\n<contactref element=\"JP2\" pad=\"16\"/>\n<wire x1=\"15.5\" y1=\"1\" x2=\"11\" y2=\"1\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"0.5\" x2=\"15.5\" y2=\"1\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"-0.5\" x2=\"15.5\" y2=\"0.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"-0.5\" x2=\"16.5\" y2=\"-0.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"1\" x2=\"19\" y2=\"-0.5\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"1\" x2=\"10.97\" y2=\"1.11\" width=\"0.508\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"1\" x2=\"19.27\" y2=\"1.11\" width=\"0.508\" layer=\"1\"/>\n</signal>\n</signals>\n<mfgpreviewcolors>\n<mfgpreviewcolor name=\"soldermaskcolor\" color=\"0xC8008000\"/>\n<mfgpreviewcolor name=\"silkscreencolor\" color=\"0xFFFEFEFE\"/>\n<mfgpreviewcolor name=\"backgroundcolor\" color=\"0xFF282828\"/>\n<mfgpreviewcolor name=\"coppercolor\" color=\"0xFFFFBF00\"/>\n<mfgpreviewcolor name=\"substratecolor\" color=\"0xFF786E46\"/>\n</mfgpreviewcolors>\n</board>\n</drawing>\n<compatibility>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/haasoscope_triggerout_board.sch",
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name=\"bAdjust\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"133\" name=\"bottom_silk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"134\" name=\"silk_top\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"135\" name=\"silk_bottom\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"136\" name=\"silktop\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"137\" name=\"silkbottom\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"144\" name=\"DrillLegend\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"145\" name=\"DrillLegend_01-16\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"146\" name=\"DrillLegend_01-20\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"150\" name=\"Notes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"151\" name=\"HeatSink\" color=\"14\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"152\" name=\"_bDocu\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"153\" name=\"FabDoc1\" color=\"6\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"154\" name=\"FabDoc2\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"155\" name=\"FabDoc3\" color=\"7\" fill=\"15\" visible=\"no\" active=\"no\"/>\n<layer number=\"166\" name=\"AntennaArea\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"168\" name=\"4mmHeightArea\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"199\" name=\"Contour\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"200\" name=\"200bmp\" color=\"1\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"201\" name=\"201bmp\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"202\" name=\"202bmp\" color=\"3\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"203\" name=\"203bmp\" color=\"4\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"204\" name=\"204bmp\" color=\"5\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"205\" name=\"205bmp\" color=\"6\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"206\" name=\"206bmp\" color=\"7\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"207\" name=\"207bmp\" color=\"15\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"208\" name=\"208bmp\" color=\"9\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"209\" name=\"209bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"210\" name=\"210bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"211\" name=\"211bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"212\" name=\"212bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"213\" name=\"213bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"214\" name=\"214bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"215\" name=\"215bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"216\" name=\"216bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"217\" name=\"217bmp\" color=\"18\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"218\" name=\"218bmp\" color=\"19\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"219\" name=\"219bmp\" color=\"20\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"220\" name=\"220bmp\" color=\"21\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"221\" name=\"221bmp\" color=\"22\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"222\" name=\"222bmp\" color=\"23\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"223\" name=\"223bmp\" color=\"24\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"224\" name=\"224bmp\" color=\"25\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"225\" name=\"225bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"226\" name=\"226bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"227\" name=\"227bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"228\" name=\"228bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"229\" name=\"229bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"230\" name=\"230bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"231\" name=\"Eagle3D_PG1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"232\" name=\"Eagle3D_PG2\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"233\" name=\"Eagle3D_PG3\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"248\" name=\"Housing\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"249\" name=\"Edge\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"250\" name=\"Descript\" color=\"3\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"251\" name=\"SMDround\" color=\"12\" fill=\"11\" visible=\"no\" active=\"no\"/>\n<layer number=\"254\" name=\"OrgLBR\" color=\"13\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"255\" name=\"Accent\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n</layers>\n<schematic xreflabel=\"%F%N/%S.%C%R\" xrefpart=\"/%S.%C%R\">\n<libraries>\n<library name=\"con-coax\" urn=\"urn:adsk.eagle:library:133\">\n<description>&lt;b&gt;Coax Connectors&lt;/b&gt;&lt;p&gt;\nRadiall  and M/A COM.&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"BU-SMB-V\" urn=\"urn:adsk.eagle:footprint:6175/1\" locally_modified=\"yes\" library_version=\"1\" library_locally_modified=\"yes\">\n<description>FEMALE &lt;b&gt;SMB CONNECTOR&lt;/b&gt;&lt;p&gt;\nRadiall&lt;p&gt;\ndistributor RS 112-2993</description>\n<wire x1=\"-3.2\" y1=\"-3.2\" x2=\"3.1999\" y2=\"-3.1999\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.1999\" y1=\"-3.1999\" x2=\"3.2\" y2=\"3.2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.2\" y1=\"3.2\" x2=\"-3.1999\" y2=\"3.1999\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.1999\" y1=\"3.1999\" x2=\"-3.2\" y2=\"-3.2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.2\" y1=\"-0.9\" x2=\"-3.2\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1\" y1=\"3.2\" x2=\"1.1\" y2=\"3.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.2\" y1=\"1\" x2=\"3.2\" y2=\"-0.9\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"-3.2\" x2=\"-1\" y2=\"-3.2\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"1.8001\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.3\" width=\"1.016\" layer=\"51\"/>\n<pad name=\"1\" x=\"0\" y=\"0\" drill=\"1.4\"/>\n<pad name=\"2\" x=\"-2.54\" y=\"2.54\" drill=\"1.4\"/>\n<pad name=\"3\" x=\"2.54\" y=\"2.54\" drill=\"1.4\"/>\n<pad name=\"4\" x=\"2.54\" y=\"-2.54\" drill=\"1.4\"/>\n<pad name=\"5\" x=\"-2.54\" y=\"-2.54\" drill=\"1.4\"/>\n<text x=\"-2.54\" y=\"4.445\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-5.715\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"BU-SMB-V\" urn=\"urn:adsk.eagle:package:6209/1\" locally_modified=\"yes\" type=\"box\" library_version=\"1\" library_locally_modified=\"yes\">\n<description>FEMALE SMB CONNECTOR\nRadiall\ndistributor RS 112-2993</description>\n<packageinstances>\n<packageinstance name=\"BU-SMB-V\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"BNC-FGND\" urn=\"urn:adsk.eagle:symbol:6174/1\" library_version=\"1\">\n<wire x1=\"0\" y1=\"-2.54\" x2=\"-0.762\" y2=\"-1.778\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-0.508\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"0.508\" x2=\"-0.762\" y2=\"0.508\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.762\" y1=\"0.508\" x2=\"-0.508\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"-0.762\" y2=\"-0.508\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.762\" y1=\"-0.508\" x2=\"-2.54\" y2=\"-0.508\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"2.54\" x2=\"0\" y2=\"0.508\" width=\"0.3048\" layer=\"94\" curve=\"-79.611142\" cap=\"flat\"/>\n<wire x1=\"-2.54\" y1=\"-2.54\" x2=\"0\" y2=\"-0.508\" width=\"0.3048\" layer=\"94\" curve=\"79.611142\" cap=\"flat\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<text x=\"-2.54\" y=\"3.302\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<pin name=\"1\" x=\"2.54\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R180\"/>\n<pin name=\"2\" x=\"2.54\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"BU-SMB-V\" urn=\"urn:adsk.eagle:component:6235/1\" locally_modified=\"yes\" prefix=\"X\" library_version=\"1\" library_locally_modified=\"yes\">\n<description>FEMALE &lt;b&gt;SMB CONNECTOR&lt;/b&gt;&lt;p&gt;\nRadiall&lt;p&gt;\ndistributor RS 112-2993</description>\n<gates>\n<gate name=\"G1\" symbol=\"BNC-FGND\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"BU-SMB-V\">\n<connects>\n<connect gate=\"G1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G1\" pin=\"2\" pad=\"2 3 4 5\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-Connector\" urn=\"urn:adsk.eagle:library:478\">\n<packages>\n<package name=\"H2-2.54\" urn=\"urn:adsk.eagle:footprint:33040/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"2.54\" x2=\"1.27\" y2=\"2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"2.54\" x2=\"1.27\" y2=\"-2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-2.54\" x2=\"-1.27\" y2=\"-2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-2.54\" x2=\"-1.27\" y2=\"2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"2.54\" x2=\"1.27\" y2=\"2.54\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"2.54\" x2=\"1.27\" y2=\"-2.54\" width=\"0\" layer=\"39\"/>\n<wire x1=\"-1.27\" y1=\"-2.54\" x2=\"-1.27\" y2=\"2.54\" width=\"0\" layer=\"39\"/>\n<pad name=\"1\" x=\"0\" y=\"1.27\" drill=\"0.889\" diameter=\"1.651\" shape=\"square\"/>\n<pad name=\"2\" x=\"0\" y=\"-1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<text x=\"-1.905\" y=\"-1.905\" size=\"0.889\" layer=\"25\" ratio=\"11\" rot=\"R90\">&gt;NAME</text>\n<text x=\"2.54\" y=\"-2.54\" size=\"0.889\" layer=\"27\" ratio=\"11\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.27\" y1=\"-2.54\" x2=\"1.27\" y2=\"2.54\" layer=\"39\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"H2-2.54\" urn=\"urn:adsk.eagle:package:33132/1\" type=\"box\" library_version=\"1\">\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"HEADER-2P\" urn=\"urn:adsk.eagle:symbol:33039/1\" library_version=\"1\">\n<wire x1=\"-2.54\" y1=\"5.08\" x2=\"2.54\" y2=\"5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"5.08\" x2=\"2.54\" y2=\"-5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-5.08\" x2=\"-2.54\" y2=\"-5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"-5.08\" x2=\"-2.54\" y2=\"5.08\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"6.35\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;name</text>\n<text x=\"1.27\" y=\"6.35\" size=\"1.27\" layer=\"96\" ratio=\"10\">&gt;value</text>\n<pin name=\"1\" x=\"-7.62\" y=\"2.54\" length=\"middle\" function=\"dotclk\" swaplevel=\"1\"/>\n<pin name=\"2\" x=\"-7.62\" y=\"-2.54\" length=\"middle\" swaplevel=\"1\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" urn=\"urn:adsk.eagle:component:33184/1\" prefix=\"J\" uservalue=\"yes\" library_version=\"1\">\n<description>320020016</description>\n<gates>\n<gate name=\"G$1\" symbol=\"HEADER-2P\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"H2-2.54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:33132/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MPN\" value=\"P125-1102A0BS116A1\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"2p-2.54\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"supply1\" urn=\"urn:adsk.eagle:library:371\">\n<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;\n GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;\n Please keep in mind, that these devices are necessary for the\n automatic wiring of the supply signals.&lt;p&gt;\n The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;\n In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;\n &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"GND\" urn=\"urn:adsk.eagle:symbol:26925/1\" library_version=\"1\">\n<wire x1=\"-1.905\" y1=\"0\" x2=\"1.905\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"GND\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R270\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"GND\" urn=\"urn:adsk.eagle:component:26954/1\" prefix=\"GND\" library_version=\"1\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"GND\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"pinhead\" urn=\"urn:adsk.eagle:library:325\">\n<description>&lt;b&gt;Pin Header Connectors&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"2X08\" urn=\"urn:adsk.eagle:footprint:22373/1\" library_version=\"4\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<wire x1=\"-10.16\" y1=\"-1.905\" x2=\"-9.525\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.255\" y1=\"-2.54\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"-1.905\" x2=\"-6.985\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.715\" y1=\"-2.54\" x2=\"-5.08\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"-1.905\" x2=\"-4.445\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"-2.54\" x2=\"-2.54\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"-1.905\" x2=\"-1.905\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.635\" y1=\"-2.54\" x2=\"0\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"-1.905\" x2=\"0.635\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.905\" y1=\"-2.54\" x2=\"2.54\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"-1.905\" x2=\"3.175\" y2=\"-2.54\" width=\"0.1524\" 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layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"10.16\" x2=\"-6.35\" y2=\"-12.7\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"10.795\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-15.24\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"PINHD-2X8\" urn=\"urn:adsk.eagle:component:22549/4\" prefix=\"JP\" uservalue=\"yes\" library_version=\"4\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X8\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X08\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:22481/2\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"POPULARITY\" value=\"6\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X08/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:22488/2\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"POPULARITY\" value=\"0\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.508\" drill=\"0\">\n</class>\n</classes>\n<parts>\n<part name=\"O7\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" deviceset=\"BU-SMB-V\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n<part name=\"O6\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" deviceset=\"BU-SMB-V\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n<part name=\"J1\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" deviceset=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\"/>\n<part name=\"J2\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" deviceset=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\"/>\n<part name=\"GND1\" library=\"supply1\" library_urn=\"urn:adsk.eagle:library:371\" deviceset=\"GND\" device=\"\"/>\n<part name=\"JP1\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"Jp1\"/>\n<part name=\"JP2\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"JP2\"/>\n<part name=\"O8\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" deviceset=\"BU-SMB-V\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n<part name=\"O10\" library=\"con-coax\" library_urn=\"urn:adsk.eagle:library:133\" deviceset=\"BU-SMB-V\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:6209/1\"/>\n<part name=\"J3\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" deviceset=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\"/>\n<part name=\"J4\" library=\"Seeed-Connector\" library_urn=\"urn:adsk.eagle:library:478\" deviceset=\"DIP-BLACK-MALE-HEADER-VERT(2P-2.54)\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:33132/1\" value=\"2p-2.54\"/>\n<part name=\"GND2\" library=\"supply1\" library_urn=\"urn:adsk.eagle:library:371\" deviceset=\"GND\" device=\"\"/>\n</parts>\n<sheets>\n<sheet>\n<plain>\n</plain>\n<instances>\n<instance part=\"O7\" gate=\"G1\" x=\"-2.54\" y=\"88.9\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"-5.08\" y=\"83.82\" size=\"1.778\" layer=\"96\"/>\n<attribute name=\"NAME\" x=\"-5.08\" y=\"92.202\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"O6\" gate=\"G1\" x=\"-2.54\" y=\"76.2\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"-5.08\" y=\"71.12\" size=\"1.778\" layer=\"96\"/>\n<attribute name=\"NAME\" x=\"-5.08\" y=\"79.502\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"J1\" gate=\"G$1\" x=\"-17.78\" y=\"88.9\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-11.43\" y=\"82.55\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"VALUE\" x=\"-19.05\" y=\"82.55\" size=\"1.27\" layer=\"96\" ratio=\"10\" rot=\"R180\"/>\n</instance>\n<instance part=\"J2\" gate=\"G$1\" x=\"-17.78\" y=\"76.2\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-11.43\" y=\"69.85\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"VALUE\" x=\"-19.05\" y=\"69.85\" size=\"1.27\" layer=\"96\" ratio=\"10\" rot=\"R180\"/>\n</instance>\n<instance part=\"GND1\" gate=\"1\" x=\"7.62\" y=\"66.04\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"5.08\" y=\"63.5\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"JP1\" gate=\"A\" x=\"30.48\" y=\"78.74\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"24.13\" y=\"89.535\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.13\" y=\"63.5\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"JP2\" gate=\"A\" x=\"30.48\" y=\"45.72\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"24.13\" y=\"56.515\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.13\" y=\"30.48\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"O8\" gate=\"G1\" x=\"-2.54\" y=\"55.88\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"-5.08\" y=\"50.8\" size=\"1.778\" layer=\"96\"/>\n<attribute name=\"NAME\" x=\"-5.08\" y=\"59.182\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"O10\" gate=\"G1\" x=\"-2.54\" y=\"43.18\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"-5.08\" y=\"38.1\" size=\"1.778\" layer=\"96\"/>\n<attribute name=\"NAME\" x=\"-5.08\" y=\"46.482\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"J3\" gate=\"G$1\" x=\"-17.78\" y=\"55.88\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-11.43\" y=\"49.53\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"VALUE\" x=\"-19.05\" y=\"49.53\" size=\"1.27\" layer=\"96\" ratio=\"10\" rot=\"R180\"/>\n</instance>\n<instance part=\"J4\" gate=\"G$1\" x=\"-17.78\" y=\"43.18\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-11.43\" y=\"36.83\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"VALUE\" x=\"-19.05\" y=\"36.83\" size=\"1.27\" layer=\"96\" ratio=\"10\" rot=\"R180\"/>\n</instance>\n<instance part=\"GND2\" gate=\"1\" x=\"7.62\" y=\"33.02\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"5.08\" y=\"30.48\" size=\"1.778\" layer=\"96\"/>\n</instance>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"GND\" class=\"0\">\n<segment>\n<pinref part=\"O7\" gate=\"G1\" pin=\"2\"/>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-10.16\" y1=\"86.36\" x2=\"0\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"0\" y=\"86.36\"/>\n<wire x1=\"0\" y1=\"86.36\" x2=\"7.62\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"68.58\" x2=\"7.62\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND1\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"O6\" gate=\"G1\" pin=\"2\"/>\n<wire x1=\"7.62\" y1=\"73.66\" x2=\"7.62\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"73.66\" x2=\"-10.16\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"73.66\" x2=\"7.62\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"0\" y=\"73.66\"/>\n<junction x=\"7.62\" y=\"73.66\"/>\n</segment>\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"27.94\" y1=\"76.2\" x2=\"17.78\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"76.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"27.94\" y1=\"43.18\" x2=\"17.78\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"O8\" gate=\"G1\" pin=\"2\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-10.16\" y1=\"53.34\" x2=\"0\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"0\" y=\"53.34\"/>\n<wire x1=\"0\" y1=\"53.34\" x2=\"7.62\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"35.56\" x2=\"7.62\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND2\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"O10\" gate=\"G1\" pin=\"2\"/>\n<wire x1=\"7.62\" y1=\"40.64\" x2=\"7.62\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"40.64\" x2=\"-10.16\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"40.64\" x2=\"7.62\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"0\" y=\"40.64\"/>\n<junction x=\"7.62\" y=\"40.64\"/>\n</segment>\n</net>\n<net name=\"E101\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"27.94\" y1=\"86.36\" x2=\"17.78\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"86.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"27.94\" y1=\"53.34\" x2=\"17.78\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E102\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"27.94\" y1=\"83.82\" x2=\"17.78\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"83.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"27.94\" y1=\"50.8\" x2=\"17.78\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"50.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E103\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"27.94\" y1=\"81.28\" x2=\"17.78\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"81.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"27.94\" y1=\"48.26\" x2=\"17.78\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E104\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"27.94\" y1=\"78.74\" x2=\"17.78\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"78.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"27.94\" y1=\"45.72\" x2=\"17.78\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SCL\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"27.94\" y1=\"73.66\" x2=\"17.78\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"73.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"27.94\" y1=\"40.64\" x2=\"17.78\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"40.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SDA\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"27.94\" y1=\"71.12\" x2=\"17.78\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"71.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"27.94\" y1=\"38.1\" x2=\"17.78\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"3V3\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"27.94\" y1=\"68.58\" x2=\"17.78\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"68.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"27.94\" y1=\"35.56\" x2=\"17.78\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"17.78\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A6\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"2\"/>\n<wire x1=\"35.56\" y1=\"86.36\" x2=\"45.72\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"86.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"2\"/>\n<wire x1=\"35.56\" y1=\"53.34\" x2=\"45.72\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"O6\" gate=\"G1\" pin=\"1\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"0\" y1=\"76.2\" x2=\"0\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"78.74\" x2=\"-10.16\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"0\" y=\"78.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A7\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"4\"/>\n<wire x1=\"35.56\" y1=\"83.82\" x2=\"45.72\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"83.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"4\"/>\n<wire x1=\"35.56\" y1=\"50.8\" x2=\"45.72\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"50.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"O7\" gate=\"G1\" pin=\"1\"/>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"0\" y1=\"88.9\" x2=\"0\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"91.44\" x2=\"-10.16\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"0\" y=\"91.44\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A8\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"6\"/>\n<wire x1=\"35.56\" y1=\"81.28\" x2=\"45.72\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"81.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"6\"/>\n<wire x1=\"35.56\" y1=\"48.26\" x2=\"45.72\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"O8\" gate=\"G1\" pin=\"1\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"0\" y1=\"55.88\" x2=\"0\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"58.42\" x2=\"-10.16\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"0\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A10\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"35.56\" y1=\"78.74\" x2=\"45.72\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"78.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"35.56\" y1=\"45.72\" x2=\"45.72\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"O10\" gate=\"G1\" pin=\"1\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"0\" y1=\"43.18\" x2=\"0\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"0\" y1=\"45.72\" x2=\"-10.16\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"0\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A11\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"10\"/>\n<wire x1=\"35.56\" y1=\"76.2\" x2=\"45.72\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"76.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"10\"/>\n<wire x1=\"35.56\" y1=\"43.18\" x2=\"45.72\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A12\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"35.56\" y1=\"73.66\" x2=\"45.72\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"73.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"35.56\" y1=\"40.64\" x2=\"45.72\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"40.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A13\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"14\"/>\n<wire x1=\"35.56\" y1=\"71.12\" x2=\"45.72\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"71.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"14\"/>\n<wire x1=\"35.56\" y1=\"38.1\" x2=\"45.72\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A14\" class=\"0\">\n<segment>\n<pinref part=\"JP1\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"35.56\" y1=\"68.58\" x2=\"45.72\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"68.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"JP2\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"35.56\" y1=\"35.56\" x2=\"45.72\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"43.18\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n</sheets>\n</schematic>\n</drawing>\n<compatibility>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/jlcpcb2layer.dru",
    "content": "description[en] = <b>JLCPCB Design Rules - 2layer</b>\\n<p>\\nPlease make sure your boards conform to these design rules.\\n</p>\nlayerSetup = (1*16)\nmtCopper = 0.035559375mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.035559375mm\nmtIsolate = 1.6mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm\nmdWireWire = 5mil\nmdWirePad = 5mil\nmdWireVia = 5mil\nmdPadPad = 5mil\nmdPadVia = 5mil\nmdViaVia = 5mil\nmdSmdPad = 5mil\nmdSmdVia = 5mil\nmdSmdSmd = 5mil\nmdViaViaSameLayer = 8mil\nmnLayersViaInSmd = 2\nmdCopperDimension = 8mil\nmdDrill = 6mil\nmdSmdStop = 0mil\nmsWidth = 5mil\nmsDrill = 12mil\nmsMicroVia = 12mil\nmsBlindViaRatio = 0.500000\nrvPadTop = 0.250000\nrvPadInner = 0.250000\nrvPadBottom = 0.250000\nrvViaOuter = 0.250000\nrvViaInner = 0.250000\nrvMicroViaOuter = 0.250000\nrvMicroViaInner = 0.250000\nrlMinPadTop = 5mil\nrlMaxPadTop = 20mil\nrlMinPadInner = 5mil\nrlMaxPadInner = 20mil\nrlMinPadBottom = 5mil\nrlMaxPadBottom = 20mil\nrlMinViaOuter = 3mil\nrlMaxViaOuter = 20mil\nrlMinViaInner = 3mil\nrlMaxViaInner = 20mil\nrlMinMicroViaOuter = 3mil\nrlMaxMicroViaOuter = 20mil\nrlMinMicroViaInner = 3mil\nrlMaxMicroViaInner = 20mil\npsTop = -1\npsBottom = -1\npsFirst = -1\npsElongationLong = 100\npsElongationOffset = 100\nmvStopFrame = 1.000000\nmvCreamFrame = 0.000000\nmlMinStopFrame = 2.5mil\nmlMaxStopFrame = 2.5mil\nmlMinCreamFrame = 0mil\nmlMaxCreamFrame = 0mil\nmlViaStopLimit = 0mil\nsrRoundness = 0.000000\nsrMinRoundness = 0mil\nsrMaxRoundness = 0mil\nslThermalIsolate = 10mil\nslThermalsForVias = 0\ndpMaxLengthDifference = 10mm\ndpGapFactor = 2.500000\ncheckAngle = 0\ncheckFont = 1\ncheckRestrict = 1\ncheckStop = 0\ncheckValues = 0\ncheckNames = 1\ncheckWireStubs = 1\ncheckPolygonWidth = 0\nuseDiameter = 13\nmaxErrors = 50\n"
  },
  {
    "path": "eagle/jlcpcb4layer.dru",
    "content": "description[en] = <b>JLCPCB Design Rules - 4layer</b>\\n<p>\\nPlease make sure your boards conform to these design rules.\\n</p>\nlayerSetup = (1+2*15+16)\nmtCopper = 0.035559375mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.035559375mm\nmtIsolate = 0.6mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.6mm\nmdWireWire = 5mil\nmdWirePad = 5mil\nmdWireVia = 5mil\nmdPadPad = 5mil\nmdPadVia = 5mil\nmdViaVia = 5mil\nmdSmdPad = 5mil\nmdSmdVia = 5mil\nmdSmdSmd = 5mil\nmdViaViaSameLayer = 8mil\nmnLayersViaInSmd = 2\nmdCopperDimension = 8mil\nmdDrill = 6mil\nmdSmdStop = 0mil\nmsWidth = 5mil\nmsDrill = 12mil\nmsMicroVia = 12mil\nmsBlindViaRatio = 0.500000\nrvPadTop = 0.250000\nrvPadInner = 0.250000\nrvPadBottom = 0.250000\nrvViaOuter = 0.250000\nrvViaInner = 0.250000\nrvMicroViaOuter = 0.250000\nrvMicroViaInner = 0.250000\nrlMinPadTop = 5mil\nrlMaxPadTop = 20mil\nrlMinPadInner = 5mil\nrlMaxPadInner = 20mil\nrlMinPadBottom = 5mil\nrlMaxPadBottom = 20mil\nrlMinViaOuter = 3mil\nrlMaxViaOuter = 20mil\nrlMinViaInner = 3mil\nrlMaxViaInner = 20mil\nrlMinMicroViaOuter = 3mil\nrlMaxMicroViaOuter = 20mil\nrlMinMicroViaInner = 3mil\nrlMaxMicroViaInner = 20mil\npsTop = -1\npsBottom = -1\npsFirst = -1\npsElongationLong = 100\npsElongationOffset = 100\nmvStopFrame = 1.000000\nmvCreamFrame = 0.000000\nmlMinStopFrame = 2.5mil\nmlMaxStopFrame = 2.5mil\nmlMinCreamFrame = 0mil\nmlMaxCreamFrame = 0mil\nmlViaStopLimit = 0mil\nsrRoundness = 0.000000\nsrMinRoundness = 0mil\nsrMaxRoundness = 0mil\nslThermalIsolate = 10mil\nslThermalsForVias = 0\ndpMaxLengthDifference = 10mm\ndpGapFactor = 2.500000\ncheckAngle = 0\ncheckFont = 1\ncheckRestrict = 1\ncheckStop = 0\ncheckValues = 0\ncheckNames = 1\ncheckWireStubs = 1\ncheckPolygonWidth = 0\nuseDiameter = 13\nmaxErrors = 50\n"
  },
  {
    "path": "eagle/jlcpcb6layer.dru",
    "content": "description[en] = <b>JLCPCB Design Rules - 6layer</b>\\n<p>\\nPlease make sure your boards conform to these design rules.\\n</p>\nlayerSetup = (1+2*3+4*15+16)\nmtCopper = 0.035559375mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.035559375mm\nmtIsolate = 0.6mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.6mm\nmdWireWire = 5mil\nmdWirePad = 5mil\nmdWireVia = 5mil\nmdPadPad = 5mil\nmdPadVia = 5mil\nmdViaVia = 5mil\nmdSmdPad = 5mil\nmdSmdVia = 5mil\nmdSmdSmd = 5mil\nmdViaViaSameLayer = 8mil\nmnLayersViaInSmd = 2\nmdCopperDimension = 8mil\nmdDrill = 6mil\nmdSmdStop = 0mil\nmsWidth = 5mil\nmsDrill = 12mil\nmsMicroVia = 12mil\nmsBlindViaRatio = 0.500000\nrvPadTop = 0.250000\nrvPadInner = 0.250000\nrvPadBottom = 0.250000\nrvViaOuter = 0.250000\nrvViaInner = 0.250000\nrvMicroViaOuter = 0.250000\nrvMicroViaInner = 0.250000\nrlMinPadTop = 5mil\nrlMaxPadTop = 20mil\nrlMinPadInner = 5mil\nrlMaxPadInner = 20mil\nrlMinPadBottom = 5mil\nrlMaxPadBottom = 20mil\nrlMinViaOuter = 3mil\nrlMaxViaOuter = 20mil\nrlMinViaInner = 3mil\nrlMaxViaInner = 20mil\nrlMinMicroViaOuter = 3mil\nrlMaxMicroViaOuter = 20mil\nrlMinMicroViaInner = 3mil\nrlMaxMicroViaInner = 20mil\npsTop = -1\npsBottom = -1\npsFirst = -1\npsElongationLong = 100\npsElongationOffset = 100\nmvStopFrame = 1.000000\nmvCreamFrame = 0.000000\nmlMinStopFrame = 2.5mil\nmlMaxStopFrame = 2.5mil\nmlMinCreamFrame = 0mil\nmlMaxCreamFrame = 0mil\nmlViaStopLimit = 0mil\nsrRoundness = 0.000000\nsrMinRoundness = 0mil\nsrMaxRoundness = 0mil\nslThermalIsolate = 10mil\nslThermalsForVias = 0\ndpMaxLengthDifference = 10mm\ndpGapFactor = 2.500000\ncheckAngle = 0\ncheckFont = 1\ncheckRestrict = 1\ncheckStop = 0\ncheckValues = 0\ncheckNames = 1\ncheckWireStubs = 1\ncheckPolygonWidth = 0\nuseDiameter = 13\nmaxErrors = 50\n"
  },
  {
    "path": "eagle/jlcpcb_2_layer_v9.cam",
    "content": "{\n    \"author\": {\n        \"email\": \"support@jlcpcb.com\",\n        \"name\": \"JLCPCB\"\n    },\n    \"description\": {\n        \"EN\": \"<b>JLCPCB 2-Layer CAM job</b><p>\\n\\nFor Eagle 8.6.0 to 9.6.2<p>\\n\\nTop Copper:      pcbname.GTL<br>\\nTop Solder Mask: pcbname.GTS<br>\\nTop Silkscreen:  pcbname.GTO<br>\\nTop Paste:       pcbname.GTP<p>\\n\\nBottom Copper:      pcbname.GBL<br>\\nBottom Solder Mask: pcbname.GBS<br>\\nBottom Silkscreen:  pcbname.GBO<br>\\nBottom Paste:       pcbname.GBP<p>\\n\\nProfile: pcbname.GKO (Dimension (20) and Milling (46) layers are used)<p>\\nDrill Layer: pcbname.XLN (Both plated and non-plated holes are merged in this file)<p>\\n\\nPlease refer to <a href=\\\"https://support.jlcpcb.com/article/43-how-to-export-eagle-pcb-to-gerber-files\\\">How to Generate Gerber and Drill Files from Eagle</a> for more information.<p>\\n\\nEmail: support@jlcpcb.com<p>\\nLast updated: 2020/11/18\"\n    },\n    \"output_type\": \"zip\",\n    \"outputs\": [\n        {\n            \"filename_prefix\": \"GerberJob\",\n            \"format_specifier\": {\n                \"decimal\": 4,\n                \"integer\": 3\n            },\n            \"generate_job_file\": true,\n            \"output_type\": \"gerber\",\n            \"outputs\": [\n                {\n                    \"board_outline\": true,\n                    \"config\": {\n                        \"file_function\": \"Profile\",\n                        \"plating\": \"non-plated\"\n                    },\n                    \"filename_format\": \"%N.GKO\",\n                    \"layers\": [\n                        46,\n                        20\n                    ],\n                    \"milling\": true,\n                    \"name\": \"Board Outline\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 1,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N.GTL\",\n                    \"layers\": [\n                        1,\n                        18,\n                        17\n                    ],\n                    \"name\": \"Top Copper\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 2,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N.GBL\",\n                    \"layers\": [\n                        16,\n                        17,\n                        18\n                    ],\n                    \"name\": \"Bottom Copper\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Soldermask\",\n                        \"index\": 1,\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N.GTS\",\n                    \"layers\": [\n                        29\n                    ],\n                    \"name\": \"Soldermask Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Soldermask\",\n                        \"index\": 1,\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N.GBS\",\n                    \"layers\": [\n                        30\n                    ],\n                    \"name\": \"Soldermask Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Paste\",\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N.GTP\",\n                    \"layers\": [\n                        31\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Solderpaste Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Paste\",\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N.GBP\",\n                    \"layers\": [\n                        32\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Solderpaste Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Legend\",\n                        \"index\": 1,\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N.GTO\",\n                    \"layers\": [\n                        21,\n                        25\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Silkscreen Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Legend\",\n                        \"index\": 1,\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N.GBO\",\n                    \"layers\": [\n                        22,\n                        26\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Silkscreen Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                }\n            ],\n            \"version\": \"RS274X\"\n        },\n        {\n            \"filename_prefix\": \"\",\n            \"format_specifier\": {\n                \"decimal\": 3,\n                \"integer\": 3\n            },\n            \"output_type\": \"drill\",\n            \"outputs\": [\n                {\n                    \"drills\": {\n                        \"NPTH\": true,\n                        \"PTH\": true,\n                        \"VIA\": true\n                    },\n                    \"filename_format\": \"%N.XLN\",\n                    \"layers\": {\n                        \"from\": 1,\n                        \"to\": 16\n                    },\n                    \"name\": \"Excellon\",\n                    \"type\": \"excellon\"\n                }\n            ]\n        },\n        {\n            \"filename_prefix\": \"CAMOutputs/Assembly\",\n            \"output_type\": \"assembly\",\n            \"outputs\": [\n            ]\n        },\n        {\n            \"filename_prefix\": \"CAMOutputs/DrawingFiles\",\n            \"output_type\": \"drawing\",\n            \"outputs\": [\n            ]\n        }\n    ],\n    \"timestamp\": \"2020-11-12T14:32:05\",\n    \"type\": \"EAGLE CAM job\",\n    \"units\": \"metric\",\n    \"version\": \"9.2.0\"\n}\n"
  },
  {
    "path": "eagle/jlcpcb_4_layer_v9.cam",
    "content": "{\n    \"author\": {\n        \"email\": \"support@jlcpcb.com\",\n        \"name\": \"JLCPCB\"\n    },\n    \"description\": {\n        \"EN\": \"<b>JLCPCB 4-Layer CAM job</b><p>\\n\\nFor Eagle 8.6.0 to 9.6.2<p>\\n\\nTop Copper:           pcbname_copper_l1.GTL<br>\\nInner Copper Layer 1: pcbname_copper_l2.G1<br>\\nInner Copper Layer 2: pcbname_copper_l3.G2<br>\\nBottom Copper:        pcbname_copper_l4.GBL<p>\\n\\nDrill File: pcbname_drill.XLN (Both plated and non-plated holes are merged into this file)<p>\\n\\nSilkscreen Bottom: pcbname_Legend_Bot.GBO<br>\\nSilkscreen Top:    pcbname_Legend_Top.GTO<br>\\nPaste Bottom:      pcbname_Paste_Bot.GBP<br>\\nPaste Top:         pcbname_Paste_Top.GTP<p>\\n\\nBoard Outline: pcbname_Profile_NP.GKO (Includes Dimension (20) and Milling (46) layers)<p>\\n\\nSoldermask Bottom: pcbname_Soldermask_Bot.GBS<br>\\nSoldermask Top:    pcbname_Soldermask_Top.GTS<p>\\n\\nPlease refer to <a href=\\\"https://support.jlcpcb.com/article/43-how-to-export-eagle-pcb-to-gerber-files\\\">How to Generate Gerber and Drill Files from Eagle</a> for more information.<p>\\n\\nEmail: support@jlcpcb.com<p>\\nLast updated: 2020/11/18\"\n    },\n    \"output_type\": \"zip\",\n    \"outputs\": [\n        {\n            \"filename_prefix\": \"GerberJob\",\n            \"format_specifier\": {\n                \"decimal\": 4,\n                \"integer\": 3\n            },\n            \"generate_job_file\": true,\n            \"output_type\": \"gerber\",\n            \"outputs\": [\n                {\n                    \"board_outline\": true,\n                    \"config\": {\n                        \"file_function\": \"Profile\",\n                        \"plating\": \"non-plated\"\n                    },\n                    \"filename_format\": \"%N_%FF.GKO\",\n                    \"layers\": [\n                        46,\n                        20\n                    ],\n                    \"milling\": true,\n                    \"name\": \"Board Outline\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 1,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N_%FF.GTL\",\n                    \"layers\": [\n                        1,\n                        18,\n                        17\n                    ],\n                    \"name\": \"Top Copper\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 2,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"Inner\"\n                    },\n                    \"filename_format\": \"%N_%FF.G1\",\n                    \"layers\": [\n                        2,\n                        17,\n                        18\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Inner Copper Layer 1\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 3,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"Inner\"\n                    },\n                    \"filename_format\": \"%N_%FF.G2\",\n                    \"layers\": [\n                        15,\n                        17,\n                        18\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Inner Copper Layer 2\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 4,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N_%FF.GBL\",\n                    \"layers\": [\n                        16,\n                        17,\n                        18\n                    ],\n                    \"name\": \"Bottom Copper\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Soldermask\",\n                        \"index\": 1,\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N_%FF.GTS\",\n                    \"layers\": [\n                        29\n                    ],\n                    \"name\": \"Soldermask Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Soldermask\",\n                        \"index\": 1,\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N_%FF.GBS\",\n                    \"layers\": [\n                        30\n                    ],\n                    \"name\": \"Soldermask Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Paste\",\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N_%FF.GTP\",\n                    \"layers\": [\n                        31\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Solderpaste Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Paste\",\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N_%FF.GBP\",\n                    \"layers\": [\n                        32\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Solderpaste Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Legend\",\n                        \"index\": 1,\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N_%FF.GTO\",\n                    \"layers\": [\n                        21,\n                        25\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Silkscreen Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Legend\",\n                        \"index\": 1,\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N_%FF.GBO\",\n                    \"layers\": [\n                        22,\n                        26\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Silkscreen Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                }\n            ],\n            \"version\": \"RS274X\"\n        },\n        {\n            \"filename_prefix\": \"\",\n            \"format_specifier\": {\n                \"decimal\": 3,\n                \"integer\": 3\n            },\n            \"output_type\": \"drill\",\n            \"outputs\": [\n                {\n                    \"drills\": {\n                        \"NPTH\": true,\n                        \"PTH\": true,\n                        \"VIA\": true\n                    },\n                    \"filename_format\": \"%N_drill.XLN\",\n                    \"layers\": {\n                        \"from\": 1,\n                        \"to\": 16\n                    },\n                    \"name\": \"Drill File\",\n                    \"type\": \"excellon\"\n                }\n            ]\n        },\n        {\n            \"filename_prefix\": \"CAMOutputs/Assembly\",\n            \"output_type\": \"assembly\",\n            \"outputs\": [\n            ]\n        },\n        {\n            \"filename_prefix\": \"CAMOutputs/DrawingFiles\",\n            \"output_type\": \"drawing\",\n            \"outputs\": [\n            ]\n        }\n    ],\n    \"timestamp\": \"2020-11-18T10:32:27\",\n    \"type\": \"EAGLE CAM job\",\n    \"units\": \"metric\",\n    \"version\": \"9.2.0\"\n}\n"
  },
  {
    "path": "eagle/jlcpcb_6_layer_v9.cam",
    "content": "{\n    \"author\": {\n        \"email\": \"support@jlcpcb.com\",\n        \"name\": \"JLCPCB\"\n    },\n    \"description\": {\n        \"EN\": \"<b>JLCPCB 6-Layer CAM job</b><p>\\n\\nFor Eagle 8.6.0 to 9.6.2<p>\\n\\nTop Copper:           pcbname_copper_l1.GTL<br>\\nInner Copper Layer 1: pcbname_copper_l2.G1<br>\\nInner Copper Layer 2: pcbname_copper_l3.G2<br>\\nInner Copper Layer 3: pcbname_copper_l4.G3<br>\\nInner Copper Layer 4: pcbname_copper_l5.G4<br>\\nBottom Copper:        pcbname_copper_l6.GBL<p>\\n\\nDrill File: pcbname_drill.XLN (Both plated and non-plated holes are merged into this file)<p>\\n\\nSilkscreen Bottom: pcbname_Legend_Bot.GBO<br>\\nSilkscreen Top:    pcbname_Legend_Top.GTO<br>\\nPaste Bottom:      pcbname_Paste_Bot.GBP<br>\\nPaste Top:         pcbname_Paste_Top.GTP<p>\\n\\nBoard Outline: pcbname_Profile_NP.GKO (Includes Dimension (20) and Milling (46) layers)<p>\\n\\nSoldermask Bottom: pcbname_Soldermask_Bot.GBS<br>\\nSoldermask Top:    pcbname_Soldermask_Top.GTS<p>\\n\\nPlease refer to <a href=\\\"https://support.jlcpcb.com/article/43-how-to-export-eagle-pcb-to-gerber-files\\\">How to Generate Gerber and Drill Files from Eagle</a> for more information.<p>\\n\\nEmail: support@jlcpcb.com<p>\\nLast updated: 2020/11/18\"\n    },\n    \"output_type\": \"zip\",\n    \"outputs\": [\n        {\n            \"filename_prefix\": \"GerberJob\",\n            \"format_specifier\": {\n                \"decimal\": 4,\n                \"integer\": 3\n            },\n            \"generate_job_file\": true,\n            \"output_type\": \"gerber\",\n            \"outputs\": [\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": true,\n                    \"config\": {\n                        \"file_function\": \"Profile\",\n                        \"plating\": \"non-plated\"\n                    },\n                    \"filename_format\": \"%N_%FF.GKO\",\n                    \"layers\": [\n                        20,\n                        46\n                    ],\n                    \"milling\": true,\n                    \"name\": \"Board Outline\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 1,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N_%FF.GTL\",\n                    \"layers\": [\n                        1,\n                        17,\n                        18\n                    ],\n                    \"name\": \"Top Copper\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 2,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"Inner\"\n                    },\n                    \"filename_format\": \"%N_%FF.G1\",\n                    \"layers\": [\n                        2,\n                        17,\n                        18\n                    ],\n                    \"name\": \"Inner Copper Layer 1\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 3,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"Inner\"\n                    },\n                    \"filename_format\": \"%N_%FF.G2\",\n                    \"layers\": [\n                        3,\n                        17,\n                        18\n                    ],\n                    \"name\": \"Inner Copper Layer 2\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 4,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"Inner\"\n                    },\n                    \"filename_format\": \"%N_%FF.G3\",\n                    \"layers\": [\n                        14,\n                        17,\n                        18\n                    ],\n                    \"name\": \"Inner Copper Layer 3\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 5,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"Inner\"\n                    },\n                    \"filename_format\": \"%N_%FF.G4\",\n                    \"layers\": [\n                        15,\n                        17,\n                        18\n                    ],\n                    \"name\": \"Inner Copper Layer 4\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Copper\",\n                        \"layer\": 6,\n                        \"layer_details\": \"mixed\",\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N_%FF.GBL\",\n                    \"layers\": [\n                        16,\n                        17,\n                        18\n                    ],\n                    \"name\": \"Bottom Copper\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Soldermask\",\n                        \"index\": 1,\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N_%FF.GTS\",\n                    \"layers\": [\n                        29\n                    ],\n                    \"name\": \"Soldermask Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Soldermask\",\n                        \"index\": 1,\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N_%FF.GBS\",\n                    \"layers\": [\n                        30\n                    ],\n                    \"name\": \"Soldermask Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Paste\",\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N_%FF.GTP\",\n                    \"layers\": [\n                        31\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Solderpaste Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Paste\",\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N_%FF.GBP\",\n                    \"layers\": [\n                        32\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Solderpaste Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Legend\",\n                        \"index\": 1,\n                        \"layer_type\": \"top\"\n                    },\n                    \"filename_format\": \"%N_%FF.GTO\",\n                    \"layers\": [\n                        21,\n                        25\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Silkscreen Top\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                },\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"board_outline\": false,\n                    \"config\": {\n                        \"file_function\": \"Legend\",\n                        \"index\": 1,\n                        \"layer_type\": \"bottom\"\n                    },\n                    \"filename_format\": \"%N_%FF.GBO\",\n                    \"layers\": [\n                        22,\n                        26\n                    ],\n                    \"milling\": false,\n                    \"name\": \"Silkscreen Bottom\",\n                    \"polarity\": \"positive\",\n                    \"type\": \"gerber_layer\"\n                }\n            ],\n            \"version\": \"RS274X\"\n        },\n        {\n            \"filename_prefix\": \"\",\n            \"format_specifier\": {\n                \"decimal\": 3,\n                \"integer\": 3\n            },\n            \"output_type\": \"drill\",\n            \"outputs\": [\n                {\n                    \"advanced_options\": {\n                        \"mirror\": false,\n                        \"offset_x\": 0,\n                        \"offset_y\": 0,\n                        \"rotate\": false,\n                        \"upside_down\": false\n                    },\n                    \"filename_format\": \"%N_drill.XLN\",\n                    \"name\": \"Drill File\",\n                    \"type\": \"autodrills\"\n                }\n            ]\n        },\n        {\n            \"filename_prefix\": \"CAMOutputs/Assembly\",\n            \"output_type\": \"assembly\",\n            \"outputs\": [\n            ]\n        },\n        {\n            \"filename_prefix\": \"CAMOutputs/DrawingFiles\",\n            \"output_type\": \"drawing\",\n            \"outputs\": [\n            ]\n        }\n    ],\n    \"timestamp\": \"2020-11-18T10:22:44\",\n    \"type\": \"EAGLE CAM job\",\n    \"units\": \"metric\",\n    \"version\": \"9.2.0\"\n}\n"
  },
  {
    "path": "eagle/lbr/HaasMaxADC.lbr",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"8.4.3\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting keepoldvectorfont=\"yes\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"50\" unitdist=\"mil\" unit=\"mil\" style=\"lines\" multiple=\"1\" display=\"no\" altdistance=\"5\" altunitdist=\"mil\" altunit=\"mil\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"39\" name=\"tKeepout\" color=\"4\" fill=\"11\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"40\" name=\"bKeepout\" color=\"1\" fill=\"11\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"41\" name=\"tRestrict\" color=\"4\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"42\" name=\"bRestrict\" color=\"1\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"43\" name=\"vRestrict\" color=\"2\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"44\" name=\"Drills\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"45\" name=\"Holes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"46\" name=\"Milling\" color=\"3\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"47\" name=\"Measures\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"48\" name=\"Document\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"49\" name=\"Reference\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"51\" name=\"tDocu\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"52\" name=\"bDocu\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"90\" name=\"Modules\" color=\"5\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"91\" name=\"Nets\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"92\" name=\"Busses\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"93\" name=\"Pins\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"94\" name=\"Symbols\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"95\" name=\"Names\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"96\" name=\"Values\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"97\" name=\"Info\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"98\" name=\"Guide\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n</layers>\n<library>\n<description>Haas library for Maxim ADC IC's</description>\n<packages>\n<package name=\"TQFP-48\">\n<description>48 TQFN-EP Package  IPC7351</description>\n<wire x1=\"-4.2\" y1=\"4.2\" x2=\"-4.2\" y2=\"-4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"-4.2\" y1=\"-4.2\" x2=\"4.2\" y2=\"-4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"4.2\" y1=\"-4.2\" x2=\"4.2\" y2=\"4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"4.2\" y1=\"4.2\" x2=\"-4.2\" y2=\"4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"-2.75\" y1=\"2.75\" x2=\"-2.75\" y2=\"-2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-2.75\" y1=\"-2.75\" x2=\"2.75\" y2=\"-2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"2.75\" y1=\"-2.75\" x2=\"2.75\" y2=\"2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"2.75\" y1=\"2.75\" x2=\"-2.75\" y2=\"2.75\" width=\"0.254\" layer=\"21\"/>\n<circle x=\"-2.25\" y=\"2.25\" radius=\"0.354\" width=\"0\" layer=\"21\"/>\n<smd name=\"1\" x=\"-3.5\" y=\"2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"-3.5\" y=\"2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"3\" x=\"-3.5\" y=\"1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"4\" x=\"-3.5\" y=\"1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"5\" x=\"-3.5\" y=\"0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"6\" x=\"-3.5\" y=\"0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"7\" x=\"-3.5\" y=\"-0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"8\" x=\"-3.5\" y=\"-0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"9\" x=\"-3.5\" y=\"-1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"10\" x=\"-3.5\" y=\"-1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"11\" x=\"-3.5\" y=\"-2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"12\" x=\"-3.5\" y=\"-2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"13\" x=\"-2.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"14\" x=\"-2.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"15\" x=\"-1.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"16\" x=\"-1.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"17\" x=\"-0.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"18\" x=\"-0.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"19\" x=\"0.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"20\" x=\"0.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"21\" x=\"1.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"22\" x=\"1.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"23\" x=\"2.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"24\" x=\"2.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"25\" x=\"3.5\" y=\"-2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"26\" x=\"3.5\" y=\"-2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"27\" x=\"3.5\" y=\"-1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"28\" x=\"3.5\" y=\"-1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"29\" x=\"3.5\" y=\"-0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"30\" x=\"3.5\" y=\"-0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"31\" x=\"3.5\" y=\"0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"32\" x=\"3.5\" y=\"0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"33\" x=\"3.5\" y=\"1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"34\" x=\"3.5\" y=\"1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"35\" x=\"3.5\" y=\"2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"36\" x=\"3.5\" y=\"2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"37\" x=\"2.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"38\" x=\"2.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"39\" x=\"1.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"40\" x=\"1.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"41\" x=\"0.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"42\" x=\"0.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"43\" x=\"-0.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"44\" x=\"-0.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"45\" x=\"-1.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"46\" x=\"-1.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"47\" x=\"-2.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"48\" x=\"-2.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-3.81\" y=\"4.445\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-5.715\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<dimension x1=\"-3.5\" y1=\"-0.5\" x2=\"3.5\" y2=\"-0.5\" x3=\"0\" y3=\"-1.3\" textsize=\"0.3\" layer=\"21\" width=\"0.03\" visible=\"yes\"/>\n<dimension x1=\"-2\" y1=\"3.5\" x2=\"-2\" y2=\"-3.5\" x3=\"-1.5\" y3=\"0\" textsize=\"0.3\" layer=\"21\" width=\"0.03\"/>\n<dimension x1=\"-2.8\" y1=\"0\" x2=\"2.8\" y2=\"0\" x3=\"0\" y3=\"0.5\" textsize=\"0.3\" layer=\"21\" dtype=\"horizontal\" width=\"0.03\"/>\n<dimension x1=\"3\" y1=\"-2.8\" x2=\"3\" y2=\"2.8\" x3=\"2\" y3=\"0\" textsize=\"0.3\" layer=\"21\" dtype=\"horizontal\" width=\"0.03\" visible=\"yes\"/>\n<smd name=\"EP_GND\" x=\"0\" y=\"0\" dx=\"5.588\" dy=\"5.588\" layer=\"1\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"PINOUT\">\n<description>PINOUT for the Max19506</description>\n<wire x1=\"-15.24\" y1=\"34.29\" x2=\"15.24\" y2=\"34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"15.24\" y1=\"34.29\" x2=\"15.24\" y2=\"-34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"15.24\" y1=\"-34.29\" x2=\"-15.24\" y2=\"-34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-15.24\" y1=\"-34.29\" x2=\"-15.24\" y2=\"34.29\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-15.24\" y=\"35.56\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-15.24\" y=\"-38.1\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"AVDD1\" x=\"-20.32\" y=\"-15.24\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"D0A\" x=\"-20.32\" y=\"33.02\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D1A\" x=\"-20.32\" y=\"30.48\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D2A\" x=\"-20.32\" y=\"27.94\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D3A\" x=\"-20.32\" y=\"25.4\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D4A\" x=\"-20.32\" y=\"22.86\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D5A\" x=\"-20.32\" y=\"20.32\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D6A\" x=\"-20.32\" y=\"17.78\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D7A\" x=\"-20.32\" y=\"15.24\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D0B\" x=\"-20.32\" y=\"10.16\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D1B\" x=\"-20.32\" y=\"7.62\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D2B\" x=\"-20.32\" y=\"5.08\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D3B\" x=\"-20.32\" y=\"2.54\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D4B\" x=\"-20.32\" y=\"0\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D5B\" x=\"-20.32\" y=\"-2.54\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D6B\" x=\"-20.32\" y=\"-5.08\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D7B\" x=\"-20.32\" y=\"-7.62\" length=\"middle\" direction=\"out\"/>\n<pin name=\"CMA\" x=\"-20.32\" y=\"-20.32\" length=\"middle\"/>\n<pin name=\"INA+\" x=\"-20.32\" y=\"-22.86\" length=\"middle\" direction=\"in\"/>\n<pin name=\"INA-\" x=\"-20.32\" y=\"-25.4\" length=\"middle\" direction=\"in\"/>\n<pin name=\"SPEN\" x=\"20.32\" y=\"-17.78\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"INB-\" x=\"-20.32\" y=\"-30.48\" length=\"middle\" direction=\"in\"/>\n<pin name=\"REFIO\" x=\"20.32\" y=\"-20.32\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CMB\" x=\"-20.32\" y=\"-33.02\" length=\"middle\"/>\n<pin name=\"DCLKB\" x=\"20.32\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DCLKA\" x=\"20.32\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DORA\" x=\"20.32\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"SCLK/DIV\" x=\"20.32\" y=\"15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"OVDD2\" x=\"20.32\" y=\"20.32\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK-\" x=\"20.32\" y=\"25.4\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"SYNC\" x=\"20.32\" y=\"30.48\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK+\" x=\"20.32\" y=\"27.94\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"GND\" x=\"-20.32\" y=\"-12.7\" length=\"middle\"/>\n<pin name=\"SDIN/FORMAT\" x=\"20.32\" y=\"17.78\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DORB\" x=\"20.32\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"SHDN\" x=\"20.32\" y=\"-22.86\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"INB+\" x=\"-20.32\" y=\"-27.94\" length=\"middle\" direction=\"in\"/>\n<pin name=\"I.C.\" x=\"20.32\" y=\"-10.16\" length=\"middle\" direction=\"nc\" rot=\"R180\"/>\n<pin name=\"CS/OUTSEL\" x=\"20.32\" y=\"12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"OVDD1\" x=\"20.32\" y=\"22.86\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"AVDD2\" x=\"-20.32\" y=\"-17.78\" length=\"middle\" direction=\"pwr\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MAX19506\" prefix=\"IC\">\n<description>The MAX19506 dual-channel, analog-to-digital converter\n(ADC) provides 8-bit resolution and a maximum sample\nrate of 100Msps.</description>\n<gates>\n<gate name=\"M\" symbol=\"PINOUT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"TQFP-48\">\n<connects>\n<connect gate=\"M\" pin=\"AVDD1\" pad=\"1 48\"/>\n<connect gate=\"M\" pin=\"AVDD2\" pad=\"12 13\"/>\n<connect gate=\"M\" pin=\"CLK+\" pad=\"15\"/>\n<connect gate=\"M\" pin=\"CLK-\" pad=\"16\"/>\n<connect gate=\"M\" pin=\"CMA\" pad=\"2\"/>\n<connect gate=\"M\" pin=\"CMB\" pad=\"11\"/>\n<connect gate=\"M\" pin=\"CS/OUTSEL\" pad=\"47\"/>\n<connect gate=\"M\" pin=\"D0A\" pad=\"34\"/>\n<connect gate=\"M\" pin=\"D0B\" pad=\"23\"/>\n<connect gate=\"M\" pin=\"D1A\" pad=\"35\"/>\n<connect gate=\"M\" pin=\"D1B\" pad=\"24\"/>\n<connect gate=\"M\" pin=\"D2A\" pad=\"37\"/>\n<connect gate=\"M\" pin=\"D2B\" pad=\"26\"/>\n<connect gate=\"M\" pin=\"D3A\" pad=\"38\"/>\n<connect gate=\"M\" pin=\"D3B\" pad=\"27\"/>\n<connect gate=\"M\" pin=\"D4A\" pad=\"39\"/>\n<connect gate=\"M\" pin=\"D4B\" pad=\"28\"/>\n<connect gate=\"M\" pin=\"D5A\" pad=\"40\"/>\n<connect gate=\"M\" pin=\"D5B\" pad=\"29\"/>\n<connect gate=\"M\" pin=\"D6A\" pad=\"41\"/>\n<connect gate=\"M\" pin=\"D6B\" pad=\"30\"/>\n<connect gate=\"M\" pin=\"D7A\" pad=\"42\"/>\n<connect gate=\"M\" pin=\"D7B\" pad=\"31\"/>\n<connect gate=\"M\" pin=\"DCLKA\" pad=\"44\"/>\n<connect gate=\"M\" pin=\"DCLKB\" pad=\"20\"/>\n<connect gate=\"M\" pin=\"DORA\" pad=\"43\"/>\n<connect gate=\"M\" pin=\"DORB\" pad=\"19\"/>\n<connect gate=\"M\" pin=\"GND\" pad=\"17 18 EP_GND\"/>\n<connect gate=\"M\" pin=\"I.C.\" pad=\"8 21 22 32 33\"/>\n<connect gate=\"M\" pin=\"INA+\" pad=\"3\"/>\n<connect gate=\"M\" pin=\"INA-\" pad=\"4\"/>\n<connect gate=\"M\" pin=\"INB+\" pad=\"9\"/>\n<connect gate=\"M\" pin=\"INB-\" pad=\"10\"/>\n<connect gate=\"M\" pin=\"OVDD1\" pad=\"25\"/>\n<connect gate=\"M\" pin=\"OVDD2\" pad=\"36\"/>\n<connect gate=\"M\" pin=\"REFIO\" pad=\"6\"/>\n<connect gate=\"M\" pin=\"SCLK/DIV\" pad=\"46\"/>\n<connect gate=\"M\" pin=\"SDIN/FORMAT\" pad=\"45\"/>\n<connect gate=\"M\" pin=\"SHDN\" pad=\"7\"/>\n<connect gate=\"M\" pin=\"SPEN\" pad=\"5\"/>\n<connect gate=\"M\" pin=\"SYNC\" pad=\"14\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</drawing>\n</eagle>\n"
  },
  {
    "path": "eagle/lbr/LMH6724.lbr",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"8.2.0\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"0.1\" unitdist=\"inch\" unit=\"mil\" style=\"lines\" multiple=\"1\" display=\"no\" altdistance=\"0.01\" altunitdist=\"inch\" altunit=\"inch\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"39\" name=\"tKeepout\" color=\"4\" fill=\"11\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"40\" name=\"bKeepout\" color=\"1\" fill=\"11\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"41\" name=\"tRestrict\" color=\"4\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"42\" name=\"bRestrict\" color=\"1\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"43\" name=\"vRestrict\" color=\"2\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"44\" name=\"Drills\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"45\" name=\"Holes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"46\" name=\"Milling\" color=\"3\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"47\" name=\"Measures\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"48\" name=\"Document\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"49\" name=\"Reference\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"51\" name=\"tDocu\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"52\" name=\"bDocu\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"90\" name=\"Modules\" color=\"5\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"91\" name=\"Nets\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"92\" name=\"Busses\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"93\" name=\"Pins\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"94\" name=\"Symbols\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"95\" name=\"Names\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"96\" name=\"Values\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"97\" name=\"Info\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"98\" name=\"Guide\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n</layers>\n<library>\n<packages>\n<package name=\"M08A\">\n<smd name=\"1\" x=\"-2.4638\" y=\"1.905\" dx=\"1.9812\" dy=\"0.5588\" layer=\"1\"/>\n<smd name=\"2\" x=\"-2.4638\" y=\"0.635\" dx=\"1.9812\" dy=\"0.5588\" layer=\"1\"/>\n<smd name=\"3\" x=\"-2.4638\" y=\"-0.635\" dx=\"1.9812\" dy=\"0.5588\" layer=\"1\"/>\n<smd name=\"4\" x=\"-2.4638\" y=\"-1.905\" dx=\"1.9812\" dy=\"0.5588\" layer=\"1\"/>\n<smd name=\"5\" x=\"2.4638\" y=\"-1.905\" dx=\"1.9812\" dy=\"0.5588\" layer=\"1\"/>\n<smd name=\"6\" x=\"2.4638\" y=\"-0.635\" dx=\"1.9812\" dy=\"0.5588\" layer=\"1\"/>\n<smd name=\"7\" x=\"2.4638\" y=\"0.635\" dx=\"1.9812\" dy=\"0.5588\" layer=\"1\"/>\n<smd name=\"8\" x=\"2.4638\" y=\"1.905\" dx=\"1.9812\" dy=\"0.5588\" layer=\"1\"/>\n<wire x1=\"-1.9812\" y1=\"1.651\" x2=\"-2.0066\" y2=\"2.159\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-2.0066\" y1=\"2.159\" x2=\"-3.0988\" y2=\"2.159\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-3.0988\" y1=\"2.159\" x2=\"-3.0988\" y2=\"1.651\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-3.0988\" y1=\"1.651\" x2=\"-1.9812\" y2=\"1.651\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.9812\" y1=\"0.381\" x2=\"-2.0066\" y2=\"0.889\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-2.0066\" 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layer=\"51\"/>\n<wire x1=\"1.9812\" y1=\"1.651\" x2=\"3.0988\" y2=\"1.651\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"3.0988\" y1=\"1.651\" x2=\"3.0988\" y2=\"2.159\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"3.0988\" y1=\"2.159\" x2=\"1.9812\" y2=\"2.159\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.9812\" y1=\"-2.4892\" x2=\"1.9812\" y2=\"-2.4892\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"1.9812\" y1=\"-2.4892\" x2=\"1.9812\" y2=\"2.4892\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"1.9812\" y1=\"2.4892\" x2=\"-0.3048\" y2=\"2.4892\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-0.3048\" y1=\"2.4892\" x2=\"-1.9812\" y2=\"2.4892\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.9812\" y1=\"2.4892\" x2=\"-1.9812\" y2=\"-2.4892\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.3048\" y1=\"2.5146\" x2=\"-0.3048\" y2=\"2.4892\" width=\"0.1524\" layer=\"51\" curve=\"-180\"/>\n<text x=\"-2.1844\" y=\"1.1684\" size=\"1.27\" layer=\"51\" ratio=\"6\" rot=\"SR0\">*</text>\n<wire x1=\"-2.1336\" y1=\"-2.6416\" x2=\"2.1336\" y2=\"-2.6416\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.1336\" y1=\"2.6416\" x2=\"-2.1336\" y2=\"2.6416\" width=\"0.1524\" layer=\"21\"/>\n<text x=\"-3.3528\" y=\"2.3876\" size=\"1.27\" layer=\"21\" ratio=\"6\" rot=\"SR0\">*</text>\n<text x=\"-3.2766\" y=\"-0.635\" size=\"1.27\" layer=\"25\" ratio=\"6\" rot=\"SR0\">&gt;Name</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"LMH6724MA\">\n<pin name=\"OUTA\" x=\"2.54\" y=\"0\" length=\"middle\" direction=\"out\"/>\n<pin name=\"-INA\" x=\"2.54\" y=\"-2.54\" length=\"middle\" direction=\"in\"/>\n<pin name=\"+INA\" x=\"2.54\" y=\"-5.08\" length=\"middle\" direction=\"in\"/>\n<pin name=\"V-\" x=\"2.54\" y=\"-7.62\" length=\"middle\" direction=\"pas\"/>\n<pin name=\"+INB\" x=\"58.42\" y=\"-7.62\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n<pin name=\"-INB\" x=\"58.42\" y=\"-5.08\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n<pin name=\"OUTB\" x=\"58.42\" y=\"-2.54\" length=\"middle\" direction=\"out\" rot=\"R180\"/>\n<pin name=\"V+\" x=\"58.42\" y=\"0\" length=\"middle\" direction=\"pas\" rot=\"R180\"/>\n<wire x1=\"7.62\" y1=\"5.08\" x2=\"7.62\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-12.7\" x2=\"53.34\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"53.34\" y1=\"-12.7\" x2=\"53.34\" y2=\"5.08\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"53.34\" y1=\"5.08\" x2=\"7.62\" y2=\"5.08\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"25.7556\" y=\"9.1186\" size=\"2.0828\" layer=\"95\" ratio=\"6\" rot=\"SR0\">&gt;Name</text>\n<text x=\"25.1206\" y=\"6.5786\" size=\"2.0828\" layer=\"96\" ratio=\"6\" rot=\"SR0\">&gt;Value</text>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"LMH6724MAX\" prefix=\"U\">\n<gates>\n<gate name=\"A\" symbol=\"LMH6724MA\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"M08A\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"M08A-M\" package=\"M08A-M\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"M08A-L\" package=\"M08A-L\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</drawing>\n</eagle>\n"
  },
  {
    "path": "eagle/lbr/SparkFun-Electromechanical.lbr",
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prints&lt;/h3&gt;\nIn this library you'll find anything that moves- switches, relays, buttons, potentiometers. Also, anything that goes on a board but isn't electrical in nature- screws, standoffs, etc.&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"AYZ0202\">\n<description>&lt;b&gt;DPDT Slide Switch SMD&lt;/b&gt;\nwww.SparkFun.com SKU : Comp-SMDS</description>\n<wire x1=\"-3.6\" y1=\"1.75\" x2=\"-3.6\" y2=\"-1.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.6\" y1=\"-1.75\" x2=\"3.6\" y2=\"-1.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.6\" y1=\"-1.75\" x2=\"3.6\" y2=\"1.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.6\" y1=\"1.75\" x2=\"-3.6\" y2=\"1.75\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"3\" x=\"2.5\" y=\"2.825\" dx=\"1\" dy=\"1.15\" layer=\"1\"/>\n<smd name=\"2\" x=\"0\" y=\"2.825\" dx=\"1\" dy=\"1.15\" layer=\"1\"/>\n<smd name=\"1\" x=\"-2.5\" y=\"2.825\" dx=\"1\" dy=\"1.15\" layer=\"1\"/>\n<smd name=\"6\" x=\"2.5\" y=\"-2.825\" dx=\"1\" dy=\"1.15\" layer=\"1\"/>\n<smd name=\"5\" x=\"0\" y=\"-2.825\" dx=\"1\" dy=\"1.15\" layer=\"1\"/>\n<smd name=\"4\" x=\"-2.5\" y=\"-2.825\" dx=\"1\" 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x2=\"-27.051\" y2=\"-4.826\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-27.051\" y1=\"-4.826\" x2=\"-27.051\" y2=\"4.826\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-27.051\" y1=\"4.826\" x2=\"-17.526\" y2=\"4.826\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-17.526\" y1=\"4.826\" x2=\"-17.526\" y2=\"2.159\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-17.526\" y1=\"-2.159\" x2=\"-17.526\" y2=\"-4.826\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"17.526\" y1=\"4.826\" x2=\"27.051\" y2=\"4.826\" width=\"0.254\" layer=\"41\"/>\n<wire x1=\"27.051\" y1=\"4.826\" x2=\"27.051\" y2=\"-4.826\" width=\"0.254\" layer=\"41\"/>\n<wire x1=\"27.051\" y1=\"-4.826\" x2=\"17.526\" y2=\"-4.826\" width=\"0.254\" layer=\"41\"/>\n<wire x1=\"17.526\" y1=\"-4.826\" x2=\"17.526\" y2=\"4.826\" width=\"0.254\" layer=\"41\"/>\n<pad name=\"PWR@2\" x=\"-17.78\" y=\"0\" drill=\"1.8542\" rot=\"R90\"/>\n<pad name=\"PWR@1\" x=\"-25.146\" y=\"0\" drill=\"1.8542\"/>\n<pad name=\"GND@2\" x=\"17.78\" y=\"0\" drill=\"1.8542\"/>\n<pad name=\"GND@1\" x=\"25.146\" y=\"0\" drill=\"1.8542\"/>\n<text x=\"-14.732\" y=\"-1.27\" size=\"2.54\" layer=\"21\" ratio=\"12\">+</text>\n<text x=\"12.7\" y=\"-1.27\" size=\"2.54\" layer=\"21\" ratio=\"12\">-</text>\n</package>\n<package name=\"BATTCON_12MM_PTH\">\n<wire x1=\"-6.35\" y1=\"-3.81\" x2=\"-3.81\" y2=\"-6.35\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"-6.35\" x2=\"3.81\" y2=\"-6.35\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"-6.35\" x2=\"6.35\" y2=\"-3.81\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"-3.81\" x2=\"6.35\" y2=\"-2.54\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.35\" y1=\"-3.81\" x2=\"-6.35\" y2=\"-2.54\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.35\" y1=\"2.54\" x2=\"-6.35\" y2=\"4.064\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"2.54\" x2=\"6.35\" y2=\"4.064\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"5.588\" x2=\"3.175\" y2=\"5.588\" width=\"0.2032\" layer=\"21\" curve=\"102.56384\"/>\n<wire x1=\"-6.35\" y1=\"4.064\" x2=\"-3.175\" y2=\"5.588\" width=\"0.2032\" layer=\"21\" curve=\"-123.398919\"/>\n<wire x1=\"6.35\" y1=\"4.064\" x2=\"3.175\" y2=\"5.588\" width=\"0.2032\" layer=\"21\" curve=\"128.77667\"/>\n<pad name=\"VCC@2\" x=\"-6.604\" y=\"0\" drill=\"1.8542\" shape=\"square\"/>\n<pad name=\"VCC@1\" x=\"6.604\" y=\"0\" drill=\"1.8542\" shape=\"square\"/>\n<smd name=\"GND\" x=\"0\" y=\"0\" dx=\"9\" dy=\"9\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n<text x=\"-3.81\" y=\"-3.81\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-5.08\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<circle x=\"0\" y=\"0\" radius=\"1\" width=\"2\" layer=\"31\"/>\n</package>\n<package name=\"BATTCON_20MM\">\n<wire x1=\"-3.7\" y1=\"-10.57\" x2=\"3.7\" y2=\"-10.57\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.7\" y1=\"-10.57\" x2=\"-10.5\" y2=\"-4.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.7\" y1=\"-10.57\" x2=\"10.5\" y2=\"-4.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.3\" y1=\"8.3\" x2=\"5.3\" y2=\"8.3\" width=\"0.2032\" layer=\"21\" curve=\"69.999889\"/>\n<wire x1=\"10.5\" y1=\"-4.5\" x2=\"10.5\" y2=\"-3.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-10.5\" y1=\"-4.5\" x2=\"-10.5\" y2=\"-3.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-10.5\" y1=\"6.3\" x2=\"-5.3\" y2=\"8.3\" width=\"0.2032\" layer=\"21\" curve=\"-139.635474\"/>\n<wire x1=\"10.5\" y1=\"6.3\" x2=\"5.3\" y2=\"8.3\" width=\"0.2032\" layer=\"21\" curve=\"136.99875\"/>\n<wire x1=\"-10.5\" y1=\"6.3\" x2=\"-10.5\" y2=\"3.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"10.5\" y1=\"6.3\" x2=\"10.5\" y2=\"3.4\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"10\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"6.07\" dy=\"6.07\" layer=\"1\"/>\n<smd name=\"1\" x=\"-12.5\" y=\"0\" dx=\"6.07\" dy=\"6.07\" layer=\"1\"/>\n<smd name=\"3\" x=\"12.5\" y=\"0\" dx=\"6.07\" dy=\"6.07\" layer=\"1\"/>\n<text x=\"-6.985\" y=\"0.635\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-6.985\" y=\"-0.635\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"BATTCON_245MM\">\n<wire x1=\"-6.24\" y1=\"-12.44\" x2=\"6.24\" y2=\"-12.44\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.24\" y1=\"-12.44\" x2=\"-13.04\" y2=\"-8.24\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.24\" y1=\"-12.44\" x2=\"13.04\" y2=\"-8.24\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-7.84\" y1=\"12.38\" x2=\"7.94\" y2=\"12.48\" width=\"0.2032\" layer=\"21\" curve=\"94.032201\"/>\n<wire x1=\"13.04\" y1=\"-8.24\" x2=\"13.04\" y2=\"-3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-13.04\" y1=\"-8.24\" x2=\"-13.04\" y2=\"-3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-13.04\" y1=\"10.38\" x2=\"-7.84\" y2=\"12.38\" width=\"0.2032\" layer=\"21\" curve=\"-139.635474\"/>\n<wire x1=\"13.04\" y1=\"10.38\" x2=\"7.84\" y2=\"12.38\" width=\"0.2032\" layer=\"21\" curve=\"136.99875\"/>\n<wire x1=\"-13.04\" y1=\"10.38\" x2=\"-13.04\" y2=\"3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"13.04\" y1=\"10.38\" x2=\"13.04\" y2=\"3\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"12.25\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"4.064\" dy=\"4.064\" layer=\"1\"/>\n<smd name=\"1\" x=\"-15.367\" y=\"0\" dx=\"5.08\" dy=\"5.08\" layer=\"1\"/>\n<smd name=\"3\" x=\"15.367\" y=\"0\" dx=\"5.08\" dy=\"5.08\" layer=\"1\"/>\n<text x=\"-9.525\" y=\"0.635\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-9.525\" y=\"-0.635\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"BATTCOM_20MM_PTH\">\n<wire x1=\"10.34\" y1=\"3.8\" x2=\"13.32\" y2=\"3.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"13.32\" y1=\"3.8\" x2=\"13.32\" y2=\"-3.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"13.32\" y1=\"-3.8\" x2=\"10.34\" y2=\"-3.8\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0.06\" y=\"0.1\" radius=\"10\" width=\"0.2032\" layer=\"51\"/>\n<pad name=\"2\" x=\"-8.15\" y=\"0\" drill=\"1.3\" rot=\"R90\"/>\n<pad name=\"1\" x=\"11.85\" y=\"0\" drill=\"1.3\" rot=\"R90\"/>\n<text x=\"-15.985\" y=\"0.635\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-15.985\" y=\"-0.635\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"8.6\" y=\"-0.7\" size=\"1.27\" layer=\"51\">+</text>\n<text x=\"-6.4\" y=\"-0.7\" size=\"1.27\" layer=\"51\">-</text>\n<wire x1=\"-10.54\" y1=\"3.8\" x2=\"-10.54\" y2=\"-3.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"10.34\" y1=\"3.8\" x2=\"-10.54\" y2=\"3.8\" width=\"0.2032\" layer=\"21\" curve=\"139.856795\"/>\n<wire x1=\"10.34\" y1=\"-3.8\" x2=\"-10.54\" y2=\"-3.8\" width=\"0.2032\" layer=\"21\" curve=\"-139.856795\"/>\n</package>\n<package name=\"BATTCON_245MM_PTH\">\n<wire x1=\"-3.81\" y1=\"-12.7\" x2=\"3.81\" y2=\"-12.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"-12.7\" x2=\"-12.7\" y2=\"-6.35\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"-12.7\" x2=\"12.7\" y2=\"-6.35\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"9.779\" x2=\"7.62\" y2=\"9.779\" width=\"0.2032\" layer=\"21\" curve=\"63.785901\"/>\n<wire x1=\"12.7\" y1=\"-6.35\" x2=\"12.7\" y2=\"-2.54\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"-6.35\" x2=\"-12.7\" y2=\"-2.54\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"6.35\" x2=\"-7.62\" y2=\"9.779\" width=\"0.2032\" layer=\"21\" curve=\"-123.780121\"/>\n<wire x1=\"12.7\" y1=\"6.35\" x2=\"7.62\" y2=\"9.779\" width=\"0.2032\" layer=\"21\" curve=\"123.773101\"/>\n<wire x1=\"-12.7\" y1=\"6.35\" x2=\"-12.7\" y2=\"2.54\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"12.7\" y1=\"6.35\" x2=\"12.7\" y2=\"2.54\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"12.25\" width=\"0.2032\" layer=\"51\"/>\n<pad name=\"1\" x=\"-12.7\" y=\"0\" drill=\"1.8542\" shape=\"square\"/>\n<pad name=\"3\" x=\"12.7\" y=\"0\" drill=\"1.8542\" shape=\"square\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"4.064\" dy=\"4.064\" layer=\"1\"/>\n<text x=\"-9.525\" y=\"0.635\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-9.525\" y=\"-0.635\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"LIPO-1100MAH\">\n<wire x1=\"-17\" y1=\"-26\" x2=\"17\" y2=\"-26\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"17\" y1=\"-26\" x2=\"17\" y2=\"26\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"17\" y1=\"26\" x2=\"-17\" y2=\"26\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-17\" y1=\"26\" x2=\"-17\" y2=\"-26\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"34\" x2=\"-1\" y2=\"30\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"34\" x2=\"1\" y2=\"30\" width=\"0.127\" layer=\"51\"/>\n<pad name=\"+\" x=\"-5\" y=\"32\" drill=\"1.397\" diameter=\"2.54\"/>\n<pad name=\"-\" x=\"5\" y=\"32\" drill=\"1.397\" diameter=\"2.54\"/>\n</package>\n<package name=\"BATTERY-AA-PANEL\">\n<wire x1=\"29.46\" y1=\"8.255\" x2=\"-29.46\" y2=\"8.255\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-29.46\" y1=\"8.255\" x2=\"-29.46\" y2=\"-8.255\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-29.46\" y1=\"-8.255\" x2=\"29.46\" y2=\"-8.255\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"29.46\" y1=\"-8.255\" x2=\"29.46\" y2=\"8.255\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"24\" y1=\"1\" x2=\"24\" y2=\"-1\" width=\"0.25\" layer=\"21\"/>\n<wire x1=\"23\" y1=\"0\" x2=\"25\" y2=\"0\" width=\"0.25\" layer=\"21\"/>\n<wire x1=\"-25\" y1=\"1\" x2=\"-25\" y2=\"-1\" width=\"0.25\" layer=\"21\"/>\n<pad name=\"-\" x=\"-27.43\" y=\"0\" drill=\"1.17\" diameter=\"2.3\"/>\n<pad name=\"+\" x=\"27.43\" y=\"0\" drill=\"1.17\" diameter=\"2.3\"/>\n<text x=\"-29.5\" y=\"8.5\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-29.5\" y=\"-8.9\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"-6\" y=\"7\" size=\"0.6096\" layer=\"49\">(layout parts on top layer)</text>\n<hole x=\"17.27\" y=\"0\" drill=\"3.18\"/>\n<hole x=\"-17.27\" y=\"0\" drill=\"3.18\"/>\n<hole x=\"27.43\" y=\"7.47\" drill=\"1.7\"/>\n</package>\n<package name=\"BATTERY_20MM_PTH_COMPACT\">\n<wire x1=\"-3.7\" y1=\"-9.9\" x2=\"3.7\" y2=\"-9.9\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.7\" y1=\"-9.9\" x2=\"-10.5\" y2=\"-5.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.7\" y1=\"-9.9\" x2=\"10.5\" y2=\"-5.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.3\" y1=\"7.3\" x2=\"5.4\" y2=\"7.4\" width=\"0.2032\" layer=\"21\" curve=\"94.031579\"/>\n<wire x1=\"10.5\" y1=\"-5.7\" x2=\"10.5\" y2=\"-3.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-10.5\" y1=\"-5.7\" x2=\"-10.5\" y2=\"-3.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.3\" y1=\"7.3\" x2=\"-10.5\" y2=\"5.3\" width=\"0.2032\" layer=\"21\" curve=\"139.635474\"/>\n<wire x1=\"10.5\" y1=\"5.3\" x2=\"5.3\" y2=\"7.3\" width=\"0.2032\" layer=\"21\" curve=\"137.002565\"/>\n<wire x1=\"-10.5\" y1=\"5.3\" x2=\"-10.5\" y2=\"3.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"10.5\" y1=\"5.3\" x2=\"10.5\" y2=\"3.5\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"10\" width=\"0.2032\" layer=\"51\"/>\n<pad name=\"1\" x=\"-10.5\" y=\"0\" drill=\"1.8542\" shape=\"long\" rot=\"R90\"/>\n<pad name=\"3\" x=\"10.5\" y=\"0\" drill=\"1.8542\" shape=\"long\" rot=\"R90\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"4.064\" dy=\"4.064\" layer=\"1\"/>\n<text x=\"-6.985\" y=\"0.635\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-6.985\" y=\"-0.635\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"BATTCON_12MM\">\n<wire x1=\"-6.096\" y1=\"4.318\" x2=\"-3.81\" y2=\"5.334\" width=\"0.2032\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.81\" y1=\"5.334\" x2=\"6.096\" y2=\"4.318\" width=\"0.2032\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"4.318\" x2=\"6.096\" y2=\"-3.302\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.302\" x2=\"3.048\" y2=\"-6.35\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.048\" y1=\"-6.35\" x2=\"-3.048\" y2=\"-6.35\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.048\" y1=\"-6.35\" x2=\"-6.096\" y2=\"-3.302\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"-3.302\" x2=\"-6.096\" y2=\"4.318\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"5.334\" x2=\"-3.81\" y2=\"5.334\" width=\"0.2032\" layer=\"21\" curve=\"-90\"/>\n<smd name=\"GND\" x=\"0\" y=\"0\" dx=\"8\" dy=\"8\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n<smd name=\"PWR@1\" x=\"-7.874\" y=\"0\" dx=\"3.175\" dy=\"3.175\" layer=\"1\"/>\n<smd name=\"PWR@2\" x=\"7.874\" y=\"0\" dx=\"3.175\" dy=\"3.175\" layer=\"1\"/>\n<circle x=\"0\" y=\"0\" radius=\"6\" width=\"0.127\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"6\" width=\"0.127\" layer=\"39\"/>\n<circle x=\"0\" y=\"0\" radius=\"1\" width=\"2\" layer=\"31\"/>\n</package>\n<package name=\"BATTCON_20MM_4LEGS\">\n<wire x1=\"-7.5\" y1=\"7.35\" x2=\"7.5\" y2=\"7.35\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-7.5\" y1=\"7.35\" x2=\"-10.55\" y2=\"4.65\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"7.5\" y1=\"7.35\" x2=\"10.55\" y2=\"4.65\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"10.55\" y1=\"2.55\" x2=\"10.55\" y2=\"0.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"10.55\" y1=\"-0.55\" x2=\"10.55\" y2=\"-2.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-10.55\" y1=\"2.55\" x2=\"-10.55\" y2=\"0.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-10.55\" y1=\"-0.55\" x2=\"-10.55\" y2=\"-2.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"10.55\" y1=\"2.55\" x2=\"11.45\" y2=\"2.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"11.45\" y1=\"2.55\" x2=\"11.45\" y2=\"0.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"11.45\" y1=\"0.55\" x2=\"10.55\" y2=\"0.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"10.55\" y1=\"-0.55\" x2=\"11.45\" y2=\"-0.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"11.45\" y1=\"-0.55\" x2=\"11.45\" y2=\"-2.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"11.45\" y1=\"-2.55\" x2=\"10.55\" y2=\"-2.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-10.55\" y1=\"-2.55\" x2=\"-11.45\" y2=\"-2.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-11.45\" y1=\"-2.55\" x2=\"-11.45\" y2=\"-0.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-11.45\" y1=\"-0.55\" x2=\"-10.55\" y2=\"-0.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-10.55\" y1=\"0.55\" x2=\"-11.45\" y2=\"0.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-11.45\" y1=\"0.55\" x2=\"-11.45\" y2=\"2.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-11.45\" y1=\"2.55\" x2=\"-10.55\" y2=\"2.55\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"10.55\" y1=\"-4.55\" x2=\"5.55\" y2=\"-7.95\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.55\" y1=\"-7.95\" x2=\"-5.55\" y2=\"-7.95\" width=\"0.2032\" layer=\"21\" curve=\"62.415735\"/>\n<wire x1=\"-5.55\" y1=\"-7.95\" x2=\"-10.55\" y2=\"-4.55\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"10.55\" y1=\"4.65\" x2=\"10.55\" y2=\"3.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-10.55\" y1=\"3.2\" x2=\"-10.55\" y2=\"4.65\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-10.55\" y1=\"-4.55\" x2=\"-10.55\" y2=\"-3.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"10.55\" y1=\"-4.55\" x2=\"10.55\" y2=\"-3.2\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"10\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"POSITIVE@1\" x=\"-11.176\" y=\"1.651\" dx=\"2.032\" dy=\"3.175\" layer=\"1\" rot=\"R180\" cream=\"no\"/>\n<smd name=\"NEGATIVE\" x=\"0\" y=\"0\" dx=\"13\" dy=\"8\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n<smd name=\"POSITIVE@4\" x=\"11.176\" y=\"-1.651\" dx=\"2.032\" dy=\"3.175\" layer=\"1\" cream=\"no\"/>\n<smd name=\"POSITIVE@2\" x=\"-11.176\" y=\"-1.524\" dx=\"2.032\" dy=\"3.175\" layer=\"1\" cream=\"no\"/>\n<smd name=\"POSITIVE@3\" x=\"11.176\" y=\"1.524\" dx=\"2.032\" dy=\"3.175\" layer=\"1\" rot=\"R180\" cream=\"no\"/>\n<text x=\"-0.889\" y=\"5.969\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.889\" y=\"4.699\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2\" y1=\"-2\" x2=\"2\" y2=\"2\" layer=\"31\"/>\n<rectangle x1=\"-13.462\" y1=\"-3.429\" x2=\"-9.906\" y2=\"3.683\" layer=\"31\"/>\n<rectangle x1=\"9.906\" y1=\"-3.556\" x2=\"13.462\" y2=\"3.556\" layer=\"31\"/>\n</package>\n<package name=\"BATTERY-AA-KIT\">\n<description>&lt;h3&gt;BATTERY-AA-KIT&lt;/h3&gt;\n&lt;b&gt;Warning:&lt;/b&gt; This is the KIT version of this package. This package has a smaller diameter top stop mask, which doesn't cover the diameter of the pad. This means only the bottom side of the pads' copper will be exposed. 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layer=\"51\">D3</text>\n<text x=\"36.576\" y=\"38.989\" size=\"1.016\" layer=\"51\">D4</text>\n<text x=\"11.684\" y=\"14.097\" size=\"1.016\" layer=\"51\">D1</text>\n<text x=\"36.703\" y=\"13.843\" size=\"1.016\" layer=\"51\">D2</text>\n<hole x=\"12.5\" y=\"25\" drill=\"3\"/>\n<hole x=\"25\" y=\"37.5\" drill=\"3\"/>\n<hole x=\"37.5\" y=\"25\" drill=\"3\"/>\n<hole x=\"25\" y=\"12.5\" drill=\"3\"/>\n<hole x=\"2.5\" y=\"2.5\" drill=\"3\"/>\n<hole x=\"2.5\" y=\"47.5\" drill=\"3\"/>\n<hole x=\"47.5\" y=\"47.5\" drill=\"3\"/>\n<hole x=\"47.5\" y=\"2.5\" drill=\"3\"/>\n</package>\n<package name=\"BUTTONPAD-2X2SINGLE-KIT\">\n<description>&lt;h3&gt;BUTTONPAD-2X2SINGLE-KIT&lt;/h3&gt;\n&lt;b&gt;Warning:&lt;/b&gt; This is the KIT version of this package. This package has a smaller diameter top stop mask, which doesn't cover the diameter of the pad. This means only the bottom side of the pads' copper will be exposed. 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width=\"0.254\" layer=\"29\"/>\n<wire x1=\"8.26\" y1=\"43.74\" x2=\"9.71\" y2=\"41.86\" width=\"0.254\" layer=\"29\"/>\n<wire x1=\"7.86\" y1=\"42.74\" x2=\"9.42\" y2=\"41.02\" width=\"0.254\" layer=\"29\"/>\n<wire x1=\"6.78\" y1=\"42.51\" x2=\"8.3\" y2=\"41\" width=\"0.254\" layer=\"29\"/>\n<wire x1=\"6.53\" y1=\"41.16\" x2=\"8.39\" y2=\"39.93\" width=\"0.254\" layer=\"29\"/>\n<wire x1=\"5.46\" y1=\"40.53\" x2=\"7.52\" y2=\"39.5\" width=\"0.254\" layer=\"29\"/>\n<wire x1=\"31.954\" y1=\"42.5\" x2=\"33.454\" y2=\"41\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"33.604\" y1=\"39.88\" x2=\"31.684\" y2=\"41.16\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"30.614\" y1=\"40.54\" x2=\"32.674\" y2=\"39.5\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"29.974\" y1=\"38.01\" x2=\"32.274\" y2=\"37.87\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"32.994\" y1=\"36.89\" x2=\"30.694\" y2=\"36.75\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"30.294\" y1=\"35.52\" x2=\"32.564\" y2=\"36.03\" width=\"0.254\" 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drill=\"0.9144\"/>\n<hole x=\"36.8046\" y=\"88.0618\" drill=\"0.9144\"/>\n<hole x=\"38.1\" y=\"86.9188\" drill=\"0.9144\"/>\n<hole x=\"39.4462\" y=\"87.9602\" drill=\"0.9144\"/>\n<hole x=\"60.5282\" y=\"86.9188\" drill=\"0.9144\"/>\n<hole x=\"61.8236\" y=\"88.0618\" drill=\"0.9144\"/>\n<hole x=\"63.119\" y=\"86.9188\" drill=\"0.9144\"/>\n<hole x=\"64.4652\" y=\"87.9602\" drill=\"0.9144\"/>\n<hole x=\"85.5472\" y=\"86.9188\" drill=\"0.9144\"/>\n<hole x=\"86.8426\" y=\"88.0618\" drill=\"0.9144\"/>\n<hole x=\"88.138\" y=\"86.9188\" drill=\"0.9144\"/>\n<hole x=\"89.4842\" y=\"87.9602\" drill=\"0.9144\"/>\n<hole x=\"10.4902\" y=\"61.8998\" drill=\"0.9144\"/>\n<hole x=\"11.7856\" y=\"63.0428\" drill=\"0.9144\"/>\n<hole x=\"13.081\" y=\"61.8998\" drill=\"0.9144\"/>\n<hole x=\"14.4272\" y=\"62.9412\" drill=\"0.9144\"/>\n<hole x=\"35.5092\" y=\"61.8998\" drill=\"0.9144\"/>\n<hole x=\"36.8046\" y=\"63.0428\" drill=\"0.9144\"/>\n<hole x=\"38.1\" y=\"61.8998\" drill=\"0.9144\"/>\n<hole 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drill=\"0.9144\"/>\n<hole x=\"63.119\" y=\"36.8808\" drill=\"0.9144\"/>\n<hole x=\"64.4652\" y=\"37.9222\" drill=\"0.9144\"/>\n<hole x=\"85.5472\" y=\"36.8808\" drill=\"0.9144\"/>\n<hole x=\"86.8426\" y=\"38.0238\" drill=\"0.9144\"/>\n<hole x=\"88.138\" y=\"36.8808\" drill=\"0.9144\"/>\n<hole x=\"89.4842\" y=\"37.9222\" drill=\"0.9144\"/>\n<hole x=\"10.4902\" y=\"11.8618\" drill=\"0.9144\"/>\n<hole x=\"11.7856\" y=\"13.0048\" drill=\"0.9144\"/>\n<hole x=\"13.081\" y=\"11.8618\" drill=\"0.9144\"/>\n<hole x=\"14.4272\" y=\"12.9032\" drill=\"0.9144\"/>\n<hole x=\"35.5092\" y=\"11.9888\" drill=\"0.9144\"/>\n<hole x=\"36.8046\" y=\"13.1318\" drill=\"0.9144\"/>\n<hole x=\"38.1\" y=\"11.9888\" drill=\"0.9144\"/>\n<hole x=\"39.4462\" y=\"13.0302\" drill=\"0.9144\"/>\n<hole x=\"60.5282\" y=\"11.8618\" drill=\"0.9144\"/>\n<hole x=\"61.8236\" y=\"13.0048\" drill=\"0.9144\"/>\n<hole x=\"63.119\" y=\"11.8618\" drill=\"0.9144\"/>\n<hole x=\"64.4652\" y=\"12.9032\" drill=\"0.9144\"/>\n<hole x=\"85.5472\" y=\"11.9888\" drill=\"0.9144\"/>\n<hole x=\"86.8426\" y=\"13.1318\" drill=\"0.9144\"/>\n<hole x=\"88.138\" y=\"11.9888\" drill=\"0.9144\"/>\n<hole x=\"89.4842\" y=\"13.0302\" drill=\"0.9144\"/>\n</package>\n<package name=\"BUZZER-12MM\">\n<description>&lt;b&gt;BUZZER&lt;/b&gt;</description>\n<circle x=\"0\" y=\"0\" radius=\"5.9\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"1.27\" width=\"0.2032\" layer=\"51\"/>\n<pad name=\"-\" x=\"-3.25\" y=\"0\" drill=\"0.9\" diameter=\"1.778\"/>\n<pad name=\"+\" x=\"3.25\" y=\"0\" drill=\"0.9\" diameter=\"1.778\"/>\n<text x=\"-2.54\" y=\"2.54\" size=\"0.6096\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-3.048\" size=\"0.6096\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"BUZZER-CMT1603\">\n<wire x1=\"-8\" y1=\"8\" x2=\"-8\" y2=\"-8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-8\" y1=\"-8\" x2=\"8\" y2=\"-8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"8\" y1=\"-8\" x2=\"8\" y2=\"8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"8\" y1=\"8\" x2=\"-8\" y2=\"8\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"-9.3\" y=\"0\" dx=\"2.5\" dy=\"3\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"9.3\" y=\"0\" dx=\"2.5\" dy=\"3\" layer=\"1\"/>\n</package>\n<package name=\"BUZZER-CCV\">\n<wire x1=\"2.6\" y1=\"-6\" x2=\"-2.6\" y2=\"-6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2.6\" y1=\"-6\" x2=\"2.6\" y2=\"-3.7\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.6\" y1=\"-6\" x2=\"-2.6\" y2=\"-3.7\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-4.2\" y1=\"1.6\" x2=\"1.27\" y2=\"4.318\" width=\"0.2032\" layer=\"21\" curve=\"-86.141052\"/>\n<wire x1=\"3.048\" y1=\"3.302\" x2=\"4.191\" y2=\"1.651\" width=\"0.2032\" layer=\"21\" curve=\"-25.69541\"/>\n<wire x1=\"4.2\" y1=\"-1.6\" x2=\"2.6\" y2=\"-3.7\" width=\"0.2032\" layer=\"21\" curve=\"-31.605028\"/>\n<wire x1=\"-3.302\" y1=\"-3.048\" x2=\"-2.6\" y2=\"-3.6\" width=\"0.2032\" layer=\"21\" curve=\"12.917633\"/>\n<wire x1=\"-2.6\" y1=\"-6\" x2=\"2.6\" y2=\"-6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.6\" y1=\"-6\" x2=\"2.6\" y2=\"-3.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.6\" y1=\"-6\" x2=\"-2.6\" y2=\"-3.6\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"4.5\" width=\"0.127\" layer=\"51\"/>\n<smd name=\"-\" x=\"-4\" y=\"0\" dx=\"3.2\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"+\" x=\"4\" y=\"0\" dx=\"3.2\" dy=\"2.5\" layer=\"1\"/>\n<hole x=\"-3.9\" y=\"-2.25\" drill=\"0.8\"/>\n<hole x=\"2.25\" y=\"3.9\" drill=\"0.8\"/>\n</package>\n<package name=\"BUZZER-CMT1102\">\n<wire x1=\"-5.5\" y1=\"4.5\" x2=\"5.5\" y2=\"4.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"5.5\" y1=\"4.5\" x2=\"5.5\" y2=\"-4.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"5.5\" y1=\"-4.5\" x2=\"-5.5\" y2=\"-4.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-5.5\" y1=\"-4.5\" x2=\"-5.5\" y2=\"4.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-5.5\" y1=\"4.5\" x2=\"-5.5\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.5\" y1=\"4.5\" x2=\"5.5\" y2=\"4.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.5\" y1=\"4.5\" x2=\"5.5\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.5\" y1=\"-2\" x2=\"5.5\" y2=\"-4.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.5\" y1=\"-4.5\" x2=\"-5.5\" y2=\"-4.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.5\" y1=\"-4.5\" x2=\"-5.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-6.5\" y=\"0\" dx=\"3\" dy=\"3\" layer=\"1\"/>\n<smd name=\"2\" x=\"6.5\" y=\"0\" dx=\"3\" dy=\"3\" layer=\"1\"/>\n</package>\n<package name=\"BUZZER-12MM-NS\">\n<circle x=\"0\" y=\"0\" radius=\"5.9\" width=\"0.2032\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"1.27\" width=\"0.2032\" layer=\"51\"/>\n<pad name=\"-\" x=\"-3.25\" y=\"0\" drill=\"0.9\"/>\n<pad name=\"+\" x=\"3.25\" y=\"0\" drill=\"0.9\"/>\n<text x=\"-2.54\" y=\"2.54\" size=\"0.6096\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-3.048\" size=\"0.6096\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"2.667\" y=\"1.143\" size=\"1.778\" layer=\"51\">+</text>\n</package>\n<package name=\"BUZZER-12MM-NS-KIT\">\n<description>&lt;h3&gt;BUZZER-12MM-NS-KIT&lt;/h3&gt;\nThrough-hole buzzer&lt;br&gt;\n&lt;br&gt;\n&lt;b&gt;Warning:&lt;/b&gt; This is the KIT version of this package. This package has a smaller diameter top stop mask, which doesn't cover the diameter of the pad. This means only the bottom side of the pads' copper will be exposed. You'll only be able to solder to the bottom side.</description>\n<circle x=\"0\" y=\"0\" radius=\"5.9\" width=\"0.2032\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"1.27\" width=\"0.2032\" layer=\"51\"/>\n<pad name=\"-\" x=\"-3.25\" y=\"0\" drill=\"0.9\" diameter=\"1.8796\" stop=\"no\"/>\n<pad name=\"+\" x=\"3.25\" y=\"0\" drill=\"0.9\" diameter=\"1.8796\" stop=\"no\"/>\n<text x=\"-2.54\" y=\"2.54\" size=\"0.6096\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-3.048\" size=\"0.6096\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"2.667\" y=\"1.143\" size=\"1.778\" layer=\"51\">+</text>\n<polygon width=\"0.127\" layer=\"30\">\n<vertex x=\"3.2537\" y=\"-0.9525\" curve=\"-90\"/>\n<vertex x=\"2.2988\" y=\"-0.0228\" curve=\"-90.011749\"/>\n<vertex x=\"3.2512\" y=\"0.9526\" curve=\"-90\"/>\n<vertex x=\"4.2012\" y=\"-0.0254\" curve=\"-90.024193\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"29\">\n<vertex x=\"3.2512\" y=\"-0.4445\" curve=\"-90.012891\"/>\n<vertex x=\"2.8067\" y=\"-0.0203\" curve=\"-90\"/>\n<vertex x=\"3.2512\" y=\"0.447\" curve=\"-90\"/>\n<vertex x=\"3.6931\" y=\"-0.0101\" curve=\"-90.012967\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"30\">\n<vertex x=\"-3.2487\" y=\"-0.9525\" curve=\"-90\"/>\n<vertex x=\"-4.2036\" y=\"-0.0228\" curve=\"-90.011749\"/>\n<vertex x=\"-3.2512\" y=\"0.9526\" curve=\"-90\"/>\n<vertex x=\"-2.3012\" y=\"-0.0254\" curve=\"-90.024193\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"29\">\n<vertex x=\"-3.2512\" y=\"-0.4445\" curve=\"-90.012891\"/>\n<vertex x=\"-3.6957\" y=\"-0.0203\" curve=\"-90\"/>\n<vertex x=\"-3.2512\" y=\"0.447\" curve=\"-90\"/>\n<vertex x=\"-2.8093\" y=\"-0.0101\" curve=\"-90.012967\"/>\n</polygon>\n</package>\n<package name=\"BUZZER-CCV-KIT\">\n<description>&lt;h3&gt;BUZZER-CCV-KIT&lt;/h3&gt;\nSMD Buzzer&lt;br&gt;\n&lt;br&gt;\n&lt;b&gt;Warning:&lt;/b&gt; This is the KIT version of this package. This package has longer pads to aid in hand soldering.</description>\n<wire x1=\"2.6\" y1=\"-6\" x2=\"-2.6\" y2=\"-6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2.6\" y1=\"-6\" x2=\"2.6\" y2=\"-3.7\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.6\" y1=\"-6\" x2=\"-2.6\" y2=\"-3.7\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-4.2\" y1=\"1.6\" x2=\"1.27\" y2=\"4.318\" width=\"0.2032\" layer=\"21\" curve=\"-86.141052\"/>\n<wire x1=\"3.048\" y1=\"3.302\" x2=\"4.191\" y2=\"1.651\" width=\"0.2032\" layer=\"21\" curve=\"-25.69541\"/>\n<wire x1=\"4.2\" y1=\"-1.6\" x2=\"2.6\" y2=\"-3.7\" width=\"0.2032\" layer=\"21\" curve=\"-31.605028\"/>\n<wire x1=\"-3.302\" y1=\"-3.048\" x2=\"-2.6\" y2=\"-3.6\" width=\"0.2032\" layer=\"21\" curve=\"12.917633\"/>\n<wire x1=\"-2.6\" y1=\"-6\" x2=\"2.6\" y2=\"-6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.6\" y1=\"-6\" x2=\"2.6\" y2=\"-3.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.6\" y1=\"-6\" x2=\"-2.6\" y2=\"-3.6\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"4.5\" width=\"0.127\" layer=\"51\"/>\n<smd name=\"-\" x=\"-4.15\" y=\"0\" dx=\"3.5\" dy=\"2\" layer=\"1\"/>\n<smd name=\"+\" x=\"4.15\" y=\"0\" dx=\"3.5\" dy=\"2\" layer=\"1\"/>\n<rectangle x1=\"-5.2\" y1=\"-0.75\" x2=\"-2.9\" y2=\"0.75\" layer=\"51\"/>\n<rectangle x1=\"2.9\" y1=\"-0.75\" x2=\"5.2\" y2=\"0.75\" layer=\"51\" rot=\"R180\"/>\n<hole x=\"-3.9\" y=\"-2.25\" drill=\"0.8\"/>\n<hole x=\"2.25\" y=\"3.9\" drill=\"0.8\"/>\n</package>\n<package name=\"CAPSENSE_PAD\">\n<wire x1=\"-6.1\" y1=\"6.2\" x2=\"6.2\" y2=\"6.2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"6.2\" y1=\"6.2\" x2=\"6.2\" y2=\"-6.2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"6.2\" y1=\"-6.2\" x2=\"-6.1\" y2=\"-6.2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-6.1\" y1=\"-6.2\" x2=\"-6.1\" y2=\"6.2\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"0\" y=\"3\" dx=\"12\" dy=\"6.1\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"0\" y=\"-3\" dx=\"12\" dy=\"6.1\" layer=\"1\" rot=\"R180\"/>\n</package>\n<package name=\"ENCODER_LED_2\">\n<description>&lt;h3&gt;2-color Illuminated Rotary Encoder&lt;/h3&gt;</description>\n<wire x1=\"-3.9\" y1=\"6.7\" x2=\"3.9\" y2=\"6.7\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-6.2\" y1=\"1.7\" x2=\"-6.2\" y2=\"5.8938\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.2\" y1=\"5.8938\" x2=\"-5.3938\" y2=\"6.7\" width=\"0.2032\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-5.3938\" y1=\"6.7\" x2=\"-3.9\" y2=\"6.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.4\" y1=\"-6.7\" x2=\"-3.4\" y2=\"-6.7\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-6.2\" y1=\"-1.7\" x2=\"-6.2\" y2=\"1.7\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"6.2\" y1=\"1.7\" x2=\"6.2\" y2=\"-1.7\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"6.2\" y1=\"5.8938\" x2=\"5.3938\" y2=\"6.7\" width=\"0.2032\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"5.3938\" y1=\"6.7\" x2=\"3.9\" y2=\"6.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.2\" y1=\"1.7\" x2=\"6.2\" y2=\"5.8938\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.2\" y1=\"-1.7\" x2=\"6.2\" y2=\"-5.8938\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.2\" y1=\"-5.8938\" x2=\"5.3938\" y2=\"-6.7\" width=\"0.2032\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"5.3938\" y1=\"-6.7\" x2=\"3.4\" y2=\"-6.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.2\" y1=\"-5.8938\" x2=\"-5.3938\" y2=\"-6.7\" width=\"0.2032\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.3938\" y1=\"-6.7\" x2=\"-3.4\" y2=\"-6.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.2\" y1=\"-1.7\" x2=\"-6.2\" y2=\"-5.8938\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"3\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"A\" x=\"-2.5\" y=\"-7.5\" drill=\"1.1\" diameter=\"1.8\"/>\n<pad name=\"C\" x=\"0\" y=\"-7.5\" drill=\"1.1\" diameter=\"1.8\"/>\n<pad name=\"B\" x=\"2.5\" y=\"-7.5\" drill=\"1.1\" diameter=\"1.8\"/>\n<pad name=\"+G\" x=\"1\" y=\"7\" drill=\"1.1\" diameter=\"1.778\"/>\n<pad name=\"+R\" x=\"-1\" y=\"7\" drill=\"1.1\" diameter=\"1.778\"/>\n<pad name=\"P$1\" x=\"-5.55\" y=\"0\" drill=\"2.1\"/>\n<pad name=\"P$2\" x=\"5.55\" y=\"0\" drill=\"2.1\"/>\n<pad name=\"GND\" x=\"3\" y=\"7\" drill=\"1.1\" diameter=\"1.778\"/>\n<pad name=\"SW\" x=\"-3\" y=\"7\" drill=\"1.1\" diameter=\"1.778\"/>\n</package>\n<package name=\"ENCODER_LED_3\">\n<wire x1=\"-3.9\" y1=\"6.7\" x2=\"3.9\" y2=\"6.7\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-6.2\" y1=\"1.7\" x2=\"-6.2\" y2=\"5.8938\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.2\" y1=\"5.8938\" x2=\"-5.3938\" y2=\"6.7\" width=\"0.2032\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-5.3938\" y1=\"6.7\" x2=\"-3.9\" y2=\"6.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.4\" y1=\"-6.7\" x2=\"-3.4\" y2=\"-6.7\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-6.2\" y1=\"-1.7\" x2=\"-6.2\" y2=\"1.7\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"6.2\" y1=\"1.7\" x2=\"6.2\" y2=\"-1.7\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"6.2\" y1=\"5.8938\" x2=\"5.3938\" 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layer=\"21\"/>\n<wire x1=\"-1.046446875\" y1=\"0.353553125\" x2=\"-1.046446875\" y2=\"-0.353553125\" width=\"0.2032\" layer=\"21\" curve=\"90\"/>\n<circle x=\"0\" y=\"0\" radius=\"1.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"2.5\" x2=\"1\" y2=\"3.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"2.5\" x2=\"-1\" y2=\"3.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.3\" y1=\"1.3\" x2=\"-2.2\" y2=\"2.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.2\" y1=\"2.2\" x2=\"-1.6\" y2=\"2.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.2\" y1=\"2.2\" x2=\"-2.2\" y2=\"1.6\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"-2.9\" y=\"1.9\" size=\"0.8128\" layer=\"21\" ratio=\"20\" rot=\"SR45\">UP</text>\n<wire x1=\"-1\" y1=\"3.5\" x2=\"1\" y2=\"3.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.65\" y1=\"-3.5\" x2=\"-2.65\" y2=\"-3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.65\" y1=\"-3.5\" x2=\"-3.65\" y2=\"-2.5\" width=\"0.2032\" layer=\"51\"/>\n<wire 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y1=\"-0.353553125\" x2=\"1.046446875\" y2=\"0.353553125\" width=\"0.2032\" layer=\"51\" curve=\"90\"/>\n<wire x1=\"1.046446875\" y1=\"0.353553125\" x2=\"0.353553125\" y2=\"1.046446875\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.353553125\" y1=\"1.046446875\" x2=\"-0.353553125\" y2=\"1.046446875\" width=\"0.2032\" layer=\"51\" curve=\"90\"/>\n<wire x1=\"-0.353553125\" y1=\"1.046446875\" x2=\"-1.046446875\" y2=\"0.353553125\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.046446875\" y1=\"0.353553125\" x2=\"-1.046446875\" y2=\"-0.353553125\" width=\"0.2032\" layer=\"51\" curve=\"90\"/>\n<circle x=\"0\" y=\"0\" radius=\"1.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"2.5\" x2=\"1\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"2.5\" x2=\"-1\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.3\" y1=\"1.3\" x2=\"-2.2\" y2=\"2.2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.2\" y1=\"2.2\" x2=\"-1.6\" y2=\"2.2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.2\" y1=\"2.2\" x2=\"-2.2\" y2=\"1.6\" width=\"0.2032\" layer=\"51\"/>\n<text x=\"-2.9\" y=\"1.9\" size=\"0.8128\" layer=\"51\" ratio=\"20\" rot=\"SR45\">UP</text>\n<wire x1=\"-1\" y1=\"3.5\" x2=\"1\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n</package>\n<package name=\"LIPO-1100\">\n<wire x1=\"0\" y1=\"0\" x2=\"35.56\" y2=\"0\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"35.56\" y1=\"0\" x2=\"35.56\" y2=\"53.34\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"35.56\" y1=\"53.34\" x2=\"0\" y2=\"53.34\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"53.34\" x2=\"0\" y2=\"0\" width=\"0.2032\" layer=\"51\"/>\n<text x=\"1.27\" y=\"1.27\" size=\"1.27\" layer=\"51\">LiPo 1100mAh</text>\n</package>\n<package name=\"LIPO-2000\">\n<wire x1=\"0\" y1=\"0\" x2=\"0\" y2=\"22.86\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"22.86\" x2=\"0\" y2=\"24.13\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"24.13\" x2=\"0\" y2=\"31.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"31.75\" x2=\"0\" y2=\"33.02\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"33.02\" x2=\"0\" y2=\"54.61\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"54.61\" x2=\"62.23\" y2=\"54.61\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"62.23\" y1=\"54.61\" x2=\"62.23\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"62.23\" y1=\"0\" x2=\"0\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"22.86\" x2=\"-2.54\" y2=\"22.86\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.54\" y1=\"22.86\" x2=\"-2.54\" y2=\"24.13\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.54\" y1=\"24.13\" x2=\"0\" y2=\"24.13\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"31.75\" x2=\"-2.54\" y2=\"31.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.54\" y1=\"31.75\" x2=\"-2.54\" y2=\"33.02\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.54\" y1=\"33.02\" x2=\"0\" y2=\"33.02\" width=\"0.127\" layer=\"51\"/>\n<text x=\"1.27\" y=\"1.27\" size=\"1.27\" layer=\"51\">LiPo 2000mAh</text>\n</package>\n<package name=\"LIPO-100\">\n<wire x1=\"0\" y1=\"0\" x2=\"0\" y2=\"15\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"15\" x2=\"29\" y2=\"15\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"29\" y1=\"15\" x2=\"29\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"29\" y1=\"0\" x2=\"0\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n</package>\n<package name=\"MAGNET-18MM\">\n<circle x=\"0\" y=\"0\" radius=\"9\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"-3\" y=\"2\" size=\"1.27\" layer=\"25\">&gt;Name</text>\n<text x=\"-3\" y=\"0\" size=\"1.27\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"VIBE-MOTOR-10MM\">\n<wire x1=\"-1.5\" y1=\"-4.8\" x2=\"-1.5\" y2=\"-7.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-7.8\" x2=\"1.5\" y2=\"-7.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"-7.8\" x2=\"1.5\" y2=\"-4.8\" width=\"0.127\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"5.0009\" width=\"0.127\" layer=\"51\"/>\n<pad name=\"+\" x=\"-5\" y=\"-3.9\" drill=\"0.8\" diameter=\"1.6764\"/>\n<pad name=\"-\" x=\"-6.35\" y=\"-2.54\" drill=\"0.8\" diameter=\"1.6764\"/>\n<text x=\"-6.8\" y=\"-2\" size=\"1.27\" layer=\"21\">-</text>\n<text x=\"-4.7\" y=\"-5.3\" size=\"1.27\" layer=\"21\">+</text>\n</package>\n<package name=\"N35P112\">\n<wire x1=\"-5.4\" y1=\"5.25\" x2=\"5.4\" y2=\"5.25\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"5.4\" y1=\"5.25\" x2=\"5.4\" y2=\"-5.25\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"5.4\" y1=\"-5.25\" x2=\"-5.4\" y2=\"-5.25\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-5.4\" y1=\"-5.25\" x2=\"-5.4\" y2=\"5.25\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3\" y1=\"5.3\" x2=\"3\" y2=\"5.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3\" y1=\"-5.3\" x2=\"3\" y2=\"-5.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.4\" y1=\"3\" x2=\"5.4\" y2=\"-3\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"5\" x=\"-4.4\" y=\"0\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"13\" x=\"-4.45\" y=\"-4.7\" dx=\"2.2\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"6\" x=\"-4.4\" y=\"0.6\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"7\" x=\"-4.4\" y=\"1.2\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"8\" x=\"-4.4\" y=\"1.8\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"9\" x=\"-4.4\" y=\"2.4\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-4.4\" y=\"-0.6\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"-4.4\" y=\"-1.2\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"-4.4\" y=\"-1.8\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"1\" x=\"-4.4\" y=\"-2.4\" dx=\"1.65\" dy=\"0.3\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"12\" x=\"4.45\" y=\"-4.7\" dx=\"2.2\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"10\" x=\"-4.45\" y=\"4.5\" dx=\"2.2\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd 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y2=\"-4.9\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.7\" y1=\"1.4\" x2=\"6.7\" y2=\"1.1\" width=\"0.2032\" layer=\"21\"/>\n</package>\n<package name=\"TRIM_POT\">\n<pad name=\"2\" x=\"0\" y=\"2.54\" drill=\"1\" diameter=\"1.8796\"/>\n<pad name=\"3\" x=\"0\" y=\"-2.54\" drill=\"1\" diameter=\"1.8796\"/>\n<pad name=\"1\" x=\"5.08\" y=\"0\" drill=\"1\" diameter=\"1.8796\"/>\n</package>\n<package name=\"3362U\">\n<wire x1=\"-1.27\" y1=\"-1.016\" x2=\"6.35\" y2=\"-1.016\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"-1.016\" x2=\"6.35\" y2=\"6.096\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"6.096\" x2=\"-1.27\" y2=\"6.096\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"6.096\" x2=\"-1.27\" y2=\"-1.016\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"6.35\" y2=\"-1.27\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"0\" y=\"2.54\" drill=\"1.016\" diameter=\"1.8796\" shape=\"square\"/>\n<pad name=\"P$2\" x=\"2.54\" y=\"2.54\" drill=\"1.016\" diameter=\"1.8796\"/>\n<pad name=\"P$3\" x=\"5.08\" y=\"2.54\" drill=\"1.016\" diameter=\"1.8796\"/>\n<text x=\"2.54\" y=\"0.635\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"2.54\" y=\"0\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"POT_ALPHA_RV16AF-20\">\n<description>Package for Alpha RV16AF-20 potentiometer</description>\n<wire x1=\"-8.5\" y1=\"0\" x2=\"-8.5\" y2=\"5.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-8.5\" y1=\"5.3\" x2=\"8.5\" y2=\"5.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"8.5\" y1=\"5.3\" x2=\"8.5\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-8.5\" y1=\"0\" x2=\"-6.5\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.5\" y1=\"0\" x2=\"8.5\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3\" y1=\"0\" x2=\"-3\" y2=\"-17\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3\" y1=\"-17\" x2=\"3\" y2=\"-17\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3\" y1=\"-17\" x2=\"3\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3.5\" y1=\"0\" x2=\"-1.5\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.5\" y1=\"0\" x2=\"3.5\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5\" y=\"0\" drill=\"1.5\" diameter=\"2.54\"/>\n<pad name=\"2\" x=\"0\" y=\"0\" drill=\"1.5\" diameter=\"2.54\"/>\n<pad name=\"3\" x=\"5\" y=\"0\" drill=\"1.5\" diameter=\"2.54\"/>\n<text x=\"-3\" y=\"2.5\" size=\"1.27\" layer=\"21\">&gt;Value</text>\n<text x=\"-8.4\" y=\"5.6\" size=\"1.27\" layer=\"25\">&gt;Name</text>\n</package>\n<package name=\"POT_MAMMOTH\">\n<wire x1=\"0\" y1=\"0\" x2=\"7.62\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"0\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-7.62\" y1=\"0.03\" x2=\"-7.62\" y2=\"12.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"7.62\" y1=\"0.03\" x2=\"7.62\" y2=\"12.75\" width=\"0.127\" layer=\"51\"/>\n<circle x=\"0\" y=\"16.03\" radius=\"8.293\" width=\"0.127\" layer=\"21\"/>\n<circle x=\"0\" y=\"16.3\" radius=\"3.4\" width=\"0.127\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-4.73\" y=\"-0.02\" drill=\"1.1\"/>\n<pad name=\"P$2\" x=\"0\" y=\"-0.02\" drill=\"1.1\"/>\n<pad name=\"P$3\" x=\"4.67\" y=\"-0.01\" drill=\"1.1\"/>\n</package>\n<package name=\"POT_PTH\">\n<wire x1=\"-8.5\" y1=\"0\" x2=\"-8.5\" y2=\"13.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"8.5\" y1=\"13.3\" x2=\"8.5\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-8.5\" y1=\"0\" x2=\"-7\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"7\" y1=\"0\" x2=\"8.5\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3\" y1=\"0\" x2=\"-3\" y2=\"-17\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3\" y1=\"-17\" x2=\"3\" y2=\"-17\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3\" y1=\"-17\" x2=\"3\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3\" y1=\"0\" x2=\"-2\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"0\" x2=\"3\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-8.5\" y1=\"13.3\" x2=\"-4.25\" y2=\"13.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.75\" y1=\"13.3\" x2=\"1.75\" y2=\"13.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.25\" y1=\"13.3\" x2=\"8.5\" y2=\"13.3\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"E@1\" x=\"-5\" y=\"0\" drill=\"2.1\"/>\n<pad name=\"WAND\" x=\"0\" y=\"0\" drill=\"2.1\"/>\n<pad name=\"E@2\" x=\"5\" y=\"0\" drill=\"2.1\"/>\n<pad name=\"S1\" x=\"-3\" y=\"14\" drill=\"1.5\"/>\n<pad name=\"S2\" x=\"3\" y=\"14\" drill=\"1.5\"/>\n<text x=\"-7\" y=\"9\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-7\" y=\"8\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"RELAY-G5V\">\n<description>G5Q SPDT Relay (SparkFun SKU: COM-00100). Footprint should also work with SPST-NO relay.</description>\n<wire x1=\"6.35\" y1=\"3.81\" x2=\"6.35\" y2=\"-3.81\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"-3.81\" x2=\"-6.35\" y2=\"-3.81\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.35\" y1=\"-3.81\" x2=\"-6.35\" y2=\"3.81\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.35\" y1=\"3.81\" x2=\"6.35\" y2=\"3.81\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"6\" x=\"-5.08\" y=\"-2.54\" drill=\"1.016\"/>\n<pad name=\"9\" x=\"2.54\" y=\"-2.54\" drill=\"1.016\"/>\n<pad name=\"10\" x=\"5.08\" y=\"-2.54\" drill=\"1.016\"/>\n<pad name=\"1\" x=\"5.08\" y=\"2.54\" drill=\"1.016\"/>\n<pad name=\"5\" x=\"-5.08\" y=\"2.54\" drill=\"1.016\"/>\n<pad name=\"2\" x=\"2.54\" y=\"2.54\" drill=\"1.016\"/>\n<text x=\"-2.54\" y=\"0\" size=\"0.6096\" layer=\"25\">&gt;Name</text>\n<text x=\"-2.54\" y=\"-1.27\" size=\"0.6096\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"RELAY-G5Q\">\n<wire x1=\"10.16\" y1=\"5.08\" x2=\"10.16\" y2=\"-5.08\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"10.16\" y1=\"-5.08\" x2=\"-10.16\" y2=\"-5.08\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-10.16\" y1=\"-5.08\" x2=\"-10.16\" y2=\"5.08\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-10.16\" y1=\"5.08\" x2=\"10.16\" y2=\"5.08\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"4\" x=\"-6.35\" y=\"-3.81\" drill=\"1.3\"/>\n<pad name=\"5\" x=\"8.89\" y=\"-3.81\" drill=\"1.3\"/>\n<pad name=\"1\" x=\"8.89\" y=\"3.81\" drill=\"1.3\"/>\n<pad name=\"3\" x=\"-8.89\" y=\"3.81\" drill=\"1.3\"/>\n<pad name=\"2\" x=\"-1.27\" y=\"3.81\" drill=\"1.3\"/>\n<text x=\"-1.27\" y=\"0\" size=\"0.6096\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.27\" y=\"-1.27\" size=\"0.6096\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"TACTILE-PTH-SIDEEZ\">\n<wire x1=\"1.5\" y1=\"-3.8\" x2=\"-1.5\" y2=\"-3.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.65\" y1=\"-2\" x2=\"-3.65\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.65\" y1=\"3.5\" x2=\"-3\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3\" y1=\"3.5\" x2=\"3.65\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.65\" y1=\"3.5\" x2=\"3.65\" y2=\"-2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3\" y1=\"2\" x2=\"3\" y2=\"2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3\" y1=\"2\" x2=\"-3\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3\" y1=\"2\" x2=\"3\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.65\" y1=\"-2\" x2=\"-1.5\" y2=\"-2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-2\" x2=\"1.5\" y2=\"-2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"-2\" x2=\"3.65\" y2=\"-2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"-2\" x2=\"1.5\" y2=\"-3.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-2\" x2=\"-1.5\" y2=\"-3.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.65\" y1=\"1\" x2=\"-3.65\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.65\" y1=\"-2\" x2=\"3.65\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.65\" y1=\"-2\" x2=\"3.65\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"2\" x2=\"-2\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"ANCHOR1\" x=\"-3.5\" y=\"2.5\" drill=\"1.2\" diameter=\"2.2\" stop=\"no\"/>\n<pad name=\"ANCHOR2\" x=\"3.5\" y=\"2.5\" drill=\"1.2\" diameter=\"2.2\" stop=\"no\"/>\n<pad name=\"1\" x=\"-2.5\" y=\"0\" drill=\"0.8\" diameter=\"1.7\" stop=\"no\"/>\n<pad name=\"2\" x=\"2.5\" y=\"0\" drill=\"0.8\" diameter=\"1.7\" stop=\"no\"/>\n<text x=\"-2.54\" y=\"3.81\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<circle x=\"2.5\" y=\"0\" radius=\"0.4445\" width=\"0\" layer=\"29\"/>\n<circle x=\"-2.5\" y=\"0\" radius=\"0.4445\" width=\"0\" layer=\"29\"/>\n<circle x=\"-3.5\" y=\"2.5\" radius=\"0.635\" width=\"0\" layer=\"29\"/>\n<circle x=\"3.5\" y=\"2.5\" radius=\"0.635\" width=\"0\" layer=\"29\"/>\n<circle x=\"-3.5\" y=\"2.5\" radius=\"1.143\" width=\"0\" layer=\"30\"/>\n<circle x=\"2.5\" y=\"0\" radius=\"0.889\" width=\"0\" layer=\"30\"/>\n<circle x=\"-2.5\" y=\"0\" radius=\"0.889\" width=\"0\" layer=\"30\"/>\n<circle x=\"3.5\" y=\"2.5\" radius=\"1.143\" width=\"0\" layer=\"30\"/>\n</package>\n<package name=\"TACTILE-PTH-SIDE\">\n<wire x1=\"1.5\" y1=\"-3.8\" x2=\"-1.5\" y2=\"-3.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.65\" y1=\"-2\" x2=\"-3.65\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.65\" y1=\"3.5\" x2=\"-3\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3\" y1=\"3.5\" x2=\"3.65\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.65\" y1=\"3.5\" x2=\"3.65\" y2=\"-2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3\" y1=\"2\" x2=\"3\" y2=\"2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3\" y1=\"2\" x2=\"-3\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3\" y1=\"2\" x2=\"3\" y2=\"3.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.65\" y1=\"-2\" x2=\"-1.5\" y2=\"-2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-2\" x2=\"1.5\" y2=\"-2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"-2\" x2=\"3.65\" y2=\"-2\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"-2\" x2=\"1.5\" y2=\"-3.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-2\" x2=\"-1.5\" y2=\"-3.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.65\" y1=\"1\" x2=\"-3.65\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.65\" y1=\"-2\" x2=\"3.65\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.65\" y1=\"-2\" x2=\"3.65\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"2\" x2=\"-2\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"ANCHOR1\" x=\"-3.5\" y=\"2.5\" drill=\"1.2\" diameter=\"2.2\"/>\n<pad name=\"ANCHOR2\" x=\"3.5\" y=\"2.5\" drill=\"1.2\" diameter=\"2.2\"/>\n<pad name=\"1\" x=\"-2.5\" y=\"0\" drill=\"0.8\" diameter=\"1.7\"/>\n<pad name=\"2\" x=\"2.5\" y=\"0\" drill=\"0.8\" diameter=\"1.7\"/>\n<text x=\"-2.54\" y=\"3.81\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n</package>\n<package name=\"RELAY-T9A\">\n<description>Big relay. 220V/30A. SparkFun SKU: COM-00101</description>\n<wire x1=\"-12.7\" y1=\"16.256\" x2=\"12.7\" y2=\"16.256\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"13.716\" y1=\"15.24\" x2=\"13.716\" y2=\"-15.24\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"12.7\" y1=\"-16.256\" x2=\"-12.7\" y2=\"-16.256\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-13.716\" y1=\"-15.24\" x2=\"-13.716\" y2=\"15.24\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-13.716\" y1=\"15.24\" x2=\"-12.7\" y2=\"16.256\" width=\"0.2032\" layer=\"21\" curve=\"-83.267079\"/>\n<wire x1=\"13.716\" y1=\"15.24\" x2=\"12.7\" y2=\"16.256\" width=\"0.2032\" layer=\"21\" curve=\"106.260205\"/>\n<wire x1=\"-13.716\" y1=\"-15.24\" x2=\"-12.7\" y2=\"-16.256\" width=\"0.2032\" layer=\"21\" curve=\"106.260205\"/>\n<wire x1=\"12.7\" y1=\"-16.256\" x2=\"13.716\" y2=\"-15.24\" width=\"0.2032\" layer=\"21\" curve=\"106.260205\"/>\n<pad name=\"NC\" x=\"9.906\" y=\"12.7\" drill=\"2.0574\"/>\n<pad name=\"NO\" x=\"9.906\" y=\"5.08\" drill=\"2.0574\"/>\n<pad name=\"MAIN\" x=\"-7.874\" y=\"2.54\" drill=\"2.0574\"/>\n<pad name=\"COIL1\" x=\"-4.064\" y=\"-10.16\" drill=\"1.0922\"/>\n<pad name=\"COIL2\" x=\"6.096\" y=\"-10.16\" drill=\"1.0922\"/>\n<text x=\"-11.43\" y=\"13.97\" size=\"0.6096\" layer=\"25\">&gt;Name</text>\n<text x=\"-11.43\" y=\"12.7\" size=\"0.6096\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"RELAY-T9A-2\">\n<wire x1=\"-12.7\" y1=\"16.15\" x2=\"12.7\" y2=\"16.15\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"13.7\" y1=\"15.24\" x2=\"13.7\" y2=\"4.1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-13.7\" y1=\"-0.7\" x2=\"-13.7\" y2=\"15.24\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-13.7\" y1=\"15.24\" x2=\"-12.7\" y2=\"16.15\" width=\"0.2032\" layer=\"21\" curve=\"-83.277195\"/>\n<wire x1=\"13.7\" y1=\"15.24\" x2=\"12.7\" y2=\"16.15\" width=\"0.2032\" layer=\"21\" curve=\"106.274874\"/>\n<wire x1=\"-13\" y1=\"-1.45\" x2=\"-12.4\" y2=\"-1.45\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"8.9\" y1=\"3.35\" x2=\"13\" y2=\"3.35\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-11.7\" y1=\"-2.2\" x2=\"-11.7\" y2=\"-15.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"8.2\" y1=\"2.6\" x2=\"8.2\" y2=\"-15.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-11\" y1=\"-16.15\" x2=\"7.5\" y2=\"-16.15\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-13\" y1=\"-1.45\" x2=\"-13.7\" y2=\"-0.7\" width=\"0.2032\" layer=\"21\" curve=\"-91.407384\"/>\n<wire x1=\"-12.4\" y1=\"-1.45\" x2=\"-11.7\" y2=\"-2.2\" width=\"0.2032\" layer=\"21\" curve=\"-83.263707\"/>\n<wire x1=\"-11\" y1=\"-16.15\" x2=\"-11.7\" y2=\"-15.5\" width=\"0.2032\" layer=\"21\" curve=\"-73.735867\"/>\n<wire x1=\"8.2\" y1=\"-15.4\" x2=\"7.5\" y2=\"-16.15\" width=\"0.2032\" layer=\"21\" curve=\"-83.263707\"/>\n<wire x1=\"8.2\" y1=\"2.6\" x2=\"8.9\" y2=\"3.35\" width=\"0.2032\" layer=\"21\" curve=\"-83.263707\"/>\n<wire x1=\"13.7\" y1=\"4.1\" x2=\"13\" y2=\"3.35\" width=\"0.2032\" layer=\"21\" curve=\"-83.263707\"/>\n<pad name=\"NC\" x=\"7.35\" y=\"12.6\" drill=\"2\"/>\n<pad name=\"NO\" x=\"7.35\" y=\"4.97\" drill=\"2\"/>\n<pad name=\"MAIN\" x=\"-10.41\" y=\"2.43\" drill=\"2.0574\"/>\n<pad name=\"COIL1\" x=\"-6.61\" y=\"-10.27\" drill=\"1.1\"/>\n<pad name=\"COIL2\" x=\"3.55\" y=\"-10.27\" drill=\"1.1\"/>\n<text x=\"-11.43\" y=\"13.97\" size=\"0.6096\" layer=\"25\">&gt;Name</text>\n<text x=\"-11.43\" y=\"12.7\" size=\"0.6096\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"RELAY-JZC\">\n<wire x1=\"5\" y1=\"-10.5\" x2=\"-5\" y2=\"-10.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5\" y1=\"-10.5\" x2=\"-5\" y2=\"8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5\" y1=\"8\" x2=\"5\" y2=\"8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5\" y1=\"8\" x2=\"5\" y2=\"-10.5\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"4\" x=\"3.81\" y=\"3.81\" drill=\"1.3\" diameter=\"2.286\" rot=\"R270\"/>\n<pad name=\"5\" x=\"-3.81\" y=\"-8.89\" drill=\"1.3\" diameter=\"2.286\" rot=\"R270\"/>\n<pad name=\"1\" x=\"3.81\" y=\"-8.89\" drill=\"1.3\" diameter=\"2.286\" rot=\"R270\"/>\n<pad name=\"3\" x=\"-3.81\" y=\"6.35\" drill=\"1.3\" diameter=\"2.286\" rot=\"R270\"/>\n<pad name=\"2\" x=\"-3.81\" y=\"1.651\" drill=\"1.3\" diameter=\"2.286\" rot=\"R270\"/>\n<text x=\"0\" y=\"1.27\" size=\"0.6096\" layer=\"25\" rot=\"R270\">&gt;Name</text>\n<text x=\"-1.27\" y=\"1.27\" size=\"0.6096\" layer=\"27\" rot=\"R270\">&gt;Value</text>\n</package>\n<package name=\"RELAY-S108T02\">\n<wire x1=\"-11.5\" y1=\"2\" x2=\"11.5\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"11.5\" y1=\"2\" x2=\"11.5\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"11.5\" y1=\"-1\" x2=\"11.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"11.5\" y1=\"-2\" x2=\"-11.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-11.5\" y1=\"-2\" x2=\"-11.5\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-11.5\" y1=\"-1\" x2=\"-11.5\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-11.5\" y1=\"-1\" x2=\"11.5\" y2=\"-1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-10.2\" y1=\"-1\" x2=\"-11.5\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-7.6\" y1=\"-1\" x2=\"-5.1\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.5\" y1=\"-1\" x2=\"5.1\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"11.5\" y1=\"-1\" x2=\"10.2\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"-8.88\" y=\"0\" drill=\"1.1\" diameter=\"2.032\"/>\n<pad name=\"2\" x=\"-3.8\" y=\"0\" drill=\"1.1\" diameter=\"2.032\"/>\n<pad name=\"3\" x=\"6.36\" y=\"0\" drill=\"1.1\" diameter=\"2.032\"/>\n<pad name=\"4\" x=\"8.9\" y=\"0\" drill=\"1.1\" diameter=\"2.032\"/>\n</package>\n<package name=\"SLIDER\">\n<wire x1=\"-44.15\" y1=\"-6.25\" x2=\"44.15\" y2=\"-6.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"44.15\" y1=\"-6.25\" x2=\"44.15\" y2=\"6.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"44.15\" y1=\"6.25\" x2=\"-44.15\" y2=\"6.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-44.15\" y1=\"6.25\" x2=\"-44.15\" y2=\"-6.25\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"-40\" y=\"0\" radius=\"0.7\" width=\"0.5\" layer=\"21\"/>\n<circle x=\"40\" y=\"0\" radius=\"0.7\" width=\"0.5\" layer=\"21\"/>\n<pad name=\"2A\" x=\"-40\" y=\"-3\" drill=\"2.8\" diameter=\"4.064\"/>\n<pad name=\"1\" x=\"-35\" y=\"2\" drill=\"2.8\" diameter=\"4.064\"/>\n<pad name=\"3\" x=\"35\" y=\"2\" drill=\"2.8\" diameter=\"4.064\"/>\n</package>\n<package name=\"STAND-OFF\">\n<description>&lt;b&gt;Stand Off&lt;/b&gt;&lt;p&gt;\nThis is the mechanical footprint for a #4 phillips button head screw. Use the keepout ring to avoid running the screw head into surrounding components. SKU : PRT-00447</description>\n<wire x1=\"0\" y1=\"1.8542\" x2=\"0\" y2=\"-1.8542\" width=\"0.2032\" layer=\"41\" curve=\"-180\"/>\n<wire x1=\"0\" y1=\"-1.8542\" x2=\"0\" y2=\"1.8542\" width=\"0.2032\" layer=\"41\" curve=\"-180\"/>\n<wire x1=\"0\" y1=\"-1.8542\" x2=\"0\" y2=\"1.8542\" width=\"0.2032\" layer=\"42\" curve=\"180\"/>\n<wire x1=\"0\" y1=\"-1.8542\" x2=\"0\" y2=\"1.8542\" width=\"0.2032\" layer=\"42\" curve=\"-180\"/>\n<circle x=\"0\" y=\"0\" radius=\"2.794\" width=\"0.127\" layer=\"39\"/>\n<hole x=\"0\" y=\"0\" drill=\"3.302\"/>\n</package>\n<package name=\"STAND-OFF-TIGHT\">\n<description>&lt;b&gt;Stand Off&lt;/b&gt;&lt;p&gt;\nThis is the mechanical footprint for a #4 phillips button head screw. Use the keepout ring to avoid running the screw head into surrounding components. SKU : PRT-00447</description>\n<wire x1=\"0\" y1=\"1.8542\" x2=\"0\" y2=\"-1.8542\" width=\"0.2032\" layer=\"41\" curve=\"-180\"/>\n<wire x1=\"0\" y1=\"-1.8542\" x2=\"0\" y2=\"1.8542\" width=\"0.2032\" layer=\"41\" curve=\"-180\"/>\n<wire x1=\"0\" y1=\"-1.8542\" x2=\"0\" y2=\"1.8542\" width=\"0.2032\" layer=\"42\" curve=\"180\"/>\n<wire x1=\"0\" y1=\"-1.8542\" x2=\"0\" y2=\"1.8542\" width=\"0.2032\" layer=\"42\" curve=\"-180\"/>\n<circle x=\"0\" y=\"0\" radius=\"2.794\" width=\"0.127\" layer=\"39\"/>\n<hole x=\"0\" y=\"0\" drill=\"3.048\"/>\n</package>\n<package name=\"SWITCH-4PDT-CNK\">\n<wire x1=\"0\" y1=\"3.81\" x2=\"-21.59\" y2=\"3.81\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-21.59\" y1=\"3.81\" x2=\"-21.59\" y2=\"2.0066\" width=\"0.127\" layer=\"49\"/>\n<wire x1=\"-21.59\" y1=\"2.0066\" x2=\"-21.59\" y2=\"-2.0066\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-21.59\" y1=\"-2.0066\" x2=\"-21.59\" y2=\"-3.81\" width=\"0.127\" layer=\"49\"/>\n<wire x1=\"-21.59\" y1=\"-3.81\" x2=\"-1.1684\" y2=\"-3.81\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"-1.7018\" x2=\"0\" y2=\"3.81\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-21.59\" y1=\"2.0066\" x2=\"-32.3088\" y2=\"2.0066\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-32.3088\" y1=\"2.0066\" x2=\"-32.3088\" y2=\"-2.0066\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-32.3088\" y1=\"-2.0066\" x2=\"-32.2834\" y2=\"-2.0066\" width=\"0.127\" layer=\"49\"/>\n<wire x1=\"-32.2834\" y1=\"-2.0066\" x2=\"-21.59\" y2=\"-2.0066\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-32.3088\" y1=\"2.0066\" x2=\"-34.798\" y2=\"2.0066\" width=\"0.127\" layer=\"51\" style=\"shortdash\"/>\n<wire x1=\"-34.798\" y1=\"2.0066\" x2=\"-34.798\" y2=\"-2.0066\" width=\"0.127\" layer=\"51\" style=\"shortdash\"/>\n<wire x1=\"-34.798\" y1=\"-2.0066\" x2=\"-32.2834\" y2=\"-2.0066\" width=\"0.127\" layer=\"51\" style=\"shortdash\"/>\n<wire x1=\"-25.4\" y1=\"3.81\" x2=\"-39.37\" y2=\"3.81\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-39.37\" y1=\"3.81\" x2=\"-39.37\" y2=\"-3.81\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-39.37\" y1=\"-3.81\" x2=\"-25.4\" y2=\"-3.81\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-25.4\" y1=\"-3.81\" x2=\"-25.4\" y2=\"3.81\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-39.37\" y1=\"3.81\" x2=\"-41.91\" y2=\"3.81\" width=\"0.127\" layer=\"51\" style=\"shortdash\"/>\n<wire x1=\"-41.91\" y1=\"3.81\" x2=\"-41.91\" y2=\"-3.81\" width=\"0.127\" layer=\"51\" style=\"shortdash\"/>\n<wire x1=\"-41.91\" y1=\"-3.81\" x2=\"-39.37\" y2=\"-3.81\" width=\"0.127\" layer=\"51\" style=\"shortdash\"/>\n<pad name=\"PP$7\" x=\"-18.415\" y=\"1.8034\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$1\" x=\"-18.415\" y=\"-1.2446\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$8\" x=\"-15.24\" y=\"1.2446\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$2\" x=\"-15.24\" y=\"-1.8034\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$9\" x=\"-12.065\" y=\"1.8034\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$3\" x=\"-12.065\" y=\"-1.2446\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$10\" x=\"-8.89\" y=\"1.1938\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$4\" x=\"-8.89\" y=\"-1.8034\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$11\" x=\"-5.715\" y=\"1.8034\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$5\" x=\"-5.715\" y=\"-1.2446\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$12\" x=\"-2.54\" y=\"1.2446\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"PP$6\" x=\"-2.54\" y=\"-1.8034\" drill=\"1.4\" shape=\"square\"/>\n<pad name=\"P$13\" x=\"0.2032\" y=\"-2.9972\" drill=\"1.4\" shape=\"square\"/>\n<rectangle x1=\"-18.9459\" y1=\"-1.8186\" x2=\"-17.9045\" y2=\"-1.2344\" layer=\"51\"/>\n<rectangle x1=\"-15.7607\" y1=\"-1.8186\" x2=\"-14.7193\" y2=\"-1.2344\" layer=\"51\"/>\n<rectangle x1=\"-12.5756\" y1=\"-1.8186\" x2=\"-11.5342\" y2=\"-1.2344\" layer=\"51\"/>\n<rectangle x1=\"-9.3904\" y1=\"-1.8186\" x2=\"-8.349\" y2=\"-1.2344\" layer=\"51\"/>\n<rectangle x1=\"-6.2053\" y1=\"-1.8186\" x2=\"-5.1639\" y2=\"-1.2344\" layer=\"51\"/>\n<rectangle x1=\"-3.0201\" y1=\"-1.8186\" x2=\"-1.9787\" y2=\"-1.2344\" layer=\"51\"/>\n<rectangle x1=\"-18.9459\" y1=\"1.2167\" x2=\"-17.9045\" y2=\"1.8009\" layer=\"51\"/>\n<rectangle x1=\"-15.7607\" y1=\"1.2167\" x2=\"-14.7193\" y2=\"1.8009\" layer=\"51\"/>\n<rectangle x1=\"-12.5756\" y1=\"1.2167\" x2=\"-11.5342\" y2=\"1.8009\" layer=\"51\"/>\n<rectangle x1=\"-9.3904\" y1=\"1.2167\" x2=\"-8.349\" y2=\"1.8009\" layer=\"51\"/>\n<rectangle x1=\"-6.2053\" y1=\"1.2167\" x2=\"-5.1639\" y2=\"1.8009\" layer=\"51\"/>\n<rectangle x1=\"-3.0201\" y1=\"1.2167\" x2=\"-1.9787\" y2=\"1.8009\" layer=\"51\"/>\n<rectangle x1=\"-0.6224\" y1=\"-3.2893\" x2=\"0.419\" y2=\"-2.7051\" layer=\"51\" rot=\"R90\"/>\n</package>\n<package name=\"MSS22\">\n<description>MSS22 DPDT Switch</description>\n<wire x1=\"-0.25\" y1=\"-0.5\" x2=\"5.55\" y2=\"-0.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.25\" y1=\"13.5\" x2=\"5.55\" y2=\"13.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.25\" y1=\"13.5\" x2=\"-0.25\" y2=\"-0.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"5.55\" y1=\"13.5\" x2=\"5.55\" y2=\"-0.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.3\" y1=\"11.7\" x2=\"-0.3\" y2=\"1.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"5.6\" y1=\"11.7\" x2=\"5.6\" y2=\"1.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.2\" y1=\"-0.6\" x2=\"4.1\" y2=\"-0.6\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.2\" y1=\"13.6\" x2=\"4.1\" y2=\"13.6\" width=\"0.127\" layer=\"21\"/>\n<pad name=\"NC@3\" x=\"0\" y=\"0\" drill=\"1.35\"/>\n<pad name=\"NC@1\" x=\"0\" y=\"13\" drill=\"1.35\"/>\n<pad name=\"NC@2\" x=\"5.3\" y=\"13\" drill=\"1.35\"/>\n<pad name=\"NC@4\" x=\"5.3\" y=\"0\" drill=\"1.35\"/>\n<pad name=\"6\" x=\"2.65\" y=\"1.5\" drill=\"0.95\"/>\n<pad name=\"5\" x=\"2.65\" y=\"3.5\" drill=\"0.95\"/>\n<pad name=\"4\" x=\"2.65\" y=\"5.5\" drill=\"0.95\"/>\n<pad name=\"3\" x=\"2.65\" y=\"7.5\" drill=\"0.95\"/>\n<pad name=\"2\" x=\"2.65\" y=\"9.5\" drill=\"0.95\"/>\n<pad name=\"1\" x=\"2.65\" y=\"11.5\" drill=\"0.95\"/>\n<text x=\"1\" y=\"2\" size=\"0.4064\" layer=\"25\" rot=\"R90\">&gt;NAME</text>\n<text x=\"5\" y=\"2\" size=\"0.4064\" layer=\"27\" rot=\"R90\">&gt;VALUE</text>\n</package>\n<package name=\"MS\">\n<description>Series S Slide Switch</description>\n<wire x1=\"-6.731\" y1=\"11.4935\" x2=\"6.731\" y2=\"11.4935\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"6.731\" y1=\"11.4935\" x2=\"6.731\" y2=\"-11.4935\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"6.731\" y1=\"-11.4935\" x2=\"-6.731\" y2=\"-11.4935\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-6.731\" y1=\"-11.4935\" x2=\"-6.731\" y2=\"11.4935\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-6.858\" y1=\"11.684\" x2=\"-6.858\" y2=\"-11.684\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.858\" y1=\"-11.684\" x2=\"6.858\" y2=\"-11.684\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.858\" y1=\"-11.684\" x2=\"6.858\" y2=\"11.684\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.858\" y1=\"11.684\" x2=\"-6.858\" y2=\"11.684\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"5\" x=\"3.81\" y=\"0\" drill=\"2.8\" diameter=\"3.302\"/>\n<pad name=\"2\" x=\"-3.81\" y=\"0\" drill=\"2.8\" diameter=\"3.302\"/>\n<pad name=\"3\" x=\"-3.81\" y=\"6.35\" drill=\"2.8\" diameter=\"3.302\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"-6.35\" drill=\"2.8\" diameter=\"3.302\"/>\n<pad name=\"4\" x=\"3.81\" y=\"-6.35\" drill=\"2.8\" diameter=\"3.302\"/>\n<pad name=\"6\" x=\"3.81\" y=\"6.35\" drill=\"2.8\" diameter=\"3.302\"/>\n</package>\n<package name=\"ES\">\n<description>Right Angle Slide Switch. Works with part#ES21MABE</description>\n<wire x1=\"5.0165\" y1=\"12.1094\" x2=\"5.0165\" y2=\"2.3686\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"5.0165\" y1=\"2.3686\" x2=\"-5.0165\" y2=\"2.3686\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-5.0165\" y1=\"2.3686\" x2=\"-5.0165\" y2=\"12.1094\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-5.0165\" y1=\"12.1094\" x2=\"5.0165\" y2=\"12.1094\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.318\" y1=\"2.286\" x2=\"-5.08\" y2=\"2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"2.286\" x2=\"-5.08\" y2=\"3.302\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.318\" y1=\"2.286\" x2=\"5.08\" y2=\"2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"2.286\" x2=\"5.08\" y2=\"3.302\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"10.668\" x2=\"5.08\" y2=\"11.938\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"10.668\" x2=\"-5.08\" y2=\"11.938\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"5\" x=\"0\" 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dx=\"1.3\" dy=\"1.55\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"A2\" x=\"3.975\" y=\"-2.25\" dx=\"1.3\" dy=\"1.55\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"B1\" x=\"-3.975\" y=\"2.25\" dx=\"1.3\" dy=\"1.55\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"B2\" x=\"3.975\" y=\"2.25\" dx=\"1.3\" dy=\"1.55\" layer=\"1\" rot=\"R90\"/>\n</package>\n<package name=\"REED_SWITCH_PLASTIC\">\n<wire x1=\"-7.5\" y1=\"-1.65\" x2=\"7.5\" y2=\"-1.65\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-7.5\" y1=\"-1.65\" x2=\"-7.5\" y2=\"0\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-7.5\" y1=\"0\" x2=\"-7.5\" y2=\"1.65\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-7.5\" y1=\"1.65\" x2=\"7.5\" y2=\"1.65\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"7.5\" y1=\"1.65\" x2=\"7.5\" y2=\"0\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"7.5\" y1=\"0\" x2=\"7.5\" y2=\"-1.65\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-7.5\" y1=\"0\" x2=\"-7.72\" y2=\"0\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"7.5\" y1=\"0\" x2=\"7.72\" y2=\"0\" width=\"0.127\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-8.89\" y=\"0\" drill=\"1.016\" diameter=\"1.8796\"/>\n<pad name=\"P$2\" x=\"8.89\" y=\"0\" drill=\"1.016\" diameter=\"1.8796\"/>\n</package>\n<package name=\"SWITCH-SP3T-SMD\">\n<wire x1=\"4.85\" y1=\"1.3\" x2=\"4.85\" y2=\"-1.3\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"4.85\" y1=\"-1.3\" x2=\"-4.85\" y2=\"-1.3\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-4.85\" y1=\"-1.3\" x2=\"-4.85\" y2=\"1.3\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-4.85\" y1=\"1.3\" x2=\"4.85\" y2=\"1.3\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"4.85\" y1=\"0.4\" x2=\"4.85\" y2=\"-0.4\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"0.75\" y1=\"-1.3\" x2=\"-0.75\" y2=\"-1.3\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-4.35\" y1=\"1.3\" x2=\"4.35\" y2=\"1.3\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"4.35\" y1=\"-1.3\" x2=\"3.65\" y2=\"-1.3\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-3.65\" y1=\"-1.3\" x2=\"-4.35\" y2=\"-1.3\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-4.85\" y1=\"-0.4\" x2=\"-4.85\" y2=\"0.4\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.75\" y1=\"2.55\" x2=\"-0.75\" y2=\"1.3\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"0.75\" y1=\"1.3\" x2=\"0.75\" y2=\"2.55\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"0.5\" y1=\"2.8\" x2=\"-0.5\" y2=\"2.8\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-0.5\" y1=\"2.8\" x2=\"-0.75\" y2=\"2.55\" width=\"0.254\" layer=\"51\" curve=\"90\"/>\n<wire x1=\"0.75\" y1=\"2.55\" x2=\"0.5\" y2=\"2.8\" width=\"0.254\" layer=\"51\" curve=\"90\"/>\n<smd name=\"P$1\" x=\"-5.15\" y=\"-1.1\" dx=\"1\" dy=\"0.8\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"P$2\" x=\"-5.15\" y=\"1.1\" dx=\"1\" dy=\"0.8\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"P$3\" x=\"5.15\" y=\"1.1\" dx=\"1\" dy=\"0.8\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"P$4\" x=\"5.15\" y=\"-1.1\" dx=\"1\" dy=\"0.8\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"-1.5\" y=\"-1.75\" dx=\"0.7\" dy=\"1.5\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"1.5\" y=\"-1.75\" dx=\"0.7\" dy=\"1.5\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"1\" x=\"3\" y=\"-1.75\" dx=\"0.7\" dy=\"1.5\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-3\" y=\"-1.75\" dx=\"0.7\" dy=\"1.5\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-1.524\" y=\"0.508\" size=\"0.4318\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.524\" y=\"-0.635\" size=\"0.4318\" layer=\"27\">&gt;Value</text>\n<rectangle x1=\"1.3\" y1=\"-2.2\" x2=\"1.7\" y2=\"-1.3\" layer=\"51\"/>\n<rectangle x1=\"2.8\" y1=\"-2.2\" x2=\"3.2\" y2=\"-1.3\" layer=\"51\"/>\n<rectangle x1=\"-1.7\" y1=\"-2.2\" x2=\"-1.3\" y2=\"-1.3\" layer=\"51\"/>\n<rectangle x1=\"-3.2\" y1=\"-2.2\" x2=\"-2.8\" y2=\"-1.3\" layer=\"51\"/>\n<rectangle x1=\"4.85\" y1=\"0.9\" x2=\"5.35\" y2=\"1.3\" layer=\"51\"/>\n<rectangle x1=\"-5.35\" y1=\"0.9\" x2=\"-4.85\" y2=\"1.3\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-5.35\" y1=\"-1.3\" x2=\"-4.85\" y2=\"-0.9\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"4.85\" y1=\"-1.3\" x2=\"5.35\" y2=\"-0.9\" layer=\"51\"/>\n<hole x=\"2.5\" y=\"0\" drill=\"0.9\"/>\n<hole x=\"-2.5\" y=\"0\" drill=\"0.9\"/>\n</package>\n<package name=\"SWITCH-SPDT\">\n<wire x1=\"2.175\" y1=\"5.815\" x2=\"-2.175\" y2=\"5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.175\" y1=\"5.815\" x2=\"-2.175\" y2=\"-5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.175\" y1=\"-5.815\" x2=\"2.175\" y2=\"-5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.175\" y1=\"-5.815\" x2=\"2.175\" y2=\"5.815\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"0\" y=\"2.54\" drill=\"1.016\" diameter=\"1.8796\"/>\n<pad name=\"2\" x=\"0\" y=\"0\" drill=\"1.016\" diameter=\"1.8796\"/>\n<pad name=\"3\" x=\"0\" y=\"-2.54\" drill=\"1.016\" diameter=\"1.8796\"/>\n<text x=\"-3.81\" y=\"7.62\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-9.525\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"SWITCHE-DPDT\">\n<wire x1=\"8\" y1=\"3.25\" x2=\"-8\" y2=\"3.25\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-8\" y1=\"3.25\" x2=\"-8\" y2=\"-3.25\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-8\" y1=\"-3.25\" x2=\"8\" y2=\"-3.25\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"-3.25\" x2=\"8\" y2=\"3.25\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-6\" y1=\"3.25\" x2=\"6\" y2=\"3.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"8\" y1=\"1\" x2=\"8\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6\" y1=\"-3.25\" x2=\"-6\" y2=\"-3.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-8\" y1=\"-1\" x2=\"-8\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-7.5\" y=\"3\" drill=\"1.5\" diameter=\"2.54\"/>\n<pad name=\"P$2\" x=\"-7.5\" y=\"-3\" drill=\"1.5\" diameter=\"2.54\"/>\n<pad name=\"P$3\" x=\"7.5\" y=\"3\" drill=\"1.5\" diameter=\"2.54\"/>\n<pad name=\"P$4\" x=\"7.5\" y=\"-3\" drill=\"1.5\" diameter=\"2.54\"/>\n<pad name=\"1\" x=\"-4\" y=\"1.25\" drill=\"0.7\" diameter=\"1.6764\"/>\n<pad name=\"2\" x=\"0\" y=\"1.25\" drill=\"0.7\" diameter=\"1.6764\"/>\n<pad name=\"3\" x=\"4\" y=\"1.25\" drill=\"0.7\" diameter=\"1.6764\"/>\n<pad name=\"4\" x=\"-4\" y=\"-1.25\" drill=\"0.7\" diameter=\"1.6764\"/>\n<pad name=\"5\" x=\"0\" y=\"-1.25\" drill=\"0.7\" diameter=\"1.6764\"/>\n<pad name=\"6\" x=\"4\" y=\"-1.25\" drill=\"0.7\" diameter=\"1.6764\"/>\n</package>\n<package name=\"R_SW_TH\">\n<wire x1=\"-1.651\" y1=\"19.2532\" x2=\"-1.651\" y2=\"-1.3716\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.651\" y1=\"-1.3716\" x2=\"-1.651\" y2=\"-2.2352\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.651\" y1=\"19.2532\" x2=\"13.589\" y2=\"19.2532\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"13.589\" y1=\"19.2532\" x2=\"13.589\" y2=\"-2.2352\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"13.589\" y1=\"-2.2352\" x2=\"-1.651\" y2=\"-2.2352\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"0\" y=\"0\" drill=\"1.6002\"/>\n<pad name=\"P$2\" x=\"0\" y=\"16.9926\" drill=\"1.6002\"/>\n<pad name=\"P$3\" x=\"12.0904\" y=\"15.494\" drill=\"1.6002\"/>\n<pad name=\"P$4\" x=\"12.0904\" y=\"8.4582\" drill=\"1.6002\"/>\n</package>\n<package name=\"SWITCH-SPDT-SMD\">\n<wire x1=\"-4.5\" y1=\"1.75\" x2=\"-4.5\" y2=\"-1.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-4.5\" y1=\"-1.75\" x2=\"4.5\" y2=\"-1.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"-1.75\" x2=\"4.5\" y2=\"1.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"1.75\" x2=\"2\" y2=\"1.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2\" y1=\"1.75\" x2=\"0.5\" y2=\"1.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0.5\" y1=\"1.75\" x2=\"-4.5\" y2=\"1.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0.5\" y1=\"1.75\" x2=\"0.5\" y2=\"3.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0.5\" y1=\"3.75\" x2=\"2\" y2=\"3.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2\" y1=\"3.75\" x2=\"2\" y2=\"1.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-4\" y1=\"-1.75\" x2=\"-4.5\" y2=\"-1.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"-1.75\" x2=\"-4.5\" y2=\"1.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"1.75\" x2=\"4.5\" y2=\"1.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.5\" y1=\"1.75\" x2=\"4.5\" y2=\"-1.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.5\" y1=\"-1.75\" x2=\"4\" y2=\"-1.75\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.5\" y=\"-2.75\" dx=\"1.2\" dy=\"2.5\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"0\" y=\"-2.75\" dx=\"1.2\" dy=\"2.5\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"2.5\" y=\"-2.75\" dx=\"1.2\" dy=\"2.5\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-1.27\" y=\"0.635\" size=\"0.6096\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.27\" y=\"-1.27\" size=\"0.6096\" layer=\"27\">&gt;Value</text>\n<hole x=\"-3.55\" y=\"0\" drill=\"0.9\"/>\n<hole x=\"3.55\" y=\"0\" drill=\"0.9\"/>\n</package>\n<package name=\"SWITCH-SPDT_LOCK.007S\">\n<wire x1=\"2.175\" y1=\"5.815\" x2=\"-2.175\" y2=\"5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.175\" y1=\"5.815\" x2=\"-2.175\" y2=\"-5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.175\" y1=\"-5.815\" x2=\"2.175\" y2=\"-5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.175\" y1=\"-5.815\" x2=\"2.175\" y2=\"5.815\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"0\" y=\"2.7178\" drill=\"1.016\" diameter=\"1.8796\"/>\n<pad name=\"2\" x=\"0\" y=\"0\" drill=\"1.016\" diameter=\"1.8796\"/>\n<pad name=\"3\" x=\"0\" y=\"-2.7178\" drill=\"1.016\" diameter=\"1.8796\"/>\n<text x=\"-3.81\" y=\"7.62\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-9.525\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-0.2286\" y1=\"-0.3048\" x2=\"0.2286\" y2=\"0.3048\" layer=\"51\"/>\n<rectangle x1=\"-0.2286\" y1=\"2.2352\" x2=\"0.2286\" y2=\"2.8448\" layer=\"51\"/>\n<rectangle x1=\"-0.2286\" y1=\"-2.8448\" x2=\"0.2286\" y2=\"-2.2352\" layer=\"51\"/>\n</package>\n<package name=\"SWITCH-SPDT_KIT\">\n<description>&lt;h3&gt;SWITCH-SPDT_KIT&lt;/h3&gt;\nThrough-hole SPDT Switch&lt;br&gt;\n&lt;br&gt;\n&lt;b&gt;Warning:&lt;/b&gt; This is the KIT version of this package. This package has a smaller diameter top stop mask, which doesn't cover the diameter of the pad. This means only the bottom side of the pads' copper will be exposed. You'll only be able to solder to the bottom side.</description>\n<wire x1=\"2.175\" y1=\"5.815\" x2=\"-2.175\" y2=\"5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.175\" y1=\"5.815\" x2=\"-2.175\" y2=\"-5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.175\" y1=\"-5.815\" x2=\"2.175\" y2=\"-5.815\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.175\" y1=\"-5.815\" x2=\"2.175\" y2=\"5.815\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"0\" y=\"2.7178\" drill=\"1.016\" diameter=\"1.8796\" stop=\"no\"/>\n<pad name=\"2\" x=\"0\" y=\"0\" drill=\"1.016\" diameter=\"1.8796\" stop=\"no\"/>\n<pad name=\"3\" x=\"0\" y=\"-2.7178\" drill=\"1.016\" diameter=\"1.8796\" stop=\"no\"/>\n<text x=\"-3.81\" y=\"7.62\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-9.525\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-0.2286\" y1=\"-0.3048\" x2=\"0.2286\" y2=\"0.3048\" layer=\"51\"/>\n<rectangle x1=\"-0.2286\" y1=\"2.2352\" x2=\"0.2286\" y2=\"2.8448\" layer=\"51\"/>\n<rectangle x1=\"-0.2286\" y1=\"-2.8448\" x2=\"0.2286\" y2=\"-2.2352\" layer=\"51\"/>\n<polygon width=\"0.127\" layer=\"30\">\n<vertex x=\"-0.0178\" y=\"1.8414\" curve=\"-90.039946\"/>\n<vertex x=\"-0.8787\" y=\"2.6975\" curve=\"-90\"/>\n<vertex x=\"-0.0026\" y=\"3.5916\" curve=\"-90.006409\"/>\n<vertex x=\"0.8738\" y=\"2.6975\" curve=\"-90.03214\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"30\">\n<vertex x=\"-0.0051\" y=\"-3.5967\" curve=\"-90.006558\"/>\n<vertex x=\"-0.8788\" y=\"-2.7431\" curve=\"-90.037923\"/>\n<vertex x=\"0.0128\" y=\"-1.8363\" curve=\"-90.006318\"/>\n<vertex x=\"0.8814\" y=\"-2.7432\" curve=\"-90.038792\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"30\">\n<vertex x=\"-0.0102\" y=\"-0.8738\" curve=\"-90.019852\"/>\n<vertex x=\"-0.8762\" y=\"-0.0203\" curve=\"-90.019119\"/>\n<vertex x=\"0.0153\" y=\"0.8789\" curve=\"-90\"/>\n<vertex x=\"0.8739\" y=\"-0.0077\" curve=\"-90.038897\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"29\">\n<vertex x=\"0\" y=\"2.2758\" curve=\"-90.012891\"/>\n<vertex x=\"-0.4445\" y=\"2.7\" curve=\"-90\"/>\n<vertex x=\"0\" y=\"3.1673\" curve=\"-90\"/>\n<vertex x=\"0.4419\" y=\"2.7102\" curve=\"-90.012967\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"29\">\n<vertex x=\"0.0026\" y=\"-3.1648\" curve=\"-90.012891\"/>\n<vertex x=\"-0.4419\" y=\"-2.7406\" curve=\"-90\"/>\n<vertex x=\"0.0026\" y=\"-2.2733\" curve=\"-90\"/>\n<vertex x=\"0.4445\" y=\"-2.7304\" curve=\"-90.012967\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"29\">\n<vertex x=\"0.0102\" y=\"-0.4471\" curve=\"-90.012891\"/>\n<vertex x=\"-0.4343\" y=\"-0.0229\" curve=\"-90\"/>\n<vertex x=\"0.0102\" y=\"0.4444\" curve=\"-90\"/>\n<vertex x=\"0.4521\" y=\"-0.0127\" curve=\"-90.012967\"/>\n</polygon>\n</package>\n<package name=\"SWITCH-SPST-SMD-A\">\n<wire x1=\"-3.35\" y1=\"1.3\" x2=\"-3.35\" y2=\"-1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3.35\" y1=\"-1.3\" x2=\"3.35\" y2=\"-1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.35\" y1=\"-1.3\" x2=\"3.35\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.35\" y1=\"1.3\" x2=\"-0.1\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.1\" y1=\"1.3\" x2=\"-1.4\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.4\" y1=\"1.3\" x2=\"-3.35\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.1\" y1=\"1.3\" x2=\"-0.1\" y2=\"2.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.1\" y1=\"2.8\" x2=\"-1.4\" y2=\"2.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.4\" y1=\"2.8\" x2=\"-1.4\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3.35\" y1=\"0.3\" x2=\"-3.35\" y2=\"-0.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.35\" y1=\"0.3\" x2=\"3.35\" y2=\"-0.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.7\" y1=\"1.3\" x2=\"-2.7\" y2=\"1.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.5\" y1=\"-1.3\" x2=\"0\" y2=\"-1.3\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.25\" y=\"-1.75\" dx=\"0.7\" dy=\"1.5\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"-0.75\" y=\"-1.75\" dx=\"0.7\" dy=\"1.5\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"2.25\" y=\"-1.75\" dx=\"0.7\" dy=\"1.5\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"GND1\" x=\"-3.65\" y=\"1\" dx=\"1\" dy=\"0.6\" layer=\"1\"/>\n<smd name=\"GND2\" x=\"-3.65\" y=\"-1.1\" dx=\"1\" dy=\"0.8\" layer=\"1\"/>\n<smd name=\"GND3\" x=\"3.65\" y=\"1\" dx=\"1\" dy=\"0.6\" layer=\"1\"/>\n<smd name=\"GND4\" x=\"3.65\" y=\"-1.1\" dx=\"1\" dy=\"0.8\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.635\" size=\"0.6096\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.27\" y=\"-1.27\" size=\"0.6096\" layer=\"27\">&gt;Value</text>\n<hole x=\"-1.5\" y=\"0\" drill=\"0.9\"/>\n<hole x=\"1.5\" y=\"0\" drill=\"0.9\"/>\n</package>\n<package name=\"SWITCH-SPST-VERTICAL\">\n<wire x1=\"-6.25\" y1=\"9.25\" x2=\"6.25\" y2=\"9.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.25\" y1=\"9.25\" x2=\"6.25\" y2=\"-9.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.25\" y1=\"-9.25\" x2=\"-6.25\" y2=\"-9.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6.25\" y1=\"-9.25\" x2=\"-6.25\" y2=\"9.25\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"2\" x=\"0\" y=\"0\" drill=\"1.4\" diameter=\"2.286\"/>\n<pad name=\"1\" x=\"0\" y=\"7\" drill=\"1.4\" diameter=\"2.286\"/>\n<text x=\"-3.81\" y=\"-12.7\" size=\"1.27\" layer=\"48\">EG2578</text>\n<text x=\"-3.81\" y=\"-6.858\" size=\"1.27\" layer=\"21\">-</text>\n<text x=\"-3.81\" y=\"6.35\" size=\"1.27\" layer=\"21\">O</text>\n</package>\n<package name=\"KPS-1290\">\n<wire x1=\"-3.35\" y1=\"1.3\" x2=\"-3.35\" y2=\"-1.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.35\" y1=\"-1.3\" x2=\"3.35\" y2=\"-1.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.35\" y1=\"-1.3\" x2=\"3.35\" y2=\"1.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.35\" y1=\"1.3\" x2=\"-3.35\" y2=\"1.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"-1.5\" x2=\"1.4\" y2=\"-2.8\" width=\"0.127\" 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layer=\"27\">&gt;Value</text>\n<text x=\"-5.08\" y=\"-6.35\" size=\"1.27\" layer=\"25\">&gt;Name</text>\n</package>\n<package name=\"TRIMPOT_TC33\">\n<wire x1=\"-1.55\" y1=\"-1.65\" x2=\"1.55\" y2=\"-1.65\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.55\" y1=\"-1.65\" x2=\"1.55\" y2=\"1.45\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.55\" y1=\"1.45\" x2=\"-1.55\" y2=\"1.45\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.55\" y1=\"1.45\" x2=\"-1.55\" y2=\"-1.65\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.75\" y1=\"1.45\" x2=\"-1.55\" y2=\"1.45\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.55\" y1=\"1.45\" x2=\"-1.55\" y2=\"-1.65\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.55\" y1=\"-1.65\" x2=\"-1.5\" y2=\"-1.65\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.3\" y1=\"-1.65\" x2=\"0.3\" y2=\"-1.65\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.5\" y1=\"-1.65\" x2=\"1.55\" y2=\"-1.65\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.55\" y1=\"-1.65\" x2=\"1.55\" y2=\"1.45\" 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x=\"0\" y=\"1.4214\" dx=\"1.6002\" dy=\"1.6002\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.1548\" y=\"-1.4214\" dx=\"1.0922\" dy=\"1.6002\" layer=\"1\"/>\n<text x=\"-0.762\" y=\"0.508\" size=\"0.3048\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.762\" y=\"0\" size=\"0.3048\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"1X01_TURRET\">\n<description>0.08\" Drill, 0.13\" tDoc</description>\n<circle x=\"0\" y=\"0\" radius=\"1.6704\" width=\"0.127\" layer=\"51\"/>\n<pad name=\"1\" x=\"0\" y=\"0\" drill=\"2.032\" diameter=\"3.556\" shape=\"long\" rot=\"R90\"/>\n</package>\n<package name=\"6400BG_HEATSINK\">\n<wire x1=\"-20.955\" y1=\"12.7\" x2=\"-4.445\" y2=\"12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"4.445\" y1=\"12.7\" x2=\"20.955\" y2=\"12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-12.7\" y1=\"-1.778\" x2=\"-12.7\" y2=\"-12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"12.7\" y1=\"-1.905\" x2=\"12.7\" y2=\"-12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"12.7\" y1=\"-12.7\" x2=\"20.955\" y2=\"-12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"20.955\" y1=\"-12.7\" x2=\"20.955\" y2=\"12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-12.7\" y1=\"-12.7\" x2=\"-20.955\" y2=\"-12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-20.955\" y1=\"-12.7\" x2=\"-20.955\" y2=\"12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-11.049\" y1=\"-0.7874\" x2=\"11.049\" y2=\"-0.7874\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-4.445\" y1=\"12.7\" x2=\"-4.445\" y2=\"0.7874\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"4.445\" y1=\"0.7874\" x2=\"4.445\" y2=\"12.7\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-4.445\" y1=\"0.7874\" x2=\"4.445\" y2=\"0.7874\" width=\"0.254\" layer=\"51\"/>\n<hole x=\"-12.7\" y=\"0\" drill=\"2.9972\"/>\n<hole x=\"12.7\" y=\"0\" drill=\"2.9972\"/>\n</package>\n<package name=\"PCB_MOUNT_SPEAKER\">\n<circle x=\"0\" y=\"0\" radius=\"14.605\" width=\"0.127\" layer=\"21\"/>\n<pad name=\"+\" x=\"-7.62\" y=\"0\" drill=\"1.143\" shape=\"square\"/>\n<pad name=\"-\" x=\"7.62\" y=\"0\" drill=\"1.143\" shape=\"square\" rot=\"R90\"/>\n<text x=\"-5.08\" y=\"0\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"-5.08\" y=\"-1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n</package>\n<package name=\"ROTARY_ENC_PLAIN\">\n<description>Simple rotary encoder, no LED, push center&lt;br&gt;\nCOM-09117</description>\n<pad name=\"C\" x=\"7.493\" y=\"0\" drill=\"1.016\"/>\n<pad name=\"SW+\" x=\"-6.985\" y=\"2.54\" drill=\"1.016\"/>\n<pad name=\"P$3\" x=\"0\" y=\"6.604\" drill=\"2.286\"/>\n<pad name=\"P$4\" x=\"0\" y=\"-6.604\" drill=\"2.286\"/>\n<pad name=\"SW-\" x=\"-6.985\" y=\"-2.54\" drill=\"1.016\"/>\n<pad name=\"B\" x=\"7.493\" y=\"2.54\" drill=\"1.016\"/>\n<pad name=\"A\" x=\"7.493\" y=\"-2.54\" drill=\"1.016\"/>\n<text x=\"-1.27\" y=\"1.27\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"-1.27\" y=\"0\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<wire x1=\"-6.35\" y1=\"6.35\" x2=\"-2.54\" y2=\"6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"6.35\" x2=\"6.35\" y2=\"6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"6.35\" x2=\"6.35\" y2=\"-6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"-6.35\" x2=\"2.54\" y2=\"-6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"-6.35\" x2=\"-6.35\" y2=\"-6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-6.35\" y1=\"-6.35\" x2=\"-6.35\" y2=\"-3.81\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-6.35\" y1=\"6.35\" x2=\"-6.35\" y2=\"3.81\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-6.35\" y1=\"1.27\" x2=\"-6.35\" y2=\"-1.27\" width=\"0.127\" layer=\"21\"/>\n</package>\n<package name=\"ENCODER-16MM-QUAD\">\n<description>16mm top width</description>\n<pad name=\"B\" x=\"0\" y=\"0\" drill=\"1.25\"/>\n<pad name=\"C\" x=\"0\" y=\"5\" drill=\"1.25\"/>\n<pad name=\"A\" x=\"0\" y=\"-5\" drill=\"1.25\"/>\n<pad name=\"P$1\" x=\"-3.1\" y=\"7.2\" drill=\"2.1\"/>\n<pad name=\"P$2\" x=\"-3.1\" y=\"-7.2\" drill=\"2.1\"/>\n<wire x1=\"4.4\" y1=\"8\" x2=\"4.4\" y2=\"7\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.4\" y1=\"7\" x2=\"4.4\" y2=\"3.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.4\" y1=\"3.73\" x2=\"4.4\" y2=\"-3.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.4\" y1=\"-3.73\" x2=\"4.4\" y2=\"-4.1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.4\" y1=\"-4.1\" x2=\"4.4\" y2=\"-5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.4\" y1=\"-5\" x2=\"4.4\" y2=\"-8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.4\" y1=\"-8\" x2=\"-2\" y2=\"-8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2\" y1=\"-8\" x2=\"-2\" y2=\"8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2\" y1=\"8\" x2=\"4.4\" y2=\"8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.4\" y1=\"3.73\" x2=\"11.3\" y2=\"3.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"11.3\" y1=\"3.73\" x2=\"11.3\" y2=\"3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"11.3\" y1=\"3\" x2=\"11.3\" y2=\"-3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"11.3\" y1=\"-3\" x2=\"11.3\" y2=\"-3.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"11.3\" y1=\"-3.73\" x2=\"4.4\" y2=\"-3.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"11.3\" y1=\"3\" x2=\"15\" y2=\"3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"15\" y1=\"-3\" x2=\"11.3\" y2=\"-3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"15\" y1=\"3\" x2=\"14\" y2=\"2\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"14\" y1=\"2\" x2=\"15\" y2=\"1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"15\" y1=\"1\" x2=\"14\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"14\" y1=\"0\" x2=\"15\" y2=\"-1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"15\" y1=\"-1\" x2=\"14\" y2=\"-2\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"14\" y1=\"-2\" x2=\"15\" y2=\"-3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.4\" y1=\"8.2\" x2=\"4.3\" y2=\"8.2\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"4.3\" y1=\"8.2\" x2=\"4.3\" y2=\"5.2\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"4.3\" y1=\"-5.2\" x2=\"4.3\" y2=\"-8.2\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-1.4\" y1=\"-8.2\" x2=\"4.3\" y2=\"-8.2\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-2.5\" y1=\"4.9\" x2=\"-2.5\" y2=\"-5\" width=\"0.254\" layer=\"21\"/>\n<text x=\"0\" y=\"2.54\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"0\" y=\"1.27\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"5.138\" y=\"-2.114\" size=\"0.4064\" layer=\"51\" rot=\"R90\">Mounting Surface</text>\n<wire x1=\"5.1\" y1=\"2.93\" x2=\"4.7\" y2=\"2.93\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.9\" y1=\"-2.73\" x2=\"4.6\" y2=\"-2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.7\" y1=\"2.93\" x2=\"4.8\" y2=\"3.13\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.7\" y1=\"2.93\" x2=\"4.8\" y2=\"3.13\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.7\" y1=\"-2.53\" x2=\"4.6\" y2=\"-2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.6\" y1=\"-2.73\" x2=\"4.7\" y2=\"-2.93\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.7\" y1=\"2.93\" x2=\"4.8\" y2=\"2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.4\" y1=\"-4.1\" x2=\"6.4\" y2=\"-4.1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"6.4\" y1=\"-4.1\" x2=\"6.4\" y2=\"-5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"6.4\" y1=\"-5\" x2=\"4.4\" y2=\"-5\" width=\"0.127\" layer=\"51\"/>\n<text x=\"6.715\" y=\"-4.826\" size=\"0.4064\" layer=\"51\">*3mm diameter x 2mm tab at 6 o'clock (from front)</text>\n</package>\n<package name=\"POT_PTH_SWITCH\">\n<description>topup part# 16M1SHB-B3-20KM-A2K-16Y</description>\n<pad name=\"2\" x=\"0\" y=\"0\" drill=\"1.2\"/>\n<pad name=\"3\" x=\"0\" y=\"5\" drill=\"1.2\"/>\n<pad name=\"1\" x=\"0\" y=\"-5\" drill=\"1.2\"/>\n<pad name=\"S2\" x=\"-5.5\" y=\"-5\" drill=\"1.2\"/>\n<pad name=\"S1\" x=\"-5.5\" y=\"5\" drill=\"1.2\"/>\n<wire x1=\"3.8\" y1=\"6.5\" x2=\"3.8\" y2=\"2.73\" width=\"0.127\" layer=\"51\"/>\n<text x=\"4.699\" y=\"-2.27\" size=\"0.4064\" layer=\"51\" rot=\"R90\">mounting surface</text>\n<wire x1=\"3.8\" y1=\"2.73\" x2=\"3.8\" y2=\"-2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.8\" y1=\"-2.73\" x2=\"3.8\" y2=\"-3.1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.8\" y1=\"-3.1\" x2=\"3.8\" y2=\"-4\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.8\" y1=\"-4\" x2=\"3.8\" y2=\"-6.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.318\" y1=\"1.667\" x2=\"4.064\" y2=\"1.667\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.318\" y1=\"-2.016\" x2=\"4.064\" y2=\"-2.016\" width=\"0.127\" layer=\"51\"/>\n<text x=\"-3.81\" y=\"2.54\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"1.27\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<wire x1=\"-7.7\" y1=\"6.5\" x2=\"-7.7\" y2=\"-6.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-7.7\" y1=\"-6.5\" x2=\"3.8\" y2=\"-6.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-7.7\" y1=\"6.5\" x2=\"3.8\" y2=\"6.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.8\" y1=\"2.73\" x2=\"8\" y2=\"2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"2.73\" x2=\"8\" y2=\"1.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"1.73\" x2=\"8\" y2=\"2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"2.73\" x2=\"8\" y2=\"1.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"1.73\" x2=\"8\" y2=\"-1.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"-1.73\" x2=\"8\" y2=\"-2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"-2.73\" x2=\"8\" y2=\"-1.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"-1.73\" x2=\"8\" y2=\"-2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"-2.73\" x2=\"3.8\" y2=\"-2.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"8\" y1=\"1.73\" x2=\"10\" y2=\"1.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"10\" y1=\"-1.73\" x2=\"8\" y2=\"-1.73\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-7.874\" y1=\"6.604\" x2=\"3.683\" y2=\"6.604\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"6.604\" x2=\"3.683\" y2=\"4.191\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-7.874\" y1=\"-6.604\" x2=\"3.683\" y2=\"-6.604\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-6.604\" x2=\"3.683\" y2=\"-4.191\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-7.874\" y1=\"-6.604\" x2=\"-7.874\" y2=\"6.604\" width=\"0.254\" layer=\"21\"/>\n<text x=\"6.28\" y=\"-3.72\" size=\"0.4064\" layer=\"51\">*2.8mm diameter x 2mm tab at 9 o'clock (from front)</text>\n<wire x1=\"10\" y1=\"1.7\" x2=\"9\" y2=\"1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"9\" y1=\"1\" x2=\"10\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"10\" y1=\"0\" x2=\"9\" y2=\"-1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"9\" y1=\"-1\" x2=\"10\" y2=\"-1.7\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.8\" y1=\"-3.1\" x2=\"5.8\" y2=\"-3.1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"5.8\" y1=\"-3.1\" x2=\"5.8\" y2=\"-4\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"5.8\" y1=\"-4\" x2=\"3.8\" y2=\"-4\" width=\"0.127\" layer=\"51\"/>\n</package>\n<package name=\"QFN16-3X3MM\">\n<description>3mm x 3mm QFN 16 pin</description>\n<smd name=\"5\" x=\"-0.75\" y=\"-1.475\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"6\" x=\"-0.25\" y=\"-1.475\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"7\" x=\"0.25\" y=\"-1.475\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"8\" x=\"0.75\" y=\"-1.475\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"9\" x=\"1.475\" y=\"-0.75\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R180\" cream=\"no\"/>\n<smd name=\"10\" x=\"1.475\" y=\"-0.25\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R180\" cream=\"no\"/>\n<smd name=\"11\" x=\"1.475\" y=\"0.25\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R180\" cream=\"no\"/>\n<smd name=\"12\" x=\"1.475\" y=\"0.75\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R180\" cream=\"no\"/>\n<smd name=\"13\" x=\"0.75\" y=\"1.475\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R270\" cream=\"no\"/>\n<smd name=\"14\" x=\"0.25\" y=\"1.475\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R270\" cream=\"no\"/>\n<smd name=\"15\" x=\"-0.25\" y=\"1.475\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R270\" cream=\"no\"/>\n<smd name=\"16\" x=\"-0.75\" y=\"1.475\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" rot=\"R270\" cream=\"no\"/>\n<smd name=\"1\" x=\"-1.475\" y=\"0.75\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n<smd name=\"2\" x=\"-1.475\" y=\"0.25\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n<smd name=\"3\" x=\"-1.475\" y=\"-0.25\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n<smd name=\"4\" x=\"-1.475\" y=\"-0.75\" dx=\"0.85\" dy=\"0.28\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n<text x=\"-2.54\" y=\"2.159\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<wire x1=\"1.5\" y1=\"1.5\" x2=\"-1.5\" y2=\"1.5\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"1.5\" x2=\"-1.5\" y2=\"-1.5\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-1.5\" x2=\"1.5\" y2=\"-1.5\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"-1.5\" x2=\"1.5\" y2=\"1.5\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.6\" y1=\"1.1\" x2=\"-1.1\" y2=\"1.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.1\" y1=\"1.6\" x2=\"1.6\" y2=\"1.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.6\" y1=\"1.6\" x2=\"1.6\" y2=\"1.1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.6\" y1=\"-1.1\" x2=\"1.6\" y2=\"-1.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.6\" y1=\"-1.6\" x2=\"1.1\" y2=\"-1.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.1\" y1=\"-1.6\" x2=\"-1.6\" y2=\"-1.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.6\" y1=\"-1.6\" x2=\"-1.6\" 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For example the following:&lt;/p&gt;\n&lt;ul&gt;\n  &lt;li&gt;A6H-2101 or A6H-2102 in Omron A6H series; &lt;a href=\"http://www.omron.com/ecb/products/pdf/en-a6h.pdf\"&gt;Datasheet&lt;/a&gt;&lt;/li&gt;\n  &lt;li&gt;Digikey &lt;a href=\"http://www.digikey.com/product-detail/en/A6H-2101/A6H-2101-ND/1811590\"&gt;A6H-2101-ND&lt;/a&gt;&lt;/li&gt;\n&lt;/ul&gt;</description>\n<wire x1=\"-2.032\" y1=\"-2.413\" x2=\"2.032\" y2=\"-2.413\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.032\" y1=\"2.413\" x2=\"-2.032\" y2=\"2.413\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.032\" y1=\"2.413\" x2=\"-2.032\" y2=\"-2.413\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.032\" y1=\"-2.413\" x2=\"2.032\" y2=\"2.413\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.0922\" y1=\"1.905\" x2=\"-1.0922\" y2=\"-1.905\" width=\"0.1778\" layer=\"21\"/>\n<wire x1=\"-1.0922\" y1=\"1.905\" x2=\"-0.1778\" y2=\"1.905\" width=\"0.1778\" layer=\"21\"/>\n<wire x1=\"-0.1778\" y1=\"-1.905\" x2=\"-0.1778\" y2=\"1.905\" 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rot=\"R90\">N</text>\n<text x=\"0.3175\" y=\"-1.905\" size=\"0.8128\" layer=\"51\" rot=\"R90\">1</text>\n<text x=\"1.5875\" y=\"-1.905\" size=\"0.8128\" layer=\"51\" rot=\"R90\">2</text>\n</package>\n<package name=\"209-2LPST\">\n<pad name=\"1\" x=\"-1.27\" y=\"-3.81\" drill=\"0.8\"/>\n<pad name=\"2\" x=\"1.27\" y=\"-3.81\" drill=\"0.8\"/>\n<pad name=\"3\" x=\"1.27\" y=\"3.81\" drill=\"0.8\"/>\n<pad name=\"4\" x=\"-1.27\" y=\"3.81\" drill=\"0.8\"/>\n<wire x1=\"-3.275\" y1=\"3.35\" x2=\"-2\" y2=\"3.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.275\" y1=\"3.35\" x2=\"3.275\" y2=\"-3.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2\" y1=\"-3.35\" x2=\"-3.021\" y2=\"-3.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.021\" y1=\"-3.35\" x2=\"-3.275\" y2=\"-3.096\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.275\" y1=\"-3.096\" x2=\"-3.275\" y2=\"3.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"3.35\" x2=\"3.27\" y2=\"3.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.275\" y1=\"-3.35\" x2=\"2\" y2=\"-3.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2.5\" y1=\"2\" x2=\"-2.5\" y2=\"-2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2.5\" y1=\"-2\" x2=\"-0.5\" y2=\"-2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.5\" y1=\"-2\" x2=\"-0.5\" y2=\"2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.5\" y1=\"2\" x2=\"-2.5\" y2=\"2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.5\" y1=\"2\" x2=\"0.5\" y2=\"-2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.5\" y1=\"-2\" x2=\"2.5\" y2=\"-2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.5\" y1=\"-2\" x2=\"2.5\" y2=\"2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.5\" y1=\"2\" x2=\"0.5\" y2=\"2\" width=\"0.127\" layer=\"21\"/>\n<rectangle x1=\"-2\" y1=\"-1.27\" x2=\"-1\" y2=\"0.23\" layer=\"21\"/>\n<rectangle x1=\"1\" y1=\"-1.27\" x2=\"2\" y2=\"0.23\" layer=\"21\"/>\n<text x=\"-3.5\" y=\"-3\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\" rot=\"R90\">&gt;NAME</text>\n<text x=\"4.5\" y=\"-3.5\" size=\"0.8128\" layer=\"27\" font=\"vector\" ratio=\"15\" rot=\"R90\">&gt;VALUE</text>\n<text x=\"0\" y=\"2.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" ratio=\"15\" align=\"bottom-center\">ON</text>\n</package>\n<package name=\"AAVID_573400\">\n<smd name=\"P$1\" x=\"-9.398\" y=\"0\" dx=\"2.54\" dy=\"13.97\" layer=\"1\" thermals=\"no\"/>\n<smd name=\"P$2\" x=\"9.398\" y=\"0\" dx=\"2.54\" dy=\"13.97\" layer=\"1\" thermals=\"no\"/>\n<rectangle x1=\"-10.033\" y1=\"-6.35\" x2=\"-8.763\" y2=\"6.35\" layer=\"51\"/>\n<rectangle x1=\"8.763\" y1=\"-6.35\" x2=\"10.033\" y2=\"6.35\" layer=\"51\"/>\n<wire x1=\"-15.494\" y1=\"6.35\" x2=\"15.494\" y2=\"6.35\" width=\"0.2032\" layer=\"51\" style=\"shortdash\"/>\n<wire x1=\"15.494\" y1=\"6.35\" x2=\"15.494\" y2=\"-6.35\" width=\"0.2032\" layer=\"51\" style=\"shortdash\"/>\n<wire x1=\"15.494\" y1=\"-6.35\" x2=\"-15.494\" y2=\"-6.35\" width=\"0.2032\" layer=\"51\" style=\"shortdash\"/>\n<wire x1=\"-15.494\" y1=\"-6.35\" x2=\"-15.494\" y2=\"6.35\" width=\"0.2032\" layer=\"51\" style=\"shortdash\"/>\n<text x=\"-15.24\" y=\"7.62\" size=\"1.27\" layer=\"25\" font=\"vector\">&gt;NAME</text>\n<text x=\"-15.24\" y=\"-8.89\" size=\"1.27\" layer=\"27\" font=\"vector\">&gt;VALUE</text>\n</package>\n<package name=\"STOMP-SWITCH-3PDT\">\n<wire x1=\"-9.85\" y1=\"8.5\" x2=\"-9.85\" y2=\"-8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-9.85\" y1=\"-8.5\" x2=\"9.85\" y2=\"-8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"9.85\" y1=\"-8.5\" x2=\"9.85\" y2=\"8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"9.85\" y1=\"8.5\" x2=\"-9.85\" y2=\"8.5\" width=\"0.127\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-5.3\" y=\"4.8\" drill=\"1.2\" diameter=\"2.54\"/>\n<pad name=\"P$2\" x=\"-5.3\" y=\"0\" drill=\"1.2\" diameter=\"2.54\"/>\n<pad name=\"P$3\" x=\"-5.3\" y=\"-4.8\" drill=\"1.2\" diameter=\"2.54\"/>\n<pad name=\"P$4\" x=\"0\" y=\"4.8\" drill=\"1.2\" diameter=\"2.54\"/>\n<pad name=\"P$5\" x=\"0\" y=\"0\" drill=\"1.2\" diameter=\"2.54\"/>\n<pad name=\"P$6\" x=\"0\" y=\"-4.8\" drill=\"1.2\" diameter=\"2.54\"/>\n<circle x=\"0\" y=\"0\" radius=\"6.1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-9.85\" y1=\"8.5\" x2=\"9.85\" y2=\"8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"9.85\" y1=\"8.5\" x2=\"9.85\" y2=\"-8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"9.85\" y1=\"-8.5\" x2=\"-9.85\" y2=\"-8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-9.85\" y1=\"-8.5\" x2=\"-9.85\" y2=\"8.5\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-2.81\" y=\"1.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.81\" y=\"-2.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<pad name=\"P$7\" x=\"5.3\" y=\"4.8\" drill=\"1.2\" diameter=\"2.54\"/>\n<pad name=\"P$8\" x=\"5.3\" y=\"0\" drill=\"1.2\" diameter=\"2.54\"/>\n<pad name=\"P$9\" x=\"5.3\" y=\"-4.8\" drill=\"1.2\" diameter=\"2.54\"/>\n<wire x1=\"1\" y1=\"6\" x2=\"1\" y2=\"-6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-6\" x2=\"-1\" y2=\"-6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"-6\" x2=\"-1\" y2=\"6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"6\" x2=\"1\" y2=\"6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"6.3\" y1=\"6\" x2=\"4.3\" y2=\"6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.3\" y1=\"6\" x2=\"4.3\" y2=\"-6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.3\" y1=\"-6\" x2=\"6.3\" y2=\"-6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"6.3\" y1=\"-6\" x2=\"6.3\" y2=\"6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-6.3\" y1=\"6\" x2=\"-6.3\" y2=\"-6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-6.3\" y1=\"-6\" x2=\"-4.3\" y2=\"-6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-4.3\" y1=\"-6\" x2=\"-4.3\" y2=\"6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-4.3\" y1=\"6\" x2=\"-6.3\" y2=\"6\" width=\"0.127\" layer=\"51\"/>\n</package>\n<package name=\"TACTILE_SWITCH_SMD_4.6X2.8MM\">\n<description>&lt;h3&gt;4.6 x 2.8mm Tactile Switch&lt;/h3&gt;\n\n&lt;p&gt;&lt;a href=\"http://www.digikey.com/product-detail/en/KMR231NG%20LFS/CKN10246CT-ND/2176497\"&gt;Example&lt;/a&gt;&lt;/p&gt;</description>\n<smd name=\"3\" x=\"2.05\" y=\"0.8\" dx=\"0.9\" dy=\"1\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.05\" y=\"-0.8\" dx=\"0.9\" dy=\"1\" layer=\"1\"/>\n<smd name=\"1\" x=\"-2.05\" y=\"-0.8\" dx=\"0.9\" dy=\"1\" layer=\"1\"/>\n<smd name=\"4\" x=\"-2.05\" y=\"0.8\" dx=\"0.9\" dy=\"1\" layer=\"1\"/>\n<wire x1=\"-2.1\" y1=\"1.4\" x2=\"-2.1\" y2=\"-1.4\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2.1\" y1=\"-1.4\" x2=\"2.1\" y2=\"1.4\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.1\" y1=\"1.4\" x2=\"2.1\" y2=\"1.4\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.1\" y1=\"-1.4\" x2=\"2.1\" y2=\"-1.4\" width=\"0.127\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.805\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.338\" y1=\"-1.4\" x2=\"-1.338\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.338\" y1=\"1.4\" x2=\"1.338\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.1\" y1=\"0.13\" x2=\"-2.1\" y2=\"-0.13\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.1\" y1=\"-0.13\" x2=\"2.1\" y2=\"0.13\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"-2.54\" y=\"1.524\" size=\"0.8128\" layer=\"25\">&gt;Name</text>\n<text x=\"-2.54\" y=\"-1.524\" size=\"0.8128\" layer=\"27\" align=\"top-left\">&gt;Value</text>\n<rectangle x1=\"-2.3\" y1=\"0.5\" x2=\"-2.1\" y2=\"1.1\" layer=\"51\"/>\n<rectangle x1=\"-2.3\" y1=\"-1.1\" x2=\"-2.1\" y2=\"-0.5\" layer=\"51\"/>\n<rectangle x1=\"2.1\" y1=\"-1.1\" x2=\"2.3\" y2=\"-0.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"2.1\" y1=\"0.5\" x2=\"2.3\" y2=\"1.1\" layer=\"51\" rot=\"R180\"/>\n</package>\n<package name=\"RELAY-T90\">\n<wire x1=\"-26.41\" y1=\"-20.665\" x2=\"-26.41\" y2=\"4.735\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-25.5\" y1=\"5.735\" x2=\"-13.725\" y2=\"5.735\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-9.56\" y1=\"-21.665\" x2=\"-25.5\" y2=\"-21.665\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-25.5\" y1=\"-21.665\" x2=\"-26.41\" y2=\"-20.665\" width=\"0.2032\" layer=\"21\" curve=\"-83.277195\"/>\n<wire x1=\"-25.5\" y1=\"5.735\" x2=\"-26.41\" y2=\"4.735\" width=\"0.2032\" layer=\"21\" curve=\"100\"/>\n<wire x1=\"-8.81\" y1=\"-20.965\" x2=\"-8.81\" y2=\"-20.365\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-12.975\" y1=\"1.57\" x2=\"-12.975\" y2=\"5.035\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-8.06\" y1=\"-19.665\" x2=\"5.875\" y2=\"-19.665\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-12.225\" y1=\"0.87\" x2=\"5.775\" y2=\"0.87\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"6.525\" y1=\"-18.965\" x2=\"6.525\" y2=\"0.17\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-8.81\" y1=\"-20.965\" x2=\"-9.56\" y2=\"-21.665\" width=\"0.2032\" layer=\"21\" curve=\"-91.407384\"/>\n<wire x1=\"-8.81\" y1=\"-20.365\" x2=\"-8.06\" y2=\"-19.665\" width=\"0.2032\" layer=\"21\" curve=\"-83.263707\"/>\n<wire x1=\"6.525\" y1=\"-18.965\" x2=\"5.875\" y2=\"-19.665\" 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rot=\"R90\">&gt;Value</text>\n</package>\n<package name=\"CHERRY-MX-LED\">\n<description>&lt;h3&gt;Cherry MX Switch - Electromechanical Swith w/ LED&lt;/h3&gt;\n\n&lt;p&gt;Cherry MX Keyswitches are top-of-the-line mechanical keyboard switches. They’re satisfyingly “clicky”, reliable up to tens-of-millions of key presses, and a standard in gaming and programming keyboards across the globe. This ‘blue’ version Cherry MX Switch is favored by most due to its secondary internal actuator making it less likely to “double-tap.” If you are looking for a noticeably audible and high-quality key switch, this is the perfect option for you!&lt;/p&gt;\n\n&lt;p&gt;&lt;a href=\"https://www.sparkfun.com/products/13834\"&gt;SparkFun Product Link&lt;/a&gt;&lt;/p&gt;</description>\n<hole x=\"0\" y=\"0\" drill=\"4.0894\"/>\n<hole x=\"-5.08\" y=\"0\" drill=\"1.70688125\"/>\n<hole x=\"5.08\" y=\"0\" drill=\"1.70688125\"/>\n<pad name=\"A\" x=\"-1.27\" y=\"-5.08\" drill=\"1.0922\" diameter=\"2.032\"/>\n<pad name=\"K\" x=\"1.27\" y=\"-5.08\" drill=\"1.0922\" diameter=\"2.032\"/>\n<pad name=\"S1\" x=\"-3.81\" y=\"2.54\" drill=\"1.7526\" diameter=\"3.2258\"/>\n<pad name=\"S2\" x=\"2.54\" y=\"5.08\" drill=\"1.7526\" diameter=\"3.2258\"/>\n<text x=\"-2.159\" y=\"-5.08\" size=\"1.524\" layer=\"21\" font=\"vector\" ratio=\"15\" align=\"center-right\">+</text>\n<text x=\"2.54\" y=\"-5.08\" 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length=\"short\" rot=\"R90\"/>\n<pin name=\"P$2\" x=\"2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" rot=\"R90\"/>\n<pin name=\"P$3\" x=\"2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" rot=\"R270\"/>\n<pin name=\"P$4\" x=\"0\" y=\"7.62\" visible=\"pad\" length=\"short\" rot=\"R270\"/>\n<text x=\"-0.762\" y=\"3.048\" size=\"1.27\" layer=\"94\">ON</text>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"95\" rot=\"R90\">&gt;NAME</text>\n<text x=\"7.62\" y=\"-5.08\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n</symbol>\n<symbol name=\"HEATSINK-SMD-2\">\n<wire x1=\"-7.62\" y1=\"5.08\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-2.54\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"0\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire 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layer=\"96\">&gt;VALUE</text>\n</symbol>\n<symbol name=\"SW_SPDT_POL\">\n<wire x1=\"-2.54\" y1=\"0\" x2=\"0\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"0.635\" y2=\"-2.54\" width=\"0.127\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"2.54\" x2=\"0.635\" y2=\"2.54\" width=\"0.1524\" layer=\"94\"/>\n<circle x=\"0\" y=\"2.54\" radius=\"0.3592\" width=\"0.2032\" layer=\"94\"/>\n<circle x=\"0\" y=\"-2.54\" radius=\"0.3592\" width=\"0.2032\" layer=\"94\"/>\n<circle x=\"-2.54\" y=\"0\" radius=\"0.3592\" width=\"0.2032\" layer=\"94\"/>\n<text x=\"-4.445\" y=\"-6.35\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"3.81\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"P\" x=\"-5.08\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\"/>\n<pin name=\"S\" x=\"2.54\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R180\"/>\n<pin name=\"O\" x=\"2.54\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"pas\" 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y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.508\" y1=\"-0.508\" x2=\"0.889\" y2=\"0.889\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.635\" y1=\"-0.635\" x2=\"2.032\" y2=\"0.762\" width=\"0.1524\" layer=\"94\"/>\n<circle x=\"-2.54\" y=\"2.54\" radius=\"0.127\" width=\"0.4064\" layer=\"94\"/>\n<circle x=\"2.54\" y=\"2.54\" radius=\"0.127\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"0\" y=\"5.334\" size=\"1.778\" layer=\"95\" align=\"bottom-center\">&gt;NAME</text>\n<text x=\"0\" y=\"-5.334\" size=\"1.778\" layer=\"96\" align=\"top-center\">&gt;VALUE</text>\n<pin name=\"S1\" x=\"-7.62\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"2\"/>\n<pin name=\"S2\" x=\"7.62\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"A\" x=\"-7.62\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"pas\"/>\n<pin name=\"C\" x=\"7.62\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R180\"/>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"0.889\" y=\"0.889\"/>\n<vertex x=\"0\" y=\"0.508\"/>\n<vertex x=\"0.508\" y=\"0\"/>\n</polygon>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"2.032\" y=\"0.762\"/>\n<vertex x=\"1.143\" y=\"0.381\"/>\n<vertex x=\"1.651\" y=\"-0.127\"/>\n</polygon>\n<wire x1=\"-5.08\" y1=\"5.08\" x2=\"-5.08\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"2.54\" x2=\"-5.08\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"-2.54\" x2=\"-5.08\" y2=\"-5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"-5.08\" x2=\"5.08\" y2=\"-5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.08\" y1=\"-5.08\" x2=\"5.08\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.08\" y1=\"-2.54\" x2=\"5.08\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.08\" y1=\"2.54\" x2=\"5.08\" y2=\"5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.08\" y1=\"5.08\" x2=\"-5.08\" y2=\"5.08\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"2.54\" x2=\"-2.54\" y2=\"2.54\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.905\" y1=\"2.54\" x2=\"5.08\" y2=\"2.54\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"-2.54\" x2=\"-1.27\" y2=\"-2.54\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-2.54\" x2=\"5.08\" y2=\"-2.54\" width=\"0.1524\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"AYZ0202\" prefix=\"S\">\n<description>&lt;b&gt;SPDT Slide Switch&lt;/b&gt;\nSimple SMD single-pull double-throw slide switch. Good for  less than 350mA power switch, switching UARTs between devices, etc. Spark Fun Electronics SKU : COM-00597</description>\n<gates>\n<gate name=\"G$1\" symbol=\"AYZ0202\" x=\"7.62\" y=\"5.08\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"AYZ0202\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08179\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"BATTERY\" prefix=\"BAT\" uservalue=\"yes\">\n<description>&lt;b&gt;Battery Holders&lt;/b&gt;&lt;br&gt;\nVarious common sizes : AA, AAA, 18650 (PRT-12895), 20mm coin cell and 12mm coin cell.&lt;br&gt;\n20MM_4LEGS, BATT-10373</description>\n<gates>\n<gate name=\"G$1\" symbol=\"BATTERY\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"AAA\" package=\"BATTERY-AAA\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"PWR@1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND@1\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"BATT-08571\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"20PTH2\" package=\"BATTERY\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"AA\" package=\"BATTERY-AA\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"PWR@1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND@1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"12PTH\" package=\"BATTCON_12MM_PTH\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"VCC@1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"BATT-08315\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"20SMD\" package=\"BATTCON_20MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"245MM\" package=\"BATTCON_245MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"20PTH\" package=\"BATTCOM_20MM_PTH\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"245PTH\" package=\"BATTCON_245MM_PTH\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1100\" package=\"LIPO-1100MAH\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"AA-PANEL\" package=\"BATTERY-AA-PANEL\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"FOB\" package=\"BATTERY_20MM_PTH_COMPACT\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"12MM\" package=\"BATTCON_12MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"PWR@1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"BATT-08044\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"20MM_4LEGS\" package=\"BATTCON_20MM_4LEGS\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"POSITIVE@1 POSITIVE@2 POSITIVE@3 POSITIVE@4\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"NEGATIVE\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"BATT-10373\"/>\n<attribute name=\"VALUE\" value=\"20mm coincell\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"AA-KIT\" package=\"BATTERY-AA-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"PWR@1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND@1\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"BATT-08316\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"LIPO-TABS\" package=\"LIPO-110-TABS\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"9V\" package=\"BATTCON_9V\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"20MM_4LEGS_OVERPASTE\" package=\"BATTCON_20MM_4LEGS_OVERPASTE\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"AAA-KIT\" package=\"BATTERY-AAA-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"PWR@1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND@1\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"BATT-08571\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"18650\" package=\"BATTERY_18650-HOLDER\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"PWR@1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND@1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"BUTTON-CONDUCTIVE\">\n<description>Used with rubber key pads. This one was designed and proven to work with the PolyCase Key FOB enclosures.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"BUTTON-CONDUCTIVE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SMD\" package=\"BUTTON-CONDUCTIVE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD-0.1&quot;\" package=\"BUTTON-CONDUCTIVE-0.1\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"\" package=\"BUTTON-CONDUCTIVE-MINI\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"BUTTON-MAGNETIC\">\n<description>Magnetic metal snaps. 18mm is DEV-08682.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SEWTAP\" x=\"2.54\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"10MM\" package=\"BUTTON-10MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"18MM\" package=\"BUTTON-18MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"BUTTONPAD-2X2\">\n<description>Proven layout and schematic for 2x2 button pad. Panelize this device/fp to a 4x4 pad if needed. Spark Fun Electronics SKU : COM-07835. Compatible common cathode tri-color LED SKU : COM-00105</description>\n<gates>\n<gate name=\"-C1\" symbol=\"BUTTONPAD_SINGLE\" x=\"-25.4\" y=\"15.24\"/>\n<gate name=\"-C2\" symbol=\"BUTTONPAD_SINGLE\" x=\"15.24\" y=\"15.24\"/>\n<gate name=\"-C3\" symbol=\"BUTTONPAD_SINGLE\" x=\"-25.4\" y=\"-12.7\"/>\n<gate name=\"-C4\" symbol=\"BUTTONPAD_SINGLE\" x=\"15.24\" y=\"-12.7\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"BUTTONPAD-2X2\">\n<connects>\n<connect gate=\"-C1\" pin=\"BLU\" pad=\"BLU1\"/>\n<connect gate=\"-C1\" pin=\"GND\" pad=\"GND1\"/>\n<connect gate=\"-C1\" pin=\"GRN\" pad=\"GRN1\"/>\n<connect gate=\"-C1\" pin=\"RED\" pad=\"RED1\"/>\n<connect gate=\"-C1\" pin=\"SIG1\" pad=\"SIG1\"/>\n<connect gate=\"-C1\" pin=\"SIG2\" pad=\"SIG2\"/>\n<connect gate=\"-C2\" pin=\"BLU\" pad=\"BLU2\"/>\n<connect gate=\"-C2\" pin=\"GND\" pad=\"GND2\"/>\n<connect gate=\"-C2\" pin=\"GRN\" pad=\"GRN2\"/>\n<connect gate=\"-C2\" pin=\"RED\" pad=\"RED2\"/>\n<connect gate=\"-C2\" pin=\"SIG1\" pad=\"SIG3\"/>\n<connect gate=\"-C2\" pin=\"SIG2\" pad=\"SIG4\"/>\n<connect gate=\"-C3\" pin=\"BLU\" pad=\"BLU3\"/>\n<connect gate=\"-C3\" pin=\"GND\" pad=\"GND3\"/>\n<connect gate=\"-C3\" pin=\"GRN\" pad=\"GRN3\"/>\n<connect gate=\"-C3\" pin=\"RED\" pad=\"RED3\"/>\n<connect gate=\"-C3\" pin=\"SIG1\" pad=\"SIG5\"/>\n<connect gate=\"-C3\" pin=\"SIG2\" pad=\"SIG6\"/>\n<connect gate=\"-C4\" pin=\"BLU\" pad=\"BLU4\"/>\n<connect gate=\"-C4\" pin=\"GND\" pad=\"GND4\"/>\n<connect gate=\"-C4\" pin=\"GRN\" pad=\"GRN4\"/>\n<connect gate=\"-C4\" pin=\"RED\" pad=\"RED4\"/>\n<connect gate=\"-C4\" pin=\"SIG1\" pad=\"SIG7\"/>\n<connect gate=\"-C4\" pin=\"SIG2\" pad=\"SIG8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-SPECIAL\" package=\"BUTTONPAD-2X2-SPECIAL\">\n<connects>\n<connect gate=\"-C1\" pin=\"BLU\" pad=\"BLU1\"/>\n<connect gate=\"-C1\" pin=\"GND\" pad=\"GND1\"/>\n<connect gate=\"-C1\" pin=\"GRN\" pad=\"GRN1\"/>\n<connect gate=\"-C1\" pin=\"RED\" pad=\"RED1\"/>\n<connect gate=\"-C1\" pin=\"SIG1\" pad=\"SIG1\"/>\n<connect gate=\"-C1\" pin=\"SIG2\" pad=\"SIG2\"/>\n<connect gate=\"-C2\" pin=\"BLU\" pad=\"BLU2\"/>\n<connect gate=\"-C2\" pin=\"GND\" pad=\"GND2\"/>\n<connect gate=\"-C2\" pin=\"GRN\" pad=\"GRN2\"/>\n<connect gate=\"-C2\" pin=\"RED\" pad=\"RED2\"/>\n<connect gate=\"-C2\" pin=\"SIG1\" pad=\"SIG3\"/>\n<connect gate=\"-C2\" pin=\"SIG2\" pad=\"SIG4\"/>\n<connect gate=\"-C3\" pin=\"BLU\" pad=\"BLU3\"/>\n<connect gate=\"-C3\" pin=\"GND\" pad=\"GND3\"/>\n<connect gate=\"-C3\" pin=\"GRN\" pad=\"GRN3\"/>\n<connect gate=\"-C3\" pin=\"RED\" pad=\"RED3\"/>\n<connect gate=\"-C3\" pin=\"SIG1\" pad=\"SIG5\"/>\n<connect gate=\"-C3\" pin=\"SIG2\" pad=\"SIG6\"/>\n<connect gate=\"-C4\" pin=\"BLU\" pad=\"BLU4\"/>\n<connect gate=\"-C4\" pin=\"GND\" pad=\"GND4\"/>\n<connect gate=\"-C4\" pin=\"GRN\" pad=\"GRN4\"/>\n<connect gate=\"-C4\" pin=\"RED\" pad=\"RED4\"/>\n<connect gate=\"-C4\" pin=\"SIG1\" pad=\"SIG7\"/>\n<connect gate=\"-C4\" pin=\"SIG2\" pad=\"SIG8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"BUTTONPAD-2X2SINGLE\">\n<description>Proto layout and schematic for 2x2 button pad with single color LEDs (used on Simon board). Panelize this device/fp to a 4x4 pad if needed. Any single-color 5mm LED should be compatible. Spark Fun Electronics SKU : COM-07835.</description>\n<gates>\n<gate name=\"C1\" symbol=\"BUTTONPAD_1LED\" x=\"-20.32\" y=\"-15.24\"/>\n<gate name=\"C2\" symbol=\"BUTTONPAD_1LED\" x=\"20.32\" y=\"-15.24\"/>\n<gate name=\"C3\" symbol=\"BUTTONPAD_1LED\" x=\"-20.32\" y=\"15.24\"/>\n<gate name=\"C4\" symbol=\"BUTTONPAD_1LED\" x=\"20.32\" y=\"15.24\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"BUTTONPAD-2X2SINGLE\">\n<connects>\n<connect gate=\"C1\" pin=\"A\" pad=\"A1\"/>\n<connect gate=\"C1\" pin=\"K\" pad=\"K1\"/>\n<connect gate=\"C1\" pin=\"SIG1\" pad=\"SIG1\"/>\n<connect gate=\"C1\" pin=\"SIG2\" pad=\"SIG2\"/>\n<connect gate=\"C2\" pin=\"A\" pad=\"A2\"/>\n<connect gate=\"C2\" pin=\"K\" pad=\"K2\"/>\n<connect gate=\"C2\" pin=\"SIG1\" pad=\"SIG3\"/>\n<connect gate=\"C2\" pin=\"SIG2\" pad=\"SIG4\"/>\n<connect gate=\"C3\" pin=\"A\" pad=\"A3\"/>\n<connect gate=\"C3\" pin=\"K\" pad=\"K3\"/>\n<connect gate=\"C3\" pin=\"SIG1\" pad=\"SIG5\"/>\n<connect gate=\"C3\" pin=\"SIG2\" pad=\"SIG6\"/>\n<connect gate=\"C4\" pin=\"A\" pad=\"A4\"/>\n<connect gate=\"C4\" pin=\"K\" pad=\"K4\"/>\n<connect gate=\"C4\" pin=\"SIG1\" pad=\"SIG7\"/>\n<connect gate=\"C4\" pin=\"SIG2\" pad=\"SIG8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KIT\" package=\"BUTTONPAD-2X2SINGLE-KIT\">\n<connects>\n<connect gate=\"C1\" pin=\"A\" pad=\"A1\"/>\n<connect gate=\"C1\" pin=\"K\" pad=\"K1\"/>\n<connect gate=\"C1\" pin=\"SIG1\" pad=\"SIG1\"/>\n<connect gate=\"C1\" pin=\"SIG2\" pad=\"SIG2\"/>\n<connect gate=\"C2\" pin=\"A\" pad=\"A2\"/>\n<connect gate=\"C2\" pin=\"K\" pad=\"K2\"/>\n<connect gate=\"C2\" pin=\"SIG1\" pad=\"SIG3\"/>\n<connect gate=\"C2\" pin=\"SIG2\" pad=\"SIG4\"/>\n<connect gate=\"C3\" pin=\"A\" pad=\"A3\"/>\n<connect gate=\"C3\" pin=\"K\" pad=\"K3\"/>\n<connect gate=\"C3\" pin=\"SIG1\" pad=\"SIG5\"/>\n<connect gate=\"C3\" pin=\"SIG2\" pad=\"SIG6\"/>\n<connect gate=\"C4\" pin=\"A\" pad=\"A4\"/>\n<connect gate=\"C4\" pin=\"K\" pad=\"K4\"/>\n<connect gate=\"C4\" pin=\"SIG1\" pad=\"SIG7\"/>\n<connect gate=\"C4\" pin=\"SIG2\" pad=\"SIG8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"BUTTONPAD-4X4\">\n<description>Proto layout and schematic for 4x4 button pad. Spark Fun Electronics SKU : COM-07835. Compatible common cathode tri-color LED SKU : COM-00105</description>\n<gates>\n<gate name=\"G$0\" symbol=\"BUTTONPAD_SINGLE\" x=\"0\" y=\"0\"/>\n<gate name=\"G$1\" symbol=\"BUTTONPAD_SINGLE\" x=\"35.56\" y=\"0\"/>\n<gate name=\"G$2\" symbol=\"BUTTONPAD_SINGLE\" x=\"71.12\" y=\"0\"/>\n<gate name=\"G$3\" symbol=\"BUTTONPAD_SINGLE\" x=\"106.68\" y=\"0\"/>\n<gate name=\"G$4\" symbol=\"BUTTONPAD_SINGLE\" x=\"0\" y=\"-22.86\"/>\n<gate name=\"G$5\" symbol=\"BUTTONPAD_SINGLE\" x=\"35.56\" y=\"-22.86\"/>\n<gate name=\"G$6\" symbol=\"BUTTONPAD_SINGLE\" x=\"71.12\" y=\"-22.86\"/>\n<gate name=\"G$7\" symbol=\"BUTTONPAD_SINGLE\" x=\"106.68\" y=\"-22.86\"/>\n<gate name=\"G$8\" symbol=\"BUTTONPAD_SINGLE\" x=\"0\" y=\"-45.72\"/>\n<gate name=\"G$9\" symbol=\"BUTTONPAD_SINGLE\" x=\"35.56\" y=\"-45.72\"/>\n<gate name=\"G$10\" symbol=\"BUTTONPAD_SINGLE\" x=\"71.12\" y=\"-45.72\"/>\n<gate name=\"G$11\" symbol=\"BUTTONPAD_SINGLE\" x=\"106.68\" y=\"-45.72\"/>\n<gate name=\"G$12\" symbol=\"BUTTONPAD_SINGLE\" x=\"0\" y=\"-68.58\"/>\n<gate name=\"G$13\" symbol=\"BUTTONPAD_SINGLE\" x=\"35.56\" y=\"-68.58\"/>\n<gate name=\"G$14\" symbol=\"BUTTONPAD_SINGLE\" x=\"71.12\" y=\"-68.58\"/>\n<gate name=\"G$15\" symbol=\"BUTTONPAD_SINGLE\" x=\"106.68\" y=\"-68.58\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"BUTTONPAD-4X4\">\n<connects>\n<connect gate=\"G$0\" pin=\"BLU\" pad=\"BLU0\"/>\n<connect gate=\"G$0\" pin=\"GND\" pad=\"GND0\"/>\n<connect gate=\"G$0\" pin=\"GRN\" pad=\"GRN0\"/>\n<connect gate=\"G$0\" pin=\"RED\" pad=\"RED0\"/>\n<connect gate=\"G$0\" pin=\"SIG1\" pad=\"SIG0\"/>\n<connect gate=\"G$0\" pin=\"SIG2\" pad=\"SIG1\"/>\n<connect gate=\"G$1\" pin=\"BLU\" pad=\"BLU1\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND1\"/>\n<connect gate=\"G$1\" pin=\"GRN\" pad=\"GRN1\"/>\n<connect gate=\"G$1\" pin=\"RED\" pad=\"RED1\"/>\n<connect gate=\"G$1\" pin=\"SIG1\" pad=\"SIG2\"/>\n<connect gate=\"G$1\" pin=\"SIG2\" pad=\"SIG3\"/>\n<connect gate=\"G$10\" pin=\"BLU\" pad=\"BLU10\"/>\n<connect gate=\"G$10\" pin=\"GND\" pad=\"GND10\"/>\n<connect gate=\"G$10\" pin=\"GRN\" pad=\"GRN10\"/>\n<connect gate=\"G$10\" pin=\"RED\" pad=\"RED10\"/>\n<connect gate=\"G$10\" pin=\"SIG1\" pad=\"SIG20\"/>\n<connect gate=\"G$10\" pin=\"SIG2\" pad=\"SIG21\"/>\n<connect gate=\"G$11\" pin=\"BLU\" pad=\"BLU11\"/>\n<connect gate=\"G$11\" pin=\"GND\" pad=\"GND11\"/>\n<connect gate=\"G$11\" pin=\"GRN\" pad=\"GRN11\"/>\n<connect gate=\"G$11\" pin=\"RED\" pad=\"RED11\"/>\n<connect gate=\"G$11\" pin=\"SIG1\" pad=\"SIG22\"/>\n<connect gate=\"G$11\" pin=\"SIG2\" pad=\"SIG23\"/>\n<connect gate=\"G$12\" pin=\"BLU\" pad=\"BLU12\"/>\n<connect gate=\"G$12\" pin=\"GND\" pad=\"GND12\"/>\n<connect gate=\"G$12\" pin=\"GRN\" pad=\"GRN12\"/>\n<connect gate=\"G$12\" pin=\"RED\" pad=\"RED12\"/>\n<connect gate=\"G$12\" pin=\"SIG1\" pad=\"SIG24\"/>\n<connect gate=\"G$12\" pin=\"SIG2\" pad=\"SIG25\"/>\n<connect gate=\"G$13\" pin=\"BLU\" pad=\"BLU13\"/>\n<connect gate=\"G$13\" pin=\"GND\" pad=\"GND13\"/>\n<connect gate=\"G$13\" pin=\"GRN\" pad=\"GRN13\"/>\n<connect gate=\"G$13\" pin=\"RED\" pad=\"RED13\"/>\n<connect gate=\"G$13\" pin=\"SIG1\" pad=\"SIG26\"/>\n<connect gate=\"G$13\" pin=\"SIG2\" pad=\"SIG27\"/>\n<connect gate=\"G$14\" pin=\"BLU\" pad=\"BLU14\"/>\n<connect gate=\"G$14\" pin=\"GND\" pad=\"GND14\"/>\n<connect gate=\"G$14\" pin=\"GRN\" pad=\"GRN14\"/>\n<connect gate=\"G$14\" pin=\"RED\" pad=\"RED14\"/>\n<connect gate=\"G$14\" pin=\"SIG1\" pad=\"SIG28\"/>\n<connect gate=\"G$14\" pin=\"SIG2\" pad=\"SIG29\"/>\n<connect gate=\"G$15\" pin=\"BLU\" pad=\"BLU15\"/>\n<connect gate=\"G$15\" pin=\"GND\" pad=\"GND15\"/>\n<connect gate=\"G$15\" pin=\"GRN\" pad=\"GRN15\"/>\n<connect gate=\"G$15\" pin=\"RED\" pad=\"RED15\"/>\n<connect gate=\"G$15\" pin=\"SIG1\" pad=\"SIG30\"/>\n<connect gate=\"G$15\" pin=\"SIG2\" pad=\"SIG31\"/>\n<connect gate=\"G$2\" pin=\"BLU\" pad=\"BLU2\"/>\n<connect gate=\"G$2\" pin=\"GND\" pad=\"GND2\"/>\n<connect gate=\"G$2\" pin=\"GRN\" pad=\"GRN2\"/>\n<connect gate=\"G$2\" pin=\"RED\" pad=\"RED2\"/>\n<connect gate=\"G$2\" pin=\"SIG1\" pad=\"SIG4\"/>\n<connect gate=\"G$2\" pin=\"SIG2\" pad=\"SIG5\"/>\n<connect gate=\"G$3\" pin=\"BLU\" pad=\"BLU3\"/>\n<connect gate=\"G$3\" pin=\"GND\" pad=\"GND3\"/>\n<connect gate=\"G$3\" pin=\"GRN\" pad=\"GRN3\"/>\n<connect gate=\"G$3\" pin=\"RED\" pad=\"RED3\"/>\n<connect gate=\"G$3\" pin=\"SIG1\" pad=\"SIG6\"/>\n<connect gate=\"G$3\" pin=\"SIG2\" pad=\"SIG7\"/>\n<connect gate=\"G$4\" pin=\"BLU\" pad=\"BLU4\"/>\n<connect gate=\"G$4\" pin=\"GND\" pad=\"GND4\"/>\n<connect gate=\"G$4\" pin=\"GRN\" pad=\"GRN4\"/>\n<connect gate=\"G$4\" pin=\"RED\" pad=\"RED4\"/>\n<connect gate=\"G$4\" pin=\"SIG1\" pad=\"SIG8\"/>\n<connect gate=\"G$4\" pin=\"SIG2\" pad=\"SIG9\"/>\n<connect gate=\"G$5\" pin=\"BLU\" pad=\"BLU5\"/>\n<connect gate=\"G$5\" pin=\"GND\" pad=\"GND5\"/>\n<connect gate=\"G$5\" pin=\"GRN\" pad=\"GRN6\"/>\n<connect gate=\"G$5\" pin=\"RED\" pad=\"RED5\"/>\n<connect gate=\"G$5\" pin=\"SIG1\" pad=\"SIG10\"/>\n<connect gate=\"G$5\" pin=\"SIG2\" pad=\"SIG11\"/>\n<connect gate=\"G$6\" pin=\"BLU\" pad=\"BLU6\"/>\n<connect gate=\"G$6\" pin=\"GND\" pad=\"GND6\"/>\n<connect gate=\"G$6\" pin=\"GRN\" pad=\"GRN5\"/>\n<connect gate=\"G$6\" pin=\"RED\" pad=\"RED6\"/>\n<connect gate=\"G$6\" pin=\"SIG1\" pad=\"SIG12\"/>\n<connect gate=\"G$6\" pin=\"SIG2\" pad=\"SIG13\"/>\n<connect gate=\"G$7\" pin=\"BLU\" pad=\"BLU7\"/>\n<connect gate=\"G$7\" pin=\"GND\" pad=\"GND7\"/>\n<connect gate=\"G$7\" pin=\"GRN\" pad=\"GRN7\"/>\n<connect gate=\"G$7\" pin=\"RED\" pad=\"RED7\"/>\n<connect gate=\"G$7\" pin=\"SIG1\" pad=\"SIG14\"/>\n<connect gate=\"G$7\" pin=\"SIG2\" pad=\"SIG15\"/>\n<connect gate=\"G$8\" pin=\"BLU\" pad=\"BLU8\"/>\n<connect gate=\"G$8\" pin=\"GND\" pad=\"GND8\"/>\n<connect gate=\"G$8\" pin=\"GRN\" pad=\"GRN8\"/>\n<connect gate=\"G$8\" pin=\"RED\" pad=\"RED8\"/>\n<connect gate=\"G$8\" pin=\"SIG1\" pad=\"SIG16\"/>\n<connect gate=\"G$8\" pin=\"SIG2\" pad=\"SIG17\"/>\n<connect gate=\"G$9\" pin=\"BLU\" pad=\"BLU9\"/>\n<connect gate=\"G$9\" pin=\"GND\" pad=\"GND9\"/>\n<connect gate=\"G$9\" pin=\"GRN\" pad=\"GRN9\"/>\n<connect gate=\"G$9\" pin=\"RED\" pad=\"RED9\"/>\n<connect gate=\"G$9\" pin=\"SIG1\" pad=\"SIG18\"/>\n<connect gate=\"G$9\" pin=\"SIG2\" pad=\"SIG19\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SPECIAL\" package=\"BUTTONPAD-4X4-SPECIAL\">\n<connects>\n<connect gate=\"G$0\" pin=\"BLU\" pad=\"BLU0\"/>\n<connect gate=\"G$0\" pin=\"GND\" pad=\"GND0\"/>\n<connect gate=\"G$0\" pin=\"GRN\" pad=\"GRN0\"/>\n<connect gate=\"G$0\" pin=\"RED\" pad=\"RED0\"/>\n<connect gate=\"G$0\" pin=\"SIG1\" pad=\"SIG0\"/>\n<connect gate=\"G$0\" pin=\"SIG2\" pad=\"SIG1\"/>\n<connect gate=\"G$1\" pin=\"BLU\" pad=\"BLU1\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND1\"/>\n<connect gate=\"G$1\" pin=\"GRN\" pad=\"GRN1\"/>\n<connect gate=\"G$1\" pin=\"RED\" pad=\"RED1\"/>\n<connect gate=\"G$1\" pin=\"SIG1\" pad=\"SIG2\"/>\n<connect gate=\"G$1\" pin=\"SIG2\" pad=\"SIG3\"/>\n<connect gate=\"G$10\" pin=\"BLU\" pad=\"BLU10\"/>\n<connect gate=\"G$10\" pin=\"GND\" pad=\"GND10\"/>\n<connect gate=\"G$10\" pin=\"GRN\" pad=\"GRN10\"/>\n<connect gate=\"G$10\" pin=\"RED\" pad=\"RED10\"/>\n<connect gate=\"G$10\" pin=\"SIG1\" pad=\"SIG20\"/>\n<connect gate=\"G$10\" pin=\"SIG2\" pad=\"SIG21\"/>\n<connect gate=\"G$11\" pin=\"BLU\" pad=\"BLU11\"/>\n<connect gate=\"G$11\" pin=\"GND\" pad=\"GND11\"/>\n<connect gate=\"G$11\" pin=\"GRN\" pad=\"GRN11\"/>\n<connect gate=\"G$11\" pin=\"RED\" pad=\"RED11\"/>\n<connect gate=\"G$11\" pin=\"SIG1\" pad=\"SIG22\"/>\n<connect gate=\"G$11\" pin=\"SIG2\" pad=\"SIG23\"/>\n<connect gate=\"G$12\" pin=\"BLU\" pad=\"BLU12\"/>\n<connect gate=\"G$12\" pin=\"GND\" pad=\"GND12\"/>\n<connect gate=\"G$12\" pin=\"GRN\" pad=\"GRN12\"/>\n<connect gate=\"G$12\" pin=\"RED\" pad=\"RED12\"/>\n<connect gate=\"G$12\" pin=\"SIG1\" pad=\"SIG24\"/>\n<connect gate=\"G$12\" pin=\"SIG2\" pad=\"SIG25\"/>\n<connect gate=\"G$13\" pin=\"BLU\" pad=\"BLU13\"/>\n<connect gate=\"G$13\" pin=\"GND\" pad=\"GND13\"/>\n<connect gate=\"G$13\" pin=\"GRN\" pad=\"GRN13\"/>\n<connect gate=\"G$13\" pin=\"RED\" pad=\"RED13\"/>\n<connect gate=\"G$13\" pin=\"SIG1\" pad=\"SIG26\"/>\n<connect gate=\"G$13\" pin=\"SIG2\" pad=\"SIG27\"/>\n<connect gate=\"G$14\" pin=\"BLU\" pad=\"BLU14\"/>\n<connect gate=\"G$14\" pin=\"GND\" pad=\"GND14\"/>\n<connect gate=\"G$14\" pin=\"GRN\" pad=\"GRN14\"/>\n<connect gate=\"G$14\" pin=\"RED\" pad=\"RED14\"/>\n<connect gate=\"G$14\" pin=\"SIG1\" pad=\"SIG28\"/>\n<connect gate=\"G$14\" pin=\"SIG2\" pad=\"SIG29\"/>\n<connect gate=\"G$15\" pin=\"BLU\" pad=\"BLU15\"/>\n<connect gate=\"G$15\" pin=\"GND\" pad=\"GND15\"/>\n<connect gate=\"G$15\" pin=\"GRN\" pad=\"GRN15\"/>\n<connect gate=\"G$15\" pin=\"RED\" pad=\"RED15\"/>\n<connect gate=\"G$15\" pin=\"SIG1\" pad=\"SIG30\"/>\n<connect gate=\"G$15\" pin=\"SIG2\" pad=\"SIG31\"/>\n<connect gate=\"G$2\" pin=\"BLU\" pad=\"BLU2\"/>\n<connect gate=\"G$2\" pin=\"GND\" pad=\"GND2\"/>\n<connect gate=\"G$2\" pin=\"GRN\" pad=\"GRN2\"/>\n<connect gate=\"G$2\" pin=\"RED\" pad=\"RED2\"/>\n<connect gate=\"G$2\" pin=\"SIG1\" pad=\"SIG4\"/>\n<connect gate=\"G$2\" pin=\"SIG2\" pad=\"SIG5\"/>\n<connect gate=\"G$3\" pin=\"BLU\" pad=\"BLU3\"/>\n<connect gate=\"G$3\" pin=\"GND\" pad=\"GND3\"/>\n<connect gate=\"G$3\" pin=\"GRN\" pad=\"GRN3\"/>\n<connect gate=\"G$3\" pin=\"RED\" pad=\"RED3\"/>\n<connect gate=\"G$3\" pin=\"SIG1\" pad=\"SIG6\"/>\n<connect gate=\"G$3\" pin=\"SIG2\" pad=\"SIG7\"/>\n<connect gate=\"G$4\" pin=\"BLU\" pad=\"BLU4\"/>\n<connect gate=\"G$4\" pin=\"GND\" pad=\"GND4\"/>\n<connect gate=\"G$4\" pin=\"GRN\" pad=\"GRN4\"/>\n<connect gate=\"G$4\" pin=\"RED\" pad=\"RED4\"/>\n<connect gate=\"G$4\" pin=\"SIG1\" pad=\"SIG8\"/>\n<connect gate=\"G$4\" pin=\"SIG2\" pad=\"SIG9\"/>\n<connect gate=\"G$5\" pin=\"BLU\" pad=\"BLU5\"/>\n<connect gate=\"G$5\" pin=\"GND\" pad=\"GND5\"/>\n<connect gate=\"G$5\" pin=\"GRN\" pad=\"GRN6\"/>\n<connect gate=\"G$5\" pin=\"RED\" pad=\"RED5\"/>\n<connect gate=\"G$5\" pin=\"SIG1\" pad=\"SIG10\"/>\n<connect gate=\"G$5\" pin=\"SIG2\" pad=\"SIG11\"/>\n<connect gate=\"G$6\" pin=\"BLU\" pad=\"BLU6\"/>\n<connect gate=\"G$6\" pin=\"GND\" pad=\"GND6\"/>\n<connect gate=\"G$6\" pin=\"GRN\" pad=\"GRN5\"/>\n<connect gate=\"G$6\" pin=\"RED\" pad=\"RED6\"/>\n<connect gate=\"G$6\" pin=\"SIG1\" pad=\"SIG12\"/>\n<connect gate=\"G$6\" pin=\"SIG2\" pad=\"SIG13\"/>\n<connect gate=\"G$7\" pin=\"BLU\" pad=\"BLU7\"/>\n<connect gate=\"G$7\" pin=\"GND\" pad=\"GND7\"/>\n<connect gate=\"G$7\" pin=\"GRN\" pad=\"GRN7\"/>\n<connect gate=\"G$7\" pin=\"RED\" pad=\"RED7\"/>\n<connect gate=\"G$7\" pin=\"SIG1\" pad=\"SIG14\"/>\n<connect gate=\"G$7\" pin=\"SIG2\" pad=\"SIG15\"/>\n<connect gate=\"G$8\" pin=\"BLU\" pad=\"BLU8\"/>\n<connect gate=\"G$8\" pin=\"GND\" pad=\"GND8\"/>\n<connect gate=\"G$8\" pin=\"GRN\" pad=\"GRN8\"/>\n<connect gate=\"G$8\" pin=\"RED\" pad=\"RED8\"/>\n<connect gate=\"G$8\" pin=\"SIG1\" pad=\"SIG16\"/>\n<connect gate=\"G$8\" pin=\"SIG2\" pad=\"SIG17\"/>\n<connect gate=\"G$9\" pin=\"BLU\" pad=\"BLU9\"/>\n<connect gate=\"G$9\" pin=\"GND\" pad=\"GND9\"/>\n<connect gate=\"G$9\" pin=\"GRN\" pad=\"GRN9\"/>\n<connect gate=\"G$9\" pin=\"RED\" pad=\"RED9\"/>\n<connect gate=\"G$9\" pin=\"SIG1\" pad=\"SIG18\"/>\n<connect gate=\"G$9\" pin=\"SIG2\" pad=\"SIG19\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"BUZZER\" prefix=\"SG\">\n<description>&lt;b&gt;Buzzer 12mm&lt;/b&gt;\nSpark Fun Electronics SKU : Comp-Buzzer</description>\n<gates>\n<gate name=\"G$1\" symbol=\"BUZZER\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"BUZZER-12MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"BUZZER-CMT1603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD2\" package=\"BUZZER-CCV\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD3\" package=\"BUZZER-CMT1102\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"NS\" package=\"BUZZER-12MM-NS\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH-NS-KIT\" package=\"BUZZER-12MM-NS-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"COMP-08253\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD2-KIT\" package=\"BUZZER-CCV-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH-KIT\" package=\"BUZZER-12MM-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"COMP-08253\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"CAPSENSE_PAD\">\n<description>Generic copper pad for a capacitive touch sensor.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"CAPSENSE_PAD\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"CAPSENSE_PAD\">\n<connects>\n<connect gate=\"G$1\" pin=\"RECEIVE\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"RES\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"FKIT-COIN_CELL\" prefix=\"BATT\">\n<description>&lt;h3&gt;Fabrick.it Coin Cell Holder&lt;/h3&gt;\nCoin cell holder for 24.5mm rechargable coin cell</description>\n<gates>\n<gate name=\"G$1\" symbol=\"FKIT-BATTERY\" x=\"0\" y=\"-2.54\"/>\n</gates>\n<devices>\n<device name=\"LIR2450-H\" package=\"FKIT-LIR2450-H\">\n<connects>\n<connect gate=\"G$1\" pin=\"NEG\" pad=\"NEG\"/>\n<connect gate=\"G$1\" pin=\"POS\" pad=\"POS\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"FKIT-RIBBON_CONNECTOR\" prefix=\"J\">\n<description>&lt;h3&gt;fabrick.it Conductive Ribbon Connector&lt;/h3&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"FKIT-CONNECTOR_COND_03\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"-2MM_L_REV2\" package=\"FKIT-RIBBON_CONNECTOR_03_2MM_L\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"P1A\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"P2A\"/>\n<connect gate=\"G$1\" pin=\"P$3\" pad=\"P3A\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-2MM_R_REV2\" package=\"FKIT-RIBBON_CONNECTOR_03_2MM_R\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"P1A\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"P2A\"/>\n<connect gate=\"G$1\" pin=\"P$3\" pad=\"P3A\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"FKIT-SNAP_CONNECTOR\">\n<description>Snap connector for Fabrick.it products</description>\n<gates>\n<gate name=\"G$1\" symbol=\"FKIT-SNAP_CONNECTOR\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"-FEMALE\" package=\"FKIT-SNAP_FEMALE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-MALE\" package=\"FKIT-SNAP_MALE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"G3VM-61E1\">\n<description>Omron NO solid state relay</description>\n<gates>\n<gate name=\"G$1\" symbol=\"G3VM-61E1\" x=\"-7.62\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"G3VM-61E1\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"P$2\"/>\n<connect gate=\"G$1\" pin=\"P$3\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"P$4\" pad=\"P$4\"/>\n<connect gate=\"G$1\" pin=\"P$5\" pad=\"P$5\"/>\n<connect gate=\"G$1\" pin=\"P$6\" pad=\"P$6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JOYSTICK\" prefix=\"U\">\n<description>&lt;b&gt;Thumb Joystick&lt;/b&gt;\nJoystick commonly found in PS2 controllers. Two pots and a select switch. Footprint proven. Spark Fun Electronics SKU : COM-09032</description>\n<gates>\n<gate name=\"G$1\" symbol=\"JOYSTICK\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"JOYSTICK\">\n<connects>\n<connect gate=\"G$1\" pin=\"H\" pad=\"H2\"/>\n<connect gate=\"G$1\" pin=\"H+\" pad=\"H1\"/>\n<connect gate=\"G$1\" pin=\"H-\" pad=\"H3\"/>\n<connect gate=\"G$1\" pin=\"SEL+\" pad=\"B1A\"/>\n<connect gate=\"G$1\" pin=\"SEL-\" pad=\"B2A\"/>\n<connect gate=\"G$1\" pin=\"V\" pad=\"V2\"/>\n<connect gate=\"G$1\" pin=\"V+\" pad=\"V1\"/>\n<connect gate=\"G$1\" pin=\"V-\" pad=\"V3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JOYSTICK-PSP1000\">\n<description>This is a footprint for the PSP-1000 Joystick.  4-pins: X, Y, Vcc and GND</description>\n<gates>\n<gate name=\"G$1\" symbol=\"JOYSTICK-PSP1000\" x=\"0\" y=\"-2.54\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"JOYSTICK-PSP1000\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND\"/>\n<connect gate=\"G$1\" pin=\"VCC\" pad=\"VCC\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"X\"/>\n<connect gate=\"G$1\" pin=\"Y\" pad=\"Y\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JOYSTICK_MINI\" prefix=\"S\" uservalue=\"yes\">\n<description>Small 5-way tactile joystick, COM-10063&lt;p&gt;\n4UCON SF303GJ26</description>\n<gates>\n<gate name=\"G$1\" symbol=\"JOYSTICK_MINI\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"JOYSTICK_MINI\">\n<connects>\n<connect gate=\"G$1\" pin=\"CENT\" pad=\"CTR\"/>\n<connect gate=\"G$1\" pin=\"DOWN\" pad=\"D\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND\"/>\n<connect gate=\"G$1\" pin=\"LEFT\" pad=\"C\"/>\n<connect gate=\"G$1\" pin=\"RIGHT\" pad=\"B\"/>\n<connect gate=\"G$1\" pin=\"UP\" pad=\"A\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-09905\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"LIPO-OUTLINE\">\n<description>Outlines for common LiPo batteries sold by SparkFun.&lt;br&gt;\nFor fit only- no pads or connectors!</description>\n<gates>\n<gate name=\"G$1\" symbol=\"LIPO-1100\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"1100\" package=\"LIPO-1100\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"2000\" package=\"LIPO-2000\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"100\" package=\"LIPO-100\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"MAGNET\">\n<description>Ceramic disc magnet, COM-08890</description>\n<gates>\n<gate name=\"G$1\" symbol=\"MAGNET\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"18MM\" package=\"MAGNET-18MM\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"MOTOR\">\n<description>&lt;b&gt;Vibration Motor- ROB-08449&lt;/b&gt;\nPhysical dimension and wire connections for this powerful vibration motor. Motor has a self adhesive backing.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"MOTOR\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"10MM\" package=\"VIBE-MOTOR-10MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"N35P112\" prefix=\"U\" uservalue=\"yes\">\n<description>Hall-effect based I2C analog mini-joystick with button</description>\n<gates>\n<gate name=\"G$1\" symbol=\"N35P112\" x=\"-17.78\" y=\"-12.7\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"N35P112\">\n<connects>\n<connect gate=\"G$1\" pin=\"ADDR\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"GND1\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GND2\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"GND3\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"GND4\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"GND5\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"INTN\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"RESETN\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"SWITCHN\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"VDDP\" pad=\"1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"NAV_SWITCH\">\n<description>&lt;b&gt;Navigation Switch&lt;/b&gt;\nThree way navigation switch. Commonly used as up/down/select on MP3 players. Schematic element and footprint production proven. Spark Fun Electronics SKU : COM-08184</description>\n<gates>\n<gate name=\"G$1\" symbol=\"NAV_SWITCH\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SMD\" package=\"NAV_SWITCH\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n<connect gate=\"G$1\" pin=\"T\" pad=\"T\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08301\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"POT\" prefix=\"RV\" uservalue=\"yes\">\n<gates>\n<gate name=\"G$1\" symbol=\"POT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ALPS_POT\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-09177\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"TRIM\" package=\"TRIM_POT\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"100K_3362U\" package=\"3362U\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-RV16AF-20\" package=\"POT_ALPHA_RV16AF-20\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MAM\" package=\"POT_MAMMOTH\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"P$2\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"ALPS-KIT\" package=\"ALPS_POT_KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-09177\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"RELAY-2\">\n<description>SPDT relay (COM-00100)</description>\n<gates>\n<gate name=\"G$1\" symbol=\"RELAY-SPDT-2\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"G5Q\" package=\"RELAY-G5V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"RELAY\">\n<description>SPDT relay (COM-00101)</description>\n<gates>\n<gate name=\"K$1\" symbol=\"RELAY-SPDT\" x=\"2.54\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"RELAY-G5Q\">\n<connects>\n<connect gate=\"K$1\" pin=\"COIL1\" pad=\"5\"/>\n<connect gate=\"K$1\" pin=\"COIL2\" pad=\"1\"/>\n<connect gate=\"K$1\" pin=\"MAIN\" pad=\"2\"/>\n<connect gate=\"K$1\" pin=\"NC\" pad=\"4\"/>\n<connect gate=\"K$1\" pin=\"NO\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH2\" package=\"RELAY-T9A\">\n<connects>\n<connect gate=\"K$1\" pin=\"COIL1\" pad=\"COIL1\"/>\n<connect gate=\"K$1\" pin=\"COIL2\" pad=\"COIL2\"/>\n<connect gate=\"K$1\" pin=\"MAIN\" pad=\"MAIN\"/>\n<connect gate=\"K$1\" pin=\"NC\" pad=\"NC\"/>\n<connect gate=\"K$1\" pin=\"NO\" pad=\"NO\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH3\" package=\"RELAY-T9A-2\">\n<connects>\n<connect gate=\"K$1\" pin=\"COIL1\" pad=\"COIL1\"/>\n<connect gate=\"K$1\" pin=\"COIL2\" pad=\"COIL2\"/>\n<connect gate=\"K$1\" pin=\"MAIN\" pad=\"MAIN\"/>\n<connect gate=\"K$1\" pin=\"NC\" pad=\"NC\"/>\n<connect gate=\"K$1\" pin=\"NO\" pad=\"NO\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH4\" package=\"RELAY-JZC\">\n<connects>\n<connect gate=\"K$1\" pin=\"COIL1\" pad=\"5\"/>\n<connect gate=\"K$1\" pin=\"COIL2\" pad=\"1\"/>\n<connect gate=\"K$1\" pin=\"MAIN\" pad=\"4\"/>\n<connect gate=\"K$1\" pin=\"NC\" pad=\"2\"/>\n<connect gate=\"K$1\" pin=\"NO\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH5\" package=\"RELAY-T90\">\n<connects>\n<connect gate=\"K$1\" pin=\"COIL1\" pad=\"COIL1\"/>\n<connect gate=\"K$1\" pin=\"COIL2\" pad=\"COIL2\"/>\n<connect gate=\"K$1\" pin=\"MAIN\" pad=\"MAIN\"/>\n<connect gate=\"K$1\" pin=\"NC\" pad=\"NC\"/>\n<connect gate=\"K$1\" pin=\"NO\" pad=\"NO\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"COMP-10736\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"JQX-15F\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"RELAY-SOLIDSTATE\" prefix=\"U\">\n<description>SPST SS relay</description>\n<gates>\n<gate name=\"G$1\" symbol=\"RELAY-SOLIDSTATE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"RELAY-S108T02\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"T1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"T2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SLIDER\" prefix=\"VR\" uservalue=\"yes\">\n<description>Slide-type potentiometers.  \n\nSmall and meduim footprints untested.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"POT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"60MM\" package=\"SLIDER\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"2A\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-09484\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"30MM\" package=\"SLIDER-MEDIUM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"BOTTOM\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"TOP\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"WIPER\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"COM-11621\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"20MM\" package=\"SLIDER-SMALL\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"BOTTOM\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"TOP\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"WIPER\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"COM-11620\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"30MM-KIT\" package=\"SLIDER-MEDIUM-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"BOTTOM\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"TOP\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"WIPER\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-11931\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"STAND-OFF\" prefix=\"H\">\n<description>&lt;b&gt;#4 Stand Off&lt;/b&gt;&lt;p&gt;\nThis is the mechanical footprint for a #4 phillips button head screw. Use the keepout ring to avoid running the screw head into surrounding components. SKU : PRT-00447</description>\n<gates>\n<gate name=\"G$1\" symbol=\"STAND-OFF\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"STAND-OFF\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TIGHT\" package=\"STAND-OFF-TIGHT\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-4PDT\">\n<description>For use with a push-button switch made by CnK components.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SWITCH-4PDT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"CNK_LOCK\" package=\"SWITCH-4PDT-CNK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"PP$1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"PP$10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"PP$11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"PP$12\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"PP$2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"PP$3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"PP$4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"PP$5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"PP$6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"PP$7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"PP$8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"PP$9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-DPDT\" prefix=\"S\" uservalue=\"yes\">\n<description>DPDT Version of the COM-00597</description>\n<gates>\n<gate name=\"G$1\" symbol=\"AYZ0202\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"AYZ0202\" package=\"AYZ0202\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08179\"/>\n<attribute name=\"VALUE\" value=\"DPDT\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"PTH\" package=\"MSS22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH1\" package=\"MS\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"ES\" package=\"ES\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"OS\" package=\"OS\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"EG2211\" package=\"EG2211\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P1-TA\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P1\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"P1-TB\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"P2-TA\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"P2\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"P2-TB\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"GPI\" package=\"GPI-152-3013\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"C@1\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"C@2\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"21\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"STOMP-PTH\" package=\"STOMP-SWITCH-DPDT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"P$4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"P$5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"P$6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-MOMENTARY-2\" prefix=\"S\">\n<description>Various NO switches- pushbuttons, reed, etc</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SWITCH-MOMENTARY-2\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"TACTILE-PTH\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\" SWCH-08441\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD-2\" package=\"TACTILE_SWITCH_SMD-2\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"1\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-09213\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"12MM\" package=\"TACTILE-PTH-12MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-09185\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD-1101NE\" package=\"TACTILE-SWITCH-1101NE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-00815\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"PTH_REED\" package=\"REED_SWITCH_PTH\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD-4\" package=\"TACTILE_SWITCH_TALL\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"A2\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"B2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-11966\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"PTH_REED2\" package=\"REED_SWITCH_PLASTIC\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-10467\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SIDE_EZ\" package=\"TACTILE-PTH-SIDEEZ\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD-3\" package=\"TACTILE_SWITCH_SMD-3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD-12MM\" package=\"TACTILE-SMD-12MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH_EZ\" package=\"TACTILE-PTH-EZ\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"TACTILE-SWITCH-SMD\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08247\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD-REDUNDANT\" package=\"TACTILE-SWITCH-SMD\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1 2\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3 4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08247\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"TACTILE-SWITCH-SMD-RIGHT-ANGLE\" package=\"TACTILE_SWITCH-SMD-RIGHT-ANGLE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"COMP-12265\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD-4.6X2.8MM\" package=\"TACTILE_SWITCH_SMD_4.6X2.8MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1 2\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3 4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-13065\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-SP3T\" prefix=\"S\" uservalue=\"yes\">\n<gates>\n<gate name=\"G$1\" symbol=\"SWITCH-SP3T\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"SWITCH-SP3T-SMD\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-SPDT\" prefix=\"S\" uservalue=\"yes\">\n<description>&lt;b&gt;SPDT Switch&lt;/b&gt;&lt;br&gt;\nSimple slide switch, Spark Fun Electronics SKU : COM-00102&lt;br&gt;\nDPDT SMT slide switch, AYZ0202, SWCH-08179</description>\n<gates>\n<gate name=\"1\" symbol=\"TOGGLE\" x=\"-2.54\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"SWITCH-SPDT\">\n<connects>\n<connect gate=\"1\" pin=\"O\" pad=\"1\"/>\n<connect gate=\"1\" pin=\"P\" pad=\"2\"/>\n<connect gate=\"1\" pin=\"S\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08261\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"AYZ0202\">\n<connects>\n<connect gate=\"1\" pin=\"O\" pad=\"1\"/>\n<connect gate=\"1\" pin=\"P\" pad=\"2\"/>\n<connect gate=\"1\" pin=\"S\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08179\" constant=\"no\"/>\n<attribute name=\"SF_ID\" value=\"COM-00597\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"PTH2\" package=\"SWITCHE-DPDT\">\n<connects>\n<connect gate=\"1\" pin=\"O\" pad=\"1\"/>\n<connect gate=\"1\" pin=\"P\" pad=\"2\"/>\n<connect gate=\"1\" pin=\"S\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH3\" package=\"R_SW_TH\">\n<connects>\n<connect gate=\"1\" pin=\"O\" pad=\"P$1\"/>\n<connect gate=\"1\" pin=\"P\" pad=\"P$2\"/>\n<connect gate=\"1\" pin=\"S\" pad=\"P$3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD2\" package=\"SWITCH-SPDT-SMD\">\n<connects>\n<connect gate=\"1\" pin=\"O\" pad=\"1\"/>\n<connect gate=\"1\" pin=\"P\" pad=\"2\"/>\n<connect gate=\"1\" pin=\"S\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH_LOCK\" package=\"SWITCH-SPDT_LOCK.007S\">\n<connects>\n<connect gate=\"1\" pin=\"O\" pad=\"1\"/>\n<connect gate=\"1\" pin=\"P\" pad=\"2\"/>\n<connect gate=\"1\" pin=\"S\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KIT\" package=\"SWITCH-SPDT_KIT\">\n<connects>\n<connect gate=\"1\" pin=\"O\" pad=\"1\"/>\n<connect gate=\"1\" pin=\"P\" pad=\"2\"/>\n<connect gate=\"1\" pin=\"S\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08261\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"-SMD-A\" package=\"SWITCH-SPST-SMD-A\">\n<connects>\n<connect gate=\"1\" pin=\"O\" pad=\"1\"/>\n<connect gate=\"1\" pin=\"P\" pad=\"2\"/>\n<connect gate=\"1\" pin=\"S\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-10651\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-SPST-2\">\n<gates>\n<gate name=\"G$1\" symbol=\"SPST\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"RA\" package=\"R_SW_TH\">\n<connects>\n<connect gate=\"G$1\" pin=\"O\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"P\" pad=\"P$4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TV\" package=\"SWITCH-SPST-VERTICAL\">\n<connects>\n<connect gate=\"G$1\" pin=\"O\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"P\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH_SPDT\">\n<description>SWCH-10651\n\nSide-actuated SPDT slide switch, as used on the Arduino Pro</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SW_SPDT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"KPS-1290\">\n<connects>\n<connect gate=\"G$1\" pin=\"O\" pad=\"O\"/>\n<connect gate=\"G$1\" pin=\"P\" pad=\"P\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"S\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-10651\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SW_DIP-2\" prefix=\"SW\" uservalue=\"yes\">\n<description>&lt;b&gt;DIP SWITCH&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SW_DIP-2\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"DIPSWITCH-02\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-SMT-HALFSIZE\" package=\"DIPSWITCH-02-50MIL\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SW_DIP-8\" prefix=\"SW\" uservalue=\"yes\">\n<description>&lt;b&gt;DIP Switch 8 Position&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"SW_DIP-8\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"DIPSWITCH-08\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-SMT-HALFSIZE\" package=\"DIPSWITCH-08-50MIL\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"TRACKBALL\">\n<description>Mechanical footprint for trackball</description>\n<gates>\n<gate name=\"G$1\" symbol=\"TRACKBALL\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"MECH\" package=\"TRACKBALL\">\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"COMP-09237\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"TURRET-1520\" uservalue=\"yes\">\n<description>Turret FP for Keystone Electronics Part#1520</description>\n<gates>\n<gate name=\"G$1\" symbol=\"TURRET\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"1X01_TURRET\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"6400BG_HEATSINK\">\n<description>Multiwatt heatsink, PRT-09576</description>\n<gates>\n<gate name=\"G$1\" symbol=\"6400GB_HEATSINK\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"6400BG_HEATSINK\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SPEAKER\" prefix=\"SP\">\n<description>General speakers.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SPEAKER\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PCB_MOUNT_SPEAKER\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"PCB_MOUNT\">\n<attribute name=\"MFG\" value=\"SANCO\" constant=\"no\"/>\n<attribute name=\"PROD_#\" value=\"NA\" constant=\"no\"/>\n<attribute name=\"SKU\" value=\"COM-11089\" constant=\"no\"/>\n<attribute name=\"SPARKLE_ID\" value=\"6504\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"ENCODER-QUADRATURE\" prefix=\"U\" uservalue=\"yes\">\n<description>quadrature encoder from Top-Up, part#EC16PHBF-B-20F-24-24C-16Y</description>\n<gates>\n<gate name=\"G$1\" symbol=\"ENCODER-QUADRATURE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ENCODER-16MM-QUAD\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"B\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"POT_SWITCH\" prefix=\"U\" uservalue=\"yes\">\n<description>Potentiometer w/ switch.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"POT\" x=\"0\" y=\"0\"/>\n<gate name=\"G$2\" symbol=\"SWITCH-MOMENTARY-2-1\" x=\"15.24\" y=\"7.62\"/>\n</gates>\n<devices>\n<device name=\"POT_PTH\" package=\"POT_PTH\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"E@1\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"E@2\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"WAND\"/>\n<connect gate=\"G$2\" pin=\"1\" pad=\"S1\"/>\n<connect gate=\"G$2\" pin=\"2\" pad=\"S2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"POT_PTH_SWITCH\" package=\"POT_PTH_SWITCH\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"2\"/>\n<connect gate=\"G$2\" pin=\"1\" pad=\"S1\"/>\n<connect gate=\"G$2\" pin=\"2\" pad=\"S2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"TRIMPOT\" prefix=\"R\" uservalue=\"yes\">\n<description>Various small potentiometers for \"set-and-forget\" applications</description>\n<gates>\n<gate name=\"R?\" symbol=\"TRIMPOT-1\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"-2\" package=\"TRIMPOT_TC33\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"1\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"3\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-PTH-KNOB\" package=\"3386U\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"1\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"3\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-09730\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"TSR-3386\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"3MM-2\" package=\"TRIMPOT-3MM-2\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"1\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"3\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-08048\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"10K\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"3362U-2\" package=\"3362U-2\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"1\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"3\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH\" package=\"TRIM_POT_PTH\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"1\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"3\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"TRIMPOT-3MM\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"1\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"3\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TRIMPOT-5MM\" package=\"TRIMPOT-5MM\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"A\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"C\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"B\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TRIMPOT_PTH_S3_LOCK\" package=\"TRIMPOT_PTH_S3_LOCK\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"1\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"3\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"\" package=\"TRIMPOT-5MM-V2\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"A\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"C\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"B\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"RES-11156\" package=\"TRIMPOT_5MM\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"A\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"C\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"B\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-11156\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"RES-09285\" package=\"TRIMPOT-3MM\">\n<connects>\n<connect gate=\"R?\" pin=\"CCW\" pad=\"1\"/>\n<connect gate=\"R?\" pin=\"CW\" pad=\"3\"/>\n<connect gate=\"R?\" pin=\"WIPER\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-09285\"/>\n<attribute name=\"VALUE\" value=\"10k\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"ROTARTY_ENCODER\" prefix=\"SW\">\n<description>Simple no LED rotary encoder&lt;br&gt;\nExample: COM-09117</description>\n<gates>\n<gate name=\"G$1\" symbol=\"ROT_ENCODER\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ROTARY_ENC_PLAIN\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"B\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n<connect gate=\"G$1\" pin=\"SW+\" pad=\"SW+\"/>\n<connect gate=\"G$1\" pin=\"SW-\" pad=\"SW-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"ENCODER_2LED\" prefix=\"U\">\n<description>&lt;H3&gt;Illuminated Rotary Encoder w/ 2 LEDs&lt;/h3&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"ENCODER_LED_2-1\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ENCODER_LED_2\">\n<connects>\n<connect gate=\"G$1\" pin=\"+G\" pad=\"+G\"/>\n<connect gate=\"G$1\" pin=\"+R\" pad=\"+R\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"B\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n<connect gate=\"G$1\" pin=\"SW\" pad=\"SW\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KIT\" package=\"ENCODER_LED_2_KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"+G\" pad=\"+G\"/>\n<connect gate=\"G$1\" pin=\"+R\" pad=\"+R\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"GND\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"B\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n<connect gate=\"G$1\" pin=\"SW\" pad=\"SW\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"ENCODER_RGB_CA\" prefix=\"SW\" uservalue=\"yes\">\n<description>&lt;h3&gt;Illuminated Rotary Encoder w/ RGB LED and select switch&lt;/h3&gt;\n\nEC12PLRGBSDVBF-D: http://top-up.so-buy.com/front/bin/ptdetail.phtml?Part=EC12PLRGBSDVBF-D</description>\n<gates>\n<gate name=\"G$1\" symbol=\"ENCODER_LED_3_CA\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ENCODER_LED_3\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"-B\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"-G\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"-R\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"B\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n<connect gate=\"G$1\" pin=\"SW\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KIT\" package=\"ENCODER_LED_3_KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"-B\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"-G\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"-R\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"B\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n<connect gate=\"G$1\" pin=\"SW\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SMALL_SERVO\" prefix=\"M\">\n<description>&lt;b&gt;Small servo motor&lt;/b&gt;&lt;br&gt;\nThis is the small servo used in the SIK.&lt;br&gt;\nSKU: ROB-09065</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SMALL_SERVO_MOTOR\" x=\"7.62\" y=\"2.54\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X03\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"SIG\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"V+\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-MOMENTARY-LED\" prefix=\"S\">\n<description>EZ is for Kits. There is no tStop (covering up the top side of the pads with mask). This helps the beginner see which side they should be soldering too.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SWITCH-MOMENTARY-LED\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"TACTILE-PTH-LED-12MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"EZ\" package=\"TACTILE-PTH-LED-12MM-EZ\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"STANDOFF_ELECTRICAL\" prefix=\"S\">\n<description>A standoff intended to be an electrically connected point.&lt;br&gt;\nPad size and stop size allow for a #4 Phillips pan screw head to make a solid connection to the board.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"STANDOFF_ELECTRICAL\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"STANDOFF-ELECTRICAL\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"P1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"POT_DUAL\" prefix=\"RV\" uservalue=\"yes\">\n<gates>\n<gate name=\"G$1\" symbol=\"POT\" x=\"0\" y=\"0\"/>\n<gate name=\"G$2\" symbol=\"POT\" x=\"20.32\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"&quot;\" package=\"POT_PANASONIC_DUAL_VERT\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A3\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"A1\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"A2\"/>\n<connect gate=\"G$2\" pin=\"A\" pad=\"B3\"/>\n<connect gate=\"G$2\" pin=\"E\" pad=\"B1\"/>\n<connect gate=\"G$2\" pin=\"S\" pad=\"B2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"DIST\" value=\"digikey\" constant=\"no\"/>\n<attribute name=\"DIST_ID\" value=\" P2A5103-ND\" constant=\"no\"/>\n<attribute name=\"PROD_ID\" value=\"RES-11897\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"\" package=\"POT_PANASONIC_DUAL_VERT_KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A3\"/>\n<connect gate=\"G$1\" pin=\"E\" pad=\"A1\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"A2\"/>\n<connect gate=\"G$2\" pin=\"A\" pad=\"B3\"/>\n<connect gate=\"G$2\" pin=\"E\" pad=\"B1\"/>\n<connect gate=\"G$2\" pin=\"S\" pad=\"B2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"DIST\" value=\"digikey\" constant=\"no\"/>\n<attribute name=\"DIST_ID\" value=\" P2A5103-ND\" constant=\"no\"/>\n<attribute name=\"PROD_ID\" value=\"RES-11897\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-MOMENTARY-2-CLOSED\" prefix=\"S\">\n<description>Closed Switch for tutorial schematics.  Not intended for PCB design.\n\nMaps to 12mm tact switch, only because eagle won't place a part with no package defined.\n\nThe ordinary SWITCH-MOMENTARY-2 is likely to be more useful for regular schematics.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SWITCH-MOMENTARY-2-CLOSED\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"TACTILE-PTH-12MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"4-POS-DIP\">\n<description>4 Position DIP Switch&lt;br&gt;\nCTS series 219</description>\n<gates>\n<gate name=\"G$1\" symbol=\"4-POS-DIP\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"4-POS-DIP-SMD\">\n<connects>\n<connect gate=\"G$1\" pin=\"1A\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"1B\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"2A\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"2B\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"3A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"3B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"4A\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"4B\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-12418\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH_ROTARY_1X10\" prefix=\"S\">\n<description>SWCH-12120</description>\n<gates>\n<gate name=\"G$1\" symbol=\"ROTARY-SWITCH-1X10\" x=\"5.08\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ROTARY_SWITCH_1X10\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"COMMON\" pad=\"COMMON\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-12120\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"1x10\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"KIT\" package=\"ROTARY_SWITCH_1X10_KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"COMMON\" pad=\"COMMON\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-12120\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"1x10\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-SELECT-2POS-SMD\">\n<gates>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"2-POS-DIP\" prefix=\"S\">\n<description>SMD dip switch 2 positions</description>\n<gates>\n<gate name=\"G$1\" symbol=\"2-POS-DIP\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"CHS-02A\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"P$3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"P$4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-12372\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CTS-THRU-HOLE\" package=\"209-2LPST\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"P$3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"P$4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-12532\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"HEATSINK-SMD-2\" prefix=\"HS\">\n<description>Aavid/Thermaloy Surface-Mount Heat Sinks&lt;p&gt;\n&lt;a href=\"http://media.digikey.com/pdf/Data%20Sheets/Aavid%20Thermal%20Technologies%20PDFs/Surface%20Mount%20Heat%20Sinks.pdf\"&gt;Datasheet&lt;/a&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"HEATSINK-SMD-2\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"-AAVID_573400\" package=\"AAVID_573400\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"COMP-12096\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"HEATSINK\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH-3PDT\" prefix=\"S\">\n<description>Three-pole, double-throw stomp switch.\n&lt;br&gt;&lt;br&gt;\nDrawn as three separate gates for schematic clarity.</description>\n<gates>\n<gate name=\"A\" symbol=\"SW_SPDT_POL\" x=\"0\" y=\"7.62\" addlevel=\"always\"/>\n<gate name=\"B\" symbol=\"SW_SPDT_POL\" x=\"17.78\" y=\"7.62\" addlevel=\"always\"/>\n<gate name=\"C\" symbol=\"SW_SPDT_POL\" x=\"35.56\" y=\"7.62\" addlevel=\"always\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"STOMP-SWITCH-3PDT\">\n<connects>\n<connect gate=\"A\" pin=\"O\" pad=\"P$1\"/>\n<connect gate=\"A\" pin=\"P\" pad=\"P$2\"/>\n<connect gate=\"A\" pin=\"S\" pad=\"P$3\"/>\n<connect gate=\"B\" pin=\"O\" pad=\"P$4\"/>\n<connect gate=\"B\" pin=\"P\" pad=\"P$5\"/>\n<connect gate=\"B\" pin=\"S\" pad=\"P$6\"/>\n<connect gate=\"C\" pin=\"O\" pad=\"P$7\"/>\n<connect gate=\"C\" pin=\"P\" pad=\"P$8\"/>\n<connect gate=\"C\" pin=\"S\" pad=\"P$9\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-13197\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SWITCH_SPST_4_PIN\" prefix=\"SW\" uservalue=\"yes\">\n<gates>\n<gate name=\"G$1\" symbol=\"SWITCH-MOMENTARY\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SQUARE\" package=\"TACTILE-SWITCH-SMD\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-08247\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"RECT\" package=\"TACTILE_SWITCH_SMD_4.6X2.8MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"SWCH-13065\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"CHERRY-MX-LED\" prefix=\"S\">\n<description>&lt;h3&gt;Cherry MX Switch - Electromechanical Swith w/ LED&lt;/h3&gt;\n\n&lt;p&gt;Cherry MX Keyswitches are top-of-the-line mechanical keyboard switches. They’re satisfyingly “clicky”, reliable up to tens-of-millions of key presses, and a standard in gaming and programming keyboards across the globe. This ‘blue’ version Cherry MX Switch is favored by most due to its secondary internal actuator making it less likely to “double-tap.” If you are looking for a noticeably audible and high-quality key switch, this is the perfect option for you!&lt;/p&gt;\n\n&lt;p&gt;&lt;a href=\"https://www.sparkfun.com/products/13834\"&gt;SparkFun Product Link&lt;/a&gt;&lt;/p&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"CHERRY-MX-LED\" x=\"0\" y=\"2.54\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"CHERRY-MX-LED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n<connect gate=\"G$1\" pin=\"S1\" pad=\"S1\"/>\n<connect gate=\"G$1\" pin=\"S2\" pad=\"S2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"SF_ID\" value=\"COM-13834\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</drawing>\n</eagle>\n"
  },
  {
    "path": "eagle/lbr/SparkFun-Passives.lbr",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"8.4.3\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting keepoldvectorfont=\"yes\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"1\" unitdist=\"mm\" unit=\"mm\" style=\"lines\" multiple=\"1\" display=\"yes\" altdistance=\"5\" altunitdist=\"mil\" altunit=\"mil\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"2\" name=\"Route2\" color=\"1\" fill=\"3\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"7\" name=\"Route7\" color=\"4\" fill=\"8\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"8\" name=\"Route8\" color=\"1\" fill=\"2\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"9\" name=\"Route9\" color=\"4\" fill=\"2\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"10\" name=\"Route10\" color=\"1\" fill=\"7\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"11\" name=\"Route11\" color=\"4\" fill=\"7\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"12\" name=\"Route12\" color=\"1\" fill=\"5\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"13\" name=\"Route13\" color=\"4\" fill=\"5\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"14\" name=\"Route14\" color=\"1\" fill=\"6\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"15\" name=\"Route15\" color=\"4\" fill=\"6\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" 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fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"95\" name=\"Names\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"96\" name=\"Values\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"97\" name=\"Info\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"98\" name=\"Guide\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"100\" name=\"Muster\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"101\" name=\"Patch_Top\" color=\"12\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"102\" name=\"Vscore\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"103\" name=\"tMap\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"104\" name=\"Name\" color=\"16\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"105\" name=\"tPlate\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"106\" name=\"bPlate\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"107\" name=\"Crop\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"108\" name=\"tplace-old\" color=\"10\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"109\" name=\"ref-old\" color=\"11\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"116\" name=\"Patch_BOT\" color=\"9\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"121\" name=\"_tsilk\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"122\" name=\"_bsilk\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"125\" name=\"_tNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"144\" name=\"Drill_legend\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"151\" name=\"HeatSink\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"199\" name=\"Contour\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"200\" name=\"200bmp\" color=\"1\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"201\" name=\"201bmp\" color=\"2\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"202\" name=\"202bmp\" color=\"3\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"203\" name=\"203bmp\" color=\"4\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"204\" name=\"204bmp\" color=\"5\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"205\" name=\"205bmp\" color=\"6\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"206\" name=\"206bmp\" color=\"7\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"207\" name=\"207bmp\" color=\"8\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"208\" name=\"208bmp\" color=\"9\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"209\" name=\"209bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"210\" name=\"210bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"211\" name=\"211bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"212\" name=\"212bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"213\" name=\"213bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"214\" name=\"214bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"215\" name=\"215bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"216\" name=\"216bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"217\" name=\"217bmp\" color=\"18\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"218\" name=\"218bmp\" color=\"19\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"219\" name=\"219bmp\" color=\"20\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"220\" name=\"220bmp\" color=\"21\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"221\" name=\"221bmp\" color=\"22\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"222\" name=\"222bmp\" color=\"23\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"223\" name=\"223bmp\" color=\"24\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"224\" name=\"224bmp\" color=\"25\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"250\" name=\"Descript\" color=\"3\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"251\" name=\"SMDround\" color=\"12\" fill=\"11\" visible=\"no\" active=\"no\"/>\n<layer number=\"254\" name=\"cooling\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n</layers>\n<library>\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find resistors, capacitors, inductors, test points, jumper pads, etc.&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"CAP-PTH-SMALL\">\n<wire x1=\"1.27\" y1=\"0.635\" x2=\"1.27\" y2=\"-0.635\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"0\" y=\"0\" drill=\"0.7\" diameter=\"1.651\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\"/>\n<text x=\"0.508\" y=\"1.27\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<text x=\"0.254\" y=\"-1.524\" size=\"0.4064\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"CAP-PTH-SMALL2\">\n<wire x1=\"1.27\" y1=\"0.635\" x2=\"1.27\" y2=\"-0.635\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"3.81\" y2=\"1.27\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"1.27\" x2=\"3.81\" y2=\"-1.27\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"-1.27\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"-1.27\" y2=\"1.27\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"0\" y=\"0\" drill=\"0.7\" diameter=\"1.651\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\"/>\n<text x=\"-1.27\" y=\"1.905\" size=\"0.6096\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.27\" y=\"-2.54\" size=\"0.6096\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"CAP-PTH-SMALLEZ\">\n<description>This is the \"EZ\" version of the .1\" spaced ceramic thru-hole cap.&lt;br&gt;\nIt has reduced top mask to make it harder to put the component on the wrong side of the board.</description>\n<wire x1=\"1.27\" y1=\"0.635\" x2=\"1.27\" y2=\"-0.635\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"3.81\" y2=\"1.27\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"1.27\" x2=\"3.81\" y2=\"-1.27\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"-1.27\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"-1.27\" y2=\"1.27\" width=\"0.2032\" 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y2=\"-0.0305\" width=\"0.5588\" layer=\"21\"/>\n<smd name=\"1\" x=\"-0.85\" y=\"0\" dx=\"1.1\" dy=\"1\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.85\" y=\"0\" dx=\"1.1\" dy=\"1\" layer=\"1\"/>\n<text x=\"-0.889\" y=\"0.762\" size=\"0.4064\" layer=\"25\" font=\"vector\">&gt;NAME</text>\n<text x=\"-1.016\" y=\"-1.143\" size=\"0.4064\" layer=\"27\" font=\"vector\">&gt;VALUE</text>\n<rectangle x1=\"-0.8382\" y1=\"-0.4699\" x2=\"-0.3381\" y2=\"0.4801\" layer=\"51\"/>\n<rectangle x1=\"0.3302\" y1=\"-0.4699\" x2=\"0.8303\" y2=\"0.4801\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n</package>\n<package name=\"0402-CAP\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nchip</description>\n<wire x1=\"-0.245\" y1=\"0.224\" x2=\"0.245\" y2=\"0.224\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.245\" y1=\"-0.224\" x2=\"-0.245\" y2=\"-0.224\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.473\" y1=\"0.483\" x2=\"1.473\" y2=\"0.483\" width=\"0.0508\" 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y1=\"0.635\" x2=\"0\" y2=\"-0.635\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"-2.5\" y=\"0\" drill=\"0.7\" diameter=\"1.651\"/>\n<pad name=\"2\" x=\"2.5\" y=\"0\" drill=\"0.7\" diameter=\"1.651\"/>\n<text x=\"-0.762\" y=\"1.27\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.016\" y=\"-1.524\" size=\"0.4064\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"AXIAL-5MM\">\n<wire x1=\"-1.14\" y1=\"0.762\" x2=\"1.14\" y2=\"0.762\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.14\" y1=\"0.762\" x2=\"1.14\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.14\" y1=\"0\" x2=\"1.14\" y2=\"-0.762\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.14\" y1=\"-0.762\" x2=\"-1.14\" y2=\"-0.762\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.14\" y1=\"-0.762\" x2=\"-1.14\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.14\" y1=\"0\" x2=\"-1.14\" y2=\"0.762\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.14\" y1=\"0\" x2=\"1.394\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.14\" y1=\"0\" x2=\"-1.394\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-2.5\" y=\"0\" drill=\"0.9\" diameter=\"1.8796\"/>\n<pad name=\"P$2\" x=\"2.5\" y=\"0\" drill=\"0.9\" diameter=\"1.8796\"/>\n<text x=\"-2.54\" y=\"1.17\" size=\"0.4\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.032\" y=\"-0.208\" size=\"0.4\" layer=\"21\" ratio=\"15\">&gt;Value</text>\n</package>\n<package name=\"1210\">\n<wire x1=\"-1.6\" y1=\"1.3\" x2=\"1.6\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.6\" y1=\"1.3\" x2=\"1.6\" y2=\"-1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.6\" y1=\"-1.3\" x2=\"-1.6\" y2=\"-1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.6\" y1=\"-1.3\" x2=\"-1.6\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.6\" y1=\"1.3\" x2=\"1.6\" y2=\"1.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.6\" y1=\"-1.3\" x2=\"1.6\" y2=\"-1.3\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.6\" y=\"0\" dx=\"1.2\" dy=\"2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.6\" y=\"0\" dx=\"1.2\" dy=\"2\" layer=\"1\"/>\n<text x=\"-0.8\" y=\"0.5\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.9\" y=\"-0.7\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"1206\">\n<wire x1=\"-2.473\" y1=\"0.983\" x2=\"2.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"2.473\" y1=\"-0.983\" x2=\"-2.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-2.473\" y1=\"-0.983\" x2=\"-2.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"2.473\" y1=\"0.983\" x2=\"2.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-0.965\" y1=\"0.787\" x2=\"0.965\" y2=\"0.787\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.965\" y1=\"-0.787\" x2=\"0.965\" y2=\"-0.787\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.4\" y=\"0\" dx=\"1.6\" dy=\"1.8\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.4\" y=\"0\" dx=\"1.6\" dy=\"1.8\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"1.143\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.397\" y=\"-1.524\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.7018\" y1=\"-0.8509\" x2=\"-0.9517\" y2=\"0.8491\" layer=\"51\"/>\n<rectangle x1=\"0.9517\" y1=\"-0.8491\" x2=\"1.7018\" y2=\"0.8509\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.4001\" x2=\"0.1999\" y2=\"0.4001\" layer=\"35\"/>\n</package>\n<package name=\"CTZ3\">\n<description>Land pattern for variable capacitor - Murata Electronics TZY2 - by Haas</description>\n<wire x1=\"-1.346\" y1=\"1.4\" x2=\"-1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.346\" y1=\"-2.123\" x2=\"1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.346\" y1=\"1.4\" x2=\"1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.5\" y1=\"0\" x2=\"0.5\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.346\" y1=\"1.4\" x2=\"-1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.346\" y1=\"1.4\" x2=\"1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"2.073\" x2=\"1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"1.6\" x2=\"0\" y2=\"-1.6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.3\" y1=\"0\" x2=\"1.3\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.05\" y1=\"2.25\" x2=\"-1.573\" y2=\"1.45\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.573\" y1=\"1.45\" x2=\"-1.573\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.573\" y1=\"-2.35\" x2=\"-1.05\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.05\" y1=\"2.25\" x2=\"1.573\" y2=\"1.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.573\" y1=\"1.4\" x2=\"1.573\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.573\" y1=\"-2.35\" x2=\"1.05\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"+\" x=\"0\" y=\"1.59788125\" dx=\"1.2\" dy=\"0.8\" layer=\"1\"/>\n<smd name=\"-\" x=\"0\" y=\"-1.58771875\" dx=\"1.2\" dy=\"0.8\" layer=\"1\"/>\n<text x=\"-0.984\" y=\"2.238\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.111\" y=\"-2.638\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<dimension x1=\"0\" y1=\"1.2\" x2=\"0\" y2=\"-1.2\" x3=\"-0.4\" y3=\"0\" textsize=\"0.3048\" layer=\"21\" width=\"0.02\"/>\n<dimension x1=\"1\" y1=\"2\" x2=\"1\" y2=\"-2\" x3=\"0.6\" y3=\"0\" textsize=\"0.3048\" layer=\"21\" width=\"0.02\"/>\n</package>\n<package name=\"CAP-PTH-SMALL-KIT\">\n<description>&lt;h3&gt;CAP-PTH-SMALL-KIT&lt;/h3&gt;\nCommonly used for small ceramic capacitors. Like our 0.1uF (http://www.sparkfun.com/products/8375) or 22pF caps (http://www.sparkfun.com/products/8571).&lt;br&gt;\n&lt;br&gt;\n&lt;b&gt;Warning:&lt;/b&gt; This is the KIT version of this package. This package has a smaller diameter top stop mask, which doesn't cover the diameter of the pad. This means only the bottom side of the pads' copper will be exposed. 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layer=\"29\">\n<vertex x=\"-1.4046\" y=\"-0.4395\" curve=\"-90.012891\"/>\n<vertex x=\"-1.8491\" y=\"-0.0153\" curve=\"-90\"/>\n<vertex x=\"-1.4046\" y=\"0.452\" curve=\"-90\"/>\n<vertex x=\"-0.9627\" y=\"-0.0051\" curve=\"-90.012967\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"30\">\n<vertex x=\"1.397\" y=\"-0.9475\" curve=\"-90\"/>\n<vertex x=\"0.4421\" y=\"-0.0178\" curve=\"-90.011749\"/>\n<vertex x=\"1.3945\" y=\"0.9576\" curve=\"-90\"/>\n<vertex x=\"2.3445\" y=\"-0.0204\" curve=\"-90.024193\"/>\n</polygon>\n<polygon width=\"0.127\" layer=\"29\">\n<vertex x=\"1.3945\" y=\"-0.4395\" curve=\"-90.012891\"/>\n<vertex x=\"0.95\" y=\"-0.0153\" curve=\"-90\"/>\n<vertex x=\"1.3945\" y=\"0.452\" curve=\"-90\"/>\n<vertex x=\"1.8364\" y=\"-0.0051\" curve=\"-90.012967\"/>\n</polygon>\n</package>\n<package name=\"EIA3216\">\n<wire x1=\"-1\" y1=\"-1.2\" x2=\"-2.5\" y2=\"-1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.5\" y1=\"-1.2\" x2=\"-2.5\" y2=\"1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.5\" y1=\"1.2\" x2=\"-1\" y2=\"1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"-1.2\" x2=\"2.1\" y2=\"-1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.1\" y1=\"-1.2\" x2=\"2.5\" y2=\"-0.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.5\" y1=\"-0.8\" x2=\"2.5\" y2=\"0.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.5\" y1=\"0.8\" x2=\"2.1\" y2=\"1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.1\" y1=\"1.2\" x2=\"1\" y2=\"1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.381\" y1=\"1.016\" x2=\"0.381\" y2=\"-1.016\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"C\" x=\"-1.4\" y=\"0\" dx=\"1.6\" dy=\"1.4\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"A\" x=\"1.4\" y=\"0\" dx=\"1.6\" dy=\"1.4\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-2.54\" y=\"1.381\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"0.408\" y=\"1.332\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"EIA3528\">\n<wire x1=\"-0.9\" y1=\"-1.6\" x2=\"-2.6\" y2=\"-1.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.6\" y1=\"-1.6\" x2=\"-2.6\" y2=\"1.55\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.6\" y1=\"1.55\" x2=\"-0.9\" y2=\"1.55\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"-1.55\" x2=\"2.2\" y2=\"-1.55\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.2\" y1=\"-1.55\" x2=\"2.6\" y2=\"-1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.6\" y1=\"-1.2\" x2=\"2.6\" y2=\"1.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.6\" y1=\"1.25\" x2=\"2.2\" y2=\"1.55\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.2\" y1=\"1.55\" x2=\"1\" y2=\"1.55\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.2\" y1=\"1.55\" x2=\"1\" y2=\"1.55\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.609\" y1=\"1.311\" x2=\"0.609\" y2=\"-1.286\" width=\"0.2032\" layer=\"21\" style=\"longdash\"/>\n<smd name=\"C\" x=\"-1.65\" y=\"0\" dx=\"2.5\" dy=\"1.2\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"A\" x=\"1.65\" y=\"0\" dx=\"2.5\" dy=\"1.2\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-2.27\" y=\"-1.27\" size=\"1.27\" layer=\"25\" rot=\"R90\">&gt;NAME</text>\n<text x=\"3.24\" y=\"-1.37\" size=\"1.27\" layer=\"27\" rot=\"R90\">&gt;VALUE</text>\n</package>\n<package name=\"CPOL-RADIAL-100UF-25V\">\n<wire x1=\"-0.635\" y1=\"1.27\" x2=\"-1.905\" y2=\"1.27\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"3.25\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"2\" x=\"-1.27\" y=\"0\" drill=\"0.7\" diameter=\"1.651\"/>\n<pad name=\"1\" x=\"1.27\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" shape=\"square\"/>\n<text x=\"-1.905\" y=\"-4.318\" size=\"0.8128\" layer=\"27\">&gt;Value</text>\n<text x=\"-0.762\" y=\"1.651\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n</package>\n<package name=\"CPOL-RADIAL-10UF-25V\">\n<wire x1=\"-0.762\" y1=\"1.397\" x2=\"-1.778\" y2=\"1.397\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"2.5\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"1.27\" y=\"0\" drill=\"0.7\" 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x1=\"-2.5\" y1=\"3.1\" x2=\"-2.5\" y2=\"2.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2.1\" y1=\"3.5\" x2=\"2.5\" y2=\"3.1\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"3.1\" x2=\"2.5\" y2=\"2.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"-3.5\" x2=\"-2.5\" y2=\"-2.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"-3.5\" x2=\"2.5\" y2=\"-2.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.5908\" y1=\"-2.413\" x2=\"-2.5654\" y2=\"2.4384\" width=\"0.127\" layer=\"21\" curve=\"-91.212564\"/>\n<wire x1=\"2.5908\" y1=\"-2.413\" x2=\"2.5654\" y2=\"2.4384\" width=\"0.127\" layer=\"21\" curve=\"86.79344\"/>\n<wire x1=\"1.7272\" y1=\"-1.27\" x2=\"1.7272\" y2=\"-2.0828\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.3462\" y1=\"-1.6764\" x2=\"2.159\" y2=\"-1.6764\" width=\"0.127\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"3.4\" width=\"0.127\" layer=\"51\"/>\n<smd name=\"-\" x=\"0\" y=\"2.8\" dx=\"5\" dy=\"2.4\" layer=\"1\"/>\n<smd name=\"+\" x=\"0\" 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y=\"1.85\" dx=\"4.2\" dy=\"1.4\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"0\" y=\"-1.85\" dx=\"4.2\" dy=\"1.4\" layer=\"1\"/>\n<text x=\"-2.04\" y=\"0.41\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<text x=\"-2.04\" y=\"-0.59\" size=\"0.4064\" layer=\"27\">&gt;Value</text>\n<rectangle x1=\"-2.1\" y1=\"1.15\" x2=\"2.1\" y2=\"2.55\" layer=\"51\"/>\n<rectangle x1=\"-2.1\" y1=\"-2.55\" x2=\"2.1\" y2=\"-1.15\" layer=\"51\"/>\n<wire x1=\"-2.87\" y1=\"-2.6\" x2=\"-2.6\" y2=\"-2.87\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.6\" y1=\"-2.87\" x2=\"2.87\" y2=\"-2.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.87\" y1=\"2.6\" x2=\"-2.6\" y2=\"2.87\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.6\" y1=\"2.87\" x2=\"2.87\" y2=\"2.6\" width=\"0.2032\" layer=\"21\"/>\n</package>\n<package name=\"CDRH125\">\n<wire x1=\"-3.5\" y1=\"6\" x2=\"-6\" y2=\"6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6\" y1=\"6\" x2=\"-6\" y2=\"-6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-6\" y1=\"-6\" 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layer=\"51\"/>\n<smd name=\"1\" x=\"-0.8128\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<smd name=\"3\" x=\"0.8128\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<text x=\"-1.27\" y=\"1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.1001\" y=\"0\" size=\"0.02\" layer=\"27\">&gt;VALUE</text>\n<text x=\"-1.27\" y=\"-1.905\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"0.0635\" y=\"-0.4445\" size=\"0.254\" layer=\"51\" rot=\"R40\">PASTE</text>\n<rectangle x1=\"-0.2794\" y1=\"-1.016\" x2=\"1.4224\" y2=\"0.9906\" layer=\"31\"/>\n</package>\n<package name=\"AXIAL-0.3\">\n<wire x1=\"-2.54\" y1=\"0.762\" x2=\"2.54\" y2=\"0.762\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"0.762\" x2=\"2.54\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"0\" x2=\"2.54\" y2=\"-0.762\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.54\" 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layer=\"21\" font=\"vector\" ratio=\"15\">&gt;Value</text>\n<circle x=\"-3.81\" y=\"0\" radius=\"0.508\" width=\"0\" layer=\"29\"/>\n<circle x=\"3.81\" y=\"0\" radius=\"0.523634375\" width=\"0\" layer=\"29\"/>\n<circle x=\"-3.81\" y=\"0\" radius=\"1.02390625\" width=\"0\" layer=\"30\"/>\n<circle x=\"3.81\" y=\"0\" radius=\"1.04726875\" width=\"0\" layer=\"30\"/>\n</package>\n<package name=\"R2010\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\nchip</description>\n<wire x1=\"-1.662\" y1=\"1.245\" x2=\"1.662\" y2=\"1.245\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.637\" y1=\"-1.245\" x2=\"1.687\" y2=\"-1.245\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-3.473\" y1=\"1.483\" x2=\"3.473\" y2=\"1.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"3.473\" y1=\"1.483\" x2=\"3.473\" y2=\"-1.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"3.473\" y1=\"-1.483\" x2=\"-3.473\" y2=\"-1.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-3.473\" y1=\"-1.483\" x2=\"-3.473\" y2=\"1.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.027\" y1=\"1.245\" x2=\"1.027\" y2=\"1.245\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.002\" y1=\"-1.245\" x2=\"1.016\" y2=\"-1.245\" width=\"0.1524\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.2\" y=\"0\" dx=\"1.8\" dy=\"2.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.2\" y=\"0\" dx=\"1.8\" dy=\"2.7\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.5875\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.032\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.4892\" y1=\"-1.3208\" x2=\"-1.6393\" y2=\"1.3292\" layer=\"51\"/>\n<rectangle x1=\"1.651\" y1=\"-1.3208\" x2=\"2.5009\" y2=\"1.3292\" layer=\"51\"/>\n</package>\n<package name=\"0603-RES\">\n<wire x1=\"-1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-0.356\" y1=\"0.432\" x2=\"0.356\" y2=\"0.432\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.356\" y1=\"-0.419\" x2=\"0.356\" y2=\"-0.419\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.85\" y=\"0\" dx=\"1.1\" dy=\"1\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.85\" y=\"0\" dx=\"1.1\" dy=\"1\" layer=\"1\"/>\n<text x=\"-0.889\" y=\"0.762\" size=\"0.4064\" layer=\"25\" font=\"vector\">&gt;NAME</text>\n<text x=\"-1.016\" y=\"-1.143\" size=\"0.4064\" layer=\"27\" font=\"vector\">&gt;VALUE</text>\n<rectangle x1=\"-0.8382\" y1=\"-0.4699\" x2=\"-0.3381\" y2=\"0.4801\" layer=\"51\"/>\n<rectangle x1=\"0.3302\" y1=\"-0.4699\" x2=\"0.8303\" y2=\"0.4801\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n<rectangle x1=\"-0.2286\" y1=\"-0.381\" x2=\"0.2286\" y2=\"0.381\" layer=\"21\"/>\n</package>\n<package name=\"0402-RES\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nchip</description>\n<wire x1=\"-0.245\" y1=\"0.224\" x2=\"0.245\" y2=\"0.224\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.245\" y1=\"-0.224\" x2=\"-0.245\" y2=\"-0.224\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.473\" y1=\"0.483\" x2=\"1.473\" y2=\"0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.483\" x2=\"1.473\" y2=\"-0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.483\" x2=\"-1.473\" y2=\"-0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.483\" x2=\"-1.473\" y2=\"0.483\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-0.65\" y=\"0\" dx=\"0.7\" dy=\"0.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.65\" y=\"0\" dx=\"0.7\" dy=\"0.9\" layer=\"1\"/>\n<text x=\"-0.889\" y=\"0.6985\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.0795\" y=\"-1.143\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.554\" y1=\"-0.3048\" x2=\"-0.254\" y2=\"0.2951\" layer=\"51\"/>\n<rectangle x1=\"0.2588\" y1=\"-0.3048\" x2=\"0.5588\" y2=\"0.2951\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n<rectangle x1=\"-0.2032\" y1=\"-0.3556\" x2=\"0.2032\" y2=\"0.3556\" layer=\"21\"/>\n</package>\n<package name=\"1/6W-RES\">\n<description>1/6W Thru-hole Resistor - *UNPROVEN*</description>\n<wire x1=\"-1.55\" y1=\"0.85\" x2=\"-1.55\" y2=\"-0.85\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.55\" y1=\"-0.85\" x2=\"1.55\" y2=\"-0.85\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.55\" y1=\"-0.85\" x2=\"1.55\" y2=\"0.85\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.55\" y1=\"0.85\" x2=\"-1.55\" y2=\"0.85\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"1\" x=\"-2.5\" y=\"0\" drill=\"0.762\"/>\n<pad name=\"2\" x=\"2.5\" y=\"0\" drill=\"0.762\"/>\n<text x=\"-1.2662\" y=\"0.9552\" size=\"0.6096\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.423\" y=\"-0.4286\" size=\"0.8128\" layer=\"21\" ratio=\"15\">&gt;VALUE</text>\n</package>\n<package name=\"R2512\">\n<wire x1=\"-2.362\" y1=\"1.473\" x2=\"2.387\" y2=\"1.473\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-2.362\" y1=\"-1.473\" x2=\"2.387\" y2=\"-1.473\" width=\"0.1524\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.8\" y=\"0\" dx=\"1.8\" dy=\"3.2\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.8\" y=\"0\" dx=\"1.8\" dy=\"3.2\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.905\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-3.175\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-3.2004\" y1=\"-1.5494\" x2=\"-2.3505\" y2=\"1.5507\" layer=\"51\"/>\n<rectangle x1=\"2.3622\" y1=\"-1.5494\" x2=\"3.2121\" y2=\"1.5507\" layer=\"51\"/>\n</package>\n<package name=\"AXIAL-0.4\">\n<description>1/4W Resistor, 0.4\" wide&lt;p&gt;\n\nYageo CFR series &lt;a href=\"http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf\"&gt;http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf&lt;/a&gt;</description>\n<wire x1=\"-3.15\" y1=\"-1.2\" x2=\"-3.15\" y2=\"1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.15\" y1=\"1.2\" x2=\"3.15\" y2=\"1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.15\" y1=\"1.2\" x2=\"3.15\" y2=\"-1.2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.15\" y1=\"-1.2\" x2=\"-3.15\" y2=\"-1.2\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-5.08\" y=\"0\" drill=\"0.9\" diameter=\"1.8796\"/>\n<pad name=\"P$2\" x=\"5.08\" y=\"0\" drill=\"0.9\" diameter=\"1.8796\"/>\n<text x=\"-3.175\" y=\"1.905\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\">&gt;Name</text>\n<text x=\"-2.286\" y=\"-0.381\" size=\"0.8128\" layer=\"21\" font=\"vector\" ratio=\"15\">&gt;Value</text>\n</package>\n<package name=\"AXIAL-0.5\">\n<description>1/2W Resistor, 0.5\" wide&lt;p&gt;\n\nYageo CFR series &lt;a href=\"http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf\"&gt;http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf&lt;/a&gt;</description>\n<wire x1=\"-4.5\" y1=\"-1.65\" x2=\"-4.5\" y2=\"1.65\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"1.65\" x2=\"4.5\" y2=\"1.65\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.5\" y1=\"1.65\" x2=\"4.5\" y2=\"-1.65\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.5\" y1=\"-1.65\" x2=\"-4.5\" y2=\"-1.65\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-6.35\" y=\"0\" drill=\"0.9\" diameter=\"1.8796\"/>\n<pad name=\"P$2\" x=\"6.35\" y=\"0\" drill=\"0.9\" diameter=\"1.8796\"/>\n<text x=\"-4.445\" y=\"2.54\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\">&gt;Name</text>\n<text x=\"-3.429\" y=\"-0.381\" size=\"0.8128\" layer=\"21\" font=\"vector\" ratio=\"15\">&gt;Value</text>\n</package>\n<package name=\"AXIAL-0.6\">\n<description>1W Resistor, 0.6\" wide&lt;p&gt;\n\nYageo CFR series &lt;a href=\"http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf\"&gt;http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf&lt;/a&gt;</description>\n<wire x1=\"-5.75\" y1=\"-2.25\" x2=\"-5.75\" y2=\"2.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.75\" y1=\"2.25\" x2=\"5.75\" y2=\"2.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.75\" y1=\"2.25\" x2=\"5.75\" y2=\"-2.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.75\" y1=\"-2.25\" x2=\"-5.75\" y2=\"-2.25\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-7.62\" y=\"0\" drill=\"1.2\" diameter=\"1.8796\"/>\n<pad name=\"P$2\" x=\"7.62\" y=\"0\" drill=\"1.2\" diameter=\"1.8796\"/>\n<text x=\"-5.715\" y=\"3.175\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\">&gt;Name</text>\n<text x=\"-4.064\" y=\"-0.381\" size=\"0.8128\" layer=\"21\" font=\"vector\" ratio=\"15\">&gt;Value</text>\n</package>\n<package name=\"AXIAL-0.8\">\n<description>2W Resistor, 0.8\" wide&lt;p&gt;\n\nYageo CFR series &lt;a href=\"http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf\"&gt;http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf&lt;/a&gt;</description>\n<wire x1=\"-7.75\" y1=\"-2.5\" x2=\"-7.75\" y2=\"2.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-7.75\" y1=\"2.5\" x2=\"7.75\" y2=\"2.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"7.75\" y1=\"2.5\" x2=\"7.75\" y2=\"-2.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"7.75\" y1=\"-2.5\" x2=\"-7.75\" y2=\"-2.5\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"-10.16\" y=\"0\" drill=\"1.2\" diameter=\"1.8796\"/>\n<pad name=\"P$2\" x=\"10.16\" y=\"0\" drill=\"1.2\" diameter=\"1.8796\"/>\n<text x=\"-7.62\" y=\"3.175\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\">&gt;Name</text>\n<text x=\"-5.969\" y=\"-0.381\" size=\"0.8128\" layer=\"21\" font=\"vector\" ratio=\"15\">&gt;Value</text>\n</package>\n<package name=\"AXIAL-0.3-KIT\">\n<description>&lt;h3&gt;AXIAL-0.3-KIT&lt;/h3&gt;\n\nCommonly used for 1/4W through-hole resistors. 0.3\" pitch between holes.&lt;br&gt;\n&lt;br&gt;\n\n&lt;b&gt;Warning:&lt;/b&gt; This is the KIT version of the AXIAL-0.3 package. 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size 4 × 0603&lt;p&gt;\nconvex termination - Phycomp Components&lt;br&gt;\nSource: RS Components</description>\n<wire x1=\"-1.55\" y1=\"0.45\" x2=\"1.55\" y2=\"0.45\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.55\" y1=\"0.45\" x2=\"1.55\" y2=\"-0.45\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.55\" y1=\"-0.45\" x2=\"-1.55\" y2=\"0.45\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.55\" y1=\"-0.45\" x2=\"-1.55\" y2=\"-0.45\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.2\" y=\"-0.625\" dx=\"0.5\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"2\" x=\"-0.4\" y=\"-0.625\" dx=\"0.5\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"3\" x=\"0.4\" y=\"-0.625\" dx=\"0.5\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"4\" x=\"1.2\" y=\"-0.625\" dx=\"0.5\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"5\" x=\"1.2\" y=\"0.625\" dx=\"0.5\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"6\" x=\"0.4\" y=\"0.625\" dx=\"0.5\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"7\" x=\"-0.4\" y=\"0.625\" dx=\"0.5\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"8\" x=\"-1.2\" y=\"0.625\" dx=\"0.5\" dy=\"0.65\" layer=\"1\"/>\n<text x=\"-1.905\" y=\"-2.54\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.905\" y=\"1.27\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"0.7\" x2=\"-0.9\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"-0.7\" y1=\"0.7\" x2=\"-0.1\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"0.1\" y1=\"0.7\" x2=\"0.7\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"0.9\" y1=\"0.7\" x2=\"1.6\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"-1.5\" y1=\"0.5\" x2=\"-0.95\" y2=\"0.7\" layer=\"51\"/>\n<rectangle x1=\"-0.65\" y1=\"0.5\" x2=\"-0.15\" y2=\"0.7\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"0.5\" x2=\"0.65\" y2=\"0.7\" layer=\"51\"/>\n<rectangle x1=\"0.95\" y1=\"0.5\" x2=\"1.5\" y2=\"0.7\" layer=\"51\"/>\n<rectangle x1=\"0.9\" y1=\"-0.8\" x2=\"1.6\" y2=\"-0.7\" layer=\"51\"/>\n<rectangle x1=\"0.1\" y1=\"-0.8\" x2=\"0.7\" y2=\"-0.7\" layer=\"51\"/>\n<rectangle x1=\"-0.7\" y1=\"-0.8\" x2=\"-0.1\" y2=\"-0.7\" layer=\"51\"/>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-0.9\" y2=\"-0.7\" layer=\"51\"/>\n<rectangle x1=\"0.95\" y1=\"-0.7\" x2=\"1.5\" y2=\"-0.5\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.7\" x2=\"0.65\" y2=\"-0.5\" layer=\"51\"/>\n<rectangle x1=\"-0.65\" y1=\"-0.7\" x2=\"-0.15\" y2=\"-0.5\" layer=\"51\"/>\n<rectangle x1=\"-1.5\" y1=\"-0.7\" x2=\"-0.95\" y2=\"-0.5\" layer=\"51\"/>\n</package>\n<package name=\"RPACK-SIP-PTH-5\">\n<wire x1=\"-1.27\" y1=\"0\" x2=\"1.27\" y2=\"0\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"1.27\" y2=\"-1.27\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-1.27\" x2=\"1.27\" y2=\"0\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"1.27\" y2=\"-1.27\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"P$1\" x=\"0\" y=\"0\" drill=\"0.8\" shape=\"square\"/>\n<pad name=\"P$2\" x=\"0\" y=\"-2.54\" drill=\"0.8\"/>\n<pad name=\"P$3\" x=\"0\" y=\"-5.08\" drill=\"0.8\"/>\n<pad name=\"P$4\" x=\"0\" y=\"-7.62\" drill=\"0.8\"/>\n<pad name=\"P$5\" x=\"0\" y=\"-10.16\" drill=\"0.8\"/>\n<pad name=\"P$6\" x=\"0\" y=\"-12.7\" drill=\"0.8\"/>\n<text x=\"-1.778\" y=\"-12.7\" size=\"1.27\" layer=\"25\" rot=\"R90\">&gt;NAME</text>\n<text x=\"-3.048\" y=\"0\" size=\"1.27\" layer=\"27\" rot=\"R270\">&gt;VALUE</text>\n</package>\n<package name=\"PAD-JUMPER-2-NC_BY_TRACE_YES_SILK\">\n<description>Solder jumper, small, shorted with trace. No paste layer. Trace is cuttable.</description>\n<wire x1=\"0.8255\" y1=\"-1.016\" x2=\"-0.8255\" y2=\"-1.016\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.8255\" y1=\"1.016\" x2=\"1.0795\" y2=\"0.762\" width=\"0.2032\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.0795\" y1=\"0.762\" x2=\"-0.8255\" y2=\"1.016\" width=\"0.2032\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.0795\" y1=\"-0.762\" x2=\"-0.8255\" y2=\"-1.016\" width=\"0.2032\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"0.8255\" y1=\"-1.016\" x2=\"1.0795\" y2=\"-0.762\" width=\"0.2032\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-0.8255\" y1=\"1.016\" x2=\"0.8255\" y2=\"1.016\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.381\" y1=\"0\" x2=\"0.381\" y2=\"0\" width=\"0.254\" layer=\"1\"/>\n<smd name=\"1\" x=\"-0.508\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<smd name=\"2\" x=\"0.508\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<text x=\"-0.9525\" y=\"1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.9525\" y=\"-1.651\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"PAD-JUMPER-2-NC_BY_PASTE_YES_SILK\">\n<wire x1=\"0.8\" y1=\"-1\" x2=\"-0.8\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.8\" y1=\"1\" x2=\"1\" y2=\"0.7\" width=\"0.2032\" layer=\"21\" curve=\"-90.076445\"/>\n<wire x1=\"-1\" y1=\"0.7\" x2=\"-0.8\" y2=\"1\" width=\"0.2032\" layer=\"21\" curve=\"-90.03821\"/>\n<wire x1=\"-1\" y1=\"-0.7\" x2=\"-0.8\" y2=\"-1\" width=\"0.2032\" layer=\"21\" curve=\"90.03821\"/>\n<wire x1=\"0.8\" y1=\"-1\" x2=\"1\" y2=\"-0.7\" width=\"0.2032\" layer=\"21\" curve=\"90.03821\"/>\n<wire x1=\"-0.8\" y1=\"1\" x2=\"0.8\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-0.4009\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" rot=\"R180\" cream=\"no\"/>\n<smd name=\"2\" x=\"0.4127\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<text x=\"-0.9525\" y=\"1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.9525\" y=\"-1.651\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.2192\" y1=\"-1.016\" x2=\"1.2192\" y2=\"1.016\" layer=\"31\"/>\n</package>\n<package name=\"PAD-JUMPER-3-NO_YES_SILK_FULL_BOX_WIDE_SPACING\">\n<description>&lt;b&gt;Solder jumper&lt;/b&gt;</description>\n<wire x1=\"3.175\" y1=\"-1.524\" x2=\"-3.175\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.175\" y1=\"1.524\" x2=\"3.429\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-3.429\" y1=\"1.27\" x2=\"-3.175\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-3.429\" y1=\"-1.27\" x2=\"-3.175\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"3.175\" y1=\"-1.524\" x2=\"3.429\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"3.429\" y1=\"-1.27\" x2=\"3.429\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.27\" x2=\"-3.429\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"1.524\" x2=\"3.175\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.794\" y1=\"0\" x2=\"3.302\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-2.794\" y1=\"0\" x2=\"-3.302\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"0.762\" x2=\"0\" y2=\"1.397\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"-1.397\" x2=\"0\" y2=\"-0.762\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"2.032\" y1=\"0.127\" x2=\"2.032\" y2=\"-0.127\" width=\"1.27\" layer=\"51\" curve=\"-180\" cap=\"flat\"/>\n<wire x1=\"-2.032\" y1=\"-0.127\" x2=\"-2.032\" y2=\"0.127\" width=\"1.27\" layer=\"51\" curve=\"-180\" cap=\"flat\"/>\n<smd name=\"1\" x=\"-2.54\" y=\"0\" dx=\"1.27\" dy=\"2.54\" layer=\"1\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"1.27\" dy=\"2.54\" layer=\"1\"/>\n<smd name=\"3\" x=\"2.54\" y=\"0\" dx=\"1.27\" dy=\"2.54\" layer=\"1\"/>\n<text x=\"-3.429\" y=\"1.778\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.1001\" y=\"0\" size=\"0.02\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.508\" y1=\"-0.762\" x2=\"0.508\" y2=\"0.762\" layer=\"51\"/>\n</package>\n<package name=\"PAD-JUMPER-3-NO_YES_SILK_FULL_BOX\">\n<description>&lt;b&gt;Solder jumper&lt;/b&gt;</description>\n<wire x1=\"2.159\" y1=\"-1.016\" x2=\"-2.159\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.016\" x2=\"2.413\" y2=\"0.762\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"0.762\" x2=\"-2.159\" y2=\"1.016\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"-0.762\" x2=\"-2.159\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"2.159\" y1=\"-1.016\" x2=\"2.413\" y2=\"-0.762\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"2.413\" y1=\"-0.762\" x2=\"2.413\" y2=\"0.762\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"-0.762\" x2=\"-2.413\" y2=\"0.762\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.016\" x2=\"2.159\" y2=\"1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.778\" y1=\"0\" x2=\"2.286\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.778\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"0.762\" x2=\"0\" y2=\"1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"-1.016\" x2=\"0\" y2=\"-0.762\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"1.016\" y1=\"0.127\" x2=\"1.016\" y2=\"-0.127\" width=\"1.27\" layer=\"51\" curve=\"-180\" cap=\"flat\"/>\n<wire x1=\"-1.016\" y1=\"-0.127\" x2=\"-1.016\" y2=\"0.127\" width=\"1.27\" layer=\"51\" curve=\"-180\" cap=\"flat\"/>\n<smd name=\"1\" x=\"-1.524\" y=\"0\" dx=\"1.1684\" dy=\"1.6002\" layer=\"1\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"1.1684\" dy=\"1.6002\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.524\" y=\"0\" dx=\"1.1684\" dy=\"1.6002\" layer=\"1\"/>\n<text x=\"-2.413\" y=\"1.27\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.1001\" y=\"0\" size=\"0.02\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.508\" y1=\"-0.762\" x2=\"0.508\" y2=\"0.762\" layer=\"51\"/>\n</package>\n<package name=\"PAD.02X.02\">\n<smd name=\"P$1\" x=\"0\" y=\"0\" dx=\"0.508\" dy=\"0.508\" layer=\"1\"/>\n</package>\n<package name=\"PAD.03X.03\">\n<smd name=\"P$1\" x=\"0\" y=\"0\" dx=\"0.762\" dy=\"0.762\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n</package>\n<package name=\"PAD.03X.05\">\n<smd name=\"P$1\" x=\"0\" y=\"0\" dx=\"1.27\" dy=\"1.27\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n</package>\n<package name=\"GND_CONNECT\">\n<smd name=\"1\" x=\"-1.016\" y=\"0\" dx=\"1.016\" dy=\"1.016\" layer=\"1\"/>\n<smd name=\"2\" x=\"-1.016\" y=\"-1.27\" dx=\"1.016\" dy=\"1.016\" layer=\"1\"/>\n<smd name=\"3\" x=\"0.254\" y=\"-0.635\" dx=\"1.016\" dy=\"1.016\" layer=\"1\"/>\n<text x=\"-0.889\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.143\" y=\"-4.064\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"DR1030\">\n<description>For Coiltronics/Cooper DR1030 series inductors</description>\n<wire x1=\"5.15\" y1=\"5.25\" x2=\"5.15\" y2=\"-5.25\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-5.15\" y1=\"-5.25\" x2=\"-5.15\" y2=\"5.25\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"2\" x=\"0\" y=\"-4.45\" dx=\"3.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"1\" x=\"0\" y=\"4.45\" dx=\"3.3\" dy=\"1.6\" layer=\"1\"/>\n<wire x1=\"5.15\" y1=\"-5.25\" x2=\"2\" y2=\"-5.25\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-5.15\" y1=\"-5.25\" x2=\"-2\" y2=\"-5.25\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-5.15\" y1=\"5.25\" x2=\"-2\" y2=\"5.25\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"5.15\" y1=\"5.25\" x2=\"2\" y2=\"5.25\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-3.81\" y=\"1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-1.27\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"VLF4012A\">\n<wire x1=\"-1.85\" y1=\"0.925\" x2=\"-0.925\" y2=\"1.85\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.925\" y1=\"1.85\" x2=\"0.925\" y2=\"1.85\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.925\" y1=\"1.85\" x2=\"1.85\" y2=\"0.925\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.85\" y1=\"0.925\" x2=\"1.85\" y2=\"-0.925\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.85\" y1=\"-0.925\" x2=\"0.925\" y2=\"-1.85\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.925\" y1=\"-1.85\" x2=\"-1.85\" y2=\"-0.925\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.85\" y1=\"0.925\" x2=\"-1.85\" y2=\"-0.925\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.925\" y1=\"-1.85\" x2=\"0.925\" y2=\"-1.85\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"-1.9\" y=\"0\" dx=\"0.9\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"1.9\" y=\"0\" dx=\"0.9\" dy=\"1.3\" layer=\"1\"/>\n</package>\n<package name=\"RLB0912\">\n<circle x=\"0\" y=\"0\" radius=\"4.445\" width=\"0.2032\" layer=\"21\"/>\n<pad name=\"2\" x=\"-2.5019\" y=\"0\" drill=\"0.8128\" diameter=\"1.651\"/>\n<text x=\"-1.905\" y=\"-3.048\" size=\"0.8128\" layer=\"27\">&gt;Value</text>\n<text x=\"-0.762\" y=\"2.921\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<pad name=\"1\" x=\"2.5019\" y=\"0\" drill=\"0.8128\" diameter=\"1.651\"/>\n</package>\n<package name=\"SRN6045\">\n<smd name=\"1\" x=\"-2.175\" y=\"-0.175\" dx=\"6\" dy=\"2.5\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"2\" x=\"2.125\" y=\"-0.175\" dx=\"6\" dy=\"2.5\" layer=\"1\" rot=\"R90\"/>\n<wire x1=\"-2.175\" y1=\"-3.175\" x2=\"-3.175\" y2=\"-2.175\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3.175\" y1=\"-2.175\" x2=\"-3.175\" y2=\"1.825\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-3.175\" y1=\"1.825\" x2=\"-2.175\" y2=\"2.825\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-2.175\" y1=\"2.825\" x2=\"2.125\" y2=\"2.825\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2.125\" y1=\"2.825\" x2=\"3.125\" y2=\"1.825\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.125\" y1=\"1.825\" x2=\"3.125\" y2=\"-2.175\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"3.125\" y1=\"-2.175\" x2=\"2.125\" y2=\"-3.175\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"2.125\" y1=\"-3.175\" x2=\"-2.175\" y2=\"-3.175\" width=\"0.127\" layer=\"51\"/>\n<text x=\"-4.175\" y=\"3.825\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-4.175\" y=\"-5.175\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<wire x1=\"-0.762\" y1=\"2.794\" x2=\"0.762\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.762\" y1=\"-3.175\" x2=\"0.762\" y2=\"-3.175\" width=\"0.1524\" layer=\"21\"/>\n</package>\n<package name=\"2PT_GND_TIE\">\n<smd name=\"P$1\" x=\"0\" y=\"0.635\" dx=\"1.27\" dy=\"0.635\" layer=\"1\" stop=\"no\" cream=\"no\"/>\n<smd name=\"P$2\" x=\"0\" y=\"-0.635\" dx=\"1.27\" dy=\"0.635\" layer=\"1\" stop=\"no\" cream=\"no\"/>\n<wire x1=\"0\" y1=\"0.635\" x2=\"0\" y2=\"-0.635\" width=\"0.4064\" layer=\"1\"/>\n</package>\n<package name=\"SDR0403\">\n<description>Footprint for Bourns SDR0403 family inductors</description>\n<smd name=\"P$1\" x=\"-1.65\" y=\"0\" dx=\"4.5\" dy=\"1.8\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"1.65\" y=\"0\" dx=\"4.5\" dy=\"1.8\" layer=\"1\" rot=\"R90\"/>\n<wire x1=\"-0.5\" y1=\"2\" x2=\"0.5\" y2=\"2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.5\" y1=\"-2\" x2=\"0.5\" y2=\"-2\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-0.762\" y=\"-0.254\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"-0.889\" y=\"1.016\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n</package>\n<package name=\"PAD-JUMPER-3-NC_BY_PASTE_YES_SILK_FULL_BOX\">\n<wire x1=\"1.27\" y1=\"-1.016\" x2=\"-1.27\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"1.016\" x2=\"1.524\" y2=\"0.762\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.524\" y1=\"0.762\" x2=\"-1.27\" y2=\"1.016\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.524\" y1=\"-0.762\" x2=\"-1.27\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"1.27\" y1=\"-1.016\" x2=\"1.524\" y2=\"-0.762\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"1.524\" y1=\"-0.762\" x2=\"1.524\" y2=\"0.762\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.524\" y1=\"-0.762\" x2=\"-1.524\" y2=\"0.762\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.016\" x2=\"1.27\" y2=\"1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.016\" y1=\"0.508\" x2=\"-1.016\" y2=\"0.508\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.016\" y1=\"0.508\" x2=\"-1.016\" y2=\"-0.508\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.016\" y1=\"-0.508\" x2=\"1.016\" y2=\"-0.508\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.016\" y1=\"-0.508\" x2=\"1.016\" y2=\"0.508\" width=\"0.127\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.8128\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<smd name=\"3\" x=\"0.8128\" y=\"0\" dx=\"0.635\" dy=\"1.27\" layer=\"1\" cream=\"no\"/>\n<text x=\"-1.27\" y=\"1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-1.905\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"-0.33138125\" y=\"-0.4445\" size=\"0.254\" layer=\"51\" rot=\"R40\">PASTE</text>\n<rectangle x1=\"-1.4986\" y1=\"-0.9906\" x2=\"1.4986\" y2=\"0.9906\" layer=\"31\"/>\n</package>\n<package name=\"PTH-JUMPER-NC_BOTTOM_NO_SILK\">\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"1.016\" diameter=\"1.778\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"1.016\" diameter=\"1.778\"/>\n<text x=\"-2.54\" y=\"-1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"0\" y=\"-1.27\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3048\" y1=\"-1.27\" x2=\"0.3048\" y2=\"1.27\" layer=\"30\"/>\n<smd name=\"P$1\" x=\"0\" y=\"0\" dx=\"1.27\" dy=\"0.381\" layer=\"16\" rot=\"R180\"/>\n</package>\n<package name=\"PTH-JUMPER-2-NO_NO_SILK\">\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"1.016\" diameter=\"1.778\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"1.016\" diameter=\"1.778\"/>\n<text x=\"-2.54\" y=\"-1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"0\" y=\"-1.27\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"PAD.03X.04\">\n<smd name=\"P$1\" x=\"0\" y=\"0\" dx=\"1.016\" dy=\"1.016\" layer=\"1\" roundness=\"100\" cream=\"no\"/>\n</package>\n<package name=\"TP_15TH\">\n<pad name=\"P$1\" x=\"0\" y=\"0\" drill=\"0.381\" diameter=\"0.6096\" stop=\"no\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.381\" width=\"0\" layer=\"30\"/>\n</package>\n<package name=\"PAD-JUMPER-2-NO_YES_SILK_ROUND\">\n<smd name=\"1\" x=\"-1.27\" y=\"0\" dx=\"0.3048\" dy=\"0.1524\" layer=\"1\" roundness=\"20\" rot=\"R270\" stop=\"no\" thermals=\"no\" cream=\"no\"/>\n<smd name=\"2\" x=\"1.27\" y=\"0\" dx=\"0.3048\" dy=\"0.1524\" layer=\"1\" roundness=\"20\" rot=\"R90\" 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x=\"-1.524\" y=\"1.3716\"/>\n<vertex x=\"-1.524\" y=\"-0.9144\"/>\n</polygon>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"CAP\" prefix=\"C\" uservalue=\"yes\">\n<description>&lt;b&gt;Capacitor&lt;/b&gt;\nStandard 0603 ceramic capacitor, and 0.1\" leaded capacitor.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"CAP\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"PTH\" package=\"CAP-PTH-SMALL\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH2\" package=\"CAP-PTH-SMALL2\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0805\" package=\"0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH3\" package=\"CAP-PTH-LARGE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"GRM43D\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0603-CAP\" package=\"0603-CAP\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0402-CAP\" package=\"0402-CAP\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH1\" package=\"CAP-PTH-5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_\" package=\"AXIAL-5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1210\" package=\"1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1206\" package=\"1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"ASMD\" package=\"CTZ3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KIT\" package=\"CAP-PTH-SMALL-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"EZ\" package=\"CAP-PTH-SMALLEZ\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"CAP_ADJ\" prefix=\"C\">\n<description>Variable, non-polarized capacitor</description>\n<gates>\n<gate name=\"G$1\" symbol=\"CAP_ADJ\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SMD\" package=\"CTZ3\">\n<connects>\n<connect gate=\"G$1\" pin=\"3\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"CAP_POL\" prefix=\"C\" uservalue=\"yes\">\n<description>&lt;b&gt;Capacitor Polarized&lt;/b&gt;\nThese are standard SMD and PTH capacitors. Normally 10uF, 47uF, and 100uF in electrolytic and tantalum varieties. Always verify the external diameter of the through hole cap, it varies with capacity, voltage, and manufacturer. The EIA devices should be standard.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"CAP_POL\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"1206\" package=\"EIA3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"3528\" package=\"EIA3528\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH1\" package=\"CPOL-RADIAL-100UF-25V\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH2\" package=\"CPOL-RADIAL-10UF-25V\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"7343\" package=\"EIA7343\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"G\" package=\"PANASONIC_G\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"E\" package=\"PANASONIC_E\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C\" package=\"PANASONIC_C\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"F80\" package=\"NIPPON_F80\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"D\" package=\"PANASONIC_D\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH3\" package=\"CPOL-RADIAL-1000UF-63V\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH4\" package=\"CPOL-RADIAL-1000UF-25V\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"VISHAY_C\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"H13\" package=\"PANASONIC_H13\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"6032\" package=\"EIA6032\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"EN_J2\" package=\"EN_J2\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"3528-KIT\" package=\"EIA3528-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1206-KIT\" package=\"EIA3216-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"+\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"-\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"FB\">\n<gates>\n<gate name=\"G$1\" symbol=\"FB\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"FUSE\" prefix=\"F\">\n<gates>\n<gate name=\"G$1\" symbol=\"FUSE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"X20MM\" package=\"FUSE_5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"INDUCTOR\" prefix=\"L\" uservalue=\"yes\">\n<description>&lt;b&gt;Inductors&lt;/b&gt;&lt;p&gt;\nBasic Inductor/Choke - 0603 and 1206. Footprints are not proven and vary greatly between part numbers.&lt;br&gt;\nINDUCTOR POWER 3.3UH 4.0A SMD&lt;br&gt;\n0.197\" L x 0.197\" W x 0.177\" H (5.00mm x 5.00mm x 4.50mm)</description>\n<gates>\n<gate name=\"G$1\" symbol=\"INDUCTOR\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"H*\" package=\"INDUCTOR-1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"1206\"/>\n</technologies>\n</device>\n<device name=\"0603\" package=\"0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR54\" package=\"CR54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PWR\" package=\"CDRH125\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0402\" package=\"C0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-B82462G\" package=\"B82462G\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"68UH-1A\" package=\"CR75\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-09739\"/>\n<attribute name=\"VALUE\" value=\"68uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"1210\" package=\"1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1007\" package=\"1007\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_\" package=\"COOPER_UP4B\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-\" package=\"CDRH3D28\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0805\" package=\"0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR75_V2\" package=\"CR75_V2\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\".\" package=\"CDRH2D09\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"NPI75\" package=\"NPI75C\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SRU5028\" package=\"SRU5028\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SRU1038\" package=\"SRU1038\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR54-KIT\" package=\"CR54-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DR1030\" package=\"DR1030\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VLF4012A\" package=\"VLF4012A\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"AXIAL-0.6\" package=\"AXIAL-0.6\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"RLB0912\" package=\"RLB0912\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"BOURNS_SRN6045\" package=\"SRN6045\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-11627\"/>\n<attribute name=\"VALUE\" value=\"33uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SDR0403-560KL\" package=\"SDR0403\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"DIST\" value=\"DIGIKEY\"/>\n<attribute name=\"DIST_ID\" value=\"SDR0403-560KLCT-ND\"/>\n<attribute name=\"VALUE\" value=\"56uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"30OHM,1.8A\" package=\"0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-07859\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"\" package=\"INDUCTOR-SRP4020\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"INDUCTOR_4.7UH\" package=\"INDUCTOR_4.7UH\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-10146\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SDR13-7-270ML\" package=\"INDUCTOR_SDR1307\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-12529\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"27uH\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CR54-3.3UH\" package=\"CR54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-11157\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"3.3uH\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CR54-47UH\" package=\"CR54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-10789\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"47uH\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"0805-IND\" package=\"0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-13076\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"RESISTOR\" prefix=\"R\" uservalue=\"yes\">\n<description>&lt;b&gt;Resistor&lt;/b&gt;\nBasic schematic elements and footprints for 0603, 1206, and PTH resistors.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"RESISTOR\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"1206\" package=\"1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"AXIAL-0.3\" package=\"AXIAL-0.3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"2010\" package=\"R2010\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0805-RES\" package=\"0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0603-RES\" package=\"0603-RES\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0402-RES\" package=\"0402-RES\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH-1/6W\" package=\"1/6W-RES\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"2512\" package=\"R2512\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH-1/4W\" package=\"AXIAL-0.4\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH-1/2W\" package=\"AXIAL-0.5\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH-1W\" package=\"AXIAL-0.6\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PTH-2W\" package=\"AXIAL-0.8\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KIT\" package=\"AXIAL-0.3-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"EZ\" package=\"AXIAL-0.3EZ\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"RESISTOR-ARRAY\" prefix=\"R\" uservalue=\"yes\">\n<description>&lt;b&gt;Array Chip Resistor&lt;/b&gt;&lt;p&gt;\nSource: RS Component / Phycomp</description>\n<gates>\n<gate name=\"A\" symbol=\"RESISTOR-1\" x=\"0\" y=\"7.62\" addlevel=\"always\" swaplevel=\"1\"/>\n<gate name=\"B\" symbol=\"RESISTOR-1\" x=\"0\" y=\"2.54\" addlevel=\"always\" swaplevel=\"1\"/>\n<gate name=\"C\" symbol=\"RESISTOR-1\" x=\"0\" y=\"-2.54\" addlevel=\"always\" swaplevel=\"1\"/>\n<gate name=\"D\" symbol=\"RESISTOR-1\" x=\"0\" y=\"-7.62\" addlevel=\"always\" swaplevel=\"1\"/>\n</gates>\n<devices>\n<device name=\"0603-ARV\" package=\"0603-ARV\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"8\"/>\n<connect gate=\"B\" pin=\"1\" pad=\"2\"/>\n<connect gate=\"B\" pin=\"2\" pad=\"7\"/>\n<connect gate=\"C\" pin=\"1\" pad=\"3\"/>\n<connect gate=\"C\" pin=\"2\" pad=\"6\"/>\n<connect gate=\"D\" pin=\"1\" pad=\"4\"/>\n<connect gate=\"D\" pin=\"2\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"RPACK*\" prefix=\"R\" uservalue=\"yes\">\n<description>BOURNS 4600X series thick-film SIP resistor packs&lt;br&gt;\n&lt;br&gt;\nFive resistors bussed to a single pin (denoted by dot).&lt;br&gt;\n0.2W / resistor&lt;br&gt;\n&lt;a href=\"http://dlnmh9ip6v2uc.cloudfront.net/datasheets/Components/General/4600x.pdf\"&gt;datasheet&lt;/a&gt;&lt;br&gt;\n&lt;br&gt;\nSFE parts COM-10855 (330), COM-10856 (10K)&lt;br&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"RPACK-BUSSED-5\" x=\"-7.62\" y=\"5.08\"/>\n</gates>\n<devices>\n<device name=\"-BUSSED-SIP-PTH-5\" package=\"RPACK-SIP-PTH-5\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"P$4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"P$5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"P$6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"TEST-POINT\" prefix=\"TP\">\n<description>Bare copper test points for troubleshooting or ICT</description>\n<gates>\n<gate name=\"G$1\" symbol=\"TEST-POINT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"2\" package=\"PAD.02X.02\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"3\" package=\"PAD.03X.03\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"3X5\" package=\"PAD.03X.05\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"3X4\" package=\"PAD.03X.04\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TP_15TH_THRU\" package=\"TP_15TH\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"GND_CONNECT\">\n<description>Use to make a connection of multiple grounds in only one place.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"GND_CONNECT\" x=\"0\" y=\"-2.54\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"GND_CONNECT\">\n<connects>\n<connect gate=\"G$1\" pin=\"AGND\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"DGND\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"IN\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"POTENTIOMETER\" prefix=\"R\">\n<gates>\n<gate name=\"G$1\" symbol=\"POTENTIOMETER\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"0603-ARV\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"3 4 5 6 7 8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"2PT_GND_TIE\" prefix=\"PT\">\n<description>Package for connecting two ground nets in one place.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"2PT_GND_TIE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2PT_GND_TIE\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PAD-2-NC_BY_PASTE\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-2-NC_BY_PASTE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PAD-JUMPER-2-NC_BY_PASTE_YES_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"FULL-BOX-SILK\" package=\"PAD-JUMPER-2-NC_BY_PASTE_YES_SILK_FULL_BOX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"NO-SILK\" package=\"PAD-JUMPER-2-NC_BY_PASTE_NO_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PAD-2-NC_BY_TRACE\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-2-NC_BY_TRACE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PAD-JUMPER-2-NC_BY_TRACE_YES_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"NO_SILK\" package=\"PAD-JUMPER-2-NC_BY_TRACE_NO_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PAD-2-NO\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-2-NO\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PAD-JUMPER-2-NO_NO_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"YES_SILK\" package=\"PAD-JUMPER-2-NO_YES_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"ROUND\" package=\"PAD-JUMPER-2-NO_YES_SILK_ROUND\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PAD-3-NO\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-3-NO\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PAD-JUMPER-3-NO_YES_SILK_FULL_BOX_WIDE_SPACING\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"FULL_BOX_SILK\" package=\"PAD-JUMPER-3-NO_YES_SILK_FULL_BOX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"YES_SILK\" package=\"PAD-JUMPER-3-NO_YES_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PAD-3-NC_BY_TRACE\" prefix=\"JP\" uservalue=\"yes\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-3-NC_BY_TRACE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PAD-JUMPER-3-3OF3_NC_BY_TRACE_YES_SILK_FULL_BOX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PAD-3-2OF3_NC_BY_TRACE\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-3-2OF3-NC_BY_TRACE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"_SMALL\" package=\"PAD-JUMPER-3-2OF3_NC_BY_TRACE_YES_SILK_FULL_BOX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_LARGE\" package=\"PAD-JUMPER-3-2OF3_NC_BY_TRACE_YES_SILK_LARGE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PAD-3-2OF3_NC_BY_PASTE\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-3-2OF3-NC_BY_PASTE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PAD-JUMPER-3-2OF3_NC_BY_PASTE_YES_SILK_FULL_BOX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PAD-3-NC_BY_PASTE\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-3-NC_BY_PASTE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PAD-JUMPER-3-NC_BY_PASTE_YES_SILK_FULL_BOX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PTH-2-NC\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PTH-JUMPER-2-NC_BY_TRACE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PTH-JUMPER-NC_BOTTOM_NO_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PTH-2-NO\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PTH-JUMPER-2-NO\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PTH-JUMPER-2-NO_NO_SILK\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PTH-3-NO\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PTH-JUMPER-3-NO\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PTH-3-NC\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PTH-JUMPER-3-NC_BY_TRACE\" x=\"-2.54\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER-PTH-3-2OF3_NC\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PTH-JUMPER-3-2OF3-NC_BY_TRACE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"SUPPLY_CONNECT\">\n<gates>\n<gate name=\"G$1\" symbol=\"SUPPLY_CONNECT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2PT_GND_TIE\">\n<connects>\n<connect gate=\"G$1\" pin=\"P$1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"P$2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JUMPER_PAD-3-1&amp;2_NC_BY_PASTE\" prefix=\"JP\">\n<gates>\n<gate name=\"G$1\" symbol=\"PAD-JUMPER-3-1&amp;2_NC_BY_PASTE_YES_SILK_FULL_BOX\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PAD-HUMPER-3-1&amp;2_NC_BY_PASTE_YES_SILK_FULL_BOX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</drawing>\n</eagle>\n"
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  {
    "path": "eagle/lbr/oshw.lbr",
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name=\"212bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"213\" name=\"213bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"214\" name=\"214bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"215\" name=\"215bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"216\" name=\"216bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"250\" name=\"Descript\" color=\"3\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"251\" name=\"SMDround\" color=\"12\" fill=\"11\" visible=\"no\" active=\"no\"/>\n<layer number=\"254\" name=\"cooling\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n</layers>\n<library>\n<description>&lt;p&gt;&lt;strong&gt;Open Source Hardware PCB Logos&lt;/strong&gt;\n&lt;p&gt;A simple polygon based version of the OSHWA logos for use on Eagle PCB's\n&lt;p&gt;For use please refer to the OSHWA definition at &lt;a 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length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD13\">\n<wire x1=\"-6.35\" y1=\"-17.78\" x2=\"1.27\" y2=\"-17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-17.78\" x2=\"1.27\" y2=\"17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"17.78\" x2=\"-6.35\" y2=\"17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"17.78\" x2=\"-6.35\" y2=\"-17.78\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"18.415\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-20.32\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD14\">\n<wire x1=\"-6.35\" y1=\"-20.32\" x2=\"1.27\" y2=\"-20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-20.32\" x2=\"1.27\" y2=\"17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"17.78\" x2=\"-6.35\" y2=\"17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"17.78\" x2=\"-6.35\" y2=\"-20.32\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"18.415\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-22.86\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD15\">\n<wire x1=\"-6.35\" y1=\"-20.32\" x2=\"1.27\" y2=\"-20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-20.32\" x2=\"1.27\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"20.32\" x2=\"-6.35\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"20.32\" x2=\"-6.35\" y2=\"-20.32\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"20.955\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-22.86\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD16\">\n<wire x1=\"-6.35\" y1=\"-22.86\" x2=\"1.27\" y2=\"-22.86\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-22.86\" x2=\"1.27\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"20.32\" x2=\"-6.35\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"20.32\" x2=\"-6.35\" y2=\"-22.86\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"20.955\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-25.4\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD17\">\n<wire x1=\"-6.35\" y1=\"-25.4\" x2=\"1.27\" y2=\"-25.4\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-25.4\" x2=\"1.27\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"20.32\" x2=\"-6.35\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"20.32\" x2=\"-6.35\" y2=\"-25.4\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"20.955\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-27.94\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD18\">\n<wire x1=\"-6.35\" y1=\"-25.4\" x2=\"1.27\" y2=\"-25.4\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-25.4\" x2=\"1.27\" y2=\"22.86\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"22.86\" x2=\"-6.35\" y2=\"22.86\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"22.86\" x2=\"-6.35\" y2=\"-25.4\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"23.495\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-27.94\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD19\">\n<wire x1=\"-6.35\" y1=\"-27.94\" x2=\"1.27\" y2=\"-27.94\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-27.94\" x2=\"1.27\" y2=\"22.86\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"22.86\" x2=\"-6.35\" y2=\"22.86\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"22.86\" x2=\"-6.35\" y2=\"-27.94\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"23.495\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-30.48\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD20\">\n<wire x1=\"-6.35\" y1=\"-27.94\" x2=\"1.27\" y2=\"-27.94\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-27.94\" x2=\"1.27\" y2=\"25.4\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"25.4\" x2=\"-6.35\" y2=\"25.4\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"25.4\" x2=\"-6.35\" y2=\"-27.94\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"26.035\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-30.48\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"-2.54\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINH2X20\">\n<wire x1=\"-6.35\" y1=\"-27.94\" x2=\"8.89\" y2=\"-27.94\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-27.94\" x2=\"8.89\" y2=\"25.4\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"25.4\" x2=\"-6.35\" y2=\"25.4\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"25.4\" x2=\"-6.35\" y2=\"-27.94\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"26.035\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-30.48\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" 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length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"27\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"28\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"29\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"30\" x=\"5.08\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"31\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" 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x1=\"8.89\" y1=\"-25.4\" x2=\"8.89\" y2=\"22.86\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"22.86\" x2=\"-6.35\" y2=\"22.86\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"22.86\" x2=\"-6.35\" y2=\"-25.4\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"23.495\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-27.94\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"27\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"28\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"29\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"30\" x=\"5.08\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"31\" x=\"-2.54\" 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layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"22.86\" x2=\"-6.35\" y2=\"-22.86\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"23.495\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-25.4\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"27\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"28\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"29\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"30\" x=\"5.08\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"31\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"32\" x=\"5.08\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"33\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"34\" x=\"5.08\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X16\">\n<wire x1=\"-6.35\" y1=\"-22.86\" x2=\"8.89\" y2=\"-22.86\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-22.86\" x2=\"8.89\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"20.32\" x2=\"-6.35\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"20.32\" x2=\"-6.35\" y2=\"-22.86\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"20.955\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-25.4\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"27\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"28\" x=\"5.08\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"29\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"30\" x=\"5.08\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"31\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"32\" x=\"5.08\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X15\">\n<wire x1=\"-6.35\" y1=\"-20.32\" x2=\"8.89\" y2=\"-20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-20.32\" x2=\"8.89\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"20.32\" x2=\"-6.35\" y2=\"20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"20.32\" x2=\"-6.35\" y2=\"-20.32\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"20.955\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-22.86\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"27\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"28\" x=\"5.08\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"29\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"30\" x=\"5.08\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X14\">\n<wire x1=\"-6.35\" y1=\"-20.32\" x2=\"8.89\" y2=\"-20.32\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-20.32\" x2=\"8.89\" y2=\"17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"17.78\" x2=\"-6.35\" y2=\"17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"17.78\" x2=\"-6.35\" y2=\"-20.32\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"18.415\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-22.86\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"5.08\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"27\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"28\" x=\"5.08\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X13\">\n<wire x1=\"-6.35\" y1=\"-17.78\" x2=\"8.89\" y2=\"-17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-17.78\" x2=\"8.89\" y2=\"17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"17.78\" x2=\"-6.35\" y2=\"17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"17.78\" x2=\"-6.35\" y2=\"-17.78\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"18.415\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-20.32\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"5.08\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X12\">\n<wire x1=\"-6.35\" y1=\"-17.78\" x2=\"8.89\" y2=\"-17.78\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-17.78\" x2=\"8.89\" y2=\"15.24\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"15.24\" x2=\"-6.35\" y2=\"15.24\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"15.24\" x2=\"-6.35\" y2=\"-17.78\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"15.875\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-20.32\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"5.08\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X11\">\n<wire x1=\"-6.35\" y1=\"-15.24\" x2=\"8.89\" y2=\"-15.24\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-15.24\" x2=\"8.89\" y2=\"15.24\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"15.24\" x2=\"-6.35\" y2=\"15.24\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"15.24\" x2=\"-6.35\" y2=\"-15.24\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"15.875\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-17.78\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X10\">\n<wire x1=\"-6.35\" y1=\"-15.24\" x2=\"8.89\" y2=\"-15.24\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-15.24\" x2=\"8.89\" y2=\"12.7\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"12.7\" x2=\"-6.35\" y2=\"12.7\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"12.7\" x2=\"-6.35\" y2=\"-15.24\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"13.335\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-17.78\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"5.08\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X9\">\n<wire x1=\"-6.35\" y1=\"-12.7\" x2=\"8.89\" y2=\"-12.7\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-12.7\" x2=\"8.89\" y2=\"12.7\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"12.7\" x2=\"-6.35\" y2=\"12.7\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"12.7\" x2=\"-6.35\" y2=\"-12.7\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"13.335\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-15.24\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X8\">\n<wire x1=\"-6.35\" y1=\"-12.7\" x2=\"8.89\" y2=\"-12.7\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-12.7\" x2=\"8.89\" y2=\"10.16\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"10.16\" x2=\"-6.35\" y2=\"10.16\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"10.16\" x2=\"-6.35\" y2=\"-12.7\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"10.795\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-15.24\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X7\">\n<wire x1=\"-6.35\" y1=\"-10.16\" x2=\"8.89\" y2=\"-10.16\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-10.16\" x2=\"8.89\" y2=\"10.16\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"10.16\" x2=\"-6.35\" y2=\"10.16\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"10.16\" x2=\"-6.35\" y2=\"-10.16\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"10.795\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-12.7\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X6\">\n<wire x1=\"-6.35\" y1=\"-10.16\" x2=\"8.89\" y2=\"-10.16\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-10.16\" x2=\"8.89\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"7.62\" x2=\"-6.35\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"7.62\" x2=\"-6.35\" y2=\"-10.16\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"8.255\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-12.7\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X5\">\n<wire x1=\"-6.35\" y1=\"-7.62\" x2=\"8.89\" y2=\"-7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-7.62\" x2=\"8.89\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"7.62\" x2=\"-6.35\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"7.62\" x2=\"-6.35\" y2=\"-7.62\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"8.255\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-10.16\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X4\">\n<wire x1=\"-6.35\" y1=\"-5.08\" x2=\"8.89\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-5.08\" x2=\"8.89\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"7.62\" x2=\"-6.35\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire 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direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X3\">\n<wire x1=\"-6.35\" y1=\"-5.08\" x2=\"8.89\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-5.08\" x2=\"8.89\" y2=\"5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"5.08\" x2=\"-6.35\" y2=\"5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"5.08\" x2=\"-6.35\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"5.715\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-7.62\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"0\" visible=\"pad\" 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direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin 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function=\"dot\" rot=\"R180\"/>\n<pin name=\"45\" x=\"-2.54\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"46\" x=\"5.08\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"47\" x=\"-2.54\" y=\"-30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"48\" x=\"5.08\" y=\"-30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X25\">\n<wire x1=\"-6.35\" y1=\"-33.02\" x2=\"8.89\" y2=\"-33.02\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-33.02\" x2=\"8.89\" y2=\"33.02\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"33.02\" x2=\"-6.35\" y2=\"33.02\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"33.02\" x2=\"-6.35\" y2=\"-33.02\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"33.655\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-35.56\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"10.16\" 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rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINH2X30\">\n<wire x1=\"-6.35\" y1=\"-40.64\" x2=\"8.89\" y2=\"-40.64\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"-40.64\" x2=\"8.89\" y2=\"38.1\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"8.89\" y1=\"38.1\" x2=\"-6.35\" y2=\"38.1\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"38.1\" x2=\"-6.35\" y2=\"-40.64\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"38.735\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-43.18\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"35.56\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"35.56\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"33.02\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"33.02\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin 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function=\"dot\" rot=\"R180\"/>\n<pin name=\"47\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"48\" x=\"5.08\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"49\" x=\"-2.54\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"50\" x=\"5.08\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"51\" x=\"-2.54\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"52\" x=\"5.08\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"53\" x=\"-2.54\" y=\"-30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"54\" x=\"5.08\" y=\"-30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"55\" x=\"-2.54\" y=\"-33.02\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"56\" x=\"5.08\" y=\"-33.02\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"57\" x=\"-2.54\" y=\"-35.56\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"58\" x=\"5.08\" y=\"-35.56\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"59\" x=\"-2.54\" y=\"-38.1\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"60\" x=\"5.08\" y=\"-38.1\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PINHD_1V\">\n<text x=\"2.54\" y=\"-0.889\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"0\" y=\"2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\"/>\n<wire x1=\"0.508\" y1=\"0.381\" x2=\"0.762\" y2=\"0.635\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.762\" y1=\"0.635\" x2=\"1.524\" y2=\"0.635\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.524\" y1=\"0.635\" x2=\"1.778\" y2=\"0.381\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.778\" y1=\"0.381\" x2=\"1.778\" y2=\"-0.381\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.778\" y1=\"-0.381\" x2=\"1.524\" y2=\"-0.635\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.524\" y1=\"-0.635\" x2=\"0.762\" y2=\"-0.635\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.762\" y1=\"-0.635\" x2=\"0.508\" y2=\"-0.381\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.508\" y1=\"-0.381\" x2=\"0.508\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"0.508\" y2=\"0.381\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"0.508\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n</symbol>\n<symbol name=\"PINHD_1\">\n<text x=\"2.54\" y=\"-0.889\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<pin name=\"1\" x=\"-2.54\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\"/>\n<wire x1=\"0.508\" y1=\"0.381\" x2=\"0.762\" y2=\"0.635\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.762\" y1=\"0.635\" x2=\"1.524\" y2=\"0.635\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.524\" y1=\"0.635\" x2=\"1.778\" y2=\"0.381\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.778\" y1=\"0.381\" x2=\"1.778\" y2=\"-0.381\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.778\" y1=\"-0.381\" x2=\"1.524\" y2=\"-0.635\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.524\" y1=\"-0.635\" x2=\"0.762\" y2=\"-0.635\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.762\" y1=\"-0.635\" x2=\"0.508\" y2=\"-0.381\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.508\" y1=\"-0.381\" x2=\"0.508\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"0.508\" y2=\"0.381\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"0.508\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n</symbol>\n<symbol name=\"PINHD40\">\n<wire x1=\"-6.35\" y1=\"-53.34\" x2=\"1.27\" y2=\"-53.34\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-53.34\" x2=\"1.27\" y2=\"50.8\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"50.8\" x2=\"-6.35\" y2=\"50.8\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"50.8\" x2=\"-6.35\" y2=\"-53.34\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"51.435\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-55.88\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"48.26\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"45.72\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"43.18\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"40.64\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"38.1\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"35.56\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"33.02\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"27\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"28\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"29\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"30\" x=\"-2.54\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"31\" x=\"-2.54\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"32\" x=\"-2.54\" y=\"-30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"33\" x=\"-2.54\" y=\"-33.02\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"34\" x=\"-2.54\" y=\"-35.56\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"35\" x=\"-2.54\" y=\"-38.1\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"36\" x=\"-2.54\" y=\"-40.64\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"37\" x=\"-2.54\" y=\"-43.18\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"38\" x=\"-2.54\" y=\"-45.72\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"39\" x=\"-2.54\" y=\"-48.26\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"40\" x=\"-2.54\" y=\"-50.8\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD30\">\n<wire x1=\"-6.35\" y1=\"-40.64\" x2=\"1.27\" y2=\"-40.64\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-40.64\" x2=\"1.27\" y2=\"38.1\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"38.1\" x2=\"-6.35\" y2=\"38.1\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"38.1\" x2=\"-6.35\" y2=\"-40.64\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"38.735\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-43.18\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"35.56\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"33.02\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"26\" x=\"-2.54\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"27\" x=\"-2.54\" y=\"-30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"28\" x=\"-2.54\" y=\"-33.02\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"29\" x=\"-2.54\" y=\"-35.56\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"30\" x=\"-2.54\" y=\"-38.1\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD25\">\n<wire x1=\"-6.35\" y1=\"-33.02\" x2=\"1.27\" y2=\"-33.02\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-33.02\" x2=\"1.27\" y2=\"33.02\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"33.02\" x2=\"-6.35\" y2=\"33.02\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"33.02\" x2=\"-6.35\" y2=\"-33.02\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"33.655\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-35.56\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"-2.54\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"25\" x=\"-2.54\" y=\"-30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD24\">\n<wire x1=\"-6.35\" y1=\"-33.02\" x2=\"1.27\" y2=\"-33.02\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-33.02\" x2=\"1.27\" y2=\"30.48\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"30.48\" x2=\"-6.35\" y2=\"30.48\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"30.48\" x2=\"-6.35\" y2=\"-33.02\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"31.115\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-35.56\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"-2.54\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"23\" x=\"-2.54\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"24\" x=\"-2.54\" y=\"-30.48\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n<symbol name=\"PINHD22\">\n<wire x1=\"-6.35\" y1=\"-30.48\" x2=\"1.27\" y2=\"-30.48\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-30.48\" x2=\"1.27\" y2=\"27.94\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"27.94\" x2=\"-6.35\" y2=\"27.94\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-6.35\" y1=\"27.94\" x2=\"-6.35\" y2=\"-30.48\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"28.575\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-33.02\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"-2.54\" y=\"22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"-2.54\" y=\"17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"-2.54\" y=\"12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"-2.54\" y=\"-12.7\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"17\" x=\"-2.54\" y=\"-15.24\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"18\" x=\"-2.54\" y=\"-17.78\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"19\" x=\"-2.54\" y=\"-20.32\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"20\" x=\"-2.54\" y=\"-22.86\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"21\" x=\"-2.54\" y=\"-25.4\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"22\" x=\"-2.54\" y=\"-27.94\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"PINHD-1X2\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PINHD2\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X02\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X02/90\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X1\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PINHD1\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X01\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X3\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD3\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X03\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X03/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X03_SMT\" package=\"1X03_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X4\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD4\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X04\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X04/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X04_SMT\" package=\"1X04_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X5\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD5\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X05\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X05/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"5X2MM\" package=\"1_05X2MM\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X05_SMT\" package=\"1X05_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X6\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD6\" x=\"0\" y=\"-2.54\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X06\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X06/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X06_SMT\" package=\"1X06_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X7\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD7\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X07\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X07/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X07_SMT\" package=\"1X07_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X8\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD8\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X08\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X08/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X08_SMT\" package=\"1X08_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X9\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD9\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X09\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X09/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X09_SMT\" package=\"1X09_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X10\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD10\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X10\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X10/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X10_SMT\" package=\"1X10_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X11\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD11\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X11\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X11/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X11_SMT\" package=\"1X11_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X12\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PINHD12\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X12/90\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X12_SMT\" package=\"1X12_SMT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X13\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD13\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X13\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X13/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X13_SMT\" package=\"1X13_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X14\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD14\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X14\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X14/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X14_SMT\" package=\"1X14_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X15\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD15\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X15\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X15/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X15_SMT\" package=\"1X15_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X16\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD16\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X16\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X16/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X16_SMT\" package=\"1X16_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X17\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PINHD17\" x=\"0\" y=\"2.54\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X17\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X17/90\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X17_SMT\" package=\"1X17_SMT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X18\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD18\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X18\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X18/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X18_SMT\" package=\"1X18_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X19\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PINHD19\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X19\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X19/90\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X19_SMT\" package=\"1X19_SMT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X20\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD20\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X20\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X20/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1X20SMT\" package=\"1X20_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X20\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X20\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X20\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X20/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X20_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X19\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PINH2X19\" x=\"0\" y=\"2.54\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X19\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"G$1\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"G$1\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"G$1\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X19/90\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"G$1\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"G$1\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"G$1\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X19_SMT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"G$1\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"G$1\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"G$1\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X18\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X18\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X18\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X18/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X18_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X17\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PINH2X17\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X17\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X17/90\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X17_SMT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X16\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X16\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X16\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X16/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X16_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X15\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X15\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X15\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X15/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X15_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X14\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X14\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X14\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X14/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X14_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X13\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X13\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X13\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X13/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X13_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X12\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X12\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X12\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X12/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X12_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X11\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X11\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X11\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X11/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X11_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X10\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X10\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X10\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X10/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X10_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X9\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X9\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X09\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X09/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X09_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X8\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X8\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X08\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X08/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X08_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X7\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X7\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X07\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X07/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X07_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X6\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X6\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X06\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X06/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X06_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X5\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X5\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X05\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X05/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X05_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X4\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X4\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X04\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X04/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X04_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X3\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X3\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X03\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X03/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X03_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X2\" prefix=\"JP\" uservalue=\"yes\">\n<description>PIN HEADER</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PINH2X2\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X02\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X02/90\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X02_SMT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X22\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X22\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X22\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X22/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X24\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X24\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X24\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"45\" pad=\"45\"/>\n<connect gate=\"A\" pin=\"46\" pad=\"46\"/>\n<connect gate=\"A\" pin=\"47\" pad=\"47\"/>\n<connect gate=\"A\" pin=\"48\" pad=\"48\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X24/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"45\" pad=\"45\"/>\n<connect gate=\"A\" pin=\"46\" pad=\"46\"/>\n<connect gate=\"A\" pin=\"47\" pad=\"47\"/>\n<connect gate=\"A\" pin=\"48\" pad=\"48\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X25\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X25\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X25\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"45\" pad=\"45\"/>\n<connect gate=\"A\" pin=\"46\" pad=\"46\"/>\n<connect gate=\"A\" pin=\"47\" pad=\"47\"/>\n<connect gate=\"A\" pin=\"48\" pad=\"48\"/>\n<connect gate=\"A\" pin=\"49\" pad=\"49\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"50\" pad=\"50\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_57102-F08-25\" package=\"57102-F08-25\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"45\" pad=\"45\"/>\n<connect gate=\"A\" pin=\"46\" pad=\"46\"/>\n<connect gate=\"A\" pin=\"47\" pad=\"47\"/>\n<connect gate=\"A\" pin=\"48\" pad=\"48\"/>\n<connect gate=\"A\" pin=\"49\" pad=\"49\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"50\" pad=\"50\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X25/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"45\" pad=\"45\"/>\n<connect gate=\"A\" pin=\"46\" pad=\"46\"/>\n<connect gate=\"A\" pin=\"47\" pad=\"47\"/>\n<connect gate=\"A\" pin=\"48\" pad=\"48\"/>\n<connect gate=\"A\" pin=\"49\" pad=\"49\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"50\" pad=\"50\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-2X30\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X30\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X30\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"45\" pad=\"45\"/>\n<connect gate=\"A\" pin=\"46\" pad=\"46\"/>\n<connect gate=\"A\" pin=\"47\" pad=\"47\"/>\n<connect gate=\"A\" pin=\"48\" pad=\"48\"/>\n<connect gate=\"A\" pin=\"49\" pad=\"49\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"50\" pad=\"50\"/>\n<connect gate=\"A\" pin=\"51\" pad=\"51\"/>\n<connect gate=\"A\" pin=\"52\" pad=\"52\"/>\n<connect gate=\"A\" pin=\"53\" pad=\"53\"/>\n<connect gate=\"A\" pin=\"54\" pad=\"54\"/>\n<connect gate=\"A\" pin=\"55\" pad=\"55\"/>\n<connect gate=\"A\" pin=\"56\" pad=\"56\"/>\n<connect gate=\"A\" pin=\"57\" pad=\"57\"/>\n<connect gate=\"A\" pin=\"58\" pad=\"58\"/>\n<connect gate=\"A\" pin=\"59\" pad=\"59\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"60\" pad=\"60\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X30/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"A\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"A\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"A\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"A\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"A\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"A\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"A\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"A\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"A\" pin=\"41\" pad=\"41\"/>\n<connect gate=\"A\" pin=\"42\" pad=\"42\"/>\n<connect gate=\"A\" pin=\"43\" pad=\"43\"/>\n<connect gate=\"A\" pin=\"44\" pad=\"44\"/>\n<connect gate=\"A\" pin=\"45\" pad=\"45\"/>\n<connect gate=\"A\" pin=\"46\" pad=\"46\"/>\n<connect gate=\"A\" pin=\"47\" pad=\"47\"/>\n<connect gate=\"A\" pin=\"48\" pad=\"48\"/>\n<connect gate=\"A\" pin=\"49\" pad=\"49\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"50\" pad=\"50\"/>\n<connect gate=\"A\" pin=\"51\" pad=\"51\"/>\n<connect gate=\"A\" pin=\"52\" pad=\"52\"/>\n<connect gate=\"A\" pin=\"53\" pad=\"53\"/>\n<connect gate=\"A\" pin=\"54\" pad=\"54\"/>\n<connect gate=\"A\" pin=\"55\" pad=\"55\"/>\n<connect gate=\"A\" pin=\"56\" pad=\"56\"/>\n<connect gate=\"A\" pin=\"57\" pad=\"57\"/>\n<connect gate=\"A\" pin=\"58\" pad=\"58\"/>\n<connect gate=\"A\" pin=\"59\" pad=\"59\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"60\" pad=\"60\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X100\" prefix=\"JP\">\n<description>&lt;b&gt;PIN HEADER 100 pol.&lt;/b&gt; Grid 2.54mm&lt;p&gt;</description>\n<gates>\n<gate name=\".1\" symbol=\"PINHD_1V\" x=\"0\" y=\"0\" addlevel=\"always\"/>\n<gate name=\".2\" symbol=\"PINHD_1\" x=\"0\" y=\"-2.54\" addlevel=\"always\"/>\n<gate name=\".3\" symbol=\"PINHD_1\" x=\"0\" y=\"-5.08\" addlevel=\"always\"/>\n<gate name=\".4\" symbol=\"PINHD_1\" x=\"0\" y=\"-7.62\" addlevel=\"always\"/>\n<gate name=\".5\" symbol=\"PINHD_1\" x=\"0\" y=\"-10.16\" addlevel=\"always\"/>\n<gate name=\".6\" symbol=\"PINHD_1\" x=\"0\" y=\"-12.7\" addlevel=\"always\"/>\n<gate name=\".7\" symbol=\"PINHD_1\" x=\"0\" y=\"-15.24\" addlevel=\"always\"/>\n<gate name=\".8\" symbol=\"PINHD_1\" x=\"0\" y=\"-17.78\" addlevel=\"always\"/>\n<gate name=\".9\" symbol=\"PINHD_1\" x=\"0\" y=\"-20.32\" addlevel=\"always\"/>\n<gate name=\".10\" symbol=\"PINHD_1\" x=\"0\" y=\"-22.86\" addlevel=\"always\"/>\n<gate name=\".11\" symbol=\"PINHD_1\" x=\"0\" y=\"-25.4\" addlevel=\"always\"/>\n<gate name=\".12\" symbol=\"PINHD_1\" x=\"0\" y=\"-27.94\" addlevel=\"always\"/>\n<gate name=\".13\" symbol=\"PINHD_1\" x=\"0\" y=\"-30.48\" addlevel=\"always\"/>\n<gate name=\".14\" symbol=\"PINHD_1\" x=\"0\" y=\"-33.02\" addlevel=\"always\"/>\n<gate name=\".15\" symbol=\"PINHD_1\" x=\"0\" y=\"-35.56\" addlevel=\"always\"/>\n<gate name=\".16\" symbol=\"PINHD_1\" x=\"0\" y=\"-38.1\" addlevel=\"always\"/>\n<gate name=\".17\" symbol=\"PINHD_1\" x=\"0\" y=\"-40.64\" addlevel=\"always\"/>\n<gate name=\".18\" symbol=\"PINHD_1\" x=\"0\" y=\"-43.18\" addlevel=\"always\"/>\n<gate name=\".19\" symbol=\"PINHD_1\" x=\"0\" y=\"-45.72\" addlevel=\"always\"/>\n<gate name=\".20\" symbol=\"PINHD_1\" x=\"0\" y=\"-48.26\" addlevel=\"always\"/>\n<gate name=\".21\" symbol=\"PINHD_1\" x=\"0\" y=\"-50.8\" addlevel=\"always\"/>\n<gate name=\".22\" symbol=\"PINHD_1\" x=\"0\" y=\"-53.34\" addlevel=\"always\"/>\n<gate name=\".23\" symbol=\"PINHD_1\" x=\"0\" y=\"-55.88\" addlevel=\"always\"/>\n<gate name=\".24\" symbol=\"PINHD_1\" x=\"0\" y=\"-58.42\" addlevel=\"always\"/>\n<gate name=\".25\" symbol=\"PINHD_1\" x=\"0\" y=\"-60.96\" addlevel=\"always\"/>\n<gate name=\".26\" symbol=\"PINHD_1\" x=\"0\" y=\"-63.5\" addlevel=\"always\"/>\n<gate name=\".27\" symbol=\"PINHD_1\" x=\"0\" y=\"-66.04\" addlevel=\"always\"/>\n<gate name=\".28\" symbol=\"PINHD_1\" x=\"0\" y=\"-68.58\" addlevel=\"always\"/>\n<gate name=\".29\" symbol=\"PINHD_1\" x=\"0\" y=\"-71.12\" addlevel=\"always\"/>\n<gate name=\".30\" symbol=\"PINHD_1\" x=\"0\" y=\"-73.66\" addlevel=\"always\"/>\n<gate name=\".31\" symbol=\"PINHD_1\" x=\"0\" y=\"-76.2\" addlevel=\"always\"/>\n<gate name=\".32\" symbol=\"PINHD_1\" x=\"0\" y=\"-78.74\" addlevel=\"always\"/>\n<gate name=\".33\" symbol=\"PINHD_1\" x=\"0\" y=\"-81.28\" addlevel=\"always\"/>\n<gate name=\".34\" symbol=\"PINHD_1\" x=\"0\" y=\"-83.82\" addlevel=\"always\"/>\n<gate name=\".35\" symbol=\"PINHD_1\" x=\"0\" y=\"-86.36\" addlevel=\"always\"/>\n<gate name=\".36\" symbol=\"PINHD_1\" x=\"0\" y=\"-88.9\" addlevel=\"always\"/>\n<gate name=\".37\" symbol=\"PINHD_1\" x=\"0\" y=\"-91.44\" addlevel=\"always\"/>\n<gate name=\".38\" symbol=\"PINHD_1\" x=\"0\" y=\"-93.98\" addlevel=\"always\"/>\n<gate name=\".39\" symbol=\"PINHD_1\" x=\"0\" y=\"-96.52\" addlevel=\"always\"/>\n<gate name=\".40\" symbol=\"PINHD_1\" x=\"0\" y=\"-99.06\" addlevel=\"always\"/>\n<gate name=\".41\" symbol=\"PINHD_1\" x=\"0\" y=\"-101.6\" addlevel=\"always\"/>\n<gate name=\".42\" symbol=\"PINHD_1\" x=\"0\" y=\"-104.14\" addlevel=\"always\"/>\n<gate name=\".43\" symbol=\"PINHD_1\" x=\"0\" y=\"-106.68\" addlevel=\"always\"/>\n<gate name=\".44\" symbol=\"PINHD_1\" x=\"0\" y=\"-109.22\" addlevel=\"always\"/>\n<gate name=\".45\" symbol=\"PINHD_1\" x=\"0\" y=\"-111.76\" addlevel=\"always\"/>\n<gate name=\".46\" symbol=\"PINHD_1\" x=\"0\" y=\"-114.3\" addlevel=\"always\"/>\n<gate name=\".47\" symbol=\"PINHD_1\" x=\"0\" y=\"-116.84\" addlevel=\"always\"/>\n<gate name=\".48\" symbol=\"PINHD_1\" x=\"0\" y=\"-119.38\" addlevel=\"always\"/>\n<gate name=\".49\" symbol=\"PINHD_1\" x=\"0\" y=\"-121.92\" addlevel=\"always\"/>\n<gate name=\".50\" symbol=\"PINHD_1\" x=\"0\" y=\"-124.46\" addlevel=\"always\"/>\n<gate name=\".51\" symbol=\"PINHD_1\" x=\"0\" y=\"-127\" addlevel=\"always\"/>\n<gate name=\".52\" symbol=\"PINHD_1\" x=\"0\" y=\"-129.54\" addlevel=\"always\"/>\n<gate name=\".53\" symbol=\"PINHD_1\" x=\"0\" y=\"-132.08\" addlevel=\"always\"/>\n<gate name=\".54\" symbol=\"PINHD_1\" x=\"0\" y=\"-134.62\" addlevel=\"always\"/>\n<gate name=\".55\" symbol=\"PINHD_1\" x=\"0\" y=\"-137.16\" addlevel=\"always\"/>\n<gate name=\".56\" symbol=\"PINHD_1\" x=\"0\" y=\"-139.7\" addlevel=\"always\"/>\n<gate name=\".57\" symbol=\"PINHD_1\" x=\"0\" y=\"-142.24\" addlevel=\"always\"/>\n<gate name=\".58\" symbol=\"PINHD_1\" x=\"0\" y=\"-144.78\" addlevel=\"always\"/>\n<gate name=\".59\" symbol=\"PINHD_1\" x=\"0\" y=\"-147.32\" addlevel=\"always\"/>\n<gate name=\".60\" symbol=\"PINHD_1\" x=\"0\" y=\"-149.86\" addlevel=\"always\"/>\n<gate name=\".61\" symbol=\"PINHD_1\" x=\"0\" y=\"-152.4\" addlevel=\"always\"/>\n<gate name=\".62\" symbol=\"PINHD_1\" x=\"0\" y=\"-154.94\" addlevel=\"always\"/>\n<gate name=\".63\" symbol=\"PINHD_1\" x=\"0\" y=\"-157.48\" addlevel=\"always\"/>\n<gate name=\".64\" symbol=\"PINHD_1\" x=\"0\" y=\"-160.02\" addlevel=\"always\"/>\n<gate name=\".65\" symbol=\"PINHD_1\" x=\"0\" y=\"-162.56\" addlevel=\"always\"/>\n<gate name=\".66\" symbol=\"PINHD_1\" x=\"0\" y=\"-165.1\" addlevel=\"always\"/>\n<gate name=\".67\" symbol=\"PINHD_1\" x=\"0\" y=\"-167.64\" addlevel=\"always\"/>\n<gate name=\".68\" symbol=\"PINHD_1\" x=\"0\" y=\"-170.18\" addlevel=\"always\"/>\n<gate name=\".69\" symbol=\"PINHD_1\" x=\"0\" y=\"-172.72\" addlevel=\"always\"/>\n<gate name=\".70\" symbol=\"PINHD_1\" x=\"0\" y=\"-175.26\" addlevel=\"always\"/>\n<gate name=\".71\" symbol=\"PINHD_1\" x=\"0\" y=\"-177.8\" addlevel=\"always\"/>\n<gate name=\".72\" symbol=\"PINHD_1\" x=\"0\" y=\"-180.34\" addlevel=\"always\"/>\n<gate name=\".73\" symbol=\"PINHD_1\" x=\"0\" y=\"-182.88\" addlevel=\"always\"/>\n<gate name=\".74\" symbol=\"PINHD_1\" x=\"0\" y=\"-185.42\" addlevel=\"always\"/>\n<gate name=\".75\" symbol=\"PINHD_1\" x=\"0\" y=\"-187.96\" addlevel=\"always\"/>\n<gate name=\".76\" symbol=\"PINHD_1\" x=\"0\" y=\"-190.5\" addlevel=\"always\"/>\n<gate name=\".77\" symbol=\"PINHD_1\" x=\"0\" y=\"-193.04\" addlevel=\"always\"/>\n<gate name=\".78\" symbol=\"PINHD_1\" x=\"0\" y=\"-195.58\" addlevel=\"always\"/>\n<gate name=\".79\" symbol=\"PINHD_1\" x=\"0\" y=\"-198.12\" addlevel=\"always\"/>\n<gate name=\".80\" symbol=\"PINHD_1\" x=\"0\" y=\"-200.66\" addlevel=\"always\"/>\n<gate name=\".81\" symbol=\"PINHD_1\" x=\"0\" y=\"-203.2\" addlevel=\"always\"/>\n<gate name=\".82\" symbol=\"PINHD_1\" x=\"0\" y=\"-205.74\" addlevel=\"always\"/>\n<gate name=\".83\" symbol=\"PINHD_1\" x=\"0\" y=\"-208.28\" addlevel=\"always\"/>\n<gate name=\".84\" symbol=\"PINHD_1\" x=\"0\" y=\"-210.82\" addlevel=\"always\"/>\n<gate name=\".85\" symbol=\"PINHD_1\" x=\"0\" y=\"-213.36\" addlevel=\"always\"/>\n<gate name=\".86\" symbol=\"PINHD_1\" x=\"0\" y=\"-215.9\" addlevel=\"always\"/>\n<gate name=\".87\" symbol=\"PINHD_1\" x=\"0\" y=\"-218.44\" addlevel=\"always\"/>\n<gate name=\".88\" symbol=\"PINHD_1\" x=\"0\" y=\"-220.98\" addlevel=\"always\"/>\n<gate name=\".89\" symbol=\"PINHD_1\" x=\"0\" y=\"-223.52\" addlevel=\"always\"/>\n<gate name=\".90\" symbol=\"PINHD_1\" x=\"0\" y=\"-226.06\" addlevel=\"always\"/>\n<gate name=\".91\" symbol=\"PINHD_1\" x=\"0\" y=\"-228.6\" addlevel=\"always\"/>\n<gate name=\".92\" symbol=\"PINHD_1\" x=\"0\" y=\"-231.14\" addlevel=\"always\"/>\n<gate name=\".93\" symbol=\"PINHD_1\" x=\"0\" y=\"-233.68\" addlevel=\"always\"/>\n<gate name=\".94\" symbol=\"PINHD_1\" x=\"0\" y=\"-236.22\" addlevel=\"always\"/>\n<gate name=\".95\" symbol=\"PINHD_1\" x=\"0\" y=\"-238.76\" addlevel=\"always\"/>\n<gate name=\".96\" symbol=\"PINHD_1\" x=\"0\" y=\"-241.3\" addlevel=\"always\"/>\n<gate name=\".97\" symbol=\"PINHD_1\" x=\"0\" y=\"-243.84\" addlevel=\"always\"/>\n<gate name=\".98\" symbol=\"PINHD_1\" x=\"0\" y=\"-246.38\" addlevel=\"always\"/>\n<gate name=\".99\" symbol=\"PINHD_1\" x=\"0\" y=\"-248.92\" addlevel=\"always\"/>\n<gate name=\".100\" symbol=\"PINHD_1\" x=\"0\" y=\"-251.46\" addlevel=\"always\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X100\">\n<connects>\n<connect gate=\".1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\".10\" pin=\"1\" pad=\"10\"/>\n<connect gate=\".100\" pin=\"1\" pad=\"100\"/>\n<connect gate=\".11\" pin=\"1\" pad=\"11\"/>\n<connect gate=\".12\" pin=\"1\" pad=\"12\"/>\n<connect gate=\".13\" pin=\"1\" pad=\"13\"/>\n<connect gate=\".14\" pin=\"1\" pad=\"14\"/>\n<connect gate=\".15\" pin=\"1\" pad=\"15\"/>\n<connect gate=\".16\" pin=\"1\" pad=\"16\"/>\n<connect gate=\".17\" pin=\"1\" pad=\"17\"/>\n<connect gate=\".18\" pin=\"1\" pad=\"18\"/>\n<connect gate=\".19\" pin=\"1\" pad=\"19\"/>\n<connect gate=\".2\" pin=\"1\" pad=\"2\"/>\n<connect gate=\".20\" pin=\"1\" pad=\"20\"/>\n<connect gate=\".21\" pin=\"1\" pad=\"21\"/>\n<connect gate=\".22\" pin=\"1\" pad=\"22\"/>\n<connect gate=\".23\" pin=\"1\" pad=\"23\"/>\n<connect gate=\".24\" pin=\"1\" pad=\"24\"/>\n<connect gate=\".25\" pin=\"1\" pad=\"25\"/>\n<connect gate=\".26\" pin=\"1\" pad=\"26\"/>\n<connect gate=\".27\" pin=\"1\" pad=\"27\"/>\n<connect gate=\".28\" pin=\"1\" pad=\"28\"/>\n<connect gate=\".29\" pin=\"1\" pad=\"29\"/>\n<connect gate=\".3\" pin=\"1\" pad=\"3\"/>\n<connect gate=\".30\" pin=\"1\" pad=\"30\"/>\n<connect gate=\".31\" pin=\"1\" pad=\"31\"/>\n<connect gate=\".32\" pin=\"1\" pad=\"32\"/>\n<connect gate=\".33\" pin=\"1\" pad=\"33\"/>\n<connect gate=\".34\" pin=\"1\" pad=\"34\"/>\n<connect gate=\".35\" pin=\"1\" pad=\"35\"/>\n<connect gate=\".36\" pin=\"1\" pad=\"36\"/>\n<connect gate=\".37\" pin=\"1\" pad=\"37\"/>\n<connect gate=\".38\" pin=\"1\" pad=\"38\"/>\n<connect gate=\".39\" pin=\"1\" pad=\"39\"/>\n<connect gate=\".4\" pin=\"1\" pad=\"4\"/>\n<connect gate=\".40\" pin=\"1\" pad=\"40\"/>\n<connect gate=\".41\" pin=\"1\" pad=\"41\"/>\n<connect gate=\".42\" pin=\"1\" pad=\"42\"/>\n<connect gate=\".43\" pin=\"1\" pad=\"43\"/>\n<connect gate=\".44\" pin=\"1\" pad=\"44\"/>\n<connect gate=\".45\" pin=\"1\" pad=\"45\"/>\n<connect gate=\".46\" pin=\"1\" pad=\"46\"/>\n<connect gate=\".47\" pin=\"1\" pad=\"47\"/>\n<connect gate=\".48\" pin=\"1\" pad=\"48\"/>\n<connect gate=\".49\" pin=\"1\" pad=\"49\"/>\n<connect gate=\".5\" pin=\"1\" pad=\"5\"/>\n<connect gate=\".50\" pin=\"1\" pad=\"50\"/>\n<connect gate=\".51\" pin=\"1\" pad=\"51\"/>\n<connect gate=\".52\" pin=\"1\" pad=\"52\"/>\n<connect gate=\".53\" pin=\"1\" pad=\"53\"/>\n<connect gate=\".54\" pin=\"1\" pad=\"54\"/>\n<connect gate=\".55\" pin=\"1\" pad=\"55\"/>\n<connect gate=\".56\" pin=\"1\" pad=\"56\"/>\n<connect gate=\".57\" pin=\"1\" pad=\"57\"/>\n<connect gate=\".58\" pin=\"1\" pad=\"58\"/>\n<connect gate=\".59\" pin=\"1\" pad=\"59\"/>\n<connect gate=\".6\" pin=\"1\" pad=\"6\"/>\n<connect gate=\".60\" pin=\"1\" pad=\"60\"/>\n<connect gate=\".61\" pin=\"1\" pad=\"61\"/>\n<connect gate=\".62\" pin=\"1\" pad=\"62\"/>\n<connect gate=\".63\" pin=\"1\" pad=\"63\"/>\n<connect gate=\".64\" pin=\"1\" pad=\"64\"/>\n<connect gate=\".65\" pin=\"1\" pad=\"65\"/>\n<connect gate=\".66\" pin=\"1\" pad=\"66\"/>\n<connect gate=\".67\" pin=\"1\" pad=\"67\"/>\n<connect gate=\".68\" pin=\"1\" pad=\"68\"/>\n<connect gate=\".69\" pin=\"1\" pad=\"69\"/>\n<connect gate=\".7\" pin=\"1\" pad=\"7\"/>\n<connect gate=\".70\" pin=\"1\" pad=\"70\"/>\n<connect gate=\".71\" pin=\"1\" pad=\"71\"/>\n<connect gate=\".72\" pin=\"1\" pad=\"72\"/>\n<connect gate=\".73\" pin=\"1\" pad=\"73\"/>\n<connect gate=\".74\" pin=\"1\" pad=\"74\"/>\n<connect gate=\".75\" pin=\"1\" pad=\"75\"/>\n<connect gate=\".76\" pin=\"1\" pad=\"76\"/>\n<connect gate=\".77\" pin=\"1\" pad=\"77\"/>\n<connect gate=\".78\" pin=\"1\" pad=\"78\"/>\n<connect gate=\".79\" pin=\"1\" pad=\"79\"/>\n<connect gate=\".8\" pin=\"1\" pad=\"8\"/>\n<connect gate=\".80\" pin=\"1\" pad=\"80\"/>\n<connect gate=\".81\" pin=\"1\" pad=\"81\"/>\n<connect gate=\".82\" pin=\"1\" pad=\"82\"/>\n<connect gate=\".83\" pin=\"1\" pad=\"83\"/>\n<connect gate=\".84\" pin=\"1\" pad=\"84\"/>\n<connect gate=\".85\" pin=\"1\" pad=\"85\"/>\n<connect gate=\".86\" pin=\"1\" pad=\"86\"/>\n<connect gate=\".87\" pin=\"1\" pad=\"87\"/>\n<connect gate=\".88\" pin=\"1\" pad=\"88\"/>\n<connect gate=\".89\" pin=\"1\" pad=\"89\"/>\n<connect gate=\".9\" pin=\"1\" pad=\"9\"/>\n<connect gate=\".90\" pin=\"1\" pad=\"90\"/>\n<connect gate=\".91\" pin=\"1\" pad=\"91\"/>\n<connect gate=\".92\" pin=\"1\" pad=\"92\"/>\n<connect gate=\".93\" pin=\"1\" pad=\"93\"/>\n<connect gate=\".94\" pin=\"1\" pad=\"94\"/>\n<connect gate=\".95\" pin=\"1\" pad=\"95\"/>\n<connect gate=\".96\" pin=\"1\" pad=\"96\"/>\n<connect gate=\".97\" pin=\"1\" pad=\"97\"/>\n<connect gate=\".98\" pin=\"1\" pad=\"98\"/>\n<connect gate=\".99\" pin=\"1\" pad=\"99\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X70\" prefix=\"JP\">\n<description>&lt;b&gt;PIN HEADER 70 pol.&lt;/b&gt; Grid 2.54mm&lt;p&gt;</description>\n<gates>\n<gate name=\".1\" symbol=\"PINHD_1V\" x=\"0\" y=\"0\" addlevel=\"always\"/>\n<gate name=\".2\" symbol=\"PINHD_1\" x=\"0\" y=\"-2.54\" addlevel=\"always\"/>\n<gate name=\".3\" symbol=\"PINHD_1\" x=\"0\" y=\"-5.08\" addlevel=\"always\"/>\n<gate name=\".4\" symbol=\"PINHD_1\" x=\"0\" y=\"-7.62\" addlevel=\"always\"/>\n<gate name=\".5\" symbol=\"PINHD_1\" x=\"0\" y=\"-10.16\" addlevel=\"always\"/>\n<gate name=\".6\" symbol=\"PINHD_1\" x=\"0\" y=\"-12.7\" addlevel=\"always\"/>\n<gate name=\".7\" symbol=\"PINHD_1\" x=\"0\" y=\"-15.24\" addlevel=\"always\"/>\n<gate name=\".8\" symbol=\"PINHD_1\" x=\"0\" y=\"-17.78\" addlevel=\"always\"/>\n<gate name=\".9\" symbol=\"PINHD_1\" x=\"0\" y=\"-20.32\" addlevel=\"always\"/>\n<gate name=\".10\" symbol=\"PINHD_1\" x=\"0\" y=\"-22.86\" addlevel=\"always\"/>\n<gate name=\".11\" symbol=\"PINHD_1\" x=\"0\" y=\"-25.4\" addlevel=\"always\"/>\n<gate name=\".12\" symbol=\"PINHD_1\" x=\"0\" y=\"-27.94\" addlevel=\"always\"/>\n<gate name=\".13\" symbol=\"PINHD_1\" x=\"0\" y=\"-30.48\" addlevel=\"always\"/>\n<gate name=\".14\" symbol=\"PINHD_1\" x=\"0\" y=\"-33.02\" addlevel=\"always\"/>\n<gate name=\".15\" symbol=\"PINHD_1\" x=\"0\" y=\"-35.56\" addlevel=\"always\"/>\n<gate name=\".16\" symbol=\"PINHD_1\" x=\"0\" y=\"-38.1\" addlevel=\"always\"/>\n<gate name=\".17\" symbol=\"PINHD_1\" x=\"0\" y=\"-40.64\" addlevel=\"always\"/>\n<gate name=\".18\" symbol=\"PINHD_1\" x=\"0\" y=\"-43.18\" addlevel=\"always\"/>\n<gate name=\".19\" symbol=\"PINHD_1\" x=\"0\" y=\"-45.72\" addlevel=\"always\"/>\n<gate name=\".20\" symbol=\"PINHD_1\" x=\"0\" y=\"-48.26\" addlevel=\"always\"/>\n<gate name=\".21\" symbol=\"PINHD_1\" x=\"0\" y=\"-50.8\" addlevel=\"always\"/>\n<gate name=\".22\" symbol=\"PINHD_1\" x=\"0\" y=\"-53.34\" addlevel=\"always\"/>\n<gate name=\".23\" symbol=\"PINHD_1\" x=\"0\" y=\"-55.88\" addlevel=\"always\"/>\n<gate name=\".24\" symbol=\"PINHD_1\" x=\"0\" y=\"-58.42\" addlevel=\"always\"/>\n<gate name=\".25\" symbol=\"PINHD_1\" x=\"0\" y=\"-60.96\" addlevel=\"always\"/>\n<gate name=\".26\" symbol=\"PINHD_1\" x=\"0\" y=\"-63.5\" addlevel=\"always\"/>\n<gate name=\".27\" symbol=\"PINHD_1\" x=\"0\" y=\"-66.04\" addlevel=\"always\"/>\n<gate name=\".28\" symbol=\"PINHD_1\" x=\"0\" y=\"-68.58\" addlevel=\"always\"/>\n<gate name=\".29\" symbol=\"PINHD_1\" x=\"0\" y=\"-71.12\" addlevel=\"always\"/>\n<gate name=\".30\" symbol=\"PINHD_1\" x=\"0\" y=\"-73.66\" addlevel=\"always\"/>\n<gate name=\".31\" symbol=\"PINHD_1\" x=\"0\" y=\"-76.2\" addlevel=\"always\"/>\n<gate name=\".32\" symbol=\"PINHD_1\" x=\"0\" y=\"-78.74\" addlevel=\"always\"/>\n<gate name=\".33\" symbol=\"PINHD_1\" x=\"0\" y=\"-81.28\" addlevel=\"always\"/>\n<gate name=\".34\" symbol=\"PINHD_1\" x=\"0\" y=\"-83.82\" addlevel=\"always\"/>\n<gate name=\".35\" symbol=\"PINHD_1\" x=\"0\" y=\"-86.36\" addlevel=\"always\"/>\n<gate name=\".36\" symbol=\"PINHD_1\" x=\"0\" y=\"-88.9\" addlevel=\"always\"/>\n<gate name=\".37\" symbol=\"PINHD_1\" x=\"0\" y=\"-91.44\" addlevel=\"always\"/>\n<gate name=\".38\" symbol=\"PINHD_1\" x=\"0\" y=\"-93.98\" addlevel=\"always\"/>\n<gate name=\".39\" symbol=\"PINHD_1\" x=\"0\" y=\"-96.52\" addlevel=\"always\"/>\n<gate name=\".40\" symbol=\"PINHD_1\" x=\"0\" y=\"-99.06\" addlevel=\"always\"/>\n<gate name=\".41\" symbol=\"PINHD_1\" x=\"0\" y=\"-101.6\" addlevel=\"always\"/>\n<gate name=\".42\" symbol=\"PINHD_1\" x=\"0\" y=\"-104.14\" addlevel=\"always\"/>\n<gate name=\".43\" symbol=\"PINHD_1\" x=\"0\" y=\"-106.68\" addlevel=\"always\"/>\n<gate name=\".44\" symbol=\"PINHD_1\" x=\"0\" y=\"-109.22\" addlevel=\"always\"/>\n<gate name=\".45\" symbol=\"PINHD_1\" x=\"0\" y=\"-111.76\" addlevel=\"always\"/>\n<gate name=\".46\" symbol=\"PINHD_1\" x=\"0\" y=\"-114.3\" addlevel=\"always\"/>\n<gate name=\".47\" symbol=\"PINHD_1\" x=\"0\" y=\"-116.84\" addlevel=\"always\"/>\n<gate name=\".48\" symbol=\"PINHD_1\" x=\"0\" y=\"-119.38\" addlevel=\"always\"/>\n<gate name=\".49\" symbol=\"PINHD_1\" x=\"0\" y=\"-121.92\" addlevel=\"always\"/>\n<gate name=\".50\" symbol=\"PINHD_1\" x=\"0\" y=\"-124.46\" addlevel=\"always\"/>\n<gate name=\".51\" symbol=\"PINHD_1\" x=\"0\" y=\"-127\" addlevel=\"always\"/>\n<gate name=\".52\" symbol=\"PINHD_1\" x=\"0\" y=\"-129.54\" addlevel=\"always\"/>\n<gate name=\".53\" symbol=\"PINHD_1\" x=\"0\" y=\"-132.08\" addlevel=\"always\"/>\n<gate name=\".54\" symbol=\"PINHD_1\" x=\"0\" y=\"-134.62\" addlevel=\"always\"/>\n<gate name=\".55\" symbol=\"PINHD_1\" x=\"0\" y=\"-137.16\" addlevel=\"always\"/>\n<gate name=\".56\" symbol=\"PINHD_1\" x=\"0\" y=\"-139.7\" addlevel=\"always\"/>\n<gate name=\".57\" symbol=\"PINHD_1\" x=\"0\" y=\"-142.24\" addlevel=\"always\"/>\n<gate name=\".58\" symbol=\"PINHD_1\" x=\"0\" y=\"-144.78\" addlevel=\"always\"/>\n<gate name=\".59\" symbol=\"PINHD_1\" x=\"0\" y=\"-147.32\" addlevel=\"always\"/>\n<gate name=\".60\" symbol=\"PINHD_1\" x=\"0\" y=\"-149.86\" addlevel=\"always\"/>\n<gate name=\".61\" symbol=\"PINHD_1\" x=\"0\" y=\"-152.4\" addlevel=\"always\"/>\n<gate name=\".62\" symbol=\"PINHD_1\" x=\"0\" y=\"-154.94\" addlevel=\"always\"/>\n<gate name=\".63\" symbol=\"PINHD_1\" x=\"0\" y=\"-157.48\" addlevel=\"always\"/>\n<gate name=\".64\" symbol=\"PINHD_1\" x=\"0\" y=\"-160.02\" addlevel=\"always\"/>\n<gate name=\".65\" symbol=\"PINHD_1\" x=\"0\" y=\"-162.56\" addlevel=\"always\"/>\n<gate name=\".66\" symbol=\"PINHD_1\" x=\"0\" y=\"-165.1\" addlevel=\"always\"/>\n<gate name=\".67\" symbol=\"PINHD_1\" x=\"0\" y=\"-167.64\" addlevel=\"always\"/>\n<gate name=\".68\" symbol=\"PINHD_1\" x=\"0\" y=\"-170.18\" addlevel=\"always\"/>\n<gate name=\".69\" symbol=\"PINHD_1\" x=\"0\" y=\"-172.72\" addlevel=\"always\"/>\n<gate name=\".70\" symbol=\"PINHD_1\" x=\"0\" y=\"-175.26\" addlevel=\"always\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X70\">\n<connects>\n<connect gate=\".1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\".10\" pin=\"1\" pad=\"10\"/>\n<connect gate=\".11\" pin=\"1\" pad=\"11\"/>\n<connect gate=\".12\" pin=\"1\" pad=\"12\"/>\n<connect gate=\".13\" pin=\"1\" pad=\"13\"/>\n<connect gate=\".14\" pin=\"1\" pad=\"14\"/>\n<connect gate=\".15\" pin=\"1\" pad=\"15\"/>\n<connect gate=\".16\" pin=\"1\" pad=\"16\"/>\n<connect gate=\".17\" pin=\"1\" pad=\"17\"/>\n<connect gate=\".18\" pin=\"1\" pad=\"18\"/>\n<connect gate=\".19\" pin=\"1\" pad=\"19\"/>\n<connect gate=\".2\" pin=\"1\" pad=\"2\"/>\n<connect gate=\".20\" pin=\"1\" pad=\"20\"/>\n<connect gate=\".21\" pin=\"1\" pad=\"21\"/>\n<connect gate=\".22\" pin=\"1\" pad=\"22\"/>\n<connect gate=\".23\" pin=\"1\" pad=\"23\"/>\n<connect gate=\".24\" pin=\"1\" pad=\"24\"/>\n<connect gate=\".25\" pin=\"1\" pad=\"25\"/>\n<connect gate=\".26\" pin=\"1\" pad=\"26\"/>\n<connect gate=\".27\" pin=\"1\" pad=\"27\"/>\n<connect gate=\".28\" pin=\"1\" pad=\"28\"/>\n<connect gate=\".29\" pin=\"1\" pad=\"29\"/>\n<connect gate=\".3\" pin=\"1\" pad=\"3\"/>\n<connect gate=\".30\" pin=\"1\" pad=\"30\"/>\n<connect gate=\".31\" pin=\"1\" pad=\"31\"/>\n<connect gate=\".32\" pin=\"1\" pad=\"32\"/>\n<connect gate=\".33\" pin=\"1\" pad=\"33\"/>\n<connect gate=\".34\" pin=\"1\" pad=\"34\"/>\n<connect gate=\".35\" pin=\"1\" pad=\"35\"/>\n<connect gate=\".36\" pin=\"1\" pad=\"36\"/>\n<connect gate=\".37\" pin=\"1\" pad=\"37\"/>\n<connect gate=\".38\" pin=\"1\" pad=\"38\"/>\n<connect gate=\".39\" pin=\"1\" pad=\"39\"/>\n<connect gate=\".4\" pin=\"1\" pad=\"4\"/>\n<connect gate=\".40\" pin=\"1\" pad=\"40\"/>\n<connect gate=\".41\" pin=\"1\" pad=\"41\"/>\n<connect gate=\".42\" pin=\"1\" pad=\"42\"/>\n<connect gate=\".43\" pin=\"1\" pad=\"43\"/>\n<connect gate=\".44\" pin=\"1\" pad=\"44\"/>\n<connect gate=\".45\" pin=\"1\" pad=\"45\"/>\n<connect gate=\".46\" pin=\"1\" pad=\"46\"/>\n<connect gate=\".47\" pin=\"1\" pad=\"47\"/>\n<connect gate=\".48\" pin=\"1\" pad=\"48\"/>\n<connect gate=\".49\" pin=\"1\" pad=\"49\"/>\n<connect gate=\".5\" pin=\"1\" pad=\"5\"/>\n<connect gate=\".50\" pin=\"1\" pad=\"50\"/>\n<connect gate=\".51\" pin=\"1\" pad=\"51\"/>\n<connect gate=\".52\" pin=\"1\" pad=\"52\"/>\n<connect gate=\".53\" pin=\"1\" pad=\"53\"/>\n<connect gate=\".54\" pin=\"1\" pad=\"54\"/>\n<connect gate=\".55\" pin=\"1\" pad=\"55\"/>\n<connect gate=\".56\" pin=\"1\" pad=\"56\"/>\n<connect gate=\".57\" pin=\"1\" pad=\"57\"/>\n<connect gate=\".58\" pin=\"1\" pad=\"58\"/>\n<connect gate=\".59\" pin=\"1\" pad=\"59\"/>\n<connect gate=\".6\" pin=\"1\" pad=\"6\"/>\n<connect gate=\".60\" pin=\"1\" pad=\"60\"/>\n<connect gate=\".61\" pin=\"1\" pad=\"61\"/>\n<connect gate=\".62\" pin=\"1\" pad=\"62\"/>\n<connect gate=\".63\" pin=\"1\" pad=\"63\"/>\n<connect gate=\".64\" pin=\"1\" pad=\"64\"/>\n<connect gate=\".65\" pin=\"1\" pad=\"65\"/>\n<connect gate=\".66\" pin=\"1\" pad=\"66\"/>\n<connect gate=\".67\" pin=\"1\" pad=\"67\"/>\n<connect gate=\".68\" pin=\"1\" pad=\"68\"/>\n<connect gate=\".69\" pin=\"1\" pad=\"69\"/>\n<connect gate=\".7\" pin=\"1\" pad=\"7\"/>\n<connect gate=\".70\" pin=\"1\" pad=\"70\"/>\n<connect gate=\".8\" pin=\"1\" pad=\"8\"/>\n<connect gate=\".9\" pin=\"1\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X40\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"-1\" symbol=\"PINHD40\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X40\">\n<connects>\n<connect gate=\"-1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"-1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"-1\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"-1\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"-1\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"-1\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"-1\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"-1\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"-1\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"-1\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"-1\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"-1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"-1\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"-1\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"-1\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"-1\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"-1\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"-1\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"-1\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"-1\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"-1\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"-1\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"-1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"-1\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"-1\" pin=\"31\" pad=\"31\"/>\n<connect gate=\"-1\" pin=\"32\" pad=\"32\"/>\n<connect gate=\"-1\" pin=\"33\" pad=\"33\"/>\n<connect gate=\"-1\" pin=\"34\" pad=\"34\"/>\n<connect gate=\"-1\" pin=\"35\" pad=\"35\"/>\n<connect gate=\"-1\" pin=\"36\" pad=\"36\"/>\n<connect gate=\"-1\" pin=\"37\" pad=\"37\"/>\n<connect gate=\"-1\" pin=\"38\" pad=\"38\"/>\n<connect gate=\"-1\" pin=\"39\" pad=\"39\"/>\n<connect gate=\"-1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"-1\" pin=\"40\" pad=\"40\"/>\n<connect gate=\"-1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"-1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"-1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"-1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"-1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X30\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD30\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X30\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"26\" pad=\"26\"/>\n<connect gate=\"A\" pin=\"27\" pad=\"27\"/>\n<connect gate=\"A\" pin=\"28\" pad=\"28\"/>\n<connect gate=\"A\" pin=\"29\" pad=\"29\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"30\" pad=\"30\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X25\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD25\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X25\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_2802S-02G2\" package=\"2802S-02G2\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"25\" pad=\"25\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X24\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD24\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X24\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X24/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"23\" pad=\"23\"/>\n<connect gate=\"A\" pin=\"24\" pad=\"24\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PINHD-1X22\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINHD22\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"1X22\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"1X22/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"17\" pad=\"17\"/>\n<connect gate=\"A\" pin=\"18\" pad=\"18\"/>\n<connect gate=\"A\" pin=\"19\" pad=\"19\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"20\" pad=\"20\"/>\n<connect gate=\"A\" pin=\"21\" pad=\"21\"/>\n<connect gate=\"A\" pin=\"22\" pad=\"22\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</drawing>\n</eagle>\n"
  },
  {
    "path": "eagle/lbr/switch-ck.lbr",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"7.2.0\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"0.05\" unitdist=\"mm\" unit=\"mm\" style=\"lines\" multiple=\"1\" display=\"yes\" altdistance=\"5\" altunitdist=\"mil\" altunit=\"mil\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"2\" name=\"Route2\" color=\"1\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"no\" active=\"yes\"/>\n<layer number=\"7\" name=\"Route7\" color=\"4\" fill=\"8\" visible=\"no\" active=\"yes\"/>\n<layer number=\"8\" name=\"Route8\" color=\"1\" fill=\"2\" visible=\"no\" active=\"yes\"/>\n<layer number=\"9\" name=\"Route9\" color=\"4\" fill=\"2\" visible=\"no\" active=\"yes\"/>\n<layer number=\"10\" name=\"Route10\" color=\"1\" fill=\"7\" visible=\"no\" active=\"yes\"/>\n<layer number=\"11\" name=\"Route11\" color=\"4\" fill=\"7\" visible=\"no\" active=\"yes\"/>\n<layer number=\"12\" name=\"Route12\" color=\"1\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"13\" name=\"Route13\" color=\"4\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"14\" name=\"Route14\" color=\"1\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"15\" name=\"Route15\" color=\"4\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"39\" name=\"tKeepout\" color=\"4\" fill=\"11\" visible=\"no\" active=\"yes\"/>\n<layer number=\"40\" name=\"bKeepout\" color=\"1\" fill=\"11\" visible=\"no\" active=\"yes\"/>\n<layer number=\"41\" name=\"tRestrict\" color=\"4\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"42\" name=\"bRestrict\" color=\"1\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"43\" name=\"vRestrict\" color=\"2\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"44\" name=\"Drills\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"45\" name=\"Holes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"46\" name=\"Milling\" color=\"3\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"47\" name=\"Measures\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"48\" name=\"Document\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"49\" name=\"Reference\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"50\" name=\"dxf\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"51\" name=\"tDocu\" color=\"3\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"52\" name=\"bDocu\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"53\" name=\"tGND_GNDA\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"54\" name=\"bGND_GNDA\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"56\" name=\"wert\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"91\" name=\"Nets\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"92\" name=\"Busses\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"93\" name=\"Pins\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"94\" name=\"Symbols\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"95\" name=\"Names\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"96\" name=\"Values\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"97\" name=\"Info\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"98\" name=\"Guide\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n</layers>\n<library>\n<description>&lt;b&gt;C&amp;K Swtiches&lt;/b&gt; - v1.00&lt;p&gt;\nTHIS LIBRARY IS PROVIDED AS IS AND WITHOUT WARRANTY OF ANY KIND, EXPRESSED OR IMPLIED.\nUSE AT YOUR OWN RISK!\n&lt;p&gt;Copyright (C) 2011, Bob Starr&lt;br&gt;\nhttp://www.bobstarr.net</description>\n<packages>\n<package name=\"2M1-SP1-T2-B4-M6\">\n<description>&lt;b&gt;TOGGLE SWITCH&lt;/b&gt;</description>\n<wire x1=\"4.445\" y1=\"-5.461\" x2=\"-3.81\" y2=\"-5.461\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"5.715\" x2=\"4.445\" y2=\"5.715\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-10.414\" y1=\"-2.286\" x2=\"-10.414\" y2=\"-1.27\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-10.414\" y1=\"1.27\" x2=\"-15.367\" y2=\"-0.889\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-10.414\" y1=\"1.27\" x2=\"-10.414\" y2=\"2.286\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-10.414\" y1=\"-1.27\" x2=\"-14.732\" y2=\"-3.1115\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-10.414\" y1=\"-1.27\" x2=\"-10.414\" y2=\"1.27\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-14.732\" y1=\"-3.1115\" x2=\"-15.367\" y2=\"-0.889\" width=\"0.254\" layer=\"51\" curve=\"-180\"/>\n<wire x1=\"-10.16\" y1=\"-2.54\" x2=\"-10.414\" y2=\"-2.286\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-10.16\" y1=\"-2.54\" x2=\"-3.81\" y2=\"-2.54\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-10.414\" y1=\"2.286\" x2=\"-10.16\" y2=\"2.54\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-10.16\" y1=\"2.54\" x2=\"-3.81\" y2=\"2.54\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"4.445\" y1=\"5.715\" x2=\"4.445\" y2=\"-5.461\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-10.16\" y1=\"2.54\" x2=\"-10.16\" y2=\"-2.54\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-3.81\" y1=\"-5.461\" x2=\"-3.81\" y2=\"-4.6355\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"-0.4445\" x2=\"-3.81\" y2=\"-4.572\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-3.81\" y1=\"-0.4445\" x2=\"-3.81\" y2=\"0.4445\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"4.6355\" x2=\"-3.81\" y2=\"0.4445\" width=\"0.254\" layer=\"51\"/>\n<wire x1=\"-3.81\" y1=\"4.6355\" x2=\"-3.81\" y2=\"5.715\" width=\"0.254\" layer=\"21\"/>\n<pad name=\"B1\" x=\"-3.81\" y=\"-2.54\" drill=\"1.4224\" diameter=\"3.175\"/>\n<pad name=\"B2\" x=\"-3.81\" y=\"2.54\" drill=\"1.4224\" diameter=\"3.175\"/>\n<pad name=\"1\" x=\"8.89\" y=\"-4.699\" drill=\"1.778\" diameter=\"3.429\"/>\n<pad name=\"2\" x=\"8.89\" y=\"0\" drill=\"1.778\" diameter=\"3.429\"/>\n<pad name=\"3\" x=\"8.89\" y=\"4.699\" drill=\"1.778\" diameter=\"3.429\"/>\n<text x=\"-3.81\" y=\"6.35\" size=\"1.016\" layer=\"25\" ratio=\"18\">&gt;NAME</text>\n<text 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name=\"1\" x=\"7.62\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"C\" x=\"-7.62\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" swaplevel=\"1\"/>\n</symbol>\n<symbol name=\"TS\">\n<wire x1=\"-1.27\" y1=\"-2.54\" x2=\"-1.27\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<circle x=\"0\" y=\"2.0637\" radius=\"0.449\" width=\"0.254\" layer=\"94\"/>\n<circle x=\"0\" y=\"-2.0638\" radius=\"0.449\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"-1.905\" size=\"1.778\" layer=\"95\" rot=\"R90\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"3.175\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"P\" x=\"0\" y=\"-5.08\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R90\"/>\n<pin name=\"S\" x=\"0\" y=\"5.08\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R270\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"2M1-SP1-T2-B4-M6\" prefix=\"S\">\n<description>TOGGLE SWITCH</description>\n<gates>\n<gate name=\"S\" symbol=\"SPDT\" x=\"-2.54\" y=\"-2.54\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2M1-SP1-T2-B4-M6\">\n<connects>\n<connect gate=\"S\" pin=\"O\" pad=\"3\"/>\n<connect gate=\"S\" pin=\"P\" pad=\"2\"/>\n<connect gate=\"S\" pin=\"S\" pad=\"1\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"LABEL\" value=\"\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"ELUM-XX-TH\" prefix=\"S\">\n<description>PUSH BUTTON SWITCH</description>\n<gates>\n<gate name=\"-LED\" symbol=\"LED\" x=\"15.24\" y=\"0\" addlevel=\"always\"/>\n<gate name=\"S\" symbol=\"PBSW_SPDT\" x=\"0\" y=\"0\" addlevel=\"always\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ELUM-XX-TH\">\n<connects>\n<connect gate=\"-LED\" pin=\"A\" pad=\"5\"/>\n<connect gate=\"-LED\" pin=\"C\" pad=\"1\"/>\n<connect gate=\"S\" pin=\"C\" pad=\"2\"/>\n<connect gate=\"S\" pin=\"NC\" pad=\"4\"/>\n<connect gate=\"S\" pin=\"NO\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"ELUM-XX-SA\" prefix=\"S\">\n<description>PUSH BUTTON SWITCH</description>\n<gates>\n<gate name=\"-LED\" symbol=\"LED\" x=\"15.24\" y=\"0\" addlevel=\"always\"/>\n<gate name=\"S\" symbol=\"PBSW_SPDT\" x=\"0\" y=\"0\" addlevel=\"always\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ELUM-XX-SA\">\n<connects>\n<connect gate=\"-LED\" pin=\"A\" pad=\"5\"/>\n<connect gate=\"-LED\" pin=\"C\" pad=\"1\"/>\n<connect gate=\"S\" pin=\"C\" pad=\"3\"/>\n<connect gate=\"S\" pin=\"NC\" pad=\"4\"/>\n<connect gate=\"S\" pin=\"NO\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"L101-XX-X-MS\" prefix=\"S\">\n<description>SLIDE SWITCH</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SLIDE-SPST\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"L101-XX-X-MS\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"LABEL\" value=\"\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"JS202011SCQN\" prefix=\"S\">\n<description>DPDT SLIDE SWITCH</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SLIDE-DPDT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"JS202011SCQN\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"CRD16RM0CB\" prefix=\"S\" uservalue=\"yes\">\n<description>&lt;b&gt;HEX CODE SWITCH&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"HEX\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"CRD16???C\">\n<connects>\n<connect gate=\"1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"1\" pin=\"C\" pad=\"C C1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PTS645S???SMTR\" prefix=\"S\">\n<description>TACT SWITCH</description>\n<gates>\n<gate name=\"G$1\" symbol=\"TS\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PTS645-SMD\">\n<connects>\n<connect gate=\"G$1\" pin=\"P\" pad=\"1 2\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"3 4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"LABEL\" value=\"\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"PTS540\" prefix=\"S\">\n<description>TACT SWITCH&lt;p&gt;\nUltra Low Profile SMT Top Actuated</description>\n<gates>\n<gate name=\"G$1\" symbol=\"TS\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"PTS540\">\n<connects>\n<connect gate=\"G$1\" pin=\"P\" pad=\"1 2\"/>\n<connect gate=\"G$1\" pin=\"S\" pad=\"3 4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</drawing>\n</eagle>\n"
  },
  {
    "path": "eagle/lbr/usb-serial.lbr",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"9.2.0\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting keepoldvectorfont=\"yes\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"50\" unitdist=\"mil\" unit=\"mil\" style=\"lines\" multiple=\"1\" display=\"yes\" altdistance=\"5\" altunitdist=\"mil\" altunit=\"mil\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"39\" name=\"tKeepout\" color=\"4\" fill=\"11\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"40\" name=\"bKeepout\" color=\"1\" fill=\"11\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"41\" name=\"tRestrict\" color=\"4\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"42\" name=\"bRestrict\" color=\"1\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"43\" name=\"vRestrict\" color=\"2\" fill=\"10\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"44\" name=\"Drills\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"45\" name=\"Holes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"46\" name=\"Milling\" color=\"3\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"47\" name=\"Measures\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"48\" name=\"Document\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"49\" name=\"Reference\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"51\" name=\"tDocu\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"52\" name=\"bDocu\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"91\" name=\"Nets\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"92\" name=\"Busses\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"93\" name=\"Pins\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"94\" name=\"Symbols\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"95\" name=\"Names\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"96\" name=\"Values\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"97\" name=\"Info\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"98\" name=\"Guide\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n</layers>\n<library>\n<packages>\n<package name=\"SOIC16\">\n<description>&lt;b&gt;SMALL OUTLINE INTEGRATED CIRCUIT&lt;/b&gt;&lt;p&gt;\n16-Pin (150-Mil) SOIC&lt;br&gt;\nSource: http://www.cypress.com .. 38-12025_0P_V.pdf</description>\n<wire x1=\"4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<circle x=\"-4.05\" y=\"-0.995\" radius=\"0.3256\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"2\" x=\"-3.175\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"13\" x=\"-0.635\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"1\" x=\"-4.445\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"3\" x=\"-1.905\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"4\" x=\"-0.635\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"14\" x=\"-1.905\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"12\" x=\"0.635\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"11\" x=\"1.905\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"6\" x=\"1.905\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"9\" x=\"4.445\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"5\" x=\"0.635\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"7\" x=\"3.175\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"10\" x=\"3.175\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"8\" x=\"4.445\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"15\" x=\"-3.175\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"16\" x=\"-4.445\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<text x=\"-5.207\" y=\"-2.54\" size=\"1.016\" layer=\"21\" font=\"vector\" rot=\"R90\">CH340G</text>\n<rectangle x1=\"-4.6901\" y1=\"-2.921\" x2=\"-4.1999\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-3.4201\" y1=\"-2.921\" x2=\"-2.9299\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-2.1501\" y1=\"-2.921\" x2=\"-1.6599\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-0.8801\" y1=\"-2.921\" x2=\"-0.3899\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"0.3899\" y1=\"-2.921\" x2=\"0.8801\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"1.6599\" y1=\"-2.921\" x2=\"2.1501\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"2.9299\" y1=\"-2.921\" x2=\"3.4201\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"4.1999\" y1=\"-2.921\" x2=\"4.6901\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"4.1999\" y1=\"1.8951\" x2=\"4.6901\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"2.9299\" y1=\"1.8951\" x2=\"3.4201\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"1.6599\" y1=\"1.8951\" x2=\"2.1501\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"0.3899\" y1=\"1.8951\" x2=\"0.8801\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-0.8801\" y1=\"1.8951\" x2=\"-0.3899\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-2.1501\" y1=\"1.8951\" x2=\"-1.6599\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-3.4201\" y1=\"1.8951\" x2=\"-2.9299\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-4.6901\" y1=\"1.8951\" x2=\"-4.1999\" y2=\"2.921\" layer=\"51\"/>\n</package>\n<package name=\"SOIC16-GOOD\">\n</package>\n</packages>\n<symbols>\n<symbol name=\"CH340G\">\n<pin name=\"GND\" x=\"-35.56\" y=\"17.78\" length=\"middle\"/>\n<pin name=\"TX\" x=\"-35.56\" y=\"15.24\" length=\"middle\"/>\n<pin name=\"RX\" x=\"-35.56\" y=\"12.7\" length=\"middle\"/>\n<pin name=\"V3\" x=\"-35.56\" y=\"10.16\" length=\"middle\"/>\n<pin name=\"D+\" x=\"-35.56\" y=\"7.62\" length=\"middle\"/>\n<pin name=\"D-\" x=\"-35.56\" y=\"5.08\" length=\"middle\"/>\n<pin name=\"XI\" x=\"-35.56\" y=\"2.54\" length=\"middle\"/>\n<pin name=\"XO\" x=\"-35.56\" y=\"0\" length=\"middle\"/>\n<pin name=\"CTS\" x=\"-10.16\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DSR\" x=\"-10.16\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"RI\" x=\"-10.16\" y=\"5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DCD\" x=\"-10.16\" y=\"7.62\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DTR\" x=\"-10.16\" y=\"10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"RTS\" x=\"-10.16\" y=\"12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"RS232\" x=\"-10.16\" y=\"15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCC\" x=\"-10.16\" y=\"17.78\" length=\"middle\" rot=\"R180\"/>\n<text x=\"-27.94\" y=\"20.32\" size=\"1.778\" layer=\"94\">CH340G</text>\n<wire x1=\"-15.24\" y1=\"20.32\" x2=\"-15.24\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-15.24\" y1=\"20.32\" x2=\"-30.48\" y2=\"20.32\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-30.48\" y1=\"20.32\" x2=\"-30.48\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-30.48\" y1=\"-2.54\" x2=\"-15.24\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"CH340G\">\n<gates>\n<gate name=\"G$1\" symbol=\"CH340G\" x=\"22.86\" y=\"-5.08\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"SOIC16\">\n<connects>\n<connect gate=\"G$1\" pin=\"CTS\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"D+\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"D-\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"DCD\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"DSR\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"DTR\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"RI\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"RS232\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"RTS\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"RX\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"TX\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"V3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"VCC\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"XI\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"XO\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</drawing>\n</eagle>\n"
  },
  {
    "path": "eagle/max10adc_v8.brd",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"8.6.2\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting keepoldvectorfont=\"yes\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"1\" unitdist=\"mm\" unit=\"mm\" style=\"dots\" multiple=\"1\" display=\"no\" altdistance=\"0.1\" altunitdist=\"mm\" altunit=\"mm\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"2\" name=\"Route2\" color=\"58\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"7\" 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x=\"30.11\" y=\"45.51\" size=\"0.8128\" layer=\"21\" font=\"vector\">GND</text>\n<text x=\"33.71\" y=\"44.31\" size=\"0.8128\" layer=\"21\" font=\"vector\">121\nExtTrig</text>\n<text x=\"38.99\" y=\"45.21\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">AIN1</text>\n<text x=\"40.3\" y=\"14.8\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">10nF</text>\n<text x=\"21.1\" y=\"12\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">AIN6</text>\n<text x=\"39.3\" y=\"10.8\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">AIN14</text>\n<text x=\"18.7\" y=\"4.3\" size=\"0.8128\" layer=\"21\" font=\"vector\">B0 E24</text>\n<text x=\"33.7\" y=\"4.3\" size=\"0.8128\" layer=\"21\" font=\"vector\">E24 B7</text>\n<text x=\"21.19\" y=\"52.41\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">101</text>\n<text x=\"38.99\" y=\"52.21\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">GND</text>\n<text x=\"36.49\" y=\"52.21\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">3.3V</text>\n<text x=\"23.79\" y=\"52.41\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">100</text>\n<text x=\"26.29\" y=\"53.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">91</text>\n<text x=\"28.89\" y=\"53.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">90</text>\n<text x=\"31.39\" y=\"53.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">89</text>\n<text x=\"33.89\" y=\"53.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">88</text>\n<text x=\"16.81\" y=\"24.91\" size=\"0.8128\" layer=\"21\" font=\"vector\">GND</text>\n<text x=\"16.81\" y=\"27.41\" size=\"0.8128\" layer=\"21\" font=\"vector\">5V</text>\n<text x=\"-8.29\" y=\"45.51\" size=\"0.8128\" layer=\"21\" font=\"vector\">5V</text>\n<text x=\"-8.39\" y=\"47.91\" size=\"0.8128\" layer=\"21\" font=\"vector\">GND</text>\n<text x=\"16.81\" y=\"30.01\" size=\"0.8128\" layer=\"21\" font=\"vector\">110</text>\n<text x=\"16.81\" y=\"32.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">111</text>\n<text x=\"16.81\" y=\"35.01\" size=\"0.8128\" layer=\"21\" font=\"vector\">113</text>\n<text x=\"16.81\" y=\"37.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">114</text>\n<text x=\"16.81\" y=\"40.11\" size=\"0.8128\" layer=\"21\" font=\"vector\">118</text>\n<text x=\"16.81\" y=\"42.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">119</text>\n<text x=\"16.81\" y=\"45.21\" size=\"0.8128\" layer=\"21\" font=\"vector\">29</text>\n<text x=\"17.79\" y=\"47.21\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">122</text>\n<text x=\"-8.49\" y=\"42.91\" size=\"0.8128\" layer=\"21\" font=\"vector\">140</text>\n<text x=\"-8.49\" y=\"40.31\" size=\"0.8128\" layer=\"21\" font=\"vector\">135</text>\n<text x=\"-8.49\" y=\"37.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">134</text>\n<text x=\"-8.49\" y=\"35.21\" size=\"0.8128\" layer=\"21\" font=\"vector\">131</text>\n<text x=\"-8.49\" y=\"32.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">132</text>\n<text x=\"-7.81\" y=\"29.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">130</text>\n<text x=\"-7.81\" y=\"27.01\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">127</text>\n<text x=\"-7.81\" y=\"24.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">124</text>\n</plain>\n<libraries>\n<library name=\"rcl\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  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2101P&lt;BR&gt;\n      2101W&lt;BR&gt;\n      2101Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2102L&lt;BR&gt;\n      2102S&lt;BR&gt;\n      2102Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVMCOG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      43P&lt;BR&gt;\n      43W&lt;BR&gt;\n      43Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      40L&lt;BR&gt;\n      40P&lt;BR&gt;\n      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&lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      3292P&lt;BR&gt;\n      3292W&lt;BR&gt;\n      3292X&lt;BR&gt;\n      3296P&lt;BR&gt;\n      3296W&lt;BR&gt;\n      3296X&lt;BR&gt;\n      3296Y&lt;BR&gt;\n      3296Z&lt;BR&gt;\n      3299P&lt;BR&gt;\n      3299W&lt;BR&gt;\n      3299X&lt;BR&gt;\n      3299Y&lt;BR&gt;\n      3299Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&amp;nbsp;ALT&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      64X&amp;nbsp;ALT&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66P&lt;BR&gt;\n      66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      50-2-X&lt;BR&gt;\n      50-4-X&lt;BR&gt;\n      50-3-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n     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&lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      25P&lt;BR&gt;\n      25S&lt;BR&gt;\n      25RX&lt;BR&gt;\n      82P&lt;BR&gt;\n      82M&lt;BR&gt;\n      82PA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      91E&lt;BR&gt;\n      91X&lt;BR&gt;\n    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-&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 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G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;</description>\n<packages>\n<package name=\"C0805K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0805 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 2012</description>\n<wire x1=\"-0.925\" y1=\"0.6\" x2=\"0.925\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.925\" y1=\"-0.6\" x2=\"-0.925\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1\" y=\"0.875\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-1.9\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1\" y1=\"-0.65\" x2=\"-0.5\" y2=\"0.65\" layer=\"51\"/>\n<rectangle x1=\"0.5\" y1=\"-0.65\" x2=\"1\" y2=\"0.65\" layer=\"51\"/>\n</package>\n</packages>\n</library>\n<library name=\"led\">\n<description>&lt;b&gt;LEDs&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;br&gt;\nExtended by Federico Battaglin &lt;author&gt;&amp;lt;federico.rd@fdpinternational.com&amp;gt;&lt;/author&gt; with DUOLED</description>\n<packages>\n<package name=\"SML0805\">\n<description>&lt;b&gt;SML0805-2CW-TR (0805 PROFILE)&lt;/b&gt; COOL WHITE&lt;p&gt;\nSource: http://www.ledtronics.com/ds/smd-0603/Dstr0093.pdf</description>\n<wire x1=\"-0.95\" y1=\"-0.55\" x2=\"0.95\" y2=\"-0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.95\" y1=\"-0.55\" x2=\"0.95\" y2=\"0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.95\" y1=\"0.55\" x2=\"-0.95\" y2=\"0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.95\" y1=\"0.55\" x2=\"-0.95\" y2=\"-0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.175\" y1=\"-0.025\" x2=\"0\" y2=\"0.15\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"0.15\" x2=\"0.15\" y2=\"0\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"0.15\" y1=\"0\" x2=\"-0.025\" y2=\"-0.175\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"-0.025\" y1=\"-0.175\" x2=\"-0.175\" y2=\"-0.025\" width=\"0.0634\" layer=\"21\"/>\n<circle x=\"-0.275\" y=\"0.4\" radius=\"0.125\" width=\"0\" layer=\"21\"/>\n<smd name=\"C\" x=\"-1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"A\" x=\"1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<text x=\"-1.5\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.5\" y=\"-2\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n</library>\n<library name=\"resistor\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,203,138,231\" href=\"../directory.asp\" title=\"\"&gt;\n&lt;area shape=\"default\" nohref&gt;\n&lt;/map&gt;\n\n&lt;html&gt;\n\n&lt;title&gt;&lt;/title&gt;\n\n &lt;LINK REL=\"StyleSheet\" TYPE=\"text/css\" HREF=\"style-sheet.css\"&gt;\n\n&lt;body bgcolor=\"#ffffff\" text=\"#000000\" marginwidth=\"0\" marginheight=\"0\" topmargin=\"0\" leftmargin=\"0\"&gt;\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0 height=\"55%\"&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;/td&gt;\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    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-&lt;BR&gt;\n      2102L&lt;BR&gt;\n      2102S&lt;BR&gt;\n      2102Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVMCOG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      43P&lt;BR&gt;\n      43W&lt;BR&gt;\n      43Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      40L&lt;BR&gt;\n      40P&lt;BR&gt;\n      40Y&lt;BR&gt;\n      70Y-T602&lt;BR&gt;\n      70L&lt;BR&gt;\n      70P&lt;BR&gt;\n      70Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      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ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n    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25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n 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&lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      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BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;\n&lt;/BODY&gt;&lt;/HTML&gt;</description>\n<packages>\n<package name=\"R0805\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;</description>\n<wire x1=\"-0.41\" y1=\"0.635\" x2=\"0.41\" y2=\"0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-0.41\" y1=\"-0.635\" x2=\"0.41\" y2=\"-0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.973\" y1=\"0.983\" x2=\"1.973\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.973\" y1=\"0.983\" x2=\"1.973\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.973\" y1=\"-0.983\" x2=\"-1.973\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.973\" y1=\"-0.983\" x2=\"-1.973\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"0\" dx=\"1.3\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.95\" y=\"0\" dx=\"1.3\" dy=\"1.5\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"0.4064\" y1=\"-0.6985\" x2=\"1.0564\" y2=\"0.7015\" layer=\"51\"/>\n<rectangle x1=\"-1.0668\" y1=\"-0.6985\" x2=\"-0.4168\" y2=\"0.7015\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.5001\" x2=\"0.1999\" y2=\"0.5001\" layer=\"35\"/>\n</package>\n</packages>\n</library>\n<library name=\"10M08SAE144\">\n<packages>\n<package name=\"EQFP144\">\n<description>&lt;b&gt;EQFP144&lt;/b&gt;&lt;p&gt;\nSource: http://www.altera.com/literature/ds/144-EQFP.pdf</description>\n<wire x1=\"-9.8984\" y1=\"9.4\" x2=\"-9.4\" y2=\"9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-9.4\" y1=\"-9.8984\" x2=\"9.4\" y2=\"-9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"9.8984\" y1=\"-9.4\" x2=\"9.8984\" y2=\"9.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"9.4\" y1=\"9.8984\" x2=\"-9.4\" y2=\"9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-9.8984\" y1=\"9.4\" x2=\"-9.8984\" y2=\"-9.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-9.4\" y1=\"-9.8984\" x2=\"-9.8984\" y2=\"-9.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"9.8984\" y1=\"-9.4\" x2=\"9.4\" y2=\"-9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"9.4\" y1=\"9.8984\" x2=\"9.8984\" y2=\"9.4\" width=\"0.2032\" layer=\"21\"/>\n<circle x=\"-8\" y=\"8\" radius=\"0.5\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-10.75\" y=\"8.75\" dx=\"1\" dy=\"0.3\" layer=\"1\" stop=\"no\"/>\n<smd name=\"2\" x=\"-10.75\" y=\"8.25\" dx=\"1\" dy=\"0.3\" layer=\"1\" stop=\"no\"/>\n<smd name=\"3\" x=\"-10.75\" y=\"7.75\" dx=\"1\" dy=\"0.3\" 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rot=\"SR0\">&gt;Name</text>\n</package>\n</packages>\n</library>\n<library name=\"74xx-little-us\">\n<description>&lt;b&gt;Single and Dual Gates Family, US symbols&lt;/b&gt;&lt;p&gt;\nLittle logic devices from Texas Instruments&lt;br&gt;\nTinyLogic(R) from FAIRCHILD Semiconductor TM\n&lt;p&gt;\n&lt;author&gt;Created by evgeni@eniks.com&lt;/author&gt;&lt;br&gt;\n&lt;author&gt;Extended by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"DBV_R-PDSO-G6\">\n<description>&lt;b&gt;DBV (R-PDSO-G6)&lt;/b&gt; PLASTIC SMALL-OUTLINE PACKAGE&lt;p&gt;\nSOT (SOT-23) - DBV&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157.</description>\n<wire x1=\"0\" y1=\"-1.29\" x2=\"0\" y2=\"-1.3\" width=\"0.01\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"0.8\" width=\"0.127\" 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Texas Instruments&lt;br&gt;\nTinyLogic(R) from FAIRCHILD Semiconductor TM\n&lt;p&gt;\n&lt;author&gt;Created by evgeni@eniks.com&lt;/author&gt;&lt;br&gt;\n&lt;author&gt;Extended by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"DBV_R-PDSO-G6\">\n<description>&lt;b&gt;DBV (R-PDSO-G6)&lt;/b&gt; PLASTIC SMALL-OUTLINE PACKAGE&lt;p&gt;\nSOT (SOT-23) - DBV&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157.</description>\n<wire x1=\"0\" y1=\"-1.29\" x2=\"0\" y2=\"-1.3\" width=\"0.01\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"0.8\" width=\"0.127\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"2\" x=\"0\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"3\" x=\"0.95\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"4\" x=\"0.95\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"6\" x=\"-0.95\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"5\" x=\"0\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<text x=\"-1.905\" y=\"1.905\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.905\" y=\"-3.175\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.11\" y1=\"0.8\" x2=\"-0.78\" y2=\"1.43\" layer=\"51\"/>\n<rectangle x1=\"0.79\" y1=\"0.8\" x2=\"1.12\" y2=\"1.42\" layer=\"51\"/>\n<rectangle x1=\"-1.11\" y1=\"-1.42\" x2=\"-0.78\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"-0.16\" y1=\"-1.42\" x2=\"0.17\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"0.79\" y1=\"-1.42\" x2=\"1.12\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"-0.16\" y1=\"0.8\" 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1998\n&lt;li&gt;www.microchip.com\n&lt;/ul&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"SSOP28\">\n<description>&lt;b&gt;Shrink Small Outline Package&lt;/b&gt;&lt;p&gt;\npackage type SS</description>\n<wire x1=\"-5.1\" y1=\"-2.6\" x2=\"5.1\" y2=\"-2.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.1\" y1=\"-2.6\" x2=\"5.1\" y2=\"2.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.1\" y1=\"2.6\" x2=\"-5.1\" y2=\"2.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.225\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"-3.575\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"3\" x=\"-2.925\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"4\" x=\"-2.275\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"5\" x=\"-1.625\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"6\" x=\"-0.975\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"7\" x=\"-0.325\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"8\" x=\"0.325\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"9\" x=\"0.975\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"10\" x=\"1.625\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"11\" x=\"2.275\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"12\" x=\"2.925\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"13\" x=\"3.575\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"14\" x=\"4.225\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"15\" x=\"4.225\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"16\" x=\"3.575\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"17\" x=\"2.925\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"18\" x=\"2.275\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"19\" x=\"1.625\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"20\" x=\"0.975\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"21\" x=\"0.325\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"22\" x=\"-0.325\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"23\" x=\"-0.975\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"24\" x=\"-1.625\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"25\" x=\"-2.275\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"26\" x=\"-2.925\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"27\" x=\"-3.575\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"28\" x=\"-4.225\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<text x=\"-5.476\" y=\"-2.6299\" size=\"1.27\" layer=\"25\" rot=\"R90\">&gt;NAME</text>\n<text x=\"-3.8999\" y=\"-0.68\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-4.4028\" y1=\"-3.937\" x2=\"-4.0472\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-3.7529\" y1=\"-3.937\" x2=\"-3.3973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-3.1029\" y1=\"-3.937\" x2=\"-2.7473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-2.4529\" y1=\"-3.937\" x2=\"-2.0973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-1.8029\" y1=\"-3.937\" x2=\"-1.4473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-1.1529\" y1=\"-3.937\" x2=\"-0.7973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-0.5029\" y1=\"-3.937\" x2=\"-0.1473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"0.1473\" y1=\"-3.937\" x2=\"0.5029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"0.7973\" y1=\"-3.937\" x2=\"1.1529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"1.4473\" y1=\"-3.937\" x2=\"1.8029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"2.0973\" y1=\"-3.937\" x2=\"2.4529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"2.7473\" y1=\"-3.937\" x2=\"3.1029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"3.3973\" y1=\"-3.937\" x2=\"3.7529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"4.0472\" y1=\"-3.937\" x2=\"4.4028\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"4.0472\" y1=\"2.6416\" x2=\"4.4028\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"3.3973\" y1=\"2.6416\" x2=\"3.7529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"2.7473\" y1=\"2.6416\" x2=\"3.1029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"2.0973\" y1=\"2.6416\" x2=\"2.4529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"1.4473\" y1=\"2.6416\" x2=\"1.8029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"0.7973\" y1=\"2.6416\" x2=\"1.1529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"0.1473\" y1=\"2.6416\" x2=\"0.5029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-0.5029\" y1=\"2.6416\" x2=\"-0.1473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-1.1529\" y1=\"2.6416\" x2=\"-0.7973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-1.8029\" y1=\"2.6416\" x2=\"-1.4473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-2.4529\" y1=\"2.6416\" x2=\"-2.0973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-3.1029\" y1=\"2.6416\" x2=\"-2.7473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-3.7529\" y1=\"2.6416\" x2=\"-3.3973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-4.4028\" y1=\"2.6416\" x2=\"-4.0472\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-5.1999\" y1=\"-2.5999\" x2=\"-4.225\" y2=\"2.5999\" layer=\"27\"/>\n</package>\n</packages>\n</library>\n<library name=\"rcl@1\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      3006Y&lt;BR&gt;\n      3009P&lt;BR&gt;\n      3009W&lt;BR&gt;\n      3009Y&lt;BR&gt;\n      3057J&lt;BR&gt;\n      3057L&lt;BR&gt;\n      3057P&lt;BR&gt;\n      3057Y&lt;BR&gt;\n      3059J&lt;BR&gt;\n      3059L&lt;BR&gt;\n      3059P&lt;BR&gt;\n      3059Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      89P&lt;BR&gt;\n      89W&lt;BR&gt;\n      89X&lt;BR&gt;\n      89PH&lt;BR&gt;\n      76P&lt;BR&gt;\n      89XH&lt;BR&gt;\n      78SLT&lt;BR&gt;\n      78L&amp;nbsp;ALT&lt;BR&gt;\n      56P&amp;nbsp;ALT&lt;BR&gt;\n      78P&amp;nbsp;ALT&lt;BR&gt;\n      T8S&lt;BR&gt;\n      78L&lt;BR&gt;\n      56P&lt;BR&gt;\n      78P&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      T18/784&lt;BR&gt;\n      783&lt;BR&gt;\n      781&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2199&lt;BR&gt;\n      1697/1897&lt;BR&gt;\n      1680/1880&lt;BR&gt;\n      2187&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      8035EKP/CT20/RJ-20P&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ-20X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      1211L&lt;BR&gt;\n      8012EKQ&amp;nbsp;ALT&lt;BR&gt;\n      8012EKR&amp;nbsp;ALT&lt;BR&gt;\n      1211P&lt;BR&gt;\n      8012EKJ&lt;BR&gt;\n      8012EKL&lt;BR&gt;\n      8012EKQ&lt;BR&gt;\n      8012EKR&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      2101P&lt;BR&gt;\n      2101W&lt;BR&gt;\n      2101Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2102L&lt;BR&gt;\n      2102S&lt;BR&gt;\n      2102Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVMCOG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      43P&lt;BR&gt;\n      43W&lt;BR&gt;\n      43Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      40L&lt;BR&gt;\n      40P&lt;BR&gt;\n      40Y&lt;BR&gt;\n      70Y-T602&lt;BR&gt;\n      70L&lt;BR&gt;\n      70P&lt;BR&gt;\n      70Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      3292P&lt;BR&gt;\n      3292W&lt;BR&gt;\n      3292X&lt;BR&gt;\n      3296P&lt;BR&gt;\n      3296W&lt;BR&gt;\n      3296X&lt;BR&gt;\n      3296Y&lt;BR&gt;\n      3296Z&lt;BR&gt;\n      3299P&lt;BR&gt;\n      3299W&lt;BR&gt;\n      3299X&lt;BR&gt;\n      3299Y&lt;BR&gt;\n      3299Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&amp;nbsp;ALT&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      64X&amp;nbsp;ALT&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66P&lt;BR&gt;\n      66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      50-2-X&lt;BR&gt;\n      50-4-X&lt;BR&gt;\n      50-3-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      25P&lt;BR&gt;\n      25S&lt;BR&gt;\n      25RX&lt;BR&gt;\n      82P&lt;BR&gt;\n      82M&lt;BR&gt;\n      82PA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      91E&lt;BR&gt;\n      91X&lt;BR&gt;\n      91T&lt;BR&gt;\n      91B&lt;BR&gt;\n      91A&lt;BR&gt;\n      91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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-&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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things that go \"tick\".&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"HC49US\">\n<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>\n<wire x1=\"-3.429\" y1=\"-2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"180\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<text x=\"-5.08\" y=\"-3.937\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-5.08\" y=\"2.667\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n</package>\n</packages>\n</library>\n<library name=\"Luca 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drill=\"0\">\n</class>\n<class number=\"3\" name=\"five\" width=\"0.381\" drill=\"0\">\n</class>\n</classes>\n<designrules name=\"Seeed_AllPCB_MacroFab_haas6mil\">\n<description language=\"en\">\n\n\n\n\n\n\n&lt;b&gt;EAGLE Design Rules&lt;/b&gt;\n&lt;p&gt;\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name.\n</description>\n<param name=\"layerSetup\" value=\"(1*2*15*16)\"/>\n<param name=\"mtCopper\" value=\"0.035mm 0.0175mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.0175mm 0.035mm\"/>\n<param name=\"mtIsolate\" value=\"0.2mm 0.3mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm\"/>\n<param name=\"mdWireWire\" value=\"6mil\"/>\n<param name=\"mdWirePad\" value=\"6mil\"/>\n<param name=\"mdWireVia\" value=\"6mil\"/>\n<param name=\"mdPadPad\" value=\"6mil\"/>\n<param name=\"mdPadVia\" value=\"6mil\"/>\n<param name=\"mdViaVia\" value=\"6mil\"/>\n<param name=\"mdSmdPad\" value=\"0mil\"/>\n<param name=\"mdSmdVia\" value=\"0mil\"/>\n<param name=\"mdSmdSmd\" value=\"0mil\"/>\n<param name=\"mdViaViaSameLayer\" value=\"8mil\"/>\n<param name=\"mnLayersViaInSmd\" value=\"2\"/>\n<param name=\"mdCopperDimension\" value=\"10mil\"/>\n<param name=\"mdDrill\" value=\"8mil\"/>\n<param name=\"mdSmdStop\" value=\"0mil\"/>\n<param name=\"msWidth\" value=\"6mil\"/>\n<param name=\"msDrill\" value=\"12mil\"/>\n<param name=\"msMicroVia\" value=\"12mil\"/>\n<param name=\"msBlindViaRatio\" value=\"0.5\"/>\n<param name=\"rvPadTop\" value=\"0.25\"/>\n<param name=\"rvPadInner\" value=\"0.25\"/>\n<param name=\"rvPadBottom\" value=\"0.25\"/>\n<param name=\"rvViaOuter\" value=\"0.25\"/>\n<param name=\"rvViaInner\" value=\"0.25\"/>\n<param name=\"rvMicroViaOuter\" value=\"0.25\"/>\n<param name=\"rvMicroViaInner\" value=\"0.25\"/>\n<param name=\"rlMinPadTop\" value=\"6mil\"/>\n<param name=\"rlMaxPadTop\" value=\"20mil\"/>\n<param name=\"rlMinPadInner\" value=\"6mil\"/>\n<param name=\"rlMaxPadInner\" value=\"20mil\"/>\n<param name=\"rlMinPadBottom\" value=\"6mil\"/>\n<param name=\"rlMaxPadBottom\" value=\"20mil\"/>\n<param name=\"rlMinViaOuter\" value=\"6mil\"/>\n<param name=\"rlMaxViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinViaInner\" value=\"6mil\"/>\n<param name=\"rlMaxViaInner\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaOuter\" value=\"6mil\"/>\n<param name=\"rlMaxMicroViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaInner\" value=\"6mil\"/>\n<param name=\"rlMaxMicroViaInner\" value=\"20mil\"/>\n<param name=\"psTop\" value=\"-1\"/>\n<param name=\"psBottom\" value=\"-1\"/>\n<param name=\"psFirst\" value=\"-1\"/>\n<param name=\"psElongationLong\" value=\"100\"/>\n<param name=\"psElongationOffset\" value=\"100\"/>\n<param name=\"mvStopFrame\" value=\"1\"/>\n<param name=\"mvCreamFrame\" value=\"0\"/>\n<param name=\"mlMinStopFrame\" value=\"6mil\"/>\n<param name=\"mlMaxStopFrame\" value=\"6mil\"/>\n<param name=\"mlMinCreamFrame\" value=\"0mil\"/>\n<param name=\"mlMaxCreamFrame\" value=\"0mil\"/>\n<param name=\"mlViaStopLimit\" value=\"25mil\"/>\n<param name=\"srRoundness\" value=\"0\"/>\n<param name=\"srMinRoundness\" value=\"0mil\"/>\n<param name=\"srMaxRoundness\" value=\"0mil\"/>\n<param name=\"slThermalIsolate\" value=\"10mil\"/>\n<param name=\"slThermalsForVias\" value=\"0\"/>\n<param name=\"dpMaxLengthDifference\" value=\"10mm\"/>\n<param name=\"dpGapFactor\" value=\"2.5\"/>\n<param name=\"checkAngle\" value=\"0\"/>\n<param name=\"checkFont\" value=\"1\"/>\n<param name=\"checkRestrict\" value=\"1\"/>\n<param name=\"checkStop\" value=\"0\"/>\n<param name=\"checkValues\" value=\"0\"/>\n<param name=\"useDiameter\" value=\"13\"/>\n<param name=\"maxErrors\" value=\"999999\"/>\n</designrules>\n<autorouter>\n<pass name=\"Default\">\n<param name=\"RoutingGrid\" value=\"0.15mm\"/>\n<param name=\"AutoGrid\" value=\"0\"/>\n<param name=\"Efforts\" value=\"1\"/>\n<param name=\"TopRouterVariant\" value=\"0\"/>\n<param name=\"tpViaShape\" value=\"round\"/>\n<param name=\"PrefDir.1\" value=\"*\"/>\n<param name=\"PrefDir.2\" value=\"*\"/>\n<param name=\"PrefDir.3\" value=\"0\"/>\n<param name=\"PrefDir.4\" value=\"0\"/>\n<param name=\"PrefDir.5\" value=\"0\"/>\n<param name=\"PrefDir.6\" value=\"0\"/>\n<param name=\"PrefDir.7\" value=\"0\"/>\n<param name=\"PrefDir.8\" value=\"0\"/>\n<param name=\"PrefDir.9\" value=\"0\"/>\n<param name=\"PrefDir.10\" value=\"0\"/>\n<param name=\"PrefDir.11\" value=\"0\"/>\n<param name=\"PrefDir.12\" value=\"0\"/>\n<param name=\"PrefDir.13\" value=\"0\"/>\n<param name=\"PrefDir.14\" value=\"0\"/>\n<param name=\"PrefDir.15\" value=\"*\"/>\n<param name=\"PrefDir.16\" value=\"*\"/>\n<param name=\"cfVia\" value=\"8\"/>\n<param name=\"cfNonPref\" value=\"5\"/>\n<param name=\"cfChangeDir\" value=\"2\"/>\n<param name=\"cfOrthStep\" value=\"2\"/>\n<param name=\"cfDiagStep\" value=\"3\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"1\"/>\n<param name=\"cfMalusStep\" value=\"1\"/>\n<param name=\"cfPadImpact\" value=\"4\"/>\n<param name=\"cfSmdImpact\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"0\"/>\n<param name=\"cfHugging\" value=\"3\"/>\n<param name=\"cfAvoid\" value=\"4\"/>\n<param name=\"cfPolygon\" value=\"10\"/>\n<param name=\"cfBase.1\" value=\"0\"/>\n<param name=\"cfBase.2\" value=\"9\"/>\n<param name=\"cfBase.3\" value=\"1\"/>\n<param name=\"cfBase.4\" value=\"1\"/>\n<param name=\"cfBase.5\" value=\"1\"/>\n<param name=\"cfBase.6\" value=\"1\"/>\n<param name=\"cfBase.7\" value=\"1\"/>\n<param name=\"cfBase.8\" value=\"1\"/>\n<param name=\"cfBase.9\" value=\"1\"/>\n<param name=\"cfBase.10\" value=\"1\"/>\n<param name=\"cfBase.11\" value=\"1\"/>\n<param name=\"cfBase.12\" value=\"1\"/>\n<param name=\"cfBase.13\" value=\"1\"/>\n<param name=\"cfBase.14\" value=\"1\"/>\n<param name=\"cfBase.15\" value=\"1\"/>\n<param name=\"cfBase.16\" value=\"1\"/>\n<param name=\"mnVias\" value=\"20\"/>\n<param name=\"mnSegments\" value=\"9999\"/>\n<param name=\"mnExtdSteps\" value=\"9999\"/>\n<param name=\"mnRipupLevel\" value=\"10\"/>\n<param name=\"mnRipupSteps\" value=\"100\"/>\n<param name=\"mnRipupTotal\" value=\"100\"/>\n</pass>\n<pass name=\"Follow-me\" refer=\"Default\" active=\"yes\">\n<param name=\"cfBase.2\" value=\"1\"/>\n<param name=\"cfBase.16\" value=\"0\"/>\n</pass>\n<pass name=\"Busses\" refer=\"Default\" active=\"yes\">\n<param name=\"cfNonPref\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"4\"/>\n<param name=\"cfHugging\" value=\"0\"/>\n<param name=\"mnVias\" value=\"0\"/>\n</pass>\n<pass name=\"Route\" refer=\"Default\" active=\"yes\">\n</pass>\n<pass name=\"Optimize1\" refer=\"Default\" active=\"yes\">\n<param name=\"cfVia\" value=\"99\"/>\n<param name=\"cfExtdStep\" value=\"10\"/>\n<param name=\"cfHugging\" value=\"1\"/>\n<param name=\"mnExtdSteps\" value=\"1\"/>\n<param name=\"mnRipupLevel\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize2\" refer=\"Optimize1\" active=\"yes\">\n<param name=\"cfNonPref\" value=\"0\"/>\n<param name=\"cfChangeDir\" value=\"6\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"2\"/>\n<param name=\"cfMalusStep\" value=\"2\"/>\n<param name=\"cfPadImpact\" value=\"2\"/>\n<param name=\"cfSmdImpact\" value=\"2\"/>\n<param name=\"cfHugging\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize3\" refer=\"Optimize2\" active=\"yes\">\n<param name=\"cfChangeDir\" value=\"8\"/>\n<param name=\"cfPadImpact\" value=\"0\"/>\n<param name=\"cfSmdImpact\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize4\" refer=\"Optimize3\" active=\"yes\">\n<param name=\"cfChangeDir\" value=\"25\"/>\n</pass>\n</autorouter>\n<elements>\n<element name=\"CV11\" library=\"rcl\" package=\"C0805K\" value=\"0.1uF\" x=\"32.67\" y=\"46.59\" smashed=\"yes\" rot=\"MR90\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\" x=\"32.67\" y=\"46.59\" size=\"1.778\" layer=\"28\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"33.47\" y=\"44.79\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\"/>\n</element>\n<element name=\"CV12\" library=\"rcl\" package=\"C0805K\" value=\"1uF\" x=\"35.91\" y=\"46.71\" smashed=\"yes\" rot=\"MR90\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\" x=\"35.91\" y=\"46.71\" size=\"1.778\" layer=\"28\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"36.81\" y=\"45.61\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\"/>\n</element>\n<element name=\"CG13\" library=\"rcl\" package=\"C0805K\" value=\"1uF\" x=\"22.01\" y=\"14.23\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\" x=\"22.01\" y=\"14.23\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"21.11\" y=\"15.33\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR270\"/>\n</element>\n<element name=\"CG14\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"18.91\" y=\"13.79\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"18.91\" y=\"13.79\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"19.71\" y=\"16.41\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR0\"/>\n</element>\n<element name=\"CG15\" library=\"rcl\" package=\"C0805K\" value=\"0.1uF\" x=\"25.65\" y=\"14.21\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\" x=\"25.65\" y=\"14.21\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"24.75\" y=\"16.01\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR270\"/>\n</element>\n<element name=\"CP5\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"52.22\" y=\"51.67\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"52.22\" y=\"51.67\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"54.32\" y=\"54.47\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR270\"/>\n</element>\n<element name=\"CP6\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"39.08\" y=\"46\" smashed=\"yes\" rot=\"MR90\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"39.08\" y=\"46\" size=\"1.778\" layer=\"28\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"41.04\" y=\"47.2\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR270\"/>\n</element>\n<element name=\"C_OSC\" library=\"rcl@1\" package=\"C0603\" value=\"0.01uF\" x=\"38.36\" y=\"16.22\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\" x=\"38.36\" y=\"16.22\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"LED1\" library=\"led\" package=\"SML0805\" value=\"MF-LED-0805-RED\" x=\"-6.58\" y=\"9.93\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MF\" value=\"\" x=\"-6.58\" y=\"9.93\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\" x=\"-6.58\" y=\"9.93\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-5.08\" y=\"8.53\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"-6.58\" y=\"9.93\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"RLED1\" library=\"resistor\" package=\"R0805\" value=\"560\" x=\"8.53\" y=\"13.24\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"8.53\" y=\"13.24\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\" x=\"8.53\" y=\"13.24\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"8.53\" y=\"13.24\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n</element>\n<element name=\"RJ2\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"15.33\" y=\"0.26\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"15.33\" y=\"0.26\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"15.33\" y=\"0.26\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"15.33\" y=\"0.26\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"RJ3\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"15.34\" y=\"13.3\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"15.34\" y=\"13.3\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"15.34\" y=\"13.3\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"15.34\" y=\"13.3\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n</element>\n<element name=\"RJ4\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"15.33\" y=\"4.7\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"15.33\" y=\"4.7\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"15.33\" y=\"4.7\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"15.33\" y=\"4.7\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n</element>\n<element name=\"RJ5\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"15.36\" y=\"11.14\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"15.36\" y=\"11.14\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"15.36\" y=\"11.14\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"15.36\" y=\"11.14\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n</element>\n<element name=\"RS6\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"15.34\" y=\"2.42\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"15.34\" y=\"2.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"15.34\" y=\"2.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"15.34\" y=\"2.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n</element>\n<element name=\"RS7\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"15.37\" y=\"8.98\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"15.37\" y=\"8.98\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"15.37\" y=\"8.98\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"15.37\" y=\"8.98\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n</element>\n<element name=\"RS8\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"15.36\" y=\"6.82\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"15.36\" y=\"6.82\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"15.36\" y=\"6.82\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"15.36\" y=\"6.82\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"16.1794\" y=\"-0.9448\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\"/>\n</element>\n<element name=\"RS9\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"15.37\" y=\"15.42\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"15.37\" y=\"15.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"15.37\" y=\"15.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"15.37\" y=\"15.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n</element>\n<element name=\"FPGA\" library=\"10M08SAE144\" package=\"EQFP144\" value=\"10M08SAE144\" x=\"30.96\" y=\"30.13\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MF\" value=\"\" x=\"30.96\" y=\"30.13\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"10M08SAE144C8G\" x=\"30.96\" y=\"30.13\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"37.485\" y=\"28.61\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"30.96\" y=\"30.13\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"OSC\" library=\"crystal\" package=\"ASE\" value=\"ASE-50.000MHZ-ET\" x=\"36.04\" y=\"16.16\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MF\" value=\"\" x=\"36.04\" y=\"16.16\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"ASE-50.000MHZ-ET\" x=\"36.04\" y=\"16.16\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"34.54\" y=\"15.18\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"36.04\" y=\"16.16\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"36.04\" y=\"16.16\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"REG\" library=\"Seeed-IC-2016\" package=\"SOT-223\" value=\"LDL1117S33R\" x=\"49.01\" y=\"50.54\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"LDL1117S33R\" x=\"49.01\" y=\"50.54\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"CREF1\" library=\"rcl\" package=\"C0805K\" value=\"0.1uF\" x=\"58.08\" y=\"18.8\" smashed=\"yes\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\" x=\"58.08\" y=\"18.8\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"RLED2\" library=\"resistor\" package=\"R0805\" value=\"560\" x=\"8.52\" y=\"15.54\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"8.52\" y=\"15.54\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\" x=\"8.52\" y=\"15.54\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"8.52\" y=\"15.54\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n</element>\n<element name=\"LED2\" library=\"led\" package=\"SML0805\" value=\"MF-LED-0805-RED\" x=\"-4.38\" y=\"9.92\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MF\" value=\"\" x=\"-4.38\" y=\"9.92\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\" x=\"-4.38\" y=\"9.92\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-2.88\" y=\"8.52\" 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rot=\"MR90\"/>\n</element>\n<element name=\"CP10\" library=\"rcl\" package=\"C0805K\" value=\"1uF\" x=\"43.5\" y=\"0.4\" smashed=\"yes\" rot=\"MR90\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\" x=\"43.5\" y=\"0.4\" size=\"1.778\" layer=\"28\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"42.3\" y=\"3\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR180\"/>\n</element>\n<element name=\"CP11\" library=\"rcl\" package=\"C0805K\" value=\"1uF\" x=\"49.8\" y=\"56.4\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\" x=\"49.8\" y=\"56.4\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"48.9\" y=\"57.7\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR270\"/>\n</element>\n<element name=\"COFFSETA6\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"70.9\" y=\"6.1\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"70.9\" y=\"6.1\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"72.94\" y=\"7.67\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR270\"/>\n</element>\n<element name=\"COFFSETA1\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"71.3\" y=\"19.6\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"71.3\" y=\"19.6\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"73.44\" y=\"20.87\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR270\"/>\n</element>\n<element name=\"COFFSETA2\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"71.5\" y=\"38.4\" smashed=\"yes\" rot=\"MR90\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"71.5\" y=\"38.4\" size=\"1.778\" layer=\"28\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"72.66\" y=\"38.13\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\"/>\n</element>\n<element name=\"COFFSETA3\" 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ratio=\"16\"/>\n</element>\n<element name=\"SW_SUPER2\" library=\"PP_Electromechanical\" package=\"0S102011MS2QS1\" value=\"OS102011MS2QN1\" x=\"61\" y=\"24.6\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"57.7\" y=\"25.14\" size=\"0.8128\" layer=\"21\" font=\"vector\" ratio=\"16\"/>\n</element>\n<element name=\"SW_SUPER3\" library=\"PP_Electromechanical\" package=\"0S102011MS2QS1\" value=\"OS102011MS2QN1\" x=\"60.9\" y=\"33.7\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"57.6\" y=\"34.24\" size=\"0.8128\" layer=\"21\" font=\"vector\" ratio=\"16\"/>\n</element>\n<element name=\"SW_SUPER4\" library=\"PP_Electromechanical\" package=\"0S102011MS2QS1\" value=\"OS102011MS2QN1\" x=\"60.2\" y=\"57\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"56.9\" y=\"57.54\" size=\"0.8128\" layer=\"21\" font=\"vector\" ratio=\"16\"/>\n</element>\n<element name=\"CL1\" library=\"SparkFun-Passives\" package=\"CTZ3\" value=\"8-45pF\" x=\"66.4\" y=\"6.3\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\" x=\"66.4\" y=\"6.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"CL2\" library=\"SparkFun-Passives\" package=\"CTZ3\" value=\"8-45pF\" x=\"66.4\" y=\"19.3\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\" x=\"66.4\" y=\"19.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"CL3\" library=\"SparkFun-Passives\" package=\"CTZ3\" value=\"8-45pF\" x=\"66.4\" y=\"38.7\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\" x=\"66.4\" y=\"38.7\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"CL4\" library=\"SparkFun-Passives\" package=\"CTZ3\" value=\"8-45pF\" x=\"65.9\" y=\"51.5\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\" x=\"65.9\" y=\"51.5\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"CH2\" library=\"SparkFun-Passives\" package=\"CTZ3\" value=\"3-10pF\" x=\"70\" y=\"19.3\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\" x=\"70\" y=\"19.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"CH3\" library=\"SparkFun-Passives\" package=\"CTZ3\" value=\"3-10pF\" x=\"70.1\" y=\"38.7\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\" x=\"70.1\" y=\"38.7\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"CH4\" library=\"SparkFun-Passives\" package=\"CTZ3\" value=\"3-10pF\" x=\"69.6\" y=\"51.5\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\" x=\"69.6\" y=\"51.5\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n</element>\n<element name=\"CIN5_1\" library=\"rcl@1\" package=\"C0603\" value=\"10pF\" x=\"63.8\" y=\"7\" smashed=\"yes\" rot=\"MR90\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\" x=\"63.8\" y=\"7\" size=\"1.778\" layer=\"28\" rot=\"MR90\" display=\"off\"/>\n</element>\n<element name=\"CIN5_2\" library=\"rcl@1\" package=\"C0603\" value=\"10pF\" x=\"64.9\" y=\"19\" smashed=\"yes\" rot=\"MR90\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\" x=\"64.9\" y=\"19\" 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display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"12.9\" y=\"56.9\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"LEDPOW\" library=\"led\" package=\"SML0805\" value=\"MF-LED-0805-RED\" x=\"15\" y=\"57\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MF\" value=\"\" x=\"15\" y=\"57\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\" x=\"15\" y=\"57\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"15\" y=\"57\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"CIN56_1\" library=\"rcl@1\" package=\"C0603\" value=\"56pF\" x=\"60\" y=\"6.6\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\" x=\"60\" y=\"6.6\" size=\"1.778\" layer=\"28\" rot=\"MR180\" display=\"off\"/>\n</element>\n<element name=\"CIN56_2\" library=\"rcl@1\" package=\"C0603\" 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layer=\"1\"/>\n<wire x1=\"16.05\" y1=\"15.6\" x2=\"16.05\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.2\" y1=\"15.45\" x2=\"16.05\" y2=\"15.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.05\" y1=\"17.7\" x2=\"15.95\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.2\" y1=\"15.45\" x2=\"16.32\" y2=\"15.42\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"31.65\" x2=\"4.5\" y2=\"31.65\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.15\" y1=\"28.5\" x2=\"6\" y2=\"31.65\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.5\" y1=\"31.65\" x2=\"4.375\" y2=\"31.725\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.55\" y1=\"21.15\" x2=\"15.9\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.5\" y1=\"21.15\" x2=\"14.55\" y2=\"21.15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.9\" y1=\"19.8\" x2=\"15.95\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.3\" y1=\"48.75\" x2=\"9.3\" y2=\"47.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.7\" y1=\"52.35\" x2=\"9.3\" y2=\"48.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.7\" y1=\"52.65\" x2=\"5.7\" y2=\"52.35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.3\" y1=\"47.4\" x2=\"9.445\" y2=\"47.305\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.7\" y1=\"52.65\" x2=\"5.635\" y2=\"52.695\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.65\" y1=\"48.3\" x2=\"5.7\" y2=\"52.35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.95\" y1=\"48.3\" x2=\"1.65\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-9.3\" y1=\"46.95\" x2=\"-7.95\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.35\" y1=\"46.95\" x2=\"-9.3\" y2=\"46.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-11.1\" y1=\"46.2\" x2=\"-10.35\" y2=\"46.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-11.1\" y1=\"40.2\" x2=\"-11.1\" y2=\"46.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.5\" y1=\"39.6\" x2=\"-11.1\" y2=\"40.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.7\" y1=\"52.35\" x2=\"5.635\" y2=\"52.695\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.95\" y1=\"49.95\" x2=\"-7.95\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.55\" y1=\"50.55\" x2=\"-7.95\" y2=\"49.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.55\" y1=\"56.25\" x2=\"-8.55\" y2=\"50.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.1\" y1=\"56.7\" x2=\"-8.55\" y2=\"56.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.6\" y1=\"56.7\" x2=\"-8.1\" y2=\"56.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.45\" y1=\"59.55\" x2=\"9.6\" y2=\"56.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.5\" y1=\"59.55\" x2=\"12.45\" y2=\"59.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.65\" y1=\"47.4\" x2=\"19.65\" y2=\"48.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.65\" y1=\"34.35\" x2=\"-4.65\" y2=\"29.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-9.9\" y1=\"39.6\" x2=\"-4.65\" y2=\"34.35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.5\" y1=\"39.6\" x2=\"-9.9\" y2=\"39.6\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"TCK\">\n<contactref element=\"RJ2\" pad=\"1\"/>\n<contactref element=\"FPGA\" pad=\"18\"/>\n<contactref element=\"JP1\" pad=\"1\"/>\n<wire x1=\"30.7\" y1=\"18.4\" x2=\"30.7\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.7\" y1=\"15.4\" x2=\"30.7\" y2=\"18.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.5\" y1=\"2.2\" x2=\"30.7\" y2=\"15.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.1\" y1=\"2.2\" x2=\"13\" y2=\"2.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13\" y1=\"2.2\" x2=\"17.5\" y2=\"2.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.1\" y1=\"4.2\" x2=\"10.1\" y2=\"2.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.7\" y1=\"19.3\" x2=\"30.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.1\" y1=\"4.2\" x2=\"8.08\" y2=\"4.27\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13\" y1=\"1.6\" x2=\"14.3\" y2=\"0.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13\" y1=\"2.2\" x2=\"13\" y2=\"1.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.3\" y1=\"0.3\" x2=\"14.38\" y2=\"0.26\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"30.7\" y=\"18.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13\" y=\"1.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TDO\">\n<contactref element=\"FPGA\" pad=\"20\"/>\n<contactref element=\"JP1\" pad=\"2\"/>\n<wire x1=\"31.8\" y1=\"17.9\" x2=\"31.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.9\" y1=\"17.8\" x2=\"31.8\" y2=\"17.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.9\" y1=\"17.4\" x2=\"31.9\" y2=\"17.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.3\" y1=\"15.8\" x2=\"31.9\" y2=\"17.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.1\" y1=\"15.8\" x2=\"30.3\" y2=\"15.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.1\" y1=\"14.2\" x2=\"30.1\" y2=\"15.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30.4\" y1=\"13.9\" x2=\"30.1\" y2=\"14.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30.4\" y1=\"8.8\" x2=\"30.4\" y2=\"13.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"27.8\" y1=\"6.2\" x2=\"30.4\" y2=\"8.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"7.5\" y1=\"6.2\" x2=\"27.8\" y2=\"6.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"5.6\" y1=\"4.3\" x2=\"7.5\" y2=\"6.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"31.8\" y1=\"19.3\" x2=\"31.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.6\" y1=\"4.3\" x2=\"5.54\" y2=\"4.27\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"30.1\" y=\"15.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TMS\">\n<contactref element=\"RJ3\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"16\"/>\n<contactref element=\"JP1\" pad=\"3\"/>\n<wire x1=\"29.7\" y1=\"21\" x2=\"29.7\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.7\" y1=\"22\" x2=\"29.7\" y2=\"21\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.2\" y1=\"22\" x2=\"28.7\" y2=\"22\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.5\" y1=\"21.3\" x2=\"22.2\" y2=\"22\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.4\" y1=\"21.3\" x2=\"21.5\" y2=\"21.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11\" y1=\"14.9\" x2=\"17.4\" y2=\"21.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11\" y1=\"10.9\" x2=\"11\" y2=\"13.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11\" y1=\"13.3\" x2=\"11\" y2=\"14.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.7\" y1=\"6.6\" x2=\"11\" y2=\"10.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.3\" y1=\"6.6\" x2=\"6.7\" y2=\"6.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3\" y1=\"4.3\" x2=\"5.3\" y2=\"6.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.7\" y1=\"19.4\" x2=\"29.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3\" y1=\"4.3\" x2=\"3\" y2=\"4.27\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.2\" y1=\"13.3\" x2=\"14.39\" y2=\"13.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"13.3\" x2=\"13.2\" y2=\"13.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"29.7\" y=\"21\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.2\" y=\"13.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TDI\">\n<contactref element=\"RJ4\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"19\"/>\n<contactref element=\"JP1\" pad=\"5\"/>\n<wire x1=\"31.3\" y1=\"17.6\" x2=\"31.3\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.3\" y1=\"16.6\" x2=\"31.3\" y2=\"17.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.1\" y1=\"16.4\" x2=\"31.3\" y2=\"16.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.1\" y1=\"14.2\" x2=\"31.1\" y2=\"16.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"3.4\" x2=\"31.1\" y2=\"14.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.2\" y1=\"3.4\" x2=\"13.3\" y2=\"3.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"3.4\" x2=\"20.3\" y2=\"3.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"9\" y1=\"3.2\" x2=\"9.2\" y2=\"3.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1\" y1=\"3.2\" x2=\"9\" y2=\"3.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-2\" y1=\"4.2\" x2=\"-1\" y2=\"3.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"31.3\" y1=\"19.3\" x2=\"31.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2\" y1=\"4.2\" x2=\"-2.08\" y2=\"4.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"3.7\" x2=\"14.3\" y2=\"4.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"3.4\" x2=\"13.3\" y2=\"3.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"14.3\" y1=\"4.7\" x2=\"14.38\" y2=\"4.7\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"31.3\" y=\"17.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"20.3\" y=\"3.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.3\" y=\"3.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"JTAGEN\">\n<contactref element=\"RJ5\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"15\"/>\n<contactref element=\"JP1\" pad=\"7\"/>\n<wire x1=\"29.3\" y1=\"20.6\" x2=\"29.3\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.7\" y1=\"21.2\" x2=\"29.3\" y2=\"20.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.3\" y1=\"21.2\" x2=\"28.7\" y2=\"21.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.9\" y1=\"21.6\" x2=\"26.3\" y2=\"21.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.3\" y1=\"21.6\" x2=\"25.9\" y2=\"21.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.1\" y1=\"19.4\" x2=\"22.3\" y2=\"21.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.3\" y1=\"19.4\" x2=\"20.1\" y2=\"19.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.2\" y1=\"15.3\" x2=\"18.3\" y2=\"19.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.2\" y1=\"10.1\" x2=\"14.2\" y2=\"15.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.3\" y1=\"6.2\" x2=\"12.85\" y2=\"8.75\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.85\" y1=\"8.75\" x2=\"14.2\" y2=\"10.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.2\" y1=\"6.2\" x2=\"10.3\" y2=\"6.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.8\" y1=\"1.8\" x2=\"6.2\" y2=\"6.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.5\" y1=\"1.8\" x2=\"1.8\" y2=\"1.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.3\" y1=\"19.4\" x2=\"29.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.5\" y1=\"1.8\" x2=\"0.46\" y2=\"1.73\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.2\" y1=\"11.1\" x2=\"14.4\" y2=\"11.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.2\" y1=\"10.7\" x2=\"13.2\" y2=\"11.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.8\" y1=\"10.3\" x2=\"13.2\" y2=\"10.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.8\" y1=\"8.8\" x2=\"12.8\" y2=\"10.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.4\" y1=\"11.1\" x2=\"14.41\" y2=\"11.14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.8\" y1=\"8.8\" x2=\"12.85\" y2=\"8.75\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"28.7\" y=\"21.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.2\" y=\"11.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CONFIG_SEL\">\n<contactref element=\"FPGA\" pad=\"126\"/>\n<contactref element=\"RS6\" pad=\"2\"/>\n<wire x1=\"21.1\" y1=\"30.3\" x2=\"20.3\" y2=\"30.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.3\" y1=\"29.1\" x2=\"21.1\" y2=\"30.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.6\" y1=\"29.1\" x2=\"22.3\" y2=\"29.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.4\" y1=\"26.3\" x2=\"25.6\" y2=\"29.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.4\" y1=\"23.3\" x2=\"28.4\" y2=\"26.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.9\" y1=\"20.8\" x2=\"28.4\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21\" y1=\"15.9\" x2=\"25.9\" y2=\"20.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21\" y1=\"8.7\" x2=\"21\" y2=\"15.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.1\" y1=\"2.8\" x2=\"21\" y2=\"8.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.2\" y1=\"2.8\" x2=\"15.1\" y2=\"2.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14\" y1=\"2.8\" x2=\"13.2\" y2=\"2.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.3\" y1=\"2.5\" x2=\"14\" y2=\"2.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"30.3\" x2=\"20.21\" y2=\"30.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.3\" y1=\"2.5\" x2=\"14.39\" y2=\"2.42\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"25.9\" y=\"20.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.2\" y=\"2.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CONF\">\n<contactref element=\"FPGA\" pad=\"138\"/>\n<contactref element=\"RS7\" pad=\"2\"/>\n<wire x1=\"21\" y1=\"24.3\" x2=\"20.3\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"24.1\" x2=\"21\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"23.1\" x2=\"21.2\" y2=\"24.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.8\" y1=\"20.7\" x2=\"21.2\" y2=\"23.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.8\" y1=\"15.7\" x2=\"18.8\" y2=\"20.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.8\" y1=\"10.5\" x2=\"13.8\" y2=\"15.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.4\" y1=\"10.1\" x2=\"13.8\" y2=\"10.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.5\" y1=\"9\" x2=\"13.4\" y2=\"10.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"24.3\" x2=\"20.21\" y2=\"24.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.5\" y1=\"9\" x2=\"14.42\" y2=\"8.98\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"21.2\" y=\"24.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.8\" y=\"20.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.4\" y=\"10.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"STATUS\">\n<contactref element=\"FPGA\" pad=\"136\"/>\n<contactref element=\"RS8\" pad=\"2\"/>\n<wire x1=\"21\" y1=\"25.4\" x2=\"20.3\" y2=\"25.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.1\" y1=\"25.5\" x2=\"21\" y2=\"25.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.5\" y1=\"25.5\" x2=\"21.1\" y2=\"25.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.2\" y1=\"23.8\" x2=\"21.5\" y2=\"25.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.2\" y1=\"22\" x2=\"23.2\" y2=\"23.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.5\" y1=\"21.3\" x2=\"23.2\" y2=\"22\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.5\" y1=\"21\" x2=\"22.5\" y2=\"21.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"21\" x2=\"22.5\" y2=\"21\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"19\" x2=\"22.2\" y2=\"21\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.4\" y1=\"19\" x2=\"20.2\" y2=\"19\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.7\" y1=\"15.3\" x2=\"18.4\" y2=\"19\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.7\" y1=\"9.2\" x2=\"14.7\" y2=\"15.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.4\" y1=\"7.9\" x2=\"14.7\" y2=\"9.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.4\" y1=\"6.9\" x2=\"13.4\" y2=\"7.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"25.4\" x2=\"20.21\" y2=\"25.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"6.9\" x2=\"14.41\" y2=\"6.82\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"22.5\" y=\"21\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.4\" y=\"7.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"NCONF\">\n<contactref element=\"FPGA\" pad=\"129\"/>\n<contactref element=\"RS9\" pad=\"2\"/>\n<contactref element=\"SW_RESET\" pad=\"P$4\"/>\n<wire x1=\"19.6\" y1=\"28.8\" x2=\"20.2\" y2=\"28.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"28.2\" x2=\"19.6\" y2=\"28.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"23.6\" x2=\"19\" y2=\"28.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"17.9\" x2=\"19\" y2=\"23.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"16.4\" x2=\"13.3\" y2=\"17.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.5\" y1=\"16.4\" x2=\"13.3\" y2=\"16.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"15.5\" x2=\"13.5\" y2=\"16.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.2\" y1=\"28.8\" x2=\"20.21\" y2=\"28.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"15.5\" x2=\"14.42\" y2=\"15.42\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.7\" y1=\"1.9\" x2=\"46.7\" y2=\"1.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.8\" y1=\"5.8\" x2=\"46.7\" y2=\"1.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.9\" y1=\"5.8\" x2=\"42.8\" y2=\"5.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.3\" y1=\"9.4\" x2=\"39.9\" y2=\"5.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.2\" y1=\"9.4\" x2=\"36.3\" y2=\"9.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.8\" y1=\"9.4\" x2=\"27.2\" y2=\"9.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.9\" y1=\"11.3\" x2=\"20.8\" y2=\"9.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"17.8\" y1=\"11.3\" x2=\"18.9\" y2=\"11.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"15.8\" x2=\"17.8\" y2=\"11.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"16.4\" x2=\"13.3\" y2=\"15.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"46.7\" y1=\"1.6\" x2=\"46.725\" y2=\"1.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"19\" y=\"28.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.3\" y=\"16.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"27.2\" y=\"9.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED1\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"21\"/>\n<contactref element=\"LED1\" pad=\"A\"/>\n<wire x1=\"-5.5\" y1=\"12\" x2=\"-6.5\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.5\" y1=\"19.5\" x2=\"-5.5\" y2=\"12\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"28.1\" x2=\"-5.5\" y2=\"19.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.4\" y1=\"28.1\" x2=\"3.1\" y2=\"28.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.6\" y1=\"27.9\" x2=\"3.4\" y2=\"28.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"27.9\" x2=\"3.6\" y2=\"27.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"11\" x2=\"-6.58\" y2=\"10.98\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"27.9\" x2=\"4.375\" y2=\"27.825\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-5.5\" y=\"12\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3.1\" y=\"28.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$18\">\n</signal>\n<signal name=\"CLKOUT_33\">\n<contactref element=\"IC2\" pad=\"15\"/>\n<contactref element=\"FPGA\" pad=\"33\"/>\n<wire x1=\"52.75\" y1=\"41.5\" x2=\"52.75\" y2=\"43.25\" width=\"0.3048\" layer=\"1\"/>\n<wire x1=\"52.75\" y1=\"43.25\" x2=\"52\" y2=\"44\" width=\"0.3048\" layer=\"1\"/>\n<via x=\"52\" y=\"44\" extent=\"1-16\" drill=\"0.35\"/>\n<wire x1=\"52\" y1=\"44\" x2=\"45\" y2=\"44\" width=\"0.3048\" layer=\"15\"/>\n<wire x1=\"45\" y1=\"44\" x2=\"37\" y2=\"36\" width=\"0.3048\" layer=\"15\"/>\n<wire x1=\"37\" y1=\"36\" x2=\"37\" y2=\"32\" width=\"0.3048\" layer=\"15\"/>\n<wire x1=\"38.3\" y1=\"20.2\" x2=\"38.3\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.5\" y1=\"20.4\" x2=\"38.3\" y2=\"20.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.5\" y1=\"30.5\" x2=\"38.5\" y2=\"20.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.1\" y1=\"31.9\" x2=\"38.5\" y2=\"30.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"38.3\" y1=\"19.4\" x2=\"38.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.1\" y1=\"31.9\" x2=\"37\" y2=\"32\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"38.5\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"37.1\" y=\"31.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D1C\">\n<contactref element=\"IC2\" pad=\"35\"/>\n<contactref element=\"FPGA\" pad=\"70\"/>\n<wire x1=\"45.2\" y1=\"35.8\" x2=\"47.5\" y2=\"35.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.1\" y1=\"37.9\" x2=\"45.2\" y2=\"35.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"37.9\" x2=\"43.1\" y2=\"37.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"35.8\" x2=\"47.5\" y2=\"35.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"37.9\" x2=\"41.71\" y2=\"37.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D2C\">\n<contactref element=\"IC2\" pad=\"37\"/>\n<contactref element=\"FPGA\" pad=\"69\"/>\n<wire x1=\"48.2\" y1=\"33.9\" x2=\"48.2\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.9\" y1=\"33.6\" x2=\"48.2\" y2=\"33.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.9\" y1=\"32.6\" x2=\"47.9\" y2=\"33.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.1\" y1=\"32.4\" x2=\"47.9\" y2=\"32.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.3\" y1=\"35.2\" x2=\"48.1\" y2=\"32.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43\" y1=\"37.5\" x2=\"45.3\" y2=\"35.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.9\" y1=\"37.5\" x2=\"43\" y2=\"37.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"37.4\" x2=\"41.9\" y2=\"37.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.2\" y1=\"34.5\" x2=\"48.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"37.4\" x2=\"41.71\" y2=\"37.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.1\" y=\"32.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"45.3\" y=\"35.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3C\">\n<contactref element=\"IC2\" pad=\"38\"/>\n<contactref element=\"FPGA\" pad=\"66\"/>\n<wire x1=\"48.7\" y1=\"33.9\" x2=\"48.7\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.3\" y1=\"33.5\" x2=\"48.7\" y2=\"33.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.3\" y1=\"33\" x2=\"48.3\" y2=\"33.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.9\" y1=\"32.4\" x2=\"48.3\" y2=\"33\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.3\" y1=\"31.8\" x2=\"48.9\" y2=\"32.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"47.5\" y1=\"31.8\" x2=\"48.3\" y2=\"31.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.9\" y1=\"35.4\" x2=\"47.5\" y2=\"31.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.3\" y1=\"36\" x2=\"43.9\" y2=\"35.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.9\" y1=\"36\" x2=\"43.3\" y2=\"36\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"35.9\" x2=\"41.9\" y2=\"36\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.7\" y1=\"34.5\" x2=\"48.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"35.9\" x2=\"41.71\" y2=\"35.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.9\" y=\"32.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.9\" y=\"35.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4C\">\n<contactref element=\"IC2\" pad=\"39\"/>\n<contactref element=\"FPGA\" pad=\"65\"/>\n<wire x1=\"49.2\" y1=\"33.9\" x2=\"49.2\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.9\" y1=\"33.6\" x2=\"49.2\" y2=\"33.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.9\" y1=\"33.2\" x2=\"48.9\" y2=\"33.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.1\" y1=\"33.2\" x2=\"48.9\" y2=\"33.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"45.3\" y1=\"36\" x2=\"48.1\" y2=\"33.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.7\" y1=\"36\" x2=\"45.3\" y2=\"36\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.1\" y1=\"35.4\" x2=\"43.7\" y2=\"36\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.8\" y1=\"35.4\" x2=\"43.1\" y2=\"35.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.2\" y1=\"34.5\" x2=\"49.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"35.4\" x2=\"41.71\" y2=\"35.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.9\" y=\"33.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.1\" y=\"35.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5C\">\n<contactref element=\"IC2\" pad=\"40\"/>\n<contactref element=\"FPGA\" pad=\"64\"/>\n<wire x1=\"49.7\" y1=\"33.6\" x2=\"49.7\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.3\" y1=\"33.6\" x2=\"49.7\" y2=\"33.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"49.1\" y1=\"33.8\" x2=\"49.3\" y2=\"33.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"44.8\" y1=\"33.8\" x2=\"49.1\" y2=\"33.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.3\" y1=\"32.3\" x2=\"44.8\" y2=\"33.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.8\" y1=\"32.3\" x2=\"43.3\" y2=\"32.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.7\" y1=\"34.4\" x2=\"42.8\" y2=\"32.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.1\" y1=\"34.8\" x2=\"40.7\" y2=\"34.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"34.8\" x2=\"41.1\" y2=\"34.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.7\" y1=\"34.5\" x2=\"49.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"34.8\" x2=\"41.71\" y2=\"34.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"49.7\" y=\"33.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"34.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6C\">\n<contactref element=\"IC2\" pad=\"41\"/>\n<contactref element=\"FPGA\" pad=\"62\"/>\n<wire x1=\"50.3\" y1=\"33.1\" x2=\"50.3\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.3\" y1=\"33.8\" x2=\"50.3\" y2=\"33.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"49.9\" y1=\"34.2\" x2=\"50.3\" y2=\"33.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.4\" y1=\"34.2\" x2=\"49.9\" y2=\"34.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.8\" y1=\"33.6\" x2=\"43.4\" y2=\"34.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.7\" y1=\"33.6\" x2=\"42.8\" y2=\"33.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.5\" y1=\"33.6\" x2=\"42.7\" y2=\"33.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.3\" y1=\"33.8\" x2=\"42.5\" y2=\"33.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"33.8\" x2=\"42.3\" y2=\"33.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.3\" y1=\"34.5\" x2=\"50.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"33.8\" x2=\"41.71\" y2=\"33.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"50.3\" y=\"33.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"42.7\" y=\"33.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D0C\">\n<contactref element=\"IC2\" pad=\"34\"/>\n<contactref element=\"FPGA\" pad=\"74\"/>\n<wire x1=\"45.5\" y1=\"36.3\" x2=\"47.5\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.6\" y1=\"37.2\" x2=\"45.5\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.6\" y1=\"38\" x2=\"44.6\" y2=\"37.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.2\" y1=\"39.4\" x2=\"44.6\" y2=\"38\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.7\" y1=\"39.4\" x2=\"43.2\" y2=\"39.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39.2\" y1=\"41.9\" x2=\"41.7\" y2=\"39.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39.2\" y1=\"40.9\" x2=\"39.2\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"36.3\" x2=\"47.5\" y2=\"36.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.2\" y1=\"40.9\" x2=\"39.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"44.6\" y=\"37.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"39.2\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7C\">\n<contactref element=\"IC2\" pad=\"42\"/>\n<contactref element=\"FPGA\" pad=\"60\"/>\n<wire x1=\"50.8\" y1=\"33.7\" x2=\"50.8\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.9\" y1=\"33.6\" x2=\"50.8\" y2=\"33.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.9\" y1=\"32.3\" x2=\"50.9\" y2=\"33.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.8\" y1=\"31.2\" x2=\"50.9\" y2=\"32.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"44.8\" y1=\"31.2\" x2=\"49.8\" y2=\"31.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.1\" y1=\"32.9\" x2=\"44.8\" y2=\"31.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.8\" y1=\"32.9\" x2=\"43.1\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.8\" y1=\"34.5\" x2=\"50.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"32.9\" x2=\"41.71\" y2=\"32.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"50.9\" y=\"33.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.1\" y=\"32.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D0D\">\n<contactref element=\"IC2\" pad=\"23\"/>\n<contactref element=\"FPGA\" pad=\"85\"/>\n<wire x1=\"48.7\" y1=\"43.1\" x2=\"48.7\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.3\" y1=\"45.5\" x2=\"48.7\" y2=\"43.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.7\" y1=\"45.5\" x2=\"46.3\" y2=\"45.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.7\" y1=\"43.5\" x2=\"44.7\" y2=\"45.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"35.5\" y1=\"43.5\" x2=\"42.7\" y2=\"43.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.9\" y1=\"41.9\" x2=\"35.5\" y2=\"43.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.9\" y1=\"41.6\" x2=\"33.9\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.8\" y1=\"41.5\" x2=\"33.9\" y2=\"41.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.8\" y1=\"40.9\" x2=\"33.8\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.7\" y1=\"41.5\" x2=\"48.75\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.8\" y1=\"40.9\" x2=\"33.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.3\" y=\"45.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.9\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D1D\">\n<contactref element=\"IC2\" pad=\"24\"/>\n<contactref element=\"FPGA\" pad=\"84\"/>\n<wire x1=\"48.2\" y1=\"42.8\" x2=\"48.2\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.3\" y1=\"44.7\" x2=\"48.2\" y2=\"42.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.4\" y1=\"44.7\" x2=\"46.3\" y2=\"44.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.1\" y1=\"40.4\" x2=\"44.4\" y2=\"44.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"35.2\" y1=\"40.4\" x2=\"40.1\" y2=\"40.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.7\" y1=\"39.9\" x2=\"35.2\" y2=\"40.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.3\" y1=\"40.3\" x2=\"34.7\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.3\" y1=\"40.8\" x2=\"34.3\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.2\" y1=\"41.5\" x2=\"48.25\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.3\" y1=\"40.8\" x2=\"34.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.3\" y=\"44.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.7\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2D\">\n<contactref element=\"IC2\" pad=\"26\"/>\n<contactref element=\"FPGA\" pad=\"81\"/>\n<wire x1=\"46.9\" y1=\"40.3\" x2=\"47.5\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.6\" y1=\"40.6\" x2=\"46.9\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.1\" y1=\"40.6\" x2=\"46.6\" y2=\"40.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.2\" y1=\"43.5\" x2=\"46.1\" y2=\"40.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.6\" y1=\"43.5\" x2=\"43.2\" y2=\"43.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"36\" y1=\"41.9\" x2=\"37.6\" y2=\"43.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"36\" y1=\"41.7\" x2=\"36\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"41.5\" x2=\"36\" y2=\"41.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"40.9\" x2=\"35.8\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"40.3\" x2=\"47.5\" y2=\"40.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"40.9\" x2=\"35.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.6\" y=\"40.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"36\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3D\">\n<contactref element=\"IC2\" pad=\"27\"/>\n<contactref element=\"FPGA\" pad=\"79\"/>\n<wire x1=\"46.6\" y1=\"39.8\" x2=\"47.5\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.4\" y1=\"39.8\" x2=\"46.6\" y2=\"39.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"45.5\" y1=\"40.7\" x2=\"46.4\" y2=\"39.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.6\" y1=\"40.7\" x2=\"45.5\" y2=\"40.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.7\" y1=\"40.7\" x2=\"42.6\" y2=\"40.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.9\" y1=\"43.5\" x2=\"41.7\" y2=\"40.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38\" y1=\"43.5\" x2=\"38.9\" y2=\"43.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.6\" y1=\"42.1\" x2=\"38\" y2=\"43.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.6\" y1=\"41\" x2=\"36.6\" y2=\"42.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.7\" y1=\"40.9\" x2=\"36.6\" y2=\"41\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"39.8\" x2=\"47.5\" y2=\"39.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.7\" y1=\"40.9\" x2=\"36.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.6\" y=\"39.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"42.6\" y=\"40.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4D\">\n<contactref element=\"IC2\" pad=\"28\"/>\n<contactref element=\"FPGA\" pad=\"78\"/>\n<wire x1=\"46.2\" y1=\"39.2\" x2=\"47.5\" y2=\"39.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.3\" y1=\"40.1\" x2=\"46.2\" y2=\"39.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44\" y1=\"40.1\" x2=\"45.3\" y2=\"40.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.6\" y1=\"42.5\" x2=\"44\" y2=\"40.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39\" y1=\"42.5\" x2=\"41.6\" y2=\"42.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"38.4\" y1=\"41.9\" x2=\"39\" y2=\"42.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.2\" y1=\"41.9\" x2=\"38.4\" y2=\"41.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.2\" y1=\"40.9\" x2=\"37.2\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"39.2\" x2=\"47.5\" y2=\"39.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.2\" y1=\"40.9\" x2=\"37.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"45.3\" y=\"40.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"37.2\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5D\">\n<contactref element=\"IC2\" pad=\"29\"/>\n<contactref element=\"FPGA\" pad=\"77\"/>\n<wire x1=\"45.8\" y1=\"38.8\" x2=\"47.5\" y2=\"38.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.7\" y1=\"38.9\" x2=\"45.8\" y2=\"38.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.7\" y1=\"39.7\" x2=\"45.7\" y2=\"38.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45.9\" y1=\"39.9\" x2=\"45.7\" y2=\"39.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45.9\" y1=\"40.3\" x2=\"45.9\" y2=\"39.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.3\" y1=\"42.9\" x2=\"45.9\" y2=\"40.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"38.6\" y1=\"42.9\" x2=\"43.3\" y2=\"42.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"38.6\" y1=\"42.6\" x2=\"38.6\" y2=\"42.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.8\" y1=\"41.8\" x2=\"38.6\" y2=\"42.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.8\" y1=\"40.9\" x2=\"37.8\" y2=\"41.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"38.8\" x2=\"47.5\" y2=\"38.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.8\" y1=\"40.9\" x2=\"37.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"45.7\" y=\"38.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"38.6\" y=\"42.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6D\">\n<contactref element=\"IC2\" pad=\"30\"/>\n<contactref element=\"FPGA\" pad=\"76\"/>\n<wire x1=\"43.5\" y1=\"38.3\" x2=\"47.5\" y2=\"38.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.3\" y1=\"38.3\" x2=\"43.5\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"38.8\" y1=\"39.8\" x2=\"40.3\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"38.3\" y1=\"40.3\" x2=\"38.8\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.3\" y1=\"40.8\" x2=\"38.3\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"38.3\" x2=\"47.5\" y2=\"38.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.3\" y1=\"40.8\" x2=\"38.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"43.5\" y=\"38.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"38.8\" y=\"39.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7D\">\n<contactref element=\"IC2\" pad=\"31\"/>\n<contactref element=\"FPGA\" pad=\"75\"/>\n<wire x1=\"45.3\" y1=\"37.7\" x2=\"47.5\" y2=\"37.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.9\" y1=\"37.7\" x2=\"45.3\" y2=\"37.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.6\" y1=\"40\" x2=\"44.9\" y2=\"37.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.9\" y1=\"40\" x2=\"42.6\" y2=\"40\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.4\" y1=\"42.5\" x2=\"41.9\" y2=\"40\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39\" y1=\"42.5\" x2=\"39.4\" y2=\"42.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"42.1\" x2=\"39\" y2=\"42.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"41\" x2=\"38.6\" y2=\"42.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.7\" y1=\"40.9\" x2=\"38.6\" y2=\"41\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"37.7\" x2=\"47.5\" y2=\"37.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.7\" y1=\"40.9\" x2=\"38.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"45.3\" y=\"37.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"41.9\" y=\"40\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L135\">\n<contactref element=\"FPGA\" pad=\"135\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"4\"/>\n<wire x1=\"21.9\" y1=\"25.9\" x2=\"20.3\" y2=\"25.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.9\" y1=\"26.2\" x2=\"21.9\" y2=\"25.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.9\" y1=\"27.2\" x2=\"21.9\" y2=\"26.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.9\" y1=\"30.1\" x2=\"22.9\" y2=\"27.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.2\" y1=\"31.8\" x2=\"22.9\" y2=\"30.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21\" y1=\"31.8\" x2=\"21.2\" y2=\"31.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.8\" y1=\"33\" x2=\"21\" y2=\"31.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.8\" y1=\"37\" x2=\"19.8\" y2=\"33\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.4\" y1=\"37.4\" x2=\"19.8\" y2=\"37\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.9\" y1=\"37.4\" x2=\"19.4\" y2=\"37.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.7\" y1=\"37.2\" x2=\"15.9\" y2=\"37.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.5\" y1=\"37.2\" x2=\"15.7\" y2=\"37.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"40.7\" x2=\"-6.5\" y2=\"37.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"25.9\" x2=\"20.21\" y2=\"25.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"40.7\" x2=\"-10\" y2=\"40.71\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.9\" y=\"25.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L140\">\n<contactref element=\"FPGA\" pad=\"140\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"3\"/>\n<wire x1=\"21.3\" y1=\"23.3\" x2=\"20.3\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.6\" y1=\"23\" x2=\"21.3\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"23\" x2=\"21.6\" y2=\"23\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.6\" y1=\"23.6\" x2=\"22\" y2=\"23\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.6\" y1=\"26.4\" x2=\"22.6\" y2=\"23.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.3\" y1=\"28.1\" x2=\"22.6\" y2=\"26.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.3\" y1=\"37.9\" x2=\"24.3\" y2=\"28.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.8\" y1=\"39.4\" x2=\"24.3\" y2=\"37.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"41.9\" x2=\"22.8\" y2=\"39.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-8.7\" y1=\"41.9\" x2=\"20.3\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"43.2\" x2=\"-8.7\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"23.3\" x2=\"20.21\" y2=\"23.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"43.2\" x2=\"-10\" y2=\"43.25\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"22.6\" y=\"23.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"22.8\" y=\"39.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"20.3\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L21_SDA\">\n<contactref element=\"FPGA\" pad=\"21\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"13\"/>\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"13\"/>\n<contactref element=\"R_SDA\" pad=\"1\"/>\n<contactref element=\"DAC1\" pad=\"3\"/>\n<wire x1=\"1.9\" y1=\"31.1\" x2=\"0.9\" y2=\"31.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.4\" y1=\"32.6\" x2=\"1.9\" y2=\"31.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.4\" y1=\"32.6\" x2=\"3.4\" y2=\"32.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.9\" y1=\"31.1\" x2=\"10.65\" y2=\"31.35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.65\" y1=\"31.35\" x2=\"9.4\" y2=\"32.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"31.1\" x2=\"10.9\" y2=\"31.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"31.1\" x2=\"0.825\" y2=\"31.075\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"31.1\" x2=\"11.625\" y2=\"31.075\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"20\" x2=\"32.2\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30\" y1=\"22.2\" x2=\"32.2\" y2=\"20\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29\" y1=\"22.2\" x2=\"30\" y2=\"22.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.6\" y1=\"22.6\" x2=\"29\" y2=\"22.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.3\" y1=\"22.6\" x2=\"28.6\" y2=\"22.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.5\" y1=\"21.8\" x2=\"22.3\" y2=\"22.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.9\" y1=\"21.8\" x2=\"21.5\" y2=\"21.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.8\" y1=\"18.7\" x2=\"16.9\" y2=\"21.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13\" y1=\"18.7\" x2=\"13.8\" y2=\"18.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14\" y1=\"17.7\" x2=\"13\" y2=\"18.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"19.4\" x2=\"32.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14\" y1=\"17.7\" x2=\"14.05\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.4\" y1=\"29.5\" x2=\"70.9131\" y2=\"29.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"29.9\" x2=\"70.4\" y2=\"29.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"32.5\" x2=\"70\" y2=\"29.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"32.1\" x2=\"70\" y2=\"32.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.8\" y1=\"25.9\" x2=\"70\" y2=\"32.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.1\" y1=\"25.9\" x2=\"63.8\" y2=\"25.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.9\" y1=\"24.7\" x2=\"61.1\" y2=\"25.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.9\" y1=\"23.1\" x2=\"59.9\" y2=\"24.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.9\" y1=\"22.1\" x2=\"59.9\" y2=\"23.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.9\" y1=\"21.8\" x2=\"58.9\" y2=\"22.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.2\" y1=\"17.1\" x2=\"58.9\" y2=\"21.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.2\" y1=\"16.4\" x2=\"54.2\" y2=\"17.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"52.6\" y1=\"14.8\" x2=\"54.2\" y2=\"16.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.6\" y1=\"14.8\" x2=\"52.6\" y2=\"14.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.3\" y1=\"16.1\" x2=\"41.6\" y2=\"14.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.3\" y1=\"16.1\" x2=\"40.3\" y2=\"16.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.3\" y1=\"19.1\" x2=\"37.3\" y2=\"16.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.3\" y1=\"20.6\" x2=\"34.3\" y2=\"19.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.7\" y1=\"22.2\" x2=\"34.3\" y2=\"20.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30\" y1=\"22.2\" x2=\"32.7\" y2=\"22.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.4\" y1=\"31.1\" x2=\"10.65\" y2=\"31.35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.8\" y1=\"30.5\" x2=\"10.4\" y2=\"31.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.8\" y1=\"21.9\" x2=\"9.8\" y2=\"30.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13\" y1=\"18.7\" x2=\"9.8\" y2=\"21.9\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"30\" y=\"22.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13\" y=\"18.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"70\" y=\"32.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"58.9\" y=\"22.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.3\" y=\"16.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"10.4\" y=\"31.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED3\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"23\"/>\n<contactref element=\"LED3\" pad=\"A\"/>\n<wire x1=\"-1.2\" y1=\"11.9\" x2=\"-2.1\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.2\" y1=\"22.2\" x2=\"-1.2\" y2=\"11.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"26.5\" x2=\"-1.2\" y2=\"22.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.3\" y1=\"26.5\" x2=\"3.1\" y2=\"26.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.1\" y1=\"11\" x2=\"-2.18\" y2=\"10.96\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"26.5\" x2=\"4.375\" y2=\"26.525\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-1.2\" y=\"11.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3.1\" y=\"26.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED2\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"22\"/>\n<contactref element=\"LED2\" pad=\"A\"/>\n<wire x1=\"-3.4\" y1=\"11.9\" x2=\"-4.3\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.4\" y1=\"20.8\" x2=\"-3.4\" y2=\"11.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"27.3\" x2=\"-3.4\" y2=\"20.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.2\" y1=\"27.3\" x2=\"3.1\" y2=\"27.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"27.2\" x2=\"4.2\" y2=\"27.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.3\" y1=\"11\" x2=\"-4.38\" y2=\"10.97\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"27.2\" x2=\"4.375\" y2=\"27.175\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-3.4\" y=\"11.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3.1\" y=\"27.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"AIN1\">\n<contactref element=\"FPGA\" pad=\"3\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"2\"/>\n<wire x1=\"23.2\" y1=\"20.1\" x2=\"23.2\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"20.2\" x2=\"23.2\" y2=\"20.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"21.4\" x2=\"23.1\" y2=\"20.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"26.1\" x2=\"23.1\" y2=\"21.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"36.2\" x2=\"27.8\" y2=\"26.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.3\" y1=\"41.7\" x2=\"27.8\" y2=\"36.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.3\" y1=\"42.1\" x2=\"33.3\" y2=\"41.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.2\" y1=\"46\" x2=\"33.3\" y2=\"42.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.2\" y1=\"47.3\" x2=\"37.2\" y2=\"46\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"47.4\" x2=\"37.2\" y2=\"47.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.2\" y1=\"19.4\" x2=\"23.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"47.4\" x2=\"37.39\" y2=\"47.479\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"27.8\" y=\"26.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"37.2\" y=\"46\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"REF1\">\n<contactref element=\"IC1\" pad=\"6\"/>\n<contactref element=\"CREF1\" pad=\"1\"/>\n<wire x1=\"55.2\" y1=\"20.7\" x2=\"54.5\" y2=\"20.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.1\" y1=\"18.8\" x2=\"55.2\" y2=\"20.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"20.7\" x2=\"54.5\" y2=\"20.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.1\" y1=\"18.8\" x2=\"57.08\" y2=\"18.8\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INA-1\">\n<contactref element=\"IC1\" pad=\"2\"/>\n<contactref element=\"IC1\" pad=\"4\"/>\n<contactref element=\"C-AIN1\" pad=\"1\"/>\n<wire x1=\"55\" y1=\"18.7\" x2=\"54.5\" y2=\"18.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"17.7\" x2=\"55.95\" y2=\"17.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.95\" y1=\"17.75\" x2=\"55\" y2=\"18.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"16.8\" x2=\"56\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"18.7\" x2=\"54.5\" y2=\"18.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"16.8\" x2=\"56.08\" y2=\"16.74\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.6\" y1=\"19.8\" x2=\"54.5\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"19.4\" x2=\"55.6\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"17.8\" x2=\"56\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"19.8\" x2=\"54.5\" y2=\"19.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"17.8\" x2=\"55.95\" y2=\"17.75\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"LOW_22\">\n<contactref element=\"FPGA\" pad=\"22\"/>\n<contactref element=\"IC1\" pad=\"47\"/>\n<contactref element=\"IC2\" pad=\"47\"/>\n<wire x1=\"53.3\" y1=\"16.9\" x2=\"53.3\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"16.6\" x2=\"53.3\" y2=\"16.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"31.3\" x2=\"53.6\" y2=\"16.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.9\" y1=\"31.6\" x2=\"53.6\" y2=\"31.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.9\" y1=\"33.4\" x2=\"53.9\" y2=\"31.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.3\" y1=\"34\" x2=\"53.9\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.3\" y1=\"34.5\" x2=\"53.3\" y2=\"34\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.3\" y1=\"17.5\" x2=\"53.25\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.3\" y1=\"34.5\" x2=\"53.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"17.4\" x2=\"32.7\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37\" y1=\"13.1\" x2=\"32.7\" y2=\"17.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"50.1\" y1=\"13.1\" x2=\"37\" y2=\"13.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.6\" y1=\"16.6\" x2=\"50.1\" y2=\"13.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.7\" y1=\"19.3\" x2=\"32.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"53.6\" y=\"16.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"53.9\" y=\"33.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"32.7\" y=\"17.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L134\">\n<contactref element=\"FPGA\" pad=\"134\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"5\"/>\n<wire x1=\"21.5\" y1=\"26.3\" x2=\"20.3\" y2=\"26.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.7\" y1=\"28.5\" x2=\"21.5\" y2=\"26.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.7\" y1=\"37.7\" x2=\"23.7\" y2=\"28.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.7\" y1=\"39.3\" x2=\"23.7\" y2=\"37.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.1\" y1=\"46.9\" x2=\"23.7\" y2=\"39.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.2\" y1=\"46.9\" x2=\"16.1\" y2=\"46.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.5\" y1=\"36.2\" x2=\"13.2\" y2=\"46.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-8.1\" y1=\"36.2\" x2=\"2.5\" y2=\"36.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"38.1\" x2=\"-8.1\" y2=\"36.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"26.3\" x2=\"20.21\" y2=\"26.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"38.1\" x2=\"-10\" y2=\"38.17\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"23.7\" y=\"28.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.7\" y=\"37.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"2.5\" y=\"36.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LOW_24\">\n<contactref element=\"FPGA\" pad=\"24\"/>\n<contactref element=\"IC1\" pad=\"46\"/>\n<contactref element=\"IC2\" pad=\"46\"/>\n<wire x1=\"52.8\" y1=\"16.6\" x2=\"52.8\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.8\" y1=\"31\" x2=\"52.8\" y2=\"16.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.3\" y1=\"31.5\" x2=\"52.8\" y2=\"31\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.3\" y1=\"32.8\" x2=\"53.3\" y2=\"31.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.3\" y1=\"33.4\" x2=\"53.3\" y2=\"32.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.8\" y1=\"33.9\" x2=\"53.3\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.8\" y1=\"34.5\" x2=\"52.8\" y2=\"33.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.8\" y1=\"17.5\" x2=\"52.75\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.8\" y1=\"34.5\" x2=\"52.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.7\" y1=\"20.4\" x2=\"33.7\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.7\" y1=\"18.3\" x2=\"33.7\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.6\" y1=\"18.2\" x2=\"33.7\" y2=\"18.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.6\" y1=\"17.8\" x2=\"33.6\" y2=\"18.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37\" y1=\"14.4\" x2=\"33.6\" y2=\"17.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"50.6\" y1=\"14.4\" x2=\"37\" y2=\"14.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.8\" y1=\"16.6\" x2=\"50.6\" y2=\"14.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.7\" y1=\"19.4\" x2=\"33.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"52.8\" y=\"16.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"53.3\" y=\"32.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.7\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LOW_25\">\n<contactref element=\"FPGA\" pad=\"25\"/>\n<contactref element=\"IC1\" pad=\"45\"/>\n<contactref element=\"IC2\" pad=\"45\"/>\n<wire x1=\"52.2\" y1=\"17\" x2=\"52.2\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"51.8\" y1=\"16.6\" x2=\"52.2\" y2=\"17\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50\" y1=\"14.8\" x2=\"51.8\" y2=\"16.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.4\" y1=\"14.8\" x2=\"50\" y2=\"14.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.2\" y1=\"18\" x2=\"37.4\" y2=\"14.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.2\" y1=\"19.3\" x2=\"34.2\" y2=\"18\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.2\" y1=\"17.5\" x2=\"52.25\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.2\" y1=\"19.3\" x2=\"34.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.2\" y1=\"33.2\" x2=\"52.2\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"51.6\" y1=\"32.6\" x2=\"52.2\" y2=\"33.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.7\" y1=\"31.7\" x2=\"51.6\" y2=\"32.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"50.7\" y1=\"17.7\" x2=\"50.7\" y2=\"31.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"51.8\" y1=\"16.6\" x2=\"50.7\" y2=\"17.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"52.2\" y1=\"34.5\" x2=\"52.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"51.8\" y=\"16.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.2\" y=\"18\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"51.6\" y=\"32.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"REF2\">\n<contactref element=\"IC2\" pad=\"6\"/>\n<contactref element=\"CREF2\" pad=\"1\"/>\n<wire x1=\"55.3\" y1=\"37.8\" x2=\"54.5\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.2\" y1=\"39.7\" x2=\"55.3\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"37.8\" x2=\"54.5\" y2=\"37.75\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INA-2\">\n<contactref element=\"IC2\" pad=\"2\"/>\n<contactref element=\"IC2\" pad=\"4\"/>\n<contactref element=\"C-AIN3\" pad=\"1\"/>\n<wire x1=\"55.6\" y1=\"35.7\" x2=\"54.5\" y2=\"35.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.2\" y1=\"37.3\" x2=\"55.6\" y2=\"35.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.2\" y1=\"37.6\" x2=\"57.2\" y2=\"37.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"35.7\" x2=\"54.5\" y2=\"35.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.1\" y1=\"36.8\" x2=\"54.5\" y2=\"36.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.2\" y1=\"36.9\" x2=\"55.1\" y2=\"36.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.7\" y1=\"36.9\" x2=\"55.2\" y2=\"36.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"36.8\" x2=\"54.5\" y2=\"36.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.7\" y1=\"36.9\" x2=\"57.2\" y2=\"37.6\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"OSC1\">\n<contactref element=\"OSC\" pad=\"3\"/>\n<contactref element=\"FPGA\" pad=\"27\"/>\n<wire x1=\"35.2\" y1=\"19.3\" x2=\"35.2\" y2=\"17.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.2\" y1=\"17.3\" x2=\"35.215\" y2=\"17.21\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.2\" y1=\"19.3\" x2=\"35.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D0A\">\n<contactref element=\"IC1\" pad=\"34\"/>\n<contactref element=\"FPGA\" pad=\"47\"/>\n<wire x1=\"46.3\" y1=\"19.3\" x2=\"47.5\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.3\" y1=\"22.5\" x2=\"46.3\" y2=\"19.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.7\" y1=\"26.1\" x2=\"46.3\" y2=\"22.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.5\" y1=\"26.1\" x2=\"42.7\" y2=\"26.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.3\" y1=\"26.3\" x2=\"42.5\" y2=\"26.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"26.3\" x2=\"42.3\" y2=\"26.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"19.3\" x2=\"47.5\" y2=\"19.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"26.3\" x2=\"41.71\" y2=\"26.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.3\" y=\"19.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"42.7\" y=\"26.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D1A\">\n<contactref element=\"IC1\" pad=\"35\"/>\n<contactref element=\"FPGA\" pad=\"46\"/>\n<wire x1=\"43.4\" y1=\"18.7\" x2=\"47.5\" y2=\"18.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.1\" y1=\"22\" x2=\"43.4\" y2=\"18.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.1\" y1=\"24.9\" x2=\"40.1\" y2=\"22\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.7\" y1=\"25.5\" x2=\"40.1\" y2=\"24.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41\" y1=\"25.8\" x2=\"40.7\" y2=\"25.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"25.8\" x2=\"41\" y2=\"25.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"18.7\" x2=\"47.5\" y2=\"18.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"25.8\" x2=\"41.71\" y2=\"25.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"43.4\" y=\"18.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"25.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2A\">\n<contactref element=\"IC1\" pad=\"37\"/>\n<contactref element=\"FPGA\" pad=\"45\"/>\n<wire x1=\"47.6\" y1=\"17.5\" x2=\"48.25\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.8\" y1=\"17.5\" x2=\"47.6\" y2=\"17.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45\" y1=\"19.3\" x2=\"46.8\" y2=\"17.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45\" y1=\"20.6\" x2=\"45\" y2=\"19.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45\" y1=\"21\" x2=\"45\" y2=\"20.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.1\" y1=\"21.9\" x2=\"45\" y2=\"21\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.1\" y1=\"23.5\" x2=\"44.1\" y2=\"21.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.3\" y1=\"25.3\" x2=\"44.1\" y2=\"23.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"25.3\" x2=\"42.3\" y2=\"25.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"25.3\" x2=\"41.71\" y2=\"25.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"47.6\" y=\"17.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"45\" y=\"20.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3A\">\n<contactref element=\"IC1\" pad=\"38\"/>\n<contactref element=\"FPGA\" pad=\"44\"/>\n<wire x1=\"48.7\" y1=\"17\" x2=\"48.7\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.3\" y1=\"16.6\" x2=\"48.7\" y2=\"17\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.1\" y1=\"16.6\" x2=\"48.3\" y2=\"16.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.7\" y1=\"16.6\" x2=\"48.1\" y2=\"16.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.3\" y1=\"23\" x2=\"47.7\" y2=\"16.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.3\" y1=\"24.1\" x2=\"41.3\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.7\" y1=\"24.7\" x2=\"41.3\" y2=\"24.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41\" y1=\"24.7\" x2=\"40.7\" y2=\"24.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.1\" y1=\"24.8\" x2=\"41\" y2=\"24.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"24.8\" x2=\"41.1\" y2=\"24.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.7\" y1=\"17.5\" x2=\"48.75\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"24.8\" x2=\"41.71\" y2=\"24.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.1\" y=\"16.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"24.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4A\">\n<contactref element=\"IC1\" pad=\"39\"/>\n<contactref element=\"FPGA\" pad=\"43\"/>\n<wire x1=\"49.2\" y1=\"16.9\" x2=\"49.2\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.4\" y1=\"16.1\" x2=\"49.2\" y2=\"16.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.4\" y1=\"15.4\" x2=\"48.4\" y2=\"16.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.7\" y1=\"23.1\" x2=\"48.4\" y2=\"15.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.7\" y1=\"23.9\" x2=\"40.7\" y2=\"23.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.1\" y1=\"24.3\" x2=\"40.7\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"24.3\" x2=\"41.1\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.2\" y1=\"17.5\" x2=\"49.25\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"24.3\" x2=\"41.71\" y2=\"24.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.4\" y=\"15.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"23.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5A\">\n<contactref element=\"IC1\" pad=\"40\"/>\n<contactref element=\"FPGA\" pad=\"41\"/>\n<wire x1=\"49.7\" y1=\"16.6\" x2=\"49.7\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.9\" y1=\"19.4\" x2=\"49.7\" y2=\"16.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"46.9\" y1=\"19.5\" x2=\"46.9\" y2=\"19.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45.2\" y1=\"21.2\" x2=\"46.9\" y2=\"19.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.4\" y1=\"21.2\" x2=\"45.2\" y2=\"21.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.7\" y1=\"21.9\" x2=\"43.4\" y2=\"21.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.7\" y1=\"22.9\" x2=\"42.7\" y2=\"21.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.3\" y1=\"23.3\" x2=\"42.7\" y2=\"22.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"23.3\" x2=\"42.3\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.7\" y1=\"17.5\" x2=\"49.75\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"23.3\" x2=\"41.71\" y2=\"23.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"49.7\" y=\"16.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"42.7\" y=\"22.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6A\">\n<contactref element=\"IC1\" pad=\"41\"/>\n<contactref element=\"FPGA\" pad=\"39\"/>\n<wire x1=\"50.3\" y1=\"16.1\" x2=\"50.3\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50\" y1=\"16.1\" x2=\"50.3\" y2=\"16.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"49.9\" y1=\"16\" x2=\"50\" y2=\"16.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"46.9\" y1=\"16\" x2=\"49.9\" y2=\"16\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.7\" y1=\"22.2\" x2=\"46.9\" y2=\"16\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41\" y1=\"22.2\" x2=\"40.7\" y2=\"22.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.1\" y1=\"22.3\" x2=\"41\" y2=\"22.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"22.3\" x2=\"41.1\" y2=\"22.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.3\" y1=\"17.5\" x2=\"50.25\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"22.3\" x2=\"41.71\" y2=\"22.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"50.3\" y=\"16.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"22.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7A\">\n<contactref element=\"IC1\" pad=\"42\"/>\n<contactref element=\"FPGA\" pad=\"38\"/>\n<wire x1=\"50.8\" y1=\"16.7\" x2=\"50.8\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.9\" y1=\"16.6\" x2=\"50.8\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.6\" y1=\"16.6\" x2=\"50.9\" y2=\"16.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45.6\" y1=\"21.6\" x2=\"50.6\" y2=\"16.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.8\" y1=\"21.6\" x2=\"45.6\" y2=\"21.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.5\" y1=\"21.9\" x2=\"43.8\" y2=\"21.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.8\" y1=\"21.9\" x2=\"43.5\" y2=\"21.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.8\" y1=\"17.5\" x2=\"50.75\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"21.9\" x2=\"41.71\" y2=\"21.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"50.9\" y=\"16.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.5\" y=\"21.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D0B\">\n<contactref element=\"IC1\" pad=\"23\"/>\n<contactref element=\"FPGA\" pad=\"59\"/>\n<wire x1=\"48.8\" y1=\"25.9\" x2=\"48.8\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.5\" y1=\"31.2\" x2=\"48.8\" y2=\"25.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.5\" y1=\"31.3\" x2=\"43.5\" y2=\"31.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.5\" y1=\"32.3\" x2=\"43.5\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"32.3\" x2=\"42.5\" y2=\"32.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.8\" y1=\"24.5\" x2=\"48.75\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"32.3\" x2=\"41.71\" y2=\"32.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.8\" y=\"25.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.5\" y=\"31.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D1B\">\n<contactref element=\"IC1\" pad=\"24\"/>\n<contactref element=\"FPGA\" pad=\"58\"/>\n<wire x1=\"48.2\" y1=\"25.4\" x2=\"48.2\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"25.4\" x2=\"48.2\" y2=\"25.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"48.6\" y1=\"25.3\" x2=\"48.5\" y2=\"25.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"49\" y1=\"25.3\" x2=\"48.6\" y2=\"25.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"49.4\" y1=\"25.7\" x2=\"49\" y2=\"25.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"49.4\" y1=\"26.2\" x2=\"49.4\" y2=\"25.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.7\" y1=\"31.9\" x2=\"49.4\" y2=\"26.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.7\" y1=\"31.9\" x2=\"43.7\" y2=\"31.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.7\" y1=\"31.9\" x2=\"40.7\" y2=\"31.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.2\" y1=\"24.5\" x2=\"48.25\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"31.9\" x2=\"41.71\" y2=\"31.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.2\" y=\"25.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"31.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2B\">\n<contactref element=\"IC1\" pad=\"26\"/>\n<contactref element=\"FPGA\" pad=\"57\"/>\n<wire x1=\"46.6\" y1=\"23.3\" x2=\"47.5\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.6\" y1=\"27.4\" x2=\"46.6\" y2=\"23.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.7\" y1=\"31.3\" x2=\"46.6\" y2=\"27.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.8\" y1=\"31.3\" x2=\"42.7\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"23.3\" x2=\"47.5\" y2=\"23.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"31.3\" x2=\"41.71\" y2=\"31.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.6\" y=\"23.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"42.7\" y=\"31.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3B\">\n<contactref element=\"IC1\" pad=\"27\"/>\n<contactref element=\"FPGA\" pad=\"56\"/>\n<wire x1=\"46.4\" y1=\"22.7\" x2=\"47.5\" y2=\"22.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46\" y1=\"23.1\" x2=\"46.4\" y2=\"22.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46\" y1=\"24.1\" x2=\"46\" y2=\"23.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.1\" y1=\"24.2\" x2=\"46\" y2=\"24.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.1\" y1=\"27\" x2=\"46.1\" y2=\"24.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.4\" y1=\"27.7\" x2=\"46.1\" y2=\"27\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.6\" y1=\"29.5\" x2=\"45.4\" y2=\"27.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.3\" y1=\"30.8\" x2=\"43.6\" y2=\"29.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"30.8\" x2=\"42.3\" y2=\"30.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"22.7\" x2=\"47.5\" y2=\"22.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"30.8\" x2=\"41.71\" y2=\"30.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"45.4\" y=\"27.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.6\" y=\"29.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4B\">\n<contactref element=\"IC1\" pad=\"28\"/>\n<contactref element=\"FPGA\" pad=\"55\"/>\n<wire x1=\"46.3\" y1=\"22.3\" x2=\"47.5\" y2=\"22.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.5\" y1=\"23.1\" x2=\"46.3\" y2=\"22.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.5\" y1=\"24.4\" x2=\"45.5\" y2=\"23.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.5\" y1=\"24.6\" x2=\"45.5\" y2=\"24.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.3\" y1=\"28.8\" x2=\"45.5\" y2=\"24.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.3\" y1=\"30\" x2=\"41.3\" y2=\"28.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.7\" y1=\"30.6\" x2=\"41.3\" y2=\"30\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41\" y1=\"30.6\" x2=\"40.7\" y2=\"30.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.2\" y1=\"30.4\" x2=\"41\" y2=\"30.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"30.4\" x2=\"41.2\" y2=\"30.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"22.3\" x2=\"47.5\" y2=\"22.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"30.4\" x2=\"41.71\" y2=\"30.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"45.5\" y=\"24.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"30.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5B\">\n<contactref element=\"IC1\" pad=\"29\"/>\n<contactref element=\"FPGA\" pad=\"54\"/>\n<wire x1=\"46.3\" y1=\"21.8\" x2=\"47.5\" y2=\"21.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.9\" y1=\"23.2\" x2=\"46.3\" y2=\"21.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.9\" y1=\"26\" x2=\"44.9\" y2=\"23.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.2\" y1=\"27.7\" x2=\"44.9\" y2=\"26\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41\" y1=\"27.7\" x2=\"43.2\" y2=\"27.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.9\" y1=\"28.8\" x2=\"41\" y2=\"27.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.9\" y1=\"29.8\" x2=\"39.9\" y2=\"28.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"29.8\" x2=\"40.9\" y2=\"29.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"21.8\" x2=\"47.5\" y2=\"21.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"29.8\" x2=\"41.71\" y2=\"29.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"43.2\" y=\"27.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"39.9\" y=\"28.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6B\">\n<contactref element=\"IC1\" pad=\"30\"/>\n<contactref element=\"FPGA\" pad=\"52\"/>\n<wire x1=\"46\" y1=\"21.3\" x2=\"47.5\" y2=\"21.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.1\" y1=\"22.2\" x2=\"46\" y2=\"21.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.1\" y1=\"22.9\" x2=\"45.1\" y2=\"22.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.7\" y1=\"27.3\" x2=\"45.1\" y2=\"22.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.7\" y1=\"28.8\" x2=\"40.7\" y2=\"27.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.7\" y1=\"28.8\" x2=\"40.7\" y2=\"28.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"21.3\" x2=\"47.5\" y2=\"21.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"28.8\" x2=\"41.71\" y2=\"28.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"45.1\" y=\"22.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"28.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7B\">\n<contactref element=\"IC1\" pad=\"31\"/>\n<contactref element=\"FPGA\" pad=\"50\"/>\n<wire x1=\"45.7\" y1=\"20.8\" x2=\"47.5\" y2=\"20.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.5\" y1=\"22\" x2=\"45.7\" y2=\"20.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.5\" y1=\"25.6\" x2=\"44.5\" y2=\"22\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.3\" y1=\"27.8\" x2=\"44.5\" y2=\"25.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"27.8\" x2=\"42.3\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"20.8\" x2=\"47.5\" y2=\"20.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"27.8\" x2=\"41.71\" y2=\"27.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INA2\">\n<contactref element=\"U2\" pad=\"1\"/>\n<contactref element=\"GAINSW3\" pad=\"4\"/>\n<contactref element=\"OVSAMP1\" pad=\"1\"/>\n<wire x1=\"62\" y1=\"33.2\" x2=\"62\" y2=\"30.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"33.3\" x2=\"62\" y2=\"33.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"35.6\" x2=\"61.9\" y2=\"33.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"36.5\" x2=\"61.9\" y2=\"35.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"37.9\" x2=\"61\" y2=\"36.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"36.9\" x2=\"61\" y2=\"36.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"30.7\" x2=\"62.05\" y2=\"30.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"37.9\" x2=\"60.95\" y2=\"37.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.1\" y1=\"44.2\" x2=\"64.1\" y2=\"42.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.7\" y1=\"44.8\" x2=\"64.1\" y2=\"44.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.7\" y1=\"48.8\" x2=\"64.7\" y2=\"44.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.5\" y1=\"49\" x2=\"64.7\" y2=\"48.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.5\" y1=\"49\" x2=\"64.5\" y2=\"49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.2\" y1=\"48.7\" x2=\"62.5\" y2=\"49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.2\" y1=\"43\" x2=\"62.2\" y2=\"48.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.6\" y1=\"42.4\" x2=\"62.2\" y2=\"43\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.6\" y1=\"37.5\" x2=\"61.6\" y2=\"42.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61\" y1=\"36.9\" x2=\"61.6\" y2=\"37.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.1\" y1=\"42.9\" x2=\"64.095\" y2=\"42.8362\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.2\" y=\"48.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"61\" y=\"36.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB1\">\n<contactref element=\"IC1\" pad=\"9\"/>\n<contactref element=\"U1\" pad=\"7\"/>\n<contactref element=\"GAINSW2\" pad=\"4\"/>\n<contactref element=\"OVSAMP2\" pad=\"3\"/>\n<wire x1=\"55.6\" y1=\"22.2\" x2=\"54.5\" y2=\"22.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58\" y1=\"22.2\" x2=\"55.6\" y2=\"22.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.8\" y1=\"19.4\" x2=\"58\" y2=\"22.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.8\" y1=\"18.2\" x2=\"60.8\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.9\" y1=\"18.1\" x2=\"60.8\" y2=\"18.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"22.2\" x2=\"54.5\" y2=\"22.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.9\" y1=\"18.1\" x2=\"60.95\" y2=\"18.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.3\" y1=\"29.7\" x2=\"56.3\" y2=\"30.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.3\" y1=\"26\" x2=\"56.3\" y2=\"29.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"55.5\" y1=\"25.2\" x2=\"56.3\" y2=\"26\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"55.5\" y1=\"22.3\" x2=\"55.5\" y2=\"25.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"55.6\" y1=\"22.2\" x2=\"55.5\" y2=\"22.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"56.3\" y1=\"30.6\" x2=\"56.35\" y2=\"30.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.2\" y1=\"13.3\" x2=\"65.2\" y2=\"15.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.2\" y1=\"11.3\" x2=\"65.2\" y2=\"13.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.2\" y1=\"11.9\" x2=\"63.2\" y2=\"11.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.8\" y1=\"14.3\" x2=\"63.2\" y2=\"11.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.8\" y1=\"19.4\" x2=\"60.8\" y2=\"14.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"65.2\" y1=\"15.3\" x2=\"65.265\" y2=\"15.3638\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.6\" y=\"22.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"60.8\" y=\"19.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"56.3\" y=\"29.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.2\" y=\"11.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CLKOUTTOLEFT_28\">\n<contactref element=\"PIN_LEFT\" pad=\"8\"/>\n<contactref element=\"FPGA\" pad=\"28\"/>\n<wire x1=\"35.8\" y1=\"18.4\" x2=\"35.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"3.5\" x2=\"35.8\" y2=\"18.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.2\" y1=\"2.1\" x2=\"35.8\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35.8\" y1=\"19.3\" x2=\"35.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.2\" y1=\"2.1\" x2=\"37.29\" y2=\"2.1\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"35.8\" y=\"18.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED4\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"24\"/>\n<contactref element=\"LED4\" pad=\"A\"/>\n<wire x1=\"-1.1\" y1=\"11\" x2=\"0\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.1\" y1=\"11.2\" x2=\"-1.1\" y2=\"11\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.5\" y1=\"13.8\" x2=\"-1.1\" y2=\"11.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.5\" y1=\"24.1\" x2=\"1.5\" y2=\"13.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"25.7\" x2=\"1.5\" y2=\"24.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.2\" y1=\"25.7\" x2=\"3.1\" y2=\"25.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.375\" y1=\"25.875\" x2=\"4.2\" y2=\"25.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0\" y1=\"11\" x2=\"0\" y2=\"10.95\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-1.1\" y=\"11\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3.1\" y=\"25.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGOUTTOLEFT_106\">\n<contactref element=\"FPGA\" pad=\"106\"/>\n<contactref element=\"PIN_LEFT\" pad=\"4\"/>\n<wire x1=\"23.3\" y1=\"39.7\" x2=\"23.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"38.4\" x2=\"23.3\" y2=\"39.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"34.8\" x2=\"24.6\" y2=\"38.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.2\" y1=\"22.2\" x2=\"24.6\" y2=\"34.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.2\" y1=\"18.7\" x2=\"37.2\" y2=\"22.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.8\" y1=\"18.1\" x2=\"37.2\" y2=\"18.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.8\" y1=\"9.9\" x2=\"37.8\" y2=\"18.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30.9\" y1=\"3\" x2=\"37.8\" y2=\"9.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.1\" y1=\"3\" x2=\"30.9\" y2=\"3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.2\" y1=\"2.1\" x2=\"28.1\" y2=\"3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.3\" y1=\"40.8\" x2=\"23.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.2\" y1=\"2.1\" x2=\"27.13\" y2=\"2.1\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"24.6\" y=\"38.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"37.8\" y=\"9.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGINFROMRIGHT_86\">\n<contactref element=\"FPGA\" pad=\"86\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"5\"/>\n<wire x1=\"33.3\" y1=\"42.4\" x2=\"33.3\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.4\" y1=\"42.5\" x2=\"33.3\" y2=\"42.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.4\" y1=\"43.2\" x2=\"33.4\" y2=\"42.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.1\" y1=\"43.2\" x2=\"33.4\" y2=\"43.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33\" y1=\"43.3\" x2=\"33.1\" y2=\"43.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29\" y1=\"43.3\" x2=\"33\" y2=\"43.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"28.4\" y1=\"42.7\" x2=\"29\" y2=\"43.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"28\" y1=\"42.7\" x2=\"28.4\" y2=\"42.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"27.3\" y1=\"43.4\" x2=\"28\" y2=\"42.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"27.3\" y1=\"56.3\" x2=\"27.3\" y2=\"43.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.3\" y1=\"40.9\" x2=\"33.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.3\" y1=\"56.3\" x2=\"27.23\" y2=\"56.3\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"33.4\" y=\"43.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGOUTORIGHT_87\">\n<contactref element=\"FPGA\" pad=\"87\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"4\"/>\n<wire x1=\"32.8\" y1=\"42.7\" x2=\"32.8\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"48.7\" x2=\"32.8\" y2=\"42.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.9\" y1=\"48.8\" x2=\"32.8\" y2=\"48.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.9\" y1=\"53.2\" x2=\"32.9\" y2=\"48.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.8\" y1=\"56.3\" x2=\"32.9\" y2=\"53.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.8\" y1=\"40.9\" x2=\"32.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.8\" y1=\"56.3\" x2=\"29.77\" y2=\"56.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"32.8\" y=\"42.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALTORIGHT_RX_92\">\n<contactref element=\"FPGA\" pad=\"92\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"7\"/>\n<contactref element=\"U340G\" pad=\"3\"/>\n<wire x1=\"30.2\" y1=\"41.5\" x2=\"30.2\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.8\" y1=\"41.9\" x2=\"30.2\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.8\" y1=\"45.2\" x2=\"29.8\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27\" y1=\"48\" x2=\"29.8\" y2=\"45.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27\" y1=\"52.2\" x2=\"27\" y2=\"48\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.9\" y1=\"56.3\" x2=\"27\" y2=\"52.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.15\" y1=\"56.3\" x2=\"22.9\" y2=\"56.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.2\" y1=\"40.9\" x2=\"30.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21\" y1=\"55.2\" x2=\"12.4\" y2=\"55.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.1\" y1=\"56.3\" x2=\"21\" y2=\"55.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.1\" y1=\"56.3\" x2=\"22.15\" y2=\"56.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"29.8\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"7\" y1=\"53\" x2=\"7\" y2=\"52.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.4\" y1=\"54.4\" x2=\"7\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.3\" y1=\"54.4\" x2=\"8.4\" y2=\"54.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"54.4\" x2=\"11.3\" y2=\"54.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.4\" y1=\"55.2\" x2=\"11.6\" y2=\"54.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7\" y1=\"52.7\" x2=\"6.905\" y2=\"52.695\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"11.3\" y=\"54.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALFROMRIGHT_TX_93\">\n<contactref element=\"FPGA\" pad=\"93\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"6\"/>\n<contactref element=\"U340G\" pad=\"2\"/>\n<wire x1=\"29.7\" y1=\"40.3\" x2=\"29.7\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.2\" y1=\"39.8\" x2=\"29.7\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.2\" y1=\"40.6\" x2=\"29.2\" y2=\"39.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.4\" y1=\"43.4\" x2=\"29.2\" y2=\"40.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.4\" y1=\"54.6\" x2=\"26.4\" y2=\"49.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.4\" y1=\"49.5\" x2=\"26.4\" y2=\"43.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"24.7\" y1=\"56.3\" x2=\"26.4\" y2=\"54.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.7\" y1=\"40.8\" x2=\"29.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.7\" y1=\"56.3\" x2=\"24.69\" y2=\"56.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.4\" y1=\"49.5\" x2=\"16.1\" y2=\"49.5\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"29.2\" y=\"39.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"16.1\" y=\"49.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"8.2\" y1=\"51.8\" x2=\"8.2\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.5\" y1=\"49.5\" x2=\"8.2\" y2=\"51.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.1\" y1=\"49.5\" x2=\"10.5\" y2=\"49.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.2\" y1=\"52.6\" x2=\"8.175\" y2=\"52.695\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"SERIALTOLEFT_96\">\n<contactref element=\"FPGA\" pad=\"96\"/>\n<contactref element=\"PIN_LEFT\" pad=\"3\"/>\n<wire x1=\"28.3\" y1=\"38.1\" x2=\"28.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.4\" y1=\"31\" x2=\"28.3\" y2=\"38.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.4\" y1=\"23.2\" x2=\"35.4\" y2=\"31\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.4\" y1=\"22.4\" x2=\"35.4\" y2=\"23.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.7\" y1=\"18.1\" x2=\"35.4\" y2=\"22.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.7\" y1=\"12.5\" x2=\"39.7\" y2=\"18.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35\" y1=\"12.5\" x2=\"39.7\" y2=\"12.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.6\" y1=\"2.1\" x2=\"35\" y2=\"12.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.3\" y1=\"40.8\" x2=\"28.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"2.1\" x2=\"24.59\" y2=\"2.1\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"35.4\" y=\"23.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"39.7\" y=\"18.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"39.7\" y=\"12.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALFROMLEFT_98\">\n<contactref element=\"FPGA\" pad=\"98\"/>\n<contactref element=\"PIN_LEFT\" pad=\"2\"/>\n<wire x1=\"27.2\" y1=\"39.9\" x2=\"27.2\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.2\" y1=\"23.8\" x2=\"27.2\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27\" y1=\"23.6\" x2=\"27.2\" y2=\"23.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27\" y1=\"20.9\" x2=\"27\" y2=\"23.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"31.7\" y1=\"16.2\" x2=\"27\" y2=\"20.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"31.7\" y1=\"11.7\" x2=\"31.7\" y2=\"16.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.1\" y1=\"2.1\" x2=\"31.7\" y2=\"11.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.2\" y1=\"40.8\" x2=\"27.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"2.1\" x2=\"22.05\" y2=\"2.1\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"27.2\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"27\" y=\"23.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.7\" y=\"16.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CLKINFROMRIGHT_26\">\n<contactref element=\"FPGA\" pad=\"26\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"1\"/>\n<wire x1=\"34.8\" y1=\"25.8\" x2=\"34.8\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"27.7\" x2=\"34.8\" y2=\"25.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.5\" y1=\"35.4\" x2=\"34.8\" y2=\"27.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.5\" y1=\"35.6\" x2=\"42.5\" y2=\"35.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.4\" y1=\"36.5\" x2=\"42.5\" y2=\"35.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"46.4\" y1=\"36.5\" x2=\"43.4\" y2=\"36.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.6\" y1=\"42.7\" x2=\"46.4\" y2=\"36.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.6\" y1=\"44.2\" x2=\"52.6\" y2=\"42.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"44.6\" y1=\"52.2\" x2=\"52.6\" y2=\"44.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.5\" y1=\"52.2\" x2=\"44.6\" y2=\"52.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.2\" y1=\"52.5\" x2=\"42.5\" y2=\"52.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.2\" y1=\"52.5\" x2=\"42.2\" y2=\"52.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.4\" y1=\"56.3\" x2=\"41.2\" y2=\"52.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.8\" y1=\"19.4\" x2=\"34.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.4\" y1=\"56.3\" x2=\"37.39\" y2=\"56.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"34.8\" y=\"25.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SPARELEFT_102\">\n<contactref element=\"PIN_LEFT\" pad=\"7\"/>\n<contactref element=\"FPGA\" pad=\"102\"/>\n<wire x1=\"25.3\" y1=\"40.3\" x2=\"25.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"37.8\" x2=\"25.3\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32\" y1=\"37.8\" x2=\"27.8\" y2=\"37.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39.1\" y1=\"30.7\" x2=\"32\" y2=\"37.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39.1\" y1=\"6.4\" x2=\"39.1\" y2=\"30.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"36.4\" y1=\"3.7\" x2=\"39.1\" y2=\"6.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.8\" y1=\"2.1\" x2=\"36.4\" y2=\"3.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.3\" y1=\"40.8\" x2=\"25.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"2.1\" x2=\"34.75\" y2=\"2.1\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"27.8\" y=\"37.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"36.4\" y=\"3.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SPARERIGHT_99\">\n<contactref element=\"FPGA\" pad=\"99\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"2\"/>\n<wire x1=\"26.8\" y1=\"41.9\" x2=\"26.8\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.2\" y1=\"43.3\" x2=\"26.8\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.2\" y1=\"48.8\" x2=\"28.2\" y2=\"43.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.8\" y1=\"55.4\" x2=\"28.2\" y2=\"48.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.8\" y1=\"56.3\" x2=\"34.8\" y2=\"55.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.8\" y1=\"40.9\" x2=\"26.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"56.3\" x2=\"34.85\" y2=\"56.3\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"28.2\" y=\"43.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"5VINFROMUSB\" class=\"3\">\n<contactref element=\"SW_5V\" pad=\"1\"/>\n<contactref element=\"USB1\" pad=\"1\"/>\n<wire x1=\"18.75\" y1=\"51.9\" x2=\"16.8\" y2=\"53.85\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"39.6\" y1=\"51.9\" x2=\"18.75\" y2=\"51.9\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"41.55\" y1=\"51.9\" x2=\"39.6\" y2=\"51.9\" width=\"0.381\" layer=\"15\"/>\n<wire x1=\"42\" y1=\"51.45\" x2=\"41.55\" y2=\"51.9\" width=\"0.381\" layer=\"15\"/>\n<wire x1=\"42\" y1=\"51.45\" x2=\"42.1\" y2=\"51.3934\" width=\"0.381\" layer=\"15\"/>\n<via x=\"39.6\" y=\"51.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"11.1\" y1=\"55.8\" x2=\"-7.5\" y2=\"55.8\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"13.05\" y1=\"53.85\" x2=\"11.1\" y2=\"55.8\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"16.8\" y1=\"53.85\" x2=\"13.05\" y2=\"53.85\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"55.8\" x2=\"-7.56\" y2=\"55.9\" width=\"0.381\" layer=\"1\"/>\n</signal>\n<signal name=\"A13\">\n<contactref element=\"FPGA\" pad=\"13\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"14\"/>\n<wire x1=\"28.3\" y1=\"18.8\" x2=\"28.3\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.2\" y1=\"17.9\" x2=\"28.3\" y2=\"18.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.6\" y1=\"13.5\" x2=\"29.2\" y2=\"17.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.8\" y1=\"12.3\" x2=\"33.6\" y2=\"13.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.3\" y1=\"19.3\" x2=\"28.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"12.3\" x2=\"34.75\" y2=\"12.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"29.2\" y=\"17.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.6\" y=\"13.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A12\">\n<contactref element=\"FPGA\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"12\"/>\n<wire x1=\"27.8\" y1=\"18.5\" x2=\"27.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.4\" y1=\"17.9\" x2=\"27.8\" y2=\"18.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.5\" y1=\"19\" x2=\"28.4\" y2=\"17.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.9\" y1=\"19\" x2=\"29.5\" y2=\"19\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.1\" y1=\"17.8\" x2=\"30.9\" y2=\"19\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.1\" y1=\"16.6\" x2=\"32.1\" y2=\"17.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.3\" y1=\"16.4\" x2=\"32.1\" y2=\"16.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.3\" y1=\"13.7\" x2=\"32.3\" y2=\"16.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.3\" y1=\"12.3\" x2=\"32.3\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"19.3\" x2=\"27.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.3\" y1=\"12.3\" x2=\"32.21\" y2=\"12.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"28.4\" y=\"17.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"32.3\" y=\"13.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A11\">\n<contactref element=\"FPGA\" pad=\"11\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"10\"/>\n<wire x1=\"27.3\" y1=\"18.2\" x2=\"27.3\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.6\" y1=\"17.9\" x2=\"27.3\" y2=\"18.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.6\" y1=\"15.9\" x2=\"27.6\" y2=\"17.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.8\" y1=\"13.7\" x2=\"27.6\" y2=\"15.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.8\" y1=\"12.4\" x2=\"29.8\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.7\" y1=\"12.3\" x2=\"29.8\" y2=\"12.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.3\" y1=\"19.3\" x2=\"27.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.7\" y1=\"12.3\" x2=\"29.67\" y2=\"12.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"27.6\" y=\"17.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"29.8\" y=\"13.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A10\">\n<contactref element=\"FPGA\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"8\"/>\n<wire x1=\"26.8\" y1=\"17.9\" x2=\"26.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"14.7\" x2=\"26.8\" y2=\"17.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.8\" y1=\"13.7\" x2=\"26.8\" y2=\"14.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.8\" y1=\"12.9\" x2=\"27.8\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.2\" y1=\"12.3\" x2=\"27.8\" y2=\"12.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"19.3\" x2=\"26.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.2\" y1=\"12.3\" x2=\"27.13\" y2=\"12.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"26.8\" y=\"17.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"27.8\" y=\"13.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A8\">\n<contactref element=\"FPGA\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"6\"/>\n<wire x1=\"25.7\" y1=\"18\" x2=\"25.7\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"12.1\" x2=\"25.7\" y2=\"18\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.7\" y1=\"12.1\" x2=\"25.7\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"12.2\" x2=\"24.7\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"19.3\" x2=\"25.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"12.2\" x2=\"24.59\" y2=\"12.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"25.7\" y=\"18\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"25.7\" y=\"12.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A7\">\n<contactref element=\"FPGA\" pad=\"7\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"4\"/>\n<wire x1=\"25.2\" y1=\"18.3\" x2=\"25.2\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.6\" y1=\"16.7\" x2=\"25.2\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.6\" y1=\"14.3\" x2=\"23.6\" y2=\"16.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.3\" y1=\"14\" x2=\"23.6\" y2=\"14.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.1\" y1=\"12.8\" x2=\"23.3\" y2=\"14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"12.3\" x2=\"22.1\" y2=\"12.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.2\" y1=\"19.3\" x2=\"25.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"12.3\" x2=\"22.05\" y2=\"12.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"23.6\" y=\"16.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.3\" y=\"14\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A6\">\n<contactref element=\"FPGA\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"2\"/>\n<wire x1=\"24.7\" y1=\"20.4\" x2=\"24.7\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.8\" y1=\"15.5\" x2=\"24.7\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.8\" y1=\"13.7\" x2=\"19.8\" y2=\"15.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.8\" y1=\"12.5\" x2=\"19.8\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"12.3\" x2=\"19.8\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.7\" y1=\"19.4\" x2=\"24.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"12.3\" x2=\"19.51\" y2=\"12.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"24.7\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"19.8\" y=\"13.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A14\">\n<contactref element=\"FPGA\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"16\"/>\n<wire x1=\"28.7\" y1=\"20.4\" x2=\"28.7\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.5\" y1=\"20.4\" x2=\"28.7\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.2\" y1=\"13.7\" x2=\"30.5\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.2\" y1=\"12.3\" x2=\"37.2\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.7\" y1=\"19.4\" x2=\"28.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.2\" y1=\"12.3\" x2=\"37.29\" y2=\"12.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"28.7\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"37.2\" y=\"13.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB2\">\n<contactref element=\"U2\" pad=\"7\"/>\n<contactref element=\"GAINSW4\" pad=\"4\"/>\n<contactref element=\"OVSAMP2\" pad=\"1\"/>\n<wire x1=\"58.3\" y1=\"31.7\" x2=\"58.3\" y2=\"30.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.3\" y1=\"31.9\" x2=\"58.3\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.8\" y1=\"33.4\" x2=\"58.3\" y2=\"31.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.8\" y1=\"47.7\" x2=\"59.8\" y2=\"33.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.4\" y1=\"49.1\" x2=\"59.8\" y2=\"47.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.2\" y1=\"49.9\" x2=\"58.85\" y2=\"49.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.85\" y1=\"49.55\" x2=\"58.4\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.3\" y1=\"30.7\" x2=\"58.25\" y2=\"30.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.2\" y1=\"49.9\" x2=\"59.25\" y2=\"49.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"48.9\" x2=\"65.3\" y2=\"47.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.7\" y1=\"51.5\" x2=\"65.3\" y2=\"48.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.2\" y1=\"51.5\" x2=\"62.7\" y2=\"51.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.8\" y1=\"51.1\" x2=\"58.2\" y2=\"51.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.8\" y1=\"50.6\" x2=\"57.8\" y2=\"51.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.85\" y1=\"49.55\" x2=\"57.8\" y2=\"50.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"47.8\" x2=\"65.365\" y2=\"47.7638\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.3\" y=\"31.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"58.4\" y=\"49.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA1\">\n<contactref element=\"IC1\" pad=\"3\"/>\n<contactref element=\"U1\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"4\"/>\n<contactref element=\"OVSAMP1\" pad=\"3\"/>\n<wire x1=\"55.4\" y1=\"19.2\" x2=\"54.5\" y2=\"19.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.4\" y1=\"18.2\" x2=\"55.4\" y2=\"19.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.1\" y1=\"10.5\" x2=\"62.65\" y2=\"10.95\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.65\" y1=\"10.95\" x2=\"55.4\" y2=\"18.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.9\" y1=\"10.5\" x2=\"63.1\" y2=\"10.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"19.2\" x2=\"54.5\" y2=\"19.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.9\" y1=\"10.5\" x2=\"63.995\" y2=\"10.4362\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.1\" y1=\"6.4\" x2=\"59\" y2=\"5.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.65\" y1=\"10.95\" x2=\"58.1\" y2=\"6.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59\" y1=\"5.5\" x2=\"59.05\" y2=\"5.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.1\" y1=\"29.7\" x2=\"60.1\" y2=\"30.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.1\" y1=\"28.9\" x2=\"60.1\" y2=\"29.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.2\" y1=\"26\" x2=\"60.1\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.3\" y1=\"26\" x2=\"57.2\" y2=\"26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55\" y1=\"24.7\" x2=\"56.3\" y2=\"26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55\" y1=\"19.6\" x2=\"55\" y2=\"24.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.4\" y1=\"19.2\" x2=\"55\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.1\" y1=\"30.6\" x2=\"60.15\" y2=\"30.69\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.4\" y=\"19.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.1\" y=\"10.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"58.1\" y=\"6.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"60.1\" y=\"29.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_29\">\n<contactref element=\"FPGA\" pad=\"29\"/>\n<contactref element=\"PIN_IO_1\" pad=\"9\"/>\n<wire x1=\"36.2\" y1=\"20.4\" x2=\"36.2\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.2\" y1=\"21.6\" x2=\"36.2\" y2=\"20.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.2\" y1=\"35.6\" x2=\"36.2\" y2=\"21.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.2\" y1=\"38.9\" x2=\"22.2\" y2=\"35.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"45.7\" x2=\"22.2\" y2=\"38.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"36.2\" y1=\"19.4\" x2=\"36.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"45.7\" x2=\"15.4\" y2=\"45.79\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"36.2\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L131\">\n<contactref element=\"FPGA\" pad=\"131\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"6\"/>\n<wire x1=\"21\" y1=\"27.9\" x2=\"20.3\" y2=\"27.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.3\" y1=\"28.2\" x2=\"21\" y2=\"27.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.7\" y1=\"28.2\" x2=\"21.3\" y2=\"28.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.9\" y1=\"28.4\" x2=\"21.7\" y2=\"28.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.6\" y1=\"28.4\" x2=\"21.9\" y2=\"28.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.4\" y1=\"28.2\" x2=\"21.6\" y2=\"28.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21\" y1=\"28.2\" x2=\"21.4\" y2=\"28.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.4\" y1=\"29.8\" x2=\"21\" y2=\"28.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.4\" y1=\"30.4\" x2=\"19.4\" y2=\"29.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.1\" y1=\"34.7\" x2=\"19.4\" y2=\"30.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.1\" y1=\"34.7\" x2=\"15.1\" y2=\"34.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"35.6\" x2=\"-9.1\" y2=\"34.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"27.9\" x2=\"20.21\" y2=\"27.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"35.6\" x2=\"-10\" y2=\"35.63\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.9\" y=\"28.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L132\">\n<contactref element=\"FPGA\" pad=\"132\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"7\"/>\n<wire x1=\"21\" y1=\"27.4\" x2=\"20.3\" y2=\"27.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"27.6\" x2=\"21\" y2=\"27.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.7\" y1=\"27.6\" x2=\"21.2\" y2=\"27.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.1\" y1=\"27.6\" x2=\"21.7\" y2=\"27.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.1\" y1=\"29.6\" x2=\"17.1\" y2=\"27.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.2\" y1=\"29.6\" x2=\"15.1\" y2=\"29.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.9\" y1=\"29.9\" x2=\"13.2\" y2=\"29.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.8\" y1=\"33\" x2=\"12.9\" y2=\"29.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10\" y1=\"33\" x2=\"9.8\" y2=\"33\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"27.4\" x2=\"20.21\" y2=\"27.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"33\" x2=\"-10\" y2=\"33.09\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.7\" y=\"27.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"12.9\" y=\"29.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"9.8\" y=\"33\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"5VINFROMRIGHT\" class=\"3\">\n<contactref element=\"PIN_RIGHT\" pad=\"3\"/>\n<contactref element=\"SW_5V\" pad=\"3\"/>\n<wire x1=\"40.35\" y1=\"55.5\" x2=\"42\" y2=\"55.5\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"38.25\" y1=\"57.6\" x2=\"40.35\" y2=\"55.5\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"33.6\" y1=\"57.6\" x2=\"38.25\" y2=\"57.6\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"32.4\" y1=\"56.4\" x2=\"33.6\" y2=\"57.6\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"42\" y1=\"55.5\" x2=\"42.1\" y2=\"55.4066\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"32.4\" y1=\"56.4\" x2=\"32.31\" y2=\"56.3\" width=\"0.381\" layer=\"1\"/>\n</signal>\n<signal name=\"CLKOUT_32\">\n<contactref element=\"FPGA\" pad=\"32\"/>\n<contactref element=\"IC1\" pad=\"15\"/>\n<wire x1=\"52.75\" y1=\"24.5\" x2=\"52.75\" y2=\"26.25\" width=\"0.3048\" layer=\"1\"/>\n<wire x1=\"52.75\" y1=\"26.25\" x2=\"52\" y2=\"27\" width=\"0.3048\" layer=\"1\"/>\n<via x=\"52\" y=\"27\" extent=\"1-16\" drill=\"0.35\"/>\n<wire x1=\"37.9\" y1=\"27\" x2=\"37.7\" y2=\"26.8\" width=\"0.3048\" layer=\"15\"/>\n<wire x1=\"37.7\" y1=\"26.8\" x2=\"37\" y2=\"26.1\" width=\"0.3048\" layer=\"15\"/>\n<wire x1=\"52\" y1=\"27\" x2=\"37.9\" y2=\"27\" width=\"0.3048\" layer=\"15\"/>\n<wire x1=\"37.8\" y1=\"20.8\" x2=\"37.8\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.8\" y1=\"26.7\" x2=\"37.8\" y2=\"20.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.8\" y1=\"19.4\" x2=\"37.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.8\" y1=\"26.7\" x2=\"37.7\" y2=\"26.8\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"37.8\" y=\"20.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_101\">\n<contactref element=\"FPGA\" pad=\"101\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"15\"/>\n<wire x1=\"25.7\" y1=\"42.8\" x2=\"25.7\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"44.4\" x2=\"25.7\" y2=\"42.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.8\" y1=\"44.5\" x2=\"25.7\" y2=\"44.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.8\" y1=\"47.6\" x2=\"25.8\" y2=\"44.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.8\" y1=\"52.6\" x2=\"25.8\" y2=\"47.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.4\" y1=\"52.6\" x2=\"20.8\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.7\" y1=\"53.3\" x2=\"20.4\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"40.9\" x2=\"25.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.7\" y1=\"53.3\" x2=\"19.61\" y2=\"53.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"25.7\" y=\"42.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"20.8\" y=\"52.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_100\">\n<contactref element=\"FPGA\" pad=\"100\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"13\"/>\n<wire x1=\"26.3\" y1=\"42.3\" x2=\"26.3\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.3\" y1=\"43\" x2=\"26.3\" y2=\"42.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.2\" y1=\"43.1\" x2=\"26.3\" y2=\"43\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.2\" y1=\"49.7\" x2=\"26.2\" y2=\"43.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.3\" y1=\"52.6\" x2=\"26.2\" y2=\"49.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.9\" y1=\"52.6\" x2=\"23.3\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"53.3\" x2=\"22.9\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.3\" y1=\"40.9\" x2=\"26.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"53.3\" x2=\"22.15\" y2=\"53.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"26.3\" y=\"42.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.3\" y=\"52.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_91\">\n<contactref element=\"FPGA\" pad=\"91\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"11\"/>\n<wire x1=\"30.7\" y1=\"39.9\" x2=\"30.7\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.9\" y1=\"39.9\" x2=\"30.7\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.6\" y1=\"43.2\" x2=\"29.9\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.6\" y1=\"51.8\" x2=\"26.6\" y2=\"43.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.8\" y1=\"52.6\" x2=\"26.6\" y2=\"51.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.4\" y1=\"52.6\" x2=\"25.8\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.7\" y1=\"53.3\" x2=\"25.4\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.7\" y1=\"40.8\" x2=\"30.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.7\" y1=\"53.3\" x2=\"24.69\" y2=\"53.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"30.7\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"25.8\" y=\"52.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_90\">\n<contactref element=\"FPGA\" pad=\"90\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"9\"/>\n<wire x1=\"31.2\" y1=\"41.4\" x2=\"31.2\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.6\" y1=\"42\" x2=\"31.2\" y2=\"41.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.6\" y1=\"46.9\" x2=\"30.6\" y2=\"42\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.4\" y1=\"49.1\" x2=\"30.6\" y2=\"46.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.4\" y1=\"52.6\" x2=\"28.4\" y2=\"49.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28\" y1=\"52.6\" x2=\"28.4\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.3\" y1=\"53.3\" x2=\"28\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.2\" y1=\"40.9\" x2=\"31.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.3\" y1=\"53.3\" x2=\"27.23\" y2=\"53.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"30.6\" y=\"42\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"28.4\" y=\"52.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_89\">\n<contactref element=\"FPGA\" pad=\"89\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"7\"/>\n<wire x1=\"31.7\" y1=\"41.7\" x2=\"31.7\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.4\" y1=\"42\" x2=\"31.7\" y2=\"41.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.4\" y1=\"46.6\" x2=\"31.4\" y2=\"42\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.6\" y1=\"47.4\" x2=\"31.4\" y2=\"46.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.6\" y1=\"53.1\" x2=\"30.6\" y2=\"47.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.9\" y1=\"53.4\" x2=\"30.6\" y2=\"53.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.8\" y1=\"53.4\" x2=\"30.9\" y2=\"53.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.7\" y1=\"40.9\" x2=\"31.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.8\" y1=\"53.4\" x2=\"29.77\" y2=\"53.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"31.4\" y=\"42\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"30.9\" y=\"53.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_88\">\n<contactref element=\"FPGA\" pad=\"88\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"5\"/>\n<wire x1=\"32.2\" y1=\"42\" x2=\"32.2\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"48.3\" x2=\"32.2\" y2=\"42\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.2\" y1=\"49.3\" x2=\"32.2\" y2=\"48.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.2\" y1=\"52.6\" x2=\"31.2\" y2=\"49.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.6\" y1=\"52.6\" x2=\"31.2\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.3\" y1=\"53.3\" x2=\"31.6\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"40.9\" x2=\"32.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.3\" y1=\"53.3\" x2=\"32.31\" y2=\"53.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"32.2\" y=\"42\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.2\" y=\"52.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGINFROMLEFT_105\">\n<contactref element=\"FPGA\" pad=\"105\"/>\n<contactref element=\"PIN_LEFT\" pad=\"5\"/>\n<wire x1=\"23.8\" y1=\"40.3\" x2=\"23.8\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.7\" y1=\"32.4\" x2=\"23.8\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.1\" y1=\"32.4\" x2=\"31.7\" y2=\"32.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.2\" y1=\"31.3\" x2=\"33.1\" y2=\"32.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.2\" y1=\"22.5\" x2=\"34.2\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.2\" y1=\"20.7\" x2=\"34.2\" y2=\"22.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35.2\" y1=\"19.7\" x2=\"34.2\" y2=\"20.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35.2\" y1=\"7.3\" x2=\"35.2\" y2=\"19.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30\" y1=\"2.1\" x2=\"35.2\" y2=\"7.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.67\" y1=\"2.1\" x2=\"30\" y2=\"2.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"23.8\" y1=\"40.8\" x2=\"23.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"34.2\" y=\"22.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB-1\">\n<contactref element=\"IC1\" pad=\"10\"/>\n<contactref element=\"C-AIN2\" pad=\"1\"/>\n<contactref element=\"IC1\" pad=\"11\"/>\n<wire x1=\"54.5\" y1=\"23.25\" x2=\"54.5\" y2=\"22.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.8\" y1=\"22.8\" x2=\"54.5\" y2=\"22.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.1\" y1=\"21.5\" x2=\"55.8\" y2=\"22.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.1\" y1=\"20.8\" x2=\"57.1\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"22.8\" x2=\"54.5\" y2=\"22.75\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INB-2\">\n<contactref element=\"C-AIN4\" pad=\"1\"/>\n<contactref element=\"IC2\" pad=\"10\"/>\n<contactref element=\"IC2\" pad=\"11\"/>\n<wire x1=\"54.5\" y1=\"40.25\" x2=\"54.5\" y2=\"39.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55\" y1=\"40.3\" x2=\"54.5\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"41.5\" x2=\"55\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"42\" x2=\"56.2\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"40.3\" x2=\"54.5\" y2=\"40.25\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INAMINUS1\">\n<contactref element=\"U1\" pad=\"2\"/>\n<contactref element=\"RGAIN1_1\" pad=\"2\"/>\n<contactref element=\"RGAIN2_1\" pad=\"2\"/>\n<contactref element=\"CGAIN1_1\" pad=\"1\"/>\n<contactref element=\"RIN1\" pad=\"2\"/>\n<contactref element=\"RIN1_10K\" pad=\"2\"/>\n<contactref element=\"CIN1NF_1\" pad=\"2\"/>\n<contactref element=\"CIN5_1\" pad=\"1\"/>\n<contactref element=\"CIN56_1\" pad=\"2\"/>\n<contactref element=\"CH1\" pad=\"+\"/>\n<contactref element=\"CL1\" pad=\"+\"/>\n<wire x1=\"70\" y1=\"7.9\" x2=\"69\" y2=\"7.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69\" y1=\"7.9\" x2=\"66.4\" y2=\"7.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"7.9\" x2=\"70\" y2=\"7.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69\" y1=\"7.9\" x2=\"71\" y2=\"9.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"9.9\" x2=\"71\" y2=\"9.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"9\" x2=\"65.3\" y2=\"10.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"7.9\" x2=\"65.55\" y2=\"8.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.55\" y1=\"8.75\" x2=\"65.3\" y2=\"9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"10.4\" x2=\"65.265\" y2=\"10.4362\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"7.9\" x2=\"66.4\" y2=\"7.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.9\" y1=\"9\" x2=\"60.9\" y2=\"6.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.3\" y1=\"6.2\" x2=\"63.8\" y2=\"6.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"6.6\" x2=\"61.3\" y2=\"6.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"6.6\" x2=\"60.85\" y2=\"6.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.4\" y1=\"7.8\" x2=\"65.7\" y2=\"7.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.7\" y1=\"7.8\" x2=\"66\" y2=\"7.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.8\" y1=\"6.2\" x2=\"65.4\" y2=\"7.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"7.8\" x2=\"66\" y2=\"7.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.8\" y1=\"6.2\" x2=\"63.8\" y2=\"6.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"10\" x2=\"61.9\" y2=\"11.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"9\" x2=\"61.9\" y2=\"10\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"11.6\" x2=\"61.95\" y2=\"11.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"9\" x2=\"60.85\" y2=\"9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.3\" y1=\"11.9\" x2=\"64.7\" y2=\"11.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62\" y1=\"11.6\" x2=\"62.3\" y2=\"11.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62\" y1=\"11.6\" x2=\"61.95\" y2=\"11.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.5\" y1=\"11.9\" x2=\"69\" y2=\"11.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.6\" y1=\"12.8\" x2=\"68.5\" y2=\"11.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"12.8\" x2=\"67.6\" y2=\"12.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"11.9\" x2=\"66\" y2=\"12.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"11.9\" x2=\"65.1\" y2=\"11.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"11.9\" x2=\"69\" y2=\"11.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"11.9\" x2=\"64.7\" y2=\"11.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.7\" y1=\"8.9\" x2=\"65.55\" y2=\"8.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.7\" y1=\"7.8\" x2=\"65.7\" y2=\"8.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.7\" y1=\"7.8\" x2=\"66\" y2=\"7.85\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65.7\" y=\"8.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INBMINUS1\">\n<contactref element=\"U1\" pad=\"6\"/>\n<contactref element=\"CGAIN1_2\" pad=\"1\"/>\n<contactref element=\"RGAIN1_2\" pad=\"2\"/>\n<contactref element=\"RGAIN2_2\" pad=\"2\"/>\n<contactref element=\"RIN2_10K\" pad=\"2\"/>\n<contactref element=\"RIN2\" pad=\"2\"/>\n<contactref element=\"CIN1NF_2\" pad=\"2\"/>\n<contactref element=\"CIN5_2\" pad=\"1\"/>\n<contactref element=\"CIN56_2\" pad=\"2\"/>\n<contactref element=\"CH2\" pad=\"+\"/>\n<contactref element=\"CL2\" pad=\"+\"/>\n<wire x1=\"70\" y1=\"20.9\" x2=\"66.4\" y2=\"20.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"20.9\" x2=\"66.4\" y2=\"20.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"20.9\" x2=\"70\" y2=\"20.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"19.8\" x2=\"71\" y2=\"15.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"20.8\" x2=\"71\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"20.8\" x2=\"70\" y2=\"20.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"18.2\" x2=\"66.1\" y2=\"18.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.1\" y1=\"18.2\" x2=\"65.8\" y2=\"18.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"18.2\" x2=\"64.9\" y2=\"18.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"18.2\" x2=\"64.9\" y2=\"18.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"18.2\" x2=\"67.1\" y2=\"18.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"18.4\" x2=\"61.4\" y2=\"16.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"18.4\" x2=\"61.35\" y2=\"18.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"15.7\" x2=\"61.9\" y2=\"14.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"14.1\" x2=\"61.9\" y2=\"13.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"16.2\" x2=\"61.9\" y2=\"15.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"13.9\" x2=\"61.95\" y2=\"13.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"16.2\" x2=\"61.35\" y2=\"16.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"14.1\" x2=\"64.7\" y2=\"14.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"14.1\" x2=\"61.95\" y2=\"13.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.5\" y1=\"14.1\" x2=\"69\" y2=\"14.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.6\" y1=\"15\" x2=\"68.5\" y2=\"14.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.6\" y1=\"15\" x2=\"65.8\" y2=\"15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"15\" x2=\"67.6\" y2=\"15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"14.1\" x2=\"65.6\" y2=\"15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"14.1\" x2=\"69\" y2=\"14.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"14.1\" x2=\"64.7\" y2=\"14.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"15\" x2=\"65.8\" y2=\"17.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"17.1\" x2=\"65.8\" y2=\"18.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.5\" y1=\"15.9\" x2=\"66.5\" y2=\"15.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"17.1\" x2=\"66.5\" y2=\"15.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.8\" y1=\"17.1\" x2=\"65.3\" y2=\"17.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.5\" y1=\"15.4\" x2=\"66.535\" y2=\"15.3638\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"20.3\" x2=\"66.4\" y2=\"20.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.1\" y1=\"20\" x2=\"66.4\" y2=\"20.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.1\" y1=\"18.2\" x2=\"66.1\" y2=\"20\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65.3\" y=\"17.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"66.1\" y=\"20\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INBMINUS2\">\n<contactref element=\"U2\" pad=\"6\"/>\n<contactref element=\"RGAIN1_4\" pad=\"2\"/>\n<contactref element=\"RGAIN2_4\" pad=\"2\"/>\n<contactref element=\"CGAIN1_4\" pad=\"1\"/>\n<contactref element=\"RIN4_10K\" pad=\"2\"/>\n<contactref element=\"RIN4\" pad=\"2\"/>\n<contactref element=\"CIN1NF_4\" pad=\"2\"/>\n<contactref element=\"CIN5_4\" pad=\"1\"/>\n<contactref element=\"CIN56_4\" pad=\"2\"/>\n<contactref element=\"CH4\" pad=\"+\"/>\n<contactref element=\"CL4\" pad=\"+\"/>\n<wire x1=\"64.1\" y1=\"46.6\" x2=\"61.75\" y2=\"46.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.1\" y1=\"46.6\" x2=\"64.1\" y2=\"46.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"51.1\" x2=\"61.2\" y2=\"48.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.5\" y1=\"50.7\" x2=\"63.9\" y2=\"50.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.1\" y1=\"51.1\" x2=\"63.5\" y2=\"50.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"51.1\" x2=\"63.1\" y2=\"51.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"50.7\" x2=\"63.9\" y2=\"50.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"51.1\" x2=\"61.15\" y2=\"51.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.7\" y1=\"50.6\" x2=\"66.1\" y2=\"50.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"50.2\" x2=\"65.7\" y2=\"50.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.3\" y1=\"50.2\" x2=\"65.3\" y2=\"50.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"50.6\" x2=\"64.3\" y2=\"50.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"50.6\" x2=\"63.9\" y2=\"50.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.7\" y1=\"48.4\" x2=\"61.7\" y2=\"46.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"48.9\" x2=\"61.7\" y2=\"48.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.7\" y1=\"46.6\" x2=\"61.75\" y2=\"46.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"48.9\" x2=\"61.15\" y2=\"48.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.3\" y1=\"53.1\" x2=\"65.9\" y2=\"53.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"53.2\" x2=\"67.3\" y2=\"53.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.5\" y1=\"53.2\" x2=\"67.4\" y2=\"53.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"53.1\" x2=\"69.5\" y2=\"53.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"53.1\" x2=\"65.9\" y2=\"53.09788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"53.1\" x2=\"69.6\" y2=\"53.09788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.5\" y1=\"48.6\" x2=\"69.15\" y2=\"47.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.15\" y1=\"47.95\" x2=\"71\" y2=\"46.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.5\" y1=\"48.8\" x2=\"68.5\" y2=\"48.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.3\" y1=\"49\" x2=\"68.5\" y2=\"48.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.5\" y1=\"49\" x2=\"68.3\" y2=\"49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.7\" y1=\"48.2\" x2=\"67.5\" y2=\"49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.7\" y1=\"47.8\" x2=\"66.7\" y2=\"48.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"46.1\" x2=\"71\" y2=\"46.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.7\" y1=\"47.8\" x2=\"66.635\" y2=\"47.7638\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.5\" y1=\"46.6\" x2=\"70.5\" y2=\"46.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.3\" y1=\"45.8\" x2=\"71.5\" y2=\"46.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.2\" y1=\"45.8\" x2=\"72.3\" y2=\"45.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"46\" x2=\"71.2\" y2=\"45.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.5\" y1=\"46.6\" x2=\"70.5\" y2=\"46.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"46\" x2=\"71\" y2=\"46.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"51.3\" x2=\"69.6\" y2=\"53.09788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.5\" y1=\"50.4\" x2=\"69.6\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.5\" y1=\"49.3\" x2=\"70.5\" y2=\"50.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.15\" y1=\"47.95\" x2=\"70.5\" y2=\"49.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.5\" y1=\"50.6\" x2=\"66.1\" y2=\"50.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.3\" y1=\"45.8\" x2=\"67.5\" y2=\"50.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.1\" y1=\"50.6\" x2=\"66.1\" y2=\"50.65\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"72.3\" y=\"45.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67.5\" y=\"50.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"DCLKA1\">\n<contactref element=\"IC1\" pad=\"44\"/>\n</signal>\n<signal name=\"DORB1\">\n<contactref element=\"IC1\" pad=\"19\"/>\n</signal>\n<signal name=\"DCLKB1\">\n<contactref element=\"IC1\" pad=\"20\"/>\n</signal>\n<signal name=\"DORA1\">\n<contactref element=\"IC1\" pad=\"43\"/>\n</signal>\n<signal name=\"DORA2\">\n<contactref element=\"IC2\" pad=\"43\"/>\n</signal>\n<signal name=\"DCLKA2\">\n<contactref element=\"IC2\" pad=\"44\"/>\n</signal>\n<signal name=\"DORB2\">\n<contactref element=\"IC2\" pad=\"19\"/>\n</signal>\n<signal name=\"DCLKB2\">\n<contactref element=\"IC2\" pad=\"20\"/>\n</signal>\n<signal name=\"OFFSET1\">\n<contactref element=\"U1\" pad=\"3\"/>\n<contactref element=\"COFFSETB6\" pad=\"2\"/>\n<contactref element=\"ROFFSET1\" pad=\"1\"/>\n<contactref element=\"COFFSETA6\" pad=\"2\"/>\n<wire x1=\"79.7\" y1=\"28.4\" x2=\"71.7\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"85.5\" y1=\"22.6\" x2=\"79.7\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"85.5\" y1=\"13\" x2=\"85.5\" y2=\"22.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"85.3\" y1=\"12.8\" x2=\"85.5\" y2=\"13\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.3\" y1=\"12.8\" x2=\"85.3\" y2=\"12.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.7\" y1=\"14.4\" x2=\"83.3\" y2=\"12.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"14.4\" x2=\"81.7\" y2=\"14.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"12.9\" x2=\"75\" y2=\"14.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.4\" y1=\"12.9\" x2=\"73.5\" y2=\"12.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70\" y1=\"12.5\" x2=\"70.2\" y2=\"12.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.2\" y1=\"12.7\" x2=\"70.4\" y2=\"12.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70\" y1=\"11.1\" x2=\"70\" y2=\"12.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.8\" y1=\"10.9\" x2=\"70\" y2=\"11.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.2\" y1=\"10.9\" x2=\"69.8\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"10.7\" x2=\"68.2\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"8.6\" x2=\"68\" y2=\"10.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.6\" y1=\"8\" x2=\"68\" y2=\"8.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.7\" y1=\"28.4\" x2=\"71.7\" y2=\"28.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.9\" y1=\"5.4\" x2=\"70.9\" y2=\"4.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.7\" y1=\"6.6\" x2=\"70.9\" y2=\"5.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.7\" y1=\"6.9\" x2=\"69.7\" y2=\"6.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.6\" y1=\"8\" x2=\"69.7\" y2=\"6.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.6\" y1=\"11.5\" x2=\"66.6\" y2=\"10.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68\" y1=\"12.9\" x2=\"66.6\" y2=\"11.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"12.9\" x2=\"68\" y2=\"12.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.2\" y1=\"12.7\" x2=\"70\" y2=\"12.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.6\" y1=\"10.5\" x2=\"66.535\" y2=\"10.4362\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"70\" y=\"12.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET2\">\n<contactref element=\"U1\" pad=\"5\"/>\n<contactref element=\"COFFSETB8\" pad=\"2\"/>\n<contactref element=\"ROFFSET2\" pad=\"1\"/>\n<contactref element=\"COFFSETA1\" pad=\"2\"/>\n<wire x1=\"69.5\" y1=\"26.2\" x2=\"69.5\" y2=\"28.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.7\" y1=\"25\" x2=\"69.5\" y2=\"26.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.7\" y1=\"23.7\" x2=\"70.7\" y2=\"25\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"21\" x2=\"70.7\" y2=\"23.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"19.4\" x2=\"68\" y2=\"21\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"18.3\" x2=\"68\" y2=\"19.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"18.2\" x2=\"71.3\" y2=\"18.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"18.3\" x2=\"69.2\" y2=\"18.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.9\" y1=\"15.3\" x2=\"67.9\" y2=\"15.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.2\" y1=\"15\" x2=\"69.9\" y2=\"15.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.2\" y1=\"15\" x2=\"70.2\" y2=\"15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.2\" y1=\"15.7\" x2=\"72.2\" y2=\"15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"15.8\" x2=\"72.2\" y2=\"15.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"17.4\" x2=\"72.1\" y2=\"15.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.3\" y1=\"18.2\" x2=\"72.1\" y2=\"17.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"15.3\" x2=\"67.805\" y2=\"15.3638\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"72.2\" y=\"15\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET3\">\n<contactref element=\"U2\" pad=\"3\"/>\n<contactref element=\"COFFSETB10\" pad=\"2\"/>\n<contactref element=\"ROFFSET3\" pad=\"1\"/>\n<contactref element=\"COFFSETA2\" pad=\"2\"/>\n<wire x1=\"68.3\" y1=\"27.4\" x2=\"67.3\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.3\" y1=\"28.5\" x2=\"68.3\" y2=\"27.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"70.6\" y1=\"30.8\" x2=\"68.3\" y2=\"28.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"70.6\" y1=\"38.5\" x2=\"70.6\" y2=\"30.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"70.6\" y1=\"38.9\" x2=\"70.6\" y2=\"38.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.5\" y1=\"39.8\" x2=\"70.6\" y2=\"38.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.3\" y1=\"28.4\" x2=\"67.3\" y2=\"28.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.6\" y1=\"38.7\" x2=\"69.3\" y2=\"40\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.6\" y1=\"38.7\" x2=\"70.6\" y2=\"38.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.7\" y1=\"43.3\" x2=\"66.7\" y2=\"42.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.5\" y1=\"44.1\" x2=\"66.7\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.1\" y1=\"44.1\" x2=\"67.5\" y2=\"44.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.2\" y1=\"43\" x2=\"69.1\" y2=\"44.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.8\" y1=\"43\" x2=\"70.2\" y2=\"43\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"42.8\" x2=\"71.8\" y2=\"43\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"39.9\" x2=\"72\" y2=\"42.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.6\" y1=\"38.5\" x2=\"72\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.7\" y1=\"42.9\" x2=\"66.635\" y2=\"42.8362\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"68.3\" y=\"27.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"70.6\" y=\"38.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET4\">\n<contactref element=\"U2\" pad=\"5\"/>\n<contactref element=\"COFFSETB12\" pad=\"2\"/>\n<contactref element=\"ROFFSET4\" pad=\"1\"/>\n<contactref element=\"COFFSETA3\" pad=\"2\"/>\n<wire x1=\"64.1\" y1=\"28.5\" x2=\"65.1\" y2=\"28.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"30.7\" x2=\"64.1\" y2=\"28.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"36.4\" x2=\"61.9\" y2=\"30.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"37.3\" x2=\"61.9\" y2=\"36.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.3\" y1=\"39.7\" x2=\"61.9\" y2=\"37.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.3\" y1=\"43\" x2=\"64.3\" y2=\"39.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.8\" y1=\"45.5\" x2=\"64.3\" y2=\"43\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.4\" y1=\"46.1\" x2=\"66.8\" y2=\"45.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"49.3\" x2=\"67.4\" y2=\"46.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.7\" y1=\"50.6\" x2=\"67.4\" y2=\"49.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"50.6\" x2=\"68.7\" y2=\"50.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"28.5\" x2=\"65.1\" y2=\"28.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"50.9\" x2=\"71\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"50.6\" x2=\"69.2\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"46.6\" x2=\"67.9\" y2=\"47.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"45.5\" x2=\"67.9\" y2=\"46.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.9\" y1=\"47.7\" x2=\"67.905\" y2=\"47.7638\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"61.9\" y=\"36.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"66.8\" y=\"45.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$24\">\n<contactref element=\"SW_TERM1\" pad=\"3\"/>\n<contactref element=\"R10M_1\" pad=\"2\"/>\n<wire x1=\"84\" y1=\"11.8\" x2=\"84.5\" y2=\"11.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"82.4\" y1=\"10.2\" x2=\"84\" y2=\"11.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"80.5\" y1=\"10.2\" x2=\"82.4\" y2=\"10.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.1\" y1=\"2.8\" x2=\"80.5\" y2=\"10.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.1\" y1=\"1\" x2=\"73.1\" y2=\"2.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"84.5\" y1=\"11.8\" x2=\"84.5\" y2=\"11.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.1\" y1=\"1\" x2=\"73.0066\" y2=\"1\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INJ1\">\n<contactref element=\"SW_TERM1\" pad=\"2\"/>\n<contactref element=\"J1\" pad=\"SIGNAL\"/>\n<contactref element=\"K1\" pad=\"3\"/>\n<contactref element=\"C_AC1\" pad=\"2\"/>\n<wire x1=\"75.9\" y1=\"10.1\" x2=\"75.9\" y2=\"10.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"8.8\" x2=\"75.9\" y2=\"10.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"5.8\" x2=\"74.6\" y2=\"8.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"4.8\" x2=\"74.6\" y2=\"5.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.9\" y1=\"10.3\" x2=\"75.95\" y2=\"10.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"4.8\" x2=\"73.54\" y2=\"4.73\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"8.1\" x2=\"73\" y2=\"8.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"7.6\" x2=\"73\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"4.8\" x2=\"73.5\" y2=\"7.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"4.8\" x2=\"73.54\" y2=\"4.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"2.2\" x2=\"71\" y2=\"1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"4.7\" x2=\"71\" y2=\"2.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"4.7\" x2=\"73.54\" y2=\"4.73\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$27\">\n<contactref element=\"SW_TERM2\" pad=\"3\"/>\n<contactref element=\"R10M_2\" pad=\"2\"/>\n<wire x1=\"84\" y1=\"13.8\" x2=\"84.5\" y2=\"13.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"82.5\" y1=\"15.3\" x2=\"84\" y2=\"13.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"78.6\" y1=\"15.3\" x2=\"82.5\" y2=\"15.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"19.5\" x2=\"78.6\" y2=\"15.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"24\" x2=\"74.4\" y2=\"19.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.8\" y1=\"24.6\" x2=\"74.4\" y2=\"24\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84.5\" y1=\"13.8\" x2=\"84.5\" y2=\"13.75\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.8\" y1=\"24.6\" x2=\"73.7066\" y2=\"24.6\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$30\">\n<contactref element=\"SW_TERM3\" pad=\"3\"/>\n<contactref element=\"R10M_3\" pad=\"2\"/>\n<wire x1=\"83.4\" y1=\"43.6\" x2=\"84.4\" y2=\"44.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"83.4\" y1=\"41.2\" x2=\"83.4\" y2=\"43.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"77.3\" y1=\"35.1\" x2=\"83.4\" y2=\"41.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"75.1\" y1=\"35.1\" x2=\"77.3\" y2=\"35.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"73.7\" y1=\"33.7\" x2=\"75.1\" y2=\"35.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"84.4\" y1=\"44.6\" x2=\"84.4\" y2=\"44.65\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"33.7\" x2=\"73.6066\" y2=\"33.7\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"83.4\" y=\"43.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$33\">\n<contactref element=\"SW_TERM4\" pad=\"3\"/>\n<contactref element=\"R10M_4\" pad=\"2\"/>\n<wire x1=\"82.7\" y1=\"44.6\" x2=\"84.4\" y2=\"44.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"82.4\" y1=\"44.3\" x2=\"82.7\" y2=\"44.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.3\" y1=\"44.3\" x2=\"82.4\" y2=\"44.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.5\" y1=\"46.1\" x2=\"81.3\" y2=\"44.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"77.7\" y1=\"46.1\" x2=\"79.5\" y2=\"46.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"49.4\" x2=\"77.7\" y2=\"46.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"55.7\" x2=\"74.4\" y2=\"49.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.1\" y1=\"57\" x2=\"74.4\" y2=\"55.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84.4\" y1=\"44.6\" x2=\"84.4\" y2=\"44.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.1\" y1=\"57\" x2=\"73.0066\" y2=\"57\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"INA12\">\n<contactref element=\"OVSAMP1\" pad=\"4\"/>\n<contactref element=\"IC2\" pad=\"3\"/>\n<wire x1=\"55.4\" y1=\"36.3\" x2=\"54.5\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.4\" y1=\"32.8\" x2=\"55.4\" y2=\"36.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.3\" y1=\"28.9\" x2=\"55.4\" y2=\"32.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.1\" y1=\"28.1\" x2=\"59.3\" y2=\"28.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"36.3\" x2=\"54.5\" y2=\"36.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.1\" y1=\"28.1\" x2=\"60.15\" y2=\"28.1\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.4\" y=\"36.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"59.3\" y=\"28.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB12\">\n<contactref element=\"IC2\" pad=\"9\"/>\n<contactref element=\"OVSAMP2\" pad=\"4\"/>\n<wire x1=\"55.4\" y1=\"39.3\" x2=\"54.5\" y2=\"39.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.4\" y1=\"37.1\" x2=\"55.4\" y2=\"39.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.8\" y1=\"36.5\" x2=\"55.4\" y2=\"37.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.8\" y1=\"29.6\" x2=\"54.8\" y2=\"36.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.3\" y1=\"28.1\" x2=\"54.8\" y2=\"29.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"39.3\" x2=\"54.5\" y2=\"39.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.3\" y1=\"28.1\" x2=\"56.35\" y2=\"28.1\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.4\" y=\"39.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"54.8\" y=\"29.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_OVSAMP2\">\n<contactref element=\"OVSAMP2\" pad=\"6\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"26\"/>\n<wire x1=\"58.3\" y1=\"29.5\" x2=\"58.3\" y2=\"28.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.1\" y1=\"30.3\" x2=\"58.3\" y2=\"29.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.1\" y1=\"30.9\" x2=\"59.1\" y2=\"30.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.6\" y1=\"30.9\" x2=\"59.1\" y2=\"30.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54\" y1=\"34.5\" x2=\"57.6\" y2=\"30.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54\" y1=\"43.8\" x2=\"54\" y2=\"34.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.3\" y1=\"54.5\" x2=\"54\" y2=\"43.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.5\" y1=\"54.5\" x2=\"43.3\" y2=\"54.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.8\" y1=\"57.2\" x2=\"40.5\" y2=\"54.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.2\" y1=\"57.2\" x2=\"37.8\" y2=\"57.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.8\" y1=\"55.8\" x2=\"19.2\" y2=\"57.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.8\" y1=\"52.8\" x2=\"17.8\" y2=\"55.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.8\" y1=\"31.2\" x2=\"17.8\" y2=\"52.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.8\" y1=\"26.5\" x2=\"-3.8\" y2=\"31.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.8\" y1=\"26.4\" x2=\"-3.8\" y2=\"26.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.6\" y1=\"24.6\" x2=\"-3.8\" y2=\"26.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"24.6\" x2=\"-5.6\" y2=\"24.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.3\" y1=\"28.1\" x2=\"58.25\" y2=\"28.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"24.6\" x2=\"-6.425\" y2=\"24.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"59.1\" y=\"30.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"17.8\" y=\"55.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-3.8\" y=\"26.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED5\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"25\"/>\n<contactref element=\"LED5\" pad=\"A\"/>\n<wire x1=\"1.5\" y1=\"11\" x2=\"2.2\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.3\" y1=\"12.2\" x2=\"1.5\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-0.7\" y1=\"12.2\" x2=\"0.3\" y2=\"12.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-0.9\" y1=\"12.4\" x2=\"-0.7\" y2=\"12.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-0.9\" y1=\"20.7\" x2=\"-0.9\" y2=\"12.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.2\" y1=\"22.8\" x2=\"-0.9\" y2=\"20.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.7\" y1=\"22.8\" x2=\"1.2\" y2=\"22.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.3\" y1=\"24.4\" x2=\"1.7\" y2=\"22.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.3\" y1=\"24.8\" x2=\"3.3\" y2=\"24.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.7\" y1=\"25.2\" x2=\"3.3\" y2=\"24.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"25.2\" x2=\"3.7\" y2=\"25.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.2\" y1=\"11\" x2=\"2.2\" y2=\"10.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"25.2\" x2=\"4.375\" y2=\"25.225\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_GSW1\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"21\"/>\n<contactref element=\"GAINSW1\" pad=\"6\"/>\n<wire x1=\"60.9\" y1=\"5.2\" x2=\"60.9\" y2=\"5.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.1\" y1=\"2.4\" x2=\"60.9\" y2=\"5.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.3\" y1=\"2.4\" x2=\"58.1\" y2=\"2.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"51.4\" y1=\"-1.5\" x2=\"55.3\" y2=\"2.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.8\" y1=\"-1.5\" x2=\"51.4\" y2=\"-1.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.2\" y1=\"-0.9\" x2=\"17.8\" y2=\"-1.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.2\" y1=\"3.3\" x2=\"17.2\" y2=\"-0.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.1\" y1=\"3.4\" x2=\"17.2\" y2=\"3.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"3.4\" x2=\"17.1\" y2=\"3.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.3\" y1=\"3.2\" x2=\"15.5\" y2=\"3.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.3\" y1=\"-0.6\" x2=\"15.3\" y2=\"3.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.1\" y1=\"-0.8\" x2=\"15.3\" y2=\"-0.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.1\" y1=\"-0.8\" x2=\"15.1\" y2=\"-0.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.9\" y1=\"7\" x2=\"-1.1\" y2=\"-0.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.9\" y1=\"26.9\" x2=\"-8.9\" y2=\"7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8\" y1=\"27.8\" x2=\"-8.9\" y2=\"26.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"27.8\" x2=\"-8\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.9\" y1=\"5.5\" x2=\"60.95\" y2=\"5.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"27.8\" x2=\"-6.425\" y2=\"27.825\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_GSW2\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"22\"/>\n<contactref element=\"GAINSW2\" pad=\"6\"/>\n<wire x1=\"62.9\" y1=\"17.1\" x2=\"62.9\" y2=\"18.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"15.8\" x2=\"62.9\" y2=\"17.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.2\" y1=\"14.5\" x2=\"62.9\" y2=\"15.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.2\" y1=\"10.8\" x2=\"64.2\" y2=\"14.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"55.8\" y1=\"2.4\" x2=\"64.2\" y2=\"10.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.6\" y1=\"2.4\" x2=\"55.8\" y2=\"2.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.8\" y1=\"0.6\" x2=\"43.6\" y2=\"2.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.8\" y1=\"0.6\" x2=\"41.8\" y2=\"0.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8\" y1=\"-0.2\" x2=\"8.8\" y2=\"0.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-2\" y1=\"-0.2\" x2=\"8\" y2=\"-0.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.7\" y1=\"5.5\" x2=\"-2\" y2=\"-0.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.7\" y1=\"27.2\" x2=\"-7.7\" y2=\"5.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.5\" y1=\"27.2\" x2=\"-7.7\" y2=\"27.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"18.1\" x2=\"62.85\" y2=\"18.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"27.2\" x2=\"-6.425\" y2=\"27.175\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.9\" y=\"17.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-7.7\" y=\"27.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW3\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"23\"/>\n<contactref element=\"GAINSW3\" pad=\"6\"/>\n<wire x1=\"62.9\" y1=\"39.2\" x2=\"62.9\" y2=\"37.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"42.1\" x2=\"62.9\" y2=\"39.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.8\" y1=\"43\" x2=\"62.9\" y2=\"42.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.8\" y1=\"48.4\" x2=\"63.8\" y2=\"43\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"56.6\" y1=\"55.6\" x2=\"63.8\" y2=\"48.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"46\" y1=\"55.6\" x2=\"56.6\" y2=\"55.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.7\" y1=\"58.9\" x2=\"46\" y2=\"55.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.4\" y1=\"58.9\" x2=\"42.7\" y2=\"58.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.3\" y1=\"44.2\" x2=\"13.4\" y2=\"58.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.4\" y1=\"44.2\" x2=\"-1.3\" y2=\"44.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.9\" y1=\"43.7\" x2=\"-10.4\" y2=\"44.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.9\" y1=\"27.6\" x2=\"-10.9\" y2=\"43.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"26.7\" x2=\"-10.9\" y2=\"27.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-8.3\" y1=\"26.7\" x2=\"-10\" y2=\"26.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-8\" y1=\"26.7\" x2=\"-8.3\" y2=\"26.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.9\" y1=\"26.6\" x2=\"-8\" y2=\"26.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"26.6\" x2=\"-7.9\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"37.9\" x2=\"62.85\" y2=\"37.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"26.6\" x2=\"-6.425\" y2=\"26.525\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.9\" y=\"39.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-8.3\" y=\"26.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW4\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"24\"/>\n<contactref element=\"GAINSW4\" pad=\"6\"/>\n<wire x1=\"61.1\" y1=\"50.2\" x2=\"61.1\" y2=\"49.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.4\" y1=\"50.9\" x2=\"61.1\" y2=\"50.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.4\" y1=\"50.9\" x2=\"60.4\" y2=\"50.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.8\" y1=\"59.5\" x2=\"58.4\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.9\" y1=\"59.5\" x2=\"49.8\" y2=\"59.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4.6\" y1=\"35\" x2=\"19.9\" y2=\"59.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4.6\" y1=\"27\" x2=\"-4.6\" y2=\"35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-5.7\" y1=\"25.9\" x2=\"-4.6\" y2=\"27\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"25.9\" x2=\"-5.7\" y2=\"25.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.1\" y1=\"49.9\" x2=\"61.15\" y2=\"49.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"25.9\" x2=\"-6.425\" y2=\"25.875\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.4\" y=\"50.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-4.6\" y=\"27\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_OVSAMP1\">\n<contactref element=\"OVSAMP1\" pad=\"6\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"25\"/>\n<wire x1=\"62.9\" y1=\"28.1\" x2=\"62.05\" y2=\"28.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"27.9\" x2=\"62.9\" y2=\"28.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60\" y1=\"25\" x2=\"62.9\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60\" y1=\"22.4\" x2=\"60\" y2=\"25\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.6\" y1=\"17\" x2=\"60\" y2=\"22.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.6\" y1=\"10.6\" x2=\"54.6\" y2=\"17\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"44.5\" y1=\"0.5\" x2=\"54.6\" y2=\"10.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.9\" y1=\"0.5\" x2=\"44.5\" y2=\"0.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.4\" y1=\"1\" x2=\"41.9\" y2=\"0.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"38.5\" y1=\"1\" x2=\"41.4\" y2=\"1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.9\" y1=\"0.4\" x2=\"38.5\" y2=\"1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"27.3\" y1=\"0.4\" x2=\"37.9\" y2=\"0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"25.7\" y1=\"2\" x2=\"27.3\" y2=\"0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"25.7\" y1=\"2.5\" x2=\"25.7\" y2=\"2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.6\" y1=\"5.6\" x2=\"25.7\" y2=\"2.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"7.7\" y1=\"5.6\" x2=\"22.6\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.3\" y1=\"5.6\" x2=\"7.7\" y2=\"5.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.7\" y1=\"7.6\" x2=\"0.3\" y2=\"5.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.4\" y1=\"7.6\" x2=\"-1.7\" y2=\"7.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.8\" y1=\"8\" x2=\"-5.4\" y2=\"7.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.3\" y1=\"8\" x2=\"-5.8\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"8.2\" x2=\"-7.3\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"24.8\" x2=\"-7.5\" y2=\"8.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.1\" y1=\"25.2\" x2=\"-7.5\" y2=\"24.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"25.2\" x2=\"-7.1\" y2=\"25.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"25.2\" x2=\"-6.425\" y2=\"25.225\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.9\" y=\"28.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"7.7\" y=\"5.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L141_SCL\">\n<contactref element=\"FPGA\" pad=\"141\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"12\"/>\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"12\"/>\n<contactref element=\"R_SCL\" pad=\"1\"/>\n<contactref element=\"DAC1\" pad=\"2\"/>\n<wire x1=\"1.8\" y1=\"30.5\" x2=\"0.9\" y2=\"30.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.5\" y1=\"32.2\" x2=\"1.8\" y2=\"30.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"32.2\" x2=\"3.5\" y2=\"32.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.2\" y1=\"30.5\" x2=\"8.5\" y2=\"32.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"30.5\" x2=\"10.4\" y2=\"30.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.4\" y1=\"30.5\" x2=\"10.2\" y2=\"30.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"30.5\" x2=\"0.825\" y2=\"30.425\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"30.5\" x2=\"11.625\" y2=\"30.425\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"22.8\" x2=\"20.2\" y2=\"22.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.1\" y1=\"22.8\" x2=\"19\" y2=\"22.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.9\" y1=\"20.6\" x2=\"14.75\" y2=\"22.45\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.75\" y1=\"22.45\" x2=\"15.1\" y2=\"22.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.2\" y1=\"20.6\" x2=\"12.9\" y2=\"20.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14\" y1=\"19.8\" x2=\"13.2\" y2=\"20.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.2\" y1=\"22.8\" x2=\"20.21\" y2=\"22.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14\" y1=\"19.8\" x2=\"14.05\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.4\" y1=\"29\" x2=\"70.9131\" y2=\"29\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69\" y1=\"30.4\" x2=\"70.4\" y2=\"29\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69\" y1=\"32.5\" x2=\"69\" y2=\"30.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.4\" y1=\"32.5\" x2=\"69\" y2=\"32.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.2\" y1=\"30.3\" x2=\"68.4\" y2=\"32.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.2\" y1=\"30.3\" x2=\"66.2\" y2=\"30.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.3\" y1=\"29.4\" x2=\"41.2\" y2=\"30.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.7\" y1=\"29.4\" x2=\"40.3\" y2=\"29.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.3\" y1=\"23\" x2=\"39.7\" y2=\"29.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.2\" y1=\"23\" x2=\"33.3\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19\" y1=\"22.8\" x2=\"19.2\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.4\" y1=\"30.3\" x2=\"10.4\" y2=\"30.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.4\" y1=\"26.8\" x2=\"10.4\" y2=\"30.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.75\" y1=\"22.45\" x2=\"10.4\" y2=\"26.8\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"19\" y=\"22.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"12.9\" y=\"20.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"69\" y=\"32.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"10.4\" y=\"30.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_ACSW1\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"1\"/>\n<contactref element=\"ACR1\" pad=\"1\"/>\n<wire x1=\"-1.8\" y1=\"20.6\" x2=\"-1.8\" y2=\"19.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"23.2\" x2=\"-1.8\" y2=\"20.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.8\" y1=\"19.9\" x2=\"-1.85\" y2=\"19.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"23.2\" x2=\"0.825\" y2=\"23.275\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_ACSW2\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"2\"/>\n<contactref element=\"ACR2\" pad=\"1\"/>\n<wire x1=\"-1.9\" y1=\"18.2\" x2=\"-1.9\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.8\" y1=\"19.1\" x2=\"-1.9\" y2=\"18.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.8\" y1=\"21\" x2=\"-2.8\" y2=\"19.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.1\" y1=\"23.9\" x2=\"-2.8\" y2=\"21\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"23.9\" x2=\"0.1\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.9\" y1=\"17.7\" x2=\"-1.85\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"23.9\" x2=\"0.825\" y2=\"23.925\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_ACSW3\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"3\"/>\n<contactref element=\"ACR3\" pad=\"1\"/>\n<wire x1=\"-1.9\" y1=\"16\" x2=\"-1.9\" y2=\"15.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.2\" y1=\"17.3\" x2=\"-1.9\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.2\" y1=\"21.2\" x2=\"-3.2\" y2=\"17.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.1\" y1=\"24.5\" x2=\"-3.2\" y2=\"21.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"24.5\" x2=\"0.1\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.9\" y1=\"15.4\" x2=\"-1.85\" y2=\"15.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"24.5\" x2=\"0.825\" y2=\"24.575\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_ACSW4\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"4\"/>\n<contactref element=\"ACR4\" pad=\"1\"/>\n<wire x1=\"-1.9\" y1=\"13.7\" x2=\"-1.9\" y2=\"13.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.8\" y1=\"15.6\" x2=\"-1.9\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.8\" y1=\"21.3\" x2=\"-3.8\" y2=\"15.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.1\" y1=\"25.2\" x2=\"-3.8\" y2=\"21.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"25.2\" x2=\"0.1\" y2=\"25.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.9\" y1=\"13.2\" x2=\"-1.85\" y2=\"13.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"25.2\" x2=\"0.825\" y2=\"25.225\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_SHDN1\">\n<contactref element=\"IC1\" pad=\"7\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"5\"/>\n<wire x1=\"55.6\" y1=\"21.2\" x2=\"54.5\" y2=\"21.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.6\" y1=\"20.2\" x2=\"55.6\" y2=\"21.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54.2\" y1=\"18.8\" x2=\"55.6\" y2=\"20.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54.2\" y1=\"13.5\" x2=\"54.2\" y2=\"18.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.7\" y1=\"1\" x2=\"54.2\" y2=\"13.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.7\" y1=\"1\" x2=\"41.7\" y2=\"1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.9\" y1=\"0.2\" x2=\"8.7\" y2=\"1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.9\" y1=\"0.2\" x2=\"7.9\" y2=\"0.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.1\" y1=\"4.4\" x2=\"-1.9\" y2=\"0.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.1\" y1=\"20\" x2=\"-6.1\" y2=\"4.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.4\" y1=\"25.7\" x2=\"-6.1\" y2=\"20\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.7\" y1=\"25.7\" x2=\"-0.4\" y2=\"25.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"25.8\" x2=\"0.7\" y2=\"25.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"21.2\" x2=\"54.5\" y2=\"21.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"25.8\" x2=\"0.825\" y2=\"25.875\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.6\" y=\"21.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-0.4\" y=\"25.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L130\">\n<contactref element=\"FPGA\" pad=\"130\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"8\"/>\n<wire x1=\"20.8\" y1=\"28.4\" x2=\"20.3\" y2=\"28.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"28.8\" x2=\"20.8\" y2=\"28.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"30.2\" x2=\"21.2\" y2=\"28.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.5\" y1=\"31.9\" x2=\"21.2\" y2=\"30.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.5\" y1=\"32.4\" x2=\"19.5\" y2=\"31.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.9\" y1=\"33\" x2=\"19.5\" y2=\"32.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.9\" y1=\"33\" x2=\"18.9\" y2=\"33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.7\" y1=\"31.8\" x2=\"17.9\" y2=\"33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16\" y1=\"31.8\" x2=\"16.7\" y2=\"31.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.7\" y1=\"32.1\" x2=\"16\" y2=\"31.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.5\" y1=\"32.1\" x2=\"15.7\" y2=\"32.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.6\" y1=\"31\" x2=\"-6.5\" y2=\"32.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.6\" y1=\"31\" x2=\"-7.6\" y2=\"31\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"30.6\" x2=\"-9.6\" y2=\"31\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"28.4\" x2=\"20.21\" y2=\"28.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"30.6\" x2=\"-10\" y2=\"30.55\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.2\" y=\"28.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.9\" y=\"33\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"16.7\" y=\"31.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L127\">\n<contactref element=\"FPGA\" pad=\"127\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"9\"/>\n<wire x1=\"19.1\" y1=\"29.9\" x2=\"20.2\" y2=\"29.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.8\" y1=\"30.2\" x2=\"19.1\" y2=\"29.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.1\" y1=\"30.2\" x2=\"18.8\" y2=\"30.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.6\" y1=\"31.7\" x2=\"17.1\" y2=\"30.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5.6\" y1=\"31.7\" x2=\"15.6\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.2\" y1=\"28.1\" x2=\"-5.6\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"28.1\" x2=\"-9.2\" y2=\"28.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"29.9\" x2=\"20.21\" y2=\"29.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"28.1\" x2=\"-10\" y2=\"28.01\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"18.8\" y=\"30.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L124\">\n<contactref element=\"FPGA\" pad=\"124\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"10\"/>\n<wire x1=\"19.7\" y1=\"31.4\" x2=\"20.2\" y2=\"31.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.9\" y1=\"32.2\" x2=\"19.7\" y2=\"31.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.6\" y1=\"32.2\" x2=\"18.9\" y2=\"32.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.5\" y1=\"29.1\" x2=\"18.6\" y2=\"32.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.7\" y1=\"29.1\" x2=\"15.5\" y2=\"29.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"9.7\" y1=\"25.1\" x2=\"13.7\" y2=\"29.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-9.7\" y1=\"25.1\" x2=\"9.7\" y2=\"25.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10\" y1=\"25.4\" x2=\"-9.7\" y2=\"25.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.2\" y1=\"31.4\" x2=\"20.21\" y2=\"31.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"25.4\" x2=\"-10\" y2=\"25.47\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"18.9\" y=\"32.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_24_B0\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"1\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"1\"/>\n<wire x1=\"11.7\" y1=\"22.6\" x2=\"11.7\" y2=\"23.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"15.6\" x2=\"11.7\" y2=\"22.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.4\" y1=\"7.9\" x2=\"11.7\" y2=\"15.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.4\" y1=\"6.5\" x2=\"19.4\" y2=\"7.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.5\" y1=\"6.4\" x2=\"19.4\" y2=\"6.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"23.2\" x2=\"11.625\" y2=\"23.275\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.5\" y1=\"6.4\" x2=\"19.51\" y2=\"6.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"11.7\" y=\"22.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"19.4\" y=\"7.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_24_B1\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"3\"/>\n<wire x1=\"12.6\" y1=\"23.9\" x2=\"11.7\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"21.1\" x2=\"12.6\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.8\" y1=\"17.7\" x2=\"15.4\" y2=\"21.1\" width=\"0.1524\" layer=\"2\"/>\n<wire x1=\"18.8\" y1=\"10.6\" x2=\"18.8\" y2=\"17.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.4\" y1=\"9\" x2=\"18.8\" y2=\"10.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.4\" y1=\"8\" x2=\"20.4\" y2=\"9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"6.4\" x2=\"20.4\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"23.9\" x2=\"11.625\" y2=\"23.925\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"6.4\" x2=\"22.05\" y2=\"6.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"15.4\" y=\"21.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.8\" y=\"17.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"20.4\" y=\"9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_24_B2\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"3\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"5\"/>\n<wire x1=\"13.5\" y1=\"24.5\" x2=\"11.7\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.5\" y1=\"20\" x2=\"13.5\" y2=\"24.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.4\" y1=\"18.9\" x2=\"13.5\" y2=\"20\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.4\" y1=\"16.2\" x2=\"12.4\" y2=\"18.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.4\" y1=\"8.2\" x2=\"12.4\" y2=\"16.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.7\" y1=\"8.2\" x2=\"20.4\" y2=\"8.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"24.5\" y1=\"6.4\" x2=\"22.7\" y2=\"8.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"24.5\" x2=\"11.625\" y2=\"24.575\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"6.4\" x2=\"24.59\" y2=\"6.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"13.5\" y=\"24.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"22.7\" y=\"8.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_24_B3\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"7\"/>\n<wire x1=\"12.9\" y1=\"25.2\" x2=\"11.7\" y2=\"25.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.9\" y1=\"24.6\" x2=\"12.9\" y2=\"25.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"11.1\" y1=\"22.8\" x2=\"12.9\" y2=\"24.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"11.1\" y1=\"14.6\" x2=\"11.1\" y2=\"22.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.4\" y1=\"7.3\" x2=\"11.1\" y2=\"14.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26\" y1=\"7.3\" x2=\"18.4\" y2=\"7.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.2\" y1=\"7.3\" x2=\"26\" y2=\"7.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.1\" y1=\"6.4\" x2=\"26.2\" y2=\"7.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"25.2\" x2=\"11.625\" y2=\"25.225\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.1\" y1=\"6.4\" x2=\"27.13\" y2=\"6.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"12.9\" y=\"25.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"26\" y=\"7.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_24_B4\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"5\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"9\"/>\n<wire x1=\"13.8\" y1=\"25.8\" x2=\"11.7\" y2=\"25.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.1\" y1=\"23.5\" x2=\"13.8\" y2=\"25.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.7\" y1=\"23.5\" x2=\"16.1\" y2=\"23.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.8\" y1=\"23.6\" x2=\"21.7\" y2=\"23.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.8\" y1=\"22.7\" x2=\"21.8\" y2=\"23.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"23.1\" y1=\"21.4\" x2=\"21.8\" y2=\"22.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"23.1\" y1=\"18.6\" x2=\"23.1\" y2=\"21.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"25.6\" y1=\"16.1\" x2=\"23.1\" y2=\"18.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.6\" y1=\"16.1\" x2=\"25.6\" y2=\"16.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"28.4\" y1=\"14.3\" x2=\"26.6\" y2=\"16.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"28.4\" y1=\"7.6\" x2=\"28.4\" y2=\"14.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.6\" y1=\"6.4\" x2=\"28.4\" y2=\"7.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"25.8\" x2=\"11.625\" y2=\"25.875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.6\" y1=\"6.4\" x2=\"29.67\" y2=\"6.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"13.8\" y=\"25.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"21.8\" y=\"23.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"28.4\" y=\"7.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_24_B5\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"11\"/>\n<wire x1=\"13.4\" y1=\"26.5\" x2=\"11.7\" y2=\"26.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.9\" y1=\"26.5\" x2=\"13.4\" y2=\"26.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.1\" y1=\"26.3\" x2=\"20.9\" y2=\"26.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.5\" y1=\"26.3\" x2=\"21.1\" y2=\"26.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.5\" y1=\"27.3\" x2=\"21.5\" y2=\"26.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.5\" y1=\"29.7\" x2=\"22.5\" y2=\"27.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.3\" y1=\"29.9\" x2=\"22.5\" y2=\"29.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.2\" y1=\"29.9\" x2=\"22.3\" y2=\"29.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.8\" y1=\"18.3\" x2=\"23.2\" y2=\"29.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.8\" y1=\"7.7\" x2=\"34.8\" y2=\"18.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.4\" y1=\"6.3\" x2=\"34.8\" y2=\"7.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"32.3\" y1=\"6.3\" x2=\"33.4\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"26.5\" x2=\"11.625\" y2=\"26.525\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.3\" y1=\"6.3\" x2=\"32.21\" y2=\"6.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"13.4\" y=\"26.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"22.3\" y=\"29.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.4\" y=\"6.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_24_B6\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"7\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"13\"/>\n<wire x1=\"12.9\" y1=\"27.1\" x2=\"11.7\" y2=\"27.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.8\" y1=\"27.1\" x2=\"12.9\" y2=\"27.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15\" y1=\"26.9\" x2=\"14.8\" y2=\"27.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.4\" y1=\"26.9\" x2=\"15\" y2=\"26.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.9\" y1=\"29.4\" x2=\"16.4\" y2=\"26.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22\" y1=\"29.4\" x2=\"18.9\" y2=\"29.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.8\" y1=\"21.6\" x2=\"22\" y2=\"29.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.9\" y1=\"21.6\" x2=\"29.8\" y2=\"21.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.6\" y1=\"17.9\" x2=\"29.9\" y2=\"21.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.6\" y1=\"14.3\" x2=\"33.6\" y2=\"17.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.2\" y1=\"13.7\" x2=\"33.6\" y2=\"14.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.2\" y1=\"7.9\" x2=\"34.2\" y2=\"13.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.2\" y1=\"6.9\" x2=\"34.2\" y2=\"7.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.7\" y1=\"6.4\" x2=\"34.2\" y2=\"6.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"27.1\" x2=\"11.625\" y2=\"27.175\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.7\" y1=\"6.4\" x2=\"34.75\" y2=\"6.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"12.9\" y=\"27.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.2\" y=\"7.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_24_B7\">\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"15\"/>\n<wire x1=\"14.1\" y1=\"27.8\" x2=\"11.7\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.3\" y1=\"26.6\" x2=\"14.1\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.3\" y1=\"26.6\" x2=\"15.3\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.7\" y1=\"26.2\" x2=\"16.3\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.7\" y1=\"25.9\" x2=\"16.7\" y2=\"26.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.7\" y1=\"26.7\" x2=\"16.7\" y2=\"25.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.8\" y1=\"28.8\" x2=\"16.7\" y2=\"26.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.2\" y1=\"28.8\" x2=\"18.8\" y2=\"28.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.6\" y1=\"28.4\" x2=\"19.2\" y2=\"28.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.6\" y1=\"22.5\" x2=\"19.6\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.1\" y1=\"21\" x2=\"19.6\" y2=\"22.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.1\" y1=\"20.6\" x2=\"18.1\" y2=\"21\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.3\" y1=\"16.4\" x2=\"18.1\" y2=\"20.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.3\" y1=\"12.8\" x2=\"22.3\" y2=\"16.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.8\" y1=\"10.3\" x2=\"22.3\" y2=\"12.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.6\" y1=\"8.5\" x2=\"24.8\" y2=\"10.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.1\" y1=\"8.5\" x2=\"26.6\" y2=\"8.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.2\" y1=\"6.4\" x2=\"35.1\" y2=\"8.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"27.8\" x2=\"11.625\" y2=\"27.825\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.2\" y1=\"6.4\" x2=\"37.29\" y2=\"6.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"16.7\" y=\"25.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"22.3\" y=\"16.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"24.8\" y=\"10.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$25\">\n<contactref element=\"R50-6\" pad=\"1\"/>\n<contactref element=\"R50-7\" pad=\"1\"/>\n<contactref element=\"R50-8\" pad=\"1\"/>\n<contactref element=\"SW_TERM2\" pad=\"1\"/>\n<contactref element=\"R50-5\" pad=\"1\"/>\n<wire x1=\"79.6\" y1=\"21.8\" x2=\"79.6\" y2=\"20.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.6\" y1=\"20.7\" x2=\"79.6\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.6\" y1=\"21.8\" x2=\"79.55\" y2=\"21.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84\" y1=\"21.8\" x2=\"84\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84\" y1=\"19.6\" x2=\"83.95\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84\" y1=\"21.8\" x2=\"83.95\" y2=\"21.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"80.3\" y1=\"19.6\" x2=\"79.6\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.3\" y1=\"18.6\" x2=\"80.3\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"82.9\" y1=\"18.6\" x2=\"81.3\" y2=\"18.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.9\" y1=\"19.6\" x2=\"82.9\" y2=\"18.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.6\" y1=\"19.6\" x2=\"79.55\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.9\" y1=\"19.6\" x2=\"83.95\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"24.6\" x2=\"69.6934\" y2=\"24.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"73.5\" y1=\"21.6\" x2=\"70.5\" y2=\"24.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"77.7\" y1=\"21.6\" x2=\"73.5\" y2=\"21.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"78.6\" y1=\"20.7\" x2=\"77.7\" y2=\"21.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"79.6\" y1=\"20.7\" x2=\"78.6\" y2=\"20.7\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"78.6\" y=\"20.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$26\">\n<contactref element=\"R50-10\" pad=\"1\"/>\n<contactref element=\"R50-11\" pad=\"1\"/>\n<contactref element=\"R50-12\" pad=\"1\"/>\n<contactref element=\"SW_TERM3\" pad=\"1\"/>\n<contactref element=\"R50-9\" pad=\"1\"/>\n<wire x1=\"79.7\" y1=\"38.8\" x2=\"79.7\" y2=\"36.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.7\" y1=\"36.6\" x2=\"79.65\" y2=\"36.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.9\" y1=\"38.8\" x2=\"83.9\" y2=\"36.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.9\" y1=\"36.6\" x2=\"83.85\" y2=\"36.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.9\" y1=\"38.8\" x2=\"83.85\" y2=\"38.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"80.2\" y1=\"38.8\" x2=\"79.7\" y2=\"38.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.2\" y1=\"39.8\" x2=\"80.2\" y2=\"38.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"82.8\" y1=\"39.8\" x2=\"81.2\" y2=\"39.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.8\" y1=\"38.8\" x2=\"82.8\" y2=\"39.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.7\" y1=\"38.8\" x2=\"79.65\" y2=\"38.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.8\" y1=\"38.8\" x2=\"83.85\" y2=\"38.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.2\" y1=\"33.7\" x2=\"69.5934\" y2=\"33.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72\" y1=\"35.5\" x2=\"70.2\" y2=\"33.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"78.5\" y1=\"35.5\" x2=\"72\" y2=\"35.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.6\" y1=\"36.6\" x2=\"78.5\" y2=\"35.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.6\" y1=\"36.6\" x2=\"79.65\" y2=\"36.6\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$28\">\n<contactref element=\"R50-14\" pad=\"1\"/>\n<contactref element=\"R50-15\" pad=\"1\"/>\n<contactref element=\"R50-16\" pad=\"1\"/>\n<contactref element=\"SW_TERM4\" pad=\"1\"/>\n<contactref element=\"R50-13\" pad=\"1\"/>\n<wire x1=\"79.7\" y1=\"54.7\" x2=\"79.7\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.7\" y1=\"54.7\" x2=\"79.65\" y2=\"54.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.9\" y1=\"54.7\" x2=\"83.9\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.9\" y1=\"52.6\" x2=\"83.85\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.9\" y1=\"54.7\" x2=\"83.85\" y2=\"54.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"80.2\" y1=\"52.6\" x2=\"79.7\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.2\" y1=\"51.6\" x2=\"80.2\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"82.8\" y1=\"51.6\" x2=\"81.2\" y2=\"51.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.8\" y1=\"52.6\" x2=\"82.8\" y2=\"51.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.7\" y1=\"52.6\" x2=\"79.65\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.8\" y1=\"52.6\" x2=\"83.85\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.6\" y1=\"57\" x2=\"68.9934\" y2=\"57\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"58.4\" x2=\"69.6\" y2=\"57\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.2\" y1=\"58.4\" x2=\"71\" y2=\"58.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.6\" y1=\"55\" x2=\"76.2\" y2=\"58.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.6\" y1=\"54.7\" x2=\"79.6\" y2=\"55\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.6\" y1=\"54.7\" x2=\"79.65\" y2=\"54.7\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$29\">\n<contactref element=\"SW_TERM1\" pad=\"1\"/>\n<contactref element=\"R50-4\" pad=\"1\"/>\n<contactref element=\"R50-3\" pad=\"1\"/>\n<contactref element=\"R50-2\" pad=\"1\"/>\n<contactref element=\"R50-1\" pad=\"1\"/>\n<wire x1=\"84.1\" y1=\"5.6\" x2=\"84.1\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84.1\" y1=\"3.5\" x2=\"84.05\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84.1\" y1=\"5.6\" x2=\"84.05\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.9\" y1=\"5.6\" x2=\"79.9\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.9\" y1=\"3.5\" x2=\"79.85\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.9\" y1=\"5.6\" x2=\"79.85\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75.9\" y1=\"-0.4\" x2=\"78.15\" y2=\"1.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"78.15\" y1=\"1.85\" x2=\"79.8\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.4\" y1=\"-0.4\" x2=\"75.9\" y2=\"-0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"1\" x2=\"70.4\" y2=\"-0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.8\" y1=\"3.5\" x2=\"79.85\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"1\" x2=\"68.9934\" y2=\"1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84\" y1=\"1.3\" x2=\"84\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"82\" y1=\"-0.7\" x2=\"84\" y2=\"1.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"80.7\" y1=\"-0.7\" x2=\"82\" y2=\"-0.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"78.15\" y1=\"1.85\" x2=\"80.7\" y2=\"-0.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"84\" y1=\"3.5\" x2=\"84.05\" y2=\"3.5\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$23\">\n<contactref element=\"U340G\" pad=\"7\"/>\n<contactref element=\"Y1\" pad=\"1\"/>\n<contactref element=\"C_OSC1\" pad=\"1\"/>\n<wire x1=\"-3.5\" y1=\"47.1\" x2=\"-1.2\" y2=\"47.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.2\" y1=\"47.1\" x2=\"-1.2\" y2=\"47.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.5\" y1=\"47.1\" x2=\"-3.5\" y2=\"47.06\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.8\" y1=\"51.4\" x2=\"1.8\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.8\" y1=\"50.2\" x2=\"1.8\" y2=\"51.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.2\" y1=\"47.2\" x2=\"1.8\" y2=\"50.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.8\" y1=\"52.6\" x2=\"1.825\" y2=\"52.695\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.2\" y1=\"47.2\" x2=\"-1.2\" y2=\"47.15\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"1.8\" y=\"51.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$31\">\n<contactref element=\"C_OSC2\" pad=\"1\"/>\n<contactref element=\"Y1\" pad=\"2\"/>\n<contactref element=\"U340G\" pad=\"8\"/>\n<wire x1=\"-2.7\" y1=\"53\" x2=\"-2\" y2=\"53\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-2\" y1=\"53\" x2=\"-1.2\" y2=\"53\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.5\" y1=\"52.2\" x2=\"-2.7\" y2=\"53\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.2\" y1=\"53\" x2=\"-1.2\" y2=\"53.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.5\" y1=\"52.2\" x2=\"-3.5\" y2=\"52.14\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.9\" y1=\"54.1\" x2=\"0.5\" y2=\"52.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2\" y1=\"53\" x2=\"-0.9\" y2=\"54.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.5\" y1=\"52.7\" x2=\"0.555\" y2=\"52.695\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-0.9\" y=\"54.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"DMINUS\">\n<contactref element=\"USB1\" pad=\"2\"/>\n<contactref element=\"U340G\" pad=\"6\"/>\n<wire x1=\"0.8\" y1=\"55.2\" x2=\"-7.5\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3\" y1=\"53\" x2=\"0.8\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3\" y1=\"52.7\" x2=\"3\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"55.2\" x2=\"-7.56\" y2=\"55.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3\" y1=\"52.7\" x2=\"3.095\" y2=\"52.695\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"DPLUS\">\n<contactref element=\"USB1\" pad=\"3\"/>\n<contactref element=\"U340G\" pad=\"5\"/>\n<wire x1=\"-2.8\" y1=\"54.6\" x2=\"-7.56\" y2=\"54.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1\" y1=\"50.8\" x2=\"-2.8\" y2=\"54.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.7\" y1=\"50.8\" x2=\"1\" y2=\"50.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"52.4\" x2=\"2.7\" y2=\"50.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"52.6\" x2=\"4.3\" y2=\"52.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"52.6\" x2=\"4.365\" y2=\"52.695\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"SLD\">\n<contactref element=\"USB1\" pad=\"S1\"/>\n<contactref element=\"USB1\" pad=\"S2\"/>\n<contactref element=\"USB1\" pad=\"S3\"/>\n<contactref element=\"USB1\" pad=\"S4\"/>\n<wire x1=\"-10.1\" y1=\"57.8\" x2=\"-7.56\" y2=\"57.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.2\" y1=\"57.9\" x2=\"-10.1\" y2=\"57.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.2\" y1=\"57.9\" x2=\"-10.235\" y2=\"57.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"51.4\" x2=\"-7.56\" y2=\"51.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.1\" y1=\"51.4\" x2=\"-6.4\" y2=\"51.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.2\" y1=\"51.3\" x2=\"-10.1\" y2=\"51.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.2\" y1=\"51.3\" x2=\"-10.235\" y2=\"51.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.2\" y1=\"51.4\" x2=\"-10.2\" y2=\"57.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.2\" y1=\"57.9\" x2=\"-10.235\" y2=\"57.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.2\" y1=\"51.4\" x2=\"-10.235\" y2=\"51.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"-6.4\" y=\"51.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L120_SYNC\">\n<contactref element=\"IC1\" pad=\"14\"/>\n<contactref element=\"FPGA\" pad=\"120\"/>\n<contactref element=\"IC2\" pad=\"14\"/>\n<wire x1=\"53.2\" y1=\"27.1\" x2=\"53.2\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"27.6\" x2=\"53.2\" y2=\"27.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"31.7\" x2=\"52.7\" y2=\"27.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"41.7\" x2=\"52.7\" y2=\"31.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.4\" y1=\"42.4\" x2=\"52.7\" y2=\"41.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.4\" y1=\"42.1\" x2=\"53.4\" y2=\"42.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.3\" y1=\"42\" x2=\"53.4\" y2=\"42.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.3\" y1=\"41.5\" x2=\"53.3\" y2=\"42\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.2\" y1=\"24.5\" x2=\"53.25\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.3\" y1=\"41.5\" x2=\"53.25\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.9\" y1=\"33.4\" x2=\"20.3\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"33.7\" x2=\"20.9\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.4\" y1=\"33.7\" x2=\"21.2\" y2=\"33.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.2\" y1=\"27.9\" x2=\"28.4\" y2=\"33.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.2\" y1=\"25.6\" x2=\"34.2\" y2=\"27.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.6\" y1=\"25.2\" x2=\"34.2\" y2=\"25.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"35\" y1=\"25.2\" x2=\"34.6\" y2=\"25.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.1\" y1=\"30.3\" x2=\"35\" y2=\"25.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.1\" y1=\"30.8\" x2=\"40.1\" y2=\"30.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.5\" y1=\"31.2\" x2=\"40.1\" y2=\"30.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42\" y1=\"31.2\" x2=\"40.5\" y2=\"31.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.5\" y1=\"30.7\" x2=\"42\" y2=\"31.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"51.5\" y1=\"30.7\" x2=\"42.5\" y2=\"30.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.7\" y1=\"31.9\" x2=\"51.5\" y2=\"30.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"33.4\" x2=\"20.21\" y2=\"33.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"31.9\" x2=\"52.7\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"52.7\" y=\"31.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"53.4\" y=\"42.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"28.4\" y=\"33.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$2\">\n<contactref element=\"RGAIN1_1\" pad=\"1\"/>\n<contactref element=\"RGAIN3_1\" pad=\"2\"/>\n<wire x1=\"71.1\" y1=\"10\" x2=\"69\" y2=\"10\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"10\" x2=\"69\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"10\" x2=\"71.1\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$3\">\n<contactref element=\"RGAIN2_1\" pad=\"1\"/>\n<contactref element=\"RGAIN4_1\" pad=\"2\"/>\n<wire x1=\"66.8\" y1=\"10\" x2=\"64.7\" y2=\"10\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"10\" x2=\"64.7\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"10\" x2=\"66.8\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN1\">\n<contactref element=\"RGAIN3_1\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"3\"/>\n<contactref element=\"CGAIN1_1\" pad=\"2\"/>\n<contactref element=\"CL1\" pad=\"-\"/>\n<wire x1=\"59.1\" y1=\"7.8\" x2=\"59.1\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.6\" y1=\"6.3\" x2=\"59.1\" y2=\"7.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"6.3\" x2=\"60.6\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"4.8\" x2=\"65\" y2=\"6.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65\" y1=\"6.2\" x2=\"64.9\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.1\" y1=\"8\" x2=\"59.05\" y2=\"8.09\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"4.8\" x2=\"66.4\" y2=\"4.71228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65\" y1=\"6.2\" x2=\"66\" y2=\"6.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"6.2\" x2=\"66\" y2=\"6.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"10.8\" x2=\"71.1\" y2=\"11.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"8.3\" x2=\"72.1\" y2=\"10.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.3\" y1=\"8.1\" x2=\"72.1\" y2=\"8.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.5\" y1=\"8.1\" x2=\"72.3\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.9\" y1=\"7.7\" x2=\"72.5\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.9\" y1=\"5.3\" x2=\"72.9\" y2=\"7.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"4.5\" x2=\"72.9\" y2=\"5.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"3.8\" x2=\"72.1\" y2=\"4.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.9\" y1=\"3.6\" x2=\"72.1\" y2=\"3.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.5\" y1=\"3.6\" x2=\"71.9\" y2=\"3.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"6.1\" x2=\"68.5\" y2=\"3.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"11.8\" x2=\"71.1\" y2=\"11.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"6.1\" x2=\"66\" y2=\"6.15\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65\" y=\"6.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN2\">\n<contactref element=\"RGAIN4_1\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"1\"/>\n<contactref element=\"CH1\" pad=\"-\"/>\n<wire x1=\"64.5\" y1=\"8\" x2=\"63.7\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.7\" y1=\"8\" x2=\"61\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.7\" y1=\"4.8\" x2=\"64.5\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"4.8\" x2=\"67.7\" y2=\"4.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"8\" x2=\"60.95\" y2=\"8.09\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"4.8\" x2=\"70\" y2=\"4.71228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"11.8\" x2=\"66.8\" y2=\"11.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.5\" y1=\"10.9\" x2=\"66.4\" y2=\"11.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"10.9\" x2=\"65.5\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.7\" y1=\"10.7\" x2=\"63.9\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.7\" y1=\"8.9\" x2=\"63.7\" y2=\"10.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.7\" y1=\"8\" x2=\"63.7\" y2=\"8.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"11.8\" x2=\"66.8\" y2=\"11.85\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"63.7\" y=\"8.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$4\">\n<contactref element=\"RGAIN1_2\" pad=\"1\"/>\n<contactref element=\"RGAIN3_2\" pad=\"2\"/>\n<wire x1=\"70.8\" y1=\"14.1\" x2=\"71.1\" y2=\"14.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"15.9\" x2=\"70.8\" y2=\"14.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"14.1\" x2=\"71.1\" y2=\"14.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"15.9\" x2=\"69\" y2=\"15.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$5\">\n<contactref element=\"RGAIN2_2\" pad=\"1\"/>\n<contactref element=\"RGAIN4_2\" pad=\"2\"/>\n<wire x1=\"64.4\" y1=\"15.9\" x2=\"64.7\" y2=\"15.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.2\" y1=\"14.7\" x2=\"64.4\" y2=\"15.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.2\" y1=\"14.1\" x2=\"63.2\" y2=\"14.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.8\" y1=\"13.5\" x2=\"63.2\" y2=\"14.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.8\" y1=\"12.9\" x2=\"63.8\" y2=\"13.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.4\" y1=\"12.5\" x2=\"63.8\" y2=\"12.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.6\" y1=\"12.5\" x2=\"63.4\" y2=\"12.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.2\" y1=\"13.1\" x2=\"63.6\" y2=\"12.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"13.1\" x2=\"64.2\" y2=\"13.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"14.1\" x2=\"65.8\" y2=\"13.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"15.9\" x2=\"64.7\" y2=\"15.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"14.1\" x2=\"66.8\" y2=\"14.05\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"63.2\" y=\"14.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.4\" y=\"12.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN3\">\n<contactref element=\"RGAIN3_2\" pad=\"1\"/>\n<contactref element=\"CGAIN1_2\" pad=\"2\"/>\n<contactref element=\"GAINSW2\" pad=\"3\"/>\n<contactref element=\"CL2\" pad=\"-\"/>\n<wire x1=\"61\" y1=\"23.2\" x2=\"61\" y2=\"20.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"24.2\" x2=\"61\" y2=\"23.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"25.3\" x2=\"62\" y2=\"24.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"24.2\" x2=\"62\" y2=\"25.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.6\" y1=\"20.6\" x2=\"65.15\" y2=\"21.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.15\" y1=\"21.05\" x2=\"62\" y2=\"24.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.4\" y1=\"20.6\" x2=\"65.6\" y2=\"20.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"19.9\" x2=\"66.4\" y2=\"20.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"20.7\" x2=\"60.95\" y2=\"20.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"19.9\" x2=\"67.1\" y2=\"19.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.4\" y1=\"18.9\" x2=\"66.4\" y2=\"17.71228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"20\" x2=\"66.4\" y2=\"18.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"21.2\" x2=\"65.3\" y2=\"20\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.15\" y1=\"21.05\" x2=\"65.3\" y2=\"21.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.7\" y1=\"16\" x2=\"71.1\" y2=\"16\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.3\" y1=\"17.4\" x2=\"70.7\" y2=\"16\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.2\" y1=\"17.4\" x2=\"69.3\" y2=\"17.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"17.7\" x2=\"68.2\" y2=\"17.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"19\" x2=\"67.9\" y2=\"17.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"19.8\" x2=\"67.9\" y2=\"19\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"16\" x2=\"71.1\" y2=\"15.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"19.8\" x2=\"67.1\" y2=\"19.85\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"62\" y=\"25.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"65.3\" y=\"21.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN4\">\n<contactref element=\"RGAIN4_2\" pad=\"1\"/>\n<contactref element=\"GAINSW2\" pad=\"1\"/>\n<contactref element=\"CH2\" pad=\"-\"/>\n<wire x1=\"62.9\" y1=\"19.9\" x2=\"62.9\" y2=\"20.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.2\" y1=\"19.6\" x2=\"62.9\" y2=\"19.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65\" y1=\"19.6\" x2=\"63.2\" y2=\"19.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.5\" y1=\"17.1\" x2=\"65\" y2=\"19.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.5\" y1=\"16.7\" x2=\"67.5\" y2=\"17.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"16\" x2=\"67.5\" y2=\"16.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"20.6\" x2=\"62.85\" y2=\"20.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"16\" x2=\"66.8\" y2=\"15.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.1\" y1=\"17.7\" x2=\"70\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.5\" y1=\"17.1\" x2=\"68.1\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"17.7\" x2=\"70\" y2=\"17.71228125\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"63.2\" y=\"19.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67.5\" y=\"17.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$6\">\n<contactref element=\"RGAIN1_3\" pad=\"1\"/>\n<contactref element=\"RGAIN3_3\" pad=\"2\"/>\n<wire x1=\"70.5\" y1=\"42.5\" x2=\"68.4\" y2=\"42.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"42.5\" x2=\"68.4\" y2=\"42.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"42.5\" x2=\"70.5\" y2=\"42.45\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$7\">\n<contactref element=\"RGAIN2_3\" pad=\"1\"/>\n<contactref element=\"RGAIN4_3\" pad=\"2\"/>\n<wire x1=\"66.2\" y1=\"42.5\" x2=\"64\" y2=\"42.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"42.5\" x2=\"64\" y2=\"42.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"42.5\" x2=\"66.2\" y2=\"42.45\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN5\">\n<contactref element=\"RGAIN3_3\" pad=\"1\"/>\n<contactref element=\"CGAIN1_3\" pad=\"2\"/>\n<contactref element=\"GAINSW3\" pad=\"3\"/>\n<contactref element=\"CL3\" pad=\"-\"/>\n<wire x1=\"61\" y1=\"38.9\" x2=\"61\" y2=\"40.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.4\" y1=\"38.9\" x2=\"61\" y2=\"38.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"37.3\" x2=\"62.4\" y2=\"38.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"37.3\" x2=\"65.3\" y2=\"37.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"37.3\" x2=\"64\" y2=\"37.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"38.1\" x2=\"66.3\" y2=\"37.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"40.4\" x2=\"60.95\" y2=\"40.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"38.1\" x2=\"67.1\" y2=\"38.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"37.1\" x2=\"66.4\" y2=\"37.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"37.3\" x2=\"65.3\" y2=\"37.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.4\" y1=\"37.1\" x2=\"66.4\" y2=\"37.11228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.4\" y1=\"42.4\" x2=\"70.5\" y2=\"44.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.7\" y1=\"42.4\" x2=\"72.4\" y2=\"42.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"41.7\" x2=\"73.7\" y2=\"42.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"37.3\" x2=\"74.4\" y2=\"41.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73\" y1=\"35.9\" x2=\"74.4\" y2=\"37.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"35.9\" x2=\"73\" y2=\"35.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"38\" x2=\"69.2\" y2=\"35.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"44.3\" x2=\"70.5\" y2=\"44.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"38\" x2=\"67.1\" y2=\"38.15\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"61\" y=\"38.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"65.3\" y=\"37.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN6\">\n<contactref element=\"RGAIN4_3\" pad=\"1\"/>\n<contactref element=\"GAINSW3\" pad=\"1\"/>\n<contactref element=\"CH3\" pad=\"-\"/>\n<wire x1=\"62.8\" y1=\"42.6\" x2=\"62.8\" y2=\"40.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.7\" y1=\"42.7\" x2=\"62.8\" y2=\"42.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.7\" y1=\"42.9\" x2=\"62.7\" y2=\"42.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.2\" y1=\"43.4\" x2=\"62.7\" y2=\"42.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"43.4\" x2=\"63.2\" y2=\"43.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"44.3\" x2=\"65.3\" y2=\"43.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.8\" y1=\"40.5\" x2=\"62.85\" y2=\"40.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"44.3\" x2=\"66.2\" y2=\"44.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.1\" y1=\"37.2\" x2=\"70.1\" y2=\"37.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"39.4\" x2=\"68.1\" y2=\"37.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"40.7\" x2=\"65.9\" y2=\"39.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"41.5\" x2=\"65.9\" y2=\"40.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.2\" y1=\"41.5\" x2=\"65.1\" y2=\"41.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.7\" y1=\"42\" x2=\"63.2\" y2=\"41.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.7\" y1=\"42.7\" x2=\"62.7\" y2=\"42\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.1\" y1=\"37.2\" x2=\"70.1\" y2=\"37.11228125\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.7\" y=\"42.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"65.9\" y=\"39.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$8\">\n<contactref element=\"RGAIN1_4\" pad=\"1\"/>\n<contactref element=\"RGAIN3_4\" pad=\"2\"/>\n<wire x1=\"70.5\" y1=\"48.6\" x2=\"68.4\" y2=\"48.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"48.6\" x2=\"68.4\" y2=\"48.55\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"48.6\" x2=\"70.5\" y2=\"48.55\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$9\">\n<contactref element=\"RGAIN2_4\" pad=\"1\"/>\n<contactref element=\"RGAIN4_4\" pad=\"2\"/>\n<wire x1=\"66.2\" y1=\"48.6\" x2=\"64.1\" y2=\"48.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.1\" y1=\"48.6\" x2=\"64.1\" y2=\"48.55\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"48.6\" x2=\"66.2\" y2=\"48.55\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN7\">\n<contactref element=\"RGAIN3_4\" pad=\"1\"/>\n<contactref element=\"CGAIN1_4\" pad=\"2\"/>\n<contactref element=\"GAINSW4\" pad=\"3\"/>\n<contactref element=\"CL4\" pad=\"-\"/>\n<wire x1=\"59.3\" y1=\"53.4\" x2=\"59.3\" y2=\"52.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.2\" y1=\"54.3\" x2=\"59.3\" y2=\"53.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63\" y1=\"51.5\" x2=\"60.2\" y2=\"54.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"51.5\" x2=\"65.1\" y2=\"51.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"51.5\" x2=\"63\" y2=\"51.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.1\" y1=\"52.3\" x2=\"65.3\" y2=\"51.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.3\" y1=\"52.5\" x2=\"59.25\" y2=\"52.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.1\" y1=\"52.3\" x2=\"66.1\" y2=\"52.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"50.8\" x2=\"65.9\" y2=\"50\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.1\" y1=\"51.5\" x2=\"65.1\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.9\" y1=\"50\" x2=\"65.9\" y2=\"49.91228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"45.6\" x2=\"68.4\" y2=\"46.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.4\" y1=\"46.5\" x2=\"69.4\" y2=\"45.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"65.1\" y1=\"50.8\" x2=\"69.4\" y2=\"46.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"68.4\" y1=\"46.6\" x2=\"68.4\" y2=\"46.65\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"60.2\" y=\"54.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"65.1\" y=\"50.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"69.4\" y=\"45.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN8\">\n<contactref element=\"RGAIN4_4\" pad=\"1\"/>\n<contactref element=\"GAINSW4\" pad=\"1\"/>\n<contactref element=\"CH4\" pad=\"-\"/>\n<wire x1=\"67\" y1=\"52.4\" x2=\"62.9\" y2=\"52.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"52.4\" x2=\"61.2\" y2=\"52.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"50\" x2=\"67\" y2=\"52.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"50\" x2=\"69.4\" y2=\"50\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.2\" y1=\"52.4\" x2=\"61.15\" y2=\"52.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"50\" x2=\"69.6\" y2=\"49.91228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.8\" y1=\"46.7\" x2=\"66.2\" y2=\"46.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"47.6\" x2=\"65.8\" y2=\"46.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.3\" y1=\"47.6\" x2=\"64.9\" y2=\"47.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"48\" x2=\"63.3\" y2=\"47.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"50.5\" x2=\"62.9\" y2=\"48\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"52.4\" x2=\"62.9\" y2=\"50.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.2\" y1=\"46.7\" x2=\"66.2\" y2=\"46.65\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"62.9\" y=\"50.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"62.9\" y=\"52.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_122\">\n<contactref element=\"FPGA\" pad=\"122\"/>\n<contactref element=\"PIN_IO_1\" pad=\"10\"/>\n<wire x1=\"21.2\" y1=\"32.4\" x2=\"20.3\" y2=\"32.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"32.7\" x2=\"21.2\" y2=\"32.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21\" y1=\"32.9\" x2=\"21.2\" y2=\"32.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21\" y1=\"33.4\" x2=\"21\" y2=\"32.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.3\" y1=\"34.7\" x2=\"21\" y2=\"33.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.3\" y1=\"38.6\" x2=\"22.3\" y2=\"34.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.9\" y1=\"40\" x2=\"22.3\" y2=\"38.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.9\" y1=\"42.8\" x2=\"20.9\" y2=\"40\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.4\" y1=\"48.3\" x2=\"20.9\" y2=\"42.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"32.4\" x2=\"20.21\" y2=\"32.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"48.3\" x2=\"15.4\" y2=\"48.33\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.2\" y=\"32.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L121\">\n<contactref element=\"FPGA\" pad=\"121\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"4\"/>\n<wire x1=\"20.9\" y1=\"32.9\" x2=\"20.3\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.1\" y1=\"33.1\" x2=\"20.9\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.6\" y1=\"33.1\" x2=\"21.1\" y2=\"33.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.6\" y1=\"33.5\" x2=\"21.6\" y2=\"33.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.7\" y1=\"34.6\" x2=\"21.6\" y2=\"33.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.7\" y1=\"38.7\" x2=\"22.7\" y2=\"34.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.2\" y1=\"39.2\" x2=\"22.7\" y2=\"38.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.2\" y1=\"41.7\" x2=\"22.2\" y2=\"39.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.2\" y1=\"44.7\" x2=\"22.2\" y2=\"41.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.1\" y1=\"44.7\" x2=\"25.2\" y2=\"44.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"47.4\" x2=\"32.1\" y2=\"44.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"32.9\" x2=\"20.21\" y2=\"32.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"47.4\" x2=\"34.85\" y2=\"47.479\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"21.6\" y=\"33.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"25.2\" y=\"44.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_119\">\n<contactref element=\"FPGA\" pad=\"119\"/>\n<contactref element=\"PIN_IO_1\" pad=\"8\"/>\n<wire x1=\"19.2\" y1=\"33.9\" x2=\"20.2\" y2=\"33.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"33.9\" x2=\"19.2\" y2=\"33.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.7\" y1=\"36.2\" x2=\"19\" y2=\"33.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.7\" y1=\"41.9\" x2=\"16.7\" y2=\"36.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"43.2\" x2=\"16.7\" y2=\"41.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.2\" y1=\"33.9\" x2=\"20.21\" y2=\"33.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"43.2\" x2=\"15.4\" y2=\"43.25\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"19.2\" y=\"33.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"16.7\" y=\"36.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_118\">\n<contactref element=\"FPGA\" pad=\"118\"/>\n<contactref element=\"PIN_IO_1\" pad=\"7\"/>\n<wire x1=\"21.2\" y1=\"34.4\" x2=\"20.3\" y2=\"34.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.9\" y1=\"35.1\" x2=\"21.2\" y2=\"34.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.9\" y1=\"36.4\" x2=\"21.9\" y2=\"35.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.6\" y1=\"40.7\" x2=\"21.9\" y2=\"36.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.4\" y1=\"40.7\" x2=\"17.6\" y2=\"40.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"34.4\" x2=\"20.21\" y2=\"34.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"40.7\" x2=\"15.4\" y2=\"40.71\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.2\" y=\"34.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_114\">\n<contactref element=\"FPGA\" pad=\"114\"/>\n<contactref element=\"PIN_IO_1\" pad=\"6\"/>\n<wire x1=\"21.2\" y1=\"36.3\" x2=\"20.3\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21\" y1=\"36.3\" x2=\"21.2\" y2=\"36.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.2\" y1=\"38.1\" x2=\"21\" y2=\"36.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.4\" y1=\"38.1\" x2=\"19.2\" y2=\"38.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"36.3\" x2=\"20.21\" y2=\"36.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"38.1\" x2=\"15.4\" y2=\"38.17\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.2\" y=\"36.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_111\">\n<contactref element=\"FPGA\" pad=\"111\"/>\n<contactref element=\"PIN_IO_1\" pad=\"4\"/>\n<wire x1=\"21.2\" y1=\"37.9\" x2=\"20.3\" y2=\"37.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.4\" y1=\"33.1\" x2=\"21.2\" y2=\"37.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"33.1\" x2=\"16.4\" y2=\"33.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.3\" y1=\"37.9\" x2=\"20.21\" y2=\"37.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"33.1\" x2=\"15.4\" y2=\"33.09\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"21.2\" y=\"37.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_110\">\n<contactref element=\"FPGA\" pad=\"110\"/>\n<contactref element=\"PIN_IO_1\" pad=\"3\"/>\n<wire x1=\"20.9\" y1=\"38.4\" x2=\"20.3\" y2=\"38.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"38.7\" x2=\"20.9\" y2=\"38.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.8\" y1=\"38.1\" x2=\"21.2\" y2=\"38.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"21.8\" y1=\"37.7\" x2=\"21.8\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"31.3\" x2=\"21.8\" y2=\"37.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"30.55\" x2=\"15.4\" y2=\"31.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.3\" y1=\"38.4\" x2=\"20.21\" y2=\"38.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"21.2\" y=\"38.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_113\">\n<contactref element=\"FPGA\" pad=\"113\"/>\n<contactref element=\"PIN_IO_1\" pad=\"5\"/>\n<wire x1=\"19.2\" y1=\"36.8\" x2=\"20.2\" y2=\"36.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"36.8\" x2=\"19.2\" y2=\"36.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.4\" y1=\"35.7\" x2=\"16.5\" y2=\"36.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"36.8\" x2=\"20.21\" y2=\"36.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"35.7\" x2=\"15.4\" y2=\"35.63\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"19.2\" y=\"36.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$10\">\n<contactref element=\"C_AC1\" pad=\"1\"/>\n<contactref element=\"K1\" pad=\"4\"/>\n<contactref element=\"RIN1\" pad=\"1\"/>\n<contactref element=\"RIN5\" pad=\"1\"/>\n<contactref element=\"SW_SUPER1\" pad=\"2\"/>\n<contactref element=\"CIN5_1\" pad=\"2\"/>\n<wire x1=\"74.2\" y1=\"8.5\" x2=\"74.2\" y2=\"8.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"8.6\" x2=\"74.2\" y2=\"9.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"9.3\" x2=\"74.2\" y2=\"10.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"8\" x2=\"74.2\" y2=\"8.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"10.3\" x2=\"74.25\" y2=\"10.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"8\" x2=\"73.65\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"10.5\" x2=\"73\" y2=\"11.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.2\" y1=\"9.3\" x2=\"73\" y2=\"10.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.2\" y1=\"8.6\" x2=\"71\" y2=\"11.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"11.8\" x2=\"71\" y2=\"11.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"8.6\" x2=\"73.65\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"6.9\" x2=\"63.8\" y2=\"7.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.8\" y1=\"6.9\" x2=\"62.9\" y2=\"6.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.8\" y1=\"3.6\" x2=\"62.8\" y2=\"6.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.2\" y1=\"1\" x2=\"62.8\" y2=\"3.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.8\" y1=\"7.8\" x2=\"63.8\" y2=\"7.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"9.3\" x2=\"74.2\" y2=\"9.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.7\" y1=\"6.9\" x2=\"69.1\" y2=\"9.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.8\" y1=\"6.9\" x2=\"66.7\" y2=\"6.9\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"74.2\" y=\"9.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"62.8\" y=\"6.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ2\">\n<contactref element=\"K2\" pad=\"3\"/>\n<contactref element=\"C_AC2\" pad=\"2\"/>\n<contactref element=\"J2\" pad=\"SIGNAL\"/>\n<contactref element=\"SW_TERM2\" pad=\"2\"/>\n<wire x1=\"75.9\" y1=\"16.8\" x2=\"75.9\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.5\" y1=\"17.4\" x2=\"75.9\" y2=\"16.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.5\" y1=\"19.4\" x2=\"76.5\" y2=\"17.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.2\" y1=\"20.7\" x2=\"76.5\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.54\" y1=\"20.7\" x2=\"75.2\" y2=\"20.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.9\" y1=\"16\" x2=\"75.85\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"14.7\" x2=\"73\" y2=\"13.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75.1\" y1=\"16.8\" x2=\"73\" y2=\"14.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75.1\" y1=\"18.3\" x2=\"75.1\" y2=\"16.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"19.8\" x2=\"75.1\" y2=\"18.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"20.7\" x2=\"73.6\" y2=\"19.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"20.7\" x2=\"73.54\" y2=\"20.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.7\" y1=\"23.2\" x2=\"71.7\" y2=\"24.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"21.4\" x2=\"71.7\" y2=\"23.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"20.7\" x2=\"73.5\" y2=\"21.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"20.7\" x2=\"73.54\" y2=\"20.7\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$15\">\n<contactref element=\"C_AC2\" pad=\"1\"/>\n<contactref element=\"K2\" pad=\"4\"/>\n<contactref element=\"RIN2\" pad=\"1\"/>\n<contactref element=\"RIN6\" pad=\"1\"/>\n<contactref element=\"SW_SUPER2\" pad=\"2\"/>\n<contactref element=\"CIN5_2\" pad=\"2\"/>\n<wire x1=\"74.1\" y1=\"17.8\" x2=\"74.1\" y2=\"17\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.1\" y1=\"17\" x2=\"74.1\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"18.2\" x2=\"74.1\" y2=\"17.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"18.2\" x2=\"73.65\" y2=\"18.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"16.3\" x2=\"73\" y2=\"16.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.5\" y1=\"17\" x2=\"73.8\" y2=\"16.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.1\" y1=\"17\" x2=\"74.5\" y2=\"17\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"16.3\" x2=\"73\" y2=\"16.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.2\" y1=\"14.1\" x2=\"71\" y2=\"14.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.1\" y1=\"16\" x2=\"72.2\" y2=\"14.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"14.1\" x2=\"71\" y2=\"14.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.1\" y1=\"16\" x2=\"74.15\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"20.7\" x2=\"64.9\" y2=\"19.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"24.6\" x2=\"64.9\" y2=\"20.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.9\" y1=\"17\" x2=\"74.5\" y2=\"17\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.3\" y1=\"20.6\" x2=\"69.9\" y2=\"17\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.6\" y1=\"20.6\" x2=\"66.3\" y2=\"20.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.6\" y1=\"21.6\" x2=\"60.6\" y2=\"20.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.6\" y1=\"22.3\" x2=\"59.6\" y2=\"21.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61\" y1=\"23.7\" x2=\"59.6\" y2=\"22.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61\" y1=\"24.6\" x2=\"61\" y2=\"23.7\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"74.5\" y=\"17\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ3\">\n<contactref element=\"K3\" pad=\"3\"/>\n<contactref element=\"C_AC3\" pad=\"2\"/>\n<contactref element=\"J3\" pad=\"SIGNAL\"/>\n<contactref element=\"SW_TERM3\" pad=\"2\"/>\n<wire x1=\"74.6\" y1=\"41\" x2=\"75.9\" y2=\"42.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"38.7\" x2=\"74.6\" y2=\"41\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"37.7\" x2=\"74.6\" y2=\"38.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.9\" y1=\"42.3\" x2=\"75.95\" y2=\"42.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"37.7\" x2=\"73.54\" y2=\"37.67\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"38.2\" x2=\"73\" y2=\"41.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"37.7\" x2=\"73\" y2=\"38.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"37.7\" x2=\"73.54\" y2=\"37.67\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.6\" y1=\"34.7\" x2=\"71.6\" y2=\"33.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"73.5\" y1=\"36.6\" x2=\"71.6\" y2=\"34.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"73.5\" y1=\"37.6\" x2=\"73.5\" y2=\"36.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"73.5\" y1=\"37.6\" x2=\"73.54\" y2=\"37.67\" width=\"0.1524\" layer=\"15\"/>\n</signal>\n<signal name=\"INJ4\">\n<contactref element=\"K4\" pad=\"3\"/>\n<contactref element=\"C_AC4\" pad=\"2\"/>\n<contactref element=\"J4\" pad=\"SIGNAL\"/>\n<contactref element=\"SW_TERM4\" pad=\"2\"/>\n<wire x1=\"74.7\" y1=\"49.6\" x2=\"76\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.7\" y1=\"52.5\" x2=\"74.7\" y2=\"49.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"53.6\" x2=\"74.7\" y2=\"52.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76\" y1=\"48.3\" x2=\"76.05\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"53.6\" x2=\"73.54\" y2=\"53.64\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"47.9\" x2=\"73\" y2=\"46.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.9\" y1=\"48.8\" x2=\"73\" y2=\"47.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.9\" y1=\"53.3\" x2=\"73.9\" y2=\"48.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"53.6\" x2=\"73.9\" y2=\"53.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"53.6\" x2=\"73.54\" y2=\"53.64\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"56.2\" x2=\"71\" y2=\"57\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"53.7\" x2=\"71\" y2=\"56.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"53.7\" x2=\"73.54\" y2=\"53.64\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$11\">\n<contactref element=\"K1\" pad=\"1\"/>\n<contactref element=\"ACR1\" pad=\"2\"/>\n<wire x1=\"81\" y1=\"11.2\" x2=\"79\" y2=\"11.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"85\" y1=\"7.2\" x2=\"81\" y2=\"11.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"85\" y1=\"1.8\" x2=\"85\" y2=\"7.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.7\" y1=\"-1.5\" x2=\"85\" y2=\"1.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"17.6\" y1=\"-1.5\" x2=\"81.7\" y2=\"-1.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"-0.4\" x2=\"17.6\" y2=\"-1.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.7\" y1=\"-0.4\" x2=\"16.5\" y2=\"-0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.3\" y1=\"-0.8\" x2=\"10.7\" y2=\"-0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.6\" y1=\"-0.8\" x2=\"10.3\" y2=\"-0.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4\" y1=\"1.6\" x2=\"-1.6\" y2=\"-0.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4\" y1=\"12.1\" x2=\"-4\" y2=\"1.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.8\" y1=\"17.9\" x2=\"-4\" y2=\"12.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.1\" y1=\"17.9\" x2=\"1.8\" y2=\"17.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"19.9\" x2=\"2.1\" y2=\"17.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"11.2\" x2=\"79\" y2=\"11.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"19.9\" x2=\"0.05\" y2=\"19.9\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"2.1\" y=\"17.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$21\">\n<contactref element=\"K2\" pad=\"1\"/>\n<contactref element=\"ACR2\" pad=\"2\"/>\n<wire x1=\"78.4\" y1=\"16.3\" x2=\"79\" y2=\"16.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"77.7\" y1=\"17\" x2=\"78.4\" y2=\"16.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.3\" y1=\"17\" x2=\"77.7\" y2=\"17\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.1\" y1=\"7.8\" x2=\"76.3\" y2=\"17\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.6\" y1=\"7.8\" x2=\"67.1\" y2=\"7.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.1\" y1=\"4.3\" x2=\"62.6\" y2=\"7.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.1\" y1=\"0.7\" x2=\"59.1\" y2=\"4.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58\" y1=\"-0.4\" x2=\"59.1\" y2=\"0.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.4\" y1=\"-0.4\" x2=\"58\" y2=\"-0.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48\" y1=\"0\" x2=\"48.4\" y2=\"-0.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.7\" y1=\"0\" x2=\"48\" y2=\"0\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.7\" y1=\"0\" x2=\"18.7\" y2=\"0\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.3\" y1=\"0.4\" x2=\"10.7\" y2=\"0\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.1\" y1=\"0.4\" x2=\"10.3\" y2=\"0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.5\" y1=\"0.8\" x2=\"-0.1\" y2=\"0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.5\" y1=\"6\" x2=\"-0.5\" y2=\"0.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.7\" y1=\"7.2\" x2=\"-0.5\" y2=\"6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.7\" y1=\"8.5\" x2=\"0.7\" y2=\"7.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.5\" y1=\"8.7\" x2=\"0.7\" y2=\"8.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.5\" y1=\"10.5\" x2=\"0.5\" y2=\"8.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"13.1\" x2=\"0.5\" y2=\"10.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"15.8\" x2=\"3.1\" y2=\"13.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.1\" y1=\"16.8\" x2=\"3.1\" y2=\"15.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1\" y1=\"16.8\" x2=\"2.1\" y2=\"16.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.1\" y1=\"17.7\" x2=\"1\" y2=\"16.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"16.3\" x2=\"79\" y2=\"16.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"17.7\" x2=\"0.05\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"77.7\" y=\"17\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.7\" y=\"0\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-0.5\" y=\"0.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"2.1\" y=\"16.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$32\">\n<contactref element=\"K3\" pad=\"1\"/>\n<contactref element=\"ACR3\" pad=\"2\"/>\n<wire x1=\"80.9\" y1=\"44.2\" x2=\"79\" y2=\"44.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.2\" y1=\"41.9\" x2=\"80.9\" y2=\"44.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.2\" y1=\"40.2\" x2=\"83.2\" y2=\"41.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83.2\" y1=\"15.6\" x2=\"83.2\" y2=\"40.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"69.9\" y1=\"2.3\" x2=\"83.2\" y2=\"15.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"69.9\" y1=\"0.7\" x2=\"69.9\" y2=\"2.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.7\" y1=\"-1.5\" x2=\"69.9\" y2=\"0.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.6\" y1=\"-1.5\" x2=\"67.7\" y2=\"-1.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.3\" y1=\"-0.2\" x2=\"17.6\" y2=\"-1.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.1\" y1=\"-0.2\" x2=\"16.3\" y2=\"-0.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.7\" y1=\"-0.2\" x2=\"10.1\" y2=\"-0.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.2\" y1=\"1.3\" x2=\"-1.7\" y2=\"-0.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.2\" y1=\"4.7\" x2=\"-3.2\" y2=\"1.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.5\" y1=\"7.4\" x2=\"-3.2\" y2=\"4.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"7.4\" x2=\"-0.5\" y2=\"7.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"10.6\" x2=\"0.1\" y2=\"7.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.7\" y1=\"13.2\" x2=\"0.1\" y2=\"10.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.7\" y1=\"15.4\" x2=\"2.7\" y2=\"13.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.1\" y1=\"16\" x2=\"2.7\" y2=\"15.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.7\" y1=\"16\" x2=\"2.1\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.1\" y1=\"15.4\" x2=\"0.7\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"44.2\" x2=\"79\" y2=\"44.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"15.4\" x2=\"0.05\" y2=\"15.4\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"83.2\" y=\"40.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"10.1\" y=\"-0.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"0.1\" y=\"7.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"2.1\" y=\"16\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$35\">\n<contactref element=\"K4\" pad=\"1\"/>\n<contactref element=\"ACR4\" pad=\"2\"/>\n<wire x1=\"75.5\" y1=\"52.8\" x2=\"79\" y2=\"49.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.2\" y1=\"52.8\" x2=\"75.5\" y2=\"52.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"69.9\" y1=\"55.1\" x2=\"72.2\" y2=\"52.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"69.9\" y1=\"57.3\" x2=\"69.9\" y2=\"55.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"68\" y1=\"59.2\" x2=\"69.9\" y2=\"57.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"46.3\" y1=\"59.2\" x2=\"68\" y2=\"59.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"46\" y1=\"58.9\" x2=\"46.3\" y2=\"59.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.2\" y1=\"58.9\" x2=\"46\" y2=\"58.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.7\" y1=\"56.4\" x2=\"23.2\" y2=\"58.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.7\" y1=\"55.2\" x2=\"20.7\" y2=\"56.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.2\" y1=\"34.7\" x2=\"20.7\" y2=\"55.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.2\" y1=\"29.7\" x2=\"0.2\" y2=\"34.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.8\" y1=\"25.7\" x2=\"0.2\" y2=\"29.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-8.7\" y1=\"25.7\" x2=\"-3.8\" y2=\"25.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-9.6\" y1=\"26.6\" x2=\"-8.7\" y2=\"25.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.4\" y1=\"26.6\" x2=\"-9.6\" y2=\"26.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-11.1\" y1=\"25.9\" x2=\"-10.4\" y2=\"26.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-11.1\" y1=\"25\" x2=\"-11.1\" y2=\"25.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4.6\" y1=\"18.5\" x2=\"-11.1\" y2=\"25\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.3\" y1=\"18.5\" x2=\"-4.6\" y2=\"18.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.7\" y1=\"18.1\" x2=\"2.3\" y2=\"18.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.7\" y1=\"15.8\" x2=\"2.7\" y2=\"18.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.1\" y1=\"15.2\" x2=\"2.7\" y2=\"15.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"13.2\" x2=\"2.1\" y2=\"15.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"49.3\" x2=\"79\" y2=\"49.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"13.2\" x2=\"0.05\" y2=\"13.2\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"75.5\" y=\"52.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"46\" y=\"58.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"2.1\" y=\"15.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$1\">\n<contactref element=\"RLED4\" pad=\"1\"/>\n<contactref element=\"LED4\" pad=\"C\"/>\n<wire x1=\"1.1\" y1=\"8.9\" x2=\"0\" y2=\"8.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.9\" y1=\"8.9\" x2=\"1.1\" y2=\"8.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.5\" y1=\"8.3\" x2=\"6.9\" y2=\"8.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.9\" y1=\"8.3\" x2=\"7.5\" y2=\"8.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.5\" y1=\"8.9\" x2=\"7.9\" y2=\"8.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.5\" y1=\"18.9\" x2=\"8.5\" y2=\"8.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.5\" y1=\"19.1\" x2=\"8.5\" y2=\"18.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.4\" y1=\"20\" x2=\"8.5\" y2=\"19.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0\" y1=\"8.9\" x2=\"0\" y2=\"8.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.4\" y1=\"20\" x2=\"9.45\" y2=\"20\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"1.1\" y=\"8.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.5\" y=\"18.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$12\">\n<contactref element=\"RLED3\" pad=\"1\"/>\n<contactref element=\"LED3\" pad=\"C\"/>\n<wire x1=\"-1.1\" y1=\"8.9\" x2=\"-2.1\" y2=\"8.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.3\" y1=\"8.9\" x2=\"-1.1\" y2=\"8.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.3\" y1=\"18.9\" x2=\"0.3\" y2=\"8.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.4\" y1=\"18.9\" x2=\"10.3\" y2=\"18.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.4\" y1=\"18.7\" x2=\"10.4\" y2=\"18.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.5\" y1=\"17.8\" x2=\"10.4\" y2=\"18.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.1\" y1=\"8.9\" x2=\"-2.18\" y2=\"8.86\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.5\" y1=\"17.8\" x2=\"9.46\" y2=\"17.74\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-1.1\" y=\"8.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"10.4\" y=\"18.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$13\">\n<contactref element=\"RLED2\" pad=\"1\"/>\n<contactref element=\"LED2\" pad=\"C\"/>\n<wire x1=\"-3.3\" y1=\"8.8\" x2=\"-4.3\" y2=\"8.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.8\" y1=\"8.8\" x2=\"-3.3\" y2=\"8.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.3\" y1=\"8.3\" x2=\"-1.8\" y2=\"8.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"4.2\" y1=\"8.3\" x2=\"-1.3\" y2=\"8.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.3\" y1=\"14.4\" x2=\"4.2\" y2=\"8.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.4\" y1=\"14.4\" x2=\"10.3\" y2=\"14.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.4\" y1=\"14.6\" x2=\"10.4\" y2=\"14.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.5\" y1=\"15.5\" x2=\"10.4\" y2=\"14.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.3\" y1=\"8.8\" x2=\"-4.38\" y2=\"8.87\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.5\" y1=\"15.5\" x2=\"9.47\" y2=\"15.54\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-3.3\" y=\"8.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"10.4\" y=\"14.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$14\">\n<contactref element=\"RLED1\" pad=\"1\"/>\n<contactref element=\"LED1\" pad=\"C\"/>\n<wire x1=\"-5.9\" y1=\"8.8\" x2=\"-6.5\" y2=\"8.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.1\" y1=\"8\" x2=\"-5.9\" y2=\"8.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.5\" y1=\"8\" x2=\"-5.1\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.7\" y1=\"8.2\" x2=\"9.5\" y2=\"8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.7\" y1=\"13\" x2=\"9.7\" y2=\"8.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.5\" y1=\"13.2\" x2=\"9.7\" y2=\"13\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"8.8\" x2=\"-6.58\" y2=\"8.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.5\" y1=\"13.2\" x2=\"9.48\" y2=\"13.24\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$17\">\n<contactref element=\"RLED5\" pad=\"1\"/>\n<contactref element=\"LED5\" pad=\"C\"/>\n<wire x1=\"2.2\" y1=\"9.4\" x2=\"2.2\" y2=\"8.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.5\" y1=\"10.7\" x2=\"2.2\" y2=\"9.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.5\" y1=\"11.6\" x2=\"3.5\" y2=\"10.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.1\" y1=\"13.2\" x2=\"3.5\" y2=\"11.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.25\" y1=\"13.2\" x2=\"5.1\" y2=\"13.2\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$20\">\n<contactref element=\"RIN1_10K\" pad=\"1\"/>\n<contactref element=\"CIN1NF_1\" pad=\"1\"/>\n<contactref element=\"SW_SUPER1\" pad=\"3\"/>\n<contactref element=\"CIN56_1\" pad=\"1\"/>\n<wire x1=\"59.2\" y1=\"9\" x2=\"59.2\" y2=\"6.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60\" y1=\"10.7\" x2=\"60\" y2=\"11.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"9.9\" x2=\"60\" y2=\"10.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"9\" x2=\"59.2\" y2=\"9.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60\" y1=\"11.6\" x2=\"60.05\" y2=\"11.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"9\" x2=\"59.15\" y2=\"9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.2\" y1=\"3.6\" x2=\"62.2\" y2=\"1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"6.6\" x2=\"62.2\" y2=\"3.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.2\" y1=\"1\" x2=\"62.2066\" y2=\"1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"6.6\" x2=\"59.15\" y2=\"6.6\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$38\">\n<contactref element=\"RIN2_10K\" pad=\"1\"/>\n<contactref element=\"CIN1NF_2\" pad=\"1\"/>\n<contactref element=\"SW_SUPER2\" pad=\"3\"/>\n<contactref element=\"CIN56_2\" pad=\"1\"/>\n<wire x1=\"59.7\" y1=\"18.4\" x2=\"59.7\" y2=\"16.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60\" y1=\"15.9\" x2=\"60\" y2=\"13.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"16.2\" x2=\"60\" y2=\"15.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60\" y1=\"13.9\" x2=\"60.05\" y2=\"13.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"16.2\" x2=\"59.65\" y2=\"16.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.2\" y1=\"21.8\" x2=\"63\" y2=\"24.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.2\" y1=\"18.9\" x2=\"60.2\" y2=\"21.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"18.4\" x2=\"60.2\" y2=\"18.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63\" y1=\"24.6\" x2=\"63.0066\" y2=\"24.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.7\" y1=\"18.4\" x2=\"59.65\" y2=\"18.4\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"60.2\" y=\"21.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$39\">\n<contactref element=\"C_AC3\" pad=\"1\"/>\n<contactref element=\"K3\" pad=\"4\"/>\n<contactref element=\"RIN3\" pad=\"1\"/>\n<contactref element=\"RIN7\" pad=\"1\"/>\n<contactref element=\"SW_SUPER3\" pad=\"2\"/>\n<contactref element=\"CIN5_3\" pad=\"2\"/>\n<wire x1=\"74.2\" y1=\"40.4\" x2=\"74.2\" y2=\"42.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"39.9\" x2=\"74.2\" y2=\"40.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"39.9\" x2=\"73.65\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"40.9\" x2=\"64.9\" y2=\"39.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"37.7\" x2=\"64.9\" y2=\"40.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.9\" y1=\"33.7\" x2=\"64.9\" y2=\"37.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"72.3\" y1=\"43.5\" x2=\"73\" y2=\"44.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.3\" y1=\"43.4\" x2=\"72.3\" y2=\"43.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"43.4\" x2=\"72.3\" y2=\"43.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.9\" y1=\"40.9\" x2=\"67.4\" y2=\"43.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"73\" y1=\"44.2\" x2=\"73\" y2=\"44.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.8\" y1=\"43.9\" x2=\"71\" y2=\"43.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.3\" y1=\"43.4\" x2=\"71.8\" y2=\"43.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"43.9\" x2=\"71\" y2=\"43.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.4\" y1=\"42.3\" x2=\"74.2\" y2=\"42.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.3\" y1=\"43.4\" x2=\"73.4\" y2=\"42.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"42.3\" x2=\"74.25\" y2=\"42.3\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"64.9\" y=\"40.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"72.3\" y=\"43.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$40\">\n<contactref element=\"RIN3_10K\" pad=\"1\"/>\n<contactref element=\"CIN1NF_3\" pad=\"1\"/>\n<contactref element=\"SW_SUPER3\" pad=\"3\"/>\n<contactref element=\"CIN56_3\" pad=\"1\"/>\n<wire x1=\"59.9\" y1=\"42.1\" x2=\"59.9\" y2=\"39.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"42.1\" x2=\"59.9\" y2=\"44.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"44.4\" x2=\"59.85\" y2=\"44.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"42.1\" x2=\"59.85\" y2=\"42.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"36.2\" x2=\"62.9\" y2=\"33.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"39.2\" x2=\"62.9\" y2=\"36.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"39.9\" x2=\"59.9\" y2=\"39.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"33.7\" x2=\"62.9066\" y2=\"33.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"39.9\" x2=\"59.85\" y2=\"39.9\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$41\">\n<contactref element=\"C_AC4\" pad=\"1\"/>\n<contactref element=\"K4\" pad=\"4\"/>\n<contactref element=\"RIN4\" pad=\"1\"/>\n<contactref element=\"RIN8\" pad=\"1\"/>\n<contactref element=\"SW_SUPER4\" pad=\"2\"/>\n<contactref element=\"CIN5_4\" pad=\"2\"/>\n<wire x1=\"74.3\" y1=\"50\" x2=\"74.3\" y2=\"48.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"48.6\" x2=\"74.3\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"50.5\" x2=\"74.3\" y2=\"50\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"48.3\" x2=\"74.35\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"50.5\" x2=\"73.75\" y2=\"50.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.9\" y1=\"53.3\" x2=\"63.9\" y2=\"52.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.2\" y1=\"57\" x2=\"63.9\" y2=\"53.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.8\" y1=\"49.3\" x2=\"73\" y2=\"49.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.6\" y1=\"49.3\" x2=\"71.8\" y2=\"49.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.8\" y1=\"56.1\" x2=\"69.6\" y2=\"49.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.1\" y1=\"56.1\" x2=\"62.8\" y2=\"56.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.2\" y1=\"57\" x2=\"61.1\" y2=\"56.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"73\" y1=\"49.3\" x2=\"73\" y2=\"49.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"48.5\" x2=\"71\" y2=\"47.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.8\" y1=\"49.3\" x2=\"71.15\" y2=\"48.65\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.15\" y1=\"48.65\" x2=\"71\" y2=\"48.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.2\" y1=\"48.6\" x2=\"74.3\" y2=\"48.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"48.6\" x2=\"74.35\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.2\" y1=\"48.6\" x2=\"71.15\" y2=\"48.65\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"71.8\" y=\"49.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$16\">\n<contactref element=\"RLED6\" pad=\"1\"/>\n<contactref element=\"LED6\" pad=\"C\"/>\n<wire x1=\"4.4\" y1=\"9.4\" x2=\"4.4\" y2=\"8.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.7\" y1=\"10.7\" x2=\"4.4\" y2=\"9.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.7\" y1=\"11.9\" x2=\"5.7\" y2=\"10.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.2\" y1=\"12.4\" x2=\"5.7\" y2=\"11.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.2\" y1=\"14.6\" x2=\"6.2\" y2=\"12.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.3\" y1=\"15.5\" x2=\"6.2\" y2=\"14.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.3\" y1=\"15.5\" x2=\"5.25\" y2=\"15.5\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$19\">\n<contactref element=\"RLED7\" pad=\"1\"/>\n<contactref element=\"LED7\" pad=\"C\"/>\n<wire x1=\"7.7\" y1=\"8.9\" x2=\"6.6\" y2=\"8.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.7\" y1=\"9.2\" x2=\"7.7\" y2=\"8.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.3\" y1=\"10.6\" x2=\"7.7\" y2=\"9.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.3\" y1=\"16.7\" x2=\"6.3\" y2=\"10.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.3\" y1=\"17.7\" x2=\"6.3\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.6\" y1=\"8.9\" x2=\"6.6\" y2=\"8.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.3\" y1=\"17.7\" x2=\"5.25\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"7.7\" y=\"8.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"6.3\" y=\"16.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$22\">\n<contactref element=\"RLED8\" pad=\"1\"/>\n<contactref element=\"LED8\" pad=\"C\"/>\n<wire x1=\"7.9\" y1=\"9.8\" x2=\"8.8\" y2=\"8.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.9\" y1=\"10\" x2=\"7.9\" y2=\"9.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.1\" y1=\"10.8\" x2=\"7.9\" y2=\"10\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.1\" y1=\"13.9\" x2=\"7.1\" y2=\"10.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.2\" y1=\"14\" x2=\"7.1\" y2=\"13.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.2\" y1=\"18.1\" x2=\"7.2\" y2=\"14\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.3\" y1=\"19\" x2=\"7.2\" y2=\"18.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.3\" y1=\"20\" x2=\"6.3\" y2=\"19\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.8\" y1=\"8.9\" x2=\"8.8\" y2=\"8.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.3\" y1=\"20\" x2=\"5.25\" y2=\"20\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"7.9\" y=\"9.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"6.3\" y=\"19\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED8\">\n<contactref element=\"LED8\" pad=\"A\"/>\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"28\"/>\n<wire x1=\"7.7\" y1=\"11\" x2=\"8.8\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.7\" y1=\"19.9\" x2=\"7.7\" y2=\"11\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5\" y1=\"22.6\" x2=\"7.7\" y2=\"19.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.4\" y1=\"23.2\" x2=\"5\" y2=\"22.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.8\" y1=\"11\" x2=\"8.8\" y2=\"10.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.4\" y1=\"23.2\" x2=\"4.375\" y2=\"23.275\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"7.7\" y=\"11\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"5\" y=\"22.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED7\">\n<contactref element=\"LED7\" pad=\"A\"/>\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"27\"/>\n<wire x1=\"6.9\" y1=\"11\" x2=\"6.6\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.1\" y1=\"12.2\" x2=\"6.9\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.3\" y1=\"12.2\" x2=\"8.1\" y2=\"12.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"12.4\" x2=\"8.3\" y2=\"12.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"16.3\" x2=\"8.5\" y2=\"12.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.9\" y1=\"16.7\" x2=\"8.5\" y2=\"16.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.2\" y1=\"16.7\" x2=\"8.9\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"17.5\" x2=\"10.2\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"20.2\" x2=\"11\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.3\" y1=\"23.9\" x2=\"11\" y2=\"20.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.4\" y1=\"23.9\" x2=\"7.3\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.6\" y1=\"11\" x2=\"6.6\" y2=\"10.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.4\" y1=\"23.9\" x2=\"4.375\" y2=\"23.925\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"LED6\">\n<contactref element=\"LED6\" pad=\"A\"/>\n<contactref element=\"IOEXPAND_0X24_TOP\" pad=\"26\"/>\n<wire x1=\"4.4\" y1=\"10.7\" x2=\"4.4\" y2=\"10.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.6\" y1=\"9.9\" x2=\"4.4\" y2=\"10.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.6\" y1=\"20.7\" x2=\"3.6\" y2=\"9.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.4\" y1=\"21.5\" x2=\"3.6\" y2=\"20.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.4\" y1=\"23.3\" x2=\"4.4\" y2=\"21.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.6\" y1=\"24.5\" x2=\"4.4\" y2=\"23.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.4\" y1=\"24.5\" x2=\"5.6\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.4\" y1=\"24.5\" x2=\"4.375\" y2=\"24.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"3.6\" y=\"9.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"5.6\" y=\"24.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INAMINUS2\">\n<contactref element=\"RIN3_10K\" pad=\"2\"/>\n<contactref element=\"U2\" pad=\"2\"/>\n<contactref element=\"RGAIN1_3\" pad=\"2\"/>\n<contactref element=\"RGAIN2_3\" pad=\"2\"/>\n<contactref element=\"CGAIN1_3\" pad=\"1\"/>\n<contactref element=\"RIN3\" pad=\"2\"/>\n<contactref element=\"CIN5_3\" pad=\"1\"/>\n<contactref element=\"CIN1NF_3\" pad=\"2\"/>\n<contactref element=\"CIN56_3\" pad=\"2\"/>\n<contactref element=\"CL3\" pad=\"+\"/>\n<contactref element=\"CH3\" pad=\"+\"/>\n<wire x1=\"70.1\" y1=\"40.3\" x2=\"69.3\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.3\" y1=\"40.3\" x2=\"67.2\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.2\" y1=\"40.3\" x2=\"66.4\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.1\" y1=\"40.3\" x2=\"70.1\" y2=\"40.29788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.3\" y1=\"40.3\" x2=\"71\" y2=\"42\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"42\" x2=\"71\" y2=\"42.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.4\" y1=\"41.3\" x2=\"65.4\" y2=\"42.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"40.3\" x2=\"65.4\" y2=\"41.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.4\" y1=\"42.8\" x2=\"65.365\" y2=\"42.8362\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"40.3\" x2=\"66.4\" y2=\"40.29788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.6\" y1=\"42.1\" x2=\"61.6\" y2=\"39.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"44.4\" x2=\"61.75\" y2=\"44.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"44.4\" x2=\"64\" y2=\"44.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.6\" y1=\"44.3\" x2=\"61.6\" y2=\"42.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.7\" y1=\"44.4\" x2=\"61.6\" y2=\"44.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.6\" y1=\"42.1\" x2=\"61.55\" y2=\"42.1\" width=\"0.1524\" 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layer=\"16\"/>\n<wire x1=\"26.1\" y1=\"39.2\" x2=\"31.4\" y2=\"39.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.7\" y1=\"48.6\" x2=\"26.1\" y2=\"39.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.7\" y1=\"49.7\" x2=\"16.7\" y2=\"48.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.3\" y1=\"50.1\" x2=\"16.7\" y2=\"49.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.9\" y1=\"50.1\" x2=\"16.3\" y2=\"50.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.3\" y1=\"48.5\" x2=\"15.9\" y2=\"50.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.3\" y1=\"42.5\" x2=\"14.3\" y2=\"48.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.4\" y1=\"27.8\" x2=\"14.3\" y2=\"42.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.4\" y1=\"27.1\" x2=\"-0.4\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.1\" y1=\"26.6\" x2=\"-0.4\" y2=\"27.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"26.6\" x2=\"0.1\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"38.3\" x2=\"54.5\" y2=\"38.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"26.6\" x2=\"0.825\" y2=\"26.525\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"56\" y=\"39.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"16.7\" y=\"48.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"14.3\" y=\"42.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-0.4\" y=\"27.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$34\">\n<contactref element=\"RLEDPOW\" pad=\"1\"/>\n<contactref element=\"LEDPOW\" pad=\"C\"/>\n<wire x1=\"12.9\" y1=\"56\" x2=\"15\" y2=\"56\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15\" y1=\"56\" x2=\"15\" y2=\"55.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.9\" y1=\"56\" x2=\"12.9\" y2=\"55.95\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$36\">\n<contactref element=\"CIN56_4\" pad=\"1\"/>\n<contactref element=\"RIN4_10K\" pad=\"1\"/>\n<contactref element=\"CIN1NF_4\" pad=\"1\"/>\n<contactref element=\"SW_SUPER4\" pad=\"3\"/>\n<wire x1=\"59.5\" y1=\"51.1\" x2=\"59.5\" y2=\"48.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.5\" y1=\"51.1\" x2=\"59.45\" y2=\"51.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.8\" y1=\"48.6\" x2=\"59.8\" y2=\"46.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.5\" y1=\"48.9\" x2=\"59.8\" y2=\"48.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.8\" y1=\"46.6\" x2=\"59.85\" y2=\"46.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.5\" y1=\"48.9\" x2=\"59.45\" y2=\"48.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.6\" y1=\"57\" x2=\"62.2066\" y2=\"57\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.6\" y1=\"58\" x2=\"61.6\" y2=\"57\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.8\" y1=\"58\" x2=\"60.6\" y2=\"58\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"57.4\" x2=\"59.8\" y2=\"58\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"51.3\" x2=\"59.2\" y2=\"57.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.4\" y1=\"51.1\" x2=\"59.2\" y2=\"51.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.4\" y1=\"51.1\" x2=\"59.45\" y2=\"51.1\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n</signals>\n</board>\n</drawing>\n<compatibility>\n<note version=\"6.3\" minversion=\"6.2.2\" severity=\"warning\">\nSince Version 6.2.2 text objects can contain more than one line,\nwhich will not be processed correctly with this version.\n</note>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/max10adc_v8.sch",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"8.6.1\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting keepoldvectorfont=\"yes\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"0.1\" unitdist=\"inch\" unit=\"inch\" style=\"lines\" multiple=\"1\" display=\"no\" altdistance=\"0.01\" altunitdist=\"inch\" altunit=\"inch\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"2\" name=\"Route2\" color=\"58\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer 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color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"215\" name=\"215bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"216\" name=\"216bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"217\" name=\"217bmp\" color=\"18\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"218\" name=\"218bmp\" color=\"19\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"219\" name=\"219bmp\" color=\"20\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"220\" name=\"220bmp\" color=\"21\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"221\" name=\"221bmp\" color=\"22\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"222\" name=\"222bmp\" color=\"23\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"223\" name=\"223bmp\" color=\"24\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"224\" name=\"224bmp\" color=\"25\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"225\" name=\"225bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"226\" name=\"226bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"227\" name=\"227bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"228\" name=\"228bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"229\" name=\"229bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"230\" name=\"230bmp\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"231\" name=\"Eagle3D_PG1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"232\" name=\"Eagle3D_PG2\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"233\" name=\"Eagle3D_PG3\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"248\" name=\"Housing\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"249\" name=\"Edge\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"250\" name=\"Descript\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"251\" name=\"SMDround\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"254\" name=\"cooling\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"255\" name=\"Accent\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n</layers>\n<schematic xreflabel=\"%F%N/%S.%C%R\" xrefpart=\"/%S.%C%R\">\n<libraries>\n<library name=\"supply1\">\n<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;\n GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;\n Please keep in mind, that these devices are necessary for the\n automatic wiring of the supply signals.&lt;p&gt;\n The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;\n In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;\n &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"+5V\">\n<wire x1=\"1.27\" y1=\"-1.905\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"-1.905\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"+5V\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R90\"/>\n</symbol>\n<symbol name=\"GND\">\n<wire x1=\"-1.905\" y1=\"0\" x2=\"1.905\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"GND\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R270\"/>\n</symbol>\n<symbol name=\"+3V3\">\n<wire x1=\"1.27\" y1=\"-1.905\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"-1.905\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"+3V3\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"+5V\" prefix=\"P+\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"+5V\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"GND\" prefix=\"GND\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"GND\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"+3V3\" prefix=\"+3V3\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"+3V3\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"rcl\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : 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-&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2102L&lt;BR&gt;\n      2102S&lt;BR&gt;\n      2102Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVMCOG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      43P&lt;BR&gt;\n      43W&lt;BR&gt;\n      43Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      40L&lt;BR&gt;\n      40P&lt;BR&gt;\n      40Y&lt;BR&gt;\n      70Y-T602&lt;BR&gt;\n      70L&lt;BR&gt;\n      70P&lt;BR&gt;\n      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&lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      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&lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      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91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;</description>\n<packages>\n<package name=\"C0402\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-0.245\" y1=\"0.224\" x2=\"0.245\" y2=\"0.224\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.245\" y1=\"-0.224\" x2=\"-0.245\" y2=\"-0.224\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.473\" y1=\"0.483\" x2=\"1.473\" y2=\"0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.483\" x2=\"1.473\" y2=\"-0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.483\" x2=\"-1.473\" y2=\"-0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.483\" x2=\"-1.473\" y2=\"0.483\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-0.65\" y=\"0\" dx=\"0.7\" dy=\"0.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.65\" y=\"0\" dx=\"0.7\" dy=\"0.9\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.554\" y1=\"-0.3048\" x2=\"-0.254\" y2=\"0.2951\" layer=\"51\"/>\n<rectangle x1=\"0.2588\" y1=\"-0.3048\" x2=\"0.5588\" y2=\"0.2951\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n</package>\n<package name=\"C0504\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-0.294\" y1=\"0.559\" x2=\"0.294\" y2=\"0.559\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.294\" y1=\"-0.559\" x2=\"0.294\" y2=\"-0.559\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.7\" y=\"0\" dx=\"1\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.7\" y=\"0\" dx=\"1\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.6604\" y1=\"-0.6223\" x2=\"-0.2804\" y2=\"0.6276\" layer=\"51\"/>\n<rectangle x1=\"0.2794\" y1=\"-0.6223\" x2=\"0.6594\" y2=\"0.6276\" layer=\"51\"/>\n<rectangle x1=\"-0.1001\" y1=\"-0.4001\" x2=\"0.1001\" y2=\"0.4001\" layer=\"35\"/>\n</package>\n<package name=\"C0603\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-1.473\" y1=\"0.983\" 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drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-1.778\" y=\"1.397\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.778\" y=\"-2.667\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-025X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 2.5 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"2.159\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.27\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.016\" x2=\"2.413\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.016\" x2=\"-2.413\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.27\" x2=\"2.413\" y2=\"1.016\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.016\" x2=\"-2.159\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" 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name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"1.524\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-2.794\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-030X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 3 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.524\" x2=\"2.159\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.524\" x2=\"-2.159\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.27\" x2=\"2.413\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.27\" x2=\"-2.413\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.524\" x2=\"2.413\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.27\" x2=\"-2.159\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-1.524\" 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shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-040X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 4 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.905\" x2=\"2.159\" y2=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.905\" x2=\"-2.159\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.651\" x2=\"2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.651\" x2=\"-2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.905\" x2=\"2.413\" y2=\"1.651\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.651\" x2=\"-2.159\" y2=\"1.905\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-1.905\" x2=\"2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.413\" y1=\"-1.651\" x2=\"-2.159\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"0.762\" y1=\"0\" x2=\"0.381\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.381\" y1=\"0\" x2=\"0.254\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0.762\" x2=\"-0.254\" y2=\"0\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.381\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.381\" y1=\"0\" x2=\"-0.762\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-050X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 5 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"2.286\" x2=\"2.159\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-2.286\" x2=\"-2.159\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"2.032\" x2=\"2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"2.032\" x2=\"-2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"2.286\" x2=\"2.413\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"2.032\" x2=\"-2.159\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-2.286\" x2=\"2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.413\" y1=\"-2.032\" x2=\"-2.159\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"0.762\" y1=\"0\" x2=\"0.381\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.381\" y1=\"0\" x2=\"0.254\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0.762\" x2=\"-0.254\" y2=\"0\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.381\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.381\" y1=\"0\" x2=\"-0.762\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"2.54\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.81\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-060X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 6 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"2.794\" x2=\"2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-2.794\" x2=\"-2.159\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"2.54\" x2=\"2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"2.54\" x2=\"-2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"2.794\" x2=\"2.413\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"2.54\" x2=\"-2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-2.794\" x2=\"2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.413\" y1=\"-2.54\" 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name=\"C050-030X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.27\" x2=\"-3.683\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.524\" x2=\"3.429\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.27\" x2=\"3.683\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.524\" x2=\"3.683\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.524\" x2=\"3.683\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.27\" x2=\"-3.429\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.27\" x2=\"-3.429\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-050X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"2.286\" x2=\"-3.683\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-2.54\" x2=\"3.429\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-2.286\" x2=\"3.683\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.54\" x2=\"-3.429\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.54\" x2=\"3.683\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-2.54\" x2=\"3.683\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-2.286\" x2=\"-3.429\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.159\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-055X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 5.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"2.54\" x2=\"-3.683\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-2.794\" x2=\"3.429\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-2.54\" x2=\"3.683\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.794\" x2=\"-3.429\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.794\" x2=\"3.683\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-2.794\" x2=\"3.683\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-2.54\" x2=\"-3.429\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"2.54\" x2=\"-3.429\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"3.175\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.302\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-1.524\" y1=\"0\" x2=\"-0.4572\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.4572\" y1=\"0\" x2=\"-0.4572\" y2=\"0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.4572\" y1=\"0\" x2=\"-0.4572\" y2=\"-0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.4318\" y1=\"0.762\" x2=\"0.4318\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.4318\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire 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drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"4.064\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.921\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050H075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nHorizontal, grid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0.508\" x2=\"-3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.302\" y1=\"0.508\" x2=\"-1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.778\" y1=\"0.508\" x2=\"1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.778\" y1=\"0.508\" x2=\"3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"3.302\" y1=\"0.508\" x2=\"3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"0.508\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"2.413\" x2=\"-0.3048\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-0.3048\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"2.413\" x2=\"0.3302\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"0.3302\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<wire x1=\"2.54\" y1=\"0\" x2=\"2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.302\" y=\"8.001\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"3.175\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-2.794\" y1=\"0.127\" x2=\"-2.286\" y2=\"0.508\" layer=\"51\"/>\n<rectangle x1=\"2.286\" y1=\"0.127\" x2=\"2.794\" y2=\"0.508\" layer=\"51\"/>\n</package>\n<package name=\"C075-032X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 3.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-1.524\" x2=\"4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.27\" 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name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.826\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-042X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 4.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-2.032\" x2=\"4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.778\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-2.032\" x2=\"5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.778\" x2=\"-4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.699\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-052X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 5.2 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.54\" x2=\"4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.286\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-2.54\" x2=\"5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.286\" x2=\"-4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-043X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 4.3 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.032\" x2=\"6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"1.524\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.032\" x2=\"6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"1.524\" x2=\"-6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-054X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 5.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.54\" x2=\"6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.032\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.54\" x2=\"6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.032\" x2=\"-6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.905\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-064X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 6.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.54\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102_152-062X184\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm + 15.2 mm, outline 6.2 x 18.4 mm</description>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"3.683\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"0\" x2=\"8.636\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.223\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"3.048\" x2=\"6.731\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.731\" y1=\"2.54\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.176\" y1=\"3.048\" x2=\"11.684\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"7.112\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"3.048\" x2=\"11.176\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.684\" y1=\"2.54\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"10.033\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-5.969\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-054X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 5.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.032\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"2.54\" x2=\"8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"2.54\" x2=\"9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.032\" x2=\"-8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.382\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-064X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 6.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.54\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.048\" x2=\"8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.048\" x2=\"9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.54\" x2=\"-8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-072X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 7.2 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire 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drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.937\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-084X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 8.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.556\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.064\" x2=\"8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.064\" x2=\"9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.556\" x2=\"-8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.445\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-091X182\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 9.1 x 18.2 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.937\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.445\" x2=\"8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.445\" x2=\"9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.937\" x2=\"-8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.826\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-062X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 6.2 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.048\" x2=\"12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"2.54\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.048\" x2=\"13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"2.54\" x2=\"-12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.7\" y=\"3.429\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-074X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 7.4 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.556\" x2=\"12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.048\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.556\" x2=\"13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.048\" x2=\"-12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"3.937\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-087X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 8.7 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"4.318\" x2=\"12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.81\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"4.318\" x2=\"13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.81\" x2=\"-12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"4.699\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-108X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 10.8 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.334\" x2=\"12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"4.826\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.334\" x2=\"13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"4.826\" x2=\"-12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.715\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-113X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 11.3 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.588\" x2=\"12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"5.08\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.588\" x2=\"13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"5.08\" x2=\"-12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-093X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 9.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"4.572\" x2=\"15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"4.064\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"4.572\" x2=\"15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"4.064\" x2=\"-15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"4.953\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-113X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 11.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"5.588\" x2=\"15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"5.08\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"5.588\" x2=\"15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"5.08\" x2=\"-15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-134X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 13.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"6.604\" x2=\"15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"6.096\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"6.604\" x2=\"15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"6.096\" x2=\"-15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"6.985\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-205X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 20.5 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"10.16\" x2=\"15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"9.652\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"10.16\" x2=\"15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"9.652\" x2=\"-15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-4.318\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-137X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 13.7 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"6.731\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.2372\" y=\"7.0612\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-162X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 16.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"8.001\" x2=\"18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"8.001\" x2=\"-18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-8.001\" x2=\"18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"8.001\" x2=\"-18.542\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"8.3312\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-182X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 18.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"9.017\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"9.3472\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-192X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 19.2 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"8.509\" x2=\"20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"8.001\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"8.509\" x2=\"20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"8.001\" x2=\"-20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-203X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 20.3 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"10.16\" x2=\"20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"9.652\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"10.16\" x2=\"20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"9.652\" x2=\"-20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.32\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-035X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.778\" x2=\"3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.524\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.778\" x2=\"3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.524\" x2=\"-3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-155X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 15.5 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"7.62\" x2=\"20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"7.112\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"7.62\" x2=\"20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"7.112\" x2=\"-20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-063X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 6.3 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-3.048\" x2=\"4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.794\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-3.048\" x2=\"5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-154X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 15.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"7.112\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-7.62\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-7.112\" x2=\"-15.748\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"7.62\" x2=\"15.748\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-7.62\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-7.112\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"7.112\" x2=\"-15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-173X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 17.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"8.509\" x2=\"15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"8.001\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"8.509\" x2=\"15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"8.001\" x2=\"-15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C0402K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0204 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1005</description>\n<wire x1=\"-0.425\" y1=\"0.2\" x2=\"0.425\" y2=\"0.2\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.425\" y1=\"-0.2\" x2=\"-0.425\" y2=\"-0.2\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<text x=\"-0.5\" y=\"0.425\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.5\" y=\"-1.45\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.5\" y1=\"-0.25\" x2=\"-0.225\" y2=\"0.25\" layer=\"51\"/>\n<rectangle x1=\"0.225\" y1=\"-0.25\" x2=\"0.5\" y2=\"0.25\" layer=\"51\"/>\n</package>\n<package name=\"C0603K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0603 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1608</description>\n<wire x1=\"-0.725\" y1=\"0.35\" x2=\"0.725\" y2=\"0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.725\" y1=\"-0.35\" x2=\"-0.725\" y2=\"-0.35\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<text x=\"-0.8\" y=\"0.65\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.8\" y=\"-1.65\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8\" y1=\"-0.4\" x2=\"-0.45\" y2=\"0.4\" layer=\"51\"/>\n<rectangle x1=\"0.45\" y1=\"-0.4\" x2=\"0.8\" y2=\"0.4\" layer=\"51\"/>\n</package>\n<package name=\"C0805K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0805 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 2012</description>\n<wire x1=\"-0.925\" y1=\"0.6\" x2=\"0.925\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.925\" y1=\"-0.6\" x2=\"-0.925\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1\" y=\"0.875\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-1.9\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1\" y1=\"-0.65\" x2=\"-0.5\" y2=\"0.65\" layer=\"51\"/>\n<rectangle x1=\"0.5\" y1=\"-0.65\" x2=\"1\" y2=\"0.65\" layer=\"51\"/>\n</package>\n<package name=\"C1206K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1206 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3216</description>\n<wire x1=\"-1.525\" y1=\"0.75\" x2=\"1.525\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-0.75\" x2=\"-1.525\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.1\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.1\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.1\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-0.8\" x2=\"1.6\" y2=\"0.8\" layer=\"51\"/>\n</package>\n<package name=\"C1210K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1210 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3225</description>\n<wire x1=\"-1.525\" y1=\"1.175\" x2=\"1.525\" y2=\"1.175\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-1.175\" x2=\"-1.525\" y2=\"-1.175\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-1.25\" x2=\"-1.1\" y2=\"1.25\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-1.25\" x2=\"1.6\" y2=\"1.25\" layer=\"51\"/>\n</package>\n<package name=\"C1812K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1812 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4532</description>\n<wire x1=\"-2.175\" y1=\"1.525\" x2=\"2.175\" y2=\"1.525\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.175\" y1=\"-1.525\" x2=\"-2.175\" y2=\"-1.525\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<text x=\"-2.25\" y=\"1.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.25\" y1=\"-1.6\" x2=\"-1.65\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"1.65\" y1=\"-1.6\" x2=\"2.25\" y2=\"1.6\" layer=\"51\"/>\n</package>\n<package name=\"C1825K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1825 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4564</description>\n<wire x1=\"-1.525\" y1=\"3.125\" x2=\"1.525\" y2=\"3.125\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-3.125\" x2=\"-1.525\" y2=\"-3.125\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"3.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-4.625\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-3.2\" x2=\"-1.1\" y2=\"3.2\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-3.2\" x2=\"1.6\" y2=\"3.2\" layer=\"51\"/>\n</package>\n<package name=\"C2220K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2220 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5650</description>\n<wire x1=\"-2.725\" y1=\"2.425\" x2=\"2.725\" y2=\"2.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-2.425\" x2=\"-2.725\" y2=\"-2.425\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"2.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-3.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-2.5\" x2=\"-2.2\" y2=\"2.5\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-2.5\" x2=\"2.8\" y2=\"2.5\" layer=\"51\"/>\n</package>\n<package name=\"C2225K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2225 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5664</description>\n<wire x1=\"-2.725\" y1=\"3.075\" x2=\"2.725\" y2=\"3.075\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-3.075\" x2=\"-2.725\" y2=\"-3.075\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"3.6\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-4.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-3.15\" x2=\"-2.2\" y2=\"3.15\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-3.15\" x2=\"2.8\" y2=\"3.15\" layer=\"51\"/>\n</package>\n<package name=\"HPC0201\">\n<description>&lt;b&gt; &lt;/b&gt;&lt;p&gt;\nSource: http://www.vishay.com/docs/10129/hpc0201a.pdf</description>\n<smd name=\"1\" x=\"-0.18\" y=\"0\" dx=\"0.2\" dy=\"0.35\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.18\" y=\"0\" dx=\"0.2\" dy=\"0.35\" layer=\"1\"/>\n<text x=\"-0.75\" y=\"0.74\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.785\" y=\"-1.865\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.305\" y1=\"-0.15\" x2=\"0.305\" y2=\"0.15\" layer=\"51\"/>\n</package>\n<package name=\"C0201\">\n<description>Source: http://www.avxcorp.com/docs/catalogs/cx5r.pdf</description>\n<smd name=\"1\" x=\"-0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.1\" x2=\"0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"-0.1\" layer=\"51\"/>\n</package>\n<package name=\"C1808\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-1.4732\" y1=\"0.9502\" x2=\"1.4732\" y2=\"0.9502\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.4478\" y1=\"-0.9502\" x2=\"1.4732\" y2=\"-0.9502\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<text x=\"-2.233\" y=\"1.827\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.233\" y=\"-2.842\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.275\" y1=\"-1.015\" x2=\"-1.225\" y2=\"1.015\" layer=\"51\"/>\n<rectangle x1=\"1.225\" y1=\"-1.015\" x2=\"2.275\" y2=\"1.015\" layer=\"51\"/>\n</package>\n<package name=\"C3640\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-3.8322\" y1=\"5.0496\" x2=\"3.8322\" y2=\"5.0496\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-3.8322\" y1=\"-5.0496\" x2=\"3.8322\" y2=\"-5.0496\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812\" package=\"C1812\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825\" package=\"C1825\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2012\" package=\"C2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3216\" package=\"C3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3225\" 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pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-055X075\" package=\"C025_050-055X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-024X044\" package=\"C050-024X044\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-025X075\" package=\"C050-025X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-045X075\" package=\"C050-045X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-030X075\" package=\"C050-030X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-050X075\" package=\"C050-050X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-055X075\" package=\"C050-055X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-075X075\" package=\"C050-075X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050H075X075\" package=\"C050H075X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-032X103\" package=\"C075-032X103\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-042X103\" package=\"C075-042X103\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-052X106\" package=\"C075-052X106\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"102-043X133\" package=\"C102-043X133\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"102-054X133\" package=\"C102-054X133\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"102-064X133\" package=\"C102-064X133\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"102_152-062X184\" package=\"C102_152-062X184\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-054X183\" package=\"C150-054X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-064X183\" package=\"C150-064X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-072X183\" package=\"C150-072X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-084X183\" package=\"C150-084X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-091X182\" package=\"C150-091X182\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-062X268\" package=\"C225-062X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-074X268\" package=\"C225-074X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-087X268\" package=\"C225-087X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" 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pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-134X316\" package=\"C275-134X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-205X316\" package=\"C275-205X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-137X374\" package=\"C325-137X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-162X374\" package=\"C325-162X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-182X374\" package=\"C325-182X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-192X418\" package=\"C375-192X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-203X418\" package=\"C375-203X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-035X075\" package=\"C050-035X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-155X418\" package=\"C375-155X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-063X106\" package=\"C075-063X106\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-154X316\" package=\"C275-154X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-173X316\" package=\"C275-173X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0402K\" package=\"C0402K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0603K\" package=\"C0603K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0805K\" package=\"C0805K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1206K\" package=\"C1206K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1210K\" package=\"C1210K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812K\" package=\"C1812K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825K\" package=\"C1825K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2220K\" package=\"C2220K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2225K\" package=\"C2225K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"HPC0201\" package=\"HPC0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0201\" package=\"C0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1808\" package=\"C1808\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3640\" package=\"C3640\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"C01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"resistor\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,203,138,231\" href=\"../directory.asp\" title=\"\"&gt;\n&lt;area shape=\"default\" nohref&gt;\n&lt;/map&gt;\n\n&lt;html&gt;\n\n&lt;title&gt;&lt;/title&gt;\n\n &lt;LINK REL=\"StyleSheet\" TYPE=\"text/css\" HREF=\"style-sheet.css\"&gt;\n\n&lt;body bgcolor=\"#ffffff\" text=\"#000000\" marginwidth=\"0\" marginheight=\"0\" topmargin=\"0\" leftmargin=\"0\"&gt;\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0 height=\"55%\"&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;/td&gt;\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL 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FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n    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CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n  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EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT 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layer=\"21\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"1.27\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-1.016\" y=\"1.27\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.016\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-6.858\" y=\"2.032\" size=\"1.016\" layer=\"21\" ratio=\"12\">0817</text>\n<rectangle x1=\"-3.81\" y1=\"-0.4064\" x2=\"0\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"V234/12\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V234, grid 12.5 mm</description>\n<wire x1=\"-4.953\" y1=\"1.524\" x2=\"-4.699\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.699\" y1=\"1.778\" x2=\"4.953\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.699\" y1=\"-1.778\" x2=\"4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-4.953\" y1=\"-1.524\" x2=\"-4.699\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-4.699\" y1=\"1.778\" x2=\"4.699\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"1.524\" x2=\"-4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.699\" y1=\"-1.778\" x2=\"-4.699\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"1.524\" x2=\"4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"0\" x2=\"5.461\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.35\" y1=\"0\" x2=\"-5.461\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<pad name=\"1\" x=\"-6.35\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"6.35\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-4.953\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"4.953\" y1=\"-0.4064\" x2=\"5.4102\" y2=\"0.4064\" layer=\"21\"/>\n<rectangle x1=\"-5.4102\" y1=\"-0.4064\" x2=\"-4.953\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"V235/17\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V235, grid 17.78 mm</description>\n<wire x1=\"-6.731\" y1=\"2.921\" x2=\"6.731\" y2=\"2.921\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.112\" y1=\"2.54\" x2=\"-7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.731\" y1=\"-2.921\" x2=\"-6.731\" y2=\"-2.921\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"2.54\" x2=\"7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.89\" y1=\"0\" x2=\"7.874\" y2=\"0\" width=\"1.016\" layer=\"51\"/>\n<wire x1=\"-7.874\" y1=\"0\" x2=\"-8.89\" y2=\"0\" width=\"1.016\" layer=\"51\"/>\n<wire x1=\"-7.112\" y1=\"-2.54\" x2=\"-6.731\" y2=\"-2.921\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"6.731\" y1=\"2.921\" x2=\"7.112\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.731\" y1=\"-2.921\" x2=\"7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-7.112\" y1=\"2.54\" x2=\"-6.731\" y2=\"2.921\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-8.89\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"8.89\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-6.858\" y=\"3.302\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.842\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"7.112\" y1=\"-0.508\" x2=\"7.747\" y2=\"0.508\" layer=\"21\"/>\n<rectangle x1=\"-7.747\" y1=\"-0.508\" x2=\"-7.112\" y2=\"0.508\" layer=\"21\"/>\n</package>\n<package name=\"V526-0\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V526-0, grid 2.5 mm</description>\n<wire x1=\"-2.54\" y1=\"1.016\" x2=\"-2.286\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.286\" y1=\"1.27\" x2=\"2.54\" y2=\"1.016\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.286\" y1=\"-1.27\" x2=\"2.54\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.54\" y1=\"-1.016\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"-1.016\" x2=\"2.54\" y2=\"1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"-1.27\" x2=\"2.286\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"1.016\" x2=\"-2.54\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.413\" y=\"1.651\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.413\" y=\"-2.794\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0102R\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0102W\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"0\" dx=\"0.6\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.95\" y=\"0\" dx=\"0.6\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0204R\">\n<description>&lt;b&gt;CECC Size RC3715&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.938\" y1=\"0.6\" x2=\"-0.938\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.938\" y1=\"-0.6\" x2=\"0.938\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"0.8\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"0.8\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0204W\">\n<description>&lt;b&gt;CECC Size RC3715&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.684\" y1=\"0.6\" x2=\"-0.684\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.684\" y1=\"-0.6\" x2=\"0.684\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207R\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.2125\" y1=\"1\" x2=\"-1.2125\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.2125\" y1=\"-1\" x2=\"1.2125\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.2225\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.2225\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207W\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.149\" y1=\"1\" x2=\"-1.149\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.149\" y1=\"-1\" x2=\"1.149\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"0922V\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0922, grid 7.5 mm</description>\n<wire x1=\"2.54\" y1=\"0\" x2=\"1.397\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-3.81\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-0.508\" y=\"1.6764\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.508\" y=\"-2.9972\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-6.858\" y=\"2.54\" size=\"1.016\" layer=\"21\" ratio=\"12\">0922</text>\n<rectangle x1=\"-3.81\" y1=\"-0.4064\" x2=\"1.3208\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"RDH/15\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype RDH, grid 15 mm</description>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-6.858\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"2.794\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"-3.048\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.794\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"-4.953\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"-2.667\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" 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ratio=\"10\" rot=\"R90\">RDH</text>\n<rectangle x1=\"-6.7564\" y1=\"-0.4064\" x2=\"-6.4516\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"6.4516\" y1=\"-0.4064\" x2=\"6.7564\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"MINI_MELF-0102AX\">\n<description>&lt;b&gt;Mini MELF 0102 Axial&lt;/b&gt;</description>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"52\"/>\n<smd name=\"1\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"1\" roundness=\"100\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"16\" roundness=\"100\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<hole x=\"0\" y=\"0\" drill=\"1.3\"/>\n</package>\n<package name=\"R0201\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt; chip&lt;p&gt;\nSource: http://www.vishay.com/docs/20008/dcrcw.pdf</description>\n<smd name=\"1\" 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x1=\"5.675\" y1=\"3.4\" x2=\"-5.675\" y2=\"3.4\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.575\" y=\"0.025\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<text x=\"-5.775\" y=\"3.925\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-5.775\" y=\"-5.15\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC6927\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-8.65\" y1=\"3.375\" x2=\"-8.65\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-8.65\" y1=\"-3.375\" x2=\"8.65\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"8.65\" y1=\"-3.375\" x2=\"8.65\" y2=\"3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"8.65\" y1=\"3.375\" x2=\"-8.65\" y2=\"3.375\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-7.95\" y=\"0.025\" dx=\"3.94\" dy=\"5.97\" layer=\"1\"/>\n<smd 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pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0805W\" package=\"R0805W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1206\" package=\"R1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1206W\" package=\"R1206W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1210\" package=\"R1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1210W\" package=\"R1210W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2010\" package=\"R2010\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2010W\" package=\"R2010W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2012\" package=\"R2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2012W\" package=\"R2012W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2512\" package=\"R2512\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2512W\" package=\"R2512W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3216\" package=\"R3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3216W\" package=\"R3216W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3225\" package=\"R3225\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3225W\" package=\"R3225W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R5025\" package=\"R5025\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R5025W\" package=\"R5025W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R6332\" package=\"R6332\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R6332W\" package=\"R6332W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M0805\" package=\"M0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M1206\" package=\"M1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M1406\" package=\"M1406\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M2012\" package=\"M2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M2309\" package=\"M2309\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M3216\" package=\"M3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M3516\" package=\"M3516\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M5923\" package=\"M5923\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/5\" package=\"0204/5\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/7\" package=\"0204/7\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/2V\" package=\"0204V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/10\" package=\"0207/10\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/12\" package=\"0207/12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/15\" package=\"0207/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/2V\" package=\"0207/2V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/5V\" 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pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0411/12\" package=\"0411/12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0411/15\" package=\"0411/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0411/3V\" package=\"0411V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0414/15\" package=\"0414/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0414/5V\" package=\"0414V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/17\" package=\"0617/17\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/22\" package=\"0617/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/5V\" package=\"0617V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0922/22\" package=\"0922/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0613/5V\" package=\"P0613V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0613/15\" package=\"P0613/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0817/22\" package=\"P0817/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0817/7V\" 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pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0102W\" package=\"MINI_MELF-0102W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0204R\" package=\"MINI_MELF-0204R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0204W\" package=\"MINI_MELF-0204W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0207R\" package=\"MINI_MELF-0207R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" 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pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0201\" package=\"R0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA52\" package=\"VTA52\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA53\" package=\"VTA53\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA54\" package=\"VTA54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA55\" package=\"VTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA56\" package=\"VTA56\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTA55\" package=\"VMTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTB60\" package=\"VMTB60\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R4527\" 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pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC4527\" package=\"WSC4527\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC6927\" package=\"WSC6927\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1218\" package=\"R1218\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1812X7R\" package=\"1812X7R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PRL1632\" package=\"PRL1632\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"R01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"10M08SAE144\">\n<packages>\n<package name=\"EQFP144\">\n<description>&lt;b&gt;EQFP144&lt;/b&gt;&lt;p&gt;\nSource: http://www.altera.com/literature/ds/144-EQFP.pdf</description>\n<wire x1=\"-9.8984\" y1=\"9.4\" x2=\"-9.4\" y2=\"9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-9.4\" y1=\"-9.8984\" x2=\"9.4\" y2=\"-9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire 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x2=\"1.016\" y2=\"0.254\" layer=\"31\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"10M08SAE144\">\n<wire x1=\"-63.5\" y1=\"53.34\" x2=\"66.04\" y2=\"53.34\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"GND1\" x=\"-68.58\" y=\"50.8\" length=\"middle\"/>\n<pin name=\"GND2\" x=\"-68.58\" y=\"48.26\" length=\"middle\"/>\n<pin name=\"GND3\" x=\"-68.58\" y=\"45.72\" length=\"middle\"/>\n<pin name=\"GND4\" x=\"-68.58\" y=\"43.18\" length=\"middle\"/>\n<pin name=\"GND5\" x=\"-68.58\" y=\"40.64\" length=\"middle\"/>\n<pin name=\"GND6\" x=\"-68.58\" y=\"38.1\" length=\"middle\"/>\n<pin name=\"GND7\" x=\"-68.58\" y=\"35.56\" length=\"middle\"/>\n<pin name=\"GND8\" x=\"-68.58\" y=\"33.02\" length=\"middle\"/>\n<pin name=\"GND9\" x=\"-68.58\" y=\"30.48\" length=\"middle\"/>\n<pin name=\"GND10\" x=\"-68.58\" y=\"27.94\" length=\"middle\"/>\n<pin name=\"GND11\" x=\"-68.58\" y=\"25.4\" length=\"middle\"/>\n<pin name=\"GND12\" x=\"-68.58\" y=\"22.86\" length=\"middle\"/>\n<pin name=\"VCC_ONE1\" x=\"12.7\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE2\" x=\"15.24\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE3\" x=\"17.78\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE4\" x=\"20.32\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE5\" x=\"22.86\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE6\" x=\"25.4\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE7\" x=\"27.94\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE10\" x=\"30.48\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE11\" x=\"33.02\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE12\" x=\"35.56\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA1\" x=\"40.64\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA2\" x=\"43.18\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA3\" x=\"45.72\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA4\" x=\"48.26\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA5\" x=\"50.8\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA6\" x=\"53.34\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<wire x1=\"66.04\" y1=\"53.34\" x2=\"66.04\" y2=\"-55.88\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"VCCIO1A\" x=\"71.12\" y=\"48.26\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO1B\" x=\"71.12\" y=\"45.72\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO2\" x=\"71.12\" y=\"43.18\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO3\" x=\"71.12\" y=\"40.64\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO3@2\" x=\"71.12\" y=\"38.1\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO4\" x=\"71.12\" y=\"35.56\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO5\" x=\"71.12\" y=\"33.02\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO6\" x=\"71.12\" y=\"30.48\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO6@2\" x=\"71.12\" y=\"27.94\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO7\" x=\"71.12\" y=\"25.4\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO8\" x=\"71.12\" y=\"22.86\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO8@2\" x=\"71.12\" y=\"20.32\" length=\"middle\" rot=\"R180\"/>\n<wire x1=\"-63.5\" y1=\"53.34\" x2=\"-63.5\" y2=\"-55.88\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"IO1A_6\" x=\"-68.58\" y=\"12.7\" length=\"middle\"/>\n<pin name=\"IO1A_7\" x=\"-68.58\" y=\"10.16\" length=\"middle\"/>\n<pin name=\"IO1A_8\" x=\"-68.58\" y=\"7.62\" length=\"middle\"/>\n<pin name=\"IO1A_10\" x=\"-68.58\" y=\"5.08\" length=\"middle\"/>\n<pin name=\"IO1A_11\" x=\"-68.58\" y=\"2.54\" length=\"middle\"/>\n<pin name=\"IO1A_12\" x=\"-68.58\" y=\"0\" length=\"middle\"/>\n<pin name=\"IO1A_13\" x=\"-68.58\" y=\"-2.54\" length=\"middle\"/>\n<pin name=\"IO1A_14\" x=\"-68.58\" y=\"-5.08\" length=\"middle\"/>\n<pin name=\"JTAGEN\" x=\"-68.58\" y=\"-7.62\" length=\"middle\"/>\n<pin name=\"TMS\" x=\"-68.58\" y=\"-10.16\" length=\"middle\"/>\n<pin name=\"VREFB1\" x=\"-68.58\" y=\"-12.7\" length=\"middle\"/>\n<pin name=\"TCK\" x=\"-68.58\" y=\"-15.24\" length=\"middle\"/>\n<pin name=\"TDI\" x=\"-68.58\" y=\"-17.78\" length=\"middle\"/>\n<pin name=\"TDO\" x=\"-68.58\" y=\"-20.32\" length=\"middle\"/>\n<pin name=\"IO1B_21\" x=\"-68.58\" y=\"-22.86\" length=\"middle\"/>\n<pin name=\"IO1B_22\" x=\"-68.58\" y=\"-25.4\" length=\"middle\"/>\n<pin name=\"IO1B_24\" x=\"-68.58\" y=\"-27.94\" length=\"middle\"/>\n<pin name=\"IO1B_25\" x=\"-68.58\" y=\"-30.48\" length=\"middle\"/>\n<pin name=\"CLK0N\" x=\"-68.58\" y=\"-33.02\" length=\"middle\"/>\n<pin name=\"CLK0P\" x=\"-68.58\" y=\"-35.56\" length=\"middle\"/>\n<pin name=\"CLK1N\" x=\"-68.58\" y=\"-38.1\" length=\"middle\"/>\n<pin name=\"CLK1P\" x=\"-68.58\" y=\"-40.64\" length=\"middle\"/>\n<pin name=\"VREFB2\" x=\"-68.58\" y=\"-43.18\" length=\"middle\"/>\n<pin name=\"PLL_CLKOUTN\" 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y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_69\" x=\"40.64\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_70\" x=\"43.18\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO5_74\" x=\"71.12\" y=\"-53.34\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_75\" x=\"71.12\" y=\"-50.8\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_76\" x=\"71.12\" y=\"-48.26\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_77\" x=\"71.12\" y=\"-45.72\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_78\" x=\"71.12\" y=\"-43.18\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_79\" x=\"71.12\" y=\"-40.64\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VREFB5\" x=\"71.12\" y=\"-38.1\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_81\" x=\"71.12\" y=\"-35.56\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_84\" x=\"71.12\" y=\"-33.02\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_85\" x=\"71.12\" y=\"-30.48\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_86\" x=\"71.12\" y=\"-27.94\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_87\" x=\"71.12\" y=\"-25.4\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK2P\" x=\"71.12\" y=\"-20.32\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK2N\" x=\"71.12\" y=\"-17.78\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK3P\" x=\"71.12\" y=\"-15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK3N\" x=\"71.12\" y=\"-12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_92\" x=\"71.12\" y=\"-10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_93\" x=\"71.12\" y=\"-7.62\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_96\" x=\"71.12\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VREFB6\" x=\"71.12\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_98\" x=\"71.12\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_99\" x=\"71.12\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_100\" x=\"71.12\" y=\"5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_101\" x=\"71.12\" y=\"7.62\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_102\" x=\"71.12\" y=\"10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_105\" x=\"71.12\" y=\"12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_106\" x=\"71.12\" y=\"15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"GND_PAD\" x=\"-68.58\" y=\"20.32\" length=\"middle\"/>\n<pin name=\"IO7_110\" x=\"7.62\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_111\" x=\"5.08\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VREFB7\" x=\"2.54\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_113\" x=\"0\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_114\" x=\"-2.54\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_118\" x=\"-5.08\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_119\" x=\"-7.62\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_120\" x=\"-12.7\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_121\" x=\"-15.24\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_122\" x=\"-17.78\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VREFB8\" x=\"-20.32\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_124\" x=\"-22.86\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"CONFIG_SEL\" x=\"-25.4\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_127\" x=\"-27.94\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"NCONFIG\" x=\"-30.48\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_130\" x=\"-33.02\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_131\" x=\"-35.56\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_132\" x=\"-38.1\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_134\" x=\"-40.64\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_135\" x=\"-43.18\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"NSTATUS\" x=\"-45.72\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"CONF_DONE\" x=\"-48.26\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_140\" x=\"-50.8\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_141\" x=\"-53.34\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<text x=\"-17.78\" y=\"17.78\" size=\"1.27\" layer=\"95\">&gt;NAME</text>\n<text x=\"-17.78\" y=\"15.24\" size=\"1.27\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"REFGND\" x=\"-68.58\" y=\"17.78\" length=\"middle\"/>\n<pin name=\"ADC_VREF\" x=\"-43.18\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"ANAIN1\" x=\"-40.64\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"10M08SAE144\">\n<gates>\n<gate name=\"G$1\" symbol=\"10M08SAE144\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"EQFP144\">\n<connects>\n<connect gate=\"G$1\" pin=\"ADC_VREF\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"ANAIN1\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"CLK0N\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"CLK0P\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"CLK1N\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"CLK1P\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"CLK2N\" pad=\"89\"/>\n<connect gate=\"G$1\" pin=\"CLK2P\" pad=\"88\"/>\n<connect gate=\"G$1\" pin=\"CLK3N\" pad=\"91\"/>\n<connect gate=\"G$1\" pin=\"CLK3P\" pad=\"90\"/>\n<connect gate=\"G$1\" pin=\"CONFIG_SEL\" pad=\"126\"/>\n<connect gate=\"G$1\" pin=\"CONF_DONE\" pad=\"138\"/>\n<connect gate=\"G$1\" pin=\"GND1\" pad=\"95\"/>\n<connect gate=\"G$1\" pin=\"GND10\" pad=\"116\"/>\n<connect gate=\"G$1\" pin=\"GND11\" pad=\"104\"/>\n<connect gate=\"G$1\" pin=\"GND12\" pad=\"63\"/>\n<connect gate=\"G$1\" pin=\"GND2\" pad=\"83\"/>\n<connect gate=\"G$1\" pin=\"GND3\" pad=\"68\"/>\n<connect gate=\"G$1\" pin=\"GND4\" pad=\"53\"/>\n<connect gate=\"G$1\" pin=\"GND5\" pad=\"42\"/>\n<connect gate=\"G$1\" pin=\"GND6\" pad=\"142\"/>\n<connect gate=\"G$1\" pin=\"GND7\" pad=\"137\"/>\n<connect gate=\"G$1\" pin=\"GND8\" pad=\"133\"/>\n<connect gate=\"G$1\" pin=\"GND9\" pad=\"125\"/>\n<connect gate=\"G$1\" pin=\"GND_PAD\" pad=\"E\"/>\n<connect gate=\"G$1\" pin=\"IO1A_10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"IO1A_11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"IO1A_12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"IO1A_13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"IO1A_14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"IO1A_6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"IO1A_7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"IO1A_8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"IO1B_21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"IO1B_22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"IO1B_24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"IO1B_25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"IO3_38\" pad=\"38\"/>\n<connect gate=\"G$1\" pin=\"IO3_39\" pad=\"39\"/>\n<connect gate=\"G$1\" pin=\"IO3_41\" pad=\"41\"/>\n<connect gate=\"G$1\" pin=\"IO3_43\" pad=\"43\"/>\n<connect gate=\"G$1\" pin=\"IO3_44\" pad=\"44\"/>\n<connect gate=\"G$1\" pin=\"IO3_45\" pad=\"45\"/>\n<connect gate=\"G$1\" pin=\"IO3_46\" pad=\"46\"/>\n<connect gate=\"G$1\" pin=\"IO3_47\" pad=\"47\"/>\n<connect gate=\"G$1\" pin=\"IO3_50\" pad=\"50\"/>\n<connect gate=\"G$1\" pin=\"IO3_52\" pad=\"52\"/>\n<connect gate=\"G$1\" pin=\"IO3_54\" pad=\"54\"/>\n<connect gate=\"G$1\" pin=\"IO3_55\" pad=\"55\"/>\n<connect gate=\"G$1\" pin=\"IO3_56\" pad=\"56\"/>\n<connect gate=\"G$1\" pin=\"IO3_57\" pad=\"57\"/>\n<connect gate=\"G$1\" pin=\"IO3_58\" pad=\"58\"/>\n<connect gate=\"G$1\" pin=\"IO3_59\" pad=\"59\"/>\n<connect gate=\"G$1\" pin=\"IO3_60\" pad=\"60\"/>\n<connect gate=\"G$1\" pin=\"IO4_62\" pad=\"62\"/>\n<connect gate=\"G$1\" pin=\"IO4_64\" pad=\"64\"/>\n<connect gate=\"G$1\" pin=\"IO4_65\" pad=\"65\"/>\n<connect gate=\"G$1\" pin=\"IO4_66\" pad=\"66\"/>\n<connect gate=\"G$1\" pin=\"IO4_69\" pad=\"69\"/>\n<connect gate=\"G$1\" pin=\"IO4_70\" pad=\"70\"/>\n<connect gate=\"G$1\" pin=\"IO5_74\" pad=\"74\"/>\n<connect gate=\"G$1\" pin=\"IO5_75\" pad=\"75\"/>\n<connect gate=\"G$1\" pin=\"IO5_76\" pad=\"76\"/>\n<connect gate=\"G$1\" pin=\"IO5_77\" pad=\"77\"/>\n<connect gate=\"G$1\" pin=\"IO5_78\" pad=\"78\"/>\n<connect gate=\"G$1\" pin=\"IO5_79\" pad=\"79\"/>\n<connect gate=\"G$1\" pin=\"IO5_81\" pad=\"81\"/>\n<connect gate=\"G$1\" pin=\"IO5_84\" pad=\"84\"/>\n<connect gate=\"G$1\" pin=\"IO5_85\" pad=\"85\"/>\n<connect gate=\"G$1\" pin=\"IO5_86\" pad=\"86\"/>\n<connect gate=\"G$1\" pin=\"IO5_87\" pad=\"87\"/>\n<connect gate=\"G$1\" pin=\"IO6_100\" pad=\"100\"/>\n<connect gate=\"G$1\" pin=\"IO6_101\" pad=\"101\"/>\n<connect gate=\"G$1\" pin=\"IO6_102\" pad=\"102\"/>\n<connect gate=\"G$1\" pin=\"IO6_105\" pad=\"105\"/>\n<connect gate=\"G$1\" pin=\"IO6_106\" pad=\"106\"/>\n<connect gate=\"G$1\" pin=\"IO6_92\" pad=\"92\"/>\n<connect gate=\"G$1\" pin=\"IO6_93\" pad=\"93\"/>\n<connect gate=\"G$1\" pin=\"IO6_96\" pad=\"96\"/>\n<connect gate=\"G$1\" pin=\"IO6_98\" pad=\"98\"/>\n<connect gate=\"G$1\" pin=\"IO6_99\" pad=\"99\"/>\n<connect gate=\"G$1\" pin=\"IO7_110\" pad=\"110\"/>\n<connect gate=\"G$1\" pin=\"IO7_111\" pad=\"111\"/>\n<connect gate=\"G$1\" pin=\"IO7_113\" pad=\"113\"/>\n<connect gate=\"G$1\" pin=\"IO7_114\" pad=\"114\"/>\n<connect gate=\"G$1\" pin=\"IO7_118\" pad=\"118\"/>\n<connect gate=\"G$1\" pin=\"IO7_119\" pad=\"119\"/>\n<connect gate=\"G$1\" pin=\"IO8_120\" pad=\"120\"/>\n<connect gate=\"G$1\" pin=\"IO8_121\" pad=\"121\"/>\n<connect gate=\"G$1\" pin=\"IO8_122\" pad=\"122\"/>\n<connect gate=\"G$1\" pin=\"IO8_124\" pad=\"124\"/>\n<connect gate=\"G$1\" pin=\"IO8_127\" pad=\"127\"/>\n<connect gate=\"G$1\" pin=\"IO8_130\" pad=\"130\"/>\n<connect gate=\"G$1\" pin=\"IO8_131\" pad=\"131\"/>\n<connect gate=\"G$1\" pin=\"IO8_132\" pad=\"132\"/>\n<connect gate=\"G$1\" pin=\"IO8_134\" pad=\"134\"/>\n<connect gate=\"G$1\" pin=\"IO8_135\" pad=\"135\"/>\n<connect gate=\"G$1\" pin=\"IO8_140\" pad=\"140\"/>\n<connect gate=\"G$1\" pin=\"IO8_141\" pad=\"141\"/>\n<connect gate=\"G$1\" pin=\"JTAGEN\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"NCONFIG\" pad=\"129\"/>\n<connect gate=\"G$1\" pin=\"NSTATUS\" pad=\"136\"/>\n<connect gate=\"G$1\" pin=\"PLL_CLKOUTN\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"PLL_CLKOUTP\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"REFGND\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"TCK\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"TDI\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"TDO\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"TMS\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"VCCA1\" pad=\"35\"/>\n<connect gate=\"G$1\" pin=\"VCCA2\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"VCCA3\" pad=\"107\"/>\n<connect gate=\"G$1\" pin=\"VCCA4\" pad=\"143\"/>\n<connect gate=\"G$1\" pin=\"VCCA5\" pad=\"71\"/>\n<connect gate=\"G$1\" pin=\"VCCA6\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"VCCIO1A\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VCCIO1B\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"VCCIO2\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"VCCIO3\" pad=\"49\"/>\n<connect gate=\"G$1\" pin=\"VCCIO3@2\" pad=\"40\"/>\n<connect gate=\"G$1\" pin=\"VCCIO4\" pad=\"67\"/>\n<connect gate=\"G$1\" pin=\"VCCIO5\" pad=\"82\"/>\n<connect gate=\"G$1\" pin=\"VCCIO6\" pad=\"94\"/>\n<connect gate=\"G$1\" pin=\"VCCIO6@2\" pad=\"103\"/>\n<connect gate=\"G$1\" pin=\"VCCIO7\" pad=\"117\"/>\n<connect gate=\"G$1\" pin=\"VCCIO8\" pad=\"139\"/>\n<connect gate=\"G$1\" pin=\"VCCIO8@2\" pad=\"128\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE1\" pad=\"73\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE10\" pad=\"109\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE11\" pad=\"108\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE12\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE2\" pad=\"72\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE3\" pad=\"51\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE4\" pad=\"37\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE5\" pad=\"36\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE6\" pad=\"144\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE7\" pad=\"115\"/>\n<connect gate=\"G$1\" pin=\"VREFB1\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"VREFB2\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"VREFB3\" pad=\"48\"/>\n<connect gate=\"G$1\" pin=\"VREFB4\" pad=\"61\"/>\n<connect gate=\"G$1\" pin=\"VREFB5\" pad=\"80\"/>\n<connect gate=\"G$1\" pin=\"VREFB6\" pad=\"97\"/>\n<connect gate=\"G$1\" pin=\"VREFB7\" pad=\"112\"/>\n<connect gate=\"G$1\" pin=\"VREFB8\" pad=\"123\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"crystal\">\n<description>&lt;b&gt;Crystals and Crystal Resonators&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"ASE\">\n<description>&lt;b&gt;3.3Vdc CMOS SMD CRYSTAL CLOCK OSCILLATOR&lt;/b&gt; ASE Series&lt;p&gt;\nSource: www.abracon.com</description>\n<wire x1=\"-1.3\" y1=\"1.15\" x2=\"1.3\" y2=\"1.15\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"0.95\" x2=\"1.5\" y2=\"-0.95\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.3\" y1=\"-1.15\" x2=\"-1.3\" y2=\"-1.15\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-0.95\" x2=\"-1.5\" y2=\"0.95\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.3\" y1=\"1.15\" x2=\"-1.5\" y2=\"0.95\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"1.5\" y1=\"0.95\" x2=\"1.3\" y2=\"1.15\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"-1.5\" y1=\"-0.95\" x2=\"-1.3\" y2=\"-1.15\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"1.3\" y1=\"-1.15\" x2=\"1.5\" y2=\"-0.95\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<circle x=\"-1\" y=\"-0.7\" radius=\"0.1802\" width=\"0\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.05\" y=\"-0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.05\" y=\"-0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.05\" y=\"0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-1.05\" y=\"0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-2.25\" y=\"1.5\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.75\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"ASE\">\n<wire x1=\"-7.62\" y1=\"7.62\" x2=\"-7.62\" y2=\"-7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-7.62\" x2=\"-7.62\" y2=\"-7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-7.62\" x2=\"7.62\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-5.08\" x2=\"7.62\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"0\" x2=\"7.62\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-7.62\" y1=\"7.62\" x2=\"7.62\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"5.08\" x2=\"6.35\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"6.35\" y1=\"0\" x2=\"2.54\" y2=\"-2.54\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-2.54\" x2=\"-1.27\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"-5.08\" x2=\"-1.27\" y2=\"-3.175\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"-3.175\" x2=\"-1.27\" y2=\"3.175\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"3.175\" x2=\"-1.27\" y2=\"5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"3.175\" x2=\"-1.27\" y2=\"3.175\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-3.175\" x2=\"-1.27\" y2=\"-3.175\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"6.35\" y1=\"0\" x2=\"7.62\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-4.826\" y1=\"-0.381\" x2=\"-4.826\" y2=\"0.381\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-4.826\" y1=\"0.381\" x2=\"-2.794\" y2=\"0.381\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.794\" y1=\"0.381\" x2=\"-2.794\" y2=\"-0.381\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-4.826\" y1=\"-0.381\" x2=\"-2.794\" y2=\"-0.381\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"-1.016\" x2=\"-3.81\" y2=\"-1.016\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-1.016\" x2=\"-2.54\" y2=\"-1.016\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"1.016\" x2=\"-3.81\" y2=\"3.175\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-3.175\" x2=\"-3.81\" y2=\"-1.016\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"1.016\" x2=\"-2.54\" y2=\"1.016\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-5.08\" x2=\"2.54\" y2=\"-2.54\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-5.08\" x2=\"2.54\" y2=\"-5.08\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"-7.62\" y=\"8.255\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-7.62\" y=\"-10.16\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<text x=\"-6.985\" y=\"4.318\" size=\"1.524\" layer=\"95\">VDD</text>\n<text x=\"-6.985\" y=\"-5.842\" size=\"1.524\" layer=\"95\">GND</text>\n<text x=\"-0.127\" y=\"-0.762\" size=\"1.524\" layer=\"95\">OUT</text>\n<text x=\"2.54\" y=\"-7.112\" size=\"1.524\" layer=\"95\">TRI</text>\n<pin name=\"GND\" x=\"-12.7\" y=\"-5.08\" visible=\"pad\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"VDD\" x=\"-12.7\" y=\"5.08\" visible=\"pad\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"OUT\" x=\"12.7\" y=\"0\" visible=\"pad\" length=\"middle\" direction=\"out\" rot=\"R180\"/>\n<pin name=\"TRI\" x=\"12.7\" y=\"-5.08\" visible=\"pad\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"ASE\">\n<description>&lt;b&gt;3.3Vdc CMOS SMD CRYSTAL CLOCK OSCILLATOR&lt;/b&gt;&lt;p&gt;\nSOurce: www.abracon.com</description>\n<gates>\n<gate name=\"G$1\" symbol=\"ASE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ASE\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"OUT\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"TRI\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"led\">\n<description>&lt;b&gt;LEDs&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;br&gt;\nExtended by Federico Battaglin &lt;author&gt;&amp;lt;federico.rd@fdpinternational.com&amp;gt;&lt;/author&gt; with DUOLED</description>\n<packages>\n<package name=\"1206\">\n<description>&lt;b&gt;CHICAGO MINIATURE LAMP, INC.&lt;/b&gt;&lt;p&gt;\n7022X Series SMT LEDs 1206 Package Size</description>\n<wire x1=\"1.55\" y1=\"-0.75\" x2=\"-1.55\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.55\" y1=\"-0.75\" x2=\"-1.55\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.55\" y1=\"0.75\" x2=\"1.55\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.55\" y1=\"0.75\" x2=\"1.55\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.55\" y1=\"-0.5\" x2=\"0.55\" y2=\"-0.5\" width=\"0.1016\" layer=\"21\" curve=\"95.452622\"/>\n<wire x1=\"-0.55\" y1=\"-0.5\" x2=\"-0.55\" y2=\"0.5\" width=\"0.1016\" layer=\"51\" curve=\"-84.547378\"/>\n<wire x1=\"-0.55\" y1=\"0.5\" x2=\"0.55\" y2=\"0.5\" width=\"0.1016\" layer=\"21\" curve=\"-95.452622\"/>\n<wire x1=\"0.55\" y1=\"0.5\" x2=\"0.55\" y2=\"-0.5\" width=\"0.1016\" layer=\"51\" curve=\"-84.547378\"/>\n<smd name=\"A\" x=\"-1.422\" y=\"0\" dx=\"1.6\" dy=\"1.803\" layer=\"1\"/>\n<smd name=\"C\" x=\"1.422\" y=\"0\" dx=\"1.6\" dy=\"1.803\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.1\" y1=\"-0.1\" x2=\"0.1\" y2=\"0.1\" layer=\"21\"/>\n<rectangle x1=\"0.45\" y1=\"-0.7\" x2=\"0.8\" y2=\"-0.45\" layer=\"51\"/>\n<rectangle x1=\"0.8\" y1=\"-0.7\" x2=\"0.9\" y2=\"0.5\" layer=\"51\"/>\n<rectangle x1=\"0.8\" y1=\"0.55\" x2=\"0.9\" y2=\"0.7\" layer=\"51\"/>\n<rectangle x1=\"-0.9\" y1=\"-0.7\" x2=\"-0.8\" y2=\"0.5\" layer=\"51\"/>\n<rectangle x1=\"-0.9\" y1=\"0.55\" x2=\"-0.8\" y2=\"0.7\" layer=\"51\"/>\n<rectangle x1=\"0.45\" y1=\"-0.7\" x2=\"0.6\" y2=\"-0.45\" layer=\"21\"/>\n</package>\n<package name=\"LD260\">\n<description>&lt;B&gt;LED&lt;/B&gt;&lt;p&gt;\n5 mm, square, Siemens</description>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"0\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"-1.27\" x2=\"1.27\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"1.27\" x2=\"0\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"1.27\" x2=\"-1.27\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-1.27\" x2=\"1.27\" y2=\"-0.889\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"1.27\" x2=\"1.27\" y2=\"0.889\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"0.889\" x2=\"1.27\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"1.27\" y1=\"0\" x2=\"1.27\" y2=\"-0.889\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0.889\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"-1.27\" y2=\"-0.889\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-0.889\" x2=\"-1.27\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"0.889\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"1.27\" x2=\"0.9917\" y2=\"0.7934\" width=\"0.1524\" layer=\"21\" curve=\"-51.33923\"/>\n<wire x1=\"-0.9917\" y1=\"0.7934\" x2=\"0\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-51.33923\"/>\n<wire x1=\"0\" y1=\"-1.27\" x2=\"0.9917\" y2=\"-0.7934\" width=\"0.1524\" layer=\"21\" curve=\"51.33923\"/>\n<wire x1=\"-0.9917\" y1=\"-0.7934\" x2=\"0\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"51.33923\"/>\n<wire x1=\"0.9558\" y1=\"-0.8363\" x2=\"1.27\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"41.185419\"/>\n<wire x1=\"0.9756\" y1=\"0.813\" x2=\"1.2699\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"-39.806332\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-0.9643\" y2=\"-0.8265\" width=\"0.1524\" layer=\"51\" curve=\"40.600331\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-0.9643\" y2=\"0.8265\" width=\"0.1524\" layer=\"51\" curve=\"-40.600331\"/>\n<wire x1=\"-0.889\" y1=\"0\" x2=\"0\" y2=\"0.889\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"0\" y2=\"0.508\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"0\" y1=\"-0.508\" x2=\"0.508\" y2=\"0\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"0\" y1=\"-0.889\" x2=\"0.889\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"90\"/>\n<pad name=\"A\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad 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ratio=\"14\">K-</text>\n<text x=\"11.684\" y=\"-2.794\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\">&gt;NAME</text>\n<text x=\"0.635\" y=\"-4.445\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"2.921\" y1=\"1.016\" x2=\"6.731\" y2=\"1.524\" layer=\"21\"/>\n<rectangle x1=\"2.921\" y1=\"-1.524\" x2=\"6.731\" y2=\"-1.016\" layer=\"21\"/>\n<hole x=\"0\" y=\"0\" drill=\"0.8128\"/>\n</package>\n<package name=\"Q62902-B156\">\n<description>&lt;b&gt;LED HOLDER&lt;/b&gt;&lt;p&gt;\nSiemens</description>\n<wire x1=\"2.54\" y1=\"-1.905\" x2=\"2.54\" y2=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.143\" y1=\"0\" x2=\"0\" y2=\"1.143\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"0\" y1=\"-1.143\" x2=\"1.143\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"90\"/>\n<wire x1=\"-1.651\" y1=\"0\" x2=\"0\" y2=\"1.651\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"0\" y1=\"-1.651\" x2=\"1.651\" y2=\"0\" width=\"0.1524\" layer=\"51\" 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name=\"SFH482\">\n<description>&lt;B&gt;IR LED&lt;/B&gt;&lt;p&gt;\ninfrared emitting diode, Infineon\nTO-18, lead spacing 2.54 mm, cathode marking&lt;p&gt;\nInifineon</description>\n<wire x1=\"-2.159\" y1=\"1.524\" x2=\"-2.794\" y2=\"2.159\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.794\" y1=\"2.159\" x2=\"-2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.524\" y1=\"2.159\" x2=\"-2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"1.778\" x2=\"1.5358\" y2=\"0.8959\" width=\"0.1524\" layer=\"21\" curve=\"-59.743278\"/>\n<wire x1=\"-1.5358\" y1=\"0.8959\" x2=\"0\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-59.743278\"/>\n<wire x1=\"-1.5358\" y1=\"-0.8959\" x2=\"0\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"59.743278\"/>\n<wire x1=\"0\" y1=\"-1.778\" x2=\"1.5358\" y2=\"-0.8959\" width=\"0.1524\" layer=\"21\" curve=\"59.743278\"/>\n<wire x1=\"1.5142\" y1=\"0.9318\" x2=\"1.778\" y2=\"0\" width=\"0.1524\" layer=\"51\" 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curve=\"-306.869898\"/>\n<wire x1=\"4.445\" y1=\"0\" x2=\"0\" y2=\"-4.445\" width=\"0.127\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"0\" y2=\"-3.81\" width=\"0.127\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.175\" y1=\"0\" x2=\"0\" y2=\"-3.175\" width=\"0.127\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.54\" y1=\"0\" x2=\"0\" y2=\"-2.54\" width=\"0.127\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-4.445\" y1=\"0\" x2=\"0\" y2=\"4.445\" width=\"0.127\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"0\" y2=\"3.81\" width=\"0.127\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"0\" y2=\"3.175\" width=\"0.127\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"0\" y2=\"2.54\" width=\"0.127\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"5.08\" y1=\"2.54\" x2=\"5.08\" y2=\"-2.54\" width=\"0.254\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"5.08\" width=\"0.127\" layer=\"21\"/>\n<pad name=\"K\" x=\"1.27\" y=\"0\" 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layer=\"1\"/>\n<smd name=\"A\" x=\"1.75\" y=\"0\" dx=\"1.5\" dy=\"1.5\" layer=\"1\"/>\n<text x=\"-1.5\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.5\" y=\"-2.5\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"0.4\" x2=\"-1.15\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.15\" y2=\"-0.4\" layer=\"51\"/>\n<rectangle x1=\"-1.175\" y1=\"-0.6\" x2=\"-1\" y2=\"-0.275\" layer=\"51\"/>\n<rectangle x1=\"1.15\" y1=\"-0.8\" x2=\"1.6\" y2=\"-0.4\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"1.15\" y1=\"0.4\" x2=\"1.6\" y2=\"0.8\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"1\" y1=\"0.275\" x2=\"1.175\" y2=\"0.6\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.1\" y1=\"-0.1\" x2=\"0.1\" y2=\"0.1\" layer=\"21\"/>\n</package>\n<package name=\"SML0603\">\n<description>&lt;b&gt;SML0603-XXX (HIGH INTENSITY) LED&lt;/b&gt;&lt;p&gt;\n&lt;table&gt;\n&lt;tr&gt;&lt;td&gt;AG3K&lt;/td&gt;&lt;td&gt;AQUA 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name=\"A\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R270\"/>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"-3.429\" y=\"-2.159\"/>\n<vertex x=\"-3.048\" y=\"-1.27\"/>\n<vertex x=\"-2.54\" y=\"-1.778\"/>\n</polygon>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"-3.302\" y=\"-3.302\"/>\n<vertex x=\"-2.921\" y=\"-2.413\"/>\n<vertex x=\"-2.413\" y=\"-2.921\"/>\n</polygon>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"LED\" prefix=\"LED\" uservalue=\"yes\">\n<description>&lt;b&gt;LED&lt;/b&gt;&lt;p&gt;\n&lt;u&gt;OSRAM&lt;/u&gt;:&lt;br&gt;\n\n- &lt;u&gt;CHIPLED&lt;/u&gt;&lt;br&gt;\nLG R971, LG N971, LY N971, LG Q971, LY Q971, LO R971, LY R971\nLH N974, LH R974&lt;br&gt;\nLS Q976, LO Q976, LY Q976&lt;br&gt;\nLO Q996&lt;br&gt;\n\n- &lt;u&gt;Hyper CHIPLED&lt;/u&gt;&lt;br&gt;\nLW Q18S&lt;br&gt;\nLB Q993, LB Q99A, LB R99A&lt;br&gt;\n\n- &lt;u&gt;SideLED&lt;/u&gt;&lt;br&gt;\nLS A670, LO A670, LY A670, LG A670, LP A670&lt;br&gt;\nLB A673, LV A673, LT A673, LW A673&lt;br&gt;\nLH A674&lt;br&gt;\nLY A675&lt;br&gt;\nLS A676, LA A676, LO A676, LY A676, LW A676&lt;br&gt;\nLS A679, LY A679, LG A679&lt;br&gt;\n\n-  &lt;u&gt;Hyper Micro SIDELED®&lt;/u&gt;&lt;br&gt;\nLS Y876, LA Y876, LO Y876, LY Y876&lt;br&gt;\nLT Y87S&lt;br&gt;\n\n- &lt;u&gt;SmartLED&lt;/u&gt;&lt;br&gt;\nLW L88C, LW L88S&lt;br&gt;\nLB L89C, LB L89S, LG L890&lt;br&gt;\nLS L89K, LO L89K, LY L89K&lt;br&gt;\nLS L896, LA L896, LO L896, LY L896&lt;br&gt;\n\n- &lt;u&gt;TOPLED&lt;/u&gt;&lt;br&gt;\nLS T670, LO T670, LY T670, LG T670, LP T670&lt;br&gt;\nLSG T670, LSP T670, LSY T670, LOP T670, LYG T670&lt;br&gt;\nLG T671, LOG T671, LSG T671&lt;br&gt;\nLB T673, LV T673, LT T673, LW T673&lt;br&gt;\nLH T674&lt;br&gt;\nLS T676, LA T676, LO T676, LY T676, LB T676, LH T676, LSB T676, LW T676&lt;br&gt;\nLB T67C, LV T67C, LT T67C, LS T67K, LO T67K, LY T67K, LW E67C&lt;br&gt;\nLS E67B, LA E67B, LO E67B, LY E67B, LB E67C, LV E67C, LT E67C&lt;br&gt;\nLW T67C&lt;br&gt;\nLS T679, LY T679, LG T679&lt;br&gt;\nLS T770, LO T770, LY T770, LG T770, LP T770&lt;br&gt;\nLB T773, LV T773, LT T773, LW T773&lt;br&gt;\nLH T774&lt;br&gt;\nLS E675, LA E675, LY E675, LS T675&lt;br&gt;\nLS T776, LA T776, LO T776, LY T776, LB T776&lt;br&gt;\nLHGB T686&lt;br&gt;\nLT T68C, LB T68C&lt;br&gt;\n\n- &lt;u&gt;Hyper Mini TOPLED®&lt;/u&gt;&lt;br&gt;\nLB M676&lt;br&gt;\n\n- &lt;u&gt;Mini TOPLED Santana®&lt;/u&gt;&lt;br&gt;\nLG M470&lt;br&gt;\nLS M47K, LO M47K, LY M47K\n&lt;p&gt;\nSource: http://www.osram.convergy.de&lt;p&gt;\n\n&lt;u&gt;LUXEON:&lt;/u&gt;&lt;br&gt;\n- &lt;u&gt;LUMILED®&lt;/u&gt;&lt;br&gt;\nLXK2-PW12-R00, LXK2-PW12-S00, LXK2-PW14-U00, LXK2-PW14-V00&lt;br&gt;\nLXK2-PM12-R00, LXK2-PM12-S00, LXK2-PM14-U00&lt;br&gt;\nLXK2-PE12-Q00, LXK2-PE12-R00, LXK2-PE12-S00, LXK2-PE14-T00, LXK2-PE14-U00&lt;br&gt;\nLXK2-PB12-K00, LXK2-PB12-L00, LXK2-PB12-M00, LXK2-PB14-N00, LXK2-PB14-P00, LXK2-PB14-Q00&lt;br&gt;\nLXK2-PR12-L00, LXK2-PR12-M00, LXK2-PR14-Q00, LXK2-PR14-R00&lt;br&gt;\nLXK2-PD12-Q00, LXK2-PD12-R00, LXK2-PD12-S00&lt;br&gt;\nLXK2-PH12-R00, LXK2-PH12-S00&lt;br&gt;\nLXK2-PL12-P00, LXK2-PL12-Q00, LXK2-PL12-R00\n&lt;p&gt;\nSource: www.luxeon.com&lt;p&gt;\n\n&lt;u&gt;KINGBRIGHT:&lt;/U&gt;&lt;p&gt;\nKA-3528ASYC&lt;br&gt;\nSource: www.kingbright.com</description>\n<gates>\n<gate name=\"G$1\" symbol=\"LED\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SMT1206\" package=\"1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LD260\" package=\"LD260\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SQR2X5\" package=\"LED2X5\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"3MM\" package=\"LED3MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"5MM\" package=\"LED5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LSU260\" package=\"LSU260\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LZR181\" package=\"LZR181\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B152\" package=\"Q62902-B152\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B153\" package=\"Q62902-B153\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B155\" package=\"Q62902-B155\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B156\" package=\"Q62902-B156\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SFH480\" package=\"SFH480\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SFH482\" package=\"SFH482\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SQR5.7X3.2\" package=\"U57X32\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"IRL80A\" package=\"IRL80A\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-2\" package=\"P-LCC-2\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MINI-TOP\" package=\"OSRAM-MINI-TOP-LED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SIDELED\" package=\"OSRAM-SIDELED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMART-LED\" package=\"SMART-LED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"B\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-2-BACK\" package=\"P-LCC-2-TOPLED-RG\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MICRO-SIDELED\" package=\"MICRO-SIDELED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-4\" package=\"P-LCC-4\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIP-LED0603\" package=\"CHIP-LED0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIP-LED0805\" package=\"CHIP-LED0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TOPLED-SANTANA\" package=\"MINI-TOPLED-SANTANA\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_0805\" package=\"CHIPLED_0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_1206\" package=\"CHIPLED_1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_0603\" package=\"CHIPLED_0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED-0603-TTW\" package=\"CHIPLED-0603-TTW\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A@1\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"\" package=\"SMARTLED-TTW\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A@1\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-LUMILED+\" package=\"LUMILED+\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"2+\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"4-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-LUMILED\" package=\"LUMILED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"2+\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"4-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"10MM\" package=\"LED10MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KA-3528ASYC\" package=\"KA-3528ASYC\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML0805\" package=\"SML0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML1206\" package=\"SML1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML0603\" package=\"SML0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-IC-2016\">\n<packages>\n<package name=\"SOT-223\">\n<description>&lt;b&gt;SMALL OUTLINE TRANSISTOR&lt;/b&gt;</description>\n<wire x1=\"3.277\" y1=\"1.778\" x2=\"3.277\" y2=\"-1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.277\" y1=\"-1.778\" x2=\"-3.277\" y2=\"-1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.277\" y1=\"-1.778\" x2=\"-3.277\" y2=\"1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.277\" y1=\"1.778\" x2=\"3.277\" y2=\"1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.473\" y1=\"4.483\" x2=\"3.473\" y2=\"4.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"3.473\" y1=\"-4.483\" x2=\"-3.473\" y2=\"-4.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-3.473\" y1=\"-4.483\" x2=\"-3.473\" y2=\"4.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"3.473\" y1=\"4.483\" x2=\"3.473\" y2=\"-4.483\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-2.286\" y=\"-3.175\" dx=\"1.27\" dy=\"2.286\" layer=\"1\"/>\n<smd name=\"2\" x=\"0\" y=\"-3.175\" dx=\"1.27\" dy=\"2.286\" layer=\"1\"/>\n<smd name=\"3\" x=\"2.286\" y=\"-3.175\" dx=\"1.27\" dy=\"2.286\" layer=\"1\"/>\n<smd name=\"TER\" x=\"0\" y=\"3.175\" dx=\"3.556\" dy=\"2.159\" layer=\"1\"/>\n<text x=\"-3.81\" y=\"-3.81\" size=\"0.889\" layer=\"25\" ratio=\"11\" rot=\"R90\">&gt;NAME</text>\n<text x=\"4.445\" y=\"-3.81\" size=\"0.889\" layer=\"27\" ratio=\"11\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.6002\" y1=\"1.8034\" x2=\"1.6002\" y2=\"3.6576\" layer=\"51\"/>\n<rectangle x1=\"-0.4318\" y1=\"-3.6576\" x2=\"0.4318\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"-2.7432\" y1=\"-3.6576\" x2=\"-1.8796\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"1.8796\" y1=\"-3.6576\" x2=\"2.7432\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"-1.6002\" y1=\"1.8034\" x2=\"1.6002\" y2=\"3.6576\" layer=\"51\"/>\n<rectangle x1=\"-0.4318\" y1=\"-3.6576\" x2=\"0.4318\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"-2.7432\" y1=\"-3.6576\" x2=\"-1.8796\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"1.8796\" y1=\"-3.6576\" x2=\"2.7432\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"-1\" y1=\"-1\" x2=\"1\" y2=\"1\" layer=\"35\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"PMIC-CJ*1117\">\n<text x=\"-7.62\" y=\"3.81\" size=\"1.27\" layer=\"95\">&gt;NAME</text>\n<text x=\"0\" y=\"3.81\" size=\"1.27\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"GND\" x=\"0\" y=\"-7.62\" length=\"short\" rot=\"R90\"/>\n<pin name=\"IN\" x=\"-11.43\" y=\"0\" length=\"short\"/>\n<pin name=\"OUT\" x=\"11.43\" y=\"0\" length=\"short\" rot=\"R180\"/>\n<wire x1=\"-7.62\" y1=\"3.81\" x2=\"7.62\" y2=\"3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"3.81\" x2=\"7.62\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"0\" x2=\"7.62\" y2=\"-3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-3.81\" x2=\"0\" y2=\"-3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-3.81\" x2=\"-7.62\" y2=\"-3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-7.62\" y1=\"-3.81\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-8.89\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-5.08\" x2=\"0\" y2=\"-3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"0\" x2=\"8.89\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"PMIC-CJT1117-3.3(SOT223)\" prefix=\"U\">\n<description>310030097</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PMIC-CJ*1117\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"SOT-223\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"IN\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"OUT\" pad=\"2 TER\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MPN\" value=\"CJT1117-3.3\"/>\n<attribute name=\"VALUE\" value=\"CJT1117-3.3-SOT223\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"connector\">\n<description>&lt;b&gt;LAB11&lt;/b&gt; - Connectors for various cable types.</description>\n<packages>\n<package name=\"MOLEX-BNC-73100-0105\">\n<pad name=\"GND1\" x=\"-3.8\" y=\"-3.9\" drill=\"1.8\"/>\n<pad name=\"GND2\" x=\"3.8\" y=\"-3.9\" drill=\"1.8\"/>\n<pad name=\"SIGNAL\" x=\"0\" y=\"3.9\" drill=\"0.8\"/>\n<wire x1=\"-4.825\" y1=\"-8.5\" x2=\"4.825\" y2=\"-8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"4.825\" y1=\"-8.5\" x2=\"4.825\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"4.825\" y1=\"0.3\" x2=\"0.75\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.75\" y1=\"0.3\" x2=\"-0.75\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.75\" y1=\"0.3\" x2=\"-4.825\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-4.825\" y1=\"0.3\" x2=\"-4.825\" y2=\"-8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-4.825\" y1=\"-21.5\" x2=\"4.825\" y2=\"-21.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-4.825\" y1=\"-21.5\" x2=\"-4.825\" y2=\"-8.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.825\" y1=\"-8.5\" x2=\"4.825\" y2=\"-21.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.75\" y1=\"0.3\" x2=\"-0.75\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.75\" y1=\"1.5\" x2=\"-0.25\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.25\" y1=\"1.5\" x2=\"0.25\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.25\" y1=\"1.5\" x2=\"0.75\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.75\" y1=\"1.5\" x2=\"0.75\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.25\" y1=\"1.5\" x2=\"-0.25\" y2=\"3.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.25\" y1=\"3.5\" x2=\"0.25\" y2=\"3.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.25\" y1=\"3.5\" x2=\"0.25\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<text x=\"0\" y=\"5\" size=\"1.016\" layer=\"25\" font=\"vector\" ratio=\"12\" align=\"bottom-center\">&gt;NAME</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"BNC\">\n<pin name=\"SIGNAL\" x=\"7.62\" y=\"0\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<wire x1=\"5.08\" y1=\"-1.27\" x2=\"5.08\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.08\" y1=\"1.27\" x2=\"4.064\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"4.064\" y1=\"1.27\" x2=\"3.81\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"1.27\" x2=\"1.27\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"1.27\" x2=\"1.27\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"2.54\" x2=\"-3.81\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"2.54\" x2=\"-3.81\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-2.54\" x2=\"1.27\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-2.54\" x2=\"1.27\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-1.27\" x2=\"2.54\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-1.27\" x2=\"3.81\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-1.27\" x2=\"4.064\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"4.064\" y1=\"-1.27\" x2=\"5.08\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"1.27\" x2=\"1.27\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"1.27\" x2=\"3.81\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"1.524\" x2=\"4.064\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"4.064\" y1=\"1.524\" x2=\"4.064\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-1.27\" x2=\"3.81\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-1.524\" x2=\"4.064\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"4.064\" y1=\"-1.524\" x2=\"4.064\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"GND\" x=\"7.62\" y=\"-5.08\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<wire x1=\"5.08\" y1=\"-5.08\" x2=\"2.54\" y2=\"-5.08\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-5.08\" x2=\"2.54\" y2=\"-1.27\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"-3.81\" y=\"3.048\" size=\"1.778\" layer=\"95\" ratio=\"12\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-4.826\" size=\"1.778\" layer=\"96\" ratio=\"12\">&gt;VALUE</text>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MOLEX_BNC_73100-0105\" prefix=\"J\">\n<description>CONN BNC JACK R/A 50 OHM PCB</description>\n<gates>\n<gate name=\"G$1\" symbol=\"BNC\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"MOLEX-BNC-73100-0105\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND1 GND2\"/>\n<connect gate=\"G$1\" pin=\"SIGNAL\" pad=\"SIGNAL\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"DIGIKEY\" value=\"WM5524-ND\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"HaasMaxADC\">\n<packages>\n<package name=\"TQFP-48\">\n<description>48 TQFN-EP Package  IPC7351</description>\n<wire x1=\"-4.2\" y1=\"4.2\" x2=\"-4.2\" y2=\"-4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"-4.2\" y1=\"-4.2\" x2=\"4.2\" y2=\"-4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"4.2\" y1=\"-4.2\" x2=\"4.2\" y2=\"4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"4.2\" y1=\"4.2\" x2=\"-4.2\" y2=\"4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"-2.75\" y1=\"2.75\" x2=\"-2.75\" y2=\"-2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-2.75\" y1=\"-2.75\" x2=\"2.75\" y2=\"-2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"2.75\" y1=\"-2.75\" x2=\"2.75\" y2=\"2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"2.75\" y1=\"2.75\" x2=\"-2.75\" y2=\"2.75\" width=\"0.254\" layer=\"21\"/>\n<circle x=\"-2.25\" y=\"2.25\" radius=\"0.354\" width=\"0\" layer=\"21\"/>\n<smd name=\"1\" x=\"-3.5\" y=\"2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"-3.5\" y=\"2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"3\" x=\"-3.5\" y=\"1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"4\" x=\"-3.5\" y=\"1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"5\" x=\"-3.5\" y=\"0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"6\" x=\"-3.5\" y=\"0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"7\" x=\"-3.5\" y=\"-0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"8\" x=\"-3.5\" y=\"-0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"9\" x=\"-3.5\" y=\"-1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"10\" x=\"-3.5\" y=\"-1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"11\" x=\"-3.5\" y=\"-2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"12\" x=\"-3.5\" y=\"-2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"13\" x=\"-2.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"14\" x=\"-2.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"15\" x=\"-1.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"16\" x=\"-1.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"17\" x=\"-0.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"18\" x=\"-0.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"19\" x=\"0.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"20\" x=\"0.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"21\" x=\"1.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"22\" x=\"1.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"23\" x=\"2.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"24\" x=\"2.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"25\" x=\"3.5\" y=\"-2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"26\" x=\"3.5\" y=\"-2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"27\" x=\"3.5\" y=\"-1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"28\" x=\"3.5\" y=\"-1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"29\" x=\"3.5\" y=\"-0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"30\" x=\"3.5\" y=\"-0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"31\" x=\"3.5\" y=\"0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"32\" x=\"3.5\" y=\"0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"33\" x=\"3.5\" y=\"1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"34\" x=\"3.5\" y=\"1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"35\" x=\"3.5\" y=\"2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"36\" x=\"3.5\" y=\"2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"37\" x=\"2.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"38\" x=\"2.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"39\" x=\"1.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"40\" x=\"1.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"41\" x=\"0.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"42\" x=\"0.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"43\" x=\"-0.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"44\" x=\"-0.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"45\" x=\"-1.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"46\" x=\"-1.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"47\" x=\"-2.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"48\" x=\"-2.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-3.81\" y=\"4.445\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-5.715\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<dimension x1=\"-3.5\" y1=\"-0.5\" x2=\"3.5\" y2=\"-0.5\" x3=\"0\" y3=\"-1.3\" textsize=\"0.3\" layer=\"21\" width=\"0.03\" visible=\"yes\"/>\n<dimension x1=\"-2\" y1=\"3.5\" x2=\"-2\" y2=\"-3.5\" x3=\"-1.5\" y3=\"0\" textsize=\"0.3\" layer=\"21\" width=\"0.03\"/>\n<dimension x1=\"-2.8\" y1=\"0\" x2=\"2.8\" y2=\"0\" x3=\"0\" y3=\"0.5\" textsize=\"0.3\" layer=\"21\" dtype=\"horizontal\" width=\"0.03\"/>\n<dimension x1=\"3\" y1=\"-2.8\" x2=\"3\" y2=\"2.8\" x3=\"2\" y3=\"0\" textsize=\"0.3\" layer=\"21\" dtype=\"horizontal\" width=\"0.03\" visible=\"yes\"/>\n<smd name=\"EP_GND\" x=\"0\" y=\"0\" dx=\"5.588\" dy=\"5.588\" layer=\"1\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"PINOUT\">\n<description>PINOUT for the Max19506</description>\n<wire x1=\"-15.24\" y1=\"34.29\" x2=\"15.24\" y2=\"34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"15.24\" y1=\"34.29\" x2=\"15.24\" y2=\"-34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"15.24\" y1=\"-34.29\" x2=\"-15.24\" y2=\"-34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-15.24\" y1=\"-34.29\" x2=\"-15.24\" y2=\"34.29\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-15.24\" y=\"35.56\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-15.24\" y=\"-38.1\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"AVDD1\" x=\"-20.32\" y=\"-15.24\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"D0A\" x=\"-20.32\" y=\"33.02\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D1A\" x=\"-20.32\" y=\"30.48\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D2A\" x=\"-20.32\" y=\"27.94\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D3A\" x=\"-20.32\" y=\"25.4\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D4A\" x=\"-20.32\" y=\"22.86\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D5A\" x=\"-20.32\" y=\"20.32\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D6A\" x=\"-20.32\" y=\"17.78\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D7A\" x=\"-20.32\" y=\"15.24\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D0B\" x=\"-20.32\" y=\"10.16\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D1B\" x=\"-20.32\" y=\"7.62\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D2B\" x=\"-20.32\" y=\"5.08\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D3B\" x=\"-20.32\" y=\"2.54\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D4B\" x=\"-20.32\" y=\"0\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D5B\" x=\"-20.32\" y=\"-2.54\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D6B\" x=\"-20.32\" y=\"-5.08\" length=\"middle\" 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symbol=\"HEADER-8P\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"H8-2.54-90D-FEMALE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"VALUE\" value=\"8p-2.54-90d\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"PP_Electromechanical\">\n<packages>\n<package name=\"0S102011MS2QS1\">\n<pad name=\"1\" x=\"-2.0066\" y=\"0\" drill=\"0.8\" diameter=\"1.4224\"/>\n<pad name=\"2\" x=\"0\" y=\"0\" drill=\"0.8\" diameter=\"1.4224\"/>\n<pad name=\"3\" x=\"2.0066\" y=\"0\" drill=\"0.8\" diameter=\"1.4224\"/>\n<pad name=\"P$4\" x=\"-4.1021\" y=\"0\" drill=\"1.5\" diameter=\"2.1844\"/>\n<pad name=\"P$5\" x=\"4.1021\" y=\"0\" drill=\"1.5\" diameter=\"2.1844\"/>\n<wire x1=\"-4.3\" y1=\"2.15\" x2=\"-4.3\" y2=\"-2.15\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-4.3\" y1=\"-2.15\" x2=\"4.3\" y2=\"-2.15\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"4.3\" y1=\"-2.15\" x2=\"4.3\" y2=\"2.15\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"4.3\" y1=\"2.15\" x2=\"-4.3\" y2=\"2.15\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-4.3\" y=\"2.54\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n</package>\n<package name=\"FOOT_SW\">\n<smd name=\"COM\" x=\"0\" y=\"6.858\" dx=\"12.7\" dy=\"12.7\" layer=\"1\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"2\" x=\"-10.16\" y=\"6.858\" dx=\"12.7\" dy=\"6.35\" layer=\"16\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"1\" x=\"10.16\" y=\"6.858\" dx=\"12.7\" dy=\"6.35\" layer=\"16\" rot=\"R90\" cream=\"no\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"12.7\" y2=\"0\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.5875\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"12.7\" y1=\"0\" x2=\"12.7\" y2=\"-1.5875\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-25.4\" y1=\"-1.5875\" x2=\"30.1625\" y2=\"-1.5875\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-25.4\" y1=\"-23.8125\" x2=\"30.1625\" y2=\"-23.8125\" width=\"0.127\" layer=\"21\"/>\n<circle x=\"0\" y=\"-12.7\" radius=\"11.1125\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-25.4\" y1=\"-1.5875\" x2=\"-25.4\" y2=\"-23.8125\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"30.1625\" y1=\"-1.5875\" x2=\"30.1625\" y2=\"-23.8125\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"13.97\" x2=\"-3.175\" y2=\"16.51\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"16.51\" x2=\"3.175\" y2=\"16.51\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.175\" y1=\"16.51\" x2=\"3.175\" y2=\"13.97\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-10.16\" y1=\"13.97\" x2=\"-10.16\" y2=\"16.51\" width=\"0.127\" layer=\"22\"/>\n<wire x1=\"10.16\" y1=\"13.97\" x2=\"10.16\" y2=\"16.51\" width=\"0.127\" layer=\"22\"/>\n<text x=\"-12.7\" y=\"17.78\" size=\"1.016\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n</package>\n<package name=\"ET03MD1AVBE\">\n<pad name=\"P$1\" x=\"0\" y=\"0\" drill=\"1.1\" shape=\"long\"/>\n<pad name=\"P$2\" x=\"0\" y=\"2.54\" drill=\"1.1\" shape=\"long\"/>\n<pad name=\"P$3\" x=\"0\" y=\"5.08\" drill=\"1.1\" shape=\"long\"/>\n<pad name=\"P$4\" x=\"0\" y=\"-5.08\" drill=\"1.1\" shape=\"long\"/>\n<wire x1=\"3.1115\" y1=\"-9.271\" x2=\"3.1115\" y2=\"0\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.1115\" y1=\"0\" x2=\"1.905\" y2=\"0\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.905\" y1=\"0\" x2=\"1.905\" y2=\"6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.905\" y1=\"6.35\" x2=\"-1.905\" y2=\"6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.905\" y1=\"6.35\" x2=\"-1.905\" y2=\"0\" width=\"0.127\" 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y2=\"-13.3604\" width=\"0.127\" layer=\"48\"/>\n</package>\n<package name=\"108-0020-EVX\">\n<pad name=\"P$1\" x=\"0\" y=\"0\" drill=\"1.5\" shape=\"long\"/>\n<pad name=\"P$2\" x=\"0\" y=\"3.81\" drill=\"1.5\" shape=\"long\"/>\n<pad name=\"P$3\" x=\"0\" y=\"7.62\" drill=\"1.5\" shape=\"long\"/>\n<pad name=\"P$4\" x=\"-2.54\" y=\"-12.7\" drill=\"1.4\"/>\n<pad name=\"P$5\" x=\"2.54\" y=\"-12.7\" drill=\"1.4\"/>\n<wire x1=\"-3.429\" y1=\"8.89\" x2=\"-3.429\" y2=\"-11.43\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"8.89\" x2=\"3.429\" y2=\"8.89\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"8.89\" x2=\"3.429\" y2=\"-11.43\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-13.97\" x2=\"-3.175\" y2=\"-13.97\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"-13.97\" x2=\"3.175\" y2=\"-13.97\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.175\" y1=\"-13.97\" x2=\"3.429\" y2=\"-13.97\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"-13.97\" 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y=\"0\"/>\n</gates>\n<devices>\n<device name=\"_0S102011MS2QS1\" package=\"0S102011MS2QS1\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_FOOT_SW\" package=\"FOOT_SW\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"COM\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_ET03MD1AVBE\" package=\"ET03MD1AVBE\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_108-0020-EVX\" package=\"108-0020-EVX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$3\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"PP_Connectors\">\n<packages>\n<package name=\"500075-1517\">\n<pad name=\"D+\" x=\"0\" y=\"-1.3\" drill=\"0.7\"/>\n<pad name=\"ID\" x=\"0.8\" y=\"1.3\" drill=\"0.7\"/>\n<pad name=\"GND\" x=\"1.6\" y=\"-1.3\" drill=\"0.7\"/>\n<pad name=\"D-\" x=\"-0.8\" y=\"1.3\" drill=\"0.7\"/>\n<pad name=\"5V\" x=\"-1.6\" y=\"-1.3\" drill=\"0.7\"/>\n<wire x1=\"-3.325\" y1=\"-0.875\" x2=\"-3.325\" y2=\"0.875\" width=\"0.127\" layer=\"46\"/>\n<wire x1=\"-3.325\" y1=\"0.875\" x2=\"-3.975\" y2=\"0.875\" width=\"0.127\" layer=\"46\" curve=\"180\"/>\n<wire x1=\"-3.975\" y1=\"-0.875\" x2=\"-3.975\" y2=\"0.875\" width=\"0.127\" layer=\"46\"/>\n<wire x1=\"-3.325\" y1=\"-0.875\" x2=\"-3.975\" y2=\"-0.875\" width=\"0.127\" layer=\"46\" curve=\"-180\"/>\n<wire x1=\"3.975\" y1=\"-0.875\" x2=\"3.975\" y2=\"0.875\" width=\"0.127\" layer=\"46\"/>\n<wire x1=\"3.975\" y1=\"0.875\" x2=\"3.325\" y2=\"0.875\" width=\"0.127\" layer=\"46\" curve=\"180\"/>\n<wire x1=\"3.325\" y1=\"-0.875\" x2=\"3.325\" y2=\"0.875\" width=\"0.127\" layer=\"46\"/>\n<wire x1=\"3.975\" y1=\"-0.875\" x2=\"3.325\" y2=\"-0.875\" width=\"0.127\" layer=\"46\" curve=\"-180\"/>\n<smd name=\"P$1\" x=\"-3.65\" y=\"0\" dx=\"3.9\" dy=\"1.4\" layer=\"1\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"P$2\" x=\"3.65\" y=\"0\" dx=\"3.9\" dy=\"1.4\" layer=\"1\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"P$3\" x=\"-3.65\" y=\"0\" dx=\"3.9\" dy=\"1.4\" layer=\"16\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"P$4\" x=\"3.65\" y=\"0\" dx=\"3.9\" dy=\"1.4\" layer=\"16\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<wire x1=\"-3.85\" y1=\"2.4\" x2=\"3.85\" y2=\"2.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.85\" y1=\"-2.3\" x2=\"3.85\" y2=\"-2.3\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-4\" y=\"3\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n<hole x=\"-3.65\" y=\"0\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"0\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"0\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"0.3\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"0.6\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"0.9\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"-0.3\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"-0.6\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"-0.9\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"0.6\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"0.9\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"-0.3\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"-0.6\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"-0.9\" drill=\"0.6\"/>\n</package>\n<package name=\"10118193-0001LF\">\n<smd name=\"3\" x=\"0\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"0.65\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"-0.65\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"1\" x=\"-1.3\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"5\" x=\"1.3\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"S3\" x=\"-3.2\" y=\"2.54\" dx=\"1.4\" dy=\"1.6\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"S4\" x=\"3.2\" y=\"2.54\" dx=\"1.4\" dy=\"1.6\" layer=\"1\" rot=\"R90\"/>\n<pad name=\"S2\" x=\"3.3\" y=\"-0.135\" drill=\"0.9\" shape=\"long\" rot=\"R180\"/>\n<pad name=\"S1\" x=\"-3.3\" y=\"-0.135\" drill=\"0.9\" shape=\"long\" rot=\"R180\"/>\n<wire x1=\"-4.125\" y1=\"-1.585\" x2=\"4.125\" y2=\"-1.585\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-4\" y=\"3.54\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n</package>\n<package name=\"MC32599\">\n<pad name=\"D+\" x=\"0\" y=\"0\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R270\"/>\n<pad name=\"GND\" x=\"-1.6\" y=\"0\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R270\"/>\n<pad name=\"V_BUS\" x=\"1.6\" y=\"0\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R270\"/>\n<pad name=\"D-\" x=\"0.8\" y=\"1.2\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R90\"/>\n<pad name=\"N/C\" x=\"-0.8\" y=\"1.2\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R90\"/>\n<pad name=\"SH_2\" x=\"-3.65\" y=\"0.9\" drill=\"1.6\"/>\n<pad name=\"SH_3\" x=\"3.65\" y=\"0.9\" drill=\"1.6\"/>\n<pad name=\"SH_1\" x=\"3.65\" y=\"5.55\" drill=\"1.6\"/>\n<pad name=\"SH_0\" x=\"-3.65\" y=\"5.55\" drill=\"1.6\"/>\n<wire x1=\"-3.85\" y1=\"8.7\" x2=\"3.85\" y2=\"8.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.85\" y1=\"8.7\" x2=\"3.85\" y2=\"-1.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.85\" y1=\"-1.8\" x2=\"-3.85\" y2=\"-1.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.85\" y1=\"-1.8\" x2=\"-3.85\" y2=\"8.7\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-3.81\" y=\"-3.81\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"USB_5PIN\">\n<pin name=\"5V\" x=\"12.7\" y=\"-2.54\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<pin name=\"D-\" x=\"12.7\" y=\"-5.08\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<pin name=\"D+\" x=\"12.7\" y=\"-7.62\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GND\" x=\"12.7\" y=\"-12.7\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<pin name=\"ID\" x=\"12.7\" y=\"-10.16\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<text x=\"5.08\" y=\"-1.524\" size=\"1.016\" layer=\"97\" font=\"vector\" align=\"bottom-center\">USB PORT</text>\n<wire x1=\"10.16\" y1=\"0\" x2=\"10.16\" y2=\"-17.78\" width=\"0.127\" layer=\"94\"/>\n<wire x1=\"10.16\" y1=\"-17.78\" x2=\"0\" y2=\"-17.78\" width=\"0.127\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-17.78\" x2=\"0\" y2=\"0\" width=\"0.127\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"10.16\" y2=\"0\" width=\"0.127\" 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x1=\"2.1336\" y1=\"2.6416\" x2=\"-2.1336\" y2=\"2.6416\" width=\"0.1524\" layer=\"21\"/>\n<text x=\"-3.2512\" y=\"2.286\" size=\"1.27\" layer=\"21\" ratio=\"6\" rot=\"SR0\">*</text>\n<text x=\"-3.2766\" y=\"-0.635\" size=\"1.27\" layer=\"25\" ratio=\"6\" rot=\"SR0\">&gt;Name</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"LMH6724MA\">\n<pin name=\"OUTA\" x=\"2.54\" y=\"0\" length=\"middle\" direction=\"out\"/>\n<pin name=\"-INA\" x=\"2.54\" y=\"-2.54\" length=\"middle\" direction=\"in\"/>\n<pin name=\"+INA\" x=\"2.54\" y=\"-5.08\" length=\"middle\" direction=\"in\"/>\n<pin name=\"V-\" x=\"2.54\" y=\"-7.62\" length=\"middle\" direction=\"pas\"/>\n<pin name=\"+INB\" x=\"58.42\" y=\"-7.62\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n<pin name=\"-INB\" x=\"58.42\" y=\"-5.08\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n<pin name=\"OUTB\" x=\"58.42\" y=\"-2.54\" length=\"middle\" direction=\"out\" rot=\"R180\"/>\n<pin name=\"V+\" x=\"58.42\" y=\"0\" length=\"middle\" direction=\"pas\" rot=\"R180\"/>\n<wire x1=\"7.62\" y1=\"5.08\" x2=\"7.62\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-12.7\" x2=\"53.34\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"53.34\" y1=\"-12.7\" x2=\"53.34\" y2=\"5.08\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"53.34\" y1=\"5.08\" x2=\"7.62\" y2=\"5.08\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"25.7556\" y=\"9.1186\" size=\"2.0828\" layer=\"95\" ratio=\"6\" rot=\"SR0\">&gt;Name</text>\n<text x=\"25.1206\" y=\"6.5786\" size=\"2.0828\" layer=\"96\" ratio=\"6\" rot=\"SR0\">&gt;Value</text>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"LMH6724MAX\" prefix=\"U\">\n<gates>\n<gate name=\"A\" symbol=\"LMH6724MA\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"M08A\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"M08A-M\" package=\"M08A-M\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"M08A-L\" package=\"M08A-L\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"74xx-little-us\">\n<description>&lt;b&gt;Single and Dual Gates Family, US symbols&lt;/b&gt;&lt;p&gt;\nLittle logic devices from Texas Instruments&lt;br&gt;\nTinyLogic(R) from FAIRCHILD Semiconductor TM\n&lt;p&gt;\n&lt;author&gt;Created by evgeni@eniks.com&lt;/author&gt;&lt;br&gt;\n&lt;author&gt;Extended by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"YZP_R-XBGA-N6\">\n<description>&lt;b&gt;YZP (R-XBGA-N6)&lt;/b&gt; DIE-SIZE BALL GRID ARRAY&lt;p&gt;\nNanoFree TM -  WCSP (DSBGA) 0.23-mm Large Bump - YZP (Pb-free)&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157</description>\n<wire x1=\"-0.675\" y1=\"0.425\" x2=\"0.675\" y2=\"0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.675\" y1=\"0.425\" x2=\"0.675\" y2=\"-0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.675\" y1=\"-0.425\" x2=\"-0.675\" y2=\"-0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.675\" y1=\"-0.425\" x2=\"-0.675\" y2=\"0.425\" width=\"0.1016\" layer=\"51\"/>\n<circle x=\"-0.5\" y=\"-0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0\" y=\"-0.25\" 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layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<text x=\"-0.725\" y=\"0.725\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.725\" y=\"-2.175\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.675\" y1=\"-0.4\" x2=\"-0.225\" y2=\"-0.175\" layer=\"51\"/>\n<rectangle x1=\"-0.3\" y1=\"-0.375\" x2=\"-0.225\" y2=\"-0.175\" layer=\"21\"/>\n</package>\n<package name=\"DBV_R-PDSO-G6\">\n<description>&lt;b&gt;DBV (R-PDSO-G6)&lt;/b&gt; PLASTIC SMALL-OUTLINE PACKAGE&lt;p&gt;\nSOT (SOT-23) - DBV&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157.</description>\n<wire x1=\"0\" y1=\"-1.29\" x2=\"0\" y2=\"-1.3\" width=\"0.01\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"0.8\" 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x1=\"1\" y1=\"0.55\" x2=\"-1\" y2=\"0.55\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.55\" x2=\"-1\" y2=\"-0.55\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1\" y1=\"-0.55\" x2=\"1\" y2=\"-0.55\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.55\" x2=\"1\" y2=\"0.55\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"1\" x=\"-0.65\" y=\"-0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"0\" y=\"-0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"3\" x=\"0.65\" y=\"-0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"4\" x=\"0.65\" y=\"0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"6\" x=\"-0.65\" y=\"0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"5\" x=\"0\" y=\"0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.125\" y1=\"-1.05\" x2=\"0.125\" y2=\"-0.6\" layer=\"51\"/>\n<rectangle x1=\"-0.775\" y1=\"-1.05\" x2=\"-0.525\" y2=\"-0.6\" layer=\"51\"/>\n<rectangle x1=\"0.525\" y1=\"-1.05\" x2=\"0.775\" y2=\"-0.6\" layer=\"51\"/>\n<rectangle x1=\"-0.775\" y1=\"0.6\" x2=\"-0.525\" y2=\"1.05\" layer=\"51\"/>\n<rectangle x1=\"0.525\" y1=\"0.6\" x2=\"0.775\" y2=\"1.05\" layer=\"51\"/>\n<rectangle x1=\"-0.125\" y1=\"0.6\" x2=\"0.125\" y2=\"1.05\" layer=\"51\"/>\n<rectangle x1=\"-0.95\" y1=\"-0.5\" x2=\"-0.275\" y2=\"0\" layer=\"21\"/>\n</package>\n<package name=\"DRL_R-PDSO-N6\">\n<description>&lt;b&gt;DRL (R-PDSO-N6)&lt;/b&gt; PLASTIC SMALL OUTLINE&lt;p&gt;\nSOT (SOT-553) -  DRL&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157.pdf</description>\n<wire x1=\"-0.8\" y1=\"0.6\" x2=\"0.8\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.8\" y1=\"0.6\" x2=\"0.8\" y2=\"-0.6\" width=\"0.1016\" layer=\"21\"/>\n<wire x1=\"0.8\" y1=\"-0.6\" x2=\"-0.8\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.8\" y1=\"-0.6\" x2=\"-0.8\" y2=\"0.6\" width=\"0.1016\" layer=\"21\"/>\n<smd name=\"1\" x=\"-0.5\" y=\"-0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" stop=\"no\"/>\n<smd name=\"2\" x=\"0\" y=\"-0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" stop=\"no\"/>\n<smd name=\"3\" x=\"0.5\" y=\"-0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" stop=\"no\"/>\n<smd name=\"4\" x=\"0.5\" y=\"0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" rot=\"R180\" stop=\"no\"/>\n<smd name=\"5\" x=\"0\" y=\"0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" rot=\"R180\" stop=\"no\"/>\n<smd name=\"6\" x=\"-0.5\" y=\"0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" rot=\"R180\" stop=\"no\"/>\n<text x=\"-1\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-2.5\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.775\" y1=\"-0.575\" x2=\"0\" y2=\"0\" layer=\"51\"/>\n<rectangle x1=\"-0.625\" y1=\"-0.85\" x2=\"-0.375\" y2=\"-0.45\" layer=\"51\"/>\n<rectangle x1=\"-0.7\" y1=\"-0.975\" x2=\"-0.3\" y2=\"-0.375\" layer=\"29\"/>\n<rectangle x1=\"-0.125\" y1=\"-0.85\" x2=\"0.125\" y2=\"-0.45\" layer=\"51\"/>\n<rectangle x1=\"-0.2\" y1=\"-0.975\" x2=\"0.2\" y2=\"-0.375\" layer=\"29\"/>\n<rectangle x1=\"0.375\" y1=\"-0.85\" x2=\"0.625\" y2=\"-0.45\" layer=\"51\"/>\n<rectangle x1=\"0.3\" y1=\"-0.975\" x2=\"0.7\" y2=\"-0.375\" layer=\"29\"/>\n<rectangle x1=\"0.375\" y1=\"0.45\" x2=\"0.625\" y2=\"0.85\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"0.3\" y1=\"0.375\" x2=\"0.7\" y2=\"0.975\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-0.125\" y1=\"0.45\" x2=\"0.125\" y2=\"0.85\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.2\" y1=\"0.375\" x2=\"0.2\" y2=\"0.975\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-0.625\" y1=\"0.45\" x2=\"-0.375\" y2=\"0.85\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.7\" y1=\"0.375\" x2=\"-0.3\" y2=\"0.975\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-0.75\" y1=\"-0.325\" x2=\"0\" y2=\"0\" layer=\"21\"/>\n</package>\n<package name=\"YEP_R-XBGA-N6\">\n<description>&lt;b&gt;YEP (R-XBGA-N6)&lt;/b&gt; DIE-SIZE BALL GRID ARRAY&lt;p&gt;\nNanoStar TM - WCSP (DSBG A)0.23-mm Large Bump - YEP&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157</description>\n<wire x1=\"-0.675\" y1=\"0.425\" x2=\"0.675\" y2=\"0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.675\" y1=\"0.425\" x2=\"0.675\" y2=\"-0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.675\" y1=\"-0.425\" x2=\"-0.675\" y2=\"-0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.675\" y1=\"-0.425\" x2=\"-0.675\" y2=\"0.425\" width=\"0.1016\" layer=\"51\"/>\n<circle x=\"-0.5\" y=\"-0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0\" y=\"-0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0.5\" y=\"-0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0.5\" y=\"0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0\" y=\"0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"-0.5\" y=\"0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<smd name=\"A1\" x=\"-0.5\" y=\"-0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"B1\" x=\"0\" y=\"-0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"C1\" x=\"0.5\" y=\"-0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"C2\" x=\"0.5\" y=\"0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"B2\" x=\"0\" y=\"0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"A2\" x=\"-0.5\" y=\"0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<text x=\"-0.725\" y=\"0.725\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.725\" y=\"-2.175\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.675\" y1=\"-0.4\" x2=\"-0.225\" y2=\"-0.175\" layer=\"51\"/>\n<rectangle x1=\"-0.3\" y1=\"-0.375\" x2=\"-0.225\" y2=\"-0.175\" layer=\"21\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"743157\">\n<wire x1=\"-5.08\" y1=\"-5.08\" x2=\"7.62\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-5.08\" x2=\"7.62\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"7.62\" x2=\"-5.08\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"7.62\" x2=\"-5.08\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-5.08\" y=\"8.255\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-10.16\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"!A!/B\" x=\"-7.62\" y=\"-2.54\" length=\"short\" direction=\"in\"/>\n<pin name=\"A\" x=\"-7.62\" y=\"5.08\" length=\"short\"/>\n<pin name=\"B\" x=\"-7.62\" y=\"2.54\" length=\"short\"/>\n<pin name=\"X\" x=\"10.16\" y=\"2.54\" length=\"short\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PWRN-1\">\n<text x=\"-0.635\" y=\"-0.635\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"1.905\" y=\"-6.35\" size=\"1.27\" layer=\"95\" rot=\"R90\">GND</text>\n<text x=\"1.905\" y=\"2.54\" size=\"1.27\" layer=\"95\" rot=\"R90\">VCC</text>\n<pin name=\"GND\" x=\"0\" y=\"-7.62\" visible=\"pad\" length=\"middle\" direction=\"pwr\" rot=\"R90\"/>\n<pin name=\"VCC\" x=\"0\" y=\"7.62\" visible=\"pad\" length=\"middle\" direction=\"pwr\" rot=\"R270\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"74*1G3157\" prefix=\"IC\">\n<description>&lt;b&gt;Single-Pole, Double-Throw Analog Switch&lt;/b&gt;&lt;p&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157.pdf</description>\n<gates>\n<gate name=\"G$1\" symbol=\"743157\" x=\"0\" y=\"0\"/>\n<gate name=\"P\" symbol=\"PWRN-1\" x=\"17.78\" y=\"0\" addlevel=\"request\"/>\n</gates>\n<devices>\n<device name=\"ZYPR\" package=\"YZP_R-XBGA-N6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"A2\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"C1\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"A1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"C2\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"B1\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"B2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DBVR\" package=\"DBV_R-PDSO-G6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"4\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DCKR\" package=\"DCK_R-PDSO-G6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"4\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DRLR\" package=\"DRL_R-PDSO-N6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"4\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"YEPR\" package=\"YEP_R-XBGA-N6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"A2\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"C1\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"A1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"C2\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"B1\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"B2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"microchip\">\n<description>&lt;b&gt;Microchip PIC Microcontrollers and other Devices&lt;/b&gt;&lt;p&gt;\nBased on the following sources :\n&lt;ul&gt;\n&lt;li&gt;Microchip Data Book, 1993\n&lt;li&gt;THE EMERGING WORLD STANDARD, 1995/1996\n&lt;li&gt;Microchip, Technical Library CD-ROM, June 1998\n&lt;li&gt;www.microchip.com\n&lt;/ul&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"DIL28-3\">\n<description>&lt;B&gt;Dual In Line&lt;/B&gt;&lt;p&gt;\npackage type P</description>\n<wire x1=\"-17.78\" y1=\"-1.27\" x2=\"-17.78\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-17.78\" y1=\"1.27\" x2=\"-17.78\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"17.78\" y1=\"-2.54\" x2=\"17.78\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-17.78\" y1=\"2.54\" x2=\"-17.78\" y2=\"1.27\" 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y=\"24.13\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-10.16\" y=\"-25.4\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"SCL\" x=\"-12.7\" y=\"-2.54\" length=\"short\" direction=\"in\"/>\n<pin name=\"SDA\" x=\"-12.7\" y=\"-5.08\" length=\"short\"/>\n<pin name=\"A0\" x=\"-12.7\" y=\"-10.16\" length=\"short\" direction=\"in\"/>\n<pin name=\"A1\" x=\"-12.7\" y=\"-12.7\" length=\"short\" direction=\"in\"/>\n<pin name=\"A2\" x=\"-12.7\" y=\"-15.24\" length=\"short\" direction=\"in\"/>\n<pin name=\"!RESET\" x=\"-12.7\" y=\"15.24\" length=\"short\" direction=\"in\"/>\n<pin name=\"INTA\" x=\"-12.7\" y=\"10.16\" length=\"short\" direction=\"out\"/>\n<pin name=\"INTB\" x=\"-12.7\" y=\"7.62\" length=\"short\" direction=\"out\"/>\n<pin name=\"GPB0\" x=\"12.7\" y=\"-2.54\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB1\" x=\"12.7\" y=\"-5.08\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB2\" x=\"12.7\" y=\"-7.62\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB3\" x=\"12.7\" y=\"-10.16\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB4\" x=\"12.7\" y=\"-12.7\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB5\" x=\"12.7\" y=\"-15.24\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB6\" x=\"12.7\" y=\"-17.78\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB7\" x=\"12.7\" y=\"-20.32\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA0\" x=\"12.7\" y=\"20.32\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA1\" x=\"12.7\" y=\"17.78\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA2\" x=\"12.7\" y=\"15.24\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA3\" x=\"12.7\" y=\"12.7\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA4\" x=\"12.7\" y=\"10.16\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA5\" x=\"12.7\" y=\"7.62\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA6\" x=\"12.7\" y=\"5.08\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA7\" x=\"12.7\" y=\"2.54\" length=\"short\" rot=\"R180\"/>\n<pin name=\"VDD\" x=\"-12.7\" y=\"20.32\" length=\"short\" direction=\"pwr\"/>\n<pin name=\"VSS\" x=\"-12.7\" y=\"-20.32\" length=\"short\" direction=\"pwr\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MCP23017\" prefix=\"IC\">\n<description>&lt;b&gt;http://ww1.microchip.com/downloads/en/DeviceDoc/21952a.pdf&lt;/b&gt;&lt;p&gt;\nSource: http://ww1.microchip.com/downloads/en/DeviceDoc/21952a.pdf</description>\n<gates>\n<gate name=\"G$1\" symbol=\"MCP23017\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SP\" package=\"DIL28-3\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/SP\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"1332088\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2959\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SO\" package=\"SO28W\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" 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pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/SS\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"1467674\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2960\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"ML\" package=\"QFN28-ML_6X6MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/ML\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2957\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"rcl@1\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      3006Y&lt;BR&gt;\n      3009P&lt;BR&gt;\n      3009W&lt;BR&gt;\n      3009Y&lt;BR&gt;\n      3057J&lt;BR&gt;\n      3057L&lt;BR&gt;\n      3057P&lt;BR&gt;\n      3057Y&lt;BR&gt;\n      3059J&lt;BR&gt;\n      3059L&lt;BR&gt;\n      3059P&lt;BR&gt;\n      3059Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      89P&lt;BR&gt;\n      89W&lt;BR&gt;\n      89X&lt;BR&gt;\n      89PH&lt;BR&gt;\n      76P&lt;BR&gt;\n      89XH&lt;BR&gt;\n      78SLT&lt;BR&gt;\n      78L&amp;nbsp;ALT&lt;BR&gt;\n      56P&amp;nbsp;ALT&lt;BR&gt;\n      78P&amp;nbsp;ALT&lt;BR&gt;\n      T8S&lt;BR&gt;\n      78L&lt;BR&gt;\n      56P&lt;BR&gt;\n      78P&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      T18/784&lt;BR&gt;\n      783&lt;BR&gt;\n      781&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2199&lt;BR&gt;\n      1697/1897&lt;BR&gt;\n      1680/1880&lt;BR&gt;\n      2187&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      8035EKP/CT20/RJ-20P&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ-20X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      1211L&lt;BR&gt;\n      8012EKQ&amp;nbsp;ALT&lt;BR&gt;\n      8012EKR&amp;nbsp;ALT&lt;BR&gt;\n      1211P&lt;BR&gt;\n      8012EKJ&lt;BR&gt;\n      8012EKL&lt;BR&gt;\n      8012EKQ&lt;BR&gt;\n      8012EKR&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      2101P&lt;BR&gt;\n      2101W&lt;BR&gt;\n      2101Y&lt;BR&gt;\n      -&lt;BR&gt;\n      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&lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      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RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      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91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n 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&lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    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shape=\"octagon\"/>\n<text x=\"-2.159\" y=\"1.397\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.159\" y=\"-2.667\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"2.159\" y1=\"-0.381\" x2=\"2.54\" y2=\"0.381\" layer=\"51\"/>\n<rectangle x1=\"-2.54\" y1=\"-0.381\" x2=\"-2.159\" y2=\"0.381\" layer=\"51\"/>\n</package>\n<package name=\"C050-025X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 2.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" 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x1=\"0.4318\" y1=\"0\" x2=\"0.4318\" y2=\"-0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"3.429\" x2=\"-3.683\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-3.683\" x2=\"3.429\" y2=\"-3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-3.429\" x2=\"3.683\" y2=\"3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"3.683\" x2=\"-3.429\" y2=\"3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"3.683\" x2=\"3.683\" y2=\"3.429\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-3.683\" x2=\"3.683\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-3.429\" x2=\"-3.429\" y2=\"-3.683\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"3.429\" x2=\"-3.429\" y2=\"3.683\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"4.064\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.921\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050H075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nHorizontal, grid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0.508\" x2=\"-3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.302\" y1=\"0.508\" x2=\"-1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.778\" y1=\"0.508\" x2=\"1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.778\" y1=\"0.508\" x2=\"3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"3.302\" y1=\"0.508\" x2=\"3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"0.508\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"2.413\" x2=\"-0.3048\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-0.3048\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"2.413\" x2=\"0.3302\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"0.3302\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<wire x1=\"2.54\" y1=\"0\" x2=\"2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.302\" y=\"8.001\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"3.175\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-2.794\" y1=\"0.127\" x2=\"-2.286\" y2=\"0.508\" layer=\"51\"/>\n<rectangle x1=\"2.286\" y1=\"0.127\" x2=\"2.794\" y2=\"0.508\" layer=\"51\"/>\n</package>\n<package name=\"C075-032X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 3.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-1.524\" x2=\"4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.27\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-1.524\" x2=\"5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.27\" x2=\"-4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-0.508\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0.889\" x2=\"-0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"-0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0.889\" x2=\"0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.826\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-042X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 4.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-2.032\" x2=\"4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.778\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-2.032\" x2=\"5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.778\" x2=\"-4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.699\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-052X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 5.2 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.54\" x2=\"4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.286\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-2.54\" x2=\"5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.286\" x2=\"-4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-043X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 4.3 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.032\" x2=\"6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"1.524\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.032\" x2=\"6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"1.524\" x2=\"-6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-054X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 5.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.54\" x2=\"6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.032\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.54\" x2=\"6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.032\" x2=\"-6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.905\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-064X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 6.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.54\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102_152-062X184\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm + 15.2 mm, outline 6.2 x 18.4 mm</description>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"3.683\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"0\" x2=\"8.636\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.223\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"3.048\" x2=\"6.731\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.731\" y1=\"2.54\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.176\" y1=\"3.048\" x2=\"11.684\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"7.112\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"3.048\" x2=\"11.176\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.684\" y1=\"2.54\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"10.033\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-5.969\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-054X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 5.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.032\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"2.54\" x2=\"8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"2.54\" x2=\"9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.032\" x2=\"-8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.382\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-064X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 6.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.54\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.048\" x2=\"8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.048\" x2=\"9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.54\" x2=\"-8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-072X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 7.2 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.048\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.556\" x2=\"8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.556\" x2=\"9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.048\" x2=\"-8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.937\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-084X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 8.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.556\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.064\" x2=\"8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.064\" x2=\"9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.556\" x2=\"-8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.445\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-091X182\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 9.1 x 18.2 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.937\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.445\" x2=\"8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.445\" x2=\"9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.937\" x2=\"-8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.826\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-062X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 6.2 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.048\" x2=\"12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"2.54\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.048\" x2=\"13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"2.54\" x2=\"-12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.7\" y=\"3.429\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-074X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 7.4 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.556\" x2=\"12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.048\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.556\" x2=\"13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.048\" x2=\"-12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"3.937\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-087X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 8.7 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"4.318\" x2=\"12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.81\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"4.318\" x2=\"13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.81\" x2=\"-12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"4.699\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-108X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 10.8 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.334\" x2=\"12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"4.826\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.334\" x2=\"13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"4.826\" x2=\"-12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.715\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-113X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 11.3 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.588\" x2=\"12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"5.08\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.588\" x2=\"13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"5.08\" x2=\"-12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-093X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 9.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"4.572\" x2=\"15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"4.064\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"4.572\" x2=\"15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"4.064\" x2=\"-15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"4.953\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-113X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 11.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"5.588\" x2=\"15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"5.08\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"5.588\" x2=\"15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"5.08\" x2=\"-15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-134X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 13.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"6.604\" x2=\"15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"6.096\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"6.604\" x2=\"15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"6.096\" x2=\"-15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"6.985\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-205X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 20.5 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"10.16\" x2=\"15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"9.652\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"10.16\" x2=\"15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"9.652\" x2=\"-15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-4.318\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-137X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 13.7 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"6.731\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.2372\" y=\"7.0612\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-162X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 16.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" 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ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-182X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 18.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"9.017\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"9.3472\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-192X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 19.2 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"8.509\" x2=\"20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"8.001\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"8.509\" x2=\"20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"8.001\" x2=\"-20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-203X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 20.3 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"10.16\" x2=\"20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"9.652\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"10.16\" x2=\"20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"9.652\" x2=\"-20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.32\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-035X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.778\" x2=\"3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.524\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.778\" x2=\"3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.524\" x2=\"-3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-155X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 15.5 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"7.62\" x2=\"20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"7.112\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"7.62\" x2=\"20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"7.112\" x2=\"-20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-063X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 6.3 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-3.048\" x2=\"4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.794\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-3.048\" x2=\"5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-154X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 15.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"7.112\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" 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width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-173X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 17.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"8.509\" x2=\"15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"8.001\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" 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width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.1\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.1\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.1\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-0.8\" x2=\"1.6\" y2=\"0.8\" layer=\"51\"/>\n</package>\n<package name=\"C1210K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1210 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3225</description>\n<wire x1=\"-1.525\" y1=\"1.175\" x2=\"1.525\" y2=\"1.175\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-1.175\" x2=\"-1.525\" y2=\"-1.175\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.55\" 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shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-1.016\" y=\"1.27\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.016\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-6.858\" y=\"2.032\" size=\"1.016\" layer=\"21\" ratio=\"12\">0817</text>\n<rectangle x1=\"-3.81\" y1=\"-0.4064\" x2=\"0\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"V234/12\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V234, grid 12.5 mm</description>\n<wire x1=\"-4.953\" y1=\"1.524\" x2=\"-4.699\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.699\" y1=\"1.778\" x2=\"4.953\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.699\" y1=\"-1.778\" x2=\"4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-4.953\" y1=\"-1.524\" x2=\"-4.699\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire 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radius=\"0.6\" width=\"0\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"52\"/>\n<smd name=\"1\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"1\" roundness=\"100\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"16\" roundness=\"100\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<hole x=\"0\" y=\"0\" drill=\"1.3\"/>\n</package>\n<package name=\"0922V\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0922, grid 7.5 mm</description>\n<wire x1=\"2.54\" y1=\"0\" x2=\"1.397\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-3.81\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-0.508\" y=\"1.6764\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.508\" y=\"-2.9972\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-6.858\" y=\"2.54\" size=\"1.016\" layer=\"21\" ratio=\"12\">0922</text>\n<rectangle x1=\"-3.81\" y1=\"-0.4064\" x2=\"1.3208\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"MINI_MELF-0102R\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<smd 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layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0204W\">\n<description>&lt;b&gt;CECC Size RC3715&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.684\" y1=\"0.6\" x2=\"-0.684\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.684\" y1=\"-0.6\" x2=\"0.684\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207R\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.2125\" y1=\"1\" x2=\"-1.2125\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.2125\" y1=\"-1\" x2=\"1.2125\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.2225\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.2225\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207W\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.149\" y1=\"1\" x2=\"-1.149\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.149\" y1=\"-1\" x2=\"1.149\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"RDH/15\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype RDH, grid 15 mm</description>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-6.858\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"2.794\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"-3.048\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.794\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"-4.953\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"-2.667\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.858\" y1=\"0\" x2=\"7.62\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"2.667\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.477\" y2=\"-2.667\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<pad name=\"1\" x=\"-7.62\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.62\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.35\" y=\"3.4544\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.318\" y=\"-0.5842\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"4.572\" y=\"-1.7272\" size=\"1.27\" layer=\"51\" ratio=\"10\" rot=\"R90\">RDH</text>\n<rectangle x1=\"-6.7564\" y1=\"-0.4064\" x2=\"-6.4516\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"6.4516\" y1=\"-0.4064\" x2=\"6.7564\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"0204V\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0204, grid 2.5 mm</description>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"1.27\" y2=\"0\" width=\"0.508\" layer=\"51\"/>\n<wire x1=\"-0.127\" y1=\"0\" x2=\"0.127\" y2=\"0\" width=\"0.508\" layer=\"21\"/>\n<circle x=\"-1.27\" y=\"0\" radius=\"0.889\" width=\"0.1524\" layer=\"51\"/>\n<circle x=\"-1.27\" y=\"0\" radius=\"0.635\" width=\"0.0508\" layer=\"51\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.1336\" y=\"1.1684\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.1336\" y=\"-2.3114\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"0309V\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0309, grid 2.5 mm</description>\n<wire x1=\"1.27\" y1=\"0\" x2=\"0.635\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"-0.635\" y1=\"0\" x2=\"-1.27\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<circle x=\"-1.27\" y=\"0\" radius=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-1.27\" y=\"0\" radius=\"0.762\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"0.254\" y=\"1.016\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"0.254\" y=\"-2.2098\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"0.254\" y1=\"-0.3048\" x2=\"0.5588\" y2=\"0.3048\" layer=\"51\"/>\n<rectangle x1=\"-0.635\" y1=\"-0.3048\" x2=\"-0.3302\" y2=\"0.3048\" layer=\"51\"/>\n<rectangle x1=\"-0.3302\" y1=\"-0.3048\" x2=\"0.254\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"R0201\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt; chip&lt;p&gt;\nSource: http://www.vishay.com/docs/20008/dcrcw.pdf</description>\n<smd name=\"1\" x=\"-0.255\" y=\"0\" dx=\"0.28\" dy=\"0.43\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.255\" y=\"0\" dx=\"0.28\" dy=\"0.43\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"0.15\" layer=\"21\"/>\n</package>\n<package name=\"VMTA55\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RNC55&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-4.26\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"3.3375\" y1=\"-1.45\" x2=\"3.3375\" y2=\"1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.3375\" y1=\"1.45\" x2=\"-3.3625\" y2=\"1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.3625\" y1=\"1.45\" x2=\"-3.3625\" y2=\"-1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.3625\" y1=\"-1.45\" x2=\"3.3375\" y2=\"-1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.235\" y1=\"0\" x2=\"5.08\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.175\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-4.26\" y1=\"-0.3048\" x2=\"-3.3075\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"3.2825\" y1=\"-0.3048\" x2=\"4.235\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VMTB60\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RNC60&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-6.35\" y1=\"0\" x2=\"-5.585\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"4.6875\" y1=\"-1.95\" x2=\"4.6875\" y2=\"1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/15\" package=\"0207/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/2V\" package=\"0207/2V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/5V\" package=\"0207/5V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/7\" package=\"0207/7\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0309/10\" 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pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0414/15\" package=\"0414/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0414/5V\" package=\"0414V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/17\" package=\"0617/17\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/22\" package=\"0617/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/5V\" package=\"0617V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0922/22\" package=\"0922/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0613/5V\" package=\"P0613V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0613/15\" package=\"P0613/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0817/22\" package=\"P0817/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0817/7V\" package=\"P0817V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"V234/12\" package=\"V234/12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"V235/17\" package=\"V235/17\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"V526-0\" package=\"V526-0\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0102AX\" package=\"MINI_MELF-0102AX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0922V\" package=\"0922V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0102R\" package=\"MINI_MELF-0102R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0102W\" package=\"MINI_MELF-0102W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0204R\" package=\"MINI_MELF-0204R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0204W\" package=\"MINI_MELF-0204W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0207R\" package=\"MINI_MELF-0207R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0207W\" package=\"MINI_MELF-0207W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"RDH/15\" package=\"RDH/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/2V\" package=\"0204V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0309/V\" package=\"0309V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0201\" package=\"R0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTA55\" package=\"VMTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTB60\" package=\"VMTB60\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA52\" package=\"VTA52\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA53\" package=\"VTA53\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA54\" package=\"VTA54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA55\" package=\"VTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA56\" package=\"VTA56\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R4527\" package=\"R4527\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC0001\" package=\"WSC0001\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC0002\" package=\"WSC0002\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC01/2\" package=\"WSC01/2\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC2515\" package=\"WSC2515\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC4527\" package=\"WSC4527\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC6927\" package=\"WSC6927\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1218\" package=\"R1218\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1812X7R\" package=\"1812X7R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"R01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"usb-serial\">\n<packages>\n<package name=\"SOIC16\">\n<description>&lt;b&gt;SMALL OUTLINE INTEGRATED CIRCUIT&lt;/b&gt;&lt;p&gt;\n16-Pin (150-Mil) SOIC&lt;br&gt;\nSource: http://www.cypress.com .. 38-12025_0P_V.pdf</description>\n<wire x1=\"4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<circle x=\"-4.05\" y=\"-0.995\" radius=\"0.3256\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"2\" x=\"-3.175\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"13\" x=\"-0.635\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" 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name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"SparkFun-FreqCtrl\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find crystals and oscillators and other things that go \"tick\".&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. 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width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.5\" y1=\"0.75\" x2=\"0.5\" y2=\"0.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.5\" y1=\"-0.75\" x2=\"-0.5\" y2=\"-0.75\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"0\" y=\"1.143\" size=\"0.8128\" layer=\"25\" align=\"bottom-center\">&gt;Name</text>\n<text x=\"0\" y=\"-1.143\" size=\"0.8128\" layer=\"27\" align=\"top-center\">&gt;Value</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"Q\">\n<wire x1=\"1.016\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-1.016\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-0.381\" y1=\"1.524\" x2=\"-0.381\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.381\" y1=\"-1.524\" x2=\"0.381\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0.381\" y1=\"-1.524\" x2=\"0.381\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0.381\" y1=\"1.524\" x2=\"-0.381\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.016\" y1=\"1.778\" x2=\"1.016\" y2=\"-1.778\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-1.016\" y1=\"1.778\" x2=\"-1.016\" y2=\"-1.778\" width=\"0.254\" layer=\"94\"/>\n<text x=\"2.54\" y=\"1.016\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<text x=\"-2.159\" y=\"-1.143\" size=\"0.8636\" layer=\"93\">1</text>\n<text x=\"1.524\" y=\"-1.143\" size=\"0.8636\" layer=\"93\">2</text>\n<pin name=\"2\" x=\"2.54\" y=\"0\" visible=\"off\" length=\"point\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"1\" x=\"-2.54\" y=\"0\" visible=\"off\" length=\"point\" direction=\"pas\" swaplevel=\"1\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"CRYSTAL\" prefix=\"Y\" uservalue=\"yes\">\n<description>Various standard crystals. Proven footprints.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"Q\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"HC49UV\" package=\"HC49U-V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC38H\" package=\"TC38H\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC26H\" package=\"TC26H\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-10112\"/>\n<attribute name=\"VALUE\" value=\"32.768kHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"HC49UP\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"HC49US\" package=\"HC49US\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"32-SMD-MELF\" package=\"CRYSTAL-32KHZ-SMD-MELF\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"X1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"X2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-07894\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-16MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-08218\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"EPSONMC146\" package=\"CRYSTAL-32KHZ-SMD_EPSON_MC146\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$2\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"10.5X4.8\" package=\"CRYSTAL-SMD-10.5X4.8-2PIN\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC26H_EZ\" package=\"TC26HEZ\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TXC-7A\" package=\"CRYSTAL-TXC-7A\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-12.288MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-09653\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"12.288MHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"3.2X1.5MM\" package=\"CRYSTAL-SMD-3.2X1.5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-13062\"/>\n<attribute name=\"VALUE\" value=\"32.768kHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-12MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-08297\"/>\n<attribute name=\"VALUE\" value=\"12MHz\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Luca Eagle-Library\">\n<packages>\n<package name=\"MSOP10\">\n<description>&lt;b&gt;10-Lead Mini Small Outline Package [MSOP]&lt;/b&gt; (RM-10)&lt;p&gt;\nSource: http://www.analog.com/UploadedFiles/Data_Sheets/35641221898805SSM2167_b.pdf&lt;br&gt;\nCOMPLIANT TO JEDEC STANDARDS MO-187BA</description>\n<wire x1=\"-1.4\" y1=\"1.4\" x2=\"1.4\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"1.4\" x2=\"1.4\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"-1.4\" x2=\"-1.4\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.4\" y1=\"-1.4\" x2=\"-1.4\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.8\" y1=\"-1.1\" x2=\"-0.8\" y2=\"-0.5\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-0.8\" y1=\"-0.5\" x2=\"-0.8\" y2=\"-1.1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"2\" x=\"-0.5\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"3\" x=\"0\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"4\" x=\"0.5\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"5\" x=\"1\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"6\" x=\"1\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"7\" x=\"0.5\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"8\" x=\"0\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"9\" x=\"-0.5\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"10\" x=\"-1\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-2.032\" y=\"-2.54\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\">&gt;NAME</text>\n<text x=\"3.302\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.1244\" y1=\"-2.5\" x2=\"-0.8744\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"-0.6244\" y1=\"-2.5\" x2=\"-0.3744\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"-0.1244\" y1=\"-2.5\" x2=\"0.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.3756\" y1=\"-2.5\" x2=\"0.6256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8756\" y1=\"-2.5\" x2=\"1.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8744\" y1=\"1.5\" x2=\"1.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"0.3744\" y1=\"1.5\" x2=\"0.6244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.1256\" y1=\"1.5\" x2=\"0.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.6256\" y1=\"1.5\" x2=\"-0.3756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-1.1256\" y1=\"1.5\" x2=\"-0.8756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"MCP4728\">\n<pin name=\"VDD\" x=\"-20.32\" y=\"5.08\" length=\"middle\"/>\n<pin name=\"SCL\" x=\"-20.32\" y=\"2.54\" length=\"middle\"/>\n<pin name=\"SDA\" x=\"-20.32\" y=\"0\" length=\"middle\"/>\n<pin name=\"!LDAC\" x=\"-20.32\" y=\"-2.54\" length=\"middle\"/>\n<pin name=\"RDY/!BSY\" x=\"-20.32\" y=\"-5.08\" length=\"middle\"/>\n<pin name=\"VOUT_A\" x=\"17.78\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_B\" x=\"17.78\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_C\" x=\"17.78\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_D\" x=\"17.78\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VSS\" x=\"17.78\" y=\"5.08\" length=\"middle\" rot=\"R180\"/>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-15.24\" y1=\"-7.62\" x2=\"12.7\" y2=\"-7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"12.7\" y1=\"-7.62\" x2=\"12.7\" y2=\"7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"12.7\" y1=\"7.62\" x2=\"-15.24\" y2=\"7.62\" width=\"0.254\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MCP4728\">\n<gates>\n<gate name=\"G$1\" symbol=\"MCP4728\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"MSOP10\">\n<connects>\n<connect gate=\"G$1\" pin=\"!LDAC\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"RDY/!BSY\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"VOUT_A\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"VOUT_B\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"VOUT_C\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"VOUT_D\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-Connector\" urn=\"urn:adsk.eagle:library:478\">\n<packages>\n<package name=\"H10-2.54\" urn=\"urn:adsk.eagle:footprint:33050/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"-12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"-12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0\" layer=\"39\"/>\n<pad name=\"1\" x=\"0\" y=\"11.43\" drill=\"0.889\" diameter=\"1.651\" shape=\"square\"/>\n<pad name=\"2\" x=\"0\" y=\"8.89\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"3\" x=\"0\" y=\"6.35\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"4\" x=\"0\" y=\"3.81\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"5\" x=\"0\" y=\"1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"6\" x=\"0\" y=\"-1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"7\" x=\"0\" y=\"-3.81\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"8\" x=\"0\" y=\"-6.35\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"9\" x=\"0\" y=\"-8.89\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"10\" x=\"0\" y=\"-11.43\" drill=\"0.889\" diameter=\"1.651\"/>\n<text x=\"2.54\" y=\"-1.27\" size=\"0.889\" layer=\"27\" ratio=\"11\" rot=\"R90\">&gt;value</text>\n<text x=\"-1.905\" y=\"-1.27\" size=\"0.889\" layer=\"25\" ratio=\"11\" rot=\"R90\">&gt;name</text>\n<text x=\"0.635\" y=\"2.54\" size=\"1.27\" layer=\"33\" ratio=\"10\" rot=\"R90\">&gt;name</text>\n<rectangle x1=\"-1.27\" y1=\"-12.7\" x2=\"1.27\" y2=\"12.7\" layer=\"39\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"H10-2.54\" urn=\"urn:adsk.eagle:package:33117/1\" type=\"box\" library_version=\"1\">\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"HEADER-10P\" urn=\"urn:adsk.eagle:symbol:33049/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"3.81\" y2=\"12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"12.7\" x2=\"3.81\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"-7.62\" y=\"13.97\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;name</text>\n<text x=\"-1.27\" y=\"13.97\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;value</text>\n<pin name=\"1\" x=\"-6.35\" y=\"11.43\" visible=\"pad\" length=\"middle\" function=\"dotclk\"/>\n<pin name=\"2\" x=\"-6.35\" y=\"8.89\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"3\" x=\"-6.35\" y=\"6.35\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"4\" x=\"-6.35\" y=\"3.81\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"5\" x=\"-6.35\" y=\"1.27\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"6\" x=\"-6.35\" y=\"-1.27\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"7\" x=\"-6.35\" y=\"-3.81\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"8\" x=\"-6.35\" y=\"-6.35\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"9\" x=\"-6.35\" y=\"-8.89\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"10\" x=\"-6.35\" y=\"-11.43\" visible=\"pad\" length=\"middle\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"DIP-YELLOW-FEMALE-HEADER-VERT(10P-2.54)\" urn=\"urn:adsk.eagle:component:33172/1\" prefix=\"J\" uservalue=\"yes\" library_version=\"1\">\n<description>320030059</description>\n<gates>\n<gate name=\"G$1\" symbol=\"HEADER-10P\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"H10-2.54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:33117/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MPN\" value=\"F185-1110A1BSYC1\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"YELLOW-10P-2.54\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"relay\" 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x2=\"6.35\" y2=\"1.778\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.842\" y1=\"0.508\" x2=\"6.604\" y2=\"0.508\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"6.604\" y1=\"0.508\" x2=\"6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.334\" y1=\"2.794\" x2=\"5.334\" y2=\"1.524\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.334\" y1=\"1.524\" x2=\"5.334\" y2=\"0.254\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.334\" y1=\"1.524\" x2=\"4.572\" y2=\"1.524\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.842\" y1=\"-2.794\" x2=\"5.842\" y2=\"-2.286\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.842\" y1=\"-1.778\" x2=\"5.842\" y2=\"-1.524\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.842\" y1=\"-1.524\" x2=\"5.842\" y2=\"-1.27\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.842\" y1=\"-0.762\" x2=\"5.842\" y2=\"-0.508\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.842\" y1=\"-0.508\" x2=\"5.842\" y2=\"-0.254\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"5.842\" 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layer=\"94\"/>\n<wire x1=\"-0.254\" y1=\"-0.508\" x2=\"-0.254\" y2=\"1.27\" width=\"0.2032\" layer=\"94\"/>\n<wire x1=\"-0.254\" y1=\"1.27\" x2=\"2.794\" y2=\"-0.762\" width=\"0.2032\" layer=\"94\"/>\n<text x=\"-7.62\" y=\"6.35\" size=\"1.778\" layer=\"95\" font=\"vector\">&gt;NAME</text>\n<text x=\"-7.62\" y=\"-7.62\" size=\"1.778\" layer=\"96\" font=\"vector\">&gt;VALUE</text>\n<rectangle x1=\"-6.35\" y1=\"-1.016\" x2=\"-3.81\" y2=\"-0.762\" layer=\"94\"/>\n<pin name=\"A\" x=\"-10.16\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\"/>\n<pin name=\"K\" x=\"-10.16\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\"/>\n<pin name=\"DS1\" x=\"10.16\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"DS2\" x=\"10.16\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"-6.35\" y=\"1.016\"/>\n<vertex x=\"-3.81\" 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package3d_urn=\"urn:adsk.eagle:package:24376/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"21\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n<technology name=\"22\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n<technology name=\"41\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD\" 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y1=\"-2.54\" x2=\"-10.16\" y2=\"2.54\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"2\" x=\"-8.89\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"1\" x=\"-8.89\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"-6.35\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-6.35\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"5\" x=\"-3.81\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"6\" x=\"-3.81\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"7\" x=\"-1.27\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"8\" x=\"-1.27\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"9\" x=\"1.27\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"10\" x=\"1.27\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"11\" x=\"3.81\" y=\"-2.921\" dx=\"1.27\" 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function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"PINHD-2X8\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X8\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X08\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X08/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X08_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"SparkFun-Passives\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find resistors, capacitors, inductors, test points, jumper pads, etc.&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"INDUCTOR-1206\">\n<wire x1=\"-1.778\" y1=\"2.032\" x2=\"-3.81\" y2=\"2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"2.032\" x2=\"-3.81\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"-2.032\" x2=\"-1.524\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.524\" y1=\"2.032\" x2=\"3.81\" y2=\"2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"2.032\" x2=\"3.81\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"-2.032\" x2=\"1.524\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"-2.54\" y=\"0\" dx=\"3.556\" dy=\"2.032\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"2.54\" y=\"0\" dx=\"3.556\" dy=\"2.032\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-1.27\" y=\"2.54\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.27\" y=\"-2.54\" size=\"0.4064\" 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Footprints are not proven and vary greatly between part numbers.&lt;br&gt;\nINDUCTOR POWER 3.3UH 4.0A SMD&lt;br&gt;\n0.197\" L x 0.197\" W x 0.177\" H (5.00mm x 5.00mm x 4.50mm)</description>\n<gates>\n<gate name=\"G$1\" symbol=\"INDUCTOR\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"H*\" package=\"INDUCTOR-1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"1206\"/>\n</technologies>\n</device>\n<device name=\"0603\" package=\"0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR54\" package=\"CR54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PWR\" package=\"CDRH125\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0402\" package=\"C0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-B82462G\" package=\"B82462G\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"68UH-1A\" package=\"CR75\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-09739\"/>\n<attribute name=\"VALUE\" value=\"68uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"1210\" package=\"1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1007\" package=\"1007\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_\" package=\"COOPER_UP4B\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-\" package=\"CDRH3D28\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0805\" 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name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"1\" name=\"gnd\" width=\"0.3048\" drill=\"0\">\n</class>\n<class number=\"2\" name=\"three\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"3\" name=\"five\" width=\"0.381\" drill=\"0\">\n</class>\n</classes>\n<parts>\n<part name=\"FPGA\" library=\"10M08SAE144\" deviceset=\"10M08SAE144\" device=\"\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"10M08SAE144C8G\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"P+3\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"P+4\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"CP5\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"CP6\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"+3V1\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND14\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND15\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"OSC\" library=\"crystal\" deviceset=\"ASE\" device=\"\" value=\"ASE-50.000MHZ-ET\">\n<attribute name=\"MPN\" value=\"ASE-50.000MHZ-ET\"/>\n</part>\n<part name=\"GND16\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V2\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"C_OSC\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"0.01uF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\"/>\n</part>\n<part name=\"+3V4\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"CV11\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND22\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CV12\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"+3V5\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"CG13\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"GND21\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CG14\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"CG15\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND23\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RJ2\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"RJ3\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"RJ4\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"+3V6\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"RJ5\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"+3V7\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"RS6\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"GND24\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RS7\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"RS8\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"+3V8\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"RS9\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"GND25\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RLED1\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LED1\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"GND26\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"REG\" library=\"Seeed-IC-2016\" deviceset=\"PMIC-CJT1117-3.3(SOT223)\" device=\"\" value=\"LDL1117S33R\">\n<attribute name=\"MPN\" value=\"LDL1117S33R\"/>\n</part>\n<part name=\"GND4\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CREF1\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND5\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RLED2\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LED2\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RLED3\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LED3\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"+3V15\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"C-AIN1\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND12\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND19\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND27\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND29\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND31\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"J1\" library=\"connector\" deviceset=\"MOLEX_BNC_73100-0105\" device=\"\">\n<attribute name=\"MPN\" value=\"73100-0105\"/>\n</part>\n<part name=\"J2\" library=\"connector\" deviceset=\"MOLEX_BNC_73100-0105\" device=\"\">\n<attribute name=\"MPN\" value=\"73100-0105\"/>\n</part>\n<part name=\"J3\" library=\"connector\" deviceset=\"MOLEX_BNC_73100-0105\" device=\"\">\n<attribute name=\"MPN\" value=\"73100-0105\"/>\n</part>\n<part name=\"J4\" library=\"connector\" deviceset=\"MOLEX_BNC_73100-0105\" device=\"\">\n<attribute name=\"MPN\" value=\"73100-0105\"/>\n</part>\n<part name=\"IC1\" library=\"HaasMaxADC\" deviceset=\"MAX19506\" device=\"\">\n<attribute name=\"MPN\" value=\"MAX19506ETM+\"/>\n</part>\n<part name=\"GND32\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C0DD2_A\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND33\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C-AIN2\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND1\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND2\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CREF2\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND3\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C-AIN3\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND6\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"IC2\" library=\"HaasMaxADC\" deviceset=\"MAX19506\" device=\"\">\n<attribute name=\"MPN\" value=\"MAX19506ETM+\"/>\n</part>\n<part name=\"GND10\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C0DD2_B\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND11\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C-AIN4\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND37\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"JP1\" library=\"Seeed-OPL-Connector\" deviceset=\"DIP-BLACK-MALE-HEADER(2X5P-2.54)\" device=\"\" value=\"2x5p-2.54\">\n<attribute name=\"MPN\" value=\"\"/>\n</part>\n<part name=\"GND7\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"P+1\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"GND8\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND13\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RLED4\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LED4\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"P+2\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"PIN_RIGHT\" library=\"Seeed-OPL-Connector\" deviceset=\"DIP-BLACK-FEMALE-HEADER-R/A(8P-2.54-90D)\" device=\"\" value=\"8p-2.54-90d\"/>\n<part name=\"PIN_LEFT\" library=\"Seeed-OPL-Connector\" deviceset=\"DIP-BLACK-SHORT-MALE-HEADER-R/A(8P-2.54-90D)\" device=\"\" value=\"8p-2.54-90d\">\n<attribute name=\"MPN\" value=\"\"/>\n</part>\n<part name=\"SW_5V\" library=\"PP_Electromechanical\" deviceset=\"SPDT\" device=\"_0S102011MS2QS1\" value=\"OS102011MS2QN1\"/>\n<part name=\"USB1\" library=\"PP_Connectors\" deviceset=\"USB_5PIN\" device=\"_10118193-0001LF\" value=\"MF-CON-MICROUSB-RIGHT\"/>\n<part name=\"GND42\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"SW_RESET\" library=\"MF_Switches\" deviceset=\"TACT\" device=\"_4.2MM\" value=\"MF-SW-TACT-4.2MM\"/>\n<part name=\"+3V16\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"+3V17\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"U1\" library=\"LMH6724\" deviceset=\"LMH6724MAX\" device=\"\" value=\"MAX4416ESA\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\" MAX4416ESA\"/>\n<attribute name=\"VENDOR\" value=\"\"/>\n</part>\n<part name=\"U2\" library=\"LMH6724\" deviceset=\"LMH6724MAX\" device=\"\" value=\"MAX4416ESA\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\" MAX4416ESA\"/>\n<attribute name=\"VENDOR\" value=\"\"/>\n</part>\n<part name=\"GAINSW1\" library=\"74xx-little-us\" deviceset=\"74*1G3157\" device=\"DBVR\">\n<attribute name=\"MPN\" value=\"SN74LVC1G3157DBV\"/>\n</part>\n<part name=\"R10M_1\" library=\"rcl@1\" deviceset=\"R-US_\" device=\"R0805\" value=\"10M\"/>\n<part name=\"GND9\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RIN1\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN2\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN3\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN4\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"C5VOPAMP2\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"C5VOPAMP1\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND28\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND30\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND36\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND38\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND40\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND41\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RGAIN1_1\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"100k\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-100k\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RGAIN2_1\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"GAINSW2\" library=\"74xx-little-us\" deviceset=\"74*1G3157\" device=\"DBVR\">\n<attribute name=\"MPN\" value=\"SN74LVC1G3157DBV\"/>\n</part>\n<part name=\"GAINSW3\" library=\"74xx-little-us\" deviceset=\"74*1G3157\" device=\"DBVR\">\n<attribute name=\"MPN\" value=\"SN74LVC1G3157DBV\"/>\n</part>\n<part name=\"GAINSW4\" library=\"74xx-little-us\" deviceset=\"74*1G3157\" device=\"DBVR\">\n<attribute name=\"MPN\" value=\"SN74LVC1G3157DBV\"/>\n</part>\n<part name=\"GND46\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND47\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND48\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND49\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CADD1_A\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND50\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C0DD1_A\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND51\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V18\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"CADD2_A\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND52\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CADD1_B\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND53\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CADD2_B\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND54\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CODD1_B\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND55\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V21\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"C_AC1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"0.01uF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\"/>\n</part>\n<part name=\"GND34\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"IOEXPAND_0X20_BOT\" library=\"microchip\" deviceset=\"MCP23017\" device=\"SS\"/>\n<part name=\"IOEXPAND_0X24_TOP\" library=\"microchip\" deviceset=\"MCP23017\" device=\"SS\"/>\n<part name=\"CP1\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"CP2\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"SW_TERM1\" library=\"PP_Electromechanical\" deviceset=\"SPDT\" device=\"_0S102011MS2QS1\" value=\"OS102011MS2QN1\"/>\n<part name=\"R10M_2\" library=\"rcl@1\" deviceset=\"R-US_\" device=\"R0805\" value=\"10M\"/>\n<part name=\"GND17\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"SW_TERM2\" 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device=\"C0603\" value=\"1nF\">\n<attribute name=\"MPN\" value=\"06035A102JAT2A\"/>\n</part>\n<part name=\"CIN1NF_2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"1nF\">\n<attribute name=\"MPN\" value=\"06035A102JAT2A\"/>\n</part>\n<part name=\"CIN1NF_3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"1nF\">\n<attribute name=\"MPN\" value=\"06035A102JAT2A\"/>\n</part>\n<part name=\"CIN1NF_4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"1nF\">\n<attribute name=\"MPN\" value=\"06035A102JAT2A\"/>\n</part>\n<part name=\"P+5\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"CP3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"CP4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"GND75\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"REG1\" library=\"Seeed-IC-2016\" deviceset=\"PMIC-CJT1117-3.3(SOT223)\" device=\"\" value=\"LDL1117S33R\">\n<attribute name=\"MPN\" value=\"LDL1117S33R\"/>\n</part>\n<part name=\"CP7\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"CP8\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"L1\" library=\"SparkFun-Passives\" deviceset=\"INDUCTOR\" device=\"1210\" value=\"10uH\">\n<attribute name=\"MPN\" value=\"MF-IND-1210-10uH\"/>\n</part>\n<part name=\"CP9\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"ROFFSET1\" library=\"rcl@1\" deviceset=\"R-US_\" device=\"R0805\" value=\"200\"/>\n<part name=\"ROFFSET2\" library=\"rcl@1\" deviceset=\"R-US_\" device=\"R0805\" value=\"200\"/>\n<part name=\"ROFFSET3\" library=\"rcl@1\" deviceset=\"R-US_\" device=\"R0805\" value=\"200\"/>\n<part name=\"ROFFSET4\" library=\"rcl@1\" deviceset=\"R-US_\" device=\"R0805\" value=\"200\"/>\n<part name=\"U$1\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$2\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$3\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$4\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$5\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$6\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$7\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$8\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$9\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$10\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$11\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$12\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$13\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$15\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"L2\" library=\"SparkFun-Passives\" deviceset=\"INDUCTOR\" device=\"1210\" value=\"10uH\">\n<attribute name=\"MPN\" value=\"MF-IND-1210-10uH\"/>\n</part>\n<part name=\"C_5V_10NF1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"0.01uF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\"/>\n</part>\n<part name=\"GND76\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CP10\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"CP11\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"P+6\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"COFFSETA6\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"COFFSETA1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"COFFSETA2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"COFFSETA3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"RIN5\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN6\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN7\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN8\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"GND77\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND78\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND79\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND80\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CH1\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"SW_SUPER1\" library=\"PP_Electromechanical\" deviceset=\"SPDT\" device=\"_0S102011MS2QS1\" value=\"OS102011MS2QN1\"/>\n<part name=\"SW_SUPER2\" library=\"PP_Electromechanical\" deviceset=\"SPDT\" device=\"_0S102011MS2QS1\" value=\"OS102011MS2QN1\"/>\n<part name=\"SW_SUPER3\" library=\"PP_Electromechanical\" deviceset=\"SPDT\" device=\"_0S102011MS2QS1\" value=\"OS102011MS2QN1\"/>\n<part name=\"SW_SUPER4\" library=\"PP_Electromechanical\" deviceset=\"SPDT\" device=\"_0S102011MS2QS1\" value=\"OS102011MS2QN1\"/>\n<part name=\"CL1\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL2\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL3\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL4\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CH2\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CH3\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CH4\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CIN5_1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"RLEDPOW\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LEDPOW\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"CIN56_1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"GOLD_ORB_SM1\" library=\"oshw\" deviceset=\"OSHWLOGO\" device=\"LOGO8MM\"/>\n</parts>\n<sheets>\n<sheet>\n<plain>\n<text x=\"-440.944\" y=\"-13.716\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"-440.944\" y=\"-16.51\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"-440.944\" y=\"-19.304\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"-440.944\" y=\"-22.098\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"-402.844\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-405.384\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-413.004\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-418.084\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-423.164\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-425.704\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-428.244\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-430.784\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-433.324\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-440.944\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"-443.484\" y=\"36.068\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n</plain>\n<instances>\n<instance part=\"FPGA\" gate=\"G$1\" x=\"-391.16\" y=\"10.16\">\n<attribute name=\"OC_NEWARK\" x=\"-391.16\" y=\"10.16\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-391.16\" y=\"10.16\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-408.94\" y=\"22.86\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n</instance>\n<instance part=\"P+3\" gate=\"1\" x=\"-601.98\" y=\"-63.5\"/>\n<instance part=\"P+4\" gate=\"1\" x=\"-337.82\" y=\"-129.54\" rot=\"R180\"/>\n<instance part=\"CP5\" gate=\"G$1\" x=\"-576.58\" y=\"-76.2\">\n<attribute name=\"MPN\" x=\"-576.58\" y=\"-76.2\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CP6\" gate=\"G$1\" x=\"-538.48\" y=\"-76.2\">\n<attribute name=\"MPN\" x=\"-528.32\" y=\"-76.2\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"+3V1\" gate=\"G$1\" x=\"-538.48\" y=\"-55.88\"/>\n<instance part=\"GND14\" gate=\"1\" x=\"-558.8\" y=\"-83.82\"/>\n<instance part=\"GND15\" gate=\"1\" x=\"-482.6\" y=\"43.18\"/>\n<instance part=\"OSC\" gate=\"G$1\" x=\"-541.02\" y=\"-25.4\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"-542.29\" y=\"-16.764\" size=\"0.762\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"-548.64\" y=\"-17.145\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"-548.64\" y=\"-35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND16\" gate=\"1\" x=\"-561.34\" y=\"-33.02\"/>\n<instance part=\"+3V2\" gate=\"G$1\" x=\"-561.34\" y=\"-12.7\"/>\n<instance part=\"C_OSC\" gate=\"G$1\" x=\"-561.34\" y=\"-22.86\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-565.15\" y=\"-21.59\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MFN\" x=\"-561.34\" y=\"-22.86\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"+3V4\" gate=\"G$1\" x=\"-287.02\" y=\"63.5\"/>\n<instance part=\"CV11\" gate=\"G$1\" x=\"-281.94\" y=\"55.88\">\n<attribute name=\"MPN\" x=\"-281.94\" y=\"55.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND22\" gate=\"1\" x=\"-287.02\" y=\"45.72\"/>\n<instance part=\"CV12\" gate=\"G$1\" x=\"-294.64\" y=\"55.88\">\n<attribute name=\"MPN\" x=\"-294.64\" y=\"55.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"+3V5\" gate=\"G$1\" x=\"-337.82\" y=\"101.6\"/>\n<instance part=\"CG13\" gate=\"G$1\" x=\"-332.74\" y=\"93.98\">\n<attribute name=\"MPN\" x=\"-332.74\" y=\"93.98\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND21\" gate=\"1\" x=\"-337.82\" y=\"83.82\"/>\n<instance part=\"CG14\" gate=\"G$1\" x=\"-345.44\" y=\"93.98\">\n<attribute name=\"MPN\" x=\"-345.44\" y=\"93.98\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CG15\" gate=\"G$1\" x=\"-322.58\" y=\"93.98\">\n<attribute name=\"MPN\" x=\"-322.58\" y=\"93.98\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND23\" gate=\"1\" x=\"-538.48\" y=\"10.16\"/>\n<instance part=\"RJ2\" gate=\"G$1\" x=\"-571.5\" y=\"20.32\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-571.5\" y=\"20.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-571.5\" y=\"20.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-571.5\" y=\"20.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"RJ3\" gate=\"G$1\" x=\"-594.36\" y=\"53.34\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-594.36\" y=\"53.34\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-594.36\" y=\"53.34\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-594.36\" y=\"53.34\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"RJ4\" gate=\"G$1\" x=\"-589.28\" y=\"60.96\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-589.28\" y=\"60.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-589.28\" y=\"60.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-589.28\" y=\"60.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"+3V6\" gate=\"G$1\" x=\"-589.28\" y=\"78.74\"/>\n<instance part=\"RJ5\" gate=\"G$1\" x=\"-530.86\" y=\"55.88\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-530.86\" y=\"55.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-530.86\" y=\"55.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-530.86\" y=\"55.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"+3V7\" gate=\"G$1\" x=\"-535.94\" y=\"71.12\"/>\n<instance part=\"RS6\" gate=\"G$1\" x=\"-416.56\" y=\"91.44\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-416.56\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-416.56\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-416.56\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND24\" gate=\"1\" x=\"-416.56\" y=\"99.06\" rot=\"R180\"/>\n<instance part=\"RS7\" gate=\"G$1\" x=\"-439.42\" y=\"91.44\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-439.42\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-439.42\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-439.42\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"RS8\" gate=\"G$1\" x=\"-436.88\" y=\"91.44\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-436.88\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-436.88\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-436.88\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"+3V8\" gate=\"G$1\" x=\"-436.88\" y=\"104.14\"/>\n<instance part=\"RS9\" gate=\"G$1\" x=\"-421.64\" y=\"91.44\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-421.64\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-421.64\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-421.64\" y=\"91.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND25\" gate=\"1\" x=\"-429.26\" y=\"91.44\" rot=\"R180\"/>\n<instance part=\"RLED1\" gate=\"G$1\" x=\"-45.72\" y=\"121.92\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-45.72\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-45.72\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-45.72\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"LED1\" gate=\"G$1\" x=\"-45.72\" y=\"111.76\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-45.72\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-45.72\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-45.72\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-49.276\" y=\"116.332\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</instance>\n<instance part=\"GND26\" gate=\"1\" x=\"-434.34\" y=\"-55.88\"/>\n<instance part=\"REG\" gate=\"G$1\" x=\"-558.8\" y=\"-66.04\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"-574.04\" y=\"-71.12\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"-566.42\" y=\"-62.23\" size=\"1.27\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"-558.8\" y=\"-62.23\" size=\"1.27\" layer=\"96\"/>\n</instance>\n<instance part=\"GND4\" gate=\"1\" x=\"-254\" y=\"-22.86\" rot=\"R180\"/>\n<instance part=\"CREF1\" gate=\"G$1\" x=\"-193.04\" y=\"-33.02\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-193.04\" y=\"-33.02\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND5\" gate=\"1\" x=\"-187.96\" y=\"-35.56\"/>\n<instance part=\"RLED2\" gate=\"G$1\" x=\"-55.88\" y=\"121.92\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-55.88\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-55.88\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-55.88\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"LED2\" gate=\"G$1\" x=\"-55.88\" y=\"111.76\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-55.88\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-55.88\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-55.88\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-59.436\" y=\"116.332\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</instance>\n<instance part=\"RLED3\" gate=\"G$1\" x=\"-66.04\" y=\"121.92\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-66.04\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-66.04\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-66.04\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"LED3\" gate=\"G$1\" x=\"-66.04\" y=\"111.76\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-66.04\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-66.04\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-66.04\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-69.596\" y=\"116.332\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</instance>\n<instance part=\"+3V15\" gate=\"G$1\" x=\"-274.32\" y=\"73.66\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"VALUE\" x=\"-271.78\" y=\"73.66\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN1\" gate=\"G$1\" x=\"-261.62\" y=\"-35.56\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-261.62\" y=\"-35.56\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"GND12\" gate=\"1\" x=\"-261.62\" y=\"-27.94\" rot=\"R180\"/>\n<instance part=\"GND19\" gate=\"1\" x=\"-144.78\" y=\"-86.36\" rot=\"R270\"/>\n<instance part=\"GND27\" gate=\"1\" x=\"-241.3\" y=\"-86.36\" rot=\"R270\"/>\n<instance part=\"GND29\" gate=\"1\" x=\"-208.28\" y=\"-86.36\" rot=\"R270\"/>\n<instance part=\"GND31\" gate=\"1\" x=\"-175.26\" y=\"-86.36\" rot=\"R270\"/>\n<instance part=\"J1\" gate=\"G$1\" x=\"-233.68\" y=\"-78.74\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" x=\"-233.68\" y=\"-86.36\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-230.632\" y=\"-74.93\" size=\"1.778\" layer=\"95\" ratio=\"12\" rot=\"R270\"/>\n</instance>\n<instance part=\"J2\" gate=\"G$1\" x=\"-200.66\" y=\"-78.74\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" x=\"-200.66\" y=\"-86.36\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-197.612\" y=\"-74.93\" size=\"1.778\" layer=\"95\" ratio=\"12\" rot=\"R270\"/>\n</instance>\n<instance part=\"J3\" gate=\"G$1\" x=\"-167.64\" y=\"-78.74\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" x=\"-167.64\" y=\"-86.36\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-164.592\" y=\"-74.93\" size=\"1.778\" layer=\"95\" ratio=\"12\" rot=\"R270\"/>\n</instance>\n<instance part=\"J4\" gate=\"G$1\" x=\"-137.16\" y=\"-78.74\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" x=\"-137.16\" y=\"-86.36\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-134.112\" y=\"-74.93\" size=\"1.778\" layer=\"95\" ratio=\"12\" rot=\"R270\"/>\n</instance>\n<instance part=\"IC1\" gate=\"M\" x=\"-220.98\" y=\"-12.7\">\n<attribute name=\"MPN\" x=\"-220.98\" y=\"-12.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND32\" gate=\"1\" x=\"-187.96\" y=\"12.7\" rot=\"R90\"/>\n<instance part=\"C0DD2_A\" gate=\"G$1\" x=\"-180.34\" y=\"7.62\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-180.34\" y=\"7.62\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND33\" gate=\"1\" x=\"-175.26\" y=\"5.08\"/>\n<instance part=\"C-AIN2\" gate=\"G$1\" x=\"-261.62\" y=\"-45.72\">\n<attribute name=\"MPN\" x=\"-261.62\" y=\"-45.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND1\" gate=\"1\" x=\"-261.62\" y=\"-53.34\"/>\n<instance part=\"GND2\" gate=\"1\" x=\"-116.84\" y=\"-22.86\" rot=\"R180\"/>\n<instance part=\"CREF2\" gate=\"G$1\" x=\"-55.88\" y=\"-33.02\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-55.88\" y=\"-33.02\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND3\" gate=\"1\" x=\"-50.8\" y=\"-35.56\"/>\n<instance part=\"C-AIN3\" gate=\"G$1\" x=\"-124.46\" y=\"-35.56\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-124.46\" y=\"-35.56\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"GND6\" gate=\"1\" x=\"-124.46\" y=\"-27.94\" rot=\"R180\"/>\n<instance part=\"IC2\" gate=\"M\" x=\"-83.82\" y=\"-12.7\">\n<attribute name=\"MPN\" x=\"-83.82\" y=\"-12.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND10\" gate=\"1\" x=\"-50.8\" y=\"12.7\" rot=\"R90\"/>\n<instance part=\"C0DD2_B\" gate=\"G$1\" x=\"-43.18\" y=\"7.62\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-43.18\" y=\"7.62\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND11\" gate=\"1\" x=\"-38.1\" y=\"5.08\"/>\n<instance part=\"C-AIN4\" gate=\"G$1\" x=\"-124.46\" y=\"-45.72\">\n<attribute name=\"MPN\" x=\"-124.46\" y=\"-45.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND37\" gate=\"1\" x=\"-124.46\" y=\"-53.34\"/>\n<instance part=\"JP1\" gate=\"G$1\" x=\"-553.72\" y=\"35.56\">\n<attribute name=\"MPN\" x=\"-538.48\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"both\"/>\n</instance>\n<instance part=\"GND7\" gate=\"1\" x=\"-274.32\" y=\"86.36\" rot=\"R90\"/>\n<instance part=\"P+1\" gate=\"1\" x=\"-429.26\" y=\"-93.98\" smashed=\"yes\" rot=\"MR90\">\n<attribute name=\"VALUE\" x=\"-424.18\" y=\"-93.98\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND8\" gate=\"1\" x=\"-444.5\" y=\"-106.68\" rot=\"R90\"/>\n<instance part=\"GND13\" gate=\"1\" x=\"-307.34\" y=\"-106.68\" rot=\"R270\"/>\n<instance part=\"RLED4\" gate=\"G$1\" x=\"-76.2\" y=\"121.92\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-76.2\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-76.2\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-76.2\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"LED4\" gate=\"G$1\" x=\"-76.2\" y=\"111.76\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-76.2\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-76.2\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-76.2\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-79.756\" y=\"116.332\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</instance>\n<instance part=\"P+2\" gate=\"1\" x=\"-274.32\" y=\"78.74\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"VALUE\" x=\"-271.78\" y=\"78.74\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"PIN_RIGHT\" gate=\"G$1\" x=\"-297.18\" y=\"-97.79\"/>\n<instance part=\"PIN_LEFT\" gate=\"G$1\" x=\"-454.66\" y=\"-97.79\" rot=\"R180\"/>\n<instance part=\"SW_5V\" gate=\"G$1\" x=\"-337.82\" y=\"-114.3\" rot=\"R90\"/>\n<instance part=\"USB1\" gate=\"G$1\" x=\"-375.92\" y=\"-104.14\"/>\n<instance part=\"GND42\" gate=\"1\" x=\"-480.06\" y=\"78.994\"/>\n<instance part=\"SW_RESET\" gate=\"G$1\" x=\"-431.8\" y=\"86.36\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-434.34\" y=\"86.36\" size=\"1.016\" layer=\"95\" font=\"vector\" align=\"top-left\"/>\n<attribute name=\"VALUE\" x=\"-434.34\" y=\"91.44\" size=\"1.016\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"+3V16\" gate=\"G$1\" x=\"-182.88\" y=\"22.86\"/>\n<instance part=\"+3V17\" gate=\"G$1\" x=\"-45.72\" y=\"22.86\"/>\n<instance part=\"U1\" gate=\"A\" x=\"-248.92\" y=\"-205.74\"/>\n<instance part=\"U2\" gate=\"A\" x=\"-167.64\" y=\"-205.74\"/>\n<instance part=\"GAINSW1\" gate=\"G$1\" x=\"-292.1\" y=\"-208.28\">\n<attribute name=\"MPN\" x=\"-292.1\" y=\"-208.28\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"R10M_1\" gate=\"G$1\" x=\"-223.52\" y=\"-68.58\" rot=\"R270\"/>\n<instance part=\"GND9\" gate=\"1\" x=\"-223.52\" y=\"-60.96\" rot=\"R180\"/>\n<instance part=\"RIN1\" gate=\"G$1\" x=\"-238.76\" y=\"-121.92\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-238.76\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-238.76\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-238.76\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"RIN2\" gate=\"G$1\" x=\"-205.74\" y=\"-121.92\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-205.74\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-205.74\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-205.74\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"RIN3\" gate=\"G$1\" x=\"-172.72\" y=\"-121.92\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-172.72\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-172.72\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-172.72\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"RIN4\" gate=\"G$1\" x=\"-142.24\" y=\"-121.92\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-142.24\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-142.24\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-142.24\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"C5VOPAMP2\" gate=\"G$1\" x=\"-106.68\" y=\"-200.66\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-106.68\" y=\"-200.66\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"-101.981\" y=\"-199.136\" size=\"1.778\" layer=\"96\" rot=\"R90\"/>\n</instance>\n<instance part=\"C5VOPAMP1\" gate=\"G$1\" x=\"-187.96\" y=\"-200.66\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-187.96\" y=\"-200.66\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"-183.261\" y=\"-199.136\" size=\"1.778\" layer=\"96\" rot=\"R90\"/>\n</instance>\n<instance part=\"GND28\" gate=\"1\" x=\"-182.88\" y=\"-203.2\"/>\n<instance part=\"GND30\" gate=\"1\" x=\"-101.6\" y=\"-203.2\"/>\n<instance part=\"GND36\" gate=\"1\" x=\"-200.66\" y=\"-27.94\" rot=\"R180\"/>\n<instance part=\"GND38\" gate=\"1\" x=\"-63.5\" y=\"-27.94\" rot=\"R180\"/>\n<instance part=\"GND40\" gate=\"1\" x=\"-246.38\" y=\"-215.9\"/>\n<instance part=\"GND41\" gate=\"1\" x=\"-165.1\" y=\"-215.9\"/>\n<instance part=\"RGAIN1_1\" gate=\"G$1\" x=\"-317.5\" y=\"-203.2\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-317.5\" y=\"-203.2\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-317.5\" y=\"-203.2\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-317.5\" y=\"-203.2\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN2_1\" gate=\"G$1\" x=\"-317.5\" y=\"-210.82\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-317.5\" y=\"-210.82\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-317.5\" y=\"-210.82\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-317.5\" y=\"-210.82\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GAINSW2\" gate=\"G$1\" x=\"-220.98\" y=\"-254\">\n<attribute name=\"MPN\" x=\"-220.98\" y=\"-256.54\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GAINSW3\" gate=\"G$1\" x=\"-129.54\" y=\"-254\">\n<attribute name=\"MPN\" x=\"-129.54\" y=\"-254\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GAINSW4\" gate=\"G$1\" x=\"-33.02\" y=\"-218.44\">\n<attribute name=\"MPN\" x=\"-33.02\" y=\"-218.44\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GAINSW1\" gate=\"P\" x=\"-284.48\" y=\"-205.74\"/>\n<instance part=\"GND46\" gate=\"1\" x=\"-281.94\" y=\"-213.36\" rot=\"R90\"/>\n<instance part=\"GAINSW2\" gate=\"P\" x=\"-213.36\" y=\"-251.46\"/>\n<instance part=\"GAINSW3\" gate=\"P\" x=\"-121.92\" y=\"-251.46\"/>\n<instance part=\"GAINSW4\" gate=\"P\" x=\"-25.4\" y=\"-215.9\"/>\n<instance part=\"GND47\" gate=\"1\" x=\"-210.82\" y=\"-259.08\" rot=\"R90\"/>\n<instance part=\"GND48\" gate=\"1\" x=\"-119.38\" y=\"-259.08\" rot=\"R90\"/>\n<instance part=\"GND49\" gate=\"1\" x=\"-22.86\" y=\"-223.52\" rot=\"R90\"/>\n<instance part=\"CADD1_A\" gate=\"G$1\" x=\"-144.78\" y=\"7.62\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-144.78\" y=\"7.62\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND50\" gate=\"1\" x=\"-139.7\" y=\"5.08\"/>\n<instance part=\"C0DD1_A\" gate=\"G$1\" x=\"-180.34\" y=\"33.02\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-180.34\" y=\"33.02\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND51\" gate=\"1\" x=\"-175.26\" y=\"30.48\"/>\n<instance part=\"+3V18\" gate=\"G$1\" x=\"-182.88\" y=\"48.26\"/>\n<instance part=\"CADD2_A\" gate=\"G$1\" x=\"-144.78\" y=\"33.02\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-144.78\" y=\"33.02\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND52\" gate=\"1\" x=\"-139.7\" y=\"30.48\"/>\n<instance part=\"CADD1_B\" gate=\"G$1\" x=\"-7.62\" y=\"7.62\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-7.62\" y=\"7.62\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND53\" gate=\"1\" x=\"-2.54\" y=\"5.08\"/>\n<instance part=\"CADD2_B\" gate=\"G$1\" x=\"-7.62\" y=\"33.02\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-7.62\" y=\"33.02\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND54\" gate=\"1\" x=\"-2.54\" y=\"30.48\"/>\n<instance part=\"CODD1_B\" gate=\"G$1\" x=\"-43.18\" y=\"33.02\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-43.18\" y=\"33.02\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"GND55\" gate=\"1\" x=\"-38.1\" y=\"30.48\"/>\n<instance part=\"+3V21\" gate=\"G$1\" x=\"-45.72\" y=\"48.26\"/>\n<instance part=\"C_AC1\" gate=\"G$1\" x=\"-242.57\" y=\"-106.68\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-238.76\" y=\"-107.95\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"MFN\" x=\"-242.57\" y=\"-106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"GND34\" gate=\"1\" x=\"-218.44\" y=\"-96.52\" rot=\"R180\"/>\n<instance part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" x=\"-223.52\" y=\"101.6\"/>\n<instance part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" x=\"-157.48\" y=\"101.6\"/>\n<instance part=\"CP1\" gate=\"G$1\" x=\"-584.2\" y=\"-76.2\">\n<attribute name=\"MPN\" x=\"-584.2\" y=\"-76.2\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CP2\" gate=\"G$1\" x=\"-594.36\" y=\"-76.2\">\n<attribute name=\"MPN\" x=\"-594.36\" y=\"-76.2\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"SW_TERM1\" gate=\"G$1\" x=\"-226.06\" y=\"-81.28\" rot=\"R90\"/>\n<instance part=\"R10M_2\" gate=\"G$1\" x=\"-190.5\" y=\"-68.58\" rot=\"R270\"/>\n<instance part=\"GND17\" gate=\"1\" x=\"-190.5\" y=\"-60.96\" rot=\"R180\"/>\n<instance part=\"SW_TERM2\" gate=\"G$1\" x=\"-193.04\" y=\"-81.28\" rot=\"R90\"/>\n<instance part=\"R10M_3\" gate=\"G$1\" x=\"-157.48\" y=\"-68.58\" rot=\"R270\"/>\n<instance part=\"GND18\" gate=\"1\" x=\"-157.48\" y=\"-60.96\" rot=\"R180\"/>\n<instance part=\"SW_TERM3\" gate=\"G$1\" x=\"-160.02\" y=\"-81.28\" rot=\"R90\"/>\n<instance part=\"R10M_4\" gate=\"G$1\" x=\"-127\" y=\"-68.58\" rot=\"R270\"/>\n<instance part=\"GND20\" gate=\"1\" x=\"-127\" y=\"-60.96\" rot=\"R180\"/>\n<instance part=\"SW_TERM4\" gate=\"G$1\" x=\"-129.54\" y=\"-81.28\" rot=\"R90\"/>\n<instance part=\"OVSAMP1\" gate=\"G$1\" x=\"-104.14\" y=\"60.96\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"-104.14\" y=\"58.42\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"-109.22\" y=\"69.215\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"-109.22\" y=\"50.8\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"OVSAMP2\" gate=\"G$1\" x=\"-104.14\" y=\"38.1\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"-104.14\" y=\"35.56\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"-109.22\" y=\"46.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"-109.22\" y=\"27.94\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"OVSAMP2\" gate=\"P\" x=\"-96.52\" y=\"40.64\"/>\n<instance part=\"OVSAMP1\" gate=\"P\" x=\"-96.52\" y=\"63.5\"/>\n<instance part=\"GND60\" gate=\"1\" x=\"-96.52\" y=\"30.48\"/>\n<instance part=\"GND61\" gate=\"1\" x=\"-96.52\" y=\"53.34\"/>\n<instance part=\"COFFSETB6\" gate=\"G$1\" x=\"-261.62\" y=\"-215.9\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-261.62\" y=\"-215.9\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-258.064\" y=\"-218.821\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<attribute name=\"VALUE\" x=\"-263.144\" y=\"-211.201\" size=\"1.778\" layer=\"96\" rot=\"R180\"/>\n</instance>\n<instance part=\"GND58\" gate=\"1\" x=\"-254\" y=\"-220.98\"/>\n<instance part=\"COFFSETB8\" gate=\"G$1\" x=\"-190.5\" y=\"-218.44\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-190.5\" y=\"-218.44\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-186.944\" y=\"-221.361\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<attribute name=\"VALUE\" x=\"-192.024\" y=\"-213.741\" size=\"1.778\" layer=\"96\" rot=\"R180\"/>\n</instance>\n<instance part=\"GND59\" gate=\"1\" x=\"-182.88\" y=\"-223.52\"/>\n<instance part=\"COFFSETB10\" gate=\"G$1\" x=\"-177.8\" y=\"-215.9\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-177.8\" y=\"-215.9\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-174.244\" y=\"-218.821\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<attribute name=\"VALUE\" x=\"-179.324\" y=\"-211.201\" size=\"1.778\" layer=\"96\" rot=\"R180\"/>\n</instance>\n<instance part=\"GND62\" gate=\"1\" x=\"-170.18\" y=\"-220.98\"/>\n<instance part=\"COFFSETB12\" gate=\"G$1\" x=\"-104.14\" y=\"-218.44\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-104.14\" y=\"-218.44\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-100.584\" y=\"-221.361\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<attribute name=\"VALUE\" x=\"-105.664\" y=\"-213.741\" size=\"1.778\" layer=\"96\" rot=\"R180\"/>\n</instance>\n<instance part=\"GND63\" gate=\"1\" x=\"-96.52\" y=\"-223.52\"/>\n<instance part=\"+3V26\" gate=\"G$1\" x=\"-238.76\" y=\"121.92\" rot=\"R90\"/>\n<instance part=\"GND64\" gate=\"1\" x=\"-238.76\" y=\"81.28\" rot=\"R270\"/>\n<instance part=\"+3V27\" gate=\"G$1\" x=\"-172.72\" y=\"121.92\" rot=\"R90\"/>\n<instance part=\"GND65\" gate=\"1\" x=\"-172.72\" y=\"81.28\" rot=\"R270\"/>\n<instance part=\"R_SCL\" gate=\"G$1\" x=\"-246.38\" y=\"111.76\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-246.38\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-246.38\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-246.38\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"R_SDA\" gate=\"G$1\" x=\"-254\" y=\"111.76\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-254\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-254\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-254\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"R50-4\" gate=\"G$1\" x=\"-228.6\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-3\" gate=\"G$1\" x=\"-231.14\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-2\" gate=\"G$1\" x=\"-233.68\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-1\" gate=\"G$1\" x=\"-236.22\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-5\" gate=\"G$1\" x=\"-195.58\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-6\" gate=\"G$1\" x=\"-198.12\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-7\" gate=\"G$1\" x=\"-200.66\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-8\" gate=\"G$1\" x=\"-203.2\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-9\" gate=\"G$1\" x=\"-162.56\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-10\" gate=\"G$1\" x=\"-165.1\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-11\" gate=\"G$1\" x=\"-167.64\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-12\" gate=\"G$1\" x=\"-170.18\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-13\" gate=\"G$1\" x=\"-132.08\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-14\" gate=\"G$1\" x=\"-134.62\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-15\" gate=\"G$1\" x=\"-137.16\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"R50-16\" gate=\"G$1\" x=\"-139.7\" y=\"-68.58\" rot=\"R90\"/>\n<instance part=\"U340G\" gate=\"G$1\" x=\"-383.54\" y=\"-160.02\"/>\n<instance part=\"Y1\" gate=\"G$1\" x=\"-444.5\" y=\"-162.56\"/>\n<instance part=\"C_OSC1\" gate=\"G$1\" x=\"-447.04\" y=\"-172.72\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-450.85\" y=\"-171.45\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MFN\" x=\"-447.04\" y=\"-172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"C_OSC2\" gate=\"G$1\" x=\"-439.42\" y=\"-172.72\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-443.23\" y=\"-171.45\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MFN\" x=\"-439.42\" y=\"-172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND66\" gate=\"1\" x=\"-447.04\" y=\"-187.96\"/>\n<instance part=\"+3V30\" gate=\"G$1\" x=\"-383.54\" y=\"-142.24\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"VALUE\" x=\"-388.62\" y=\"-144.78\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND67\" gate=\"1\" x=\"-419.1\" y=\"-139.7\" rot=\"R180\"/>\n<instance part=\"DAC1\" gate=\"G$1\" x=\"-538.48\" y=\"-144.78\">\n<attribute name=\"MFN\" x=\"-538.48\" y=\"-144.78\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND39\" gate=\"1\" x=\"-520.7\" y=\"-137.16\" rot=\"R180\"/>\n<instance part=\"GND43\" gate=\"1\" x=\"-561.34\" y=\"-147.32\" rot=\"R270\"/>\n<instance part=\"GND44\" gate=\"1\" x=\"-563.88\" y=\"-129.54\" rot=\"R180\"/>\n<instance part=\"COFFSET\" gate=\"G$1\" x=\"-563.88\" y=\"-134.62\">\n<attribute name=\"MPN\" x=\"-563.88\" y=\"-134.62\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"C_5V_10NF\" gate=\"G$1\" x=\"-591.82\" y=\"-60.96\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-588.01\" y=\"-67.31\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"MFN\" x=\"-591.82\" y=\"-60.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND45\" gate=\"1\" x=\"-604.52\" y=\"-58.42\" rot=\"R270\"/>\n<instance part=\"CGAIN1_1\" gate=\"G$1\" x=\"-320.04\" y=\"-196.85\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"NAME\" x=\"-321.31\" y=\"-200.66\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"MPN\" x=\"-320.04\" y=\"-196.85\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN3_1\" gate=\"G$1\" x=\"-307.34\" y=\"-203.2\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-307.34\" y=\"-203.2\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-307.34\" y=\"-203.2\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-307.34\" y=\"-203.2\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN4_1\" gate=\"G$1\" x=\"-307.34\" y=\"-210.82\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-307.34\" y=\"-210.82\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-307.34\" y=\"-210.82\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-307.34\" y=\"-210.82\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN1_2\" gate=\"G$1\" x=\"-246.38\" y=\"-248.92\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-246.38\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-246.38\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-246.38\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN2_2\" gate=\"G$1\" x=\"-246.38\" y=\"-256.54\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-246.38\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-246.38\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-246.38\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CGAIN1_2\" gate=\"G$1\" x=\"-248.92\" y=\"-242.57\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"NAME\" x=\"-250.19\" y=\"-246.38\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"MPN\" x=\"-248.92\" y=\"-242.57\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN3_2\" gate=\"G$1\" x=\"-236.22\" y=\"-248.92\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-236.22\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-236.22\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-236.22\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN4_2\" gate=\"G$1\" x=\"-236.22\" y=\"-256.54\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-236.22\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-236.22\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-236.22\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN1_3\" gate=\"G$1\" x=\"-154.94\" y=\"-248.92\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-154.94\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-154.94\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-154.94\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN2_3\" gate=\"G$1\" x=\"-154.94\" y=\"-256.54\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-154.94\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-154.94\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-154.94\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CGAIN1_3\" gate=\"G$1\" x=\"-157.48\" y=\"-242.57\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"NAME\" x=\"-158.75\" y=\"-246.38\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"MPN\" x=\"-157.48\" y=\"-242.57\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN3_3\" gate=\"G$1\" x=\"-144.78\" y=\"-248.92\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-144.78\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-144.78\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-144.78\" y=\"-248.92\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN4_3\" gate=\"G$1\" x=\"-144.78\" y=\"-256.54\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-144.78\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-144.78\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-144.78\" y=\"-256.54\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN1_4\" gate=\"G$1\" x=\"-58.42\" y=\"-213.36\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-58.42\" y=\"-213.36\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-58.42\" y=\"-213.36\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-58.42\" y=\"-213.36\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN2_4\" gate=\"G$1\" x=\"-58.42\" y=\"-220.98\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-58.42\" y=\"-220.98\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-58.42\" y=\"-220.98\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-58.42\" y=\"-220.98\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CGAIN1_4\" gate=\"G$1\" x=\"-60.96\" y=\"-207.01\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"NAME\" x=\"-62.23\" y=\"-210.82\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"MPN\" x=\"-60.96\" y=\"-207.01\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN3_4\" gate=\"G$1\" x=\"-48.26\" y=\"-213.36\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-48.26\" y=\"-213.36\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-48.26\" y=\"-213.36\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-48.26\" y=\"-213.36\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"RGAIN4_4\" gate=\"G$1\" x=\"-48.26\" y=\"-220.98\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-48.26\" y=\"-220.98\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-48.26\" y=\"-220.98\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-48.26\" y=\"-220.98\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_DISPLAY\" gate=\"G$1\" x=\"-466.09\" y=\"87.884\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"NAME\" x=\"-461.01\" y=\"89.154\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n</instance>\n<instance part=\"PIN_IO_1\" gate=\"G$1\" x=\"-466.09\" y=\"110.49\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"NAME\" x=\"-461.01\" y=\"111.76\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n</instance>\n<instance part=\"P+7\" gate=\"1\" x=\"-480.06\" y=\"96.52\" rot=\"R90\"/>\n<instance part=\"GND68\" gate=\"1\" x=\"-480.06\" y=\"101.6\"/>\n<instance part=\"GND69\" gate=\"1\" x=\"-355.6\" y=\"-116.84\" rot=\"R90\"/>\n<instance part=\"K1\" gate=\"G$1\" x=\"-228.6\" y=\"-104.14\" rot=\"R180\"/>\n<instance part=\"C_AC2\" gate=\"G$1\" x=\"-209.55\" y=\"-106.68\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-205.74\" y=\"-107.95\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"MFN\" x=\"-209.55\" y=\"-106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"GND35\" gate=\"1\" x=\"-185.42\" y=\"-96.52\" rot=\"R180\"/>\n<instance part=\"K2\" gate=\"G$1\" x=\"-195.58\" y=\"-104.14\" rot=\"R180\"/>\n<instance part=\"C_AC3\" gate=\"G$1\" x=\"-176.53\" y=\"-106.68\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-172.72\" y=\"-107.95\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"MFN\" x=\"-176.53\" y=\"-106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"GND56\" gate=\"1\" x=\"-152.4\" y=\"-96.52\" rot=\"R180\"/>\n<instance part=\"K3\" gate=\"G$1\" x=\"-162.56\" y=\"-104.14\" rot=\"R180\"/>\n<instance part=\"C_AC4\" gate=\"G$1\" x=\"-146.05\" y=\"-106.68\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-142.24\" y=\"-107.95\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"MFN\" x=\"-146.05\" y=\"-106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"GND57\" gate=\"1\" x=\"-121.92\" y=\"-96.52\" rot=\"R180\"/>\n<instance part=\"K4\" gate=\"G$1\" x=\"-132.08\" y=\"-104.14\" rot=\"R180\"/>\n<instance part=\"ACR1\" gate=\"G$1\" x=\"-218.44\" y=\"-111.76\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-218.44\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-218.44\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-218.44\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"ACR2\" gate=\"G$1\" x=\"-185.42\" y=\"-111.76\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-185.42\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-185.42\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-185.42\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"ACR3\" gate=\"G$1\" x=\"-152.4\" y=\"-111.76\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-152.4\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-152.4\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-152.4\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"ACR4\" gate=\"G$1\" x=\"-121.92\" y=\"-111.76\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-121.92\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-121.92\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-121.92\" y=\"-111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND71\" gate=\"1\" x=\"-60.96\" y=\"129.54\" rot=\"R180\"/>\n<instance part=\"RLED5\" gate=\"G$1\" x=\"-86.36\" y=\"121.92\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-86.36\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-86.36\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-86.36\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"LED5\" gate=\"G$1\" x=\"-86.36\" y=\"111.76\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-86.36\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-86.36\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-86.36\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-89.916\" y=\"116.332\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</instance>\n<instance part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" x=\"-289.56\" y=\"83.82\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"-289.56\" y=\"83.82\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-300.99\" y=\"94.615\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"-295.91\" y=\"68.58\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"PIN_ANALOG_IOEXP\" gate=\"A\" x=\"-492.76\" y=\"15.24\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"-492.76\" y=\"15.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-504.19\" y=\"26.035\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"-499.11\" y=\"0\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN1_10K\" gate=\"G$1\" x=\"-233.68\" y=\"-139.7\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-233.68\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-233.68\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-233.68\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"RIN2_10K\" gate=\"G$1\" x=\"-200.66\" y=\"-139.7\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-200.66\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-200.66\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-200.66\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"RIN3_10K\" gate=\"G$1\" x=\"-170.18\" y=\"-139.7\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-170.18\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-170.18\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-170.18\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"RIN4_10K\" gate=\"G$1\" x=\"-137.16\" y=\"-139.7\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-137.16\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-137.16\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-137.16\" y=\"-139.7\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"RLED6\" gate=\"G$1\" x=\"-93.98\" y=\"121.92\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-93.98\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-93.98\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-93.98\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"LED6\" gate=\"G$1\" x=\"-93.98\" y=\"111.76\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-93.98\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-93.98\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-93.98\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-97.536\" y=\"116.332\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</instance>\n<instance part=\"RLED7\" gate=\"G$1\" x=\"-101.6\" y=\"121.92\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-101.6\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-101.6\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-101.6\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"LED7\" gate=\"G$1\" x=\"-101.6\" y=\"111.76\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-101.6\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-101.6\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-101.6\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-105.156\" y=\"116.332\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</instance>\n<instance part=\"RLED8\" gate=\"G$1\" x=\"-109.22\" y=\"121.92\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-109.22\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-109.22\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-109.22\" y=\"121.92\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"LED8\" gate=\"G$1\" x=\"-109.22\" y=\"111.76\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"OC_NEWARK\" x=\"-109.22\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-109.22\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-109.22\" y=\"111.76\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-112.776\" y=\"116.332\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</instance>\n<instance part=\"CIN1NF_1\" gate=\"G$1\" x=\"-227.33\" y=\"-142.24\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-231.14\" y=\"-140.97\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MPN\" x=\"-227.33\" y=\"-142.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CIN1NF_2\" gate=\"G$1\" x=\"-194.31\" y=\"-142.24\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-198.12\" y=\"-140.97\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MPN\" x=\"-194.31\" y=\"-142.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CIN1NF_3\" gate=\"G$1\" x=\"-163.83\" y=\"-142.24\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-167.64\" y=\"-140.97\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MPN\" x=\"-163.83\" y=\"-142.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CIN1NF_4\" gate=\"G$1\" x=\"-130.81\" y=\"-142.24\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-134.62\" y=\"-140.97\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MPN\" x=\"-130.81\" y=\"-142.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"P+5\" gate=\"1\" x=\"-601.98\" y=\"-96.52\"/>\n<instance part=\"CP3\" gate=\"G$1\" x=\"-576.58\" y=\"-109.22\">\n<attribute name=\"MPN\" x=\"-576.58\" y=\"-109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CP4\" gate=\"G$1\" x=\"-538.48\" y=\"-109.22\">\n<attribute name=\"MPN\" x=\"-528.32\" y=\"-109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND75\" gate=\"1\" x=\"-558.8\" y=\"-116.84\"/>\n<instance part=\"REG1\" gate=\"G$1\" x=\"-558.8\" y=\"-99.06\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"-574.04\" y=\"-104.14\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"-566.42\" y=\"-95.25\" size=\"1.27\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"-558.8\" y=\"-95.25\" size=\"1.27\" layer=\"96\"/>\n</instance>\n<instance part=\"CP7\" gate=\"G$1\" x=\"-584.2\" y=\"-109.22\">\n<attribute name=\"MPN\" x=\"-584.2\" y=\"-109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CP8\" gate=\"G$1\" x=\"-594.36\" y=\"-109.22\">\n<attribute name=\"MPN\" x=\"-594.36\" y=\"-109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"L1\" gate=\"G$1\" x=\"-584.2\" y=\"-66.04\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-584.2\" y=\"-66.04\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CP9\" gate=\"G$1\" x=\"-528.32\" y=\"-109.22\">\n<attribute name=\"MPN\" x=\"-528.32\" y=\"-109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"ROFFSET1\" gate=\"G$1\" x=\"-515.62\" y=\"-149.86\" rot=\"R180\"/>\n<instance part=\"ROFFSET2\" gate=\"G$1\" x=\"-515.62\" y=\"-147.32\" rot=\"R180\"/>\n<instance part=\"ROFFSET3\" gate=\"G$1\" x=\"-515.62\" y=\"-144.78\" rot=\"R180\"/>\n<instance part=\"ROFFSET4\" gate=\"G$1\" x=\"-515.62\" y=\"-142.24\" rot=\"R180\"/>\n<instance part=\"U$1\" gate=\"G$1\" x=\"-538.48\" y=\"-91.44\"/>\n<instance part=\"U$2\" gate=\"G$1\" x=\"-279.4\" y=\"-198.12\"/>\n<instance part=\"U$3\" gate=\"G$1\" x=\"-208.28\" y=\"-243.84\"/>\n<instance part=\"U$4\" gate=\"G$1\" x=\"-116.84\" y=\"-243.84\"/>\n<instance part=\"U$5\" gate=\"G$1\" x=\"-20.32\" y=\"-208.28\"/>\n<instance part=\"U$6\" gate=\"G$1\" x=\"-109.22\" y=\"-195.58\"/>\n<instance part=\"U$7\" gate=\"G$1\" x=\"-190.5\" y=\"-195.58\"/>\n<instance part=\"U$8\" gate=\"G$1\" x=\"-571.5\" y=\"-129.54\"/>\n<instance part=\"U$9\" gate=\"G$1\" x=\"-10.16\" y=\"45.72\"/>\n<instance part=\"U$10\" gate=\"G$1\" x=\"-10.16\" y=\"20.32\"/>\n<instance part=\"U$11\" gate=\"G$1\" x=\"-147.32\" y=\"45.72\"/>\n<instance part=\"U$12\" gate=\"G$1\" x=\"-147.32\" y=\"20.32\"/>\n<instance part=\"U$13\" gate=\"G$1\" x=\"-96.52\" y=\"71.12\"/>\n<instance part=\"U$15\" gate=\"G$1\" x=\"-96.52\" y=\"48.26\"/>\n<instance part=\"L2\" gate=\"G$1\" x=\"-584.2\" y=\"-99.06\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-584.2\" y=\"-99.06\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"C_5V_10NF1\" gate=\"G$1\" x=\"-591.82\" y=\"-93.98\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-588.01\" y=\"-100.33\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"MFN\" x=\"-591.82\" y=\"-93.98\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND76\" gate=\"1\" x=\"-604.52\" y=\"-91.44\" rot=\"R270\"/>\n<instance part=\"CP10\" gate=\"G$1\" x=\"-596.9\" y=\"-93.98\">\n<attribute name=\"MPN\" x=\"-596.9\" y=\"-93.98\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CP11\" gate=\"G$1\" x=\"-596.9\" y=\"-60.96\">\n<attribute name=\"MPN\" x=\"-596.9\" y=\"-60.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"P+6\" gate=\"1\" x=\"-480.06\" y=\"73.66\" rot=\"R90\"/>\n<instance part=\"COFFSETA6\" gate=\"G$1\" x=\"-254\" y=\"-215.9\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-254\" y=\"-215.9\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"COFFSETA1\" gate=\"G$1\" x=\"-182.88\" y=\"-218.44\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-182.88\" y=\"-218.44\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"COFFSETA2\" gate=\"G$1\" x=\"-170.18\" y=\"-215.9\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-170.18\" y=\"-215.9\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"COFFSETA3\" gate=\"G$1\" x=\"-96.52\" y=\"-218.44\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"-96.52\" y=\"-218.44\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"RIN5\" gate=\"G$1\" x=\"-233.68\" y=\"-111.76\">\n<attribute name=\"OC_NEWARK\" x=\"-233.68\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-233.68\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-233.68\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n</instance>\n<instance part=\"RIN6\" gate=\"G$1\" x=\"-200.66\" y=\"-111.76\">\n<attribute name=\"OC_NEWARK\" x=\"-200.66\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-200.66\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-200.66\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n</instance>\n<instance part=\"RIN7\" gate=\"G$1\" x=\"-167.64\" y=\"-111.76\">\n<attribute name=\"OC_NEWARK\" x=\"-167.64\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-167.64\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-167.64\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n</instance>\n<instance part=\"RIN8\" gate=\"G$1\" x=\"-137.16\" y=\"-111.76\">\n<attribute name=\"OC_NEWARK\" x=\"-137.16\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-137.16\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-137.16\" y=\"-111.76\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n</instance>\n<instance part=\"GND77\" gate=\"1\" x=\"-226.06\" y=\"-111.76\" rot=\"R90\"/>\n<instance part=\"GND78\" gate=\"1\" x=\"-193.04\" y=\"-111.76\" rot=\"R90\"/>\n<instance part=\"GND79\" gate=\"1\" x=\"-160.02\" y=\"-111.76\" rot=\"R90\"/>\n<instance part=\"GND80\" gate=\"1\" x=\"-129.54\" y=\"-111.76\" rot=\"R90\"/>\n<instance part=\"CH1\" gate=\"G$1\" x=\"-317.5\" y=\"-218.44\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-317.5\" y=\"-218.44\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"SW_SUPER1\" gate=\"G$1\" x=\"-231.14\" y=\"-127\" rot=\"R270\"/>\n<instance part=\"SW_SUPER2\" gate=\"G$1\" x=\"-198.12\" y=\"-127\" rot=\"R270\"/>\n<instance part=\"SW_SUPER3\" gate=\"G$1\" x=\"-167.64\" y=\"-127\" rot=\"R270\"/>\n<instance part=\"SW_SUPER4\" gate=\"G$1\" x=\"-134.62\" y=\"-127\" rot=\"R270\"/>\n<instance part=\"CL1\" gate=\"G$1\" x=\"-317.5\" y=\"-189.23\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-317.5\" y=\"-189.23\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CL2\" gate=\"G$1\" x=\"-246.38\" y=\"-237.49\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-246.38\" y=\"-237.49\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CL3\" gate=\"G$1\" x=\"-154.94\" y=\"-237.49\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-154.94\" y=\"-237.49\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CL4\" gate=\"G$1\" x=\"-58.42\" y=\"-201.93\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-58.42\" y=\"-201.93\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CH2\" gate=\"G$1\" x=\"-246.38\" y=\"-264.16\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-246.38\" y=\"-264.16\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CH3\" gate=\"G$1\" x=\"-154.94\" y=\"-264.16\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-154.94\" y=\"-264.16\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CH4\" gate=\"G$1\" x=\"-58.42\" y=\"-228.6\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"-58.42\" y=\"-228.6\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n</instance>\n<instance part=\"CIN5_1\" gate=\"G$1\" x=\"-242.57\" y=\"-121.92\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-238.76\" y=\"-123.19\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"MPN\" x=\"-242.57\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"CIN5_2\" gate=\"G$1\" x=\"-209.55\" y=\"-121.92\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-205.74\" y=\"-123.19\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"MPN\" x=\"-209.55\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"CIN5_3\" gate=\"G$1\" x=\"-176.53\" y=\"-121.92\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-172.72\" y=\"-123.19\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"MPN\" x=\"-176.53\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"CIN5_4\" gate=\"G$1\" x=\"-146.05\" y=\"-121.92\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"-142.24\" y=\"-123.19\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R180\"/>\n<attribute name=\"MPN\" x=\"-146.05\" y=\"-121.92\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"RLEDPOW\" gate=\"G$1\" x=\"-530.86\" y=\"-71.12\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"-530.86\" y=\"-71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-530.86\" y=\"-71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-530.86\" y=\"-71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"LEDPOW\" gate=\"G$1\" x=\"-535.94\" y=\"-66.04\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"-535.94\" y=\"-66.04\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"-535.94\" y=\"-66.04\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"-535.94\" y=\"-66.04\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-531.368\" y=\"-62.484\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</instance>\n<instance part=\"CIN56_1\" gate=\"G$1\" x=\"-222.25\" y=\"-142.24\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-226.06\" y=\"-140.97\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MPN\" x=\"-222.25\" y=\"-142.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CIN56_2\" gate=\"G$1\" x=\"-189.23\" y=\"-142.24\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-193.04\" y=\"-140.97\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MPN\" x=\"-189.23\" y=\"-142.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CIN56_3\" gate=\"G$1\" x=\"-158.75\" y=\"-142.24\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-162.56\" y=\"-140.97\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MPN\" x=\"-158.75\" y=\"-142.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"CIN56_4\" gate=\"G$1\" x=\"-125.73\" y=\"-142.24\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"-129.54\" y=\"-140.97\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"MPN\" x=\"-125.73\" y=\"-142.24\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GOLD_ORB_SM1\" gate=\"G$1\" x=\"-556.26\" y=\"-198.12\"/>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"+5V\" class=\"3\">\n<segment>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"P+1\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"-431.8\" y1=\"-93.98\" x2=\"-447.04\" y2=\"-93.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-447.04\" y=\"-93.98\"/>\n</segment>\n<segment>\n<pinref part=\"P+2\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"-276.86\" y1=\"78.74\" x2=\"-284.48\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-284.48\" y1=\"78.74\" x2=\"-284.48\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"10\"/>\n<junction x=\"-284.48\" y=\"81.28\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"12\"/>\n<junction x=\"-284.48\" y=\"78.74\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"P+7\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"-477.52\" y1=\"96.52\" x2=\"-474.98\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"L2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"P+5\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"-601.98\" y1=\"-99.06\" x2=\"-596.9\" y2=\"-99.06\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP10\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-596.9\" y1=\"-99.06\" x2=\"-591.82\" y2=\"-99.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-596.9\" y=\"-99.06\"/>\n<pinref part=\"C_5V_10NF1\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-591.82\" y=\"-99.06\"/>\n</segment>\n<segment>\n<pinref part=\"L1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"P+3\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"-601.98\" y1=\"-66.04\" x2=\"-596.9\" y2=\"-66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP11\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-596.9\" y1=\"-66.04\" x2=\"-591.82\" y2=\"-66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-596.9\" y=\"-66.04\"/>\n<pinref part=\"C_5V_10NF\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-591.82\" y=\"-66.04\"/>\n</segment>\n<segment>\n<pinref part=\"SW_5V\" gate=\"G$1\" pin=\"C\"/>\n<pinref part=\"P+4\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"-337.82\" y1=\"-127\" x2=\"-337.82\" y2=\"-121.92\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-477.52\" y1=\"73.66\" x2=\"-474.98\" y2=\"81.534\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"P+6\" gate=\"1\" pin=\"+5V\"/>\n</segment>\n</net>\n<net name=\"GND\" class=\"1\">\n<segment>\n<pinref part=\"GND14\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"CP5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-558.8\" y1=\"-81.28\" x2=\"-576.58\" y2=\"-81.28\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-558.8\" y=\"-81.28\"/>\n<pinref part=\"CP6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-558.8\" y1=\"-81.28\" x2=\"-538.48\" y2=\"-81.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"REG\" gate=\"G$1\" pin=\"GND\"/>\n<wire x1=\"-558.8\" y1=\"-73.66\" x2=\"-558.8\" y2=\"-81.28\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-558.8\" y=\"-73.66\"/>\n<pinref part=\"CP2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CP1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-594.36\" y1=\"-81.28\" x2=\"-584.2\" y2=\"-81.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-584.2\" y1=\"-81.28\" x2=\"-576.58\" y2=\"-81.28\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-584.2\" y=\"-81.28\"/>\n<junction x=\"-576.58\" y=\"-81.28\"/>\n<pinref part=\"RLEDPOW\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-538.48\" y1=\"-81.28\" x2=\"-530.86\" y2=\"-81.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-530.86\" y1=\"-81.28\" x2=\"-530.86\" y2=\"-76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-538.48\" y=\"-81.28\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"REFGND\"/>\n<wire x1=\"-459.74\" y1=\"27.94\" x2=\"-474.98\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"27.94\" x2=\"-474.98\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND15\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-474.98\" y1=\"30.48\" x2=\"-474.98\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"33.02\" x2=\"-474.98\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"35.56\" x2=\"-474.98\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"38.1\" x2=\"-474.98\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"40.64\" x2=\"-474.98\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"43.18\" x2=\"-474.98\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"45.72\" x2=\"-482.6\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND1\"/>\n<wire x1=\"-459.74\" y1=\"60.96\" x2=\"-474.98\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"60.96\" x2=\"-474.98\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"45.72\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND2\"/>\n<wire x1=\"-474.98\" y1=\"58.42\" x2=\"-474.98\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"55.88\" x2=\"-474.98\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"53.34\" x2=\"-474.98\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"50.8\" x2=\"-474.98\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-474.98\" y1=\"48.26\" x2=\"-474.98\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-459.74\" y1=\"58.42\" x2=\"-474.98\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"58.42\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND3\"/>\n<wire x1=\"-459.74\" y1=\"55.88\" x2=\"-474.98\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"55.88\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND4\"/>\n<wire x1=\"-459.74\" y1=\"53.34\" x2=\"-474.98\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"53.34\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND5\"/>\n<wire x1=\"-459.74\" y1=\"50.8\" x2=\"-474.98\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"50.8\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND6\"/>\n<wire x1=\"-459.74\" y1=\"48.26\" x2=\"-474.98\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"48.26\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND7\"/>\n<wire x1=\"-459.74\" y1=\"45.72\" x2=\"-474.98\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND8\"/>\n<wire x1=\"-459.74\" y1=\"43.18\" x2=\"-474.98\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"43.18\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND9\"/>\n<wire x1=\"-459.74\" y1=\"40.64\" x2=\"-474.98\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"40.64\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND10\"/>\n<wire x1=\"-459.74\" y1=\"38.1\" x2=\"-474.98\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"38.1\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND11\"/>\n<wire x1=\"-459.74\" y1=\"35.56\" x2=\"-474.98\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"35.56\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND12\"/>\n<wire x1=\"-459.74\" y1=\"33.02\" x2=\"-474.98\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"33.02\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND_PAD\"/>\n<wire x1=\"-459.74\" y1=\"30.48\" x2=\"-474.98\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-474.98\" y=\"30.48\"/>\n</segment>\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND16\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-553.72\" y1=\"-30.48\" x2=\"-561.34\" y2=\"-30.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_OSC\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-561.34\" y1=\"-27.94\" x2=\"-561.34\" y2=\"-30.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-561.34\" y=\"-30.48\"/>\n</segment>\n<segment>\n<pinref part=\"CV11\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CV12\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-281.94\" y1=\"50.8\" x2=\"-287.02\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND22\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-287.02\" y1=\"50.8\" x2=\"-294.64\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-287.02\" y1=\"48.26\" x2=\"-287.02\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-287.02\" y=\"50.8\"/>\n</segment>\n<segment>\n<pinref part=\"CG13\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CG14\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-332.74\" y1=\"88.9\" x2=\"-337.82\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND21\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-337.82\" y1=\"88.9\" x2=\"-345.44\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-337.82\" y1=\"86.36\" x2=\"-337.82\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-337.82\" y=\"88.9\"/>\n<pinref part=\"CG15\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-332.74\" y1=\"88.9\" x2=\"-322.58\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-332.74\" y=\"88.9\"/>\n</segment>\n<segment>\n<pinref part=\"GND23\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-544.83\" y1=\"30.48\" x2=\"-538.48\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-538.48\" y1=\"30.48\" x2=\"-538.48\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-544.83\" y1=\"40.64\" x2=\"-538.48\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-538.48\" y1=\"40.64\" x2=\"-538.48\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-538.48\" y=\"30.48\"/>\n<pinref part=\"RJ2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-571.5\" y1=\"15.24\" x2=\"-571.5\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-571.5\" y1=\"12.7\" x2=\"-538.48\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-538.48\" y=\"12.7\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"10\"/>\n</segment>\n<segment>\n<pinref part=\"RS6\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND24\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND25\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-429.26\" y1=\"86.36\" x2=\"-429.26\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_RESET\" gate=\"G$1\" pin=\"P$2\"/>\n<junction x=\"-429.26\" y=\"88.9\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"ADC_VREF\"/>\n<pinref part=\"GND26\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-434.34\" y1=\"-53.34\" x2=\"-434.34\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"CREF1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND5\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND27\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND29\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND31\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND19\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"GND\"/>\n<pinref part=\"GND4\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-254\" y1=\"-25.4\" x2=\"-241.3\" y2=\"-25.4\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CLK-\"/>\n<pinref part=\"GND32\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-200.66\" y1=\"12.7\" x2=\"-190.5\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C0DD2_A\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND33\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"CREF2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND3\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"GND\"/>\n<pinref part=\"GND2\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-116.84\" y1=\"-25.4\" x2=\"-104.14\" y2=\"-25.4\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CLK-\"/>\n<pinref part=\"GND10\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-63.5\" y1=\"12.7\" x2=\"-53.34\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C0DD2_B\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND11\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"8\"/>\n<pinref part=\"GND13\" gate=\"1\" pin=\"GND\"/>\n<junction x=\"-304.8\" y=\"-106.68\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND8\" gate=\"1\" pin=\"GND\"/>\n<junction x=\"-447.04\" y=\"-106.68\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND12\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND1\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND6\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND37\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND28\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND30\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SPEN\"/>\n<pinref part=\"GND38\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SPEN\"/>\n<pinref part=\"GND36\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"U1\" gate=\"A\" pin=\"V-\"/>\n<pinref part=\"GND40\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"U2\" gate=\"A\" pin=\"V-\"/>\n<pinref part=\"GND41\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW1\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND46\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW2\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND47\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW3\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND48\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW4\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND49\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_A\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND50\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"C0DD1_A\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND51\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"CADD2_A\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND52\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_B\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND53\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"CADD2_B\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND54\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"CODD1_B\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND55\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"R10M_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND9\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"R50-4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"R50-3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-228.6\" y1=\"-63.5\" x2=\"-231.14\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-231.14\" y1=\"-63.5\" x2=\"-233.68\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-231.14\" y=\"-63.5\"/>\n<pinref part=\"R50-1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-233.68\" y1=\"-63.5\" x2=\"-236.22\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-233.68\" y=\"-63.5\"/>\n<wire x1=\"-228.6\" y1=\"-63.5\" x2=\"-223.52\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-228.6\" y=\"-63.5\"/>\n<junction x=\"-223.52\" y=\"-63.5\"/>\n</segment>\n<segment>\n<pinref part=\"R10M_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND17\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"R50-5\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"R50-6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-195.58\" y1=\"-63.5\" x2=\"-198.12\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-198.12\" y1=\"-63.5\" x2=\"-200.66\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-198.12\" y=\"-63.5\"/>\n<pinref part=\"R50-8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-200.66\" y1=\"-63.5\" x2=\"-203.2\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-200.66\" y=\"-63.5\"/>\n<wire x1=\"-195.58\" y1=\"-63.5\" x2=\"-190.5\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-195.58\" y=\"-63.5\"/>\n<junction x=\"-190.5\" y=\"-63.5\"/>\n</segment>\n<segment>\n<pinref part=\"R10M_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND18\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"R50-9\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"R50-10\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-162.56\" y1=\"-63.5\" x2=\"-165.1\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-11\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-165.1\" y1=\"-63.5\" x2=\"-167.64\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-165.1\" y=\"-63.5\"/>\n<pinref part=\"R50-12\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-167.64\" y1=\"-63.5\" x2=\"-170.18\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-167.64\" y=\"-63.5\"/>\n<wire x1=\"-162.56\" y1=\"-63.5\" x2=\"-157.48\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-162.56\" y=\"-63.5\"/>\n<junction x=\"-157.48\" y=\"-63.5\"/>\n</segment>\n<segment>\n<pinref part=\"R10M_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND20\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"R50-13\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"R50-14\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-132.08\" y1=\"-63.5\" x2=\"-134.62\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-15\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-134.62\" y1=\"-63.5\" x2=\"-137.16\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-134.62\" y=\"-63.5\"/>\n<pinref part=\"R50-16\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-137.16\" y1=\"-63.5\" x2=\"-139.7\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-137.16\" y=\"-63.5\"/>\n<wire x1=\"-132.08\" y1=\"-63.5\" x2=\"-127\" y2=\"-63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-132.08\" y=\"-63.5\"/>\n<junction x=\"-127\" y=\"-63.5\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND60\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND61\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND58\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"COFFSETB6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-261.62\" y1=\"-218.44\" x2=\"-254\" y2=\"-218.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA6\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-254\" y=\"-218.44\"/>\n</segment>\n<segment>\n<pinref part=\"GND59\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"COFFSETB8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-190.5\" y1=\"-220.98\" x2=\"-182.88\" y2=\"-220.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA1\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-182.88\" y=\"-220.98\"/>\n</segment>\n<segment>\n<pinref part=\"GND62\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"COFFSETB10\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-177.8\" y1=\"-218.44\" x2=\"-170.18\" y2=\"-218.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA2\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-170.18\" y=\"-218.44\"/>\n</segment>\n<segment>\n<pinref part=\"GND63\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"COFFSETB12\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-104.14\" y1=\"-220.98\" x2=\"-96.52\" y2=\"-220.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA3\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-96.52\" y=\"-220.98\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"A2\"/>\n<wire x1=\"-170.18\" y1=\"81.28\" x2=\"-170.18\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"A1\"/>\n<wire x1=\"-170.18\" y1=\"86.36\" x2=\"-170.18\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-170.18\" y=\"86.36\"/>\n<junction x=\"-170.18\" y=\"81.28\"/>\n<junction x=\"-170.18\" y=\"88.9\"/>\n<pinref part=\"GND65\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A2\"/>\n<wire x1=\"-236.22\" y1=\"81.28\" x2=\"-236.22\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A1\"/>\n<wire x1=\"-236.22\" y1=\"86.36\" x2=\"-236.22\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-236.22\" y=\"86.36\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A0\"/>\n<wire x1=\"-236.22\" y1=\"88.9\" x2=\"-236.22\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-236.22\" y=\"88.9\"/>\n<junction x=\"-236.22\" y=\"91.44\"/>\n<pinref part=\"GND64\" gate=\"1\" pin=\"GND\"/>\n<junction x=\"-236.22\" y=\"81.28\"/>\n</segment>\n<segment>\n<pinref part=\"C_OSC1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND66\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-447.04\" y1=\"-177.8\" x2=\"-447.04\" y2=\"-185.42\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_OSC2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-447.04\" y1=\"-185.42\" x2=\"-439.42\" y2=\"-185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-439.42\" y1=\"-185.42\" x2=\"-439.42\" y2=\"-177.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-447.04\" y=\"-185.42\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND67\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"GND39\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"!LDAC\"/>\n<pinref part=\"GND43\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"COFFSET\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND44\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND42\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-480.06\" y1=\"81.534\" x2=\"-477.52\" y2=\"81.534\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"GND\"/>\n<wire x1=\"-358.14\" y1=\"-116.84\" x2=\"-360.68\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND69\" gate=\"1\" pin=\"GND\"/>\n<junction x=\"-358.14\" y=\"-116.84\"/>\n<wire x1=\"-358.14\" y1=\"-116.84\" x2=\"-363.22\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND68\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-480.06\" y1=\"104.14\" x2=\"-477.52\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"K\"/>\n<pinref part=\"GND34\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-218.44\" y1=\"-99.06\" x2=\"-218.44\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"K\"/>\n<pinref part=\"GND35\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-185.42\" y1=\"-99.06\" x2=\"-185.42\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"K\"/>\n<pinref part=\"GND56\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-152.4\" y1=\"-99.06\" x2=\"-152.4\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"K\"/>\n<pinref part=\"GND57\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-121.92\" y1=\"-99.06\" x2=\"-121.92\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"RLED1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RLED2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-45.72\" y1=\"127\" x2=\"-55.88\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RLED3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-55.88\" y1=\"127\" x2=\"-60.96\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-55.88\" y=\"127\"/>\n<pinref part=\"RLED4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-60.96\" y1=\"127\" x2=\"-66.04\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-66.04\" y1=\"127\" x2=\"-76.2\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-66.04\" y=\"127\"/>\n<junction x=\"-76.2\" y=\"127\"/>\n<junction x=\"-45.72\" y=\"127\"/>\n<pinref part=\"GND71\" gate=\"1\" pin=\"GND\"/>\n<junction x=\"-60.96\" y=\"127\"/>\n<pinref part=\"RLED5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-86.36\" y1=\"127\" x2=\"-76.2\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RLED6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-93.98\" y1=\"127\" x2=\"-86.36\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RLED7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-86.36\" y1=\"127\" x2=\"-83.82\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-101.6\" y1=\"127\" x2=\"-93.98\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RLED8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-93.98\" y1=\"127\" x2=\"-91.44\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-109.22\" y1=\"127\" x2=\"-101.6\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-109.22\" y=\"127\"/>\n<junction x=\"-101.6\" y=\"127\"/>\n<wire x1=\"-101.6\" y1=\"127\" x2=\"-99.06\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-93.98\" y=\"127\"/>\n<junction x=\"-86.36\" y=\"127\"/>\n</segment>\n<segment>\n<pinref part=\"GND75\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"CP3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-558.8\" y1=\"-114.3\" x2=\"-576.58\" y2=\"-114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-558.8\" y=\"-114.3\"/>\n<pinref part=\"CP4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-558.8\" y1=\"-114.3\" x2=\"-538.48\" y2=\"-114.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"GND\"/>\n<wire x1=\"-558.8\" y1=\"-106.68\" x2=\"-558.8\" y2=\"-114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-558.8\" y=\"-106.68\"/>\n<pinref part=\"CP8\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CP7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-594.36\" y1=\"-114.3\" x2=\"-584.2\" y2=\"-114.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-584.2\" y1=\"-114.3\" x2=\"-576.58\" y2=\"-114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-584.2\" y=\"-114.3\"/>\n<junction x=\"-576.58\" y=\"-114.3\"/>\n<pinref part=\"CP9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-538.48\" y1=\"-114.3\" x2=\"-528.32\" y2=\"-114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-538.48\" y=\"-114.3\"/>\n</segment>\n<segment>\n<pinref part=\"C_5V_10NF1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND76\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-601.98\" y1=\"-91.44\" x2=\"-596.9\" y2=\"-91.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP10\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-596.9\" y1=\"-91.44\" x2=\"-591.82\" y2=\"-91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-596.9\" y=\"-91.44\"/>\n<junction x=\"-591.82\" y=\"-91.44\"/>\n</segment>\n<segment>\n<pinref part=\"C_5V_10NF\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND45\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"-601.98\" y1=\"-58.42\" x2=\"-596.9\" y2=\"-58.42\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP11\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-596.9\" y1=\"-58.42\" x2=\"-591.82\" y2=\"-58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-596.9\" y=\"-58.42\"/>\n<junction x=\"-591.82\" y=\"-58.42\"/>\n</segment>\n<segment>\n<pinref part=\"RIN5\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND77\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"RIN6\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND78\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"RIN7\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND79\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"RIN8\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND80\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"6\"/>\n<wire x1=\"-276.86\" y1=\"86.36\" x2=\"-284.48\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-284.48\" y=\"83.82\"/>\n<pinref part=\"GND7\" gate=\"1\" pin=\"GND\"/>\n<junction x=\"-276.86\" y=\"86.36\"/>\n<wire x1=\"-276.86\" y1=\"86.36\" x2=\"-284.48\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-284.48\" y1=\"86.36\" x2=\"-288.036\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-288.036\" y1=\"86.36\" x2=\"-288.036\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-284.48\" y=\"86.36\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"-288.036\" y1=\"91.44\" x2=\"-292.1\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-292.1\" y=\"91.44\"/>\n</segment>\n</net>\n<net name=\"+3V3\" class=\"2\">\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"+3V2\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-553.72\" y1=\"-20.32\" x2=\"-561.34\" y2=\"-20.32\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_OSC\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-561.34\" y=\"-20.32\"/>\n<wire x1=\"-561.34\" y1=\"-15.24\" x2=\"-561.34\" y2=\"-20.32\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"CV12\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CV11\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-294.64\" y1=\"58.42\" x2=\"-287.02\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V4\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-287.02\" y1=\"58.42\" x2=\"-281.94\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-287.02\" y1=\"60.96\" x2=\"-287.02\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-287.02\" y=\"58.42\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO1A\"/>\n<wire x1=\"-320.04\" y1=\"58.42\" x2=\"-314.96\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-294.64\" y=\"58.42\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO1B\"/>\n<wire x1=\"-314.96\" y1=\"58.42\" x2=\"-294.64\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-320.04\" y1=\"55.88\" x2=\"-314.96\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"55.88\" x2=\"-314.96\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"58.42\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO2\"/>\n<wire x1=\"-320.04\" y1=\"53.34\" x2=\"-314.96\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"53.34\" x2=\"-314.96\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"55.88\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO3\"/>\n<wire x1=\"-320.04\" y1=\"50.8\" x2=\"-314.96\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"50.8\" x2=\"-314.96\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"53.34\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO3@2\"/>\n<wire x1=\"-320.04\" y1=\"48.26\" x2=\"-314.96\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"48.26\" x2=\"-314.96\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"50.8\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO4\"/>\n<wire x1=\"-320.04\" y1=\"45.72\" x2=\"-314.96\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"45.72\" x2=\"-314.96\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"48.26\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO5\"/>\n<wire x1=\"-320.04\" y1=\"43.18\" x2=\"-314.96\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"43.18\" x2=\"-314.96\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"45.72\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO6\"/>\n<wire x1=\"-320.04\" y1=\"40.64\" x2=\"-314.96\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"40.64\" x2=\"-314.96\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"43.18\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO6@2\"/>\n<wire x1=\"-320.04\" y1=\"38.1\" x2=\"-314.96\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"38.1\" x2=\"-314.96\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"40.64\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO7\"/>\n<wire x1=\"-320.04\" y1=\"35.56\" x2=\"-314.96\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"35.56\" x2=\"-314.96\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"38.1\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO8\"/>\n<wire x1=\"-320.04\" y1=\"33.02\" x2=\"-314.96\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"33.02\" x2=\"-314.96\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"35.56\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO8@2\"/>\n<wire x1=\"-320.04\" y1=\"30.48\" x2=\"-314.96\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-314.96\" y1=\"30.48\" x2=\"-314.96\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"33.02\"/>\n<label x=\"-312.42\" y=\"40.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"CG15\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CG13\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-332.74\" y1=\"96.52\" x2=\"-322.58\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-332.74\" y=\"96.52\"/>\n<wire x1=\"-337.82\" y1=\"96.52\" x2=\"-332.74\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V5\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-337.82\" y1=\"99.06\" x2=\"-337.82\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-337.82\" y=\"96.52\"/>\n<pinref part=\"CG14\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-345.44\" y1=\"96.52\" x2=\"-337.82\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE6\"/>\n<wire x1=\"-365.76\" y1=\"68.58\" x2=\"-365.76\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-365.76\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE2\"/>\n<wire x1=\"-375.92\" y1=\"76.2\" x2=\"-373.38\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-373.38\" y1=\"76.2\" x2=\"-370.84\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-370.84\" y1=\"76.2\" x2=\"-368.3\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-368.3\" y1=\"76.2\" x2=\"-365.76\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-375.92\" y1=\"68.58\" x2=\"-375.92\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE3\"/>\n<wire x1=\"-373.38\" y1=\"68.58\" x2=\"-373.38\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-373.38\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE4\"/>\n<wire x1=\"-370.84\" y1=\"68.58\" x2=\"-370.84\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-370.84\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE5\"/>\n<wire x1=\"-368.3\" y1=\"68.58\" x2=\"-368.3\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-368.3\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE7\"/>\n<wire x1=\"-363.22\" y1=\"68.58\" x2=\"-363.22\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-363.22\" y1=\"76.2\" x2=\"-365.76\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE10\"/>\n<wire x1=\"-360.68\" y1=\"68.58\" x2=\"-360.68\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-360.68\" y1=\"76.2\" x2=\"-363.22\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-363.22\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE11\"/>\n<wire x1=\"-358.14\" y1=\"68.58\" x2=\"-358.14\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-358.14\" y1=\"76.2\" x2=\"-360.68\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-360.68\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE12\"/>\n<wire x1=\"-355.6\" y1=\"68.58\" x2=\"-355.6\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-355.6\" y1=\"76.2\" x2=\"-358.14\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-358.14\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA1\"/>\n<wire x1=\"-350.52\" y1=\"68.58\" x2=\"-350.52\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-350.52\" y1=\"76.2\" x2=\"-355.6\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-355.6\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA2\"/>\n<wire x1=\"-347.98\" y1=\"68.58\" x2=\"-347.98\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-347.98\" y1=\"76.2\" x2=\"-350.52\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-350.52\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA3\"/>\n<wire x1=\"-345.44\" y1=\"68.58\" x2=\"-345.44\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-345.44\" y1=\"76.2\" x2=\"-347.98\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-347.98\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA4\"/>\n<wire x1=\"-342.9\" y1=\"68.58\" x2=\"-342.9\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-342.9\" y1=\"76.2\" x2=\"-345.44\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-345.44\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA5\"/>\n<wire x1=\"-340.36\" y1=\"68.58\" x2=\"-340.36\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-340.36\" y1=\"76.2\" x2=\"-342.9\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-342.9\" y=\"76.2\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA6\"/>\n<wire x1=\"-337.82\" y1=\"68.58\" x2=\"-337.82\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-337.82\" y1=\"76.2\" x2=\"-340.36\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-340.36\" y=\"76.2\"/>\n<wire x1=\"-345.44\" y1=\"96.52\" x2=\"-350.52\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-350.52\" y1=\"96.52\" x2=\"-350.52\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-345.44\" y=\"96.52\"/>\n<label x=\"-363.22\" y=\"78.74\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE1\"/>\n<wire x1=\"-378.46\" y1=\"68.58\" x2=\"-378.46\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-378.46\" y1=\"76.2\" x2=\"-375.92\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-375.92\" y=\"76.2\"/>\n</segment>\n<segment>\n<pinref part=\"RJ4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"+3V6\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-589.28\" y1=\"66.04\" x2=\"-589.28\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RJ3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-589.28\" y1=\"71.12\" x2=\"-589.28\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-594.36\" y1=\"58.42\" x2=\"-594.36\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-594.36\" y1=\"71.12\" x2=\"-589.28\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-589.28\" y=\"71.12\"/>\n</segment>\n<segment>\n<pinref part=\"+3V7\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-535.94\" y1=\"68.58\" x2=\"-535.94\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-535.94\" y1=\"60.96\" x2=\"-535.94\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-535.94\" y1=\"38.1\" x2=\"-544.83\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RJ5\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-530.86\" y1=\"60.96\" x2=\"-535.94\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-535.94\" y=\"60.96\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"9\"/>\n</segment>\n<segment>\n<pinref part=\"RS7\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RS8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-439.42\" y1=\"96.52\" x2=\"-436.88\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V8\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-436.88\" y1=\"96.52\" x2=\"-436.88\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-436.88\" y=\"96.52\"/>\n<pinref part=\"RS9\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-421.64\" y1=\"96.52\" x2=\"-436.88\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"+3V15\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-276.86\" y1=\"73.66\" x2=\"-284.48\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-284.48\" y1=\"73.66\" x2=\"-284.48\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"14\"/>\n<junction x=\"-284.48\" y=\"76.2\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"16\"/>\n<junction x=\"-284.48\" y=\"73.66\"/>\n<wire x1=\"-284.48\" y1=\"73.66\" x2=\"-288.798\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-288.798\" y1=\"73.66\" x2=\"-288.798\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"-288.798\" y1=\"88.9\" x2=\"-292.1\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-292.1\" y=\"88.9\"/>\n</segment>\n<segment>\n<pinref part=\"CP6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-547.37\" y1=\"-66.04\" x2=\"-538.48\" y2=\"-66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-538.48\" y1=\"-66.04\" x2=\"-538.48\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V1\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-538.48\" y1=\"-58.42\" x2=\"-538.48\" y2=\"-66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-538.48\" y=\"-66.04\"/>\n<pinref part=\"REG\" gate=\"G$1\" pin=\"OUT\"/>\n<junction x=\"-547.37\" y=\"-66.04\"/>\n<pinref part=\"LEDPOW\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"OVDD2\"/>\n<pinref part=\"C0DD2_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-182.88\" y1=\"7.62\" x2=\"-200.66\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-196.342\" y=\"7.874\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"+3V16\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-182.88\" y1=\"20.32\" x2=\"-182.88\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-182.88\" y=\"7.62\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"OVDD2\"/>\n<pinref part=\"C0DD2_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-45.72\" y1=\"7.62\" x2=\"-63.5\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-59.182\" y=\"7.874\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"+3V17\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-45.72\" y1=\"20.32\" x2=\"-45.72\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-45.72\" y=\"7.62\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"OVDD1\"/>\n<wire x1=\"-200.66\" y1=\"10.16\" x2=\"-190.5\" y2=\"10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-188.722\" y=\"12.192\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n<segment>\n<pinref part=\"C0DD1_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-182.88\" y1=\"33.02\" x2=\"-200.66\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V18\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-182.88\" y1=\"45.72\" x2=\"-182.88\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-182.88\" y=\"33.02\"/>\n<label x=\"-190.5\" y=\"33.02\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"OVDD1\"/>\n<wire x1=\"-63.5\" y1=\"10.16\" x2=\"-53.34\" y2=\"10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-58.42\" y=\"10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"CODD1_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-45.72\" y1=\"33.02\" x2=\"-63.5\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V21\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-45.72\" y1=\"45.72\" x2=\"-45.72\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-45.72\" y=\"33.02\"/>\n<label x=\"-53.34\" y=\"33.02\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"!RESET\"/>\n<wire x1=\"-236.22\" y1=\"121.92\" x2=\"-236.22\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-236.22\" y=\"116.84\"/>\n<pinref part=\"+3V26\" gate=\"G$1\" pin=\"+3V3\"/>\n<junction x=\"-236.22\" y=\"121.92\"/>\n<pinref part=\"R_SCL\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-246.38\" y1=\"116.84\" x2=\"-236.22\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R_SDA\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-246.38\" y1=\"116.84\" x2=\"-254\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-246.38\" y=\"116.84\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"!RESET\"/>\n<wire x1=\"-170.18\" y1=\"116.84\" x2=\"-165.1\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-165.1\" y1=\"116.84\" x2=\"-165.1\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"A0\"/>\n<wire x1=\"-165.1\" y1=\"91.44\" x2=\"-170.18\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-170.18\" y=\"91.44\"/>\n<wire x1=\"-170.18\" y1=\"121.92\" x2=\"-170.18\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-170.18\" y=\"116.84\"/>\n<pinref part=\"+3V27\" gate=\"G$1\" pin=\"+3V3\"/>\n<junction x=\"-170.18\" y=\"121.92\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"V3\"/>\n<wire x1=\"-419.1\" y1=\"-149.86\" x2=\"-403.86\" y2=\"-149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-403.86\" y1=\"-149.86\" x2=\"-403.86\" y2=\"-142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"VCC\"/>\n<wire x1=\"-403.86\" y1=\"-142.24\" x2=\"-393.7\" y2=\"-142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V30\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"-386.08\" y1=\"-142.24\" x2=\"-393.7\" y2=\"-142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-393.7\" y=\"-142.24\"/>\n</segment>\n</net>\n<net name=\"TCK\" class=\"0\">\n<segment>\n<label x=\"-581.66\" y=\"40.64\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n<pinref part=\"RJ2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-562.61\" y1=\"40.64\" x2=\"-571.5\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-571.5\" y1=\"40.64\" x2=\"-574.04\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-571.5\" y1=\"40.64\" x2=\"-571.5\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-571.5\" y=\"40.64\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TCK\"/>\n<wire x1=\"-459.74\" y1=\"-5.08\" x2=\"-477.52\" y2=\"-5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"-5.08\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n</segment>\n</net>\n<net name=\"TDO\" class=\"0\">\n<segment>\n<label x=\"-586.74\" y=\"38.1\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-562.61\" y1=\"38.1\" x2=\"-581.66\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TDO\"/>\n<wire x1=\"-459.74\" y1=\"-10.16\" x2=\"-477.52\" y2=\"-10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"-10.16\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n</segment>\n</net>\n<net name=\"TMS\" class=\"0\">\n<segment>\n<label x=\"-604.52\" y=\"35.56\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n<pinref part=\"RJ3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-562.61\" y1=\"35.56\" x2=\"-594.36\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-594.36\" y1=\"35.56\" x2=\"-596.9\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-594.36\" y1=\"35.56\" x2=\"-594.36\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-594.36\" y=\"35.56\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TMS\"/>\n<wire x1=\"-459.74\" y1=\"0\" x2=\"-469.9\" y2=\"0\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"0\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n</segment>\n</net>\n<net name=\"TDI\" class=\"0\">\n<segment>\n<label x=\"-601.98\" y=\"30.48\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n<pinref part=\"RJ4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-562.61\" y1=\"30.48\" x2=\"-589.28\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-589.28\" y1=\"30.48\" x2=\"-594.36\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-589.28\" y1=\"30.48\" x2=\"-589.28\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-589.28\" y=\"30.48\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"5\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TDI\"/>\n<wire x1=\"-459.74\" y1=\"-7.62\" x2=\"-469.9\" y2=\"-7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"-7.62\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n</segment>\n</net>\n<net name=\"JTAGEN\" class=\"0\">\n<segment>\n<label x=\"-515.62\" y=\"33.02\" size=\"1.778\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"RJ5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-544.83\" y1=\"33.02\" x2=\"-530.86\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-530.86\" y1=\"33.02\" x2=\"-528.32\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-530.86\" y1=\"50.8\" x2=\"-530.86\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-530.86\" y=\"33.02\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"7\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"JTAGEN\"/>\n<wire x1=\"-459.74\" y1=\"2.54\" x2=\"-477.52\" y2=\"2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"2.54\" size=\"1.778\" layer=\"95\" xref=\"yes\"/>\n</segment>\n</net>\n<net name=\"CONFIG_SEL\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CONFIG_SEL\"/>\n<pinref part=\"RS6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-416.56\" y1=\"68.58\" x2=\"-416.56\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-416.56\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"CONF\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CONF_DONE\"/>\n<pinref part=\"RS7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-439.42\" y1=\"68.58\" x2=\"-439.42\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-439.42\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"STATUS\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"NSTATUS\"/>\n<pinref part=\"RS8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-436.88\" y1=\"68.58\" x2=\"-436.88\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-436.88\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"NCONF\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"NCONFIG\"/>\n<pinref part=\"RS9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-421.64\" y1=\"68.58\" x2=\"-421.64\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-421.64\" y1=\"83.82\" x2=\"-421.64\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-429.26\" y1=\"83.82\" x2=\"-421.64\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-421.64\" y=\"83.82\"/>\n<label x=\"-421.64\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"SW_RESET\" gate=\"G$1\" pin=\"P$4\"/>\n</segment>\n</net>\n<net name=\"LED1\" class=\"0\">\n<segment>\n<wire x1=\"-48.26\" y1=\"109.22\" x2=\"-45.72\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-43.18\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"LED1\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-48.26\" y1=\"109.22\" x2=\"-45.72\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPA0\"/>\n<wire x1=\"-144.78\" y1=\"121.92\" x2=\"-134.62\" y2=\"121.92\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"121.92\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_33\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CLK+\"/>\n<wire x1=\"-63.5\" y1=\"15.24\" x2=\"-55.88\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-55.88\" y=\"15.24\"/>\n<wire x1=\"-55.88\" y1=\"15.24\" x2=\"-55.88\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-53.34\" y=\"15.24\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"PLL_CLKOUTP\"/>\n<wire x1=\"-459.74\" y1=\"-38.1\" x2=\"-474.98\" y2=\"-38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"-38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D1A\"/>\n<wire x1=\"-104.14\" y1=\"17.78\" x2=\"-111.76\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_70\"/>\n<wire x1=\"-330.2\" y1=\"-66.04\" x2=\"-347.98\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-335.28\" y=\"-60.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D2A\"/>\n<wire x1=\"-104.14\" y1=\"15.24\" x2=\"-111.76\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_69\"/>\n<wire x1=\"-332.74\" y1=\"-66.04\" x2=\"-350.52\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-340.36\" y=\"-58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D3A\"/>\n<wire x1=\"-104.14\" y1=\"12.7\" x2=\"-111.76\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_66\"/>\n<wire x1=\"-335.28\" y1=\"-66.04\" x2=\"-353.06\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-340.36\" y=\"-63.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D4A\"/>\n<wire x1=\"-104.14\" y1=\"10.16\" x2=\"-111.76\" y2=\"10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_65\"/>\n<wire x1=\"-337.82\" y1=\"-66.04\" x2=\"-355.6\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-340.36\" y=\"-66.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D5A\"/>\n<wire x1=\"-104.14\" y1=\"7.62\" x2=\"-111.76\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"7.62\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_64\"/>\n<wire x1=\"-340.36\" y1=\"-66.04\" x2=\"-358.14\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-345.44\" y=\"-63.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D6A\"/>\n<wire x1=\"-104.14\" y1=\"5.08\" x2=\"-111.76\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"5.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_62\"/>\n<wire x1=\"-342.9\" y1=\"-66.04\" x2=\"-360.68\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-347.98\" y=\"-60.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D0A\"/>\n<wire x1=\"-104.14\" y1=\"20.32\" x2=\"-111.76\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_74\"/>\n<wire x1=\"-327.66\" y1=\"-58.42\" x2=\"-320.04\" y2=\"-43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-331.216\" y=\"-57.912\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D7A\"/>\n<wire x1=\"-104.14\" y1=\"2.54\" x2=\"-111.76\" y2=\"2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"2.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_60\"/>\n<wire x1=\"-368.3\" y1=\"-50.8\" x2=\"-345.44\" y2=\"-66.04\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-353.06\" y=\"-63.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D0B\"/>\n<wire x1=\"-104.14\" y1=\"-2.54\" x2=\"-111.76\" y2=\"-2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"-2.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_85\"/>\n<wire x1=\"-297.18\" y1=\"-22.86\" x2=\"-320.04\" y2=\"-20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-22.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D1B\"/>\n<wire x1=\"-104.14\" y1=\"-5.08\" x2=\"-111.76\" y2=\"-5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"-5.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_84\"/>\n<wire x1=\"-320.04\" y1=\"-22.86\" x2=\"-297.18\" y2=\"-25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-25.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D2B\"/>\n<wire x1=\"-104.14\" y1=\"-7.62\" x2=\"-111.76\" y2=\"-7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"-7.62\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_81\"/>\n<wire x1=\"-297.18\" y1=\"-27.94\" x2=\"-320.04\" y2=\"-25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-27.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D3B\"/>\n<wire x1=\"-104.14\" y1=\"-10.16\" x2=\"-111.76\" y2=\"-10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"-10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_79\"/>\n<wire x1=\"-297.18\" y1=\"-30.48\" x2=\"-320.04\" y2=\"-30.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-30.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D4B\"/>\n<wire x1=\"-104.14\" y1=\"-12.7\" x2=\"-111.76\" y2=\"-12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"-12.7\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_78\"/>\n<wire x1=\"-297.18\" y1=\"-33.02\" x2=\"-320.04\" y2=\"-33.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-33.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D5B\"/>\n<wire x1=\"-104.14\" y1=\"-15.24\" x2=\"-111.76\" y2=\"-15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"-15.24\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_77\"/>\n<wire x1=\"-297.18\" y1=\"-35.56\" x2=\"-320.04\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D6B\"/>\n<wire x1=\"-104.14\" y1=\"-17.78\" x2=\"-111.76\" y2=\"-17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"-17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_76\"/>\n<wire x1=\"-297.18\" y1=\"-38.1\" x2=\"-320.04\" y2=\"-38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D7B\"/>\n<wire x1=\"-104.14\" y1=\"-20.32\" x2=\"-111.76\" y2=\"-20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-109.22\" y=\"-20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_75\"/>\n<wire x1=\"-297.18\" y1=\"-40.64\" x2=\"-320.04\" y2=\"-40.64\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-40.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L135\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_135\"/>\n<wire x1=\"-434.34\" y1=\"68.58\" x2=\"-434.34\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-434.34\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<wire x1=\"-469.9\" y1=\"81.28\" x2=\"-469.9\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-469.9\" y=\"66.04\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"4\"/>\n<junction x=\"-469.9\" y=\"81.534\"/>\n<wire x1=\"-469.9\" y1=\"78.74\" x2=\"-469.9\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-469.9\" y1=\"81.534\" x2=\"-469.9\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L140\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_140\"/>\n<wire x1=\"-441.96\" y1=\"78.74\" x2=\"-441.96\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-441.96\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<wire x1=\"-472.44\" y1=\"81.28\" x2=\"-472.44\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-472.44\" y=\"66.04\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"3\"/>\n<junction x=\"-472.44\" y=\"81.534\"/>\n<wire x1=\"-472.44\" y1=\"78.74\" x2=\"-472.44\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-472.44\" y1=\"81.534\" x2=\"-472.44\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L21_SDA\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_21\"/>\n<wire x1=\"-459.74\" y1=\"-12.7\" x2=\"-474.98\" y2=\"-12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-469.9\" y=\"-12.7\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"SDA\"/>\n<pinref part=\"R_SDA\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-254\" y1=\"106.68\" x2=\"-254\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-254\" y1=\"96.52\" x2=\"-236.22\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-243.84\" y=\"96.52\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"SDA\"/>\n<wire x1=\"-170.18\" y1=\"96.52\" x2=\"-185.42\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-185.42\" y=\"96.52\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"SDA\"/>\n<wire x1=\"-558.8\" y1=\"-144.78\" x2=\"-574.04\" y2=\"-144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-571.5\" y=\"-142.24\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n</net>\n<net name=\"LED3\" class=\"0\">\n<segment>\n<wire x1=\"-68.58\" y1=\"109.22\" x2=\"-66.04\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-63.5\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"LED3\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-68.58\" y1=\"109.22\" x2=\"-66.04\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPA2\"/>\n<wire x1=\"-144.78\" y1=\"116.84\" x2=\"-134.62\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LED2\" class=\"0\">\n<segment>\n<wire x1=\"-55.88\" y1=\"99.06\" x2=\"-58.42\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-53.34\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"LED2\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-58.42\" y1=\"109.22\" x2=\"-55.88\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPA1\"/>\n<wire x1=\"-144.78\" y1=\"119.38\" x2=\"-134.62\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"AIN1\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"ANAIN1\"/>\n<wire x1=\"-431.8\" y1=\"-58.42\" x2=\"-431.8\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-429.26\" y=\"-57.15\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"-279.4\" y=\"91.44\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"-284.48\" y1=\"91.44\" x2=\"-274.32\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"2\"/>\n<junction x=\"-284.48\" y=\"91.44\"/>\n</segment>\n</net>\n<net name=\"REF1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"REFIO\"/>\n<pinref part=\"CREF1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-195.58\" y1=\"-33.02\" x2=\"-200.66\" y2=\"-33.02\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INA-1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CMA\"/>\n<wire x1=\"-241.3\" y1=\"-33.02\" x2=\"-248.92\" y2=\"-33.02\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INA-\"/>\n<wire x1=\"-241.3\" y1=\"-38.1\" x2=\"-248.92\" y2=\"-38.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C-AIN1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-248.92\" y1=\"-38.1\" x2=\"-261.62\" y2=\"-38.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-248.92\" y1=\"-33.02\" x2=\"-248.92\" y2=\"-38.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-248.92\" y=\"-38.1\"/>\n</segment>\n</net>\n<net name=\"LOW_22\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_22\"/>\n<wire x1=\"-459.74\" y1=\"-15.24\" x2=\"-472.44\" y2=\"-15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-467.36\" y=\"-15.24\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CS/OUTSEL\"/>\n<wire x1=\"-200.66\" y1=\"0\" x2=\"-190.5\" y2=\"0\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-190.5\" y=\"0\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CS/OUTSEL\"/>\n<wire x1=\"-63.5\" y1=\"0\" x2=\"-55.88\" y2=\"0\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-55.88\" y=\"0\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L134\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_134\"/>\n<wire x1=\"-431.8\" y1=\"68.58\" x2=\"-431.8\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-431.8\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<wire x1=\"-467.36\" y1=\"81.28\" x2=\"-467.36\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-467.36\" y=\"66.04\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"5\"/>\n<junction x=\"-467.36\" y=\"81.534\"/>\n<wire x1=\"-467.36\" y1=\"78.74\" x2=\"-467.36\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-467.36\" y1=\"81.534\" x2=\"-467.36\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"LOW_24\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_24\"/>\n<wire x1=\"-469.9\" y1=\"-17.78\" x2=\"-459.74\" y2=\"-17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-464.82\" y=\"-17.78\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SCLK/DIV\"/>\n<wire x1=\"-200.66\" y1=\"2.54\" x2=\"-190.5\" y2=\"2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-190.5\" y=\"2.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SCLK/DIV\"/>\n<wire x1=\"-63.5\" y1=\"2.54\" x2=\"-55.88\" y2=\"2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-55.88\" y=\"2.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LOW_25\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_25\"/>\n<wire x1=\"-467.36\" y1=\"-20.32\" x2=\"-459.74\" y2=\"-20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-462.28\" y=\"-20.32\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SDIN/FORMAT\"/>\n<wire x1=\"-200.66\" y1=\"5.08\" x2=\"-190.5\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-190.5\" y=\"5.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SDIN/FORMAT\"/>\n<wire x1=\"-63.5\" y1=\"5.08\" x2=\"-55.88\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-55.88\" y=\"5.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"REF2\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"REFIO\"/>\n<pinref part=\"CREF2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-58.42\" y1=\"-33.02\" x2=\"-63.5\" y2=\"-33.02\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INA-2\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CMA\"/>\n<wire x1=\"-104.14\" y1=\"-33.02\" x2=\"-111.76\" y2=\"-33.02\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INA-\"/>\n<wire x1=\"-104.14\" y1=\"-38.1\" x2=\"-111.76\" y2=\"-38.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C-AIN3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-111.76\" y1=\"-38.1\" x2=\"-124.46\" y2=\"-38.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-111.76\" y1=\"-33.02\" x2=\"-111.76\" y2=\"-38.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-111.76\" y=\"-38.1\"/>\n</segment>\n</net>\n<net name=\"OSC1\" class=\"0\">\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"OUT\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK0P\"/>\n<wire x1=\"-528.32\" y1=\"-25.4\" x2=\"-459.74\" y2=\"-25.4\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"D0A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D0A\"/>\n<wire x1=\"-248.92\" y1=\"20.32\" x2=\"-241.3\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_47\"/>\n<wire x1=\"-414.02\" y1=\"-66.04\" x2=\"-393.7\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-414.02\" y=\"-68.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D1A\"/>\n<wire x1=\"-248.92\" y1=\"17.78\" x2=\"-241.3\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_46\"/>\n<wire x1=\"-416.56\" y1=\"-66.04\" x2=\"-396.24\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-416.56\" y=\"-73.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D2A\"/>\n<wire x1=\"-241.3\" y1=\"15.24\" x2=\"-248.92\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_45\"/>\n<wire x1=\"-419.1\" y1=\"-66.04\" x2=\"-398.78\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-419.1\" y=\"-71.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D3A\"/>\n<wire x1=\"-241.3\" y1=\"12.7\" x2=\"-248.92\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_44\"/>\n<wire x1=\"-421.64\" y1=\"-66.04\" x2=\"-401.32\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-421.64\" y=\"-76.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D4A\"/>\n<wire x1=\"-241.3\" y1=\"10.16\" x2=\"-248.92\" y2=\"10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_43\"/>\n<wire x1=\"-424.18\" y1=\"-66.04\" x2=\"-403.86\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-424.18\" y=\"-68.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D5A\"/>\n<wire x1=\"-241.3\" y1=\"7.62\" x2=\"-248.92\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"7.62\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_41\"/>\n<wire x1=\"-426.72\" y1=\"-66.04\" x2=\"-406.4\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-426.72\" y=\"-73.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D6A\"/>\n<wire x1=\"-241.3\" y1=\"5.08\" x2=\"-248.92\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"5.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_39\"/>\n<wire x1=\"-429.26\" y1=\"-66.04\" x2=\"-408.94\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-429.26\" y=\"-71.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D7A\"/>\n<wire x1=\"-241.3\" y1=\"2.54\" x2=\"-248.92\" y2=\"2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"2.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_38\"/>\n<wire x1=\"-431.8\" y1=\"-66.04\" x2=\"-411.48\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-431.8\" y=\"-68.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D0B\"/>\n<wire x1=\"-241.3\" y1=\"-2.54\" x2=\"-248.92\" y2=\"-2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"-2.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_59\"/>\n<wire x1=\"-370.84\" y1=\"-66.04\" x2=\"-370.84\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-370.84\" y=\"-66.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D1B\"/>\n<wire x1=\"-241.3\" y1=\"-5.08\" x2=\"-248.92\" y2=\"-5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"-5.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_58\"/>\n<wire x1=\"-373.38\" y1=\"-66.04\" x2=\"-373.38\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-373.38\" y=\"-63.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D2B\"/>\n<wire x1=\"-241.3\" y1=\"-7.62\" x2=\"-248.92\" y2=\"-7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"-7.62\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_57\"/>\n<wire x1=\"-375.92\" y1=\"-66.04\" x2=\"-375.92\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-375.92\" y=\"-60.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D3B\"/>\n<wire x1=\"-241.3\" y1=\"-10.16\" x2=\"-248.92\" y2=\"-10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"-10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_56\"/>\n<wire x1=\"-378.46\" y1=\"-66.04\" x2=\"-378.46\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-378.46\" y=\"-58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D4B\"/>\n<wire x1=\"-241.3\" y1=\"-12.7\" x2=\"-248.92\" y2=\"-12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"-12.7\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_55\"/>\n<wire x1=\"-381\" y1=\"-66.04\" x2=\"-381\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-381\" y=\"-60.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D5B\"/>\n<wire x1=\"-241.3\" y1=\"-15.24\" x2=\"-248.92\" y2=\"-15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"-15.24\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_54\"/>\n<wire x1=\"-383.54\" y1=\"-66.04\" x2=\"-383.54\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-383.54\" y=\"-63.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D6B\"/>\n<wire x1=\"-241.3\" y1=\"-17.78\" x2=\"-248.92\" y2=\"-17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"-17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_52\"/>\n<wire x1=\"-386.08\" y1=\"-66.04\" x2=\"-386.08\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-386.08\" y=\"-66.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D7B\"/>\n<wire x1=\"-241.3\" y1=\"-20.32\" x2=\"-248.92\" y2=\"-20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-246.38\" y=\"-20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_50\"/>\n<wire x1=\"-388.62\" y1=\"-66.04\" x2=\"-388.62\" y2=\"-50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-388.62\" y=\"-68.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INA2\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"-119.38\" y1=\"-238.76\" x2=\"-119.38\" y2=\"-251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-127\" y1=\"-238.76\" x2=\"-119.38\" y2=\"-238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"OUTA\"/>\n<wire x1=\"-127\" y1=\"-205.74\" x2=\"-165.1\" y2=\"-205.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-127\" y1=\"-205.74\" x2=\"-127\" y2=\"-238.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-127\" y=\"-231.14\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"-111.76\" y1=\"63.5\" x2=\"-119.38\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-119.38\" y=\"63.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INB1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INB+\"/>\n<wire x1=\"-248.92\" y1=\"-40.64\" x2=\"-241.3\" y2=\"-40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-248.92\" y1=\"-203.2\" x2=\"-248.92\" y2=\"-40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-248.92\" y1=\"-203.2\" x2=\"-226.06\" y2=\"-203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-226.06\" y1=\"-203.2\" x2=\"-226.06\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"OUTB\"/>\n<wire x1=\"-226.06\" y1=\"-208.28\" x2=\"-210.82\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"-190.5\" y1=\"-208.28\" x2=\"-210.82\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-210.82\" y1=\"-208.28\" x2=\"-210.82\" y2=\"-251.46\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-210.82\" y=\"-208.28\"/>\n<wire x1=\"-259.08\" y1=\"53.34\" x2=\"-259.08\" y2=\"-40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-259.08\" y1=\"-40.64\" x2=\"-248.92\" y2=\"-40.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-248.92\" y=\"-40.64\"/>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-259.08\" y1=\"53.34\" x2=\"-121.92\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-121.92\" y1=\"53.34\" x2=\"-121.92\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-121.92\" y1=\"43.18\" x2=\"-111.76\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-119.38\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n<label x=\"-256.54\" y=\"-40.64\" size=\"1.778\" layer=\"95\"/>\n<label x=\"-246.38\" y=\"55.88\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<label x=\"-210.82\" y=\"-228.6\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"CLKOUTTOLEFT_28\" class=\"0\">\n<segment>\n<wire x1=\"-447.04\" y1=\"-27.94\" x2=\"-447.04\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-444.5\" y=\"-88.9\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"8\"/>\n<label x=\"-489.458\" y=\"-27.94\" size=\"1.778\" layer=\"95\"/>\n<junction x=\"-447.04\" y=\"-88.9\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK1N\"/>\n<wire x1=\"-447.04\" y1=\"-27.94\" x2=\"-459.74\" y2=\"-27.94\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"LED4\" class=\"0\">\n<segment>\n<label x=\"-73.66\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<wire x1=\"-76.2\" y1=\"99.06\" x2=\"-78.74\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"LED4\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-78.74\" y1=\"109.22\" x2=\"-76.2\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPA3\"/>\n<wire x1=\"-144.78\" y1=\"114.3\" x2=\"-134.62\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"114.3\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"TRIGOUTTOLEFT_106\" class=\"0\">\n<segment>\n<wire x1=\"-447.04\" y1=\"-99.06\" x2=\"-424.18\" y2=\"-99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-444.5\" y=\"-99.06\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"4\"/>\n<junction x=\"-447.04\" y=\"-99.06\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_106\"/>\n<wire x1=\"-320.04\" y1=\"25.4\" x2=\"-299.72\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-317.5\" y=\"25.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"TRIGINFROMRIGHT_86\" class=\"0\">\n<segment>\n<wire x1=\"-289.56\" y1=\"-99.06\" x2=\"-289.56\" y2=\"-17.78\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_86\"/>\n<wire x1=\"-289.56\" y1=\"-17.78\" x2=\"-320.04\" y2=\"-17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-99.06\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"-289.56\" y1=\"-99.06\" x2=\"-304.8\" y2=\"-99.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-304.8\" y=\"-99.06\"/>\n</segment>\n</net>\n<net name=\"TRIGOUTORIGHT_87\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_87\"/>\n<wire x1=\"-320.04\" y1=\"-15.24\" x2=\"-287.02\" y2=\"-15.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-287.02\" y1=\"-15.24\" x2=\"-287.02\" y2=\"-96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-96.52\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-287.02\" y1=\"-96.52\" x2=\"-304.8\" y2=\"-96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-304.8\" y=\"-96.52\"/>\n</segment>\n</net>\n<net name=\"SERIALTORIGHT_RX_92\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_92\"/>\n<wire x1=\"-320.04\" y1=\"0\" x2=\"-284.48\" y2=\"0\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-284.48\" y1=\"0\" x2=\"-284.48\" y2=\"-104.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-309.88\" y=\"-104.14\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<label x=\"-312.42\" y=\"0\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"7\"/>\n<wire x1=\"-284.48\" y1=\"-104.14\" x2=\"-304.8\" y2=\"-104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-304.8\" y=\"-104.14\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"RX\"/>\n<wire x1=\"-419.1\" y1=\"-147.32\" x2=\"-452.12\" y2=\"-147.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-449.58\" y=\"-147.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALFROMRIGHT_TX_93\" class=\"0\">\n<segment>\n<wire x1=\"-281.94\" y1=\"-101.6\" x2=\"-281.94\" y2=\"2.54\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_93\"/>\n<wire x1=\"-281.94\" y1=\"2.54\" x2=\"-320.04\" y2=\"2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-309.88\" y=\"-101.6\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<label x=\"-312.42\" y=\"2.54\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"-281.94\" y1=\"-101.6\" x2=\"-304.8\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-304.8\" y=\"-101.6\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"TX\"/>\n<wire x1=\"-452.12\" y1=\"-144.78\" x2=\"-419.1\" y2=\"-144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-449.58\" y=\"-144.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALTOLEFT_96\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_96\"/>\n<wire x1=\"-320.04\" y1=\"5.08\" x2=\"-439.42\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-439.42\" y1=\"5.08\" x2=\"-439.42\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-444.5\" y=\"-101.6\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"-439.42\" y1=\"-101.6\" x2=\"-447.04\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-447.04\" y=\"-101.6\"/>\n<label x=\"-360.68\" y=\"5.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALFROMLEFT_98\" class=\"0\">\n<segment>\n<wire x1=\"-436.88\" y1=\"-104.14\" x2=\"-436.88\" y2=\"10.16\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_98\"/>\n<wire x1=\"-436.88\" y1=\"10.16\" x2=\"-320.04\" y2=\"10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-444.5\" y=\"-104.14\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-436.88\" y1=\"-104.14\" x2=\"-447.04\" y2=\"-104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-447.04\" y=\"-104.14\"/>\n<label x=\"-360.68\" y=\"10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"CLKINFROMRIGHT_26\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK0N\"/>\n<wire x1=\"-459.74\" y1=\"-22.86\" x2=\"-337.82\" y2=\"-22.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-337.82\" y1=\"-22.86\" x2=\"-337.82\" y2=\"-53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-337.82\" y1=\"-53.34\" x2=\"-292.1\" y2=\"-53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-292.1\" y1=\"-53.34\" x2=\"-292.1\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-292.1\" y1=\"-88.9\" x2=\"-304.8\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-88.9\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-304.8\" y=\"-88.9\"/>\n<label x=\"-424.18\" y=\"-22.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SPARELEFT_102\" class=\"0\">\n<segment>\n<wire x1=\"-441.452\" y1=\"-91.44\" x2=\"-447.04\" y2=\"-91.44\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-444.5\" y=\"-91.44\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"7\"/>\n<junction x=\"-447.04\" y=\"-91.44\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_102\"/>\n<wire x1=\"-320.04\" y1=\"20.32\" x2=\"-299.72\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-312.42\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SPARERIGHT_99\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_99\"/>\n<wire x1=\"-320.04\" y1=\"12.7\" x2=\"-297.18\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-297.18\" y1=\"12.7\" x2=\"-297.18\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-297.18\" y1=\"5.08\" x2=\"-279.4\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-279.4\" y1=\"5.08\" x2=\"-279.4\" y2=\"-91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-279.4\" y1=\"-91.44\" x2=\"-304.8\" y2=\"-91.44\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-91.44\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<label x=\"-312.42\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-304.8\" y=\"-91.44\"/>\n</segment>\n</net>\n<net name=\"5VINFROMUSB\" class=\"3\">\n<segment>\n<wire x1=\"-363.22\" y1=\"-106.68\" x2=\"-340.36\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-340.36\" y=\"-104.14\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"SW_5V\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"5V\"/>\n</segment>\n</net>\n<net name=\"A13\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_13\"/>\n<wire x1=\"-487.68\" y1=\"7.62\" x2=\"-459.74\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"7.62\" size=\"1.778\" layer=\"95\"/>\n<label x=\"-477.52\" y=\"7.62\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"14\"/>\n</segment>\n</net>\n<net name=\"A12\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_12\"/>\n<wire x1=\"-487.68\" y1=\"10.16\" x2=\"-459.74\" y2=\"10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"10.16\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"12\"/>\n</segment>\n</net>\n<net name=\"A11\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_11\"/>\n<wire x1=\"-487.68\" y1=\"12.7\" x2=\"-459.74\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"10\"/>\n</segment>\n</net>\n<net name=\"A10\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_10\"/>\n<wire x1=\"-487.68\" y1=\"15.24\" x2=\"-459.74\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"8\"/>\n</segment>\n</net>\n<net name=\"A8\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_8\"/>\n<wire x1=\"-487.68\" y1=\"17.78\" x2=\"-459.74\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"6\"/>\n</segment>\n</net>\n<net name=\"A7\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_7\"/>\n<wire x1=\"-487.68\" y1=\"20.32\" x2=\"-459.74\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"A6\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_6\"/>\n<wire x1=\"-487.68\" y1=\"22.86\" x2=\"-459.74\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"22.86\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"A14\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_14\"/>\n<wire x1=\"-487.68\" y1=\"5.08\" x2=\"-459.74\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"5.08\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"16\"/>\n</segment>\n</net>\n<net name=\"INB2\" class=\"0\">\n<segment>\n<pinref part=\"U2\" gate=\"A\" pin=\"OUTB\"/>\n<wire x1=\"-109.22\" y1=\"-208.28\" x2=\"-116.84\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"-22.86\" y1=\"-215.9\" x2=\"-12.7\" y2=\"-215.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-12.7\" y1=\"-215.9\" x2=\"-12.7\" y2=\"-190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-12.7\" y1=\"-190.5\" x2=\"-78.74\" y2=\"-190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-78.74\" y1=\"-190.5\" x2=\"-78.74\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-78.74\" y1=\"-208.28\" x2=\"-109.22\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-109.22\" y=\"-208.28\"/>\n<label x=\"-88.9\" y=\"-208.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"-111.76\" y1=\"40.64\" x2=\"-119.38\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-119.38\" y=\"40.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INA1\" class=\"0\">\n<segment>\n<wire x1=\"-251.46\" y1=\"-205.74\" x2=\"-251.46\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INA+\"/>\n<wire x1=\"-251.46\" y1=\"-35.56\" x2=\"-241.3\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"OUTA\"/>\n<wire x1=\"-246.38\" y1=\"-205.74\" x2=\"-251.46\" y2=\"-205.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"-281.94\" y1=\"-205.74\" x2=\"-251.46\" y2=\"-205.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-251.46\" y=\"-205.74\"/>\n<wire x1=\"-256.54\" y1=\"66.04\" x2=\"-256.54\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-256.54\" y1=\"-35.56\" x2=\"-251.46\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-251.46\" y=\"-35.56\"/>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-256.54\" y1=\"66.04\" x2=\"-111.76\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-256.54\" y=\"-35.56\" size=\"1.778\" layer=\"95\"/>\n<label x=\"-119.38\" y=\"66.04\" size=\"1.778\" layer=\"95\"/>\n<label x=\"-246.38\" y=\"68.58\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<label x=\"-266.7\" y=\"-205.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_29\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK1P\"/>\n<wire x1=\"-474.98\" y1=\"-30.48\" x2=\"-459.74\" y2=\"-30.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-472.44\" y=\"-30.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"9\"/>\n<wire x1=\"-457.2\" y1=\"104.14\" x2=\"-457.2\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-457.2\" y=\"93.98\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"L131\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_131\"/>\n<wire x1=\"-426.72\" y1=\"68.58\" x2=\"-426.72\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-426.72\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<wire x1=\"-464.82\" y1=\"81.28\" x2=\"-464.82\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-464.82\" y=\"66.04\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"6\"/>\n<junction x=\"-464.82\" y=\"81.534\"/>\n<wire x1=\"-464.82\" y1=\"78.74\" x2=\"-464.82\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-464.82\" y1=\"81.534\" x2=\"-464.82\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L132\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_132\"/>\n<wire x1=\"-429.26\" y1=\"68.58\" x2=\"-429.26\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-429.26\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<wire x1=\"-462.28\" y1=\"81.28\" x2=\"-462.28\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-462.28\" y=\"66.04\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"7\"/>\n<junction x=\"-462.28\" y=\"81.534\"/>\n<wire x1=\"-462.28\" y1=\"78.74\" x2=\"-462.28\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-462.28\" y1=\"81.534\" x2=\"-462.28\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"5VINFROMRIGHT\" class=\"3\">\n<segment>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"SW_5V\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-304.8\" y1=\"-93.98\" x2=\"-335.28\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-93.98\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<junction x=\"-304.8\" y=\"-93.98\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_32\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"PLL_CLKOUTN\"/>\n<wire x1=\"-459.74\" y1=\"-35.56\" x2=\"-474.98\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-477.52\" y=\"-35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CLK+\"/>\n<wire x1=\"-200.66\" y1=\"15.24\" x2=\"-193.04\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-193.04\" y=\"15.24\"/>\n<wire x1=\"-193.04\" y1=\"15.24\" x2=\"-193.04\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-190.5\" y=\"15.24\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"IO_101\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_101\"/>\n<wire x1=\"-320.04\" y1=\"17.78\" x2=\"-294.64\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-309.88\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-292.1\" y1=\"73.66\" x2=\"-302.26\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-304.8\" y=\"71.12\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"15\"/>\n<junction x=\"-292.1\" y=\"73.66\"/>\n</segment>\n</net>\n<net name=\"IO_100\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_100\"/>\n<wire x1=\"-294.64\" y1=\"15.24\" x2=\"-320.04\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-309.88\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-292.1\" y1=\"76.2\" x2=\"-302.26\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-304.8\" y=\"73.66\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"13\"/>\n<junction x=\"-292.1\" y=\"76.2\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_91\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK3N\"/>\n<wire x1=\"-307.34\" y1=\"-2.54\" x2=\"-320.04\" y2=\"-2.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-2.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-302.26\" y1=\"76.2\" x2=\"-292.1\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-304.8\" y=\"76.2\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"11\"/>\n<junction x=\"-292.1\" y=\"78.74\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_90\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK3P\"/>\n<wire x1=\"-307.34\" y1=\"-5.08\" x2=\"-320.04\" y2=\"-5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-5.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-292.1\" y1=\"81.28\" x2=\"-302.26\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-304.8\" y=\"78.74\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"9\"/>\n<junction x=\"-292.1\" y=\"81.28\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_89\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK2N\"/>\n<wire x1=\"-307.34\" y1=\"-7.62\" x2=\"-320.04\" y2=\"-7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-7.62\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-292.1\" y1=\"83.82\" x2=\"-302.26\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-304.8\" y=\"81.28\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"7\"/>\n<junction x=\"-292.1\" y=\"83.82\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_88\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK2P\"/>\n<wire x1=\"-307.34\" y1=\"-10.16\" x2=\"-320.04\" y2=\"-10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-307.34\" y=\"-10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-292.1\" y1=\"86.36\" x2=\"-302.26\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-304.8\" y=\"83.82\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"5\"/>\n<junction x=\"-292.1\" y=\"86.36\"/>\n</segment>\n</net>\n<net name=\"TRIGINFROMLEFT_105\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_105\"/>\n<wire x1=\"-299.72\" y1=\"22.86\" x2=\"-320.04\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-317.5\" y=\"22.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-424.18\" y1=\"-96.52\" x2=\"-447.04\" y2=\"-96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-444.5\" y=\"-96.52\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"5\"/>\n<junction x=\"-447.04\" y=\"-96.52\"/>\n</segment>\n</net>\n<net name=\"INB-1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INB-\"/>\n<pinref part=\"C-AIN2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-241.3\" y1=\"-43.18\" x2=\"-261.62\" y2=\"-43.18\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CMB\"/>\n<wire x1=\"-241.3\" y1=\"-45.72\" x2=\"-241.3\" y2=\"-43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-241.3\" y=\"-43.18\"/>\n</segment>\n</net>\n<net name=\"INB-2\" class=\"0\">\n<segment>\n<pinref part=\"C-AIN4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INB-\"/>\n<wire x1=\"-124.46\" y1=\"-43.18\" x2=\"-104.14\" y2=\"-43.18\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CMB\"/>\n<wire x1=\"-104.14\" y1=\"-45.72\" x2=\"-104.14\" y2=\"-43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-104.14\" y=\"-43.18\"/>\n</segment>\n</net>\n<net name=\"INBMINUS1\" class=\"0\">\n<segment>\n<wire x1=\"-251.46\" y1=\"-271.78\" x2=\"-251.46\" y2=\"-264.16\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-251.46\" y1=\"-264.16\" x2=\"-251.46\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-251.46\" y1=\"-242.57\" x2=\"-251.46\" y2=\"-248.92\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-251.46\" y1=\"-248.92\" x2=\"-251.46\" y2=\"-256.54\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-251.46\" y1=\"-256.54\" x2=\"-251.46\" y2=\"-264.16\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-251.46\" y1=\"-264.16\" x2=\"-251.46\" y2=\"-265.43\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-200.66\" y1=\"-144.78\" x2=\"-200.66\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"-INB\"/>\n<wire x1=\"-200.66\" y1=\"-152.4\" x2=\"-200.66\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-200.66\" y1=\"-210.82\" x2=\"-198.12\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-200.66\" y=\"-187.96\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<wire x1=\"-198.12\" y1=\"-210.82\" x2=\"-190.5\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-251.46\" y1=\"-271.78\" x2=\"-198.12\" y2=\"-271.78\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-198.12\" y1=\"-271.78\" x2=\"-198.12\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-198.12\" y=\"-210.82\"/>\n<pinref part=\"CGAIN1_2\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-251.46\" y=\"-242.57\"/>\n<pinref part=\"RGAIN1_2\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-251.46\" y=\"-248.92\"/>\n<pinref part=\"RGAIN2_2\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-251.46\" y=\"-256.54\"/>\n<pinref part=\"RIN2_10K\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RIN2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-209.55\" y1=\"-124.46\" x2=\"-205.74\" y2=\"-127\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-205.74\" y=\"-127\"/>\n<wire x1=\"-205.74\" y1=\"-127\" x2=\"-205.74\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-205.74\" y1=\"-152.4\" x2=\"-200.66\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-200.66\" y=\"-152.4\"/>\n<junction x=\"-200.66\" y=\"-144.78\"/>\n<pinref part=\"CIN1NF_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-200.66\" y1=\"-152.4\" x2=\"-194.31\" y2=\"-147.32\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-194.31\" y1=\"-147.32\" x2=\"-189.23\" y2=\"-147.32\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-194.31\" y=\"-147.32\"/>\n<pinref part=\"CH2\" gate=\"G$1\" pin=\"3\"/>\n<junction x=\"-251.46\" y=\"-264.16\"/>\n<pinref part=\"CL2\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"-251.46\" y1=\"-237.49\" x2=\"-251.46\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INBMINUS2\" class=\"0\">\n<segment>\n<pinref part=\"U2\" gate=\"A\" pin=\"-INB\"/>\n<wire x1=\"-137.16\" y1=\"-152.4\" x2=\"-137.16\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-137.16\" y1=\"-210.82\" x2=\"-109.22\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-137.668\" y=\"-189.23\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<wire x1=\"-63.5\" y1=\"-207.01\" x2=\"-63.5\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-63.5\" y1=\"-210.82\" x2=\"-63.5\" y2=\"-213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-63.5\" y1=\"-213.36\" x2=\"-63.5\" y2=\"-220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-63.5\" y1=\"-220.98\" x2=\"-63.5\" y2=\"-228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-109.22\" y1=\"-210.82\" x2=\"-63.5\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-109.22\" y=\"-210.82\"/>\n<junction x=\"-63.5\" y=\"-210.82\"/>\n<pinref part=\"RGAIN1_4\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-63.5\" y=\"-213.36\"/>\n<pinref part=\"RGAIN2_4\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-63.5\" y=\"-220.98\"/>\n<pinref part=\"CGAIN1_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RIN4_10K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-137.16\" y1=\"-144.78\" x2=\"-137.16\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-146.05\" y1=\"-124.46\" x2=\"-142.24\" y2=\"-127\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-142.24\" y1=\"-127\" x2=\"-142.24\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-142.24\" y1=\"-152.4\" x2=\"-137.16\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-142.24\" y=\"-127\"/>\n<junction x=\"-137.16\" y=\"-152.4\"/>\n<junction x=\"-137.16\" y=\"-144.78\"/>\n<pinref part=\"CIN1NF_4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-137.16\" y1=\"-152.4\" x2=\"-130.81\" y2=\"-147.32\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-130.81\" y1=\"-147.32\" x2=\"-125.73\" y2=\"-147.32\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-130.81\" y=\"-147.32\"/>\n<pinref part=\"CH4\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"CL4\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"-63.5\" y1=\"-201.93\" x2=\"-63.5\" y2=\"-207.01\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-63.5\" y=\"-207.01\"/>\n</segment>\n</net>\n<net name=\"DCLKA1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"DCLKA\"/>\n<wire x1=\"-154.94\" y1=\"-12.7\" x2=\"-200.66\" y2=\"-12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-172.72\" y=\"-12.7\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"DORB1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"DORB\"/>\n<wire x1=\"-154.94\" y1=\"-15.24\" x2=\"-200.66\" y2=\"-15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-172.72\" y=\"-15.24\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"DCLKB1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"DCLKB\"/>\n<wire x1=\"-154.94\" y1=\"-17.78\" x2=\"-200.66\" y2=\"-17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-172.72\" y=\"-17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"DORA1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"DORA\"/>\n<wire x1=\"-154.94\" y1=\"-10.16\" x2=\"-200.66\" y2=\"-10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-172.72\" y=\"-10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"DORA2\" class=\"0\">\n<segment>\n<wire x1=\"-154.94\" y1=\"-20.32\" x2=\"-172.72\" y2=\"-20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-172.72\" y=\"-20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"DORA\"/>\n<wire x1=\"-43.18\" y1=\"-10.16\" x2=\"-63.5\" y2=\"-10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-53.34\" y=\"-10.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"DCLKA2\" class=\"0\">\n<segment>\n<wire x1=\"-172.72\" y1=\"-22.86\" x2=\"-154.94\" y2=\"-22.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-172.72\" y=\"-22.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"DCLKA\"/>\n<wire x1=\"-43.18\" y1=\"-12.7\" x2=\"-63.5\" y2=\"-12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-53.34\" y=\"-12.7\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"DORB2\" class=\"0\">\n<segment>\n<wire x1=\"-154.94\" y1=\"-25.4\" x2=\"-172.72\" y2=\"-25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-172.72\" y=\"-25.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"DORB\"/>\n<wire x1=\"-63.5\" y1=\"-15.24\" x2=\"-43.18\" y2=\"-15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-53.34\" y=\"-15.24\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"DCLKB2\" class=\"0\">\n<segment>\n<wire x1=\"-172.72\" y1=\"-27.94\" x2=\"-154.94\" y2=\"-27.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-172.72\" y=\"-27.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"DCLKB\"/>\n<wire x1=\"-43.18\" y1=\"-17.78\" x2=\"-63.5\" y2=\"-17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-53.34\" y=\"-17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"OFFSET1\" class=\"0\">\n<segment>\n<label x=\"-264.16\" y=\"-210.82\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"+INA\"/>\n<wire x1=\"-246.38\" y1=\"-210.82\" x2=\"-254\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETB6\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-261.62\" y=\"-210.82\"/>\n<wire x1=\"-254\" y1=\"-210.82\" x2=\"-261.62\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-261.62\" y1=\"-210.82\" x2=\"-264.16\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA6\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-254\" y=\"-210.82\"/>\n</segment>\n<segment>\n<wire x1=\"-510.54\" y1=\"-149.86\" x2=\"-500.38\" y2=\"-149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-500.38\" y=\"-147.32\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"ROFFSET1\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-510.54\" y=\"-149.86\"/>\n</segment>\n</net>\n<net name=\"INAMINUS1\" class=\"0\">\n<segment>\n<wire x1=\"-233.68\" y1=\"-152.4\" x2=\"-233.68\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"-INA\"/>\n<wire x1=\"-233.68\" y1=\"-208.28\" x2=\"-246.38\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-233.68\" y=\"-175.26\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n<wire x1=\"-233.68\" y1=\"-208.28\" x2=\"-233.68\" y2=\"-226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-233.68\" y=\"-208.28\"/>\n<pinref part=\"RGAIN1_1\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-322.58\" y=\"-203.2\"/>\n<wire x1=\"-322.58\" y1=\"-196.85\" x2=\"-322.58\" y2=\"-203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-322.58\" y1=\"-203.2\" x2=\"-322.58\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN2_1\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-322.58\" y=\"-210.82\"/>\n<wire x1=\"-233.68\" y1=\"-226.06\" x2=\"-322.58\" y2=\"-226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-322.58\" y1=\"-226.06\" x2=\"-322.58\" y2=\"-218.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CGAIN1_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RIN1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-322.58\" y1=\"-218.44\" x2=\"-322.58\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-242.57\" y1=\"-124.46\" x2=\"-238.76\" y2=\"-127\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-238.76\" y1=\"-127\" x2=\"-238.76\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-238.76\" y=\"-127\"/>\n<wire x1=\"-238.76\" y1=\"-152.4\" x2=\"-233.68\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN1_10K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-233.68\" y1=\"-144.78\" x2=\"-233.68\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-233.68\" y=\"-152.4\"/>\n<junction x=\"-233.68\" y=\"-144.78\"/>\n<pinref part=\"CIN1NF_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-227.33\" y1=\"-147.32\" x2=\"-233.68\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-227.33\" y1=\"-147.32\" x2=\"-222.25\" y2=\"-147.32\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-227.33\" y=\"-147.32\"/>\n<pinref part=\"CH1\" gate=\"G$1\" pin=\"3\"/>\n<junction x=\"-322.58\" y=\"-218.44\"/>\n<pinref part=\"CL1\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"-322.58\" y1=\"-196.85\" x2=\"-322.58\" y2=\"-189.23\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-322.58\" y=\"-196.85\"/>\n</segment>\n</net>\n<net name=\"OFFSET2\" class=\"0\">\n<segment>\n<pinref part=\"U1\" gate=\"A\" pin=\"+INB\"/>\n<wire x1=\"-190.5\" y1=\"-213.36\" x2=\"-182.88\" y2=\"-213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-193.04\" y=\"-213.36\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"COFFSETB8\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-190.5\" y=\"-213.36\"/>\n<pinref part=\"COFFSETA1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-182.88\" y1=\"-213.36\" x2=\"-180.34\" y2=\"-213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-182.88\" y=\"-213.36\"/>\n</segment>\n<segment>\n<wire x1=\"-510.54\" y1=\"-147.32\" x2=\"-500.38\" y2=\"-147.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-500.38\" y=\"-144.78\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"ROFFSET2\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-510.54\" y=\"-147.32\"/>\n</segment>\n</net>\n<net name=\"OFFSET3\" class=\"0\">\n<segment>\n<pinref part=\"U2\" gate=\"A\" pin=\"+INA\"/>\n<label x=\"-182.88\" y=\"-210.82\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"COFFSETB10\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-177.8\" y=\"-210.82\"/>\n<wire x1=\"-165.1\" y1=\"-210.82\" x2=\"-170.18\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-170.18\" y1=\"-210.82\" x2=\"-177.8\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-177.8\" y1=\"-210.82\" x2=\"-182.88\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA2\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-170.18\" y=\"-210.82\"/>\n</segment>\n<segment>\n<wire x1=\"-510.54\" y1=\"-144.78\" x2=\"-500.38\" y2=\"-144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-500.38\" y=\"-142.24\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"ROFFSET3\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-510.54\" y=\"-144.78\"/>\n</segment>\n</net>\n<net name=\"OFFSET4\" class=\"0\">\n<segment>\n<pinref part=\"U2\" gate=\"A\" pin=\"+INB\"/>\n<wire x1=\"-109.22\" y1=\"-213.36\" x2=\"-104.14\" y2=\"-213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-104.14\" y=\"-213.36\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"COFFSETB12\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-104.14\" y=\"-213.36\"/>\n<wire x1=\"-104.14\" y1=\"-213.36\" x2=\"-96.52\" y2=\"-213.36\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-96.52\" y1=\"-213.36\" x2=\"-93.98\" y2=\"-213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-96.52\" y=\"-213.36\"/>\n</segment>\n<segment>\n<wire x1=\"-500.38\" y1=\"-142.24\" x2=\"-510.54\" y2=\"-142.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-500.38\" y=\"-139.7\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"ROFFSET4\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-510.54\" y=\"-142.24\"/>\n</segment>\n</net>\n<net name=\"N$24\" class=\"0\">\n<segment>\n<pinref part=\"SW_TERM1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"R10M_1\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"INJ1\" class=\"0\">\n<segment>\n<pinref part=\"SW_TERM1\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"-233.68\" y1=\"-88.9\" x2=\"-226.06\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<wire x1=\"-233.68\" y1=\"-86.36\" x2=\"-233.68\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"DS2\"/>\n<wire x1=\"-233.68\" y1=\"-88.9\" x2=\"-238.76\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-238.76\" y1=\"-88.9\" x2=\"-238.76\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-233.68\" y=\"-88.9\"/>\n<pinref part=\"C_AC1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-238.76\" y1=\"-101.6\" x2=\"-242.57\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-238.76\" y=\"-101.6\"/>\n</segment>\n</net>\n<net name=\"N$27\" class=\"0\">\n<segment>\n<pinref part=\"SW_TERM2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"R10M_2\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"N$30\" class=\"0\">\n<segment>\n<pinref part=\"SW_TERM3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"R10M_3\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"N$33\" class=\"0\">\n<segment>\n<pinref part=\"SW_TERM4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"R10M_4\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"INA12\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"-93.98\" y1=\"63.5\" x2=\"-91.44\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-91.44\" y1=\"63.5\" x2=\"-91.44\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INA+\"/>\n<wire x1=\"-91.44\" y1=\"-35.56\" x2=\"-104.14\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-104.14\" y=\"-35.56\" size=\"1.778\" layer=\"95\"/>\n<label x=\"-91.44\" y=\"66.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INB12\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INB+\"/>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"-104.14\" y1=\"-40.64\" x2=\"-93.98\" y2=\"-40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-93.98\" y1=\"-40.64\" x2=\"-93.98\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-91.44\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n<label x=\"-104.14\" y=\"-40.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP2\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"-111.76\" y1=\"35.56\" x2=\"-124.46\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-129.54\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA5\"/>\n<wire x1=\"-210.82\" y1=\"109.22\" x2=\"-200.66\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"109.22\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LED5\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPA4\"/>\n<wire x1=\"-144.78\" y1=\"111.76\" x2=\"-134.62\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-86.36\" y1=\"99.06\" x2=\"-88.9\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"LED5\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-86.36\" y1=\"109.22\" x2=\"-88.9\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-83.82\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"E_GSW1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA0\"/>\n<wire x1=\"-210.82\" y1=\"121.92\" x2=\"-200.66\" y2=\"121.92\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"121.92\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"-299.72\" y1=\"-210.82\" x2=\"-299.72\" y2=\"-220.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-299.72\" y=\"-223.52\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"E_GSW2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA1\"/>\n<wire x1=\"-210.82\" y1=\"119.38\" x2=\"-200.66\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"-228.6\" y1=\"-256.54\" x2=\"-228.6\" y2=\"-269.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-228.6\" y=\"-269.24\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"E_GSW3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA2\"/>\n<wire x1=\"-210.82\" y1=\"116.84\" x2=\"-200.66\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"-137.16\" y1=\"-256.54\" x2=\"-137.16\" y2=\"-269.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-137.16\" y=\"-269.24\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"E_GSW4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA3\"/>\n<wire x1=\"-210.82\" y1=\"114.3\" x2=\"-200.66\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"114.3\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"-40.64\" y1=\"-220.98\" x2=\"-40.64\" y2=\"-233.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-40.64\" y=\"-233.68\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP1\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"-111.76\" y1=\"58.42\" x2=\"-124.46\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-129.54\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA4\"/>\n<wire x1=\"-200.66\" y1=\"111.76\" x2=\"-210.82\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L141_SCL\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_141\"/>\n<wire x1=\"-444.5\" y1=\"68.58\" x2=\"-444.5\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-444.5\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"-236.22\" y1=\"99.06\" x2=\"-246.38\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R_SCL\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-246.38\" y1=\"99.06\" x2=\"-246.38\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-243.84\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"-170.18\" y1=\"99.06\" x2=\"-185.42\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-185.42\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"-574.04\" y1=\"-142.24\" x2=\"-558.8\" y2=\"-142.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-571.5\" y=\"-139.7\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</segment>\n</net>\n<net name=\"E_ACSW1\" class=\"0\">\n<segment>\n<wire x1=\"-218.44\" y1=\"-116.84\" x2=\"-233.68\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-233.68\" y=\"-116.84\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR1\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-218.44\" y=\"-116.84\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB0\"/>\n<wire x1=\"-210.82\" y1=\"99.06\" x2=\"-200.66\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB1\"/>\n<wire x1=\"-210.82\" y1=\"96.52\" x2=\"-200.66\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"96.52\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-185.42\" y1=\"-116.84\" x2=\"-200.66\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-200.66\" y=\"-116.84\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR2\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-185.42\" y=\"-116.84\"/>\n</segment>\n</net>\n<net name=\"E_ACSW3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB2\"/>\n<wire x1=\"-210.82\" y1=\"93.98\" x2=\"-200.66\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"93.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-152.4\" y1=\"-116.84\" x2=\"-167.64\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-167.64\" y=\"-116.84\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR3\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-152.4\" y=\"-116.84\"/>\n</segment>\n</net>\n<net name=\"E_ACSW4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB3\"/>\n<wire x1=\"-210.82\" y1=\"91.44\" x2=\"-200.66\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"91.44\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-121.92\" y1=\"-116.84\" x2=\"-137.16\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-137.16\" y=\"-116.84\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR4\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-121.92\" y=\"-116.84\"/>\n</segment>\n</net>\n<net name=\"E_SHDN1\" class=\"0\">\n<segment>\n<wire x1=\"-200.66\" y1=\"-45.72\" x2=\"-200.66\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-200.152\" y=\"-35.56\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SHDN\"/>\n<junction x=\"-200.66\" y=\"-35.56\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB4\"/>\n<wire x1=\"-210.82\" y1=\"88.9\" x2=\"-200.66\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"88.9\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L130\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_130\"/>\n<wire x1=\"-424.18\" y1=\"68.58\" x2=\"-424.18\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-424.18\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"8\"/>\n<wire x1=\"-459.74\" y1=\"81.534\" x2=\"-459.74\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-459.74\" y=\"66.04\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"L127\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_127\"/>\n<wire x1=\"-419.1\" y1=\"68.58\" x2=\"-419.1\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-419.1\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"9\"/>\n<wire x1=\"-457.2\" y1=\"81.534\" x2=\"-457.2\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-457.2\" y=\"66.04\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"L124\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_124\"/>\n<wire x1=\"-414.02\" y1=\"68.58\" x2=\"-414.02\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-414.02\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"10\"/>\n<wire x1=\"-454.66\" y1=\"81.534\" x2=\"-454.66\" y2=\"73.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-454.66\" y=\"66.04\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"E_24_B0\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPB0\"/>\n<wire x1=\"-144.78\" y1=\"99.06\" x2=\"-134.62\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-495.3\" y1=\"22.86\" x2=\"-505.46\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-508\" y=\"22.86\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"1\"/>\n<junction x=\"-495.3\" y=\"22.86\"/>\n</segment>\n</net>\n<net name=\"E_24_B1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPB1\"/>\n<wire x1=\"-144.78\" y1=\"96.52\" x2=\"-134.62\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"96.52\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-495.3\" y1=\"20.32\" x2=\"-505.46\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-508\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"3\"/>\n<junction x=\"-495.3\" y=\"20.32\"/>\n</segment>\n</net>\n<net name=\"E_24_B2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPB2\"/>\n<wire x1=\"-144.78\" y1=\"93.98\" x2=\"-134.62\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"93.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-495.3\" y1=\"17.78\" x2=\"-505.46\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-508\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"5\"/>\n<junction x=\"-495.3\" y=\"17.78\"/>\n</segment>\n</net>\n<net name=\"E_24_B3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPB3\"/>\n<wire x1=\"-144.78\" y1=\"91.44\" x2=\"-134.62\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"91.44\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-495.3\" y1=\"15.24\" x2=\"-505.46\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-508\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"7\"/>\n<junction x=\"-495.3\" y=\"15.24\"/>\n</segment>\n</net>\n<net name=\"E_24_B4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPB4\"/>\n<wire x1=\"-144.78\" y1=\"88.9\" x2=\"-134.62\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"88.9\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-495.3\" y1=\"12.7\" x2=\"-505.46\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-508\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"9\"/>\n<junction x=\"-495.3\" y=\"12.7\"/>\n</segment>\n</net>\n<net name=\"E_24_B5\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPB5\"/>\n<wire x1=\"-144.78\" y1=\"86.36\" x2=\"-134.62\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"86.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-495.3\" y1=\"10.16\" x2=\"-505.46\" y2=\"10.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-508\" y=\"10.16\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"11\"/>\n<junction x=\"-495.3\" y=\"10.16\"/>\n</segment>\n</net>\n<net name=\"E_24_B6\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPB6\"/>\n<wire x1=\"-144.78\" y1=\"83.82\" x2=\"-134.62\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"83.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-495.3\" y1=\"7.62\" x2=\"-505.46\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-508\" y=\"7.62\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"13\"/>\n<junction x=\"-495.3\" y=\"7.62\"/>\n</segment>\n</net>\n<net name=\"E_24_B7\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPB7\"/>\n<wire x1=\"-144.78\" y1=\"81.28\" x2=\"-134.62\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"81.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"-495.3\" y1=\"5.08\" x2=\"-505.46\" y2=\"5.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-508\" y=\"5.08\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"15\"/>\n<junction x=\"-495.3\" y=\"5.08\"/>\n</segment>\n</net>\n<net name=\"N$25\" class=\"0\">\n<segment>\n<pinref part=\"R50-6\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"R50-7\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-198.12\" y1=\"-73.66\" x2=\"-200.66\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-200.66\" y1=\"-73.66\" x2=\"-203.2\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-200.66\" y=\"-73.66\"/>\n<pinref part=\"SW_TERM2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-198.12\" y1=\"-73.66\" x2=\"-195.58\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-198.12\" y=\"-73.66\"/>\n<pinref part=\"R50-5\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-195.58\" y=\"-73.66\"/>\n</segment>\n</net>\n<net name=\"N$26\" class=\"0\">\n<segment>\n<pinref part=\"R50-10\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"R50-11\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-165.1\" y1=\"-73.66\" x2=\"-167.64\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-12\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-167.64\" y1=\"-73.66\" x2=\"-170.18\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-167.64\" y=\"-73.66\"/>\n<pinref part=\"SW_TERM3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-165.1\" y1=\"-73.66\" x2=\"-162.56\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-165.1\" y=\"-73.66\"/>\n<pinref part=\"R50-9\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-162.56\" y=\"-73.66\"/>\n</segment>\n</net>\n<net name=\"N$28\" class=\"0\">\n<segment>\n<pinref part=\"R50-14\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"R50-15\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-134.62\" y1=\"-73.66\" x2=\"-137.16\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-16\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-137.16\" y1=\"-73.66\" x2=\"-139.7\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-137.16\" y=\"-73.66\"/>\n<pinref part=\"SW_TERM4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-134.62\" y1=\"-73.66\" x2=\"-132.08\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-134.62\" y=\"-73.66\"/>\n<pinref part=\"R50-13\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-132.08\" y=\"-73.66\"/>\n</segment>\n</net>\n<net name=\"N$29\" class=\"0\">\n<segment>\n<pinref part=\"SW_TERM1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"R50-4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"R50-3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"R50-2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-231.14\" y1=\"-73.66\" x2=\"-233.68\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-233.68\" y1=\"-73.66\" x2=\"-236.22\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-233.68\" y=\"-73.66\"/>\n<wire x1=\"-228.6\" y1=\"-73.66\" x2=\"-231.14\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-228.6\" y=\"-73.66\"/>\n<junction x=\"-231.14\" y=\"-73.66\"/>\n</segment>\n</net>\n<net name=\"N$23\" class=\"0\">\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"XI\"/>\n<pinref part=\"Y1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-419.1\" y1=\"-157.48\" x2=\"-447.04\" y2=\"-157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-447.04\" y1=\"-157.48\" x2=\"-447.04\" y2=\"-162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_OSC1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-447.04\" y1=\"-162.56\" x2=\"-447.04\" y2=\"-170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-447.04\" y=\"-162.56\"/>\n</segment>\n</net>\n<net name=\"N$31\" class=\"0\">\n<segment>\n<pinref part=\"C_OSC2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"Y1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-439.42\" y1=\"-170.18\" x2=\"-441.96\" y2=\"-170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-441.96\" y1=\"-170.18\" x2=\"-441.96\" y2=\"-162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-441.96\" y1=\"-162.56\" x2=\"-441.96\" y2=\"-160.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-441.96\" y=\"-162.56\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"XO\"/>\n<wire x1=\"-441.96\" y1=\"-160.02\" x2=\"-419.1\" y2=\"-160.02\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"DMINUS\" class=\"0\">\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"D-\"/>\n<wire x1=\"-363.22\" y1=\"-109.22\" x2=\"-411.48\" y2=\"-109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-411.48\" y1=\"-109.22\" x2=\"-411.48\" y2=\"-154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"D-\"/>\n<wire x1=\"-411.48\" y1=\"-154.94\" x2=\"-419.1\" y2=\"-154.94\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"DPLUS\" class=\"0\">\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"D+\"/>\n<wire x1=\"-363.22\" y1=\"-111.76\" x2=\"-408.94\" y2=\"-111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-408.94\" y1=\"-111.76\" x2=\"-408.94\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"D+\"/>\n<wire x1=\"-408.94\" y1=\"-152.4\" x2=\"-419.1\" y2=\"-152.4\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L120_SYNC\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SYNC\"/>\n<wire x1=\"-200.66\" y1=\"17.78\" x2=\"-200.66\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-200.66\" y=\"25.4\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_120\"/>\n<wire x1=\"-403.86\" y1=\"68.58\" x2=\"-403.86\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-403.86\" y=\"73.66\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SYNC\"/>\n<wire x1=\"-63.5\" y1=\"17.78\" x2=\"-63.5\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-63.5\" y=\"25.4\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n</segment>\n</net>\n<net name=\"N$2\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN3_1\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"N$3\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN2_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN4_1\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"CGAIN1\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN3_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-302.26\" y1=\"-203.2\" x2=\"-299.72\" y2=\"-203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-302.26\" y1=\"-203.2\" x2=\"-302.26\" y2=\"-196.85\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-302.26\" y=\"-203.2\"/>\n<pinref part=\"CGAIN1_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-314.96\" y1=\"-196.85\" x2=\"-302.26\" y2=\"-196.85\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CL1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-314.96\" y1=\"-189.23\" x2=\"-314.96\" y2=\"-196.85\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-314.96\" y=\"-196.85\"/>\n</segment>\n</net>\n<net name=\"CGAIN2\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN4_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-302.26\" y1=\"-210.82\" x2=\"-302.26\" y2=\"-218.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"-299.72\" y1=\"-205.74\" x2=\"-302.26\" y2=\"-205.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-302.26\" y1=\"-205.74\" x2=\"-302.26\" y2=\"-210.82\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-302.26\" y=\"-210.82\"/>\n<pinref part=\"CH1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-314.96\" y1=\"-218.44\" x2=\"-302.26\" y2=\"-218.44\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$4\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN3_2\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"N$5\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN2_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN4_2\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"CGAIN3\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN3_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-231.14\" y1=\"-248.92\" x2=\"-228.6\" y2=\"-248.92\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-231.14\" y1=\"-248.92\" x2=\"-231.14\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-231.14\" y=\"-248.92\"/>\n<pinref part=\"CGAIN1_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-243.84\" y1=\"-242.57\" x2=\"-231.14\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"A\"/>\n<junction x=\"-228.6\" y=\"-248.92\"/>\n<pinref part=\"CL2\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-243.84\" y1=\"-237.49\" x2=\"-243.84\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-243.84\" y=\"-242.57\"/>\n</segment>\n</net>\n<net name=\"CGAIN4\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN4_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-231.14\" y1=\"-256.54\" x2=\"-231.14\" y2=\"-264.16\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-228.6\" y1=\"-251.46\" x2=\"-231.14\" y2=\"-251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-231.14\" y1=\"-251.46\" x2=\"-231.14\" y2=\"-256.54\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-231.14\" y=\"-256.54\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"B\"/>\n<junction x=\"-228.6\" y=\"-251.46\"/>\n<pinref part=\"CH2\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-243.84\" y1=\"-264.16\" x2=\"-231.14\" y2=\"-264.16\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$6\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN3_3\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"N$7\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN2_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN4_3\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"CGAIN5\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN3_3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-139.7\" y1=\"-248.92\" x2=\"-137.16\" y2=\"-248.92\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-139.7\" y1=\"-248.92\" x2=\"-139.7\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-139.7\" y=\"-248.92\"/>\n<pinref part=\"CGAIN1_3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-152.4\" y1=\"-242.57\" x2=\"-139.7\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"A\"/>\n<junction x=\"-137.16\" y=\"-248.92\"/>\n<pinref part=\"CL3\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-152.4\" y1=\"-237.49\" x2=\"-152.4\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-152.4\" y=\"-242.57\"/>\n</segment>\n</net>\n<net name=\"CGAIN6\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN4_3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-139.7\" y1=\"-256.54\" x2=\"-139.7\" y2=\"-264.16\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-137.16\" y1=\"-251.46\" x2=\"-139.7\" y2=\"-251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-139.7\" y1=\"-251.46\" x2=\"-139.7\" y2=\"-256.54\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-139.7\" y=\"-256.54\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"B\"/>\n<junction x=\"-137.16\" y=\"-251.46\"/>\n<pinref part=\"CH3\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-152.4\" y1=\"-264.16\" x2=\"-139.7\" y2=\"-264.16\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$8\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN3_4\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"N$9\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN2_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN4_4\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"CGAIN7\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN3_4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-43.18\" y1=\"-213.36\" x2=\"-40.64\" y2=\"-213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-43.18\" y1=\"-213.36\" x2=\"-43.18\" y2=\"-207.01\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-43.18\" y=\"-213.36\"/>\n<pinref part=\"CGAIN1_4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-55.88\" y1=\"-207.01\" x2=\"-43.18\" y2=\"-207.01\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"A\"/>\n<junction x=\"-40.64\" y=\"-213.36\"/>\n<pinref part=\"CL4\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-55.88\" y1=\"-201.93\" x2=\"-55.88\" y2=\"-207.01\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-55.88\" y=\"-207.01\"/>\n</segment>\n</net>\n<net name=\"CGAIN8\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN4_4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-43.18\" y1=\"-220.98\" x2=\"-43.18\" y2=\"-228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-40.64\" y1=\"-215.9\" x2=\"-43.18\" y2=\"-215.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-43.18\" y1=\"-215.9\" x2=\"-43.18\" y2=\"-220.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-43.18\" y=\"-220.98\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"B\"/>\n<junction x=\"-40.64\" y=\"-215.9\"/>\n<pinref part=\"CH4\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-55.88\" y1=\"-228.6\" x2=\"-43.18\" y2=\"-228.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"IO_122\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_122\"/>\n<wire x1=\"-408.94\" y1=\"78.74\" x2=\"-408.94\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-408.94\" y=\"71.12\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"10\"/>\n<wire x1=\"-454.66\" y1=\"104.14\" x2=\"-454.66\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-454.66\" y=\"93.98\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"L121\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_121\"/>\n<wire x1=\"-406.4\" y1=\"68.58\" x2=\"-406.4\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-406.4\" y=\"71.12\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<wire x1=\"-274.32\" y1=\"88.9\" x2=\"-284.48\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-279.4\" y=\"88.9\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"4\"/>\n<junction x=\"-284.48\" y=\"88.9\"/>\n</segment>\n</net>\n<net name=\"IO_119\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_119\"/>\n<wire x1=\"-398.78\" y1=\"68.58\" x2=\"-398.78\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-398.78\" y=\"71.12\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"8\"/>\n<wire x1=\"-459.74\" y1=\"104.14\" x2=\"-459.74\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-459.74\" y=\"93.98\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"IO_118\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_118\"/>\n<wire x1=\"-396.24\" y1=\"68.58\" x2=\"-396.24\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-396.24\" y=\"71.12\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"7\"/>\n<wire x1=\"-462.28\" y1=\"104.14\" x2=\"-462.28\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-462.28\" y=\"93.98\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"IO_114\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_114\"/>\n<wire x1=\"-393.7\" y1=\"68.58\" x2=\"-393.7\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-393.7\" y=\"71.12\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"-464.82\" y1=\"104.14\" x2=\"-464.82\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-464.82\" y=\"93.98\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"IO_111\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_111\"/>\n<wire x1=\"-386.08\" y1=\"68.58\" x2=\"-386.08\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-386.08\" y=\"71.12\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"-469.9\" y1=\"104.14\" x2=\"-469.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-469.9\" y=\"93.98\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"IO_110\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_110\"/>\n<wire x1=\"-383.54\" y1=\"80.01\" x2=\"-383.54\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-383.54\" y=\"71.12\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"-472.44\" y1=\"104.14\" x2=\"-472.44\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-472.44\" y=\"93.98\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"IO_113\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_113\"/>\n<wire x1=\"-391.16\" y1=\"68.58\" x2=\"-391.16\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-391.16\" y=\"71.12\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"-467.36\" y1=\"104.14\" x2=\"-467.36\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-467.36\" y=\"93.98\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"N$10\" class=\"0\">\n<segment>\n<pinref part=\"C_AC1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"DS1\"/>\n<wire x1=\"-242.57\" y1=\"-109.22\" x2=\"-238.76\" y2=\"-109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-238.76\" y1=\"-109.22\" x2=\"-238.76\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-238.76\" y1=\"-106.68\" x2=\"-238.76\" y2=\"-111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-238.76\" y=\"-106.68\"/>\n<wire x1=\"-238.76\" y1=\"-111.76\" x2=\"-238.76\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN1\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-238.76\" y=\"-116.84\"/>\n<pinref part=\"RIN5\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-238.76\" y=\"-111.76\"/>\n<pinref part=\"SW_SUPER1\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"-231.14\" y1=\"-119.38\" x2=\"-238.76\" y2=\"-119.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-238.76\" y1=\"-119.38\" x2=\"-238.76\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-238.76\" y1=\"-116.84\" x2=\"-242.57\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_1\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"INJ2\" class=\"0\">\n<segment>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"DS2\"/>\n<wire x1=\"-205.74\" y1=\"-88.9\" x2=\"-205.74\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_AC2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-205.74\" y1=\"-101.6\" x2=\"-209.55\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-205.74\" y=\"-101.6\"/>\n<pinref part=\"SW_TERM2\" gate=\"G$1\" pin=\"C\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<wire x1=\"-200.66\" y1=\"-86.36\" x2=\"-200.66\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-200.66\" y1=\"-88.9\" x2=\"-193.04\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-205.74\" y1=\"-88.9\" x2=\"-200.66\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-200.66\" y=\"-88.9\"/>\n</segment>\n</net>\n<net name=\"N$15\" class=\"0\">\n<segment>\n<pinref part=\"C_AC2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"DS1\"/>\n<wire x1=\"-209.55\" y1=\"-109.22\" x2=\"-205.74\" y2=\"-109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-205.74\" y1=\"-109.22\" x2=\"-205.74\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-205.74\" y1=\"-109.22\" x2=\"-205.74\" y2=\"-111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-205.74\" y=\"-109.22\"/>\n<pinref part=\"RIN2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-205.74\" y1=\"-111.76\" x2=\"-205.74\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-205.74\" y=\"-116.84\"/>\n<pinref part=\"RIN6\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-205.74\" y=\"-111.76\"/>\n<pinref part=\"SW_SUPER2\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"-198.12\" y1=\"-119.38\" x2=\"-205.74\" y2=\"-119.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-205.74\" y1=\"-119.38\" x2=\"-205.74\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-209.55\" y1=\"-116.84\" x2=\"-205.74\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INJ3\" class=\"0\">\n<segment>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"DS2\"/>\n<wire x1=\"-172.72\" y1=\"-88.9\" x2=\"-172.72\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_AC3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-172.72\" y1=\"-101.6\" x2=\"-176.53\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-172.72\" y=\"-101.6\"/>\n<pinref part=\"SW_TERM3\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"-167.64\" y1=\"-88.9\" x2=\"-160.02\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-167.64\" y1=\"-86.36\" x2=\"-167.64\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<wire x1=\"-172.72\" y1=\"-88.9\" x2=\"-167.64\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-167.64\" y=\"-88.9\"/>\n</segment>\n</net>\n<net name=\"INJ4\" class=\"0\">\n<segment>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"DS2\"/>\n<wire x1=\"-142.24\" y1=\"-88.9\" x2=\"-142.24\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_AC4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-142.24\" y1=\"-101.6\" x2=\"-146.05\" y2=\"-101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-142.24\" y=\"-101.6\"/>\n<pinref part=\"SW_TERM4\" gate=\"G$1\" pin=\"C\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<wire x1=\"-137.16\" y1=\"-86.36\" x2=\"-137.16\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-137.16\" y1=\"-88.9\" x2=\"-129.54\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-142.24\" y1=\"-88.9\" x2=\"-137.16\" y2=\"-88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-137.16\" y=\"-88.9\"/>\n</segment>\n</net>\n<net name=\"N$11\" class=\"0\">\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"ACR1\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-218.44\" y=\"-106.68\"/>\n</segment>\n</net>\n<net name=\"N$21\" class=\"0\">\n<segment>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"ACR2\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-185.42\" y=\"-106.68\"/>\n</segment>\n</net>\n<net name=\"N$32\" class=\"0\">\n<segment>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"ACR3\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-152.4\" y=\"-106.68\"/>\n</segment>\n</net>\n<net name=\"N$35\" class=\"0\">\n<segment>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"ACR4\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-121.92\" y=\"-106.68\"/>\n</segment>\n</net>\n<net name=\"N$1\" class=\"0\">\n<segment>\n<pinref part=\"RLED4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED4\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"N$12\" class=\"0\">\n<segment>\n<pinref part=\"RLED3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED3\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"N$13\" class=\"0\">\n<segment>\n<pinref part=\"RLED2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED2\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"N$14\" class=\"0\">\n<segment>\n<pinref part=\"RLED1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED1\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"N$17\" class=\"0\">\n<segment>\n<pinref part=\"RLED5\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED5\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"N$20\" class=\"0\">\n<segment>\n<pinref part=\"RIN1_10K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-227.33\" y1=\"-139.7\" x2=\"-233.68\" y2=\"-134.62\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_SUPER1\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-233.68\" y=\"-134.62\"/>\n<pinref part=\"CIN56_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-227.33\" y1=\"-139.7\" x2=\"-222.25\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-227.33\" y=\"-139.7\"/>\n</segment>\n</net>\n<net name=\"N$38\" class=\"0\">\n<segment>\n<pinref part=\"RIN2_10K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-200.66\" y1=\"-134.62\" x2=\"-194.31\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_SUPER2\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-200.66\" y=\"-134.62\"/>\n<pinref part=\"CIN56_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-194.31\" y1=\"-139.7\" x2=\"-189.23\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-194.31\" y=\"-139.7\"/>\n</segment>\n</net>\n<net name=\"N$39\" class=\"0\">\n<segment>\n<pinref part=\"C_AC3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"DS1\"/>\n<wire x1=\"-176.53\" y1=\"-109.22\" x2=\"-172.72\" y2=\"-109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-172.72\" y1=\"-109.22\" x2=\"-172.72\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-172.72\" y1=\"-109.22\" x2=\"-172.72\" y2=\"-111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-172.72\" y=\"-109.22\"/>\n<pinref part=\"RIN3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-172.72\" y1=\"-111.76\" x2=\"-172.72\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-172.72\" y=\"-116.84\"/>\n<pinref part=\"RIN7\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-172.72\" y=\"-111.76\"/>\n<pinref part=\"SW_SUPER3\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"-167.64\" y1=\"-119.38\" x2=\"-172.72\" y2=\"-119.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-172.72\" y1=\"-119.38\" x2=\"-172.72\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-176.53\" y1=\"-116.84\" x2=\"-172.72\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$40\" class=\"0\">\n<segment>\n<pinref part=\"RIN3_10K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-170.18\" y1=\"-134.62\" x2=\"-163.83\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_SUPER3\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-170.18\" y=\"-134.62\"/>\n<pinref part=\"CIN56_3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-163.83\" y1=\"-139.7\" x2=\"-158.75\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-163.83\" y=\"-139.7\"/>\n</segment>\n</net>\n<net name=\"N$41\" class=\"0\">\n<segment>\n<pinref part=\"C_AC4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"DS1\"/>\n<wire x1=\"-146.05\" y1=\"-109.22\" x2=\"-142.24\" y2=\"-109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-142.24\" y1=\"-109.22\" x2=\"-142.24\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-142.24\" y1=\"-109.22\" x2=\"-142.24\" y2=\"-111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-142.24\" y=\"-109.22\"/>\n<pinref part=\"RIN4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-142.24\" y1=\"-111.76\" x2=\"-142.24\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-142.24\" y=\"-116.84\"/>\n<pinref part=\"RIN8\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-142.24\" y=\"-111.76\"/>\n<pinref part=\"SW_SUPER4\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"-134.62\" y1=\"-119.38\" x2=\"-142.24\" y2=\"-119.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-142.24\" y1=\"-119.38\" x2=\"-142.24\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-146.05\" y1=\"-116.84\" x2=\"-142.24\" y2=\"-116.84\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$16\" class=\"0\">\n<segment>\n<pinref part=\"RLED6\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED6\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"N$19\" class=\"0\">\n<segment>\n<pinref part=\"RLED7\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED7\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"N$22\" class=\"0\">\n<segment>\n<pinref part=\"RLED8\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED8\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"LED8\" class=\"0\">\n<segment>\n<wire x1=\"-109.22\" y1=\"99.06\" x2=\"-111.76\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"LED8\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-109.22\" y1=\"109.22\" x2=\"-111.76\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-106.68\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPA7\"/>\n<wire x1=\"-144.78\" y1=\"104.14\" x2=\"-134.62\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LED7\" class=\"0\">\n<segment>\n<wire x1=\"-101.6\" y1=\"99.06\" x2=\"-104.14\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"LED7\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-101.6\" y1=\"109.22\" x2=\"-104.14\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-99.06\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPA6\"/>\n<wire x1=\"-144.78\" y1=\"106.68\" x2=\"-134.62\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"106.68\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LED6\" class=\"0\">\n<segment>\n<wire x1=\"-93.98\" y1=\"99.06\" x2=\"-96.52\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"LED6\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"-93.98\" y1=\"109.22\" x2=\"-96.52\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-91.44\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X24_TOP\" gate=\"G$1\" pin=\"GPA5\"/>\n<wire x1=\"-144.78\" y1=\"109.22\" x2=\"-134.62\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-139.7\" y=\"109.22\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INAMINUS2\" class=\"0\">\n<segment>\n<pinref part=\"RIN3_10K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-170.18\" y1=\"-144.78\" x2=\"-170.18\" y2=\"-154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"-INA\"/>\n<label x=\"-154.94\" y=\"-187.96\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<wire x1=\"-165.1\" y1=\"-208.28\" x2=\"-154.94\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-154.94\" y1=\"-208.28\" x2=\"-154.94\" y2=\"-233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-160.02\" y1=\"-233.68\" x2=\"-160.02\" y2=\"-237.49\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-160.02\" y1=\"-237.49\" x2=\"-160.02\" y2=\"-242.316\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-160.02\" y1=\"-242.316\" x2=\"-160.02\" y2=\"-242.57\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-160.02\" y1=\"-242.57\" x2=\"-160.02\" y2=\"-248.92\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-160.02\" y1=\"-248.92\" x2=\"-160.02\" y2=\"-256.286\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-160.02\" y1=\"-256.286\" x2=\"-160.02\" y2=\"-256.54\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-160.02\" y1=\"-256.54\" x2=\"-160.02\" y2=\"-264.16\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-154.94\" y1=\"-233.68\" x2=\"-160.02\" y2=\"-233.68\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-160.02\" y=\"-242.316\"/>\n<pinref part=\"RGAIN1_3\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-160.02\" y=\"-248.92\"/>\n<junction x=\"-160.02\" y=\"-256.286\"/>\n<pinref part=\"RGAIN2_3\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-160.02\" y=\"-256.54\"/>\n<pinref part=\"CGAIN1_3\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"-160.02\" y=\"-242.57\"/>\n<wire x1=\"-154.94\" y1=\"-208.28\" x2=\"-154.94\" y2=\"-154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-154.94\" y=\"-208.28\"/>\n<wire x1=\"-170.18\" y1=\"-154.94\" x2=\"-154.94\" y2=\"-154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-176.53\" y1=\"-124.46\" x2=\"-172.72\" y2=\"-127\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-172.72\" y1=\"-127\" x2=\"-172.72\" y2=\"-154.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-172.72\" y1=\"-154.94\" x2=\"-170.18\" y2=\"-154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-172.72\" y=\"-127\"/>\n<junction x=\"-170.18\" y=\"-154.94\"/>\n<junction x=\"-170.18\" y=\"-144.78\"/>\n<pinref part=\"CIN5_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CIN1NF_3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-163.83\" y1=\"-147.32\" x2=\"-158.75\" y2=\"-147.32\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-163.83\" y1=\"-147.32\" x2=\"-170.18\" y2=\"-154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-163.83\" y=\"-147.32\"/>\n<pinref part=\"CL3\" gate=\"G$1\" pin=\"3\"/>\n<junction x=\"-160.02\" y=\"-237.49\"/>\n<pinref part=\"CH3\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"N$44\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_A\"/>\n<pinref part=\"ROFFSET1\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-520.7\" y=\"-149.86\"/>\n</segment>\n</net>\n<net name=\"N$45\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_B\"/>\n<pinref part=\"ROFFSET2\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-520.7\" y=\"-147.32\"/>\n</segment>\n</net>\n<net name=\"N$46\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_C\"/>\n<pinref part=\"ROFFSET3\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-520.7\" y=\"-144.78\"/>\n</segment>\n</net>\n<net name=\"N$47\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_D\"/>\n<pinref part=\"ROFFSET4\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-520.7\" y=\"-142.24\"/>\n</segment>\n</net>\n<net name=\"VCCA\" class=\"2\">\n<segment>\n<pinref part=\"CP4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-547.37\" y1=\"-99.06\" x2=\"-538.48\" y2=\"-99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-538.48\" y1=\"-99.06\" x2=\"-538.48\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-538.48\" y1=\"-91.44\" x2=\"-538.48\" y2=\"-99.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-538.48\" y=\"-99.06\"/>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"OUT\"/>\n<junction x=\"-547.37\" y=\"-99.06\"/>\n<pinref part=\"CP9\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-538.48\" y1=\"-106.68\" x2=\"-528.32\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-538.48\" y=\"-106.68\"/>\n<pinref part=\"U$1\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW1\" gate=\"P\" pin=\"VCC\"/>\n<wire x1=\"-279.4\" y1=\"-198.12\" x2=\"-284.48\" y2=\"-198.12\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$2\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW2\" gate=\"P\" pin=\"VCC\"/>\n<wire x1=\"-208.28\" y1=\"-243.84\" x2=\"-213.36\" y2=\"-243.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$3\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW3\" gate=\"P\" pin=\"VCC\"/>\n<wire x1=\"-116.84\" y1=\"-243.84\" x2=\"-121.92\" y2=\"-243.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$4\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW4\" gate=\"P\" pin=\"VCC\"/>\n<wire x1=\"-20.32\" y1=\"-208.28\" x2=\"-25.4\" y2=\"-208.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$5\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"U2\" gate=\"A\" pin=\"V+\"/>\n<wire x1=\"-109.22\" y1=\"-200.66\" x2=\"-109.22\" y2=\"-205.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C5VOPAMP2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-109.22\" y1=\"-195.58\" x2=\"-109.22\" y2=\"-200.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$6\" gate=\"G$1\" pin=\"VCCA\"/>\n<junction x=\"-109.22\" y=\"-200.66\"/>\n</segment>\n<segment>\n<pinref part=\"U1\" gate=\"A\" pin=\"V+\"/>\n<wire x1=\"-190.5\" y1=\"-200.66\" x2=\"-190.5\" y2=\"-205.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C5VOPAMP1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-190.5\" y1=\"-195.58\" x2=\"-190.5\" y2=\"-200.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$7\" gate=\"G$1\" pin=\"VCCA\"/>\n<junction x=\"-190.5\" y=\"-200.66\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VDD\"/>\n<wire x1=\"-571.5\" y1=\"-129.54\" x2=\"-563.88\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSET\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"-563.88\" y1=\"-139.7\" x2=\"-558.8\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-563.88\" y=\"-139.7\"/>\n<pinref part=\"U$8\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"CADD2_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-10.16\" y1=\"33.02\" x2=\"-27.94\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-10.16\" y1=\"45.72\" x2=\"-10.16\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-10.16\" y=\"33.02\"/>\n<label x=\"-17.78\" y=\"33.02\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"U$9\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-10.16\" y1=\"7.62\" x2=\"-27.94\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-10.16\" y1=\"20.32\" x2=\"-10.16\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-10.16\" y=\"7.62\"/>\n<label x=\"-17.78\" y=\"7.62\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"U$10\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"AVDD1\"/>\n<wire x1=\"-248.92\" y1=\"-27.94\" x2=\"-241.3\" y2=\"-27.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-256.54\" y=\"-27.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"AVDD2\"/>\n<wire x1=\"-248.92\" y1=\"-30.48\" x2=\"-241.3\" y2=\"-30.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-256.54\" y=\"-30.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"AVDD1\"/>\n<wire x1=\"-111.76\" y1=\"-27.94\" x2=\"-104.14\" y2=\"-27.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-119.38\" y=\"-27.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"AVDD2\"/>\n<wire x1=\"-104.14\" y1=\"-30.48\" x2=\"-114.3\" y2=\"-30.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-119.38\" y=\"-30.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"CADD2_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-147.32\" y1=\"33.02\" x2=\"-165.1\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-147.32\" y1=\"45.72\" x2=\"-147.32\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-147.32\" y=\"33.02\"/>\n<label x=\"-154.94\" y=\"33.02\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"U$11\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-147.32\" y1=\"7.62\" x2=\"-165.1\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-147.32\" y1=\"20.32\" x2=\"-147.32\" y2=\"7.62\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-147.32\" y=\"7.62\"/>\n<label x=\"-154.94\" y=\"7.62\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"U$12\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$13\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$15\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n</net>\n<net name=\"N$48\" class=\"3\">\n<segment>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"IN\"/>\n<wire x1=\"-570.23\" y1=\"-99.06\" x2=\"-576.58\" y2=\"-99.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-570.23\" y=\"-99.06\"/>\n<pinref part=\"CP3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CP7\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CP8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-594.36\" y1=\"-106.68\" x2=\"-584.2\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-584.2\" y=\"-106.68\"/>\n<wire x1=\"-584.2\" y1=\"-106.68\" x2=\"-576.58\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-576.58\" y1=\"-99.06\" x2=\"-576.58\" y2=\"-106.68\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-576.58\" y=\"-106.68\"/>\n<pinref part=\"L2\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-576.58\" y=\"-99.06\"/>\n</segment>\n</net>\n<net name=\"N$49\" class=\"3\">\n<segment>\n<pinref part=\"REG\" gate=\"G$1\" pin=\"IN\"/>\n<wire x1=\"-570.23\" y1=\"-66.04\" x2=\"-576.58\" y2=\"-66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-570.23\" y=\"-66.04\"/>\n<pinref part=\"CP5\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CP1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CP2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-594.36\" y1=\"-73.66\" x2=\"-584.2\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-584.2\" y=\"-73.66\"/>\n<wire x1=\"-584.2\" y1=\"-73.66\" x2=\"-576.58\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"-576.58\" y1=\"-66.04\" x2=\"-576.58\" y2=\"-73.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-576.58\" y=\"-73.66\"/>\n<pinref part=\"L1\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-576.58\" y=\"-66.04\"/>\n</segment>\n</net>\n<net name=\"E_SHDN2\" class=\"0\">\n<segment>\n<wire x1=\"-63.5\" y1=\"-45.72\" x2=\"-63.5\" y2=\"-35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-63.5\" y=\"-35.56\" size=\"1.778\" layer=\"95\" rot=\"R270\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SHDN\"/>\n<junction x=\"-63.5\" y=\"-35.56\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB5\"/>\n<wire x1=\"-210.82\" y1=\"86.36\" x2=\"-200.66\" y2=\"86.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"-205.74\" y=\"86.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$34\" class=\"0\">\n<segment>\n<pinref part=\"RLEDPOW\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LEDPOW\" gate=\"G$1\" pin=\"C\"/>\n</segment>\n</net>\n<net name=\"N$36\" class=\"0\">\n<segment>\n<pinref part=\"CIN56_4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-129.54\" y1=\"-139.7\" x2=\"-125.73\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN4_10K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"-137.16\" y1=\"-134.62\" x2=\"-130.81\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_SUPER4\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"-137.16\" y=\"-134.62\"/>\n<wire x1=\"-125.73\" y1=\"-139.7\" x2=\"-130.81\" y2=\"-139.7\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"-125.73\" y=\"-139.7\"/>\n<junction x=\"-130.81\" y=\"-139.7\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n</sheets>\n<errors>\n<approved hash=\"104,1,-553.72,-20.32,OSC,VDD,+3V3,,,\"/>\n<approved hash=\"202,1,-528.32,-30.48,OSC,TRI,,,,\"/>\n<approved hash=\"104,1,-241.3,-27.94,IC1,AVDD1,VCCA,,,\"/>\n<approved hash=\"104,1,-241.3,-30.48,IC1,AVDD2,VCCA,,,\"/>\n<approved hash=\"104,1,-104.14,-27.94,IC2,AVDD1,VCCA,,,\"/>\n<approved hash=\"104,1,-104.14,-30.48,IC2,AVDD2,VCCA,,,\"/>\n<approved hash=\"204,1,-363.22,-119.38,USB1,SLD,,,,\"/>\n<approved hash=\"104,1,-284.48,-198.12,GAINSW1P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,-213.36,-243.84,GAINSW2P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,-121.92,-243.84,GAINSW3P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,-25.4,-208.28,GAINSW4P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,-236.22,121.92,IOEXPAND_0X20_BOT,VDD,+3V3,,,\"/>\n<approved hash=\"104,1,-236.22,81.28,IOEXPAND_0X20_BOT,VSS,GND,,,\"/>\n<approved hash=\"104,1,-170.18,121.92,IOEXPAND_0X24_TOP,VDD,+3V3,,,\"/>\n<approved hash=\"104,1,-170.18,81.28,IOEXPAND_0X24_TOP,VSS,GND,,,\"/>\n<approved hash=\"104,1,-96.52,71.12,OVSAMP1P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,-96.52,48.26,OVSAMP2P,VCC,VCCA,,,\"/>\n<approved hash=\"106,1,-200.66,-12.7,DCLKA1,,,,,\"/>\n<approved hash=\"106,1,-63.5,-12.7,DCLKA2,,,,,\"/>\n<approved hash=\"106,1,-200.66,-17.78,DCLKB1,,,,,\"/>\n<approved hash=\"106,1,-63.5,-17.78,DCLKB2,,,,,\"/>\n<approved hash=\"106,1,-200.66,-10.16,DORA1,,,,,\"/>\n<approved hash=\"106,1,-63.5,-10.16,DORA2,,,,,\"/>\n<approved hash=\"106,1,-200.66,-15.24,DORB1,,,,,\"/>\n<approved hash=\"106,1,-63.5,-15.24,DORB2,,,,,\"/>\n</errors>\n</schematic>\n</drawing>\n<compatibility>\n<note version=\"6.3\" minversion=\"6.2.2\" severity=\"warning\">\nSince Version 6.2.2 text objects can contain more than one line,\nwhich will not be processed correctly with this version.\n</note>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/max10adc_v9.0.brd",
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textsize=\"0.8128\" layer=\"37\" dtype=\"vertical\" visible=\"yes\"/>\n<text x=\"-8.31\" y=\"-6.49\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">by Dr. Andy Haas</text>\n<text x=\"37.4\" y=\"14.1\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">1</text>\n<text x=\"33.4\" y=\"14\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">50MHz</text>\n<text x=\"45.5\" y=\"-9.9\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">Reset</text>\n<wire x1=\"-7.3\" y1=\"-1.2\" x2=\"12.7\" y2=\"-1.2\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.3\" y1=\"-10.8\" x2=\"12.7\" y2=\"-10.8\" width=\"0.1524\" layer=\"21\"/>\n<text x=\"65.7\" y=\"-0.1\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">50</text>\n<text x=\"71.6\" y=\"62.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">50</text>\n<text x=\"75.8\" y=\"59.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">1M</text>\n<text x=\"76.7\" y=\"32.3\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">200</text>\n<text x=\"76.5\" y=\"20.9\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">200</text>\n<text x=\"70.9\" y=\"-8.3\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">200</text>\n<text x=\"70.2\" y=\"60.7\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">200</text>\n<dimension x1=\"-10\" y1=\"22\" x2=\"15.4\" y2=\"22\" x3=\"2.7\" y3=\"24.21598125\" textsize=\"0.8128\" layer=\"37\" visible=\"yes\"/>\n<text x=\"-8.21\" y=\"53.31\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">22pF</text>\n<text x=\"8\" y=\"8\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">560 Ohm</text>\n<text x=\"40.3\" y=\"14.8\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">10nF</text>\n<circle x=\"9.7\" y=\"23.6\" radius=\"0.5099\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-0.9\" y=\"23.6\" radius=\"0.5099\" width=\"0.1524\" layer=\"21\"/>\n<text x=\"49.7\" y=\"65.6\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">Super gain</text>\n<text x=\"5.49\" y=\"61.71\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">3.3V\npower</text>\n<text x=\"64.6\" y=\"-2.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">low gain</text>\n<text x=\"72.4\" y=\"-2.6\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">high gain</text>\n<text x=\"72\" y=\"51.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">high gain</text>\n<text x=\"64\" y=\"52.1\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">low gain</text>\n<wire x1=\"-11.3\" y1=\"17.8\" x2=\"16.7\" y2=\"17.8\" width=\"0.1524\" layer=\"21\"/>\n<text x=\"19.71\" y=\"48.51\" size=\"0.8128\" layer=\"21\" font=\"vector\">3.3V</text>\n<text x=\"25.31\" y=\"48.51\" size=\"0.8128\" layer=\"21\" font=\"vector\">5V</text>\n<text x=\"30.11\" y=\"48.51\" size=\"0.8128\" layer=\"21\" font=\"vector\">GND</text>\n<text x=\"33.71\" y=\"47.31\" size=\"0.8128\" layer=\"21\" font=\"vector\">121\nExtTrig</text>\n<text x=\"38.99\" y=\"48.21\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">AIN1</text>\n<text x=\"40.3\" y=\"14.8\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">10nF</text>\n<text x=\"20.1\" y=\"8\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">AIN6</text>\n<text x=\"38\" y=\"8\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">AIN14</text>\n<text x=\"21.19\" y=\"55.41\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">101</text>\n<text x=\"38.99\" y=\"55.21\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">GND</text>\n<text x=\"36.49\" y=\"55.21\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">3.3V</text>\n<text x=\"23.79\" y=\"55.41\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">100</text>\n<text x=\"26.29\" y=\"56.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">91</text>\n<text x=\"28.89\" y=\"56.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">90</text>\n<text x=\"31.39\" y=\"56.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">89</text>\n<text x=\"33.89\" y=\"56.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">88</text>\n<text x=\"16.81\" y=\"24.91\" size=\"0.8128\" layer=\"21\" font=\"vector\">GND</text>\n<text x=\"16.81\" y=\"27.41\" size=\"0.8128\" layer=\"21\" font=\"vector\">5V</text>\n<text x=\"-8.29\" y=\"45.51\" size=\"0.8128\" layer=\"21\" font=\"vector\">5V</text>\n<text x=\"-8.39\" y=\"47.91\" size=\"0.8128\" layer=\"21\" font=\"vector\">GND</text>\n<text x=\"16.81\" y=\"30.01\" size=\"0.8128\" layer=\"21\" font=\"vector\">110</text>\n<text x=\"16.81\" y=\"32.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">111</text>\n<text x=\"16.81\" y=\"35.01\" size=\"0.8128\" layer=\"21\" font=\"vector\">113</text>\n<text x=\"16.81\" y=\"37.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">114</text>\n<text x=\"16.81\" y=\"40.11\" size=\"0.8128\" layer=\"21\" font=\"vector\">118</text>\n<text x=\"16.81\" y=\"42.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">119</text>\n<text x=\"16.81\" y=\"45.21\" size=\"0.8128\" layer=\"21\" font=\"vector\">105</text>\n<text x=\"16.81\" y=\"47.61\" size=\"0.8128\" layer=\"21\" font=\"vector\">122</text>\n<text x=\"-8.49\" y=\"42.91\" size=\"0.8128\" layer=\"21\" font=\"vector\">140</text>\n<text x=\"-8.49\" y=\"40.31\" size=\"0.8128\" layer=\"21\" font=\"vector\">135</text>\n<text x=\"-8.49\" y=\"37.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">134</text>\n<text x=\"-8.49\" y=\"35.21\" size=\"0.8128\" layer=\"21\" font=\"vector\">131</text>\n<text x=\"-8.49\" y=\"32.71\" size=\"0.8128\" layer=\"21\" font=\"vector\">132</text>\n<text x=\"-7.81\" y=\"29.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">130</text>\n<text x=\"-7.81\" y=\"27.01\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">127</text>\n<text x=\"-7.81\" y=\"24.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">124</text>\n<text x=\"20\" y=\"-11.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">GND</text>\n<text x=\"22.5\" y=\"-11.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">RX L</text>\n<text x=\"28.2\" y=\"-11.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">TRIG\nOUT</text>\n<text x=\"25\" y=\"-11.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">TX L</text>\n<text x=\"30.8\" y=\"-11.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">TRIG\nIN</text>\n<text x=\"32.6\" y=\"-11.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">5V</text>\n<text x=\"35.2\" y=\"-11.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">SPR L</text>\n<text x=\"38.3\" y=\"-11.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">CLK\nOUT</text>\n<text x=\"18.99\" y=\"64.71\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">GND</text>\n<text x=\"21.49\" y=\"64.71\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">RX</text>\n<text x=\"24.09\" y=\"64.71\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">TX</text>\n<text x=\"26.09\" y=\"64.71\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">TRG\nIN</text>\n<text x=\"28.79\" y=\"64.71\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">TRG\nOUT</text>\n<text x=\"31.69\" y=\"64.71\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">5V</text>\n<text x=\"34.19\" y=\"64.71\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">SPR</text>\n<text x=\"36.29\" y=\"64.71\" size=\"0.8128\" layer=\"22\" font=\"vector\" rot=\"MR90\">CLK\nIN</text>\n<text x=\"-7.11\" y=\"62.81\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">1.6mm</text>\n<dimension x1=\"100\" y1=\"32\" x2=\"100\" y2=\"22\" x3=\"98.6\" y3=\"27\" textsize=\"0.8128\" layer=\"37\" dtype=\"vertical\" visible=\"yes\"/>\n<dimension x1=\"100\" y1=\"53\" x2=\"100\" y2=\"43\" x3=\"98.6\" y3=\"48\" textsize=\"0.8128\" layer=\"37\" dtype=\"vertical\" visible=\"yes\"/>\n<text x=\"55.7\" y=\"31.6\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">Super gain</text>\n<text x=\"77.6\" y=\"31.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">50</text>\n<text x=\"77.6\" y=\"24.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">50</text>\n<text x=\"48.7\" y=\"-3.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">Super gain</text>\n<text x=\"71.6\" y=\"-6.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">50</text>\n<text x=\"19.9\" y=\"-3.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">EIO1</text>\n<text x=\"22.5\" y=\"-3.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">EIO2</text>\n<text x=\"25\" y=\"-3.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">EIO3</text>\n<text x=\"27.6\" y=\"-3.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">EIO4</text>\n<text x=\"32.6\" y=\"-5.9\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">141_SCL</text>\n<text x=\"35.2\" y=\"-5.2\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">21_SDA</text>\n<text x=\"37.7\" y=\"-3.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">3.3V</text>\n<text x=\"30.1\" y=\"-3.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">GND</text>\n<text x=\"13.9\" y=\"-10.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">JTAG</text>\n<text x=\"84.4\" y=\"-10.1\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CH 0</text>\n<text x=\"84.4\" y=\"10.9\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CH 1</text>\n<text x=\"84.4\" y=\"31.9\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CH 2</text>\n<text x=\"84.4\" y=\"52.9\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CH 3</text>\n<dimension x1=\"76\" y1=\"16.7\" x2=\"76\" y2=\"-4.2\" x3=\"82\" y3=\"6.25\" textsize=\"0.8128\" layer=\"37\" visible=\"yes\"/>\n<text x=\"16.6\" y=\"-1.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">10k</text>\n</plain>\n<libraries>\n<library name=\"rcl\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      3006Y&lt;BR&gt;\n      3009P&lt;BR&gt;\n      3009W&lt;BR&gt;\n      3009Y&lt;BR&gt;\n      3057J&lt;BR&gt;\n      3057L&lt;BR&gt;\n      3057P&lt;BR&gt;\n      3057Y&lt;BR&gt;\n      3059J&lt;BR&gt;\n      3059L&lt;BR&gt;\n      3059P&lt;BR&gt;\n      3059Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      89P&lt;BR&gt;\n      89W&lt;BR&gt;\n      89X&lt;BR&gt;\n      89PH&lt;BR&gt;\n      76P&lt;BR&gt;\n      89XH&lt;BR&gt;\n      78SLT&lt;BR&gt;\n      78L&amp;nbsp;ALT&lt;BR&gt;\n      56P&amp;nbsp;ALT&lt;BR&gt;\n      78P&amp;nbsp;ALT&lt;BR&gt;\n      T8S&lt;BR&gt;\n      78L&lt;BR&gt;\n      56P&lt;BR&gt;\n      78P&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      T18/784&lt;BR&gt;\n      783&lt;BR&gt;\n      781&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2199&lt;BR&gt;\n      1697/1897&lt;BR&gt;\n      1680/1880&lt;BR&gt;\n      2187&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      8035EKP/CT20/RJ-20P&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ-20X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      1211L&lt;BR&gt;\n      8012EKQ&amp;nbsp;ALT&lt;BR&gt;\n      8012EKR&amp;nbsp;ALT&lt;BR&gt;\n      1211P&lt;BR&gt;\n      8012EKJ&lt;BR&gt;\n      8012EKL&lt;BR&gt;\n      8012EKQ&lt;BR&gt;\n      8012EKR&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      2101P&lt;BR&gt;\n      2101W&lt;BR&gt;\n      2101Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2102L&lt;BR&gt;\n      2102S&lt;BR&gt;\n      2102Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVMCOG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      43P&lt;BR&gt;\n      43W&lt;BR&gt;\n      43Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      40L&lt;BR&gt;\n      40P&lt;BR&gt;\n      40Y&lt;BR&gt;\n      70Y-T602&lt;BR&gt;\n      70L&lt;BR&gt;\n      70P&lt;BR&gt;\n      70Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      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T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    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50-4-X&lt;BR&gt;\n      50-3-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      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25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      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ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n    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FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      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ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;</description>\n<packages>\n<package name=\"C0805K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0805 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 2012</description>\n<wire x1=\"-0.925\" y1=\"0.6\" x2=\"0.925\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.925\" y1=\"-0.6\" x2=\"-0.925\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1\" y=\"0.875\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-1.9\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1\" y1=\"-0.65\" x2=\"-0.5\" y2=\"0.65\" layer=\"51\"/>\n<rectangle x1=\"0.5\" y1=\"-0.65\" x2=\"1\" y2=\"0.65\" layer=\"51\"/>\n</package>\n</packages>\n</library>\n<library name=\"led\">\n<description>&lt;b&gt;LEDs&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;br&gt;\nExtended by Federico Battaglin &lt;author&gt;&amp;lt;federico.rd@fdpinternational.com&amp;gt;&lt;/author&gt; with DUOLED</description>\n<packages>\n<package name=\"SML0805\">\n<description>&lt;b&gt;SML0805-2CW-TR (0805 PROFILE)&lt;/b&gt; COOL WHITE&lt;p&gt;\nSource: http://www.ledtronics.com/ds/smd-0603/Dstr0093.pdf</description>\n<wire x1=\"-0.95\" y1=\"-0.55\" x2=\"0.95\" y2=\"-0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.95\" y1=\"-0.55\" x2=\"0.95\" y2=\"0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.95\" y1=\"0.55\" x2=\"-0.95\" y2=\"0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.95\" y1=\"0.55\" x2=\"-0.95\" y2=\"-0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.175\" y1=\"-0.025\" x2=\"0\" y2=\"0.15\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"0.15\" x2=\"0.15\" y2=\"0\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"0.15\" y1=\"0\" x2=\"-0.025\" y2=\"-0.175\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"-0.025\" y1=\"-0.175\" x2=\"-0.175\" y2=\"-0.025\" width=\"0.0634\" layer=\"21\"/>\n<circle x=\"-0.275\" y=\"0.4\" radius=\"0.125\" width=\"0\" layer=\"21\"/>\n<smd name=\"C\" x=\"-1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"A\" x=\"1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<text x=\"-1.5\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.5\" y=\"-2\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n</library>\n<library name=\"resistor\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,203,138,231\" href=\"../directory.asp\" title=\"\"&gt;\n&lt;area shape=\"default\" nohref&gt;\n&lt;/map&gt;\n\n&lt;html&gt;\n\n&lt;title&gt;&lt;/title&gt;\n\n &lt;LINK REL=\"StyleSheet\" TYPE=\"text/css\" HREF=\"style-sheet.css\"&gt;\n\n&lt;body bgcolor=\"#ffffff\" text=\"#000000\" marginwidth=\"0\" marginheight=\"0\" topmargin=\"0\" leftmargin=\"0\"&gt;\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0 height=\"55%\"&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;/td&gt;\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      3006Y&lt;BR&gt;\n      3009P&lt;BR&gt;\n      3009W&lt;BR&gt;\n      3009Y&lt;BR&gt;\n      3057J&lt;BR&gt;\n      3057L&lt;BR&gt;\n      3057P&lt;BR&gt;\n      3057Y&lt;BR&gt;\n      3059J&lt;BR&gt;\n      3059L&lt;BR&gt;\n      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ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      8035EKP/CT20/RJ-20P&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ-20X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      1211L&lt;BR&gt;\n      8012EKQ&amp;nbsp;ALT&lt;BR&gt;\n      8012EKR&amp;nbsp;ALT&lt;BR&gt;\n      1211P&lt;BR&gt;\n      8012EKJ&lt;BR&gt;\n      8012EKL&lt;BR&gt;\n      8012EKQ&lt;BR&gt;\n      8012EKR&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      2101P&lt;BR&gt;\n      2101W&lt;BR&gt;\n      2101Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2102L&lt;BR&gt;\n      2102S&lt;BR&gt;\n      2102Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVMCOG&lt;BR&gt;\n     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FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      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66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n  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-&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n   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72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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&lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n 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&lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;\n&lt;/BODY&gt;&lt;/HTML&gt;</description>\n<packages>\n<package name=\"R0805\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;</description>\n<wire x1=\"-0.41\" y1=\"0.635\" x2=\"0.41\" y2=\"0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-0.41\" y1=\"-0.635\" x2=\"0.41\" y2=\"-0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.973\" y1=\"0.983\" x2=\"1.973\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.973\" y1=\"0.983\" x2=\"1.973\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.973\" y1=\"-0.983\" x2=\"-1.973\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.973\" y1=\"-0.983\" x2=\"-1.973\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"0\" dx=\"1.3\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"2\" 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name=\"SSOP28\">\n<description>&lt;b&gt;Shrink Small Outline Package&lt;/b&gt;&lt;p&gt;\npackage type SS</description>\n<wire x1=\"-5.1\" y1=\"-2.6\" x2=\"5.1\" y2=\"-2.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.1\" y1=\"-2.6\" x2=\"5.1\" y2=\"2.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.1\" y1=\"2.6\" x2=\"-5.1\" y2=\"2.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.225\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"-3.575\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"3\" x=\"-2.925\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"4\" x=\"-2.275\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"5\" x=\"-1.625\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"6\" x=\"-0.975\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"7\" x=\"-0.325\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"8\" x=\"0.325\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"9\" x=\"0.975\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"10\" x=\"1.625\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"11\" x=\"2.275\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"12\" x=\"2.925\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"13\" x=\"3.575\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"14\" x=\"4.225\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"15\" x=\"4.225\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"16\" x=\"3.575\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"17\" x=\"2.925\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"18\" x=\"2.275\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"19\" x=\"1.625\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"20\" x=\"0.975\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"21\" x=\"0.325\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"22\" x=\"-0.325\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"23\" x=\"-0.975\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"24\" x=\"-1.625\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"25\" x=\"-2.275\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"26\" x=\"-2.925\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"27\" x=\"-3.575\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"28\" x=\"-4.225\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<text x=\"-5.476\" y=\"-2.6299\" size=\"1.27\" layer=\"25\" rot=\"R90\">&gt;NAME</text>\n<text x=\"-3.8999\" y=\"-0.68\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-4.4028\" y1=\"-3.937\" x2=\"-4.0472\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-3.7529\" y1=\"-3.937\" x2=\"-3.3973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-3.1029\" y1=\"-3.937\" x2=\"-2.7473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-2.4529\" y1=\"-3.937\" x2=\"-2.0973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-1.8029\" y1=\"-3.937\" x2=\"-1.4473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-1.1529\" y1=\"-3.937\" x2=\"-0.7973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-0.5029\" y1=\"-3.937\" x2=\"-0.1473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"0.1473\" y1=\"-3.937\" x2=\"0.5029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"0.7973\" y1=\"-3.937\" x2=\"1.1529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"1.4473\" y1=\"-3.937\" x2=\"1.8029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"2.0973\" y1=\"-3.937\" x2=\"2.4529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"2.7473\" y1=\"-3.937\" x2=\"3.1029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"3.3973\" y1=\"-3.937\" x2=\"3.7529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"4.0472\" y1=\"-3.937\" x2=\"4.4028\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"4.0472\" y1=\"2.6416\" x2=\"4.4028\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"3.3973\" y1=\"2.6416\" x2=\"3.7529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"2.7473\" y1=\"2.6416\" x2=\"3.1029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"2.0973\" y1=\"2.6416\" x2=\"2.4529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"1.4473\" y1=\"2.6416\" x2=\"1.8029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"0.7973\" y1=\"2.6416\" x2=\"1.1529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"0.1473\" y1=\"2.6416\" x2=\"0.5029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-0.5029\" y1=\"2.6416\" x2=\"-0.1473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-1.1529\" y1=\"2.6416\" x2=\"-0.7973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-1.8029\" y1=\"2.6416\" x2=\"-1.4473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-2.4529\" y1=\"2.6416\" x2=\"-2.0973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-3.1029\" y1=\"2.6416\" x2=\"-2.7473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-3.7529\" y1=\"2.6416\" x2=\"-3.3973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-4.4028\" y1=\"2.6416\" x2=\"-4.0472\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-5.1999\" y1=\"-2.5999\" x2=\"-4.225\" y2=\"2.5999\" layer=\"27\"/>\n</package>\n</packages>\n</library>\n<library name=\"rcl@1\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" 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3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      3292P&lt;BR&gt;\n      3292W&lt;BR&gt;\n      3292X&lt;BR&gt;\n      3296P&lt;BR&gt;\n      3296W&lt;BR&gt;\n      3296X&lt;BR&gt;\n      3296Y&lt;BR&gt;\n      3296Z&lt;BR&gt;\n      3299P&lt;BR&gt;\n      3299W&lt;BR&gt;\n      3299X&lt;BR&gt;\n      3299Y&lt;BR&gt;\n      3299Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n 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RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      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91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n 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&lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n 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&lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;</description>\n<packages>\n<package name=\"C0603\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-0.356\" y1=\"0.432\" x2=\"0.356\" y2=\"0.432\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.356\" y1=\"-0.419\" x2=\"0.356\" y2=\"-0.419\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.85\" y=\"0\" dx=\"1.1\" dy=\"1\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.85\" y=\"0\" dx=\"1.1\" dy=\"1\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8382\" y1=\"-0.4699\" x2=\"-0.3381\" y2=\"0.4801\" layer=\"51\"/>\n<rectangle x1=\"0.3302\" y1=\"-0.4699\" x2=\"0.8303\" y2=\"0.4801\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n</package>\n<package name=\"C1206\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-2.473\" y1=\"0.983\" x2=\"2.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"2.473\" y1=\"-0.983\" x2=\"-2.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-2.473\" y1=\"-0.983\" x2=\"-2.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"2.473\" y1=\"0.983\" x2=\"2.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-0.965\" y1=\"0.787\" x2=\"0.965\" y2=\"0.787\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.965\" y1=\"-0.787\" x2=\"0.965\" y2=\"-0.787\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.4\" y=\"0\" dx=\"1.6\" dy=\"1.8\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.4\" y=\"0\" dx=\"1.6\" dy=\"1.8\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.7018\" y1=\"-0.8509\" x2=\"-0.9517\" y2=\"0.8491\" layer=\"51\"/>\n<rectangle x1=\"0.9517\" y1=\"-0.8491\" x2=\"1.7018\" y2=\"0.8509\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.4001\" x2=\"0.1999\" y2=\"0.4001\" layer=\"35\"/>\n</package>\n</packages>\n</library>\n<library name=\"usb-serial\">\n<packages>\n<package name=\"SOIC16\">\n<description>&lt;b&gt;SMALL OUTLINE INTEGRATED CIRCUIT&lt;/b&gt;&lt;p&gt;\n16-Pin (150-Mil) SOIC&lt;br&gt;\nSource: http://www.cypress.com .. 38-12025_0P_V.pdf</description>\n<wire x1=\"4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<circle x=\"-4.05\" y=\"-0.995\" radius=\"0.3256\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"2\" x=\"-3.175\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"13\" x=\"-0.635\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"1\" x=\"-4.445\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"3\" x=\"-1.905\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"4\" 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y=\"-2.54\" size=\"1.016\" layer=\"21\" font=\"vector\" rot=\"R90\">CH340G</text>\n<rectangle x1=\"-4.6901\" y1=\"-2.921\" x2=\"-4.1999\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-3.4201\" y1=\"-2.921\" x2=\"-2.9299\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-2.1501\" y1=\"-2.921\" x2=\"-1.6599\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-0.8801\" y1=\"-2.921\" x2=\"-0.3899\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"0.3899\" y1=\"-2.921\" x2=\"0.8801\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"1.6599\" y1=\"-2.921\" x2=\"2.1501\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"2.9299\" y1=\"-2.921\" x2=\"3.4201\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"4.1999\" y1=\"-2.921\" x2=\"4.6901\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"4.1999\" y1=\"1.8951\" x2=\"4.6901\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"2.9299\" y1=\"1.8951\" x2=\"3.4201\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"1.6599\" y1=\"1.8951\" x2=\"2.1501\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"0.3899\" y1=\"1.8951\" x2=\"0.8801\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-0.8801\" y1=\"1.8951\" x2=\"-0.3899\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-2.1501\" y1=\"1.8951\" x2=\"-1.6599\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-3.4201\" y1=\"1.8951\" x2=\"-2.9299\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-4.6901\" y1=\"1.8951\" x2=\"-4.1999\" y2=\"2.921\" layer=\"51\"/>\n</package>\n</packages>\n</library>\n<library name=\"SparkFun-FreqCtrl\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find crystals and oscillators and other things that go \"tick\".&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"HC49US\">\n<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>\n<wire x1=\"-3.429\" y1=\"-2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"180\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<text x=\"-5.08\" y=\"-3.937\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-5.08\" y=\"2.667\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n</package>\n</packages>\n</library>\n<library name=\"Luca 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x=\"0\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"4\" x=\"0.5\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"5\" x=\"1\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"6\" x=\"1\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"7\" x=\"0.5\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"8\" x=\"0\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"9\" x=\"-0.5\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"10\" x=\"-1\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-2.032\" y=\"-2.54\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\">&gt;NAME</text>\n<text x=\"3.302\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.1244\" y1=\"-2.5\" x2=\"-0.8744\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"-0.6244\" y1=\"-2.5\" x2=\"-0.3744\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"-0.1244\" y1=\"-2.5\" x2=\"0.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.3756\" y1=\"-2.5\" x2=\"0.6256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8756\" y1=\"-2.5\" x2=\"1.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8744\" y1=\"1.5\" x2=\"1.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"0.3744\" y1=\"1.5\" x2=\"0.6244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.1256\" y1=\"1.5\" x2=\"0.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.6256\" y1=\"1.5\" x2=\"-0.3756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-1.1256\" y1=\"1.5\" x2=\"-0.8756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n</package>\n</packages>\n</library>\n<library name=\"Seeed-Connector\" urn=\"urn:adsk.eagle:library:478\">\n<packages>\n<package name=\"H10-2.54\" urn=\"urn:adsk.eagle:footprint:33050/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"-12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"-12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0\" layer=\"39\"/>\n<pad name=\"1\" x=\"0\" y=\"11.43\" drill=\"0.889\" diameter=\"1.651\" shape=\"square\"/>\n<pad name=\"2\" x=\"0\" y=\"8.89\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"3\" x=\"0\" y=\"6.35\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"4\" x=\"0\" y=\"3.81\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"5\" x=\"0\" y=\"1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"6\" x=\"0\" y=\"-1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"7\" x=\"0\" y=\"-3.81\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"8\" x=\"0\" y=\"-6.35\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"9\" x=\"0\" y=\"-8.89\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"10\" x=\"0\" y=\"-11.43\" drill=\"0.889\" diameter=\"1.651\"/>\n<text x=\"2.54\" y=\"-1.27\" size=\"0.889\" layer=\"27\" ratio=\"11\" rot=\"R90\">&gt;value</text>\n<text x=\"-1.905\" y=\"-1.27\" size=\"0.889\" layer=\"25\" ratio=\"11\" rot=\"R90\">&gt;name</text>\n<text x=\"0.635\" y=\"2.54\" size=\"1.27\" layer=\"33\" ratio=\"10\" rot=\"R90\">&gt;name</text>\n<rectangle x1=\"-1.27\" y1=\"-12.7\" x2=\"1.27\" y2=\"12.7\" layer=\"39\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"H10-2.54\" urn=\"urn:adsk.eagle:package:33117/1\" type=\"box\" library_version=\"1\">\n</package3d>\n</packages3d>\n</library>\n<library name=\"relay\" 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radius=\"0.254\" width=\"0\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.27\" y=\"-3\" dx=\"0.8\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.27\" y=\"-3\" dx=\"0.8\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.27\" y=\"3\" dx=\"0.8\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"4\" x=\"-1.27\" y=\"3\" dx=\"0.8\" dy=\"1.2\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"25\" rot=\"R90\">&gt;NAME</text>\n<text x=\"3.81\" y=\"-2.54\" size=\"1.27\" layer=\"27\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.5\" y1=\"-3.35\" x2=\"-1\" y2=\"-2.1\" layer=\"51\"/>\n<rectangle x1=\"1.04\" y1=\"-3.35\" x2=\"1.54\" y2=\"-2.1\" layer=\"51\"/>\n<rectangle x1=\"1\" y1=\"2.1\" x2=\"1.5\" y2=\"3.35\" layer=\"51\"/>\n<rectangle x1=\"-1.54\" y1=\"2.1\" x2=\"-1.04\" y2=\"3.35\" layer=\"51\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"SOP04\" urn=\"urn:adsk.eagle:package:24376/1\" type=\"box\" library_version=\"1\">\n<description>SOP 04 - 4.3x4.4mm RM 2.54mm AQY21, AQY22, AQY61 Series NAiSSource: http://www.mew-europe.com/..  pti_en.pdf</description>\n</package3d>\n</packages3d>\n</library>\n<library name=\"pinhead+\">\n<packages>\n<package name=\"2X08_SMT\">\n<wire x1=\"-10.16\" y1=\"2.54\" x2=\"10.16\" y2=\"2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"10.16\" y1=\"2.54\" x2=\"10.16\" y2=\"-2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"10.16\" y1=\"-2.54\" x2=\"-10.16\" y2=\"-2.54\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-10.16\" y1=\"-2.54\" x2=\"-10.16\" y2=\"2.54\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"2\" x=\"-8.89\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"1\" x=\"-8.89\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"-6.35\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-6.35\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"5\" x=\"-3.81\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"6\" x=\"-3.81\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"7\" x=\"-1.27\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"8\" x=\"-1.27\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"9\" x=\"1.27\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"10\" x=\"1.27\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"11\" x=\"3.81\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"12\" x=\"3.81\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"13\" x=\"6.35\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"14\" x=\"6.35\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<smd name=\"15\" x=\"8.89\" y=\"-2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"16\" x=\"8.89\" y=\"2.921\" dx=\"1.27\" dy=\"2.032\" layer=\"1\"/>\n<text x=\"-10.16\" y=\"5.715\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.16\" y=\"-6.985\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n</library>\n<library name=\"SparkFun-Passives\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find resistors, capacitors, inductors, test points, jumper pads, etc.&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"1210\">\n<wire x1=\"-1.6\" y1=\"1.3\" x2=\"1.6\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.6\" y1=\"1.3\" x2=\"1.6\" y2=\"-1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.6\" y1=\"-1.3\" x2=\"-1.6\" y2=\"-1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.6\" y1=\"-1.3\" x2=\"-1.6\" y2=\"1.3\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.6\" y1=\"1.3\" x2=\"1.6\" y2=\"1.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.6\" y1=\"-1.3\" x2=\"1.6\" y2=\"-1.3\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.6\" y=\"0\" dx=\"1.2\" dy=\"2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.6\" y=\"0\" dx=\"1.2\" dy=\"2\" layer=\"1\"/>\n<text x=\"-0.8\" y=\"0.5\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.9\" y=\"-0.7\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"CTZ3\">\n<description>Land pattern for variable capacitor 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name=\"oshw\">\n<description>&lt;p&gt;&lt;strong&gt;Open Source Hardware PCB Logos&lt;/strong&gt;\n&lt;p&gt;A simple polygon based version of the OSHWA logos for use on Eagle PCB's\n&lt;p&gt;For use please refer to the OSHWA definition at &lt;a href=\"http://www.oshwa.org/definition/\"&gt;http://www.oshwa.org/definition/&lt;/a&gt;\n&lt;p&gt;Based on the NBitWonder version (&lt;a href=\"http://nbitwonder.com\"&gt;http://nbitwonder.com&lt;/a&gt;)\n&lt;p&gt;&lt;strong&gt;Andrew Cooper&lt;/strong&gt;&lt;br&gt;28Nov2016&lt;br&gt;&lt;a href=\"http://www.darkerview.com\"&gt;www.DarkerView.com&lt;/a&gt;</description>\n<packages>\n<package name=\"OSHW_8MM\">\n<polygon width=\"0.0508\" layer=\"25\">\n<vertex x=\"-0.381\" y=\"-0.9906\" curve=\"-160.613168\"/>\n<vertex x=\"0\" y=\"1.0668\" curve=\"-162.088112\"/>\n<vertex x=\"0.4572\" y=\"-0.9906\"/>\n<vertex x=\"1.1176\" y=\"-2.6924\"/>\n<vertex x=\"1.2954\" y=\"-2.5908\"/>\n<vertex x=\"1.4732\" y=\"-2.4892\"/>\n<vertex x=\"1.651\" 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Starr&lt;br&gt;\nhttp://www.bobstarr.net</description>\n<packages>\n<package name=\"JS202011SCQN\">\n<description>DPDT SLIDE SWITCH</description>\n<smd name=\"1\" x=\"-2.5\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"0\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"2.5\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"6\" x=\"2.5\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"5\" x=\"0\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-2.5\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<wire x1=\"-4.5\" y1=\"1.8\" x2=\"4.5\" y2=\"1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"1.8\" x2=\"4.5\" y2=\"-1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"-1.8\" x2=\"-4.5\" y2=\"-1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-4.5\" y1=\"-1.8\" x2=\"-4.5\" y2=\"1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"1\" x2=\"2.5\" y2=\"1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"1\" x2=\"2.5\" y2=\"-1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"-1\" x2=\"-2.5\" y2=\"-1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"-1\" x2=\"-2.5\" y2=\"1\" width=\"0.0508\" layer=\"51\"/>\n<rectangle x1=\"-2.25\" y1=\"-0.75\" x2=\"-0.25\" y2=\"0.75\" layer=\"51\"/>\n<wire x1=\"-3.5\" y1=\"2\" x2=\"-4.75\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.75\" y1=\"2\" x2=\"-4.75\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.75\" y1=\"-2\" x2=\"-3.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.5\" y1=\"2\" x2=\"4.75\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.75\" y1=\"2\" x2=\"4.75\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.75\" y1=\"-2\" x2=\"3.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.5\" y1=\"2\" x2=\"-1\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"2\" x2=\"1.5\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"-2\" x2=\"1.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.5\" y1=\"-2\" x2=\"-1\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"-5.25\" y=\"-2\" size=\"1.016\" layer=\"25\" ratio=\"18\" rot=\"R90\">&gt;NAME</text>\n<text x=\"6\" y=\"-2\" size=\"0.8128\" layer=\"27\" ratio=\"10\" rot=\"R90\">&gt;VALUE</text>\n</package>\n</packages>\n</library>\n<library name=\"resistor\" urn=\"urn:adsk.eagle:library:348\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" 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&lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      3292P&lt;BR&gt;\n      3292W&lt;BR&gt;\n      3292X&lt;BR&gt;\n      3296P&lt;BR&gt;\n      3296W&lt;BR&gt;\n      3296X&lt;BR&gt;\n      3296Y&lt;BR&gt;\n      3296Z&lt;BR&gt;\n      3299P&lt;BR&gt;\n      3299W&lt;BR&gt;\n      3299X&lt;BR&gt;\n      3299Y&lt;BR&gt;\n      3299Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&amp;nbsp;ALT&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      64X&amp;nbsp;ALT&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66P&lt;BR&gt;\n      66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      25P&lt;BR&gt;\n      25S&lt;BR&gt;\n      25RX&lt;BR&gt;\n      82P&lt;BR&gt;\n      82M&lt;BR&gt;\n      82PA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      91E&lt;BR&gt;\n      91X&lt;BR&gt;\n      91T&lt;BR&gt;\n      91B&lt;BR&gt;\n      91A&lt;BR&gt;\n      91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n   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CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n  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EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS 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layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.5001\" x2=\"0.1999\" y2=\"0.5001\" layer=\"35\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"R0805\" urn=\"urn:adsk.eagle:package:26059/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R0805\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"1\" name=\"gnd\" width=\"0.3048\" drill=\"0\">\n</class>\n<class number=\"2\" name=\"three\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"3\" name=\"five\" width=\"0.381\" drill=\"0\">\n</class>\n</classes>\n<designrules name=\"Seeed_AllPCB_MacroFab_haas6mil\">\n<description language=\"en\">\n\n\n\n\n\n\n&lt;b&gt;EAGLE Design Rules&lt;/b&gt;\n&lt;p&gt;\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name.\n</description>\n<param name=\"layerSetup\" value=\"(1*2*15*16)\"/>\n<param name=\"mtCopper\" value=\"0.035mm 0.0175mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.0175mm 0.035mm\"/>\n<param name=\"mtIsolate\" value=\"0.2mm 0.3mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm\"/>\n<param name=\"mdWireWire\" value=\"6mil\"/>\n<param name=\"mdWirePad\" value=\"6mil\"/>\n<param name=\"mdWireVia\" value=\"6mil\"/>\n<param name=\"mdPadPad\" value=\"6mil\"/>\n<param name=\"mdPadVia\" value=\"6mil\"/>\n<param name=\"mdViaVia\" value=\"6mil\"/>\n<param name=\"mdSmdPad\" value=\"0mil\"/>\n<param name=\"mdSmdVia\" value=\"0mil\"/>\n<param name=\"mdSmdSmd\" value=\"0mil\"/>\n<param name=\"mdViaViaSameLayer\" value=\"8mil\"/>\n<param name=\"mnLayersViaInSmd\" value=\"2\"/>\n<param name=\"mdCopperDimension\" value=\"6mil\"/>\n<param name=\"mdDrill\" value=\"6mil\"/>\n<param name=\"mdSmdStop\" value=\"0mil\"/>\n<param name=\"msWidth\" value=\"6mil\"/>\n<param name=\"msDrill\" value=\"12mil\"/>\n<param name=\"msMicroVia\" value=\"12mil\"/>\n<param name=\"msBlindViaRatio\" value=\"0.5\"/>\n<param name=\"rvPadTop\" value=\"0.25\"/>\n<param name=\"rvPadInner\" value=\"0.25\"/>\n<param name=\"rvPadBottom\" value=\"0.25\"/>\n<param name=\"rvViaOuter\" value=\"0.25\"/>\n<param name=\"rvViaInner\" value=\"0.25\"/>\n<param name=\"rvMicroViaOuter\" value=\"0.25\"/>\n<param name=\"rvMicroViaInner\" value=\"0.25\"/>\n<param name=\"rlMinPadTop\" value=\"6mil\"/>\n<param name=\"rlMaxPadTop\" value=\"20mil\"/>\n<param name=\"rlMinPadInner\" value=\"6mil\"/>\n<param name=\"rlMaxPadInner\" value=\"20mil\"/>\n<param name=\"rlMinPadBottom\" value=\"6mil\"/>\n<param name=\"rlMaxPadBottom\" value=\"20mil\"/>\n<param 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value=\"0\"/>\n<param name=\"srMinRoundness\" value=\"0mil\"/>\n<param name=\"srMaxRoundness\" value=\"0mil\"/>\n<param name=\"slThermalIsolate\" value=\"10mil\"/>\n<param name=\"slThermalsForVias\" value=\"0\"/>\n<param name=\"dpMaxLengthDifference\" value=\"10mm\"/>\n<param name=\"dpGapFactor\" value=\"2.5\"/>\n<param name=\"checkAngle\" value=\"0\"/>\n<param name=\"checkFont\" value=\"1\"/>\n<param name=\"checkRestrict\" value=\"1\"/>\n<param name=\"checkStop\" value=\"0\"/>\n<param name=\"checkValues\" value=\"0\"/>\n<param name=\"checkNames\" value=\"1\"/>\n<param name=\"checkWireStubs\" value=\"1\"/>\n<param name=\"checkPolygonWidth\" value=\"0\"/>\n<param name=\"useDiameter\" value=\"13\"/>\n<param name=\"maxErrors\" value=\"999999\"/>\n</designrules>\n<autorouter>\n<pass name=\"Default\">\n<param name=\"RoutingGrid\" value=\"0.05mm\"/>\n<param name=\"AutoGrid\" value=\"0\"/>\n<param name=\"Efforts\" value=\"1\"/>\n<param name=\"TopRouterVariant\" value=\"0\"/>\n<param name=\"tpViaShape\" value=\"round\"/>\n<param name=\"PrefDir.1\" value=\"*\"/>\n<param name=\"PrefDir.2\" value=\"*\"/>\n<param name=\"PrefDir.3\" value=\"0\"/>\n<param name=\"PrefDir.4\" value=\"0\"/>\n<param name=\"PrefDir.5\" value=\"0\"/>\n<param name=\"PrefDir.6\" value=\"0\"/>\n<param name=\"PrefDir.7\" value=\"0\"/>\n<param name=\"PrefDir.8\" value=\"0\"/>\n<param name=\"PrefDir.9\" value=\"0\"/>\n<param name=\"PrefDir.10\" value=\"0\"/>\n<param name=\"PrefDir.11\" value=\"0\"/>\n<param name=\"PrefDir.12\" value=\"0\"/>\n<param name=\"PrefDir.13\" value=\"0\"/>\n<param name=\"PrefDir.14\" value=\"0\"/>\n<param name=\"PrefDir.15\" value=\"*\"/>\n<param name=\"PrefDir.16\" value=\"*\"/>\n<param name=\"cfVia\" value=\"8\"/>\n<param name=\"cfNonPref\" value=\"5\"/>\n<param name=\"cfChangeDir\" value=\"2\"/>\n<param name=\"cfOrthStep\" value=\"2\"/>\n<param name=\"cfDiagStep\" value=\"3\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"1\"/>\n<param name=\"cfMalusStep\" value=\"1\"/>\n<param name=\"cfPadImpact\" value=\"4\"/>\n<param name=\"cfSmdImpact\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"0\"/>\n<param name=\"cfHugging\" value=\"3\"/>\n<param name=\"cfAvoid\" value=\"4\"/>\n<param name=\"cfPolygon\" value=\"10\"/>\n<param name=\"cfBase.1\" value=\"1\"/>\n<param name=\"cfBase.2\" value=\"9\"/>\n<param name=\"cfBase.3\" value=\"1\"/>\n<param name=\"cfBase.4\" value=\"1\"/>\n<param name=\"cfBase.5\" value=\"1\"/>\n<param name=\"cfBase.6\" value=\"1\"/>\n<param name=\"cfBase.7\" value=\"1\"/>\n<param name=\"cfBase.8\" value=\"1\"/>\n<param name=\"cfBase.9\" value=\"1\"/>\n<param name=\"cfBase.10\" value=\"1\"/>\n<param name=\"cfBase.11\" value=\"1\"/>\n<param name=\"cfBase.12\" value=\"1\"/>\n<param name=\"cfBase.13\" value=\"1\"/>\n<param name=\"cfBase.14\" value=\"1\"/>\n<param name=\"cfBase.15\" value=\"0\"/>\n<param name=\"cfBase.16\" value=\"0\"/>\n<param name=\"mnVias\" value=\"20\"/>\n<param name=\"mnSegments\" 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y2=\"58.5516875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.3589\" y1=\"58.5516875\" x2=\"10.9666\" y2=\"61.1593875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.9666\" y1=\"61.1593875\" x2=\"10.9666\" y2=\"63.09765625\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.9666\" y1=\"63.09765625\" x2=\"11\" y2=\"63.13105625\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"64.05\" x2=\"12\" y2=\"65.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"63.13105625\" x2=\"11\" y2=\"64.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"27.5\" x2=\"47.5\" y2=\"20.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"27.5\" x2=\"47.6\" y2=\"27.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.6\" y1=\"35.2\" x2=\"47.5\" y2=\"35.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.3\" y1=\"35.2\" x2=\"46.6\" y2=\"35.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.7\" y1=\"36.8\" x2=\"42.3\" y2=\"35.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"47.5\" y1=\"35.2\" x2=\"47.5\" y2=\"35.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.7\" y1=\"36.8\" x2=\"40.75\" y2=\"36.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"34.3\" x2=\"47.5\" y2=\"31\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"46.6\" y1=\"35.2\" x2=\"47.5\" y2=\"34.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45.1\" y1=\"12.8\" x2=\"47.5\" y2=\"15.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45\" y1=\"12.8\" x2=\"45.1\" y2=\"12.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"15.2\" x2=\"47.5\" y2=\"15.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45\" y1=\"43.2\" x2=\"47.4\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.4\" y1=\"40.8\" x2=\"47.5\" y2=\"40.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45\" y1=\"43.2\" x2=\"45\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"18.6\" x2=\"37.3\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.6\" y1=\"18.3\" x2=\"37.3\" y2=\"18.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.6\" y1=\"14.8\" x2=\"37.6\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"19.3\" x2=\"37.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.6\" y1=\"14.8\" x2=\"37.695\" y2=\"14.705\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.7\" y1=\"18.1\" x2=\"45\" y2=\"12.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.6\" y1=\"36.9\" x2=\"46.6\" y2=\"35.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.6\" y1=\"42.9\" x2=\"46.6\" y2=\"36.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.6\" y1=\"44.2\" x2=\"52.6\" y2=\"42.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"50.8\" y1=\"46\" x2=\"52.6\" y2=\"44.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42\" y1=\"46\" x2=\"50.8\" y2=\"46\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"46.6\" y=\"35.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"36.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"47.5\" y=\"31\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TCK\">\n<contactref element=\"RJ2\" pad=\"1\"/>\n<contactref element=\"FPGA\" pad=\"18\"/>\n<contactref element=\"JP1\" pad=\"1\"/>\n<wire x1=\"30.7\" y1=\"18.4\" x2=\"30.7\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.7\" y1=\"17.3\" x2=\"30.7\" y2=\"18.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.6\" y1=\"14.2\" x2=\"30.7\" y2=\"17.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.6\" y1=\"12.2\" x2=\"27.6\" y2=\"14.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.7\" y1=\"-4.7\" x2=\"14.4\" y2=\"-1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.4\" y1=\"-1\" x2=\"27.6\" y2=\"12.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.1\" y1=\"-4.7\" x2=\"10.7\" y2=\"-4.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.7\" y1=\"19.3\" x2=\"30.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.1\" y1=\"-4.7\" x2=\"8.08\" y2=\"-4.73\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.4\" y1=\"-1\" x2=\"14.4\" y2=\"0.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"0.2\" x2=\"14.38\" y2=\"0.26\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"30.7\" y=\"18.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"14.4\" y=\"-1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TDO\">\n<contactref element=\"FPGA\" pad=\"20\"/>\n<contactref element=\"JP1\" pad=\"2\"/>\n<wire x1=\"31.7\" y1=\"18.6\" x2=\"31.7\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.6\" y1=\"17.5\" x2=\"31.7\" y2=\"18.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.1\" y1=\"17.5\" x2=\"30.6\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.1\" y1=\"17.2\" x2=\"30.1\" y2=\"17.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.4\" y1=\"6.5\" x2=\"30.1\" y2=\"17.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.4\" y1=\"4.5\" x2=\"19.4\" y2=\"6.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.5\" y1=\"-0.4\" x2=\"19.4\" y2=\"4.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.9\" y1=\"-0.4\" x2=\"14.5\" y2=\"-0.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.6\" y1=\"-4.7\" x2=\"9.9\" y2=\"-0.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.7\" y1=\"19.3\" x2=\"31.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.6\" y1=\"-4.7\" x2=\"5.54\" y2=\"-4.73\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"30.1\" y=\"17.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TMS\">\n<contactref element=\"RJ3\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"16\"/>\n<contactref element=\"JP1\" pad=\"3\"/>\n<wire x1=\"29.8\" y1=\"18.4\" x2=\"29.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.6\" y1=\"18.4\" x2=\"29.8\" y2=\"18.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.7\" y1=\"15.5\" x2=\"28.6\" y2=\"18.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.7\" y1=\"14.6\" x2=\"25.7\" y2=\"15.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.8\" y1=\"6.7\" x2=\"25.7\" y2=\"14.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.1\" y1=\"6.7\" x2=\"17.8\" y2=\"6.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.9\" y1=\"4.5\" x2=\"15.1\" y2=\"6.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"7.8\" y1=\"4.5\" x2=\"12.9\" y2=\"4.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3\" y1=\"-0.3\" x2=\"7.8\" y2=\"4.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3\" y1=\"-4.73\" x2=\"3\" y2=\"-0.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.8\" y1=\"19.3\" x2=\"29.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.7\" y1=\"13.3\" x2=\"14.39\" y2=\"13.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.8\" y1=\"12.4\" x2=\"13.7\" y2=\"13.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.8\" y1=\"9.8\" x2=\"12.8\" y2=\"12.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"9.3\" x2=\"12.8\" y2=\"9.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.3\" y1=\"9.3\" x2=\"13.3\" y2=\"9.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.8\" y1=\"6.8\" x2=\"15.3\" y2=\"9.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.8\" y1=\"6.8\" x2=\"17.8\" y2=\"6.7\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"29.8\" y=\"18.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"17.8\" y=\"6.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.3\" y=\"9.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TDI\">\n<contactref element=\"RJ4\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"19\"/>\n<contactref element=\"JP1\" pad=\"5\"/>\n<wire x1=\"31.2\" y1=\"19.9\" x2=\"31.2\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.7\" y1=\"20.4\" x2=\"31.2\" y2=\"19.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.3\" y1=\"20.4\" x2=\"30.7\" y2=\"20.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.7\" y1=\"21\" x2=\"30.3\" y2=\"20.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"21.2\" y1=\"21\" x2=\"29.7\" y2=\"21\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"14\" y1=\"13.8\" x2=\"21.2\" y2=\"21\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"14\" y1=\"6.8\" x2=\"14\" y2=\"13.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.1\" y1=\"4.9\" x2=\"13.1\" y2=\"5.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.1\" y1=\"5.9\" x2=\"14\" y2=\"6.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"7.6\" y1=\"4.9\" x2=\"12.1\" y2=\"4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-2\" y1=\"-4.7\" x2=\"7.6\" y2=\"4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"31.2\" y1=\"19.4\" x2=\"31.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2\" y1=\"-4.7\" x2=\"-2.08\" y2=\"-4.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"5.7\" x2=\"14.3\" y2=\"4.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.1\" y1=\"5.9\" x2=\"13.3\" y2=\"5.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"14.3\" y1=\"4.7\" x2=\"14.38\" y2=\"4.7\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"30.7\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.3\" y=\"5.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"JTAGEN\">\n<contactref element=\"RJ5\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"15\"/>\n<contactref element=\"JP1\" pad=\"7\"/>\n<wire x1=\"29.3\" y1=\"20.2\" x2=\"29.3\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.5\" y1=\"20.4\" x2=\"29.3\" y2=\"20.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.9\" y1=\"21\" x2=\"29.5\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.5\" y1=\"21\" x2=\"28.9\" y2=\"21\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18\" y1=\"15.5\" x2=\"23.5\" y2=\"21\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18\" y1=\"13.4\" x2=\"18\" y2=\"15.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.8\" y1=\"12.2\" x2=\"18\" y2=\"13.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.4\" y1=\"12.2\" x2=\"16.8\" y2=\"12.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.4\" y1=\"11.2\" x2=\"13.4\" y2=\"12.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.3\" y1=\"19.4\" x2=\"29.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"11.2\" x2=\"14.41\" y2=\"11.14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.5\" y1=\"-7.2\" x2=\"0.5\" y2=\"-7.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.9\" y1=\"-5.8\" x2=\"1.5\" y2=\"-7.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3.5\" y1=\"-5.8\" x2=\"2.9\" y2=\"-5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"4.4\" y1=\"-4.9\" x2=\"3.5\" y2=\"-5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"4.4\" y1=\"-3.2\" x2=\"4.4\" y2=\"-4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"9\" y1=\"1.4\" x2=\"4.4\" y2=\"-3.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"9\" y1=\"1.7\" x2=\"9\" y2=\"1.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.9\" y1=\"2.6\" x2=\"9\" y2=\"1.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.9\" y1=\"6.9\" x2=\"9.9\" y2=\"2.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.8\" y1=\"9.8\" x2=\"9.9\" y2=\"6.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.8\" y1=\"11.6\" x2=\"12.8\" y2=\"9.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.4\" y1=\"12.2\" x2=\"12.8\" y2=\"11.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.5\" y1=\"-7.2\" x2=\"0.46\" y2=\"-7.27\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"29.5\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.4\" y=\"12.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"9\" y=\"1.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CONFIG_SEL\">\n<contactref element=\"FPGA\" pad=\"126\"/>\n<contactref element=\"RS6\" pad=\"2\"/>\n<wire x1=\"19.2\" y1=\"30.4\" x2=\"20.2\" y2=\"30.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.2\" y1=\"29.6\" x2=\"19.2\" y2=\"30.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"26.9\" x2=\"19.2\" y2=\"29.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"23.9\" x2=\"16.5\" y2=\"26.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.3\" y1=\"19.7\" x2=\"16.5\" y2=\"23.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.3\" y1=\"6.7\" x2=\"12.3\" y2=\"19.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.7\" y1=\"6.3\" x2=\"12.3\" y2=\"6.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.7\" y1=\"4.1\" x2=\"12.7\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.3\" y1=\"2.5\" x2=\"12.7\" y2=\"4.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.2\" y1=\"30.4\" x2=\"20.21\" y2=\"30.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.3\" y1=\"2.5\" x2=\"14.39\" y2=\"2.42\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"19.2\" y=\"30.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"12.7\" y=\"6.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CONF\">\n<contactref element=\"FPGA\" pad=\"138\"/>\n<contactref element=\"RS7\" pad=\"2\"/>\n<wire x1=\"23.2\" y1=\"24.3\" x2=\"20.3\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"23\" x2=\"23.2\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"20.4\" x2=\"24.5\" y2=\"23\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"19.4\" x2=\"24.5\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.2\" y1=\"10.1\" x2=\"24.5\" y2=\"19.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.4\" y1=\"10.1\" x2=\"15.2\" y2=\"10.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.5\" y1=\"9\" x2=\"13.4\" y2=\"10.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"24.3\" x2=\"20.21\" y2=\"24.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.5\" y1=\"9\" x2=\"14.42\" y2=\"8.98\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"24.5\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.4\" y=\"10.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"STATUS\">\n<contactref element=\"FPGA\" pad=\"136\"/>\n<contactref element=\"RS8\" pad=\"2\"/>\n<wire x1=\"18.6\" y1=\"25.4\" x2=\"20.2\" y2=\"25.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.6\" y1=\"23.5\" x2=\"18.6\" y2=\"25.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.7\" y1=\"17.6\" x2=\"18.6\" y2=\"23.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.7\" y1=\"8.4\" x2=\"12.7\" y2=\"17.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"7.8\" x2=\"12.7\" y2=\"8.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.5\" y1=\"7.8\" x2=\"13.3\" y2=\"7.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"6.9\" x2=\"13.5\" y2=\"7.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.2\" y1=\"25.4\" x2=\"20.21\" y2=\"25.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"6.9\" x2=\"14.41\" y2=\"6.82\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"18.6\" y=\"25.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.3\" y=\"7.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"NCONF\">\n<contactref element=\"FPGA\" pad=\"129\"/>\n<contactref element=\"RS9\" pad=\"2\"/>\n<contactref element=\"SW_RESET\" pad=\"P$4\"/>\n<wire x1=\"19.2\" y1=\"28.8\" x2=\"20.2\" y2=\"28.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.2\" y1=\"23.6\" x2=\"19.2\" y2=\"24.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.2\" y1=\"24.2\" x2=\"19.2\" y2=\"28.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"17.7\" x2=\"19.2\" y2=\"23.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.3\" y1=\"16.4\" x2=\"13.3\" y2=\"17.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.5\" y1=\"16.4\" x2=\"13.3\" y2=\"16.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"15.5\" x2=\"13.5\" y2=\"16.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.2\" y1=\"28.8\" x2=\"20.21\" y2=\"28.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"15.5\" x2=\"14.42\" y2=\"15.42\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"-5.6\" x2=\"41.7\" y2=\"-6.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"2.8\" x2=\"41.7\" y2=\"-5.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37\" y1=\"7.5\" x2=\"41.7\" y2=\"2.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37\" y1=\"13\" x2=\"37\" y2=\"7.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.7\" y1=\"13.7\" x2=\"37\" y2=\"13\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.7\" y1=\"18.3\" x2=\"37.7\" y2=\"13.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"31.8\" y1=\"24.2\" x2=\"37.7\" y2=\"18.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.2\" y1=\"24.2\" x2=\"31.8\" y2=\"24.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.7\" y1=\"-6.4\" x2=\"41.725\" y2=\"-6.425\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"19.2\" y=\"28.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.3\" y=\"16.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"41.7\" y=\"-5.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"37.7\" y=\"13.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED1\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"21\"/>\n<contactref element=\"LED1\" pad=\"A\"/>\n<wire x1=\"-6.5\" y1=\"8.1\" x2=\"-6.5\" y2=\"7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"18.9\" x2=\"-6.5\" y2=\"8.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.9\" y1=\"28.3\" x2=\"-6.5\" y2=\"18.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3\" y1=\"28.3\" x2=\"2.9\" y2=\"28.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.2\" y1=\"28.3\" x2=\"3\" y2=\"28.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.6\" y1=\"27.9\" x2=\"3.2\" y2=\"28.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"27.9\" x2=\"3.6\" y2=\"27.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"7\" x2=\"-6.58\" y2=\"6.98\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"27.9\" x2=\"4.375\" y2=\"27.825\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-6.5\" y=\"8.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3\" y=\"28.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$18\">\n</signal>\n<signal name=\"CLKOUT_33\">\n<contactref element=\"IC2\" pad=\"15\"/>\n<contactref element=\"FPGA\" pad=\"33\"/>\n<wire x1=\"52.75\" y1=\"41.5\" x2=\"52.75\" y2=\"43.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.75\" y1=\"43.25\" x2=\"52\" y2=\"44\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52\" y1=\"44\" x2=\"44\" y2=\"44\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"44\" y1=\"44\" x2=\"37\" y2=\"37\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37\" y1=\"37\" x2=\"37\" y2=\"28\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37\" y1=\"28\" x2=\"38.6\" y2=\"26.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"38.2\" y1=\"19.4\" x2=\"38.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"26.4\" x2=\"38.6\" y2=\"24.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"38.3314\" y1=\"19.9746875\" x2=\"38.3314\" y2=\"19.5314\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.3314\" y1=\"19.5314\" x2=\"38.2\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"20.2432875\" x2=\"38.3314\" y2=\"19.9746875\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"52\" y=\"44\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"38.6\" y=\"24.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"38.6\" y1=\"24.9\" x2=\"38.6\" y2=\"20.2432875\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D1C\">\n<contactref element=\"IC2\" pad=\"35\"/>\n<contactref element=\"FPGA\" pad=\"70\"/>\n<wire x1=\"45.2\" y1=\"35.8\" x2=\"47.5\" y2=\"35.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.1\" y1=\"37.9\" x2=\"45.2\" y2=\"35.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"37.9\" x2=\"43.1\" y2=\"37.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"35.8\" x2=\"47.5\" y2=\"35.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"37.9\" x2=\"41.71\" y2=\"37.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D2C\">\n<contactref element=\"IC2\" pad=\"37\"/>\n<contactref element=\"FPGA\" pad=\"69\"/>\n<wire x1=\"46\" y1=\"34.5\" x2=\"48.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43\" y1=\"37.5\" x2=\"46\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.9\" y1=\"37.5\" x2=\"43\" y2=\"37.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"37.4\" x2=\"41.9\" y2=\"37.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"37.4\" x2=\"41.71\" y2=\"37.38\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D3C\">\n<contactref element=\"IC2\" pad=\"38\"/>\n<contactref element=\"FPGA\" pad=\"66\"/>\n<wire x1=\"48.7\" y1=\"34\" x2=\"48.7\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"33.8\" x2=\"48.7\" y2=\"34\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.7\" y1=\"33.8\" x2=\"48.5\" y2=\"33.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.7\" y1=\"35.8\" x2=\"44.7\" y2=\"33.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"35.8\" x2=\"42.7\" y2=\"35.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.7\" y1=\"34.5\" x2=\"48.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"35.8\" x2=\"41.71\" y2=\"35.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D4C\">\n<contactref element=\"IC2\" pad=\"39\"/>\n<contactref element=\"FPGA\" pad=\"65\"/>\n<wire x1=\"49.2\" y1=\"34\" x2=\"49.2\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.6\" y1=\"33.4\" x2=\"49.2\" y2=\"34\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.6\" y1=\"33.4\" x2=\"48.6\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.7\" y1=\"35.3\" x2=\"44.6\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"35.3\" x2=\"42.7\" y2=\"35.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.2\" y1=\"34.5\" x2=\"49.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"35.3\" x2=\"41.71\" y2=\"35.38\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D5C\">\n<contactref element=\"IC2\" pad=\"40\"/>\n<contactref element=\"FPGA\" pad=\"64\"/>\n<wire x1=\"49.7\" y1=\"33.6\" x2=\"49.7\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"33.6\" x2=\"49.7\" y2=\"33.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.7\" y1=\"34.4\" x2=\"41.5\" y2=\"33.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.1\" y1=\"34.8\" x2=\"40.7\" y2=\"34.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"34.8\" x2=\"41.1\" y2=\"34.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.7\" y1=\"34.5\" x2=\"49.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"34.8\" x2=\"41.71\" y2=\"34.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"49.7\" y=\"33.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"34.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6C\">\n<contactref element=\"IC2\" pad=\"41\"/>\n<contactref element=\"FPGA\" pad=\"62\"/>\n<wire x1=\"50.3\" y1=\"33.5\" x2=\"50.3\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"33.4\" x2=\"50.3\" y2=\"33.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"33\" x2=\"50.4\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50\" y1=\"32.6\" x2=\"50.4\" y2=\"33\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.6\" y1=\"32.6\" x2=\"50\" y2=\"32.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.4\" y1=\"33.8\" x2=\"43.6\" y2=\"32.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"33.8\" x2=\"42.4\" y2=\"33.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.3\" y1=\"34.5\" x2=\"50.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"33.8\" x2=\"41.71\" y2=\"33.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D0C\">\n<contactref element=\"IC2\" pad=\"34\"/>\n<contactref element=\"FPGA\" pad=\"74\"/>\n<wire x1=\"47\" y1=\"36.3\" x2=\"47.5\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.1\" y1=\"37.2\" x2=\"47\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.3\" y1=\"37.2\" x2=\"46.1\" y2=\"37.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.1\" y1=\"39.4\" x2=\"43.3\" y2=\"37.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.2\" y1=\"39.4\" x2=\"41.1\" y2=\"39.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.3\" y1=\"40.3\" x2=\"40.2\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.3\" y1=\"40.8\" x2=\"39.3\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"36.3\" x2=\"47.5\" y2=\"36.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.3\" y1=\"40.8\" x2=\"39.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.1\" y=\"37.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.2\" y=\"39.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7C\">\n<contactref element=\"IC2\" pad=\"42\"/>\n<contactref element=\"FPGA\" pad=\"60\"/>\n<wire x1=\"50.8\" y1=\"33.5\" x2=\"50.8\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.9\" y1=\"33.4\" x2=\"50.8\" y2=\"33.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.9\" y1=\"32.8\" x2=\"50.9\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.2\" y1=\"32.1\" x2=\"50.9\" y2=\"32.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.7\" y1=\"32.1\" x2=\"50.2\" y2=\"32.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.6\" y1=\"32.2\" x2=\"47.7\" y2=\"32.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.5\" y1=\"32.2\" x2=\"47.6\" y2=\"32.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.9\" y1=\"32.8\" x2=\"43.5\" y2=\"32.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"32.8\" x2=\"42.9\" y2=\"32.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.8\" y1=\"34.5\" x2=\"50.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"32.8\" x2=\"41.71\" y2=\"32.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D0D\">\n<contactref element=\"IC2\" pad=\"23\"/>\n<contactref element=\"FPGA\" pad=\"85\"/>\n<wire x1=\"48.7\" y1=\"42.4\" x2=\"48.7\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.3\" y1=\"40\" x2=\"48.7\" y2=\"42.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35.9\" y1=\"40\" x2=\"46.3\" y2=\"40\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35.3\" y1=\"39.4\" x2=\"35.9\" y2=\"40\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35\" y1=\"39.4\" x2=\"35.3\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.9\" y1=\"39.3\" x2=\"35\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.5\" y1=\"39.3\" x2=\"34.9\" y2=\"39.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.8\" y1=\"40\" x2=\"34.5\" y2=\"39.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.8\" y1=\"40.8\" x2=\"33.8\" y2=\"40\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.7\" y1=\"41.5\" x2=\"48.75\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.8\" y1=\"40.8\" x2=\"33.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.7\" y=\"42.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"35.3\" y=\"39.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D1D\">\n<contactref element=\"IC2\" pad=\"24\"/>\n<contactref element=\"FPGA\" pad=\"84\"/>\n<wire x1=\"47.5\" y1=\"41.5\" x2=\"48.25\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.2\" y1=\"41.8\" x2=\"47.5\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.6\" y1=\"41.8\" x2=\"47.2\" y2=\"41.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.7\" y1=\"39.9\" x2=\"36.6\" y2=\"41.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.3\" y1=\"40.3\" x2=\"34.7\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.3\" y1=\"40.8\" x2=\"34.3\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.3\" y1=\"40.8\" x2=\"34.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"47.2\" y=\"41.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.7\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2D\">\n<contactref element=\"IC2\" pad=\"26\"/>\n<contactref element=\"FPGA\" pad=\"81\"/>\n<wire x1=\"43.8\" y1=\"40.3\" x2=\"47.5\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.4\" y1=\"43.7\" x2=\"43.8\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38\" y1=\"43.7\" x2=\"40.4\" y2=\"43.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"41.5\" x2=\"38\" y2=\"43.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"40.9\" x2=\"35.8\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"40.3\" x2=\"47.5\" y2=\"40.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"40.9\" x2=\"35.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D3D\">\n<contactref element=\"IC2\" pad=\"27\"/>\n<contactref element=\"FPGA\" pad=\"79\"/>\n<wire x1=\"43.8\" y1=\"39.8\" x2=\"47.5\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.3\" y1=\"43.3\" x2=\"43.8\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"43.3\" x2=\"40.3\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.8\" y1=\"41.5\" x2=\"38.6\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.8\" y1=\"40.9\" x2=\"36.8\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"39.8\" x2=\"47.5\" y2=\"39.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.8\" y1=\"40.9\" x2=\"36.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D4D\">\n<contactref element=\"IC2\" pad=\"28\"/>\n<contactref element=\"FPGA\" pad=\"78\"/>\n<wire x1=\"43.8\" y1=\"39.3\" x2=\"47.5\" y2=\"39.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.2\" y1=\"42.9\" x2=\"43.8\" y2=\"39.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.7\" y1=\"42.9\" x2=\"40.2\" y2=\"42.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"41.5\" x2=\"38.7\" y2=\"42.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"40.9\" x2=\"37.3\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"39.3\" x2=\"47.5\" y2=\"39.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"40.9\" x2=\"37.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D5D\">\n<contactref element=\"IC2\" pad=\"29\"/>\n<contactref element=\"FPGA\" pad=\"77\"/>\n<wire x1=\"43.8\" y1=\"38.8\" x2=\"47.5\" y2=\"38.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.1\" y1=\"42.5\" x2=\"43.8\" y2=\"38.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.8\" y1=\"42.5\" x2=\"40.1\" y2=\"42.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.8\" y1=\"41.5\" x2=\"38.8\" y2=\"42.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.8\" y1=\"40.9\" x2=\"37.8\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"38.8\" x2=\"47.5\" y2=\"38.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.8\" y1=\"40.9\" x2=\"37.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D6D\">\n<contactref element=\"IC2\" pad=\"30\"/>\n<contactref element=\"FPGA\" pad=\"76\"/>\n<wire x1=\"43.8\" y1=\"38.3\" x2=\"47.5\" y2=\"38.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40\" y1=\"42.1\" x2=\"43.8\" y2=\"38.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.9\" y1=\"42.1\" x2=\"40\" y2=\"42.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.3\" y1=\"41.5\" x2=\"38.9\" y2=\"42.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.3\" y1=\"40.9\" x2=\"38.3\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"38.3\" x2=\"47.5\" y2=\"38.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.3\" y1=\"40.9\" x2=\"38.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D7D\">\n<contactref element=\"IC2\" pad=\"31\"/>\n<contactref element=\"FPGA\" pad=\"75\"/>\n<wire x1=\"43.8\" y1=\"37.8\" x2=\"47.5\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.9\" y1=\"41.7\" x2=\"43.8\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39\" y1=\"41.7\" x2=\"39.9\" y2=\"41.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.8\" y1=\"41.5\" x2=\"39\" y2=\"41.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.8\" y1=\"40.9\" x2=\"38.8\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"37.8\" x2=\"47.5\" y2=\"37.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.8\" y1=\"40.9\" x2=\"38.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"L135\">\n<contactref element=\"FPGA\" pad=\"135\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"4\"/>\n<wire x1=\"21.2\" y1=\"25.8\" x2=\"20.3\" y2=\"25.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"25.8\" x2=\"21.2\" y2=\"25.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.9\" y1=\"24.4\" x2=\"20.3\" y2=\"25.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.3\" y1=\"24.4\" x2=\"18.9\" y2=\"24.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.2\" y1=\"24.4\" x2=\"13.3\" y2=\"24.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"5.8\" y1=\"25.8\" x2=\"7.2\" y2=\"24.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3.8\" y1=\"25.8\" x2=\"5.8\" y2=\"25.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.5\" y1=\"24.5\" x2=\"3.8\" y2=\"25.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-9.4\" y1=\"24.5\" x2=\"2.5\" y2=\"24.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-9.5\" y1=\"24.4\" x2=\"-9.4\" y2=\"24.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.5\" y1=\"24.4\" x2=\"-9.5\" y2=\"24.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-11.1\" y1=\"25\" x2=\"-10.5\" y2=\"24.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-11.1\" y1=\"39.6\" x2=\"-11.1\" y2=\"25\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10\" y1=\"40.7\" x2=\"-11.1\" y2=\"39.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.3\" y1=\"25.8\" x2=\"20.21\" y2=\"25.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"40.7\" x2=\"-10\" y2=\"40.71\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"21.2\" y=\"25.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13.3\" y=\"24.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L140\">\n<contactref element=\"FPGA\" pad=\"140\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"3\"/>\n<wire x1=\"21\" y1=\"23.4\" x2=\"20.3\" y2=\"23.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"23.6\" x2=\"21\" y2=\"23.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"23.6\" x2=\"21.2\" y2=\"23.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11\" y1=\"25.9\" x2=\"13.3\" y2=\"23.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11\" y1=\"30.6\" x2=\"11\" y2=\"25.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.9\" y1=\"31.7\" x2=\"11\" y2=\"30.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.9\" y1=\"31.7\" x2=\"9.9\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.3\" y1=\"30.1\" x2=\"1.9\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.5\" y1=\"30.1\" x2=\"0.3\" y2=\"30.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-2.5\" y1=\"29.1\" x2=\"-1.5\" y2=\"30.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-2.5\" y1=\"35.7\" x2=\"-2.5\" y2=\"29.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10\" y1=\"43.2\" x2=\"-2.5\" y2=\"35.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.3\" y1=\"23.4\" x2=\"20.21\" y2=\"23.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"43.2\" x2=\"-10\" y2=\"43.25\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"21.2\" y=\"23.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-2.5\" y=\"29.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L21_SDA\">\n<contactref element=\"FPGA\" pad=\"21\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"13\"/>\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"13\"/>\n<contactref element=\"R_SDA\" pad=\"1\"/>\n<contactref element=\"DAC1\" pad=\"3\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"13\"/>\n<wire x1=\"0.1\" y1=\"31.1\" x2=\"0.8\" y2=\"31.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-0.2\" y1=\"31.4\" x2=\"0.1\" y2=\"31.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-0.2\" y1=\"32\" x2=\"-0.2\" y2=\"31.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.4\" y1=\"39.6\" x2=\"-0.2\" y2=\"32\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.2\" y1=\"39.6\" x2=\"7.4\" y2=\"39.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.6\" y1=\"39.2\" x2=\"12.2\" y2=\"39.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.6\" y1=\"34\" x2=\"12.6\" y2=\"39.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.6\" y1=\"32\" x2=\"12.6\" y2=\"34\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.6\" y1=\"31.4\" x2=\"10.6\" y2=\"32\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.9\" y1=\"31.1\" x2=\"10.65\" y2=\"31.35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.65\" y1=\"31.35\" x2=\"10.6\" y2=\"31.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"31.1\" x2=\"10.9\" y2=\"31.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"31.1\" x2=\"0.825\" y2=\"31.075\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"31.1\" x2=\"11.625\" y2=\"31.075\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"19.9\" x2=\"32.2\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.5\" y1=\"21.6\" x2=\"32.2\" y2=\"19.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.5\" y1=\"21.6\" x2=\"30.5\" y2=\"21.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.9\" y1=\"21.6\" x2=\"29.5\" y2=\"21.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.9\" y1=\"18.6\" x2=\"14.55\" y2=\"20.25\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.55\" y1=\"20.25\" x2=\"15.9\" y2=\"21.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.1\" y1=\"18.6\" x2=\"12.9\" y2=\"18.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14\" y1=\"17.7\" x2=\"13.1\" y2=\"18.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"19.4\" x2=\"32.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14\" y1=\"17.7\" x2=\"14.05\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.7\" y1=\"27.9\" x2=\"74.2131\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.6\" y1=\"25.8\" x2=\"72.7\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.3\" y1=\"25.8\" x2=\"70.6\" y2=\"25.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.7\" y1=\"25.2\" x2=\"59.3\" y2=\"25.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"47.2\" y1=\"25.2\" x2=\"58.7\" y2=\"25.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"45.7\" y1=\"26.7\" x2=\"47.2\" y2=\"25.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.7\" y1=\"26.7\" x2=\"45.7\" y2=\"26.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.4\" y1=\"22.4\" x2=\"41.7\" y2=\"26.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.8\" y1=\"22.4\" x2=\"37.4\" y2=\"22.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.3\" y1=\"22.4\" x2=\"32.8\" y2=\"22.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.5\" y1=\"21.6\" x2=\"29.95\" y2=\"22.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.95\" y1=\"22.05\" x2=\"30.3\" y2=\"22.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.7\" y1=\"1.6\" x2=\"34.7\" y2=\"0.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"3.5\" x2=\"34.7\" y2=\"1.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"15.3\" x2=\"32.8\" y2=\"3.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.8\" y1=\"19.2\" x2=\"32.8\" y2=\"15.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.95\" y1=\"22.05\" x2=\"32.8\" y2=\"19.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.7\" y1=\"0.4\" x2=\"34.75\" y2=\"0.379\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.4\" y1=\"31.3\" x2=\"10.6\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.9\" y1=\"29.8\" x2=\"10.4\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.9\" y1=\"28.5\" x2=\"8.9\" y2=\"29.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.2\" y1=\"27.2\" x2=\"8.9\" y2=\"28.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.2\" y1=\"24.6\" x2=\"10.2\" y2=\"27.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.55\" y1=\"20.25\" x2=\"10.2\" y2=\"24.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.6\" y1=\"31.3\" x2=\"10.65\" y2=\"31.35\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"29.5\" y=\"21.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"12.9\" y=\"18.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"70.6\" y=\"25.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"32.8\" y=\"22.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"32.8\" y=\"3.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"32.8\" y=\"15.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.9\" y=\"29.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED3\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"23\"/>\n<contactref element=\"LED3\" pad=\"A\"/>\n<wire x1=\"-1.2\" y1=\"7.9\" x2=\"-2.1\" y2=\"7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.2\" y1=\"23.2\" x2=\"-1.2\" y2=\"7.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.3\" y1=\"26.7\" x2=\"-1.2\" y2=\"23.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"26.7\" x2=\"2.3\" y2=\"26.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.2\" y1=\"26.7\" x2=\"3.1\" y2=\"26.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.375\" y1=\"26.525\" x2=\"4.2\" y2=\"26.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.1\" y1=\"7\" x2=\"-2.18\" y2=\"6.96\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-1.2\" y=\"7.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3.1\" y=\"26.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED2\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"22\"/>\n<contactref element=\"LED2\" pad=\"A\"/>\n<wire x1=\"-4.3\" y1=\"8.1\" x2=\"-4.3\" y2=\"7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.3\" y1=\"20.6\" x2=\"-4.3\" y2=\"8.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.6\" y1=\"27.5\" x2=\"-4.3\" y2=\"20.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"27.5\" x2=\"2.6\" y2=\"27.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.4\" y1=\"27.5\" x2=\"3.1\" y2=\"27.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.7\" y1=\"27.2\" x2=\"3.4\" y2=\"27.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"27.2\" x2=\"3.7\" y2=\"27.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.3\" y1=\"7\" x2=\"-4.38\" y2=\"6.97\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"27.2\" x2=\"4.375\" y2=\"27.175\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-4.3\" y=\"8.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3.1\" y=\"27.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"AIN1\">\n<contactref element=\"FPGA\" pad=\"3\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"2\"/>\n<wire x1=\"23.2\" y1=\"20.1\" x2=\"23.2\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"20.2\" x2=\"23.2\" y2=\"20.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"23.6\" x2=\"23.1\" y2=\"20.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"26.2\" x2=\"23.1\" y2=\"23.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"36.2\" y1=\"39.3\" x2=\"23.1\" y2=\"26.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"36.2\" y1=\"49.3\" x2=\"36.2\" y2=\"39.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.3\" y1=\"50.4\" x2=\"36.2\" y2=\"49.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.2\" y1=\"19.4\" x2=\"23.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"50.4\" x2=\"37.39\" y2=\"50.479\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"23.1\" y=\"23.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"36.2\" y=\"49.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"REF1\">\n<contactref element=\"IC1\" pad=\"6\"/>\n<contactref element=\"CREF1\" pad=\"1\"/>\n<wire x1=\"55.7\" y1=\"17.8\" x2=\"54.5\" y2=\"17.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.8\" y1=\"17.9\" x2=\"55.7\" y2=\"17.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"17.8\" x2=\"54.5\" y2=\"17.75\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.8\" y=\"17.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"59.2\" y1=\"14.5\" x2=\"55.8\" y2=\"17.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.2\" y1=\"15.7\" x2=\"59.2\" y2=\"14.5\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"59.2\" y=\"14.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"59.1\" y1=\"15.8\" x2=\"59.08\" y2=\"15.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"15.8\" x2=\"59.2\" y2=\"15.7\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"INA-1\">\n<contactref element=\"IC1\" pad=\"2\"/>\n<contactref element=\"IC1\" pad=\"4\"/>\n<contactref element=\"C-AIN1\" pad=\"1\"/>\n<wire x1=\"56\" y1=\"14.7\" x2=\"56\" y2=\"13.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"13.8\" x2=\"56.08\" y2=\"13.74\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55\" y1=\"15.7\" x2=\"54.5\" y2=\"15.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"14.7\" x2=\"55.55\" y2=\"15.15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.55\" y1=\"15.15\" x2=\"55\" y2=\"15.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"15.7\" x2=\"54.5\" y2=\"15.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"16.8\" x2=\"54.5\" y2=\"16.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.4\" y1=\"16.4\" x2=\"56\" y2=\"16.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.4\" y1=\"16\" x2=\"56.4\" y2=\"16.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.55\" y1=\"15.15\" x2=\"56.4\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"16.8\" x2=\"54.5\" y2=\"16.75\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"LOW_22\">\n<contactref element=\"FPGA\" pad=\"22\"/>\n<contactref element=\"IC1\" pad=\"47\"/>\n<contactref element=\"IC2\" pad=\"47\"/>\n<wire x1=\"53.3\" y1=\"14\" x2=\"53.3\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.7\" y1=\"13.6\" x2=\"53.3\" y2=\"14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.7\" y1=\"13.5\" x2=\"53.7\" y2=\"13.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.7\" y1=\"32.5\" x2=\"53.7\" y2=\"13.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.2\" y1=\"33\" x2=\"53.7\" y2=\"32.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.2\" y1=\"34.5\" x2=\"53.2\" y2=\"33\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.3\" y1=\"14.5\" x2=\"53.25\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.2\" y1=\"34.5\" x2=\"53.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"20.4\" x2=\"32.8\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"19.4\" x2=\"32.8\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"35.5\" y1=\"16.7\" x2=\"32.8\" y2=\"19.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.1\" y1=\"16.7\" x2=\"35.5\" y2=\"16.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.2\" y1=\"11.6\" x2=\"37.1\" y2=\"16.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"51.8\" y1=\"11.6\" x2=\"42.2\" y2=\"11.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.7\" y1=\"13.5\" x2=\"51.8\" y2=\"11.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.8\" y1=\"19.4\" x2=\"32.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"53.7\" y=\"13.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"53.2\" y=\"33\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"32.8\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L134\">\n<contactref element=\"FPGA\" pad=\"134\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"5\"/>\n<wire x1=\"18.6\" y1=\"26.4\" x2=\"20.2\" y2=\"26.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.6\" y1=\"26.4\" x2=\"18.6\" y2=\"26.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.9\" y1=\"27.1\" x2=\"16.6\" y2=\"26.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.1\" y1=\"27.1\" x2=\"15.9\" y2=\"27.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.3\" y1=\"28.9\" x2=\"14.1\" y2=\"27.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.3\" y1=\"30.9\" x2=\"12.3\" y2=\"28.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.9\" y1=\"31.5\" x2=\"12.3\" y2=\"30.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.9\" y1=\"31.9\" x2=\"12.9\" y2=\"31.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"9.2\" y1=\"35.6\" x2=\"12.9\" y2=\"31.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"8.9\" y1=\"35.6\" x2=\"9.2\" y2=\"35.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.4\" y1=\"38.1\" x2=\"8.9\" y2=\"35.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"38.1\" x2=\"6.4\" y2=\"38.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"26.4\" x2=\"20.21\" y2=\"26.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"38.1\" x2=\"-10\" y2=\"38.17\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"18.6\" y=\"26.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"12.9\" y=\"31.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"9.2\" y=\"35.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LOW_24\">\n<contactref element=\"FPGA\" pad=\"24\"/>\n<contactref element=\"IC1\" pad=\"46\"/>\n<contactref element=\"IC2\" pad=\"46\"/>\n<wire x1=\"52.8\" y1=\"13.7\" x2=\"52.8\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.9\" y1=\"13.6\" x2=\"52.8\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.9\" y1=\"25.5\" x2=\"52.9\" y2=\"13.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"52.4\" y1=\"26\" x2=\"52.9\" y2=\"25.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"52.4\" y1=\"32.2\" x2=\"52.4\" y2=\"26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"52.4\" y1=\"33.7\" x2=\"52.4\" y2=\"32.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"34\" x2=\"52.4\" y2=\"33.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"34.5\" x2=\"52.7\" y2=\"34\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.8\" y1=\"14.5\" x2=\"52.75\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"34.5\" x2=\"52.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.8\" y1=\"20.1\" x2=\"33.8\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.2\" y1=\"20.5\" x2=\"33.8\" y2=\"20.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38\" y1=\"20.5\" x2=\"34.2\" y2=\"20.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.5\" y1=\"23\" x2=\"38\" y2=\"20.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.9\" y1=\"23\" x2=\"40.5\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"46\" y1=\"18.9\" x2=\"41.9\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"47.6\" y1=\"18.9\" x2=\"46\" y2=\"18.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.9\" y1=\"13.6\" x2=\"47.6\" y2=\"18.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.8\" y1=\"19.4\" x2=\"33.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"52.9\" y=\"13.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"52.4\" y=\"32.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.2\" y=\"20.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LOW_25\">\n<contactref element=\"FPGA\" pad=\"25\"/>\n<contactref element=\"IC1\" pad=\"45\"/>\n<contactref element=\"IC2\" pad=\"45\"/>\n<wire x1=\"52.2\" y1=\"13.7\" x2=\"52.2\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.1\" y1=\"13.6\" x2=\"52.2\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.1\" y1=\"20.9\" x2=\"52.1\" y2=\"13.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"50.7\" y1=\"22.3\" x2=\"52.1\" y2=\"20.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"50.7\" y1=\"32.5\" x2=\"50.7\" y2=\"22.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"51.8\" y1=\"33.6\" x2=\"50.7\" y2=\"32.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"52.2\" y1=\"34\" x2=\"51.8\" y2=\"33.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.2\" y1=\"34.5\" x2=\"52.2\" y2=\"34\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.2\" y1=\"14.5\" x2=\"52.25\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.2\" y1=\"34.5\" x2=\"52.25\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.3\" y1=\"18.7\" x2=\"34.3\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.6\" y1=\"18.4\" x2=\"34.3\" y2=\"18.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.9\" y1=\"18.4\" x2=\"34.6\" y2=\"18.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.3\" y1=\"12\" x2=\"35.9\" y2=\"18.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"50.6\" y1=\"12\" x2=\"42.3\" y2=\"12\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.1\" y1=\"13.5\" x2=\"50.6\" y2=\"12\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.1\" y1=\"13.6\" x2=\"52.1\" y2=\"13.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.3\" y1=\"19.3\" x2=\"34.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"52.1\" y=\"13.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"51.8\" y=\"33.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.6\" y=\"18.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"REF2\">\n<contactref element=\"IC2\" pad=\"6\"/>\n<contactref element=\"CREF2\" pad=\"1\"/>\n<wire x1=\"55.7\" y1=\"37.8\" x2=\"54.5\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.8\" y1=\"37.9\" x2=\"55.7\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.8\" y1=\"38.6\" x2=\"55.8\" y2=\"37.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.3\" y1=\"39.1\" x2=\"55.8\" y2=\"38.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.3\" y1=\"39.6\" x2=\"55.3\" y2=\"39.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.5\" y1=\"40.8\" x2=\"55.3\" y2=\"39.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.1\" y1=\"40.8\" x2=\"56.5\" y2=\"40.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"39.7\" x2=\"58.1\" y2=\"40.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.5\" y1=\"37.8\" x2=\"54.5\" y2=\"37.75\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.8\" y=\"37.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA-2\">\n<contactref element=\"IC2\" pad=\"2\"/>\n<contactref element=\"IC2\" pad=\"4\"/>\n<contactref element=\"C-AIN3\" pad=\"1\"/>\n<wire x1=\"54.5\" y1=\"35.7\" x2=\"54.5\" y2=\"35.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.556\" y1=\"36.23030625\" x2=\"56.556\" y2=\"35.76969375\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.556\" y1=\"35.76969375\" x2=\"56.318153125\" y2=\"35.531846875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.318153125\" y1=\"35.531846875\" x2=\"56.23030625\" y2=\"35.444\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.23030625\" y1=\"35.444\" x2=\"55.76969375\" y2=\"35.444\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"36.75\" x2=\"54.6214\" y2=\"36.6286\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.6214\" y1=\"36.6286\" x2=\"56.15770625\" y2=\"36.6286\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.15770625\" y1=\"36.6286\" x2=\"56.556\" y2=\"36.23030625\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.76969375\" y1=\"35.444\" x2=\"55.51369375\" y2=\"35.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.51369375\" y1=\"35.7\" x2=\"54.5\" y2=\"35.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.15\" y1=\"37.35\" x2=\"59.15\" y2=\"37.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.3\" y1=\"35.5\" x2=\"59.15\" y2=\"37.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.35\" y1=\"35.5\" x2=\"57.3\" y2=\"35.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.15\" y1=\"37.45\" x2=\"59.2\" y2=\"37.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.35\" y1=\"35.5\" x2=\"56.318153125\" y2=\"35.531846875\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"57.3\" y=\"35.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OSC1\">\n<contactref element=\"OSC\" pad=\"3\"/>\n<contactref element=\"FPGA\" pad=\"27\"/>\n<wire x1=\"35.2\" y1=\"19.3\" x2=\"35.2\" y2=\"17.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.2\" y1=\"17.3\" x2=\"35.215\" y2=\"17.21\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.2\" y1=\"19.3\" x2=\"35.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D0A\">\n<contactref element=\"IC1\" pad=\"34\"/>\n<contactref element=\"FPGA\" pad=\"47\"/>\n<wire x1=\"47\" y1=\"16.3\" x2=\"47.5\" y2=\"16.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.2\" y1=\"19.1\" x2=\"47\" y2=\"16.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.2\" y1=\"24.9\" x2=\"44.2\" y2=\"19.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.8\" y1=\"26.3\" x2=\"44.2\" y2=\"24.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"26.3\" x2=\"42.8\" y2=\"26.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"16.3\" x2=\"47.5\" y2=\"16.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"26.3\" x2=\"41.71\" y2=\"26.38\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D1A\">\n<contactref element=\"IC1\" pad=\"35\"/>\n<contactref element=\"FPGA\" pad=\"46\"/>\n<wire x1=\"46.6\" y1=\"15.8\" x2=\"47.5\" y2=\"15.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.4\" y1=\"15.8\" x2=\"46.6\" y2=\"15.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39.5\" y1=\"22.7\" x2=\"46.4\" y2=\"15.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39.5\" y1=\"25.8\" x2=\"39.5\" y2=\"22.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.7\" y1=\"25.8\" x2=\"39.5\" y2=\"25.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"15.8\" x2=\"47.5\" y2=\"15.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"25.8\" x2=\"41.71\" y2=\"25.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.6\" y=\"15.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"39.5\" y=\"25.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2A\">\n<contactref element=\"IC1\" pad=\"37\"/>\n<contactref element=\"FPGA\" pad=\"45\"/>\n<wire x1=\"47.6\" y1=\"14.5\" x2=\"48.25\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"14.4\" x2=\"47.6\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"16.5\" x2=\"47.5\" y2=\"14.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.1\" y1=\"23.9\" x2=\"47.5\" y2=\"16.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.1\" y1=\"24.3\" x2=\"40.1\" y2=\"23.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.1\" y1=\"25\" x2=\"40.1\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.5\" y1=\"25.4\" x2=\"40.1\" y2=\"25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"25.4\" x2=\"40.5\" y2=\"25.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"25.4\" x2=\"41.71\" y2=\"25.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"47.5\" y=\"14.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.1\" y=\"24.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3A\">\n<contactref element=\"IC1\" pad=\"38\"/>\n<contactref element=\"FPGA\" pad=\"44\"/>\n<wire x1=\"48.8\" y1=\"13.7\" x2=\"48.8\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.9\" y1=\"13.6\" x2=\"48.8\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.9\" y1=\"19.4\" x2=\"48.9\" y2=\"13.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.4\" y1=\"24.9\" x2=\"48.9\" y2=\"19.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.8\" y1=\"24.9\" x2=\"43.4\" y2=\"24.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.8\" y1=\"14.5\" x2=\"48.75\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"24.9\" x2=\"41.71\" y2=\"24.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.9\" y=\"13.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.4\" y=\"24.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4A\">\n<contactref element=\"IC1\" pad=\"39\"/>\n<contactref element=\"FPGA\" pad=\"43\"/>\n<wire x1=\"49.3\" y1=\"14\" x2=\"49.3\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.5\" y1=\"13.8\" x2=\"49.3\" y2=\"14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.5\" y1=\"13.4\" x2=\"49.5\" y2=\"13.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.1\" y1=\"13\" x2=\"49.5\" y2=\"13.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.7\" y1=\"13\" x2=\"49.1\" y2=\"13\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.1\" y1=\"13.6\" x2=\"48.7\" y2=\"13\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.1\" y1=\"19.4\" x2=\"48.1\" y2=\"13.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.6\" y1=\"23.9\" x2=\"48.1\" y2=\"19.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43\" y1=\"24.5\" x2=\"43.6\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.9\" y1=\"24.5\" x2=\"43\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"24.4\" x2=\"41.9\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.3\" y1=\"14.5\" x2=\"49.25\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"24.4\" x2=\"41.71\" y2=\"24.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.1\" y=\"13.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.6\" y=\"23.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5A\">\n<contactref element=\"IC1\" pad=\"40\"/>\n<contactref element=\"FPGA\" pad=\"41\"/>\n<wire x1=\"49.8\" y1=\"14\" x2=\"49.8\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.9\" y1=\"13.9\" x2=\"49.8\" y2=\"14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.9\" y1=\"13\" x2=\"49.9\" y2=\"13.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.9\" y1=\"13.4\" x2=\"49.9\" y2=\"13\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.8\" y1=\"19.5\" x2=\"49.9\" y2=\"13.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.5\" y1=\"19.5\" x2=\"43.8\" y2=\"19.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.5\" y1=\"22.1\" x2=\"43.5\" y2=\"19.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.3\" y1=\"23.3\" x2=\"43.5\" y2=\"22.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"23.3\" x2=\"42.3\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.8\" y1=\"14.5\" x2=\"49.75\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"23.3\" x2=\"41.71\" y2=\"23.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"49.9\" y=\"13\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.5\" y=\"19.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6A\">\n<contactref element=\"IC1\" pad=\"41\"/>\n<contactref element=\"FPGA\" pad=\"39\"/>\n<wire x1=\"50.3\" y1=\"13.7\" x2=\"50.3\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.5\" y1=\"13.5\" x2=\"50.3\" y2=\"13.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.3\" y1=\"13.5\" x2=\"50.5\" y2=\"13.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.4\" y1=\"22.4\" x2=\"50.3\" y2=\"13.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.7\" y1=\"22.4\" x2=\"41.4\" y2=\"22.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.7\" y1=\"22.4\" x2=\"40.7\" y2=\"22.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.3\" y1=\"14.5\" x2=\"50.25\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"22.4\" x2=\"41.71\" y2=\"22.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"50.5\" y=\"13.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"22.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7A\">\n<contactref element=\"IC1\" pad=\"42\"/>\n<contactref element=\"FPGA\" pad=\"38\"/>\n<wire x1=\"50.8\" y1=\"14\" x2=\"50.8\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"51.3\" y1=\"13.5\" x2=\"50.8\" y2=\"14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.2\" y1=\"12.4\" x2=\"51.3\" y2=\"13.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.5\" y1=\"12.4\" x2=\"50.2\" y2=\"12.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.1\" y1=\"20.8\" x2=\"48.5\" y2=\"12.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.1\" y1=\"21.3\" x2=\"40.1\" y2=\"20.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.6\" y1=\"21.3\" x2=\"40.1\" y2=\"21.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.1\" y1=\"21.8\" x2=\"40.6\" y2=\"21.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"21.8\" x2=\"41.1\" y2=\"21.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.8\" y1=\"14.5\" x2=\"50.75\" y2=\"14.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"21.8\" x2=\"41.71\" y2=\"21.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"51.3\" y=\"13.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.1\" y=\"21.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D0B\">\n<contactref element=\"IC1\" pad=\"23\"/>\n<contactref element=\"FPGA\" pad=\"59\"/>\n<wire x1=\"48.8\" y1=\"26.6\" x2=\"48.8\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"26.9\" x2=\"48.8\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"30.8\" x2=\"48.5\" y2=\"26.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"31.8\" x2=\"48.5\" y2=\"30.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.4\" y1=\"31.8\" x2=\"47.5\" y2=\"31.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.9\" y1=\"32.3\" x2=\"43.4\" y2=\"31.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"32.3\" x2=\"42.9\" y2=\"32.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.8\" y1=\"21.5\" x2=\"48.75\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"32.3\" x2=\"41.71\" y2=\"32.38\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D1B\">\n<contactref element=\"IC1\" pad=\"24\"/>\n<contactref element=\"FPGA\" pad=\"58\"/>\n<wire x1=\"48.2\" y1=\"22.4\" x2=\"48.2\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.2\" y1=\"26.5\" x2=\"48.2\" y2=\"22.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.5\" y1=\"31.2\" x2=\"48.2\" y2=\"26.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.9\" y1=\"31.8\" x2=\"43.5\" y2=\"31.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"31.8\" x2=\"42.9\" y2=\"31.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.2\" y1=\"21.5\" x2=\"48.25\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"31.8\" x2=\"41.71\" y2=\"31.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.2\" y=\"22.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.5\" y=\"31.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2B\">\n<contactref element=\"IC1\" pad=\"26\"/>\n<contactref element=\"FPGA\" pad=\"57\"/>\n<wire x1=\"47\" y1=\"20.3\" x2=\"47.5\" y2=\"20.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.1\" y1=\"21.2\" x2=\"47\" y2=\"20.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.1\" y1=\"23.7\" x2=\"46.1\" y2=\"21.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.1\" y1=\"27.8\" x2=\"46.1\" y2=\"23.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.7\" y1=\"31.2\" x2=\"46.1\" y2=\"27.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.4\" y1=\"31.2\" x2=\"42.7\" y2=\"31.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.3\" y1=\"31.3\" x2=\"42.4\" y2=\"31.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"31.3\" x2=\"42.3\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"20.3\" x2=\"47.5\" y2=\"20.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"31.3\" x2=\"41.71\" y2=\"31.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.1\" y=\"23.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"42.7\" y=\"31.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3B\">\n<contactref element=\"IC1\" pad=\"27\"/>\n<contactref element=\"FPGA\" pad=\"56\"/>\n<wire x1=\"46.7\" y1=\"19.8\" x2=\"47.5\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.2\" y1=\"20.3\" x2=\"46.7\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.2\" y1=\"20.8\" x2=\"46.2\" y2=\"20.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"44.1\" y1=\"22.9\" x2=\"46.2\" y2=\"20.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43\" y1=\"22.9\" x2=\"44.1\" y2=\"22.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.2\" y1=\"23.7\" x2=\"43\" y2=\"22.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.2\" y1=\"29.9\" x2=\"42.2\" y2=\"23.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.7\" y1=\"30.4\" x2=\"42.2\" y2=\"29.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.3\" y1=\"30.8\" x2=\"42.7\" y2=\"30.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"30.8\" x2=\"42.3\" y2=\"30.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"19.8\" x2=\"47.5\" y2=\"19.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"30.8\" x2=\"41.71\" y2=\"30.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.2\" y=\"20.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"42.7\" y=\"30.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4B\">\n<contactref element=\"IC1\" pad=\"28\"/>\n<contactref element=\"FPGA\" pad=\"55\"/>\n<wire x1=\"46.4\" y1=\"19.3\" x2=\"47.5\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.2\" y1=\"19.5\" x2=\"46.4\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.8\" y1=\"19.5\" x2=\"46.2\" y2=\"19.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.7\" y1=\"23.6\" x2=\"45.8\" y2=\"19.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.7\" y1=\"28.9\" x2=\"41.7\" y2=\"23.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.7\" y1=\"29.9\" x2=\"41.7\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.1\" y1=\"30.3\" x2=\"40.7\" y2=\"29.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"30.3\" x2=\"41.1\" y2=\"30.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"19.3\" x2=\"47.5\" y2=\"19.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"30.3\" x2=\"41.71\" y2=\"30.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.2\" y=\"19.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"29.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5B\">\n<contactref element=\"IC1\" pad=\"29\"/>\n<contactref element=\"FPGA\" pad=\"54\"/>\n<wire x1=\"46.8\" y1=\"18.8\" x2=\"47.5\" y2=\"18.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.7\" y1=\"18.9\" x2=\"46.8\" y2=\"18.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46\" y1=\"18.9\" x2=\"46.7\" y2=\"18.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.5\" y1=\"19.4\" x2=\"46\" y2=\"18.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.5\" y1=\"20.7\" x2=\"45.5\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.5\" y1=\"26.1\" x2=\"45.5\" y2=\"20.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"45.5\" y1=\"27.4\" x2=\"45.5\" y2=\"26.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.2\" y1=\"29.7\" x2=\"45.5\" y2=\"27.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"42.6\" y1=\"29.7\" x2=\"43.2\" y2=\"29.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.5\" y1=\"29.8\" x2=\"42.6\" y2=\"29.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"29.8\" x2=\"42.5\" y2=\"29.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"18.8\" x2=\"47.5\" y2=\"18.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.8\" y1=\"29.8\" x2=\"41.71\" y2=\"29.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"45.5\" y=\"20.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"45.5\" y=\"26.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.2\" y=\"29.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6B\">\n<contactref element=\"IC1\" pad=\"30\"/>\n<contactref element=\"FPGA\" pad=\"52\"/>\n<wire x1=\"46.5\" y1=\"18.3\" x2=\"47.5\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.3\" y1=\"23.5\" x2=\"46.5\" y2=\"18.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.3\" y1=\"27.8\" x2=\"41.3\" y2=\"23.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"40.7\" y1=\"28.4\" x2=\"41.3\" y2=\"27.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"41.1\" y1=\"28.8\" x2=\"40.7\" y2=\"28.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"28.8\" x2=\"41.1\" y2=\"28.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"18.3\" x2=\"47.5\" y2=\"18.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"28.8\" x2=\"41.71\" y2=\"28.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.5\" y=\"18.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"28.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7B\">\n<contactref element=\"IC1\" pad=\"31\"/>\n<contactref element=\"FPGA\" pad=\"50\"/>\n<wire x1=\"46.3\" y1=\"17.7\" x2=\"47.5\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.9\" y1=\"19.1\" x2=\"46.3\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.9\" y1=\"21.2\" x2=\"44.9\" y2=\"19.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.3\" y1=\"21.2\" x2=\"44.9\" y2=\"21.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.7\" y1=\"24.8\" x2=\"44.3\" y2=\"21.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.7\" y1=\"24.1\" x2=\"40.7\" y2=\"24.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.3\" y1=\"23.7\" x2=\"40.7\" y2=\"24.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.9\" y1=\"23.7\" x2=\"40.3\" y2=\"23.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.2\" y1=\"24.4\" x2=\"39.9\" y2=\"23.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.2\" y1=\"25.3\" x2=\"39.2\" y2=\"24.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.9\" y1=\"25.6\" x2=\"39.2\" y2=\"25.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.9\" y1=\"26.7\" x2=\"38.9\" y2=\"25.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40\" y1=\"27.8\" x2=\"38.9\" y2=\"26.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"27.8\" x2=\"40\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"17.7\" x2=\"47.5\" y2=\"17.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"27.8\" x2=\"41.71\" y2=\"27.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"44.9\" y=\"21.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"40.7\" y=\"24.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA2\">\n<contactref element=\"U2\" pad=\"1\"/>\n<contactref element=\"GAINSW3\" pad=\"4\"/>\n<contactref element=\"OVSAMP1\" pad=\"1\"/>\n<wire x1=\"58.3\" y1=\"31.2\" x2=\"57.4\" y2=\"31.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.6\" y1=\"44.3\" x2=\"63.6\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.6\" y1=\"41.9\" x2=\"63.6\" y2=\"36.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.6\" y1=\"45.4\" x2=\"63.6\" y2=\"44.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64\" y1=\"45.8\" x2=\"63.6\" y2=\"45.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.4\" y1=\"31.2\" x2=\"57.31\" y2=\"31.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"45.8\" x2=\"64.095\" y2=\"45.8362\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"41.2\" x2=\"61\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.7\" y1=\"41.9\" x2=\"61\" y2=\"41.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"41.9\" x2=\"61.7\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.6\" y1=\"41.9\" x2=\"61.9\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61\" y1=\"40.9\" x2=\"60.95\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.3\" y=\"31.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.6\" y=\"44.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"61.9\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"63.6\" y1=\"36.5\" x2=\"58.3\" y2=\"31.2\" width=\"0.1524\" layer=\"15\"/>\n</signal>\n<signal name=\"INB1\">\n<contactref element=\"IC1\" pad=\"9\"/>\n<contactref element=\"U1\" pad=\"7\"/>\n<contactref element=\"GAINSW2\" pad=\"4\"/>\n<contactref element=\"OVSAMP2\" pad=\"3\"/>\n<wire x1=\"55.4\" y1=\"19.2\" x2=\"54.5\" y2=\"19.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.4\" y1=\"19.5\" x2=\"55.4\" y2=\"19.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.3\" y1=\"19.6\" x2=\"55.4\" y2=\"19.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.3\" y1=\"26.3\" x2=\"55.3\" y2=\"19.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57\" y1=\"28\" x2=\"55.3\" y2=\"26.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.3\" y1=\"28\" x2=\"57\" y2=\"28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.5\" y1=\"19.2\" x2=\"54.5\" y2=\"19.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.3\" y1=\"28\" x2=\"57.31\" y2=\"28.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"13.4\" x2=\"61\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"13.6\" x2=\"61\" y2=\"13.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"55.4\" y1=\"19.2\" x2=\"61\" y2=\"13.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61\" y1=\"12.1\" x2=\"60.95\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.2\" y1=\"10.2\" x2=\"65.2\" y2=\"9.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.7\" y1=\"11.7\" x2=\"65.2\" y2=\"10.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.7\" y1=\"11.7\" x2=\"63.7\" y2=\"11.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61\" y1=\"13.4\" x2=\"62.7\" y2=\"11.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"65.2\" y1=\"9.4\" x2=\"65.265\" y2=\"9.3638\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.4\" y=\"19.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"61\" y=\"13.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.7\" y=\"11.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CLKOUTTOLEFT_29\">\n<contactref element=\"PIN_LEFT\" pad=\"8\"/>\n<contactref element=\"FPGA\" pad=\"29\"/>\n<wire x1=\"36.3\" y1=\"16.1\" x2=\"36.3\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.3\" y1=\"-7\" x2=\"36.3\" y2=\"16.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.2\" y1=\"-7.9\" x2=\"36.3\" y2=\"-7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"36.3\" y1=\"19.3\" x2=\"36.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.2\" y1=\"-7.9\" x2=\"37.29\" y2=\"-7.9\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"36.3\" y=\"16.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED4\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"24\"/>\n<contactref element=\"LED4\" pad=\"A\"/>\n<wire x1=\"0\" y1=\"8.1\" x2=\"0\" y2=\"6.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0\" y1=\"13.8\" x2=\"0\" y2=\"8.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.3\" y1=\"14.1\" x2=\"0\" y2=\"13.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.3\" y1=\"23.6\" x2=\"-0.3\" y2=\"14.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2\" y1=\"25.9\" x2=\"-0.3\" y2=\"23.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"25.9\" x2=\"2\" y2=\"25.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"4.3\" y1=\"25.9\" x2=\"3.1\" y2=\"25.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"25.9\" x2=\"4.375\" y2=\"25.875\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"0\" y=\"8.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3.1\" y=\"25.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGOUTTOLEFT_106\">\n<contactref element=\"FPGA\" pad=\"106\"/>\n<contactref element=\"PIN_LEFT\" pad=\"4\"/>\n<wire x1=\"23.3\" y1=\"24.7\" x2=\"23.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"22.7\" x2=\"23.3\" y2=\"24.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"20.4\" x2=\"25.3\" y2=\"22.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"15\" x2=\"25.3\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.5\" y1=\"14.2\" x2=\"25.3\" y2=\"15\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.5\" y1=\"2.4\" x2=\"24.5\" y2=\"14.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"24.5\" y1=\"-1.3\" x2=\"24.5\" y2=\"2.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.1\" y1=\"-3.9\" x2=\"24.5\" y2=\"-1.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.1\" y1=\"-7.9\" x2=\"27.1\" y2=\"-3.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.3\" y1=\"40.8\" x2=\"23.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.1\" y1=\"-7.9\" x2=\"27.13\" y2=\"-7.9\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"25.3\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"24.5\" y=\"14.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"24.5\" y=\"2.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGINFROMRIGHT_86\">\n<contactref element=\"FPGA\" pad=\"86\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"5\"/>\n<wire x1=\"33.3\" y1=\"39.4\" x2=\"33.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.3\" y1=\"61\" x2=\"33.3\" y2=\"39.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.7\" y1=\"63.6\" x2=\"33.3\" y2=\"61\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.7\" y1=\"63.7\" x2=\"30.7\" y2=\"63.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.2\" y1=\"64.2\" x2=\"30.7\" y2=\"63.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.2\" y1=\"64.2\" x2=\"30.2\" y2=\"64.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.3\" y1=\"63.3\" x2=\"28.2\" y2=\"64.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.3\" y1=\"40.8\" x2=\"33.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.3\" y1=\"63.3\" x2=\"27.23\" y2=\"63.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"33.3\" y=\"39.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGOUTORIGHT_87\">\n<contactref element=\"FPGA\" pad=\"87\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"4\"/>\n<wire x1=\"32.7\" y1=\"39.9\" x2=\"32.7\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"41.6\" x2=\"32.7\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.9\" y1=\"41.8\" x2=\"32.7\" y2=\"41.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.9\" y1=\"60.2\" x2=\"32.9\" y2=\"41.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.8\" y1=\"63.3\" x2=\"32.9\" y2=\"60.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.7\" y1=\"40.8\" x2=\"32.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.8\" y1=\"63.3\" x2=\"29.77\" y2=\"63.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"32.7\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALTORIGHT_RX_92\">\n<contactref element=\"FPGA\" pad=\"92\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"7\"/>\n<contactref element=\"U340G\" pad=\"3\"/>\n<wire x1=\"30.3\" y1=\"41.9\" x2=\"30.3\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"50\" x2=\"30.3\" y2=\"41.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.2\" y1=\"63.3\" x2=\"22.2\" y2=\"50\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30.3\" y1=\"40.9\" x2=\"30.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"63.3\" x2=\"22.15\" y2=\"63.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"9\" y1=\"58\" x2=\"9\" y2=\"57.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"64.4\" x2=\"9\" y2=\"58\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21\" y1=\"64.4\" x2=\"15.4\" y2=\"64.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"63.3\" x2=\"21\" y2=\"64.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9\" y1=\"57.7\" x2=\"8.905\" y2=\"57.695\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"63.3\" x2=\"22.15\" y2=\"63.3\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"30.3\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALFROMRIGHT_TX_93\">\n<contactref element=\"FPGA\" pad=\"93\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"6\"/>\n<contactref element=\"U340G\" pad=\"2\"/>\n<wire x1=\"29.7\" y1=\"39.9\" x2=\"29.7\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.7\" y1=\"40.1\" x2=\"29.7\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.2\" y1=\"42.6\" x2=\"29.7\" y2=\"40.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.2\" y1=\"60.8\" x2=\"27.2\" y2=\"42.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.7\" y1=\"63.3\" x2=\"27.2\" y2=\"60.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"29.7\" y1=\"40.8\" x2=\"29.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.7\" y1=\"63.3\" x2=\"24.69\" y2=\"63.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.2\" y1=\"57.9\" x2=\"10.2\" y2=\"57.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.5\" y1=\"62.2\" x2=\"10.2\" y2=\"57.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.5\" y1=\"62.2\" x2=\"14.5\" y2=\"62.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"63.3\" x2=\"23.5\" y2=\"62.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.2\" y1=\"57.7\" x2=\"10.175\" y2=\"57.695\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"63.3\" x2=\"24.69\" y2=\"63.3\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"29.7\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"27.2\" y=\"60.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALTOLEFT_96\">\n<contactref element=\"FPGA\" pad=\"96\"/>\n<contactref element=\"PIN_LEFT\" pad=\"3\"/>\n<wire x1=\"28.3\" y1=\"38\" x2=\"28.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.4\" y1=\"28.9\" x2=\"28.3\" y2=\"38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.4\" y1=\"25.9\" x2=\"37.4\" y2=\"28.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.4\" y1=\"20.4\" x2=\"37.4\" y2=\"25.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39.4\" y1=\"18.4\" x2=\"37.4\" y2=\"20.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39.4\" y1=\"6.9\" x2=\"39.4\" y2=\"18.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"24.6\" y1=\"-7.9\" x2=\"39.4\" y2=\"6.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"28.3\" y1=\"40.8\" x2=\"28.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"-7.9\" x2=\"24.59\" y2=\"-7.9\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"37.4\" y=\"25.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALFROMLEFT_98\">\n<contactref element=\"FPGA\" pad=\"98\"/>\n<contactref element=\"PIN_LEFT\" pad=\"2\"/>\n<wire x1=\"27.3\" y1=\"38.2\" x2=\"27.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"29.7\" x2=\"27.3\" y2=\"38.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"21.5\" x2=\"35.8\" y2=\"29.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39\" y1=\"18.3\" x2=\"35.8\" y2=\"21.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"39\" y1=\"7.4\" x2=\"39\" y2=\"18.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"24.8\" y1=\"-6.8\" x2=\"39\" y2=\"7.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"23.2\" y1=\"-6.8\" x2=\"24.8\" y2=\"-6.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.1\" y1=\"-7.9\" x2=\"23.2\" y2=\"-6.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"27.3\" y1=\"40.8\" x2=\"27.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"-7.9\" x2=\"22.05\" y2=\"-7.9\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"35.8\" y=\"29.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CLKINFROMRIGHT_26\">\n<contactref element=\"FPGA\" pad=\"26\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"1\"/>\n<wire x1=\"34.8\" y1=\"23.6\" x2=\"34.8\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"37.4\" x2=\"34.8\" y2=\"23.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"38\" y1=\"40.6\" x2=\"34.8\" y2=\"37.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"38\" y1=\"62.7\" x2=\"38\" y2=\"40.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.4\" y1=\"63.3\" x2=\"38\" y2=\"62.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.8\" y1=\"19.4\" x2=\"34.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.4\" y1=\"63.3\" x2=\"37.39\" y2=\"63.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"34.8\" y=\"23.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SPARELEFT_102\">\n<contactref element=\"PIN_LEFT\" pad=\"7\"/>\n<contactref element=\"FPGA\" pad=\"102\"/>\n<wire x1=\"25.3\" y1=\"26.6\" x2=\"25.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.5\" y1=\"22.4\" x2=\"25.3\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.5\" y1=\"20.4\" x2=\"29.5\" y2=\"22.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.5\" y1=\"-4.8\" x2=\"31.5\" y2=\"20.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.7\" y1=\"-7.6\" x2=\"31.5\" y2=\"-4.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.7\" y1=\"-8.2\" x2=\"28.7\" y2=\"-7.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.3\" y1=\"-8.8\" x2=\"28.7\" y2=\"-8.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.8\" y1=\"-8.8\" x2=\"29.3\" y2=\"-8.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.7\" y1=\"-7.9\" x2=\"33.8\" y2=\"-8.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.3\" y1=\"40.8\" x2=\"25.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.7\" y1=\"-7.9\" x2=\"34.75\" y2=\"-7.9\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"29.5\" y=\"22.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SPARERIGHT_99\">\n<contactref element=\"FPGA\" pad=\"99\"/>\n<contactref element=\"PIN_RIGHT\" pad=\"2\"/>\n<wire x1=\"26.7\" y1=\"39.9\" x2=\"26.7\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.4\" y1=\"39.9\" x2=\"26.7\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.5\" y1=\"38.8\" x2=\"28.4\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.5\" y1=\"38.8\" x2=\"29.5\" y2=\"38.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.1\" y1=\"39.4\" x2=\"33.5\" y2=\"38.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.1\" y1=\"42.2\" x2=\"34.1\" y2=\"39.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.8\" y1=\"42.9\" x2=\"34.1\" y2=\"42.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.8\" y1=\"63.3\" x2=\"34.8\" y2=\"42.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.7\" y1=\"40.8\" x2=\"26.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"63.3\" x2=\"34.85\" y2=\"63.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"26.7\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"5VINFROMUSB\" class=\"3\">\n<contactref element=\"USB1\" pad=\"1\"/>\n<contactref element=\"S9\" pad=\"1\"/>\n<wire x1=\"46.7\" y1=\"58.5\" x2=\"47.1523\" y2=\"58.9523\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"47.1523\" y1=\"58.9523\" x2=\"47.2682875\" y2=\"58.9523\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"47.2682875\" y1=\"58.9523\" x2=\"48.2429\" y2=\"59.9269125\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"48.2429\" y1=\"64.27703125\" x2=\"46.51993125\" y2=\"66\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"48.2429\" y1=\"59.9269125\" x2=\"48.2429\" y2=\"64.27703125\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"46.51993125\" y1=\"66\" x2=\"1\" y2=\"66\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"1\" y1=\"66\" x2=\"-6\" y2=\"59\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"-6\" y1=\"59\" x2=\"-6\" y2=\"56\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"-6\" y1=\"56\" x2=\"-6.1\" y2=\"55.9\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"-6.1\" y1=\"55.9\" x2=\"-7.56\" y2=\"55.9\" width=\"0.381\" layer=\"1\"/>\n</signal>\n<signal name=\"A13\">\n<contactref element=\"FPGA\" pad=\"13\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"14\"/>\n<wire x1=\"28.3\" y1=\"18.8\" x2=\"28.3\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.3\" y1=\"17.8\" x2=\"28.3\" y2=\"18.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.3\" y1=\"16.8\" x2=\"29.3\" y2=\"17.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.9\" y1=\"12.2\" x2=\"29.3\" y2=\"16.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.9\" y1=\"7.7\" x2=\"33.9\" y2=\"12.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.7\" y1=\"6.9\" x2=\"33.9\" y2=\"7.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.7\" y1=\"6.3\" x2=\"34.7\" y2=\"6.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.3\" y1=\"19.3\" x2=\"28.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.7\" y1=\"6.3\" x2=\"34.75\" y2=\"6.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"29.3\" y=\"17.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.9\" y=\"12.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A12\">\n<contactref element=\"FPGA\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"12\"/>\n<wire x1=\"27.8\" y1=\"18.4\" x2=\"27.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"16.5\" x2=\"27.8\" y2=\"18.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.4\" y1=\"10.9\" x2=\"27.8\" y2=\"16.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.4\" y1=\"7.4\" x2=\"33.4\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"32.3\" y1=\"6.3\" x2=\"33.4\" y2=\"7.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"19.3\" x2=\"27.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.3\" y1=\"6.3\" x2=\"32.21\" y2=\"6.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"27.8\" y=\"18.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.4\" y=\"7.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A11\">\n<contactref element=\"FPGA\" pad=\"11\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"10\"/>\n<wire x1=\"27.2\" y1=\"18.2\" x2=\"27.2\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.7\" y1=\"16.7\" x2=\"27.2\" y2=\"18.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.9\" y1=\"16.7\" x2=\"28.7\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.9\" y1=\"7.5\" x2=\"30.9\" y2=\"16.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.8\" y1=\"7.4\" x2=\"30.9\" y2=\"7.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.7\" y1=\"6.3\" x2=\"30.8\" y2=\"7.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.2\" y1=\"19.3\" x2=\"27.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.7\" y1=\"6.3\" x2=\"29.67\" y2=\"6.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"30.9\" y=\"16.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"30.8\" y=\"7.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A10\">\n<contactref element=\"FPGA\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"8\"/>\n<wire x1=\"26.8\" y1=\"17.8\" x2=\"26.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"17\" x2=\"26.8\" y2=\"17.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"27.6\" y1=\"16.2\" x2=\"26.8\" y2=\"17\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"27.6\" y1=\"7.7\" x2=\"27.6\" y2=\"16.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"27.6\" y1=\"6.7\" x2=\"27.6\" y2=\"7.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.2\" y1=\"6.3\" x2=\"27.6\" y2=\"6.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"19.3\" x2=\"26.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.2\" y1=\"6.3\" x2=\"27.13\" y2=\"6.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"26.8\" y=\"17.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"27.6\" y=\"7.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A8\">\n<contactref element=\"FPGA\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"6\"/>\n<wire x1=\"25.7\" y1=\"7.4\" x2=\"25.7\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"6.3\" x2=\"25.7\" y2=\"7.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"19.3\" x2=\"25.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"6.3\" x2=\"24.59\" y2=\"6.221\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"A7\">\n<contactref element=\"FPGA\" pad=\"7\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"4\"/>\n<wire x1=\"25.2\" y1=\"9.4\" x2=\"25.2\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"6.3\" x2=\"25.2\" y2=\"9.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.2\" y1=\"19.3\" x2=\"25.21\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"6.3\" x2=\"22.05\" y2=\"6.221\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"A6\">\n<contactref element=\"FPGA\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"2\"/>\n<wire x1=\"24.8\" y1=\"15.5\" x2=\"24.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"10.3\" x2=\"24.8\" y2=\"15.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"6.3\" x2=\"19.6\" y2=\"10.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"19.3\" x2=\"24.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"6.3\" x2=\"19.51\" y2=\"6.221\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"A14\">\n<contactref element=\"FPGA\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"16\"/>\n<wire x1=\"28.7\" y1=\"20.4\" x2=\"28.7\" y2=\"19.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.7\" y1=\"16.6\" x2=\"28.7\" y2=\"20.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.6\" y1=\"7.7\" x2=\"28.7\" y2=\"16.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.6\" y1=\"6.6\" x2=\"37.6\" y2=\"7.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"6.3\" x2=\"37.6\" y2=\"6.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.7\" y1=\"19.4\" x2=\"28.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"6.3\" x2=\"37.29\" y2=\"6.221\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"28.7\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"37.6\" y=\"7.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB2\">\n<contactref element=\"U2\" pad=\"7\"/>\n<contactref element=\"GAINSW4\" pad=\"4\"/>\n<contactref element=\"OVSAMP2\" pad=\"1\"/>\n<wire x1=\"58.4\" y1=\"26.2\" x2=\"57.4\" y2=\"26.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"32.9\" x2=\"58.4\" y2=\"26.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"65.1\" y1=\"43.7\" x2=\"65.1\" y2=\"32.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.9\" y1=\"43.9\" x2=\"65.1\" y2=\"43.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.9\" y1=\"48.5\" x2=\"64.9\" y2=\"45.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.9\" y1=\"45.6\" x2=\"64.9\" y2=\"43.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.9\" y1=\"50.3\" x2=\"64.9\" y2=\"48.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"50.7\" x2=\"64.9\" y2=\"50.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.4\" y1=\"26.2\" x2=\"57.31\" y2=\"26.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"50.7\" x2=\"65.365\" y2=\"50.7638\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.4\" y1=\"52.1\" x2=\"59.2\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"45.6\" x2=\"58.4\" y2=\"52.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.2\" y1=\"52.9\" x2=\"59.25\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.4\" y=\"26.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"64.9\" y=\"48.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"58.4\" y=\"52.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA1\">\n<contactref element=\"IC1\" pad=\"3\"/>\n<contactref element=\"U1\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"4\"/>\n<contactref element=\"OVSAMP1\" pad=\"3\"/>\n<wire x1=\"58.1\" y1=\"0.4\" x2=\"59\" y2=\"-0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.6\" y1=\"0.4\" x2=\"58.1\" y2=\"0.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.7\" y1=\"4.5\" x2=\"58.6\" y2=\"0.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59\" y1=\"-0.5\" x2=\"59.05\" y2=\"-0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57\" y1=\"33\" x2=\"57.3\" y2=\"33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.9\" y1=\"31.9\" x2=\"57\" y2=\"33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.9\" y1=\"27.4\" x2=\"55.9\" y2=\"31.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54.7\" y1=\"26.2\" x2=\"55.9\" y2=\"27.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"57.3\" y1=\"33\" x2=\"57.31\" y2=\"33.05\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"58.1\" y=\"0.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"62.7\" y=\"4.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"55.9\" y=\"31.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"54.7\" y=\"26.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"54.5\" y1=\"16.25\" x2=\"55.85\" y2=\"16.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.8\" y1=\"14.9\" x2=\"55.8\" y2=\"16.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.5\" y1=\"13.2\" x2=\"55.8\" y2=\"14.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.5\" y1=\"1\" x2=\"57.5\" y2=\"13.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.1\" y1=\"0.4\" x2=\"57.5\" y2=\"1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.8\" y1=\"16.2\" x2=\"55.85\" y2=\"16.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.7\" y1=\"21.4\" x2=\"54.7\" y2=\"26.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.7\" y1=\"17.3\" x2=\"54.7\" y2=\"21.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"55.8\" y1=\"16.2\" x2=\"54.7\" y2=\"17.3\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"55.8\" y=\"16.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"54.7\" y=\"21.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"62.7\" y1=\"4.5\" x2=\"63.85\" y2=\"4.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.85\" y1=\"4.5\" x2=\"63.995\" y2=\"4.4362\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"L131\">\n<contactref element=\"FPGA\" pad=\"131\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"6\"/>\n<wire x1=\"21.4\" y1=\"27.8\" x2=\"20.3\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"28.4\" x2=\"21.4\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"29\" x2=\"22\" y2=\"28.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.4\" y1=\"34.6\" x2=\"22\" y2=\"29\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.4\" y1=\"34.6\" x2=\"16.4\" y2=\"34.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.4\" y1=\"35.6\" x2=\"9.4\" y2=\"34.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"35.6\" x2=\"8.4\" y2=\"35.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"27.8\" x2=\"20.21\" y2=\"27.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"35.6\" x2=\"-10\" y2=\"35.63\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"22\" y=\"28.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L132\">\n<contactref element=\"FPGA\" pad=\"132\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"7\"/>\n<wire x1=\"18.6\" y1=\"27.4\" x2=\"20.2\" y2=\"27.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.3\" y1=\"27.4\" x2=\"18.6\" y2=\"27.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.1\" y1=\"29.6\" x2=\"17.3\" y2=\"27.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.6\" y1=\"29.6\" x2=\"15.1\" y2=\"29.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.9\" y1=\"30.3\" x2=\"13.6\" y2=\"29.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.6\" y1=\"34.6\" x2=\"12.9\" y2=\"30.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-8.5\" y1=\"34.6\" x2=\"8.6\" y2=\"34.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"33.1\" x2=\"-8.5\" y2=\"34.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"27.4\" x2=\"20.21\" y2=\"27.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"33.1\" x2=\"-10\" y2=\"33.09\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"18.6\" y=\"27.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"12.9\" y=\"30.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.6\" y=\"34.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"5VINFROMRIGHT\" class=\"3\">\n<contactref element=\"PIN_RIGHT\" pad=\"3\"/>\n<contactref element=\"S9\" pad=\"3\"/>\n<wire x1=\"32.31\" y1=\"63.3\" x2=\"34.01\" y2=\"65\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"45.2\" y1=\"65\" x2=\"46.7\" y2=\"63.5\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"34.01\" y1=\"65\" x2=\"45.2\" y2=\"65\" width=\"0.381\" layer=\"1\"/>\n</signal>\n<signal name=\"CLKOUT_32\">\n<contactref element=\"FPGA\" pad=\"32\"/>\n<contactref element=\"IC1\" pad=\"15\"/>\n<wire x1=\"52.75\" y1=\"21.5\" x2=\"52.75\" y2=\"23.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.7\" y1=\"19.3\" x2=\"37.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38\" y1=\"21\" x2=\"37.7\" y2=\"20.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.7\" y1=\"20.7\" x2=\"37.7\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48\" y1=\"27.5\" x2=\"38.4\" y2=\"27.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"38.4\" y1=\"27.5\" x2=\"38\" y2=\"27.1\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"38\" y=\"21.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"38.4\" y=\"27.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"50.1\" y=\"26.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"38\" y1=\"27.1\" x2=\"38\" y2=\"21.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"49.8\" y1=\"26.2\" x2=\"50.1\" y2=\"26.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.7\" y1=\"23.6\" x2=\"52.7\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.1\" y1=\"26.2\" x2=\"52.7\" y2=\"23.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"23.3\" x2=\"52.75\" y2=\"23.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38\" y1=\"21.5\" x2=\"38\" y2=\"21\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48\" y1=\"27.5\" x2=\"48.5\" y2=\"27.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.5\" y1=\"27.5\" x2=\"49.8\" y2=\"26.2\" width=\"0.1524\" layer=\"15\"/>\n</signal>\n<signal name=\"IO_101\">\n<contactref element=\"FPGA\" pad=\"101\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"15\"/>\n<wire x1=\"25.7\" y1=\"41.7\" x2=\"25.7\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"42.1\" x2=\"25.7\" y2=\"41.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"50.7\" x2=\"25.3\" y2=\"42.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.8\" y1=\"55.2\" x2=\"25.3\" y2=\"50.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.7\" y1=\"56.3\" x2=\"20.8\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"40.9\" x2=\"25.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.7\" y1=\"56.3\" x2=\"19.61\" y2=\"56.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"25.3\" y=\"42.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"20.8\" y=\"55.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_100\">\n<contactref element=\"FPGA\" pad=\"100\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"13\"/>\n<wire x1=\"26.2\" y1=\"42\" x2=\"26.2\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.2\" y1=\"50.3\" x2=\"26.2\" y2=\"42\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.3\" y1=\"53.2\" x2=\"26.2\" y2=\"50.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.3\" y1=\"55.2\" x2=\"23.3\" y2=\"53.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.2\" y1=\"56.3\" x2=\"23.3\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.2\" y1=\"40.9\" x2=\"26.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"56.3\" x2=\"22.15\" y2=\"56.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"26.2\" y=\"42\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.3\" y=\"55.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_91\">\n<contactref element=\"FPGA\" pad=\"91\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"11\"/>\n<wire x1=\"30.7\" y1=\"40.2\" x2=\"30.7\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.4\" y1=\"39.9\" x2=\"30.7\" y2=\"40.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.4\" y1=\"39.5\" x2=\"30.4\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.1\" y1=\"39.5\" x2=\"30.4\" y2=\"39.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.9\" y1=\"39.3\" x2=\"30.1\" y2=\"39.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.5\" y1=\"39.3\" x2=\"29.9\" y2=\"39.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.8\" y1=\"42\" x2=\"29.5\" y2=\"39.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.8\" y1=\"50.2\" x2=\"26.8\" y2=\"42\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.8\" y1=\"51.2\" x2=\"26.8\" y2=\"50.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.8\" y1=\"55.2\" x2=\"25.8\" y2=\"51.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.7\" y1=\"56.3\" x2=\"25.8\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.7\" y1=\"40.8\" x2=\"30.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.7\" y1=\"56.3\" x2=\"24.69\" y2=\"56.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"30.4\" y=\"39.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"25.8\" y=\"55.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_90\">\n<contactref element=\"FPGA\" pad=\"90\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"9\"/>\n<wire x1=\"31.2\" y1=\"39.9\" x2=\"31.2\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.2\" y1=\"40.2\" x2=\"31.2\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.6\" y1=\"41.8\" x2=\"31.2\" y2=\"40.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.6\" y1=\"48.4\" x2=\"29.6\" y2=\"41.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.4\" y1=\"49.6\" x2=\"29.6\" y2=\"48.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.4\" y1=\"55.2\" x2=\"28.4\" y2=\"49.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.3\" y1=\"56.3\" x2=\"28.4\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.2\" y1=\"40.8\" x2=\"31.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.3\" y1=\"56.3\" x2=\"27.23\" y2=\"56.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"31.2\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"28.4\" y=\"55.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_89\">\n<contactref element=\"FPGA\" pad=\"89\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"7\"/>\n<wire x1=\"31.7\" y1=\"41.6\" x2=\"31.7\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.4\" y1=\"41.9\" x2=\"31.7\" y2=\"41.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.4\" y1=\"51.6\" x2=\"31.4\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.9\" y1=\"52.1\" x2=\"31.4\" y2=\"51.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.9\" y1=\"55.2\" x2=\"30.9\" y2=\"52.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.8\" y1=\"56.3\" x2=\"30.9\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.7\" y1=\"40.9\" x2=\"31.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.8\" y1=\"56.3\" x2=\"29.77\" y2=\"56.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"31.4\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"30.9\" y=\"55.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_88\">\n<contactref element=\"FPGA\" pad=\"88\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"5\"/>\n<wire x1=\"32.2\" y1=\"41.9\" x2=\"32.2\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"51.3\" x2=\"32.2\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.7\" y1=\"51.8\" x2=\"32.2\" y2=\"51.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.7\" y1=\"54.8\" x2=\"31.7\" y2=\"51.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.7\" y1=\"55.7\" x2=\"31.7\" y2=\"54.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.3\" y1=\"56.3\" x2=\"31.7\" y2=\"55.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"40.9\" x2=\"32.21\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.3\" y1=\"56.3\" x2=\"32.31\" y2=\"56.321\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"32.2\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.7\" y=\"54.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB-1\">\n<contactref element=\"IC1\" pad=\"10\"/>\n<contactref element=\"C-AIN2\" pad=\"1\"/>\n<contactref element=\"IC1\" pad=\"11\"/>\n<wire x1=\"54.5\" y1=\"20.25\" x2=\"54.5\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.9\" y1=\"19.8\" x2=\"54.5\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.2\" y1=\"19.8\" x2=\"55.9\" y2=\"19.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"17.9\" x2=\"57.2\" y2=\"19.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"17.8\" x2=\"59.1\" y2=\"17.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.5\" y1=\"19.8\" x2=\"54.5\" y2=\"19.75\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.9\" y=\"19.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB-2\">\n<contactref element=\"C-AIN4\" pad=\"1\"/>\n<contactref element=\"IC2\" pad=\"10\"/>\n<contactref element=\"IC2\" pad=\"11\"/>\n<wire x1=\"54.5\" y1=\"40.25\" x2=\"54.5\" y2=\"39.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55\" y1=\"40.3\" x2=\"54.5\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"41.5\" x2=\"55\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"42\" x2=\"56.2\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"40.3\" x2=\"54.5\" y2=\"40.25\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INAMINUS1\">\n<contactref element=\"U1\" pad=\"2\"/>\n<contactref element=\"RGAIN1_1\" pad=\"2\"/>\n<contactref element=\"RGAIN2_1\" pad=\"2\"/>\n<contactref element=\"CGAIN1_1\" pad=\"1\"/>\n<contactref element=\"CH1\" pad=\"+\"/>\n<contactref element=\"CL1\" pad=\"+\"/>\n<contactref element=\"CIN1NF_1\" pad=\"2\"/>\n<contactref element=\"CIN56_1\" pad=\"2\"/>\n<contactref element=\"RIN1_11K\" pad=\"2\"/>\n<contactref element=\"RIN1\" pad=\"2\"/>\n<contactref element=\"CIN5_1\" pad=\"2\"/>\n<wire x1=\"70\" y1=\"1.9\" x2=\"66.4\" y2=\"1.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"2.9\" x2=\"71\" y2=\"3.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"1.9\" x2=\"71\" y2=\"2.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"1.9\" x2=\"70\" y2=\"1.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"3\" x2=\"65.3\" y2=\"4.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"1.9\" x2=\"65.35\" y2=\"2.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.35\" y1=\"2.95\" x2=\"65.3\" y2=\"3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"4.4\" x2=\"65.265\" y2=\"4.4362\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"1.9\" x2=\"66.4\" y2=\"1.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66\" y1=\"1.9\" x2=\"65.2\" y2=\"1.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.2\" y1=\"1.9\" x2=\"63.8\" y2=\"1.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"1.9\" x2=\"66\" y2=\"1.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"3\" x2=\"60.9\" y2=\"1.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"1.9\" x2=\"60.9\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"0.6\" x2=\"60.85\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"3\" x2=\"60.9\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"5.6\" x2=\"60.95\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"3\" x2=\"60.85\" y2=\"3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"5.8\" x2=\"64.7\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"5.6\" x2=\"61.2\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"5.8\" x2=\"64.7\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"5.6\" x2=\"60.95\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.5\" y1=\"5.9\" x2=\"69\" y2=\"5.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.6\" y1=\"6.8\" x2=\"68.5\" y2=\"5.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.6\" y1=\"6.8\" x2=\"67.6\" y2=\"6.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"5.9\" x2=\"65.6\" y2=\"6.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"5.9\" x2=\"69\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"5.9\" x2=\"64.7\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"1.9\" x2=\"63.8\" y2=\"1.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.8\" y1=\"1.9\" x2=\"63.8\" y2=\"1.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.2\" y1=\"2.8\" x2=\"65.35\" y2=\"2.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.2\" y1=\"1.9\" x2=\"65.2\" y2=\"2.8\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65.2\" y=\"2.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INBMINUS1\">\n<contactref element=\"U1\" pad=\"6\"/>\n<contactref element=\"CGAIN1_2\" pad=\"1\"/>\n<contactref element=\"RGAIN1_2\" pad=\"2\"/>\n<contactref element=\"RGAIN2_2\" pad=\"2\"/>\n<contactref element=\"CH2\" pad=\"+\"/>\n<contactref element=\"CL2\" pad=\"+\"/>\n<contactref element=\"CIN1NF_2\" pad=\"2\"/>\n<contactref element=\"CIN56_2\" pad=\"2\"/>\n<contactref element=\"RIN2_11K\" pad=\"2\"/>\n<contactref element=\"RIN2\" pad=\"2\"/>\n<contactref element=\"CIN5_2\" pad=\"2\"/>\n<wire x1=\"68.8\" y1=\"10\" x2=\"71\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.2\" y1=\"10.6\" x2=\"68.8\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"10.6\" x2=\"67.9\" y2=\"10.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.9\" y1=\"10.6\" x2=\"68.2\" y2=\"10.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.6\" y1=\"9.8\" x2=\"67.4\" y2=\"10.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.6\" y1=\"9.4\" x2=\"66.6\" y2=\"9.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"10\" x2=\"71\" y2=\"9.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.6\" y1=\"9.4\" x2=\"66.535\" y2=\"9.3638\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"14.9\" x2=\"66.4\" y2=\"14.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"14.9\" x2=\"70\" y2=\"14.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.4\" y1=\"12.4\" x2=\"61.4\" y2=\"10.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"10.3\" x2=\"61.4\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"10.2\" x2=\"61.35\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"12.4\" x2=\"61.35\" y2=\"12.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"10.3\" x2=\"62.25\" y2=\"11.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.25\" y1=\"11.15\" x2=\"64.9\" y2=\"13.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"13.8\" x2=\"64.9\" y2=\"13.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"10.3\" x2=\"61.35\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.4\" y1=\"12.1\" x2=\"67\" y2=\"12.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"12.1\" x2=\"67.1\" y2=\"12.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.4\" y1=\"11.1\" x2=\"66.4\" y2=\"12.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.3\" y1=\"11.1\" x2=\"65.4\" y2=\"11.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"12.1\" x2=\"67.1\" y2=\"12.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.3\" y1=\"11.1\" x2=\"62.25\" y2=\"11.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"9.9\" x2=\"61\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"8.1\" x2=\"61\" y2=\"7.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.3\" y1=\"10.2\" x2=\"61\" y2=\"9.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"7.9\" x2=\"60.95\" y2=\"7.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.3\" y1=\"10.2\" x2=\"61.35\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"8.1\" x2=\"64.7\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"8.1\" x2=\"64.7\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"8.1\" x2=\"60.95\" y2=\"7.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"8.7\" x2=\"69\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"8.8\" x2=\"68.4\" y2=\"8.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.8\" y1=\"9.4\" x2=\"68.4\" y2=\"8.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.8\" y1=\"11.3\" x2=\"67.8\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.8\" y1=\"10.9\" x2=\"67.8\" y2=\"9.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"12.1\" x2=\"67.8\" y2=\"11.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"8.1\" x2=\"69\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"12.1\" x2=\"67.1\" y2=\"12.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"14.9\" x2=\"66.4\" y2=\"14.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"14.3\" x2=\"65.3\" y2=\"14.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"13.9\" x2=\"65.3\" y2=\"14.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.4\" y1=\"14.9\" x2=\"66.4\" y2=\"14.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"13.9\" x2=\"64.9\" y2=\"13.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"10.9\" x2=\"67.9\" y2=\"10.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.8\" y1=\"10.9\" x2=\"67.9\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65.3\" y=\"14.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67.9\" y=\"10.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INBMINUS2\">\n<contactref element=\"U2\" pad=\"6\"/>\n<contactref element=\"RGAIN1_4\" pad=\"2\"/>\n<contactref element=\"RGAIN2_4\" pad=\"2\"/>\n<contactref element=\"CGAIN1_4\" pad=\"1\"/>\n<contactref element=\"CH4\" pad=\"+\"/>\n<contactref element=\"CL4\" pad=\"+\"/>\n<contactref element=\"CIN1NF_4\" pad=\"2\"/>\n<contactref element=\"CIN56_4\" pad=\"2\"/>\n<contactref element=\"RIN4_11K\" pad=\"2\"/>\n<contactref element=\"RIN4\" pad=\"2\"/>\n<contactref element=\"CIN5_4\" pad=\"2\"/>\n<wire x1=\"67.3\" y1=\"56.1\" x2=\"65.9\" y2=\"56.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"56.2\" x2=\"67.3\" y2=\"56.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.5\" y1=\"56.2\" x2=\"67.4\" y2=\"56.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"56.1\" x2=\"69.5\" y2=\"56.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"56.1\" x2=\"65.9\" y2=\"56.09788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"56.1\" x2=\"69.6\" y2=\"56.09788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.9\" y1=\"49.1\" x2=\"69.4\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"49.1\" x2=\"70\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"49.1\" x2=\"71\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.7\" y1=\"50.3\" x2=\"67.9\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.7\" y1=\"50.7\" x2=\"66.7\" y2=\"50.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"49.1\" x2=\"71\" y2=\"49.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.7\" y1=\"50.7\" x2=\"66.635\" y2=\"50.7638\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"54.3\" x2=\"69.6\" y2=\"56.09788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.5\" y1=\"53.4\" x2=\"69.6\" y2=\"54.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.5\" y1=\"52.2\" x2=\"70.5\" y2=\"53.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"51.7\" x2=\"70.5\" y2=\"52.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"49.1\" x2=\"70\" y2=\"51.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.2\" y1=\"54.1\" x2=\"61.2\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.1\" y1=\"49.6\" x2=\"61.2\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.1\" y1=\"49.6\" x2=\"64.1\" y2=\"49.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"49.6\" x2=\"61.2\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"51.9\" x2=\"61.15\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"49.6\" x2=\"60.75\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.5\" y1=\"53.7\" x2=\"66.1\" y2=\"53.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"55.3\" x2=\"65.5\" y2=\"53.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.1\" y1=\"53.7\" x2=\"66.1\" y2=\"53.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"55.3\" x2=\"63.9\" y2=\"55.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.1\" y1=\"49.6\" x2=\"70.5\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"48.7\" x2=\"69.25\" y2=\"48.75\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.25\" y1=\"48.75\" x2=\"70.1\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.6\" y1=\"48.7\" x2=\"69.2\" y2=\"48.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.2\" y1=\"49.1\" x2=\"67.6\" y2=\"48.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.2\" y1=\"52.5\" x2=\"67.2\" y2=\"49.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.1\" y1=\"53.6\" x2=\"67.2\" y2=\"52.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"49.6\" x2=\"70.5\" y2=\"49.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.1\" y1=\"53.6\" x2=\"66.1\" y2=\"53.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.8\" y1=\"54.1\" x2=\"61.2\" y2=\"54.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"55.2\" x2=\"62.8\" y2=\"54.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"54.1\" x2=\"61.15\" y2=\"54.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"55.2\" x2=\"63.9\" y2=\"55.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.4\" y1=\"48.6\" x2=\"69.4\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.25\" y1=\"48.75\" x2=\"69.4\" y2=\"48.6\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"69.4\" y=\"48.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET1\">\n<contactref element=\"U1\" pad=\"3\"/>\n<contactref element=\"COFFSETB6\" pad=\"2\"/>\n<contactref element=\"ROFFSET1\" pad=\"1\"/>\n<contactref element=\"COFFSETA6\" pad=\"2\"/>\n<wire x1=\"64.4\" y1=\"23.9\" x2=\"64.4\" y2=\"26.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.3\" y1=\"21\" x2=\"64.4\" y2=\"23.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.3\" y1=\"15.9\" x2=\"67.3\" y2=\"21\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.3\" y1=\"5.4\" x2=\"67.3\" y2=\"15.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"69.9\" y1=\"2.8\" x2=\"67.3\" y2=\"5.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"69.4\" y1=\"2.8\" x2=\"69.7\" y2=\"2.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.6\" y1=\"2\" x2=\"69.4\" y2=\"2.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.4\" y1=\"26.7\" x2=\"64.35\" y2=\"26.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.9\" y1=\"-0.6\" x2=\"70.9\" y2=\"-1.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.7\" y1=\"0.6\" x2=\"70.9\" y2=\"-0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.7\" y1=\"2.8\" x2=\"69.7\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.7\" y1=\"2.8\" x2=\"69.9\" y2=\"2.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.6\" y1=\"4.9\" x2=\"66.6\" y2=\"4.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"5.7\" x2=\"66.6\" y2=\"4.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.2\" y1=\"5.7\" x2=\"67.4\" y2=\"5.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.9\" y1=\"4\" x2=\"68.2\" y2=\"5.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.9\" y1=\"2.8\" x2=\"69.9\" y2=\"4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.6\" y1=\"4.5\" x2=\"66.535\" y2=\"4.4362\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"67.3\" y=\"15.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"69.9\" y=\"2.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET2\">\n<contactref element=\"U1\" pad=\"5\"/>\n<contactref element=\"COFFSETB8\" pad=\"2\"/>\n<contactref element=\"ROFFSET2\" pad=\"1\"/>\n<contactref element=\"COFFSETA1\" pad=\"2\"/>\n<wire x1=\"64.3\" y1=\"28.4\" x2=\"64.3\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.4\" y1=\"27.5\" x2=\"64.3\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.4\" y1=\"19\" x2=\"63.4\" y2=\"27.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"14.4\" x2=\"63.75\" y2=\"18.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.75\" y1=\"18.65\" x2=\"63.4\" y2=\"19\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"13.4\" x2=\"68\" y2=\"14.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"12.3\" x2=\"68\" y2=\"13.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.3\" y1=\"28.9\" x2=\"64.35\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"12.2\" x2=\"71.3\" y2=\"12.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"12.3\" x2=\"69.2\" y2=\"12.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.8\" y1=\"9\" x2=\"67.8\" y2=\"9.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.9\" y1=\"8.1\" x2=\"67.8\" y2=\"9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"8.1\" x2=\"66.9\" y2=\"8.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.8\" y1=\"8.5\" x2=\"66.2\" y2=\"8.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.8\" y1=\"10.8\" x2=\"65.8\" y2=\"8.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63\" y1=\"13.6\" x2=\"65.8\" y2=\"10.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.1\" y1=\"15.5\" x2=\"63\" y2=\"13.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"16\" x2=\"61.1\" y2=\"15.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.75\" y1=\"18.65\" x2=\"61.1\" y2=\"16\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.8\" y1=\"9.3\" x2=\"67.805\" y2=\"9.3638\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"63\" y=\"13.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET3\">\n<contactref element=\"U2\" pad=\"3\"/>\n<contactref element=\"COFFSETB10\" pad=\"2\"/>\n<contactref element=\"ROFFSET3\" pad=\"1\"/>\n<contactref element=\"COFFSETA2\" pad=\"2\"/>\n<wire x1=\"63\" y1=\"31.1\" x2=\"64.35\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"33\" x2=\"63\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"39\" x2=\"61.1\" y2=\"33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.1\" y1=\"42\" x2=\"61.1\" y2=\"39\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.3\" y1=\"42\" x2=\"68\" y2=\"42\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"42\" x2=\"64.1\" y2=\"42\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.3\" y1=\"43\" x2=\"68.3\" y2=\"42\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"42.8\" x2=\"71.5\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"42.8\" x2=\"69.3\" y2=\"43\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.6\" y1=\"44.3\" x2=\"66.6\" y2=\"45.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.6\" y1=\"43.4\" x2=\"66.6\" y2=\"44.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"68\" y1=\"42\" x2=\"66.6\" y2=\"43.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.6\" y1=\"45.8\" x2=\"66.635\" y2=\"45.8362\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"66.6\" y=\"44.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"68\" y=\"42\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET4\">\n<contactref element=\"U2\" pad=\"5\"/>\n<contactref element=\"COFFSETB12\" pad=\"2\"/>\n<contactref element=\"ROFFSET4\" pad=\"1\"/>\n<contactref element=\"COFFSETA3\" pad=\"2\"/>\n<wire x1=\"67.5\" y1=\"36.4\" x2=\"64.4\" y2=\"33.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.7\" y1=\"36.4\" x2=\"67.5\" y2=\"36.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.3\" y1=\"35.8\" x2=\"73.7\" y2=\"36.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.7\" y1=\"35.8\" x2=\"74.3\" y2=\"35.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.2\" y1=\"37.3\" x2=\"74.7\" y2=\"35.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.2\" y1=\"45.4\" x2=\"76.2\" y2=\"37.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.5\" y1=\"49.1\" x2=\"76.2\" y2=\"45.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.3\" y1=\"49.1\" x2=\"72.5\" y2=\"49.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.9\" y1=\"49.5\" x2=\"72.3\" y2=\"49.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.9\" y1=\"53\" x2=\"71.9\" y2=\"49.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"53.9\" x2=\"71.9\" y2=\"53\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.4\" y1=\"33.3\" x2=\"64.35\" y2=\"33.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.2\" y1=\"53.6\" x2=\"68.9\" y2=\"53.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.2\" y1=\"53.6\" x2=\"71\" y2=\"53.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"53.3\" x2=\"67.9\" y2=\"50.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.6\" y1=\"53.6\" x2=\"67.9\" y2=\"53.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.9\" y1=\"53.6\" x2=\"67.6\" y2=\"53.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"50.8\" x2=\"67.905\" y2=\"50.7638\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"67.6\" y=\"53.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ1\">\n<contactref element=\"J1\" pad=\"SIGNAL\"/>\n<contactref element=\"K1\" pad=\"3\"/>\n<contactref element=\"C_AC1\" pad=\"2\"/>\n<contactref element=\"S1\" pad=\"2\"/>\n<wire x1=\"75.9\" y1=\"4.1\" x2=\"75.9\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"2.8\" x2=\"75.9\" y2=\"4.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"-3.2\" x2=\"74.6\" y2=\"2.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"-4.2\" x2=\"74.6\" y2=\"-3.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.9\" y1=\"4.3\" x2=\"75.95\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"-4.2\" x2=\"73.54\" y2=\"-4.27\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"2.1\" x2=\"73\" y2=\"2.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"1.6\" x2=\"73\" y2=\"2.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"-4.2\" x2=\"73.5\" y2=\"1.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"-4.2\" x2=\"73.54\" y2=\"-4.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"-9.7\" x2=\"66\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.7\" y1=\"-4.3\" x2=\"66.3\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"-4.3\" x2=\"71.7\" y2=\"-4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"-4.3\" x2=\"73.54\" y2=\"-4.27\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INA12\">\n<contactref element=\"OVSAMP1\" pad=\"4\"/>\n<contactref element=\"IC2\" pad=\"3\"/>\n<wire x1=\"54.5\" y1=\"36.25\" x2=\"55.75\" y2=\"36.25\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"56\" y=\"36\" extent=\"1-16\" drill=\"0.35\"/>\n<wire x1=\"55.75\" y1=\"36.25\" x2=\"56\" y2=\"36\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.95\" y1=\"33.05\" x2=\"59.9\" y2=\"33.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56\" y1=\"36\" x2=\"58.95\" y2=\"33.05\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"INB12\">\n<contactref element=\"IC2\" pad=\"9\"/>\n<contactref element=\"OVSAMP2\" pad=\"4\"/>\n<wire x1=\"55.9\" y1=\"39.3\" x2=\"54.5\" y2=\"39.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.9\" y1=\"38.6\" x2=\"55.9\" y2=\"39.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"56.65\" y1=\"37.85\" x2=\"55.9\" y2=\"38.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"57.7\" y1=\"31.4\" x2=\"56.6\" y2=\"32.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"57.7\" y1=\"30.3\" x2=\"57.7\" y2=\"31.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.4\" y1=\"29.6\" x2=\"57.7\" y2=\"30.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.9\" y1=\"28.1\" x2=\"58.4\" y2=\"29.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.5\" y1=\"39.3\" x2=\"54.5\" y2=\"39.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.9\" y1=\"28.1\" x2=\"59.9\" y2=\"28.05\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"55.9\" y=\"39.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"58.4\" y=\"29.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"56.65\" y1=\"37.65\" x2=\"56.65\" y2=\"37.85\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"57.85\" y1=\"36.45\" x2=\"56.65\" y2=\"37.65\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"57.85\" y1=\"33.75\" x2=\"57.85\" y2=\"36.45\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"56.6\" y1=\"32.5\" x2=\"57.85\" y2=\"33.75\" width=\"0.1524\" layer=\"15\"/>\n</signal>\n<signal name=\"E_OVSAMP2\">\n<contactref element=\"OVSAMP2\" pad=\"6\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"26\"/>\n<wire x1=\"59.9\" y1=\"25.9\" x2=\"59.9\" y2=\"26.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.8\" y1=\"23\" x2=\"59.9\" y2=\"25.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.3\" y1=\"23\" x2=\"62.8\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"75.3\" y1=\"11\" x2=\"63.3\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"75.3\" y1=\"2.2\" x2=\"75.3\" y2=\"11\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.5\" y1=\"-9.6\" x2=\"75.3\" y2=\"2.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.5\" y1=\"-9.6\" x2=\"63.5\" y2=\"-9.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.1\" y1=\"-7\" x2=\"1.5\" y2=\"-9.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.1\" y1=\"-2.4\" x2=\"-1.1\" y2=\"-7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.7\" y1=\"4.2\" x2=\"-1.1\" y2=\"-2.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.7\" y1=\"23.9\" x2=\"-7.7\" y2=\"4.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.5\" y1=\"24.1\" x2=\"-7.7\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"24.2\" x2=\"-7.5\" y2=\"24.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.2\" y1=\"24.5\" x2=\"-7.5\" y2=\"24.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"24.5\" x2=\"-7.2\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"24.5\" x2=\"-6.425\" y2=\"24.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.8\" y=\"23\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-7.7\" y=\"23.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_IO_1\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"25\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"1\"/>\n<wire x1=\"5.6\" y1=\"25.2\" x2=\"4.4\" y2=\"25.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9\" y1=\"25.2\" x2=\"5.6\" y2=\"25.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.3\" y1=\"21.9\" x2=\"9\" y2=\"25.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.3\" y1=\"14.5\" x2=\"12.3\" y2=\"21.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.2\" y1=\"13.6\" x2=\"12.3\" y2=\"14.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.4\" y1=\"13.6\" x2=\"13.2\" y2=\"13.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.4\" y1=\"10.2\" x2=\"17.4\" y2=\"13.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.2\" y1=\"10\" x2=\"17.4\" y2=\"10.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.2\" y1=\"2.7\" x2=\"17.2\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.5\" y1=\"0.4\" x2=\"17.2\" y2=\"2.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.4\" y1=\"25.2\" x2=\"4.375\" y2=\"25.225\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.5\" y1=\"0.4\" x2=\"19.51\" y2=\"0.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"5.6\" y=\"25.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"17.4\" y=\"13.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW1\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"21\"/>\n<contactref element=\"GAINSW1\" pad=\"6\"/>\n<wire x1=\"60.9\" y1=\"-0.8\" x2=\"60.9\" y2=\"-0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.7\" y1=\"-2\" x2=\"60.9\" y2=\"-0.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.9\" y1=\"-2\" x2=\"59.7\" y2=\"-2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.8\" y1=\"-4.1\" x2=\"44.9\" y2=\"-2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.5\" y1=\"-4.1\" x2=\"42.8\" y2=\"-4.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.6\" y1=\"-4.1\" x2=\"26.5\" y2=\"-4.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.6\" y1=\"-6.1\" x2=\"16.6\" y2=\"-4.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"-6.1\" x2=\"14.6\" y2=\"-6.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.1\" y1=\"4.1\" x2=\"3.1\" y2=\"-6.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.1\" y1=\"22.9\" x2=\"-7.1\" y2=\"4.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-4.5\" y1=\"25.5\" x2=\"-7.1\" y2=\"22.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-4.4\" y1=\"25.5\" x2=\"-4.5\" y2=\"25.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-4\" y1=\"25.9\" x2=\"-4.4\" y2=\"25.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-4\" y1=\"26.6\" x2=\"-4\" y2=\"25.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5.2\" y1=\"27.8\" x2=\"-4\" y2=\"26.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.4\" y1=\"27.8\" x2=\"-5.2\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.9\" y1=\"-0.5\" x2=\"60.95\" y2=\"-0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"27.8\" x2=\"-6.425\" y2=\"27.825\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"26.5\" y=\"-4.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-5.2\" y=\"27.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW2\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"22\"/>\n<contactref element=\"GAINSW2\" pad=\"6\"/>\n<wire x1=\"62.8\" y1=\"10.5\" x2=\"62.8\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.7\" y1=\"10.5\" x2=\"62.8\" y2=\"10.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"55.15\" y1=\"15.05\" x2=\"59.7\" y2=\"10.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54.3\" y1=\"13.3\" x2=\"54.3\" y2=\"14.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"50.2\" y1=\"9.2\" x2=\"54.3\" y2=\"13.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.9\" y1=\"9.2\" x2=\"50.2\" y2=\"9.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"38.4\" y1=\"7.7\" x2=\"39.9\" y2=\"9.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.2\" y1=\"2.5\" x2=\"38.4\" y2=\"7.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"25.4\" y1=\"2.5\" x2=\"33.2\" y2=\"2.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"24.7\" y1=\"1.8\" x2=\"25.4\" y2=\"2.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.3\" y1=\"1.8\" x2=\"24.7\" y2=\"1.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.2\" y1=\"3.9\" x2=\"15.3\" y2=\"1.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"8\" y1=\"3.9\" x2=\"13.2\" y2=\"3.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"8\" y1=\"6.3\" x2=\"8\" y2=\"3.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.3\" y1=\"14\" x2=\"8\" y2=\"6.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.3\" y1=\"21.7\" x2=\"0.3\" y2=\"14\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.3\" y1=\"22\" x2=\"0.3\" y2=\"21.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.9\" y1=\"27.2\" x2=\"0.3\" y2=\"22\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"27.2\" x2=\"-4.9\" y2=\"27.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.8\" y1=\"12.1\" x2=\"62.85\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"27.2\" x2=\"-6.425\" y2=\"27.175\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.8\" y=\"10.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"38.4\" y=\"7.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8\" y=\"3.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"0.3\" y=\"21.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"54.3\" y1=\"14.2\" x2=\"55.15\" y2=\"15.05\" width=\"0.1524\" layer=\"15\"/>\n</signal>\n<signal name=\"E_GSW3\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"23\"/>\n<contactref element=\"GAINSW3\" pad=\"6\"/>\n<wire x1=\"62.8\" y1=\"39.9\" x2=\"62.8\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.5\" y1=\"58.2\" x2=\"62.8\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"44.5\" y1=\"59.5\" x2=\"44.5\" y2=\"58.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.7\" y1=\"64.3\" x2=\"44.5\" y2=\"59.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.9\" y1=\"64.3\" x2=\"39.7\" y2=\"64.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.3\" y1=\"64.3\" x2=\"30.9\" y2=\"64.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30.2\" y1=\"64.4\" x2=\"30.3\" y2=\"64.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.9\" y1=\"64.4\" x2=\"30.2\" y2=\"64.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"64.4\" x2=\"22.9\" y2=\"64.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.5\" y1=\"39.5\" x2=\"15.4\" y2=\"64.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.5\" y1=\"39.5\" x2=\"-9.5\" y2=\"39.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-11.3\" y1=\"38.7\" x2=\"-10.5\" y2=\"39.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-11.3\" y1=\"25.5\" x2=\"-11.3\" y2=\"38.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.3\" y1=\"24.5\" x2=\"-11.3\" y2=\"25.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.3\" y1=\"24.5\" x2=\"-10.3\" y2=\"24.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5.2\" y1=\"26.6\" x2=\"-7.3\" y2=\"24.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.4\" y1=\"26.6\" x2=\"-5.2\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.8\" y1=\"40.9\" x2=\"62.85\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"26.6\" x2=\"-6.425\" y2=\"26.525\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.8\" y=\"39.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"30.9\" y=\"64.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"22.9\" y=\"64.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-5.2\" y=\"26.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW4\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"24\"/>\n<contactref element=\"GAINSW4\" pad=\"6\"/>\n<wire x1=\"61.1\" y1=\"53.2\" x2=\"61.1\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.6\" y1=\"53.7\" x2=\"61.1\" y2=\"53.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.6\" y1=\"53.7\" x2=\"60.6\" y2=\"53.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.3\" y1=\"48.4\" x2=\"42.6\" y2=\"53.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.7\" y1=\"48.4\" x2=\"37.3\" y2=\"48.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"50\" x2=\"24.7\" y2=\"48.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"51.6\" x2=\"23.1\" y2=\"50\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.9\" y1=\"51.8\" x2=\"23.1\" y2=\"51.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.8\" y1=\"51.8\" x2=\"22.9\" y2=\"51.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.3\" y1=\"51.8\" x2=\"15.8\" y2=\"51.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.4\" y1=\"39.1\" x2=\"3.3\" y2=\"51.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.4\" y1=\"39.1\" x2=\"-9.4\" y2=\"39.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.9\" y1=\"38.6\" x2=\"-10.4\" y2=\"39.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10.9\" y1=\"27.6\" x2=\"-10.9\" y2=\"38.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.8\" y1=\"26.5\" x2=\"-10.9\" y2=\"27.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.7\" y1=\"26.5\" x2=\"-9.8\" y2=\"26.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.1\" y1=\"25.9\" x2=\"-7.7\" y2=\"26.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"25.9\" x2=\"-7.1\" y2=\"25.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.1\" y1=\"52.9\" x2=\"61.15\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"25.9\" x2=\"-6.425\" y2=\"25.875\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"15.8\" y=\"51.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-7.7\" y=\"26.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_OVSAMP1\">\n<contactref element=\"OVSAMP1\" pad=\"6\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"25\"/>\n<wire x1=\"59\" y1=\"31.1\" x2=\"59.9\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.4\" y1=\"30.5\" x2=\"59\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.5\" y1=\"30.5\" x2=\"58.4\" y2=\"30.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"51.2\" y1=\"35.8\" x2=\"56.5\" y2=\"30.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"32.7\" y1=\"35.8\" x2=\"51.2\" y2=\"35.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30.7\" y1=\"33.8\" x2=\"32.7\" y2=\"35.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.7\" y1=\"33.8\" x2=\"30.7\" y2=\"33.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18\" y1=\"33.8\" x2=\"26.7\" y2=\"33.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.7\" y1=\"33.8\" x2=\"18\" y2=\"33.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.6\" y1=\"31.7\" x2=\"17.7\" y2=\"33.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15\" y1=\"31.7\" x2=\"15.6\" y2=\"31.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.5\" y1=\"30.2\" x2=\"15\" y2=\"31.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.5\" y1=\"30.1\" x2=\"13.5\" y2=\"30.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.1\" y1=\"29.7\" x2=\"13.5\" y2=\"30.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.5\" y1=\"29.7\" x2=\"13.1\" y2=\"29.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10\" y1=\"29.2\" x2=\"10.5\" y2=\"29.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3.4\" y1=\"29.2\" x2=\"10\" y2=\"29.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.9\" y1=\"29.7\" x2=\"3.4\" y2=\"29.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.9\" y1=\"29.7\" x2=\"2.9\" y2=\"29.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.2\" y1=\"28\" x2=\"1.9\" y2=\"29.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.2\" y1=\"26.9\" x2=\"0.2\" y2=\"28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.6\" y1=\"26.1\" x2=\"0.2\" y2=\"26.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4.6\" y1=\"26.1\" x2=\"-0.6\" y2=\"26.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4.9\" y1=\"26.1\" x2=\"-4.6\" y2=\"26.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.7\" y1=\"25.3\" x2=\"-4.9\" y2=\"26.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.4\" y1=\"25.3\" x2=\"-5.7\" y2=\"25.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.9\" y1=\"31.1\" x2=\"59.9\" y2=\"31.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-6.4\" y1=\"25.3\" x2=\"-6.425\" y2=\"25.225\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"26.7\" y=\"33.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18\" y=\"33.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-4.6\" y=\"26.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L141_SCL\">\n<contactref element=\"FPGA\" pad=\"141\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"12\"/>\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"12\"/>\n<contactref element=\"R_SCL\" pad=\"1\"/>\n<contactref element=\"DAC1\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"11\"/>\n<wire x1=\"19.2\" y1=\"22.8\" x2=\"20.2\" y2=\"22.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.2\" y1=\"22.8\" x2=\"19.2\" y2=\"22.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.5\" y1=\"21.1\" x2=\"16.2\" y2=\"22.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.5\" y1=\"20.2\" x2=\"14.5\" y2=\"21.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.1\" y1=\"19.8\" x2=\"14.5\" y2=\"20.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.2\" y1=\"22.8\" x2=\"20.21\" y2=\"22.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.1\" y1=\"19.8\" x2=\"14.05\" y2=\"19.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.4\" y1=\"28.4\" x2=\"74.2131\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"27\" x2=\"72.4\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60\" y1=\"27\" x2=\"71\" y2=\"27\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.6\" y1=\"25.6\" x2=\"60\" y2=\"27\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"47.3\" y1=\"25.6\" x2=\"58.6\" y2=\"25.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"45.8\" y1=\"27.1\" x2=\"47.3\" y2=\"25.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"41.6\" y1=\"27.1\" x2=\"45.8\" y2=\"27.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.5\" y1=\"23\" x2=\"41.6\" y2=\"27.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.4\" y1=\"23\" x2=\"32.2\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.2\" y1=\"23\" x2=\"37.5\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.2\" y1=\"22.8\" x2=\"19.4\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.6\" y1=\"30.5\" x2=\"0.9\" y2=\"30.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.1\" y1=\"31\" x2=\"1.6\" y2=\"30.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.1\" y1=\"31.1\" x2=\"2.1\" y2=\"31\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.9\" y1=\"31.1\" x2=\"2.1\" y2=\"31.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.6\" y1=\"30.4\" x2=\"4.9\" y2=\"31.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10\" y1=\"30.4\" x2=\"5.6\" y2=\"30.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.6\" y1=\"29.8\" x2=\"10.2\" y2=\"30.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.2\" y1=\"30.2\" x2=\"10\" y2=\"30.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.6\" y1=\"25.3\" x2=\"10.6\" y2=\"29.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.6\" y1=\"21.3\" x2=\"10.6\" y2=\"25.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.9\" y1=\"30.5\" x2=\"0.825\" y2=\"30.425\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.6\" y1=\"21.3\" x2=\"14.5\" y2=\"21.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.4\" y1=\"30.4\" x2=\"11.6\" y2=\"30.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.2\" y1=\"30.2\" x2=\"10.4\" y2=\"30.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.6\" y1=\"30.4\" x2=\"11.625\" y2=\"30.425\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"1.9\" x2=\"32.2\" y2=\"0.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.2\" y1=\"23\" x2=\"32.2\" y2=\"1.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.2\" y1=\"0.4\" x2=\"32.21\" y2=\"0.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"19.2\" y=\"22.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"14.5\" y=\"21.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"71\" y=\"27\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"2.1\" y=\"31.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"10.4\" y=\"30.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"32.2\" y=\"1.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_ACSW1\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"1\"/>\n<contactref element=\"ACR1\" pad=\"1\"/>\n<wire x1=\"8.9\" y1=\"12.9\" x2=\"9.9\" y2=\"11.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.5\" y1=\"12.9\" x2=\"8.9\" y2=\"12.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2\" y1=\"18.4\" x2=\"7.5\" y2=\"12.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2\" y1=\"22.1\" x2=\"2\" y2=\"18.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.825\" y1=\"23.275\" x2=\"2\" y2=\"22.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.9\" y1=\"11.9\" x2=\"9.9\" y2=\"11.85\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"8.9\" y=\"12.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"2\" y=\"22.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_ACSW2\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"2\"/>\n<contactref element=\"ACR2\" pad=\"1\"/>\n<wire x1=\"7.7\" y1=\"13.5\" x2=\"7.7\" y2=\"11.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.7\" y1=\"17.6\" x2=\"7.7\" y2=\"13.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.1\" y1=\"23.2\" x2=\"7.7\" y2=\"17.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.9\" y1=\"23.4\" x2=\"2.1\" y2=\"23.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.9\" y1=\"23.5\" x2=\"1.9\" y2=\"23.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.5\" y1=\"23.9\" x2=\"1.9\" y2=\"23.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"23.9\" x2=\"1.5\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"23.9\" x2=\"0.825\" y2=\"23.925\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"7.7\" y=\"13.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"2.1\" y=\"23.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_ACSW3\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"3\"/>\n<contactref element=\"ACR3\" pad=\"1\"/>\n<wire x1=\"5.4\" y1=\"20.7\" x2=\"5.4\" y2=\"11.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.6\" y1=\"24.5\" x2=\"5.4\" y2=\"20.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"24.5\" x2=\"1.6\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"24.5\" x2=\"0.825\" y2=\"24.575\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_ACSW4\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"4\"/>\n<contactref element=\"ACR4\" pad=\"1\"/>\n<wire x1=\"2.2\" y1=\"12.9\" x2=\"3.2\" y2=\"11.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.2\" y1=\"17.7\" x2=\"2.2\" y2=\"12.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.4\" y1=\"18.5\" x2=\"2.2\" y2=\"17.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.4\" y1=\"24.5\" x2=\"1.4\" y2=\"18.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.1\" y1=\"25.2\" x2=\"1.4\" y2=\"24.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.9\" y1=\"25.2\" x2=\"2.1\" y2=\"25.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.2\" y1=\"11.9\" x2=\"3.2\" y2=\"11.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"25.2\" x2=\"0.825\" y2=\"25.225\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"2.2\" y=\"12.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"2.1\" y=\"25.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_SHDN1\">\n<contactref element=\"IC1\" pad=\"7\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"5\"/>\n<wire x1=\"55.4\" y1=\"18.3\" x2=\"54.5\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"19.1\" x2=\"55.4\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.3\" y1=\"19.1\" x2=\"56.2\" y2=\"19.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.7\" y1=\"18.5\" x2=\"56.3\" y2=\"19.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.6\" y1=\"18.5\" x2=\"55.7\" y2=\"18.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.2\" y1=\"18.1\" x2=\"55.6\" y2=\"18.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.5\" y1=\"14.7\" x2=\"55.2\" y2=\"15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.5\" y1=\"14.3\" x2=\"55.5\" y2=\"14.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"50.9\" y1=\"9.7\" x2=\"55.5\" y2=\"14.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.2\" y1=\"9.7\" x2=\"50.9\" y2=\"9.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"25.7\" y1=\"-7.8\" x2=\"43.2\" y2=\"9.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"25.7\" y1=\"-8.3\" x2=\"25.7\" y2=\"-7.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"25\" y1=\"-9\" x2=\"25.7\" y2=\"-8.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"21.6\" y1=\"-9\" x2=\"25\" y2=\"-9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.6\" y1=\"-8\" x2=\"21.6\" y2=\"-9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.6\" y1=\"-6.4\" x2=\"20.6\" y2=\"-8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"12.1\" y1=\"2.1\" x2=\"20.6\" y2=\"-6.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"8.1\" y1=\"2.1\" x2=\"12.1\" y2=\"2.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"8.1\" y1=\"3.2\" x2=\"8.1\" y2=\"2.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.1\" y1=\"4.2\" x2=\"8.1\" y2=\"3.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.1\" y1=\"12.3\" x2=\"9.1\" y2=\"4.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.5\" y1=\"12.7\" x2=\"9.1\" y2=\"12.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.5\" y1=\"16.6\" x2=\"9.5\" y2=\"12.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"23\" x2=\"9.5\" y2=\"16.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"24.3\" x2=\"3.1\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.1\" y1=\"25\" x2=\"3.1\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.3\" y1=\"25.8\" x2=\"3.1\" y2=\"25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"25.8\" x2=\"2.3\" y2=\"25.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"18.3\" x2=\"54.5\" y2=\"18.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"25.8\" x2=\"0.825\" y2=\"25.875\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"56.3\" y=\"19.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.1\" y=\"2.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"3.1\" y=\"24.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"55.2\" y1=\"15\" x2=\"55.2\" y2=\"18.1\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"L130\">\n<contactref element=\"FPGA\" pad=\"130\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"8\"/>\n<wire x1=\"21.2\" y1=\"28.4\" x2=\"20.3\" y2=\"28.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"29.3\" x2=\"21.2\" y2=\"28.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.5\" y1=\"34\" x2=\"21.2\" y2=\"29.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.2\" y1=\"34\" x2=\"16.5\" y2=\"34\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.9\" y1=\"31.7\" x2=\"3.2\" y2=\"34\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.9\" y1=\"31.7\" x2=\"0.9\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.6\" y1=\"31\" x2=\"-6.9\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.6\" y1=\"31\" x2=\"-7.6\" y2=\"31\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"30.6\" x2=\"-9.6\" y2=\"31\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"28.4\" x2=\"20.21\" y2=\"28.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"30.6\" x2=\"-10\" y2=\"30.55\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.2\" y=\"28.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L127\">\n<contactref element=\"FPGA\" pad=\"127\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"9\"/>\n<wire x1=\"18.1\" y1=\"29.8\" x2=\"20.2\" y2=\"29.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.8\" y1=\"30.1\" x2=\"18.1\" y2=\"29.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.2\" y1=\"30.1\" x2=\"17.8\" y2=\"30.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.2\" y1=\"32.1\" x2=\"17.2\" y2=\"30.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"1.8\" y1=\"32.1\" x2=\"15.2\" y2=\"32.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.2\" y1=\"30.5\" x2=\"1.8\" y2=\"32.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.8\" y1=\"30.5\" x2=\"0.2\" y2=\"30.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.2\" y1=\"28.1\" x2=\"-6.8\" y2=\"30.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-10\" y1=\"28.1\" x2=\"-9.2\" y2=\"28.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"29.8\" x2=\"20.21\" y2=\"29.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"28.1\" x2=\"-10\" y2=\"28.01\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"17.8\" y=\"30.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L124\">\n<contactref element=\"FPGA\" pad=\"124\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"10\"/>\n<wire x1=\"18.4\" y1=\"31.3\" x2=\"20.2\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.7\" y1=\"31.3\" x2=\"18.4\" y2=\"31.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.5\" y1=\"29.1\" x2=\"17.7\" y2=\"31.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.7\" y1=\"29.1\" x2=\"15.5\" y2=\"29.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"13.1\" y1=\"28.5\" x2=\"13.7\" y2=\"29.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3.6\" y1=\"28.5\" x2=\"13.1\" y2=\"28.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3.2\" y1=\"28.9\" x2=\"3.6\" y2=\"28.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.7\" y1=\"28.9\" x2=\"3.2\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.7\" y1=\"25.5\" x2=\"2.7\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10\" y1=\"25.5\" x2=\"-0.7\" y2=\"25.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.2\" y1=\"31.3\" x2=\"20.21\" y2=\"31.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10\" y1=\"25.5\" x2=\"-10\" y2=\"25.47\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"18.4\" y=\"31.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$25\" class=\"3\">\n<contactref element=\"R50-6\" pad=\"1\"/>\n<contactref element=\"R50-7\" pad=\"1\"/>\n<contactref element=\"R50-8\" pad=\"1\"/>\n<contactref element=\"R50-5\" pad=\"1\"/>\n<contactref element=\"S2\" pad=\"3\"/>\n<wire x1=\"70.6\" y1=\"22.8\" x2=\"70.6\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"70.6\" y1=\"20.6\" x2=\"70.55\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"70.6\" y1=\"22.8\" x2=\"70.55\" y2=\"22.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"22.8\" x2=\"75\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"20.6\" x2=\"74.95\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"22.8\" x2=\"74.95\" y2=\"22.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"71.2\" y1=\"20.5\" x2=\"70.7\" y2=\"20.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"72.2\" y1=\"19.5\" x2=\"71.2\" y2=\"20.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"73.9\" y1=\"19.5\" x2=\"73.4\" y2=\"19.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"73.4\" y1=\"19.5\" x2=\"72.2\" y2=\"19.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"74.9\" y1=\"20.5\" x2=\"73.9\" y2=\"19.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"70.7\" y1=\"20.5\" x2=\"70.55\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"74.9\" y1=\"20.5\" x2=\"74.95\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"73.4\" y1=\"19.3\" x2=\"74.5\" y2=\"19.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"73.4\" y1=\"19.3\" x2=\"73.4\" y2=\"19.5\" width=\"0.381\" layer=\"16\"/>\n<via x=\"73.4\" y=\"19.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$26\" class=\"3\">\n<contactref element=\"R50-10\" pad=\"1\"/>\n<contactref element=\"R50-11\" pad=\"1\"/>\n<contactref element=\"R50-12\" pad=\"1\"/>\n<contactref element=\"R50-9\" pad=\"1\"/>\n<contactref element=\"S3\" pad=\"3\"/>\n<wire x1=\"71.1\" y1=\"34.5\" x2=\"71.1\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"32.3\" x2=\"71.05\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"34.5\" x2=\"71.05\" y2=\"34.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.3\" y1=\"34.5\" x2=\"75.3\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.3\" y1=\"32.3\" x2=\"75.25\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.3\" y1=\"34.5\" x2=\"75.25\" y2=\"34.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"71.5\" y1=\"32.2\" x2=\"71.2\" y2=\"32.2\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"72.5\" y1=\"31.2\" x2=\"71.5\" y2=\"32.2\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"74.2\" y1=\"31.2\" x2=\"72.5\" y2=\"31.2\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.2\" y1=\"32.2\" x2=\"74.2\" y2=\"31.2\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"71.2\" y1=\"32.2\" x2=\"71.05\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.2\" y1=\"32.2\" x2=\"75.25\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"74.5\" y1=\"31\" x2=\"74.5\" y2=\"29.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"31.2\" x2=\"74.5\" y2=\"31\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"74.3\" y1=\"31.2\" x2=\"74.2\" y2=\"31.2\" width=\"0.381\" layer=\"16\"/>\n<via x=\"74.5\" y=\"31\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$28\" class=\"3\">\n<contactref element=\"R50-14\" pad=\"1\"/>\n<contactref element=\"R50-15\" pad=\"1\"/>\n<contactref element=\"R50-16\" pad=\"1\"/>\n<contactref element=\"R50-13\" pad=\"1\"/>\n<contactref element=\"S4\" pad=\"3\"/>\n<wire x1=\"64.7\" y1=\"62.7\" x2=\"64.7\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"60.6\" x2=\"64.65\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"62.7\" x2=\"64.65\" y2=\"62.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"62.7\" x2=\"68.9\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"60.6\" x2=\"68.85\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"62.7\" x2=\"68.85\" y2=\"62.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"66.7\" y1=\"58.6\" x2=\"64.8\" y2=\"60.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"58.6\" x2=\"66.7\" y2=\"58.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.7\" y1=\"59.9\" x2=\"67.4\" y2=\"58.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.7\" y1=\"60.5\" x2=\"68.7\" y2=\"59.9\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.8\" y1=\"60.5\" x2=\"64.65\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.7\" y1=\"60.5\" x2=\"68.85\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69.6\" y1=\"59.3\" x2=\"68.5\" y2=\"59.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"68.8\" y1=\"60.1\" x2=\"69.6\" y2=\"59.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.8\" y1=\"60.1\" x2=\"68.85\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<via x=\"69.6\" y=\"59.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N50_1\" class=\"3\">\n<contactref element=\"R50-4\" pad=\"1\"/>\n<contactref element=\"R50-3\" pad=\"1\"/>\n<contactref element=\"R50-2\" pad=\"1\"/>\n<contactref element=\"R50-1\" pad=\"1\"/>\n<contactref element=\"S1\" pad=\"3\"/>\n<wire x1=\"64.9\" y1=\"-6.4\" x2=\"64.9\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"-8.5\" x2=\"64.85\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"-6.4\" x2=\"64.85\" y2=\"-6.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"-6.4\" x2=\"69.1\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"-8.5\" x2=\"69.05\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"-6.4\" x2=\"69.05\" y2=\"-6.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"-8.6\" x2=\"65\" y2=\"-8.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"-9.6\" x2=\"65.3\" y2=\"-8.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"-9.6\" x2=\"67.4\" y2=\"-9.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"-9.6\" x2=\"66.3\" y2=\"-9.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"-8.6\" x2=\"68\" y2=\"-9.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"65\" y1=\"-8.6\" x2=\"64.85\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"-8.6\" x2=\"69.05\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"67.5\" y1=\"-9.7\" x2=\"68.5\" y2=\"-9.7\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"-9.8\" x2=\"67.5\" y2=\"-9.7\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"-9.8\" x2=\"67.4\" y2=\"-9.6\" width=\"0.381\" layer=\"16\"/>\n<via x=\"67.4\" y=\"-9.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$23\">\n<contactref element=\"U340G\" pad=\"7\"/>\n<contactref element=\"Y1\" pad=\"1\"/>\n<contactref element=\"C_OSC1\" pad=\"1\"/>\n<wire x1=\"-2.3\" y1=\"51.2\" x2=\"-4.2\" y2=\"51.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.5\" y1=\"52\" x2=\"-2.3\" y2=\"51.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4.2\" y1=\"51.2\" x2=\"-4.2\" y2=\"51.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.5\" y1=\"52\" x2=\"-1.5\" y2=\"52.06\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3.8\" y1=\"59\" x2=\"3.8\" y2=\"57.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.8\" y1=\"57.4\" x2=\"3.8\" y2=\"59\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.5\" y1=\"52.1\" x2=\"3.8\" y2=\"57.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.8\" y1=\"57.7\" x2=\"3.825\" y2=\"57.695\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.5\" y1=\"52.1\" x2=\"-1.5\" y2=\"52.06\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"3.8\" y=\"59\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$31\">\n<contactref element=\"C_OSC2\" pad=\"1\"/>\n<contactref element=\"Y1\" pad=\"2\"/>\n<contactref element=\"U340G\" pad=\"8\"/>\n<wire x1=\"-2.3\" y1=\"58\" x2=\"-4.2\" y2=\"58\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.5\" y1=\"57.2\" x2=\"-2.3\" y2=\"58\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-4.2\" y1=\"58\" x2=\"-4.2\" y2=\"58.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.5\" y1=\"57.2\" x2=\"-1.5\" y2=\"57.14\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.1\" y1=\"57.6\" x2=\"2.5\" y2=\"57.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.5\" y1=\"57.2\" x2=\"-1.1\" y2=\"57.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.5\" y1=\"57.6\" x2=\"2.555\" y2=\"57.695\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.5\" y1=\"57.2\" x2=\"-1.5\" y2=\"57.14\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"DMINUS\">\n<contactref element=\"USB1\" pad=\"2\"/>\n<contactref element=\"U340G\" pad=\"6\"/>\n<wire x1=\"-5\" y1=\"55.3\" x2=\"-7.5\" y2=\"55.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.3\" y1=\"56\" x2=\"-5\" y2=\"55.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.6\" y1=\"56\" x2=\"-4.3\" y2=\"56\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5\" y1=\"57.4\" x2=\"3.6\" y2=\"56\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5\" y1=\"57.6\" x2=\"5\" y2=\"57.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"55.3\" x2=\"-7.56\" y2=\"55.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5\" y1=\"57.6\" x2=\"5.095\" y2=\"57.695\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"DPLUS\">\n<contactref element=\"USB1\" pad=\"3\"/>\n<contactref element=\"U340G\" pad=\"5\"/>\n<wire x1=\"3.5\" y1=\"54.6\" x2=\"-7.56\" y2=\"54.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.3\" y1=\"57.4\" x2=\"3.5\" y2=\"54.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.3\" y1=\"57.6\" x2=\"6.3\" y2=\"57.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.3\" y1=\"57.6\" x2=\"6.365\" y2=\"57.695\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"SLD\">\n<contactref element=\"USB1\" pad=\"S1\"/>\n<contactref element=\"USB1\" pad=\"S2\"/>\n<contactref element=\"USB1\" pad=\"S3\"/>\n<contactref element=\"USB1\" pad=\"S4\"/>\n<wire x1=\"-10.1\" y1=\"51.4\" x2=\"-7.56\" y2=\"51.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.2\" y1=\"51.3\" x2=\"-10.1\" y2=\"51.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.2\" y1=\"51.3\" x2=\"-10.235\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.1\" y1=\"57.8\" x2=\"-7.56\" y2=\"57.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.2\" y1=\"57.9\" x2=\"-10.1\" y2=\"57.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.2\" y1=\"57.9\" x2=\"-10.235\" y2=\"57.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.2\" y1=\"57.9\" x2=\"-10.2\" y2=\"51.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.2\" y1=\"51.3\" x2=\"-10.235\" y2=\"51.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.2\" y1=\"57.9\" x2=\"-10.235\" y2=\"57.9\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"L120_SYNC\">\n<contactref element=\"IC1\" pad=\"14\"/>\n<contactref element=\"FPGA\" pad=\"120\"/>\n<contactref element=\"IC2\" pad=\"14\"/>\n<wire x1=\"53.2\" y1=\"26\" x2=\"53.2\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53\" y1=\"26.2\" x2=\"53.2\" y2=\"26\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53\" y1=\"32.4\" x2=\"53\" y2=\"26.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.6\" y1=\"32.8\" x2=\"53\" y2=\"32.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.6\" y1=\"41.7\" x2=\"52.6\" y2=\"32.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.3\" y1=\"42.4\" x2=\"52.6\" y2=\"41.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.3\" y1=\"41.5\" x2=\"53.3\" y2=\"42.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.2\" y1=\"21.5\" x2=\"53.25\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.3\" y1=\"41.5\" x2=\"53.25\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"33.3\" x2=\"20.2\" y2=\"33.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.2\" y1=\"32.9\" x2=\"19.6\" y2=\"33.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.2\" y1=\"32.8\" x2=\"19.2\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20\" y1=\"32.8\" x2=\"19.2\" y2=\"32.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"21\" y1=\"31.8\" x2=\"20\" y2=\"32.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"23.9\" y1=\"31.8\" x2=\"21\" y2=\"31.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30.9\" y1=\"38.8\" x2=\"23.9\" y2=\"31.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"49.7\" y1=\"38.8\" x2=\"30.9\" y2=\"38.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.3\" y1=\"42.4\" x2=\"49.7\" y2=\"38.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.2\" y1=\"33.3\" x2=\"20.21\" y2=\"33.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"53\" y=\"26.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"53.3\" y=\"42.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"19.2\" y=\"32.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$2\">\n<contactref element=\"RGAIN1_1\" pad=\"1\"/>\n<contactref element=\"RGAIN3_1\" pad=\"2\"/>\n<wire x1=\"71.1\" y1=\"4\" x2=\"69\" y2=\"4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"4\" x2=\"69\" y2=\"3.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"4\" x2=\"71.1\" y2=\"3.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$3\">\n<contactref element=\"RGAIN2_1\" pad=\"1\"/>\n<contactref element=\"RGAIN4_1\" pad=\"2\"/>\n<wire x1=\"66.8\" y1=\"4\" x2=\"64.7\" y2=\"4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"4\" x2=\"64.7\" y2=\"3.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"4\" x2=\"66.8\" y2=\"3.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN1\">\n<contactref element=\"RGAIN3_1\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"3\"/>\n<contactref element=\"CGAIN1_1\" pad=\"2\"/>\n<contactref element=\"CL1\" pad=\"-\"/>\n<wire x1=\"59.1\" y1=\"1.8\" x2=\"59.1\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.6\" y1=\"0.3\" x2=\"59.1\" y2=\"1.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"0.3\" x2=\"60.6\" y2=\"0.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"-1.2\" x2=\"65\" y2=\"0.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65\" y1=\"0.2\" x2=\"64.9\" y2=\"0.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.1\" y1=\"2\" x2=\"59.05\" y2=\"2.09\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"-1.2\" x2=\"66.4\" y2=\"-1.28771875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65\" y1=\"0.2\" x2=\"66\" y2=\"0.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"0.2\" x2=\"66\" y2=\"0.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"4.8\" x2=\"71.1\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"2.3\" x2=\"72.1\" y2=\"4.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.3\" y1=\"2.1\" x2=\"72.1\" y2=\"2.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.5\" y1=\"2.1\" x2=\"72.3\" y2=\"2.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.9\" y1=\"1.7\" x2=\"72.5\" y2=\"2.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.9\" y1=\"-1.4\" x2=\"72.9\" y2=\"1.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.9\" y1=\"-2.4\" x2=\"72.9\" y2=\"-1.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"-2.4\" x2=\"71.9\" y2=\"-2.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.3\" y1=\"-0.6\" x2=\"69.1\" y2=\"-2.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.7\" y1=\"-0.6\" x2=\"67.3\" y2=\"-0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"0.1\" x2=\"66.7\" y2=\"-0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"5.8\" x2=\"71.1\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"0.1\" x2=\"66\" y2=\"0.15\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65\" y=\"0.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN2\">\n<contactref element=\"RGAIN4_1\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"1\"/>\n<contactref element=\"CH1\" pad=\"-\"/>\n<wire x1=\"64.5\" y1=\"2\" x2=\"61.9\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"2\" x2=\"61\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.7\" y1=\"-1.2\" x2=\"64.5\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"-1.2\" x2=\"67.7\" y2=\"-1.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"2\" x2=\"60.95\" y2=\"2.09\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"-1.2\" x2=\"70\" y2=\"-1.28771875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"5.8\" x2=\"66.8\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.5\" y1=\"4.9\" x2=\"66.4\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"4.9\" x2=\"65.5\" y2=\"4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"2.9\" x2=\"63.9\" y2=\"4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.9\" y1=\"2\" x2=\"61.9\" y2=\"2.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"5.8\" x2=\"66.8\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"61.9\" y=\"2.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$4\">\n<contactref element=\"RGAIN1_2\" pad=\"1\"/>\n<contactref element=\"RGAIN3_2\" pad=\"2\"/>\n<wire x1=\"70.8\" y1=\"8.1\" x2=\"71.1\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"9.9\" x2=\"70.8\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"8.1\" x2=\"71.1\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"9.9\" x2=\"69\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$5\">\n<contactref element=\"RGAIN2_2\" pad=\"1\"/>\n<contactref element=\"RGAIN4_2\" pad=\"2\"/>\n<wire x1=\"66.5\" y1=\"8.1\" x2=\"66.8\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"9.9\" x2=\"66.5\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"8.1\" x2=\"66.8\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"9.9\" x2=\"64.7\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN3\">\n<contactref element=\"RGAIN3_2\" pad=\"1\"/>\n<contactref element=\"CGAIN1_2\" pad=\"2\"/>\n<contactref element=\"GAINSW2\" pad=\"3\"/>\n<contactref element=\"CL2\" pad=\"-\"/>\n<wire x1=\"61\" y1=\"15\" x2=\"61\" y2=\"14.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.7\" y1=\"15.7\" x2=\"61\" y2=\"15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"15.7\" x2=\"61.7\" y2=\"15.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"13.9\" x2=\"65.3\" y2=\"15.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"14.7\" x2=\"60.95\" y2=\"14.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"13.9\" x2=\"67.1\" y2=\"13.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.4\" y1=\"12.3\" x2=\"66.4\" y2=\"11.71228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.1\" y1=\"12.6\" x2=\"66.4\" y2=\"12.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.1\" y1=\"12.8\" x2=\"66.1\" y2=\"12.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"13.8\" x2=\"66.1\" y2=\"12.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"13.8\" x2=\"67.1\" y2=\"13.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.7\" y1=\"10\" x2=\"71.1\" y2=\"10\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.3\" y1=\"11.4\" x2=\"70.7\" y2=\"10\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.2\" y1=\"11.4\" x2=\"69.3\" y2=\"11.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"11.7\" x2=\"68.2\" y2=\"11.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"12.9\" x2=\"67.9\" y2=\"11.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"13.7\" x2=\"67.9\" y2=\"12.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"10\" x2=\"71.1\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"13.7\" x2=\"67.1\" y2=\"13.85\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"61.7\" y=\"15.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"66.1\" y=\"12.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN4\">\n<contactref element=\"RGAIN4_2\" pad=\"1\"/>\n<contactref element=\"GAINSW2\" pad=\"1\"/>\n<contactref element=\"CH2\" pad=\"-\"/>\n<wire x1=\"64.3\" y1=\"14.6\" x2=\"62.9\" y2=\"14.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.7\" y1=\"13.2\" x2=\"64.3\" y2=\"14.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.6\" y1=\"13.2\" x2=\"65.7\" y2=\"13.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"11.8\" x2=\"68.6\" y2=\"13.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"14.6\" x2=\"62.85\" y2=\"14.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"11.8\" x2=\"70\" y2=\"11.71228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68\" y1=\"8.7\" x2=\"66.8\" y2=\"9.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"7.3\" x2=\"68\" y2=\"8.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.3\" y1=\"7\" x2=\"68\" y2=\"7.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70\" y1=\"7\" x2=\"68.3\" y2=\"7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70\" y1=\"8.8\" x2=\"70\" y2=\"7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.2\" y1=\"9\" x2=\"70\" y2=\"8.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.8\" y1=\"9\" x2=\"70.2\" y2=\"9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"9.2\" x2=\"71.8\" y2=\"9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"10.7\" x2=\"72\" y2=\"9.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"11.7\" x2=\"72\" y2=\"10.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"11.7\" x2=\"71\" y2=\"11.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"9.9\" x2=\"66.8\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70\" y1=\"11.7\" x2=\"70\" y2=\"11.71228125\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"70\" y=\"7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$6\">\n<contactref element=\"RGAIN1_3\" pad=\"1\"/>\n<contactref element=\"RGAIN3_3\" pad=\"2\"/>\n<wire x1=\"70.5\" y1=\"45.5\" x2=\"68.4\" y2=\"45.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"45.5\" x2=\"68.4\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"45.5\" x2=\"70.5\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$7\">\n<contactref element=\"RGAIN2_3\" pad=\"1\"/>\n<contactref element=\"RGAIN4_3\" pad=\"2\"/>\n<wire x1=\"66.2\" y1=\"45.5\" x2=\"64\" y2=\"45.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"45.5\" x2=\"64\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"45.5\" x2=\"66.2\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN5\">\n<contactref element=\"RGAIN3_3\" pad=\"1\"/>\n<contactref element=\"CGAIN1_3\" pad=\"2\"/>\n<contactref element=\"GAINSW3\" pad=\"3\"/>\n<contactref element=\"CL3\" pad=\"-\"/>\n<wire x1=\"61\" y1=\"43.2\" x2=\"61\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.7\" y1=\"42.5\" x2=\"61\" y2=\"43.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.1\" y1=\"42.5\" x2=\"61.7\" y2=\"42.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"40.2\" x2=\"65.75\" y2=\"40.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.75\" y1=\"40.85\" x2=\"64.1\" y2=\"42.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"43.4\" x2=\"60.95\" y2=\"43.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"40.2\" x2=\"66.4\" y2=\"40.11228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"41.1\" x2=\"67.1\" y2=\"41.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.7\" y1=\"36.8\" x2=\"67.4\" y2=\"41.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.9\" y1=\"36.8\" x2=\"71.7\" y2=\"36.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"37.3\" x2=\"73.9\" y2=\"36.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"44.7\" x2=\"74.4\" y2=\"37.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.4\" y1=\"45.7\" x2=\"74.4\" y2=\"44.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"45.7\" x2=\"73.4\" y2=\"45.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"47.3\" x2=\"72.1\" y2=\"45.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"41.1\" x2=\"67.1\" y2=\"41.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"47.3\" x2=\"70.5\" y2=\"47.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.9\" y1=\"41\" x2=\"65.75\" y2=\"40.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"41\" x2=\"65.9\" y2=\"41\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"41\" x2=\"67.1\" y2=\"41.15\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65.9\" y=\"41\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN6\">\n<contactref element=\"RGAIN4_3\" pad=\"1\"/>\n<contactref element=\"GAINSW3\" pad=\"1\"/>\n<contactref element=\"CH3\" pad=\"-\"/>\n<wire x1=\"64.9\" y1=\"43.4\" x2=\"62.9\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.6\" y1=\"40.7\" x2=\"64.9\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"40.7\" x2=\"67.6\" y2=\"40.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.1\" y1=\"40.2\" x2=\"69.6\" y2=\"40.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"43.4\" x2=\"62.85\" y2=\"43.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.1\" y1=\"40.2\" x2=\"70.1\" y2=\"40.11228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.7\" y1=\"47.3\" x2=\"66.2\" y2=\"47.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.8\" y1=\"46.4\" x2=\"65.7\" y2=\"47.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"46.4\" x2=\"64.8\" y2=\"46.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"43.5\" x2=\"62.9\" y2=\"46.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"47.3\" x2=\"66.2\" y2=\"47.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"43.5\" x2=\"62.85\" y2=\"43.49\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.9\" y=\"46.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$8\">\n<contactref element=\"RGAIN1_4\" pad=\"1\"/>\n<contactref element=\"RGAIN3_4\" pad=\"2\"/>\n<wire x1=\"70.5\" y1=\"51.6\" x2=\"68.4\" y2=\"51.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"51.6\" x2=\"68.4\" y2=\"51.55\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"51.6\" x2=\"70.5\" y2=\"51.55\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$9\">\n<contactref element=\"RGAIN2_4\" pad=\"1\"/>\n<contactref element=\"RGAIN4_4\" pad=\"2\"/>\n<wire x1=\"66.2\" y1=\"51.6\" x2=\"64.1\" y2=\"51.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.1\" y1=\"51.6\" x2=\"64.1\" y2=\"51.55\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"51.6\" x2=\"66.2\" y2=\"51.55\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN7\">\n<contactref element=\"RGAIN3_4\" pad=\"1\"/>\n<contactref element=\"CGAIN1_4\" pad=\"2\"/>\n<contactref element=\"GAINSW4\" pad=\"3\"/>\n<contactref element=\"CL4\" pad=\"-\"/>\n<wire x1=\"59.3\" y1=\"55.2\" x2=\"59.3\" y2=\"55.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.4\" y1=\"54.1\" x2=\"59.3\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.8\" y1=\"54.1\" x2=\"60.4\" y2=\"54.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"53\" x2=\"64.8\" y2=\"54.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.3\" y1=\"55.4\" x2=\"59.25\" y2=\"55.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"53\" x2=\"65.9\" y2=\"52.91228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.1\" y1=\"55.1\" x2=\"66.1\" y2=\"55.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"54.2\" x2=\"66.95\" y2=\"54.25\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.95\" y1=\"54.25\" x2=\"66.1\" y2=\"55.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"53.4\" x2=\"67\" y2=\"54.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"52.5\" x2=\"67\" y2=\"53.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.3\" y1=\"52.5\" x2=\"67.9\" y2=\"52.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.5\" y1=\"52.3\" x2=\"71.3\" y2=\"52.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.5\" y1=\"50.8\" x2=\"71.5\" y2=\"52.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.3\" y1=\"50.6\" x2=\"71.5\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.3\" y1=\"50.6\" x2=\"71.3\" y2=\"50.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"49.7\" x2=\"69.3\" y2=\"50.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"49.7\" x2=\"68.4\" y2=\"49.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"54.3\" x2=\"65.9\" y2=\"53.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"54.3\" x2=\"67.1\" y2=\"54.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.9\" y1=\"53.1\" x2=\"65.9\" y2=\"52.91228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"54.3\" x2=\"66.95\" y2=\"54.25\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"67.1\" y=\"54.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN8\">\n<contactref element=\"RGAIN4_4\" pad=\"1\"/>\n<contactref element=\"GAINSW4\" pad=\"1\"/>\n<contactref element=\"CH4\" pad=\"-\"/>\n<wire x1=\"67\" y1=\"55.4\" x2=\"64.9\" y2=\"55.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"55.4\" x2=\"61.2\" y2=\"55.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"53\" x2=\"67\" y2=\"55.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"53\" x2=\"69.4\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.2\" y1=\"55.4\" x2=\"61.15\" y2=\"55.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"53\" x2=\"69.6\" y2=\"52.91228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"48.5\" x2=\"66.2\" y2=\"49.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"54.1\" x2=\"66.2\" y2=\"48.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.9\" y1=\"55.4\" x2=\"66.2\" y2=\"54.1\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"66.2\" y=\"48.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"64.9\" y=\"55.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_122\">\n<contactref element=\"FPGA\" pad=\"122\"/>\n<contactref element=\"PIN_IO_1\" pad=\"10\"/>\n<wire x1=\"21.2\" y1=\"32.4\" x2=\"20.3\" y2=\"32.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"34.5\" x2=\"21.2\" y2=\"32.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"21.9\" y1=\"35.2\" x2=\"21.2\" y2=\"34.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"21.9\" y1=\"41.8\" x2=\"21.9\" y2=\"35.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"48.3\" x2=\"21.9\" y2=\"41.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.3\" y1=\"32.4\" x2=\"20.21\" y2=\"32.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"48.3\" x2=\"15.4\" y2=\"48.33\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"21.2\" y=\"32.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L121\">\n<contactref element=\"FPGA\" pad=\"121\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"4\"/>\n<wire x1=\"20.9\" y1=\"32.9\" x2=\"20.3\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.5\" y1=\"34.5\" x2=\"20.9\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.5\" y1=\"34.5\" x2=\"22.5\" y2=\"34.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"30.3\" y1=\"41.3\" x2=\"23.5\" y2=\"34.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"32.4\" y1=\"41.3\" x2=\"30.3\" y2=\"41.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.1\" y1=\"43\" x2=\"32.4\" y2=\"41.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"34.1\" y1=\"49\" x2=\"34.1\" y2=\"43\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.1\" y1=\"49.7\" x2=\"34.1\" y2=\"49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"50.4\" x2=\"34.1\" y2=\"49.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"32.9\" x2=\"20.21\" y2=\"32.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.8\" y1=\"50.4\" x2=\"34.85\" y2=\"50.479\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"22.5\" y=\"34.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.1\" y=\"43\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.1\" y=\"49\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_119\">\n<contactref element=\"FPGA\" pad=\"119\"/>\n<contactref element=\"PIN_IO_1\" pad=\"8\"/>\n<wire x1=\"20.9\" y1=\"33.9\" x2=\"20.3\" y2=\"33.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.5\" y1=\"35.5\" x2=\"20.9\" y2=\"33.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.8\" y1=\"36.2\" x2=\"22.5\" y2=\"35.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.8\" y1=\"36.8\" x2=\"21.8\" y2=\"36.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.4\" y1=\"43.2\" x2=\"21.8\" y2=\"36.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"33.9\" x2=\"20.21\" y2=\"33.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"43.2\" x2=\"15.4\" y2=\"43.25\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"22.5\" y=\"35.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_118\">\n<contactref element=\"FPGA\" pad=\"118\"/>\n<contactref element=\"PIN_IO_1\" pad=\"7\"/>\n<wire x1=\"19.2\" y1=\"34.4\" x2=\"20.2\" y2=\"34.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.2\" y1=\"36.4\" x2=\"19.2\" y2=\"34.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.4\" y1=\"36.6\" x2=\"19.2\" y2=\"36.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.4\" y1=\"38.4\" x2=\"19.4\" y2=\"36.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"17.1\" y1=\"40.7\" x2=\"19.4\" y2=\"38.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"40.7\" x2=\"17.1\" y2=\"40.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.2\" y1=\"34.4\" x2=\"20.21\" y2=\"34.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"40.7\" x2=\"15.4\" y2=\"40.71\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"19.2\" y=\"34.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_114\">\n<contactref element=\"FPGA\" pad=\"114\"/>\n<contactref element=\"PIN_IO_1\" pad=\"6\"/>\n<wire x1=\"21.2\" y1=\"36.3\" x2=\"20.3\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.4\" y1=\"36.3\" x2=\"21.2\" y2=\"36.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.6\" y1=\"38.1\" x2=\"20.4\" y2=\"36.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.4\" y1=\"38.1\" x2=\"18.6\" y2=\"38.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.3\" y1=\"36.3\" x2=\"20.21\" y2=\"36.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"38.1\" x2=\"15.4\" y2=\"38.17\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.2\" y=\"36.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_111\">\n<contactref element=\"FPGA\" pad=\"111\"/>\n<contactref element=\"PIN_IO_1\" pad=\"4\"/>\n<wire x1=\"18.7\" y1=\"37.8\" x2=\"20.2\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.4\" y1=\"37.5\" x2=\"18.7\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.4\" y1=\"37.2\" x2=\"18.4\" y2=\"37.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"35.3\" x2=\"18.4\" y2=\"37.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.5\" y1=\"34.2\" x2=\"16.5\" y2=\"35.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"33.1\" x2=\"16.5\" y2=\"34.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.2\" y1=\"37.8\" x2=\"20.21\" y2=\"37.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"33.1\" x2=\"15.4\" y2=\"33.09\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"18.4\" y=\"37.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_110\">\n<contactref element=\"FPGA\" pad=\"110\"/>\n<contactref element=\"PIN_IO_1\" pad=\"3\"/>\n<wire x1=\"21.2\" y1=\"38.3\" x2=\"20.3\" y2=\"38.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.2\" y1=\"37.1\" x2=\"21.2\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.8\" y1=\"35.7\" x2=\"21.2\" y2=\"37.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.8\" y1=\"34.2\" x2=\"19.8\" y2=\"35.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.2\" y1=\"30.6\" x2=\"19.8\" y2=\"34.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"30.6\" x2=\"16.2\" y2=\"30.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.3\" y1=\"38.3\" x2=\"20.21\" y2=\"38.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"30.6\" x2=\"15.4\" y2=\"30.55\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"21.2\" y=\"38.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_113\">\n<contactref element=\"FPGA\" pad=\"113\"/>\n<contactref element=\"PIN_IO_1\" pad=\"5\"/>\n<wire x1=\"18.8\" y1=\"36.8\" x2=\"20.2\" y2=\"36.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.5\" y1=\"36.8\" x2=\"18.8\" y2=\"36.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.4\" y1=\"35.7\" x2=\"16.5\" y2=\"36.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"36.8\" x2=\"20.21\" y2=\"36.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"35.7\" x2=\"15.4\" y2=\"35.63\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"18.8\" y=\"36.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$10\">\n<contactref element=\"C_AC1\" pad=\"1\"/>\n<contactref element=\"K1\" pad=\"4\"/>\n<contactref element=\"RIN5\" pad=\"1\"/>\n<contactref element=\"S5\" pad=\"2\"/>\n<wire x1=\"74.2\" y1=\"2.5\" x2=\"74.2\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"2\" x2=\"74.2\" y2=\"2.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"2\" x2=\"73.65\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.1\" y1=\"5.3\" x2=\"73\" y2=\"5.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.1\" y1=\"4.4\" x2=\"74.1\" y2=\"5.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"4.3\" x2=\"74.1\" y2=\"4.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"5.3\" x2=\"73\" y2=\"5.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.2\" y1=\"4.3\" x2=\"74.25\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.3\" y1=\"-9.7\" x2=\"55\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63\" y1=\"-2\" x2=\"55.3\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.7\" y1=\"-2\" x2=\"63\" y2=\"-2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"0.9\" x2=\"70.7\" y2=\"-2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"2\" x2=\"73.6\" y2=\"0.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"2\" x2=\"73.65\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"74.1\" y=\"5.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ2\">\n<contactref element=\"K2\" pad=\"3\"/>\n<contactref element=\"C_AC2\" pad=\"2\"/>\n<contactref element=\"J2\" pad=\"SIGNAL\"/>\n<contactref element=\"S2\" pad=\"2\"/>\n<wire x1=\"75.9\" y1=\"10.8\" x2=\"75.9\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.5\" y1=\"11.4\" x2=\"75.9\" y2=\"10.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.5\" y1=\"13.8\" x2=\"76.5\" y2=\"11.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"16.7\" x2=\"76.5\" y2=\"13.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.9\" y1=\"10\" x2=\"75.85\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"16.7\" x2=\"73.54\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"8.7\" x2=\"73\" y2=\"7.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.2\" y1=\"11.9\" x2=\"73\" y2=\"8.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.2\" y1=\"14.1\" x2=\"76.2\" y2=\"11.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"16.7\" x2=\"76.2\" y2=\"14.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"16.7\" x2=\"73.54\" y2=\"16.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72\" y1=\"18.2\" x2=\"72\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"16.7\" x2=\"72\" y2=\"18.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"16.7\" x2=\"73.54\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$15\">\n<contactref element=\"C_AC2\" pad=\"1\"/>\n<contactref element=\"K2\" pad=\"4\"/>\n<contactref element=\"RIN6\" pad=\"1\"/>\n<contactref element=\"S6\" pad=\"2\"/>\n<wire x1=\"74.1\" y1=\"11.8\" x2=\"74.1\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.1\" y1=\"11\" x2=\"74.1\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"12.2\" x2=\"74.1\" y2=\"11.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.1\" y1=\"10\" x2=\"74.15\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"12.2\" x2=\"73.65\" y2=\"12.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"10.3\" x2=\"73\" y2=\"10.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.5\" y1=\"11\" x2=\"73.8\" y2=\"10.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.1\" y1=\"11\" x2=\"74.5\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"10.3\" x2=\"73\" y2=\"10.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73\" y1=\"11\" x2=\"74.5\" y2=\"11\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.3\" y1=\"17.7\" x2=\"73\" y2=\"11\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.6\" y1=\"17.7\" x2=\"66.3\" y2=\"17.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62\" y1=\"19.3\" x2=\"63.6\" y2=\"17.7\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"74.5\" y=\"11\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.6\" y=\"17.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ3\">\n<contactref element=\"K3\" pad=\"3\"/>\n<contactref element=\"C_AC3\" pad=\"2\"/>\n<contactref element=\"J3\" pad=\"SIGNAL\"/>\n<contactref element=\"S3\" pad=\"2\"/>\n<wire x1=\"74.6\" y1=\"44\" x2=\"75.9\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"38.7\" x2=\"74.6\" y2=\"44\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"37.7\" x2=\"74.6\" y2=\"38.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.9\" y1=\"45.3\" x2=\"75.95\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"37.7\" x2=\"73.54\" y2=\"37.67\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"40.7\" x2=\"73\" y2=\"44.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"40.2\" x2=\"73\" y2=\"40.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"37.7\" x2=\"73.5\" y2=\"40.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.5\" y1=\"37.7\" x2=\"73.54\" y2=\"37.67\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72\" y1=\"30\" x2=\"72\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.4\" y1=\"33.4\" x2=\"72\" y2=\"30\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.4\" y1=\"36.4\" x2=\"75.4\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.9\" y1=\"37.9\" x2=\"75.4\" y2=\"36.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.9\" y1=\"37.9\" x2=\"73.54\" y2=\"37.67\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INJ4\">\n<contactref element=\"K4\" pad=\"3\"/>\n<contactref element=\"C_AC4\" pad=\"2\"/>\n<contactref element=\"J4\" pad=\"SIGNAL\"/>\n<contactref element=\"S4\" pad=\"2\"/>\n<wire x1=\"76.1\" y1=\"52.2\" x2=\"76.1\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.6\" y1=\"52.7\" x2=\"76.1\" y2=\"52.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.6\" y1=\"55.6\" x2=\"76.6\" y2=\"52.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"58.6\" x2=\"74.35\" y2=\"57.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.35\" y1=\"57.85\" x2=\"76.6\" y2=\"55.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.1\" y1=\"51.3\" x2=\"76.05\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"58.6\" x2=\"73.54\" y2=\"58.64\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.3\" y1=\"53.1\" x2=\"73\" y2=\"49.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.3\" y1=\"55.9\" x2=\"76.3\" y2=\"53.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"58.6\" x2=\"76.3\" y2=\"55.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73\" y1=\"49.8\" x2=\"73\" y2=\"49.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"58.6\" x2=\"73.54\" y2=\"58.64\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"59.1\" x2=\"66\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.3\" y1=\"57.8\" x2=\"66\" y2=\"59.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"57.8\" x2=\"67.3\" y2=\"57.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"57.8\" x2=\"74.35\" y2=\"57.85\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$11\">\n<contactref element=\"K1\" pad=\"1\"/>\n<contactref element=\"ACR1\" pad=\"2\"/>\n<wire x1=\"79\" y1=\"4.9\" x2=\"79\" y2=\"5.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"0.3\" x2=\"79\" y2=\"4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.4\" y1=\"-4.6\" x2=\"74.4\" y2=\"0.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.9\" y1=\"-5.1\" x2=\"74.4\" y2=\"-4.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"-5.1\" x2=\"73.9\" y2=\"-5.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"-4.5\" x2=\"68\" y2=\"-5.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65\" y1=\"-4.5\" x2=\"67.4\" y2=\"-4.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"-5.6\" x2=\"65\" y2=\"-4.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"-9.3\" x2=\"63.9\" y2=\"-5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.7\" y1=\"-9.5\" x2=\"63.9\" y2=\"-9.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.1\" y1=\"-9.5\" x2=\"63.7\" y2=\"-9.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.4\" y1=\"-6.8\" x2=\"19.1\" y2=\"-9.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.4\" y1=\"-6.7\" x2=\"16.4\" y2=\"-6.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.1\" y1=\"-6.7\" x2=\"16.4\" y2=\"-6.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.5\" y1=\"-2.1\" x2=\"16.1\" y2=\"-6.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.5\" y1=\"4.9\" x2=\"11.5\" y2=\"-2.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.9\" y1=\"6.5\" x2=\"11.5\" y2=\"4.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.9\" y1=\"9.95\" x2=\"9.9\" y2=\"6.5\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"16.4\" y=\"-6.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$21\">\n<contactref element=\"K2\" pad=\"1\"/>\n<contactref element=\"ACR2\" pad=\"2\"/>\n<wire x1=\"74.7\" y1=\"5.9\" x2=\"79\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.7\" y1=\"5.1\" x2=\"74.7\" y2=\"5.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.4\" y1=\"-9.2\" x2=\"74.7\" y2=\"5.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.3\" y1=\"-9.2\" x2=\"60.4\" y2=\"-9.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.8\" y1=\"-6.7\" x2=\"17.3\" y2=\"-9.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.8\" y1=\"-6.4\" x2=\"14.8\" y2=\"-6.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.6\" y1=\"-1.2\" x2=\"14.8\" y2=\"-6.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.6\" y1=\"3.1\" x2=\"9.6\" y2=\"-1.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.7\" y1=\"5\" x2=\"9.6\" y2=\"3.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.7\" y1=\"9.95\" x2=\"7.7\" y2=\"5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"10.2\" x2=\"79\" y2=\"10.27\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"74.7\" y=\"5.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"14.8\" y=\"-6.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$32\">\n<contactref element=\"K3\" pad=\"1\"/>\n<contactref element=\"ACR3\" pad=\"2\"/>\n<wire x1=\"79\" y1=\"46.1\" x2=\"79\" y2=\"47.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83\" y1=\"42.1\" x2=\"79\" y2=\"46.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"83\" y1=\"-2\" x2=\"83\" y2=\"42.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.2\" y1=\"-10.8\" x2=\"83\" y2=\"-2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.2\" y1=\"-10.8\" x2=\"74.2\" y2=\"-10.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"8.6\" y1=\"-3.2\" x2=\"16.2\" y2=\"-10.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"6\" y1=\"-3.2\" x2=\"8.6\" y2=\"-3.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"6\" y1=\"-1.7\" x2=\"6\" y2=\"-3.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.1\" y1=\"-1.6\" x2=\"6\" y2=\"-1.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.1\" y1=\"9.2\" x2=\"6.1\" y2=\"-1.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.4\" y1=\"9.9\" x2=\"6.1\" y2=\"9.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.4\" y1=\"9.9\" x2=\"5.4\" y2=\"9.95\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"6\" y=\"-3.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$35\">\n<contactref element=\"K4\" pad=\"1\"/>\n<contactref element=\"ACR4\" pad=\"2\"/>\n<wire x1=\"79\" y1=\"54.4\" x2=\"79\" y2=\"52.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.6\" y1=\"65.8\" x2=\"79\" y2=\"54.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.5\" y1=\"65.8\" x2=\"67.6\" y2=\"65.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.9\" y1=\"44.4\" x2=\"19.5\" y2=\"65.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.9\" y1=\"26.7\" x2=\"-1.9\" y2=\"44.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.9\" y1=\"24.7\" x2=\"-1.9\" y2=\"26.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.2\" y1=\"18.6\" x2=\"-1.9\" y2=\"24.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.2\" y1=\"11\" x2=\"4.2\" y2=\"18.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.2\" y1=\"10\" x2=\"4.2\" y2=\"11\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.2\" y1=\"10\" x2=\"3.2\" y2=\"9.95\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"-1.9\" y=\"26.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$1\">\n<contactref element=\"RLED4\" pad=\"1\"/>\n<contactref element=\"LED4\" pad=\"C\"/>\n<wire x1=\"0\" y1=\"5.4\" x2=\"0\" y2=\"4.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"6.3\" x2=\"0\" y2=\"5.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"8.6\" x2=\"0.9\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0\" y1=\"9.5\" x2=\"0.9\" y2=\"8.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0\" y1=\"9.5\" x2=\"0\" y2=\"9.55\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$12\">\n<contactref element=\"RLED3\" pad=\"1\"/>\n<contactref element=\"LED3\" pad=\"C\"/>\n<wire x1=\"-2.2\" y1=\"5.4\" x2=\"-2.2\" y2=\"4.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.1\" y1=\"6.3\" x2=\"-2.2\" y2=\"5.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.1\" y1=\"8.7\" x2=\"-3.1\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.26\" y1=\"9.54\" x2=\"-3.1\" y2=\"8.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.2\" y1=\"4.9\" x2=\"-2.18\" y2=\"4.86\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$13\">\n<contactref element=\"RLED2\" pad=\"1\"/>\n<contactref element=\"LED2\" pad=\"C\"/>\n<wire x1=\"-4.4\" y1=\"5.4\" x2=\"-4.4\" y2=\"4.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.3\" y1=\"6.3\" x2=\"-4.4\" y2=\"5.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.3\" y1=\"8.7\" x2=\"-5.3\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.5\" y1=\"9.5\" x2=\"-5.3\" y2=\"8.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.4\" y1=\"4.9\" x2=\"-4.38\" y2=\"4.87\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.5\" y1=\"9.5\" x2=\"-4.46\" y2=\"9.53\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$14\">\n<contactref element=\"RLED1\" pad=\"1\"/>\n<contactref element=\"LED1\" pad=\"C\"/>\n<wire x1=\"-6.6\" y1=\"5.4\" x2=\"-6.6\" y2=\"4.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"6.3\" x2=\"-6.6\" y2=\"5.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"8.8\" x2=\"-7.5\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.8\" y1=\"9.5\" x2=\"-7.5\" y2=\"8.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.6\" y1=\"4.9\" x2=\"-6.58\" y2=\"4.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.8\" y1=\"9.5\" x2=\"-6.76\" y2=\"9.52\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"NSG_1\">\n<contactref element=\"RIN1_11K\" pad=\"1\"/>\n<contactref element=\"CIN1NF_1\" pad=\"1\"/>\n<contactref element=\"CIN56_1\" pad=\"1\"/>\n<contactref element=\"S5\" pad=\"1\"/>\n<wire x1=\"59.2\" y1=\"3\" x2=\"59.2\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"0.6\" x2=\"59.15\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"3\" x2=\"59.15\" y2=\"3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"3\" x2=\"59.1\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"5.6\" x2=\"59.05\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"3\" x2=\"59.15\" y2=\"3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.6\" y1=\"-8.6\" x2=\"52.5\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"-4.9\" x2=\"53.6\" y2=\"-8.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"0.6\" x2=\"53.6\" y2=\"-4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"0.6\" x2=\"59.15\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"53.6\" y=\"-8.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$39\">\n<contactref element=\"C_AC3\" pad=\"1\"/>\n<contactref element=\"K3\" pad=\"4\"/>\n<contactref element=\"RIN7\" pad=\"1\"/>\n<contactref element=\"S7\" pad=\"2\"/>\n<wire x1=\"74.2\" y1=\"43.4\" x2=\"74.2\" y2=\"45.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"45.1\" x2=\"74.2\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"42.9\" x2=\"74.2\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"45.3\" x2=\"74.25\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"42.9\" x2=\"73.65\" y2=\"42.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"46.3\" x2=\"73\" y2=\"47.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.2\" y1=\"45.1\" x2=\"73\" y2=\"46.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"45.1\" x2=\"74.25\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"32.5\" x2=\"62\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.6\" y1=\"34.1\" x2=\"62\" y2=\"32.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.6\" y1=\"36.3\" x2=\"63.6\" y2=\"34.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.7\" y1=\"39.4\" x2=\"63.6\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.8\" y1=\"39.4\" x2=\"66.7\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"42.2\" x2=\"70.8\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"42.9\" x2=\"73.6\" y2=\"42.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"42.9\" x2=\"73.65\" y2=\"42.9\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"73\" y=\"46.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_IO_4\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"28\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"7\"/>\n<wire x1=\"4.3\" y1=\"22.6\" x2=\"4.3\" y2=\"23.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"2.4\" x2=\"4.3\" y2=\"22.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"4.2\" y1=\"2.3\" x2=\"4.3\" y2=\"2.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"4.2\" y1=\"-4.7\" x2=\"4.2\" y2=\"2.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.2\" y1=\"-5.7\" x2=\"4.2\" y2=\"-4.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.5\" y1=\"-5.7\" x2=\"5.2\" y2=\"-5.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.2\" y1=\"3\" x2=\"14.5\" y2=\"-5.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.7\" y1=\"3\" x2=\"23.2\" y2=\"3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26\" y1=\"1.7\" x2=\"24.7\" y2=\"3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26\" y1=\"1.5\" x2=\"26\" y2=\"1.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.1\" y1=\"0.4\" x2=\"26\" y2=\"1.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.3\" y1=\"23.2\" x2=\"4.375\" y2=\"23.275\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.1\" y1=\"0.4\" x2=\"27.13\" y2=\"0.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"4.3\" y=\"22.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"4.2\" y=\"2.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"26\" y=\"1.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_IO_3\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"27\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"5\"/>\n<wire x1=\"5.1\" y1=\"23.9\" x2=\"4.4\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.6\" y1=\"23.4\" x2=\"5.1\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.6\" y1=\"11.6\" x2=\"5.6\" y2=\"23.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.5\" y1=\"6.7\" x2=\"5.6\" y2=\"11.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"10.5\" y1=\"7\" x2=\"10.5\" y2=\"6.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12\" y1=\"8.5\" x2=\"10.5\" y2=\"7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15\" y1=\"8.5\" x2=\"12\" y2=\"8.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.8\" y1=\"4.7\" x2=\"15\" y2=\"8.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"4.7\" x2=\"18.8\" y2=\"4.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"0.4\" x2=\"20.2\" y2=\"4.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.4\" y1=\"23.9\" x2=\"4.375\" y2=\"23.925\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.5\" y1=\"0.4\" x2=\"24.59\" y2=\"0.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"5.6\" y=\"23.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"10.5\" y=\"6.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.8\" y=\"4.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_IO_2\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"26\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"3\"/>\n<wire x1=\"6\" y1=\"24.5\" x2=\"4.4\" y2=\"24.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"23.8\" x2=\"6\" y2=\"24.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"11.3\" y1=\"18.5\" x2=\"6\" y2=\"23.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"11.3\" y1=\"7\" x2=\"11.3\" y2=\"18.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.4\" y1=\"7\" x2=\"11.3\" y2=\"7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.2\" y1=\"4.2\" x2=\"15.4\" y2=\"7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22\" y1=\"0.4\" x2=\"18.2\" y2=\"4.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"4.4\" y1=\"24.5\" x2=\"4.375\" y2=\"24.575\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"0.4\" x2=\"22.05\" y2=\"0.379\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"6\" y=\"24.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"11.3\" y=\"7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.2\" y=\"4.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INAMINUS2\">\n<contactref element=\"U2\" pad=\"2\"/>\n<contactref element=\"RGAIN1_3\" pad=\"2\"/>\n<contactref element=\"RGAIN2_3\" pad=\"2\"/>\n<contactref element=\"CGAIN1_3\" pad=\"1\"/>\n<contactref element=\"CL3\" pad=\"+\"/>\n<contactref element=\"CH3\" pad=\"+\"/>\n<contactref element=\"CIN1NF_3\" pad=\"2\"/>\n<contactref element=\"CIN56_3\" pad=\"2\"/>\n<contactref element=\"RIN3_11K\" pad=\"2\"/>\n<contactref element=\"RIN3\" pad=\"2\"/>\n<contactref element=\"CIN5_3\" pad=\"2\"/>\n<wire x1=\"70.1\" y1=\"43.3\" x2=\"69.3\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.3\" y1=\"43.3\" x2=\"66.4\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.1\" y1=\"43.3\" x2=\"70.1\" y2=\"43.29788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.3\" y1=\"43.3\" x2=\"71\" y2=\"45\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"45\" x2=\"71\" y2=\"45.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.4\" y1=\"44.3\" x2=\"65.4\" y2=\"45.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"43.3\" x2=\"65.55\" y2=\"44.15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.55\" y1=\"44.15\" x2=\"65.4\" y2=\"44.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.4\" y1=\"45.8\" x2=\"65.365\" y2=\"45.8362\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"43.3\" x2=\"66.4\" y2=\"43.29788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"42.9\" x2=\"65.5\" y2=\"42.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.5\" y1=\"42.9\" x2=\"64.9\" y2=\"42.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"42.9\" x2=\"64.9\" y2=\"42.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.2\" y1=\"46.1\" x2=\"68.4\" y2=\"47.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.2\" y1=\"43\" x2=\"67.2\" y2=\"46.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"42.9\" x2=\"67.2\" y2=\"43\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"47.3\" x2=\"68.4\" y2=\"47.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"42.9\" x2=\"67.1\" y2=\"42.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"45.1\" x2=\"61.1\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"47.4\" x2=\"61.1\" y2=\"47.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"47.4\" x2=\"64\" y2=\"47.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"47.4\" x2=\"61.1\" y2=\"45.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"45.1\" x2=\"61.05\" y2=\"45.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"47.4\" x2=\"60.75\" y2=\"47.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"42.8\" x2=\"64.9\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"42.8\" x2=\"64.9\" y2=\"42.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"42.8\" x2=\"61.05\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.5\" y1=\"42.9\" x2=\"65.5\" y2=\"44.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.5\" y1=\"44.1\" x2=\"65.55\" y2=\"44.15\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"65.5\" y=\"44.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$44\">\n<contactref element=\"DAC1\" pad=\"6\"/>\n<contactref element=\"ROFFSET1\" pad=\"2\"/>\n<wire x1=\"66.5\" y1=\"26.9\" x2=\"69.9869\" y2=\"26.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"26.7\" x2=\"66.5\" y2=\"26.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"26.7\" x2=\"66.25\" y2=\"26.7\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$45\">\n<contactref element=\"DAC1\" pad=\"7\"/>\n<contactref element=\"ROFFSET2\" pad=\"2\"/>\n<wire x1=\"67.8\" y1=\"27.4\" x2=\"69.9869\" y2=\"27.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"28.9\" x2=\"67.8\" y2=\"27.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"28.9\" x2=\"66.25\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$46\">\n<contactref element=\"DAC1\" pad=\"8\"/>\n<contactref element=\"ROFFSET3\" pad=\"2\"/>\n<wire x1=\"68.6\" y1=\"27.9\" x2=\"69.9869\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"29.1\" x2=\"68.6\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"30.6\" x2=\"67.4\" y2=\"29.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"66.8\" y1=\"30.6\" x2=\"67.4\" y2=\"30.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"31.1\" x2=\"66.8\" y2=\"30.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"31.1\" x2=\"66.25\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"67.4\" y=\"29.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67.4\" y=\"30.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$47\">\n<contactref element=\"DAC1\" pad=\"9\"/>\n<contactref element=\"ROFFSET4\" pad=\"2\"/>\n<wire x1=\"70.5\" y1=\"28.4\" x2=\"69.9869\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"27.9\" x2=\"70.5\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"27.8\" x2=\"71\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"31.4\" x2=\"71\" y2=\"27.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.4\" y1=\"32.2\" x2=\"67.4\" y2=\"31.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"33.3\" x2=\"67.4\" y2=\"32.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"33.3\" x2=\"66.25\" y2=\"33.3\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"71\" y=\"27.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67.4\" y=\"31.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"VCCA\" class=\"2\">\n<contactref element=\"CP4\" pad=\"1\"/>\n<contactref element=\"REG1\" pad=\"TER\"/>\n<contactref element=\"REG1\" pad=\"2\"/>\n<contactref element=\"CP9\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"5\"/>\n<contactref element=\"GAINSW2\" pad=\"5\"/>\n<contactref element=\"GAINSW3\" pad=\"5\"/>\n<contactref element=\"GAINSW4\" pad=\"5\"/>\n<contactref element=\"U2\" pad=\"8\"/>\n<contactref element=\"C5VOPAMP2\" pad=\"1\"/>\n<contactref element=\"U1\" pad=\"8\"/>\n<contactref element=\"C5VOPAMP1\" pad=\"1\"/>\n<contactref element=\"DAC1\" pad=\"1\"/>\n<contactref element=\"COFFSET\" pad=\"2\"/>\n<contactref element=\"CADD2_B\" pad=\"1\"/>\n<contactref element=\"CADD1_B\" pad=\"1\"/>\n<contactref element=\"IC1\" pad=\"48\"/>\n<contactref element=\"IC1\" pad=\"1\"/>\n<contactref element=\"IC1\" pad=\"13\"/>\n<contactref element=\"IC1\" pad=\"12\"/>\n<contactref element=\"IC2\" pad=\"48\"/>\n<contactref element=\"IC2\" pad=\"1\"/>\n<contactref element=\"IC2\" pad=\"13\"/>\n<contactref element=\"IC2\" pad=\"12\"/>\n<contactref element=\"CADD2_A\" pad=\"1\"/>\n<contactref element=\"CADD1_A\" pad=\"1\"/>\n<contactref element=\"OVSAMP1\" pad=\"5\"/>\n<contactref element=\"OVSAMP2\" pad=\"5\"/>\n<wire x1=\"46.025\" y1=\"2.7\" x2=\"49.8\" y2=\"2.7\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"49.8\" y1=\"2.7\" x2=\"52.375\" y2=\"2.7\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"52.375\" y1=\"2.7\" x2=\"54.7625\" y2=\"5.0875\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"54.7625\" y1=\"5.0875\" x2=\"56.1\" y2=\"6.425\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"6.425\" x2=\"56.1\" y2=\"11.7\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"11.7\" x2=\"57.4396\" y2=\"10.3604\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"57.4396\" y1=\"10.3604\" x2=\"57.4396\" y2=\"10.12645\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"57.4396\" y1=\"10.12645\" x2=\"57.82645\" y2=\"9.7396\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"57.82645\" y1=\"9.7396\" x2=\"58.37355\" y2=\"9.7396\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"58.37355\" y1=\"9.7396\" x2=\"58.63395\" y2=\"10\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"58.63395\" y1=\"10\" x2=\"59\" y2=\"10\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"59\" y1=\"10\" x2=\"59\" y2=\"10.64710625\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"60.2494\" y1=\"15.33229375\" x2=\"60.45770625\" y2=\"15.5406\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"60.45770625\" y1=\"15.5406\" x2=\"60.5406\" y2=\"15.5406\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"60.5406\" y1=\"15.5406\" x2=\"61\" y2=\"16\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"59\" y1=\"10.64710625\" x2=\"59.726446875\" y2=\"11.373553125\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"59.726446875\" y1=\"11.373553125\" x2=\"60.2494\" y2=\"11.89650625\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"60.2494\" y1=\"11.89650625\" x2=\"60.2494\" y2=\"15.33229375\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"16\" x2=\"61\" y2=\"20.85\" width=\"0.4064\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"20.85\" x2=\"61\" y2=\"30\" width=\"0.4064\" layer=\"1\"/>\n<wire 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x2=\"70.95\" y2=\"28.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.75\" y1=\"30\" x2=\"60.9\" y2=\"30\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"30\" x2=\"69.9\" y2=\"30\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.1\" y1=\"28.95\" x2=\"74.2131\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.6\" y1=\"35.25\" x2=\"53.85\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.85\" y1=\"34.5\" x2=\"53.8\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.6\" y1=\"35.25\" x2=\"54.5\" y2=\"35.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.45\" y1=\"20.85\" x2=\"54.5\" y2=\"20.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.85\" y1=\"21.45\" x2=\"53.75\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.3\" y1=\"52.05\" x2=\"60.3\" y2=\"52.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.8\" y1=\"50.55\" x2=\"61.65\" y2=\"50.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.65\" y1=\"50.7\" x2=\"60.3\" y2=\"52.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.3\" y1=\"52.8\" x2=\"60.2\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.8\" y1=\"50.55\" x2=\"61.9\" y2=\"50.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.65\" y1=\"50.7\" x2=\"64.05\" y2=\"50.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.05\" y1=\"50.7\" x2=\"64.095\" y2=\"50.7638\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.65\" y1=\"50.7\" x2=\"61.9\" y2=\"50.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.95\" y1=\"9.3\" x2=\"61.95\" y2=\"9.45\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.95\" y1=\"9.45\" x2=\"61.95\" y2=\"11.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.95\" y1=\"11.25\" x2=\"61.95\" y2=\"12\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.95\" y1=\"12\" x2=\"61.9\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.95\" y1=\"9.3\" x2=\"61.9\" y2=\"9.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.95\" y1=\"9.45\" x2=\"63.9\" y2=\"9.45\" width=\"0.1524\" layer=\"1\"/>\n<wire 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width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.9\" y1=\"30\" x2=\"61\" y2=\"30\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"49.8\" y=\"2.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"60.9\" y=\"30\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"53.8\" y1=\"31.1\" x2=\"53.8\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"30.9\" x2=\"53.8\" y2=\"31.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"29.5\" x2=\"53.6\" y2=\"30.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"34.5\" x2=\"53.75\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"29.5\" x2=\"53.6\" y2=\"27.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.2\" y1=\"40.8\" x2=\"54.5\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"41.2\" x2=\"54.2\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"40.8\" x2=\"54.5\" y2=\"40.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.45\" y1=\"20.85\" x2=\"53.85\" y2=\"21.45\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"41.9\" x2=\"53.8\" y2=\"41.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.2\" y1=\"43.3\" x2=\"53.8\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"43.3\" x2=\"55.2\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"43.4\" x2=\"56.1\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"44\" x2=\"56.2\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"41.6\" x2=\"53.75\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"23.1\" x2=\"53.6\" y2=\"27.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"22.9\" x2=\"53.6\" y2=\"23.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"21.5\" x2=\"53.8\" y2=\"22.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"21.5\" x2=\"53.75\" y2=\"21.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"41.5\" x2=\"53.8\" y2=\"41.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.8\" y1=\"41.5\" x2=\"53.75\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"15.2\" x2=\"53.85\" y2=\"14.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"11.9\" x2=\"53.9\" y2=\"14.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.9\" y1=\"14.1\" x2=\"53.85\" y2=\"14.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"11.9\" x2=\"56.1\" y2=\"11.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"15.2\" x2=\"54.5\" y2=\"15.25\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$48\" class=\"3\">\n<contactref element=\"REG1\" pad=\"3\"/>\n<contactref element=\"CP3\" pad=\"1\"/>\n<contactref element=\"CP8\" pad=\"1\"/>\n<contactref element=\"CP7\" pad=\"1\"/>\n<contactref element=\"L2\" pad=\"2\"/>\n<wire x1=\"52.3\" y1=\"5.9\" x2=\"49.2\" y2=\"5.9\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"49.1\" y1=\"5.8\" x2=\"45.7\" y2=\"5.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"49.1\" y1=\"5.8\" x2=\"49.2\" y2=\"5.9\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"45.5\" y1=\"5.6\" x2=\"44.2\" y2=\"5.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"44.2\" y1=\"5.6\" x2=\"41.6\" y2=\"5.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"45.5\" y1=\"5.6\" x2=\"45.7\" y2=\"5.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"45.8\" y1=\"0.5\" x2=\"46\" y2=\"0.5\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"44.2\" y1=\"2.1\" x2=\"45.8\" y2=\"0.5\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"44.2\" y1=\"5.6\" x2=\"44.2\" y2=\"2.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"46\" y1=\"0.5\" x2=\"46.025\" y2=\"0.414\" width=\"0.381\" layer=\"1\"/>\n<via x=\"44.2\" y=\"2.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$49\" class=\"3\">\n<contactref element=\"REG\" pad=\"3\"/>\n<contactref element=\"CP5\" pad=\"1\"/>\n<contactref element=\"CP2\" pad=\"1\"/>\n<contactref element=\"CP1\" pad=\"1\"/>\n<contactref element=\"L1\" pad=\"2\"/>\n<wire x1=\"50.1\" y1=\"53.1\" x2=\"47.3\" y2=\"53.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"50.1\" y1=\"53.1\" x2=\"53.2\" y2=\"53.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"53.2\" y1=\"53.1\" x2=\"53.22\" y2=\"53.07\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"46.9\" y1=\"52.7\" x2=\"45.8\" y2=\"52.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"45.8\" y1=\"52.7\" x2=\"43.3\" y2=\"52.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"47.3\" y1=\"53.1\" x2=\"46.9\" y2=\"52.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"45.8\" y1=\"49.4\" x2=\"45.8\" y2=\"48.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"45.8\" y1=\"52.7\" x2=\"45.8\" y2=\"49.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"45.8\" y1=\"48.3\" x2=\"45.835\" y2=\"48.254\" width=\"0.381\" layer=\"1\"/>\n<via x=\"45.8\" y=\"49.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_SHDN2\">\n<contactref element=\"IC2\" pad=\"7\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"6\"/>\n<wire x1=\"55.4\" y1=\"38.3\" x2=\"54.5\" y2=\"38.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.8\" y1=\"38.7\" x2=\"55.4\" y2=\"38.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57\" y1=\"38.7\" x2=\"55.8\" y2=\"38.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.3\" y1=\"41\" x2=\"57\" y2=\"38.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.4\" y1=\"41\" x2=\"59.3\" y2=\"41\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"50.6\" y1=\"48.8\" x2=\"58.4\" y2=\"41\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"45.2\" y1=\"48.8\" x2=\"50.6\" y2=\"48.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"36.3\" y1=\"57.7\" x2=\"45.2\" y2=\"48.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"36.3\" y1=\"64.5\" x2=\"36.3\" y2=\"57.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35.8\" y1=\"65\" x2=\"36.3\" y2=\"64.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"22.3\" y1=\"65\" x2=\"35.8\" y2=\"65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.7\" y1=\"63.4\" x2=\"22.3\" y2=\"65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.7\" y1=\"58.5\" x2=\"20.7\" y2=\"63.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.4\" y1=\"37.4\" x2=\"20.7\" y2=\"58.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.4\" y1=\"27.1\" x2=\"-0.4\" y2=\"37.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"0.1\" y1=\"26.6\" x2=\"-0.4\" y2=\"27.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"26.6\" x2=\"0.1\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"38.3\" x2=\"54.5\" y2=\"38.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"26.6\" x2=\"0.825\" y2=\"26.525\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"59.3\" y=\"41\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-0.4\" y=\"27.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$34\">\n<contactref element=\"RLEDPOW\" pad=\"1\"/>\n<contactref element=\"LEDPOW\" pad=\"C\"/>\n<wire x1=\"12\" y1=\"61.8\" x2=\"12\" y2=\"62.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.4\" y1=\"61.8\" x2=\"12\" y2=\"61.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.4\" y1=\"62.4\" x2=\"10.4\" y2=\"61.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.9\" y1=\"62.9\" x2=\"10.4\" y2=\"62.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.9\" y1=\"62.9\" x2=\"9.9\" y2=\"62.95\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"12\" y=\"61.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"10.4\" y=\"61.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGINFROMLEFT_28\">\n<contactref element=\"FPGA\" pad=\"28\"/>\n<contactref element=\"PIN_LEFT\" pad=\"5\"/>\n<wire x1=\"35.8\" y1=\"16.4\" x2=\"35.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.5\" y1=\"16.1\" x2=\"35.8\" y2=\"16.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.5\" y1=\"-2.1\" x2=\"35.5\" y2=\"16.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.7\" y1=\"-7.9\" x2=\"35.5\" y2=\"-2.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"35.8\" y1=\"19.3\" x2=\"35.71\" y2=\"19.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.7\" y1=\"-7.9\" x2=\"29.67\" y2=\"-7.9\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"35.5\" y=\"16.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_105\">\n<contactref element=\"FPGA\" pad=\"105\"/>\n<contactref element=\"PIN_IO_1\" pad=\"9\"/>\n<wire x1=\"23.7\" y1=\"41.6\" x2=\"23.7\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.4\" y1=\"41.9\" x2=\"23.7\" y2=\"41.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.2\" y1=\"41.9\" x2=\"23.4\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.4\" y1=\"45.7\" x2=\"19.2\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.7\" y1=\"40.9\" x2=\"23.71\" y2=\"40.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"45.7\" x2=\"15.4\" y2=\"45.79\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"23.4\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"NNG_1\">\n<contactref element=\"RIN1\" pad=\"1\"/>\n<contactref element=\"CIN5_1\" pad=\"1\"/>\n<contactref element=\"S5\" pad=\"3\"/>\n<wire x1=\"63.8\" y1=\"-2.8\" x2=\"63.8\" y2=\"0.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.5\" y1=\"-8.1\" x2=\"63.8\" y2=\"-2.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.5\" y1=\"-8.7\" x2=\"58.5\" y2=\"-8.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.5\" y1=\"-9.7\" x2=\"58.5\" y2=\"-8.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.7\" y1=\"4.1\" x2=\"71\" y2=\"5.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.3\" y1=\"4.1\" x2=\"72.7\" y2=\"4.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.1\" y1=\"-8.1\" x2=\"72.3\" y2=\"4.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.5\" y1=\"-8.1\" x2=\"60.1\" y2=\"-8.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"71\" y1=\"5.8\" x2=\"71\" y2=\"5.85\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.5\" y=\"-8.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"72.7\" y=\"4.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$50\">\n<contactref element=\"C_AC4\" pad=\"1\"/>\n<contactref element=\"K4\" pad=\"4\"/>\n<contactref element=\"RIN8\" pad=\"1\"/>\n<contactref element=\"S8\" pad=\"2\"/>\n<wire x1=\"74.3\" y1=\"53\" x2=\"74.3\" y2=\"52.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"52.3\" x2=\"74.3\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"53.5\" x2=\"74.3\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"51.3\" x2=\"74.35\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"53.5\" x2=\"73.75\" y2=\"53.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"52.3\" x2=\"73\" y2=\"52.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.3\" y1=\"52.3\" x2=\"74.6\" y2=\"52.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"52.3\" x2=\"73\" y2=\"52.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.3\" y1=\"59.3\" x2=\"56\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.5\" y1=\"57.1\" x2=\"56.3\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.1\" y1=\"57.1\" x2=\"58.5\" y2=\"57.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"53.5\" x2=\"70.1\" y2=\"57.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"53.5\" x2=\"73.75\" y2=\"53.5\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"74.6\" y=\"52.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B0\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"1\"/>\n<contactref element=\"S1\" pad=\"5\"/>\n<wire x1=\"11.6\" y1=\"21.2\" x2=\"11.6\" y2=\"23.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.9\" y1=\"20.5\" x2=\"11.6\" y2=\"21.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.9\" y1=\"11.1\" x2=\"10.9\" y2=\"20.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.7\" y1=\"10.9\" x2=\"10.9\" y2=\"11.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.1\" y1=\"10.9\" x2=\"10.7\" y2=\"10.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.9\" y1=\"10.7\" x2=\"9.1\" y2=\"10.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.9\" y1=\"4.3\" x2=\"8.9\" y2=\"10.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.1\" y1=\"2.1\" x2=\"8.9\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.1\" y1=\"-2.2\" x2=\"11.1\" y2=\"2.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.1\" y1=\"-11.2\" x2=\"11.1\" y2=\"-2.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.1\" y1=\"-11.2\" x2=\"20.1\" y2=\"-11.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66\" y1=\"-4.3\" x2=\"59.1\" y2=\"-11.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"23.2\" x2=\"11.625\" y2=\"23.275\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_21_B1\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"2\"/>\n<contactref element=\"S2\" pad=\"5\"/>\n<wire x1=\"10.9\" y1=\"23.9\" x2=\"11.6\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.2\" y1=\"23.2\" x2=\"10.9\" y2=\"23.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.2\" y1=\"7.7\" x2=\"10.2\" y2=\"23.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.5\" y1=\"7\" x2=\"10.2\" y2=\"7.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.5\" y1=\"2.7\" x2=\"9.5\" y2=\"7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.4\" y1=\"1.6\" x2=\"9.5\" y2=\"2.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.4\" y1=\"-0.7\" x2=\"8.4\" y2=\"1.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.6\" y1=\"-0.9\" x2=\"8.4\" y2=\"-0.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"9.8\" y1=\"-0.9\" x2=\"8.6\" y2=\"-0.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.3\" y1=\"-10.4\" x2=\"9.8\" y2=\"-0.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"-10.4\" x2=\"19.3\" y2=\"-10.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.9\" y1=\"0.4\" x2=\"69.1\" y2=\"-10.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"79.9\" y1=\"12.1\" x2=\"79.9\" y2=\"0.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75.9\" y1=\"16.1\" x2=\"79.9\" y2=\"12.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75.9\" y1=\"23.6\" x2=\"75.9\" y2=\"16.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.8\" y1=\"24.7\" x2=\"75.9\" y2=\"23.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.9\" y1=\"24.7\" x2=\"74.8\" y2=\"24.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72\" y1=\"24.7\" x2=\"70.9\" y2=\"24.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"23.9\" x2=\"11.625\" y2=\"23.925\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"10.2\" y=\"23.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.6\" y=\"-0.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"70.9\" y=\"24.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B2\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"3\"/>\n<contactref element=\"S3\" pad=\"5\"/>\n<wire x1=\"12.4\" y1=\"24.6\" x2=\"11.7\" y2=\"24.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.9\" y1=\"25.1\" x2=\"12.4\" y2=\"24.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.7\" y1=\"25.1\" x2=\"12.9\" y2=\"25.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15\" y1=\"26.4\" x2=\"13.7\" y2=\"25.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.1\" y1=\"26.4\" x2=\"15\" y2=\"26.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.7\" y1=\"24.8\" x2=\"16.1\" y2=\"26.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.8\" y1=\"24.8\" x2=\"17.7\" y2=\"24.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.7\" y1=\"26.7\" x2=\"18.8\" y2=\"24.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.7\" y1=\"27.1\" x2=\"20.7\" y2=\"26.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.4\" y1=\"27.8\" x2=\"20.7\" y2=\"27.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.9\" y1=\"27.8\" x2=\"21.4\" y2=\"27.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.3\" y1=\"36.2\" x2=\"23.9\" y2=\"27.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"52.4\" y1=\"36.2\" x2=\"32.3\" y2=\"36.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.9\" y1=\"32.7\" x2=\"52.4\" y2=\"36.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.3\" y1=\"31.3\" x2=\"55.9\" y2=\"32.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"57.3\" y1=\"29.9\" x2=\"57.3\" y2=\"31.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.2\" y1=\"29\" x2=\"57.3\" y2=\"29.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.1\" y1=\"29\" x2=\"58.2\" y2=\"29\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.4\" y1=\"32.3\" x2=\"59.1\" y2=\"29\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.6\" y1=\"32.3\" x2=\"62.4\" y2=\"32.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.9\" y1=\"32.3\" x2=\"62.6\" y2=\"32.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.8\" y1=\"33.2\" x2=\"62.9\" y2=\"32.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.5\" y1=\"33.2\" x2=\"63.8\" y2=\"33.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"34.7\" x2=\"70.5\" y2=\"33.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"24.6\" x2=\"11.625\" y2=\"24.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"12.9\" y=\"25.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"32.3\" y=\"36.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"55.9\" y=\"32.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"62.6\" y=\"32.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B3\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"4\"/>\n<contactref element=\"S4\" pad=\"5\"/>\n<wire x1=\"10.5\" y1=\"25.3\" x2=\"11.6\" y2=\"25.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.1\" y1=\"27.7\" x2=\"10.5\" y2=\"25.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.1\" y1=\"29.8\" x2=\"8.1\" y2=\"27.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.1\" y1=\"34.3\" x2=\"8.1\" y2=\"29.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"8\" y1=\"34.4\" x2=\"8.1\" y2=\"34.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"8\" y1=\"45.3\" x2=\"8\" y2=\"34.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"21.6\" y1=\"58.9\" x2=\"8\" y2=\"45.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"26.3\" y1=\"63.6\" x2=\"21.6\" y2=\"58.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.3\" y1=\"63.7\" x2=\"26.3\" y2=\"63.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.5\" y1=\"64.9\" x2=\"26.3\" y2=\"63.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.9\" y1=\"64.9\" x2=\"27.5\" y2=\"64.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"65.8\" y1=\"64.9\" x2=\"64.9\" y2=\"64.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66\" y1=\"64.7\" x2=\"65.8\" y2=\"64.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"25.3\" x2=\"11.625\" y2=\"25.225\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"8.1\" y=\"27.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.1\" y=\"29.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"21.6\" y=\"58.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"64.9\" y=\"64.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B4\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"5\"/>\n<contactref element=\"S5\" pad=\"5\"/>\n<wire x1=\"13.3\" y1=\"25.8\" x2=\"11.7\" y2=\"25.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"25.5\" x2=\"13.3\" y2=\"25.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"14.7\" y1=\"24.1\" x2=\"13.3\" y2=\"25.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"14.7\" y1=\"22.9\" x2=\"14.7\" y2=\"24.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"14.7\" y1=\"21.7\" x2=\"14.7\" y2=\"22.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.1\" y1=\"21.3\" x2=\"14.7\" y2=\"21.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.1\" y1=\"20.7\" x2=\"15.1\" y2=\"21.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15\" y1=\"20.6\" x2=\"15.1\" y2=\"20.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15\" y1=\"16.6\" x2=\"15\" y2=\"20.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"16.2\" x2=\"15\" y2=\"16.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.4\" y1=\"-0.9\" x2=\"15.4\" y2=\"16.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.2\" y1=\"-4.7\" x2=\"15.4\" y2=\"-0.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.7\" y1=\"-4.7\" x2=\"19.2\" y2=\"-4.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"51.8\" y1=\"-5.8\" x2=\"50.7\" y2=\"-4.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.5\" y1=\"-5.8\" x2=\"51.8\" y2=\"-5.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55\" y1=\"-4.3\" x2=\"53.5\" y2=\"-5.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"25.8\" x2=\"11.625\" y2=\"25.875\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"13.3\" y=\"25.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"14.7\" y=\"22.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B5\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"6\"/>\n<contactref element=\"S6\" pad=\"5\"/>\n<wire x1=\"12.9\" y1=\"26.6\" x2=\"11.7\" y2=\"26.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.5\" y1=\"26.6\" x2=\"12.9\" y2=\"26.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.6\" y1=\"29.7\" x2=\"15.5\" y2=\"26.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.6\" y1=\"30.6\" x2=\"18.6\" y2=\"29.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19\" y1=\"31\" x2=\"18.6\" y2=\"30.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"20.4\" y1=\"31\" x2=\"19\" y2=\"31\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"21.9\" y1=\"29.5\" x2=\"20.4\" y2=\"31\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"32.1\" y1=\"29.5\" x2=\"21.9\" y2=\"29.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35\" y1=\"32.4\" x2=\"32.1\" y2=\"29.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.1\" y1=\"32.4\" x2=\"35\" y2=\"32.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"50.1\" y1=\"25.4\" x2=\"43.1\" y2=\"32.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"50.1\" y1=\"24.6\" x2=\"50.1\" y2=\"25.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.1\" y1=\"24.6\" x2=\"50.1\" y2=\"24.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.7\" y1=\"23\" x2=\"60.1\" y2=\"24.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.7\" y1=\"24.4\" x2=\"61.7\" y2=\"23\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"24.7\" x2=\"61.7\" y2=\"24.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"26.6\" x2=\"11.625\" y2=\"26.525\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"12.9\" y=\"26.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"50.1\" y=\"24.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"61.7\" y=\"23\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B6\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"7\"/>\n<contactref element=\"S7\" pad=\"5\"/>\n<wire x1=\"9.5\" y1=\"27.1\" x2=\"11.6\" y2=\"27.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5\" y1=\"27.1\" x2=\"9.5\" y2=\"27.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"2.4\" y1=\"29.7\" x2=\"5\" y2=\"27.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.7\" y1=\"29.7\" x2=\"2.4\" y2=\"29.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.3\" y1=\"29.1\" x2=\"-0.7\" y2=\"29.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.3\" y1=\"44.5\" x2=\"-1.3\" y2=\"29.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"19.6\" y1=\"65.4\" x2=\"-1.3\" y2=\"44.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.8\" y1=\"65.4\" x2=\"19.6\" y2=\"65.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.9\" y1=\"59.3\" x2=\"37.8\" y2=\"65.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.9\" y1=\"54.2\" x2=\"43.9\" y2=\"59.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.7\" y1=\"36.4\" x2=\"43.9\" y2=\"54.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.7\" y1=\"35\" x2=\"61.7\" y2=\"36.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"34.7\" x2=\"61.7\" y2=\"35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"27.1\" x2=\"11.625\" y2=\"27.175\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"9.5\" y=\"27.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-1.3\" y=\"29.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"43.9\" y=\"59.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"61.7\" y=\"36.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B7\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"8\"/>\n<contactref element=\"S8\" pad=\"5\"/>\n<wire x1=\"12.5\" y1=\"27.9\" x2=\"11.7\" y2=\"27.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.5\" y1=\"28.9\" x2=\"12.5\" y2=\"27.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.5\" y1=\"35\" x2=\"13.5\" y2=\"28.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"35.2\" x2=\"13.5\" y2=\"35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"48.5\" x2=\"13.3\" y2=\"35.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21\" y1=\"56.2\" x2=\"13.3\" y2=\"48.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21\" y1=\"60.8\" x2=\"21\" y2=\"56.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.7\" y1=\"63.5\" x2=\"21\" y2=\"60.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.7\" y1=\"63.6\" x2=\"23.7\" y2=\"63.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.5\" y1=\"66.4\" x2=\"23.7\" y2=\"63.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54.3\" y1=\"66.4\" x2=\"26.5\" y2=\"66.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"56\" y1=\"64.7\" x2=\"54.3\" y2=\"66.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.7\" y1=\"27.9\" x2=\"11.625\" y2=\"27.825\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"13.3\" y=\"35.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"54.3\" y=\"66.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$19\">\n<contactref element=\"S6\" pad=\"1\"/>\n<contactref element=\"CIN1NF_2\" pad=\"1\"/>\n<contactref element=\"CIN56_2\" pad=\"1\"/>\n<contactref element=\"RIN2_11K\" pad=\"1\"/>\n<wire x1=\"59.7\" y1=\"12.4\" x2=\"59.7\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"10.2\" x2=\"59.65\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"9.7\" x2=\"59.1\" y2=\"7.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.6\" y1=\"10.2\" x2=\"59.1\" y2=\"9.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"7.9\" x2=\"59.05\" y2=\"7.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.6\" y1=\"10.2\" x2=\"59.65\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.5\" y1=\"17.5\" x2=\"59.5\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.2\" y1=\"16.8\" x2=\"59.5\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.2\" y1=\"12.9\" x2=\"60.2\" y2=\"16.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"12.4\" x2=\"60.2\" y2=\"12.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"12.4\" x2=\"59.65\" y2=\"12.4\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"60.2\" y=\"16.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$22\">\n<contactref element=\"S6\" pad=\"3\"/>\n<contactref element=\"RIN2\" pad=\"1\"/>\n<contactref element=\"CIN5_2\" pad=\"1\"/>\n<wire x1=\"64.9\" y1=\"12.4\" x2=\"64.9\" y2=\"12.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.9\" y1=\"13.4\" x2=\"64.9\" y2=\"12.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.9\" y1=\"13.8\" x2=\"65.9\" y2=\"13.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.6\" y1=\"13.8\" x2=\"65.9\" y2=\"13.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.5\" y1=\"14.9\" x2=\"65.6\" y2=\"13.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.5\" y1=\"19.3\" x2=\"64.5\" y2=\"14.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.4\" y1=\"8.1\" x2=\"71\" y2=\"8.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.4\" y1=\"9.1\" x2=\"71.4\" y2=\"8.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.4\" y1=\"10.8\" x2=\"72.4\" y2=\"9.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"13.8\" x2=\"72.4\" y2=\"10.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"13.8\" x2=\"69.4\" y2=\"13.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"8.1\" x2=\"71\" y2=\"8.05\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"65.9\" y=\"13.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$43\">\n<contactref element=\"S7\" pad=\"1\"/>\n<contactref element=\"RIN3_11K\" pad=\"1\"/>\n<contactref element=\"CIN1NF_3\" pad=\"1\"/>\n<contactref element=\"CIN56_3\" pad=\"1\"/>\n<wire x1=\"59.4\" y1=\"45.1\" x2=\"59.4\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.4\" y1=\"45.1\" x2=\"59.35\" y2=\"45.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.9\" y1=\"45.5\" x2=\"58.9\" y2=\"47.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.3\" y1=\"45.1\" x2=\"58.9\" y2=\"45.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.9\" y1=\"47.4\" x2=\"58.85\" y2=\"47.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.3\" y1=\"45.1\" x2=\"59.35\" y2=\"45.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.5\" y1=\"32\" x2=\"59.5\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.1\" y1=\"42.1\" x2=\"60.1\" y2=\"38.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.4\" y1=\"42.8\" x2=\"60.1\" y2=\"42.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.4\" y1=\"42.8\" x2=\"59.35\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.55\" y1=\"32.55\" x2=\"59.55\" y2=\"32.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.4\" y1=\"33.4\" x2=\"59.55\" y2=\"32.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.4\" y1=\"38.5\" x2=\"60.4\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.3\" y1=\"38.6\" x2=\"60.4\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.1\" y1=\"38.6\" x2=\"60.3\" y2=\"38.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.55\" y1=\"32.05\" x2=\"59.5\" y2=\"32\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"60.3\" y=\"38.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$51\">\n<contactref element=\"S7\" pad=\"3\"/>\n<contactref element=\"RIN3\" pad=\"1\"/>\n<contactref element=\"CIN5_3\" pad=\"1\"/>\n<wire x1=\"64.9\" y1=\"37.6\" x2=\"64.9\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"38.3\" x2=\"64.9\" y2=\"41.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.2\" y1=\"35.9\" x2=\"64.9\" y2=\"37.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.2\" y1=\"31.8\" x2=\"63.2\" y2=\"35.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.2\" y1=\"30.6\" x2=\"63.2\" y2=\"31.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.5\" y1=\"29.3\" x2=\"63.2\" y2=\"30.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"45.3\" x2=\"71\" y2=\"46.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"44.2\" x2=\"69.4\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"38.3\" x2=\"69.4\" y2=\"44.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.9\" y1=\"38.3\" x2=\"69.4\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"46.9\" x2=\"71\" y2=\"46.95\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"63.2\" y=\"31.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"69.4\" y=\"44.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"69.4\" y=\"38.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$56\">\n<contactref element=\"S8\" pad=\"1\"/>\n<contactref element=\"RIN4_11K\" pad=\"1\"/>\n<contactref element=\"CIN56_4\" pad=\"1\"/>\n<contactref element=\"CIN1NF_4\" pad=\"1\"/>\n<wire x1=\"59.5\" y1=\"54.1\" x2=\"59.5\" y2=\"53.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.5\" y1=\"53.3\" x2=\"59.5\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.5\" y1=\"51.9\" x2=\"59.45\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.5\" y1=\"54.1\" x2=\"59.45\" y2=\"54.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.9\" y1=\"51.4\" x2=\"58.9\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.4\" y1=\"51.9\" x2=\"58.9\" y2=\"51.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.9\" y1=\"49.6\" x2=\"58.85\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.4\" y1=\"51.9\" x2=\"59.45\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.6\" y1=\"58.2\" x2=\"53.5\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.5\" y1=\"53.3\" x2=\"54.6\" y2=\"58.2\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"54.6\" y=\"58.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$57\">\n<contactref element=\"S8\" pad=\"3\"/>\n<contactref element=\"CIN5_4\" pad=\"1\"/>\n<contactref element=\"RIN4\" pad=\"1\"/>\n<wire x1=\"63\" y1=\"53.6\" x2=\"63.9\" y2=\"53.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"53.5\" x2=\"63\" y2=\"53.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"54.9\" x2=\"62.9\" y2=\"53.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.6\" y1=\"58.2\" x2=\"62.9\" y2=\"54.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.5\" y1=\"59.3\" x2=\"59.6\" y2=\"58.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.9\" y1=\"53.6\" x2=\"63.9\" y2=\"53.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72\" y1=\"49.9\" x2=\"71\" y2=\"50.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"48.3\" x2=\"72\" y2=\"49.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.7\" y1=\"48\" x2=\"72\" y2=\"48.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.8\" y1=\"48\" x2=\"71.7\" y2=\"48\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"49.9\" x2=\"67.8\" y2=\"48\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"51.9\" x2=\"65.9\" y2=\"49.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.6\" y1=\"52.2\" x2=\"65.9\" y2=\"51.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.2\" y1=\"52.2\" x2=\"65.6\" y2=\"52.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"53.5\" x2=\"64.2\" y2=\"52.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"50.9\" x2=\"71\" y2=\"50.95\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.9\" y=\"53.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"59.6\" y=\"58.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n</signals>\n<mfgpreviewcolors>\n<mfgpreviewcolor name=\"soldermaskcolor\" color=\"0xC8008000\"/>\n<mfgpreviewcolor name=\"silkscreencolor\" color=\"0xFFFEFEFE\"/>\n<mfgpreviewcolor name=\"backgroundcolor\" color=\"0xFF282828\"/>\n<mfgpreviewcolor name=\"coppercolor\" color=\"0xFFFFBF00\"/>\n<mfgpreviewcolor name=\"substratecolor\" color=\"0xFF786E46\"/>\n</mfgpreviewcolors>\n</board>\n</drawing>\n<compatibility>\n<note version=\"6.3\" minversion=\"6.2.2\" severity=\"warning\">\nSince Version 6.2.2 text objects can contain more than one line,\nwhich will not be processed correctly with this version.\n</note>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/max10adc_v9.0.sch",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"9.2.0\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting keepoldvectorfont=\"yes\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"0.1\" unitdist=\"inch\" unit=\"inch\" style=\"lines\" multiple=\"1\" display=\"no\" altdistance=\"0.01\" altunitdist=\"inch\" altunit=\"inch\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"2\" name=\"Route2\" color=\"58\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"7\" name=\"Route7\" color=\"4\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"8\" name=\"Route8\" color=\"1\" fill=\"2\" visible=\"no\" active=\"no\"/>\n<layer number=\"9\" name=\"Route9\" color=\"4\" fill=\"2\" visible=\"no\" active=\"no\"/>\n<layer number=\"10\" name=\"Route10\" color=\"1\" fill=\"7\" visible=\"no\" active=\"no\"/>\n<layer number=\"11\" name=\"Route11\" color=\"4\" fill=\"7\" visible=\"no\" active=\"no\"/>\n<layer number=\"12\" name=\"Route12\" color=\"1\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"13\" name=\"Route13\" color=\"4\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"14\" name=\"Route14\" color=\"1\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"15\" name=\"Route15\" color=\"13\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"15\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"39\" name=\"tKeepout\" color=\"4\" fill=\"11\" visible=\"no\" active=\"no\"/>\n<layer number=\"40\" name=\"bKeepout\" color=\"1\" fill=\"11\" visible=\"no\" active=\"no\"/>\n<layer number=\"41\" name=\"tRestrict\" color=\"4\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"42\" name=\"bRestrict\" color=\"1\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"43\" name=\"vRestrict\" color=\"2\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"44\" name=\"Drills\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"45\" name=\"Holes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"46\" name=\"Milling\" color=\"3\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"47\" name=\"Measures\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"48\" name=\"Document\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"49\" name=\"Reference\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"50\" name=\"dxf\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"51\" name=\"tDocu\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"52\" name=\"bDocu\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"53\" name=\"tGND_GNDA\" color=\"7\" fill=\"9\" visible=\"no\" active=\"no\"/>\n<layer number=\"54\" name=\"bGND_GNDA\" color=\"1\" fill=\"9\" visible=\"no\" active=\"no\"/>\n<layer number=\"56\" name=\"wert\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"57\" name=\"tCAD\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"59\" name=\"tCarbon\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"60\" name=\"bCarbon\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"90\" name=\"Modules\" color=\"5\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"91\" name=\"Nets\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"92\" name=\"Busses\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"93\" name=\"Pins\" color=\"2\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"94\" name=\"Symbols\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"95\" name=\"Names\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"96\" name=\"Values\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"97\" name=\"Info\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"98\" name=\"Guide\" color=\"6\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"99\" name=\"SpiceOrder\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"100\" name=\"Muster\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"101\" name=\"Patch_Top\" color=\"12\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"102\" name=\"ID\" color=\"15\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"103\" name=\"tMap\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"104\" name=\"bMap\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"105\" name=\"tPlate\" color=\"14\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"106\" name=\"bPlate\" color=\"14\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"107\" name=\"Crop\" color=\"11\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"108\" name=\"fp8\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"109\" name=\"fp9\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"110\" name=\"fp0\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"111\" name=\"LPC17xx\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"112\" name=\"tSilk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"113\" name=\"ReferenceLS\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"114\" name=\"FRNTMAAT1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"115\" name=\"FRNTMAAT2\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"116\" name=\"Patch_BOT\" color=\"9\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"117\" name=\"BACKMAAT1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"118\" name=\"Rect_Pads\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"119\" name=\"KAP_TEKEN\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"120\" name=\"KAP_MAAT1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"121\" name=\"_tsilk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"122\" name=\"_bsilk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"123\" name=\"tTestmark\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"124\" name=\"bTestmark\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"125\" name=\"_tNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"126\" name=\"_bNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"127\" name=\"_tValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"128\" name=\"_bValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"129\" name=\"top_silk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"130\" name=\"SMDSTROOK\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"131\" name=\"tAdjust\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"132\" name=\"bAdjust\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"133\" name=\"bottom_silk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"134\" name=\"silk_top\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"135\" name=\"silk_bottom\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"136\" name=\"silktop\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"137\" name=\"silkbottom\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"144\" name=\"Drill_legend\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"145\" name=\"DrillLegend_01-16\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"146\" name=\"DrillLegend_01-20\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"150\" name=\"Notes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"151\" name=\"HeatSink\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"152\" name=\"_bDocu\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"153\" name=\"FabDoc1\" color=\"6\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"154\" name=\"FabDoc2\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"155\" name=\"FabDoc3\" color=\"7\" fill=\"15\" visible=\"no\" active=\"no\"/>\n<layer number=\"166\" name=\"AntennaArea\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"168\" name=\"4mmHeightArea\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"199\" name=\"Contour\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"200\" name=\"200bmp\" color=\"1\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"201\" name=\"201bmp\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"202\" name=\"202bmp\" color=\"1\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"203\" name=\"203bmp\" color=\"4\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"204\" name=\"204bmp\" color=\"5\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"205\" name=\"205bmp\" color=\"6\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"206\" name=\"206bmp\" color=\"7\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"207\" name=\"207bmp\" color=\"8\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"208\" name=\"208bmp\" color=\"9\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"209\" name=\"209bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"210\" name=\"210bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"211\" name=\"211bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"212\" name=\"212bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"213\" name=\"213bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"214\" name=\"214bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"215\" name=\"215bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"216\" name=\"216bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"217\" name=\"217bmp\" color=\"18\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"218\" name=\"218bmp\" color=\"19\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"219\" name=\"219bmp\" color=\"20\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"220\" name=\"220bmp\" color=\"21\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"221\" name=\"221bmp\" color=\"22\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"222\" name=\"222bmp\" color=\"23\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"223\" name=\"223bmp\" color=\"24\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"224\" name=\"224bmp\" color=\"25\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"225\" name=\"225bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"226\" name=\"226bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"227\" name=\"227bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"228\" name=\"228bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"229\" name=\"229bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"230\" name=\"230bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"231\" name=\"Eagle3D_PG1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"232\" name=\"Eagle3D_PG2\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"233\" name=\"Eagle3D_PG3\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"248\" name=\"Housing\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"249\" name=\"Edge\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"250\" name=\"Descript\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"251\" name=\"SMDround\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"254\" name=\"cooling\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"255\" name=\"Accent\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n</layers>\n<schematic xreflabel=\"%F%N/%S.%C%R\" xrefpart=\"/%S.%C%R\">\n<libraries>\n<library name=\"supply1\">\n<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;\n GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;\n Please keep in mind, that these devices are necessary for the\n automatic wiring of the supply signals.&lt;p&gt;\n The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;\n In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;\n &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"+5V\">\n<wire x1=\"1.27\" y1=\"-1.905\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"-1.905\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"+5V\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R90\"/>\n</symbol>\n<symbol name=\"GND\">\n<wire x1=\"-1.905\" y1=\"0\" x2=\"1.905\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"GND\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R270\"/>\n</symbol>\n<symbol name=\"+3V3\">\n<wire x1=\"1.27\" y1=\"-1.905\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"-1.905\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"+3V3\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"+5V\" prefix=\"P+\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"+5V\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"GND\" prefix=\"GND\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"GND\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"+3V3\" prefix=\"+3V3\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"+3V3\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"rcl\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      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SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      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ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      50-2-X&lt;BR&gt;\n      50-4-X&lt;BR&gt;\n      50-3-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n    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25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD 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dx=\"1.9\" dy=\"3.4\" layer=\"1\"/>\n<text x=\"-1.905\" y=\"2.54\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.905\" y=\"-3.81\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.3876\" y1=\"-1.651\" x2=\"-1.4376\" y2=\"1.649\" layer=\"51\"/>\n<rectangle x1=\"1.4478\" y1=\"-1.651\" x2=\"2.3978\" y2=\"1.649\" layer=\"51\"/>\n<rectangle x1=\"-0.4001\" y1=\"-0.7\" x2=\"0.4001\" y2=\"0.7\" layer=\"35\"/>\n</package>\n<package name=\"C4564\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-2.973\" y1=\"3.483\" x2=\"2.973\" y2=\"3.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"2.973\" y1=\"-3.483\" x2=\"-2.973\" y2=\"-3.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-2.973\" y1=\"-3.483\" x2=\"-2.973\" y2=\"3.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.4986\" y1=\"3.2766\" x2=\"1.4732\" y2=\"3.2766\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.4732\" y1=\"-3.2766\" x2=\"1.4986\" y2=\"-3.2766\" width=\"0.1016\" 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drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-1.778\" y=\"1.397\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.778\" y=\"-2.667\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-025X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 2.5 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"2.159\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.27\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.016\" x2=\"2.413\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.016\" x2=\"-2.413\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.27\" x2=\"2.413\" y2=\"1.016\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.016\" x2=\"-2.159\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" 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name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"1.524\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-2.794\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-030X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 3 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.524\" x2=\"2.159\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.524\" x2=\"-2.159\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.27\" x2=\"2.413\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.27\" x2=\"-2.413\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.524\" x2=\"2.413\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.27\" x2=\"-2.159\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-1.524\" 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shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-040X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 4 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.905\" x2=\"2.159\" y2=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.905\" x2=\"-2.159\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.651\" x2=\"2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.651\" x2=\"-2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.905\" x2=\"2.413\" y2=\"1.651\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.651\" x2=\"-2.159\" y2=\"1.905\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-1.905\" x2=\"2.413\" y2=\"-1.651\" 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x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"3.81\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"3.175\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.032\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-024X044\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 2.4 x 4.4 mm</description>\n<wire x1=\"-2.159\" y1=\"-0.635\" x2=\"-2.159\" y2=\"0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-2.159\" y1=\"0.635\" x2=\"-1.651\" y2=\"1.143\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.159\" y1=\"-0.635\" x2=\"-1.651\" y2=\"-1.143\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"1.651\" y1=\"1.143\" x2=\"-1.651\" y2=\"1.143\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-0.635\" x2=\"2.159\" y2=\"0.635\" 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shape=\"octagon\"/>\n<text x=\"-2.159\" y=\"1.397\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.159\" y=\"-2.667\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"2.159\" y1=\"-0.381\" x2=\"2.54\" y2=\"0.381\" layer=\"51\"/>\n<rectangle x1=\"-2.54\" y1=\"-0.381\" x2=\"-2.159\" y2=\"0.381\" layer=\"51\"/>\n</package>\n<package name=\"C050-025X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 2.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" 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y=\"1.651\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.794\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-045X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 4.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"2.032\" x2=\"-3.683\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-2.032\" x2=\"3.683\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"3.683\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-2.286\" x2=\"3.683\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-2.032\" x2=\"-3.429\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"2.032\" x2=\"-3.429\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"2.667\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.81\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-030X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.27\" x2=\"-3.683\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.524\" x2=\"3.429\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.27\" x2=\"3.683\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.524\" x2=\"3.683\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.524\" x2=\"3.683\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.27\" x2=\"-3.429\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.27\" x2=\"-3.429\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-050X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" 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drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"4.064\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.921\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050H075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nHorizontal, grid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0.508\" x2=\"-3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.302\" y1=\"0.508\" x2=\"-1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.778\" y1=\"0.508\" x2=\"1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.778\" y1=\"0.508\" x2=\"3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"3.302\" y1=\"0.508\" x2=\"3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"0.508\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" 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x2=\"2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.302\" y=\"8.001\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"3.175\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-2.794\" y1=\"0.127\" x2=\"-2.286\" y2=\"0.508\" layer=\"51\"/>\n<rectangle x1=\"2.286\" y1=\"0.127\" x2=\"2.794\" y2=\"0.508\" layer=\"51\"/>\n</package>\n<package name=\"C075-032X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 3.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-1.524\" x2=\"4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.27\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-1.524\" x2=\"5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.27\" x2=\"-4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-0.508\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0.889\" x2=\"-0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"-0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0.889\" x2=\"0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.826\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-042X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 4.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-2.032\" x2=\"4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.778\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-2.032\" x2=\"5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.778\" x2=\"-4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.699\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-052X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 5.2 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.54\" x2=\"4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.286\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-2.54\" x2=\"5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.286\" x2=\"-4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-043X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 4.3 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.032\" x2=\"6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"1.524\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.032\" x2=\"6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"1.524\" x2=\"-6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-054X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 5.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.54\" x2=\"6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.032\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.54\" x2=\"6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.032\" x2=\"-6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.905\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-064X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 6.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.54\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102_152-062X184\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm + 15.2 mm, outline 6.2 x 18.4 mm</description>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" 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width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"7.112\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"3.048\" x2=\"11.176\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.684\" y1=\"2.54\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"10.033\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-5.969\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-054X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 5.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.032\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"2.54\" x2=\"8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"2.54\" x2=\"9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.032\" x2=\"-8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.382\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-064X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 6.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.54\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.048\" x2=\"8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.048\" x2=\"9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.54\" x2=\"-8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-072X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 7.2 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.048\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.556\" x2=\"8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.556\" x2=\"9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.048\" x2=\"-8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.937\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-084X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 8.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.556\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.064\" x2=\"8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.064\" x2=\"9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.556\" x2=\"-8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.445\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-091X182\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 9.1 x 18.2 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.937\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.445\" x2=\"8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.445\" x2=\"9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.937\" x2=\"-8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.826\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-062X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 6.2 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.048\" x2=\"12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"2.54\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.048\" x2=\"13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"2.54\" x2=\"-12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.7\" y=\"3.429\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-074X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 7.4 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.556\" x2=\"12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.048\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.556\" x2=\"13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.048\" x2=\"-12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"3.937\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-087X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 8.7 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"4.318\" x2=\"12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.81\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"4.318\" x2=\"13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.81\" x2=\"-12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"4.699\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-108X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 10.8 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.334\" x2=\"12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"4.826\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.334\" x2=\"13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"4.826\" x2=\"-12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.715\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-113X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 11.3 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.588\" x2=\"12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"5.08\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.588\" x2=\"13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"5.08\" x2=\"-12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-093X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 9.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"4.572\" x2=\"15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"4.064\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"4.572\" x2=\"15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"4.064\" x2=\"-15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"4.953\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-113X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 11.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"5.588\" x2=\"15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"5.08\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"5.588\" x2=\"15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"5.08\" x2=\"-15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-134X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 13.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"6.604\" x2=\"15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"6.096\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"6.604\" x2=\"15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"6.096\" x2=\"-15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"6.985\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-205X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 20.5 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"10.16\" x2=\"15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"9.652\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"10.16\" x2=\"15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"9.652\" x2=\"-15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-4.318\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-137X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 13.7 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"6.731\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.2372\" y=\"7.0612\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-162X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 16.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"8.001\" x2=\"18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"8.001\" x2=\"-18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-8.001\" x2=\"18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"8.001\" x2=\"-18.542\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"8.3312\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-182X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 18.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"9.017\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"9.3472\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-192X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 19.2 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"8.509\" x2=\"20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"8.001\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"8.509\" x2=\"20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"8.001\" x2=\"-20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-203X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 20.3 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"10.16\" x2=\"20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"9.652\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"10.16\" x2=\"20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"9.652\" x2=\"-20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.32\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-035X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.778\" x2=\"3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.524\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.778\" x2=\"3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.524\" x2=\"-3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-155X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 15.5 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"7.62\" x2=\"20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"7.112\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"7.62\" x2=\"20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"7.112\" x2=\"-20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-063X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 6.3 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-3.048\" x2=\"4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.794\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-3.048\" x2=\"5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-154X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 15.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"7.112\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-7.62\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-7.112\" x2=\"-15.748\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"7.62\" x2=\"15.748\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-7.62\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-7.112\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"7.112\" x2=\"-15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-173X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 17.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"8.509\" x2=\"15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"8.001\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"8.509\" x2=\"15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"8.001\" x2=\"-15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C0402K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0204 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1005</description>\n<wire x1=\"-0.425\" y1=\"0.2\" x2=\"0.425\" y2=\"0.2\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.425\" y1=\"-0.2\" x2=\"-0.425\" y2=\"-0.2\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<text x=\"-0.5\" y=\"0.425\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.5\" y=\"-1.45\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.5\" y1=\"-0.25\" x2=\"-0.225\" y2=\"0.25\" layer=\"51\"/>\n<rectangle x1=\"0.225\" y1=\"-0.25\" x2=\"0.5\" y2=\"0.25\" layer=\"51\"/>\n</package>\n<package name=\"C0603K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0603 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1608</description>\n<wire x1=\"-0.725\" y1=\"0.35\" x2=\"0.725\" y2=\"0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.725\" y1=\"-0.35\" x2=\"-0.725\" y2=\"-0.35\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<text x=\"-0.8\" y=\"0.65\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.8\" y=\"-1.65\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8\" y1=\"-0.4\" x2=\"-0.45\" y2=\"0.4\" layer=\"51\"/>\n<rectangle x1=\"0.45\" y1=\"-0.4\" x2=\"0.8\" y2=\"0.4\" layer=\"51\"/>\n</package>\n<package name=\"C0805K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0805 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 2012</description>\n<wire x1=\"-0.925\" y1=\"0.6\" x2=\"0.925\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.925\" y1=\"-0.6\" x2=\"-0.925\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1\" y=\"0.875\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-1.9\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1\" y1=\"-0.65\" x2=\"-0.5\" y2=\"0.65\" layer=\"51\"/>\n<rectangle x1=\"0.5\" y1=\"-0.65\" x2=\"1\" y2=\"0.65\" layer=\"51\"/>\n</package>\n<package name=\"C1206K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1206 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3216</description>\n<wire x1=\"-1.525\" y1=\"0.75\" x2=\"1.525\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-0.75\" x2=\"-1.525\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.1\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.1\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.1\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-0.8\" x2=\"1.6\" y2=\"0.8\" layer=\"51\"/>\n</package>\n<package name=\"C1210K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1210 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3225</description>\n<wire x1=\"-1.525\" y1=\"1.175\" x2=\"1.525\" y2=\"1.175\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-1.175\" x2=\"-1.525\" y2=\"-1.175\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-1.25\" x2=\"-1.1\" y2=\"1.25\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-1.25\" x2=\"1.6\" y2=\"1.25\" layer=\"51\"/>\n</package>\n<package name=\"C1812K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1812 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4532</description>\n<wire x1=\"-2.175\" y1=\"1.525\" x2=\"2.175\" y2=\"1.525\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.175\" y1=\"-1.525\" x2=\"-2.175\" y2=\"-1.525\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<text x=\"-2.25\" y=\"1.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.25\" y1=\"-1.6\" x2=\"-1.65\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"1.65\" y1=\"-1.6\" x2=\"2.25\" y2=\"1.6\" layer=\"51\"/>\n</package>\n<package name=\"C1825K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1825 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4564</description>\n<wire x1=\"-1.525\" y1=\"3.125\" x2=\"1.525\" y2=\"3.125\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-3.125\" x2=\"-1.525\" y2=\"-3.125\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"3.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-4.625\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-3.2\" x2=\"-1.1\" y2=\"3.2\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-3.2\" x2=\"1.6\" y2=\"3.2\" layer=\"51\"/>\n</package>\n<package name=\"C2220K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2220 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5650</description>\n<wire x1=\"-2.725\" y1=\"2.425\" x2=\"2.725\" y2=\"2.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-2.425\" x2=\"-2.725\" y2=\"-2.425\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"2.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-3.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-2.5\" x2=\"-2.2\" y2=\"2.5\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-2.5\" x2=\"2.8\" y2=\"2.5\" layer=\"51\"/>\n</package>\n<package name=\"C2225K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2225 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5664</description>\n<wire x1=\"-2.725\" y1=\"3.075\" x2=\"2.725\" y2=\"3.075\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-3.075\" x2=\"-2.725\" y2=\"-3.075\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"3.6\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-4.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-3.15\" x2=\"-2.2\" y2=\"3.15\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-3.15\" x2=\"2.8\" y2=\"3.15\" layer=\"51\"/>\n</package>\n<package name=\"HPC0201\">\n<description>&lt;b&gt; &lt;/b&gt;&lt;p&gt;\nSource: http://www.vishay.com/docs/10129/hpc0201a.pdf</description>\n<smd name=\"1\" x=\"-0.18\" y=\"0\" dx=\"0.2\" dy=\"0.35\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.18\" y=\"0\" dx=\"0.2\" dy=\"0.35\" layer=\"1\"/>\n<text x=\"-0.75\" y=\"0.74\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.785\" y=\"-1.865\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.305\" y1=\"-0.15\" x2=\"0.305\" y2=\"0.15\" layer=\"51\"/>\n</package>\n<package name=\"C0201\">\n<description>Source: http://www.avxcorp.com/docs/catalogs/cx5r.pdf</description>\n<smd name=\"1\" x=\"-0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.1\" x2=\"0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"-0.1\" layer=\"51\"/>\n</package>\n<package name=\"C1808\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-1.4732\" y1=\"0.9502\" x2=\"1.4732\" y2=\"0.9502\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.4478\" y1=\"-0.9502\" x2=\"1.4732\" y2=\"-0.9502\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<text x=\"-2.233\" y=\"1.827\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.233\" y=\"-2.842\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.275\" y1=\"-1.015\" x2=\"-1.225\" y2=\"1.015\" layer=\"51\"/>\n<rectangle x1=\"1.225\" y1=\"-1.015\" x2=\"2.275\" y2=\"1.015\" layer=\"51\"/>\n</package>\n<package name=\"C3640\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-3.8322\" y1=\"5.0496\" x2=\"3.8322\" y2=\"5.0496\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-3.8322\" y1=\"-5.0496\" x2=\"3.8322\" y2=\"-5.0496\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<text x=\"-4.647\" y=\"6.465\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-4.647\" y=\"-7.255\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-4.57\" y1=\"-5.1\" x2=\"-3.05\" y2=\"5.1\" layer=\"51\"/>\n<rectangle x1=\"3.05\" y1=\"-5.1\" x2=\"4.5688\" y2=\"5.1\" layer=\"51\"/>\n</package>\n<package name=\"C01005\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n<smd name=\"1\" x=\"-0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<text x=\"-0.4\" y=\"0.3\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.4\" y=\"-1.6\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.2\" y1=\"-0.1\" x2=\"-0.075\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"0.075\" y1=\"-0.1\" x2=\"0.2\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.05\" x2=\"0.15\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.1\" x2=\"0.15\" y2=\"-0.05\" layer=\"51\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"C-EU\">\n<wire x1=\"0\" y1=\"0\" x2=\"0\" y2=\"-0.508\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"0\" y2=\"-2.032\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"1.524\" y=\"0.381\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"1.524\" y=\"-4.699\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<rectangle x1=\"-2.032\" y1=\"-2.032\" x2=\"2.032\" y2=\"-1.524\" layer=\"94\"/>\n<rectangle x1=\"-2.032\" y1=\"-1.016\" x2=\"2.032\" y2=\"-0.508\" layer=\"94\"/>\n<pin name=\"1\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R270\"/>\n<pin name=\"2\" x=\"0\" y=\"-5.08\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"C-EU\" prefix=\"C\" uservalue=\"yes\">\n<description>&lt;B&gt;CAPACITOR&lt;/B&gt;, European symbol</description>\n<gates>\n<gate name=\"G$1\" symbol=\"C-EU\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"C0402\" package=\"C0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0504\" package=\"C0504\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0603\" package=\"C0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0805\" package=\"C0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1206\" package=\"C1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1210\" package=\"C1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1310\" package=\"C1310\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1608\" package=\"C1608\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812\" package=\"C1812\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825\" package=\"C1825\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2012\" package=\"C2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3216\" package=\"C3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3225\" package=\"C3225\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C4532\" package=\"C4532\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C4564\" package=\"C4564\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-024X044\" package=\"C025-024X044\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-025X050\" package=\"C025-025X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-030X050\" package=\"C025-030X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-040X050\" package=\"C025-040X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-050X050\" package=\"C025-050X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-060X050\" package=\"C025-060X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C025_050-024X070\" package=\"C025_050-024X070\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-025X075\" package=\"C025_050-025X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-035X075\" package=\"C025_050-035X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-045X075\" package=\"C025_050-045X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-055X075\" package=\"C025_050-055X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-024X044\" package=\"C050-024X044\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-025X075\" package=\"C050-025X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-045X075\" package=\"C050-045X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-030X075\" package=\"C050-030X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-050X075\" package=\"C050-050X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-055X075\" package=\"C050-055X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-075X075\" package=\"C050-075X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050H075X075\" package=\"C050H075X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-032X103\" package=\"C075-032X103\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-042X103\" package=\"C075-042X103\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-052X106\" package=\"C075-052X106\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" 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pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-054X183\" package=\"C150-054X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-064X183\" package=\"C150-064X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-072X183\" package=\"C150-072X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-084X183\" package=\"C150-084X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-091X182\" package=\"C150-091X182\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-062X268\" package=\"C225-062X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-074X268\" package=\"C225-074X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-087X268\" package=\"C225-087X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-108X268\" package=\"C225-108X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-113X268\" package=\"C225-113X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-093X316\" package=\"C275-093X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-113X316\" package=\"C275-113X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-134X316\" package=\"C275-134X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-205X316\" package=\"C275-205X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-137X374\" package=\"C325-137X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-162X374\" package=\"C325-162X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-182X374\" package=\"C325-182X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-192X418\" package=\"C375-192X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-203X418\" package=\"C375-203X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-035X075\" package=\"C050-035X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-155X418\" package=\"C375-155X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-063X106\" package=\"C075-063X106\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-154X316\" package=\"C275-154X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-173X316\" package=\"C275-173X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0402K\" package=\"C0402K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0603K\" package=\"C0603K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0805K\" package=\"C0805K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1206K\" package=\"C1206K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1210K\" package=\"C1210K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812K\" package=\"C1812K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825K\" package=\"C1825K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2220K\" package=\"C2220K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2225K\" package=\"C2225K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"HPC0201\" package=\"HPC0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0201\" package=\"C0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1808\" package=\"C1808\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3640\" package=\"C3640\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"C01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"resistor\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,203,138,231\" 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FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      43P&lt;BR&gt;\n      43W&lt;BR&gt;\n      43Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      40L&lt;BR&gt;\n      40P&lt;BR&gt;\n      40Y&lt;BR&gt;\n      70Y-T602&lt;BR&gt;\n      70L&lt;BR&gt;\n      70P&lt;BR&gt;\n      70Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      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ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&amp;nbsp;ALT&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      64X&amp;nbsp;ALT&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66P&lt;BR&gt;\n      66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n 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RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      25P&lt;BR&gt;\n      25S&lt;BR&gt;\n      25RX&lt;BR&gt;\n      82P&lt;BR&gt;\n      82M&lt;BR&gt;\n      82PA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      91E&lt;BR&gt;\n      91X&lt;BR&gt;\n      91T&lt;BR&gt;\n      91B&lt;BR&gt;\n      91A&lt;BR&gt;\n      91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   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FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      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layer=\"51\"/>\n<wire x1=\"0.245\" y1=\"-0.224\" x2=\"-0.245\" y2=\"-0.224\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.473\" y1=\"0.483\" x2=\"1.473\" y2=\"0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.483\" x2=\"1.473\" y2=\"-0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.483\" x2=\"-1.473\" y2=\"-0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.483\" x2=\"-1.473\" y2=\"0.483\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-0.65\" y=\"0\" dx=\"0.7\" dy=\"0.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.65\" y=\"0\" dx=\"0.7\" dy=\"0.9\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.554\" y1=\"-0.3048\" x2=\"-0.254\" y2=\"0.2951\" layer=\"51\"/>\n<rectangle x1=\"0.2588\" y1=\"-0.3048\" x2=\"0.5588\" y2=\"0.2951\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.4001\" x2=\"0.1999\" y2=\"0.4001\" layer=\"35\"/>\n</package>\n<package name=\"R0603\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;</description>\n<wire x1=\"-0.432\" y1=\"-0.356\" x2=\"0.432\" y2=\"-0.356\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.432\" y1=\"0.356\" x2=\"-0.432\" y2=\"0.356\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-0.85\" y=\"0\" dx=\"1\" dy=\"1.1\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.85\" y=\"0\" dx=\"1\" dy=\"1.1\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle 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ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-7.0358\" y1=\"-0.4064\" x2=\"-6.477\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"6.477\" y1=\"-0.4064\" x2=\"7.0358\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"P0817/22\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0817, grid 22.5 mm</description>\n<wire x1=\"-10.414\" y1=\"0\" x2=\"-11.43\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-8.509\" y1=\"-3.429\" x2=\"-8.509\" y2=\"3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.128\" y1=\"3.81\" x2=\"-7.239\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.985\" y1=\"3.556\" x2=\"-7.239\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.128\" y1=\"-3.81\" x2=\"-7.239\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.985\" y1=\"-3.556\" x2=\"-7.239\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.985\" y1=\"3.556\" x2=\"7.239\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.985\" 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x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.684\" y1=\"0.6\" x2=\"-0.684\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.684\" y1=\"-0.6\" x2=\"0.684\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207R\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.2125\" y1=\"1\" x2=\"-1.2125\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.2125\" y1=\"-1\" x2=\"1.2125\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.2225\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.2225\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207W\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.149\" y1=\"1\" x2=\"-1.149\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.149\" y1=\"-1\" x2=\"1.149\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"0922V\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0922, grid 7.5 mm</description>\n<wire x1=\"2.54\" y1=\"0\" x2=\"1.397\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-3.81\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-0.508\" y=\"1.6764\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.508\" y=\"-2.9972\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-6.858\" y=\"2.54\" size=\"1.016\" layer=\"21\" ratio=\"12\">0922</text>\n<rectangle x1=\"-3.81\" y1=\"-0.4064\" x2=\"1.3208\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"RDH/15\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype RDH, grid 15 mm</description>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-6.858\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"2.794\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"-3.048\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.794\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"-4.953\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"-2.667\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.858\" y1=\"0\" x2=\"7.62\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"2.667\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.477\" y2=\"-2.667\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<pad name=\"1\" x=\"-7.62\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.62\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.35\" y=\"3.4544\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.318\" y=\"-0.5842\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"4.572\" y=\"-1.7272\" size=\"1.27\" layer=\"51\" ratio=\"10\" rot=\"R90\">RDH</text>\n<rectangle x1=\"-6.7564\" y1=\"-0.4064\" x2=\"-6.4516\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"6.4516\" y1=\"-0.4064\" x2=\"6.7564\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"MINI_MELF-0102AX\">\n<description>&lt;b&gt;Mini MELF 0102 Axial&lt;/b&gt;</description>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"52\"/>\n<smd name=\"1\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"1\" roundness=\"100\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"16\" roundness=\"100\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<hole x=\"0\" y=\"0\" drill=\"1.3\"/>\n</package>\n<package name=\"R0201\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt; chip&lt;p&gt;\nSource: http://www.vishay.com/docs/20008/dcrcw.pdf</description>\n<smd name=\"1\" x=\"-0.255\" y=\"0\" dx=\"0.28\" dy=\"0.43\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.255\" y=\"0\" dx=\"0.28\" dy=\"0.43\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"0.15\" layer=\"21\"/>\n</package>\n<package name=\"VTA52\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR52&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-15.24\" y1=\"0\" x2=\"-13.97\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"12.6225\" y1=\"0.025\" x2=\"12.6225\" y2=\"4.725\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.6225\" y1=\"4.725\" x2=\"-12.6225\" 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layer=\"21\"/>\n</package>\n<package name=\"VTA53\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR53&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-12.065\" y1=\"0\" x2=\"-10.795\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"9.8975\" y1=\"0\" x2=\"9.8975\" y2=\"4.7\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.8975\" y1=\"4.7\" x2=\"-9.8975\" y2=\"4.7\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"4.7\" x2=\"-9.8975\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"0\" x2=\"-9.8975\" y2=\"-4.675\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"-4.675\" x2=\"9.8975\" y2=\"-4.675\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.8975\" y1=\"-4.675\" x2=\"9.8975\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"10.795\" y1=\"0\" x2=\"12.065\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/10\" package=\"0207/10\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/12\" package=\"0207/12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/15\" package=\"0207/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/2V\" package=\"0207/2V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/5V\" 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"0922/22\" package=\"0922/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0613/5V\" package=\"P0613V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0613/15\" package=\"P0613/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0817/22\" package=\"P0817/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0817/7V\" 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA55\" package=\"VTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA56\" package=\"VTA56\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTA55\" package=\"VMTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTB60\" package=\"VMTB60\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R4527\" 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y=\"-7.62\" length=\"middle\"/>\n<pin name=\"TMS\" x=\"-68.58\" y=\"-10.16\" length=\"middle\"/>\n<pin name=\"VREFB1\" x=\"-68.58\" y=\"-12.7\" length=\"middle\"/>\n<pin name=\"TCK\" x=\"-68.58\" y=\"-15.24\" length=\"middle\"/>\n<pin name=\"TDI\" x=\"-68.58\" y=\"-17.78\" length=\"middle\"/>\n<pin name=\"TDO\" x=\"-68.58\" y=\"-20.32\" length=\"middle\"/>\n<pin name=\"IO1B_21\" x=\"-68.58\" y=\"-22.86\" length=\"middle\"/>\n<pin name=\"IO1B_22\" x=\"-68.58\" y=\"-25.4\" length=\"middle\"/>\n<pin name=\"IO1B_24\" x=\"-68.58\" y=\"-27.94\" length=\"middle\"/>\n<pin name=\"IO1B_25\" x=\"-68.58\" y=\"-30.48\" length=\"middle\"/>\n<pin name=\"CLK0N\" x=\"-68.58\" y=\"-33.02\" length=\"middle\"/>\n<pin name=\"CLK0P\" x=\"-68.58\" y=\"-35.56\" length=\"middle\"/>\n<pin name=\"CLK1N\" x=\"-68.58\" y=\"-38.1\" length=\"middle\"/>\n<pin name=\"CLK1P\" x=\"-68.58\" y=\"-40.64\" length=\"middle\"/>\n<pin name=\"VREFB2\" x=\"-68.58\" y=\"-43.18\" length=\"middle\"/>\n<pin name=\"PLL_CLKOUTN\" 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rot=\"R90\"/>\n<pin name=\"IO3_52\" x=\"5.08\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_54\" x=\"7.62\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_55\" x=\"10.16\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_56\" x=\"12.7\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_57\" x=\"15.24\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_58\" x=\"17.78\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_59\" x=\"20.32\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_60\" x=\"22.86\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"VREFB4\" x=\"27.94\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_62\" x=\"30.48\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_64\" x=\"33.02\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_65\" x=\"35.56\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_66\" x=\"38.1\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_69\" x=\"40.64\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_70\" x=\"43.18\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO5_74\" x=\"71.12\" y=\"-53.34\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_75\" x=\"71.12\" y=\"-50.8\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_76\" x=\"71.12\" y=\"-48.26\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_77\" x=\"71.12\" y=\"-45.72\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_78\" x=\"71.12\" y=\"-43.18\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_79\" x=\"71.12\" y=\"-40.64\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VREFB5\" x=\"71.12\" y=\"-38.1\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_81\" x=\"71.12\" y=\"-35.56\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_84\" x=\"71.12\" y=\"-33.02\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_85\" x=\"71.12\" y=\"-30.48\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_86\" x=\"71.12\" y=\"-27.94\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_87\" x=\"71.12\" y=\"-25.4\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK2P\" x=\"71.12\" y=\"-20.32\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK2N\" x=\"71.12\" y=\"-17.78\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK3P\" x=\"71.12\" y=\"-15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK3N\" x=\"71.12\" y=\"-12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_92\" x=\"71.12\" y=\"-10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_93\" x=\"71.12\" y=\"-7.62\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_96\" x=\"71.12\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VREFB6\" x=\"71.12\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_98\" x=\"71.12\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_99\" x=\"71.12\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_100\" x=\"71.12\" y=\"5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_101\" x=\"71.12\" y=\"7.62\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_102\" x=\"71.12\" y=\"10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_105\" x=\"71.12\" y=\"12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_106\" x=\"71.12\" y=\"15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"GND_PAD\" x=\"-68.58\" y=\"20.32\" length=\"middle\"/>\n<pin name=\"IO7_110\" x=\"7.62\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_111\" x=\"5.08\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VREFB7\" x=\"2.54\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_113\" x=\"0\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_114\" x=\"-2.54\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_118\" x=\"-5.08\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_119\" x=\"-7.62\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_120\" x=\"-12.7\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_121\" x=\"-15.24\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_122\" x=\"-17.78\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VREFB8\" x=\"-20.32\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_124\" x=\"-22.86\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"CONFIG_SEL\" x=\"-25.4\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_127\" x=\"-27.94\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"NCONFIG\" x=\"-30.48\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_130\" x=\"-33.02\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_131\" x=\"-35.56\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_132\" x=\"-38.1\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_134\" x=\"-40.64\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_135\" x=\"-43.18\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"NSTATUS\" x=\"-45.72\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"CONF_DONE\" x=\"-48.26\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_140\" x=\"-50.8\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_141\" x=\"-53.34\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<text x=\"-17.78\" y=\"17.78\" size=\"1.27\" layer=\"95\">&gt;NAME</text>\n<text x=\"-17.78\" y=\"15.24\" size=\"1.27\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"REFGND\" x=\"-68.58\" y=\"17.78\" length=\"middle\"/>\n<pin name=\"ADC_VREF\" x=\"-43.18\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"ANAIN1\" x=\"-40.64\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"10M08SAE144\">\n<gates>\n<gate name=\"G$1\" symbol=\"10M08SAE144\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"EQFP144\">\n<connects>\n<connect gate=\"G$1\" pin=\"ADC_VREF\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"ANAIN1\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"CLK0N\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"CLK0P\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"CLK1N\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"CLK1P\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"CLK2N\" pad=\"89\"/>\n<connect gate=\"G$1\" pin=\"CLK2P\" pad=\"88\"/>\n<connect gate=\"G$1\" pin=\"CLK3N\" pad=\"91\"/>\n<connect gate=\"G$1\" pin=\"CLK3P\" pad=\"90\"/>\n<connect gate=\"G$1\" pin=\"CONFIG_SEL\" pad=\"126\"/>\n<connect gate=\"G$1\" pin=\"CONF_DONE\" pad=\"138\"/>\n<connect gate=\"G$1\" pin=\"GND1\" pad=\"95\"/>\n<connect gate=\"G$1\" pin=\"GND10\" pad=\"116\"/>\n<connect gate=\"G$1\" pin=\"GND11\" pad=\"104\"/>\n<connect gate=\"G$1\" pin=\"GND12\" pad=\"63\"/>\n<connect gate=\"G$1\" pin=\"GND2\" pad=\"83\"/>\n<connect gate=\"G$1\" pin=\"GND3\" pad=\"68\"/>\n<connect gate=\"G$1\" pin=\"GND4\" pad=\"53\"/>\n<connect gate=\"G$1\" pin=\"GND5\" pad=\"42\"/>\n<connect gate=\"G$1\" pin=\"GND6\" pad=\"142\"/>\n<connect gate=\"G$1\" pin=\"GND7\" pad=\"137\"/>\n<connect gate=\"G$1\" pin=\"GND8\" pad=\"133\"/>\n<connect gate=\"G$1\" pin=\"GND9\" pad=\"125\"/>\n<connect gate=\"G$1\" pin=\"GND_PAD\" pad=\"E\"/>\n<connect gate=\"G$1\" pin=\"IO1A_10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"IO1A_11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"IO1A_12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"IO1A_13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"IO1A_14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"IO1A_6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"IO1A_7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"IO1A_8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"IO1B_21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"IO1B_22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"IO1B_24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"IO1B_25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"IO3_38\" pad=\"38\"/>\n<connect gate=\"G$1\" pin=\"IO3_39\" pad=\"39\"/>\n<connect gate=\"G$1\" pin=\"IO3_41\" pad=\"41\"/>\n<connect gate=\"G$1\" pin=\"IO3_43\" pad=\"43\"/>\n<connect gate=\"G$1\" pin=\"IO3_44\" pad=\"44\"/>\n<connect gate=\"G$1\" pin=\"IO3_45\" pad=\"45\"/>\n<connect gate=\"G$1\" pin=\"IO3_46\" pad=\"46\"/>\n<connect gate=\"G$1\" pin=\"IO3_47\" pad=\"47\"/>\n<connect gate=\"G$1\" pin=\"IO3_50\" pad=\"50\"/>\n<connect gate=\"G$1\" pin=\"IO3_52\" pad=\"52\"/>\n<connect gate=\"G$1\" pin=\"IO3_54\" pad=\"54\"/>\n<connect gate=\"G$1\" pin=\"IO3_55\" pad=\"55\"/>\n<connect gate=\"G$1\" pin=\"IO3_56\" pad=\"56\"/>\n<connect gate=\"G$1\" pin=\"IO3_57\" pad=\"57\"/>\n<connect gate=\"G$1\" pin=\"IO3_58\" pad=\"58\"/>\n<connect gate=\"G$1\" pin=\"IO3_59\" pad=\"59\"/>\n<connect gate=\"G$1\" pin=\"IO3_60\" pad=\"60\"/>\n<connect gate=\"G$1\" pin=\"IO4_62\" pad=\"62\"/>\n<connect gate=\"G$1\" pin=\"IO4_64\" pad=\"64\"/>\n<connect gate=\"G$1\" pin=\"IO4_65\" pad=\"65\"/>\n<connect gate=\"G$1\" pin=\"IO4_66\" pad=\"66\"/>\n<connect gate=\"G$1\" pin=\"IO4_69\" pad=\"69\"/>\n<connect gate=\"G$1\" pin=\"IO4_70\" pad=\"70\"/>\n<connect gate=\"G$1\" pin=\"IO5_74\" pad=\"74\"/>\n<connect gate=\"G$1\" pin=\"IO5_75\" pad=\"75\"/>\n<connect gate=\"G$1\" pin=\"IO5_76\" pad=\"76\"/>\n<connect gate=\"G$1\" pin=\"IO5_77\" pad=\"77\"/>\n<connect gate=\"G$1\" pin=\"IO5_78\" pad=\"78\"/>\n<connect gate=\"G$1\" pin=\"IO5_79\" pad=\"79\"/>\n<connect gate=\"G$1\" pin=\"IO5_81\" pad=\"81\"/>\n<connect gate=\"G$1\" pin=\"IO5_84\" pad=\"84\"/>\n<connect gate=\"G$1\" pin=\"IO5_85\" pad=\"85\"/>\n<connect gate=\"G$1\" pin=\"IO5_86\" pad=\"86\"/>\n<connect gate=\"G$1\" pin=\"IO5_87\" pad=\"87\"/>\n<connect gate=\"G$1\" pin=\"IO6_100\" pad=\"100\"/>\n<connect gate=\"G$1\" pin=\"IO6_101\" pad=\"101\"/>\n<connect gate=\"G$1\" pin=\"IO6_102\" pad=\"102\"/>\n<connect gate=\"G$1\" pin=\"IO6_105\" pad=\"105\"/>\n<connect gate=\"G$1\" pin=\"IO6_106\" pad=\"106\"/>\n<connect gate=\"G$1\" pin=\"IO6_92\" pad=\"92\"/>\n<connect gate=\"G$1\" pin=\"IO6_93\" pad=\"93\"/>\n<connect gate=\"G$1\" pin=\"IO6_96\" pad=\"96\"/>\n<connect gate=\"G$1\" pin=\"IO6_98\" pad=\"98\"/>\n<connect gate=\"G$1\" pin=\"IO6_99\" pad=\"99\"/>\n<connect gate=\"G$1\" pin=\"IO7_110\" pad=\"110\"/>\n<connect gate=\"G$1\" pin=\"IO7_111\" pad=\"111\"/>\n<connect gate=\"G$1\" pin=\"IO7_113\" pad=\"113\"/>\n<connect gate=\"G$1\" pin=\"IO7_114\" pad=\"114\"/>\n<connect gate=\"G$1\" pin=\"IO7_118\" pad=\"118\"/>\n<connect gate=\"G$1\" pin=\"IO7_119\" pad=\"119\"/>\n<connect gate=\"G$1\" pin=\"IO8_120\" pad=\"120\"/>\n<connect gate=\"G$1\" pin=\"IO8_121\" pad=\"121\"/>\n<connect gate=\"G$1\" pin=\"IO8_122\" pad=\"122\"/>\n<connect gate=\"G$1\" pin=\"IO8_124\" pad=\"124\"/>\n<connect gate=\"G$1\" pin=\"IO8_127\" pad=\"127\"/>\n<connect gate=\"G$1\" pin=\"IO8_130\" pad=\"130\"/>\n<connect gate=\"G$1\" pin=\"IO8_131\" pad=\"131\"/>\n<connect gate=\"G$1\" pin=\"IO8_132\" pad=\"132\"/>\n<connect gate=\"G$1\" pin=\"IO8_134\" pad=\"134\"/>\n<connect gate=\"G$1\" pin=\"IO8_135\" pad=\"135\"/>\n<connect gate=\"G$1\" pin=\"IO8_140\" pad=\"140\"/>\n<connect gate=\"G$1\" pin=\"IO8_141\" pad=\"141\"/>\n<connect gate=\"G$1\" pin=\"JTAGEN\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"NCONFIG\" pad=\"129\"/>\n<connect gate=\"G$1\" pin=\"NSTATUS\" pad=\"136\"/>\n<connect gate=\"G$1\" pin=\"PLL_CLKOUTN\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"PLL_CLKOUTP\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"REFGND\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"TCK\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"TDI\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"TDO\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"TMS\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"VCCA1\" pad=\"35\"/>\n<connect gate=\"G$1\" pin=\"VCCA2\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"VCCA3\" pad=\"107\"/>\n<connect gate=\"G$1\" pin=\"VCCA4\" pad=\"143\"/>\n<connect gate=\"G$1\" pin=\"VCCA5\" pad=\"71\"/>\n<connect gate=\"G$1\" pin=\"VCCA6\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"VCCIO1A\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VCCIO1B\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"VCCIO2\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"VCCIO3\" pad=\"49\"/>\n<connect gate=\"G$1\" pin=\"VCCIO3@2\" pad=\"40\"/>\n<connect gate=\"G$1\" pin=\"VCCIO4\" pad=\"67\"/>\n<connect gate=\"G$1\" pin=\"VCCIO5\" pad=\"82\"/>\n<connect gate=\"G$1\" pin=\"VCCIO6\" pad=\"94\"/>\n<connect gate=\"G$1\" pin=\"VCCIO6@2\" pad=\"103\"/>\n<connect gate=\"G$1\" pin=\"VCCIO7\" pad=\"117\"/>\n<connect gate=\"G$1\" pin=\"VCCIO8\" pad=\"139\"/>\n<connect gate=\"G$1\" pin=\"VCCIO8@2\" pad=\"128\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE1\" pad=\"73\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE10\" pad=\"109\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE11\" pad=\"108\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE12\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE2\" pad=\"72\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE3\" pad=\"51\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE4\" pad=\"37\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE5\" pad=\"36\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE6\" pad=\"144\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE7\" pad=\"115\"/>\n<connect gate=\"G$1\" pin=\"VREFB1\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"VREFB2\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"VREFB3\" pad=\"48\"/>\n<connect gate=\"G$1\" pin=\"VREFB4\" pad=\"61\"/>\n<connect gate=\"G$1\" pin=\"VREFB5\" pad=\"80\"/>\n<connect gate=\"G$1\" pin=\"VREFB6\" pad=\"97\"/>\n<connect gate=\"G$1\" pin=\"VREFB7\" pad=\"112\"/>\n<connect gate=\"G$1\" pin=\"VREFB8\" pad=\"123\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"crystal\">\n<description>&lt;b&gt;Crystals and Crystal Resonators&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"ASE\">\n<description>&lt;b&gt;3.3Vdc CMOS SMD CRYSTAL CLOCK OSCILLATOR&lt;/b&gt; ASE Series&lt;p&gt;\nSource: www.abracon.com</description>\n<wire x1=\"-1.3\" y1=\"1.15\" x2=\"1.3\" y2=\"1.15\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"0.95\" x2=\"1.5\" y2=\"-0.95\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.3\" y1=\"-1.15\" x2=\"-1.3\" y2=\"-1.15\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-0.95\" x2=\"-1.5\" y2=\"0.95\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.3\" y1=\"1.15\" x2=\"-1.5\" y2=\"0.95\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"1.5\" y1=\"0.95\" x2=\"1.3\" y2=\"1.15\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"-1.5\" y1=\"-0.95\" x2=\"-1.3\" y2=\"-1.15\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"1.3\" y1=\"-1.15\" x2=\"1.5\" y2=\"-0.95\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<circle x=\"-1\" y=\"-0.7\" radius=\"0.1802\" width=\"0\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.05\" y=\"-0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.05\" y=\"-0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.05\" y=\"0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-1.05\" y=\"0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-2.25\" y=\"1.5\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.75\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"ASE\">\n<wire x1=\"-7.62\" y1=\"7.62\" x2=\"-7.62\" y2=\"-7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-7.62\" x2=\"-7.62\" y2=\"-7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-7.62\" x2=\"7.62\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-5.08\" x2=\"7.62\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"0\" x2=\"7.62\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-7.62\" y1=\"7.62\" x2=\"7.62\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"5.08\" x2=\"6.35\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"6.35\" y1=\"0\" x2=\"2.54\" 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y=\"-0.762\" size=\"1.524\" layer=\"95\">OUT</text>\n<text x=\"2.54\" y=\"-7.112\" size=\"1.524\" layer=\"95\">TRI</text>\n<pin name=\"GND\" x=\"-12.7\" y=\"-5.08\" visible=\"pad\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"VDD\" x=\"-12.7\" y=\"5.08\" visible=\"pad\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"OUT\" x=\"12.7\" y=\"0\" visible=\"pad\" length=\"middle\" direction=\"out\" rot=\"R180\"/>\n<pin name=\"TRI\" x=\"12.7\" y=\"-5.08\" visible=\"pad\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"ASE\">\n<description>&lt;b&gt;3.3Vdc CMOS SMD CRYSTAL CLOCK OSCILLATOR&lt;/b&gt;&lt;p&gt;\nSOurce: www.abracon.com</description>\n<gates>\n<gate name=\"G$1\" symbol=\"ASE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ASE\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"OUT\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"TRI\" pad=\"1\"/>\n<connect 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y1=\"0\" x2=\"-1.5\" y2=\"0.9546\" width=\"0.1524\" layer=\"51\" curve=\"-32.472615\"/>\n<wire x1=\"-0.635\" y1=\"0\" x2=\"0\" y2=\"0.635\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"-1.016\" y1=\"0\" x2=\"0\" y2=\"1.016\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"0\" y1=\"-0.635\" x2=\"0.635\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"90\"/>\n<wire x1=\"0.0539\" y1=\"-1.0699\" x2=\"1.0699\" y2=\"-0.0539\" width=\"0.1524\" layer=\"51\" curve=\"90\"/>\n<circle x=\"0\" y=\"0\" radius=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"0\" y=\"0\" radius=\"2.413\" width=\"0.254\" layer=\"21\"/>\n<pad name=\"K\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"long\" rot=\"R90\"/>\n<pad name=\"A\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"long\" rot=\"R90\"/>\n<text x=\"-1.27\" y=\"3.048\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-4.318\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package 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width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.889\" y1=\"1.778\" x2=\"0.889\" y2=\"0.762\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.889\" y1=\"0.762\" x2=\"0.889\" y2=\"-0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.889\" y1=\"-0.635\" x2=\"0.889\" y2=\"-1.778\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.889\" y1=\"-1.778\" x2=\"0.889\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.889\" y1=\"-2.286\" x2=\"-0.889\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.889\" y1=\"2.286\" x2=\"-0.889\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.889\" y1=\"1.778\" x2=\"-0.889\" y2=\"0.762\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-0.889\" y1=\"0.762\" x2=\"-0.889\" y2=\"-0.762\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.889\" y1=\"-0.762\" x2=\"-0.889\" y2=\"-1.778\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-0.889\" y1=\"-1.778\" x2=\"-0.889\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.889\" y1=\"2.286\" x2=\"0.889\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.889\" y1=\"-0.762\" x2=\"-0.889\" y2=\"0.762\" width=\"0.1524\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-1.397\" y1=\"0.254\" x2=\"-1.397\" y2=\"-0.254\" width=\"0.0508\" layer=\"21\"/>\n<wire x1=\"-1.143\" y1=\"0.508\" x2=\"-1.143\" y2=\"-0.508\" width=\"0.0508\" layer=\"21\"/>\n<pad name=\"K\" x=\"0\" y=\"1.27\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"A\" x=\"0\" y=\"-1.27\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"1.27\" y=\"0.381\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"1.27\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"P-LCC-2\">\n<description>&lt;b&gt;TOPLED® High-optical Power LED (HOP)&lt;/b&gt;&lt;p&gt;\nSource: http://www.osram.convergy.de/ ... ls_t675.pdf</description>\n<wire x1=\"-1.4\" y1=\"-1.05\" x2=\"-1.4\" y2=\"-1.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.4\" y1=\"-1.6\" x2=\"-1.1\" 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width=\"0.0634\" layer=\"21\"/>\n<circle x=\"-0.275\" y=\"0.4\" radius=\"0.125\" width=\"0\" layer=\"21\"/>\n<smd name=\"C\" x=\"-1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"A\" x=\"1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<text x=\"-1.5\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.5\" y=\"-2\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"SML1206\">\n<description>&lt;b&gt;SML10XXKH-TR (HIGH INTENSITY) LED&lt;/b&gt;&lt;p&gt;\n&lt;table&gt;\n&lt;tr&gt;&lt;td&gt;SML10R3KH-TR&lt;/td&gt;&lt;td&gt;ULTRA RED&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10E3KH-TR&lt;/td&gt;&lt;td&gt;SUPER REDSUPER BLUE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10O3KH-TR&lt;/td&gt;&lt;td&gt;SUPER ORANGE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10PY3KH-TR&lt;/td&gt;&lt;td&gt;PURE YELLOW&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10OY3KH-TR&lt;/td&gt;&lt;td&gt;ULTRA YELLOW&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10AG3KH-TR&lt;/td&gt;&lt;td&gt;AQUA GREEN&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10BG3KH-TR&lt;/td&gt;&lt;td&gt;BLUE GREEN&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10PB1KH-TR&lt;/td&gt;&lt;td&gt;SUPER BLUE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10CW1KH-TR&lt;/td&gt;&lt;td&gt;WHITE&lt;/td&gt;&lt;/tr&gt;\n&lt;/table&gt;\n\nSource: http://www.ledtronics.com/ds/smd-1206/dstr0094.PDF</description>\n<wire x1=\"-1.5\" y1=\"0.5\" x2=\"-1.5\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\" curve=\"-180\"/>\n<wire x1=\"1.5\" y1=\"-0.5\" x2=\"1.5\" y2=\"0.5\" width=\"0.2032\" layer=\"51\" curve=\"-180\"/>\n<wire x1=\"-1.55\" y1=\"0.75\" x2=\"1.55\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.55\" y1=\"-0.75\" x2=\"-1.55\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<circle x=\"-0.725\" y=\"0.525\" radius=\"0.125\" width=\"0\" layer=\"21\"/>\n<smd name=\"C\" x=\"-1.75\" y=\"0\" dx=\"1.5\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"A\" x=\"1.75\" y=\"0\" dx=\"1.5\" dy=\"1.5\" layer=\"1\"/>\n<text x=\"-1.5\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.5\" y=\"-2.5\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"0.4\" x2=\"-1.15\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.15\" y2=\"-0.4\" layer=\"51\"/>\n<rectangle x1=\"-1.175\" y1=\"-0.6\" x2=\"-1\" y2=\"-0.275\" layer=\"51\"/>\n<rectangle x1=\"1.15\" y1=\"-0.8\" x2=\"1.6\" y2=\"-0.4\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"1.15\" y1=\"0.4\" x2=\"1.6\" y2=\"0.8\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"1\" y1=\"0.275\" x2=\"1.175\" y2=\"0.6\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.1\" y1=\"-0.1\" x2=\"0.1\" y2=\"0.1\" layer=\"21\"/>\n</package>\n<package name=\"SML0603\">\n<description>&lt;b&gt;SML0603-XXX (HIGH INTENSITY) LED&lt;/b&gt;&lt;p&gt;\n&lt;table&gt;\n&lt;tr&gt;&lt;td&gt;AG3K&lt;/td&gt;&lt;td&gt;AQUA GREEN&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;B1K&lt;/td&gt;&lt;td&gt;SUPER BLUE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;R1K&lt;/td&gt;&lt;td&gt;SUPER RED&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;R3K&lt;/td&gt;&lt;td&gt;ULTRA RED&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;O3K&lt;/td&gt;&lt;td&gt;SUPER ORANGE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;O3KH&lt;/td&gt;&lt;td&gt;SOFT ORANGE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;Y3KH&lt;/td&gt;&lt;td&gt;SUPER YELLOW&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;Y3K&lt;/td&gt;&lt;td&gt;SUPER YELLOW&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;2CW&lt;/td&gt;&lt;td&gt;WHITE&lt;/td&gt;&lt;/tr&gt;\n&lt;/table&gt;\nSource: http://www.ledtronics.com/ds/smd-0603/Dstr0092.pdf</description>\n<wire x1=\"-0.75\" y1=\"0.35\" x2=\"0.75\" y2=\"0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.75\" y1=\"0.35\" x2=\"0.75\" y2=\"-0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.75\" y1=\"-0.35\" x2=\"-0.75\" y2=\"-0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.75\" y1=\"-0.35\" x2=\"-0.75\" y2=\"0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.45\" y1=\"0.3\" x2=\"-0.45\" y2=\"-0.3\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.45\" y1=\"0.3\" x2=\"0.45\" y2=\"-0.3\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.2\" y1=\"0.35\" x2=\"0.2\" y2=\"0.35\" width=\"0.1016\" layer=\"21\"/>\n<wire x1=\"-0.2\" y1=\"-0.35\" x2=\"0.2\" y2=\"-0.35\" width=\"0.1016\" layer=\"21\"/>\n<smd name=\"C\" x=\"-0.75\" y=\"0\" dx=\"0.8\" dy=\"0.8\" layer=\"1\"/>\n<smd name=\"A\" x=\"0.75\" y=\"0\" dx=\"0.8\" dy=\"0.8\" layer=\"1\"/>\n<text x=\"-1\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-2\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.4\" y1=\"0.175\" x2=\"0\" y2=\"0.4\" layer=\"51\"/>\n<rectangle x1=\"-0.25\" y1=\"0.175\" x2=\"0\" y2=\"0.4\" layer=\"21\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"LED\">\n<wire x1=\"1.27\" y1=\"0\" x2=\"0\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"-1.27\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-2.54\" x2=\"0\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"-1.27\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"0\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"0\" y2=\"-2.54\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-2.032\" y1=\"-0.762\" x2=\"-3.429\" y2=\"-2.159\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-1.905\" y1=\"-1.905\" x2=\"-3.302\" y2=\"-3.302\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"3.556\" y=\"-4.572\" size=\"1.778\" layer=\"95\" rot=\"R90\">&gt;NAME</text>\n<text x=\"5.715\" y=\"-4.572\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"C\" x=\"0\" y=\"-5.08\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R90\"/>\n<pin name=\"A\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R270\"/>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"-3.429\" y=\"-2.159\"/>\n<vertex x=\"-3.048\" y=\"-1.27\"/>\n<vertex x=\"-2.54\" y=\"-1.778\"/>\n</polygon>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"-3.302\" y=\"-3.302\"/>\n<vertex x=\"-2.921\" y=\"-2.413\"/>\n<vertex x=\"-2.413\" y=\"-2.921\"/>\n</polygon>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"LED\" prefix=\"LED\" uservalue=\"yes\">\n<description>&lt;b&gt;LED&lt;/b&gt;&lt;p&gt;\n&lt;u&gt;OSRAM&lt;/u&gt;:&lt;br&gt;\n\n- &lt;u&gt;CHIPLED&lt;/u&gt;&lt;br&gt;\nLG R971, LG N971, LY N971, LG Q971, LY Q971, LO R971, LY R971\nLH N974, LH R974&lt;br&gt;\nLS Q976, LO Q976, LY Q976&lt;br&gt;\nLO Q996&lt;br&gt;\n\n- &lt;u&gt;Hyper CHIPLED&lt;/u&gt;&lt;br&gt;\nLW Q18S&lt;br&gt;\nLB Q993, LB Q99A, LB R99A&lt;br&gt;\n\n- &lt;u&gt;SideLED&lt;/u&gt;&lt;br&gt;\nLS A670, LO A670, LY A670, LG A670, LP A670&lt;br&gt;\nLB A673, LV A673, LT A673, LW A673&lt;br&gt;\nLH A674&lt;br&gt;\nLY A675&lt;br&gt;\nLS A676, LA A676, LO A676, LY A676, LW A676&lt;br&gt;\nLS A679, LY A679, LG A679&lt;br&gt;\n\n-  &lt;u&gt;Hyper Micro SIDELED®&lt;/u&gt;&lt;br&gt;\nLS Y876, LA Y876, LO Y876, LY Y876&lt;br&gt;\nLT Y87S&lt;br&gt;\n\n- &lt;u&gt;SmartLED&lt;/u&gt;&lt;br&gt;\nLW L88C, LW L88S&lt;br&gt;\nLB L89C, LB L89S, LG L890&lt;br&gt;\nLS L89K, LO L89K, LY L89K&lt;br&gt;\nLS L896, LA L896, LO L896, LY L896&lt;br&gt;\n\n- &lt;u&gt;TOPLED&lt;/u&gt;&lt;br&gt;\nLS T670, LO T670, LY T670, LG T670, LP T670&lt;br&gt;\nLSG T670, LSP T670, LSY T670, LOP T670, LYG T670&lt;br&gt;\nLG T671, LOG T671, LSG T671&lt;br&gt;\nLB T673, LV T673, LT T673, LW T673&lt;br&gt;\nLH T674&lt;br&gt;\nLS T676, LA T676, LO T676, LY T676, LB T676, LH T676, LSB T676, LW T676&lt;br&gt;\nLB T67C, LV T67C, LT T67C, LS T67K, LO T67K, LY T67K, LW E67C&lt;br&gt;\nLS E67B, LA E67B, LO E67B, LY E67B, LB E67C, LV E67C, LT E67C&lt;br&gt;\nLW T67C&lt;br&gt;\nLS T679, LY T679, LG T679&lt;br&gt;\nLS T770, LO T770, LY T770, LG T770, LP T770&lt;br&gt;\nLB T773, LV T773, LT T773, LW T773&lt;br&gt;\nLH T774&lt;br&gt;\nLS E675, LA E675, LY E675, LS T675&lt;br&gt;\nLS T776, LA T776, LO T776, LY T776, LB T776&lt;br&gt;\nLHGB T686&lt;br&gt;\nLT T68C, LB T68C&lt;br&gt;\n\n- &lt;u&gt;Hyper Mini TOPLED®&lt;/u&gt;&lt;br&gt;\nLB M676&lt;br&gt;\n\n- &lt;u&gt;Mini TOPLED Santana®&lt;/u&gt;&lt;br&gt;\nLG M470&lt;br&gt;\nLS M47K, LO M47K, LY M47K\n&lt;p&gt;\nSource: http://www.osram.convergy.de&lt;p&gt;\n\n&lt;u&gt;LUXEON:&lt;/u&gt;&lt;br&gt;\n- &lt;u&gt;LUMILED®&lt;/u&gt;&lt;br&gt;\nLXK2-PW12-R00, LXK2-PW12-S00, LXK2-PW14-U00, LXK2-PW14-V00&lt;br&gt;\nLXK2-PM12-R00, LXK2-PM12-S00, LXK2-PM14-U00&lt;br&gt;\nLXK2-PE12-Q00, LXK2-PE12-R00, LXK2-PE12-S00, LXK2-PE14-T00, LXK2-PE14-U00&lt;br&gt;\nLXK2-PB12-K00, LXK2-PB12-L00, LXK2-PB12-M00, LXK2-PB14-N00, LXK2-PB14-P00, LXK2-PB14-Q00&lt;br&gt;\nLXK2-PR12-L00, LXK2-PR12-M00, LXK2-PR14-Q00, LXK2-PR14-R00&lt;br&gt;\nLXK2-PD12-Q00, LXK2-PD12-R00, LXK2-PD12-S00&lt;br&gt;\nLXK2-PH12-R00, LXK2-PH12-S00&lt;br&gt;\nLXK2-PL12-P00, LXK2-PL12-Q00, LXK2-PL12-R00\n&lt;p&gt;\nSource: www.luxeon.com&lt;p&gt;\n\n&lt;u&gt;KINGBRIGHT:&lt;/U&gt;&lt;p&gt;\nKA-3528ASYC&lt;br&gt;\nSource: www.kingbright.com</description>\n<gates>\n<gate name=\"G$1\" symbol=\"LED\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SMT1206\" package=\"1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LD260\" package=\"LD260\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SQR2X5\" package=\"LED2X5\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"3MM\" package=\"LED3MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"5MM\" package=\"LED5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LSU260\" package=\"LSU260\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LZR181\" package=\"LZR181\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B152\" package=\"Q62902-B152\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B153\" package=\"Q62902-B153\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B155\" package=\"Q62902-B155\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B156\" package=\"Q62902-B156\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SFH480\" package=\"SFH480\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SFH482\" package=\"SFH482\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SQR5.7X3.2\" package=\"U57X32\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"IRL80A\" package=\"IRL80A\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-2\" package=\"P-LCC-2\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MINI-TOP\" package=\"OSRAM-MINI-TOP-LED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SIDELED\" package=\"OSRAM-SIDELED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMART-LED\" package=\"SMART-LED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"B\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-2-BACK\" package=\"P-LCC-2-TOPLED-RG\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MICRO-SIDELED\" package=\"MICRO-SIDELED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-4\" package=\"P-LCC-4\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIP-LED0603\" package=\"CHIP-LED0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIP-LED0805\" package=\"CHIP-LED0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TOPLED-SANTANA\" package=\"MINI-TOPLED-SANTANA\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_0805\" package=\"CHIPLED_0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_1206\" package=\"CHIPLED_1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_0603\" package=\"CHIPLED_0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED-0603-TTW\" package=\"CHIPLED-0603-TTW\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A@1\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"\" package=\"SMARTLED-TTW\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A@1\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-LUMILED+\" package=\"LUMILED+\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"2+\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"4-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-LUMILED\" package=\"LUMILED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"2+\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"4-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"10MM\" package=\"LED10MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KA-3528ASYC\" package=\"KA-3528ASYC\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML0805\" package=\"SML0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML1206\" package=\"SML1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML0603\" package=\"SML0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-IC-2016\">\n<packages>\n<package name=\"SOT-223\">\n<description>&lt;b&gt;SMALL OUTLINE TRANSISTOR&lt;/b&gt;</description>\n<wire x1=\"3.277\" y1=\"1.778\" x2=\"3.277\" y2=\"-1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.277\" y1=\"-1.778\" x2=\"-3.277\" y2=\"-1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.277\" y1=\"-1.778\" x2=\"-3.277\" y2=\"1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.277\" y1=\"1.778\" x2=\"3.277\" y2=\"1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.473\" y1=\"4.483\" x2=\"3.473\" y2=\"4.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"3.473\" y1=\"-4.483\" x2=\"-3.473\" y2=\"-4.483\" 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symbol=\"BNC\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"MOLEX-BNC-73100-0105\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND1 GND2\"/>\n<connect gate=\"G$1\" pin=\"SIGNAL\" pad=\"SIGNAL\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"DIGIKEY\" value=\"WM5524-ND\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"HaasMaxADC\">\n<packages>\n<package name=\"TQFP-48\">\n<description>48 TQFN-EP Package  IPC7351</description>\n<wire x1=\"-4.2\" y1=\"4.2\" x2=\"-4.2\" y2=\"-4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"-4.2\" y1=\"-4.2\" x2=\"4.2\" y2=\"-4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"4.2\" y1=\"-4.2\" x2=\"4.2\" y2=\"4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"4.2\" y1=\"4.2\" x2=\"-4.2\" y2=\"4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"-2.75\" y1=\"2.75\" x2=\"-2.75\" y2=\"-2.75\" width=\"0.254\" layer=\"21\"/>\n<wire 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name=\"EP_GND\" x=\"0\" y=\"0\" dx=\"5.588\" dy=\"5.588\" layer=\"1\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"PINOUT\">\n<description>PINOUT for the Max19506</description>\n<wire x1=\"-15.24\" y1=\"34.29\" x2=\"15.24\" y2=\"34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"15.24\" y1=\"34.29\" x2=\"15.24\" y2=\"-34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"15.24\" y1=\"-34.29\" x2=\"-15.24\" y2=\"-34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-15.24\" y1=\"-34.29\" x2=\"-15.24\" y2=\"34.29\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-15.24\" y=\"35.56\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-15.24\" y=\"-38.1\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"AVDD1\" x=\"-20.32\" y=\"-15.24\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"D0A\" x=\"-20.32\" y=\"33.02\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D1A\" x=\"-20.32\" y=\"30.48\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D2A\" x=\"-20.32\" y=\"27.94\" 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direction=\"pwr\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MAX19506\" prefix=\"IC\">\n<description>The MAX19506 dual-channel, analog-to-digital converter\n(ADC) provides 8-bit resolution and a maximum sample\nrate of 100Msps.</description>\n<gates>\n<gate name=\"M\" symbol=\"PINOUT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"TQFP-48\">\n<connects>\n<connect gate=\"M\" pin=\"AVDD1\" pad=\"1 48\"/>\n<connect gate=\"M\" pin=\"AVDD2\" pad=\"12 13\"/>\n<connect gate=\"M\" pin=\"CLK+\" pad=\"15\"/>\n<connect gate=\"M\" pin=\"CLK-\" pad=\"16\"/>\n<connect gate=\"M\" pin=\"CMA\" pad=\"2\"/>\n<connect gate=\"M\" pin=\"CMB\" pad=\"11\"/>\n<connect gate=\"M\" pin=\"CS/OUTSEL\" pad=\"47\"/>\n<connect gate=\"M\" pin=\"D0A\" pad=\"34\"/>\n<connect gate=\"M\" pin=\"D0B\" pad=\"23\"/>\n<connect gate=\"M\" pin=\"D1A\" pad=\"35\"/>\n<connect gate=\"M\" pin=\"D1B\" pad=\"24\"/>\n<connect gate=\"M\" pin=\"D2A\" pad=\"37\"/>\n<connect gate=\"M\" pin=\"D2B\" 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x1=\"2.1336\" y1=\"2.6416\" x2=\"-2.1336\" y2=\"2.6416\" width=\"0.1524\" layer=\"21\"/>\n<text x=\"-3.2512\" y=\"2.286\" size=\"1.27\" layer=\"21\" ratio=\"6\" rot=\"SR0\">*</text>\n<text x=\"-3.2766\" y=\"-0.635\" size=\"1.27\" layer=\"25\" ratio=\"6\" rot=\"SR0\">&gt;Name</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"LMH6724MA\">\n<pin name=\"OUTA\" x=\"2.54\" y=\"0\" length=\"middle\" direction=\"out\"/>\n<pin name=\"-INA\" x=\"2.54\" y=\"-2.54\" length=\"middle\" direction=\"in\"/>\n<pin name=\"+INA\" x=\"2.54\" y=\"-5.08\" length=\"middle\" direction=\"in\"/>\n<pin name=\"V-\" x=\"2.54\" y=\"-7.62\" length=\"middle\" direction=\"pas\"/>\n<pin name=\"+INB\" x=\"58.42\" y=\"-7.62\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n<pin name=\"-INB\" x=\"58.42\" y=\"-5.08\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n<pin name=\"OUTB\" x=\"58.42\" y=\"-2.54\" length=\"middle\" direction=\"out\" rot=\"R180\"/>\n<pin name=\"V+\" x=\"58.42\" y=\"0\" length=\"middle\" direction=\"pas\" rot=\"R180\"/>\n<wire x1=\"7.62\" y1=\"5.08\" x2=\"7.62\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-12.7\" x2=\"53.34\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"53.34\" y1=\"-12.7\" x2=\"53.34\" y2=\"5.08\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"53.34\" y1=\"5.08\" x2=\"7.62\" y2=\"5.08\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"25.7556\" y=\"9.1186\" size=\"2.0828\" layer=\"95\" ratio=\"6\" rot=\"SR0\">&gt;Name</text>\n<text x=\"25.1206\" y=\"6.5786\" size=\"2.0828\" layer=\"96\" ratio=\"6\" rot=\"SR0\">&gt;Value</text>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"LMH6724MAX\" prefix=\"U\">\n<gates>\n<gate name=\"A\" symbol=\"LMH6724MA\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"M08A\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"M08A-M\" package=\"M08A-M\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"M08A-L\" package=\"M08A-L\">\n<connects>\n<connect gate=\"A\" pin=\"+INA\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"+INB\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"-INA\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"-INB\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"V+\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"V-\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"LMH6724MAX\" constant=\"no\"/>\n<attribute name=\"VENDOR\" value=\"Texas Instruments\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"74xx-little-us\">\n<description>&lt;b&gt;Single and Dual Gates Family, US symbols&lt;/b&gt;&lt;p&gt;\nLittle logic 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x1=\"1\" y1=\"0.55\" x2=\"-1\" y2=\"0.55\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.55\" x2=\"-1\" y2=\"-0.55\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1\" y1=\"-0.55\" x2=\"1\" y2=\"-0.55\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.55\" x2=\"1\" y2=\"0.55\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"1\" x=\"-0.65\" y=\"-0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"0\" y=\"-0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"3\" x=\"0.65\" y=\"-0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"4\" x=\"0.65\" y=\"0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"6\" x=\"-0.65\" y=\"0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<smd name=\"5\" x=\"0\" y=\"0.85\" dx=\"0.4\" dy=\"0.7\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.125\" y1=\"-1.05\" x2=\"0.125\" y2=\"-0.6\" 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x2=\"-0.8\" y2=\"0.6\" width=\"0.1016\" layer=\"21\"/>\n<smd name=\"1\" x=\"-0.5\" y=\"-0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" stop=\"no\"/>\n<smd name=\"2\" x=\"0\" y=\"-0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" stop=\"no\"/>\n<smd name=\"3\" x=\"0.5\" y=\"-0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" stop=\"no\"/>\n<smd name=\"4\" x=\"0.5\" y=\"0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" rot=\"R180\" stop=\"no\"/>\n<smd name=\"5\" x=\"0\" y=\"0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" rot=\"R180\" stop=\"no\"/>\n<smd name=\"6\" x=\"-0.5\" y=\"0.675\" dx=\"0.35\" dy=\"0.55\" layer=\"1\" rot=\"R180\" stop=\"no\"/>\n<text x=\"-1\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-2.5\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.775\" y1=\"-0.575\" x2=\"0\" y2=\"0\" layer=\"51\"/>\n<rectangle x1=\"-0.625\" y1=\"-0.85\" x2=\"-0.375\" y2=\"-0.45\" layer=\"51\"/>\n<rectangle x1=\"-0.7\" y1=\"-0.975\" x2=\"-0.3\" y2=\"-0.375\" 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name=\"YEP_R-XBGA-N6\">\n<description>&lt;b&gt;YEP (R-XBGA-N6)&lt;/b&gt; DIE-SIZE BALL GRID ARRAY&lt;p&gt;\nNanoStar TM - WCSP (DSBG A)0.23-mm Large Bump - YEP&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157</description>\n<wire x1=\"-0.675\" y1=\"0.425\" x2=\"0.675\" y2=\"0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.675\" y1=\"0.425\" x2=\"0.675\" y2=\"-0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.675\" y1=\"-0.425\" x2=\"-0.675\" y2=\"-0.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.675\" y1=\"-0.425\" x2=\"-0.675\" y2=\"0.425\" width=\"0.1016\" layer=\"51\"/>\n<circle x=\"-0.5\" y=\"-0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0\" y=\"-0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0.5\" y=\"-0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0.5\" y=\"0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"0\" y=\"0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<circle x=\"-0.5\" y=\"0.25\" radius=\"0.175\" width=\"0\" layer=\"29\"/>\n<smd name=\"A1\" x=\"-0.5\" y=\"-0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"B1\" x=\"0\" y=\"-0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"C1\" x=\"0.5\" y=\"-0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"C2\" x=\"0.5\" y=\"0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"B2\" x=\"0\" y=\"0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<smd name=\"A2\" x=\"-0.5\" y=\"0.25\" dx=\"0.3\" dy=\"0.3\" layer=\"1\" roundness=\"100\" stop=\"no\" cream=\"no\"/>\n<text x=\"-0.725\" y=\"0.725\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.725\" y=\"-2.175\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.675\" y1=\"-0.4\" x2=\"-0.225\" y2=\"-0.175\" layer=\"51\"/>\n<rectangle x1=\"-0.3\" y1=\"-0.375\" x2=\"-0.225\" y2=\"-0.175\" layer=\"21\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"743157\">\n<wire x1=\"-5.08\" y1=\"-5.08\" x2=\"7.62\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-5.08\" x2=\"7.62\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"7.62\" x2=\"-5.08\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"7.62\" x2=\"-5.08\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-5.08\" y=\"8.255\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-10.16\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"!A!/B\" x=\"-7.62\" y=\"-2.54\" length=\"short\" direction=\"in\"/>\n<pin name=\"A\" x=\"-7.62\" y=\"5.08\" length=\"short\"/>\n<pin name=\"B\" x=\"-7.62\" y=\"2.54\" length=\"short\"/>\n<pin name=\"X\" x=\"10.16\" y=\"2.54\" length=\"short\" rot=\"R180\"/>\n</symbol>\n<symbol name=\"PWRN-1\">\n<text x=\"-0.635\" y=\"-0.635\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"1.905\" y=\"-6.35\" size=\"1.27\" layer=\"95\" rot=\"R90\">GND</text>\n<text x=\"1.905\" y=\"2.54\" size=\"1.27\" layer=\"95\" rot=\"R90\">VCC</text>\n<pin name=\"GND\" x=\"0\" y=\"-7.62\" visible=\"pad\" length=\"middle\" direction=\"pwr\" rot=\"R90\"/>\n<pin name=\"VCC\" x=\"0\" y=\"7.62\" visible=\"pad\" length=\"middle\" direction=\"pwr\" rot=\"R270\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"74*1G3157\" prefix=\"IC\">\n<description>&lt;b&gt;Single-Pole, Double-Throw Analog Switch&lt;/b&gt;&lt;p&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157.pdf</description>\n<gates>\n<gate name=\"G$1\" symbol=\"743157\" x=\"0\" y=\"0\"/>\n<gate name=\"P\" symbol=\"PWRN-1\" x=\"17.78\" y=\"0\" addlevel=\"request\"/>\n</gates>\n<devices>\n<device name=\"ZYPR\" package=\"YZP_R-XBGA-N6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"A2\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"C1\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"A1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"C2\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"B1\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"B2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DBVR\" package=\"DBV_R-PDSO-G6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"4\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DCKR\" package=\"DCK_R-PDSO-G6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"4\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DRLR\" package=\"DRL_R-PDSO-N6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"4\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"YEPR\" package=\"YEP_R-XBGA-N6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"A2\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"C1\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"A1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"C2\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"B1\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"B2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"microchip\">\n<description>&lt;b&gt;Microchip PIC Microcontrollers and other Devices&lt;/b&gt;&lt;p&gt;\nBased on the following sources :\n&lt;ul&gt;\n&lt;li&gt;Microchip Data Book, 1993\n&lt;li&gt;THE EMERGING WORLD STANDARD, 1995/1996\n&lt;li&gt;Microchip, Technical Library CD-ROM, June 1998\n&lt;li&gt;www.microchip.com\n&lt;/ul&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"DIL28-3\">\n<description>&lt;B&gt;Dual In Line&lt;/B&gt;&lt;p&gt;\npackage type P</description>\n<wire x1=\"-17.78\" y1=\"-1.27\" x2=\"-17.78\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-17.78\" y1=\"1.27\" x2=\"-17.78\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"17.78\" y1=\"-2.54\" x2=\"17.78\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-17.78\" y1=\"2.54\" x2=\"-17.78\" y2=\"1.27\" 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y=\"24.13\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-10.16\" y=\"-25.4\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"SCL\" x=\"-12.7\" y=\"-2.54\" length=\"short\" direction=\"in\"/>\n<pin name=\"SDA\" x=\"-12.7\" y=\"-5.08\" length=\"short\"/>\n<pin name=\"A0\" x=\"-12.7\" y=\"-10.16\" length=\"short\" direction=\"in\"/>\n<pin name=\"A1\" x=\"-12.7\" y=\"-12.7\" length=\"short\" direction=\"in\"/>\n<pin name=\"A2\" x=\"-12.7\" y=\"-15.24\" length=\"short\" direction=\"in\"/>\n<pin name=\"!RESET\" x=\"-12.7\" y=\"15.24\" length=\"short\" direction=\"in\"/>\n<pin name=\"INTA\" x=\"-12.7\" y=\"10.16\" length=\"short\" direction=\"out\"/>\n<pin name=\"INTB\" x=\"-12.7\" y=\"7.62\" length=\"short\" direction=\"out\"/>\n<pin name=\"GPB0\" x=\"12.7\" y=\"-2.54\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB1\" x=\"12.7\" y=\"-5.08\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB2\" x=\"12.7\" y=\"-7.62\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB3\" x=\"12.7\" y=\"-10.16\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB4\" x=\"12.7\" y=\"-12.7\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB5\" x=\"12.7\" y=\"-15.24\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB6\" x=\"12.7\" y=\"-17.78\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB7\" x=\"12.7\" y=\"-20.32\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA0\" x=\"12.7\" y=\"20.32\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA1\" x=\"12.7\" y=\"17.78\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA2\" x=\"12.7\" y=\"15.24\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA3\" x=\"12.7\" y=\"12.7\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA4\" x=\"12.7\" y=\"10.16\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA5\" x=\"12.7\" y=\"7.62\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA6\" x=\"12.7\" y=\"5.08\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA7\" x=\"12.7\" y=\"2.54\" length=\"short\" rot=\"R180\"/>\n<pin name=\"VDD\" x=\"-12.7\" y=\"20.32\" length=\"short\" direction=\"pwr\"/>\n<pin name=\"VSS\" x=\"-12.7\" y=\"-20.32\" length=\"short\" direction=\"pwr\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MCP23017\" prefix=\"IC\">\n<description>&lt;b&gt;http://ww1.microchip.com/downloads/en/DeviceDoc/21952a.pdf&lt;/b&gt;&lt;p&gt;\nSource: http://ww1.microchip.com/downloads/en/DeviceDoc/21952a.pdf</description>\n<gates>\n<gate name=\"G$1\" symbol=\"MCP23017\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SP\" package=\"DIL28-3\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/SP\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"1332088\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2959\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SO\" package=\"SO28W\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" 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pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/SS\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"1467674\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2960\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"ML\" package=\"QFN28-ML_6X6MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/ML\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2957\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"rcl@1\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      3006Y&lt;BR&gt;\n      3009P&lt;BR&gt;\n      3009W&lt;BR&gt;\n      3009Y&lt;BR&gt;\n      3057J&lt;BR&gt;\n      3057L&lt;BR&gt;\n      3057P&lt;BR&gt;\n      3057Y&lt;BR&gt;\n      3059J&lt;BR&gt;\n      3059L&lt;BR&gt;\n      3059P&lt;BR&gt;\n      3059Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      89P&lt;BR&gt;\n      89W&lt;BR&gt;\n      89X&lt;BR&gt;\n      89PH&lt;BR&gt;\n      76P&lt;BR&gt;\n      89XH&lt;BR&gt;\n      78SLT&lt;BR&gt;\n      78L&amp;nbsp;ALT&lt;BR&gt;\n      56P&amp;nbsp;ALT&lt;BR&gt;\n      78P&amp;nbsp;ALT&lt;BR&gt;\n      T8S&lt;BR&gt;\n      78L&lt;BR&gt;\n      56P&lt;BR&gt;\n      78P&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      T18/784&lt;BR&gt;\n      783&lt;BR&gt;\n      781&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2199&lt;BR&gt;\n      1697/1897&lt;BR&gt;\n      1680/1880&lt;BR&gt;\n      2187&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      8035EKP/CT20/RJ-20P&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ-20X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      1211L&lt;BR&gt;\n      8012EKQ&amp;nbsp;ALT&lt;BR&gt;\n      8012EKR&amp;nbsp;ALT&lt;BR&gt;\n      1211P&lt;BR&gt;\n      8012EKJ&lt;BR&gt;\n      8012EKL&lt;BR&gt;\n      8012EKQ&lt;BR&gt;\n      8012EKR&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      2101P&lt;BR&gt;\n      2101W&lt;BR&gt;\n      2101Y&lt;BR&gt;\n      -&lt;BR&gt;\n      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&lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      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RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      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91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n 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&lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    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shape=\"octagon\"/>\n<text x=\"-2.159\" y=\"1.397\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.159\" y=\"-2.667\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"2.159\" y1=\"-0.381\" x2=\"2.54\" y2=\"0.381\" layer=\"51\"/>\n<rectangle x1=\"-2.54\" y1=\"-0.381\" x2=\"-2.159\" y2=\"0.381\" layer=\"51\"/>\n</package>\n<package name=\"C050-025X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 2.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" 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x1=\"0.4318\" y1=\"0\" x2=\"0.4318\" y2=\"-0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"3.429\" x2=\"-3.683\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-3.683\" x2=\"3.429\" y2=\"-3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-3.429\" x2=\"3.683\" y2=\"3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"3.683\" x2=\"-3.429\" y2=\"3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"3.683\" x2=\"3.683\" y2=\"3.429\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-3.683\" x2=\"3.683\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-3.429\" x2=\"-3.429\" y2=\"-3.683\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"3.429\" x2=\"-3.429\" y2=\"3.683\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"4.064\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.921\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050H075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nHorizontal, grid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0.508\" x2=\"-3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.302\" y1=\"0.508\" x2=\"-1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.778\" y1=\"0.508\" x2=\"1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.778\" y1=\"0.508\" x2=\"3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"3.302\" y1=\"0.508\" x2=\"3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"0.508\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"2.413\" x2=\"-0.3048\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-0.3048\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"2.413\" x2=\"0.3302\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"0.3302\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<wire x1=\"2.54\" y1=\"0\" x2=\"2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.302\" y=\"8.001\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"3.175\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-2.794\" y1=\"0.127\" x2=\"-2.286\" y2=\"0.508\" layer=\"51\"/>\n<rectangle x1=\"2.286\" y1=\"0.127\" x2=\"2.794\" y2=\"0.508\" layer=\"51\"/>\n</package>\n<package name=\"C075-032X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 3.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-1.524\" x2=\"4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.27\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-1.524\" x2=\"5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.27\" x2=\"-4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-0.508\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0.889\" x2=\"-0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"-0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0.889\" x2=\"0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.826\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-042X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 4.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-2.032\" x2=\"4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.778\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-2.032\" x2=\"5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.778\" x2=\"-4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.699\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-052X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 5.2 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.54\" x2=\"4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.286\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-2.54\" x2=\"5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.286\" x2=\"-4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-043X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 4.3 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.032\" x2=\"6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"1.524\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.032\" x2=\"6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"1.524\" x2=\"-6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-054X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 5.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.54\" x2=\"6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.032\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.54\" x2=\"6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.032\" x2=\"-6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.905\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-064X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 6.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.54\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102_152-062X184\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm + 15.2 mm, outline 6.2 x 18.4 mm</description>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"3.683\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"0\" x2=\"8.636\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.223\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"3.048\" x2=\"6.731\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.731\" y1=\"2.54\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.176\" y1=\"3.048\" x2=\"11.684\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"7.112\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"3.048\" x2=\"11.176\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.684\" y1=\"2.54\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"10.033\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-5.969\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-054X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 5.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.032\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"2.54\" x2=\"8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"2.54\" x2=\"9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.032\" x2=\"-8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.382\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-064X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 6.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.54\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.048\" x2=\"8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.048\" x2=\"9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.54\" x2=\"-8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-072X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 7.2 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.048\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.556\" x2=\"8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.556\" x2=\"9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.048\" x2=\"-8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.937\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-084X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 8.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.556\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.064\" x2=\"8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.064\" x2=\"9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.556\" x2=\"-8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.445\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-091X182\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 9.1 x 18.2 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.937\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.445\" x2=\"8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.445\" x2=\"9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.937\" x2=\"-8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.826\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-062X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 6.2 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.048\" x2=\"12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"2.54\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.048\" x2=\"13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"2.54\" x2=\"-12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.7\" y=\"3.429\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-074X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 7.4 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.556\" x2=\"12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.048\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.556\" x2=\"13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.048\" x2=\"-12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"3.937\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-087X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 8.7 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"4.318\" x2=\"12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.81\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"4.318\" x2=\"13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.81\" x2=\"-12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"4.699\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-108X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 10.8 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.334\" x2=\"12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"4.826\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.334\" x2=\"13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"4.826\" x2=\"-12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.715\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-113X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 11.3 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.588\" x2=\"12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"5.08\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.588\" x2=\"13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"5.08\" x2=\"-12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-093X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 9.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"4.572\" x2=\"15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"4.064\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"4.572\" x2=\"15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"4.064\" x2=\"-15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"4.953\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-113X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 11.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"5.588\" x2=\"15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"5.08\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"5.588\" x2=\"15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"5.08\" x2=\"-15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-134X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 13.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"6.604\" x2=\"15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"6.096\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"6.604\" x2=\"15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"6.096\" x2=\"-15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"6.985\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-205X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 20.5 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"10.16\" x2=\"15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"9.652\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"10.16\" x2=\"15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"9.652\" x2=\"-15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-4.318\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-137X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 13.7 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"6.731\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.2372\" y=\"7.0612\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-162X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 16.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" 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ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-182X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 18.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"9.017\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"9.3472\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-192X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 19.2 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"8.509\" x2=\"20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"8.001\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"8.509\" x2=\"20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"8.001\" x2=\"-20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-203X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 20.3 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"10.16\" x2=\"20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"9.652\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"10.16\" x2=\"20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"9.652\" x2=\"-20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.32\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-035X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.778\" x2=\"3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.524\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.778\" x2=\"3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.524\" x2=\"-3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-155X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 15.5 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"7.62\" x2=\"20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"7.112\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"7.62\" x2=\"20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"7.112\" x2=\"-20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-063X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 6.3 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-3.048\" x2=\"4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.794\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-3.048\" x2=\"5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-154X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 15.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"7.112\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" 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width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-173X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 17.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"8.509\" x2=\"15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"8.001\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" 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shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C0402K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0204 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1005</description>\n<wire x1=\"-0.425\" y1=\"0.2\" x2=\"0.425\" y2=\"0.2\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.425\" y1=\"-0.2\" x2=\"-0.425\" y2=\"-0.2\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<text x=\"-0.5\" y=\"0.425\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.5\" y=\"-1.45\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.5\" y1=\"-0.25\" x2=\"-0.225\" y2=\"0.25\" layer=\"51\"/>\n<rectangle x1=\"0.225\" y1=\"-0.25\" x2=\"0.5\" y2=\"0.25\" layer=\"51\"/>\n</package>\n<package name=\"C0603K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0603 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1608</description>\n<wire x1=\"-0.725\" y1=\"0.35\" x2=\"0.725\" y2=\"0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.725\" y1=\"-0.35\" x2=\"-0.725\" y2=\"-0.35\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<text x=\"-0.8\" y=\"0.65\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.8\" y=\"-1.65\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8\" y1=\"-0.4\" x2=\"-0.45\" y2=\"0.4\" layer=\"51\"/>\n<rectangle x1=\"0.45\" y1=\"-0.4\" x2=\"0.8\" y2=\"0.4\" layer=\"51\"/>\n</package>\n<package name=\"C0805K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0805 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 2012</description>\n<wire x1=\"-0.925\" y1=\"0.6\" x2=\"0.925\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.925\" y1=\"-0.6\" x2=\"-0.925\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1\" y=\"0.875\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-1.9\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1\" y1=\"-0.65\" x2=\"-0.5\" y2=\"0.65\" layer=\"51\"/>\n<rectangle x1=\"0.5\" y1=\"-0.65\" x2=\"1\" y2=\"0.65\" layer=\"51\"/>\n</package>\n<package name=\"C1206K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1206 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3216</description>\n<wire x1=\"-1.525\" y1=\"0.75\" x2=\"1.525\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-0.75\" x2=\"-1.525\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.1\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.1\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.1\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-0.8\" x2=\"1.6\" y2=\"0.8\" layer=\"51\"/>\n</package>\n<package name=\"C1210K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1210 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3225</description>\n<wire x1=\"-1.525\" y1=\"1.175\" x2=\"1.525\" y2=\"1.175\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-1.175\" x2=\"-1.525\" y2=\"-1.175\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-1.25\" x2=\"-1.1\" y2=\"1.25\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-1.25\" x2=\"1.6\" y2=\"1.25\" layer=\"51\"/>\n</package>\n<package name=\"C1812K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1812 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4532</description>\n<wire x1=\"-2.175\" y1=\"1.525\" x2=\"2.175\" y2=\"1.525\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.175\" y1=\"-1.525\" x2=\"-2.175\" y2=\"-1.525\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<text x=\"-2.25\" y=\"1.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.25\" y1=\"-1.6\" x2=\"-1.65\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"1.65\" y1=\"-1.6\" x2=\"2.25\" y2=\"1.6\" layer=\"51\"/>\n</package>\n<package name=\"C1825K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1825 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4564</description>\n<wire x1=\"-1.525\" y1=\"3.125\" x2=\"1.525\" y2=\"3.125\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-3.125\" x2=\"-1.525\" y2=\"-3.125\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"3.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-4.625\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-3.2\" x2=\"-1.1\" y2=\"3.2\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-3.2\" x2=\"1.6\" y2=\"3.2\" layer=\"51\"/>\n</package>\n<package name=\"C2220K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2220 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5650</description>\n<wire x1=\"-2.725\" y1=\"2.425\" x2=\"2.725\" y2=\"2.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-2.425\" x2=\"-2.725\" y2=\"-2.425\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"2.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-3.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-2.5\" x2=\"-2.2\" y2=\"2.5\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-2.5\" x2=\"2.8\" y2=\"2.5\" layer=\"51\"/>\n</package>\n<package name=\"C2225K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2225 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5664</description>\n<wire x1=\"-2.725\" y1=\"3.075\" x2=\"2.725\" y2=\"3.075\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-3.075\" x2=\"-2.725\" y2=\"-3.075\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"3.6\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-4.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-3.15\" x2=\"-2.2\" y2=\"3.15\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-3.15\" x2=\"2.8\" y2=\"3.15\" layer=\"51\"/>\n</package>\n<package name=\"C0201\">\n<description>Source: http://www.avxcorp.com/docs/catalogs/cx5r.pdf</description>\n<smd name=\"1\" x=\"-0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.1\" x2=\"0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"-0.1\" layer=\"51\"/>\n</package>\n<package name=\"C1808\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-1.4732\" y1=\"0.9502\" x2=\"1.4732\" y2=\"0.9502\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.4478\" y1=\"-0.9502\" x2=\"1.4732\" y2=\"-0.9502\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<text x=\"-2.233\" y=\"1.827\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.233\" y=\"-2.842\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.275\" y1=\"-1.015\" x2=\"-1.225\" y2=\"1.015\" layer=\"51\"/>\n<rectangle x1=\"1.225\" y1=\"-1.015\" x2=\"2.275\" y2=\"1.015\" layer=\"51\"/>\n</package>\n<package name=\"C3640\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-3.8322\" y1=\"5.0496\" x2=\"3.8322\" y2=\"5.0496\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-3.8322\" y1=\"-5.0496\" x2=\"3.8322\" y2=\"-5.0496\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<text x=\"-4.647\" y=\"6.465\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-4.647\" y=\"-7.255\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-4.57\" y1=\"-5.1\" x2=\"-3.05\" y2=\"5.1\" layer=\"51\"/>\n<rectangle x1=\"3.05\" y1=\"-5.1\" x2=\"4.5688\" y2=\"5.1\" layer=\"51\"/>\n</package>\n<package name=\"C01005\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n<rectangle x1=\"-0.2\" y1=\"-0.1\" x2=\"-0.075\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"0.075\" y1=\"-0.1\" x2=\"0.2\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.05\" x2=\"0.15\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.1\" x2=\"0.15\" y2=\"-0.05\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<text x=\"-0.4\" y=\"0.3\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.4\" y=\"-1.6\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"C-US\">\n<wire x1=\"-2.54\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-1.016\" x2=\"0\" y2=\"-2.54\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-1\" x2=\"2.4892\" y2=\"-1.8542\" width=\"0.254\" layer=\"94\" curve=\"-37.878202\"/>\n<wire x1=\"-2.4668\" y1=\"-1.8504\" x2=\"0\" y2=\"-1.0161\" width=\"0.254\" layer=\"94\" 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gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0603\" package=\"C0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0805\" package=\"C0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1206\" package=\"C1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1210\" package=\"C1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1310\" package=\"C1310\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1608\" package=\"C1608\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812\" package=\"C1812\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825\" package=\"C1825\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2012\" package=\"C2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3216\" package=\"C3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3225\" package=\"C3225\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C4532\" package=\"C4532\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C4564\" package=\"C4564\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect 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pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-093X316\" package=\"C275-093X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-113X316\" package=\"C275-113X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-134X316\" package=\"C275-134X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-205X316\" package=\"C275-205X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0805K\" package=\"C0805K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1206K\" package=\"C1206K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1210K\" package=\"C1210K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812K\" package=\"C1812K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825K\" 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gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3640\" package=\"C3640\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"C01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"usb-serial\">\n<packages>\n<package name=\"SOIC16\">\n<description>&lt;b&gt;SMALL OUTLINE INTEGRATED CIRCUIT&lt;/b&gt;&lt;p&gt;\n16-Pin (150-Mil) SOIC&lt;br&gt;\nSource: http://www.cypress.com .. 38-12025_0P_V.pdf</description>\n<wire x1=\"4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"-1.795\" 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x=\"-10.16\" y=\"10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"RTS\" x=\"-10.16\" y=\"12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"RS232\" x=\"-10.16\" y=\"15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCC\" x=\"-10.16\" y=\"17.78\" length=\"middle\" rot=\"R180\"/>\n<text x=\"-27.94\" y=\"20.32\" size=\"1.778\" layer=\"94\">CH340G</text>\n<wire x1=\"-15.24\" y1=\"20.32\" x2=\"-15.24\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-15.24\" y1=\"20.32\" x2=\"-30.48\" y2=\"20.32\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-30.48\" y1=\"20.32\" x2=\"-30.48\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-30.48\" y1=\"-2.54\" x2=\"-15.24\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"CH340G\">\n<gates>\n<gate name=\"G$1\" symbol=\"CH340G\" x=\"22.86\" y=\"-5.08\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"SOIC16\">\n<connects>\n<connect gate=\"G$1\" pin=\"CTS\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"D+\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"D-\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"DCD\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"DSR\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"DTR\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"RI\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"RS232\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"RTS\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"RX\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"TX\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"V3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"VCC\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"XI\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"XO\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"SparkFun-FreqCtrl\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find crystals and oscillators and other things that go \"tick\".&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. 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x1=\"-5.715\" y1=\"-1.143\" x2=\"-5.715\" y2=\"-0.381\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-5.715\" y1=\"-0.381\" x2=\"-5.715\" y2=\"0.381\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-5.715\" y1=\"0.381\" x2=\"-5.715\" y2=\"1.143\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-5.715\" y1=\"-2.159\" x2=\"-5.715\" y2=\"-1.143\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.715\" y1=\"-2.159\" x2=\"-5.461\" y2=\"-2.413\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.715\" y1=\"-0.381\" x2=\"-6.477\" y2=\"-0.381\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-5.715\" y1=\"0.381\" x2=\"-6.477\" y2=\"0.381\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-3.429\" y1=\"2.032\" x2=\"3.429\" y2=\"2.032\" width=\"0.0508\" layer=\"21\"/>\n<wire x1=\"5.461\" y1=\"2.413\" x2=\"-5.461\" y2=\"2.413\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.461\" y1=\"2.413\" x2=\"5.715\" y2=\"2.159\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-5.715\" y1=\"2.159\" x2=\"-5.461\" y2=\"2.413\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-0.254\" y1=\"0.635\" x2=\"-0.254\" y2=\"-0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"-0.635\" x2=\"0.254\" y2=\"-0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"-0.635\" x2=\"0.254\" y2=\"0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0.635\" x2=\"-0.254\" y2=\"0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.635\" y1=\"0.635\" x2=\"-0.635\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.635\" y1=\"0\" x2=\"-0.635\" y2=\"-0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.635\" y1=\"0\" x2=\"-1.016\" y2=\"0\" width=\"0.0508\" layer=\"21\"/>\n<wire x1=\"0.635\" y1=\"0.635\" x2=\"0.635\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.635\" y1=\"0\" x2=\"0.635\" y2=\"-0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.635\" y1=\"0\" x2=\"1.016\" y2=\"0\" width=\"0.0508\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.826\" y=\"0\" dx=\"5.334\" dy=\"1.9304\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.826\" y=\"0\" dx=\"5.334\" dy=\"1.9304\" layer=\"1\"/>\n<text x=\"-5.715\" y=\"2.794\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.715\" y=\"-4.191\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-6.604\" y1=\"-3.048\" x2=\"6.604\" y2=\"3.048\" layer=\"43\"/>\n</package>\n<package name=\"HC49US\">\n<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>\n<wire x1=\"-3.429\" y1=\"-2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"180\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<text x=\"-5.08\" y=\"-3.937\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-5.08\" y=\"2.667\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n</package>\n<package name=\"CRYSTAL-32KHZ-SMD-MELF\">\n<smd name=\"X1\" x=\"-1.27\" y=\"0\" dx=\"1\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"X2\" x=\"1.27\" y=\"0\" dx=\"1\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"SHEILD\" x=\"0\" y=\"5.08\" dx=\"2.5\" dy=\"6\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"8.255\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"0.4064\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"CRYSTAL-SMD-5X3\">\n<wire x1=\"-0.6\" y1=\"1.6\" x2=\"0.6\" y2=\"1.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.5\" y1=\"0.3\" x2=\"2.5\" y2=\"-0.3\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.6\" y1=\"-1.6\" x2=\"-0.6\" y2=\"-1.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.5\" y1=\"0.3\" x2=\"-2.5\" y2=\"-0.3\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.85\" y=\"-1.15\" dx=\"1.9\" dy=\"1.1\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.85\" y=\"1.15\" dx=\"1.9\" dy=\"1.1\" layer=\"1\"/>\n<smd name=\"4\" x=\"-1.85\" y=\"1.15\" dx=\"1.9\" dy=\"1.1\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.85\" y=\"-1.15\" dx=\"1.9\" dy=\"1.1\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.905\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"CRYSTAL-32KHZ-SMD_EPSON_MC146\">\n<wire x1=\"0.2\" y1=\"0\" x2=\"7.2\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"7.2\" y1=\"0\" x2=\"7.2\" y2=\"1.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"7.2\" y1=\"1.5\" x2=\"0.2\" y2=\"1.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0.2\" y1=\"1.5\" x2=\"0.2\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"6.2\" y1=\"1.4\" x2=\"5.9\" y2=\"1.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"5.9\" y1=\"1.4\" x2=\"5.9\" y2=\"0.1\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"5.9\" y1=\"0.1\" x2=\"6.2\" y2=\"0.1\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.3\" y1=\"1.4\" x2=\"1.9\" y2=\"1.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.3\" y1=\"0.1\" x2=\"1.9\" y2=\"0.1\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"0.6\" y=\"0.3\" dx=\"1.2\" dy=\"0.6\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"0.6\" y=\"1.2\" dx=\"1.2\" dy=\"0.6\" layer=\"1\"/>\n<smd name=\"NC2\" x=\"6.9\" y=\"0.3\" dx=\"1.2\" dy=\"0.6\" layer=\"1\"/>\n<smd name=\"NC1\" x=\"6.9\" y=\"1.2\" dx=\"1.2\" dy=\"0.6\" layer=\"1\"/>\n</package>\n<package name=\"CRYSTAL-SMD-10.5X4.8-2PIN\">\n<wire x1=\"-6.2\" y1=\"1.5\" x2=\"-6.2\" y2=\"2.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-6.2\" y1=\"2.4\" x2=\"6.2\" y2=\"2.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"6.2\" y1=\"2.4\" x2=\"6.2\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-6.2\" y1=\"-1.5\" x2=\"-6.2\" y2=\"-2.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-6.2\" y1=\"-2.4\" x2=\"6.2\" y2=\"-2.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"6.2\" y1=\"-2.4\" x2=\"6.2\" y2=\"-1.5\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"-4.3\" y=\"0\" dx=\"5.5\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"4.3\" y=\"0\" dx=\"5.5\" dy=\"1.5\" layer=\"1\"/>\n</package>\n<package name=\"TC26HEZ\">\n<description>32kHz crystal package&lt;br&gt;\nThis is the \"EZ\" version, which has limited top masking for improved ease of assembly.</description>\n<wire x1=\"-0.889\" y1=\"1.651\" x2=\"0.889\" y2=\"1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.762\" y1=\"7.747\" x2=\"1.016\" y2=\"7.493\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.016\" y1=\"7.493\" x2=\"-0.762\" y2=\"7.747\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-0.762\" y1=\"7.747\" x2=\"0.762\" y2=\"7.747\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.889\" y1=\"1.651\" x2=\"0.889\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.016\" y1=\"2.032\" x2=\"1.016\" y2=\"7.493\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.889\" y1=\"1.651\" x2=\"-0.889\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.016\" y1=\"2.032\" x2=\"-0.889\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.016\" y1=\"2.032\" x2=\"-1.016\" y2=\"7.493\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0.762\" x2=\"0.508\" y2=\"1.143\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0.762\" x2=\"-0.508\" y2=\"1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.635\" y1=\"0.635\" x2=\"1.27\" y2=\"0\" width=\"0.4064\" layer=\"51\"/>\n<wire x1=\"-0.635\" y1=\"0.635\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"51\"/>\n<wire x1=\"-0.508\" y1=\"4.953\" x2=\"-0.508\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"4.572\" x2=\"-0.508\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"4.572\" x2=\"0.508\" y2=\"4.953\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"4.953\" x2=\"0.508\" y2=\"4.953\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"5.334\" x2=\"0\" y2=\"5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"4.191\" x2=\"0\" y2=\"4.191\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"4.191\" x2=\"0\" y2=\"3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"4.191\" x2=\"0.508\" y2=\"4.191\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"5.334\" x2=\"0\" y2=\"5.842\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"5.334\" x2=\"0.508\" y2=\"5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.016\" y1=\"2.032\" x2=\"0.889\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.889\" y1=\"2.032\" x2=\"-0.889\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" diameter=\"1.6764\" stop=\"no\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" diameter=\"1.6764\" stop=\"no\"/>\n<text x=\"-1.397\" y=\"2.032\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\">&gt;NAME</text>\n<text x=\"2.667\" y=\"2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"0.3048\" y1=\"1.016\" x2=\"0.7112\" y2=\"1.6002\" layer=\"21\"/>\n<rectangle x1=\"-0.7112\" y1=\"1.016\" x2=\"-0.3048\" y2=\"1.6002\" layer=\"21\"/>\n<rectangle x1=\"-1.778\" y1=\"0.762\" x2=\"1.778\" y2=\"8.382\" layer=\"43\"/>\n<circle x=\"-1.27\" y=\"0\" radius=\"0.508\" width=\"0\" layer=\"29\"/>\n<circle x=\"1.27\" y=\"0\" radius=\"0.508\" width=\"0\" layer=\"29\"/>\n<circle x=\"-1.27\" y=\"0\" radius=\"0.924571875\" width=\"0\" layer=\"30\"/>\n<circle x=\"1.27\" y=\"0\" radius=\"0.915809375\" width=\"0\" layer=\"30\"/>\n</package>\n<package name=\"CRYSTAL-TXC-7A\">\n<smd name=\"P$1\" x=\"1.85\" y=\"0\" dx=\"1.7\" dy=\"2.4\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"-1.85\" y=\"0\" dx=\"1.7\" dy=\"2.4\" layer=\"1\"/>\n<wire x1=\"-2.6\" y1=\"1.6\" x2=\"2.6\" y2=\"1.6\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.6\" y1=\"-1.6\" x2=\"-2.6\" y2=\"-1.6\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-1.016\" y=\"0.254\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.016\" y=\"-0.508\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"CRYSTAL-SMD-3.2X1.5MM\">\n<description>&lt;h3&gt;3.2 x 1.5mm Crystal Package&lt;/h3&gt;\n&lt;p&gt;e.g: &lt;a href=\"http://www.sii.co.jp/en/quartz/files/2013/03/file_PRODUCT_MASTER_50812_GRAPHIC03.pdf\"&gt;SX-32S&lt;/a&gt;&lt;/p&gt;</description>\n<smd name=\"P$1\" x=\"-1.25\" y=\"0\" dx=\"1\" dy=\"1.8\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"1.25\" y=\"0\" dx=\"1\" dy=\"1.8\" layer=\"1\"/>\n<wire x1=\"-1.6\" y1=\"0.75\" x2=\"1.6\" y2=\"0.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.6\" y1=\"0.75\" x2=\"1.6\" y2=\"-0.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.6\" y1=\"-0.75\" x2=\"-1.6\" y2=\"-0.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.6\" y1=\"-0.75\" x2=\"-1.6\" y2=\"0.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.5\" y1=\"0.75\" x2=\"0.5\" y2=\"0.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.5\" y1=\"-0.75\" x2=\"-0.5\" y2=\"-0.75\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"0\" y=\"1.143\" size=\"0.8128\" layer=\"25\" align=\"bottom-center\">&gt;Name</text>\n<text x=\"0\" y=\"-1.143\" size=\"0.8128\" layer=\"27\" align=\"top-center\">&gt;Value</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"Q\">\n<wire x1=\"1.016\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-1.016\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-0.381\" y1=\"1.524\" x2=\"-0.381\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.381\" y1=\"-1.524\" x2=\"0.381\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0.381\" y1=\"-1.524\" x2=\"0.381\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0.381\" y1=\"1.524\" x2=\"-0.381\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.016\" y1=\"1.778\" x2=\"1.016\" y2=\"-1.778\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-1.016\" y1=\"1.778\" x2=\"-1.016\" y2=\"-1.778\" width=\"0.254\" layer=\"94\"/>\n<text x=\"2.54\" y=\"1.016\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<text x=\"-2.159\" y=\"-1.143\" size=\"0.8636\" layer=\"93\">1</text>\n<text x=\"1.524\" y=\"-1.143\" size=\"0.8636\" layer=\"93\">2</text>\n<pin name=\"2\" x=\"2.54\" y=\"0\" visible=\"off\" length=\"point\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"1\" x=\"-2.54\" y=\"0\" visible=\"off\" length=\"point\" direction=\"pas\" swaplevel=\"1\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"CRYSTAL\" prefix=\"Y\" uservalue=\"yes\">\n<description>Various standard crystals. Proven footprints.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"Q\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"HC49UV\" package=\"HC49U-V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC38H\" package=\"TC38H\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC26H\" package=\"TC26H\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-10112\"/>\n<attribute name=\"VALUE\" value=\"32.768kHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"HC49UP\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"HC49US\" package=\"HC49US\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"32-SMD-MELF\" package=\"CRYSTAL-32KHZ-SMD-MELF\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"X1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"X2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-07894\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-16MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-08218\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"EPSONMC146\" package=\"CRYSTAL-32KHZ-SMD_EPSON_MC146\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$2\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"10.5X4.8\" package=\"CRYSTAL-SMD-10.5X4.8-2PIN\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC26H_EZ\" package=\"TC26HEZ\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TXC-7A\" package=\"CRYSTAL-TXC-7A\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-12.288MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-09653\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"12.288MHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"3.2X1.5MM\" package=\"CRYSTAL-SMD-3.2X1.5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-13062\"/>\n<attribute name=\"VALUE\" value=\"32.768kHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-12MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-08297\"/>\n<attribute name=\"VALUE\" value=\"12MHz\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Luca Eagle-Library\">\n<packages>\n<package name=\"MSOP10\">\n<description>&lt;b&gt;10-Lead Mini Small Outline Package [MSOP]&lt;/b&gt; (RM-10)&lt;p&gt;\nSource: http://www.analog.com/UploadedFiles/Data_Sheets/35641221898805SSM2167_b.pdf&lt;br&gt;\nCOMPLIANT TO JEDEC STANDARDS MO-187BA</description>\n<wire x1=\"-1.4\" y1=\"1.4\" x2=\"1.4\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"1.4\" x2=\"1.4\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"-1.4\" x2=\"-1.4\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.4\" y1=\"-1.4\" x2=\"-1.4\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.8\" y1=\"-1.1\" x2=\"-0.8\" y2=\"-0.5\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-0.8\" y1=\"-0.5\" x2=\"-0.8\" y2=\"-1.1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"2\" x=\"-0.5\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"3\" x=\"0\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"4\" x=\"0.5\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"5\" x=\"1\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"6\" x=\"1\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"7\" x=\"0.5\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"8\" x=\"0\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"9\" x=\"-0.5\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"10\" x=\"-1\" y=\"2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-2.032\" y=\"-2.54\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\">&gt;NAME</text>\n<text x=\"3.302\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.1244\" y1=\"-2.5\" x2=\"-0.8744\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"-0.6244\" y1=\"-2.5\" x2=\"-0.3744\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"-0.1244\" y1=\"-2.5\" x2=\"0.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.3756\" y1=\"-2.5\" x2=\"0.6256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8756\" y1=\"-2.5\" x2=\"1.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8744\" y1=\"1.5\" x2=\"1.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"0.3744\" y1=\"1.5\" x2=\"0.6244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.1256\" y1=\"1.5\" x2=\"0.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.6256\" y1=\"1.5\" x2=\"-0.3756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-1.1256\" y1=\"1.5\" x2=\"-0.8756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"MCP4728\">\n<pin name=\"VDD\" x=\"-20.32\" y=\"5.08\" length=\"middle\"/>\n<pin name=\"SCL\" x=\"-20.32\" y=\"2.54\" length=\"middle\"/>\n<pin name=\"SDA\" x=\"-20.32\" y=\"0\" length=\"middle\"/>\n<pin name=\"!LDAC\" x=\"-20.32\" y=\"-2.54\" length=\"middle\"/>\n<pin name=\"RDY/!BSY\" x=\"-20.32\" y=\"-5.08\" length=\"middle\"/>\n<pin name=\"VOUT_A\" x=\"17.78\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_B\" x=\"17.78\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_C\" x=\"17.78\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_D\" x=\"17.78\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VSS\" x=\"17.78\" y=\"5.08\" length=\"middle\" rot=\"R180\"/>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-15.24\" y1=\"-7.62\" x2=\"12.7\" y2=\"-7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"12.7\" y1=\"-7.62\" x2=\"12.7\" y2=\"7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"12.7\" y1=\"7.62\" x2=\"-15.24\" y2=\"7.62\" width=\"0.254\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MCP4728\">\n<gates>\n<gate name=\"G$1\" symbol=\"MCP4728\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"MSOP10\">\n<connects>\n<connect gate=\"G$1\" pin=\"!LDAC\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"RDY/!BSY\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"VOUT_A\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"VOUT_B\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"VOUT_C\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"VOUT_D\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-Connector\" urn=\"urn:adsk.eagle:library:478\">\n<packages>\n<package name=\"H10-2.54\" urn=\"urn:adsk.eagle:footprint:33050/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"-12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"-12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0\" layer=\"39\"/>\n<pad name=\"1\" x=\"0\" y=\"11.43\" drill=\"0.889\" diameter=\"1.651\" shape=\"square\"/>\n<pad name=\"2\" x=\"0\" y=\"8.89\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"3\" x=\"0\" y=\"6.35\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"4\" x=\"0\" y=\"3.81\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"5\" x=\"0\" y=\"1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"6\" x=\"0\" y=\"-1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"7\" x=\"0\" y=\"-3.81\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"8\" x=\"0\" y=\"-6.35\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"9\" x=\"0\" y=\"-8.89\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"10\" x=\"0\" y=\"-11.43\" drill=\"0.889\" diameter=\"1.651\"/>\n<text x=\"2.54\" y=\"-1.27\" size=\"0.889\" layer=\"27\" ratio=\"11\" rot=\"R90\">&gt;value</text>\n<text x=\"-1.905\" y=\"-1.27\" size=\"0.889\" layer=\"25\" ratio=\"11\" rot=\"R90\">&gt;name</text>\n<text x=\"0.635\" y=\"2.54\" size=\"1.27\" layer=\"33\" ratio=\"10\" rot=\"R90\">&gt;name</text>\n<rectangle x1=\"-1.27\" y1=\"-12.7\" x2=\"1.27\" y2=\"12.7\" layer=\"39\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"H10-2.54\" urn=\"urn:adsk.eagle:package:33117/1\" type=\"box\" library_version=\"1\">\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"HEADER-10P\" urn=\"urn:adsk.eagle:symbol:33049/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"3.81\" y2=\"12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"12.7\" x2=\"3.81\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"-7.62\" y=\"13.97\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;name</text>\n<text x=\"-1.27\" y=\"13.97\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;value</text>\n<pin name=\"1\" x=\"-6.35\" y=\"11.43\" visible=\"pad\" length=\"middle\" function=\"dotclk\"/>\n<pin name=\"2\" x=\"-6.35\" y=\"8.89\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"3\" x=\"-6.35\" y=\"6.35\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"4\" x=\"-6.35\" y=\"3.81\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"5\" x=\"-6.35\" y=\"1.27\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"6\" x=\"-6.35\" y=\"-1.27\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"7\" x=\"-6.35\" y=\"-3.81\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"8\" x=\"-6.35\" y=\"-6.35\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"9\" x=\"-6.35\" y=\"-8.89\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"10\" x=\"-6.35\" y=\"-11.43\" visible=\"pad\" length=\"middle\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"DIP-YELLOW-FEMALE-HEADER-VERT(10P-2.54)\" urn=\"urn:adsk.eagle:component:33172/1\" prefix=\"J\" uservalue=\"yes\" library_version=\"1\">\n<description>320030059</description>\n<gates>\n<gate name=\"G$1\" symbol=\"HEADER-10P\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"H10-2.54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:33117/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MPN\" value=\"F185-1110A1BSYC1\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"YELLOW-10P-2.54\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"relay\" urn=\"urn:adsk.eagle:library:339\">\n<description>&lt;b&gt;Relays&lt;/b&gt;&lt;p&gt;\n&lt;ul&gt;\n&lt;li&gt;Eichhoff\n&lt;li&gt;Finder\n&lt;li&gt;Fujitsu\n&lt;li&gt;HAMLIN\n&lt;li&gt;OMRON\n&lt;li&gt;Matsushita\n&lt;li&gt;NAiS\n&lt;li&gt;Siemens\n&lt;li&gt;Schrack\n&lt;/ul&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"SOP04\" urn=\"urn:adsk.eagle:footprint:24056/1\" library_version=\"1\">\n<description>&lt;b&gt;SOP 04 - 4.3x4.4mm RM 2.54mm&lt;/b&gt; AQY21, AQY22, AQY61 Series NAiS&lt;p&gt;Source: http://www.mew-europe.com/..  pti_en.pdf</description>\n<wire x1=\"-2\" y1=\"2.075\" x2=\"2\" y2=\"2.075\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"2.075\" x2=\"2\" y2=\"-2.075\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"-2.075\" x2=\"-2\" y2=\"-2.075\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-2\" y1=\"-2.075\" x2=\"-2\" y2=\"2.075\" width=\"0.254\" layer=\"21\"/>\n<circle x=\"-1.27\" y=\"-1.524\" radius=\"0.254\" width=\"0\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.27\" y=\"-3\" dx=\"0.8\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.27\" y=\"-3\" dx=\"0.8\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.27\" y=\"3\" dx=\"0.8\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"4\" x=\"-1.27\" y=\"3\" dx=\"0.8\" dy=\"1.2\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"25\" rot=\"R90\">&gt;NAME</text>\n<text x=\"3.81\" y=\"-2.54\" size=\"1.27\" layer=\"27\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.5\" y1=\"-3.35\" x2=\"-1\" y2=\"-2.1\" layer=\"51\"/>\n<rectangle x1=\"1.04\" y1=\"-3.35\" x2=\"1.54\" y2=\"-2.1\" layer=\"51\"/>\n<rectangle x1=\"1\" y1=\"2.1\" x2=\"1.5\" y2=\"3.35\" layer=\"51\"/>\n<rectangle x1=\"-1.54\" y1=\"2.1\" x2=\"-1.04\" y2=\"3.35\" layer=\"51\"/>\n</package>\n<package name=\"AQY27-SMD04\" urn=\"urn:adsk.eagle:footprint:24057/1\" library_version=\"1\">\n<description>&lt;b&gt;SMD 04 9.4x8.8mm RM 5.08mm&lt;/b&gt; NAiS&lt;p&gt;\nSource: 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x2=\"-6.35\" y2=\"-12.7\" width=\"0.4064\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"10.795\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-15.24\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"9\" x=\"-2.54\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"10\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"11\" x=\"-2.54\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"12\" x=\"5.08\" y=\"-5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"13\" x=\"-2.54\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"14\" x=\"5.08\" y=\"-7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"15\" x=\"-2.54\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"16\" x=\"5.08\" y=\"-10.16\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"PINHD-2X8\" prefix=\"JP\" uservalue=\"yes\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X8\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X08\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X08/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMT\" package=\"2X08_SMT\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"SparkFun-Passives\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find resistors, capacitors, inductors, test points, jumper pads, etc.&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"INDUCTOR-1206\">\n<wire x1=\"-1.778\" y1=\"2.032\" x2=\"-3.81\" y2=\"2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"2.032\" x2=\"-3.81\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"-2.032\" x2=\"-1.524\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.524\" y1=\"2.032\" x2=\"3.81\" y2=\"2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"2.032\" x2=\"3.81\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"-2.032\" x2=\"1.524\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"-2.54\" y=\"0\" dx=\"3.556\" dy=\"2.032\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"2.54\" y=\"0\" dx=\"3.556\" dy=\"2.032\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-1.27\" y=\"2.54\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.27\" y=\"-2.54\" size=\"0.4064\" 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layer=\"27\">&gt;VALUE</text>\n<wire x1=\"-0.762\" y1=\"2.794\" x2=\"0.762\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.762\" y1=\"-3.175\" x2=\"0.762\" y2=\"-3.175\" width=\"0.1524\" layer=\"21\"/>\n</package>\n<package name=\"SDR0403\">\n<description>Footprint for Bourns SDR0403 family inductors</description>\n<smd name=\"P$1\" x=\"-1.65\" y=\"0\" dx=\"4.5\" dy=\"1.8\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"1.65\" y=\"0\" dx=\"4.5\" dy=\"1.8\" layer=\"1\" rot=\"R90\"/>\n<wire x1=\"-0.5\" y1=\"2\" x2=\"0.5\" y2=\"2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.5\" y1=\"-2\" x2=\"0.5\" y2=\"-2\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-0.762\" y=\"-0.254\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<text x=\"-0.889\" y=\"1.016\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n</package>\n<package name=\"INDUCTOR-SRP4020\">\n<smd name=\"P$1\" x=\"-2.05\" y=\"0\" dx=\"1.5\" dy=\"1.9\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"2.05\" y=\"0\" dx=\"1.5\" dy=\"1.9\" layer=\"1\" rot=\"R90\"/>\n<wire x1=\"-2\" y1=\"2\" x2=\"2\" y2=\"2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"-2\" x2=\"-2\" y2=\"-2\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2\" y1=\"2\" x2=\"-2\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"2\" x2=\"2\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2\" y1=\"-2\" x2=\"2\" y2=\"-1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2\" y1=\"-2\" x2=\"-2\" y2=\"-1.5\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-2.032\" y=\"2.286\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\">&gt;NAME</text>\n<text x=\"-2.032\" y=\"-3.048\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\">&gt;VALUE</text>\n</package>\n<package name=\"INDUCTOR_4.7UH\">\n<wire x1=\"-1.2\" y1=\"0.9\" x2=\"-0.6\" y2=\"1.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.6\" y1=\"1.5\" x2=\"0.6\" y2=\"1.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.6\" y1=\"1.5\" x2=\"1.2\" y2=\"0.9\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.2\" y1=\"-0.9\" x2=\"-0.6783\" y2=\"-1.3739\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.6783\" y1=\"-1.3739\" x2=\"0.6783\" y2=\"-1.3739\" width=\"0.2032\" layer=\"21\" curve=\"85.420723\"/>\n<wire x1=\"0.6783\" y1=\"-1.3739\" x2=\"1.2\" y2=\"-0.9\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.5\" y1=\"-0.6\" x2=\"-0.7071\" y2=\"-1.3929\" width=\"0.03\" layer=\"51\"/>\n<wire x1=\"-0.7071\" y1=\"-1.3929\" x2=\"0.7071\" y2=\"-1.3929\" width=\"0.03\" layer=\"51\" curve=\"90\"/>\n<wire x1=\"0.7071\" y1=\"-1.3929\" x2=\"1.5\" y2=\"-0.6\" width=\"0.03\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"-0.6\" x2=\"1.5\" y2=\"0.6\" width=\"0.03\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"0.6\" x2=\"0.6\" y2=\"1.5\" width=\"0.03\" layer=\"51\"/>\n<wire x1=\"0.6\" y1=\"1.5\" x2=\"-0.6\" y2=\"1.5\" width=\"0.03\" layer=\"51\"/>\n<wire x1=\"-0.6\" y1=\"1.5\" x2=\"-1.5\" y2=\"0.6\" width=\"0.03\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"0.6\" x2=\"-1.5\" y2=\"-0.6\" width=\"0.03\" layer=\"51\"/>\n<smd name=\"P$1\" x=\"-1.5\" y=\"0\" dx=\"1.3\" dy=\"1.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"1.5\" y=\"0\" dx=\"1.3\" dy=\"1.3\" layer=\"1\" rot=\"R90\"/>\n<text x=\"2.8\" y=\"0.7\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"2.8\" y=\"-1\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"INDUCTOR_SDR1307\">\n<smd name=\"P$1\" x=\"0\" y=\"4.6\" dx=\"14\" dy=\"4.75\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"0\" y=\"-4.6\" dx=\"14\" dy=\"4.75\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"1.5\" x2=\"-6.5\" y2=\"-1.5\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"6.5\" y1=\"1.5\" x2=\"6.5\" y2=\"-1.5\" width=\"0.3048\" layer=\"21\"/>\n<text x=\"-7\" y=\"7.5\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\">&gt;NAME</text>\n<text x=\"-7\" y=\"-8.5\" size=\"0.8128\" layer=\"27\" font=\"vector\" ratio=\"15\">&gt;VALUE</text>\n</package>\n<package name=\"CTZ3\">\n<description>Land pattern for variable capacitor - Murata Electronics TZY2 - by Haas</description>\n<wire x1=\"-1.346\" y1=\"1.4\" x2=\"-1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.346\" y1=\"-2.123\" x2=\"1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.346\" y1=\"1.4\" x2=\"1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.5\" y1=\"0\" x2=\"0.5\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.346\" y1=\"1.4\" x2=\"-1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.346\" y1=\"1.4\" x2=\"1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"2.073\" x2=\"1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"1.6\" x2=\"0\" y2=\"-1.6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.3\" y1=\"0\" x2=\"1.3\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.05\" y1=\"2.25\" x2=\"-1.573\" y2=\"1.45\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.573\" y1=\"1.45\" x2=\"-1.573\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.573\" y1=\"-2.35\" x2=\"-1.05\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.05\" y1=\"2.25\" x2=\"1.573\" y2=\"1.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.573\" y1=\"1.4\" x2=\"1.573\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.573\" y1=\"-2.35\" x2=\"1.05\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"+\" x=\"0\" y=\"1.59788125\" dx=\"1.2\" dy=\"0.8\" layer=\"1\"/>\n<smd name=\"-\" x=\"0\" y=\"-1.58771875\" dx=\"1.2\" dy=\"0.8\" layer=\"1\"/>\n<text x=\"-0.984\" y=\"2.238\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.111\" y=\"-2.638\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<dimension x1=\"0\" y1=\"1.2\" x2=\"0\" y2=\"-1.2\" x3=\"-0.4\" y3=\"0\" textsize=\"0.3048\" layer=\"21\" width=\"0.02\"/>\n<dimension x1=\"1\" y1=\"2\" x2=\"1\" y2=\"-2\" x3=\"0.6\" y3=\"0\" textsize=\"0.3048\" layer=\"21\" width=\"0.02\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"INDUCTOR\">\n<wire x1=\"0\" y1=\"5.08\" x2=\"1.27\" y2=\"3.81\" width=\"0.254\" layer=\"94\" curve=\"-90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"2.54\" x2=\"1.27\" y2=\"3.81\" width=\"0.254\" layer=\"94\" curve=\"90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"2.54\" x2=\"1.27\" y2=\"1.27\" width=\"0.254\" layer=\"94\" curve=\"-90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"1.27\" y2=\"1.27\" width=\"0.254\" layer=\"94\" curve=\"90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"1.27\" y2=\"-1.27\" width=\"0.254\" layer=\"94\" curve=\"-90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"1.27\" y2=\"-1.27\" width=\"0.254\" layer=\"94\" curve=\"90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"1.27\" y2=\"-3.81\" width=\"0.254\" layer=\"94\" curve=\"-90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"-5.08\" x2=\"1.27\" y2=\"-3.81\" width=\"0.254\" layer=\"94\" curve=\"90\" cap=\"flat\"/>\n<text x=\"2.54\" y=\"5.08\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"0\" y=\"7.62\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R270\"/>\n<pin name=\"2\" x=\"0\" y=\"-7.62\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R90\"/>\n</symbol>\n<symbol name=\"CAP_ADJ\">\n<wire x1=\"-2.032\" y1=\"-0.762\" x2=\"2.032\" y2=\"3.302\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.016\" y1=\"3.302\" x2=\"2.032\" y2=\"3.302\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.032\" y1=\"3.302\" x2=\"2.032\" y2=\"2.286\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"2.54\" x2=\"0\" y2=\"2.032\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"0\" y2=\"0.508\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"1.524\" y=\"2.921\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"1.524\" y=\"-2.159\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<rectangle x1=\"-2.032\" y1=\"0.508\" x2=\"2.032\" y2=\"1.016\" layer=\"94\"/>\n<rectangle x1=\"-2.032\" y1=\"1.524\" x2=\"2.032\" y2=\"2.032\" layer=\"94\"/>\n<pin name=\"3\" x=\"0\" y=\"5.08\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R270\"/>\n<pin name=\"4\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"INDUCTOR\" prefix=\"L\" uservalue=\"yes\">\n<description>&lt;b&gt;Inductors&lt;/b&gt;&lt;p&gt;\nBasic Inductor/Choke - 0603 and 1206. Footprints are not proven and vary greatly between part numbers.&lt;br&gt;\nINDUCTOR POWER 3.3UH 4.0A SMD&lt;br&gt;\n0.197\" L x 0.197\" W x 0.177\" H (5.00mm x 5.00mm x 4.50mm)</description>\n<gates>\n<gate name=\"G$1\" symbol=\"INDUCTOR\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"H*\" package=\"INDUCTOR-1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"1206\"/>\n</technologies>\n</device>\n<device name=\"0603\" package=\"0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR54\" package=\"CR54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PWR\" package=\"CDRH125\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0402\" package=\"C0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-B82462G\" package=\"B82462G\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"68UH-1A\" package=\"CR75\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-09739\"/>\n<attribute name=\"VALUE\" value=\"68uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"1210\" package=\"1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1007\" package=\"1007\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_\" package=\"COOPER_UP4B\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-\" package=\"CDRH3D28\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0805\" package=\"0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR75_V2\" package=\"CR75_V2\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\".\" package=\"CDRH2D09\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"NPI75\" package=\"NPI75C\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SRU5028\" package=\"SRU5028\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SRU1038\" package=\"SRU1038\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR54-KIT\" package=\"CR54-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DR1030\" package=\"DR1030\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VLF4012A\" package=\"VLF4012A\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"AXIAL-0.6\" package=\"AXIAL-0.6\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"RLB0912\" package=\"RLB0912\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"BOURNS_SRN6045\" package=\"SRN6045\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-11627\"/>\n<attribute name=\"VALUE\" value=\"33uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SDR0403-560KL\" package=\"SDR0403\">\n<connects>\n<connect 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urn=\"urn:adsk.eagle:library:229\">\n<description>&lt;b&gt;Frames for Sheet and Layout&lt;/b&gt;</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"A3L-LOC\" urn=\"urn:adsk.eagle:symbol:13881/1\" library_version=\"1\">\n<wire x1=\"288.29\" y1=\"3.81\" x2=\"342.265\" y2=\"3.81\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"3.81\" x2=\"373.38\" y2=\"3.81\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"373.38\" y1=\"3.81\" x2=\"383.54\" y2=\"3.81\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"383.54\" y1=\"3.81\" x2=\"383.54\" y2=\"8.89\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"383.54\" y1=\"8.89\" x2=\"383.54\" y2=\"13.97\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"383.54\" y1=\"13.97\" x2=\"383.54\" y2=\"19.05\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"383.54\" y1=\"19.05\" x2=\"383.54\" y2=\"24.13\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"288.29\" y1=\"3.81\" x2=\"288.29\" y2=\"24.13\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"288.29\" 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layer=\"94\"/>\n<text x=\"344.17\" y=\"15.24\" size=\"2.54\" layer=\"94\">&gt;DRAWING_NAME</text>\n<text x=\"344.17\" y=\"10.16\" size=\"2.286\" layer=\"94\">&gt;LAST_DATE_TIME</text>\n<text x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\">&gt;SHEET</text>\n<text x=\"343.916\" y=\"4.953\" size=\"2.54\" layer=\"94\">Sheet:</text>\n<frame x1=\"0\" y1=\"0\" x2=\"387.35\" y2=\"260.35\" columns=\"8\" rows=\"5\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"A3L-LOC\" urn=\"urn:adsk.eagle:component:13942/1\" prefix=\"FRAME\" uservalue=\"yes\" library_version=\"1\">\n<description>&lt;b&gt;FRAME&lt;/b&gt;&lt;p&gt;\nDIN A3, landscape with location and doc. field</description>\n<gates>\n<gate name=\"G$1\" symbol=\"A3L-LOC\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"resistor\" urn=\"urn:adsk.eagle:library:348\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,203,138,231\" href=\"../directory.asp\" title=\"\"&gt;\n&lt;area shape=\"default\" nohref&gt;\n&lt;/map&gt;\n\n&lt;html&gt;\n\n&lt;title&gt;&lt;/title&gt;\n\n &lt;LINK REL=\"StyleSheet\" TYPE=\"text/css\" HREF=\"style-sheet.css\"&gt;\n\n&lt;body bgcolor=\"#ffffff\" text=\"#000000\" marginwidth=\"0\" marginheight=\"0\" topmargin=\"0\" leftmargin=\"0\"&gt;\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0 height=\"55%\"&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;/td&gt;\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT 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ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n     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T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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50-2-X&lt;BR&gt;\n      50-4-X&lt;BR&gt;\n      50-3-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      25P&lt;BR&gt;\n      25S&lt;BR&gt;\n      25RX&lt;BR&gt;\n      82P&lt;BR&gt;\n      82M&lt;BR&gt;\n      82PA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      91E&lt;BR&gt;\n      91X&lt;BR&gt;\n      91T&lt;BR&gt;\n      91B&lt;BR&gt;\n      91A&lt;BR&gt;\n      91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n 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150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n    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FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      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layer=\"51\"/>\n<wire x1=\"-7.874\" y1=\"3.048\" x2=\"-6.985\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"2.794\" x2=\"-6.985\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.874\" y1=\"-3.048\" x2=\"-6.985\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"-2.794\" x2=\"-6.985\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.731\" y1=\"2.794\" x2=\"6.985\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.731\" y1=\"2.794\" x2=\"-6.731\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.731\" y1=\"-2.794\" x2=\"6.985\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.731\" y1=\"-2.794\" x2=\"-6.731\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.874\" y1=\"3.048\" x2=\"6.985\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.874\" y1=\"-3.048\" x2=\"6.985\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.255\" y1=\"-2.667\" x2=\"-8.255\" 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layer=\"21\" curve=\"90\"/>\n<pad name=\"1\" x=\"-8.89\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"8.89\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.128\" y=\"3.4544\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-6.096\" y=\"-0.7112\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-8.5344\" y1=\"-0.4064\" x2=\"-8.2296\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"8.2296\" y1=\"-0.4064\" x2=\"8.5344\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"0617/22\" urn=\"urn:adsk.eagle:footprint:25664/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0617, grid 22.5 mm</description>\n<wire x1=\"-10.287\" y1=\"0\" x2=\"-11.43\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-8.255\" y1=\"-2.667\" x2=\"-8.255\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.874\" y1=\"3.048\" x2=\"-6.985\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire 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urn=\"urn:adsk.eagle:footprint:25665/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0617, grid 5 mm</description>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-1.27\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"1.27\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<circle x=\"-2.54\" y=\"0\" radius=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-2.54\" y=\"0\" radius=\"1.143\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"0.635\" y=\"1.4224\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"0.635\" y=\"-2.6162\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-1.3208\" y1=\"-0.4064\" x2=\"1.3208\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"0922/22\" urn=\"urn:adsk.eagle:footprint:25666/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0922, grid 22.5 mm</description>\n<wire x1=\"11.43\" y1=\"0\" x2=\"10.795\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-11.43\" y1=\"0\" x2=\"-10.795\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-10.16\" y1=\"-4.191\" x2=\"-10.16\" y2=\"4.191\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.779\" y1=\"4.572\" x2=\"-8.89\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.636\" y1=\"4.318\" x2=\"-8.89\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.779\" y1=\"-4.572\" x2=\"-8.89\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.636\" y1=\"-4.318\" x2=\"-8.89\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.636\" y1=\"4.318\" x2=\"8.89\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.636\" y1=\"4.318\" x2=\"-8.636\" y2=\"4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.636\" y1=\"-4.318\" x2=\"8.89\" y2=\"-4.572\" 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y=\"5.1054\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-6.477\" y=\"-0.5842\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-10.7188\" y1=\"-0.4064\" x2=\"-10.16\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"10.16\" y1=\"-0.4064\" x2=\"10.3124\" y2=\"0.4064\" layer=\"21\"/>\n<rectangle x1=\"-10.3124\" y1=\"-0.4064\" x2=\"-10.16\" y2=\"0.4064\" layer=\"21\"/>\n<rectangle x1=\"10.16\" y1=\"-0.4064\" x2=\"10.7188\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"P0613V\" urn=\"urn:adsk.eagle:footprint:25667/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0613, grid 5 mm</description>\n<wire x1=\"2.54\" y1=\"0\" x2=\"1.397\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-1.397\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<circle x=\"-2.54\" y=\"0\" radius=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-2.54\" y=\"0\" radius=\"1.143\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-0.254\" y=\"1.143\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.254\" y=\"-2.413\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-1.2954\" y1=\"-0.4064\" x2=\"1.3208\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"P0613/15\" urn=\"urn:adsk.eagle:footprint:25668/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0613, grid 15 mm</description>\n<wire x1=\"7.62\" y1=\"0\" x2=\"6.985\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-6.985\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"2.032\" x2=\"-6.223\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-6.477\" y1=\"-2.032\" x2=\"-6.223\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" 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size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-7.0358\" y1=\"-0.4064\" x2=\"-6.477\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"6.477\" y1=\"-0.4064\" x2=\"7.0358\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"P0817/22\" urn=\"urn:adsk.eagle:footprint:25669/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0817, grid 22.5 mm</description>\n<wire x1=\"-10.414\" y1=\"0\" x2=\"-11.43\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-8.509\" y1=\"-3.429\" x2=\"-8.509\" y2=\"3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.128\" y1=\"3.81\" x2=\"-7.239\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.985\" y1=\"3.556\" x2=\"-7.239\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.128\" y1=\"-3.81\" x2=\"-7.239\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.985\" y1=\"-3.556\" x2=\"-7.239\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.985\" y1=\"3.556\" x2=\"7.239\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.985\" y1=\"3.556\" x2=\"-6.985\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.985\" y1=\"-3.556\" x2=\"7.239\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.985\" y1=\"-3.556\" x2=\"-6.985\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.128\" y1=\"3.81\" x2=\"7.239\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.128\" y1=\"-3.81\" x2=\"7.239\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.429\" x2=\"8.509\" y2=\"3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.43\" y1=\"0\" x2=\"10.414\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-8.509\" y1=\"3.429\" x2=\"-8.128\" y2=\"3.81\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-8.509\" y1=\"-3.429\" x2=\"-8.128\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"8.128\" y1=\"3.81\" x2=\"8.509\" y2=\"3.429\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.128\" y1=\"-3.81\" x2=\"8.509\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<pad name=\"1\" x=\"-11.43\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.43\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.382\" y=\"4.2164\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-6.223\" y=\"-0.5842\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"6.604\" y=\"-2.2606\" size=\"1.27\" layer=\"51\" ratio=\"10\" rot=\"R90\">0817</text>\n<rectangle x1=\"8.509\" y1=\"-0.4064\" x2=\"10.3124\" y2=\"0.4064\" layer=\"21\"/>\n<rectangle x1=\"-10.3124\" y1=\"-0.4064\" x2=\"-8.509\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"P0817V\" urn=\"urn:adsk.eagle:footprint:25670/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0817, grid 6.35 mm</description>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-5.08\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"1.27\" y1=\"0\" x2=\"0\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"1.27\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-1.016\" y=\"1.27\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.016\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-6.858\" y=\"2.032\" size=\"1.016\" layer=\"21\" ratio=\"12\">0817</text>\n<rectangle x1=\"-3.81\" y1=\"-0.4064\" x2=\"0\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"V234/12\" urn=\"urn:adsk.eagle:footprint:25671/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V234, grid 12.5 mm</description>\n<wire x1=\"-4.953\" y1=\"1.524\" x2=\"-4.699\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.699\" y1=\"1.778\" x2=\"4.953\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.699\" y1=\"-1.778\" x2=\"4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-4.953\" y1=\"-1.524\" x2=\"-4.699\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-4.699\" y1=\"1.778\" x2=\"4.699\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"1.524\" x2=\"-4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.699\" y1=\"-1.778\" x2=\"-4.699\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"1.524\" x2=\"4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"0\" x2=\"5.461\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.35\" y1=\"0\" x2=\"-5.461\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<pad name=\"1\" x=\"-6.35\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"6.35\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-4.953\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"4.953\" y1=\"-0.4064\" x2=\"5.4102\" y2=\"0.4064\" layer=\"21\"/>\n<rectangle x1=\"-5.4102\" y1=\"-0.4064\" x2=\"-4.953\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"V235/17\" urn=\"urn:adsk.eagle:footprint:25672/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V235, grid 17.78 mm</description>\n<wire x1=\"-6.731\" y1=\"2.921\" x2=\"6.731\" y2=\"2.921\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.112\" y1=\"2.54\" x2=\"-7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.731\" y1=\"-2.921\" x2=\"-6.731\" y2=\"-2.921\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"2.54\" x2=\"7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.89\" y1=\"0\" x2=\"7.874\" y2=\"0\" width=\"1.016\" layer=\"51\"/>\n<wire x1=\"-7.874\" y1=\"0\" x2=\"-8.89\" y2=\"0\" width=\"1.016\" layer=\"51\"/>\n<wire x1=\"-7.112\" y1=\"-2.54\" x2=\"-6.731\" y2=\"-2.921\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"6.731\" y1=\"2.921\" x2=\"7.112\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.731\" y1=\"-2.921\" x2=\"7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-7.112\" y1=\"2.54\" x2=\"-6.731\" y2=\"2.921\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-8.89\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"8.89\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-6.858\" y=\"3.302\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.842\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"7.112\" y1=\"-0.508\" x2=\"7.747\" y2=\"0.508\" layer=\"21\"/>\n<rectangle x1=\"-7.747\" y1=\"-0.508\" x2=\"-7.112\" y2=\"0.508\" layer=\"21\"/>\n</package>\n<package name=\"V526-0\" urn=\"urn:adsk.eagle:footprint:25673/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V526-0, grid 2.5 mm</description>\n<wire x1=\"-2.54\" y1=\"1.016\" x2=\"-2.286\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.286\" y1=\"1.27\" x2=\"2.54\" y2=\"1.016\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.286\" y1=\"-1.27\" x2=\"2.54\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.54\" y1=\"-1.016\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"-1.016\" x2=\"2.54\" y2=\"1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"-1.27\" x2=\"2.286\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"1.016\" x2=\"-2.54\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.413\" y=\"1.651\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.413\" y=\"-2.794\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0102R\" urn=\"urn:adsk.eagle:footprint:25674/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0102W\" urn=\"urn:adsk.eagle:footprint:25675/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"0\" dx=\"0.6\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.95\" y=\"0\" dx=\"0.6\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0204R\" urn=\"urn:adsk.eagle:footprint:25676/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC3715&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.938\" y1=\"0.6\" x2=\"-0.938\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.938\" y1=\"-0.6\" x2=\"0.938\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"0.8\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"0.8\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0204W\" urn=\"urn:adsk.eagle:footprint:25677/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC3715&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.684\" y1=\"0.6\" x2=\"-0.684\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.684\" y1=\"-0.6\" x2=\"0.684\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207R\" urn=\"urn:adsk.eagle:footprint:25678/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.2125\" y1=\"1\" x2=\"-1.2125\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.2125\" y1=\"-1\" x2=\"1.2125\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.2225\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.2225\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207W\" urn=\"urn:adsk.eagle:footprint:25679/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.149\" y1=\"1\" x2=\"-1.149\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.149\" y1=\"-1\" x2=\"1.149\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"0922V\" urn=\"urn:adsk.eagle:footprint:25680/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0922, grid 7.5 mm</description>\n<wire x1=\"2.54\" y1=\"0\" x2=\"1.397\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-3.81\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-0.508\" y=\"1.6764\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.508\" y=\"-2.9972\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-6.858\" y=\"2.54\" size=\"1.016\" layer=\"21\" ratio=\"12\">0922</text>\n<rectangle x1=\"-3.81\" y1=\"-0.4064\" x2=\"1.3208\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"RDH/15\" urn=\"urn:adsk.eagle:footprint:25681/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype RDH, grid 15 mm</description>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-6.858\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"2.794\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"-3.048\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.794\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"-4.953\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"-2.667\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.858\" y1=\"0\" x2=\"7.62\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"2.667\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.477\" y2=\"-2.667\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<pad name=\"1\" x=\"-7.62\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.62\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.35\" y=\"3.4544\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.318\" y=\"-0.5842\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"4.572\" y=\"-1.7272\" size=\"1.27\" layer=\"51\" ratio=\"10\" rot=\"R90\">RDH</text>\n<rectangle x1=\"-6.7564\" y1=\"-0.4064\" x2=\"-6.4516\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"6.4516\" y1=\"-0.4064\" x2=\"6.7564\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"MINI_MELF-0102AX\" urn=\"urn:adsk.eagle:footprint:25682/1\" library_version=\"1\">\n<description>&lt;b&gt;Mini MELF 0102 Axial&lt;/b&gt;</description>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"52\"/>\n<smd name=\"1\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"1\" roundness=\"100\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"16\" roundness=\"100\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<hole x=\"0\" y=\"0\" drill=\"1.3\"/>\n</package>\n<package name=\"R0201\" urn=\"urn:adsk.eagle:footprint:25683/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt; chip&lt;p&gt;\nSource: http://www.vishay.com/docs/20008/dcrcw.pdf</description>\n<smd name=\"1\" x=\"-0.255\" y=\"0\" dx=\"0.28\" dy=\"0.43\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.255\" y=\"0\" dx=\"0.28\" dy=\"0.43\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"0.15\" layer=\"21\"/>\n</package>\n<package name=\"VTA52\" urn=\"urn:adsk.eagle:footprint:25684/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR52&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-15.24\" y1=\"0\" x2=\"-13.97\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"12.6225\" y1=\"0.025\" x2=\"12.6225\" y2=\"4.725\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.6225\" y1=\"4.725\" x2=\"-12.6225\" y2=\"4.725\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.6225\" y1=\"4.725\" x2=\"-12.6225\" y2=\"0.025\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.6225\" y1=\"0.025\" x2=\"-12.6225\" y2=\"-4.65\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.6225\" y1=\"-4.65\" x2=\"12.6225\" y2=\"-4.65\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.6225\" y1=\"-4.65\" x2=\"12.6225\" y2=\"0.025\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.97\" y1=\"0\" x2=\"15.24\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-15.24\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"15.24\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"5.08\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-13.97\" y1=\"-0.3048\" x2=\"-12.5675\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle 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layer=\"21\"/>\n<wire x1=\"10.795\" y1=\"0\" x2=\"12.065\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-12.065\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"12.065\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"5.08\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-10.795\" y1=\"-0.3048\" x2=\"-9.8425\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"9.8425\" y1=\"-0.3048\" x2=\"10.795\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VTA54\" urn=\"urn:adsk.eagle:footprint:25686/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR54&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-12.065\" y1=\"0\" x2=\"-10.795\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"9.8975\" y1=\"0\" x2=\"9.8975\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.8975\" y1=\"3.3\" x2=\"-9.8975\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"3.3\" x2=\"-9.8975\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"0\" x2=\"-9.8975\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"-3.3\" x2=\"9.8975\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.8975\" y1=\"-3.3\" x2=\"9.8975\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"10.795\" y1=\"0\" x2=\"12.065\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-12.065\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"12.065\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"3.81\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-10.795\" y1=\"-0.3048\" x2=\"-9.8425\" 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y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.985\" y1=\"0\" x2=\"8.255\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-8.255\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"8.255\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"3.81\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-6.985\" y1=\"-0.3048\" x2=\"-6.35\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"6.35\" y1=\"-0.3048\" x2=\"6.985\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VTA56\" urn=\"urn:adsk.eagle:footprint:25688/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR56&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-6.35\" y1=\"0\" x2=\"-5.08\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"0\" x2=\"4.5\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.5\" y1=\"3.3\" x2=\"-4.5\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"3.3\" x2=\"-4.5\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"0\" x2=\"-4.5\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"-3.3\" x2=\"4.5\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.5\" y1=\"-3.3\" x2=\"4.5\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"0\" x2=\"6.35\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-6.35\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"6.35\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"3.81\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-5.08\" y1=\"-0.3048\" x2=\"-4.445\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"4.445\" y1=\"-0.3048\" x2=\"5.08\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VMTA55\" urn=\"urn:adsk.eagle:footprint:25689/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RNC55&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-4.26\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"3.3375\" y1=\"-1.45\" x2=\"3.3375\" y2=\"1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.3375\" y1=\"1.45\" x2=\"-3.3625\" y2=\"1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.3625\" y1=\"1.45\" x2=\"-3.3625\" y2=\"-1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.3625\" y1=\"-1.45\" x2=\"3.3375\" y2=\"-1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.235\" y1=\"0\" x2=\"5.08\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.175\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-4.26\" y1=\"-0.3048\" x2=\"-3.3075\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"3.2825\" y1=\"-0.3048\" x2=\"4.235\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VMTB60\" urn=\"urn:adsk.eagle:footprint:25690/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RNC60&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-6.35\" y1=\"0\" x2=\"-5.585\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"4.6875\" y1=\"-1.95\" x2=\"4.6875\" y2=\"1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.6875\" y1=\"1.95\" x2=\"-4.6875\" y2=\"1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.6875\" y1=\"1.95\" x2=\"-4.6875\" y2=\"-1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.6875\" y1=\"-1.95\" x2=\"4.6875\" y2=\"-1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.585\" y1=\"0\" x2=\"6.35\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-6.35\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"6.35\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-4.445\" y=\"2.54\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.445\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-5.585\" y1=\"-0.3048\" x2=\"-4.6325\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"4.6325\" y1=\"-0.3048\" x2=\"5.585\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"R4527\" urn=\"urn:adsk.eagle:footprint:25691/1\" library_version=\"1\">\n<description>&lt;b&gt;Package 4527&lt;/b&gt;&lt;p&gt;\nSource: http://www.vishay.com/docs/31059/wsrhigh.pdf</description>\n<wire x1=\"-5.675\" y1=\"-3.375\" x2=\"5.65\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.65\" y1=\"-3.375\" x2=\"5.65\" y2=\"3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"5.65\" y1=\"3.375\" x2=\"-5.675\" y2=\"3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.675\" y1=\"3.375\" x2=\"-5.675\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<text x=\"-5.715\" y=\"3.81\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-5.715\" y=\"-5.08\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC0001\" urn=\"urn:adsk.eagle:footprint:25692/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.075\" y1=\"-1.8\" x2=\"3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.075\" y1=\"-1.8\" x2=\"3.075\" y2=\"1.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"1.606\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.075\" y1=\"-1.606\" x2=\"-3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.075\" y1=\"1.606\" x2=\"3.075\" y2=\"1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.075\" y1=\"-1.8\" x2=\"3.075\" y2=\"-1.606\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.675\" y=\"0\" dx=\"2.29\" dy=\"2.92\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.675\" y=\"0\" dx=\"2.29\" dy=\"2.92\" layer=\"1\"/>\n<text x=\"-2.544\" y=\"2.229\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.544\" y=\"-3.501\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC0002\" urn=\"urn:adsk.eagle:footprint:25693/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-5.55\" y1=\"3.375\" x2=\"-5.55\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-5.55\" y1=\"-3.375\" x2=\"5.55\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.55\" y1=\"-3.375\" x2=\"5.55\" y2=\"3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"5.55\" y1=\"3.375\" x2=\"-5.55\" y2=\"3.375\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.575\" y=\"0.025\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<text x=\"-5.65\" y=\"3.9\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-5.65\" y=\"-5.15\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC01/2\" urn=\"urn:adsk.eagle:footprint:25694/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-2.45\" y1=\"1.475\" x2=\"-2.45\" y2=\"-1.475\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.45\" y1=\"-1.475\" x2=\"2.45\" y2=\"-1.475\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.45\" y1=\"-1.475\" x2=\"2.45\" y2=\"1.475\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.45\" y1=\"1.475\" x2=\"-2.45\" y2=\"1.475\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.45\" y1=\"1.475\" x2=\"-2.45\" y2=\"1.106\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.45\" y1=\"-1.106\" x2=\"-2.45\" y2=\"-1.475\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.45\" y1=\"1.106\" x2=\"2.45\" y2=\"1.475\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.45\" y1=\"-1.475\" x2=\"2.45\" y2=\"-1.106\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.1\" y=\"0\" dx=\"2.16\" dy=\"1.78\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.1\" y=\"0\" dx=\"2.16\" dy=\"1.78\" layer=\"1\"/>\n<text x=\"-2.544\" y=\"1.904\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.544\" y=\"-3.176\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC2515\" urn=\"urn:adsk.eagle:footprint:25695/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.075\" y1=\"-1.8\" x2=\"3.05\" y2=\"-1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.05\" y1=\"-1.8\" x2=\"3.05\" y2=\"1.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.05\" y1=\"1.8\" x2=\"-3.075\" y2=\"1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"1.606\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.075\" y1=\"-1.606\" x2=\"-3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.05\" y1=\"1.606\" x2=\"3.05\" y2=\"1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.05\" y1=\"-1.8\" x2=\"3.05\" y2=\"-1.606\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.675\" y=\"0\" dx=\"2.29\" dy=\"2.92\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.675\" y=\"0\" dx=\"2.29\" dy=\"2.92\" layer=\"1\"/>\n<text x=\"-3.2\" y=\"2.15\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.2\" y=\"-3.4\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC4527\" urn=\"urn:adsk.eagle:footprint:25696/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-5.675\" y1=\"3.4\" x2=\"-5.675\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-5.675\" y1=\"-3.375\" x2=\"5.675\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.675\" y1=\"-3.375\" x2=\"5.675\" y2=\"3.4\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"5.675\" y1=\"3.4\" x2=\"-5.675\" y2=\"3.4\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.575\" y=\"0.025\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<text x=\"-5.775\" y=\"3.925\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-5.775\" y=\"-5.15\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC6927\" urn=\"urn:adsk.eagle:footprint:25697/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-8.65\" y1=\"3.375\" x2=\"-8.65\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-8.65\" y1=\"-3.375\" x2=\"8.65\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"8.65\" y1=\"-3.375\" x2=\"8.65\" y2=\"3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"8.65\" y1=\"3.375\" x2=\"-8.65\" y2=\"3.375\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-7.95\" y=\"0.025\" dx=\"3.94\" dy=\"5.97\" layer=\"1\"/>\n<smd name=\"2\" x=\"7.95\" y=\"0\" dx=\"3.94\" dy=\"5.97\" layer=\"1\"/>\n<text x=\"-8.75\" y=\"3.9\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-8.75\" y=\"-5.15\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"R1218\" urn=\"urn:adsk.eagle:footprint:25698/1\" library_version=\"1\">\n<description>&lt;b&gt;CRCW1218 Thick Film, Rectangular Chip Resistors&lt;/b&gt;&lt;p&gt;\nSource: http://www.vishay.com .. dcrcw.pdf</description>\n<wire x1=\"-0.913\" y1=\"-2.219\" x2=\"0.939\" y2=\"-2.219\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.913\" y1=\"2.219\" x2=\"-0.939\" y2=\"2.219\" width=\"0.1524\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.475\" y=\"0\" dx=\"1.05\" dy=\"4.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.475\" y=\"0\" dx=\"1.05\" dy=\"4.9\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"2.54\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-3.81\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.651\" y1=\"-2.3\" x2=\"-0.9009\" y2=\"2.3\" layer=\"51\"/>\n<rectangle x1=\"0.9144\" y1=\"-2.3\" x2=\"1.6645\" y2=\"2.3\" layer=\"51\"/>\n</package>\n<package name=\"1812X7R\" urn=\"urn:adsk.eagle:footprint:25699/1\" library_version=\"1\">\n<description>&lt;b&gt;Chip Monolithic Ceramic Capacitors&lt;/b&gt; Medium Voltage High Capacitance for General Use&lt;p&gt;\nSource: http://www.murata.com .. GRM43DR72E224KW01.pdf</description>\n<wire x1=\"-1.1\" y1=\"1.5\" x2=\"1.1\" y2=\"1.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.1\" y1=\"-1.5\" x2=\"-1.1\" y2=\"-1.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-0.6\" y1=\"1.5\" x2=\"0.6\" y2=\"1.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.6\" y1=\"-1.5\" x2=\"-0.6\" y2=\"-1.5\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.425\" y=\"0\" dx=\"0.8\" dy=\"3.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.425\" y=\"0\" dx=\"0.8\" dy=\"3.5\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-1.9456\" y=\"1.9958\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.9456\" y=\"-3.7738\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.4\" y1=\"-1.6\" x2=\"-1.1\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-1.6\" x2=\"1.4\" y2=\"1.6\" layer=\"51\" rot=\"R180\"/>\n</package>\n<package name=\"PRL1632\" urn=\"urn:adsk.eagle:footprint:25700/1\" library_version=\"1\">\n<description>&lt;b&gt;PRL1632 are realized as 1W for 3.2 × 1.6mm(1206)&lt;/b&gt;&lt;p&gt;\nSource: http://www.mouser.com/ds/2/392/products_18-2245.pdf</description>\n<wire x1=\"0.7275\" y1=\"-1.5228\" x2=\"-0.7277\" y2=\"-1.5228\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.7275\" y1=\"1.5228\" x2=\"-0.7152\" y2=\"1.5228\" width=\"0.1524\" layer=\"51\"/>\n<smd name=\"2\" x=\"0.822\" y=\"0\" dx=\"1\" dy=\"3.2\" layer=\"1\"/>\n<smd name=\"1\" x=\"-0.822\" y=\"0\" dx=\"1\" dy=\"3.2\" layer=\"1\"/>\n<text x=\"-1.4\" y=\"1.8\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.4\" y=\"-3\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8\" y1=\"-1.6\" x2=\"-0.4\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"0.4\" y1=\"-1.6\" x2=\"0.8\" y2=\"1.6\" layer=\"51\"/>\n</package>\n<package name=\"R01005\" urn=\"urn:adsk.eagle:footprint:25701/1\" library_version=\"1\">\n<smd name=\"1\" x=\"-0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<text x=\"-0.4\" y=\"0.3\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.4\" y=\"-1.6\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.2\" y1=\"-0.1\" x2=\"-0.075\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"0.075\" y1=\"-0.1\" x2=\"0.2\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.05\" x2=\"0.15\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.1\" x2=\"0.15\" y2=\"-0.05\" layer=\"51\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"R0805\" urn=\"urn:adsk.eagle:package:26059/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R0805\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R0402\" urn=\"urn:adsk.eagle:package:26058/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R0402\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R0603\" urn=\"urn:adsk.eagle:package:26057/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R0603\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R0805W\" urn=\"urn:adsk.eagle:package:26060/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR wave soldering</description>\n<packageinstances>\n<packageinstance name=\"R0805W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1206\" urn=\"urn:adsk.eagle:package:26062/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R1206\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1206W\" urn=\"urn:adsk.eagle:package:26064/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R1206W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1210\" urn=\"urn:adsk.eagle:package:26063/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R1210\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1210W\" urn=\"urn:adsk.eagle:package:26065/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R1210W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2010\" urn=\"urn:adsk.eagle:package:26066/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R2010\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2010W\" urn=\"urn:adsk.eagle:package:26068/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R2010W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2012\" urn=\"urn:adsk.eagle:package:26067/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R2012\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2012W\" urn=\"urn:adsk.eagle:package:26069/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R2012W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2512\" urn=\"urn:adsk.eagle:package:26070/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R2512\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2512W\" urn=\"urn:adsk.eagle:package:26072/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R2512W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R3216\" urn=\"urn:adsk.eagle:package:26071/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R3216\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R3216W\" urn=\"urn:adsk.eagle:package:26074/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R3216W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R3225\" urn=\"urn:adsk.eagle:package:26073/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R3225\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R3225W\" urn=\"urn:adsk.eagle:package:26075/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R3225W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R5025\" urn=\"urn:adsk.eagle:package:26080/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R5025\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R5025W\" urn=\"urn:adsk.eagle:package:26077/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R5025W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R6332\" urn=\"urn:adsk.eagle:package:26076/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nSource: http://download.siliconexpert.com/pdfs/2005/02/24/Semi_Ap/2/VSH/Resistor/dcrcwfre.pdf</description>\n<packageinstances>\n<packageinstance name=\"R6332\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R6332W\" urn=\"urn:adsk.eagle:package:26078/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR wave soldering\nSource: http://download.siliconexpert.com/pdfs/2005/02/24/Semi_Ap/2/VSH/Resistor/dcrcwfre.pdf</description>\n<packageinstances>\n<packageinstance name=\"R6332W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M0805\" urn=\"urn:adsk.eagle:package:26079/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.10 W</description>\n<packageinstances>\n<packageinstance name=\"M0805\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M1206\" urn=\"urn:adsk.eagle:package:26088/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.25 W</description>\n<packageinstances>\n<packageinstance name=\"M1206\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M1406\" urn=\"urn:adsk.eagle:package:26081/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.12 W</description>\n<packageinstances>\n<packageinstance name=\"M1406\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M2012\" urn=\"urn:adsk.eagle:package:26082/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.10 W</description>\n<packageinstances>\n<packageinstance name=\"M2012\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M2309\" urn=\"urn:adsk.eagle:package:26085/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.25 W</description>\n<packageinstances>\n<packageinstance name=\"M2309\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M3216\" urn=\"urn:adsk.eagle:package:26083/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.25 W</description>\n<packageinstances>\n<packageinstance name=\"M3216\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M3516\" urn=\"urn:adsk.eagle:package:26086/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.12 W</description>\n<packageinstances>\n<packageinstance name=\"M3516\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M5923\" urn=\"urn:adsk.eagle:package:26084/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.25 W</description>\n<packageinstances>\n<packageinstance name=\"M5923\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0204/5\" urn=\"urn:adsk.eagle:package:25955/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0204, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"0204/5\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0204/7\" urn=\"urn:adsk.eagle:package:25945/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0204, grid 7.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0204/7\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0204V\" urn=\"urn:adsk.eagle:package:25948/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0204, grid 2.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0204V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/10\" urn=\"urn:adsk.eagle:package:25939/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 10 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/10\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/12\" urn=\"urn:adsk.eagle:package:25938/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 12 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/12\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/15\" urn=\"urn:adsk.eagle:package:25947/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 15mm</description>\n<packageinstances>\n<packageinstance name=\"0207/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/2V\" urn=\"urn:adsk.eagle:package:25941/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 2.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/2V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/5V\" urn=\"urn:adsk.eagle:package:25944/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/5V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/7\" urn=\"urn:adsk.eagle:package:25942/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 7.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/7\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0309/10\" urn=\"urn:adsk.eagle:package:26087/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0309, grid 10mm</description>\n<packageinstances>\n<packageinstance name=\"0309/10\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0309/12\" urn=\"urn:adsk.eagle:package:26089/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0309, grid 12.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0309/12\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0309V\" urn=\"urn:adsk.eagle:package:26090/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0309, grid 2.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0309V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0411/12\" urn=\"urn:adsk.eagle:package:26091/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0411, grid 12.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0411/12\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0411/15\" urn=\"urn:adsk.eagle:package:26093/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0411, grid 15 mm</description>\n<packageinstances>\n<packageinstance name=\"0411/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0411V\" urn=\"urn:adsk.eagle:package:26092/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0411, grid 3.81 mm</description>\n<packageinstances>\n<packageinstance name=\"0411V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0414/15\" urn=\"urn:adsk.eagle:package:26094/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0414, grid 15 mm</description>\n<packageinstances>\n<packageinstance name=\"0414/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0414V\" urn=\"urn:adsk.eagle:package:26095/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0414, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"0414V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0617/17\" urn=\"urn:adsk.eagle:package:26096/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0617, grid 17.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0617/17\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0617/22\" urn=\"urn:adsk.eagle:package:26103/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0617, grid 22.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0617/22\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0617V\" urn=\"urn:adsk.eagle:package:26097/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0617, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"0617V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0922/22\" urn=\"urn:adsk.eagle:package:26107/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0922, grid 22.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0922/22\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"P0613V\" urn=\"urn:adsk.eagle:package:26106/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0613, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"P0613V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"P0613/15\" urn=\"urn:adsk.eagle:package:26098/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0613, grid 15 mm</description>\n<packageinstances>\n<packageinstance name=\"P0613/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"P0817/22\" urn=\"urn:adsk.eagle:package:26099/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0817, grid 22.5 mm</description>\n<packageinstances>\n<packageinstance name=\"P0817/22\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"P0817V\" urn=\"urn:adsk.eagle:package:26100/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0817, grid 6.35 mm</description>\n<packageinstances>\n<packageinstance name=\"P0817V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"V234/12\" urn=\"urn:adsk.eagle:package:26108/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype V234, grid 12.5 mm</description>\n<packageinstances>\n<packageinstance name=\"V234/12\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"V235/17\" urn=\"urn:adsk.eagle:package:26102/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype V235, grid 17.78 mm</description>\n<packageinstances>\n<packageinstance name=\"V235/17\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"V526-0\" urn=\"urn:adsk.eagle:package:26101/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype V526-0, grid 2.5 mm</description>\n<packageinstances>\n<packageinstance name=\"V526-0\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0102R\" urn=\"urn:adsk.eagle:package:26104/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC2211 Reflow Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0102R\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0102W\" urn=\"urn:adsk.eagle:package:26105/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC2211 Wave Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0102W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0204R\" urn=\"urn:adsk.eagle:package:26109/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC3715 Reflow Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0204R\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0204W\" urn=\"urn:adsk.eagle:package:26111/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC3715 Wave Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0204W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0207R\" urn=\"urn:adsk.eagle:package:26113/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC6123 Reflow Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0207R\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0207W\" urn=\"urn:adsk.eagle:package:26112/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC6123 Wave Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0207W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0922V\" urn=\"urn:adsk.eagle:package:26110/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0922, grid 7.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0922V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"RDH/15\" urn=\"urn:adsk.eagle:package:26114/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype RDH, grid 15 mm</description>\n<packageinstances>\n<packageinstance name=\"RDH/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0102AX\" urn=\"urn:adsk.eagle:package:26115/1\" type=\"box\" library_version=\"1\">\n<description>Mini MELF 0102 Axial</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0102AX\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R0201\" urn=\"urn:adsk.eagle:package:26117/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR chip\nSource: http://www.vishay.com/docs/20008/dcrcw.pdf</description>\n<packageinstances>\n<packageinstance name=\"R0201\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA52\" urn=\"urn:adsk.eagle:package:26116/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR52\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA52\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA53\" urn=\"urn:adsk.eagle:package:26118/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR53\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA53\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA54\" urn=\"urn:adsk.eagle:package:26119/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR54\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA54\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA55\" urn=\"urn:adsk.eagle:package:26120/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR55\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA55\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA56\" urn=\"urn:adsk.eagle:package:26129/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR56\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA56\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VMTA55\" urn=\"urn:adsk.eagle:package:26121/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RNC55\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VMTA55\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VMTB60\" urn=\"urn:adsk.eagle:package:26122/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RNC60\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VMTB60\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R4527\" urn=\"urn:adsk.eagle:package:26124/1\" type=\"box\" library_version=\"1\">\n<description>Package 4527\nSource: http://www.vishay.com/docs/31059/wsrhigh.pdf</description>\n<packageinstances>\n<packageinstance name=\"R4527\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC0001\" urn=\"urn:adsk.eagle:package:26123/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC0001\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC0002\" urn=\"urn:adsk.eagle:package:26125/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC0002\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC01/2\" urn=\"urn:adsk.eagle:package:26127/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC01/2\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC2515\" urn=\"urn:adsk.eagle:package:26134/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC2515\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC4527\" urn=\"urn:adsk.eagle:package:26126/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC4527\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC6927\" urn=\"urn:adsk.eagle:package:26128/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC6927\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1218\" urn=\"urn:adsk.eagle:package:26131/1\" type=\"box\" library_version=\"1\">\n<description>CRCW1218 Thick Film, Rectangular Chip Resistors\nSource: http://www.vishay.com .. dcrcw.pdf</description>\n<packageinstances>\n<packageinstance name=\"R1218\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"1812X7R\" urn=\"urn:adsk.eagle:package:26130/1\" type=\"box\" library_version=\"1\">\n<description>Chip Monolithic Ceramic Capacitors Medium Voltage High Capacitance for General Use\nSource: http://www.murata.com .. GRM43DR72E224KW01.pdf</description>\n<packageinstances>\n<packageinstance name=\"1812X7R\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"PRL1632\" urn=\"urn:adsk.eagle:package:26132/1\" type=\"box\" library_version=\"1\">\n<description>PRL1632 are realized as 1W for 3.2 × 1.6mm(1206)\nSource: http://www.mouser.com/ds/2/392/products_18-2245.pdf</description>\n<packageinstances>\n<packageinstance name=\"PRL1632\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R01005\" urn=\"urn:adsk.eagle:package:26133/1\" type=\"box\" library_version=\"1\">\n<packageinstances>\n<packageinstance name=\"R01005\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"R-EU-1\" urn=\"urn:adsk.eagle:symbol:25624/1\" library_version=\"1\">\n<wire x1=\"-2.54\" y1=\"-0.889\" x2=\"2.54\" y2=\"-0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"0.889\" x2=\"-2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-0.889\" x2=\"2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"-0.889\" x2=\"-2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-3.81\" y=\"1.4986\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-3.302\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"2\" x=\"5.08\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"1\" x=\"-5.08\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"R-EU_\" urn=\"urn:adsk.eagle:component:26223/1\" prefix=\"R\" uservalue=\"yes\" library_version=\"1\">\n<description>&lt;B&gt;RESISTOR&lt;/B&gt;, European symbol</description>\n<gates>\n<gate name=\"G$1\" symbol=\"R-EU-1\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"R0402\" package=\"R0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26058/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0603\" package=\"R0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26057/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0805\" package=\"R0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26059/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0805W\" package=\"R0805W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2010W\" package=\"R2010W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26068/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2012\" package=\"R2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26067/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2012W\" package=\"R2012W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance 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pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26071/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3216W\" package=\"R3216W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26074/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3225\" package=\"R3225\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26073/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3225W\" package=\"R3225W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26075/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R5025\" package=\"R5025\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26080/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R5025W\" package=\"R5025W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26077/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R6332\" package=\"R6332\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26076/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R6332W\" package=\"R6332W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26078/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M0805\" package=\"M0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26079/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M1206\" package=\"M1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26088/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M1406\" package=\"M1406\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26081/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M2012\" package=\"M2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26082/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M2309\" package=\"M2309\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26085/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M3216\" package=\"M3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26083/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M3516\" package=\"M3516\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26086/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M5923\" package=\"M5923\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26084/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/5\" package=\"0204/5\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25955/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/7\" package=\"0204/7\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25945/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/2V\" package=\"0204V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25948/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/10\" package=\"0207/10\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25939/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/12\" package=\"0207/12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25938/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/15\" package=\"0207/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25947/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/2V\" package=\"0207/2V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25941/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/5V\" package=\"0207/5V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25944/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/7\" package=\"0207/7\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:25942/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0309/10\" package=\"0309/10\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance 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pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26091/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0411/15\" package=\"0411/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26093/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0411/3V\" package=\"0411V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26092/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0414/15\" package=\"0414/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26094/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0414/5V\" package=\"0414V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26095/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/17\" package=\"0617/17\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26096/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/22\" 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pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26102/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"V526-0\" package=\"V526-0\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26101/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0102R\" package=\"MINI_MELF-0102R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26104/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0102W\" package=\"MINI_MELF-0102W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26105/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0204R\" package=\"MINI_MELF-0204R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26109/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0204W\" package=\"MINI_MELF-0204W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26111/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0207R\" package=\"MINI_MELF-0207R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26113/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0207W\" package=\"MINI_MELF-0207W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26112/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0922V\" package=\"0922V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26110/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"RDH/15\" package=\"RDH/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26114/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MELF0102AX\" package=\"MINI_MELF-0102AX\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26115/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0201\" package=\"R0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26117/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA52\" package=\"VTA52\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26116/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA53\" package=\"VTA53\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26118/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA54\" package=\"VTA54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26119/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA55\" package=\"VTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26120/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA56\" package=\"VTA56\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26129/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTA55\" package=\"VMTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26121/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTB60\" package=\"VMTB60\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26122/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R4527\" package=\"R4527\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26124/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC0001\" package=\"WSC0001\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26123/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC0002\" package=\"WSC0002\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26125/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC01/2\" package=\"WSC01/2\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26127/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC2515\" package=\"WSC2515\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26134/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC4527\" package=\"WSC4527\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26126/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC6927\" package=\"WSC6927\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26128/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1218\" package=\"R1218\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26131/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1812X7R\" package=\"1812X7R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26130/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PRL1632\" package=\"PRL1632\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26132/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"R01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26133/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"switch-ck\">\n<description>&lt;b&gt;C&amp;K Swtiches&lt;/b&gt; - v1.00&lt;p&gt;\nTHIS LIBRARY IS PROVIDED AS IS AND WITHOUT WARRANTY OF ANY KIND, EXPRESSED OR IMPLIED.\nUSE AT YOUR OWN RISK!\n&lt;p&gt;Copyright (C) 2011, Bob Starr&lt;br&gt;\nhttp://www.bobstarr.net</description>\n<packages>\n<package name=\"JS202011SCQN\">\n<description>DPDT SLIDE SWITCH</description>\n<smd name=\"1\" x=\"-2.5\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"0\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"2.5\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"6\" x=\"2.5\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"5\" x=\"0\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-2.5\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<wire x1=\"-4.5\" y1=\"1.8\" x2=\"4.5\" y2=\"1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"1.8\" x2=\"4.5\" y2=\"-1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"-1.8\" x2=\"-4.5\" y2=\"-1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-4.5\" y1=\"-1.8\" x2=\"-4.5\" y2=\"1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"1\" x2=\"2.5\" y2=\"1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"1\" x2=\"2.5\" y2=\"-1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"-1\" x2=\"-2.5\" y2=\"-1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"-1\" x2=\"-2.5\" y2=\"1\" width=\"0.0508\" layer=\"51\"/>\n<rectangle x1=\"-2.25\" y1=\"-0.75\" x2=\"-0.25\" y2=\"0.75\" layer=\"51\"/>\n<wire x1=\"-3.5\" y1=\"2\" x2=\"-4.75\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.75\" y1=\"2\" x2=\"-4.75\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.75\" y1=\"-2\" x2=\"-3.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.5\" y1=\"2\" x2=\"4.75\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.75\" y1=\"2\" x2=\"4.75\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.75\" y1=\"-2\" x2=\"3.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.5\" y1=\"2\" x2=\"-1\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"2\" x2=\"1.5\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"-2\" x2=\"1.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.5\" y1=\"-2\" x2=\"-1\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"-5.25\" y=\"-2\" size=\"1.016\" layer=\"25\" ratio=\"18\" rot=\"R90\">&gt;NAME</text>\n<text x=\"6\" y=\"-2\" size=\"0.8128\" layer=\"27\" ratio=\"10\" rot=\"R90\">&gt;VALUE</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"SLIDE-DPDT\">\n<circle x=\"-2.0638\" y=\"2.54\" radius=\"0.449\" width=\"0.254\" layer=\"94\"/>\n<circle x=\"-2.0638\" y=\"0\" radius=\"0.449\" width=\"0.254\" layer=\"94\"/>\n<circle x=\"-2.0638\" y=\"-2.54\" radius=\"0.449\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"4.1275\" size=\"1.778\" layer=\"95\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-6.0325\" size=\"1.778\" layer=\"96\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-1.2701\" y1=\"-0.3175\" x2=\"-0.635\" y2=\"2.8575\" layer=\"94\"/>\n<pin name=\"1\" x=\"-5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" 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gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"1\" name=\"gnd\" width=\"0.3048\" drill=\"0\">\n</class>\n<class number=\"2\" name=\"three\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"3\" name=\"five\" width=\"0.381\" drill=\"0\">\n</class>\n</classes>\n<parts>\n<part name=\"FPGA\" library=\"10M08SAE144\" deviceset=\"10M08SAE144\" device=\"\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"10M08SAE144C8G\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"P+3\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"P+4\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"CP5\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"CP6\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"+3V1\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND14\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND15\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"OSC\" library=\"crystal\" deviceset=\"ASE\" device=\"\" value=\"ASE-50.000MHZ-ET\">\n<attribute name=\"MPN\" value=\"ASE-50.000MHZ-ET\"/>\n</part>\n<part name=\"GND16\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V2\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"C_OSC\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"0.01uF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\"/>\n</part>\n<part name=\"+3V4\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"CV11\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND22\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CV12\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"+3V5\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"CG13\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"GND21\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CG14\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" 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library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CL1\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL2\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL3\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL4\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CH2\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CH3\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CH4\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CIN5_1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"RLEDPOW\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LEDPOW\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"CIN56_1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"GOLD_ORB_SM1\" library=\"oshw\" deviceset=\"OSHWLOGO\" device=\"LOGO8MM\"/>\n<part name=\"+3V3\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND70\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V9\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND72\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND73\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND74\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND81\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND17\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND29\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND35\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND78\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND18\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND31\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND56\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND82\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$14\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"GND19\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND20\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND28\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND57\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$16\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$4\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"GND30\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND41\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND48\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$5\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$6\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$17\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"+3V11\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND25\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$12\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"GND11\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND49\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND6\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$10\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"+3V12\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND50\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND51\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND52\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND53\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND54\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"FRAME1\" library=\"frames\" library_urn=\"urn:adsk.eagle:library:229\" deviceset=\"A3L-LOC\" device=\"\"/>\n<part name=\"FRAME2\" library=\"frames\" library_urn=\"urn:adsk.eagle:library:229\" deviceset=\"A3L-LOC\" device=\"\"/>\n<part name=\"FRAME3\" library=\"frames\" library_urn=\"urn:adsk.eagle:library:229\" deviceset=\"A3L-LOC\" device=\"\"/>\n<part name=\"S1\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S2\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S3\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S4\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S5\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S6\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S7\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S8\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S9\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"GND55\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND62\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND63\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND79\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND80\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND83\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND84\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND85\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V7\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND86\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n</parts>\n<sheets>\n<sheet>\n<description>Front-End</description>\n<plain>\n<text x=\"7.62\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Front-Ends</text>\n<wire x1=\"5.08\" y1=\"193.04\" x2=\"167.64\" y2=\"193.04\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"193.04\" x2=\"193.04\" y2=\"193.04\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"193.04\" y1=\"193.04\" x2=\"193.04\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"193.04\" y1=\"248.92\" x2=\"193.04\" y2=\"256.54\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"193.04\" y1=\"193.04\" x2=\"358.14\" y2=\"193.04\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"360.68\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 3</text>\n<text x=\"170.18\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 1</text>\n<wire x1=\"358.14\" y1=\"193.04\" x2=\"383.54\" y2=\"193.04\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"5.08\" y1=\"134.62\" x2=\"63.5\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"63.5\" y1=\"134.62\" x2=\"162.56\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"162.56\" y1=\"134.62\" x2=\"193.04\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"193.04\" y1=\"134.62\" x2=\"353.06\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"353.06\" y1=\"134.62\" x2=\"383.54\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"193.04\" y1=\"193.04\" x2=\"193.04\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"170.18\" y=\"187.96\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 2</text>\n<text x=\"360.68\" y=\"187.96\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 4</text>\n<wire x1=\"193.04\" y1=\"185.42\" x2=\"193.04\" y2=\"134.62\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"5.08\" y1=\"248.92\" x2=\"33.02\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"33.02\" y1=\"248.92\" x2=\"33.02\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<text x=\"7.62\" y=\"129.54\" size=\"2.54\" layer=\"97\" font=\"vector\">Front-End gain and offset</text>\n<wire x1=\"5.08\" y1=\"127\" x2=\"63.5\" y2=\"127\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"63.5\" y1=\"127\" x2=\"63.5\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"5.08\" y1=\"33.02\" x2=\"30.48\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"30.48\" y1=\"33.02\" x2=\"162.56\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"162.56\" y1=\"33.02\" x2=\"193.04\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"193.04\" y1=\"33.02\" x2=\"383.54\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"193.04\" y1=\"134.62\" x2=\"193.04\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"193.04\" y1=\"127\" x2=\"193.04\" y2=\"33.02\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"193.04\" x2=\"167.64\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"185.42\" x2=\"193.04\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"256.54\" x2=\"167.64\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"248.92\" x2=\"193.04\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"358.14\" y1=\"256.54\" x2=\"358.14\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"358.14\" y1=\"248.92\" x2=\"383.54\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"358.14\" y1=\"193.04\" x2=\"358.14\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"358.14\" y1=\"185.42\" x2=\"383.54\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"165.1\" y=\"129.54\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 1+2</text>\n<text x=\"355.6\" y=\"129.54\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 3+4</text>\n<wire x1=\"162.56\" y1=\"134.62\" x2=\"162.56\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"162.56\" y1=\"127\" x2=\"193.04\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"353.06\" y1=\"134.62\" x2=\"353.06\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"353.06\" y1=\"127\" x2=\"383.54\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"7.62\" y=\"27.94\" size=\"2.54\" layer=\"97\" font=\"vector\">Offset DAC</text>\n<wire x1=\"5.08\" y1=\"25.4\" x2=\"30.48\" y2=\"25.4\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"30.48\" y1=\"25.4\" x2=\"30.48\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"162.56\" y1=\"33.02\" x2=\"162.56\" y2=\"5.08\" width=\"0.1524\" layer=\"97\"/>\n<text x=\"58.42\" y=\"198.12\" size=\"1.778\" layer=\"91\">4 200 Ohm resistors in parallel\nfor 50 Ohm termination</text>\n<text x=\"121.92\" y=\"198.12\" size=\"1.778\" layer=\"91\">10M Ohm resistor needed for AC coupling mode\nto bring the DC offset to 0.\nThe time constant for the AC couping is\nRC=0.01uF*10M=0.1 sec.</text>\n<text x=\"115.57\" y=\"212.344\" size=\"1.778\" layer=\"91\">These resistors, in parallel with 10M (or 50) Ohm termination, \nsets the input impedance.\nFor the 1.1M case, and high impedance, it is e.g. \n1/(1/1.1M+1/10M)=0.99M (so close to 1M).\nThe caps are for freq compensation.</text>\n<text x=\"38.1\" y=\"251.46\" size=\"1.778\" layer=\"91\">Switch for AC/DC coupling</text>\n<text x=\"30.48\" y=\"203.2\" size=\"1.778\" layer=\"91\">Switch for 1M / 50 Ohm \ninput impedance</text>\n<text x=\"93.98\" y=\"127\" size=\"1.778\" layer=\"91\">Analog switch that sends either\nCh 0 or Ch2 to the first input of ADC2, for oversampling</text>\n<text x=\"284.48\" y=\"127\" size=\"1.778\" layer=\"91\">Analog switch that sends either\nCh 1 or Ch3 to the second input of ADC2, for oversampling</text>\n<text x=\"104.14\" y=\"40.64\" size=\"1.778\" layer=\"91\">Dual channel high-bandwidth op-amps</text>\n<text x=\"73.66\" y=\"106.68\" size=\"1.778\" layer=\"91\">x1 or x10 gain switch</text>\n<text x=\"55.88\" y=\"38.1\" size=\"1.778\" layer=\"91\">These caps reduce \nnoise on the offsets</text>\n<text x=\"7.62\" y=\"40.64\" size=\"1.778\" layer=\"91\">Gain for negative feedback op-amp is R2/R1,\ni.e. (1M+1M)/1.1M = ~2 or ~0.2 for \nlow or high gain.\nCompensation must match the inverse, \ne.g. 5pF/10pF=~1/2 or \n50pF/10pF=~5 for low or high gain.\nVariable caps are added so it can be\nadjusted in situ.</text>\n<wire x1=\"119.888\" y1=\"204.216\" x2=\"83.82\" y2=\"231.14\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"83.82\" y1=\"228.6\" x2=\"83.82\" y2=\"231.14\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"83.82\" y1=\"231.14\" x2=\"86.36\" y2=\"231.14\" width=\"0.254\" layer=\"94\"/>\n</plain>\n<instances>\n<instance part=\"GND27\" gate=\"1\" x=\"27.94\" y=\"218.44\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"215.9\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"J1\" gate=\"G$1\" x=\"17.78\" y=\"228.6\">\n<attribute name=\"MPN\" x=\"25.4\" y=\"228.6\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"13.97\" y=\"231.648\" size=\"1.778\" layer=\"95\" ratio=\"12\"/>\n</instance>\n<instance part=\"J2\" gate=\"G$1\" x=\"17.78\" y=\"167.64\">\n<attribute name=\"MPN\" x=\"25.4\" y=\"167.64\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"13.97\" y=\"170.688\" size=\"1.778\" layer=\"95\" ratio=\"12\"/>\n</instance>\n<instance part=\"J3\" gate=\"G$1\" x=\"208.28\" y=\"228.6\">\n<attribute name=\"MPN\" x=\"215.9\" y=\"228.6\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"204.47\" y=\"231.648\" size=\"1.778\" layer=\"95\" ratio=\"12\"/>\n</instance>\n<instance part=\"J4\" gate=\"G$1\" x=\"208.28\" y=\"167.64\">\n<attribute name=\"MPN\" x=\"215.9\" y=\"167.64\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"204.47\" y=\"170.688\" size=\"1.778\" layer=\"95\" ratio=\"12\"/>\n</instance>\n<instance part=\"U1\" gate=\"A\" x=\"96.52\" y=\"60.96\">\n<attribute name=\"NAME\" x=\"104.14\" y=\"66.04\" size=\"2.0828\" layer=\"95\" ratio=\"6\" rot=\"SR0\"/>\n<attribute name=\"VALUE\" x=\"104.14\" y=\"45.72\" size=\"2.0828\" layer=\"96\" ratio=\"6\" rot=\"SR0\"/>\n</instance>\n<instance part=\"U2\" gate=\"A\" x=\"287.02\" y=\"60.96\">\n<attribute name=\"NAME\" x=\"294.64\" y=\"66.04\" size=\"2.0828\" layer=\"95\" ratio=\"6\" rot=\"SR0\"/>\n<attribute name=\"VALUE\" x=\"294.64\" y=\"45.72\" size=\"2.0828\" layer=\"96\" ratio=\"6\" rot=\"SR0\"/>\n</instance>\n<instance part=\"GAINSW1\" gate=\"G$1\" x=\"83.82\" y=\"96.52\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"83.82\" y=\"96.52\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"78.74\" y=\"102.235\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"76.2\" y=\"86.36\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND9\" gate=\"1\" x=\"96.52\" y=\"198.12\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"195.58\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"RIN1\" gate=\"G$1\" x=\"109.22\" y=\"233.68\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"109.22\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"109.22\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"109.22\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"110.49\" y=\"235.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"110.49\" y=\"230.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN2\" gate=\"G$1\" x=\"109.22\" y=\"172.72\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"109.22\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"109.22\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"109.22\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"110.49\" y=\"174.2186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"110.49\" y=\"169.418\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN3\" gate=\"G$1\" x=\"299.72\" y=\"233.68\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"299.72\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"299.72\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"299.72\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"300.99\" y=\"235.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"300.99\" y=\"230.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN4\" gate=\"G$1\" x=\"299.72\" y=\"172.72\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"299.72\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"299.72\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"299.72\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"300.99\" y=\"174.2186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"300.99\" y=\"169.418\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C5VOPAMP2\" gate=\"G$1\" x=\"231.14\" y=\"111.76\">\n<attribute name=\"MPN\" x=\"231.14\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"232.664\" y=\"112.141\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"232.664\" y=\"107.061\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C5VOPAMP1\" gate=\"G$1\" x=\"40.64\" y=\"111.76\">\n<attribute name=\"MPN\" x=\"40.64\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"42.164\" y=\"112.141\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"42.164\" y=\"107.061\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND40\" gate=\"1\" x=\"96.52\" y=\"48.26\">\n<attribute name=\"VALUE\" x=\"93.98\" y=\"45.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN1_1\" gate=\"G$1\" x=\"43.18\" y=\"71.12\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"43.18\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"43.18\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"43.18\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"44.45\" y=\"72.6186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"44.45\" y=\"67.818\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN2_1\" gate=\"G$1\" x=\"10.16\" y=\"71.12\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"10.16\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"10.16\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"10.16\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.43\" y=\"72.6186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.43\" y=\"67.818\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GAINSW2\" gate=\"G$1\" x=\"175.26\" y=\"101.6\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"175.26\" y=\"104.14\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"182.88\" y=\"107.315\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"185.42\" y=\"91.44\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GAINSW3\" gate=\"G$1\" x=\"274.32\" y=\"96.52\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"274.32\" y=\"96.52\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"269.24\" y=\"102.235\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"266.7\" y=\"86.36\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GAINSW4\" gate=\"G$1\" x=\"365.76\" y=\"101.6\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"365.76\" y=\"101.6\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"373.38\" y=\"107.315\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"375.92\" y=\"91.44\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GAINSW1\" gate=\"P\" x=\"10.16\" y=\"111.76\">\n<attribute name=\"NAME\" x=\"9.525\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GND46\" gate=\"1\" x=\"10.16\" y=\"99.06\">\n<attribute name=\"VALUE\" x=\"7.62\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GAINSW2\" gate=\"P\" x=\"25.4\" y=\"111.76\">\n<attribute name=\"NAME\" x=\"24.765\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GAINSW3\" gate=\"P\" x=\"200.66\" y=\"111.76\">\n<attribute name=\"NAME\" x=\"200.025\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GAINSW4\" gate=\"P\" x=\"215.9\" y=\"111.76\">\n<attribute name=\"NAME\" x=\"215.265\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GND47\" gate=\"1\" x=\"25.4\" y=\"99.06\">\n<attribute name=\"VALUE\" x=\"22.86\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C_AC1\" gate=\"G$1\" x=\"63.5\" y=\"236.22\">\n<attribute name=\"MFN\" x=\"63.5\" y=\"236.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"64.516\" y=\"236.855\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"64.516\" y=\"232.029\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND34\" gate=\"1\" x=\"33.02\" y=\"233.68\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"231.14\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"OVSAMP1\" gate=\"G$1\" x=\"109.22\" y=\"114.3\">\n<attribute name=\"MPN\" x=\"104.14\" y=\"104.14\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"104.14\" y=\"122.555\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"104.14\" y=\"106.68\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"OVSAMP2\" gate=\"G$1\" x=\"299.72\" y=\"114.3\">\n<attribute name=\"MPN\" x=\"294.64\" y=\"104.14\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"294.64\" y=\"122.555\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"294.64\" y=\"106.68\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"OVSAMP2\" gate=\"P\" x=\"248.92\" y=\"111.76\">\n<attribute name=\"NAME\" x=\"248.285\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"OVSAMP1\" gate=\"P\" x=\"58.42\" y=\"111.76\">\n<attribute name=\"NAME\" x=\"57.785\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GND60\" gate=\"1\" x=\"248.92\" y=\"99.06\">\n<attribute name=\"VALUE\" x=\"246.38\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND61\" gate=\"1\" x=\"58.42\" y=\"99.06\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"96.52\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"COFFSETB6\" gate=\"G$1\" x=\"60.96\" y=\"48.26\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"60.96\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"62.484\" y=\"52.959\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"62.484\" y=\"47.879\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND58\" gate=\"1\" x=\"78.74\" y=\"38.1\">\n<attribute name=\"VALUE\" x=\"76.2\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"COFFSETB8\" gate=\"G$1\" x=\"157.48\" y=\"45.72\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"157.48\" y=\"45.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"159.004\" y=\"50.419\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"159.004\" y=\"45.339\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND59\" gate=\"1\" x=\"175.26\" y=\"35.56\">\n<attribute name=\"VALUE\" x=\"172.72\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"COFFSETB10\" gate=\"G$1\" x=\"248.92\" y=\"48.26\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"248.92\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"250.444\" y=\"52.959\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"250.444\" y=\"47.879\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"COFFSETB12\" gate=\"G$1\" x=\"347.98\" y=\"45.72\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"347.98\" y=\"45.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"349.504\" y=\"50.419\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"349.504\" y=\"45.339\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"R50-4\" gate=\"G$1\" x=\"96.52\" y=\"210.82\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"97.79\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"97.79\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-3\" gate=\"G$1\" x=\"83.82\" y=\"210.82\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"85.09\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"85.09\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-2\" gate=\"G$1\" x=\"71.12\" y=\"210.82\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"72.39\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"72.39\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-1\" gate=\"G$1\" x=\"58.42\" y=\"210.82\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"59.69\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"59.69\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-5\" gate=\"G$1\" x=\"58.42\" y=\"149.86\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"59.69\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"59.69\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-6\" gate=\"G$1\" x=\"71.12\" y=\"149.86\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"72.39\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"72.39\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-7\" gate=\"G$1\" x=\"83.82\" y=\"149.86\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"85.09\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"85.09\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-8\" gate=\"G$1\" x=\"96.52\" y=\"149.86\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"97.79\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"97.79\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-9\" gate=\"G$1\" x=\"248.92\" y=\"210.82\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"250.19\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"250.19\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-10\" gate=\"G$1\" x=\"261.62\" y=\"210.82\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"262.89\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"262.89\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-11\" gate=\"G$1\" x=\"274.32\" y=\"210.82\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"275.59\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"275.59\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-12\" gate=\"G$1\" x=\"287.02\" y=\"210.82\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"288.29\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"288.29\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-13\" gate=\"G$1\" x=\"248.92\" y=\"149.86\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"250.19\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"250.19\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-14\" gate=\"G$1\" x=\"261.62\" y=\"149.86\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"262.89\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"262.89\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-15\" gate=\"G$1\" x=\"274.32\" y=\"149.86\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"275.59\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"275.59\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-16\" gate=\"G$1\" x=\"287.02\" y=\"149.86\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"288.29\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"288.29\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"DAC1\" gate=\"G$1\" x=\"88.9\" y=\"17.78\">\n<attribute name=\"MFN\" x=\"88.9\" y=\"17.78\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND39\" gate=\"1\" x=\"109.22\" y=\"7.62\">\n<attribute name=\"VALUE\" x=\"106.68\" y=\"5.08\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND43\" gate=\"1\" x=\"66.04\" y=\"7.62\">\n<attribute name=\"VALUE\" x=\"63.5\" y=\"5.08\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND44\" gate=\"1\" x=\"38.1\" y=\"10.16\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"7.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"COFFSET\" gate=\"G$1\" x=\"38.1\" y=\"17.78\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"38.1\" y=\"17.78\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"39.624\" y=\"17.399\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"39.624\" y=\"22.479\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CGAIN1_1\" gate=\"G$1\" x=\"58.42\" y=\"76.2\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"58.42\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"60.96\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"60.96\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RGAIN3_1\" gate=\"G$1\" x=\"43.18\" y=\"83.82\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"43.18\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"43.18\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"43.18\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"44.45\" y=\"85.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"44.45\" y=\"80.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN4_1\" gate=\"G$1\" x=\"10.16\" y=\"83.82\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"10.16\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"10.16\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"10.16\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.43\" y=\"85.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.43\" y=\"80.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN1_2\" gate=\"G$1\" x=\"132.08\" y=\"76.2\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"132.08\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"132.08\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"132.08\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"133.35\" y=\"77.6986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"133.35\" y=\"72.898\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN2_2\" gate=\"G$1\" x=\"104.14\" y=\"76.2\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"104.14\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"104.14\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"104.14\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"105.41\" y=\"77.6986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"105.41\" y=\"72.898\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CGAIN1_2\" gate=\"G$1\" x=\"147.32\" y=\"81.28\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"149.86\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"149.86\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RGAIN3_2\" gate=\"G$1\" x=\"132.08\" y=\"88.9\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"132.08\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"132.08\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"132.08\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"133.35\" y=\"90.3986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"133.35\" y=\"85.598\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN4_2\" gate=\"G$1\" x=\"104.14\" y=\"88.9\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"104.14\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"104.14\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"104.14\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"105.41\" y=\"90.3986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"105.41\" y=\"85.598\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN1_3\" gate=\"G$1\" x=\"233.68\" y=\"71.12\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"233.68\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"233.68\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"233.68\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"234.95\" y=\"72.6186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"234.95\" y=\"67.818\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN2_3\" gate=\"G$1\" x=\"200.66\" y=\"71.12\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"200.66\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"200.66\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"200.66\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"201.93\" y=\"72.6186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"201.93\" y=\"67.818\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CGAIN1_3\" gate=\"G$1\" x=\"248.92\" y=\"76.2\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"248.92\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"251.46\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"251.46\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RGAIN3_3\" gate=\"G$1\" x=\"233.68\" y=\"83.82\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"233.68\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"233.68\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"233.68\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"234.95\" y=\"85.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"234.95\" y=\"80.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN4_3\" gate=\"G$1\" x=\"200.66\" y=\"83.82\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"200.66\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"200.66\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"200.66\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"201.93\" y=\"85.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"201.93\" y=\"80.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN1_4\" gate=\"G$1\" x=\"322.58\" y=\"76.2\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"322.58\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"322.58\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"322.58\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"77.6986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"72.898\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN2_4\" gate=\"G$1\" x=\"294.64\" y=\"76.2\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"294.64\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"294.64\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"294.64\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"295.91\" y=\"77.6986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"295.91\" y=\"72.898\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CGAIN1_4\" gate=\"G$1\" x=\"337.82\" y=\"81.28\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"337.82\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"340.36\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"340.36\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RGAIN3_4\" gate=\"G$1\" x=\"322.58\" y=\"88.9\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"322.58\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"322.58\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"322.58\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"90.3986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"85.598\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN4_4\" gate=\"G$1\" x=\"294.64\" y=\"88.9\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"294.64\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"294.64\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"294.64\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"295.91\" y=\"90.3986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"295.91\" y=\"85.598\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"K1\" gate=\"G$1\" x=\"45.72\" y=\"241.3\">\n<attribute name=\"NAME\" x=\"38.1\" y=\"247.65\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"233.68\" size=\"1.778\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"C_AC2\" gate=\"G$1\" x=\"63.5\" y=\"175.26\">\n<attribute name=\"MFN\" x=\"63.5\" y=\"175.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"64.516\" y=\"175.895\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"64.516\" y=\"171.069\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"K2\" gate=\"G$1\" x=\"45.72\" y=\"180.34\">\n<attribute name=\"NAME\" x=\"38.1\" y=\"186.69\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"172.72\" size=\"1.778\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"C_AC3\" gate=\"G$1\" x=\"254\" y=\"236.22\">\n<attribute name=\"MFN\" x=\"254\" y=\"236.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"255.016\" y=\"236.855\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"255.016\" y=\"232.029\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"K3\" gate=\"G$1\" x=\"236.22\" y=\"241.3\">\n<attribute name=\"NAME\" x=\"228.6\" y=\"247.65\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n<attribute name=\"VALUE\" x=\"228.6\" y=\"233.68\" size=\"1.778\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"C_AC4\" gate=\"G$1\" x=\"254\" y=\"175.26\">\n<attribute name=\"MFN\" x=\"254\" y=\"175.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"255.016\" y=\"175.895\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"255.016\" y=\"171.069\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"K4\" gate=\"G$1\" x=\"236.22\" y=\"180.34\">\n<attribute name=\"NAME\" x=\"228.6\" y=\"186.69\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n<attribute name=\"VALUE\" x=\"228.6\" y=\"172.72\" size=\"1.778\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"ACR1\" gate=\"G$1\" x=\"27.94\" y=\"243.84\">\n<attribute name=\"OC_NEWARK\" x=\"27.94\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"27.94\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"27.94\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"24.13\" y=\"245.3386\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.13\" y=\"240.538\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ACR2\" gate=\"G$1\" x=\"27.94\" y=\"182.88\">\n<attribute name=\"OC_NEWARK\" x=\"27.94\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"27.94\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"27.94\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"24.13\" y=\"184.3786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.13\" y=\"179.578\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ACR3\" gate=\"G$1\" x=\"218.44\" y=\"243.84\">\n<attribute name=\"OC_NEWARK\" x=\"218.44\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"218.44\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"218.44\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"214.63\" y=\"245.3386\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"214.63\" y=\"240.538\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ACR4\" gate=\"G$1\" x=\"218.44\" y=\"182.88\">\n<attribute name=\"OC_NEWARK\" x=\"218.44\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"218.44\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"218.44\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"214.63\" y=\"184.3786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"214.63\" y=\"179.578\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN1_11K\" gate=\"G$1\" x=\"132.08\" y=\"233.68\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"132.08\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"132.08\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"132.08\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"133.35\" y=\"235.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"133.35\" y=\"230.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN2_11K\" gate=\"G$1\" x=\"132.08\" y=\"172.72\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"132.08\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"132.08\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"132.08\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"133.35\" y=\"174.2186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"133.35\" y=\"169.418\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN3_11K\" gate=\"G$1\" x=\"322.58\" y=\"233.68\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"322.58\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"322.58\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"322.58\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"235.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"230.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN4_11K\" gate=\"G$1\" x=\"322.58\" y=\"172.72\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"322.58\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"322.58\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"322.58\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"174.2186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"169.418\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN1NF_1\" gate=\"G$1\" x=\"147.32\" y=\"233.68\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"148.336\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"148.336\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN1NF_2\" gate=\"G$1\" x=\"147.32\" y=\"172.72\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"148.336\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"148.336\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN1NF_3\" gate=\"G$1\" x=\"337.82\" y=\"233.68\">\n<attribute name=\"MPN\" x=\"337.82\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"338.836\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"338.836\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN1NF_4\" gate=\"G$1\" x=\"337.82\" y=\"172.72\">\n<attribute name=\"MPN\" x=\"337.82\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"338.836\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"338.836\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ROFFSET1\" gate=\"G$1\" x=\"129.54\" y=\"12.7\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"111.76\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"134.62\" y=\"12.7\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ROFFSET2\" gate=\"G$1\" x=\"129.54\" y=\"15.24\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"111.76\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"134.62\" y=\"15.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ROFFSET3\" gate=\"G$1\" x=\"129.54\" y=\"17.78\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"111.76\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"134.62\" y=\"17.78\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ROFFSET4\" gate=\"G$1\" x=\"129.54\" y=\"20.32\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"111.76\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"134.62\" y=\"20.32\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$2\" gate=\"G$1\" x=\"10.16\" y=\"121.92\">\n<attribute name=\"VALUE\" x=\"10.16\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$3\" gate=\"G$1\" x=\"25.4\" y=\"121.92\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$7\" gate=\"G$1\" x=\"157.48\" y=\"63.5\">\n<attribute name=\"VALUE\" x=\"157.48\" y=\"66.294\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$8\" gate=\"G$1\" x=\"66.04\" y=\"25.4\">\n<attribute name=\"VALUE\" x=\"66.04\" y=\"28.194\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$13\" gate=\"G$1\" x=\"58.42\" y=\"121.92\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"58.42\" y=\"124.714\" size=\"1.778\" layer=\"96\" rot=\"MR0\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$15\" gate=\"G$1\" x=\"248.92\" y=\"121.92\">\n<attribute name=\"VALUE\" x=\"248.92\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"COFFSETA6\" gate=\"G$1\" x=\"78.74\" y=\"48.26\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"78.74\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"79.756\" y=\"52.705\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"79.756\" y=\"47.371\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"COFFSETA1\" gate=\"G$1\" x=\"175.26\" y=\"45.72\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"175.26\" y=\"45.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"176.276\" y=\"50.165\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"176.276\" y=\"44.831\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"COFFSETA2\" gate=\"G$1\" x=\"269.24\" y=\"48.26\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"269.24\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"270.256\" y=\"52.705\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"270.256\" y=\"47.371\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"COFFSETA3\" gate=\"G$1\" x=\"365.76\" y=\"45.72\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"365.76\" y=\"45.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"366.776\" y=\"50.165\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"366.776\" y=\"44.831\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RIN5\" gate=\"G$1\" x=\"76.2\" y=\"236.22\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"76.2\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"76.2\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"76.2\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"77.47\" y=\"237.7186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"77.47\" y=\"232.918\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN6\" gate=\"G$1\" x=\"76.2\" y=\"175.26\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"76.2\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"76.2\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"76.2\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"77.47\" y=\"176.7586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"77.47\" y=\"171.958\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN7\" gate=\"G$1\" x=\"266.7\" y=\"236.22\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"266.7\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"266.7\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"266.7\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"267.97\" y=\"237.7186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"267.97\" y=\"232.918\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN8\" gate=\"G$1\" x=\"266.7\" y=\"175.26\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"266.7\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"266.7\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"266.7\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"267.97\" y=\"176.7586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"267.97\" y=\"171.958\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND77\" gate=\"1\" x=\"76.2\" y=\"226.06\">\n<attribute name=\"VALUE\" x=\"73.66\" y=\"223.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CH1\" gate=\"G$1\" x=\"25.4\" y=\"78.74\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"25.4\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"27.94\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"27.94\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CL1\" gate=\"G$1\" x=\"73.66\" y=\"78.74\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"73.66\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"76.2\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"76.2\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CL2\" gate=\"G$1\" x=\"165.1\" y=\"83.82\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"165.1\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"167.64\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"167.64\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CL3\" gate=\"G$1\" x=\"264.16\" y=\"78.74\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"264.16\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"266.7\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"266.7\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CL4\" gate=\"G$1\" x=\"355.6\" y=\"83.82\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"355.6\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"358.14\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"358.14\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CH2\" gate=\"G$1\" x=\"119.38\" y=\"83.82\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"119.38\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"121.92\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"121.92\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CH3\" gate=\"G$1\" x=\"215.9\" y=\"78.74\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"215.9\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"218.44\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"218.44\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CH4\" gate=\"G$1\" x=\"309.88\" y=\"83.82\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"309.88\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"312.42\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"312.42\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CIN5_1\" gate=\"G$1\" x=\"119.38\" y=\"233.68\">\n<attribute name=\"MPN\" x=\"119.38\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"120.396\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"120.396\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN5_2\" gate=\"G$1\" x=\"119.38\" y=\"172.72\">\n<attribute name=\"MPN\" x=\"119.38\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"120.396\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"120.396\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN5_3\" gate=\"G$1\" x=\"309.88\" y=\"233.68\">\n<attribute name=\"MPN\" x=\"309.88\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"310.896\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"310.896\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN5_4\" gate=\"G$1\" x=\"309.88\" y=\"172.72\">\n<attribute name=\"MPN\" x=\"309.88\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"310.896\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"310.896\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN56_1\" gate=\"G$1\" x=\"162.56\" y=\"233.68\">\n<attribute name=\"MPN\" x=\"162.56\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"163.576\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"163.576\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN56_2\" gate=\"G$1\" x=\"162.56\" y=\"172.72\">\n<attribute name=\"MPN\" x=\"162.56\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"163.576\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"163.576\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN56_3\" gate=\"G$1\" x=\"353.06\" y=\"233.68\">\n<attribute name=\"MPN\" x=\"353.06\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"354.076\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"354.076\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN56_4\" gate=\"G$1\" x=\"353.06\" y=\"172.72\">\n<attribute name=\"MPN\" x=\"353.06\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"354.076\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"354.076\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND72\" gate=\"1\" x=\"27.94\" y=\"157.48\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"30.48\" y=\"154.94\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND73\" gate=\"1\" x=\"96.52\" y=\"137.16\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"93.98\" y=\"137.16\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND74\" gate=\"1\" x=\"33.02\" y=\"172.72\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"170.18\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND81\" gate=\"1\" x=\"76.2\" y=\"165.1\">\n<attribute name=\"VALUE\" x=\"73.66\" y=\"162.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND17\" gate=\"1\" x=\"218.44\" y=\"218.44\">\n<attribute name=\"VALUE\" x=\"215.9\" y=\"215.9\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND29\" gate=\"1\" x=\"287.02\" y=\"198.12\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"289.56\" y=\"195.58\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND35\" gate=\"1\" x=\"223.52\" y=\"233.68\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"231.14\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND78\" gate=\"1\" x=\"266.7\" y=\"226.06\">\n<attribute name=\"VALUE\" x=\"264.16\" y=\"223.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND18\" gate=\"1\" x=\"218.44\" y=\"157.48\">\n<attribute name=\"VALUE\" x=\"215.9\" y=\"154.94\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND31\" gate=\"1\" x=\"287.02\" y=\"137.16\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"284.48\" y=\"137.16\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND56\" gate=\"1\" x=\"223.52\" y=\"172.72\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"170.18\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND82\" gate=\"1\" x=\"266.7\" y=\"165.1\">\n<attribute name=\"VALUE\" x=\"264.16\" y=\"162.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$14\" gate=\"G$1\" x=\"40.64\" y=\"121.92\">\n<attribute name=\"VALUE\" x=\"40.64\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"GND19\" gate=\"1\" x=\"40.64\" y=\"99.06\">\n<attribute name=\"VALUE\" x=\"38.1\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND20\" gate=\"1\" x=\"287.02\" y=\"48.26\">\n<attribute name=\"VALUE\" x=\"284.48\" y=\"45.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND28\" gate=\"1\" x=\"269.24\" y=\"38.1\">\n<attribute name=\"VALUE\" x=\"266.7\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND57\" gate=\"1\" x=\"365.76\" y=\"35.56\">\n<attribute name=\"VALUE\" x=\"363.22\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$16\" gate=\"G$1\" x=\"347.98\" y=\"63.5\">\n<attribute name=\"VALUE\" x=\"347.98\" y=\"66.294\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$4\" gate=\"G$1\" x=\"231.14\" y=\"121.92\">\n<attribute name=\"VALUE\" x=\"231.14\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"GND30\" gate=\"1\" x=\"231.14\" y=\"99.06\">\n<attribute name=\"VALUE\" x=\"228.6\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND41\" gate=\"1\" x=\"215.9\" y=\"99.06\">\n<attribute name=\"VALUE\" x=\"213.36\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND48\" gate=\"1\" x=\"200.66\" y=\"99.06\">\n<attribute name=\"VALUE\" x=\"198.12\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$5\" gate=\"G$1\" x=\"215.9\" y=\"121.92\">\n<attribute name=\"VALUE\" x=\"215.9\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$6\" gate=\"G$1\" x=\"200.66\" y=\"121.92\">\n<attribute name=\"VALUE\" x=\"200.66\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$17\" gate=\"G$1\" x=\"38.1\" y=\"25.4\">\n<attribute name=\"VALUE\" x=\"38.1\" y=\"28.194\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"FRAME2\" gate=\"G$1\" x=\"0\" y=\"0\">\n<attribute name=\"DRAWING_NAME\" x=\"344.17\" y=\"15.24\" size=\"2.54\" layer=\"94\"/>\n<attribute name=\"LAST_DATE_TIME\" x=\"344.17\" y=\"10.16\" size=\"2.286\" layer=\"94\"/>\n<attribute name=\"SHEET\" x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\"/>\n</instance>\n<instance part=\"S1\" gate=\"G$1\" x=\"50.8\" y=\"220.98\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"48.26\" y=\"225.1075\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"214.9475\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S2\" gate=\"G$1\" x=\"50.8\" y=\"160.02\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"48.26\" y=\"164.1475\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"153.9875\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S3\" gate=\"G$1\" x=\"241.3\" y=\"220.98\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"238.76\" y=\"225.1075\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"228.6\" y=\"214.9475\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S4\" gate=\"G$1\" x=\"241.3\" y=\"160.02\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"238.76\" y=\"164.1475\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"228.6\" y=\"153.9875\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S5\" gate=\"G$1\" x=\"99.06\" y=\"243.84\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"96.52\" y=\"247.9675\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"88.9\" y=\"237.8075\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S6\" gate=\"G$1\" x=\"99.06\" y=\"182.88\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"96.52\" y=\"187.0075\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"88.9\" y=\"176.8475\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S7\" gate=\"G$1\" x=\"289.56\" y=\"243.84\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"287.02\" y=\"247.9675\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"279.4\" y=\"237.8075\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S8\" gate=\"G$1\" x=\"289.56\" y=\"182.88\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"287.02\" y=\"187.0075\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"279.4\" y=\"176.8475\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"GND55\" gate=\"1\" x=\"38.1\" y=\"213.36\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"210.82\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND62\" gate=\"1\" x=\"88.9\" y=\"236.22\">\n<attribute name=\"VALUE\" x=\"86.36\" y=\"233.68\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND63\" gate=\"1\" x=\"38.1\" y=\"149.86\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"147.32\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND79\" gate=\"1\" x=\"228.6\" y=\"213.36\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"210.82\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND80\" gate=\"1\" x=\"279.4\" y=\"236.22\">\n<attribute name=\"VALUE\" x=\"276.86\" y=\"233.68\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND83\" gate=\"1\" x=\"228.6\" y=\"152.4\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"149.86\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND84\" gate=\"1\" x=\"279.4\" y=\"175.26\">\n<attribute name=\"VALUE\" x=\"276.86\" y=\"172.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND86\" gate=\"1\" x=\"88.9\" y=\"175.26\">\n<attribute name=\"VALUE\" x=\"86.36\" y=\"172.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"GND\" class=\"1\">\n<segment>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND27\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"27.94\" y1=\"220.98\" x2=\"27.94\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"223.52\" x2=\"25.4\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"U1\" gate=\"A\" pin=\"V-\"/>\n<pinref part=\"GND40\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"96.52\" y1=\"50.8\" x2=\"96.52\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"53.34\" x2=\"99.06\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND46\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"GAINSW1\" gate=\"P\" pin=\"GND\"/>\n<wire x1=\"10.16\" y1=\"104.14\" x2=\"10.16\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW2\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND47\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"25.4\" y1=\"101.6\" x2=\"25.4\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND60\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"248.92\" y1=\"101.6\" x2=\"248.92\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND61\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"58.42\" y1=\"101.6\" x2=\"58.42\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND58\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"COFFSETA6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"78.74\" y1=\"40.64\" x2=\"78.74\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETB6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"78.74\" y1=\"43.18\" x2=\"78.74\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"60.96\" y1=\"45.72\" x2=\"60.96\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"60.96\" y1=\"43.18\" x2=\"78.74\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"78.74\" y=\"43.18\"/>\n</segment>\n<segment>\n<pinref part=\"GND59\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"COFFSETA1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"175.26\" y1=\"38.1\" x2=\"175.26\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETB8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"157.48\" y1=\"43.18\" x2=\"175.26\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"175.26\" y=\"43.18\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"GND39\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"109.22\" y1=\"10.16\" x2=\"109.22\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"109.22\" y1=\"22.86\" x2=\"106.68\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"!LDAC\"/>\n<pinref part=\"GND43\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"66.04\" y1=\"10.16\" x2=\"66.04\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"66.04\" y1=\"15.24\" x2=\"68.58\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"COFFSET\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND44\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"38.1\" y1=\"15.24\" x2=\"38.1\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"K\"/>\n<pinref part=\"GND34\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"33.02\" y1=\"236.22\" x2=\"33.02\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"33.02\" y1=\"238.76\" x2=\"35.56\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"RIN5\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND77\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"76.2\" y1=\"231.14\" x2=\"76.2\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND72\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"27.94\" y1=\"160.02\" x2=\"27.94\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"162.56\" x2=\"25.4\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND74\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"33.02\" y1=\"175.26\" x2=\"33.02\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"33.02\" y1=\"177.8\" x2=\"35.56\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"K\"/>\n</segment>\n<segment>\n<pinref part=\"GND81\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"76.2\" y1=\"170.18\" x2=\"76.2\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN6\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n<segment>\n<pinref part=\"GND17\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"218.44\" y1=\"220.98\" x2=\"218.44\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"218.44\" y1=\"223.52\" x2=\"215.9\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND35\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"223.52\" y1=\"236.22\" x2=\"223.52\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"238.76\" x2=\"226.06\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"K\"/>\n</segment>\n<segment>\n<pinref part=\"GND78\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"266.7\" y1=\"231.14\" x2=\"266.7\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN7\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n<segment>\n<pinref part=\"GND18\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"218.44\" y1=\"160.02\" x2=\"218.44\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"218.44\" y1=\"162.56\" x2=\"215.9\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND56\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"223.52\" y1=\"175.26\" x2=\"223.52\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"177.8\" x2=\"226.06\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"K\"/>\n</segment>\n<segment>\n<pinref part=\"GND82\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"266.7\" y1=\"170.18\" x2=\"266.7\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN8\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n<segment>\n<pinref part=\"R50-4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"96.52\" y1=\"203.2\" x2=\"83.82\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"203.2\" x2=\"71.12\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"71.12\" y1=\"203.2\" x2=\"58.42\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"205.74\" x2=\"96.52\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"96.52\" y=\"203.2\"/>\n<pinref part=\"R50-3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"83.82\" y1=\"205.74\" x2=\"83.82\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"203.2\"/>\n<pinref part=\"R50-2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"71.12\" y1=\"205.74\" x2=\"71.12\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"71.12\" y=\"203.2\"/>\n<pinref part=\"R50-1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"58.42\" y1=\"205.74\" x2=\"58.42\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND9\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"96.52\" y1=\"203.2\" x2=\"96.52\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<wire x1=\"58.42\" y1=\"142.24\" x2=\"71.12\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND73\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"71.12\" y1=\"142.24\" x2=\"83.82\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"142.24\" x2=\"96.52\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"139.7\" x2=\"96.52\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"58.42\" y1=\"144.78\" x2=\"58.42\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"71.12\" y1=\"144.78\" x2=\"71.12\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"71.12\" y=\"142.24\"/>\n<pinref part=\"R50-7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"83.82\" y1=\"144.78\" x2=\"83.82\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"142.24\"/>\n<pinref part=\"R50-8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"96.52\" y1=\"144.78\" x2=\"96.52\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"96.52\" y=\"142.24\"/>\n</segment>\n<segment>\n<pinref part=\"R50-9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"205.74\" x2=\"248.92\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-10\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"203.2\" x2=\"261.62\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"261.62\" y1=\"203.2\" x2=\"261.62\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-11\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"261.62\" y1=\"203.2\" x2=\"274.32\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"203.2\" x2=\"274.32\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"261.62\" y=\"203.2\"/>\n<pinref part=\"R50-12\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"274.32\" y1=\"203.2\" x2=\"287.02\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"203.2\" x2=\"287.02\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"203.2\"/>\n<junction x=\"287.02\" y=\"203.2\"/>\n<pinref part=\"GND29\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"287.02\" y1=\"200.66\" x2=\"287.02\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"R50-13\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"144.78\" x2=\"248.92\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-14\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"142.24\" x2=\"261.62\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"261.62\" y1=\"142.24\" x2=\"261.62\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-15\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"261.62\" y1=\"142.24\" x2=\"274.32\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"142.24\" x2=\"274.32\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"261.62\" y=\"142.24\"/>\n<pinref part=\"R50-16\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"287.02\" y1=\"144.78\" x2=\"287.02\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"142.24\" x2=\"274.32\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"142.24\"/>\n<junction x=\"287.02\" y=\"142.24\"/>\n<pinref part=\"GND31\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"287.02\" y1=\"139.7\" x2=\"287.02\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND19\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"40.64\" y1=\"101.6\" x2=\"40.64\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND20\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"287.02\" y1=\"50.8\" x2=\"287.02\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"53.34\" x2=\"289.56\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"V-\"/>\n</segment>\n<segment>\n<pinref part=\"GND28\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"269.24\" y1=\"40.64\" x2=\"269.24\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"43.18\" x2=\"269.24\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"45.72\" x2=\"248.92\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"43.18\" x2=\"269.24\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"269.24\" y=\"43.18\"/>\n<pinref part=\"COFFSETA2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"COFFSETB10\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<pinref part=\"GND57\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"365.76\" y1=\"38.1\" x2=\"365.76\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"347.98\" y1=\"43.18\" x2=\"365.76\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"365.76\" y=\"43.18\"/>\n<pinref part=\"COFFSETA3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"COFFSETB12\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND30\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"231.14\" y1=\"101.6\" x2=\"231.14\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW4\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND41\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"215.9\" y1=\"101.6\" x2=\"215.9\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND48\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"GAINSW3\" gate=\"P\" pin=\"GND\"/>\n<wire x1=\"200.66\" y1=\"104.14\" x2=\"200.66\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S1\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"GND55\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"45.72\" y1=\"218.44\" x2=\"38.1\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"38.1\" y1=\"218.44\" x2=\"38.1\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"GND62\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"93.98\" y1=\"241.3\" x2=\"88.9\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"88.9\" y1=\"241.3\" x2=\"88.9\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S2\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"45.72\" y1=\"157.48\" x2=\"38.1\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"38.1\" y1=\"157.48\" x2=\"38.1\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND63\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"S3\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"236.22\" y1=\"218.44\" x2=\"228.6\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND79\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"228.6\" y1=\"218.44\" x2=\"228.6\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"284.48\" y1=\"241.3\" x2=\"279.4\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"279.4\" y1=\"241.3\" x2=\"279.4\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND80\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"S4\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"236.22\" y1=\"157.48\" x2=\"228.6\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"228.6\" y1=\"157.48\" x2=\"228.6\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND83\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"93.98\" y1=\"180.34\" x2=\"88.9\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND86\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"88.9\" y1=\"180.34\" x2=\"88.9\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"284.48\" y1=\"180.34\" x2=\"279.4\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND84\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"279.4\" y1=\"180.34\" x2=\"279.4\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L21_SDA\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"SDA\"/>\n<wire x1=\"68.58\" y1=\"17.78\" x2=\"53.34\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INA2\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"101.6\" y1=\"116.84\" x2=\"93.98\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"93.98\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"284.48\" y1=\"93.98\" x2=\"287.02\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"93.98\" x2=\"287.02\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"60.96\" x2=\"289.56\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"269.24\" y=\"60.96\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"287.02\" y1=\"60.96\" x2=\"269.24\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"287.02\" y=\"60.96\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"X\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"OUTA\"/>\n</segment>\n</net>\n<net name=\"INB1\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"284.48\" y1=\"119.38\" x2=\"292.1\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"284.48\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"U1\" gate=\"A\" pin=\"OUTB\"/>\n<wire x1=\"154.94\" y1=\"58.42\" x2=\"162.56\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"167.64\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"162.56\" y1=\"58.42\" x2=\"180.34\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"58.42\" x2=\"162.56\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"58.42\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"185.42\" y1=\"99.06\" x2=\"187.96\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"187.96\" y1=\"99.06\" x2=\"187.96\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"187.96\" y1=\"88.9\" x2=\"162.56\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INB2\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"292.1\" y1=\"116.84\" x2=\"284.48\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"284.48\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"345.44\" y1=\"58.42\" x2=\"353.06\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"358.14\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"353.06\" y1=\"58.42\" x2=\"368.3\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"58.42\" x2=\"353.06\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"58.42\"/>\n<wire x1=\"375.92\" y1=\"99.06\" x2=\"381\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"381\" y1=\"99.06\" x2=\"381\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"381\" y1=\"88.9\" x2=\"353.06\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"X\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"OUTB\"/>\n</segment>\n</net>\n<net name=\"INA1\" class=\"0\">\n<segment>\n<pinref part=\"U1\" gate=\"A\" pin=\"OUTA\"/>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"93.98\" y1=\"93.98\" x2=\"96.52\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"93.98\" x2=\"96.52\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"60.96\" x2=\"99.06\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"78.74\" y=\"60.96\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"96.52\" y1=\"60.96\" x2=\"78.74\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"96.52\" y=\"60.96\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"101.6\" y1=\"119.38\" x2=\"93.98\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"93.98\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INBMINUS1\" class=\"0\">\n<segment>\n<wire x1=\"119.38\" y1=\"165.1\" x2=\"132.08\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"170.18\" y=\"165.1\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"132.08\" y1=\"165.1\" x2=\"147.32\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"165.1\" x2=\"162.56\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"165.1\" x2=\"182.88\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"167.64\" x2=\"119.38\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"109.22\" y1=\"167.64\" x2=\"109.22\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"109.22\" y1=\"165.1\" x2=\"119.38\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"165.1\"/>\n<pinref part=\"RIN2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CIN5_2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RIN2_11K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"132.08\" y1=\"167.64\" x2=\"132.08\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"165.1\"/>\n<pinref part=\"CIN1NF_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"167.64\" x2=\"147.32\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"165.1\"/>\n<pinref part=\"CIN56_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"162.56\" y1=\"167.64\" x2=\"162.56\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"165.1\"/>\n</segment>\n<segment>\n<pinref part=\"U1\" gate=\"A\" pin=\"-INB\"/>\n<wire x1=\"154.94\" y1=\"55.88\" x2=\"165.1\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"167.64\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"165.1\" y1=\"55.88\" x2=\"180.34\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"165.1\" y1=\"55.88\" x2=\"165.1\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"165.1\" y=\"55.88\"/>\n<wire x1=\"165.1\" y1=\"63.5\" x2=\"165.1\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"165.1\" y1=\"68.58\" x2=\"147.32\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"68.58\" x2=\"132.08\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CGAIN1_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"147.32\" y1=\"78.74\" x2=\"147.32\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"68.58\"/>\n<pinref part=\"CL2\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"165.1\" y1=\"78.74\" x2=\"165.1\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"165.1\" y=\"68.58\"/>\n<wire x1=\"132.08\" y1=\"68.58\" x2=\"119.38\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"68.58\" x2=\"104.14\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CH2\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"119.38\" y1=\"78.74\" x2=\"119.38\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"68.58\"/>\n<pinref part=\"RGAIN2_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"104.14\" y1=\"71.12\" x2=\"104.14\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN1_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"132.08\" y1=\"71.12\" x2=\"132.08\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"68.58\"/>\n</segment>\n</net>\n<net name=\"INBMINUS2\" class=\"0\">\n<segment>\n<wire x1=\"309.88\" y1=\"165.1\" x2=\"322.58\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"358.14\" y=\"165.1\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"322.58\" y1=\"165.1\" x2=\"337.82\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"165.1\" x2=\"353.06\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"165.1\" x2=\"370.84\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"167.64\" x2=\"309.88\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"167.64\" x2=\"299.72\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"165.1\" x2=\"309.88\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"165.1\"/>\n<pinref part=\"RIN4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CIN5_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RIN4_11K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"322.58\" y1=\"167.64\" x2=\"322.58\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"165.1\"/>\n<pinref part=\"CIN1NF_4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"337.82\" y1=\"167.64\" x2=\"337.82\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"165.1\"/>\n<pinref part=\"CIN56_4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"353.06\" y1=\"167.64\" x2=\"353.06\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"165.1\"/>\n</segment>\n<segment>\n<wire x1=\"345.44\" y1=\"55.88\" x2=\"355.6\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"358.14\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"355.6\" y1=\"55.88\" x2=\"370.84\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"355.6\" y1=\"55.88\" x2=\"355.6\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"355.6\" y=\"55.88\"/>\n<wire x1=\"355.6\" y1=\"63.5\" x2=\"355.6\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"355.6\" y1=\"68.58\" x2=\"337.82\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"68.58\" x2=\"322.58\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"68.58\" x2=\"322.58\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"78.74\" x2=\"337.82\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"68.58\"/>\n<wire x1=\"355.6\" y1=\"78.74\" x2=\"355.6\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"355.6\" y=\"68.58\"/>\n<wire x1=\"322.58\" y1=\"68.58\" x2=\"309.88\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"68.58\" x2=\"294.64\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"294.64\" y1=\"68.58\" x2=\"294.64\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"68.58\"/>\n<wire x1=\"309.88\" y1=\"78.74\" x2=\"309.88\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"68.58\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"-INB\"/>\n<pinref part=\"CH4\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"RGAIN2_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN1_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CL4\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"CGAIN1_4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"OFFSET1\" class=\"0\">\n<segment>\n<wire x1=\"134.62\" y1=\"12.7\" x2=\"157.48\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ROFFSET1\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<pinref part=\"COFFSETB6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"60.96\" y1=\"53.34\" x2=\"60.96\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"78.74\" y1=\"55.88\" x2=\"78.74\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"78.74\" y1=\"55.88\" x2=\"60.96\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"+INA\"/>\n<wire x1=\"99.06\" y1=\"55.88\" x2=\"78.74\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"78.74\" y=\"55.88\"/>\n<wire x1=\"60.96\" y1=\"55.88\" x2=\"48.26\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"60.96\" y=\"55.88\"/>\n<label x=\"48.26\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INAMINUS1\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"73.66\" y1=\"63.5\" x2=\"58.42\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"63.5\" x2=\"43.18\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"43.18\" y1=\"63.5\" x2=\"43.18\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CL1\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"73.66\" y1=\"73.66\" x2=\"73.66\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"73.66\" y=\"63.5\"/>\n<pinref part=\"CGAIN1_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"73.66\" x2=\"58.42\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"63.5\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"-INA\"/>\n<wire x1=\"99.06\" y1=\"58.42\" x2=\"93.98\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"58.42\" x2=\"93.98\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"63.5\" x2=\"73.66\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"58.42\" x2=\"78.74\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"58.42\"/>\n<label x=\"78.74\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"43.18\" y1=\"63.5\" x2=\"25.4\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"43.18\" y=\"63.5\"/>\n<pinref part=\"RGAIN2_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"25.4\" y1=\"63.5\" x2=\"10.16\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"63.5\" x2=\"10.16\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CH1\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"25.4\" y1=\"73.66\" x2=\"25.4\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"25.4\" y=\"63.5\"/>\n</segment>\n<segment>\n<label x=\"172.72\" y=\"226.06\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"CIN56_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"162.56\" y1=\"228.6\" x2=\"162.56\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"226.06\" x2=\"185.42\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN1NF_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"162.56\" y1=\"226.06\" x2=\"147.32\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"226.06\" x2=\"147.32\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"226.06\"/>\n<pinref part=\"RIN1_11K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"226.06\" x2=\"132.08\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"132.08\" y1=\"226.06\" x2=\"132.08\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"226.06\"/>\n<pinref part=\"CIN5_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"119.38\" y1=\"228.6\" x2=\"119.38\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"226.06\" x2=\"132.08\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"226.06\"/>\n<pinref part=\"RIN1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"109.22\" y1=\"228.6\" x2=\"109.22\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"109.22\" y1=\"226.06\" x2=\"119.38\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"226.06\"/>\n</segment>\n</net>\n<net name=\"OFFSET2\" class=\"0\">\n<segment>\n<label x=\"177.8\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"+INB\"/>\n<pinref part=\"COFFSETB8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"154.94\" y1=\"53.34\" x2=\"157.48\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"53.34\" x2=\"157.48\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"53.34\" x2=\"175.26\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"157.48\" y=\"53.34\"/>\n<pinref part=\"COFFSETA1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"175.26\" y1=\"53.34\" x2=\"187.96\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"175.26\" y1=\"50.8\" x2=\"175.26\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"175.26\" y=\"53.34\"/>\n</segment>\n<segment>\n<wire x1=\"134.62\" y1=\"15.24\" x2=\"157.48\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ROFFSET2\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"OFFSET3\" class=\"0\">\n<segment>\n<wire x1=\"134.62\" y1=\"17.78\" x2=\"157.48\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ROFFSET3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<wire x1=\"248.92\" y1=\"53.34\" x2=\"248.92\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"55.88\" x2=\"269.24\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"55.88\" x2=\"248.92\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"289.56\" y1=\"55.88\" x2=\"269.24\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"269.24\" y=\"55.88\"/>\n<wire x1=\"248.92\" y1=\"55.88\" x2=\"233.68\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"55.88\"/>\n<label x=\"233.68\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"+INA\"/>\n<pinref part=\"COFFSETA2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"COFFSETB10\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"OFFSET4\" class=\"0\">\n<segment>\n<wire x1=\"157.48\" y1=\"20.32\" x2=\"134.62\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ROFFSET4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<label x=\"368.3\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"345.44\" y1=\"53.34\" x2=\"347.98\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"347.98\" y1=\"53.34\" x2=\"347.98\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"347.98\" y1=\"53.34\" x2=\"365.76\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"347.98\" y=\"53.34\"/>\n<wire x1=\"365.76\" y1=\"53.34\" x2=\"381\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"365.76\" y1=\"50.8\" x2=\"365.76\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"365.76\" y=\"53.34\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"+INB\"/>\n<pinref part=\"COFFSETA3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"COFFSETB12\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"INJ1\" class=\"0\">\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"DS2\"/>\n<pinref part=\"C_AC1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"238.76\" x2=\"58.42\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"238.76\" x2=\"58.42\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"228.6\" x2=\"63.5\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"228.6\" x2=\"63.5\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"228.6\"/>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<wire x1=\"58.42\" y1=\"228.6\" x2=\"25.4\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"220.98\" x2=\"58.42\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"228.6\" x2=\"58.42\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INA12\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"X\"/>\n<label x=\"119.38\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"119.38\" y1=\"116.84\" x2=\"127\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INB12\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"309.88\" y1=\"116.84\" x2=\"317.5\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"309.88\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP2\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"292.1\" y1=\"111.76\" x2=\"276.86\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"276.86\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW1\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"76.2\" y1=\"99.06\" x2=\"66.04\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"66.04\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW2\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"167.64\" y1=\"104.14\" x2=\"157.48\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"157.48\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW3\" class=\"0\">\n<segment>\n<wire x1=\"266.7\" y1=\"99.06\" x2=\"256.54\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"256.54\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"!A!/B\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP1\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"101.6\" y1=\"111.76\" x2=\"86.36\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L141_SCL\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"53.34\" y1=\"20.32\" x2=\"68.58\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW2\" class=\"0\">\n<segment>\n<wire x1=\"22.86\" y1=\"182.88\" x2=\"10.16\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"10.16\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR2\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"E_ACSW3\" class=\"0\">\n<segment>\n<wire x1=\"213.36\" y1=\"243.84\" x2=\"200.66\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"200.66\" y=\"243.84\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"E_ACSW4\" class=\"0\">\n<segment>\n<wire x1=\"213.36\" y1=\"182.88\" x2=\"200.66\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"200.66\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$2\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN3_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"43.18\" y1=\"76.2\" x2=\"43.18\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$3\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN2_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN4_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"10.16\" y1=\"76.2\" x2=\"10.16\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"CGAIN1\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"58.42\" y1=\"91.44\" x2=\"73.66\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"73.66\" y1=\"91.44\" x2=\"76.2\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CL1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"73.66\" y1=\"81.28\" x2=\"73.66\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"73.66\" y=\"91.44\"/>\n<pinref part=\"CGAIN1_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"58.42\" y1=\"81.28\" x2=\"58.42\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN3_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"43.18\" y1=\"88.9\" x2=\"43.18\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"43.18\" y1=\"91.44\" x2=\"58.42\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"91.44\"/>\n</segment>\n</net>\n<net name=\"CGAIN2\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"76.2\" y1=\"93.98\" x2=\"25.4\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN4_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"10.16\" y1=\"88.9\" x2=\"10.16\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"93.98\" x2=\"25.4\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CH1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"25.4\" y1=\"81.28\" x2=\"25.4\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"25.4\" y=\"93.98\"/>\n</segment>\n</net>\n<net name=\"CGAIN5\" class=\"0\">\n<segment>\n<wire x1=\"248.92\" y1=\"91.44\" x2=\"264.16\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"264.16\" y1=\"91.44\" x2=\"266.7\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"264.16\" y1=\"81.28\" x2=\"264.16\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"264.16\" y=\"91.44\"/>\n<wire x1=\"248.92\" y1=\"81.28\" x2=\"248.92\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"233.68\" y1=\"88.9\" x2=\"233.68\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"233.68\" y1=\"91.44\" x2=\"248.92\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"91.44\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"RGAIN3_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CGAIN1_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CL3\" gate=\"G$1\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"CGAIN6\" class=\"0\">\n<segment>\n<wire x1=\"266.7\" y1=\"93.98\" x2=\"215.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"88.9\" x2=\"200.66\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"93.98\" x2=\"215.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"81.28\" x2=\"215.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"215.9\" y=\"93.98\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"B\"/>\n<pinref part=\"RGAIN4_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CH3\" gate=\"G$1\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"CGAIN7\" class=\"0\">\n<segment>\n<wire x1=\"337.82\" y1=\"86.36\" x2=\"337.82\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"358.14\" y1=\"96.52\" x2=\"355.6\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"355.6\" y1=\"96.52\" x2=\"337.82\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"355.6\" y=\"96.52\"/>\n<wire x1=\"355.6\" y1=\"86.36\" x2=\"355.6\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"96.52\" x2=\"322.58\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"96.52\" x2=\"322.58\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"96.52\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"RGAIN3_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CL4\" gate=\"G$1\" pin=\"4\"/>\n<pinref part=\"CGAIN1_4\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"CGAIN8\" class=\"0\">\n<segment>\n<wire x1=\"309.88\" y1=\"86.36\" x2=\"309.88\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"358.14\" y1=\"99.06\" x2=\"309.88\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"99.06\" x2=\"294.64\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"294.64\" y1=\"99.06\" x2=\"294.64\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"99.06\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"B\"/>\n<pinref part=\"CH4\" gate=\"G$1\" pin=\"4\"/>\n<pinref part=\"RGAIN4_4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"INJ2\" class=\"0\">\n<segment>\n<wire x1=\"55.88\" y1=\"177.8\" x2=\"58.42\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"177.8\" x2=\"58.42\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"167.64\" x2=\"63.5\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"167.64\" x2=\"63.5\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"167.64\"/>\n<wire x1=\"58.42\" y1=\"167.64\" x2=\"25.4\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"DS2\"/>\n<pinref part=\"C_AC2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"S2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"160.02\" x2=\"58.42\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"160.02\" x2=\"58.42\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$15\" class=\"0\">\n<segment>\n<wire x1=\"63.5\" y1=\"177.8\" x2=\"63.5\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"182.88\" x2=\"55.88\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"182.88\" x2=\"76.2\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"76.2\" y1=\"182.88\" x2=\"76.2\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"182.88\"/>\n<junction x=\"76.2\" y=\"182.88\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"DS1\"/>\n<pinref part=\"RIN6\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"C_AC2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"106.68\" y1=\"182.88\" x2=\"106.68\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"106.68\" y1=\"190.5\" x2=\"76.2\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"76.2\" y1=\"190.5\" x2=\"76.2\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"104.14\" y1=\"182.88\" x2=\"106.68\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INJ3\" class=\"0\">\n<segment>\n<wire x1=\"246.38\" y1=\"238.76\" x2=\"248.92\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"238.76\" x2=\"248.92\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"228.6\" x2=\"254\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"228.6\" x2=\"254\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"228.6\"/>\n<wire x1=\"248.92\" y1=\"228.6\" x2=\"215.9\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"DS2\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<pinref part=\"C_AC3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"228.6\" x2=\"248.92\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"220.98\" x2=\"246.38\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INJ4\" class=\"0\">\n<segment>\n<wire x1=\"246.38\" y1=\"177.8\" x2=\"248.92\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"177.8\" x2=\"248.92\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"167.64\" x2=\"254\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"167.64\" x2=\"254\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"167.64\"/>\n<wire x1=\"248.92\" y1=\"167.64\" x2=\"215.9\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"DS2\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<pinref part=\"C_AC4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"167.64\" x2=\"248.92\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"160.02\" x2=\"246.38\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$11\" class=\"0\">\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"ACR1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"35.56\" y1=\"243.84\" x2=\"33.02\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$21\" class=\"0\">\n<segment>\n<wire x1=\"35.56\" y1=\"182.88\" x2=\"33.02\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"ACR2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"N$32\" class=\"0\">\n<segment>\n<wire x1=\"226.06\" y1=\"243.84\" x2=\"223.52\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"ACR3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"N$35\" class=\"0\">\n<segment>\n<wire x1=\"226.06\" y1=\"182.88\" x2=\"223.52\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"ACR4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"NSG_1\" class=\"0\">\n<segment>\n<wire x1=\"132.08\" y1=\"246.38\" x2=\"104.14\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RIN1_11K\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"132.08\" y1=\"238.76\" x2=\"132.08\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN1NF_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"147.32\" y1=\"236.22\" x2=\"147.32\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"246.38\" x2=\"132.08\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"246.38\"/>\n<pinref part=\"CIN56_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"162.56\" y1=\"236.22\" x2=\"162.56\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"246.38\" x2=\"147.32\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"246.38\"/>\n<label x=\"111.76\" y=\"246.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$19\" class=\"0\">\n<segment>\n<wire x1=\"132.08\" y1=\"177.8\" x2=\"132.08\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"132.08\" y1=\"185.42\" x2=\"147.32\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"185.42\" x2=\"147.32\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"185.42\" x2=\"162.56\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"185.42\" x2=\"162.56\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"185.42\"/>\n<pinref part=\"RIN2_11K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"104.14\" y1=\"185.42\" x2=\"132.08\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"185.42\"/>\n</segment>\n</net>\n<net name=\"N$43\" class=\"0\">\n<segment>\n<wire x1=\"322.58\" y1=\"238.76\" x2=\"322.58\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"246.38\" x2=\"337.82\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"246.38\" x2=\"337.82\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"246.38\" x2=\"353.06\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"246.38\" x2=\"353.06\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"246.38\"/>\n<pinref part=\"RIN3_11K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"294.64\" y1=\"246.38\" x2=\"322.58\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"246.38\"/>\n</segment>\n</net>\n<net name=\"INAMINUS2\" class=\"0\">\n<segment>\n<wire x1=\"309.88\" y1=\"226.06\" x2=\"322.58\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"360.68\" y=\"226.06\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"322.58\" y1=\"226.06\" x2=\"337.82\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"226.06\" x2=\"353.06\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"226.06\" x2=\"373.38\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"228.6\" x2=\"309.88\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"228.6\" x2=\"299.72\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"226.06\" x2=\"309.88\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"226.06\"/>\n<pinref part=\"RIN3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CIN5_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RIN3_11K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"322.58\" y1=\"228.6\" x2=\"322.58\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"226.06\"/>\n<pinref part=\"CIN1NF_3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"337.82\" y1=\"228.6\" x2=\"337.82\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"226.06\"/>\n<pinref part=\"CIN56_3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"353.06\" y1=\"228.6\" x2=\"353.06\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"226.06\"/>\n</segment>\n<segment>\n<wire x1=\"264.16\" y1=\"63.5\" x2=\"248.92\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"63.5\" x2=\"233.68\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"233.68\" y1=\"63.5\" x2=\"233.68\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"264.16\" y1=\"73.66\" x2=\"264.16\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"264.16\" y=\"63.5\"/>\n<wire x1=\"248.92\" y1=\"73.66\" x2=\"248.92\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"63.5\"/>\n<wire x1=\"289.56\" y1=\"58.42\" x2=\"284.48\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"284.48\" y1=\"58.42\" x2=\"284.48\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"284.48\" y1=\"63.5\" x2=\"264.16\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"284.48\" y1=\"58.42\" x2=\"269.24\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"284.48\" y=\"58.42\"/>\n<label x=\"269.24\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"233.68\" y1=\"63.5\" x2=\"215.9\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"233.68\" y=\"63.5\"/>\n<wire x1=\"215.9\" y1=\"63.5\" x2=\"200.66\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"63.5\" x2=\"200.66\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"73.66\" x2=\"215.9\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"215.9\" y=\"63.5\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"-INA\"/>\n<pinref part=\"RGAIN2_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN1_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CH3\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"CGAIN1_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CL3\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"N$44\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_A\"/>\n<pinref part=\"ROFFSET1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"12.7\" x2=\"106.68\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$45\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_B\"/>\n<pinref part=\"ROFFSET2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"15.24\" x2=\"106.68\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$46\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_C\"/>\n<pinref part=\"ROFFSET3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"17.78\" x2=\"106.68\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$47\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_D\"/>\n<pinref part=\"ROFFSET4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"20.32\" x2=\"106.68\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"VCCA\" class=\"2\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$2\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"10.16\" y1=\"121.92\" x2=\"10.16\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW2\" gate=\"P\" pin=\"VCC\"/>\n<wire x1=\"25.4\" y1=\"121.92\" x2=\"25.4\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$3\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$13\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"58.42\" y1=\"121.92\" x2=\"58.42\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$15\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"248.92\" y1=\"121.92\" x2=\"248.92\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"U$7\" gate=\"G$1\" pin=\"VCCA\"/>\n<pinref part=\"U1\" gate=\"A\" pin=\"V+\"/>\n<wire x1=\"157.48\" y1=\"63.5\" x2=\"157.48\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"60.96\" x2=\"154.94\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"U$14\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"40.64\" y1=\"121.92\" x2=\"40.64\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"U$16\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"347.98\" y1=\"63.5\" x2=\"347.98\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"347.98\" y1=\"60.96\" x2=\"345.44\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U2\" gate=\"A\" pin=\"V+\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"U$4\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"231.14\" y1=\"121.92\" x2=\"231.14\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW4\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$5\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"215.9\" y1=\"121.92\" x2=\"215.9\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VDD\"/>\n<wire x1=\"68.58\" y1=\"22.86\" x2=\"66.04\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$8\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"66.04\" y1=\"22.86\" x2=\"66.04\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"COFFSET\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"U$17\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"38.1\" y1=\"25.4\" x2=\"38.1\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"U$6\" gate=\"G$1\" pin=\"VCCA\"/>\n<pinref part=\"GAINSW3\" gate=\"P\" pin=\"VCC\"/>\n<wire x1=\"200.66\" y1=\"119.38\" x2=\"200.66\" y2=\"121.92\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"NNG_1\" class=\"0\">\n<segment>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"104.14\" y1=\"241.3\" x2=\"109.22\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"109.22\" y1=\"241.3\" x2=\"109.22\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"119.38\" y1=\"236.22\" x2=\"119.38\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"241.3\" x2=\"109.22\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"109.22\" y=\"241.3\"/>\n<label x=\"111.76\" y=\"241.3\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$56\" class=\"0\">\n<segment>\n<wire x1=\"322.58\" y1=\"177.8\" x2=\"322.58\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"185.42\" x2=\"337.82\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"185.42\" x2=\"337.82\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"185.42\" x2=\"353.06\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"185.42\" x2=\"353.06\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"185.42\"/>\n<pinref part=\"RIN4_11K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"294.64\" y1=\"185.42\" x2=\"322.58\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"185.42\"/>\n</segment>\n</net>\n<net name=\"N$50\" class=\"0\">\n<segment>\n<wire x1=\"254\" y1=\"177.8\" x2=\"254\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"182.88\" x2=\"246.38\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"182.88\" x2=\"266.7\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"266.7\" y1=\"182.88\" x2=\"266.7\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"254\" y=\"182.88\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"DS1\"/>\n<pinref part=\"C_AC4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RIN8\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"294.64\" y1=\"182.88\" x2=\"299.72\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"182.88\" x2=\"299.72\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"190.5\" x2=\"266.7\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"266.7\" y1=\"190.5\" x2=\"266.7\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"266.7\" y=\"182.88\"/>\n</segment>\n</net>\n<net name=\"N$22\" class=\"0\">\n<segment>\n<wire x1=\"109.22\" y1=\"180.34\" x2=\"109.22\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"175.26\" x2=\"119.38\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"180.34\" x2=\"109.22\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN5_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"104.14\" y1=\"180.34\" x2=\"109.22\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"109.22\" y=\"180.34\"/>\n</segment>\n</net>\n<net name=\"N$51\" class=\"0\">\n<segment>\n<wire x1=\"299.72\" y1=\"241.3\" x2=\"299.72\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"236.22\" x2=\"309.88\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"241.3\" x2=\"299.72\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN5_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"294.64\" y1=\"241.3\" x2=\"299.72\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"241.3\"/>\n</segment>\n</net>\n<net name=\"N$57\" class=\"0\">\n<segment>\n<wire x1=\"299.72\" y1=\"180.34\" x2=\"299.72\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"175.26\" x2=\"309.88\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"180.34\" x2=\"299.72\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"180.34\"/>\n<pinref part=\"RIN4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN5_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"294.64\" y1=\"180.34\" x2=\"299.72\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"E_ACSW1\" class=\"0\">\n<segment>\n<pinref part=\"ACR1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"22.86\" y1=\"243.84\" x2=\"10.16\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"10.16\" y=\"243.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$10\" class=\"0\">\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"DS1\"/>\n<pinref part=\"C_AC1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"63.5\" y1=\"238.76\" x2=\"63.5\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"243.84\" x2=\"55.88\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN5\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"63.5\" y1=\"243.84\" x2=\"76.2\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"76.2\" y1=\"243.84\" x2=\"76.2\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"243.84\"/>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"104.14\" y1=\"243.84\" x2=\"106.68\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"106.68\" y1=\"243.84\" x2=\"106.68\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"106.68\" y1=\"251.46\" x2=\"76.2\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"76.2\" y1=\"251.46\" x2=\"76.2\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"76.2\" y=\"243.84\"/>\n</segment>\n</net>\n<net name=\"N$25\" class=\"3\">\n<segment>\n<wire x1=\"55.88\" y1=\"157.48\" x2=\"58.42\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"157.48\" x2=\"71.12\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"71.12\" y1=\"157.48\" x2=\"83.82\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"157.48\" x2=\"96.52\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"154.94\" x2=\"96.52\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-7\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"83.82\" y1=\"154.94\" x2=\"83.82\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"157.48\"/>\n<pinref part=\"R50-6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"71.12\" y1=\"154.94\" x2=\"71.12\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"71.12\" y=\"157.48\"/>\n<pinref part=\"R50-5\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"154.94\" x2=\"58.42\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"157.48\"/>\n<pinref part=\"S2\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"N$26\" class=\"3\">\n<segment>\n<pinref part=\"R50-9\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"246.38\" y1=\"218.44\" x2=\"248.92\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"218.44\" x2=\"248.92\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-10\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"248.92\" y1=\"218.44\" x2=\"261.62\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"261.62\" y1=\"218.44\" x2=\"261.62\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"218.44\"/>\n<pinref part=\"R50-11\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"261.62\" y1=\"218.44\" x2=\"274.32\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"218.44\" x2=\"274.32\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"261.62\" y=\"218.44\"/>\n<pinref part=\"R50-12\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"274.32\" y1=\"218.44\" x2=\"287.02\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"218.44\" x2=\"287.02\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"218.44\"/>\n<pinref part=\"S3\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"N$28\" class=\"3\">\n<segment>\n<wire x1=\"246.38\" y1=\"157.48\" x2=\"248.92\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-13\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"248.92\" y1=\"157.48\" x2=\"248.92\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-14\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"261.62\" y1=\"154.94\" x2=\"261.62\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"261.62\" y1=\"157.48\" x2=\"248.92\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"157.48\"/>\n<pinref part=\"R50-15\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"274.32\" y1=\"154.94\" x2=\"274.32\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"157.48\" x2=\"261.62\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"261.62\" y=\"157.48\"/>\n<pinref part=\"R50-16\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"287.02\" y1=\"154.94\" x2=\"287.02\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"157.48\" x2=\"274.32\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"157.48\"/>\n<pinref part=\"S4\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"CGAIN3\" class=\"0\">\n<segment>\n<pinref part=\"CGAIN1_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"86.36\" x2=\"147.32\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"167.64\" y1=\"96.52\" x2=\"165.1\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"165.1\" y1=\"96.52\" x2=\"147.32\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"165.1\" y=\"96.52\"/>\n<pinref part=\"CL2\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"165.1\" y1=\"86.36\" x2=\"165.1\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"96.52\" x2=\"132.08\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"96.52\"/>\n<pinref part=\"RGAIN3_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"132.08\" y1=\"93.98\" x2=\"132.08\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"CGAIN4\" class=\"0\">\n<segment>\n<pinref part=\"CH2\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"119.38\" y1=\"86.36\" x2=\"119.38\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"167.64\" y1=\"99.06\" x2=\"119.38\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"99.06\" x2=\"104.14\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"99.06\"/>\n<pinref part=\"RGAIN4_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"104.14\" y1=\"93.98\" x2=\"104.14\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$6\" class=\"0\">\n<segment>\n<wire x1=\"233.68\" y1=\"76.2\" x2=\"233.68\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN3_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN1_3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$7\" class=\"0\">\n<segment>\n<wire x1=\"200.66\" y1=\"76.2\" x2=\"200.66\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN4_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN2_3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$8\" class=\"0\">\n<segment>\n<wire x1=\"322.58\" y1=\"83.82\" x2=\"322.58\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN3_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN1_4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$9\" class=\"0\">\n<segment>\n<wire x1=\"294.64\" y1=\"83.82\" x2=\"294.64\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN4_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN2_4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"E_GSW4\" class=\"0\">\n<segment>\n<wire x1=\"358.14\" y1=\"104.14\" x2=\"347.98\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"347.98\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"!A!/B\"/>\n</segment>\n</net>\n<net name=\"N50_1\" class=\"3\">\n<segment>\n<pinref part=\"R50-4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"55.88\" y1=\"218.44\" x2=\"58.42\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"218.44\" x2=\"71.12\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"71.12\" y1=\"218.44\" x2=\"83.82\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"218.44\" x2=\"96.52\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"218.44\" x2=\"96.52\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"215.9\" x2=\"58.42\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"218.44\"/>\n<pinref part=\"R50-2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"71.12\" y1=\"215.9\" x2=\"71.12\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"71.12\" y=\"218.44\"/>\n<pinref part=\"R50-3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"83.82\" y1=\"215.9\" x2=\"83.82\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"218.44\"/>\n<pinref part=\"S1\" gate=\"G$1\" pin=\"3\"/>\n<label x=\"86.36\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$5\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN2_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN4_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"104.14\" y1=\"83.82\" x2=\"104.14\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$4\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN3_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"132.08\" y1=\"83.82\" x2=\"132.08\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"E_21_B0\" class=\"0\">\n<segment>\n<pinref part=\"S1\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"45.72\" y1=\"220.98\" x2=\"33.02\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"33.02\" y=\"220.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B4\" class=\"0\">\n<segment>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"93.98\" y1=\"243.84\" x2=\"81.28\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"81.28\" y=\"243.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B1\" class=\"0\">\n<segment>\n<pinref part=\"S2\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"45.72\" y1=\"160.02\" x2=\"33.02\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"33.02\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B2\" class=\"0\">\n<segment>\n<pinref part=\"S3\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"236.22\" y1=\"220.98\" x2=\"223.52\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"223.52\" y=\"220.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$39\" class=\"0\">\n<segment>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"294.64\" y1=\"243.84\" x2=\"299.72\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"243.84\" x2=\"299.72\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"251.46\" x2=\"266.7\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"238.76\" x2=\"254\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"243.84\" x2=\"246.38\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"243.84\" x2=\"266.7\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"266.7\" y1=\"243.84\" x2=\"266.7\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"254\" y=\"243.84\"/>\n<junction x=\"266.7\" y=\"243.84\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"DS1\"/>\n<pinref part=\"RIN7\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"C_AC3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"266.7\" y1=\"243.84\" x2=\"266.7\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"E_21_B6\" class=\"0\">\n<segment>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"284.48\" y1=\"243.84\" x2=\"271.78\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"271.78\" y=\"243.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B7\" class=\"0\">\n<segment>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"284.48\" y1=\"182.88\" x2=\"271.78\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"271.78\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B3\" class=\"0\">\n<segment>\n<pinref part=\"S4\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"236.22\" y1=\"160.02\" x2=\"223.52\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"223.52\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B5\" class=\"0\">\n<segment>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"93.98\" y1=\"182.88\" x2=\"81.28\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"81.28\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n<sheet>\n<description>Digital</description>\n<plain>\n<text x=\"122.936\" y=\"120.904\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"122.936\" y=\"118.11\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"122.936\" y=\"115.316\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"122.936\" y=\"112.522\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"161.036\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"158.496\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"150.876\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"145.796\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"140.716\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"138.176\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"135.636\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"133.096\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"130.556\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"122.936\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"120.396\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<wire x1=\"66.04\" y1=\"175.26\" x2=\"5.08\" y2=\"175.26\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"292.1\" y1=\"210.82\" x2=\"292.1\" y2=\"71.12\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"292.1\" y1=\"71.12\" x2=\"66.04\" y2=\"71.12\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"66.04\" y1=\"71.12\" x2=\"66.04\" y2=\"256.54\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"68.58\" y=\"251.46\" size=\"2.54\" layer=\"95\">FPGA</text>\n<text x=\"7.62\" y=\"251.46\" size=\"2.54\" layer=\"95\">Right side pinouts</text>\n<text x=\"7.62\" y=\"170.18\" size=\"2.54\" layer=\"95\">Left side pinouts</text>\n<wire x1=\"5.08\" y1=\"167.64\" x2=\"45.72\" y2=\"167.64\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"5.08\" y1=\"248.92\" x2=\"48.26\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"48.26\" y1=\"248.92\" x2=\"48.26\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"66.04\" y1=\"248.92\" x2=\"81.28\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"81.28\" y1=\"248.92\" x2=\"81.28\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"66.04\" y1=\"71.12\" x2=\"66.04\" y2=\"50.8\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"66.04\" y1=\"50.8\" x2=\"5.08\" y2=\"50.8\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"7.62\" y=\"83.82\" size=\"2.54\" layer=\"95\">Oscillator</text>\n<wire x1=\"5.08\" y1=\"81.28\" x2=\"27.94\" y2=\"81.28\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"27.94\" y1=\"81.28\" x2=\"27.94\" y2=\"88.9\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"66.04\" y1=\"50.8\" x2=\"66.04\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"66.04\" y1=\"7.62\" x2=\"5.08\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"7.62\" y=\"45.72\" size=\"2.54\" layer=\"95\">Top pinouts</text>\n<wire x1=\"45.72\" y1=\"167.64\" x2=\"45.72\" y2=\"175.26\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"210.82\" y1=\"71.12\" x2=\"210.82\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"210.82\" y1=\"7.62\" x2=\"66.04\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"68.58\" y=\"66.04\" size=\"2.54\" layer=\"95\">IO expanders</text>\n<wire x1=\"5.08\" y1=\"88.9\" x2=\"63.5\" y2=\"88.9\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"33.02\" y1=\"50.8\" x2=\"33.02\" y2=\"43.18\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"33.02\" y1=\"43.18\" x2=\"5.08\" y2=\"43.18\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"96.52\" y1=\"71.12\" x2=\"96.52\" y2=\"63.5\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"96.52\" y1=\"63.5\" x2=\"66.04\" y2=\"63.5\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"365.76\" y1=\"63.5\" x2=\"365.76\" y2=\"25.4\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"365.76\" y1=\"25.4\" x2=\"210.82\" y2=\"25.4\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"210.82\" y1=\"25.4\" x2=\"210.82\" y2=\"63.5\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"213.36\" y=\"66.04\" size=\"2.54\" layer=\"95\">Serial to USB interface</text>\n<wire x1=\"210.82\" y1=\"63.5\" x2=\"210.82\" y2=\"71.12\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"210.82\" y1=\"71.12\" x2=\"261.62\" y2=\"71.12\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"335.28\" y1=\"210.82\" x2=\"335.28\" y2=\"157.48\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"294.64\" y=\"205.74\" size=\"2.54\" layer=\"95\">LEDs</text>\n<wire x1=\"383.54\" y1=\"210.82\" x2=\"292.1\" y2=\"210.82\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"292.1\" y1=\"210.82\" x2=\"292.1\" y2=\"256.54\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"294.64\" y=\"251.46\" size=\"2.54\" layer=\"95\">JTAG interface</text>\n<wire x1=\"292.1\" y1=\"71.12\" x2=\"365.76\" y2=\"71.12\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"365.76\" y1=\"71.12\" x2=\"365.76\" y2=\"63.5\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"210.82\" y1=\"63.5\" x2=\"264.16\" y2=\"63.5\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"264.16\" y1=\"63.5\" x2=\"264.16\" y2=\"71.12\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"304.8\" y1=\"203.2\" x2=\"304.8\" y2=\"210.82\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"292.1\" y1=\"248.92\" x2=\"325.12\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"325.12\" y1=\"248.92\" x2=\"325.12\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"304.8\" y1=\"203.2\" x2=\"292.1\" y2=\"203.2\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"335.28\" y1=\"157.48\" x2=\"292.1\" y2=\"157.48\" width=\"0.1524\" layer=\"97\"/>\n<text x=\"243.84\" y=\"35.56\" size=\"1.778\" layer=\"91\">Can take 5V from either the\nright side connector\nor the USB connector</text>\n<text x=\"335.28\" y=\"30.48\" size=\"1.778\" layer=\"91\">Chip that talks UART\nover USB</text>\n</plain>\n<instances>\n<instance part=\"FPGA\" gate=\"G$1\" x=\"172.72\" y=\"144.78\">\n<attribute name=\"OC_NEWARK\" x=\"172.72\" y=\"144.78\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"172.72\" y=\"144.78\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"154.94\" y=\"157.48\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"154.94\" y=\"162.56\" size=\"1.27\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"154.94\" y=\"160.02\" size=\"1.27\" layer=\"96\"/>\n</instance>\n<instance part=\"GND15\" gate=\"1\" x=\"101.6\" y=\"160.02\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"157.48\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V4\" gate=\"G$1\" x=\"269.24\" y=\"198.12\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"266.7\" y=\"200.66\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CV11\" gate=\"G$1\" x=\"269.24\" y=\"187.96\">\n<attribute name=\"MPN\" x=\"269.24\" y=\"187.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"270.764\" y=\"188.341\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"270.764\" y=\"183.261\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND22\" gate=\"1\" x=\"269.24\" y=\"175.26\">\n<attribute name=\"VALUE\" x=\"266.7\" y=\"172.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CV12\" gate=\"G$1\" x=\"259.08\" y=\"187.96\">\n<attribute name=\"MPN\" x=\"259.08\" y=\"187.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"260.604\" y=\"188.341\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"260.604\" y=\"183.261\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V5\" gate=\"G$1\" x=\"254\" y=\"218.44\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"251.46\" y=\"220.98\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CG13\" gate=\"G$1\" x=\"243.84\" y=\"208.28\">\n<attribute name=\"MPN\" x=\"243.84\" y=\"208.28\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"245.364\" y=\"208.661\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"245.364\" y=\"203.581\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND21\" gate=\"1\" x=\"254\" y=\"195.58\">\n<attribute name=\"VALUE\" x=\"251.46\" y=\"193.04\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CG14\" gate=\"G$1\" x=\"231.14\" y=\"208.28\">\n<attribute name=\"MPN\" x=\"231.14\" y=\"208.28\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"232.156\" y=\"208.915\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"232.156\" y=\"204.089\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CG15\" gate=\"G$1\" x=\"254\" y=\"208.28\">\n<attribute name=\"MPN\" x=\"254\" y=\"208.28\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"255.524\" y=\"208.661\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"255.524\" y=\"203.581\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RS6\" gate=\"G$1\" x=\"154.94\" y=\"228.6\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"154.94\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"154.94\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"154.94\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"158.75\" y=\"230.0986\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"158.75\" y=\"225.298\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND24\" gate=\"1\" x=\"162.56\" y=\"220.98\">\n<attribute name=\"VALUE\" x=\"160.02\" y=\"218.44\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RS7\" gate=\"G$1\" x=\"134.62\" y=\"246.38\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"134.62\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"134.62\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"134.62\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"138.43\" y=\"247.8786\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"138.43\" y=\"243.078\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"RS8\" gate=\"G$1\" x=\"134.62\" y=\"238.76\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"134.62\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"134.62\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"134.62\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"138.43\" y=\"240.2586\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"138.43\" y=\"235.458\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"+3V8\" gate=\"G$1\" x=\"142.24\" y=\"251.46\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"139.7\" y=\"254\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RS9\" gate=\"G$1\" x=\"149.86\" y=\"238.76\">\n<attribute name=\"OC_NEWARK\" x=\"149.86\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"149.86\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"149.86\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"146.05\" y=\"240.2586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"146.05\" y=\"235.458\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND26\" gate=\"1\" x=\"129.54\" y=\"73.66\">\n<attribute name=\"VALUE\" x=\"127\" y=\"71.12\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V15\" gate=\"G$1\" x=\"15.24\" y=\"243.84\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"12.7\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND7\" gate=\"1\" x=\"22.86\" y=\"210.82\">\n<attribute name=\"VALUE\" x=\"20.32\" y=\"208.28\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"P+1\" gate=\"1\" x=\"27.94\" y=\"124.46\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"127\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND8\" gate=\"1\" x=\"27.94\" y=\"93.98\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"91.44\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND13\" gate=\"1\" x=\"22.86\" y=\"180.34\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"P+2\" gate=\"1\" x=\"7.62\" y=\"243.84\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"5.08\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"PIN_RIGHT\" gate=\"G$1\" x=\"12.7\" y=\"195.58\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"7.62\" y=\"207.01\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"7.62\" y=\"182.88\" size=\"1.27\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"PIN_LEFT\" gate=\"G$1\" x=\"17.78\" y=\"109.22\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"13.462\" y=\"120.396\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"12.7\" y=\"96.52\" size=\"1.27\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"SW_RESET\" gate=\"G$1\" x=\"160.02\" y=\"243.84\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"157.48\" y=\"248.92\" size=\"1.016\" layer=\"95\" font=\"vector\" rot=\"MR180\" align=\"top-left\"/>\n<attribute name=\"VALUE\" x=\"157.48\" y=\"246.38\" size=\"1.016\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" x=\"33.02\" y=\"226.06\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"33.02\" y=\"226.06\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"16.51\" y=\"239.395\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.13\" y=\"213.36\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"PIN_ANALOG_IOEXP\" gate=\"A\" x=\"35.56\" y=\"149.86\">\n<attribute name=\"MPN\" x=\"35.56\" y=\"149.86\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"29.21\" y=\"160.655\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"29.21\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND70\" gate=\"1\" x=\"40.64\" y=\"210.82\">\n<attribute name=\"VALUE\" x=\"38.1\" y=\"208.28\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V9\" gate=\"G$1\" x=\"45.72\" y=\"243.84\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"43.18\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"OSC\" gate=\"G$1\" x=\"33.02\" y=\"66.04\">\n<attribute name=\"MPN\" x=\"31.75\" y=\"74.676\" size=\"0.762\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"25.4\" y=\"74.295\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"25.4\" y=\"55.88\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND16\" gate=\"1\" x=\"10.16\" y=\"55.88\">\n<attribute name=\"VALUE\" x=\"7.62\" y=\"53.34\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V2\" gate=\"G$1\" x=\"10.16\" y=\"76.2\">\n<attribute name=\"VALUE\" x=\"7.62\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"C_OSC\" gate=\"G$1\" x=\"10.16\" y=\"66.04\">\n<attribute name=\"MFN\" x=\"10.16\" y=\"66.04\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.176\" y=\"66.675\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.176\" y=\"61.849\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"FRAME1\" gate=\"G$1\" x=\"0\" y=\"0\">\n<attribute name=\"DRAWING_NAME\" x=\"344.17\" y=\"15.24\" size=\"2.54\" layer=\"94\"/>\n<attribute name=\"LAST_DATE_TIME\" x=\"344.17\" y=\"10.16\" size=\"2.286\" layer=\"94\"/>\n<attribute name=\"SHEET\" x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\"/>\n</instance>\n<instance part=\"GND42\" gate=\"1\" x=\"17.78\" y=\"12.7\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"10.16\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"PIN_DISPLAY\" gate=\"G$1\" x=\"10.16\" y=\"27.94\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"8.89\" y=\"33.02\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R270\"/>\n</instance>\n<instance part=\"PIN_IO_1\" gate=\"G$1\" x=\"40.64\" y=\"27.94\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"39.37\" y=\"33.02\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R270\"/>\n</instance>\n<instance part=\"P+7\" gate=\"1\" x=\"63.5\" y=\"25.4\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"27.94\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND68\" gate=\"1\" x=\"48.26\" y=\"12.7\">\n<attribute name=\"VALUE\" x=\"45.72\" y=\"10.16\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"P+6\" gate=\"1\" x=\"30.48\" y=\"25.4\">\n<attribute name=\"VALUE\" x=\"27.94\" y=\"27.94\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" x=\"116.84\" y=\"40.64\">\n<attribute name=\"NAME\" x=\"106.68\" y=\"64.77\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"106.68\" y=\"15.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" x=\"177.8\" y=\"40.64\">\n<attribute name=\"NAME\" x=\"167.64\" y=\"64.77\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"167.64\" y=\"15.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V26\" gate=\"G$1\" x=\"101.6\" y=\"66.04\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"68.58\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND64\" gate=\"1\" x=\"101.6\" y=\"15.24\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"12.7\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V27\" gate=\"G$1\" x=\"162.56\" y=\"66.04\">\n<attribute name=\"VALUE\" x=\"160.02\" y=\"68.58\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND65\" gate=\"1\" x=\"162.56\" y=\"15.24\">\n<attribute name=\"VALUE\" x=\"160.02\" y=\"12.7\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R_SCL\" gate=\"G$1\" x=\"93.98\" y=\"48.26\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"93.98\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"93.98\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"93.98\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"95.25\" y=\"49.7586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"95.25\" y=\"44.958\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R_SDA\" gate=\"G$1\" x=\"83.82\" y=\"48.26\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"83.82\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"83.82\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"83.82\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"85.09\" y=\"49.7586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"85.09\" y=\"44.958\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"P+4\" gate=\"1\" x=\"251.46\" y=\"60.96\">\n<attribute name=\"VALUE\" x=\"248.92\" y=\"63.5\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"USB1\" gate=\"G$1\" x=\"215.9\" y=\"50.8\">\n<attribute name=\"NAME\" x=\"215.9\" y=\"53.34\" size=\"1.016\" layer=\"95\" font=\"vector\" align=\"top-left\"/>\n<attribute name=\"VALUE\" x=\"213.36\" y=\"27.94\" size=\"1.016\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"U340G\" gate=\"G$1\" x=\"365.76\" y=\"58.42\" rot=\"MR180\"/>\n<instance part=\"Y1\" gate=\"G$1\" x=\"284.48\" y=\"55.88\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"276.86\" y=\"63.5\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"276.86\" y=\"60.96\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"C_OSC1\" gate=\"G$1\" x=\"289.56\" y=\"50.8\">\n<attribute name=\"MFN\" x=\"289.56\" y=\"50.8\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"290.576\" y=\"51.435\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"290.576\" y=\"46.609\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C_OSC2\" gate=\"G$1\" x=\"276.86\" y=\"50.8\">\n<attribute name=\"MFN\" x=\"276.86\" y=\"50.8\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"277.876\" y=\"51.435\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"277.876\" y=\"46.609\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND66\" gate=\"1\" x=\"289.56\" y=\"38.1\">\n<attribute name=\"VALUE\" x=\"287.02\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V30\" gate=\"G$1\" x=\"360.68\" y=\"45.72\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"358.14\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND67\" gate=\"1\" x=\"327.66\" y=\"35.56\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"330.2\" y=\"33.02\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND69\" gate=\"1\" x=\"231.14\" y=\"33.02\">\n<attribute name=\"VALUE\" x=\"228.6\" y=\"30.48\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V3\" gate=\"G$1\" x=\"327.66\" y=\"63.5\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"325.12\" y=\"66.04\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RLED1\" gate=\"G$1\" x=\"307.34\" y=\"198.12\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"307.34\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"307.34\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"307.34\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"311.15\" y=\"199.6186\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"311.15\" y=\"194.818\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"LED1\" gate=\"G$1\" x=\"320.04\" y=\"198.12\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"315.468\" y=\"202.184\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"RLED2\" gate=\"G$1\" x=\"307.34\" y=\"187.96\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"307.34\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"307.34\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"307.34\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"311.15\" y=\"189.4586\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"311.15\" y=\"184.658\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"LED2\" gate=\"G$1\" x=\"320.04\" y=\"187.96\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"315.468\" y=\"192.024\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"RLED3\" gate=\"G$1\" x=\"307.34\" y=\"177.8\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"307.34\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"307.34\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"307.34\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"311.15\" y=\"179.2986\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"311.15\" y=\"174.498\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"LED3\" gate=\"G$1\" x=\"320.04\" y=\"177.8\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"315.468\" y=\"181.864\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"RLED4\" gate=\"G$1\" x=\"307.34\" y=\"167.64\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"307.34\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"307.34\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"307.34\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"311.15\" y=\"169.1386\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"311.15\" y=\"164.338\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"LED4\" gate=\"G$1\" x=\"320.04\" y=\"167.64\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"315.468\" y=\"171.704\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GND71\" gate=\"1\" x=\"299.72\" y=\"162.56\">\n<attribute name=\"VALUE\" x=\"297.18\" y=\"160.02\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND23\" gate=\"1\" x=\"350.52\" y=\"215.9\">\n<attribute name=\"VALUE\" x=\"347.98\" y=\"213.36\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RJ2\" gate=\"G$1\" x=\"342.9\" y=\"238.76\">\n<attribute name=\"OC_NEWARK\" x=\"342.9\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"342.9\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"342.9\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"339.09\" y=\"240.2586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"339.09\" y=\"235.458\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RJ3\" gate=\"G$1\" x=\"317.5\" y=\"243.84\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"317.5\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"317.5\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"317.5\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"321.31\" y=\"245.3386\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"321.31\" y=\"240.538\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"RJ4\" gate=\"G$1\" x=\"320.04\" y=\"236.22\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"237.7186\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"232.918\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"+3V6\" gate=\"G$1\" x=\"353.06\" y=\"248.92\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"350.52\" y=\"251.46\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RJ5\" gate=\"G$1\" x=\"360.68\" y=\"228.6\">\n<attribute name=\"OC_NEWARK\" x=\"360.68\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"360.68\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"360.68\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"356.87\" y=\"230.0986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"356.87\" y=\"225.298\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"JP1\" gate=\"G$1\" x=\"340.36\" y=\"226.06\">\n<attribute name=\"NAME\" x=\"335.28\" y=\"233.68\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"335.28\" y=\"218.44\" size=\"1.27\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"GND85\" gate=\"1\" x=\"27.94\" y=\"132.08\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"129.54\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V7\" gate=\"G$1\" x=\"25.4\" y=\"162.56\">\n<attribute name=\"VALUE\" x=\"22.86\" y=\"165.1\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"S9\" gate=\"G$1\" x=\"259.08\" y=\"50.8\" rot=\"MR180\">\n<attribute name=\"NAME\" x=\"256.54\" y=\"46.6725\" size=\"1.778\" layer=\"95\" ratio=\"10\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"256.54\" y=\"56.8325\" size=\"1.778\" layer=\"96\" ratio=\"10\" rot=\"MR180\"/>\n</instance>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"+5V\" class=\"3\">\n<segment>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"P+1\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"27.94\" y1=\"121.92\" x2=\"27.94\" y2=\"113.03\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"113.03\" x2=\"25.4\" y2=\"113.03\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"P+2\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"7.62\" y1=\"241.3\" x2=\"7.62\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"231.14\" x2=\"22.86\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"231.14\" x2=\"27.94\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"27.94\" y1=\"228.6\" x2=\"22.86\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"228.6\" x2=\"22.86\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"231.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"P+7\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"63.5\" y1=\"22.86\" x2=\"63.5\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"19.05\" x2=\"46.99\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"30.48\" y1=\"22.86\" x2=\"30.48\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"30.48\" y1=\"19.05\" x2=\"25.4\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"25.4\" y1=\"19.05\" x2=\"16.51\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"P+6\" gate=\"1\" pin=\"+5V\"/>\n</segment>\n<segment>\n<pinref part=\"P+4\" gate=\"1\" pin=\"+5V\"/>\n<pinref part=\"S9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"254\" y1=\"50.8\" x2=\"251.46\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"251.46\" y1=\"50.8\" x2=\"251.46\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"GND\" class=\"1\">\n<segment>\n<pinref part=\"RS6\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND24\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"160.02\" y1=\"228.6\" x2=\"162.56\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"228.6\" x2=\"162.56\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_RESET\" gate=\"G$1\" pin=\"P$2\"/>\n<wire x1=\"162.56\" y1=\"241.3\" x2=\"162.56\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"228.6\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"ADC_VREF\"/>\n<pinref part=\"GND26\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"129.54\" y1=\"76.2\" x2=\"129.54\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"8\"/>\n<pinref part=\"GND13\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"20.32\" y1=\"186.69\" x2=\"22.86\" y2=\"186.69\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"186.69\" x2=\"22.86\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND8\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"25.4\" y1=\"100.33\" x2=\"27.94\" y2=\"100.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"100.33\" x2=\"27.94\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND7\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"22.86\" y1=\"213.36\" x2=\"22.86\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"22.86\" y1=\"223.52\" x2=\"27.94\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"226.06\" x2=\"22.86\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"226.06\" x2=\"22.86\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"223.52\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND70\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"35.56\" y1=\"218.44\" x2=\"40.64\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"218.44\" x2=\"40.64\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"REFGND\"/>\n<pinref part=\"GND15\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"104.14\" y1=\"162.56\" x2=\"101.6\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"165.1\" x2=\"101.6\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"167.64\" x2=\"101.6\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"170.18\" x2=\"101.6\" y2=\"172.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"172.72\" x2=\"101.6\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"175.26\" x2=\"101.6\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"177.8\" x2=\"101.6\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND1\"/>\n<wire x1=\"104.14\" y1=\"195.58\" x2=\"101.6\" y2=\"195.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"195.58\" x2=\"101.6\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"180.34\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND2\"/>\n<wire x1=\"101.6\" y1=\"193.04\" x2=\"101.6\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"190.5\" x2=\"101.6\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"187.96\" x2=\"101.6\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"185.42\" x2=\"101.6\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"182.88\" x2=\"101.6\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"104.14\" y1=\"193.04\" x2=\"101.6\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"193.04\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND3\"/>\n<wire x1=\"104.14\" y1=\"190.5\" x2=\"101.6\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"190.5\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND4\"/>\n<wire x1=\"104.14\" y1=\"187.96\" x2=\"101.6\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"187.96\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND5\"/>\n<wire x1=\"104.14\" y1=\"185.42\" x2=\"101.6\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"185.42\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND6\"/>\n<wire x1=\"104.14\" y1=\"182.88\" x2=\"101.6\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"182.88\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND7\"/>\n<wire x1=\"104.14\" y1=\"180.34\" x2=\"101.6\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND8\"/>\n<wire x1=\"104.14\" y1=\"177.8\" x2=\"101.6\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"177.8\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND9\"/>\n<wire x1=\"104.14\" y1=\"175.26\" x2=\"101.6\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"175.26\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND10\"/>\n<wire x1=\"104.14\" y1=\"172.72\" x2=\"101.6\" y2=\"172.72\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"172.72\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND11\"/>\n<wire x1=\"104.14\" y1=\"170.18\" x2=\"101.6\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"170.18\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND12\"/>\n<wire x1=\"104.14\" y1=\"167.64\" x2=\"101.6\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"167.64\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND_PAD\"/>\n<wire x1=\"104.14\" y1=\"165.1\" x2=\"101.6\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"162.56\" x2=\"101.6\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"162.56\"/>\n<junction x=\"101.6\" y=\"165.1\"/>\n</segment>\n<segment>\n<pinref part=\"CG14\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"231.14\" y1=\"203.2\" x2=\"231.14\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CG13\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"231.14\" y1=\"200.66\" x2=\"243.84\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"243.84\" y1=\"200.66\" x2=\"243.84\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CG15\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"243.84\" y1=\"200.66\" x2=\"254\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"200.66\" x2=\"254\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"243.84\" y=\"200.66\"/>\n<pinref part=\"GND21\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"254\" y1=\"198.12\" x2=\"254\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"254\" y=\"200.66\"/>\n</segment>\n<segment>\n<pinref part=\"CV12\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"259.08\" y1=\"182.88\" x2=\"259.08\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CV11\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"259.08\" y1=\"180.34\" x2=\"269.24\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"180.34\" x2=\"269.24\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND22\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"269.24\" y1=\"177.8\" x2=\"269.24\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"269.24\" y=\"180.34\"/>\n</segment>\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"C_OSC\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"20.32\" y1=\"60.96\" x2=\"10.16\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND16\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"10.16\" y1=\"58.42\" x2=\"10.16\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"10.16\" y=\"60.96\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND42\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"17.78\" y1=\"15.24\" x2=\"17.78\" y2=\"16.51\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"17.78\" y1=\"16.51\" x2=\"16.51\" y2=\"16.51\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND68\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"48.26\" y1=\"15.24\" x2=\"48.26\" y2=\"16.51\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"48.26\" y1=\"16.51\" x2=\"46.99\" y2=\"16.51\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"GND64\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"104.14\" y1=\"20.32\" x2=\"101.6\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"20.32\" x2=\"101.6\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A2\"/>\n<wire x1=\"104.14\" y1=\"25.4\" x2=\"101.6\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"25.4\" x2=\"101.6\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"20.32\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A1\"/>\n<wire x1=\"104.14\" y1=\"27.94\" x2=\"101.6\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"27.94\" x2=\"101.6\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"25.4\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A0\"/>\n<wire x1=\"104.14\" y1=\"30.48\" x2=\"101.6\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"30.48\" x2=\"101.6\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"27.94\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"GND65\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"165.1\" y1=\"20.32\" x2=\"162.56\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"20.32\" x2=\"162.56\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"A2\"/>\n<wire x1=\"165.1\" y1=\"25.4\" x2=\"162.56\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"25.4\" x2=\"162.56\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"20.32\"/>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"A1\"/>\n<wire x1=\"165.1\" y1=\"27.94\" x2=\"162.56\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"27.94\" x2=\"162.56\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"25.4\"/>\n</segment>\n<segment>\n<pinref part=\"C_OSC1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND66\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"289.56\" y1=\"45.72\" x2=\"289.56\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_OSC2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"289.56\" y1=\"43.18\" x2=\"289.56\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"289.56\" y1=\"43.18\" x2=\"276.86\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"43.18\" x2=\"276.86\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"289.56\" y=\"43.18\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND67\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"327.66\" y1=\"38.1\" x2=\"327.66\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"40.64\" x2=\"330.2\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND69\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"231.14\" y1=\"35.56\" x2=\"231.14\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"231.14\" y1=\"38.1\" x2=\"228.6\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND71\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"RLED1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"299.72\" y1=\"165.1\" x2=\"299.72\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"167.64\" x2=\"299.72\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"177.8\" x2=\"299.72\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"187.96\" x2=\"299.72\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"198.12\" x2=\"302.26\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RLED2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"302.26\" y1=\"187.96\" x2=\"299.72\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"187.96\"/>\n<pinref part=\"RLED3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"302.26\" y1=\"177.8\" x2=\"299.72\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"177.8\"/>\n<pinref part=\"RLED4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"302.26\" y1=\"167.64\" x2=\"299.72\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"167.64\"/>\n</segment>\n<segment>\n<wire x1=\"349.25\" y1=\"220.98\" x2=\"350.52\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"349.25\" y1=\"231.14\" x2=\"350.52\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"231.14\" x2=\"350.52\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"350.52\" y=\"220.98\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"10\"/>\n<pinref part=\"GND23\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"350.52\" y1=\"218.44\" x2=\"350.52\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RJ2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"347.98\" y1=\"238.76\" x2=\"350.52\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"238.76\" x2=\"350.52\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"350.52\" y=\"231.14\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"147.32\" x2=\"27.94\" y2=\"147.32\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"9\"/>\n<pinref part=\"GND85\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"27.94\" y1=\"147.32\" x2=\"27.94\" y2=\"134.62\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"+3V3\" class=\"2\">\n<segment>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"+3V15\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"15.24\" y1=\"241.3\" x2=\"15.24\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"15.24\" y1=\"236.22\" x2=\"22.86\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"236.22\" x2=\"27.94\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"233.68\" x2=\"22.86\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"233.68\" x2=\"22.86\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"236.22\"/>\n</segment>\n<segment>\n<pinref part=\"+3V9\" gate=\"G$1\" pin=\"+3V3\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"45.72\" y1=\"241.3\" x2=\"45.72\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"45.72\" y1=\"220.98\" x2=\"35.56\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE6\"/>\n<wire x1=\"198.12\" y1=\"203.2\" x2=\"198.12\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"198.12\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE2\"/>\n<wire x1=\"187.96\" y1=\"213.36\" x2=\"190.5\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"190.5\" y1=\"213.36\" x2=\"193.04\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"193.04\" y1=\"213.36\" x2=\"195.58\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"213.36\" x2=\"198.12\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"187.96\" y1=\"203.2\" x2=\"187.96\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE3\"/>\n<wire x1=\"190.5\" y1=\"203.2\" x2=\"190.5\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"190.5\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE4\"/>\n<wire x1=\"193.04\" y1=\"203.2\" x2=\"193.04\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"193.04\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE5\"/>\n<wire x1=\"195.58\" y1=\"203.2\" x2=\"195.58\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"195.58\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE7\"/>\n<wire x1=\"200.66\" y1=\"203.2\" x2=\"200.66\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"213.36\" x2=\"198.12\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE10\"/>\n<wire x1=\"203.2\" y1=\"203.2\" x2=\"203.2\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"203.2\" y1=\"213.36\" x2=\"200.66\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"200.66\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE11\"/>\n<wire x1=\"205.74\" y1=\"203.2\" x2=\"205.74\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"205.74\" y1=\"213.36\" x2=\"203.2\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"203.2\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE12\"/>\n<wire x1=\"208.28\" y1=\"203.2\" x2=\"208.28\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"208.28\" y1=\"213.36\" x2=\"205.74\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"205.74\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA1\"/>\n<wire x1=\"213.36\" y1=\"203.2\" x2=\"213.36\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"213.36\" y1=\"213.36\" x2=\"208.28\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"208.28\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA2\"/>\n<wire x1=\"215.9\" y1=\"203.2\" x2=\"215.9\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"213.36\" x2=\"213.36\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"213.36\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA3\"/>\n<wire x1=\"218.44\" y1=\"203.2\" x2=\"218.44\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"218.44\" y1=\"213.36\" x2=\"215.9\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"215.9\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA4\"/>\n<wire x1=\"220.98\" y1=\"203.2\" x2=\"220.98\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"220.98\" y1=\"213.36\" x2=\"218.44\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"218.44\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA5\"/>\n<wire x1=\"223.52\" y1=\"203.2\" x2=\"223.52\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"213.36\" x2=\"220.98\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"220.98\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA6\"/>\n<wire x1=\"226.06\" y1=\"203.2\" x2=\"226.06\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"226.06\" y1=\"213.36\" x2=\"223.52\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"223.52\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE1\"/>\n<wire x1=\"185.42\" y1=\"203.2\" x2=\"185.42\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"185.42\" y1=\"213.36\" x2=\"187.96\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"187.96\" y=\"213.36\"/>\n<pinref part=\"CG15\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"226.06\" y1=\"213.36\" x2=\"231.14\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"231.14\" y1=\"213.36\" x2=\"243.84\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"243.84\" y1=\"213.36\" x2=\"254\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"213.36\" x2=\"254\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"226.06\" y=\"213.36\"/>\n<pinref part=\"CG13\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"243.84\" y1=\"210.82\" x2=\"243.84\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"243.84\" y=\"213.36\"/>\n<pinref part=\"CG14\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"231.14\" y1=\"210.82\" x2=\"231.14\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"231.14\" y=\"213.36\"/>\n<pinref part=\"+3V5\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"254\" y1=\"215.9\" x2=\"254\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"254\" y=\"213.36\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO1A\"/>\n<wire x1=\"243.84\" y1=\"193.04\" x2=\"248.92\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO1B\"/>\n<wire x1=\"243.84\" y1=\"190.5\" x2=\"248.92\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"190.5\" x2=\"248.92\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO2\"/>\n<wire x1=\"243.84\" y1=\"187.96\" x2=\"248.92\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"187.96\" x2=\"248.92\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"190.5\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO3\"/>\n<wire x1=\"243.84\" y1=\"185.42\" x2=\"248.92\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"185.42\" x2=\"248.92\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"187.96\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO3@2\"/>\n<wire x1=\"243.84\" y1=\"182.88\" x2=\"248.92\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"182.88\" x2=\"248.92\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"185.42\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO4\"/>\n<wire x1=\"243.84\" y1=\"180.34\" x2=\"248.92\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"180.34\" x2=\"248.92\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"182.88\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO5\"/>\n<wire x1=\"243.84\" y1=\"177.8\" x2=\"248.92\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"177.8\" x2=\"248.92\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"180.34\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO6\"/>\n<wire x1=\"243.84\" y1=\"175.26\" x2=\"248.92\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"175.26\" x2=\"248.92\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"177.8\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO6@2\"/>\n<wire x1=\"243.84\" y1=\"172.72\" x2=\"248.92\" y2=\"172.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"172.72\" x2=\"248.92\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"175.26\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO7\"/>\n<wire x1=\"243.84\" y1=\"170.18\" x2=\"248.92\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"170.18\" x2=\"248.92\" y2=\"172.72\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"172.72\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO8\"/>\n<wire x1=\"243.84\" y1=\"167.64\" x2=\"248.92\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"167.64\" x2=\"248.92\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"170.18\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO8@2\"/>\n<wire x1=\"243.84\" y1=\"165.1\" x2=\"248.92\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"165.1\" x2=\"248.92\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"167.64\"/>\n<pinref part=\"CV11\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"248.92\" y1=\"193.04\" x2=\"259.08\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"259.08\" y1=\"193.04\" x2=\"269.24\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"193.04\" x2=\"269.24\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"193.04\"/>\n<pinref part=\"+3V4\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"269.24\" y1=\"195.58\" x2=\"269.24\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"269.24\" y=\"193.04\"/>\n<pinref part=\"CV12\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"259.08\" y1=\"190.5\" x2=\"259.08\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"259.08\" y=\"193.04\"/>\n</segment>\n<segment>\n<pinref part=\"RS8\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RS9\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"144.78\" y1=\"238.76\" x2=\"142.24\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RS7\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"142.24\" y1=\"238.76\" x2=\"139.7\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"139.7\" y1=\"246.38\" x2=\"142.24\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"142.24\" y1=\"246.38\" x2=\"142.24\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"142.24\" y=\"238.76\"/>\n<pinref part=\"+3V8\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"142.24\" y1=\"248.92\" x2=\"142.24\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"142.24\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"C_OSC\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"20.32\" y1=\"71.12\" x2=\"10.16\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"71.12\" x2=\"10.16\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V2\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"10.16\" y1=\"73.66\" x2=\"10.16\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"10.16\" y=\"71.12\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"+3V26\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"101.6\" y1=\"63.5\" x2=\"101.6\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"60.96\" x2=\"104.14\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"60.96\" x2=\"93.98\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"60.96\"/>\n<pinref part=\"R_SCL\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"93.98\" y1=\"60.96\" x2=\"93.98\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"!RESET\"/>\n<wire x1=\"104.14\" y1=\"55.88\" x2=\"101.6\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"55.88\" x2=\"101.6\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R_SDA\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"83.82\" y1=\"55.88\" x2=\"83.82\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"60.96\" x2=\"83.82\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"60.96\" x2=\"83.82\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"60.96\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"+3V27\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"162.56\" y1=\"63.5\" x2=\"162.56\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"60.96\" x2=\"165.1\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"!RESET\"/>\n<wire x1=\"165.1\" y1=\"55.88\" x2=\"162.56\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"55.88\" x2=\"162.56\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"60.96\"/>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"A0\"/>\n<wire x1=\"162.56\" y1=\"43.18\" x2=\"162.56\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"30.48\" x2=\"165.1\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"43.18\" x2=\"162.56\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"55.88\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"VCC\"/>\n<pinref part=\"+3V30\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"360.68\" y1=\"43.18\" x2=\"360.68\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"360.68\" y1=\"40.64\" x2=\"355.6\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"+3V3\" gate=\"G$1\" pin=\"+3V3\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"V3\"/>\n<wire x1=\"327.66\" y1=\"60.96\" x2=\"327.66\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"48.26\" x2=\"330.2\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"+3V6\" gate=\"G$1\" pin=\"+3V3\"/>\n<pinref part=\"RJ3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"353.06\" y1=\"243.84\" x2=\"353.06\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"243.84\" x2=\"327.66\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"243.84\"/>\n<wire x1=\"327.66\" y1=\"243.84\" x2=\"353.06\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"228.6\" x2=\"349.25\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"9\"/>\n<pinref part=\"RJ5\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"355.6\" y1=\"228.6\" x2=\"353.06\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"243.84\" x2=\"353.06\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"228.6\"/>\n<pinref part=\"RJ4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"325.12\" y1=\"236.22\" x2=\"327.66\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"236.22\" x2=\"327.66\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"327.66\" y=\"243.84\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"33.02\" y1=\"139.7\" x2=\"25.4\" y2=\"139.7\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"25.4\" y1=\"139.7\" x2=\"25.4\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V7\" gate=\"G$1\" pin=\"+3V3\"/>\n</segment>\n</net>\n<net name=\"TCK\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TCK\"/>\n<wire x1=\"104.14\" y1=\"129.54\" x2=\"83.82\" y2=\"129.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"129.54\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"327.66\" y=\"231.14\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"RJ2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"331.47\" y1=\"231.14\" x2=\"330.2\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"330.2\" y1=\"231.14\" x2=\"327.66\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"330.2\" y1=\"231.14\" x2=\"330.2\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"330.2\" y1=\"238.76\" x2=\"337.82\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"330.2\" y=\"231.14\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"TDO\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TDO\"/>\n<wire x1=\"104.14\" y1=\"124.46\" x2=\"83.82\" y2=\"124.46\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"124.46\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"327.66\" y=\"228.6\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"331.47\" y1=\"228.6\" x2=\"327.66\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"TMS\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TMS\"/>\n<wire x1=\"104.14\" y1=\"134.62\" x2=\"83.82\" y2=\"134.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"134.62\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"307.34\" y=\"226.06\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"RJ3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"331.47\" y1=\"226.06\" x2=\"309.88\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"226.06\" x2=\"307.34\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"226.06\" x2=\"309.88\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"243.84\" x2=\"312.42\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"226.06\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"TDI\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TDI\"/>\n<wire x1=\"104.14\" y1=\"127\" x2=\"83.82\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"127\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"307.34\" y=\"220.98\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"RJ4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"331.47\" y1=\"220.98\" x2=\"312.42\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"312.42\" y1=\"220.98\" x2=\"307.34\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"312.42\" y1=\"220.98\" x2=\"312.42\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"312.42\" y1=\"233.68\" x2=\"312.42\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"312.42\" y1=\"236.22\" x2=\"314.96\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"312.42\" y=\"220.98\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"JTAGEN\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"JTAGEN\"/>\n<wire x1=\"104.14\" y1=\"137.16\" x2=\"83.82\" y2=\"137.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"137.16\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"370.84\" y=\"223.52\" size=\"1.27\" layer=\"95\" xref=\"yes\"/>\n<pinref part=\"RJ5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"349.25\" y1=\"223.52\" x2=\"368.3\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"368.3\" y1=\"223.52\" x2=\"370.84\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"365.76\" y1=\"228.6\" x2=\"368.3\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"368.3\" y1=\"228.6\" x2=\"368.3\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"368.3\" y=\"223.52\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"CONFIG_SEL\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CONFIG_SEL\"/>\n<pinref part=\"RS6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"203.2\" x2=\"147.32\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"223.52\" x2=\"147.32\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"228.6\" x2=\"149.86\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"147.32\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"CONF\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CONF_DONE\"/>\n<pinref part=\"RS7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"203.2\" x2=\"124.46\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"124.46\" y1=\"236.22\" x2=\"124.46\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"124.46\" y1=\"243.84\" x2=\"124.46\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"124.46\" y1=\"246.38\" x2=\"129.54\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"124.46\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"STATUS\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"NSTATUS\"/>\n<pinref part=\"RS8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"127\" y1=\"203.2\" x2=\"127\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"127\" y1=\"233.68\" x2=\"127\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"127\" y1=\"238.76\" x2=\"129.54\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"127\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"NCONF\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"NCONFIG\"/>\n<wire x1=\"142.24\" y1=\"203.2\" x2=\"142.24\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"RS9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"142.24\" y1=\"233.68\" x2=\"157.48\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"233.68\" x2=\"157.48\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"238.76\" x2=\"154.94\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_RESET\" gate=\"G$1\" pin=\"P$4\"/>\n<wire x1=\"157.48\" y1=\"241.3\" x2=\"157.48\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"157.48\" y=\"238.76\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_33\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"PLL_CLKOUTP\"/>\n<wire x1=\"104.14\" y1=\"96.52\" x2=\"86.36\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"101.6\" y=\"96.52\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n</segment>\n</net>\n<net name=\"D1C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_70\"/>\n<wire x1=\"215.9\" y1=\"76.2\" x2=\"215.9\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"215.9\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D2C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_69\"/>\n<wire x1=\"213.36\" y1=\"76.2\" x2=\"213.36\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"213.36\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D3C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_66\"/>\n<wire x1=\"210.82\" y1=\"76.2\" x2=\"210.82\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"210.82\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D4C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_65\"/>\n<wire x1=\"208.28\" y1=\"76.2\" x2=\"208.28\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"208.28\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D5C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_64\"/>\n<wire x1=\"205.74\" y1=\"76.2\" x2=\"205.74\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"205.74\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D6C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_62\"/>\n<wire x1=\"203.2\" y1=\"76.2\" x2=\"203.2\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"203.2\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D0C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_74\"/>\n<wire x1=\"254\" y1=\"91.44\" x2=\"243.84\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"91.44\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_60\"/>\n<wire x1=\"195.58\" y1=\"83.82\" x2=\"195.58\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D0D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_85\"/>\n<wire x1=\"254\" y1=\"114.3\" x2=\"243.84\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"114.3\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_84\"/>\n<wire x1=\"243.84\" y1=\"111.76\" x2=\"254\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_81\"/>\n<wire x1=\"254\" y1=\"109.22\" x2=\"243.84\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"109.22\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_79\"/>\n<wire x1=\"254\" y1=\"104.14\" x2=\"243.84\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_78\"/>\n<wire x1=\"254\" y1=\"101.6\" x2=\"243.84\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"101.6\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_77\"/>\n<wire x1=\"254\" y1=\"99.06\" x2=\"243.84\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_76\"/>\n<wire x1=\"254\" y1=\"96.52\" x2=\"243.84\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"96.52\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_75\"/>\n<wire x1=\"254\" y1=\"93.98\" x2=\"243.84\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"93.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L135\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_135\"/>\n<wire x1=\"129.54\" y1=\"203.2\" x2=\"129.54\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"129.54\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"24.13\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"16.51\" y1=\"24.13\" x2=\"25.4\" y2=\"24.13\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L140\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_140\"/>\n<wire x1=\"121.92\" y1=\"213.36\" x2=\"121.92\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"121.92\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"21.59\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"16.51\" y1=\"21.59\" x2=\"25.4\" y2=\"21.59\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L21_SDA\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_21\"/>\n<wire x1=\"104.14\" y1=\"121.92\" x2=\"86.36\" y2=\"121.92\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"121.92\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"SDA\"/>\n<pinref part=\"R_SDA\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"83.82\" y1=\"43.18\" x2=\"83.82\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"35.56\" x2=\"104.14\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"71.12\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"83.82\" y1=\"35.56\" x2=\"71.12\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"35.56\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"SDA\"/>\n<wire x1=\"165.1\" y1=\"35.56\" x2=\"149.86\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"149.86\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"142.24\" x2=\"12.7\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"142.24\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"13\"/>\n</segment>\n</net>\n<net name=\"AIN1\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"ANAIN1\"/>\n<wire x1=\"132.08\" y1=\"76.2\" x2=\"132.08\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n<segment>\n<label x=\"15.24\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"27.94\" y1=\"218.44\" x2=\"15.24\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"LOW_22\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_22\"/>\n<wire x1=\"104.14\" y1=\"119.38\" x2=\"86.36\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L134\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_134\"/>\n<wire x1=\"132.08\" y1=\"203.2\" x2=\"132.08\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"26.67\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"16.51\" y1=\"26.67\" x2=\"25.4\" y2=\"26.67\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"LOW_24\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_24\"/>\n<wire x1=\"86.36\" y1=\"116.84\" x2=\"104.14\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LOW_25\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_25\"/>\n<wire x1=\"86.36\" y1=\"114.3\" x2=\"104.14\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"114.3\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"OSC1\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK0P\"/>\n<wire x1=\"76.2\" y1=\"109.22\" x2=\"104.14\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"76.2\" y=\"109.22\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"OUT\"/>\n<wire x1=\"45.72\" y1=\"66.04\" x2=\"55.7276\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"66.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_47\"/>\n<wire x1=\"170.18\" y1=\"76.2\" x2=\"170.18\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"170.18\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D1A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_46\"/>\n<wire x1=\"167.64\" y1=\"76.2\" x2=\"167.64\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"167.64\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D2A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_45\"/>\n<wire x1=\"165.1\" y1=\"76.2\" x2=\"165.1\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"165.1\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D3A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_44\"/>\n<wire x1=\"162.56\" y1=\"76.2\" x2=\"162.56\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"162.56\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D4A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_43\"/>\n<wire x1=\"160.02\" y1=\"76.2\" x2=\"160.02\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"160.02\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D5A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_41\"/>\n<wire x1=\"157.48\" y1=\"76.2\" x2=\"157.48\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"157.48\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D6A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_39\"/>\n<wire x1=\"154.94\" y1=\"76.2\" x2=\"154.94\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"154.94\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D7A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_38\"/>\n<wire x1=\"152.4\" y1=\"76.2\" x2=\"152.4\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"152.4\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D0B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_59\"/>\n<wire x1=\"193.04\" y1=\"76.2\" x2=\"193.04\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"193.04\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D1B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_58\"/>\n<wire x1=\"190.5\" y1=\"76.2\" x2=\"190.5\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"190.5\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D2B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_57\"/>\n<wire x1=\"187.96\" y1=\"76.2\" x2=\"187.96\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"187.96\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D3B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_56\"/>\n<wire x1=\"185.42\" y1=\"76.2\" x2=\"185.42\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"185.42\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D4B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_55\"/>\n<wire x1=\"182.88\" y1=\"76.2\" x2=\"182.88\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"182.88\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D5B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_54\"/>\n<wire x1=\"180.34\" y1=\"76.2\" x2=\"180.34\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"180.34\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D6B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_52\"/>\n<wire x1=\"177.8\" y1=\"76.2\" x2=\"177.8\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"177.8\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D7B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_50\"/>\n<wire x1=\"175.26\" y1=\"76.2\" x2=\"175.26\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"175.26\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"CLKOUTTOLEFT_29\" class=\"0\">\n<segment>\n<label x=\"76.2\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK1P\"/>\n<wire x1=\"104.14\" y1=\"104.14\" x2=\"76.2\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"8\"/>\n<wire x1=\"25.4\" y1=\"118.11\" x2=\"53.594\" y2=\"118.11\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"118.11\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n</segment>\n</net>\n<net name=\"TRIGOUTTOLEFT_106\" class=\"0\">\n<segment>\n<wire x1=\"25.4\" y1=\"107.95\" x2=\"53.34\" y2=\"107.95\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"107.95\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"4\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_106\"/>\n<wire x1=\"243.84\" y1=\"160.02\" x2=\"276.86\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"TRIGINFROMRIGHT_86\" class=\"0\">\n<segment>\n<label x=\"53.34\" y=\"194.31\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"53.34\" y1=\"194.31\" x2=\"20.32\" y2=\"194.31\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"20.32\" y=\"194.31\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_86\"/>\n<wire x1=\"274.32\" y1=\"116.84\" x2=\"243.84\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALTORIGHT_RX_92\" class=\"0\">\n<segment>\n<label x=\"53.34\" y=\"189.23\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"7\"/>\n<wire x1=\"53.34\" y1=\"189.23\" x2=\"20.32\" y2=\"189.23\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"20.32\" y=\"189.23\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_92\"/>\n<wire x1=\"243.84\" y1=\"134.62\" x2=\"279.4\" y2=\"134.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"134.62\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"RX\"/>\n<wire x1=\"330.2\" y1=\"45.72\" x2=\"297.18\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"297.18\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALFROMRIGHT_TX_93\" class=\"0\">\n<segment>\n<label x=\"53.34\" y=\"191.77\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"53.34\" y1=\"191.77\" x2=\"20.32\" y2=\"191.77\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"20.32\" y=\"191.77\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_93\"/>\n<wire x1=\"281.94\" y1=\"137.16\" x2=\"243.84\" y2=\"137.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"137.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"TX\"/>\n<wire x1=\"297.18\" y1=\"43.18\" x2=\"330.2\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"297.18\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALTOLEFT_96\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_96\"/>\n<wire x1=\"243.84\" y1=\"139.7\" x2=\"271.78\" y2=\"139.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"139.7\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"53.34\" y1=\"105.41\" x2=\"25.4\" y2=\"105.41\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"105.41\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n</segment>\n</net>\n<net name=\"SERIALFROMLEFT_98\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_98\"/>\n<wire x1=\"276.86\" y1=\"144.78\" x2=\"243.84\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"144.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"53.34\" y1=\"102.87\" x2=\"25.4\" y2=\"102.87\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"102.87\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n</segment>\n</net>\n<net name=\"CLKINFROMRIGHT_26\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK0N\"/>\n<wire x1=\"104.14\" y1=\"111.76\" x2=\"76.2\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"76.2\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"1\"/>\n<junction x=\"20.32\" y=\"204.47\"/>\n<wire x1=\"53.34\" y1=\"204.47\" x2=\"20.32\" y2=\"204.47\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"204.47\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n</segment>\n</net>\n<net name=\"SPARELEFT_102\" class=\"0\">\n<segment>\n<wire x1=\"53.34\" y1=\"115.57\" x2=\"25.4\" y2=\"115.57\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"115.57\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"7\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_102\"/>\n<wire x1=\"243.84\" y1=\"154.94\" x2=\"269.24\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SPARERIGHT_99\" class=\"0\">\n<segment>\n<wire x1=\"53.34\" y1=\"201.93\" x2=\"20.32\" y2=\"201.93\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"201.93\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"2\"/>\n<junction x=\"20.32\" y=\"201.93\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_99\"/>\n<wire x1=\"243.84\" y1=\"147.32\" x2=\"269.24\" y2=\"147.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"147.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A13\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_13\"/>\n<wire x1=\"40.64\" y1=\"142.24\" x2=\"104.14\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"142.24\" size=\"1.778\" layer=\"95\"/>\n<label x=\"86.36\" y=\"142.24\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"14\"/>\n</segment>\n</net>\n<net name=\"A12\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_12\"/>\n<wire x1=\"40.64\" y1=\"144.78\" x2=\"104.14\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"144.78\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"12\"/>\n</segment>\n</net>\n<net name=\"A11\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_11\"/>\n<wire x1=\"40.64\" y1=\"147.32\" x2=\"104.14\" y2=\"147.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"147.32\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"10\"/>\n</segment>\n</net>\n<net name=\"A10\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_10\"/>\n<wire x1=\"40.64\" y1=\"149.86\" x2=\"104.14\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"8\"/>\n</segment>\n</net>\n<net name=\"A8\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_8\"/>\n<wire x1=\"40.64\" y1=\"152.4\" x2=\"104.14\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"152.4\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"6\"/>\n</segment>\n</net>\n<net name=\"A7\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_7\"/>\n<wire x1=\"40.64\" y1=\"154.94\" x2=\"104.14\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"A6\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_6\"/>\n<wire x1=\"40.64\" y1=\"157.48\" x2=\"104.14\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"157.48\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"A14\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_14\"/>\n<wire x1=\"40.64\" y1=\"139.7\" x2=\"104.14\" y2=\"139.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"139.7\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"16\"/>\n</segment>\n</net>\n<net name=\"L131\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_131\"/>\n<wire x1=\"137.16\" y1=\"203.2\" x2=\"137.16\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"137.16\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"29.21\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"16.51\" y1=\"29.21\" x2=\"25.4\" y2=\"29.21\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L132\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_132\"/>\n<wire x1=\"134.62\" y1=\"203.2\" x2=\"134.62\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"134.62\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"31.75\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"7\"/>\n<wire x1=\"16.51\" y1=\"31.75\" x2=\"25.4\" y2=\"31.75\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"5VINFROMRIGHT\" class=\"3\">\n<segment>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"20.32\" y1=\"199.39\" x2=\"53.34\" y2=\"199.39\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"199.39\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<junction x=\"20.32\" y=\"199.39\"/>\n</segment>\n<segment>\n<wire x1=\"228.6\" y1=\"53.34\" x2=\"254\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"228.6\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"S9\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_32\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"PLL_CLKOUTN\"/>\n<wire x1=\"104.14\" y1=\"99.06\" x2=\"86.36\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"101.6\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n</segment>\n</net>\n<net name=\"IO_101\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_101\"/>\n<wire x1=\"243.84\" y1=\"152.4\" x2=\"259.08\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"152.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"236.22\" x2=\"60.96\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"236.22\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"15\"/>\n</segment>\n</net>\n<net name=\"IO_100\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_100\"/>\n<wire x1=\"259.08\" y1=\"149.86\" x2=\"243.84\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"233.68\" x2=\"60.96\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"233.68\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"13\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_91\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK3N\"/>\n<wire x1=\"264.16\" y1=\"132.08\" x2=\"243.84\" y2=\"132.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"132.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"60.96\" y1=\"231.14\" x2=\"35.56\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"231.14\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"11\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_90\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK3P\"/>\n<wire x1=\"264.16\" y1=\"129.54\" x2=\"243.84\" y2=\"129.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"129.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"228.6\" x2=\"60.96\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"228.6\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"9\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_89\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK2N\"/>\n<wire x1=\"264.16\" y1=\"127\" x2=\"243.84\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"127\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"226.06\" x2=\"60.96\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"226.06\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_88\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK2P\"/>\n<wire x1=\"264.16\" y1=\"124.46\" x2=\"243.84\" y2=\"124.46\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"124.46\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"223.52\" x2=\"60.96\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"223.52\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"L141_SCL\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_141\"/>\n<wire x1=\"119.38\" y1=\"203.2\" x2=\"119.38\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"119.38\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"104.14\" y1=\"38.1\" x2=\"93.98\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R_SCL\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"93.98\" y1=\"38.1\" x2=\"93.98\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"71.12\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"93.98\" y1=\"38.1\" x2=\"71.12\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"38.1\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"165.1\" y1=\"38.1\" x2=\"149.86\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"149.86\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"144.78\" x2=\"12.7\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"144.78\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"11\"/>\n</segment>\n</net>\n<net name=\"L130\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_130\"/>\n<wire x1=\"139.7\" y1=\"203.2\" x2=\"139.7\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"139.7\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"8\"/>\n<wire x1=\"16.51\" y1=\"34.29\" x2=\"25.4\" y2=\"34.29\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"19.558\" y=\"34.29\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L127\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_127\"/>\n<wire x1=\"144.78\" y1=\"203.2\" x2=\"144.78\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"9\"/>\n<wire x1=\"16.51\" y1=\"36.83\" x2=\"25.4\" y2=\"36.83\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"19.558\" y=\"36.83\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L124\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_124\"/>\n<wire x1=\"149.86\" y1=\"203.2\" x2=\"149.86\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"149.86\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"10\"/>\n<wire x1=\"16.51\" y1=\"39.37\" x2=\"25.4\" y2=\"39.37\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"19.558\" y=\"39.37\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L120_SYNC\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_120\"/>\n<wire x1=\"160.02\" y1=\"203.2\" x2=\"160.02\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"160.02\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"IO_122\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_122\"/>\n<wire x1=\"154.94\" y1=\"213.36\" x2=\"154.94\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"154.94\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"10\"/>\n<wire x1=\"46.99\" y1=\"39.37\" x2=\"58.42\" y2=\"39.37\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"39.37\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L121\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_121\"/>\n<wire x1=\"157.48\" y1=\"203.2\" x2=\"157.48\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"157.48\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<wire x1=\"15.24\" y1=\"220.98\" x2=\"27.94\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"15.24\" y=\"220.98\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"IO_119\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_119\"/>\n<wire x1=\"165.1\" y1=\"203.2\" x2=\"165.1\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"165.1\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"8\"/>\n<wire x1=\"46.99\" y1=\"34.29\" x2=\"58.166\" y2=\"34.29\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"34.29\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_118\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_118\"/>\n<wire x1=\"167.64\" y1=\"203.2\" x2=\"167.64\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"167.64\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"7\"/>\n<wire x1=\"46.99\" y1=\"31.75\" x2=\"58.166\" y2=\"31.75\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"31.75\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_114\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_114\"/>\n<wire x1=\"170.18\" y1=\"203.2\" x2=\"170.18\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"170.18\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"46.99\" y1=\"29.21\" x2=\"58.166\" y2=\"29.21\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"29.21\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_111\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_111\"/>\n<wire x1=\"177.8\" y1=\"203.2\" x2=\"177.8\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"177.8\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"46.99\" y1=\"24.13\" x2=\"58.166\" y2=\"24.13\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"24.13\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_110\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_110\"/>\n<wire x1=\"180.34\" y1=\"214.63\" x2=\"180.34\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"180.34\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"46.99\" y1=\"21.59\" x2=\"58.166\" y2=\"21.59\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"21.59\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_113\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_113\"/>\n<wire x1=\"172.72\" y1=\"203.2\" x2=\"172.72\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"172.72\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"46.99\" y1=\"26.67\" x2=\"58.166\" y2=\"26.67\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"26.67\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"TRIGINFROMLEFT_28\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK1N\"/>\n<wire x1=\"104.14\" y1=\"106.68\" x2=\"76.2\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"76.2\" y=\"106.68\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"53.34\" y1=\"110.49\" x2=\"25.4\" y2=\"110.49\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"110.49\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_LEFT\" gate=\"G$1\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"IO_105\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_105\"/>\n<wire x1=\"243.84\" y1=\"157.48\" x2=\"259.08\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"157.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"9\"/>\n<wire x1=\"46.99\" y1=\"36.83\" x2=\"58.42\" y2=\"36.83\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"36.83\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"TRIGOUTORIGHT_87\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_87\"/>\n<wire x1=\"243.84\" y1=\"119.38\" x2=\"274.32\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<label x=\"53.34\" y=\"196.85\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_RIGHT\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"53.34\" y1=\"196.85\" x2=\"20.32\" y2=\"196.85\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"20.32\" y=\"196.85\"/>\n</segment>\n</net>\n<net name=\"LED1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA0\"/>\n<wire x1=\"190.5\" y1=\"60.96\" x2=\"203.2\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"60.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"322.58\" y1=\"198.12\" x2=\"332.74\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"325.12\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"LED1\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"LED3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA2\"/>\n<wire x1=\"190.5\" y1=\"55.88\" x2=\"203.2\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"322.58\" y1=\"177.8\" x2=\"332.74\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"325.12\" y=\"177.8\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"LED3\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"LED2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA1\"/>\n<wire x1=\"190.5\" y1=\"58.42\" x2=\"203.2\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"332.74\" y1=\"187.96\" x2=\"322.58\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"325.12\" y=\"187.96\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"LED2\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"LED4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA3\"/>\n<wire x1=\"190.5\" y1=\"53.34\" x2=\"203.2\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<label x=\"325.12\" y=\"167.64\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"332.74\" y1=\"167.64\" x2=\"322.58\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"LED4\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"E_IO_1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA4\"/>\n<wire x1=\"190.5\" y1=\"50.8\" x2=\"203.2\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"50.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"157.48\" x2=\"12.7\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"157.48\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"E_IO_4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA7\"/>\n<wire x1=\"190.5\" y1=\"43.18\" x2=\"203.2\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"149.86\" x2=\"12.7\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"E_IO_3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA6\"/>\n<wire x1=\"190.5\" y1=\"45.72\" x2=\"203.2\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"152.4\" x2=\"12.7\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"152.4\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"E_IO_2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA5\"/>\n<wire x1=\"190.5\" y1=\"48.26\" x2=\"203.2\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"154.94\" x2=\"12.7\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"E_SHDN1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB4\"/>\n<wire x1=\"129.54\" y1=\"27.94\" x2=\"144.78\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"27.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_SHDN2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB5\"/>\n<wire x1=\"129.54\" y1=\"25.4\" x2=\"144.78\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"25.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA5\"/>\n<wire x1=\"129.54\" y1=\"48.26\" x2=\"147.32\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA0\"/>\n<wire x1=\"129.54\" y1=\"60.96\" x2=\"142.24\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"60.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA1\"/>\n<wire x1=\"129.54\" y1=\"58.42\" x2=\"142.24\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA2\"/>\n<wire x1=\"129.54\" y1=\"55.88\" x2=\"142.24\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA3\"/>\n<wire x1=\"129.54\" y1=\"53.34\" x2=\"142.24\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA4\"/>\n<wire x1=\"147.32\" y1=\"50.8\" x2=\"129.54\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"50.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB0\"/>\n<wire x1=\"129.54\" y1=\"38.1\" x2=\"144.78\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB1\"/>\n<wire x1=\"129.54\" y1=\"35.56\" x2=\"144.78\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB2\"/>\n<wire x1=\"129.54\" y1=\"33.02\" x2=\"144.78\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"33.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB3\"/>\n<wire x1=\"129.54\" y1=\"30.48\" x2=\"144.78\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"30.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"5VINFROMUSB\" class=\"3\">\n<segment>\n<wire x1=\"228.6\" y1=\"48.26\" x2=\"254\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"231.14\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"5V\"/>\n<pinref part=\"S9\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$23\" class=\"0\">\n<segment>\n<pinref part=\"C_OSC1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"Y1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"289.56\" y1=\"53.34\" x2=\"289.56\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"289.56\" y1=\"55.88\" x2=\"287.02\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"289.56\" y1=\"55.88\" x2=\"294.64\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"289.56\" y=\"55.88\"/>\n<wire x1=\"294.64\" y1=\"55.88\" x2=\"299.72\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"55.88\" x2=\"322.58\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"XI\"/>\n<wire x1=\"322.58\" y1=\"55.88\" x2=\"330.2\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$31\" class=\"0\">\n<segment>\n<pinref part=\"C_OSC2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"Y1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"276.86\" y1=\"53.34\" x2=\"276.86\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"55.88\" x2=\"281.94\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"55.88\" x2=\"276.86\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"276.86\" y=\"55.88\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"XO\"/>\n<wire x1=\"276.86\" y1=\"58.42\" x2=\"325.12\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"325.12\" y1=\"58.42\" x2=\"330.2\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$1\" class=\"0\">\n<segment>\n<pinref part=\"RLED4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED4\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"312.42\" y1=\"167.64\" x2=\"314.96\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$12\" class=\"0\">\n<segment>\n<pinref part=\"RLED3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED3\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"312.42\" y1=\"177.8\" x2=\"314.96\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$13\" class=\"0\">\n<segment>\n<pinref part=\"RLED2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED2\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"312.42\" y1=\"187.96\" x2=\"314.96\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$14\" class=\"0\">\n<segment>\n<pinref part=\"RLED1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED1\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"312.42\" y1=\"198.12\" x2=\"314.96\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"DPLUS\" class=\"0\">\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"D+\"/>\n<wire x1=\"330.2\" y1=\"50.8\" x2=\"317.5\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"317.5\" y=\"50.8\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n</segment>\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"D+\"/>\n<wire x1=\"228.6\" y1=\"43.18\" x2=\"241.3\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"231.14\" y=\"43.18\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n</segment>\n</net>\n<net name=\"DMINUS\" class=\"0\">\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"D-\"/>\n<wire x1=\"330.2\" y1=\"53.34\" x2=\"317.5\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"317.5\" y=\"53.34\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n</segment>\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"D-\"/>\n<wire x1=\"228.6\" y1=\"45.72\" x2=\"241.3\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"231.14\" y=\"45.72\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n</segment>\n</net>\n<net name=\"E_21_B0\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB0\"/>\n<wire x1=\"190.5\" y1=\"38.1\" x2=\"208.28\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB1\"/>\n<wire x1=\"190.5\" y1=\"35.56\" x2=\"208.28\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB2\"/>\n<wire x1=\"190.5\" y1=\"33.02\" x2=\"208.28\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"33.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB3\"/>\n<wire x1=\"190.5\" y1=\"30.48\" x2=\"208.28\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"30.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB4\"/>\n<wire x1=\"190.5\" y1=\"27.94\" x2=\"208.28\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"27.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B5\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB5\"/>\n<wire x1=\"190.5\" y1=\"25.4\" x2=\"208.28\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"25.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B6\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB6\"/>\n<wire x1=\"190.5\" y1=\"22.86\" x2=\"208.28\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"22.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B7\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB7\"/>\n<wire x1=\"190.5\" y1=\"20.32\" x2=\"208.28\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n<sheet>\n<description>ADCs &amp; Power</description>\n<plain>\n<wire x1=\"218.44\" y1=\"256.54\" x2=\"218.44\" y2=\"132.08\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"218.44\" y1=\"132.08\" x2=\"119.38\" y2=\"132.08\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"7.62\" y=\"251.46\" size=\"2.54\" layer=\"95\">ADCs</text>\n<wire x1=\"5.08\" y1=\"248.92\" x2=\"17.78\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"17.78\" y1=\"248.92\" x2=\"17.78\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"5.08\" y1=\"132.08\" x2=\"119.38\" y2=\"132.08\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"119.38\" y1=\"132.08\" x2=\"119.38\" y2=\"55.88\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"119.38\" y1=\"55.88\" x2=\"5.08\" y2=\"55.88\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"7.62\" y=\"127\" size=\"2.54\" layer=\"95\">Power regulation and decoupling</text>\n<wire x1=\"5.08\" y1=\"124.46\" x2=\"76.2\" y2=\"124.46\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"76.2\" y1=\"124.46\" x2=\"76.2\" y2=\"132.08\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"5.08\" y1=\"91.44\" x2=\"106.68\" y2=\"91.44\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"109.22\" y=\"127\" size=\"2.54\" layer=\"97\" font=\"vector\">3V3</text>\n<text x=\"109.22\" y=\"86.36\" size=\"2.54\" layer=\"97\" font=\"vector\">VCCA</text>\n<wire x1=\"106.68\" y1=\"91.44\" x2=\"119.38\" y2=\"91.44\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"119.38\" y1=\"83.82\" x2=\"106.68\" y2=\"83.82\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"106.68\" y1=\"83.82\" x2=\"106.68\" y2=\"91.44\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"119.38\" y1=\"124.46\" x2=\"106.68\" y2=\"124.46\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"106.68\" y1=\"124.46\" x2=\"106.68\" y2=\"132.08\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"109.22\" y1=\"132.08\" x2=\"109.22\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"109.22\" y1=\"248.92\" x2=\"109.22\" y2=\"256.54\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"81.28\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 1+2</text>\n<text x=\"193.04\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 3+4</text>\n<wire x1=\"78.74\" y1=\"256.54\" x2=\"78.74\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"78.74\" y1=\"248.92\" x2=\"109.22\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"190.5\" y1=\"256.54\" x2=\"190.5\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"190.5\" y1=\"248.92\" x2=\"218.44\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"5.08\" y=\"50.8\" size=\"2.54\" layer=\"97\" font=\"vector\">Misc.</text>\n<wire x1=\"119.38\" y1=\"55.88\" x2=\"119.38\" y2=\"5.08\" width=\"0.1524\" layer=\"97\"/>\n<text x=\"66.04\" y=\"226.06\" size=\"1.778\" layer=\"91\">Note that the two ADCs have separate \nclocks (32 and 33), which can be \n50% out of phase, for oversampling.</text>\n<text x=\"83.82\" y=\"167.64\" size=\"1.778\" layer=\"91\">SHDN is used to turn\noff the ADCs when \ninactive, to save power</text>\n<text x=\"86.36\" y=\"187.96\" size=\"1.778\" layer=\"91\">SDIN/SCLK,CS\nis the SPI interface</text>\n<text x=\"15.24\" y=\"193.04\" size=\"1.778\" layer=\"91\">Dual 8-bit \nADC outputs</text>\n<text x=\"114.3\" y=\"165.1\" size=\"1.778\" layer=\"91\">Inputs to this ADC\nare from the \noversampling switches</text>\n<text x=\"22.352\" y=\"92.964\" size=\"1.778\" layer=\"91\">For reducing noise on the power.\nThe inductor helps reduce low-freq\nnoise on the USB 5V power input.</text>\n<text x=\"22.352\" y=\"57.404\" size=\"1.778\" layer=\"91\">Separate 3.3V power rail for the\nanalog components, so noise from\nFPGA etc. doesn't get into ADCs.</text>\n</plain>\n<instances>\n<instance part=\"GND4\" gate=\"1\" x=\"33.02\" y=\"144.78\">\n<attribute name=\"VALUE\" x=\"30.48\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CREF1\" gate=\"G$1\" x=\"81.28\" y=\"154.94\">\n<attribute name=\"MPN\" x=\"81.28\" y=\"154.94\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"82.804\" y=\"155.321\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"82.804\" y=\"150.241\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND5\" gate=\"1\" x=\"81.28\" y=\"144.78\">\n<attribute name=\"VALUE\" x=\"78.74\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN1\" gate=\"G$1\" x=\"10.16\" y=\"147.32\">\n<attribute name=\"MPN\" x=\"10.16\" y=\"147.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.684\" y=\"147.701\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.684\" y=\"142.621\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND12\" gate=\"1\" x=\"10.16\" y=\"137.16\">\n<attribute name=\"VALUE\" x=\"7.62\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"IC1\" gate=\"M\" x=\"58.42\" y=\"182.88\">\n<attribute name=\"MPN\" x=\"58.42\" y=\"182.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"43.18\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"43.18\" y=\"144.78\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND32\" gate=\"1\" x=\"81.28\" y=\"190.5\">\n<attribute name=\"VALUE\" x=\"78.74\" y=\"187.96\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C0DD2_A\" gate=\"G$1\" x=\"22.86\" y=\"241.3\">\n<attribute name=\"MPN\" x=\"22.86\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"24.384\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.384\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND33\" gate=\"1\" x=\"22.86\" y=\"228.6\">\n<attribute name=\"VALUE\" x=\"20.32\" y=\"226.06\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN2\" gate=\"G$1\" x=\"20.32\" y=\"147.32\">\n<attribute name=\"MPN\" x=\"20.32\" y=\"147.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"21.844\" y=\"147.701\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"21.844\" y=\"142.621\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND1\" gate=\"1\" x=\"20.32\" y=\"137.16\">\n<attribute name=\"VALUE\" x=\"17.78\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND2\" gate=\"1\" x=\"142.24\" y=\"144.78\">\n<attribute name=\"VALUE\" x=\"139.7\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CREF2\" gate=\"G$1\" x=\"190.5\" y=\"154.94\">\n<attribute name=\"MPN\" x=\"190.5\" y=\"154.94\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"192.024\" y=\"155.321\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"192.024\" y=\"150.241\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND3\" gate=\"1\" x=\"190.5\" y=\"144.78\">\n<attribute name=\"VALUE\" x=\"187.96\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN3\" gate=\"G$1\" x=\"116.84\" y=\"147.32\">\n<attribute name=\"MPN\" x=\"116.84\" y=\"147.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"118.364\" y=\"147.701\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"118.364\" y=\"142.621\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"IC2\" gate=\"M\" x=\"167.64\" y=\"182.88\">\n<attribute name=\"MPN\" x=\"167.64\" y=\"182.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"152.4\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"152.4\" y=\"144.78\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND10\" gate=\"1\" x=\"190.5\" y=\"190.5\">\n<attribute name=\"VALUE\" x=\"187.96\" y=\"187.96\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C0DD2_B\" gate=\"G$1\" x=\"129.54\" y=\"241.3\">\n<attribute name=\"MPN\" x=\"129.54\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"131.064\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"131.064\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN4\" gate=\"G$1\" x=\"129.54\" y=\"147.32\">\n<attribute name=\"MPN\" x=\"129.54\" y=\"147.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"131.064\" y=\"147.701\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"131.064\" y=\"142.621\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND37\" gate=\"1\" x=\"129.54\" y=\"137.16\">\n<attribute name=\"VALUE\" x=\"127\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V16\" gate=\"G$1\" x=\"22.86\" y=\"251.46\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"20.32\" y=\"254\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND36\" gate=\"1\" x=\"91.44\" y=\"144.78\">\n<attribute name=\"VALUE\" x=\"88.9\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND38\" gate=\"1\" x=\"200.66\" y=\"144.78\">\n<attribute name=\"VALUE\" x=\"198.12\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CADD1_A\" gate=\"G$1\" x=\"40.64\" y=\"241.3\">\n<attribute name=\"MPN\" x=\"40.64\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"42.164\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"42.164\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C0DD1_A\" gate=\"G$1\" x=\"10.16\" y=\"241.3\">\n<attribute name=\"MPN\" x=\"10.16\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.684\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.684\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CADD2_A\" gate=\"G$1\" x=\"53.34\" y=\"241.3\">\n<attribute name=\"MPN\" x=\"53.34\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"54.864\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"54.864\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CADD1_B\" gate=\"G$1\" x=\"147.32\" y=\"241.3\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"148.844\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"148.844\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CADD2_B\" gate=\"G$1\" x=\"160.02\" y=\"241.3\">\n<attribute name=\"MPN\" x=\"160.02\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"161.544\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"161.544\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CODD1_B\" gate=\"G$1\" x=\"116.84\" y=\"241.3\">\n<attribute name=\"MPN\" x=\"116.84\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"118.364\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"118.364\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V21\" gate=\"G$1\" x=\"129.54\" y=\"251.46\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"127\" y=\"254\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"U$9\" gate=\"G$1\" x=\"160.02\" y=\"248.92\">\n<attribute name=\"VALUE\" x=\"160.02\" y=\"251.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$11\" gate=\"G$1\" x=\"53.34\" y=\"248.92\">\n<attribute name=\"VALUE\" x=\"53.34\" y=\"251.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"+3V11\" gate=\"G$1\" x=\"83.82\" y=\"220.98\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"81.28\" y=\"223.52\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND25\" gate=\"1\" x=\"53.34\" y=\"228.6\">\n<attribute name=\"VALUE\" x=\"50.8\" y=\"226.06\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$12\" gate=\"G$1\" x=\"30.48\" y=\"170.18\">\n<attribute name=\"VALUE\" x=\"30.48\" y=\"172.974\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"GND11\" gate=\"1\" x=\"129.54\" y=\"228.6\">\n<attribute name=\"VALUE\" x=\"127\" y=\"226.06\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND49\" gate=\"1\" x=\"160.02\" y=\"228.6\">\n<attribute name=\"VALUE\" x=\"157.48\" y=\"226.06\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND6\" gate=\"1\" x=\"116.84\" y=\"137.16\">\n<attribute name=\"VALUE\" x=\"114.3\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$10\" gate=\"G$1\" x=\"139.7\" y=\"170.18\">\n<attribute name=\"VALUE\" x=\"139.7\" y=\"172.974\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"+3V12\" gate=\"G$1\" x=\"193.04\" y=\"220.98\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"190.5\" y=\"223.52\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"FRAME3\" gate=\"G$1\" x=\"0\" y=\"0\">\n<attribute name=\"DRAWING_NAME\" x=\"344.17\" y=\"15.24\" size=\"2.54\" layer=\"94\"/>\n<attribute name=\"LAST_DATE_TIME\" x=\"344.17\" y=\"10.16\" size=\"2.286\" layer=\"94\"/>\n<attribute name=\"SHEET\" x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\"/>\n</instance>\n<instance part=\"P+3\" gate=\"1\" x=\"17.78\" y=\"119.38\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"121.92\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CP5\" gate=\"G$1\" x=\"48.26\" y=\"109.22\">\n<attribute name=\"MPN\" x=\"48.26\" y=\"109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"49.276\" y=\"109.855\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"49.276\" y=\"105.029\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP6\" gate=\"G$1\" x=\"93.98\" y=\"106.68\">\n<attribute name=\"MPN\" x=\"104.14\" y=\"106.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"94.996\" y=\"107.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"94.996\" y=\"102.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V1\" gate=\"G$1\" x=\"93.98\" y=\"119.38\">\n<attribute name=\"VALUE\" x=\"91.44\" y=\"121.92\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND14\" gate=\"1\" x=\"78.74\" y=\"96.52\">\n<attribute name=\"VALUE\" x=\"76.2\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"REG\" gate=\"G$1\" x=\"78.74\" y=\"114.3\">\n<attribute name=\"MPN\" x=\"68.58\" y=\"119.38\" size=\"1.27\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"71.12\" y=\"121.92\" size=\"1.27\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"76.2\" y=\"121.92\" size=\"1.27\" layer=\"96\"/>\n</instance>\n<instance part=\"CP1\" gate=\"G$1\" x=\"55.88\" y=\"109.22\">\n<attribute name=\"MPN\" x=\"55.88\" y=\"109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"57.404\" y=\"109.601\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"57.404\" y=\"104.521\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP2\" gate=\"G$1\" x=\"63.5\" y=\"109.22\">\n<attribute name=\"MPN\" x=\"63.5\" y=\"109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"65.024\" y=\"109.601\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"65.024\" y=\"104.521\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C_5V_10NF\" gate=\"G$1\" x=\"27.94\" y=\"106.68\" rot=\"MR180\">\n<attribute name=\"MFN\" x=\"27.94\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"28.956\" y=\"111.125\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"28.956\" y=\"105.791\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND45\" gate=\"1\" x=\"17.78\" y=\"96.52\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"P+5\" gate=\"1\" x=\"17.78\" y=\"83.82\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"R90\"/>\n</instance>\n<instance part=\"CP3\" gate=\"G$1\" x=\"48.26\" y=\"73.66\">\n<attribute name=\"MPN\" x=\"48.26\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"49.276\" y=\"74.295\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"49.276\" y=\"69.469\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP4\" gate=\"G$1\" x=\"93.98\" y=\"73.66\">\n<attribute name=\"MPN\" x=\"104.14\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"94.996\" y=\"74.295\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"94.996\" y=\"69.469\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND75\" gate=\"1\" x=\"78.74\" y=\"60.96\">\n<attribute name=\"VALUE\" x=\"76.2\" y=\"58.42\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"REG1\" gate=\"G$1\" x=\"78.74\" y=\"78.74\">\n<attribute name=\"MPN\" x=\"68.58\" y=\"83.82\" size=\"1.27\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"71.12\" y=\"86.36\" size=\"1.27\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"78.74\" y=\"86.36\" size=\"1.27\" layer=\"96\"/>\n</instance>\n<instance part=\"CP7\" gate=\"G$1\" x=\"55.88\" y=\"73.66\">\n<attribute name=\"MPN\" x=\"55.88\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"57.404\" y=\"74.041\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"57.404\" y=\"68.961\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP8\" gate=\"G$1\" x=\"63.5\" y=\"73.66\">\n<attribute name=\"MPN\" x=\"63.5\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"65.024\" y=\"74.041\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"65.024\" y=\"68.961\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"L1\" gate=\"G$1\" x=\"38.1\" y=\"114.3\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"38.1\" y=\"114.3\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"33.02\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"116.84\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP9\" gate=\"G$1\" x=\"101.6\" y=\"73.66\">\n<attribute name=\"MPN\" x=\"101.6\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"103.124\" y=\"74.041\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"103.124\" y=\"68.961\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$1\" gate=\"G$1\" x=\"101.6\" y=\"81.28\">\n<attribute name=\"VALUE\" x=\"101.6\" y=\"84.074\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"L2\" gate=\"G$1\" x=\"38.1\" y=\"78.74\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"38.1\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"33.02\" y=\"81.28\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"81.28\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C_5V_10NF1\" gate=\"G$1\" x=\"27.94\" y=\"71.12\" rot=\"MR180\">\n<attribute name=\"MFN\" x=\"27.94\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"28.956\" y=\"75.565\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"28.956\" y=\"70.231\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND76\" gate=\"1\" x=\"17.78\" y=\"60.96\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"58.42\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP10\" gate=\"G$1\" x=\"17.78\" y=\"71.12\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"17.78\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"19.304\" y=\"70.739\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"19.304\" y=\"75.819\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CP11\" gate=\"G$1\" x=\"17.78\" y=\"106.68\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"17.78\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"19.304\" y=\"106.299\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"19.304\" y=\"111.379\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RLEDPOW\" gate=\"G$1\" x=\"106.68\" y=\"106.68\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"106.68\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"106.68\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"106.68\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"107.95\" y=\"108.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"107.95\" y=\"103.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"LEDPOW\" gate=\"G$1\" x=\"99.06\" y=\"114.3\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"99.06\" y=\"114.3\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"99.06\" y=\"114.3\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"99.06\" y=\"114.3\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"106.172\" y=\"117.856\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</instance>\n<instance part=\"GND50\" gate=\"1\" x=\"63.5\" y=\"96.52\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND51\" gate=\"1\" x=\"93.98\" y=\"96.52\">\n<attribute name=\"VALUE\" x=\"91.44\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND52\" gate=\"1\" x=\"106.68\" y=\"96.52\">\n<attribute name=\"VALUE\" x=\"104.14\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND53\" gate=\"1\" x=\"101.6\" y=\"60.96\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"58.42\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND54\" gate=\"1\" x=\"63.5\" y=\"60.96\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"58.42\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GOLD_ORB_SM1\" gate=\"G$1\" x=\"15.24\" y=\"38.1\"/>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"GND\" class=\"1\">\n<segment>\n<pinref part=\"CREF1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND5\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"81.28\" y1=\"147.32\" x2=\"81.28\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"GND\"/>\n<pinref part=\"GND4\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"33.02\" y1=\"147.32\" x2=\"33.02\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"33.02\" y1=\"170.18\" x2=\"38.1\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CLK-\"/>\n<pinref part=\"GND32\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"78.74\" y1=\"208.28\" x2=\"81.28\" y2=\"208.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"81.28\" y1=\"208.28\" x2=\"81.28\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"CREF2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND3\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"190.5\" y1=\"147.32\" x2=\"190.5\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"GND\"/>\n<pinref part=\"GND2\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"142.24\" y1=\"147.32\" x2=\"142.24\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"142.24\" y1=\"170.18\" x2=\"144.78\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"170.18\" x2=\"147.32\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CLK-\"/>\n<pinref part=\"GND10\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"187.96\" y1=\"208.28\" x2=\"190.5\" y2=\"208.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"190.5\" y1=\"208.28\" x2=\"190.5\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND12\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"10.16\" y1=\"139.7\" x2=\"10.16\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND1\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"20.32\" y1=\"139.7\" x2=\"20.32\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND37\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"129.54\" y1=\"142.24\" x2=\"129.54\" y2=\"139.7\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SPEN\"/>\n<pinref part=\"GND38\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"200.66\" y1=\"147.32\" x2=\"200.66\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"165.1\" x2=\"187.96\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SPEN\"/>\n<pinref part=\"GND36\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"91.44\" y1=\"147.32\" x2=\"91.44\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"91.44\" y1=\"165.1\" x2=\"78.74\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND33\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"22.86\" y1=\"233.68\" x2=\"22.86\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"233.68\" x2=\"22.86\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD1_A\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"10.16\" y1=\"233.68\" x2=\"10.16\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD2_A\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"22.86\" y1=\"236.22\" x2=\"22.86\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"233.68\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_A\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"40.64\" y1=\"236.22\" x2=\"40.64\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CADD2_A\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"40.64\" y1=\"233.68\" x2=\"53.34\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"53.34\" y1=\"233.68\" x2=\"53.34\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND25\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"53.34\" y1=\"231.14\" x2=\"53.34\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"53.34\" y=\"233.68\"/>\n</segment>\n<segment>\n<pinref part=\"CODD1_B\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"116.84\" y1=\"236.22\" x2=\"116.84\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD2_B\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"116.84\" y1=\"233.68\" x2=\"129.54\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"129.54\" y1=\"233.68\" x2=\"129.54\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"129.54\" y1=\"233.68\" x2=\"129.54\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"129.54\" y=\"233.68\"/>\n<pinref part=\"GND11\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_B\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"236.22\" x2=\"147.32\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CADD2_B\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"233.68\" x2=\"160.02\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"160.02\" y1=\"233.68\" x2=\"160.02\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"160.02\" y1=\"233.68\" x2=\"160.02\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"160.02\" y=\"233.68\"/>\n<pinref part=\"GND49\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND6\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"C-AIN3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"116.84\" y1=\"139.7\" x2=\"116.84\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND75\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"GND\"/>\n<junction x=\"78.74\" y=\"71.12\"/>\n<wire x1=\"78.74\" y1=\"71.12\" x2=\"78.74\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"CP11\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND45\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"17.78\" y1=\"104.14\" x2=\"17.78\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_5V_10NF\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"17.78\" y1=\"101.6\" x2=\"17.78\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"104.14\" x2=\"27.94\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"101.6\" x2=\"17.78\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"17.78\" y=\"101.6\"/>\n</segment>\n<segment>\n<pinref part=\"REG\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND14\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"78.74\" y1=\"99.06\" x2=\"78.74\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"CP5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"48.26\" y1=\"104.14\" x2=\"48.26\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"104.14\" x2=\"55.88\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"55.88\" y1=\"101.6\" x2=\"48.26\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"63.5\" y1=\"104.14\" x2=\"63.5\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"101.6\" x2=\"55.88\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"55.88\" y=\"101.6\"/>\n<pinref part=\"GND50\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"63.5\" y1=\"99.06\" x2=\"63.5\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"101.6\"/>\n</segment>\n<segment>\n<pinref part=\"CP6\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND51\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"93.98\" y1=\"99.06\" x2=\"93.98\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"RLEDPOW\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"106.68\" y1=\"99.06\" x2=\"106.68\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND52\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"C_5V_10NF1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"27.94\" y1=\"68.58\" x2=\"27.94\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"66.04\" x2=\"17.78\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP10\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"17.78\" y1=\"66.04\" x2=\"17.78\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND76\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"17.78\" y1=\"63.5\" x2=\"17.78\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"17.78\" y=\"66.04\"/>\n</segment>\n<segment>\n<pinref part=\"CP9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"101.6\" y1=\"68.58\" x2=\"101.6\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"66.04\" x2=\"93.98\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"93.98\" y1=\"66.04\" x2=\"93.98\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND53\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"101.6\" y1=\"63.5\" x2=\"101.6\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"66.04\"/>\n</segment>\n<segment>\n<pinref part=\"CP3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"48.26\" y1=\"68.58\" x2=\"48.26\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"48.26\" y1=\"66.04\" x2=\"55.88\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"66.04\" x2=\"55.88\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"66.04\" x2=\"63.5\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"66.04\" x2=\"63.5\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"55.88\" y=\"66.04\"/>\n<pinref part=\"GND54\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"63.5\" y1=\"63.5\" x2=\"63.5\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"66.04\"/>\n</segment>\n</net>\n<net name=\"+3V3\" class=\"2\">\n<segment>\n<wire x1=\"22.86\" y1=\"248.92\" x2=\"22.86\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V16\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"10.16\" y1=\"246.38\" x2=\"22.86\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD1_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"10.16\" y1=\"243.84\" x2=\"10.16\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD2_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"22.86\" y1=\"243.84\" x2=\"22.86\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"OVDD1\"/>\n<wire x1=\"78.74\" y1=\"205.74\" x2=\"83.82\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"205.74\" x2=\"83.82\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"OVDD2\"/>\n<wire x1=\"83.82\" y1=\"203.2\" x2=\"78.74\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V11\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"83.82\" y1=\"205.74\" x2=\"83.82\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"205.74\"/>\n</segment>\n<segment>\n<pinref part=\"C0DD2_B\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"+3V21\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"129.54\" y1=\"248.92\" x2=\"129.54\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CODD1_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"129.54\" y1=\"246.38\" x2=\"129.54\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"116.84\" y1=\"243.84\" x2=\"116.84\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"116.84\" y1=\"246.38\" x2=\"129.54\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"129.54\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"OVDD2\"/>\n<wire x1=\"187.96\" y1=\"203.2\" x2=\"193.04\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"193.04\" y1=\"203.2\" x2=\"193.04\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"OVDD1\"/>\n<wire x1=\"187.96\" y1=\"205.74\" x2=\"193.04\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"193.04\" y1=\"205.74\" x2=\"193.04\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"193.04\" y=\"205.74\"/>\n<pinref part=\"+3V12\" gate=\"G$1\" pin=\"+3V3\"/>\n</segment>\n<segment>\n<pinref part=\"+3V1\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"93.98\" y1=\"116.84\" x2=\"93.98\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"93.98\" y1=\"109.22\" x2=\"93.98\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"REG\" gate=\"G$1\" pin=\"OUT\"/>\n<wire x1=\"93.98\" y1=\"114.3\" x2=\"90.17\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"114.3\"/>\n<pinref part=\"LEDPOW\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"96.52\" y1=\"114.3\" x2=\"93.98\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"114.3\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_33\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CLK+\"/>\n<wire x1=\"187.96\" y1=\"210.82\" x2=\"195.58\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"210.82\" x2=\"210.82\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D1A\"/>\n<wire x1=\"147.32\" y1=\"213.36\" x2=\"139.7\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D2A\"/>\n<wire x1=\"147.32\" y1=\"210.82\" x2=\"139.7\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D3A\"/>\n<wire x1=\"147.32\" y1=\"208.28\" x2=\"139.7\" y2=\"208.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"208.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D4A\"/>\n<wire x1=\"147.32\" y1=\"205.74\" x2=\"139.7\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"205.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D5A\"/>\n<wire x1=\"147.32\" y1=\"203.2\" x2=\"139.7\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"203.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D6A\"/>\n<wire x1=\"147.32\" y1=\"200.66\" x2=\"139.7\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"200.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D0A\"/>\n<wire x1=\"147.32\" y1=\"215.9\" x2=\"139.7\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"215.9\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D7A\"/>\n<wire x1=\"147.32\" y1=\"198.12\" x2=\"139.7\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D0B\"/>\n<wire x1=\"147.32\" y1=\"193.04\" x2=\"139.7\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"193.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D1B\"/>\n<wire x1=\"147.32\" y1=\"190.5\" x2=\"139.7\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"190.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D2B\"/>\n<wire x1=\"147.32\" y1=\"187.96\" x2=\"139.7\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"187.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D3B\"/>\n<wire x1=\"147.32\" y1=\"185.42\" x2=\"139.7\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"185.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D4B\"/>\n<wire x1=\"147.32\" y1=\"182.88\" x2=\"139.7\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D5B\"/>\n<wire x1=\"147.32\" y1=\"180.34\" x2=\"139.7\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"180.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D6B\"/>\n<wire x1=\"147.32\" y1=\"177.8\" x2=\"139.7\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"177.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D7B\"/>\n<wire x1=\"147.32\" y1=\"175.26\" x2=\"139.7\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"175.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"REF1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"REFIO\"/>\n<pinref part=\"CREF1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"81.28\" y1=\"157.48\" x2=\"81.28\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"81.28\" y1=\"162.56\" x2=\"78.74\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INA-1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CMA\"/>\n<wire x1=\"38.1\" y1=\"162.56\" x2=\"35.56\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INA-\"/>\n<wire x1=\"38.1\" y1=\"157.48\" x2=\"35.56\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"35.56\" y1=\"162.56\" x2=\"35.56\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C-AIN1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"35.56\" y1=\"162.56\" x2=\"10.16\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"162.56\" x2=\"10.16\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"35.56\" y=\"162.56\"/>\n</segment>\n</net>\n<net name=\"LOW_22\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CS/OUTSEL\"/>\n<wire x1=\"78.74\" y1=\"195.58\" x2=\"96.52\" y2=\"195.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"195.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CS/OUTSEL\"/>\n<wire x1=\"187.96\" y1=\"195.58\" x2=\"195.58\" y2=\"195.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"195.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LOW_24\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SCLK/DIV\"/>\n<wire x1=\"78.74\" y1=\"198.12\" x2=\"96.52\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SCLK/DIV\"/>\n<wire x1=\"187.96\" y1=\"198.12\" x2=\"195.58\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LOW_25\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SDIN/FORMAT\"/>\n<wire x1=\"78.74\" y1=\"200.66\" x2=\"96.52\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"200.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SDIN/FORMAT\"/>\n<wire x1=\"187.96\" y1=\"200.66\" x2=\"195.58\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"200.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"REF2\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"REFIO\"/>\n<pinref part=\"CREF2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"190.5\" y1=\"157.48\" x2=\"190.5\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"190.5\" y1=\"162.56\" x2=\"187.96\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"D0A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D0A\"/>\n<wire x1=\"30.48\" y1=\"215.9\" x2=\"38.1\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"215.9\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D1A\"/>\n<wire x1=\"30.48\" y1=\"213.36\" x2=\"38.1\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D2A\"/>\n<wire x1=\"38.1\" y1=\"210.82\" x2=\"30.48\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D3A\"/>\n<wire x1=\"38.1\" y1=\"208.28\" x2=\"30.48\" y2=\"208.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"208.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D4A\"/>\n<wire x1=\"38.1\" y1=\"205.74\" x2=\"30.48\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"205.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D5A\"/>\n<wire x1=\"38.1\" y1=\"203.2\" x2=\"30.48\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"203.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D6A\"/>\n<wire x1=\"38.1\" y1=\"200.66\" x2=\"30.48\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"200.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D7A\"/>\n<wire x1=\"38.1\" y1=\"198.12\" x2=\"30.48\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D0B\"/>\n<wire x1=\"38.1\" y1=\"193.04\" x2=\"30.48\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"193.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D1B\"/>\n<wire x1=\"38.1\" y1=\"190.5\" x2=\"30.48\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"190.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D2B\"/>\n<wire x1=\"38.1\" y1=\"187.96\" x2=\"30.48\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"187.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D3B\"/>\n<wire x1=\"38.1\" y1=\"185.42\" x2=\"30.48\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"185.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D4B\"/>\n<wire x1=\"38.1\" y1=\"182.88\" x2=\"30.48\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D5B\"/>\n<wire x1=\"38.1\" y1=\"180.34\" x2=\"30.48\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"180.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D6B\"/>\n<wire x1=\"38.1\" y1=\"177.8\" x2=\"30.48\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"177.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D7B\"/>\n<wire x1=\"38.1\" y1=\"175.26\" x2=\"30.48\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"175.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INB1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INB+\"/>\n<wire x1=\"22.86\" y1=\"154.94\" x2=\"38.1\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"22.86\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INA1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INA+\"/>\n<wire x1=\"22.86\" y1=\"160.02\" x2=\"38.1\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"22.86\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_32\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CLK+\"/>\n<wire x1=\"78.74\" y1=\"210.82\" x2=\"86.36\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"86.36\" y1=\"210.82\" x2=\"101.6\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INB-1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INB-\"/>\n<pinref part=\"C-AIN2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"38.1\" y1=\"152.4\" x2=\"35.56\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CMB\"/>\n<wire x1=\"35.56\" y1=\"152.4\" x2=\"20.32\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"20.32\" y1=\"152.4\" x2=\"20.32\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"38.1\" y1=\"149.86\" x2=\"35.56\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"35.56\" y1=\"149.86\" x2=\"35.56\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"35.56\" y=\"152.4\"/>\n</segment>\n</net>\n<net name=\"INB-2\" class=\"0\">\n<segment>\n<pinref part=\"C-AIN4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INB-\"/>\n<wire x1=\"129.54\" y1=\"149.86\" x2=\"129.54\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"129.54\" y1=\"152.4\" x2=\"144.78\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CMB\"/>\n<wire x1=\"144.78\" y1=\"152.4\" x2=\"147.32\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"149.86\" x2=\"144.78\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"149.86\" x2=\"144.78\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"144.78\" y=\"152.4\"/>\n</segment>\n</net>\n<net name=\"INA12\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INA+\"/>\n<wire x1=\"132.08\" y1=\"160.02\" x2=\"147.32\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INB12\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INB+\"/>\n<wire x1=\"147.32\" y1=\"154.94\" x2=\"132.08\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_SHDN1\" class=\"0\">\n<segment>\n<wire x1=\"106.68\" y1=\"160.02\" x2=\"78.74\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"93.98\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SHDN\"/>\n</segment>\n</net>\n<net name=\"L120_SYNC\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SYNC\"/>\n<wire x1=\"78.74\" y1=\"213.36\" x2=\"101.6\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SYNC\"/>\n<wire x1=\"187.96\" y1=\"213.36\" x2=\"210.82\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"VCCA\" class=\"2\">\n<segment>\n<pinref part=\"U$11\" gate=\"G$1\" pin=\"VCCA\"/>\n<pinref part=\"CADD2_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"53.34\" y1=\"248.92\" x2=\"53.34\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CADD1_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"53.34\" y1=\"246.38\" x2=\"53.34\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"243.84\" x2=\"40.64\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"246.38\" x2=\"53.34\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"53.34\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"147.32\" y1=\"243.84\" x2=\"147.32\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"246.38\" x2=\"160.02\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CADD2_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"160.02\" y1=\"246.38\" x2=\"160.02\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$9\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"160.02\" y1=\"246.38\" x2=\"160.02\" y2=\"248.92\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"160.02\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"AVDD2\"/>\n<wire x1=\"38.1\" y1=\"165.1\" x2=\"35.56\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"AVDD1\"/>\n<wire x1=\"38.1\" y1=\"167.64\" x2=\"35.56\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"35.56\" y1=\"167.64\" x2=\"35.56\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$12\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"35.56\" y1=\"167.64\" x2=\"30.48\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"30.48\" y1=\"167.64\" x2=\"30.48\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"35.56\" y=\"167.64\"/>\n</segment>\n<segment>\n<pinref part=\"U$10\" gate=\"G$1\" pin=\"VCCA\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"AVDD1\"/>\n<wire x1=\"139.7\" y1=\"167.64\" x2=\"139.7\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"167.64\" x2=\"144.78\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"AVDD2\"/>\n<wire x1=\"144.78\" y1=\"167.64\" x2=\"139.7\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"165.1\" x2=\"144.78\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"165.1\" x2=\"144.78\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"144.78\" y=\"167.64\"/>\n</segment>\n<segment>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"OUT\"/>\n<wire x1=\"90.17\" y1=\"78.74\" x2=\"93.98\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP9\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"93.98\" y1=\"78.74\" x2=\"101.6\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"78.74\" x2=\"101.6\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$1\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"101.6\" y1=\"81.28\" x2=\"101.6\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"78.74\"/>\n<pinref part=\"CP4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"93.98\" y1=\"76.2\" x2=\"93.98\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"78.74\"/>\n</segment>\n</net>\n<net name=\"E_SHDN2\" class=\"0\">\n<segment>\n<wire x1=\"205.74\" y1=\"160.02\" x2=\"215.9\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"160.02\" x2=\"195.58\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"160.02\" x2=\"187.96\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"203.2\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SHDN\"/>\n</segment>\n</net>\n<net name=\"INA-2\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INA-\"/>\n<wire x1=\"147.32\" y1=\"157.48\" x2=\"144.78\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"157.48\" x2=\"144.78\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CMA\"/>\n<wire x1=\"144.78\" y1=\"162.56\" x2=\"147.32\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"162.56\" x2=\"129.54\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"144.78\" y=\"162.56\"/>\n<wire x1=\"129.54\" y1=\"162.56\" x2=\"116.84\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"116.84\" y1=\"162.56\" x2=\"116.84\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C-AIN3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"+5V\" class=\"3\">\n<segment>\n<pinref part=\"P+3\" gate=\"1\" pin=\"+5V\"/>\n<pinref part=\"CP11\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"17.78\" y1=\"116.84\" x2=\"17.78\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"L1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"17.78\" y1=\"114.3\" x2=\"17.78\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"17.78\" y1=\"114.3\" x2=\"27.94\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"17.78\" y=\"114.3\"/>\n<pinref part=\"C_5V_10NF\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"27.94\" y1=\"114.3\" x2=\"30.48\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"111.76\" x2=\"27.94\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"27.94\" y=\"114.3\"/>\n</segment>\n<segment>\n<pinref part=\"P+5\" gate=\"1\" pin=\"+5V\"/>\n<pinref part=\"CP10\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"17.78\" y1=\"81.28\" x2=\"17.78\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_5V_10NF1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"17.78\" y1=\"78.74\" x2=\"17.78\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"76.2\" x2=\"27.94\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"78.74\" x2=\"17.78\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"17.78\" y=\"78.74\"/>\n<pinref part=\"L2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"30.48\" y1=\"78.74\" x2=\"27.94\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"27.94\" y=\"78.74\"/>\n</segment>\n</net>\n<net name=\"N$34\" class=\"0\">\n<segment>\n<pinref part=\"RLEDPOW\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LEDPOW\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"106.68\" y1=\"111.76\" x2=\"106.68\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"106.68\" y1=\"114.3\" x2=\"104.14\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$49\" class=\"3\">\n<segment>\n<pinref part=\"L1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"45.72\" y1=\"114.3\" x2=\"48.26\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP5\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"48.26\" y1=\"114.3\" x2=\"48.26\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"55.88\" y1=\"111.76\" x2=\"55.88\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"55.88\" y1=\"114.3\" x2=\"48.26\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"48.26\" y=\"114.3\"/>\n<pinref part=\"CP2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"63.5\" y1=\"111.76\" x2=\"63.5\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"114.3\" x2=\"55.88\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"55.88\" y=\"114.3\"/>\n<pinref part=\"REG\" gate=\"G$1\" pin=\"IN\"/>\n<wire x1=\"67.31\" y1=\"114.3\" x2=\"63.5\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"114.3\"/>\n</segment>\n</net>\n<net name=\"N$48\" class=\"3\">\n<segment>\n<pinref part=\"L2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CP3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"45.72\" y1=\"78.74\" x2=\"48.26\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"48.26\" y1=\"78.74\" x2=\"48.26\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP7\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"55.88\" y1=\"76.2\" x2=\"55.88\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"55.88\" y1=\"78.74\" x2=\"48.26\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"48.26\" y=\"78.74\"/>\n<pinref part=\"CP8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"63.5\" y1=\"76.2\" x2=\"63.5\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"78.74\" x2=\"55.88\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"55.88\" y=\"78.74\"/>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"IN\"/>\n<wire x1=\"67.31\" y1=\"78.74\" x2=\"63.5\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"78.74\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n</sheets>\n<errors>\n<approved hash=\"104,2,20.32,71.12,OSC,VDD,+3V3,,,\"/>\n<approved hash=\"202,2,45.72,60.96,OSC,TRI,,,,\"/>\n<approved hash=\"104,3,38.1,167.64,IC1,AVDD1,VCCA,,,\"/>\n<approved hash=\"104,3,38.1,165.1,IC1,AVDD2,VCCA,,,\"/>\n<approved hash=\"104,3,147.32,167.64,IC2,AVDD1,VCCA,,,\"/>\n<approved hash=\"104,3,147.32,165.1,IC2,AVDD2,VCCA,,,\"/>\n<approved hash=\"204,2,228.6,35.56,USB1,SLD,,,,\"/>\n<approved hash=\"104,1,10.16,119.38,GAINSW1P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,25.4,119.38,GAINSW2P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,200.66,119.38,GAINSW3P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,215.9,119.38,GAINSW4P,VCC,VCCA,,,\"/>\n<approved hash=\"104,2,104.14,60.96,IOEXPAND_0X20_BOT,VDD,+3V3,,,\"/>\n<approved hash=\"104,2,104.14,20.32,IOEXPAND_0X20_BOT,VSS,GND,,,\"/>\n<approved hash=\"104,2,165.1,60.96,IOEXPAND_0X21_TOP,VDD,+3V3,,,\"/>\n<approved hash=\"104,2,165.1,20.32,IOEXPAND_0X21_TOP,VSS,GND,,,\"/>\n<approved hash=\"104,1,58.42,119.38,OVSAMP1P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,248.92,119.38,OVSAMP2P,VCC,VCCA,,,\"/>\n<approved hash=\"113,2,193.571,130.071,FRAME1,,,,,\"/>\n<approved hash=\"113,1,193.571,130.071,FRAME2,,,,,\"/>\n<approved hash=\"113,3,193.571,130.071,FRAME3,,,,,\"/>\n</errors>\n</schematic>\n</drawing>\n<compatibility>\n<note version=\"6.3\" minversion=\"6.2.2\" severity=\"warning\">\nSince Version 6.2.2 text objects can contain more than one line,\nwhich will not be processed correctly with this version.\n</note>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/max10adc_v9.0_rack.brd",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"9.6.2\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"yes\"/>\n<setting keepoldvectorfont=\"yes\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"1\" unitdist=\"mm\" unit=\"mm\" style=\"dots\" multiple=\"1\" display=\"yes\" altdistance=\"0.1\" altunitdist=\"mm\" altunit=\"mm\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"2\" name=\"Route2\" color=\"10\" fill=\"15\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"7\" name=\"Route7\" color=\"4\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"8\" name=\"Route8\" color=\"1\" fill=\"2\" visible=\"no\" active=\"no\"/>\n<layer number=\"9\" name=\"Route9\" color=\"4\" fill=\"2\" visible=\"no\" active=\"no\"/>\n<layer number=\"10\" name=\"Route10\" color=\"1\" fill=\"7\" visible=\"no\" active=\"no\"/>\n<layer number=\"11\" name=\"Route11\" color=\"4\" fill=\"7\" visible=\"no\" active=\"no\"/>\n<layer number=\"12\" name=\"Route12\" color=\"1\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"13\" name=\"Route13\" color=\"4\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"14\" name=\"Route14\" color=\"1\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"15\" name=\"Route15\" color=\"13\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"no\" active=\"yes\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" visible=\"no\" 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rot=\"R90\">3.3V\npower</text>\n<text x=\"64.6\" y=\"-2.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">low gain</text>\n<text x=\"72.4\" y=\"-2.6\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">high gain</text>\n<text x=\"72\" y=\"51.7\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">high gain</text>\n<text x=\"64\" y=\"52.1\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">low gain</text>\n<wire x1=\"16.2\" y1=\"56.7\" x2=\"16.2\" y2=\"84.7\" width=\"0.1524\" layer=\"21\"/>\n<text x=\"-3.01\" y=\"21.61\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">GND</text>\n<text x=\"-1.81\" y=\"25.21\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">121\nExtTrig</text>\n<text x=\"-3.01\" y=\"28.61\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">AIN1</text>\n<text x=\"31.3\" y=\"10.8\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">10nF</text>\n<text x=\"80.2\" y=\"86.9\" size=\"0.8128\" layer=\"21\" font=\"vector\">AIN6</text>\n<text x=\"79.7\" y=\"65.2\" size=\"0.8128\" layer=\"21\" font=\"vector\">AIN14</text>\n<text x=\"1.59\" y=\"12.19\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">101</text>\n<text x=\"1.79\" y=\"29.99\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">GND</text>\n<text x=\"1.79\" y=\"27.49\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">3.3V</text>\n<text x=\"1.59\" y=\"14.79\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">100</text>\n<text x=\"0.89\" y=\"17.29\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">91</text>\n<text x=\"0.89\" y=\"19.89\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">90</text>\n<text x=\"0.89\" y=\"22.39\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">89</text>\n<text x=\"0.89\" y=\"24.89\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">88</text>\n<text x=\"14.09\" y=\"84.81\" size=\"0.8128\" layer=\"21\" font=\"vector\" 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rot=\"R90\">105</text>\n<text x=\"-8.61\" y=\"84.81\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">122</text>\n<text x=\"-3.91\" y=\"59.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">140</text>\n<text x=\"-1.31\" y=\"59.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">135</text>\n<text x=\"1.29\" y=\"59.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">134</text>\n<text x=\"3.79\" y=\"59.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">131</text>\n<text x=\"6.29\" y=\"59.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">132</text>\n<text x=\"9.49\" y=\"60.19\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">130</text>\n<text x=\"11.99\" y=\"60.19\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">127</text>\n<text x=\"14.89\" y=\"60.19\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">124</text>\n<text x=\"-3.8\" y=\"52\" size=\"0.8128\" layer=\"21\" font=\"vector\">GND</text>\n<text x=\"0.14\" y=\"49.42\" size=\"0.8128\" layer=\"21\" font=\"vector\">RX L</text>\n<text x=\"0.14\" y=\"43.72\" size=\"0.8128\" layer=\"21\" font=\"vector\">TRIG\nOUT</text>\n<text x=\"0.14\" y=\"46.92\" size=\"0.8128\" layer=\"21\" font=\"vector\">TX L</text>\n<text x=\"0.14\" y=\"41.12\" size=\"0.8128\" layer=\"21\" font=\"vector\">TRIG\nIN</text>\n<text x=\"0.14\" y=\"39.32\" size=\"0.8128\" layer=\"21\" font=\"vector\">5V</text>\n<text x=\"-2.4\" y=\"36.72\" size=\"0.8128\" layer=\"21\" font=\"vector\">SPR R L</text>\n<text x=\"0.14\" y=\"33.62\" size=\"0.8128\" layer=\"21\" font=\"vector\">CLK\nOUT</text>\n<text x=\"-0.69\" y=\"52.61\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">GND</text>\n<text x=\"-0.59\" y=\"50.11\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">RX</text>\n<text x=\"-0.59\" y=\"47.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">TX</text>\n<text x=\"-0.59\" y=\"45.61\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">TRG\nIN</text>\n<text x=\"-0.69\" y=\"42.91\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">TRG\nOUT</text>\n<text x=\"-1.59\" y=\"39.91\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">5V</text>\n<text x=\"-0.89\" y=\"35.51\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CLK\nIN</text>\n<text x=\"-7.11\" y=\"-11.19\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">1.6mm</text>\n<dimension x1=\"100\" y1=\"32\" x2=\"100\" y2=\"22\" x3=\"98.6\" y3=\"27\" textsize=\"0.8128\" layer=\"37\" dtype=\"vertical\" visible=\"yes\"/>\n<dimension x1=\"100\" y1=\"53\" x2=\"100\" y2=\"43\" x3=\"98.6\" y3=\"48\" textsize=\"0.8128\" layer=\"37\" dtype=\"vertical\" visible=\"yes\"/>\n<text x=\"55.7\" y=\"31.6\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">Super gain</text>\n<text x=\"77.6\" y=\"31.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">50</text>\n<text x=\"77.6\" y=\"24.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">50</text>\n<text x=\"48.7\" y=\"-3.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">Super gain</text>\n<text x=\"71.6\" y=\"-6.5\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">50</text>\n<text x=\"74.8\" y=\"85\" size=\"0.8128\" layer=\"21\" font=\"vector\">EIO1</text>\n<text x=\"74.8\" y=\"82.4\" size=\"0.8128\" layer=\"21\" font=\"vector\">EIO2</text>\n<text x=\"74.8\" y=\"79.9\" size=\"0.8128\" layer=\"21\" font=\"vector\">EIO3</text>\n<text x=\"74.8\" y=\"77.3\" size=\"0.8128\" layer=\"21\" font=\"vector\">EIO4</text>\n<text x=\"72.3\" y=\"72.3\" size=\"0.8128\" layer=\"21\" font=\"vector\">141_SCL</text>\n<text x=\"73\" y=\"69.7\" size=\"0.8128\" layer=\"21\" font=\"vector\">21_SDA</text>\n<text x=\"74.8\" y=\"67.2\" size=\"0.8128\" layer=\"21\" font=\"vector\">3.3V</text>\n<text x=\"74.8\" y=\"74.8\" size=\"0.8128\" layer=\"21\" font=\"vector\">GND</text>\n<text x=\"-3.9\" y=\"0.4\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R270\">JTAG</text>\n<text x=\"84.4\" y=\"-10.1\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CH 0</text>\n<text x=\"84.4\" y=\"10.9\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CH 1</text>\n<text x=\"84.4\" y=\"31.9\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CH 2</text>\n<text x=\"84.4\" y=\"52.9\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">CH 3</text>\n<dimension x1=\"76\" y1=\"16.7\" x2=\"76\" y2=\"-4.2\" x3=\"82\" y3=\"6.25\" textsize=\"0.8128\" layer=\"37\" visible=\"yes\"/>\n<text x=\"9.6\" y=\"15.6\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R180\">10k</text>\n<dimension x1=\"-12\" y1=\"60\" x2=\"86\" y2=\"60\" x3=\"37\" y3=\"92\" textsize=\"0.8128\" layer=\"21\" visible=\"yes\"/>\n<text x=\"-3.01\" y=\"16.61\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">GND</text>\n<text x=\"-3.01\" y=\"11.61\" size=\"0.8128\" layer=\"21\" font=\"vector\" rot=\"R90\">GND</text>\n<dimension x1=\"-20\" y1=\"29\" x2=\"-20\" y2=\"34.08\" x3=\"6.4\" y3=\"31.54\" textsize=\"1.27\" layer=\"21\" visible=\"yes\"/>\n<dimension x1=\"-21\" y1=\"29\" x2=\"-21\" y2=\"-12\" x3=\"-22\" y3=\"8.5\" textsize=\"0.8128\" layer=\"21\" visible=\"yes\"/>\n</plain>\n<libraries>\n<library name=\"rcl\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      3006Y&lt;BR&gt;\n      3009P&lt;BR&gt;\n      3009W&lt;BR&gt;\n      3009Y&lt;BR&gt;\n      3057J&lt;BR&gt;\n      3057L&lt;BR&gt;\n      3057P&lt;BR&gt;\n      3057Y&lt;BR&gt;\n      3059J&lt;BR&gt;\n      3059L&lt;BR&gt;\n      3059P&lt;BR&gt;\n      3059Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      89P&lt;BR&gt;\n      89W&lt;BR&gt;\n      89X&lt;BR&gt;\n      89PH&lt;BR&gt;\n      76P&lt;BR&gt;\n      89XH&lt;BR&gt;\n      78SLT&lt;BR&gt;\n      78L&amp;nbsp;ALT&lt;BR&gt;\n      56P&amp;nbsp;ALT&lt;BR&gt;\n      78P&amp;nbsp;ALT&lt;BR&gt;\n      T8S&lt;BR&gt;\n      78L&lt;BR&gt;\n      56P&lt;BR&gt;\n      78P&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      T18/784&lt;BR&gt;\n      783&lt;BR&gt;\n      781&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2199&lt;BR&gt;\n      1697/1897&lt;BR&gt;\n      1680/1880&lt;BR&gt;\n      2187&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      8035EKP/CT20/RJ-20P&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ-20X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      1211L&lt;BR&gt;\n      8012EKQ&amp;nbsp;ALT&lt;BR&gt;\n      8012EKR&amp;nbsp;ALT&lt;BR&gt;\n      1211P&lt;BR&gt;\n      8012EKJ&lt;BR&gt;\n      8012EKL&lt;BR&gt;\n      8012EKQ&lt;BR&gt;\n      8012EKR&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      2101P&lt;BR&gt;\n      2101W&lt;BR&gt;\n      2101Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2102L&lt;BR&gt;\n      2102S&lt;BR&gt;\n      2102Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVMCOG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      43P&lt;BR&gt;\n      43W&lt;BR&gt;\n      43Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      40L&lt;BR&gt;\n      40P&lt;BR&gt;\n      40Y&lt;BR&gt;\n      70Y-T602&lt;BR&gt;\n      70L&lt;BR&gt;\n      70P&lt;BR&gt;\n      70Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      3292P&lt;BR&gt;\n      3292W&lt;BR&gt;\n      3292X&lt;BR&gt;\n      3296P&lt;BR&gt;\n      3296W&lt;BR&gt;\n      3296X&lt;BR&gt;\n      3296Y&lt;BR&gt;\n      3296Z&lt;BR&gt;\n      3299P&lt;BR&gt;\n      3299W&lt;BR&gt;\n      3299X&lt;BR&gt;\n      3299Y&lt;BR&gt;\n      3299Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&amp;nbsp;ALT&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      64X&amp;nbsp;ALT&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66P&lt;BR&gt;\n      66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      25P&lt;BR&gt;\n      25S&lt;BR&gt;\n      25RX&lt;BR&gt;\n      82P&lt;BR&gt;\n      82M&lt;BR&gt;\n      82PA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      91E&lt;BR&gt;\n      91X&lt;BR&gt;\n      91T&lt;BR&gt;\n      91B&lt;BR&gt;\n      91A&lt;BR&gt;\n      91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      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&lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n     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ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;</description>\n<packages>\n<package name=\"C0805K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0805 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 2012</description>\n<wire x1=\"-0.925\" y1=\"0.6\" x2=\"0.925\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.925\" y1=\"-0.6\" x2=\"-0.925\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1\" y=\"0.875\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-1.9\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1\" y1=\"-0.65\" x2=\"-0.5\" y2=\"0.65\" layer=\"51\"/>\n<rectangle x1=\"0.5\" y1=\"-0.65\" x2=\"1\" y2=\"0.65\" layer=\"51\"/>\n</package>\n</packages>\n</library>\n<library name=\"led\">\n<description>&lt;b&gt;LEDs&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;br&gt;\nExtended by Federico Battaglin &lt;author&gt;&amp;lt;federico.rd@fdpinternational.com&amp;gt;&lt;/author&gt; with DUOLED</description>\n<packages>\n<package name=\"SML0805\">\n<description>&lt;b&gt;SML0805-2CW-TR (0805 PROFILE)&lt;/b&gt; COOL WHITE&lt;p&gt;\nSource: http://www.ledtronics.com/ds/smd-0603/Dstr0093.pdf</description>\n<wire x1=\"-0.95\" y1=\"-0.55\" x2=\"0.95\" y2=\"-0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.95\" y1=\"-0.55\" x2=\"0.95\" y2=\"0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.95\" y1=\"0.55\" x2=\"-0.95\" y2=\"0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.95\" y1=\"0.55\" x2=\"-0.95\" y2=\"-0.55\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.175\" y1=\"-0.025\" x2=\"0\" y2=\"0.15\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"0.15\" x2=\"0.15\" y2=\"0\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"0.15\" y1=\"0\" x2=\"-0.025\" y2=\"-0.175\" width=\"0.0634\" layer=\"21\"/>\n<wire x1=\"-0.025\" y1=\"-0.175\" x2=\"-0.175\" y2=\"-0.025\" width=\"0.0634\" layer=\"21\"/>\n<circle x=\"-0.275\" y=\"0.4\" radius=\"0.125\" width=\"0\" layer=\"21\"/>\n<smd name=\"C\" x=\"-1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"A\" x=\"1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<text x=\"-1.5\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.5\" y=\"-2\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n</library>\n<library name=\"resistor\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,203,138,231\" href=\"../directory.asp\" title=\"\"&gt;\n&lt;area shape=\"default\" nohref&gt;\n&lt;/map&gt;\n\n&lt;html&gt;\n\n&lt;title&gt;&lt;/title&gt;\n\n &lt;LINK REL=\"StyleSheet\" TYPE=\"text/css\" HREF=\"style-sheet.css\"&gt;\n\n&lt;body bgcolor=\"#ffffff\" text=\"#000000\" marginwidth=\"0\" marginheight=\"0\" topmargin=\"0\" leftmargin=\"0\"&gt;\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0 height=\"55%\"&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;/td&gt;\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n     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EVMCOG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      43P&lt;BR&gt;\n      43W&lt;BR&gt;\n      43Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      40L&lt;BR&gt;\n      40P&lt;BR&gt;\n      40Y&lt;BR&gt;\n      70Y-T602&lt;BR&gt;\n      70L&lt;BR&gt;\n      70P&lt;BR&gt;\n      70Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      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66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n  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64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n   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72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    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&lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;\n&lt;/BODY&gt;&lt;/HTML&gt;</description>\n<packages>\n<package name=\"R0805\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;</description>\n<wire x1=\"-0.41\" y1=\"0.635\" x2=\"0.41\" y2=\"0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-0.41\" y1=\"-0.635\" x2=\"0.41\" y2=\"-0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.973\" y1=\"0.983\" x2=\"1.973\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.973\" y1=\"0.983\" x2=\"1.973\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.973\" y1=\"-0.983\" x2=\"-1.973\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.973\" y1=\"-0.983\" x2=\"-1.973\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"0\" dx=\"1.3\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.95\" y=\"0\" dx=\"1.3\" dy=\"1.5\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"0.4064\" y1=\"-0.6985\" x2=\"1.0564\" y2=\"0.7015\" layer=\"51\"/>\n<rectangle x1=\"-1.0668\" y1=\"-0.6985\" x2=\"-0.4168\" y2=\"0.7015\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.5001\" x2=\"0.1999\" y2=\"0.5001\" layer=\"35\"/>\n</package>\n</packages>\n</library>\n<library name=\"10M08SAE144\">\n<packages>\n<package name=\"EQFP144\">\n<description>&lt;b&gt;EQFP144&lt;/b&gt;&lt;p&gt;\nSource: http://www.altera.com/literature/ds/144-EQFP.pdf</description>\n<wire x1=\"-9.8984\" y1=\"9.4\" x2=\"-9.4\" y2=\"9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-9.4\" y1=\"-9.8984\" x2=\"9.4\" y2=\"-9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"9.8984\" y1=\"-9.4\" x2=\"9.8984\" y2=\"9.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"9.4\" y1=\"9.8984\" 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layer=\"31\"/>\n</package>\n</packages>\n</library>\n<library name=\"crystal\">\n<description>&lt;b&gt;Crystals and Crystal Resonators&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"ASE\">\n<description>&lt;b&gt;3.3Vdc CMOS SMD CRYSTAL CLOCK OSCILLATOR&lt;/b&gt; ASE Series&lt;p&gt;\nSource: www.abracon.com</description>\n<wire x1=\"-1.3\" y1=\"1.15\" x2=\"1.3\" y2=\"1.15\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"0.95\" x2=\"1.5\" y2=\"-0.95\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.3\" y1=\"-1.15\" x2=\"-1.3\" y2=\"-1.15\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-0.95\" x2=\"-1.5\" y2=\"0.95\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.3\" y1=\"1.15\" x2=\"-1.5\" y2=\"0.95\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"1.5\" y1=\"0.95\" x2=\"1.3\" y2=\"1.15\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"-1.5\" y1=\"-0.95\" x2=\"-1.3\" y2=\"-1.15\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"1.3\" y1=\"-1.15\" x2=\"1.5\" y2=\"-0.95\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<circle x=\"-1\" y=\"-0.7\" radius=\"0.1802\" width=\"0\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.05\" y=\"-0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.05\" y=\"-0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.05\" y=\"0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-1.05\" y=\"0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-2.25\" y=\"1.5\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.75\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n</library>\n<library name=\"Seeed-IC-2016\">\n<packages>\n<package name=\"SOT-223\">\n<description>&lt;b&gt;SMALL OUTLINE TRANSISTOR&lt;/b&gt;</description>\n<wire x1=\"3.277\" y1=\"1.778\" x2=\"3.277\" y2=\"-1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire 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layer=\"1\"/>\n<smd name=\"27\" x=\"3.5\" y=\"-1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"28\" x=\"3.5\" y=\"-1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"29\" x=\"3.5\" y=\"-0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"30\" x=\"3.5\" y=\"-0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"31\" x=\"3.5\" y=\"0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"32\" x=\"3.5\" y=\"0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"33\" x=\"3.5\" y=\"1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"34\" x=\"3.5\" y=\"1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"35\" x=\"3.5\" y=\"2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"36\" x=\"3.5\" y=\"2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"37\" x=\"2.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"38\" x=\"2.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"39\" x=\"1.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"40\" x=\"1.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"41\" x=\"0.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"42\" x=\"0.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"43\" x=\"-0.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"44\" x=\"-0.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"45\" x=\"-1.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"46\" x=\"-1.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"47\" x=\"-2.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"48\" x=\"-2.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-3.81\" y=\"4.445\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-5.715\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<dimension x1=\"-3.5\" y1=\"-0.5\" x2=\"3.5\" y2=\"-0.5\" x3=\"0\" y3=\"-1.3\" textsize=\"0.3\" layer=\"21\" width=\"0.03\" visible=\"yes\"/>\n<dimension x1=\"-2\" y1=\"3.5\" x2=\"-2\" y2=\"-3.5\" x3=\"-1.5\" y3=\"0\" textsize=\"0.3\" layer=\"21\" width=\"0.03\"/>\n<dimension x1=\"-2.8\" y1=\"0\" x2=\"2.8\" y2=\"0\" x3=\"0\" y3=\"0.5\" textsize=\"0.3\" layer=\"21\" dtype=\"horizontal\" width=\"0.03\"/>\n<dimension x1=\"3\" y1=\"-2.8\" x2=\"3\" y2=\"2.8\" x3=\"2\" y3=\"0\" textsize=\"0.3\" layer=\"21\" dtype=\"horizontal\" width=\"0.03\" visible=\"yes\"/>\n<smd name=\"EP_GND\" x=\"0\" y=\"0\" dx=\"5.588\" dy=\"5.588\" layer=\"1\"/>\n</package>\n</packages>\n</library>\n<library name=\"Seeed-OPL-Connector\">\n<packages>\n<package name=\"H2X5-2.54\">\n<wire x1=\"-2.54\" y1=\"6.35\" x2=\"2.54\" y2=\"6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"6.35\" x2=\"2.54\" y2=\"-6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"-6.35\" x2=\"-2.54\" y2=\"-6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"-6.35\" x2=\"-2.54\" y2=\"6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"6.35\" x2=\"2.54\" y2=\"6.35\" width=\"0\" layer=\"39\"/>\n<wire x1=\"2.54\" y1=\"6.35\" x2=\"2.54\" y2=\"-6.35\" width=\"0\" layer=\"39\"/>\n<wire x1=\"2.54\" y1=\"-6.35\" x2=\"-2.54\" y2=\"-6.35\" width=\"0\" layer=\"39\"/>\n<wire x1=\"-2.54\" y1=\"-6.35\" x2=\"-2.54\" y2=\"6.35\" width=\"0\" layer=\"39\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"5.08\" drill=\"0.889\" diameter=\"1.651\" shape=\"square\"/>\n<pad name=\"2\" x=\"-1.27\" y=\"2.54\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"3\" x=\"-1.27\" y=\"0\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"4\" x=\"-1.27\" y=\"-2.54\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"5\" x=\"-1.27\" y=\"-5.08\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"6\" x=\"1.27\" y=\"-5.08\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"7\" x=\"1.27\" y=\"-2.54\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"8\" x=\"1.27\" y=\"0\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"9\" x=\"1.27\" y=\"2.54\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"10\" x=\"1.27\" y=\"5.08\" drill=\"0.889\" diameter=\"1.651\"/>\n<text x=\"3.81\" y=\"-1.905\" size=\"0.889\" layer=\"27\" font=\"vector\" ratio=\"11\" rot=\"R90\">&gt;value</text>\n<text x=\"-3.175\" y=\"-1.905\" size=\"0.889\" layer=\"25\" font=\"vector\" ratio=\"11\" rot=\"R90\">&gt;name</text>\n<rectangle x1=\"-2.54\" y1=\"-6.35\" x2=\"2.54\" y2=\"6.35\" layer=\"39\"/>\n</package>\n</packages>\n</library>\n<library name=\"PP_Connectors\">\n<packages>\n<package name=\"10118193-0001LF\">\n<smd name=\"3\" x=\"0\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"0.65\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"-0.65\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"1\" x=\"-1.3\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"5\" x=\"1.3\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"S3\" x=\"-3.2\" y=\"2.54\" dx=\"1.4\" dy=\"1.6\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"S4\" x=\"3.2\" y=\"2.54\" dx=\"1.4\" dy=\"1.6\" layer=\"1\" rot=\"R90\"/>\n<pad name=\"S2\" x=\"3.3\" y=\"-0.135\" drill=\"0.9\" shape=\"long\" rot=\"R180\"/>\n<pad name=\"S1\" x=\"-3.3\" y=\"-0.135\" drill=\"0.9\" shape=\"long\" rot=\"R180\"/>\n<wire x1=\"-4.125\" y1=\"-1.585\" x2=\"4.125\" y2=\"-1.585\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-4\" y=\"3.54\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n</package>\n</packages>\n</library>\n<library name=\"MF_Switches\">\n<packages>\n<package name=\"TACT4.2MM\">\n<description>&lt;b&gt;Description:&lt;/b&gt; Standard 4.2MM Tact Switch Package.Based off C&amp;K PTS 810 Series Tact Switch.&lt;br/&gt;</description>\n<smd name=\"P$3\" x=\"-2.075\" y=\"-1.075\" dx=\"0.65\" dy=\"1.05\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$4\" x=\"2.075\" y=\"-1.075\" dx=\"0.65\" dy=\"1.05\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"2.075\" y=\"1.075\" dx=\"0.65\" dy=\"1.05\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$1\" x=\"-2.075\" y=\"1.075\" dx=\"0.65\" dy=\"1.05\" layer=\"1\" rot=\"R90\"/>\n<wire x1=\"-2.8\" y1=\"1.6\" x2=\"2.8\" y2=\"1.6\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.8\" y1=\"1.6\" x2=\"2.8\" y2=\"-1.6\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.8\" y1=\"-1.6\" x2=\"-2.8\" y2=\"-1.6\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2.8\" y1=\"-1.6\" x2=\"-2.8\" y2=\"1.6\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-2.8\" y=\"2\" size=\"1.016\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n<wire x1=\"-1.2\" y1=\"1.2\" x2=\"0\" y2=\"1.2\" width=\"0.127\" layer=\"25\"/>\n<wire x1=\"0\" y1=\"1.2\" x2=\"1.2\" y2=\"1.2\" width=\"0.127\" layer=\"25\"/>\n<wire x1=\"-1.2\" y1=\"-1.2\" x2=\"0\" y2=\"-1.2\" width=\"0.127\" layer=\"25\"/>\n<wire x1=\"0\" y1=\"-1.2\" x2=\"1.2\" y2=\"-1.2\" width=\"0.127\" layer=\"25\"/>\n<wire x1=\"0\" y1=\"-1.2\" x2=\"0\" y2=\"-0.6\" width=\"0.127\" layer=\"25\"/>\n<wire x1=\"0\" y1=\"1.2\" x2=\"0\" y2=\"0.6\" width=\"0.127\" layer=\"25\"/>\n<wire x1=\"0\" y1=\"-0.6\" x2=\"-0.4\" y2=\"0.4\" width=\"0.127\" layer=\"25\"/>\n</package>\n</packages>\n</library>\n<library name=\"74xx-little-us\">\n<description>&lt;b&gt;Single and Dual Gates Family, US symbols&lt;/b&gt;&lt;p&gt;\nLittle logic devices from Texas Instruments&lt;br&gt;\nTinyLogic(R) from FAIRCHILD Semiconductor TM\n&lt;p&gt;\n&lt;author&gt;Created by evgeni@eniks.com&lt;/author&gt;&lt;br&gt;\n&lt;author&gt;Extended by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"DBV_R-PDSO-G6\">\n<description>&lt;b&gt;DBV (R-PDSO-G6)&lt;/b&gt; PLASTIC SMALL-OUTLINE PACKAGE&lt;p&gt;\nSOT (SOT-23) - DBV&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157.</description>\n<wire x1=\"0\" y1=\"-1.29\" x2=\"0\" y2=\"-1.3\" width=\"0.01\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"0.8\" width=\"0.127\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"2\" x=\"0\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"3\" x=\"0.95\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"4\" x=\"0.95\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"6\" x=\"-0.95\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"5\" x=\"0\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<text x=\"-1.905\" y=\"1.905\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.905\" y=\"-3.175\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.11\" y1=\"0.8\" x2=\"-0.78\" y2=\"1.43\" layer=\"51\"/>\n<rectangle x1=\"0.79\" y1=\"0.8\" x2=\"1.12\" y2=\"1.42\" layer=\"51\"/>\n<rectangle x1=\"-1.11\" y1=\"-1.42\" x2=\"-0.78\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"-0.16\" y1=\"-1.42\" x2=\"0.17\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"0.79\" y1=\"-1.42\" x2=\"1.12\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"-0.16\" y1=\"0.8\" x2=\"0.17\" y2=\"1.42\" layer=\"51\"/>\n<rectangle x1=\"-1.35\" y1=\"0.75\" x2=\"-0.55\" y2=\"1.85\" layer=\"29\"/>\n<rectangle x1=\"-0.4\" y1=\"0.75\" x2=\"0.4\" y2=\"1.85\" layer=\"29\"/>\n<rectangle x1=\"0.55\" y1=\"0.75\" x2=\"1.35\" y2=\"1.85\" layer=\"29\"/>\n<rectangle x1=\"0.55\" y1=\"-1.85\" x2=\"1.35\" y2=\"-0.75\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-0.4\" y1=\"-1.85\" x2=\"0.4\" y2=\"-0.75\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-1.35\" y1=\"-1.85\" x2=\"-0.55\" y2=\"-0.75\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-1.375\" y1=\"-0.75\" x2=\"-0.625\" y2=\"0\" layer=\"21\"/>\n</package>\n</packages>\n</library>\n<library name=\"74xx-little-us@1\">\n<description>&lt;b&gt;Single and Dual Gates Family, US symbols&lt;/b&gt;&lt;p&gt;\nLittle logic devices from Texas Instruments&lt;br&gt;\nTinyLogic(R) from FAIRCHILD Semiconductor TM\n&lt;p&gt;\n&lt;author&gt;Created by evgeni@eniks.com&lt;/author&gt;&lt;br&gt;\n&lt;author&gt;Extended by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"DBV_R-PDSO-G6\">\n<description>&lt;b&gt;DBV (R-PDSO-G6)&lt;/b&gt; PLASTIC SMALL-OUTLINE PACKAGE&lt;p&gt;\nSOT (SOT-23) - DBV&lt;br&gt;\nSource: http://focus.ti.com/lit/ds/symlink/sn74lvc1g3157.</description>\n<wire x1=\"0\" y1=\"-1.29\" x2=\"0\" y2=\"-1.3\" width=\"0.01\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"-0.8\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.42\" y1=\"-0.8\" x2=\"-1.42\" y2=\"0.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.42\" y1=\"0.8\" x2=\"1.42\" y2=\"0.8\" width=\"0.127\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"2\" x=\"0\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"3\" x=\"0.95\" y=\"-1.29\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"4\" x=\"0.95\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"6\" x=\"-0.95\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<smd name=\"5\" x=\"0\" y=\"1.3\" dx=\"0.69\" dy=\"0.99\" layer=\"1\" stop=\"no\"/>\n<text x=\"-1.905\" y=\"1.905\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.905\" y=\"-3.175\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.11\" y1=\"0.8\" x2=\"-0.78\" y2=\"1.43\" layer=\"51\"/>\n<rectangle x1=\"0.79\" y1=\"0.8\" x2=\"1.12\" y2=\"1.42\" layer=\"51\"/>\n<rectangle x1=\"-1.11\" y1=\"-1.42\" x2=\"-0.78\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"-0.16\" y1=\"-1.42\" x2=\"0.17\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"0.79\" y1=\"-1.42\" x2=\"1.12\" y2=\"-0.8\" layer=\"51\"/>\n<rectangle x1=\"-0.16\" y1=\"0.8\" x2=\"0.17\" y2=\"1.42\" layer=\"51\"/>\n<rectangle x1=\"-1.35\" y1=\"0.75\" x2=\"-0.55\" y2=\"1.85\" layer=\"29\"/>\n<rectangle x1=\"-0.4\" y1=\"0.75\" x2=\"0.4\" y2=\"1.85\" layer=\"29\"/>\n<rectangle x1=\"0.55\" y1=\"0.75\" x2=\"1.35\" y2=\"1.85\" layer=\"29\"/>\n<rectangle x1=\"0.55\" y1=\"-1.85\" x2=\"1.35\" y2=\"-0.75\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-0.4\" y1=\"-1.85\" x2=\"0.4\" y2=\"-0.75\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-1.35\" y1=\"-1.85\" x2=\"-0.55\" y2=\"-0.75\" layer=\"29\" rot=\"R180\"/>\n<rectangle x1=\"-1.375\" y1=\"-0.75\" x2=\"-0.625\" y2=\"0\" layer=\"21\"/>\n</package>\n</packages>\n</library>\n<library name=\"microchip\">\n<description>&lt;b&gt;Microchip PIC Microcontrollers and other Devices&lt;/b&gt;&lt;p&gt;\nBased on the following sources :\n&lt;ul&gt;\n&lt;li&gt;Microchip Data Book, 1993\n&lt;li&gt;THE EMERGING WORLD STANDARD, 1995/1996\n&lt;li&gt;Microchip, Technical Library CD-ROM, June 1998\n&lt;li&gt;www.microchip.com\n&lt;/ul&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"SSOP28\">\n<description>&lt;b&gt;Shrink Small Outline Package&lt;/b&gt;&lt;p&gt;\npackage type SS</description>\n<wire x1=\"-5.1\" y1=\"-2.6\" x2=\"5.1\" y2=\"-2.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.1\" y1=\"-2.6\" x2=\"5.1\" y2=\"2.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.1\" y1=\"2.6\" x2=\"-5.1\" y2=\"2.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.225\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"-3.575\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"3\" x=\"-2.925\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"4\" x=\"-2.275\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"5\" x=\"-1.625\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"6\" x=\"-0.975\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"7\" x=\"-0.325\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"8\" x=\"0.325\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"9\" x=\"0.975\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"10\" x=\"1.625\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"11\" x=\"2.275\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"12\" x=\"2.925\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"13\" x=\"3.575\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"14\" x=\"4.225\" y=\"-3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"15\" x=\"4.225\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"16\" x=\"3.575\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"17\" x=\"2.925\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"18\" x=\"2.275\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"19\" x=\"1.625\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"20\" x=\"0.975\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"21\" x=\"0.325\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"22\" x=\"-0.325\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"23\" x=\"-0.975\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"24\" x=\"-1.625\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"25\" x=\"-2.275\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"26\" x=\"-2.925\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"27\" x=\"-3.575\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"28\" x=\"-4.225\" y=\"3.625\" dx=\"0.4\" dy=\"1.5\" layer=\"1\"/>\n<text x=\"-5.476\" y=\"-2.6299\" size=\"1.27\" layer=\"25\" rot=\"R90\">&gt;NAME</text>\n<text x=\"-3.8999\" y=\"-0.68\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-4.4028\" y1=\"-3.937\" x2=\"-4.0472\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-3.7529\" y1=\"-3.937\" x2=\"-3.3973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-3.1029\" y1=\"-3.937\" x2=\"-2.7473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-2.4529\" y1=\"-3.937\" x2=\"-2.0973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-1.8029\" y1=\"-3.937\" x2=\"-1.4473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-1.1529\" y1=\"-3.937\" x2=\"-0.7973\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"-0.5029\" y1=\"-3.937\" x2=\"-0.1473\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"0.1473\" y1=\"-3.937\" x2=\"0.5029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"0.7973\" y1=\"-3.937\" x2=\"1.1529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"1.4473\" y1=\"-3.937\" x2=\"1.8029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"2.0973\" y1=\"-3.937\" x2=\"2.4529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"2.7473\" y1=\"-3.937\" x2=\"3.1029\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"3.3973\" y1=\"-3.937\" x2=\"3.7529\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"4.0472\" y1=\"-3.937\" x2=\"4.4028\" y2=\"-2.6416\" layer=\"51\"/>\n<rectangle x1=\"4.0472\" y1=\"2.6416\" x2=\"4.4028\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"3.3973\" y1=\"2.6416\" x2=\"3.7529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"2.7473\" y1=\"2.6416\" x2=\"3.1029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"2.0973\" y1=\"2.6416\" x2=\"2.4529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"1.4473\" y1=\"2.6416\" x2=\"1.8029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"0.7973\" y1=\"2.6416\" x2=\"1.1529\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"0.1473\" y1=\"2.6416\" x2=\"0.5029\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-0.5029\" y1=\"2.6416\" x2=\"-0.1473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-1.1529\" y1=\"2.6416\" x2=\"-0.7973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-1.8029\" y1=\"2.6416\" x2=\"-1.4473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-2.4529\" y1=\"2.6416\" x2=\"-2.0973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-3.1029\" y1=\"2.6416\" x2=\"-2.7473\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-3.7529\" y1=\"2.6416\" x2=\"-3.3973\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-4.4028\" y1=\"2.6416\" x2=\"-4.0472\" y2=\"3.937\" layer=\"51\"/>\n<rectangle x1=\"-5.1999\" y1=\"-2.5999\" x2=\"-4.225\" y2=\"2.5999\" layer=\"27\"/>\n</package>\n</packages>\n</library>\n<library name=\"rcl@1\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      3006Y&lt;BR&gt;\n      3009P&lt;BR&gt;\n      3009W&lt;BR&gt;\n      3009Y&lt;BR&gt;\n      3057J&lt;BR&gt;\n      3057L&lt;BR&gt;\n      3057P&lt;BR&gt;\n      3057Y&lt;BR&gt;\n      3059J&lt;BR&gt;\n      3059L&lt;BR&gt;\n      3059P&lt;BR&gt;\n      3059Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      89P&lt;BR&gt;\n      89W&lt;BR&gt;\n      89X&lt;BR&gt;\n      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8012EKQ&amp;nbsp;ALT&lt;BR&gt;\n      8012EKR&amp;nbsp;ALT&lt;BR&gt;\n      1211P&lt;BR&gt;\n      8012EKJ&lt;BR&gt;\n      8012EKL&lt;BR&gt;\n      8012EKQ&lt;BR&gt;\n      8012EKR&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      2101P&lt;BR&gt;\n      2101W&lt;BR&gt;\n      2101Y&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      2102L&lt;BR&gt;\n      2102S&lt;BR&gt;\n      2102Y&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVMCOG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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&lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      3292P&lt;BR&gt;\n      3292W&lt;BR&gt;\n      3292X&lt;BR&gt;\n      3296P&lt;BR&gt;\n      3296W&lt;BR&gt;\n      3296X&lt;BR&gt;\n      3296Y&lt;BR&gt;\n      3296Z&lt;BR&gt;\n      3299P&lt;BR&gt;\n      3299W&lt;BR&gt;\n      3299X&lt;BR&gt;\n      3299Y&lt;BR&gt;\n      3299Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&amp;nbsp;ALT&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      64X&amp;nbsp;ALT&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66P&lt;BR&gt;\n      66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      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FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      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  8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 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name=\"C0603\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-0.356\" y1=\"0.432\" x2=\"0.356\" y2=\"0.432\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.356\" y1=\"-0.419\" x2=\"0.356\" y2=\"-0.419\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.85\" y=\"0\" dx=\"1.1\" dy=\"1\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.85\" y=\"0\" dx=\"1.1\" dy=\"1\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8382\" y1=\"-0.4699\" x2=\"-0.3381\" y2=\"0.4801\" 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y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.7018\" y1=\"-0.8509\" x2=\"-0.9517\" y2=\"0.8491\" layer=\"51\"/>\n<rectangle x1=\"0.9517\" y1=\"-0.8491\" x2=\"1.7018\" y2=\"0.8509\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.4001\" x2=\"0.1999\" y2=\"0.4001\" layer=\"35\"/>\n</package>\n</packages>\n</library>\n<library name=\"usb-serial\">\n<packages>\n<package name=\"SOIC16\">\n<description>&lt;b&gt;SMALL OUTLINE INTEGRATED CIRCUIT&lt;/b&gt;&lt;p&gt;\n16-Pin (150-Mil) SOIC&lt;br&gt;\nSource: http://www.cypress.com .. 38-12025_0P_V.pdf</description>\n<wire x1=\"4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"-1.795\" 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dy=\"1.524\" layer=\"1\"/>\n<smd name=\"7\" x=\"3.175\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"10\" x=\"3.175\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"8\" x=\"4.445\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"15\" x=\"-3.175\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"16\" x=\"-4.445\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<text x=\"-5.207\" y=\"-2.54\" size=\"1.016\" layer=\"21\" font=\"vector\" rot=\"R90\">CH340G</text>\n<rectangle x1=\"-4.6901\" y1=\"-2.921\" x2=\"-4.1999\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-3.4201\" y1=\"-2.921\" x2=\"-2.9299\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-2.1501\" y1=\"-2.921\" x2=\"-1.6599\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-0.8801\" y1=\"-2.921\" x2=\"-0.3899\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"0.3899\" y1=\"-2.921\" x2=\"0.8801\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"1.6599\" y1=\"-2.921\" x2=\"2.1501\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"2.9299\" y1=\"-2.921\" x2=\"3.4201\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"4.1999\" y1=\"-2.921\" x2=\"4.6901\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"4.1999\" y1=\"1.8951\" x2=\"4.6901\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"2.9299\" y1=\"1.8951\" x2=\"3.4201\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"1.6599\" y1=\"1.8951\" x2=\"2.1501\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"0.3899\" y1=\"1.8951\" x2=\"0.8801\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-0.8801\" y1=\"1.8951\" x2=\"-0.3899\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-2.1501\" y1=\"1.8951\" x2=\"-1.6599\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-3.4201\" y1=\"1.8951\" x2=\"-2.9299\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-4.6901\" y1=\"1.8951\" x2=\"-4.1999\" y2=\"2.921\" layer=\"51\"/>\n</package>\n</packages>\n</library>\n<library name=\"SparkFun-FreqCtrl\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find crystals and oscillators and other things that go \"tick\".&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"HC49US\">\n<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>\n<wire x1=\"-3.429\" y1=\"-2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"180\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<text x=\"-5.08\" y=\"-3.937\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-5.08\" y=\"2.667\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n</package>\n</packages>\n</library>\n<library name=\"Luca Eagle-Library\">\n<packages>\n<package name=\"MSOP10\">\n<description>&lt;b&gt;10-Lead Mini Small Outline Package [MSOP]&lt;/b&gt; (RM-10)&lt;p&gt;\nSource: http://www.analog.com/UploadedFiles/Data_Sheets/35641221898805SSM2167_b.pdf&lt;br&gt;\nCOMPLIANT TO JEDEC STANDARDS MO-187BA</description>\n<wire x1=\"-1.4\" y1=\"1.4\" x2=\"1.4\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"1.4\" x2=\"1.4\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"-1.4\" x2=\"-1.4\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.4\" y1=\"-1.4\" x2=\"-1.4\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.8\" y1=\"-1.1\" x2=\"-0.8\" y2=\"-0.5\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-0.8\" y1=\"-0.5\" x2=\"-0.8\" y2=\"-1.1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"2\" x=\"-0.5\" y=\"-2.1131\" dx=\"0.25\" dy=\"1\" layer=\"1\"/>\n<smd name=\"3\" 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layer=\"51\"/>\n<rectangle x1=\"-0.1244\" y1=\"-2.5\" x2=\"0.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.3756\" y1=\"-2.5\" x2=\"0.6256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8756\" y1=\"-2.5\" x2=\"1.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8744\" y1=\"1.5\" x2=\"1.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"0.3744\" y1=\"1.5\" x2=\"0.6244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.1256\" y1=\"1.5\" x2=\"0.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.6256\" y1=\"1.5\" x2=\"-0.3756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-1.1256\" y1=\"1.5\" x2=\"-0.8756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n</package>\n</packages>\n</library>\n<library name=\"Seeed-Connector\" urn=\"urn:adsk.eagle:library:478\">\n<packages>\n<package name=\"H10-2.54\" urn=\"urn:adsk.eagle:footprint:33050/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0.127\" 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AQY22, AQY61 Series NAiSSource: http://www.mew-europe.com/..  pti_en.pdf</description>\n</package3d>\n</packages3d>\n</library>\n<library name=\"SparkFun-Passives\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find resistors, capacitors, inductors, test points, jumper pads, etc.&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. 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Starr&lt;br&gt;\nhttp://www.bobstarr.net</description>\n<packages>\n<package name=\"JS202011SCQN\">\n<description>DPDT SLIDE SWITCH</description>\n<smd name=\"1\" x=\"-2.5\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"0\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"2.5\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"6\" x=\"2.5\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"5\" x=\"0\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-2.5\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<wire x1=\"-4.5\" y1=\"1.8\" x2=\"4.5\" y2=\"1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"1.8\" x2=\"4.5\" y2=\"-1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"-1.8\" x2=\"-4.5\" y2=\"-1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-4.5\" y1=\"-1.8\" x2=\"-4.5\" y2=\"1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"1\" x2=\"2.5\" y2=\"1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"1\" x2=\"2.5\" y2=\"-1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"-1\" x2=\"-2.5\" y2=\"-1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"-1\" x2=\"-2.5\" y2=\"1\" width=\"0.0508\" layer=\"51\"/>\n<rectangle x1=\"-2.25\" y1=\"-0.75\" x2=\"-0.25\" y2=\"0.75\" layer=\"51\"/>\n<wire x1=\"-3.5\" y1=\"2\" x2=\"-4.75\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.75\" y1=\"2\" x2=\"-4.75\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.75\" y1=\"-2\" x2=\"-3.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.5\" y1=\"2\" x2=\"4.75\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.75\" y1=\"2\" x2=\"4.75\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.75\" y1=\"-2\" x2=\"3.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.5\" y1=\"2\" x2=\"-1\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"2\" x2=\"1.5\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"-2\" x2=\"1.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.5\" y1=\"-2\" x2=\"-1\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"-5.25\" y=\"-2\" size=\"1.016\" layer=\"25\" ratio=\"18\" rot=\"R90\">&gt;NAME</text>\n<text x=\"6\" y=\"-2\" size=\"0.8128\" layer=\"27\" ratio=\"10\" rot=\"R90\">&gt;VALUE</text>\n</package>\n</packages>\n</library>\n<library name=\"resistor\" urn=\"urn:adsk.eagle:library:348\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,203,138,231\" href=\"../directory.asp\" title=\"\"&gt;\n&lt;area shape=\"default\" nohref&gt;\n&lt;/map&gt;\n\n&lt;html&gt;\n\n&lt;title&gt;&lt;/title&gt;\n\n &lt;LINK REL=\"StyleSheet\" TYPE=\"text/css\" HREF=\"style-sheet.css\"&gt;\n\n&lt;body bgcolor=\"#ffffff\" text=\"#000000\" marginwidth=\"0\" marginheight=\"0\" topmargin=\"0\" leftmargin=\"0\"&gt;\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0 height=\"55%\"&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;/td&gt;\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL 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8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n    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CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n  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EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    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HEADER</description>\n<packageinstances>\n<packageinstance name=\"2X08/90\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n</library>\n<library name=\"SamacSys_Parts\">\n<description>&lt;b&gt;https://componentsearchengine.com&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by SamacSys&lt;/author&gt;</description>\n<packages>\n<package name=\"SOP65P490X110-8N\">\n<description>&lt;b&gt;21-0036 8Pin uMax_1&lt;/b&gt;&lt;br&gt;\n</description>\n<smd name=\"1\" x=\"-2.212\" y=\"0.975\" dx=\"1.425\" dy=\"0.45\" layer=\"1\"/>\n<smd name=\"2\" x=\"-2.212\" y=\"0.325\" dx=\"1.425\" dy=\"0.45\" layer=\"1\"/>\n<smd name=\"3\" x=\"-2.212\" y=\"-0.325\" dx=\"1.425\" dy=\"0.45\" layer=\"1\"/>\n<smd name=\"4\" x=\"-2.212\" y=\"-0.975\" dx=\"1.425\" dy=\"0.45\" layer=\"1\"/>\n<smd name=\"5\" x=\"2.212\" y=\"-0.975\" dx=\"1.425\" dy=\"0.45\" layer=\"1\"/>\n<smd name=\"6\" x=\"2.212\" y=\"-0.325\" dx=\"1.425\" dy=\"0.45\" layer=\"1\"/>\n<smd name=\"7\" x=\"2.212\" y=\"0.325\" dx=\"1.425\" dy=\"0.45\" layer=\"1\"/>\n<smd name=\"8\" x=\"2.212\" y=\"0.975\" dx=\"1.425\" dy=\"0.45\" layer=\"1\"/>\n<text x=\"0\" y=\"0\" size=\"1.27\" layer=\"25\" align=\"center\">&gt;NAME</text>\n<text x=\"0\" y=\"0\" size=\"1.27\" layer=\"27\" align=\"center\">&gt;VALUE</text>\n<wire x1=\"-3.175\" y1=\"1.775\" x2=\"3.175\" y2=\"1.775\" width=\"0.05\" layer=\"51\"/>\n<wire x1=\"3.175\" y1=\"1.775\" x2=\"3.175\" y2=\"-1.775\" width=\"0.05\" layer=\"51\"/>\n<wire x1=\"3.175\" y1=\"-1.775\" x2=\"-3.175\" y2=\"-1.775\" width=\"0.05\" layer=\"51\"/>\n<wire x1=\"-3.175\" y1=\"-1.775\" x2=\"-3.175\" y2=\"1.775\" width=\"0.05\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"1.5\" x2=\"1.5\" y2=\"1.5\" width=\"0.1\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"1.5\" x2=\"1.5\" y2=\"-1.5\" width=\"0.1\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"-1.5\" x2=\"-1.5\" y2=\"-1.5\" width=\"0.1\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-1.5\" x2=\"-1.5\" y2=\"1.5\" width=\"0.1\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"0.85\" x2=\"-0.85\" y2=\"1.5\" width=\"0.1\" layer=\"51\"/>\n<wire x1=\"-1.15\" y1=\"1.5\" x2=\"1.15\" y2=\"1.5\" width=\"0.2\" layer=\"21\"/>\n<wire x1=\"1.15\" y1=\"1.5\" x2=\"1.15\" y2=\"-1.5\" width=\"0.2\" layer=\"21\"/>\n<wire x1=\"1.15\" y1=\"-1.5\" x2=\"-1.15\" y2=\"-1.5\" width=\"0.2\" layer=\"21\"/>\n<wire x1=\"-1.15\" y1=\"-1.5\" x2=\"-1.15\" y2=\"1.5\" width=\"0.2\" layer=\"21\"/>\n<wire x1=\"-2.925\" y1=\"1.55\" x2=\"-1.5\" y2=\"1.55\" width=\"0.2\" layer=\"21\"/>\n</package>\n</packages>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"1\" name=\"gnd\" width=\"0.3048\" drill=\"0\">\n</class>\n<class number=\"2\" name=\"three\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"3\" name=\"five\" width=\"0.381\" drill=\"0\">\n</class>\n</classes>\n<designrules name=\"jlcpcb6layer\">\n<description language=\"en\">&lt;b&gt;JLCPCB Design Rules - 6layer&lt;/b&gt;\n&lt;p&gt;\nPlease make sure your boards conform to these design rules.\n&lt;/p&gt;</description>\n<param name=\"layerSetup\" value=\"(1+2*3+4*15+16)\"/>\n<param name=\"mtCopper\" value=\"0.035559375mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.035559375mm\"/>\n<param name=\"mtIsolate\" value=\"0.6mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.6mm\"/>\n<param name=\"mdWireWire\" value=\"5mil\"/>\n<param name=\"mdWirePad\" value=\"5mil\"/>\n<param name=\"mdWireVia\" value=\"5mil\"/>\n<param name=\"mdPadPad\" value=\"5mil\"/>\n<param name=\"mdPadVia\" value=\"5mil\"/>\n<param name=\"mdViaVia\" value=\"5mil\"/>\n<param name=\"mdSmdPad\" value=\"5mil\"/>\n<param name=\"mdSmdVia\" value=\"5mil\"/>\n<param name=\"mdSmdSmd\" value=\"5mil\"/>\n<param name=\"mdViaViaSameLayer\" value=\"8mil\"/>\n<param name=\"mnLayersViaInSmd\" value=\"2\"/>\n<param name=\"mdCopperDimension\" value=\"8mil\"/>\n<param name=\"mdDrill\" value=\"6mil\"/>\n<param name=\"mdSmdStop\" value=\"0mil\"/>\n<param name=\"msWidth\" value=\"5mil\"/>\n<param name=\"msDrill\" value=\"12mil\"/>\n<param name=\"msMicroVia\" value=\"12mil\"/>\n<param name=\"msBlindViaRatio\" value=\"0.5\"/>\n<param name=\"rvPadTop\" value=\"0.25\"/>\n<param name=\"rvPadInner\" value=\"0.25\"/>\n<param name=\"rvPadBottom\" value=\"0.25\"/>\n<param name=\"rvViaOuter\" value=\"0.25\"/>\n<param name=\"rvViaInner\" value=\"0.25\"/>\n<param name=\"rvMicroViaOuter\" value=\"0.25\"/>\n<param name=\"rvMicroViaInner\" value=\"0.25\"/>\n<param name=\"rlMinPadTop\" value=\"5mil\"/>\n<param name=\"rlMaxPadTop\" value=\"20mil\"/>\n<param name=\"rlMinPadInner\" value=\"5mil\"/>\n<param name=\"rlMaxPadInner\" value=\"20mil\"/>\n<param name=\"rlMinPadBottom\" value=\"5mil\"/>\n<param name=\"rlMaxPadBottom\" value=\"20mil\"/>\n<param name=\"rlMinViaOuter\" value=\"3mil\"/>\n<param name=\"rlMaxViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinViaInner\" value=\"3mil\"/>\n<param name=\"rlMaxViaInner\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaOuter\" value=\"3mil\"/>\n<param name=\"rlMaxMicroViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaInner\" value=\"3mil\"/>\n<param name=\"rlMaxMicroViaInner\" value=\"20mil\"/>\n<param name=\"psTop\" value=\"-1\"/>\n<param name=\"psBottom\" value=\"-1\"/>\n<param name=\"psFirst\" value=\"-1\"/>\n<param name=\"psElongationLong\" value=\"100\"/>\n<param name=\"psElongationOffset\" value=\"100\"/>\n<param name=\"mvStopFrame\" value=\"1\"/>\n<param name=\"mvCreamFrame\" value=\"0\"/>\n<param name=\"mlMinStopFrame\" value=\"2.5mil\"/>\n<param name=\"mlMaxStopFrame\" value=\"2.5mil\"/>\n<param name=\"mlMinCreamFrame\" value=\"0mil\"/>\n<param name=\"mlMaxCreamFrame\" value=\"0mil\"/>\n<param name=\"mlViaStopLimit\" value=\"0mil\"/>\n<param name=\"srRoundness\" value=\"0\"/>\n<param name=\"srMinRoundness\" value=\"0mil\"/>\n<param name=\"srMaxRoundness\" value=\"0mil\"/>\n<param name=\"slThermalIsolate\" value=\"10mil\"/>\n<param name=\"slThermalsForVias\" value=\"0\"/>\n<param name=\"dpMaxLengthDifference\" value=\"10mm\"/>\n<param name=\"dpGapFactor\" value=\"2.5\"/>\n<param name=\"checkAngle\" value=\"0\"/>\n<param name=\"checkFont\" value=\"1\"/>\n<param name=\"checkRestrict\" value=\"1\"/>\n<param name=\"checkStop\" value=\"0\"/>\n<param name=\"checkValues\" value=\"0\"/>\n<param name=\"checkNames\" value=\"1\"/>\n<param name=\"checkWireStubs\" value=\"1\"/>\n<param name=\"checkPolygonWidth\" value=\"0\"/>\n<param name=\"useDiameter\" value=\"13\"/>\n<param name=\"maxErrors\" value=\"50\"/>\n</designrules>\n<autorouter>\n<pass name=\"Default\">\n<param name=\"RoutingGrid\" value=\"0.1mm\"/>\n<param name=\"AutoGrid\" value=\"0\"/>\n<param name=\"Efforts\" value=\"1\"/>\n<param name=\"TopRouterVariant\" value=\"0\"/>\n<param name=\"tpViaShape\" value=\"round\"/>\n<param name=\"PrefDir.1\" value=\"*\"/>\n<param name=\"PrefDir.2\" value=\"*\"/>\n<param name=\"PrefDir.3\" value=\"*\"/>\n<param name=\"PrefDir.4\" value=\"*\"/>\n<param name=\"PrefDir.5\" value=\"0\"/>\n<param name=\"PrefDir.6\" value=\"0\"/>\n<param name=\"PrefDir.7\" value=\"0\"/>\n<param name=\"PrefDir.8\" value=\"0\"/>\n<param name=\"PrefDir.9\" value=\"0\"/>\n<param name=\"PrefDir.10\" value=\"0\"/>\n<param name=\"PrefDir.11\" value=\"0\"/>\n<param name=\"PrefDir.12\" value=\"0\"/>\n<param name=\"PrefDir.13\" value=\"0\"/>\n<param name=\"PrefDir.14\" value=\"0\"/>\n<param name=\"PrefDir.15\" value=\"*\"/>\n<param name=\"PrefDir.16\" value=\"*\"/>\n<param name=\"cfVia\" value=\"8\"/>\n<param name=\"cfNonPref\" value=\"5\"/>\n<param name=\"cfChangeDir\" value=\"2\"/>\n<param name=\"cfOrthStep\" value=\"2\"/>\n<param name=\"cfDiagStep\" value=\"3\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"1\"/>\n<param name=\"cfMalusStep\" value=\"1\"/>\n<param name=\"cfPadImpact\" value=\"4\"/>\n<param name=\"cfSmdImpact\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"0\"/>\n<param name=\"cfHugging\" value=\"3\"/>\n<param name=\"cfAvoid\" value=\"4\"/>\n<param name=\"cfPolygon\" value=\"10\"/>\n<param name=\"cfBase.1\" value=\"1\"/>\n<param name=\"cfBase.2\" value=\"9\"/>\n<param name=\"cfBase.3\" value=\"1\"/>\n<param name=\"cfBase.4\" value=\"9\"/>\n<param name=\"cfBase.5\" value=\"1\"/>\n<param name=\"cfBase.6\" value=\"1\"/>\n<param name=\"cfBase.7\" value=\"1\"/>\n<param name=\"cfBase.8\" value=\"1\"/>\n<param name=\"cfBase.9\" value=\"1\"/>\n<param name=\"cfBase.10\" value=\"1\"/>\n<param name=\"cfBase.11\" value=\"1\"/>\n<param name=\"cfBase.12\" value=\"1\"/>\n<param name=\"cfBase.13\" value=\"1\"/>\n<param name=\"cfBase.14\" value=\"1\"/>\n<param name=\"cfBase.15\" value=\"1\"/>\n<param name=\"cfBase.16\" value=\"9\"/>\n<param name=\"mnVias\" value=\"20\"/>\n<param name=\"mnSegments\" value=\"9999\"/>\n<param name=\"mnExtdSteps\" value=\"9999\"/>\n<param name=\"mnRipupLevel\" value=\"10\"/>\n<param name=\"mnRipupSteps\" value=\"100\"/>\n<param name=\"mnRipupTotal\" value=\"100\"/>\n</pass>\n<pass name=\"Follow-me\" refer=\"Default\" active=\"yes\">\n<param name=\"cfBase.1\" value=\"0\"/>\n<param name=\"cfBase.2\" value=\"1\"/>\n<param name=\"cfBase.4\" value=\"1\"/>\n<param name=\"cfBase.16\" value=\"0\"/>\n</pass>\n<pass name=\"Busses\" refer=\"Default\" active=\"yes\">\n<param name=\"cfNonPref\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"4\"/>\n<param name=\"cfHugging\" value=\"0\"/>\n<param name=\"mnVias\" value=\"0\"/>\n</pass>\n<pass name=\"Route\" refer=\"Default\" active=\"yes\">\n</pass>\n<pass name=\"Optimize1\" refer=\"Default\" active=\"yes\">\n<param name=\"cfVia\" value=\"99\"/>\n<param name=\"cfExtdStep\" value=\"10\"/>\n<param name=\"cfHugging\" value=\"1\"/>\n<param name=\"mnExtdSteps\" value=\"1\"/>\n<param name=\"mnRipupLevel\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize2\" refer=\"Optimize1\" active=\"yes\">\n<param name=\"cfNonPref\" value=\"0\"/>\n<param name=\"cfChangeDir\" value=\"6\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"2\"/>\n<param name=\"cfMalusStep\" value=\"2\"/>\n<param name=\"cfPadImpact\" value=\"2\"/>\n<param name=\"cfSmdImpact\" value=\"2\"/>\n<param name=\"cfHugging\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize3\" refer=\"Optimize2\" active=\"yes\">\n<param name=\"cfChangeDir\" value=\"8\"/>\n<param name=\"cfPadImpact\" value=\"0\"/>\n<param name=\"cfSmdImpact\" value=\"0\"/>\n</pass>\n<pass name=\"Optimize4\" refer=\"Optimize3\" active=\"yes\">\n<param name=\"cfChangeDir\" value=\"25\"/>\n</pass>\n</autorouter>\n<elements>\n<element name=\"CV11\" library=\"rcl\" package=\"C0805K\" value=\"0.1uF\" x=\"22.67\" y=\"46.59\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\" x=\"22.67\" y=\"46.59\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"21.795\" y=\"45.59\" size=\"0.8128\" layer=\"25\" rot=\"R90\"/>\n<attribute name=\"VALUE\" x=\"24.57\" y=\"45.59\" size=\"1.016\" layer=\"27\" rot=\"R90\"/>\n</element>\n<element name=\"CV12\" library=\"rcl\" package=\"C0805K\" value=\"1uF\" x=\"25.91\" y=\"46.71\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\" x=\"25.91\" y=\"46.71\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"25.035\" y=\"45.71\" size=\"0.8128\" layer=\"25\" rot=\"R90\"/>\n<attribute name=\"VALUE\" x=\"27.81\" y=\"45.71\" size=\"1.016\" layer=\"27\" rot=\"R90\"/>\n</element>\n<element name=\"CG13\" library=\"rcl\" package=\"C0805K\" value=\"1uF\" x=\"17.01\" y=\"11.23\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\" x=\"17.01\" y=\"11.23\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"17.885\" y=\"12.23\" size=\"0.8128\" layer=\"25\" rot=\"R270\"/>\n<attribute name=\"VALUE\" x=\"15.11\" y=\"12.23\" size=\"1.016\" layer=\"27\" rot=\"R270\"/>\n</element>\n<element name=\"CG14\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"12.91\" y=\"9.79\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"12.91\" y=\"9.79\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"14.18\" y=\"11.06\" size=\"0.8128\" layer=\"25\" rot=\"R270\"/>\n<attribute name=\"VALUE\" x=\"10.37\" y=\"11.06\" size=\"1.27\" layer=\"27\" rot=\"R270\"/>\n</element>\n<element name=\"CG15\" library=\"rcl\" package=\"C0805K\" value=\"0.1uF\" x=\"20.65\" y=\"11.21\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\" x=\"20.65\" y=\"11.21\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"21.525\" y=\"12.21\" size=\"0.8128\" layer=\"25\" rot=\"R270\"/>\n<attribute name=\"VALUE\" x=\"18.75\" y=\"12.21\" size=\"1.016\" layer=\"27\" rot=\"R270\"/>\n</element>\n<element name=\"CP5\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"30.22\" y=\"56.67\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"30.22\" y=\"56.67\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"28.85\" y=\"57.74\" size=\"0.8128\" layer=\"26\" rot=\"MR270\"/>\n<attribute name=\"VALUE\" x=\"32.76\" y=\"57.94\" size=\"1.27\" layer=\"28\" rot=\"MR270\"/>\n</element>\n<element name=\"CP6\" library=\"rcl@1\" package=\"C1206\" value=\"10uF\" x=\"30.08\" y=\"48\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\" x=\"30.08\" y=\"48\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"28.81\" y=\"46.73\" size=\"0.8128\" layer=\"25\" rot=\"R90\"/>\n<attribute name=\"VALUE\" x=\"32.62\" y=\"46.73\" size=\"1.27\" layer=\"27\" rot=\"R90\"/>\n</element>\n<element name=\"C_OSC\" library=\"rcl@1\" package=\"C0603\" value=\"0.01uF\" x=\"29.36\" y=\"12.22\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\" x=\"29.36\" y=\"12.22\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"32.725\" y=\"10.585\" size=\"0.8128\" layer=\"25\" rot=\"R90\"/>\n<attribute name=\"VALUE\" x=\"31.265\" y=\"11.585\" size=\"1.27\" layer=\"27\" rot=\"R90\"/>\n</element>\n<element name=\"LED1\" library=\"led\" package=\"SML0805\" value=\"MF-LED-0805-RED\" x=\"49.58\" y=\"80.07\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MF\" value=\"\" x=\"49.58\" y=\"80.07\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\" x=\"49.58\" y=\"80.07\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"49.58\" y=\"85.57\" size=\"0.8128\" layer=\"25\" rot=\"R270\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"49.58\" y=\"80.07\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"47.58\" y=\"81.57\" size=\"1.27\" layer=\"27\" rot=\"R270\"/>\n</element>\n<element name=\"RLED1\" library=\"resistor\" package=\"R0805\" value=\"560\" x=\"49.76\" y=\"75.53\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MF\" value=\"\" x=\"49.76\" y=\"75.53\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\" x=\"49.76\" y=\"75.53\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"49.03\" y=\"73.165\" size=\"0.8128\" layer=\"25\" rot=\"R270\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"49.76\" y=\"75.53\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"47.22\" y=\"76.165\" size=\"1.27\" layer=\"27\" rot=\"R270\"/>\n</element>\n<element name=\"RJ2\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"8.33\" y=\"-1.74\" smashed=\"yes\">\n<attribute name=\"MF\" value=\"\" x=\"8.33\" y=\"-1.74\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"8.33\" y=\"-1.74\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"5.805\" y=\"-1.13\" size=\"0.8128\" layer=\"25\" rot=\"R180\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"8.33\" y=\"-1.74\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"7.695\" y=\"-4.28\" size=\"1.27\" layer=\"27\"/>\n</element>\n<element name=\"RJ3\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"8.34\" y=\"11.3\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"8.34\" y=\"11.3\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"8.34\" y=\"11.3\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"5.975\" y=\"12.03\" size=\"0.8128\" layer=\"25\" rot=\"R180\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"8.34\" y=\"11.3\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"8.975\" y=\"13.84\" size=\"1.27\" layer=\"27\" rot=\"R180\"/>\n</element>\n<element name=\"RJ4\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"8.33\" y=\"2.7\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"8.33\" y=\"2.7\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"8.33\" y=\"2.7\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"5.965\" y=\"3.43\" size=\"0.8128\" layer=\"25\" rot=\"R180\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"8.33\" y=\"2.7\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"8.965\" y=\"5.24\" size=\"1.27\" layer=\"27\" rot=\"R180\"/>\n</element>\n<element name=\"RJ5\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"8.36\" y=\"9.14\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"8.36\" y=\"9.14\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"8.36\" y=\"9.14\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"5.995\" y=\"9.87\" size=\"0.8128\" layer=\"25\" rot=\"R180\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"8.36\" y=\"9.14\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"8.995\" y=\"11.68\" size=\"1.27\" layer=\"27\" rot=\"R180\"/>\n</element>\n<element name=\"RS6\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"8.34\" y=\"0.42\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"8.34\" y=\"0.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"8.34\" y=\"0.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"5.975\" y=\"1.15\" size=\"0.8128\" layer=\"25\" rot=\"R180\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"8.34\" y=\"0.42\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"8.975\" y=\"2.96\" size=\"1.27\" layer=\"27\" rot=\"R180\"/>\n</element>\n<element name=\"RS7\" library=\"resistor\" package=\"R0805\" value=\"10K\" x=\"8.37\" y=\"6.98\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MF\" value=\"\" x=\"8.37\" y=\"6.98\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\" x=\"8.37\" y=\"6.98\" size=\"1.778\" layer=\"27\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"6.205\" y=\"7.81\" size=\"0.8128\" layer=\"25\" rot=\"R180\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\" x=\"8.37\" y=\"6.98\" size=\"1.778\" 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layer=\"25\"/>\n<attribute name=\"VALUE\" x=\"74.365\" y=\"8.095\" size=\"1.27\" layer=\"27\"/>\n</element>\n<element name=\"K2\" library=\"relay\" library_urn=\"urn:adsk.eagle:library:339\" package=\"SOP04\" package3d_urn=\"urn:adsk.eagle:package:24376/1\" value=\"AQY21SOP\" x=\"76\" y=\"9\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MF\" value=\"\" x=\"69\" y=\"18\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"AQY210S\" x=\"69\" y=\"18\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"81.54\" y=\"9.54\" size=\"0.8128\" layer=\"26\" rot=\"MR0\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"69\" y=\"18\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"69\" y=\"18\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"78.54\" y=\"5.19\" size=\"1.27\" layer=\"28\" rot=\"MR0\"/>\n</element>\n<element name=\"C_AC3\" library=\"rcl@1\" package=\"C0603\" value=\"0.01uF\" x=\"75.1\" y=\"45.3\" smashed=\"yes\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\" x=\"75.1\" y=\"45.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"74.465\" y=\"46.935\" size=\"0.8128\" layer=\"25\"/>\n<attribute name=\"VALUE\" x=\"74.465\" y=\"43.395\" size=\"1.27\" layer=\"27\"/>\n</element>\n<element name=\"K3\" library=\"relay\" library_urn=\"urn:adsk.eagle:library:339\" package=\"SOP04\" package3d_urn=\"urn:adsk.eagle:package:24376/1\" value=\"AQY21SOP\" x=\"76\" y=\"46\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MF\" value=\"\" x=\"68\" y=\"55\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"AQY210S\" x=\"68\" y=\"55\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"81.54\" y=\"46.54\" size=\"0.8128\" layer=\"26\" rot=\"MR0\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"68\" y=\"55\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"68\" y=\"55\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"78.54\" y=\"42.19\" size=\"1.27\" layer=\"28\" rot=\"MR0\"/>\n</element>\n<element name=\"C_AC4\" library=\"rcl@1\" package=\"C0603\" value=\"0.01uF\" x=\"75.2\" y=\"51.3\" smashed=\"yes\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\" x=\"75.2\" y=\"51.3\" size=\"1.778\" layer=\"27\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"74.565\" y=\"48.935\" size=\"0.8128\" layer=\"25\"/>\n<attribute name=\"VALUE\" x=\"74.565\" y=\"49.395\" size=\"1.27\" layer=\"27\"/>\n</element>\n<element name=\"K4\" library=\"relay\" library_urn=\"urn:adsk.eagle:library:339\" package=\"SOP04\" package3d_urn=\"urn:adsk.eagle:package:24376/1\" value=\"AQY21SOP\" x=\"76\" y=\"51\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MF\" value=\"\" x=\"68\" y=\"60\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"AQY210S\" x=\"68\" y=\"60\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"81.54\" y=\"51.54\" size=\"0.8128\" layer=\"26\" rot=\"MR0\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" x=\"68\" y=\"60\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"68\" y=\"60\" size=\"1.778\" layer=\"28\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"78.54\" y=\"47.19\" size=\"1.27\" layer=\"28\" rot=\"MR0\"/>\n</element>\n<element name=\"ACR1\" library=\"resistor\" package=\"R0805\" value=\"560\" x=\"33.1\" y=\"75.1\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MF\" value=\"\" x=\"33.1\" y=\"75.1\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\" x=\"33.1\" y=\"75.1\" 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name=\"VALUE\" x=\"37.84\" y=\"74.465\" size=\"1.27\" layer=\"27\" rot=\"R90\"/>\n</element>\n<element name=\"ACR3\" library=\"resistor\" package=\"R0805\" value=\"560\" x=\"37.6\" y=\"75.1\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MF\" value=\"\" x=\"37.6\" y=\"75.1\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\" x=\"37.6\" y=\"75.1\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"38.33\" y=\"69.465\" size=\"0.8128\" layer=\"25\" rot=\"R90\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" x=\"37.6\" y=\"75.1\" size=\"1.778\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"40.14\" y=\"74.465\" size=\"1.27\" layer=\"27\" rot=\"R90\"/>\n</element>\n<element name=\"ACR4\" library=\"resistor\" package=\"R0805\" value=\"560\" x=\"39.8\" y=\"75.1\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MF\" value=\"\" x=\"39.8\" y=\"75.1\" size=\"1.778\" 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display=\"off\"/>\n<attribute name=\"VALUE\" x=\"-4.415\" y=\"30.66\" size=\"1.27\" layer=\"28\" rot=\"MR270\"/>\n</element>\n<element name=\"PIN_ANALOG_IOEXP\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08/90\" package3d_urn=\"urn:adsk.eagle:package:22488/2\" value=\"15-91-2160\" x=\"85.3\" y=\"76.6\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"85.3\" y=\"76.6\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"POPULARITY\" value=\"0\" x=\"85.3\" y=\"76.6\" size=\"1.778\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"VALUE\" x=\"78.315\" y=\"86.76\" size=\"1.27\" layer=\"27\" rot=\"R270\"/>\n</element>\n<element name=\"RIN1_11K\" library=\"resistor\" package=\"R0805\" value=\"11K\" x=\"60\" y=\"5.6\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MF\" value=\"\" x=\"60\" y=\"5.6\" size=\"1.778\" layer=\"28\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" 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name=\"MPN\" value=\"MF-CAP-0805-1uF\" x=\"30.8\" y=\"0.1\" size=\"0.8128\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"37.875\" y=\"-4\" size=\"0.8128\" layer=\"25\" rot=\"R270\"/>\n<attribute name=\"VALUE\" x=\"34.9\" y=\"-3.9\" size=\"1.016\" layer=\"27\" rot=\"R270\"/>\n</element>\n<element name=\"CP8\" library=\"rcl\" package=\"C0805K\" value=\"0.1uF\" x=\"39.7\" y=\"-4.9\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\" x=\"27.7\" y=\"-4.9\" size=\"0.8128\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"40.775\" y=\"-3.9\" size=\"0.8128\" layer=\"25\" rot=\"R270\"/>\n<attribute name=\"VALUE\" x=\"37.8\" y=\"-3.9\" size=\"1.016\" layer=\"27\" rot=\"R270\"/>\n</element>\n<element name=\"L1\" library=\"SparkFun-Passives\" package=\"1210\" value=\"10uH\" x=\"30.3\" y=\"63.3\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"MPN\" value=\"MF-IND-1210-10uH\" x=\"30.3\" y=\"63.3\" size=\"1.778\" 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width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.7\" y1=\"69.6\" x2=\"-2.7\" y2=\"67.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3.5\" y1=\"73.8\" x2=\"1.15\" y2=\"71.45\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.15\" y1=\"71.45\" x2=\"-0.7\" y2=\"69.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.3\" y1=\"73.8\" x2=\"3.5\" y2=\"73.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.7\" y1=\"67.4\" x2=\"-2.745\" y2=\"67.305\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"18.3\" y1=\"73.8\" x2=\"18.275\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"1.1\" y1=\"71.5\" x2=\"1.1\" y2=\"72.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.1\" y1=\"72.6\" x2=\"1.065\" y2=\"72.695\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.1\" y1=\"71.5\" x2=\"1.15\" y2=\"71.45\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.5\" y1=\"71.5\" x2=\"21.5\" y2=\"69.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"72.7\" x2=\"21.45\" y2=\"71.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.45\" y1=\"71.55\" x2=\"21.5\" y2=\"71.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"73.3\" x2=\"20.3\" y2=\"72.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.5\" y1=\"69.9\" x2=\"21.525\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"73.3\" x2=\"20.225\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.3\" y1=\"58.9\" x2=\"23.3\" y2=\"56.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"61.9\" x2=\"23.3\" y2=\"58.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"62.5\" x2=\"20.3\" y2=\"61.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.3\" y1=\"56.5\" x2=\"23.35\" y2=\"56.45\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"62.5\" x2=\"20.225\" y2=\"62.575\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.5\" y1=\"77.6\" x2=\"21.5\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.5\" y1=\"71.6\" x2=\"21.5\" y2=\"77.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"21.5\" y1=\"80.6\" x2=\"21.525\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.5\" y1=\"71.6\" x2=\"21.45\" y2=\"71.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.6\" y1=\"45.8\" x2=\"22.6\" y2=\"45.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.4\" y1=\"49\" x2=\"22.6\" y2=\"45.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.4\" y1=\"54.1\" x2=\"19.4\" y2=\"49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.8\" y1=\"55.5\" x2=\"19.4\" y2=\"54.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.6\" y1=\"45.6\" x2=\"22.67\" y2=\"45.59\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.8\" y1=\"55.5\" x2=\"20.835\" y2=\"55.54\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.2\" y1=\"38.5\" x2=\"28.2\" y2=\"33.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.2\" y1=\"33.6\" x2=\"28.2\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.2\" y1=\"18.4\" x2=\"28.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30\" y1=\"31.8\" x2=\"40.1\" y2=\"31.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.2\" y1=\"33.6\" x2=\"30\" y2=\"31.8\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"41\" y=\"47.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"11.1\" y=\"11.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"14.2\" y=\"11.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-0.7\" y=\"69.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"1.1\" y=\"71.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"21.5\" y=\"77.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"21.5\" y=\"71.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"28.2\" y=\"33.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TCK\">\n<contactref element=\"RJ2\" pad=\"1\"/>\n<contactref element=\"FPGA\" pad=\"18\"/>\n<contactref element=\"JP1\" pad=\"1\"/>\n<wire x1=\"21.7\" y1=\"17.5\" x2=\"21.7\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.3\" y1=\"14.1\" x2=\"21.7\" y2=\"17.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.3\" y1=\"14.1\" x2=\"18.3\" y2=\"14.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.1\" y1=\"14.9\" x2=\"20.3\" y2=\"14.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.1\" y1=\"15.3\" x2=\"21.1\" y2=\"14.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.8\" y1=\"15.6\" x2=\"21.1\" y2=\"15.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.3\" y1=\"15.6\" x2=\"20.8\" y2=\"15.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-8.2\" y1=\"4.1\" x2=\"3.3\" y2=\"15.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.7\" y1=\"18.3\" x2=\"21.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.2\" y1=\"4.1\" x2=\"-8.27\" y2=\"4.08\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-3.5\" y1=\"-1.7\" x2=\"7.3\" y2=\"-1.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.7\" y1=\"0.5\" x2=\"-3.5\" y2=\"-1.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.2\" y1=\"0.5\" x2=\"-5.7\" y2=\"0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.2\" y1=\"1.5\" x2=\"-6.2\" y2=\"0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.2\" y1=\"3\" x2=\"-7.2\" y2=\"1.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.2\" y1=\"4\" x2=\"-7.2\" y2=\"3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.3\" y1=\"-1.7\" x2=\"7.38\" y2=\"-1.74\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.2\" y1=\"4\" x2=\"-8.27\" y2=\"4.08\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"18.3\" y=\"14.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TDO\">\n<contactref element=\"FPGA\" pad=\"20\"/>\n<contactref element=\"JP1\" pad=\"2\"/>\n<wire x1=\"22.7\" y1=\"17.2\" x2=\"22.7\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.6\" y1=\"15.1\" x2=\"22.7\" y2=\"17.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6.6\" y1=\"15.1\" x2=\"20.6\" y2=\"15.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6\" y1=\"2.5\" x2=\"6.6\" y2=\"15.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.3\" y1=\"2.5\" x2=\"-6\" y2=\"2.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-8.2\" y1=\"1.6\" x2=\"-7.3\" y2=\"2.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.7\" y1=\"18.3\" x2=\"22.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.2\" y1=\"1.6\" x2=\"-8.27\" y2=\"1.54\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"20.6\" y=\"15.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TMS\">\n<contactref element=\"RJ3\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"16\"/>\n<contactref element=\"JP1\" pad=\"3\"/>\n<wire x1=\"20.7\" y1=\"17.2\" x2=\"20.7\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.8\" y1=\"13.3\" x2=\"20.7\" y2=\"17.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.8\" y1=\"10.8\" x2=\"16.8\" y2=\"13.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"5.9\" y1=\"-0.1\" x2=\"13.4\" y2=\"7.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"13.4\" y1=\"7.4\" x2=\"16.8\" y2=\"10.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.3\" y1=\"-0.1\" x2=\"5.9\" y2=\"-0.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8.2\" y1=\"-1\" x2=\"-7.3\" y2=\"-0.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"20.7\" y1=\"18.3\" x2=\"20.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.2\" y1=\"-1\" x2=\"-8.27\" y2=\"-1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"8.4\" y1=\"12.3\" x2=\"7.4\" y2=\"11.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.4\" y1=\"12.4\" x2=\"8.4\" y2=\"12.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.4\" y1=\"7.4\" x2=\"8.4\" y2=\"12.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"7.4\" y1=\"11.3\" x2=\"7.39\" y2=\"11.3\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"16.8\" y=\"13.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.4\" y=\"12.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TDI\">\n<contactref element=\"RJ4\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"19\"/>\n<contactref element=\"JP1\" pad=\"5\"/>\n<wire x1=\"22.2\" y1=\"17.4\" x2=\"22.2\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.8\" y1=\"14\" x2=\"22.2\" y2=\"17.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.8\" y1=\"12.8\" x2=\"18.8\" y2=\"14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"-5.2\" x2=\"5.45\" y2=\"-0.55\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.45\" y1=\"-0.55\" x2=\"18.8\" y2=\"12.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.4\" y1=\"-5.2\" x2=\"0.8\" y2=\"-5.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-8.2\" y1=\"-6\" x2=\"-7.4\" y2=\"-5.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.2\" y1=\"18.3\" x2=\"22.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.2\" y1=\"-6\" x2=\"-8.27\" y2=\"-6.08\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"5.5\" y1=\"0.9\" x2=\"7.3\" y2=\"2.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.5\" y1=\"-0.6\" x2=\"5.5\" y2=\"0.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.3\" y1=\"2.7\" x2=\"7.38\" y2=\"2.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.5\" y1=\"-0.6\" x2=\"5.45\" y2=\"-0.55\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"18.8\" y=\"12.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"5.5\" y=\"-0.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"JTAGEN\">\n<contactref element=\"RJ5\" pad=\"2\"/>\n<contactref element=\"FPGA\" pad=\"15\"/>\n<contactref element=\"JP1\" pad=\"7\"/>\n<wire x1=\"20.2\" y1=\"17.1\" x2=\"20.2\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.1\" y1=\"14\" x2=\"20.2\" y2=\"17.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.8\" y1=\"14\" x2=\"17.1\" y2=\"14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.8\" y1=\"14\" x2=\"16.8\" y2=\"14\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5.7\" y1=\"-3.5\" x2=\"6.05\" y2=\"8.25\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.05\" y1=\"8.25\" x2=\"11.8\" y2=\"14\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.2\" y1=\"18.3\" x2=\"20.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.7\" y1=\"-3.5\" x2=\"-5.73\" y2=\"-3.54\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.8\" y1=\"9.1\" x2=\"7.4\" y2=\"9.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"8.3\" x2=\"6.8\" y2=\"9.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.4\" y1=\"9.1\" x2=\"7.41\" y2=\"9.14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"8.3\" x2=\"6.05\" y2=\"8.25\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"16.8\" y=\"14\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"6\" y=\"8.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CONFIG_SEL\">\n<contactref element=\"FPGA\" pad=\"126\"/>\n<contactref element=\"RS6\" pad=\"2\"/>\n<wire x1=\"10.6\" y1=\"29.3\" x2=\"11.2\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"24.7\" x2=\"10.6\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"18.8\" x2=\"6\" y2=\"24.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"9\" x2=\"6\" y2=\"18.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"5.5\" y1=\"8.5\" x2=\"6\" y2=\"9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"5.5\" y1=\"2.1\" x2=\"5.5\" y2=\"8.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"6.3\" y1=\"1.3\" x2=\"5.5\" y2=\"2.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"6.3\" y1=\"1\" x2=\"6.3\" y2=\"1.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"6.8\" y1=\"1\" x2=\"6.3\" y2=\"1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.3\" y1=\"0.5\" x2=\"6.8\" y2=\"1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.2\" y1=\"29.3\" x2=\"11.21\" y2=\"29.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.3\" y1=\"0.5\" x2=\"7.39\" y2=\"0.42\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"6\" y=\"18.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"6.3\" y=\"1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CONF\">\n<contactref element=\"FPGA\" pad=\"138\"/>\n<contactref element=\"RS7\" pad=\"2\"/>\n<wire x1=\"12.1\" y1=\"23.3\" x2=\"11.3\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.9\" y1=\"19.1\" x2=\"12.1\" y2=\"23.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"7.9\" y1=\"8.5\" x2=\"7.9\" y2=\"19.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"8.3\" y1=\"8.1\" x2=\"7.9\" y2=\"8.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"8.3\" y1=\"7.8\" x2=\"8.3\" y2=\"8.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.5\" y1=\"7\" x2=\"8.3\" y2=\"7.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.3\" y1=\"23.3\" x2=\"11.21\" y2=\"23.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.5\" y1=\"7\" x2=\"7.42\" y2=\"6.98\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"12.1\" y=\"23.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.3\" y=\"8.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"STATUS\">\n<contactref element=\"FPGA\" pad=\"136\"/>\n<contactref element=\"RS8\" pad=\"2\"/>\n<wire x1=\"12\" y1=\"24.4\" x2=\"11.3\" y2=\"24.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"24.5\" x2=\"12\" y2=\"24.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"9.9\" y1=\"24.5\" x2=\"12.1\" y2=\"24.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"6.5\" y1=\"21.1\" x2=\"9.9\" y2=\"24.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"6.5\" y1=\"5.9\" x2=\"6.5\" y2=\"21.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"7.5\" y1=\"4.9\" x2=\"6.5\" y2=\"5.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.3\" y1=\"24.4\" x2=\"11.21\" y2=\"24.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.5\" y1=\"4.9\" x2=\"7.41\" y2=\"4.82\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"12.1\" y=\"24.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"6.5\" y=\"5.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"NCONF\">\n<contactref element=\"FPGA\" pad=\"129\"/>\n<contactref element=\"RS9\" pad=\"2\"/>\n<contactref element=\"SW_RESET\" pad=\"P$4\"/>\n<wire x1=\"10.6\" y1=\"27.8\" x2=\"11.2\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.3\" y1=\"27.5\" x2=\"10.6\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.3\" y1=\"23.3\" x2=\"10.3\" y2=\"27.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"10.3\" y1=\"21.9\" x2=\"10.3\" y2=\"23.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"7.4\" y1=\"19\" x2=\"10.3\" y2=\"21.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"7.4\" y1=\"14.6\" x2=\"7.4\" y2=\"19\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"7.4\" y1=\"13.5\" x2=\"7.4\" y2=\"14.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.2\" y1=\"27.8\" x2=\"11.21\" y2=\"27.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.4\" y1=\"13.5\" x2=\"7.42\" y2=\"13.42\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-0.4\" y1=\"-7.4\" x2=\"5.7\" y2=\"-7.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.7\" y1=\"-2.1\" x2=\"-0.4\" y2=\"-7.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.7\" y1=\"-2.1\" x2=\"-5.7\" y2=\"-2.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-9.3\" y1=\"-1.5\" x2=\"-8.7\" y2=\"-2.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-9.3\" y1=\"5\" x2=\"-9.3\" y2=\"-1.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-0.9\" y1=\"13.4\" x2=\"-9.3\" y2=\"5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.4\" y1=\"13.4\" x2=\"-0.9\" y2=\"13.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"5.7\" y1=\"-7.4\" x2=\"5.725\" y2=\"-7.425\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.4\" y1=\"13.4\" x2=\"7.42\" y2=\"13.42\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"10.3\" y=\"23.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"7.4\" y=\"14.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED1\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"21\"/>\n<contactref element=\"LED1\" pad=\"A\"/>\n<wire x1=\"48.7\" y1=\"78.2\" x2=\"49.5\" y2=\"79\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.7\" y1=\"78.1\" x2=\"48.7\" y2=\"78.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.1\" y1=\"78.1\" x2=\"48.7\" y2=\"78.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"40.9\" y1=\"71.9\" x2=\"47.1\" y2=\"78.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.2\" y1=\"71.9\" x2=\"40.9\" y2=\"71.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"30.2\" y1=\"70.9\" x2=\"31.2\" y2=\"71.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24\" y1=\"70.9\" x2=\"30.2\" y2=\"70.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"22.7\" y1=\"72.2\" x2=\"24\" y2=\"70.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"22.2\" y1=\"72.7\" x2=\"22.7\" y2=\"72.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"73.3\" x2=\"22.2\" y2=\"72.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.5\" y1=\"79\" x2=\"49.58\" y2=\"79.02\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"73.3\" x2=\"22.175\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48.7\" y=\"78.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"22.7\" y=\"72.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$18\">\n</signal>\n<signal name=\"CLKOUT_33\">\n<contactref element=\"IC2\" pad=\"15\"/>\n<contactref element=\"FPGA\" pad=\"33\"/>\n<wire x1=\"46.75\" y1=\"45.5\" x2=\"46.75\" y2=\"48.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.4468\" y1=\"53.5532\" x2=\"39.5532\" y2=\"53.5532\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.21\" y1=\"36.44263125\" x2=\"29.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.0632\" y1=\"49.0632\" x2=\"35.0632\" y2=\"42.29583125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.0632\" y1=\"42.29583125\" x2=\"29.21\" y2=\"36.44263125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.75\" y1=\"48.25\" x2=\"41.4468\" y2=\"53.5532\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.5532\" y1=\"53.5532\" x2=\"35.0632\" y2=\"49.0632\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D1C\">\n<contactref element=\"IC2\" pad=\"35\"/>\n<contactref element=\"FPGA\" pad=\"70\"/>\n<wire x1=\"36\" y1=\"39.7\" x2=\"41.5\" y2=\"39.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.7\" y1=\"38.4\" x2=\"36\" y2=\"39.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.6\" y1=\"37.3\" x2=\"34.7\" y2=\"38.4\" width=\"0.1524\" layer=\"2\"/>\n<wire x1=\"33.2\" y1=\"36.9\" x2=\"33.6\" y2=\"37.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"36.9\" x2=\"33.2\" y2=\"36.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"39.7\" x2=\"41.5\" y2=\"39.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"36.9\" x2=\"32.71\" y2=\"36.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"34.7\" y=\"38.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.6\" y=\"37.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2C\">\n<contactref element=\"IC2\" pad=\"37\"/>\n<contactref element=\"FPGA\" pad=\"69\"/>\n<wire x1=\"41.4\" y1=\"38.5\" x2=\"42.25\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.3\" y1=\"38.5\" x2=\"41.4\" y2=\"38.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.2\" y1=\"36.4\" x2=\"36.3\" y2=\"38.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.8\" y1=\"36.4\" x2=\"34.2\" y2=\"36.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"36.4\" x2=\"32.71\" y2=\"36.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"41.4\" y=\"38.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.2\" y=\"36.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3C\">\n<contactref element=\"IC2\" pad=\"38\"/>\n<contactref element=\"FPGA\" pad=\"66\"/>\n<wire x1=\"42.7\" y1=\"38.1\" x2=\"42.7\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"37.1\" x2=\"42.7\" y2=\"38.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.7\" y1=\"37.1\" x2=\"41.7\" y2=\"37.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.6\" y1=\"37.1\" x2=\"40.7\" y2=\"37.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.6\" y1=\"35.1\" x2=\"35.6\" y2=\"37.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.4\" y1=\"35.1\" x2=\"33.6\" y2=\"35.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.2\" y1=\"34.9\" x2=\"33.4\" y2=\"35.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"34.9\" x2=\"33.2\" y2=\"34.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.7\" y1=\"38.5\" x2=\"42.75\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"34.9\" x2=\"32.71\" y2=\"34.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"40.7\" y=\"37.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.6\" y=\"35.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4C\">\n<contactref element=\"IC2\" pad=\"39\"/>\n<contactref element=\"FPGA\" pad=\"65\"/>\n<wire x1=\"43.2\" y1=\"37\" x2=\"43.2\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.7\" y1=\"34.5\" x2=\"43.2\" y2=\"37\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.6\" y1=\"34.5\" x2=\"40.7\" y2=\"34.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.9\" y1=\"34.5\" x2=\"33.6\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"34.4\" x2=\"32.9\" y2=\"34.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.2\" y1=\"38.5\" x2=\"43.25\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"34.4\" x2=\"32.71\" y2=\"34.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"40.7\" y=\"34.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.6\" y=\"34.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5C\">\n<contactref element=\"IC2\" pad=\"40\"/>\n<contactref element=\"FPGA\" pad=\"64\"/>\n<wire x1=\"43.7\" y1=\"37.7\" x2=\"43.7\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.5\" y1=\"37.7\" x2=\"43.7\" y2=\"37.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"40.8\" y1=\"35\" x2=\"43.5\" y2=\"37.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"34.8\" y1=\"35\" x2=\"40.8\" y2=\"35\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.7\" y1=\"33.9\" x2=\"34.8\" y2=\"35\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"33.9\" x2=\"33.7\" y2=\"33.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.7\" y1=\"38.5\" x2=\"43.75\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"33.9\" x2=\"32.71\" y2=\"33.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"43.7\" y=\"37.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.8\" y=\"35\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6C\">\n<contactref element=\"IC2\" pad=\"41\"/>\n<contactref element=\"FPGA\" pad=\"62\"/>\n<wire x1=\"44.2\" y1=\"36.6\" x2=\"44.2\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.7\" y1=\"33.1\" x2=\"44.2\" y2=\"36.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.3\" y1=\"33.1\" x2=\"40.7\" y2=\"33.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"34.1\" y1=\"33.1\" x2=\"34.3\" y2=\"33.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.9\" y1=\"32.9\" x2=\"34.1\" y2=\"33.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"32.9\" x2=\"33.9\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.2\" y1=\"38.5\" x2=\"44.25\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"32.9\" x2=\"32.71\" y2=\"32.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"40.7\" y=\"33.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.3\" y=\"33.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D0C\">\n<contactref element=\"IC2\" pad=\"34\"/>\n<contactref element=\"FPGA\" pad=\"74\"/>\n<wire x1=\"33.6\" y1=\"40.2\" x2=\"41.5\" y2=\"40.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.9\" y1=\"39.5\" x2=\"33.6\" y2=\"40.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.9\" y1=\"40.5\" x2=\"32.9\" y2=\"39.5\" width=\"0.1524\" layer=\"2\"/>\n<wire x1=\"31.8\" y1=\"40.6\" x2=\"31.9\" y2=\"40.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.4\" y1=\"40.6\" x2=\"31.8\" y2=\"40.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.3\" y1=\"40.5\" x2=\"30.4\" y2=\"40.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.3\" y1=\"39.9\" x2=\"30.3\" y2=\"40.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"40.2\" x2=\"41.5\" y2=\"40.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.3\" y1=\"39.9\" x2=\"30.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"32.9\" y=\"39.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.9\" y=\"40.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7C\">\n<contactref element=\"IC2\" pad=\"42\"/>\n<contactref element=\"FPGA\" pad=\"60\"/>\n<wire x1=\"44.7\" y1=\"36.4\" x2=\"44.7\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.7\" y1=\"32.4\" x2=\"44.7\" y2=\"36.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.7\" y1=\"32.4\" x2=\"40.7\" y2=\"32.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.6\" y1=\"32.3\" x2=\"33.7\" y2=\"32.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.2\" y1=\"31.9\" x2=\"33.6\" y2=\"32.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"31.9\" x2=\"33.2\" y2=\"31.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.7\" y1=\"38.5\" x2=\"44.75\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"31.9\" x2=\"32.71\" y2=\"31.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"40.7\" y=\"32.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.6\" y=\"32.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D0D\">\n<contactref element=\"IC2\" pad=\"23\"/>\n<contactref element=\"FPGA\" pad=\"85\"/>\n<wire x1=\"42.7\" y1=\"45.9\" x2=\"42.7\" y2=\"45.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.3\" y1=\"46.3\" x2=\"42.7\" y2=\"45.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.4\" y1=\"46.3\" x2=\"42.3\" y2=\"46.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.9\" y1=\"40.8\" x2=\"30.4\" y2=\"46.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.9\" y1=\"40.6\" x2=\"24.9\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"40.5\" x2=\"24.9\" y2=\"40.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"39.9\" x2=\"24.8\" y2=\"40.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.7\" y1=\"45.5\" x2=\"42.75\" y2=\"45.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"39.9\" x2=\"24.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"42.3\" y=\"46.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"24.9\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D1D\">\n<contactref element=\"IC2\" pad=\"24\"/>\n<contactref element=\"FPGA\" pad=\"84\"/>\n<wire x1=\"41.5\" y1=\"45.5\" x2=\"42.25\" y2=\"45.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.3\" y1=\"45.5\" x2=\"41.5\" y2=\"45.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"27.1\" y1=\"41.3\" x2=\"31.3\" y2=\"45.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"26.1\" y1=\"41.3\" x2=\"27.1\" y2=\"41.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"25.6\" y1=\"40.8\" x2=\"26.1\" y2=\"41.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"25.3\" y1=\"40.5\" x2=\"25.6\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"39.9\" x2=\"25.3\" y2=\"40.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"39.9\" x2=\"25.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"41.5\" y=\"45.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"25.6\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2D\">\n<contactref element=\"IC2\" pad=\"26\"/>\n<contactref element=\"FPGA\" pad=\"81\"/>\n<wire x1=\"35.9\" y1=\"44.3\" x2=\"41.5\" y2=\"44.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.6\" y1=\"44.3\" x2=\"35.9\" y2=\"44.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"27.1\" y1=\"40.8\" x2=\"30.6\" y2=\"44.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"26.8\" y1=\"40.5\" x2=\"27.1\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"39.9\" x2=\"26.8\" y2=\"40.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"44.3\" x2=\"41.5\" y2=\"44.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"39.9\" x2=\"26.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"35.9\" y=\"44.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"27.1\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3D\">\n<contactref element=\"IC2\" pad=\"27\"/>\n<contactref element=\"FPGA\" pad=\"79\"/>\n<wire x1=\"37.1\" y1=\"43.8\" x2=\"41.5\" y2=\"43.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.1\" y1=\"44.8\" x2=\"37.1\" y2=\"43.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.7\" y1=\"44.8\" x2=\"36.1\" y2=\"44.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"27.8\" y1=\"40.9\" x2=\"31.7\" y2=\"44.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"39.9\" x2=\"27.8\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"43.8\" x2=\"41.5\" y2=\"43.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"39.9\" x2=\"27.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"37.1\" y=\"43.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.7\" y=\"44.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4D\">\n<contactref element=\"IC2\" pad=\"28\"/>\n<contactref element=\"FPGA\" pad=\"78\"/>\n<wire x1=\"36\" y1=\"43.3\" x2=\"41.5\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.5\" y1=\"43.8\" x2=\"36\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.4\" y1=\"43.8\" x2=\"35.5\" y2=\"43.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"28.3\" y1=\"40.7\" x2=\"31.4\" y2=\"43.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.3\" y1=\"39.9\" x2=\"28.3\" y2=\"40.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"43.3\" x2=\"41.5\" y2=\"43.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.3\" y1=\"39.9\" x2=\"28.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"35.5\" y=\"43.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.4\" y=\"43.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5D\">\n<contactref element=\"IC2\" pad=\"29\"/>\n<contactref element=\"FPGA\" pad=\"77\"/>\n<wire x1=\"35.5\" y1=\"42.7\" x2=\"41.5\" y2=\"42.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31\" y1=\"42.7\" x2=\"35.5\" y2=\"42.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"29.1\" y1=\"40.8\" x2=\"31\" y2=\"42.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"28.8\" y1=\"40.5\" x2=\"29.1\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.8\" y1=\"39.9\" x2=\"28.8\" y2=\"40.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"42.7\" x2=\"41.5\" y2=\"42.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.8\" y1=\"39.9\" x2=\"28.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"35.5\" y=\"42.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"29.1\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6D\">\n<contactref element=\"IC2\" pad=\"30\"/>\n<contactref element=\"FPGA\" pad=\"76\"/>\n<wire x1=\"37.1\" y1=\"42.2\" x2=\"41.5\" y2=\"42.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.8\" y1=\"41.9\" x2=\"37.1\" y2=\"42.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.9\" y1=\"41\" x2=\"36.8\" y2=\"41.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.1\" y1=\"41\" x2=\"35.9\" y2=\"41\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.1\" y1=\"39\" x2=\"31.1\" y2=\"41\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.1\" y1=\"39.7\" x2=\"29.1\" y2=\"39\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.2\" y1=\"39.8\" x2=\"29.1\" y2=\"39.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"42.2\" x2=\"41.5\" y2=\"42.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.2\" y1=\"39.8\" x2=\"29.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"36.8\" y=\"41.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"29.1\" y=\"39\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7D\">\n<contactref element=\"IC2\" pad=\"31\"/>\n<contactref element=\"FPGA\" pad=\"75\"/>\n<wire x1=\"39.3\" y1=\"41.7\" x2=\"41.5\" y2=\"41.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39\" y1=\"41.7\" x2=\"39.3\" y2=\"41.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"36.3\" y1=\"39\" x2=\"39\" y2=\"41.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"30.1\" y1=\"39\" x2=\"36.3\" y2=\"39\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"29.8\" y1=\"39.3\" x2=\"30.1\" y2=\"39\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.8\" y1=\"39.8\" x2=\"29.8\" y2=\"39.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"41.7\" x2=\"41.5\" y2=\"41.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.8\" y1=\"39.8\" x2=\"29.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"39.3\" y=\"41.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"30.1\" y=\"39\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L135\">\n<contactref element=\"FPGA\" pad=\"135\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"4\"/>\n<wire x1=\"11.8\" y1=\"24.9\" x2=\"11.3\" y2=\"24.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.9\" y1=\"25\" x2=\"11.8\" y2=\"24.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.6\" y1=\"25\" x2=\"11.9\" y2=\"25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.8\" y1=\"24.8\" x2=\"12.6\" y2=\"25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.2\" y1=\"24.8\" x2=\"12.8\" y2=\"24.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.3\" y1=\"29.9\" x2=\"13.2\" y2=\"24.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.3\" y1=\"32.1\" x2=\"18.3\" y2=\"29.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.2\" y1=\"37\" x2=\"18.3\" y2=\"32.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.2\" y1=\"47.9\" x2=\"23.2\" y2=\"37\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"21.5\" y1=\"49.6\" x2=\"23.2\" y2=\"47.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"21.5\" y1=\"50.2\" x2=\"21.5\" y2=\"49.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"21.2\" y1=\"50.5\" x2=\"21.5\" y2=\"50.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"14.9\" y1=\"50.5\" x2=\"21.2\" y2=\"50.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"12.6\" y1=\"48.2\" x2=\"14.9\" y2=\"50.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"7.4\" y1=\"48.2\" x2=\"12.6\" y2=\"48.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-1.7\" y1=\"57.3\" x2=\"7.4\" y2=\"48.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-1.7\" y1=\"58\" x2=\"-1.7\" y2=\"57.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11.3\" y1=\"24.9\" x2=\"11.21\" y2=\"24.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.7\" y1=\"58\" x2=\"-1.71\" y2=\"58\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"18.3\" y=\"32.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L140\">\n<contactref element=\"FPGA\" pad=\"140\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"3\"/>\n<wire x1=\"11.9\" y1=\"22.4\" x2=\"11.3\" y2=\"22.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.7\" y1=\"23.2\" x2=\"11.9\" y2=\"22.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.7\" y1=\"24.3\" x2=\"12.7\" y2=\"23.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.7\" y1=\"24.6\" x2=\"12.7\" y2=\"24.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.3\" y1=\"25\" x2=\"12.7\" y2=\"24.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12\" y1=\"25\" x2=\"12.3\" y2=\"25\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.4\" y1=\"30.6\" x2=\"12\" y2=\"25\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.4\" y1=\"50.6\" x2=\"6.4\" y2=\"30.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.1\" y1=\"57.1\" x2=\"6.4\" y2=\"50.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-3.3\" y1=\"57.1\" x2=\"-0.1\" y2=\"57.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-4.2\" y1=\"58\" x2=\"-3.3\" y2=\"57.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"22.4\" x2=\"11.21\" y2=\"22.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.2\" y1=\"58\" x2=\"-4.25\" y2=\"58\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"12.7\" y=\"24.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L21_SDA\">\n<contactref element=\"FPGA\" pad=\"21\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"13\"/>\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"13\"/>\n<contactref element=\"R_SDA\" pad=\"1\"/>\n<contactref element=\"DAC1\" pad=\"3\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"13\"/>\n<wire x1=\"73.6\" y1=\"27.9\" x2=\"74.2131\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.3\" y1=\"28.2\" x2=\"73.6\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.5\" y1=\"31.4\" x2=\"73.3\" y2=\"28.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"76.5\" y1=\"67.8\" x2=\"76.5\" y2=\"31.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"78.95\" y1=\"70.25\" x2=\"76.5\" y2=\"67.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19\" y1=\"81.3\" x2=\"19\" y2=\"80.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.4\" y1=\"83.7\" x2=\"19\" y2=\"81.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.05\" y1=\"83.7\" x2=\"21.4\" y2=\"83.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"80.7\" x2=\"18.925\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.3\" y1=\"26.1\" x2=\"23.3\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"27\" x2=\"23.3\" y2=\"26.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"34.1\" x2=\"24.2\" y2=\"27\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.3\" y1=\"35\" x2=\"24.2\" y2=\"34.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.3\" y1=\"36.4\" x2=\"23.3\" y2=\"35\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.7\" y1=\"36.8\" x2=\"23.3\" y2=\"36.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.7\" y1=\"49.3\" x2=\"23.7\" y2=\"36.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"18.9\" y1=\"54.1\" x2=\"23.7\" y2=\"49.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"18.9\" y1=\"57.5\" x2=\"18.9\" y2=\"54.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.8\" y1=\"58.6\" x2=\"18.9\" y2=\"57.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.8\" y1=\"68.1\" x2=\"17.8\" y2=\"58.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.9\" y1=\"69.2\" x2=\"18.4\" y2=\"68.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.4\" y1=\"68.7\" x2=\"17.8\" y2=\"68.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.9\" y1=\"69.8\" x2=\"18.9\" y2=\"69.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.3\" y1=\"18.4\" x2=\"23.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.9\" y1=\"69.8\" x2=\"18.925\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.9\" y1=\"77.6\" x2=\"18.9\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.9\" y1=\"72.8\" x2=\"18.9\" y2=\"77.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"18.4\" y1=\"72.3\" x2=\"18.9\" y2=\"72.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"18.4\" y1=\"68.7\" x2=\"18.4\" y2=\"72.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"18.9\" y1=\"80.6\" x2=\"18.925\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.6\" y1=\"70.3\" x2=\"78.9\" y2=\"70.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.1\" y1=\"86.8\" x2=\"64.6\" y2=\"70.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"86.8\" x2=\"48.1\" y2=\"86.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24\" y1=\"86.6\" x2=\"24.2\" y2=\"86.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24\" y1=\"84.6\" x2=\"24\" y2=\"86.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"83.7\" x2=\"24\" y2=\"84.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"78.9\" y1=\"70.3\" x2=\"78.95\" y2=\"70.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.1\" y1=\"83.7\" x2=\"23.05\" y2=\"83.7\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"73.3\" y=\"28.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.3\" y=\"35\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.9\" y=\"54.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.9\" y=\"77.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"18.4\" y=\"68.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED3\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"23\"/>\n<contactref element=\"LED3\" pad=\"A\"/>\n<wire x1=\"44\" y1=\"79\" x2=\"45.1\" y2=\"79\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28\" y1=\"79\" x2=\"44\" y2=\"79\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.5\" y1=\"74.5\" x2=\"28\" y2=\"79\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.5\" y1=\"73.4\" x2=\"23.5\" y2=\"74.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.1\" y1=\"79\" x2=\"45.18\" y2=\"79.04\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.5\" y1=\"73.4\" x2=\"23.475\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"44\" y=\"79\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.5\" y=\"74.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED2\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"22\"/>\n<contactref element=\"LED2\" pad=\"A\"/>\n<wire x1=\"46.5\" y1=\"78.2\" x2=\"47.3\" y2=\"79\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.3\" y1=\"78.2\" x2=\"46.5\" y2=\"78.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"40.7\" y1=\"74.6\" x2=\"44.3\" y2=\"78.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"29.2\" y1=\"74.6\" x2=\"40.7\" y2=\"74.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"26.8\" y1=\"72.2\" x2=\"29.2\" y2=\"74.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.4\" y1=\"72.2\" x2=\"26.8\" y2=\"72.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"22.9\" y1=\"72.7\" x2=\"23.4\" y2=\"72.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.9\" y1=\"73.3\" x2=\"22.9\" y2=\"72.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.3\" y1=\"79\" x2=\"47.38\" y2=\"79.03\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.9\" y1=\"73.3\" x2=\"22.825\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46.5\" y=\"78.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.4\" y=\"72.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"AIN1\">\n<contactref element=\"FPGA\" pad=\"3\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"2\"/>\n<wire x1=\"14.2\" y1=\"18.9\" x2=\"14.2\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.8\" y1=\"20.3\" x2=\"14.2\" y2=\"18.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"20.3\" x2=\"12.8\" y2=\"20.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.9\" y1=\"20.3\" x2=\"12.1\" y2=\"20.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5.2\" y1=\"28.4\" x2=\"2.9\" y2=\"20.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.6\" y1=\"28.4\" x2=\"-5.2\" y2=\"28.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.59\" y1=\"29.39\" x2=\"-6.6\" y2=\"28.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.2\" y1=\"18.4\" x2=\"14.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"12.1\" y=\"20.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"REF1\">\n<contactref element=\"IC1\" pad=\"6\"/>\n<contactref element=\"CREF1\" pad=\"1\"/>\n<wire x1=\"49.9\" y1=\"15.8\" x2=\"48.5\" y2=\"15.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50\" y1=\"15.9\" x2=\"49.9\" y2=\"15.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.2\" y1=\"15.9\" x2=\"50\" y2=\"15.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"15.1\" x2=\"55.2\" y2=\"15.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.4\" y1=\"14.7\" x2=\"56\" y2=\"15.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.9\" y1=\"14.7\" x2=\"56.4\" y2=\"14.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59\" y1=\"15.8\" x2=\"57.9\" y2=\"14.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"48.5\" y1=\"15.8\" x2=\"48.5\" y2=\"15.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59\" y1=\"15.8\" x2=\"59.08\" y2=\"15.8\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"56\" y=\"15.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA-1\">\n<contactref element=\"IC1\" pad=\"2\"/>\n<contactref element=\"IC1\" pad=\"4\"/>\n<contactref element=\"C-AIN1\" pad=\"1\"/>\n<wire x1=\"56.08\" y1=\"13.74\" x2=\"50.4\" y2=\"13.74\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"13.74\" x2=\"48.51\" y2=\"13.74\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.51\" y1=\"13.74\" x2=\"48.5\" y2=\"13.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.5\" y1=\"14.7\" x2=\"48.5\" y2=\"14.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"13.8\" x2=\"49.5\" y2=\"14.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"14.7\" x2=\"48.5\" y2=\"14.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"13.8\" x2=\"50.4\" y2=\"13.74\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"LOW_22\">\n<contactref element=\"FPGA\" pad=\"22\"/>\n<contactref element=\"IC1\" pad=\"47\"/>\n<contactref element=\"IC2\" pad=\"47\"/>\n<wire x1=\"47.25\" y1=\"38.5\" x2=\"47.25\" y2=\"29.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.25\" y1=\"29.75\" x2=\"48\" y2=\"29\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"48\" y=\"29\" extent=\"1-16\" drill=\"0.5\"/>\n<wire x1=\"48\" y1=\"29\" x2=\"48\" y2=\"6\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"48\" y=\"6\" extent=\"1-16\" drill=\"0.5\"/>\n<wire x1=\"47.9\" y1=\"6\" x2=\"47.8177\" y2=\"6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.8177\" y1=\"6\" x2=\"43.2395\" y2=\"1.4218\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.2395\" y1=\"1.4218\" x2=\"29.5782\" y2=\"1.4218\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.5782\" y1=\"1.4218\" x2=\"24\" y2=\"7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.3\" y1=\"6.6\" x2=\"47.3\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.9\" y1=\"6\" x2=\"47.3\" y2=\"6.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.3\" y1=\"12.5\" x2=\"47.25\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.9\" y1=\"6\" x2=\"48\" y2=\"6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.8\" y1=\"11.7\" x2=\"23.8\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.8\" y1=\"7.2\" x2=\"23.8\" y2=\"11.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24\" y1=\"7\" x2=\"23.8\" y2=\"7.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.8\" y1=\"18.3\" x2=\"23.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"23.8\" y=\"11.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"24\" y=\"7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L134\">\n<contactref element=\"FPGA\" pad=\"134\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"5\"/>\n<wire x1=\"13\" y1=\"25.3\" x2=\"11.3\" y2=\"25.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"25.3\" x2=\"13\" y2=\"25.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.2\" y1=\"27.2\" x2=\"12.1\" y2=\"25.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.2\" y1=\"48.7\" x2=\"10.2\" y2=\"27.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.9\" y1=\"58\" x2=\"10.2\" y2=\"48.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"25.3\" x2=\"11.21\" y2=\"25.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.9\" y1=\"58\" x2=\"0.83\" y2=\"58\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"13\" y=\"25.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LOW_24\">\n<contactref element=\"FPGA\" pad=\"24\"/>\n<contactref element=\"IC1\" pad=\"46\"/>\n<contactref element=\"IC2\" pad=\"46\"/>\n<wire x1=\"46.75\" y1=\"38.5\" x2=\"46.75\" y2=\"29.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.75\" y1=\"29.25\" x2=\"47\" y2=\"29\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"47\" y=\"29\" extent=\"1-16\" drill=\"0.5\"/>\n<wire x1=\"47\" y1=\"29\" x2=\"47\" y2=\"6\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"47\" y=\"6\" extent=\"1-16\" drill=\"0.5\"/>\n<wire x1=\"46.8\" y1=\"6\" x2=\"46.8\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.8\" y1=\"12.5\" x2=\"46.75\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"15.7\" x2=\"24.8\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.2\" y1=\"15.7\" x2=\"24.8\" y2=\"15.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"35.5\" y1=\"5.4\" x2=\"25.2\" y2=\"15.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"46.4\" y1=\"5.4\" x2=\"35.5\" y2=\"5.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"47\" y1=\"6\" x2=\"46.4\" y2=\"5.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.8\" y1=\"18.3\" x2=\"24.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"24.8\" y=\"15.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<wire x1=\"46.8\" y1=\"6\" x2=\"47\" y2=\"6\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"LOW_25\">\n<contactref element=\"FPGA\" pad=\"25\"/>\n<contactref element=\"IC1\" pad=\"45\"/>\n<contactref element=\"IC2\" pad=\"45\"/>\n<wire x1=\"46.25\" y1=\"38.5\" x2=\"46.25\" y2=\"29.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.25\" y1=\"29.25\" x2=\"46\" y2=\"29\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"46\" y=\"29\" extent=\"1-16\" drill=\"0.5\"/>\n<wire x1=\"46\" y1=\"29\" x2=\"46\" y2=\"6\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"46\" y=\"6\" extent=\"1-16\" drill=\"0.5\"/>\n<wire x1=\"46.2\" y1=\"6.2\" x2=\"46.2\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46\" y1=\"6\" x2=\"46.2\" y2=\"6.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.2\" y1=\"12.5\" x2=\"46.25\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.2\" y1=\"16.7\" x2=\"25.2\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"16.2\" x2=\"25.2\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"15.6\" x2=\"25.7\" y2=\"16.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"35.3\" y1=\"6\" x2=\"25.7\" y2=\"15.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"46\" y1=\"6\" x2=\"35.3\" y2=\"6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"25.2\" y1=\"18.3\" x2=\"25.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"25.7\" y=\"16.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"REF2\">\n<contactref element=\"IC2\" pad=\"6\"/>\n<contactref element=\"CREF2\" pad=\"1\"/>\n<wire x1=\"49.9\" y1=\"41.8\" x2=\"48.5\" y2=\"41.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50\" y1=\"41.9\" x2=\"49.9\" y2=\"41.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"51.7\" y1=\"41.9\" x2=\"50\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.7\" y1=\"40.9\" x2=\"51.7\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"40.9\" x2=\"52.7\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.3\" y1=\"40.8\" x2=\"56.2\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.1\" y1=\"40.8\" x2=\"56.3\" y2=\"40.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"39.7\" x2=\"58.1\" y2=\"40.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"48.5\" y1=\"41.8\" x2=\"48.5\" y2=\"41.75\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"56.3\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA-2\">\n<contactref element=\"IC2\" pad=\"2\"/>\n<contactref element=\"IC2\" pad=\"4\"/>\n<contactref element=\"C-AIN3\" pad=\"1\"/>\n<wire x1=\"52.5\" y1=\"39.7\" x2=\"48.5\" y2=\"39.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.7\" y1=\"37.5\" x2=\"54.35\" y2=\"37.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.35\" y1=\"37.85\" x2=\"52.5\" y2=\"39.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.1\" y1=\"37.5\" x2=\"54.7\" y2=\"37.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.4\" y1=\"37.8\" x2=\"55.1\" y2=\"37.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.4\" y1=\"38.2\" x2=\"55.4\" y2=\"37.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53\" y1=\"40.6\" x2=\"55.4\" y2=\"38.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49\" y1=\"40.6\" x2=\"53\" y2=\"40.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.9\" y1=\"40.7\" x2=\"49\" y2=\"40.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"40.7\" x2=\"48.9\" y2=\"40.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"39.7\" x2=\"48.5\" y2=\"39.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"40.7\" x2=\"48.5\" y2=\"40.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.2\" y1=\"36.6\" x2=\"59.2\" y2=\"37.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.5\" y1=\"36.6\" x2=\"58.2\" y2=\"36.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54.3\" y1=\"37.8\" x2=\"55.5\" y2=\"36.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"54.3\" y1=\"37.8\" x2=\"54.35\" y2=\"37.85\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.2\" y=\"36.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"54.3\" y=\"37.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OSC1\">\n<contactref element=\"OSC\" pad=\"3\"/>\n<contactref element=\"FPGA\" pad=\"27\"/>\n<wire x1=\"26.215\" y1=\"13.21\" x2=\"26.215\" y2=\"18.375\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.215\" y1=\"18.375\" x2=\"26.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"D0A\">\n<contactref element=\"IC1\" pad=\"34\"/>\n<contactref element=\"FPGA\" pad=\"47\"/>\n<wire x1=\"40.9\" y1=\"14.3\" x2=\"41.5\" y2=\"14.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38\" y1=\"17.2\" x2=\"40.9\" y2=\"14.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38\" y1=\"19.9\" x2=\"38\" y2=\"17.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.9\" y1=\"24\" x2=\"38\" y2=\"19.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.6\" y1=\"24\" x2=\"33.9\" y2=\"24\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.6\" y1=\"25\" x2=\"33.6\" y2=\"24\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.3\" y1=\"25.3\" x2=\"33.6\" y2=\"25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"25.3\" x2=\"33.3\" y2=\"25.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"14.3\" x2=\"41.5\" y2=\"14.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"25.3\" x2=\"32.71\" y2=\"25.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"38\" y=\"17.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.6\" y=\"24\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D1A\">\n<contactref element=\"IC1\" pad=\"35\"/>\n<contactref element=\"FPGA\" pad=\"46\"/>\n<wire x1=\"40.7\" y1=\"13.8\" x2=\"41.5\" y2=\"13.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.7\" y1=\"17.6\" x2=\"40.7\" y2=\"13.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.5\" y1=\"24.8\" x2=\"40.7\" y2=\"17.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.8\" y1=\"24.8\" x2=\"33.5\" y2=\"24.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.7\" y1=\"24.8\" x2=\"31.8\" y2=\"24.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"13.8\" x2=\"41.5\" y2=\"13.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"24.8\" x2=\"32.71\" y2=\"24.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"40.7\" y=\"13.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.8\" y=\"24.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2A\">\n<contactref element=\"IC1\" pad=\"37\"/>\n<contactref element=\"FPGA\" pad=\"45\"/>\n<wire x1=\"41.4\" y1=\"12.5\" x2=\"42.25\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.6\" y1=\"13.3\" x2=\"41.4\" y2=\"12.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"40.5\" y1=\"13.3\" x2=\"40.6\" y2=\"13.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.2\" y1=\"21.6\" x2=\"40.5\" y2=\"13.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.2\" y1=\"23.8\" x2=\"32.2\" y2=\"21.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.8\" y1=\"24.2\" x2=\"32.2\" y2=\"23.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32\" y1=\"24.2\" x2=\"31.8\" y2=\"24.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.1\" y1=\"24.3\" x2=\"32\" y2=\"24.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"24.3\" x2=\"32.1\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"24.3\" x2=\"32.71\" y2=\"24.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"41.4\" y=\"12.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.8\" y=\"24.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3A\">\n<contactref element=\"IC1\" pad=\"38\"/>\n<contactref element=\"FPGA\" pad=\"44\"/>\n<wire x1=\"42.7\" y1=\"12.1\" x2=\"42.7\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.4\" y1=\"11.8\" x2=\"42.7\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.3\" y1=\"11.8\" x2=\"42.4\" y2=\"11.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.5\" y1=\"11.8\" x2=\"41.3\" y2=\"11.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.3\" y1=\"21\" x2=\"40.5\" y2=\"11.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.3\" y1=\"21.8\" x2=\"31.3\" y2=\"21\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.4\" y1=\"21.9\" x2=\"31.3\" y2=\"21.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.4\" y1=\"22.5\" x2=\"31.4\" y2=\"21.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.2\" y1=\"22.7\" x2=\"31.4\" y2=\"22.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.2\" y1=\"23.1\" x2=\"31.2\" y2=\"22.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.8\" y1=\"23.7\" x2=\"31.2\" y2=\"23.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32\" y1=\"23.7\" x2=\"31.8\" y2=\"23.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.1\" y1=\"23.8\" x2=\"32\" y2=\"23.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"23.8\" x2=\"32.1\" y2=\"23.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.7\" y1=\"12.5\" x2=\"42.75\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"23.8\" x2=\"32.71\" y2=\"23.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"41.3\" y=\"11.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.4\" y=\"21.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4A\">\n<contactref element=\"IC1\" pad=\"39\"/>\n<contactref element=\"FPGA\" pad=\"43\"/>\n<wire x1=\"43.2\" y1=\"12.1\" x2=\"43.2\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.4\" y1=\"11.3\" x2=\"43.2\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.7\" y1=\"11.3\" x2=\"42.4\" y2=\"11.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41\" y1=\"11.3\" x2=\"41.7\" y2=\"11.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"30.9\" y1=\"21.4\" x2=\"41\" y2=\"11.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"30.9\" y1=\"22.1\" x2=\"30.9\" y2=\"21.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.7\" y1=\"22.9\" x2=\"30.9\" y2=\"22.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.1\" y1=\"23.3\" x2=\"31.7\" y2=\"22.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"23.3\" x2=\"32.1\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.2\" y1=\"12.5\" x2=\"43.25\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"23.3\" x2=\"32.71\" y2=\"23.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"41.7\" y=\"11.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.7\" y=\"22.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5A\">\n<contactref element=\"IC1\" pad=\"40\"/>\n<contactref element=\"FPGA\" pad=\"41\"/>\n<wire x1=\"43.7\" y1=\"12.1\" x2=\"43.7\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43\" y1=\"11.4\" x2=\"43.7\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43\" y1=\"11.2\" x2=\"43\" y2=\"11.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43\" y1=\"12.9\" x2=\"43\" y2=\"11.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.3\" y1=\"18.6\" x2=\"43\" y2=\"12.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"36.6\" y1=\"18.6\" x2=\"37.3\" y2=\"18.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.7\" y1=\"21.5\" x2=\"36.6\" y2=\"18.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.7\" y1=\"22.3\" x2=\"33.7\" y2=\"21.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.8\" y1=\"22.3\" x2=\"33.7\" y2=\"22.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.7\" y1=\"12.5\" x2=\"43.75\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"22.3\" x2=\"32.71\" y2=\"22.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"43\" y=\"11.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.7\" y=\"22.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6A\">\n<contactref element=\"IC1\" pad=\"41\"/>\n<contactref element=\"FPGA\" pad=\"39\"/>\n<wire x1=\"44.2\" y1=\"11.9\" x2=\"44.2\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44\" y1=\"11.7\" x2=\"44.2\" y2=\"11.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.9\" y1=\"11.7\" x2=\"44\" y2=\"11.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"41.3\" y1=\"13.3\" x2=\"42.9\" y2=\"11.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"39.7\" y1=\"13.3\" x2=\"41.3\" y2=\"13.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.8\" y1=\"21.2\" x2=\"39.7\" y2=\"13.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32\" y1=\"21.2\" x2=\"31.8\" y2=\"21.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.1\" y1=\"21.3\" x2=\"32\" y2=\"21.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"21.3\" x2=\"32.1\" y2=\"21.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.2\" y1=\"12.5\" x2=\"44.25\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"21.3\" x2=\"32.71\" y2=\"21.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"44\" y=\"11.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.8\" y=\"21.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7A\">\n<contactref element=\"IC1\" pad=\"42\"/>\n<contactref element=\"FPGA\" pad=\"38\"/>\n<wire x1=\"44.7\" y1=\"11.7\" x2=\"44.7\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.6\" y1=\"10.6\" x2=\"44.7\" y2=\"11.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.3\" y1=\"10.6\" x2=\"43.6\" y2=\"10.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.3\" y1=\"10.6\" x2=\"41.3\" y2=\"10.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.3\" y1=\"19.6\" x2=\"40.3\" y2=\"10.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.3\" y1=\"20\" x2=\"31.3\" y2=\"19.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.1\" y1=\"20.8\" x2=\"31.3\" y2=\"20\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"20.8\" x2=\"32.1\" y2=\"20.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.7\" y1=\"12.5\" x2=\"44.75\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"20.8\" x2=\"32.71\" y2=\"20.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"41.3\" y=\"10.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.3\" y=\"19.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D0B\">\n<contactref element=\"IC1\" pad=\"23\"/>\n<contactref element=\"FPGA\" pad=\"59\"/>\n<wire x1=\"42.7\" y1=\"21.5\" x2=\"42.7\" y2=\"19.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.7\" y1=\"22.2\" x2=\"42.7\" y2=\"21.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.6\" y1=\"31.3\" x2=\"42.7\" y2=\"22.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.8\" y1=\"31.3\" x2=\"33.6\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.7\" y1=\"19.5\" x2=\"42.75\" y2=\"19.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"31.3\" x2=\"32.71\" y2=\"31.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"42.7\" y=\"21.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.6\" y=\"31.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D1B\">\n<contactref element=\"IC1\" pad=\"24\"/>\n<contactref element=\"FPGA\" pad=\"58\"/>\n<wire x1=\"42.2\" y1=\"20.9\" x2=\"42.2\" y2=\"19.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.6\" y1=\"21.5\" x2=\"42.2\" y2=\"20.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.6\" y1=\"29.5\" x2=\"41.6\" y2=\"21.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.6\" y1=\"30.5\" x2=\"33.6\" y2=\"29.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.3\" y1=\"30.8\" x2=\"33.6\" y2=\"30.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"30.8\" x2=\"33.3\" y2=\"30.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.2\" y1=\"19.5\" x2=\"42.25\" y2=\"19.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"30.8\" x2=\"32.71\" y2=\"30.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"41.6\" y=\"21.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"33.6\" y=\"30.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D2B\">\n<contactref element=\"IC1\" pad=\"26\"/>\n<contactref element=\"FPGA\" pad=\"57\"/>\n<wire x1=\"41.1\" y1=\"18.3\" x2=\"41.5\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.4\" y1=\"19\" x2=\"41.1\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.6\" y1=\"19.2\" x2=\"40.4\" y2=\"19\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"40.6\" y1=\"20.5\" x2=\"40.6\" y2=\"19.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.8\" y1=\"29.3\" x2=\"40.6\" y2=\"20.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.8\" y1=\"30\" x2=\"31.8\" y2=\"29.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.1\" y1=\"30.3\" x2=\"31.8\" y2=\"30\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"30.3\" x2=\"32.1\" y2=\"30.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"18.3\" x2=\"41.5\" y2=\"18.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"30.3\" x2=\"32.71\" y2=\"30.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"40.4\" y=\"19\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.8\" y=\"30\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D3B\">\n<contactref element=\"IC1\" pad=\"27\"/>\n<contactref element=\"FPGA\" pad=\"56\"/>\n<wire x1=\"40.9\" y1=\"17.8\" x2=\"41.5\" y2=\"17.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.8\" y1=\"18.9\" x2=\"40.9\" y2=\"17.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.8\" y1=\"19.2\" x2=\"39.8\" y2=\"18.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.2\" y1=\"19.8\" x2=\"39.8\" y2=\"19.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"39.2\" y1=\"21.3\" x2=\"39.2\" y2=\"19.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"36.1\" y1=\"24.4\" x2=\"39.2\" y2=\"21.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"36\" y1=\"24.4\" x2=\"36.1\" y2=\"24.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"36\" y1=\"27.2\" x2=\"36\" y2=\"24.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.4\" y1=\"29.8\" x2=\"36\" y2=\"27.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"29.8\" x2=\"33.4\" y2=\"29.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"17.8\" x2=\"41.5\" y2=\"17.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"29.8\" x2=\"32.71\" y2=\"29.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"39.8\" y=\"19.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"36\" y=\"24.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D4B\">\n<contactref element=\"IC1\" pad=\"28\"/>\n<contactref element=\"FPGA\" pad=\"55\"/>\n<wire x1=\"41\" y1=\"17.3\" x2=\"41.5\" y2=\"17.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.1\" y1=\"19.2\" x2=\"41\" y2=\"17.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.1\" y1=\"20.6\" x2=\"39.1\" y2=\"19.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.7\" y1=\"21\" x2=\"39.1\" y2=\"20.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.1\" y1=\"21\" x2=\"38.7\" y2=\"21\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"35.5\" y1=\"23.6\" x2=\"38.1\" y2=\"21\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"35.5\" y1=\"24.9\" x2=\"35.5\" y2=\"23.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"35.5\" y1=\"27.3\" x2=\"35.5\" y2=\"24.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.5\" y1=\"29.3\" x2=\"35.5\" y2=\"27.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"29.3\" x2=\"33.5\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"17.3\" x2=\"41.5\" y2=\"17.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"29.3\" x2=\"32.71\" y2=\"29.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"38.7\" y=\"21\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"35.5\" y=\"24.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D5B\">\n<contactref element=\"IC1\" pad=\"29\"/>\n<contactref element=\"FPGA\" pad=\"54\"/>\n<wire x1=\"41.1\" y1=\"16.8\" x2=\"41.5\" y2=\"16.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"19.3\" x2=\"41.1\" y2=\"16.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"20.4\" x2=\"38.6\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.3\" y1=\"20.4\" x2=\"38.6\" y2=\"20.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"35.2\" y1=\"23.5\" x2=\"38.3\" y2=\"20.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"35.2\" y1=\"24.5\" x2=\"35.2\" y2=\"23.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.8\" y1=\"27.9\" x2=\"35.2\" y2=\"24.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.8\" y1=\"28.5\" x2=\"31.8\" y2=\"27.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.1\" y1=\"28.8\" x2=\"31.8\" y2=\"28.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"28.8\" x2=\"32.1\" y2=\"28.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"16.8\" x2=\"41.5\" y2=\"16.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"28.8\" x2=\"32.71\" y2=\"28.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"38.6\" y=\"20.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.8\" y=\"28.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D6B\">\n<contactref element=\"IC1\" pad=\"30\"/>\n<contactref element=\"FPGA\" pad=\"52\"/>\n<wire x1=\"40.3\" y1=\"16.3\" x2=\"41.5\" y2=\"16.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.5\" y1=\"19.1\" x2=\"40.3\" y2=\"16.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.5\" y1=\"19.7\" x2=\"37.5\" y2=\"19.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.5\" y1=\"21.5\" x2=\"37.5\" y2=\"19.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.7\" y1=\"24.3\" x2=\"37.5\" y2=\"21.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.7\" y1=\"26.4\" x2=\"34.7\" y2=\"24.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.3\" y1=\"27.8\" x2=\"34.7\" y2=\"26.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"27.8\" x2=\"33.3\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"16.3\" x2=\"41.5\" y2=\"16.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.8\" y1=\"27.8\" x2=\"32.71\" y2=\"27.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"37.5\" y=\"19.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.7\" y=\"24.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"D7B\">\n<contactref element=\"IC1\" pad=\"31\"/>\n<contactref element=\"FPGA\" pad=\"50\"/>\n<wire x1=\"40.1\" y1=\"15.8\" x2=\"41.5\" y2=\"15.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.8\" y1=\"19.1\" x2=\"40.1\" y2=\"15.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.2\" y1=\"19.1\" x2=\"36.8\" y2=\"19.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.3\" y1=\"24\" x2=\"36.2\" y2=\"19.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.3\" y1=\"26\" x2=\"31.3\" y2=\"24\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.8\" y1=\"26.5\" x2=\"31.3\" y2=\"26\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.1\" y1=\"26.8\" x2=\"31.8\" y2=\"26.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"26.8\" x2=\"32.1\" y2=\"26.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5\" y1=\"15.8\" x2=\"41.5\" y2=\"15.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"26.8\" x2=\"32.71\" y2=\"26.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"36.8\" y=\"19.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.8\" y=\"26.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA2\">\n<contactref element=\"GAINSW3\" pad=\"4\"/>\n<contactref element=\"OVSAMP1\" pad=\"1\"/>\n<contactref element=\"IC4\" pad=\"1\"/>\n<wire x1=\"57.3\" y1=\"29.5\" x2=\"57.3\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.2\" y1=\"29.4\" x2=\"57.3\" y2=\"29.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.8\" y1=\"27.8\" x2=\"57.2\" y2=\"29.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.2\" y1=\"27.8\" x2=\"58.8\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.1\" y1=\"28.7\" x2=\"60.2\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.1\" y1=\"38\" x2=\"61.1\" y2=\"28.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.4\" y1=\"40.3\" x2=\"61.1\" y2=\"38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.4\" y1=\"41.5\" x2=\"63.4\" y2=\"40.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.3\" y1=\"41.6\" x2=\"63.4\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.4\" y1=\"41.6\" x2=\"63.3\" y2=\"41.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"41.2\" x2=\"61.35\" y2=\"41.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.35\" y1=\"41.55\" x2=\"61.4\" y2=\"41.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"40.9\" x2=\"61\" y2=\"41.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.3\" y1=\"31.1\" x2=\"57.31\" y2=\"31.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"40.9\" x2=\"60.95\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.4\" y1=\"46.1\" x2=\"64.9\" y2=\"46.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.4\" y1=\"44.1\" x2=\"62.4\" y2=\"46.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.4\" y1=\"42.5\" x2=\"60.4\" y2=\"44.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.35\" y1=\"41.55\" x2=\"60.4\" y2=\"42.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"46.1\" x2=\"64.925\" y2=\"46.188\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"57.2\" y=\"29.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB1\">\n<contactref element=\"IC1\" pad=\"9\"/>\n<contactref element=\"GAINSW2\" pad=\"4\"/>\n<contactref element=\"OVSAMP2\" pad=\"3\"/>\n<contactref element=\"IC3\" pad=\"7\"/>\n<wire x1=\"48.5\" y1=\"17.25\" x2=\"54.75\" y2=\"17.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.75\" y1=\"17.25\" x2=\"55.15\" y2=\"16.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"12.4\" x2=\"61\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.4\" y1=\"12.8\" x2=\"61.35\" y2=\"12.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.35\" y1=\"12.75\" x2=\"61\" y2=\"12.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.3\" y1=\"12.8\" x2=\"61.4\" y2=\"12.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"9.9\" x2=\"63.3\" y2=\"12.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"9.3\" x2=\"66.2\" y2=\"9.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"12.1\" x2=\"60.95\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"9.3\" x2=\"66.275\" y2=\"9.212\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57\" y1=\"28\" x2=\"57.3\" y2=\"28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.4\" y1=\"27.4\" x2=\"57\" y2=\"28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.4\" y1=\"26.4\" x2=\"56.4\" y2=\"27.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"57.4\" y1=\"24.2\" x2=\"57.4\" y2=\"26.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"56.6\" y1=\"23.4\" x2=\"57.35\" y2=\"24.15\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"57.35\" y1=\"24.15\" x2=\"57.4\" y2=\"24.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"56.6\" y1=\"18.3\" x2=\"56.6\" y2=\"23.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"55.2\" y1=\"16.9\" x2=\"56.6\" y2=\"18.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"57.3\" y1=\"28\" x2=\"57.31\" y2=\"28.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.2\" y1=\"16.9\" x2=\"55.15\" y2=\"16.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.3\" y1=\"13.2\" x2=\"61.3\" y2=\"12.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.4\" y1=\"14.1\" x2=\"61.3\" y2=\"13.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.4\" y1=\"21.1\" x2=\"60.4\" y2=\"14.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.4\" y1=\"24.1\" x2=\"60.4\" y2=\"21.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.3\" y1=\"12.8\" x2=\"61.35\" y2=\"12.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.4\" y1=\"24.1\" x2=\"57.35\" y2=\"24.15\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"56.4\" y=\"27.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"55.2\" y=\"16.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"57.4\" y=\"24.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CLKOUTTOLEFT_29\">\n<contactref element=\"FPGA\" pad=\"29\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"2\"/>\n<wire x1=\"27.2\" y1=\"18.9\" x2=\"27.2\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"19.3\" x2=\"27.2\" y2=\"18.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"19.3\" x2=\"26.8\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16\" y1=\"19.3\" x2=\"25.3\" y2=\"19.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.1\" y1=\"22.2\" x2=\"16\" y2=\"19.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"7.2\" y1=\"22.2\" x2=\"13.1\" y2=\"22.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5\" y1=\"34.4\" x2=\"7.2\" y2=\"22.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.2\" y1=\"18.4\" x2=\"27.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"34.4\" x2=\"-5.01\" y2=\"34.49\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"25.3\" y=\"19.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"LED4\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"24\"/>\n<contactref element=\"LED4\" pad=\"A\"/>\n<wire x1=\"43\" y1=\"78.6\" x2=\"43\" y2=\"79.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.4\" y1=\"78\" x2=\"43\" y2=\"78.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.7\" y1=\"78\" x2=\"42.4\" y2=\"78\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.2\" y1=\"74.5\" x2=\"27.7\" y2=\"78\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.2\" y1=\"73.4\" x2=\"24.2\" y2=\"74.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"73.4\" x2=\"24.125\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"42.4\" y=\"78\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"24.2\" y=\"74.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGOUTTOLEFT_106\">\n<contactref element=\"FPGA\" pad=\"106\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"10\"/>\n<wire x1=\"14.2\" y1=\"39.4\" x2=\"14.2\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.8\" y1=\"39\" x2=\"14.2\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.6\" y1=\"39\" x2=\"13.8\" y2=\"39\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.6\" y1=\"39\" x2=\"13.6\" y2=\"39\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5\" y1=\"44.6\" x2=\"0.6\" y2=\"39\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"14.2\" y1=\"39.8\" x2=\"14.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"44.6\" x2=\"-5.01\" y2=\"44.65\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"13.6\" y=\"39\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGINFROMRIGHT_86\">\n<contactref element=\"FPGA\" pad=\"86\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"9\"/>\n<wire x1=\"24.2\" y1=\"39.4\" x2=\"24.2\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.7\" y1=\"36.9\" x2=\"24.2\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.7\" y1=\"36.9\" x2=\"21.7\" y2=\"36.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.3\" y1=\"36.9\" x2=\"18.7\" y2=\"36.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"14\" y1=\"38.2\" x2=\"15.3\" y2=\"36.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-2.2\" y1=\"38.2\" x2=\"14\" y2=\"38.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5.1\" y1=\"41.1\" x2=\"-2.2\" y2=\"38.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8\" y1=\"41.1\" x2=\"-5.1\" y2=\"41.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8.6\" y1=\"41.7\" x2=\"-8\" y2=\"41.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8.6\" y1=\"43.6\" x2=\"-8.6\" y2=\"41.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.55\" y1=\"44.65\" x2=\"-8.6\" y2=\"43.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.2\" y1=\"39.8\" x2=\"24.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"18.7\" y=\"36.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"TRIGOUTORIGHT_87\">\n<contactref element=\"FPGA\" pad=\"87\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"7\"/>\n<wire x1=\"23.7\" y1=\"39.4\" x2=\"23.7\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.7\" y1=\"37.4\" x2=\"23.7\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.3\" y1=\"37.4\" x2=\"21.7\" y2=\"37.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.2\" y1=\"37.4\" x2=\"18.3\" y2=\"37.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"14.1\" y1=\"38.5\" x2=\"15.2\" y2=\"37.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"0\" y1=\"38.5\" x2=\"14.1\" y2=\"38.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-4.6\" y1=\"43.1\" x2=\"0\" y2=\"38.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-6.6\" y1=\"43.1\" x2=\"-4.6\" y2=\"43.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.5\" y1=\"42.2\" x2=\"-6.6\" y2=\"43.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.7\" y1=\"39.8\" x2=\"23.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"42.2\" x2=\"-7.55\" y2=\"42.11\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"18.3\" y=\"37.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALTORIGHT_RX_92\">\n<contactref element=\"FPGA\" pad=\"92\"/>\n<contactref element=\"U340G\" pad=\"3\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"13\"/>\n<wire x1=\"21.2\" y1=\"39\" x2=\"21.2\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.5\" y1=\"39\" x2=\"21.2\" y2=\"39\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"19.9\" y1=\"38.4\" x2=\"20.5\" y2=\"39\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"16.4\" y1=\"38.4\" x2=\"19.9\" y2=\"38.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"6.1\" y1=\"48.7\" x2=\"16.4\" y2=\"38.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-6.5\" y1=\"48.7\" x2=\"6.1\" y2=\"48.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.5\" y1=\"49.7\" x2=\"-6.5\" y2=\"48.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"21.2\" y1=\"39.8\" x2=\"21.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"49.7\" x2=\"-7.55\" y2=\"49.73\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-0.2\" y1=\"71.4\" x2=\"-0.2\" y2=\"72.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.2\" y1=\"63.3\" x2=\"-0.2\" y2=\"71.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.5\" y1=\"57\" x2=\"-0.2\" y2=\"63.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.5\" y1=\"50.8\" x2=\"-6.5\" y2=\"57\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.5\" y1=\"49.8\" x2=\"-6.5\" y2=\"50.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.2\" y1=\"72.6\" x2=\"-0.205\" y2=\"72.695\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-7.5\" y1=\"49.8\" x2=\"-7.55\" y2=\"49.73\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"21.2\" y=\"39\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-0.2\" y=\"71.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALFROMRIGHT_TX_93\">\n<contactref element=\"FPGA\" pad=\"93\"/>\n<contactref element=\"U340G\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"11\"/>\n<wire x1=\"20.7\" y1=\"39.2\" x2=\"20.7\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.4\" y1=\"37.9\" x2=\"20.7\" y2=\"39.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.7\" y1=\"37.9\" x2=\"19.4\" y2=\"37.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"15.8\" y1=\"37.9\" x2=\"18.7\" y2=\"37.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"15.3\" y1=\"38.4\" x2=\"15.8\" y2=\"37.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"15\" y1=\"38.4\" x2=\"15.3\" y2=\"38.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"9\" y1=\"44.4\" x2=\"15\" y2=\"38.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-3.3\" y1=\"44.4\" x2=\"9\" y2=\"44.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5.1\" y1=\"46.2\" x2=\"-3.3\" y2=\"44.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-6.6\" y1=\"46.2\" x2=\"-5.1\" y2=\"46.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.5\" y1=\"47.1\" x2=\"-6.6\" y2=\"46.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"20.7\" y1=\"39.8\" x2=\"20.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"47.1\" x2=\"-7.55\" y2=\"47.19\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-1.5\" y1=\"71.7\" x2=\"-1.5\" y2=\"72.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.7\" y1=\"71.5\" x2=\"-1.5\" y2=\"71.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.7\" y1=\"71.3\" x2=\"-1.7\" y2=\"71.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.3\" y1=\"64.7\" x2=\"-1.7\" y2=\"71.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.3\" y1=\"52.9\" x2=\"-8.3\" y2=\"64.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.6\" y1=\"52.6\" x2=\"-8.3\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-8.6\" y1=\"48.2\" x2=\"-8.6\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.6\" y1=\"47.2\" x2=\"-8.6\" y2=\"48.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.5\" y1=\"72.6\" x2=\"-1.475\" y2=\"72.695\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-7.6\" y1=\"47.2\" x2=\"-7.55\" y2=\"47.19\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"18.7\" y=\"37.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"-1.7\" y=\"71.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALTOLEFT_96\">\n<contactref element=\"FPGA\" pad=\"96\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"12\"/>\n<wire x1=\"19.2\" y1=\"40.4\" x2=\"19.2\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.8\" y1=\"40.8\" x2=\"19.2\" y2=\"40.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.5\" y1=\"40.8\" x2=\"18.8\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18\" y1=\"41.3\" x2=\"18.5\" y2=\"40.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.2\" y1=\"41.3\" x2=\"18\" y2=\"41.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13\" y1=\"41.1\" x2=\"13.2\" y2=\"41.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.8\" y1=\"41.1\" x2=\"13\" y2=\"41.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"6.8\" y1=\"47.1\" x2=\"12.8\" y2=\"41.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5\" y1=\"47.1\" x2=\"6.8\" y2=\"47.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"19.2\" y1=\"39.9\" x2=\"19.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"47.1\" x2=\"-5.01\" y2=\"47.19\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"18.5\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"13\" y=\"41.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SERIALFROMLEFT_98\">\n<contactref element=\"FPGA\" pad=\"98\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"14\"/>\n<wire x1=\"18.3\" y1=\"39\" x2=\"18.3\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.2\" y1=\"39\" x2=\"18.3\" y2=\"39\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"5.5\" y1=\"49.7\" x2=\"16.2\" y2=\"39\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5\" y1=\"49.7\" x2=\"5.5\" y2=\"49.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"18.3\" y1=\"39.8\" x2=\"18.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"49.7\" x2=\"-5.01\" y2=\"49.73\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"18.3\" y=\"39\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CLKINFROMRIGHT_26\">\n<contactref element=\"FPGA\" pad=\"26\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"1\"/>\n<wire x1=\"25.7\" y1=\"17.5\" x2=\"25.7\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.7\" y1=\"19\" x2=\"25.7\" y2=\"17.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.8\" y1=\"19.1\" x2=\"25.7\" y2=\"19\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.8\" y1=\"19.5\" x2=\"25.8\" y2=\"19.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.8\" y1=\"22.5\" x2=\"25.8\" y2=\"19.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.9\" y1=\"22.5\" x2=\"22.8\" y2=\"22.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-4.1\" y1=\"35.5\" x2=\"8.9\" y2=\"22.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.5\" y1=\"35.5\" x2=\"-4.1\" y2=\"35.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.5\" y1=\"34.5\" x2=\"-6.5\" y2=\"35.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.7\" y1=\"18.3\" x2=\"25.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"34.5\" x2=\"-7.55\" y2=\"34.49\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"25.7\" y=\"17.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SPARELEFT_102\">\n<contactref element=\"FPGA\" pad=\"102\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"4\"/>\n<wire x1=\"16.2\" y1=\"38.4\" x2=\"16.2\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.4\" y1=\"36.6\" x2=\"16.2\" y2=\"38.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.6\" y1=\"36.6\" x2=\"14.4\" y2=\"36.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5\" y1=\"37\" x2=\"-4.6\" y2=\"36.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"16.2\" y1=\"39.8\" x2=\"16.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"37\" x2=\"-5.01\" y2=\"37.03\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"14.4\" y=\"36.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"SPARERIGHT_99\">\n<contactref element=\"FPGA\" pad=\"99\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"3\"/>\n<wire x1=\"17.8\" y1=\"40.8\" x2=\"17.8\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.8\" y1=\"39.6\" x2=\"17.8\" y2=\"40.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.5\" y1=\"39.3\" x2=\"17.8\" y2=\"39.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.5\" y1=\"28\" x2=\"17.5\" y2=\"39.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.3\" y1=\"22.8\" x2=\"17.5\" y2=\"28\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.5\" y1=\"22.8\" x2=\"12.3\" y2=\"22.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-1.7\" y1=\"36\" x2=\"11.5\" y2=\"22.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.5\" y1=\"36\" x2=\"-1.7\" y2=\"36\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.5\" y1=\"37\" x2=\"-6.5\" y2=\"36\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.8\" y1=\"39.9\" x2=\"17.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"37\" x2=\"-7.55\" y2=\"37.03\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"17.8\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"5VINFROMUSB\" class=\"3\">\n<contactref element=\"USB1\" pad=\"1\"/>\n<contactref element=\"S9\" pad=\"1\"/>\n<wire x1=\"-7.1\" y1=\"69.7\" x2=\"-7.8\" y2=\"70.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"-7.1\" y1=\"67.5\" x2=\"-7.1\" y2=\"69.7\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"-7.3\" y1=\"67.3\" x2=\"-7.1\" y2=\"67.5\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"-7.3\" y1=\"66.1\" x2=\"-7.3\" y2=\"67.3\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"-1.2\" y1=\"60\" x2=\"-7.3\" y2=\"66.1\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"38.1\" y1=\"60\" x2=\"-1.2\" y2=\"60\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"39.2\" y1=\"60\" x2=\"38.1\" y2=\"60\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"39.7\" y1=\"59.5\" x2=\"39.2\" y2=\"60\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"-7.8\" y1=\"70.4\" x2=\"-7.86\" y2=\"70.4\" width=\"0.381\" layer=\"16\"/>\n<via x=\"-7.1\" y=\"69.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"38.1\" y=\"60\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A13\">\n<contactref element=\"FPGA\" pad=\"13\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"14\"/>\n<wire x1=\"19.3\" y1=\"22.2\" x2=\"19.3\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.8\" y1=\"25.7\" x2=\"19.3\" y2=\"22.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.7\" y1=\"37.6\" x2=\"22.8\" y2=\"25.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"42\" y1=\"37.6\" x2=\"34.7\" y2=\"37.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"58.4\" y1=\"54\" x2=\"42\" y2=\"37.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"61.3\" y1=\"54\" x2=\"58.4\" y2=\"54\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"74.5\" y1=\"67.2\" x2=\"61.3\" y2=\"54\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"77\" y1=\"67.2\" x2=\"74.5\" y2=\"67.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"79\" y1=\"69.2\" x2=\"77\" y2=\"67.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"80.4\" y1=\"69.2\" x2=\"79\" y2=\"69.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"81.4\" y1=\"70.2\" x2=\"80.4\" y2=\"69.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.3\" y1=\"18.4\" x2=\"19.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"81.4\" y1=\"70.2\" x2=\"81.49\" y2=\"70.25\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"22.8\" y=\"25.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"77\" y=\"67.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A12\">\n<contactref element=\"FPGA\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"12\"/>\n<wire x1=\"18.8\" y1=\"23.3\" x2=\"18.8\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"26.7\" x2=\"18.8\" y2=\"23.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.4\" y1=\"37.9\" x2=\"22.2\" y2=\"26.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"41.9\" y1=\"37.9\" x2=\"33.4\" y2=\"37.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"58.5\" y1=\"54.5\" x2=\"41.9\" y2=\"37.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"61.8\" y1=\"54.5\" x2=\"58.5\" y2=\"54.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"79.1\" y1=\"71.8\" x2=\"61.8\" y2=\"54.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"80.5\" y1=\"71.8\" x2=\"79.1\" y2=\"71.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"81.49\" y1=\"72.79\" x2=\"80.5\" y2=\"71.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.8\" y1=\"18.4\" x2=\"18.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"22.2\" y=\"26.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"58.5\" y=\"54.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A11\">\n<contactref element=\"FPGA\" pad=\"11\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"10\"/>\n<wire x1=\"18.3\" y1=\"27.1\" x2=\"18.3\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"28.4\" x2=\"18.3\" y2=\"27.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"29.6\" y1=\"38.4\" x2=\"19.6\" y2=\"28.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"29.6\" y1=\"39.2\" x2=\"29.6\" y2=\"38.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"30.4\" y1=\"40\" x2=\"29.6\" y2=\"39.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.7\" y1=\"40\" x2=\"30.4\" y2=\"40\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.4\" y1=\"40.7\" x2=\"32.7\" y2=\"40\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"37.6\" y1=\"40.7\" x2=\"33.4\" y2=\"40.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"41.6\" y1=\"44.7\" x2=\"37.6\" y2=\"40.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"46.2\" y1=\"44.7\" x2=\"41.6\" y2=\"44.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"67.8\" y1=\"66.3\" x2=\"46.2\" y2=\"44.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"77.8\" y1=\"76.3\" x2=\"67.8\" y2=\"66.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"80.5\" y1=\"76.3\" x2=\"77.8\" y2=\"76.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"81.4\" y1=\"75.4\" x2=\"80.5\" y2=\"76.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"18.3\" y1=\"18.4\" x2=\"18.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"81.4\" y1=\"75.4\" x2=\"81.49\" y2=\"75.33\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"19.6\" y=\"28.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67.8\" y=\"66.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A10\">\n<contactref element=\"FPGA\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"8\"/>\n<wire x1=\"17.7\" y1=\"24.2\" x2=\"17.7\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.3\" y1=\"24.6\" x2=\"17.7\" y2=\"24.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.3\" y1=\"25.6\" x2=\"17.3\" y2=\"24.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"16.3\" y1=\"27.2\" x2=\"16.3\" y2=\"25.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.1\" y1=\"35\" x2=\"16.3\" y2=\"27.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.1\" y1=\"41.1\" x2=\"24.1\" y2=\"35\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"52.4\" y1=\"69.4\" x2=\"24.1\" y2=\"41.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"71.6\" y1=\"69.4\" x2=\"52.4\" y2=\"69.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"73.3\" y1=\"71.1\" x2=\"71.6\" y2=\"69.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"79.1\" y1=\"76.9\" x2=\"73.3\" y2=\"71.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"80.5\" y1=\"76.9\" x2=\"79.1\" y2=\"76.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"81.4\" y1=\"77.8\" x2=\"80.5\" y2=\"76.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.7\" y1=\"18.4\" x2=\"17.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"81.4\" y1=\"77.8\" x2=\"81.49\" y2=\"77.87\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"17.3\" y=\"24.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"73.3\" y=\"71.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A8\">\n<contactref element=\"FPGA\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"6\"/>\n<wire x1=\"16.8\" y1=\"25.8\" x2=\"16.8\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.8\" y1=\"27\" x2=\"16.8\" y2=\"25.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.4\" y1=\"34.6\" x2=\"16.8\" y2=\"27\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.4\" y1=\"41\" x2=\"24.4\" y2=\"34.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"35.8\" y1=\"52.4\" x2=\"24.4\" y2=\"41\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"52.1\" y1=\"52.4\" x2=\"35.8\" y2=\"52.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"68.3\" y1=\"68.6\" x2=\"52.1\" y2=\"52.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"79.1\" y1=\"79.4\" x2=\"68.3\" y2=\"68.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"80.4\" y1=\"79.4\" x2=\"79.1\" y2=\"79.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"81.4\" y1=\"80.4\" x2=\"80.4\" y2=\"79.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.8\" y1=\"18.4\" x2=\"16.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"81.4\" y1=\"80.4\" x2=\"81.49\" y2=\"80.41\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"16.8\" y=\"25.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"68.3\" y=\"68.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A7\">\n<contactref element=\"FPGA\" pad=\"7\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"4\"/>\n<wire x1=\"16.2\" y1=\"17.6\" x2=\"16.2\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.1\" y1=\"17.5\" x2=\"16.2\" y2=\"17.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"16.1\" y1=\"17.3\" x2=\"16.1\" y2=\"17.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"21.2\" y1=\"12.2\" x2=\"16.1\" y2=\"17.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"26.5\" y1=\"12.2\" x2=\"21.2\" y2=\"12.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"43.1\" y1=\"-4.4\" x2=\"26.5\" y2=\"12.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"68.7\" y1=\"-4.4\" x2=\"43.1\" y2=\"-4.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"83.7\" y1=\"10.6\" x2=\"68.7\" y2=\"-4.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"83.7\" y1=\"80.7\" x2=\"83.7\" y2=\"10.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"81.5\" y1=\"82.9\" x2=\"83.7\" y2=\"80.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"16.2\" y1=\"18.3\" x2=\"16.21\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"81.5\" y1=\"82.9\" x2=\"81.49\" y2=\"82.95\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"16.1\" y=\"17.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A6\">\n<contactref element=\"FPGA\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"2\"/>\n<wire x1=\"15.8\" y1=\"25.5\" x2=\"15.8\" y2=\"18.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.1\" y1=\"28.8\" x2=\"15.8\" y2=\"25.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.1\" y1=\"31.6\" x2=\"19.1\" y2=\"28.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.3\" y1=\"37.8\" x2=\"19.1\" y2=\"31.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.8\" y1=\"43.3\" x2=\"25.3\" y2=\"37.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"38.2\" y1=\"43.3\" x2=\"30.8\" y2=\"43.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"39.9\" y1=\"45\" x2=\"38.2\" y2=\"43.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"45.8\" y1=\"45\" x2=\"39.9\" y2=\"45\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"67.7\" y1=\"66.9\" x2=\"45.8\" y2=\"45\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"67.7\" y1=\"73.1\" x2=\"67.7\" y2=\"66.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"79.1\" y1=\"84.5\" x2=\"67.7\" y2=\"73.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"80.5\" y1=\"84.5\" x2=\"79.1\" y2=\"84.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"81.49\" y1=\"85.49\" x2=\"80.5\" y2=\"84.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.8\" y1=\"18.4\" x2=\"15.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"25.3\" y=\"37.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67.7\" y=\"66.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"A14\">\n<contactref element=\"FPGA\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"16\"/>\n<wire x1=\"19.7\" y1=\"17.3\" x2=\"19.7\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.6\" y1=\"16.2\" x2=\"19.7\" y2=\"17.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"16.2\" x2=\"18.6\" y2=\"16.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"45.3\" y1=\"-4.1\" x2=\"25\" y2=\"16.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.9\" y1=\"-4.1\" x2=\"45.3\" y2=\"-4.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"79.7\" y1=\"12.7\" x2=\"62.9\" y2=\"-4.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"79.7\" y1=\"66\" x2=\"79.7\" y2=\"12.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"81.4\" y1=\"67.7\" x2=\"79.7\" y2=\"66\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.7\" y1=\"18.3\" x2=\"19.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"81.4\" y1=\"67.7\" x2=\"81.49\" y2=\"67.71\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"18.6\" y=\"16.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB2\">\n<contactref element=\"GAINSW4\" pad=\"4\"/>\n<contactref element=\"OVSAMP2\" pad=\"1\"/>\n<contactref element=\"IC4\" pad=\"7\"/>\n<wire x1=\"57.6\" y1=\"26.2\" x2=\"57.4\" y2=\"26.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.2\" y1=\"26.8\" x2=\"57.6\" y2=\"26.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.1\" y1=\"26.9\" x2=\"58.2\" y2=\"26.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"58.1\" y1=\"35.2\" x2=\"58.1\" y2=\"26.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"64.2\" y1=\"41.3\" x2=\"58.1\" y2=\"35.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"64.2\" y1=\"48.6\" x2=\"64.2\" y2=\"41.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"65.5\" y1=\"49.9\" x2=\"64.2\" y2=\"48.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.5\" y1=\"50.6\" x2=\"65.5\" y2=\"49.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.4\" y1=\"26.2\" x2=\"57.31\" y2=\"26.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.5\" y1=\"50.6\" x2=\"65.575\" y2=\"50.612\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.3\" y1=\"52.1\" x2=\"59.3\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.3\" y1=\"51.1\" x2=\"59.3\" y2=\"52.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.7\" y1=\"51.1\" x2=\"60.3\" y2=\"51.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"64.2\" y1=\"48.6\" x2=\"61.7\" y2=\"51.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"59.3\" y1=\"52.9\" x2=\"59.25\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.2\" y=\"26.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"64.2\" y=\"48.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"60.3\" y=\"51.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA1\">\n<contactref element=\"IC1\" pad=\"3\"/>\n<contactref element=\"GAINSW1\" pad=\"4\"/>\n<contactref element=\"OVSAMP1\" pad=\"3\"/>\n<contactref element=\"IC3\" pad=\"1\"/>\n<wire x1=\"49.3\" y1=\"14.2\" x2=\"48.5\" y2=\"14.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58\" y1=\"5.5\" x2=\"49.3\" y2=\"14.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"64.9\" y1=\"5.5\" x2=\"58\" y2=\"5.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.6\" y1=\"4.8\" x2=\"64.9\" y2=\"5.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"14.2\" x2=\"48.5\" y2=\"14.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.6\" y1=\"4.8\" x2=\"65.625\" y2=\"4.788\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57\" y1=\"33\" x2=\"57.3\" y2=\"33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.6\" y1=\"30.6\" x2=\"57\" y2=\"33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.4\" y1=\"29.4\" x2=\"54.6\" y2=\"30.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.4\" y1=\"19.3\" x2=\"53.4\" y2=\"29.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.3\" y1=\"15.2\" x2=\"53.4\" y2=\"19.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.3\" y1=\"14.2\" x2=\"49.3\" y2=\"15.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"57.3\" y1=\"33\" x2=\"57.31\" y2=\"33.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59\" y1=\"0\" x2=\"59\" y2=\"-0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58\" y1=\"1\" x2=\"59\" y2=\"0\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58\" y1=\"5.5\" x2=\"58\" y2=\"1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"59\" y1=\"-0.5\" x2=\"59.05\" y2=\"-0.5\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"49.3\" y=\"14.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"58\" y=\"5.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"54.6\" y=\"30.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"58\" y=\"1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L131\">\n<contactref element=\"FPGA\" pad=\"131\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"6\"/>\n<wire x1=\"11.7\" y1=\"26.9\" x2=\"11.3\" y2=\"26.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"27.3\" x2=\"11.7\" y2=\"26.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.3\" y1=\"27.3\" x2=\"12.1\" y2=\"27.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"28.3\" x2=\"12.3\" y2=\"27.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"32.6\" x2=\"13.3\" y2=\"28.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.3\" y1=\"38.6\" x2=\"13.3\" y2=\"32.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12\" y1=\"39.9\" x2=\"13.3\" y2=\"38.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12\" y1=\"49\" x2=\"12\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.2\" y1=\"49.2\" x2=\"12\" y2=\"49\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.4\" y1=\"58\" x2=\"12.2\" y2=\"49.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11.3\" y1=\"26.9\" x2=\"11.21\" y2=\"26.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.4\" y1=\"58\" x2=\"3.37\" y2=\"58\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"13.3\" y=\"32.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"12.2\" y=\"49.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L132\">\n<contactref element=\"FPGA\" pad=\"132\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"7\"/>\n<wire x1=\"11.9\" y1=\"26.4\" x2=\"11.3\" y2=\"26.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"26.6\" x2=\"11.9\" y2=\"26.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"27.1\" x2=\"12.1\" y2=\"26.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.7\" y1=\"28.5\" x2=\"12.1\" y2=\"27.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"10.7\" y1=\"53.3\" x2=\"10.7\" y2=\"28.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6\" y1=\"58\" x2=\"10.7\" y2=\"53.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"26.4\" x2=\"11.21\" y2=\"26.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"58\" x2=\"5.91\" y2=\"58\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"12.1\" y=\"26.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"5VINFROMRIGHT\" class=\"3\">\n<contactref element=\"S9\" pad=\"3\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"5\"/>\n<wire x1=\"39.7\" y1=\"64.3\" x2=\"39.7\" y2=\"64.5\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"41.3\" y1=\"62.7\" x2=\"39.7\" y2=\"64.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"41.3\" y1=\"61.3\" x2=\"41.3\" y2=\"62.7\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"40.6\" y1=\"60.6\" x2=\"41.3\" y2=\"61.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"37.1\" y1=\"60.6\" x2=\"40.6\" y2=\"60.6\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"35.9\" y1=\"59.4\" x2=\"37.1\" y2=\"60.6\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"31.8\" y1=\"59.4\" x2=\"35.9\" y2=\"59.4\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"27.1\" y1=\"54.7\" x2=\"31.8\" y2=\"59.4\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"18.5\" y1=\"54.7\" x2=\"27.1\" y2=\"54.7\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"12.4\" y1=\"48.6\" x2=\"18.5\" y2=\"54.7\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"7.7\" y1=\"48.6\" x2=\"12.4\" y2=\"48.6\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"5.9\" y1=\"50.4\" x2=\"7.7\" y2=\"48.6\" width=\"0.381\" layer=\"3\"/>\n<wire x1=\"4.9\" y1=\"50.4\" x2=\"5.9\" y2=\"50.4\" width=\"0.381\" layer=\"15\"/>\n<wire x1=\"-4.8\" y1=\"40.7\" x2=\"4.9\" y2=\"50.4\" width=\"0.381\" layer=\"15\"/>\n<wire x1=\"-6.4\" y1=\"40.7\" x2=\"-4.8\" y2=\"40.7\" width=\"0.381\" layer=\"15\"/>\n<wire x1=\"-7.5\" y1=\"39.6\" x2=\"-6.4\" y2=\"40.7\" width=\"0.381\" layer=\"15\"/>\n<wire x1=\"-7.5\" y1=\"39.6\" x2=\"-7.55\" y2=\"39.57\" width=\"0.381\" layer=\"15\"/>\n<via x=\"35.9\" y=\"59.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"5.9\" y=\"50.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CLKOUT_32\">\n<contactref element=\"FPGA\" pad=\"32\"/>\n<contactref element=\"IC1\" pad=\"15\"/>\n<wire x1=\"46.75\" y1=\"19.5\" x2=\"46.6032\" y2=\"19.6468\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.6032\" y1=\"19.6468\" x2=\"46.6032\" y2=\"19.98416875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46.6032\" y1=\"19.98416875\" x2=\"44.58736875\" y2=\"22\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.58736875\" y1=\"22\" x2=\"39\" y2=\"22\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39\" y1=\"22\" x2=\"33\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33\" y1=\"16\" x2=\"30\" y2=\"16\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.71\" y1=\"17.29\" x2=\"28.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30\" y1=\"16\" x2=\"28.71\" y2=\"17.29\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101\">\n<contactref element=\"FPGA\" pad=\"101\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"15\"/>\n<wire x1=\"16.7\" y1=\"37.5\" x2=\"16.7\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.2\" y1=\"33\" x2=\"16.7\" y2=\"37.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"2.5\" y1=\"33\" x2=\"12.2\" y2=\"33\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5.2\" y1=\"25.3\" x2=\"2.5\" y2=\"33\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5.5\" y1=\"25.3\" x2=\"-5.2\" y2=\"25.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-6.1\" y1=\"24.7\" x2=\"-5.5\" y2=\"25.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-6.1\" y1=\"12.7\" x2=\"-6.1\" y2=\"24.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5.1\" y1=\"11.7\" x2=\"-6.1\" y2=\"12.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"16.7\" y1=\"39.8\" x2=\"16.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.1\" y1=\"11.7\" x2=\"-5.05\" y2=\"11.61\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"12.2\" y=\"33\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_100\">\n<contactref element=\"FPGA\" pad=\"100\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"13\"/>\n<wire x1=\"17.2\" y1=\"40.8\" x2=\"17.2\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"17.2\" y1=\"30.2\" x2=\"17.2\" y2=\"40.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.9\" y1=\"25.9\" x2=\"17.2\" y2=\"30.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12\" y1=\"25\" x2=\"12.9\" y2=\"25.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"9.3\" y1=\"25\" x2=\"12\" y2=\"25\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-1.5\" y1=\"14.2\" x2=\"9.3\" y2=\"25\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5\" y1=\"14.2\" x2=\"-1.5\" y2=\"14.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"17.2\" y1=\"39.9\" x2=\"17.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"14.2\" x2=\"-5.05\" y2=\"14.15\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"17.2\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"12.9\" y=\"25.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_91\">\n<contactref element=\"FPGA\" pad=\"91\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"11\"/>\n<wire x1=\"21.7\" y1=\"40.4\" x2=\"21.7\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.3\" y1=\"40.8\" x2=\"21.7\" y2=\"40.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"20.5\" y1=\"40.8\" x2=\"21.3\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.4\" y1=\"40.8\" x2=\"20.5\" y2=\"40.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.8\" y1=\"39.2\" x2=\"19.4\" y2=\"40.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"17.8\" y1=\"27.9\" x2=\"17.8\" y2=\"39.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.2\" y1=\"18.5\" x2=\"17.8\" y2=\"27.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"27.2\" y1=\"17.3\" x2=\"27.2\" y2=\"18.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.6\" y1=\"16.7\" x2=\"27.2\" y2=\"17.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5\" y1=\"16.7\" x2=\"26.6\" y2=\"16.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"21.7\" y1=\"39.9\" x2=\"21.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"16.7\" x2=\"-5.05\" y2=\"16.69\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"20.5\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_90\">\n<contactref element=\"FPGA\" pad=\"90\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"9\"/>\n<wire x1=\"22.2\" y1=\"40.8\" x2=\"22.2\" y2=\"39.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"39.5\" x2=\"22.2\" y2=\"40.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"22.6\" y1=\"39.1\" x2=\"22.2\" y2=\"39.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"22.6\" y1=\"37.8\" x2=\"22.6\" y2=\"39.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"13.5\" y1=\"28.7\" x2=\"22.6\" y2=\"37.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"13.5\" y1=\"24\" x2=\"13.5\" y2=\"28.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"8.8\" y1=\"19.3\" x2=\"13.5\" y2=\"24\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5\" y1=\"19.3\" x2=\"8.8\" y2=\"19.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.2\" y1=\"39.9\" x2=\"22.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"19.3\" x2=\"-5.05\" y2=\"19.23\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"22.2\" y=\"40.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"8.8\" y=\"19.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_89\">\n<contactref element=\"FPGA\" pad=\"89\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"7\"/>\n<wire x1=\"22.7\" y1=\"39.4\" x2=\"22.7\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"38.9\" x2=\"22.7\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"38.9\" x2=\"22.2\" y2=\"38.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.1\" y1=\"37.7\" x2=\"22.1\" y2=\"38.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"12.6\" y1=\"28.2\" x2=\"22.1\" y2=\"37.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"12.6\" y1=\"27.6\" x2=\"12.6\" y2=\"28.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"12.1\" y1=\"27.1\" x2=\"12.6\" y2=\"27.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11\" y1=\"27.1\" x2=\"12.1\" y2=\"27.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"5.7\" y1=\"21.8\" x2=\"11\" y2=\"27.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5\" y1=\"21.8\" x2=\"5.7\" y2=\"21.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"22.7\" y1=\"39.8\" x2=\"22.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"21.8\" x2=\"-5.05\" y2=\"21.77\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"22.1\" y=\"38.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_CLK_88\">\n<contactref element=\"FPGA\" pad=\"88\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"5\"/>\n<wire x1=\"23.2\" y1=\"39.3\" x2=\"23.2\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22\" y1=\"38.1\" x2=\"23.2\" y2=\"39.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.6\" y1=\"38.1\" x2=\"22\" y2=\"38.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.9\" y1=\"24.4\" x2=\"21.6\" y2=\"38.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5\" y1=\"24.4\" x2=\"7.9\" y2=\"24.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23.2\" y1=\"39.8\" x2=\"23.21\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"24.4\" x2=\"-5.05\" y2=\"24.31\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"21.6\" y=\"38.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB-1\">\n<contactref element=\"IC1\" pad=\"10\"/>\n<contactref element=\"C-AIN2\" pad=\"1\"/>\n<contactref element=\"IC1\" pad=\"11\"/>\n<wire x1=\"48.5\" y1=\"18.25\" x2=\"48.5\" y2=\"17.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55.8\" y1=\"18.3\" x2=\"48.5\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.4\" y1=\"18.9\" x2=\"55.8\" y2=\"18.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58\" y1=\"18.9\" x2=\"56.4\" y2=\"18.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"17.8\" x2=\"58\" y2=\"18.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"48.5\" y1=\"18.3\" x2=\"48.5\" y2=\"18.25\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"55.8\" y=\"18.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB-2\">\n<contactref element=\"C-AIN4\" pad=\"1\"/>\n<contactref element=\"IC2\" pad=\"10\"/>\n<contactref element=\"IC2\" pad=\"11\"/>\n<wire x1=\"56.2\" y1=\"42\" x2=\"52\" y2=\"42\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.25\" y1=\"43.75\" x2=\"48.5\" y2=\"43.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52\" y1=\"42\" x2=\"50.25\" y2=\"43.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"43.75\" x2=\"48.5\" y2=\"44.25\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"INAMINUS1\">\n<contactref element=\"RGAIN1_1\" pad=\"2\"/>\n<contactref element=\"RGAIN2_1\" pad=\"2\"/>\n<contactref element=\"CGAIN1_1\" pad=\"1\"/>\n<contactref element=\"CH1\" pad=\"+\"/>\n<contactref element=\"CL1\" pad=\"+\"/>\n<contactref element=\"CIN1NF_1\" pad=\"2\"/>\n<contactref element=\"CIN56_1\" pad=\"2\"/>\n<contactref element=\"RIN1_11K\" pad=\"2\"/>\n<contactref element=\"RIN1\" pad=\"2\"/>\n<contactref element=\"CIN5_1\" pad=\"2\"/>\n<contactref element=\"IC3\" pad=\"2\"/>\n<wire x1=\"70\" y1=\"1.9\" x2=\"69\" y2=\"1.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69\" y1=\"1.9\" x2=\"66.4\" y2=\"1.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"1.9\" x2=\"70\" y2=\"1.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"2\" x2=\"66.3\" y2=\"4.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"1.9\" x2=\"66.3\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"4.7\" x2=\"66.275\" y2=\"4.788\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"1.9\" x2=\"66.4\" y2=\"1.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69\" y1=\"1.9\" x2=\"71\" y2=\"3.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"3.9\" x2=\"71\" y2=\"3.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66\" y1=\"1.9\" x2=\"65.1\" y2=\"1.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"1.9\" x2=\"63.8\" y2=\"1.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"1.9\" x2=\"66\" y2=\"1.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"3\" x2=\"60.9\" y2=\"1.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"1.9\" x2=\"60.9\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"0.6\" x2=\"60.85\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"3\" x2=\"60.9\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"5.6\" x2=\"60.95\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"3\" x2=\"60.85\" y2=\"3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"5.8\" x2=\"64.7\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"5.6\" x2=\"61.2\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"5.8\" x2=\"64.7\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"5.6\" x2=\"60.95\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.5\" y1=\"5.9\" x2=\"69\" y2=\"5.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.6\" y1=\"6.8\" x2=\"68.5\" y2=\"5.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.6\" y1=\"6.8\" x2=\"67.6\" y2=\"6.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"5.9\" x2=\"65.6\" y2=\"6.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"5.9\" x2=\"69\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"5.9\" x2=\"64.7\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.9\" y1=\"1.9\" x2=\"63.8\" y2=\"1.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.8\" y1=\"1.9\" x2=\"63.8\" y2=\"1.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"1.9\" x2=\"66.3\" y2=\"1.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"1.9\" x2=\"66.4\" y2=\"1.89788125\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"65.1\" y=\"1.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INBMINUS1\">\n<contactref element=\"CGAIN1_2\" pad=\"1\"/>\n<contactref element=\"RGAIN1_2\" pad=\"2\"/>\n<contactref element=\"RGAIN2_2\" pad=\"2\"/>\n<contactref element=\"CH2\" pad=\"+\"/>\n<contactref element=\"CL2\" pad=\"+\"/>\n<contactref element=\"CIN1NF_2\" pad=\"2\"/>\n<contactref element=\"CIN56_2\" pad=\"2\"/>\n<contactref element=\"RIN2_11K\" pad=\"2\"/>\n<contactref element=\"RIN2\" pad=\"2\"/>\n<contactref element=\"CIN5_2\" pad=\"2\"/>\n<contactref element=\"IC3\" pad=\"6\"/>\n<wire x1=\"70\" y1=\"13\" x2=\"70\" y2=\"14.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"12\" x2=\"70\" y2=\"13\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"9.95\" x2=\"71\" y2=\"12\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"13.6\" x2=\"66.4\" y2=\"14.89788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.3\" y1=\"12.7\" x2=\"66.4\" y2=\"13.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.3\" y1=\"10.2\" x2=\"67.3\" y2=\"12.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"9.9\" x2=\"67.3\" y2=\"10.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"9.3\" x2=\"67\" y2=\"9.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"9.3\" x2=\"66.925\" y2=\"9.212\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.5\" y1=\"9.9\" x2=\"71\" y2=\"9.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.8\" y1=\"8.2\" x2=\"67.85\" y2=\"8.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.85\" y1=\"8.25\" x2=\"69.5\" y2=\"9.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.3\" y1=\"8.2\" x2=\"67.8\" y2=\"8.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"8.5\" x2=\"67.3\" y2=\"8.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"9.2\" x2=\"67\" y2=\"8.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"9.9\" x2=\"71\" y2=\"9.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"9.2\" x2=\"66.925\" y2=\"9.212\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.4\" y1=\"12.4\" x2=\"61.4\" y2=\"11.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"11.4\" x2=\"61.4\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"10.2\" x2=\"61.35\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"12.4\" x2=\"61.35\" y2=\"12.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"9.9\" x2=\"61\" y2=\"7.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.3\" y1=\"10.2\" x2=\"61\" y2=\"9.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"7.9\" x2=\"60.95\" y2=\"7.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.3\" y1=\"10.2\" x2=\"61.35\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.4\" y1=\"11.4\" x2=\"64.7\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"8.1\" x2=\"64.7\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"12.9\" x2=\"64.9\" y2=\"13.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"12.8\" x2=\"65.8\" y2=\"12.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.4\" y1=\"12.2\" x2=\"65.8\" y2=\"12.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"12.2\" x2=\"66.5\" y2=\"12.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.5\" y1=\"12.2\" x2=\"66.4\" y2=\"12.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"13.8\" x2=\"64.9\" y2=\"13.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"12.2\" x2=\"67.1\" y2=\"12.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.8\" y1=\"9.3\" x2=\"69\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.8\" y1=\"10.9\" x2=\"67.8\" y2=\"9.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.5\" y1=\"12.2\" x2=\"67.8\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"8.1\" x2=\"69\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.1\" y1=\"8\" x2=\"64.7\" y2=\"8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"7.1\" x2=\"65.1\" y2=\"8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.7\" y1=\"7.1\" x2=\"66\" y2=\"7.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.8\" y1=\"8.2\" x2=\"67.85\" y2=\"7.25\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.85\" y1=\"7.25\" x2=\"67.7\" y2=\"7.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"8\" x2=\"64.7\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.8\" y1=\"8.2\" x2=\"69\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"7.2\" x2=\"67.9\" y2=\"8.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.9\" y1=\"8.2\" x2=\"67.85\" y2=\"8.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.9\" y1=\"7.2\" x2=\"67.85\" y2=\"7.25\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"67.9\" y=\"7.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INBMINUS2\">\n<contactref element=\"RGAIN1_4\" pad=\"2\"/>\n<contactref element=\"RGAIN2_4\" pad=\"2\"/>\n<contactref element=\"CGAIN1_4\" pad=\"1\"/>\n<contactref element=\"CH4\" pad=\"+\"/>\n<contactref element=\"CL4\" pad=\"+\"/>\n<contactref element=\"CIN1NF_4\" pad=\"2\"/>\n<contactref element=\"CIN56_4\" pad=\"2\"/>\n<contactref element=\"RIN4_11K\" pad=\"2\"/>\n<contactref element=\"RIN4\" pad=\"2\"/>\n<contactref element=\"CIN5_4\" pad=\"2\"/>\n<contactref element=\"IC4\" pad=\"6\"/>\n<wire x1=\"61.2\" y1=\"54.1\" x2=\"61.2\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"52.6\" x2=\"61.2\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"51.9\" x2=\"61.15\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.4\" y1=\"55.3\" x2=\"63.8\" y2=\"55.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.8\" y1=\"55.3\" x2=\"63.9\" y2=\"55.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"54.1\" x2=\"62.4\" y2=\"55.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"55.3\" x2=\"63.9\" y2=\"55.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"54.1\" x2=\"61.15\" y2=\"54.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.4\" y1=\"53.7\" x2=\"66.1\" y2=\"53.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.8\" y1=\"55.3\" x2=\"65.4\" y2=\"53.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.8\" y1=\"55.3\" x2=\"63.9\" y2=\"55.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.8\" y1=\"51.6\" x2=\"60.8\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"51.9\" x2=\"60.8\" y2=\"51.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.8\" y1=\"49.6\" x2=\"60.75\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"51.9\" x2=\"61.15\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"52.6\" x2=\"64.1\" y2=\"49.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.1\" y1=\"49.7\" x2=\"64.1\" y2=\"49.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.6\" y1=\"56.1\" x2=\"67\" y2=\"56.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67\" y1=\"56.1\" x2=\"66.8\" y2=\"56.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"56.1\" x2=\"65.9\" y2=\"56.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"56.1\" x2=\"65.9\" y2=\"56.09788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"56.1\" x2=\"69.6\" y2=\"56.09788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"52\" x2=\"66.3\" y2=\"50.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"52.5\" x2=\"66.3\" y2=\"52\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"56.1\" x2=\"66.8\" y2=\"52.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"50.7\" x2=\"66.225\" y2=\"50.612\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"49.1\" x2=\"70\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"49.1\" x2=\"71\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"49.9\" x2=\"67.1\" y2=\"49.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"50.6\" x2=\"66.3\" y2=\"49.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"49.1\" x2=\"71\" y2=\"49.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"50.6\" x2=\"66.225\" y2=\"50.612\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.5\" y1=\"48.6\" x2=\"70.5\" y2=\"49.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70\" y1=\"49.1\" x2=\"69.5\" y2=\"48.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.5\" y1=\"49.6\" x2=\"70.5\" y2=\"49.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.1\" y1=\"54\" x2=\"66.1\" y2=\"53.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"54.9\" x2=\"66.1\" y2=\"54\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"56.1\" x2=\"67\" y2=\"54.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.1\" y1=\"53.7\" x2=\"66.1\" y2=\"53.65\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"69.5\" y=\"48.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67\" y=\"56.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET1\">\n<contactref element=\"COFFSETB6\" pad=\"2\"/>\n<contactref element=\"ROFFSET1\" pad=\"1\"/>\n<contactref element=\"COFFSETA6\" pad=\"2\"/>\n<contactref element=\"IC3\" pad=\"3\"/>\n<wire x1=\"67\" y1=\"3.1\" x2=\"67\" y2=\"4.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"2.7\" x2=\"67\" y2=\"3.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.6\" y1=\"2.7\" x2=\"67.4\" y2=\"2.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.3\" y1=\"2\" x2=\"67.6\" y2=\"2.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"2\" x2=\"68.3\" y2=\"2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"4.7\" x2=\"66.925\" y2=\"4.788\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.3\" y1=\"26.4\" x2=\"64.3\" y2=\"26.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.5\" y1=\"25.6\" x2=\"64.3\" y2=\"26.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.3\" y1=\"23.4\" x2=\"63.5\" y2=\"25.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.3\" y1=\"21.9\" x2=\"61.3\" y2=\"23.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.4\" y1=\"15.8\" x2=\"61.3\" y2=\"21.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.4\" y1=\"2.7\" x2=\"67.4\" y2=\"15.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.3\" y1=\"26.7\" x2=\"64.35\" y2=\"26.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.9\" y1=\"-0.5\" x2=\"70.9\" y2=\"-1.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"2\" x2=\"70.9\" y2=\"-0.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"2\" x2=\"68.6\" y2=\"2\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"67.4\" y=\"2.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.5\" y=\"25.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET2\">\n<contactref element=\"COFFSETB8\" pad=\"2\"/>\n<contactref element=\"ROFFSET2\" pad=\"1\"/>\n<contactref element=\"COFFSETA1\" pad=\"2\"/>\n<contactref element=\"IC3\" pad=\"5\"/>\n<wire x1=\"67.6\" y1=\"10.8\" x2=\"67.6\" y2=\"9.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.1\" y1=\"11.3\" x2=\"67.6\" y2=\"10.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.1\" y1=\"12.3\" x2=\"68.1\" y2=\"11.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.6\" y1=\"9.3\" x2=\"67.575\" y2=\"9.212\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.4\" y1=\"27.9\" x2=\"64.4\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.4\" y1=\"27.8\" x2=\"65.4\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.4\" y1=\"26.3\" x2=\"65.4\" y2=\"27.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68\" y1=\"23.7\" x2=\"65.4\" y2=\"26.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68\" y1=\"11.3\" x2=\"68\" y2=\"23.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.4\" y1=\"28.9\" x2=\"64.35\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68\" y1=\"11.3\" x2=\"68.1\" y2=\"11.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.1\" y1=\"12.2\" x2=\"71.3\" y2=\"12.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"12.2\" x2=\"69.1\" y2=\"12.3\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"68.1\" y=\"11.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"65.4\" y=\"27.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET3\">\n<contactref element=\"COFFSETB10\" pad=\"2\"/>\n<contactref element=\"ROFFSET3\" pad=\"1\"/>\n<contactref element=\"COFFSETA2\" pad=\"2\"/>\n<contactref element=\"IC4\" pad=\"3\"/>\n<wire x1=\"66.3\" y1=\"46.9\" x2=\"66.3\" y2=\"46.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.6\" y1=\"47.2\" x2=\"66.3\" y2=\"46.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"47.2\" x2=\"66.6\" y2=\"47.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.3\" y1=\"46\" x2=\"67.1\" y2=\"47.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.3\" y1=\"44\" x2=\"68.3\" y2=\"46\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.3\" y1=\"43\" x2=\"68.3\" y2=\"44\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"46.2\" x2=\"66.225\" y2=\"46.188\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.4\" y1=\"31.4\" x2=\"64.4\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.2\" y1=\"32.2\" x2=\"64.4\" y2=\"31.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.2\" y1=\"39.6\" x2=\"65.2\" y2=\"32.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"68.3\" y1=\"42.7\" x2=\"65.2\" y2=\"39.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"68.3\" y1=\"44\" x2=\"68.3\" y2=\"42.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.4\" y1=\"31.1\" x2=\"64.35\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.5\" y1=\"42.8\" x2=\"71.5\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.3\" y1=\"43\" x2=\"69.5\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"68.3\" y=\"44\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"65.2\" y=\"32.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"OFFSET4\">\n<contactref element=\"COFFSETB12\" pad=\"2\"/>\n<contactref element=\"ROFFSET4\" pad=\"1\"/>\n<contactref element=\"COFFSETA3\" pad=\"2\"/>\n<contactref element=\"IC4\" pad=\"5\"/>\n<wire x1=\"66.9\" y1=\"51.6\" x2=\"66.9\" y2=\"50.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.9\" y1=\"52.6\" x2=\"66.9\" y2=\"51.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.9\" y1=\"53.6\" x2=\"67.9\" y2=\"52.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.9\" y1=\"50.7\" x2=\"66.875\" y2=\"50.612\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.3\" y1=\"33.6\" x2=\"64.3\" y2=\"33.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.5\" y1=\"34.4\" x2=\"64.3\" y2=\"33.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.5\" y1=\"39\" x2=\"63.5\" y2=\"34.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"65.3\" y1=\"40.8\" x2=\"63.5\" y2=\"39\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"65.3\" y1=\"50\" x2=\"65.3\" y2=\"40.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"67.9\" y1=\"52.6\" x2=\"65.3\" y2=\"50\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"64.3\" y1=\"33.3\" x2=\"64.35\" y2=\"33.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"53.9\" x2=\"71\" y2=\"53.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"53.6\" x2=\"69.2\" y2=\"53.9\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"67.9\" y=\"52.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.5\" y=\"34.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ1\">\n<contactref element=\"J1\" pad=\"SIGNAL\"/>\n<contactref element=\"K1\" pad=\"3\"/>\n<contactref element=\"C_AC1\" pad=\"2\"/>\n<contactref element=\"S1\" pad=\"2\"/>\n<wire x1=\"75.6\" y1=\"4.3\" x2=\"75.95\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.8\" y1=\"5.1\" x2=\"75.6\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"5.1\" x2=\"74.8\" y2=\"5.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.7\" y1=\"4.1\" x2=\"73.7\" y2=\"5.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.7\" y1=\"-3.4\" x2=\"72.7\" y2=\"-3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.7\" y1=\"-3\" x2=\"72.7\" y2=\"3.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.7\" y1=\"3.5\" x2=\"72.7\" y2=\"4.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"-4.2\" x2=\"72.7\" y2=\"-3.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"-4.2\" x2=\"73.54\" y2=\"-4.27\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"3.2\" x2=\"73\" y2=\"2.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.7\" y1=\"3.5\" x2=\"73\" y2=\"3.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.7\" y1=\"-3\" x2=\"66\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"72.7\" y=\"3.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INA12\">\n<contactref element=\"OVSAMP1\" pad=\"4\"/>\n<contactref element=\"IC2\" pad=\"3\"/>\n<wire x1=\"48.5\" y1=\"40.25\" x2=\"52.75\" y2=\"40.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"52.75\" y1=\"40.25\" x2=\"54.95\" y2=\"38.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"55\" y1=\"38\" x2=\"59.9\" y2=\"33.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.9\" y1=\"38\" x2=\"55\" y2=\"38\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"33.1\" x2=\"59.9\" y2=\"33.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"54.9\" y1=\"38\" x2=\"54.95\" y2=\"38.05\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"54.9\" y=\"38\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INB12\">\n<contactref element=\"IC2\" pad=\"9\"/>\n<contactref element=\"OVSAMP2\" pad=\"4\"/>\n<wire x1=\"49.6\" y1=\"43.2\" x2=\"48.5\" y2=\"43.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"42.4\" x2=\"49.6\" y2=\"43.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"42.1\" x2=\"50.4\" y2=\"42.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.8\" y1=\"38.7\" x2=\"50.4\" y2=\"42.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.8\" y1=\"36.7\" x2=\"53.8\" y2=\"38.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.5\" y1=\"30\" x2=\"53.8\" y2=\"36.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"60.5\" y1=\"28.8\" x2=\"60.5\" y2=\"30\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.9\" y1=\"28.2\" x2=\"60.5\" y2=\"28.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"28.05\" x2=\"59.9\" y2=\"28.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"48.5\" y1=\"43.2\" x2=\"48.5\" y2=\"43.25\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"50.4\" y=\"42.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"60.5\" y=\"28.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_OVSAMP2\">\n<contactref element=\"OVSAMP2\" pad=\"6\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"26\"/>\n<wire x1=\"59.6\" y1=\"26.2\" x2=\"59.9\" y2=\"26.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.8\" y1=\"27\" x2=\"59.6\" y2=\"26.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.7\" y1=\"28.1\" x2=\"58.8\" y2=\"27\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"57.7\" y1=\"32.4\" x2=\"57.7\" y2=\"28.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.7\" y1=\"52.4\" x2=\"57.7\" y2=\"32.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"36.7\" y1=\"52.4\" x2=\"37.7\" y2=\"52.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.9\" y1=\"58.2\" x2=\"36.7\" y2=\"52.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"30.9\" y1=\"59.3\" x2=\"30.9\" y2=\"58.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"28.1\" y1=\"59.3\" x2=\"30.9\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.5\" y1=\"61.9\" x2=\"28.1\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.5\" y1=\"62.5\" x2=\"25.5\" y2=\"61.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.9\" y1=\"26.2\" x2=\"59.9\" y2=\"26.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"25.5\" y1=\"62.5\" x2=\"25.425\" y2=\"62.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.8\" y=\"27\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"30.9\" y=\"59.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_IO_1\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"25\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"1\"/>\n<wire x1=\"24.7\" y1=\"75\" x2=\"24.7\" y2=\"73.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.3\" y1=\"76.4\" x2=\"24.7\" y2=\"75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.6\" y1=\"76.4\" x2=\"23.3\" y2=\"76.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.6\" y1=\"85.4\" x2=\"23.6\" y2=\"76.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"78.9\" y1=\"85.4\" x2=\"32.6\" y2=\"85.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.7\" y1=\"73.4\" x2=\"24.775\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"78.9\" y1=\"85.4\" x2=\"78.95\" y2=\"85.49\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"23.3\" y=\"76.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW1\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"21\"/>\n<contactref element=\"GAINSW1\" pad=\"6\"/>\n<wire x1=\"61.8\" y1=\"-0.5\" x2=\"60.95\" y2=\"-0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.8\" y1=\"2.9\" x2=\"61.8\" y2=\"-0.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"43.2\" y1=\"21.5\" x2=\"61.8\" y2=\"2.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"43.2\" y1=\"22.4\" x2=\"43.2\" y2=\"21.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.8\" y1=\"31.8\" x2=\"43.2\" y2=\"22.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.1\" y1=\"31.8\" x2=\"33.8\" y2=\"31.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.1\" y1=\"32.8\" x2=\"32.1\" y2=\"31.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"24.2\" y1=\"39.7\" x2=\"31.1\" y2=\"32.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24.2\" y1=\"59.8\" x2=\"24.2\" y2=\"39.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.6\" y1=\"61.4\" x2=\"24.2\" y2=\"59.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.2\" y1=\"61.8\" x2=\"22.6\" y2=\"61.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"62.5\" x2=\"22.2\" y2=\"61.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"62.5\" x2=\"22.175\" y2=\"62.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"61.8\" y=\"-0.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.1\" y=\"32.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"22.6\" y=\"61.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW2\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"22\"/>\n<contactref element=\"GAINSW2\" pad=\"6\"/>\n<wire x1=\"62.8\" y1=\"11.6\" x2=\"62.8\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.4\" y1=\"11.2\" x2=\"62.8\" y2=\"11.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.1\" y1=\"11.2\" x2=\"62.4\" y2=\"11.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"59.9\" y1=\"11\" x2=\"60.1\" y2=\"11.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.6\" y1=\"11\" x2=\"59.9\" y2=\"11\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.3\" y1=\"10.7\" x2=\"49.6\" y2=\"11\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.9\" y1=\"10.7\" x2=\"49.3\" y2=\"10.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.4\" y1=\"11.2\" x2=\"48.9\" y2=\"10.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.4\" y1=\"28.5\" x2=\"48.4\" y2=\"11.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.6\" y1=\"28.7\" x2=\"48.4\" y2=\"28.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.6\" y1=\"37.5\" x2=\"48.6\" y2=\"28.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.8\" y1=\"43.3\" x2=\"48.6\" y2=\"37.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"42.8\" y1=\"46.5\" x2=\"42.8\" y2=\"43.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.5\" y1=\"51.8\" x2=\"42.8\" y2=\"46.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"32.9\" y1=\"51.8\" x2=\"37.5\" y2=\"51.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.3\" y1=\"61.4\" x2=\"32.9\" y2=\"51.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.9\" y1=\"61.8\" x2=\"23.3\" y2=\"61.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.9\" y1=\"62.5\" x2=\"22.9\" y2=\"61.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.8\" y1=\"12.1\" x2=\"62.85\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.9\" y1=\"62.5\" x2=\"22.825\" y2=\"62.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.4\" y=\"11.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.3\" y=\"61.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW3\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"23\"/>\n<contactref element=\"GAINSW3\" pad=\"6\"/>\n<wire x1=\"62.8\" y1=\"40.6\" x2=\"62.8\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.9\" y1=\"38.7\" x2=\"62.8\" y2=\"40.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.8\" y1=\"38.7\" x2=\"60.9\" y2=\"38.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"50.6\" y1=\"42.9\" x2=\"54.8\" y2=\"38.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"50.2\" y1=\"42.9\" x2=\"50.6\" y2=\"42.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.5\" y1=\"42.2\" x2=\"50.2\" y2=\"42.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49\" y1=\"42.2\" x2=\"49.5\" y2=\"42.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.8\" y1=\"61.4\" x2=\"49\" y2=\"42.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"24\" y1=\"61.4\" x2=\"29.8\" y2=\"61.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.5\" y1=\"61.9\" x2=\"24\" y2=\"61.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.5\" y1=\"62.5\" x2=\"23.5\" y2=\"61.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.8\" y1=\"40.9\" x2=\"62.85\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.5\" y1=\"62.5\" x2=\"23.475\" y2=\"62.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"60.9\" y=\"38.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"24\" y=\"61.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_GSW4\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"24\"/>\n<contactref element=\"GAINSW4\" pad=\"6\"/>\n<wire x1=\"61.1\" y1=\"53.2\" x2=\"61.1\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.6\" y1=\"53.7\" x2=\"61.1\" y2=\"53.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59\" y1=\"53.7\" x2=\"60.6\" y2=\"53.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.7\" y1=\"54\" x2=\"59\" y2=\"53.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.3\" y1=\"54\" x2=\"58.7\" y2=\"54\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58\" y1=\"53.7\" x2=\"58.3\" y2=\"54\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58\" y1=\"52.6\" x2=\"58\" y2=\"53.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.4\" y1=\"51.2\" x2=\"58\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.4\" y1=\"50.8\" x2=\"59.4\" y2=\"51.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.7\" y1=\"46.1\" x2=\"59.4\" y2=\"50.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"51.6\" y1=\"46.1\" x2=\"54.7\" y2=\"46.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.6\" y1=\"56.1\" x2=\"51.6\" y2=\"46.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.6\" y1=\"56.3\" x2=\"41.6\" y2=\"56.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.6\" y1=\"58.3\" x2=\"41.6\" y2=\"56.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.8\" y1=\"58.3\" x2=\"39.6\" y2=\"58.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"61.9\" x2=\"27.8\" y2=\"58.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"62.5\" x2=\"24.2\" y2=\"61.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.1\" y1=\"52.9\" x2=\"61.15\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"62.5\" x2=\"24.125\" y2=\"62.575\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_OVSAMP1\">\n<contactref element=\"OVSAMP1\" pad=\"6\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"25\"/>\n<wire x1=\"59.6\" y1=\"31.2\" x2=\"59.9\" y2=\"31.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.1\" y1=\"32.7\" x2=\"59.6\" y2=\"31.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"58.1\" y1=\"33.4\" x2=\"58.1\" y2=\"32.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.2\" y1=\"34.3\" x2=\"58.1\" y2=\"33.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"57.2\" y1=\"41.2\" x2=\"57.2\" y2=\"34.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"51.8\" y1=\"46.6\" x2=\"57.2\" y2=\"41.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"39.8\" y1=\"58.6\" x2=\"51.8\" y2=\"46.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.1\" y1=\"58.6\" x2=\"39.8\" y2=\"58.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"61.9\" x2=\"28.1\" y2=\"58.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"62.5\" x2=\"24.8\" y2=\"61.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.9\" y1=\"31.2\" x2=\"59.9\" y2=\"31.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"24.8\" y1=\"62.5\" x2=\"24.775\" y2=\"62.575\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"57.2\" y=\"34.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"51.8\" y=\"46.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L141_SCL\">\n<contactref element=\"FPGA\" pad=\"141\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"12\"/>\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"12\"/>\n<contactref element=\"R_SCL\" pad=\"1\"/>\n<contactref element=\"DAC1\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"11\"/>\n<wire x1=\"73.8\" y1=\"28.4\" x2=\"74.2131\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.3\" y1=\"28.9\" x2=\"73.8\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"30.6\" x2=\"73.3\" y2=\"28.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"75\" y1=\"42.8\" x2=\"75\" y2=\"30.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"78.3\" y1=\"46.1\" x2=\"75\" y2=\"42.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"78.3\" y1=\"65.6\" x2=\"78.3\" y2=\"46.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"80\" y1=\"67.3\" x2=\"78.3\" y2=\"65.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"80\" y1=\"68.1\" x2=\"80\" y2=\"67.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"78.9\" y1=\"69.2\" x2=\"80\" y2=\"68.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"78.6\" y1=\"69.2\" x2=\"78.9\" y2=\"69.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"77.9\" y1=\"69.9\" x2=\"78.6\" y2=\"69.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"77.9\" y1=\"71.7\" x2=\"77.9\" y2=\"71.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"77.9\" y1=\"71.6\" x2=\"77.9\" y2=\"69.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"78.9\" y1=\"72.7\" x2=\"77.9\" y2=\"71.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"78.9\" y1=\"72.7\" x2=\"78.95\" y2=\"72.79\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11.8\" y1=\"21.9\" x2=\"11.3\" y2=\"21.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.8\" y1=\"28.9\" x2=\"11.8\" y2=\"21.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"18.8\" y1=\"33.3\" x2=\"18.8\" y2=\"28.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.7\" y1=\"37.2\" x2=\"18.8\" y2=\"33.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.7\" y1=\"47.6\" x2=\"22.7\" y2=\"37.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.1\" y1=\"50.2\" x2=\"22.7\" y2=\"47.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.1\" y1=\"68.7\" x2=\"20.1\" y2=\"50.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.6\" y1=\"69.2\" x2=\"20.1\" y2=\"68.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"69.8\" x2=\"19.6\" y2=\"69.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.3\" y1=\"21.9\" x2=\"11.21\" y2=\"21.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"69.8\" x2=\"19.575\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"77.6\" x2=\"19.6\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19.6\" y1=\"72.8\" x2=\"19.6\" y2=\"77.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"20.1\" y1=\"72.3\" x2=\"19.6\" y2=\"72.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"20.1\" y1=\"68.7\" x2=\"20.1\" y2=\"70.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"20.1\" y1=\"70.6\" x2=\"20.1\" y2=\"72.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"19.6\" y1=\"80.6\" x2=\"19.575\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.4\" y1=\"84.2\" x2=\"23\" y2=\"85.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"21.4\" y1=\"79.4\" x2=\"21.4\" y2=\"84.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"19.6\" y1=\"77.6\" x2=\"21.4\" y2=\"79.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23\" y1=\"85.8\" x2=\"23.05\" y2=\"85.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"31.3\" y1=\"71.6\" x2=\"77.9\" y2=\"71.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"30.3\" y1=\"70.6\" x2=\"31.3\" y2=\"71.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"20.1\" y1=\"70.6\" x2=\"30.3\" y2=\"70.6\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"73.3\" y=\"28.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"22.7\" y=\"37.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"20.1\" y=\"68.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"19.6\" y=\"77.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"21.4\" y=\"84.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_ACSW1\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"1\"/>\n<contactref element=\"ACR1\" pad=\"1\"/>\n<wire x1=\"26.8\" y1=\"70.3\" x2=\"26.8\" y2=\"69.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.7\" y1=\"72.2\" x2=\"26.8\" y2=\"70.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30\" y1=\"72.2\" x2=\"28.7\" y2=\"72.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.9\" y1=\"74.1\" x2=\"30\" y2=\"72.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"33.1\" y1=\"74.1\" x2=\"31.9\" y2=\"74.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"69.9\" x2=\"26.725\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"33.1\" y1=\"74.1\" x2=\"33.1\" y2=\"74.15\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"28.7\" y=\"72.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"31.9\" y=\"74.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_ACSW2\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"2\"/>\n<contactref element=\"ACR2\" pad=\"1\"/>\n<wire x1=\"26.1\" y1=\"70.5\" x2=\"26.1\" y2=\"69.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.5\" y1=\"71.9\" x2=\"26.1\" y2=\"70.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"27.7\" y1=\"71.9\" x2=\"27.5\" y2=\"71.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.3\" y1=\"71.9\" x2=\"27.7\" y2=\"71.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"28.5\" y1=\"71.7\" x2=\"28.3\" y2=\"71.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"30.2\" y1=\"71.7\" x2=\"28.5\" y2=\"71.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.8\" y1=\"73.3\" x2=\"30.2\" y2=\"71.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"34.2\" y1=\"73.3\" x2=\"31.8\" y2=\"73.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"34.5\" y1=\"73.3\" x2=\"34.2\" y2=\"73.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.3\" y1=\"74.1\" x2=\"34.5\" y2=\"73.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.1\" y1=\"69.9\" x2=\"26.075\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.3\" y1=\"74.1\" x2=\"35.3\" y2=\"74.15\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"27.7\" y=\"71.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.2\" y=\"73.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_ACSW3\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"3\"/>\n<contactref element=\"ACR3\" pad=\"1\"/>\n<wire x1=\"25.5\" y1=\"70.6\" x2=\"25.5\" y2=\"69.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.3\" y1=\"71.4\" x2=\"25.5\" y2=\"70.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"30.3\" y1=\"71.4\" x2=\"26.3\" y2=\"71.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.7\" y1=\"72.8\" x2=\"30.3\" y2=\"71.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"36.3\" y1=\"72.8\" x2=\"31.7\" y2=\"72.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"36.6\" y1=\"73.1\" x2=\"36.3\" y2=\"72.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"37.6\" y1=\"74.1\" x2=\"36.6\" y2=\"73.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.5\" y1=\"69.9\" x2=\"25.425\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.6\" y1=\"74.1\" x2=\"37.6\" y2=\"74.15\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"26.3\" y=\"71.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"36.6\" y=\"73.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_ACSW4\">\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"4\"/>\n<contactref element=\"ACR4\" pad=\"1\"/>\n<wire x1=\"24.8\" y1=\"69.2\" x2=\"24.8\" y2=\"69.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.2\" y1=\"68.8\" x2=\"24.8\" y2=\"69.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.1\" y1=\"68.8\" x2=\"25.2\" y2=\"68.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"34.5\" y1=\"68.8\" x2=\"32.1\" y2=\"68.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"36.8\" y1=\"71.1\" x2=\"34.5\" y2=\"68.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"39.8\" y1=\"74.1\" x2=\"36.8\" y2=\"71.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"69.8\" x2=\"24.775\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.8\" y1=\"74.1\" x2=\"39.8\" y2=\"74.15\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"32.1\" y=\"68.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"36.8\" y=\"71.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_SHDN1\">\n<contactref element=\"IC1\" pad=\"7\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"5\"/>\n<wire x1=\"48.9\" y1=\"16.3\" x2=\"48.5\" y2=\"16.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.4\" y1=\"16.8\" x2=\"48.9\" y2=\"16.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.4\" y1=\"19.5\" x2=\"49.4\" y2=\"16.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.6\" y1=\"19.7\" x2=\"49.4\" y2=\"19.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.6\" y1=\"40.1\" x2=\"49.6\" y2=\"19.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"37.6\" y1=\"52.1\" x2=\"49.6\" y2=\"40.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"36.6\" y1=\"52.1\" x2=\"37.6\" y2=\"52.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.7\" y1=\"59\" x2=\"36.6\" y2=\"52.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.7\" y1=\"60.7\" x2=\"29.7\" y2=\"59\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"29.7\" y1=\"63.6\" x2=\"29.7\" y2=\"60.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"69.1\" x2=\"29.7\" y2=\"63.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"69.8\" x2=\"24.2\" y2=\"69.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"16.3\" x2=\"48.5\" y2=\"16.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.2\" y1=\"69.8\" x2=\"24.125\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"49.4\" y=\"16.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"29.7\" y=\"60.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L130\">\n<contactref element=\"FPGA\" pad=\"130\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"8\"/>\n<wire x1=\"11.7\" y1=\"27.4\" x2=\"11.3\" y2=\"27.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"27.8\" x2=\"11.7\" y2=\"27.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"28.3\" x2=\"12.1\" y2=\"27.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.6\" y1=\"29.4\" x2=\"11.6\" y2=\"28.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"29.7\" x2=\"11.6\" y2=\"29.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"32.4\" x2=\"11.3\" y2=\"29.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.1\" y1=\"32.6\" x2=\"11.3\" y2=\"32.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.1\" y1=\"55.4\" x2=\"11.1\" y2=\"32.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.5\" y1=\"58\" x2=\"11.1\" y2=\"55.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"27.4\" x2=\"11.21\" y2=\"27.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"58\" x2=\"8.45\" y2=\"58\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"12.1\" y=\"27.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L127\">\n<contactref element=\"FPGA\" pad=\"127\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"9\"/>\n<wire x1=\"11.7\" y1=\"28.9\" x2=\"11.3\" y2=\"28.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"29.3\" x2=\"11.7\" y2=\"28.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11.6\" y1=\"29.8\" x2=\"12.1\" y2=\"29.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.6\" y1=\"32.5\" x2=\"11.6\" y2=\"29.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.4\" y1=\"32.7\" x2=\"11.6\" y2=\"32.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.4\" y1=\"57.6\" x2=\"11.4\" y2=\"32.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11\" y1=\"58\" x2=\"11.4\" y2=\"57.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"28.9\" x2=\"11.21\" y2=\"28.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"11\" y1=\"58\" x2=\"10.99\" y2=\"58\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"12.1\" y=\"29.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L124\">\n<contactref element=\"FPGA\" pad=\"124\"/>\n<contactref element=\"PIN_DISPLAY\" pad=\"10\"/>\n<wire x1=\"11.7\" y1=\"30.4\" x2=\"11.3\" y2=\"30.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"30.8\" x2=\"11.7\" y2=\"30.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"31.9\" x2=\"12.1\" y2=\"30.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.1\" y1=\"32.4\" x2=\"12.1\" y2=\"31.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.7\" y1=\"32.8\" x2=\"12.1\" y2=\"32.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.7\" y1=\"49.8\" x2=\"11.7\" y2=\"32.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.5\" y1=\"51.6\" x2=\"11.7\" y2=\"49.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.5\" y1=\"58\" x2=\"13.5\" y2=\"51.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"30.4\" x2=\"11.21\" y2=\"30.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"13.5\" y1=\"58\" x2=\"13.53\" y2=\"58\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"12.1\" y=\"31.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$25\" class=\"3\">\n<contactref element=\"R50-6\" pad=\"1\"/>\n<contactref element=\"R50-7\" pad=\"1\"/>\n<contactref element=\"R50-8\" pad=\"1\"/>\n<contactref element=\"R50-5\" pad=\"1\"/>\n<contactref element=\"S2\" pad=\"3\"/>\n<wire x1=\"70.6\" y1=\"22.8\" x2=\"70.6\" y2=\"21.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"70.6\" y1=\"21.7\" x2=\"70.6\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"70.6\" y1=\"20.6\" x2=\"70.55\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"70.6\" y1=\"22.8\" x2=\"70.55\" y2=\"22.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"22.8\" x2=\"75\" y2=\"21.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"21.7\" x2=\"75\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"20.6\" x2=\"74.95\" y2=\"20.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"22.8\" x2=\"74.95\" y2=\"22.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"21.7\" x2=\"72.1\" y2=\"21.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"21.7\" x2=\"70.6\" y2=\"21.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"21.7\" x2=\"74.5\" y2=\"19.3\" width=\"0.381\" layer=\"1\"/>\n<via x=\"72.1\" y=\"21.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$26\" class=\"3\">\n<contactref element=\"R50-10\" pad=\"1\"/>\n<contactref element=\"R50-11\" pad=\"1\"/>\n<contactref element=\"R50-12\" pad=\"1\"/>\n<contactref element=\"R50-9\" pad=\"1\"/>\n<contactref element=\"S3\" pad=\"3\"/>\n<wire x1=\"71.1\" y1=\"34.5\" x2=\"71.1\" y2=\"33.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"33.4\" x2=\"71.1\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"32.3\" x2=\"71.05\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"34.5\" x2=\"71.05\" y2=\"34.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.3\" y1=\"34.5\" x2=\"75.3\" y2=\"33.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.3\" y1=\"33.4\" x2=\"75.3\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.3\" y1=\"32.3\" x2=\"75.25\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.3\" y1=\"34.5\" x2=\"75.25\" y2=\"34.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.3\" y1=\"33.4\" x2=\"71.1\" y2=\"33.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"74.5\" y1=\"31.1\" x2=\"74.5\" y2=\"29.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"74.5\" y1=\"31.6\" x2=\"74.5\" y2=\"31.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.1\" y1=\"32.2\" x2=\"74.5\" y2=\"31.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"75.1\" y1=\"32.2\" x2=\"75.25\" y2=\"32.3\" width=\"0.381\" layer=\"16\"/>\n<via x=\"74.5\" y=\"31.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$28\" class=\"3\">\n<contactref element=\"R50-14\" pad=\"1\"/>\n<contactref element=\"R50-15\" pad=\"1\"/>\n<contactref element=\"R50-16\" pad=\"1\"/>\n<contactref element=\"R50-13\" pad=\"1\"/>\n<contactref element=\"S4\" pad=\"3\"/>\n<wire x1=\"64.7\" y1=\"62.7\" x2=\"64.7\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"60.6\" x2=\"64.65\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"62.7\" x2=\"64.65\" y2=\"62.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"62.7\" x2=\"68.9\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"60.6\" x2=\"68.85\" y2=\"60.6\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"62.7\" x2=\"68.85\" y2=\"62.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"65.2\" y1=\"62.8\" x2=\"64.8\" y2=\"62.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"63.8\" x2=\"65.6\" y2=\"63.2\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"65.6\" y1=\"63.2\" x2=\"65.2\" y2=\"62.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"67.7\" y1=\"63.8\" x2=\"66.2\" y2=\"63.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.7\" y1=\"62.8\" x2=\"67.7\" y2=\"63.8\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.8\" y1=\"62.8\" x2=\"64.65\" y2=\"62.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.7\" y1=\"62.8\" x2=\"68.85\" y2=\"62.7\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.5\" y1=\"60.3\" x2=\"68.5\" y2=\"59.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"65.7\" y1=\"63.1\" x2=\"68.5\" y2=\"60.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"65.7\" y1=\"63.1\" x2=\"65.6\" y2=\"63.2\" width=\"0.381\" layer=\"16\"/>\n<via x=\"65.7\" y=\"63.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N50_1\" class=\"3\">\n<contactref element=\"R50-4\" pad=\"1\"/>\n<contactref element=\"R50-3\" pad=\"1\"/>\n<contactref element=\"R50-2\" pad=\"1\"/>\n<contactref element=\"R50-1\" pad=\"1\"/>\n<contactref element=\"S1\" pad=\"3\"/>\n<wire x1=\"64.9\" y1=\"-6.4\" x2=\"64.9\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"-8.5\" x2=\"64.85\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"-6.4\" x2=\"64.85\" y2=\"-6.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"-6.4\" x2=\"69.1\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"-8.5\" x2=\"69.05\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69.1\" y1=\"-6.4\" x2=\"69.05\" y2=\"-6.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"65.4\" y1=\"-6.3\" x2=\"65\" y2=\"-6.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"66.4\" y1=\"-5.3\" x2=\"65.4\" y2=\"-6.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"67.9\" y1=\"-5.3\" x2=\"66.4\" y2=\"-5.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"-6.3\" x2=\"67.9\" y2=\"-5.3\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"65\" y1=\"-6.3\" x2=\"64.85\" y2=\"-6.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"68.9\" y1=\"-6.3\" x2=\"69.05\" y2=\"-6.4\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"70.1\" y1=\"-8.1\" x2=\"68.5\" y2=\"-9.7\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"69.2\" y1=\"-8.1\" x2=\"70.1\" y2=\"-8.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"-8.1\" x2=\"69.05\" y2=\"-8.5\" width=\"0.381\" layer=\"16\"/>\n<via x=\"70.1\" y=\"-8.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$23\">\n<contactref element=\"U340G\" pad=\"7\"/>\n<contactref element=\"Y1\" pad=\"1\"/>\n<contactref element=\"C_OSC1\" pad=\"1\"/>\n<wire x1=\"0.1\" y1=\"78.5\" x2=\"-3.15\" y2=\"78.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.4\" y1=\"77.2\" x2=\"0.1\" y2=\"78.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.4\" y1=\"77.2\" x2=\"1.46\" y2=\"77.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"4.8\" y1=\"73.9\" x2=\"4.8\" y2=\"72.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.5\" y1=\"77.2\" x2=\"4.8\" y2=\"73.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"4.8\" y1=\"72.7\" x2=\"4.875\" y2=\"72.695\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.5\" y1=\"77.2\" x2=\"1.46\" y2=\"77.2\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$31\">\n<contactref element=\"C_OSC2\" pad=\"1\"/>\n<contactref element=\"Y1\" pad=\"2\"/>\n<contactref element=\"U340G\" pad=\"8\"/>\n<wire x1=\"7.9\" y1=\"78.5\" x2=\"10.95\" y2=\"78.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"6.6\" y1=\"77.2\" x2=\"7.9\" y2=\"78.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"6.6\" y1=\"77.2\" x2=\"6.54\" y2=\"77.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"6.2\" y1=\"76.9\" x2=\"6.2\" y2=\"72.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"6.5\" y1=\"77.2\" x2=\"6.2\" y2=\"76.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"6.2\" y1=\"72.7\" x2=\"6.145\" y2=\"72.695\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"6.5\" y1=\"77.2\" x2=\"6.54\" y2=\"77.2\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"DMINUS\">\n<contactref element=\"USB1\" pad=\"2\"/>\n<contactref element=\"U340G\" pad=\"6\"/>\n<wire x1=\"3.7\" y1=\"72.6\" x2=\"2\" y2=\"70.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"3.7\" y1=\"72.6\" x2=\"3.605\" y2=\"72.695\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-6.9\" y1=\"71\" x2=\"-7.8\" y2=\"71\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-5.3\" y1=\"69.4\" x2=\"-6.9\" y2=\"71\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-1.6\" y1=\"69.4\" x2=\"-5.3\" y2=\"69.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-0.1\" y1=\"70.9\" x2=\"-1.6\" y2=\"69.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2\" y1=\"70.9\" x2=\"-0.1\" y2=\"70.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-7.8\" y1=\"71\" x2=\"-7.86\" y2=\"71.05\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"DPLUS\">\n<contactref element=\"USB1\" pad=\"3\"/>\n<contactref element=\"U340G\" pad=\"5\"/>\n<wire x1=\"-5.2\" y1=\"71.7\" x2=\"-7.86\" y2=\"71.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-3.2\" y1=\"73.7\" x2=\"-5.2\" y2=\"71.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"1.5\" y1=\"73.7\" x2=\"-3.2\" y2=\"73.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.3\" y1=\"72.9\" x2=\"1.5\" y2=\"73.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.3\" y1=\"72.7\" x2=\"2.3\" y2=\"72.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"2.3\" y1=\"72.7\" x2=\"2.335\" y2=\"72.695\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"SLD\">\n<contactref element=\"USB1\" pad=\"S1\"/>\n<contactref element=\"USB1\" pad=\"S2\"/>\n<contactref element=\"USB1\" pad=\"S3\"/>\n<contactref element=\"USB1\" pad=\"S4\"/>\n<wire x1=\"-10.4\" y1=\"68.5\" x2=\"-7.86\" y2=\"68.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.5\" y1=\"68.4\" x2=\"-10.4\" y2=\"68.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.5\" y1=\"68.4\" x2=\"-10.535\" y2=\"68.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.4\" y1=\"74.9\" x2=\"-7.86\" y2=\"74.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.5\" y1=\"75\" x2=\"-10.4\" y2=\"74.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.5\" y1=\"75\" x2=\"-10.535\" y2=\"75\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.5\" y1=\"75\" x2=\"-10.5\" y2=\"68.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.5\" y1=\"68.4\" x2=\"-10.535\" y2=\"68.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-10.5\" y1=\"75\" x2=\"-10.535\" y2=\"75\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"L120_SYNC\">\n<contactref element=\"IC1\" pad=\"14\"/>\n<contactref element=\"FPGA\" pad=\"120\"/>\n<contactref element=\"IC2\" pad=\"14\"/>\n<wire x1=\"47.25\" y1=\"19.5\" x2=\"47.1032\" y2=\"19.6468\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.1032\" y1=\"19.6468\" x2=\"47.1032\" y2=\"19.98416875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.1032\" y1=\"19.98416875\" x2=\"44.08736875\" y2=\"23\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"44.08736875\" y1=\"23\" x2=\"36.8\" y2=\"23\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.25\" y1=\"45.5\" x2=\"47.1032\" y2=\"45.6468\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.69263125\" y1=\"50\" x2=\"21\" y2=\"50\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.1032\" y1=\"45.6468\" x2=\"47.1032\" y2=\"48.2919375\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.1032\" y1=\"48.2919375\" x2=\"41.5625375\" y2=\"53.8326\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.5625375\" y1=\"53.8326\" x2=\"32.52523125\" y2=\"53.8326\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"32.52523125\" y1=\"53.8326\" x2=\"28.69263125\" y2=\"50\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.4\" y1=\"32.4\" x2=\"11.3\" y2=\"32.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"39\" x2=\"12.4\" y2=\"32.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"19\" y1=\"48\" x2=\"19\" y2=\"39\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"21\" y1=\"50\" x2=\"19\" y2=\"48\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11.3\" y1=\"32.4\" x2=\"11.21\" y2=\"32.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.6\" y1=\"23\" x2=\"36.8\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"35.2\" y1=\"24.4\" x2=\"36.6\" y2=\"23\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"35.2\" y1=\"24.5\" x2=\"35.2\" y2=\"24.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31.7\" y1=\"28\" x2=\"35.2\" y2=\"24.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"31\" y1=\"28\" x2=\"31.7\" y2=\"28\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"20.6\" y1=\"38.4\" x2=\"31\" y2=\"28\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19.5\" y1=\"38.4\" x2=\"20.6\" y2=\"38.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19\" y1=\"38.9\" x2=\"19.5\" y2=\"38.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"19\" y1=\"39\" x2=\"19\" y2=\"38.9\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"19\" y=\"39\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"21\" y=\"50\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"36.8\" y=\"23\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$2\">\n<contactref element=\"RGAIN1_1\" pad=\"1\"/>\n<contactref element=\"RGAIN3_1\" pad=\"2\"/>\n<wire x1=\"71.1\" y1=\"4\" x2=\"69\" y2=\"4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"4\" x2=\"69\" y2=\"3.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"4\" x2=\"71.1\" y2=\"3.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$3\">\n<contactref element=\"RGAIN2_1\" pad=\"1\"/>\n<contactref element=\"RGAIN4_1\" pad=\"2\"/>\n<wire x1=\"66.8\" y1=\"4\" x2=\"64.7\" y2=\"4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"4\" x2=\"64.7\" y2=\"3.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"4\" x2=\"66.8\" y2=\"3.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN1\">\n<contactref element=\"RGAIN3_1\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"3\"/>\n<contactref element=\"CGAIN1_1\" pad=\"2\"/>\n<contactref element=\"CL1\" pad=\"-\"/>\n<wire x1=\"59.1\" y1=\"1.8\" x2=\"59.1\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.7\" y1=\"0.2\" x2=\"59.1\" y2=\"1.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64\" y1=\"0.2\" x2=\"60.7\" y2=\"0.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.4\" y1=\"-1.2\" x2=\"65.15\" y2=\"-0.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.15\" y1=\"-0.95\" x2=\"64\" y2=\"0.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"-1.2\" x2=\"65.4\" y2=\"-1.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.1\" y1=\"2\" x2=\"59.05\" y2=\"2.09\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"-1.2\" x2=\"66.4\" y2=\"-1.28771875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66\" y1=\"-0.1\" x2=\"66\" y2=\"0.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.2\" y1=\"-0.9\" x2=\"66\" y2=\"-0.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.2\" y1=\"-0.9\" x2=\"65.15\" y2=\"-0.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71.1\" y1=\"6.9\" x2=\"71.1\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"5\" x2=\"71.1\" y2=\"6.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"65.2\" y1=\"-0.9\" x2=\"71.1\" y2=\"5\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"65.2\" y=\"-0.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"71.1\" y=\"6.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN2\">\n<contactref element=\"RGAIN4_1\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"1\"/>\n<contactref element=\"CH1\" pad=\"-\"/>\n<wire x1=\"62.6\" y1=\"2\" x2=\"62.4\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.4\" y1=\"2\" x2=\"61\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65\" y1=\"-0.4\" x2=\"62.6\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.2\" y1=\"-0.4\" x2=\"65\" y2=\"-0.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"-1.2\" x2=\"69.2\" y2=\"-0.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"2\" x2=\"60.95\" y2=\"2.09\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70\" y1=\"-1.2\" x2=\"70\" y2=\"-1.28771875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"5.8\" x2=\"66.8\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.5\" y1=\"4.9\" x2=\"66.4\" y2=\"5.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"63.9\" y1=\"4.9\" x2=\"65.5\" y2=\"4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.4\" y1=\"3.4\" x2=\"63.9\" y2=\"4.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.4\" y1=\"2\" x2=\"62.4\" y2=\"3.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"5.8\" x2=\"66.8\" y2=\"5.85\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"62.4\" y=\"3.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$4\">\n<contactref element=\"RGAIN1_2\" pad=\"1\"/>\n<contactref element=\"RGAIN3_2\" pad=\"2\"/>\n<wire x1=\"70.8\" y1=\"8.1\" x2=\"71.1\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"9.9\" x2=\"70.8\" y2=\"8.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"8.1\" x2=\"71.1\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69\" y1=\"9.9\" x2=\"69\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$5\">\n<contactref element=\"RGAIN2_2\" pad=\"1\"/>\n<contactref element=\"RGAIN4_2\" pad=\"2\"/>\n<wire x1=\"65\" y1=\"9.9\" x2=\"64.7\" y2=\"9.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"8.1\" x2=\"65\" y2=\"9.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"9.9\" x2=\"64.7\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"8.1\" x2=\"66.8\" y2=\"8.05\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN3\">\n<contactref element=\"RGAIN3_2\" pad=\"1\"/>\n<contactref element=\"CGAIN1_2\" pad=\"2\"/>\n<contactref element=\"GAINSW2\" pad=\"3\"/>\n<contactref element=\"CL2\" pad=\"-\"/>\n<wire x1=\"61\" y1=\"14\" x2=\"61\" y2=\"14.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"13.1\" x2=\"61\" y2=\"14\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"13.1\" x2=\"61.9\" y2=\"13.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"11.8\" x2=\"64.9\" y2=\"13.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"11.8\" x2=\"66.3\" y2=\"11.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"11.8\" x2=\"66.2\" y2=\"11.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"14.6\" x2=\"60.95\" y2=\"14.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"11.8\" x2=\"66.4\" y2=\"11.71228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.3\" y1=\"13\" x2=\"67.1\" y2=\"13.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"11.8\" x2=\"66.3\" y2=\"13\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"13.8\" x2=\"67.1\" y2=\"13.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"11.8\" x2=\"66.4\" y2=\"11.71228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72.5\" y1=\"11.4\" x2=\"71.1\" y2=\"10\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.5\" y1=\"13\" x2=\"72.5\" y2=\"11.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"72.1\" y1=\"13.4\" x2=\"72.5\" y2=\"13\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"13.4\" x2=\"72.1\" y2=\"13.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"13.7\" x2=\"67.4\" y2=\"13.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71.1\" y1=\"10\" x2=\"71.1\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"13.7\" x2=\"67.1\" y2=\"13.85\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"66.3\" y=\"13\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN4\">\n<contactref element=\"RGAIN4_2\" pad=\"1\"/>\n<contactref element=\"GAINSW2\" pad=\"1\"/>\n<contactref element=\"CH2\" pad=\"-\"/>\n<wire x1=\"62.9\" y1=\"13.6\" x2=\"62.9\" y2=\"14.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"12.8\" x2=\"62.9\" y2=\"13.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.8\" y1=\"10.9\" x2=\"62.9\" y2=\"12.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.9\" y1=\"10.9\" x2=\"64.8\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.8\" y1=\"10\" x2=\"65.9\" y2=\"10.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.9\" y1=\"14.6\" x2=\"62.85\" y2=\"14.69\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.8\" y1=\"10\" x2=\"66.8\" y2=\"9.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.4\" y1=\"11.7\" x2=\"70\" y2=\"11.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.9\" y1=\"11.2\" x2=\"69.4\" y2=\"11.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.6\" y1=\"12.5\" x2=\"68.9\" y2=\"11.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"64\" y1=\"12.5\" x2=\"67.6\" y2=\"12.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"62.9\" y1=\"13.6\" x2=\"64\" y2=\"12.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"70\" y1=\"11.7\" x2=\"70\" y2=\"11.71228125\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.9\" y=\"13.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"68.9\" y=\"11.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$6\">\n<contactref element=\"RGAIN1_3\" pad=\"1\"/>\n<contactref element=\"RGAIN3_3\" pad=\"2\"/>\n<wire x1=\"70.5\" y1=\"45.5\" x2=\"68.4\" y2=\"45.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"45.5\" x2=\"68.4\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"45.5\" x2=\"70.5\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$7\">\n<contactref element=\"RGAIN2_3\" pad=\"1\"/>\n<contactref element=\"RGAIN4_3\" pad=\"2\"/>\n<wire x1=\"66.2\" y1=\"45.5\" x2=\"64\" y2=\"45.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"45.5\" x2=\"64\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"45.5\" x2=\"66.2\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN5\">\n<contactref element=\"RGAIN3_3\" pad=\"1\"/>\n<contactref element=\"CGAIN1_3\" pad=\"2\"/>\n<contactref element=\"GAINSW3\" pad=\"3\"/>\n<contactref element=\"CL3\" pad=\"-\"/>\n<wire x1=\"61\" y1=\"43.2\" x2=\"61\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.3\" y1=\"41.9\" x2=\"61\" y2=\"43.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.7\" y1=\"41.9\" x2=\"62.3\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"40.2\" x2=\"65.75\" y2=\"40.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.75\" y1=\"40.85\" x2=\"64.7\" y2=\"41.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61\" y1=\"43.4\" x2=\"60.95\" y2=\"43.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"40.2\" x2=\"66.4\" y2=\"40.11228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"41.1\" x2=\"67.1\" y2=\"41.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66\" y1=\"40.9\" x2=\"66.2\" y2=\"41.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"40.9\" x2=\"66\" y2=\"40.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"41.1\" x2=\"67.1\" y2=\"41.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.8\" y1=\"40.9\" x2=\"65.75\" y2=\"40.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.6\" y1=\"46.4\" x2=\"70.5\" y2=\"47.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.5\" y1=\"46.4\" x2=\"69.6\" y2=\"46.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.5\" y1=\"44.4\" x2=\"69.5\" y2=\"46.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"66\" y1=\"40.9\" x2=\"69.5\" y2=\"44.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"65.8\" y1=\"40.9\" x2=\"66\" y2=\"40.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"70.5\" y1=\"47.3\" x2=\"70.5\" y2=\"47.35\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65.8\" y=\"40.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"69.5\" y=\"46.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN6\">\n<contactref element=\"RGAIN4_3\" pad=\"1\"/>\n<contactref element=\"GAINSW3\" pad=\"1\"/>\n<contactref element=\"CH3\" pad=\"-\"/>\n<wire x1=\"64\" y1=\"43.4\" x2=\"62.9\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.6\" y1=\"40.8\" x2=\"65.9\" y2=\"41.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"41.5\" x2=\"64\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.5\" y1=\"40.8\" x2=\"66.6\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.1\" y1=\"40.2\" x2=\"69.5\" y2=\"40.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.9\" y1=\"43.4\" x2=\"62.85\" y2=\"43.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.1\" y1=\"40.2\" x2=\"70.1\" y2=\"40.11228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"48.4\" x2=\"66.2\" y2=\"47.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"42.6\" x2=\"66.2\" y2=\"48.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"66.4\" y1=\"42.4\" x2=\"66.2\" y2=\"42.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"66.4\" y1=\"42\" x2=\"66.4\" y2=\"42.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"65.9\" y1=\"41.5\" x2=\"66.4\" y2=\"42\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"66.2\" y=\"48.4\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"65.9\" y=\"41.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$8\">\n<contactref element=\"RGAIN1_4\" pad=\"1\"/>\n<contactref element=\"RGAIN3_4\" pad=\"2\"/>\n<wire x1=\"70.5\" y1=\"51.6\" x2=\"68.4\" y2=\"51.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"51.6\" x2=\"68.4\" y2=\"51.55\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.5\" y1=\"51.6\" x2=\"70.5\" y2=\"51.55\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$9\">\n<contactref element=\"RGAIN2_4\" pad=\"1\"/>\n<contactref element=\"RGAIN4_4\" pad=\"2\"/>\n<wire x1=\"66.2\" y1=\"51.6\" x2=\"64.1\" y2=\"51.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.1\" y1=\"51.6\" x2=\"64.1\" y2=\"51.55\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"51.6\" x2=\"66.2\" y2=\"51.55\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"CGAIN7\">\n<contactref element=\"RGAIN3_4\" pad=\"1\"/>\n<contactref element=\"CGAIN1_4\" pad=\"2\"/>\n<contactref element=\"GAINSW4\" pad=\"3\"/>\n<contactref element=\"CL4\" pad=\"-\"/>\n<wire x1=\"59.3\" y1=\"55.2\" x2=\"59.3\" y2=\"55.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.5\" y1=\"54\" x2=\"59.3\" y2=\"55.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.7\" y1=\"54\" x2=\"60.5\" y2=\"54\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.7\" y1=\"53\" x2=\"63.7\" y2=\"54\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"53\" x2=\"65.3\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"53\" x2=\"64.7\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.3\" y1=\"55.4\" x2=\"59.25\" y2=\"55.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"53\" x2=\"65.9\" y2=\"52.91228125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.3\" y1=\"54.5\" x2=\"66.1\" y2=\"55.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"65.3\" y1=\"53\" x2=\"65.3\" y2=\"54.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.1\" y1=\"55.3\" x2=\"66.1\" y2=\"55.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.3\" y1=\"50.6\" x2=\"68.4\" y2=\"49.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.4\" y1=\"50.6\" x2=\"69.3\" y2=\"50.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.2\" y1=\"50.6\" x2=\"69.4\" y2=\"50.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"65.3\" y1=\"54.5\" x2=\"69.2\" y2=\"50.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"68.4\" y1=\"49.7\" x2=\"68.4\" y2=\"49.65\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"65.3\" y=\"54.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"69.4\" y=\"50.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"CGAIN8\">\n<contactref element=\"RGAIN4_4\" pad=\"1\"/>\n<contactref element=\"GAINSW4\" pad=\"1\"/>\n<contactref element=\"CH4\" pad=\"-\"/>\n<wire x1=\"61.5\" y1=\"55.4\" x2=\"61.2\" y2=\"55.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.6\" y1=\"54.3\" x2=\"61.5\" y2=\"55.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.1\" y1=\"54.3\" x2=\"62.6\" y2=\"54.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.8\" y1=\"53.6\" x2=\"64.1\" y2=\"54.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.9\" y1=\"52.5\" x2=\"64.8\" y2=\"53.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67\" y1=\"52.5\" x2=\"66.9\" y2=\"52.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.9\" y1=\"52.5\" x2=\"65.9\" y2=\"52.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.2\" y1=\"52.3\" x2=\"67\" y2=\"52.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.2\" y1=\"50.7\" x2=\"67.2\" y2=\"52.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.2\" y1=\"49.7\" x2=\"67.2\" y2=\"50.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.2\" y1=\"55.4\" x2=\"61.15\" y2=\"55.49\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.2\" y1=\"49.7\" x2=\"66.2\" y2=\"49.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.2\" y1=\"53\" x2=\"69.6\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.1\" y1=\"53.1\" x2=\"68.2\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.5\" y1=\"53.1\" x2=\"68.1\" y2=\"53.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.9\" y1=\"52.5\" x2=\"67.5\" y2=\"53.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"69.6\" y1=\"53\" x2=\"69.6\" y2=\"52.91228125\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"64.8\" y=\"53.6\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"67.5\" y=\"53.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_122\">\n<contactref element=\"FPGA\" pad=\"122\"/>\n<contactref element=\"PIN_IO_1\" pad=\"10\"/>\n<wire x1=\"-1.3\" y1=\"31.3\" x2=\"11.2\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.2\" y1=\"33.2\" x2=\"-1.3\" y2=\"31.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.2\" y1=\"67.8\" x2=\"-3.2\" y2=\"33.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.5\" y1=\"68.1\" x2=\"-3.2\" y2=\"67.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-3.5\" y1=\"77.6\" x2=\"-3.5\" y2=\"68.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-9.3\" y1=\"83.4\" x2=\"-3.5\" y2=\"77.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.2\" y1=\"31.3\" x2=\"11.21\" y2=\"31.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-9.3\" y1=\"83.4\" x2=\"-9.33\" y2=\"83.4\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"-3.5\" y=\"68.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"L121\">\n<contactref element=\"FPGA\" pad=\"121\"/>\n<contactref element=\"PIN_AIN_IO2_PWRGND\" pad=\"4\"/>\n<wire x1=\"-1.1\" y1=\"31.8\" x2=\"11.2\" y2=\"31.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5\" y1=\"27.9\" x2=\"-1.1\" y2=\"31.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-6.5\" y1=\"27.9\" x2=\"-5\" y2=\"27.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.5\" y1=\"26.9\" x2=\"-6.5\" y2=\"27.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11.2\" y1=\"31.8\" x2=\"11.21\" y2=\"31.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-7.5\" y1=\"26.9\" x2=\"-7.59\" y2=\"26.85\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"-1.1\" y=\"31.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_119\">\n<contactref element=\"FPGA\" pad=\"119\"/>\n<contactref element=\"PIN_IO_1\" pad=\"8\"/>\n<wire x1=\"10.7\" y1=\"32.9\" x2=\"11.2\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.8\" y1=\"46.4\" x2=\"10.7\" y2=\"32.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.8\" y1=\"68.8\" x2=\"-2.8\" y2=\"46.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-2.8\" y1=\"82\" x2=\"-2.8\" y2=\"68.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-4.2\" y1=\"83.4\" x2=\"-2.8\" y2=\"82\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.2\" y1=\"32.9\" x2=\"11.21\" y2=\"32.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.2\" y1=\"83.4\" x2=\"-4.25\" y2=\"83.4\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"-2.8\" y=\"68.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_118\">\n<contactref element=\"FPGA\" pad=\"118\"/>\n<contactref element=\"PIN_IO_1\" pad=\"7\"/>\n<wire x1=\"10.7\" y1=\"33.4\" x2=\"11.2\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.4\" y1=\"36.7\" x2=\"10.7\" y2=\"33.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.4\" y1=\"72.8\" x2=\"7.4\" y2=\"36.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"7.4\" y1=\"74.3\" x2=\"7.4\" y2=\"72.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-1.7\" y1=\"83.4\" x2=\"7.4\" y2=\"74.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11.2\" y1=\"33.4\" x2=\"11.21\" y2=\"33.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-1.7\" y1=\"83.4\" x2=\"-1.71\" y2=\"83.4\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"7.4\" y=\"72.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_114\">\n<contactref element=\"FPGA\" pad=\"114\"/>\n<contactref element=\"PIN_IO_1\" pad=\"6\"/>\n<wire x1=\"12.2\" y1=\"35.3\" x2=\"11.3\" y2=\"35.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.4\" y1=\"35.3\" x2=\"12.2\" y2=\"35.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-5.1\" y1=\"36\" x2=\"-4.4\" y2=\"35.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.9\" y1=\"36\" x2=\"-5.1\" y2=\"36\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8.9\" y1=\"37\" x2=\"-7.9\" y2=\"36\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8.9\" y1=\"57.1\" x2=\"-8.9\" y2=\"37\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.7\" y1=\"58.3\" x2=\"-8.9\" y2=\"57.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.7\" y1=\"78.7\" x2=\"-7.7\" y2=\"58.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-2.1\" y1=\"84.3\" x2=\"-7.7\" y2=\"78.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-0.1\" y1=\"84.3\" x2=\"-2.1\" y2=\"84.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"0.8\" y1=\"83.4\" x2=\"-0.1\" y2=\"84.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11.3\" y1=\"35.3\" x2=\"11.21\" y2=\"35.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"0.8\" y1=\"83.4\" x2=\"0.83\" y2=\"83.4\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"12.2\" y=\"35.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_111\">\n<contactref element=\"FPGA\" pad=\"111\"/>\n<contactref element=\"PIN_IO_1\" pad=\"4\"/>\n<wire x1=\"13.9\" y1=\"36.8\" x2=\"11.3\" y2=\"36.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.3\" y1=\"37.2\" x2=\"13.9\" y2=\"36.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"14.3\" y1=\"41\" x2=\"14.3\" y2=\"37.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.8\" y1=\"42.5\" x2=\"14.3\" y2=\"41\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"16.2\" y1=\"42.9\" x2=\"15.8\" y2=\"42.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"16.2\" y1=\"43.9\" x2=\"16.2\" y2=\"42.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.5\" y1=\"46.6\" x2=\"16.2\" y2=\"43.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.5\" y1=\"50\" x2=\"13.5\" y2=\"46.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.7\" y1=\"51.2\" x2=\"13.5\" y2=\"50\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.7\" y1=\"78.4\" x2=\"14.7\" y2=\"51.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.8\" y1=\"84.3\" x2=\"14.7\" y2=\"78.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.9\" y1=\"84.3\" x2=\"8.8\" y2=\"84.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6\" y1=\"83.4\" x2=\"6.9\" y2=\"84.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"36.8\" x2=\"11.21\" y2=\"36.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"6\" y1=\"83.4\" x2=\"5.91\" y2=\"83.4\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"14.3\" y=\"37.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"15.8\" y=\"42.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_110\">\n<contactref element=\"FPGA\" pad=\"110\"/>\n<contactref element=\"PIN_IO_1\" pad=\"3\"/>\n<wire x1=\"12.2\" y1=\"37.3\" x2=\"11.3\" y2=\"37.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.2\" y1=\"39.6\" x2=\"12.2\" y2=\"37.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.7\" y1=\"43.1\" x2=\"12.2\" y2=\"39.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"15.8\" y1=\"43.2\" x2=\"15.7\" y2=\"43.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.8\" y1=\"43.7\" x2=\"15.8\" y2=\"43.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.1\" y1=\"46.4\" x2=\"15.8\" y2=\"43.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"13.1\" y1=\"50\" x2=\"13.1\" y2=\"46.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.4\" y1=\"51.3\" x2=\"13.1\" y2=\"50\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.4\" y1=\"77.5\" x2=\"14.4\" y2=\"51.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"8.5\" y1=\"83.4\" x2=\"14.4\" y2=\"77.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"11.3\" y1=\"37.3\" x2=\"11.21\" y2=\"37.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"8.5\" y1=\"83.4\" x2=\"8.45\" y2=\"83.4\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"12.2\" y=\"37.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"15.7\" y=\"43.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_113\">\n<contactref element=\"FPGA\" pad=\"113\"/>\n<contactref element=\"PIN_IO_1\" pad=\"5\"/>\n<wire x1=\"12.4\" y1=\"35.8\" x2=\"11.3\" y2=\"35.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.7\" y1=\"35.5\" x2=\"12.4\" y2=\"35.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.7\" y1=\"34.2\" x2=\"12.7\" y2=\"35.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.2\" y1=\"33.7\" x2=\"12.7\" y2=\"34.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-4.4\" y1=\"33.7\" x2=\"12.2\" y2=\"33.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-4.6\" y1=\"33.5\" x2=\"-4.4\" y2=\"33.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8\" y1=\"33.5\" x2=\"-4.6\" y2=\"33.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-11.5\" y1=\"37\" x2=\"-8\" y2=\"33.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-11.5\" y1=\"79.9\" x2=\"-11.5\" y2=\"37\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8.3\" y1=\"83.1\" x2=\"-11.5\" y2=\"79.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-8.3\" y1=\"83.6\" x2=\"-8.3\" y2=\"83.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"-7.3\" y1=\"84.6\" x2=\"-8.3\" y2=\"83.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"2.1\" y1=\"84.6\" x2=\"-7.3\" y2=\"84.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"3.3\" y1=\"83.4\" x2=\"2.1\" y2=\"84.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"11.3\" y1=\"35.8\" x2=\"11.21\" y2=\"35.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"3.3\" y1=\"83.4\" x2=\"3.37\" y2=\"83.4\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"12.2\" y=\"33.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$10\">\n<contactref element=\"C_AC1\" pad=\"1\"/>\n<contactref element=\"K1\" pad=\"4\"/>\n<contactref element=\"RIN5\" pad=\"1\"/>\n<contactref element=\"S5\" pad=\"2\"/>\n<wire x1=\"74.2\" y1=\"2.5\" x2=\"74.2\" y2=\"3.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"3.4\" x2=\"74.2\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"2\" x2=\"74.2\" y2=\"2.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"4.3\" x2=\"74.25\" y2=\"4.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"2\" x2=\"73.65\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"4.6\" x2=\"73\" y2=\"5.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.2\" y1=\"3.4\" x2=\"73\" y2=\"4.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"55.3\" y1=\"-9.7\" x2=\"55\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.8\" y1=\"-11.2\" x2=\"55.3\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.2\" y1=\"-11.2\" x2=\"56.8\" y2=\"-11.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.4\" y1=\"-6\" x2=\"69.2\" y2=\"-11.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.4\" y1=\"1.4\" x2=\"74.4\" y2=\"-6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"2\" x2=\"74.4\" y2=\"1.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"2\" x2=\"73.65\" y2=\"2\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"74.2\" y=\"3.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ2\">\n<contactref element=\"K2\" pad=\"3\"/>\n<contactref element=\"C_AC2\" pad=\"2\"/>\n<contactref element=\"J2\" pad=\"SIGNAL\"/>\n<contactref element=\"S2\" pad=\"2\"/>\n<wire x1=\"75.8\" y1=\"10.2\" x2=\"75.8\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"11.4\" x2=\"75.05\" y2=\"10.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.05\" y1=\"10.95\" x2=\"75.8\" y2=\"10.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"15.7\" x2=\"74.6\" y2=\"11.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"16.7\" x2=\"74.6\" y2=\"15.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.8\" y1=\"10\" x2=\"75.85\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"16.7\" x2=\"73.54\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"8.9\" x2=\"73\" y2=\"7.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"10.9\" x2=\"73\" y2=\"8.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75\" y1=\"10.9\" x2=\"75.05\" y2=\"10.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"18.2\" x2=\"72\" y2=\"19.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"16.7\" x2=\"72\" y2=\"18.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"16.7\" x2=\"73.54\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"75\" y=\"10.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$15\">\n<contactref element=\"C_AC2\" pad=\"1\"/>\n<contactref element=\"K2\" pad=\"4\"/>\n<contactref element=\"RIN6\" pad=\"1\"/>\n<contactref element=\"S6\" pad=\"2\"/>\n<wire x1=\"74.1\" y1=\"11.8\" x2=\"74.1\" y2=\"10.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.1\" y1=\"10.9\" x2=\"74.1\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"12.2\" x2=\"74.1\" y2=\"11.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.1\" y1=\"10\" x2=\"74.15\" y2=\"10\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"12.2\" x2=\"73.65\" y2=\"12.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"10.3\" x2=\"73\" y2=\"10.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.1\" y1=\"10.9\" x2=\"73.5\" y2=\"10.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73\" y1=\"10.3\" x2=\"73\" y2=\"10.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.6\" y1=\"10.9\" x2=\"74.1\" y2=\"10.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"63.6\" y1=\"20.9\" x2=\"73.6\" y2=\"10.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"62\" y1=\"19.3\" x2=\"63.6\" y2=\"20.9\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"74.1\" y=\"10.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.6\" y=\"20.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ3\">\n<contactref element=\"K3\" pad=\"3\"/>\n<contactref element=\"C_AC3\" pad=\"2\"/>\n<contactref element=\"J3\" pad=\"SIGNAL\"/>\n<contactref element=\"S3\" pad=\"2\"/>\n<wire x1=\"75.9\" y1=\"45.1\" x2=\"75.9\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"43.8\" x2=\"74.75\" y2=\"43.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.75\" y1=\"43.95\" x2=\"75.9\" y2=\"45.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.6\" y1=\"38.7\" x2=\"74.6\" y2=\"43.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"37.7\" x2=\"74.6\" y2=\"38.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.9\" y1=\"45.3\" x2=\"75.95\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"37.7\" x2=\"73.54\" y2=\"37.67\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74\" y1=\"44.7\" x2=\"73\" y2=\"44.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.7\" y1=\"44\" x2=\"74\" y2=\"44.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73\" y1=\"44.7\" x2=\"73\" y2=\"44.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.7\" y1=\"44\" x2=\"74.75\" y2=\"43.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"32.5\" x2=\"72\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"34\" x2=\"72\" y2=\"32.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"37.6\" x2=\"73.5\" y2=\"34\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.5\" y1=\"37.6\" x2=\"73.54\" y2=\"37.67\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"74.7\" y=\"44\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INJ4\">\n<contactref element=\"K4\" pad=\"3\"/>\n<contactref element=\"C_AC4\" pad=\"2\"/>\n<contactref element=\"J4\" pad=\"SIGNAL\"/>\n<contactref element=\"S4\" pad=\"2\"/>\n<wire x1=\"74.7\" y1=\"52.6\" x2=\"75.2\" y2=\"52.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.2\" y1=\"52.1\" x2=\"76\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.7\" y1=\"57.5\" x2=\"74.7\" y2=\"52.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"58.6\" x2=\"74.35\" y2=\"57.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.35\" y1=\"57.85\" x2=\"74.7\" y2=\"57.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76\" y1=\"51.3\" x2=\"76.05\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.6\" y1=\"58.6\" x2=\"73.54\" y2=\"58.64\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"75.2\" y1=\"52\" x2=\"73\" y2=\"49.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75.2\" y1=\"52.1\" x2=\"75.2\" y2=\"52\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73\" y1=\"49.8\" x2=\"73\" y2=\"49.73\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"59.3\" x2=\"66\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.8\" y1=\"57.8\" x2=\"66.3\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"57.8\" x2=\"67.8\" y2=\"57.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"57.8\" x2=\"74.35\" y2=\"57.85\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"75.2\" y=\"52.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$11\">\n<contactref element=\"K1\" pad=\"1\"/>\n<contactref element=\"ACR1\" pad=\"2\"/>\n<wire x1=\"75.3\" y1=\"9\" x2=\"79\" y2=\"5.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73.7\" y1=\"10.6\" x2=\"75.3\" y2=\"9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"73.2\" y1=\"10.6\" x2=\"73.7\" y2=\"10.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"57.7\" y1=\"26.1\" x2=\"73.2\" y2=\"10.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"57.7\" y1=\"51.3\" x2=\"57.7\" y2=\"26.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"57.1\" y1=\"51.9\" x2=\"57.7\" y2=\"51.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"34.1\" y1=\"74.9\" x2=\"57.1\" y2=\"51.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"34.1\" y1=\"75.1\" x2=\"34.1\" y2=\"74.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"33.1\" y1=\"76.1\" x2=\"34.1\" y2=\"75.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"5.3\" x2=\"79\" y2=\"5.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"33.1\" y1=\"76.1\" x2=\"33.1\" y2=\"76.05\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"75.3\" y=\"9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"57.1\" y=\"51.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"34.1\" y=\"75.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$21\">\n<contactref element=\"K2\" pad=\"1\"/>\n<contactref element=\"ACR2\" pad=\"2\"/>\n<wire x1=\"77.4\" y1=\"11.9\" x2=\"79\" y2=\"10.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"77.3\" y1=\"12\" x2=\"77.4\" y2=\"11.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"77.3\" y1=\"48.7\" x2=\"77.3\" y2=\"12\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79.3\" y1=\"50.7\" x2=\"77.3\" y2=\"48.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79.3\" y1=\"56.6\" x2=\"79.3\" y2=\"50.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.2\" y1=\"67.7\" x2=\"79.3\" y2=\"56.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.4\" y1=\"67.7\" x2=\"68.2\" y2=\"67.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.6\" y1=\"75.5\" x2=\"58.4\" y2=\"67.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"42.1\" y1=\"75.5\" x2=\"50.6\" y2=\"75.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.6\" y1=\"77\" x2=\"42.1\" y2=\"75.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.2\" y1=\"77\" x2=\"40.6\" y2=\"77\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"35.3\" y1=\"76.1\" x2=\"36.2\" y2=\"77\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"10.3\" x2=\"79\" y2=\"10.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"35.3\" y1=\"76.1\" x2=\"35.3\" y2=\"76.05\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"77.4\" y=\"11.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$32\">\n<contactref element=\"K3\" pad=\"1\"/>\n<contactref element=\"ACR3\" pad=\"2\"/>\n<wire x1=\"77.1\" y1=\"49.2\" x2=\"79\" y2=\"47.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"76.9\" y1=\"49.4\" x2=\"77.1\" y2=\"49.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.9\" y1=\"56.5\" x2=\"76.9\" y2=\"49.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.2\" y1=\"63.2\" x2=\"76.9\" y2=\"56.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.8\" y1=\"63.2\" x2=\"70.2\" y2=\"63.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.9\" y1=\"64.1\" x2=\"67.8\" y2=\"63.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.9\" y1=\"66\" x2=\"66.9\" y2=\"64.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.8\" y1=\"67.1\" x2=\"66.9\" y2=\"66\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"40.1\" y1=\"67.1\" x2=\"65.8\" y2=\"67.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.3\" y1=\"70.9\" x2=\"40.1\" y2=\"67.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.3\" y1=\"71.3\" x2=\"36.3\" y2=\"70.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.2\" y1=\"73.2\" x2=\"36.3\" y2=\"71.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.4\" y1=\"73.2\" x2=\"38.2\" y2=\"73.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"73.4\" x2=\"38.4\" y2=\"73.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"38.6\" y1=\"75\" x2=\"38.6\" y2=\"73.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"37.6\" y1=\"76\" x2=\"38.6\" y2=\"75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"47.3\" x2=\"79\" y2=\"47.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"37.6\" y1=\"76\" x2=\"37.6\" y2=\"76.05\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"77.1\" y=\"49.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$35\">\n<contactref element=\"K4\" pad=\"1\"/>\n<contactref element=\"ACR4\" pad=\"2\"/>\n<wire x1=\"79\" y1=\"52.9\" x2=\"79\" y2=\"52.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"78.8\" y1=\"53.1\" x2=\"79\" y2=\"52.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"77.9\" y1=\"54\" x2=\"78.8\" y2=\"53.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"77.8\" y1=\"54\" x2=\"77.9\" y2=\"54\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"77.4\" y1=\"54.4\" x2=\"77.8\" y2=\"54\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"77.4\" y1=\"56.6\" x2=\"77.4\" y2=\"54.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"64.6\" x2=\"77.4\" y2=\"56.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.4\" y1=\"66.1\" x2=\"69.4\" y2=\"64.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.1\" y1=\"67.4\" x2=\"69.4\" y2=\"66.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.3\" y1=\"67.4\" x2=\"68.1\" y2=\"67.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.8\" y1=\"75.9\" x2=\"48.3\" y2=\"67.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39.8\" y1=\"76.05\" x2=\"39.8\" y2=\"75.9\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"78.8\" y=\"53.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$1\">\n<contactref element=\"RLED4\" pad=\"1\"/>\n<contactref element=\"LED4\" pad=\"C\"/>\n<wire x1=\"43\" y1=\"80.6\" x2=\"43\" y2=\"81.15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.9\" y1=\"79.5\" x2=\"43\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.9\" y1=\"77.6\" x2=\"41.9\" y2=\"79.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43\" y1=\"76.5\" x2=\"41.9\" y2=\"77.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43\" y1=\"76.5\" x2=\"43\" y2=\"76.45\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$12\">\n<contactref element=\"RLED3\" pad=\"1\"/>\n<contactref element=\"LED3\" pad=\"C\"/>\n<wire x1=\"45.2\" y1=\"80.6\" x2=\"45.2\" y2=\"81.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46\" y1=\"79.8\" x2=\"45.2\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"46\" y1=\"77.2\" x2=\"46\" y2=\"79.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.26\" y1=\"76.46\" x2=\"46\" y2=\"77.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.2\" y1=\"81.1\" x2=\"45.18\" y2=\"81.14\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$13\">\n<contactref element=\"RLED2\" pad=\"1\"/>\n<contactref element=\"LED2\" pad=\"C\"/>\n<wire x1=\"47.4\" y1=\"80.5\" x2=\"47.4\" y2=\"81.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.2\" y1=\"79.7\" x2=\"47.4\" y2=\"80.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.2\" y1=\"77.2\" x2=\"48.2\" y2=\"79.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"76.5\" x2=\"48.2\" y2=\"77.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.4\" y1=\"81.1\" x2=\"47.38\" y2=\"81.13\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.5\" y1=\"76.5\" x2=\"47.46\" y2=\"76.47\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$14\">\n<contactref element=\"RLED1\" pad=\"1\"/>\n<contactref element=\"LED1\" pad=\"C\"/>\n<wire x1=\"49.6\" y1=\"80.5\" x2=\"49.6\" y2=\"81.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"79.7\" x2=\"49.6\" y2=\"80.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.4\" y1=\"77.1\" x2=\"50.4\" y2=\"79.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.8\" y1=\"76.5\" x2=\"50.4\" y2=\"77.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.6\" y1=\"81.1\" x2=\"49.58\" y2=\"81.12\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.8\" y1=\"76.5\" x2=\"49.76\" y2=\"76.48\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"NSG_1\">\n<contactref element=\"RIN1_11K\" pad=\"1\"/>\n<contactref element=\"CIN1NF_1\" pad=\"1\"/>\n<contactref element=\"CIN56_1\" pad=\"1\"/>\n<contactref element=\"S5\" pad=\"1\"/>\n<wire x1=\"59.2\" y1=\"3\" x2=\"59.2\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"0.6\" x2=\"59.15\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.2\" y1=\"3\" x2=\"59.15\" y2=\"3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"3\" x2=\"59.1\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"5.6\" x2=\"59.05\" y2=\"5.6\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"3\" x2=\"59.15\" y2=\"3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"52.5\" y1=\"-9\" x2=\"52.5\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.6\" y1=\"-4.9\" x2=\"52.5\" y2=\"-9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.6\" y1=\"-1.9\" x2=\"56.6\" y2=\"-4.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.3\" y1=\"-0.2\" x2=\"56.6\" y2=\"-1.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.1\" y1=\"0.6\" x2=\"58.3\" y2=\"-0.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"0.6\" x2=\"59.15\" y2=\"0.6\" width=\"0.1524\" layer=\"16\"/>\n<via x=\"58.3\" y=\"-0.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$39\">\n<contactref element=\"C_AC3\" pad=\"1\"/>\n<contactref element=\"K3\" pad=\"4\"/>\n<contactref element=\"RIN7\" pad=\"1\"/>\n<contactref element=\"S7\" pad=\"2\"/>\n<wire x1=\"74.2\" y1=\"43.4\" x2=\"74.2\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"42.9\" x2=\"74.2\" y2=\"43.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.7\" y1=\"42.9\" x2=\"73.65\" y2=\"42.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74\" y1=\"46.2\" x2=\"73\" y2=\"47.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74\" y1=\"45.5\" x2=\"74\" y2=\"46.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.2\" y1=\"45.3\" x2=\"74\" y2=\"45.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73\" y1=\"47.2\" x2=\"73\" y2=\"47.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.2\" y1=\"45.3\" x2=\"74.25\" y2=\"45.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"30.6\" x2=\"62\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.5\" y1=\"31.1\" x2=\"62\" y2=\"30.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74\" y1=\"42.6\" x2=\"62.5\" y2=\"31.1\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"74\" y1=\"46.2\" x2=\"74\" y2=\"42.6\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"74\" y=\"46.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"62.5\" y=\"31.1\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_IO_4\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"28\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"7\"/>\n<wire x1=\"27.3\" y1=\"73.4\" x2=\"26.8\" y2=\"73.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.9\" y1=\"73.4\" x2=\"27.3\" y2=\"73.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23\" y1=\"74.3\" x2=\"23.9\" y2=\"73.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"23\" y1=\"75.4\" x2=\"23\" y2=\"74.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"31.9\" y1=\"84.3\" x2=\"23\" y2=\"75.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"79.4\" y1=\"84.3\" x2=\"31.9\" y2=\"84.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"80.3\" y1=\"83.4\" x2=\"79.4\" y2=\"84.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"80.3\" y1=\"79.2\" x2=\"80.3\" y2=\"83.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"79\" y1=\"77.9\" x2=\"80.3\" y2=\"79.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"26.8\" y1=\"73.4\" x2=\"26.725\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"77.9\" x2=\"78.95\" y2=\"77.87\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"27.3\" y=\"73.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_IO_3\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"27\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"5\"/>\n<wire x1=\"26\" y1=\"74.9\" x2=\"26\" y2=\"73.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.6\" y1=\"76.3\" x2=\"26\" y2=\"74.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.9\" y1=\"76.3\" x2=\"24.6\" y2=\"76.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"32.6\" y1=\"84\" x2=\"24.9\" y2=\"76.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"79.3\" y1=\"84\" x2=\"32.6\" y2=\"84\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"80\" y1=\"83.3\" x2=\"79.3\" y2=\"84\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"80\" y1=\"81.5\" x2=\"80\" y2=\"83.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"79\" y1=\"80.5\" x2=\"80\" y2=\"81.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"26\" y1=\"73.4\" x2=\"26.075\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79\" y1=\"80.5\" x2=\"78.95\" y2=\"80.41\" width=\"0.1524\" layer=\"3\"/>\n<via x=\"24.6\" y=\"76.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_IO_2\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"26\"/>\n<contactref element=\"PIN_ANALOG_IOEXP\" pad=\"3\"/>\n<wire x1=\"25.5\" y1=\"74.6\" x2=\"25.5\" y2=\"73.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"28.4\" y1=\"77.5\" x2=\"25.5\" y2=\"74.6\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"43.2\" y1=\"77.5\" x2=\"28.4\" y2=\"77.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"45.1\" y1=\"79.4\" x2=\"43.2\" y2=\"77.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"75.4\" y1=\"79.4\" x2=\"45.1\" y2=\"79.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"78.95\" y1=\"82.95\" x2=\"75.4\" y2=\"79.4\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"25.5\" y1=\"73.4\" x2=\"25.425\" y2=\"73.375\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"25.5\" y=\"74.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"INAMINUS2\">\n<contactref element=\"RGAIN1_3\" pad=\"2\"/>\n<contactref element=\"RGAIN2_3\" pad=\"2\"/>\n<contactref element=\"CGAIN1_3\" pad=\"1\"/>\n<contactref element=\"CL3\" pad=\"+\"/>\n<contactref element=\"CH3\" pad=\"+\"/>\n<contactref element=\"CIN1NF_3\" pad=\"2\"/>\n<contactref element=\"CIN56_3\" pad=\"2\"/>\n<contactref element=\"RIN3_11K\" pad=\"2\"/>\n<contactref element=\"RIN3\" pad=\"2\"/>\n<contactref element=\"CIN5_3\" pad=\"2\"/>\n<contactref element=\"IC4\" pad=\"2\"/>\n<wire x1=\"70.1\" y1=\"43.3\" x2=\"69.3\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.3\" y1=\"43.3\" x2=\"67.4\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.4\" y1=\"43.3\" x2=\"66.4\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.1\" y1=\"43.3\" x2=\"70.1\" y2=\"43.29788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.6\" y1=\"44.1\" x2=\"65.6\" y2=\"46.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"43.3\" x2=\"65.6\" y2=\"44.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.6\" y1=\"46.1\" x2=\"65.575\" y2=\"46.188\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66.4\" y1=\"43.3\" x2=\"66.4\" y2=\"43.29788125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"69.3\" y1=\"43.3\" x2=\"71\" y2=\"45\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"45\" x2=\"71\" y2=\"45.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.1\" y1=\"42.9\" x2=\"64.9\" y2=\"42.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"46.3\" x2=\"68.4\" y2=\"47.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"43.2\" x2=\"67.4\" y2=\"43.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"43.8\" x2=\"67.4\" y2=\"46.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"42.9\" x2=\"67.4\" y2=\"43.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"68.4\" y1=\"47.3\" x2=\"68.4\" y2=\"47.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.1\" y1=\"42.9\" x2=\"67.1\" y2=\"42.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"45.1\" x2=\"61.1\" y2=\"44.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"44.4\" x2=\"61.1\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"42.8\" x2=\"61.05\" y2=\"42.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"45.1\" x2=\"61.05\" y2=\"45.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61.1\" y1=\"44.4\" x2=\"62.15\" y2=\"45.45\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.15\" y1=\"45.45\" x2=\"62.45\" y2=\"45.75\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.45\" y1=\"45.75\" x2=\"64\" y2=\"47.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64\" y1=\"47.3\" x2=\"64\" y2=\"47.35\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.45\" y1=\"45.75\" x2=\"60.8\" y2=\"47.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.8\" y1=\"47.4\" x2=\"60.75\" y2=\"47.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.7\" y1=\"42.9\" x2=\"64.9\" y2=\"42.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.15\" y1=\"45.45\" x2=\"64.7\" y2=\"42.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"64.9\" y1=\"42.9\" x2=\"64.9\" y2=\"42.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.4\" y1=\"43.8\" x2=\"67.4\" y2=\"43.3\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"67.4\" y=\"43.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$44\">\n<contactref element=\"DAC1\" pad=\"6\"/>\n<contactref element=\"ROFFSET1\" pad=\"2\"/>\n<wire x1=\"66.5\" y1=\"26.9\" x2=\"69.9869\" y2=\"26.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"26.7\" x2=\"66.5\" y2=\"26.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"26.7\" x2=\"66.25\" y2=\"26.7\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$45\">\n<contactref element=\"DAC1\" pad=\"7\"/>\n<contactref element=\"ROFFSET2\" pad=\"2\"/>\n<wire x1=\"67.8\" y1=\"27.4\" x2=\"69.9869\" y2=\"27.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"28.9\" x2=\"67.8\" y2=\"27.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"28.9\" x2=\"66.25\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$46\">\n<contactref element=\"DAC1\" pad=\"8\"/>\n<contactref element=\"ROFFSET3\" pad=\"2\"/>\n<wire x1=\"69.5\" y1=\"27.9\" x2=\"69.9869\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"31.1\" x2=\"69.5\" y2=\"27.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"31.1\" x2=\"66.25\" y2=\"31.1\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$47\">\n<contactref element=\"DAC1\" pad=\"9\"/>\n<contactref element=\"ROFFSET4\" pad=\"2\"/>\n<wire x1=\"69.5\" y1=\"28.4\" x2=\"69.9869\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.2\" y1=\"30.7\" x2=\"69.5\" y2=\"28.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"67.2\" y1=\"32.4\" x2=\"67.2\" y2=\"30.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"33.3\" x2=\"67.2\" y2=\"32.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.3\" y1=\"33.3\" x2=\"66.25\" y2=\"33.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"VCCA\" class=\"2\">\n<contactref element=\"CP4\" pad=\"1\"/>\n<contactref element=\"REG1\" pad=\"TER\"/>\n<contactref element=\"REG1\" pad=\"2\"/>\n<contactref element=\"CP9\" pad=\"1\"/>\n<contactref element=\"GAINSW1\" pad=\"5\"/>\n<contactref element=\"GAINSW2\" pad=\"5\"/>\n<contactref element=\"GAINSW3\" pad=\"5\"/>\n<contactref element=\"GAINSW4\" pad=\"5\"/>\n<contactref element=\"C5VOPAMP2\" pad=\"1\"/>\n<contactref element=\"C5VOPAMP1\" pad=\"1\"/>\n<contactref element=\"DAC1\" pad=\"1\"/>\n<contactref element=\"COFFSET\" pad=\"2\"/>\n<contactref element=\"CADD2_B\" pad=\"1\"/>\n<contactref element=\"CADD1_B\" pad=\"1\"/>\n<contactref element=\"IC1\" pad=\"48\"/>\n<contactref element=\"IC1\" pad=\"1\"/>\n<contactref element=\"IC1\" pad=\"13\"/>\n<contactref element=\"IC1\" pad=\"12\"/>\n<contactref element=\"IC2\" pad=\"48\"/>\n<contactref element=\"IC2\" pad=\"1\"/>\n<contactref element=\"IC2\" pad=\"13\"/>\n<contactref element=\"IC2\" pad=\"12\"/>\n<contactref element=\"CADD2_A\" pad=\"1\"/>\n<contactref element=\"CADD1_A\" pad=\"1\"/>\n<contactref element=\"OVSAMP1\" pad=\"5\"/>\n<contactref element=\"OVSAMP2\" pad=\"5\"/>\n<contactref element=\"IC3\" pad=\"8\"/>\n<contactref element=\"IC4\" pad=\"8\"/>\n<wire x1=\"45.8\" y1=\"-4\" x2=\"54.75\" y2=\"4.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.75\" y1=\"4.95\" x2=\"56.1\" y2=\"6.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"6.3\" x2=\"56.1\" y2=\"9.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"9.3\" x2=\"56.1\" y2=\"11.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"11.9\" x2=\"56.1\" y2=\"12.02263125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"12.02263125\" x2=\"56.9332\" y2=\"12.85583125\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.9332\" y1=\"12.85583125\" x2=\"56.9332\" y2=\"18.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.9332\" y1=\"18.8\" x2=\"56.9332\" y2=\"24.1668\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.9332\" y1=\"24.1668\" x2=\"56.85\" y2=\"24.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.85\" y1=\"24.25\" x2=\"53.6\" y2=\"27.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"27.5\" x2=\"53.6\" y2=\"29.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"44\" x2=\"56.2\" y2=\"44.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"44.8\" x2=\"61.9\" y2=\"50.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"50.5\" x2=\"60.2\" y2=\"52.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.2\" y1=\"52.2\" x2=\"60.2\" y2=\"52.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"44\" x2=\"56.2\" y2=\"43.73736875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"43.73736875\" x2=\"57.0532\" y2=\"42.88416875\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.0532\" y1=\"42.88416875\" x2=\"57.0532\" y2=\"40.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.0532\" y1=\"40.2\" x2=\"57.0532\" y2=\"38.9532\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.0532\" y1=\"38.9532\" x2=\"53.65\" y2=\"35.55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.65\" y1=\"35.55\" x2=\"53.6\" y2=\"35.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.6\" y1=\"35.5\" x2=\"53.6\" y2=\"29.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"77.5\" y1=\"28.9\" x2=\"75.5\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"75.5\" y1=\"28.9\" x2=\"74.2131\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"77.6\" y1=\"29\" x2=\"77.5\" y2=\"28.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.1\" y1=\"27.1\" x2=\"59.9\" y2=\"27.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"28\" x2=\"60.95\" y2=\"27.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.95\" y1=\"27.95\" x2=\"60.1\" y2=\"27.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"61\" y1=\"31.2\" x2=\"61\" y2=\"28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"60.1\" y1=\"32.1\" x2=\"61\" y2=\"31.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.9\" y1=\"32.1\" x2=\"60.1\" y2=\"32.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"74.7\" y1=\"28.9\" x2=\"75.5\" y2=\"28.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"72.2\" y1=\"26.4\" x2=\"74.7\" y2=\"28.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.5\" y1=\"26.4\" x2=\"72.2\" y2=\"26.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61\" y1=\"27.9\" x2=\"62.5\" y2=\"26.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61\" y1=\"27.9\" x2=\"60.95\" y2=\"27.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"43.375\" y1=\"-12.1\" x2=\"41.9\" y2=\"-12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.9\" y1=\"-12.1\" x2=\"37.025\" y2=\"-12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"9.3\" x2=\"61.9\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"9.3\" x2=\"65.6\" y2=\"9.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.6\" y1=\"9.3\" x2=\"65.625\" y2=\"9.212\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"44.8\" x2=\"47.8\" y2=\"45.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.8\" y1=\"45.5\" x2=\"47.75\" y2=\"45.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"39.2\" x2=\"48.45\" y2=\"39.15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.45\" y1=\"39.15\" x2=\"47.8\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.8\" y1=\"38.5\" x2=\"47.75\" y2=\"38.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"39.2\" x2=\"48.5\" y2=\"39.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"18.8\" x2=\"47.8\" y2=\"19.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.8\" y1=\"19.5\" x2=\"47.75\" y2=\"19.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"13.2\" x2=\"48.45\" y2=\"13.15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.45\" y1=\"13.15\" x2=\"47.8\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"47.8\" y1=\"12.5\" x2=\"47.75\" y2=\"12.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"13.2\" x2=\"48.5\" y2=\"13.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60\" y1=\"-0.3\" x2=\"60\" y2=\"-0.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.75\" y1=\"4.95\" x2=\"60\" y2=\"-0.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"40.7\" x2=\"61.9\" y2=\"40.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.4\" y1=\"40.2\" x2=\"61.9\" y2=\"40.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.0532\" y1=\"40.2\" x2=\"61.4\" y2=\"40.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.9\" y1=\"13.1\" x2=\"48.5\" y2=\"13.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"11.9\" x2=\"54.9\" y2=\"13.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"13.1\" x2=\"48.45\" y2=\"13.15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"11.9\" x2=\"56.1\" y2=\"11.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.9332\" y1=\"18.8\" x2=\"48.5\" y2=\"18.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"18.8\" x2=\"48.5\" y2=\"18.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"50.1\" y1=\"39.1\" x2=\"48.5\" y2=\"39.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"53.65\" y1=\"35.55\" x2=\"50.1\" y2=\"39.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"39.1\" x2=\"48.45\" y2=\"39.15\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.2\" y1=\"44.8\" x2=\"48.5\" y2=\"44.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"44.8\" x2=\"48.5\" y2=\"44.75\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"50.6\" x2=\"64.9\" y2=\"50.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"50.6\" x2=\"64.925\" y2=\"50.612\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"61.9\" y1=\"50.6\" x2=\"61.9\" y2=\"50.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.9\" y1=\"-3.8\" x2=\"43.7\" y2=\"-3.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"45.9\" y1=\"-3.8\" x2=\"45.8\" y2=\"-4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.1\" y1=\"9.3\" x2=\"61.9\" y2=\"9.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"41.9\" y1=\"-5.6\" x2=\"41.9\" y2=\"-12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"43.7\" y1=\"-3.8\" x2=\"41.9\" y2=\"-5.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"60.7\" y1=\"27.9\" x2=\"61\" y2=\"27.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59\" y1=\"26.2\" x2=\"60.7\" y2=\"27.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.8\" y1=\"26.2\" x2=\"59\" y2=\"26.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56.85\" y1=\"24.25\" x2=\"58.8\" y2=\"26.2\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"75.5\" y=\"28.9\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"61\" y=\"27.9\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$48\" class=\"3\">\n<contactref element=\"REG1\" pad=\"3\"/>\n<contactref element=\"CP3\" pad=\"1\"/>\n<contactref element=\"CP8\" pad=\"1\"/>\n<contactref element=\"CP7\" pad=\"1\"/>\n<contactref element=\"L2\" pad=\"2\"/>\n<wire x1=\"39.7\" y1=\"-3.9\" x2=\"36.8\" y2=\"-3.9\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"36.7\" y1=\"-3.8\" x2=\"35.2\" y2=\"-3.8\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"35.2\" y1=\"-3.8\" x2=\"33.3\" y2=\"-3.8\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"36.7\" y1=\"-3.8\" x2=\"36.8\" y2=\"-3.9\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"32.7\" y1=\"-4.4\" x2=\"30.6\" y2=\"-4.4\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"33.3\" y1=\"-3.8\" x2=\"32.7\" y2=\"-4.4\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"35.8\" y1=\"-13.1\" x2=\"37\" y2=\"-14.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"35.7\" y1=\"-13.1\" x2=\"35.8\" y2=\"-13.1\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"34.9\" y1=\"-12.3\" x2=\"35.7\" y2=\"-13.1\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"34.9\" y1=\"-7.1\" x2=\"34.9\" y2=\"-12.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"35.2\" y1=\"-6.8\" x2=\"34.9\" y2=\"-7.1\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"35.2\" y1=\"-3.8\" x2=\"35.2\" y2=\"-6.8\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"37\" y1=\"-14.3\" x2=\"37.025\" y2=\"-14.386\" width=\"0.381\" layer=\"1\"/>\n</signal>\n<signal name=\"N$49\" class=\"3\">\n<contactref element=\"REG\" pad=\"3\"/>\n<contactref element=\"CP5\" pad=\"1\"/>\n<contactref element=\"CP2\" pad=\"1\"/>\n<contactref element=\"CP1\" pad=\"1\"/>\n<contactref element=\"L1\" pad=\"2\"/>\n<wire x1=\"30.3\" y1=\"61.7\" x2=\"30.3\" y2=\"58.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"30.3\" y1=\"58.1\" x2=\"30.22\" y2=\"58.07\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"26.1\" y1=\"56.1\" x2=\"23.6\" y2=\"56.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"23.6\" y1=\"56.1\" x2=\"22.3\" y2=\"56.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"23.6\" y1=\"56\" x2=\"20.9\" y2=\"53.3\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"20.9\" y1=\"53.3\" x2=\"20.835\" y2=\"53.254\" width=\"0.381\" layer=\"1\"/>\n<wire x1=\"23.6\" y1=\"56\" x2=\"23.6\" y2=\"56.1\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"28\" y1=\"58\" x2=\"30.1\" y2=\"58\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"26.1\" y1=\"56.1\" x2=\"28\" y2=\"58\" width=\"0.381\" layer=\"16\"/>\n<wire x1=\"30.1\" y1=\"58\" x2=\"30.22\" y2=\"58.07\" width=\"0.381\" layer=\"16\"/>\n<via x=\"23.6\" y=\"56\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_SHDN2\">\n<contactref element=\"IC2\" pad=\"7\"/>\n<contactref element=\"IOEXPAND_0X20_BOT\" pad=\"6\"/>\n<wire x1=\"48.9\" y1=\"42.3\" x2=\"48.5\" y2=\"42.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"49.3\" y1=\"42.7\" x2=\"48.9\" y2=\"42.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.3\" y1=\"68.7\" x2=\"49.3\" y2=\"42.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.3\" y1=\"69.7\" x2=\"23.3\" y2=\"68.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.4\" y1=\"69.8\" x2=\"23.3\" y2=\"69.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"48.5\" y1=\"42.3\" x2=\"48.5\" y2=\"42.25\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.4\" y1=\"69.8\" x2=\"23.475\" y2=\"69.825\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"49.3\" y=\"42.7\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"23.3\" y=\"68.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$34\">\n<contactref element=\"RLEDPOW\" pad=\"1\"/>\n<contactref element=\"LEDPOW\" pad=\"C\"/>\n<wire x1=\"36.9\" y1=\"83\" x2=\"39\" y2=\"83\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"39\" y1=\"83\" x2=\"39\" y2=\"82.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.9\" y1=\"83\" x2=\"36.9\" y2=\"82.95\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"TRIGINFROMLEFT_28\">\n<contactref element=\"FPGA\" pad=\"28\"/>\n<contactref element=\"PIN_ANALOG_IOEXP1\" pad=\"8\"/>\n<wire x1=\"26.7\" y1=\"17.5\" x2=\"26.7\" y2=\"18.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.4\" y1=\"17.5\" x2=\"26.7\" y2=\"17.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"25.9\" y1=\"17\" x2=\"26.4\" y2=\"17.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"15.9\" y1=\"17\" x2=\"25.9\" y2=\"17\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.8\" y1=\"20.1\" x2=\"15.9\" y2=\"17\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.8\" y1=\"21.5\" x2=\"12.8\" y2=\"20.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"12.4\" y1=\"21.9\" x2=\"12.8\" y2=\"21.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"3.9\" y1=\"21.9\" x2=\"12.4\" y2=\"21.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.7\" y1=\"33.5\" x2=\"3.9\" y2=\"21.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-8\" y1=\"33.5\" x2=\"-7.7\" y2=\"33.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-8.6\" y1=\"34.1\" x2=\"-8\" y2=\"33.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-8.6\" y1=\"39.9\" x2=\"-8.6\" y2=\"34.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-7.4\" y1=\"41.1\" x2=\"-8.6\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.1\" y1=\"41.1\" x2=\"-7.4\" y2=\"41.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5.1\" y1=\"42.1\" x2=\"-6.1\" y2=\"41.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"26.7\" y1=\"18.3\" x2=\"26.71\" y2=\"18.38\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-5.1\" y1=\"42.1\" x2=\"-5.01\" y2=\"42.11\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"26.7\" y=\"17.5\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"IO_105\">\n<contactref element=\"FPGA\" pad=\"105\"/>\n<contactref element=\"PIN_IO_1\" pad=\"9\"/>\n<wire x1=\"14.7\" y1=\"39.4\" x2=\"14.7\" y2=\"39.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.8\" y1=\"37.5\" x2=\"14.7\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"12.5\" y1=\"37.8\" x2=\"12.8\" y2=\"37.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"9.9\" y1=\"37.8\" x2=\"12.5\" y2=\"37.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"9.7\" y1=\"37.6\" x2=\"9.9\" y2=\"37.8\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"9.7\" y1=\"38.3\" x2=\"9.7\" y2=\"37.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.7\" y1=\"41.3\" x2=\"9.7\" y2=\"38.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"6.7\" y1=\"50.8\" x2=\"6.7\" y2=\"41.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.1\" y1=\"57.6\" x2=\"6.7\" y2=\"50.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-0.1\" y1=\"63\" x2=\"-0.1\" y2=\"57.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.3\" y1=\"63.4\" x2=\"-0.1\" y2=\"63\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"0.3\" y1=\"80.1\" x2=\"0.3\" y2=\"63.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-3.9\" y1=\"84.3\" x2=\"0.3\" y2=\"80.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-5.8\" y1=\"84.3\" x2=\"-3.9\" y2=\"84.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"-6.7\" y1=\"83.4\" x2=\"-5.8\" y2=\"84.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"14.7\" y1=\"39.8\" x2=\"14.71\" y2=\"39.88\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"-6.7\" y1=\"83.4\" x2=\"-6.79\" y2=\"83.4\" width=\"0.1524\" layer=\"15\"/>\n<via x=\"12.8\" y=\"37.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"9.7\" y=\"37.6\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"NNG_1\">\n<contactref element=\"RIN1\" pad=\"1\"/>\n<contactref element=\"CIN5_1\" pad=\"1\"/>\n<contactref element=\"S5\" pad=\"3\"/>\n<wire x1=\"65.1\" y1=\"0.2\" x2=\"63.8\" y2=\"0.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"66.9\" y1=\"0.2\" x2=\"65.1\" y2=\"0.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"67.9\" y1=\"1.2\" x2=\"66.9\" y2=\"0.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.6\" y1=\"1.2\" x2=\"67.9\" y2=\"1.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"2.6\" x2=\"70.85\" y2=\"1.45\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.85\" y1=\"1.45\" x2=\"70.6\" y2=\"1.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"4.8\" x2=\"72\" y2=\"2.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"5.8\" x2=\"72\" y2=\"4.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.8\" y1=\"0.2\" x2=\"63.8\" y2=\"0.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"5.8\" x2=\"71\" y2=\"5.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.5\" y1=\"-8.1\" x2=\"57.5\" y2=\"-9.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.7\" y1=\"-1.9\" x2=\"57.5\" y2=\"-8.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.7\" y1=\"-1.9\" x2=\"63.7\" y2=\"-1.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.9\" y1=\"-1.7\" x2=\"70.7\" y2=\"-1.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.9\" y1=\"1.4\" x2=\"70.9\" y2=\"-1.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.9\" y1=\"1.4\" x2=\"70.85\" y2=\"1.45\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"65.1\" y=\"0.2\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$50\">\n<contactref element=\"C_AC4\" pad=\"1\"/>\n<contactref element=\"K4\" pad=\"4\"/>\n<contactref element=\"RIN8\" pad=\"1\"/>\n<contactref element=\"S8\" pad=\"2\"/>\n<wire x1=\"74.3\" y1=\"53\" x2=\"74.3\" y2=\"52.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"52.3\" x2=\"74.3\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"53.5\" x2=\"74.3\" y2=\"53\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"51.3\" x2=\"74.35\" y2=\"51.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.8\" y1=\"53.5\" x2=\"73.75\" y2=\"53.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"74.3\" y1=\"52.3\" x2=\"73\" y2=\"52.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"73\" y1=\"52.3\" x2=\"73\" y2=\"52.27\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"56.3\" y1=\"59.3\" x2=\"56\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"57.8\" y1=\"60.8\" x2=\"56.3\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"59.8\" y1=\"60.8\" x2=\"57.8\" y2=\"60.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.5\" y1=\"57.1\" x2=\"59.8\" y2=\"60.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.3\" y1=\"57.1\" x2=\"63.5\" y2=\"57.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.9\" y1=\"53.5\" x2=\"70.3\" y2=\"57.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"73.9\" y1=\"53.5\" x2=\"73.75\" y2=\"53.5\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"74.3\" y=\"52.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B0\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"1\"/>\n<contactref element=\"S1\" pad=\"5\"/>\n<wire x1=\"26.8\" y1=\"77.7\" x2=\"26.8\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36\" y1=\"68.5\" x2=\"26.8\" y2=\"77.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36\" y1=\"66.2\" x2=\"36\" y2=\"68.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.8\" y1=\"52.4\" x2=\"36\" y2=\"66.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.8\" y1=\"44.2\" x2=\"49.8\" y2=\"52.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"49.8\" y1=\"43.7\" x2=\"49.8\" y2=\"44.2\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"53.8\" y1=\"39.7\" x2=\"49.8\" y2=\"43.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"53.8\" y1=\"11.3\" x2=\"53.8\" y2=\"39.7\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"64.6\" y1=\"0.5\" x2=\"53.8\" y2=\"11.3\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"64.6\" y1=\"-2.9\" x2=\"64.6\" y2=\"0.5\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"65\" y1=\"-3.3\" x2=\"64.6\" y2=\"-2.9\" width=\"0.1524\" layer=\"3\"/>\n<wire x1=\"66\" y1=\"-4.3\" x2=\"65\" y2=\"-3.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"80.6\" x2=\"26.725\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"36\" y=\"68.5\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"49.8\" y=\"44.2\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"65\" y=\"-3.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B1\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"2\"/>\n<contactref element=\"S2\" pad=\"5\"/>\n<wire x1=\"26.1\" y1=\"81.3\" x2=\"26.1\" y2=\"80.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.8\" y1=\"82\" x2=\"26.1\" y2=\"81.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"51.1\" y1=\"82\" x2=\"26.8\" y2=\"82\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"65.1\" y1=\"68\" x2=\"51.1\" y2=\"82\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"68.3\" y1=\"68\" x2=\"65.1\" y2=\"68\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79.7\" y1=\"56.6\" x2=\"68.3\" y2=\"68\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"79.7\" y1=\"24.4\" x2=\"79.7\" y2=\"56.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"82.9\" y1=\"21.2\" x2=\"79.7\" y2=\"24.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"82.9\" y1=\"16.7\" x2=\"82.9\" y2=\"21.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"77.6\" y1=\"11.4\" x2=\"82.9\" y2=\"16.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"77.2\" y1=\"11.4\" x2=\"77.6\" y2=\"11.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.5\" y1=\"12.1\" x2=\"77.2\" y2=\"11.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"76.5\" y1=\"20.2\" x2=\"76.5\" y2=\"12.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"24.7\" x2=\"76.5\" y2=\"20.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"26.1\" y1=\"80.7\" x2=\"26.075\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_21_B2\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"3\"/>\n<contactref element=\"S3\" pad=\"5\"/>\n<wire x1=\"25.5\" y1=\"78.3\" x2=\"25.5\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.5\" y1=\"67.3\" x2=\"25.5\" y2=\"78.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.5\" y1=\"66.1\" x2=\"36.5\" y2=\"67.3\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.7\" y1=\"39.9\" x2=\"36.5\" y2=\"66.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"62.7\" y1=\"34\" x2=\"62.7\" y2=\"39.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"65\" y1=\"31.7\" x2=\"62.7\" y2=\"34\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"68.1\" y1=\"31.7\" x2=\"65\" y2=\"31.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"69\" y1=\"31.7\" x2=\"68.1\" y2=\"31.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"34.7\" x2=\"69\" y2=\"31.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25.5\" y1=\"80.6\" x2=\"25.425\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"36.5\" y=\"67.3\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"68.1\" y=\"31.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B3\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"4\"/>\n<contactref element=\"S4\" pad=\"5\"/>\n<wire x1=\"24.8\" y1=\"78.3\" x2=\"24.8\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.3\" y1=\"66.8\" x2=\"24.8\" y2=\"78.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.9\" y1=\"66.8\" x2=\"36.3\" y2=\"66.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"66\" y1=\"64.7\" x2=\"63.9\" y2=\"66.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.8\" y1=\"80.6\" x2=\"24.775\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"E_21_B4\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"5\"/>\n<contactref element=\"S5\" pad=\"5\"/>\n<wire x1=\"24.1\" y1=\"78.8\" x2=\"24.1\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.1\" y1=\"78.6\" x2=\"24.1\" y2=\"78.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.1\" y1=\"76.6\" x2=\"24.1\" y2=\"78.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"22.1\" y1=\"48.6\" x2=\"22.1\" y2=\"76.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.9\" y1=\"46.8\" x2=\"22.1\" y2=\"48.6\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"23.9\" y1=\"37.2\" x2=\"23.9\" y2=\"46.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.3\" y1=\"21.8\" x2=\"23.9\" y2=\"37.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"39.3\" y1=\"17\" x2=\"39.3\" y2=\"21.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.5\" y1=\"12.8\" x2=\"39.3\" y2=\"17\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"43.5\" y1=\"7.2\" x2=\"43.5\" y2=\"12.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"53.4\" y1=\"-2.7\" x2=\"43.5\" y2=\"7.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"55\" y1=\"-4.3\" x2=\"53.4\" y2=\"-2.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.1\" y1=\"80.6\" x2=\"24.125\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"24.1\" y=\"78.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"53.4\" y=\"-2.7\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B5\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"6\"/>\n<contactref element=\"S6\" pad=\"5\"/>\n<wire x1=\"23.5\" y1=\"81.8\" x2=\"23.5\" y2=\"80.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.2\" y1=\"42.1\" x2=\"23.5\" y2=\"81.8\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.2\" y1=\"39.4\" x2=\"63.2\" y2=\"42.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"63.2\" y1=\"34.8\" x2=\"63.2\" y2=\"39.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63\" y1=\"34.6\" x2=\"63.2\" y2=\"34.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63\" y1=\"25.7\" x2=\"63\" y2=\"34.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"24.7\" x2=\"63\" y2=\"25.7\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"23.5\" y1=\"80.7\" x2=\"23.475\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"23.5\" y=\"81.8\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"63.2\" y=\"39.4\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B6\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"7\"/>\n<contactref element=\"S7\" pad=\"5\"/>\n<wire x1=\"22.9\" y1=\"79.3\" x2=\"22.9\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.1\" y1=\"78.1\" x2=\"22.9\" y2=\"79.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.3\" y1=\"78.1\" x2=\"24.1\" y2=\"78.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.3\" y1=\"77.5\" x2=\"24.3\" y2=\"78.1\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.4\" y1=\"53.4\" x2=\"24.3\" y2=\"77.5\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"48.4\" y1=\"44.9\" x2=\"48.4\" y2=\"53.4\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"50.1\" y1=\"43.2\" x2=\"48.4\" y2=\"44.9\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"58.1\" y1=\"43.2\" x2=\"50.1\" y2=\"43.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.6\" y1=\"39.7\" x2=\"58.1\" y2=\"43.2\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.6\" y1=\"36.3\" x2=\"61.6\" y2=\"39.7\" width=\"0.1524\" layer=\"15\"/>\n<wire x1=\"61.6\" y1=\"35.1\" x2=\"61.6\" y2=\"36.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62\" y1=\"34.7\" x2=\"61.6\" y2=\"35.1\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.9\" y1=\"80.6\" x2=\"22.825\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"24.3\" y=\"78.1\" extent=\"1-16\" drill=\"0.3048\"/>\n<via x=\"61.6\" y=\"36.3\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"E_21_B7\">\n<contactref element=\"IOEXPAND_0X21_TOP\" pad=\"8\"/>\n<contactref element=\"S8\" pad=\"5\"/>\n<wire x1=\"22.2\" y1=\"79.5\" x2=\"22.2\" y2=\"80.6\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"24.3\" y1=\"77.4\" x2=\"22.2\" y2=\"79.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"25\" y1=\"77.4\" x2=\"24.3\" y2=\"77.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"36.2\" y1=\"66.2\" x2=\"25\" y2=\"77.4\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"54.5\" y1=\"66.2\" x2=\"36.2\" y2=\"66.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"56\" y1=\"64.7\" x2=\"54.5\" y2=\"66.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"22.2\" y1=\"80.6\" x2=\"22.175\" y2=\"80.625\" width=\"0.1524\" layer=\"1\"/>\n</signal>\n<signal name=\"N$19\">\n<contactref element=\"S6\" pad=\"1\"/>\n<contactref element=\"CIN1NF_2\" pad=\"1\"/>\n<contactref element=\"CIN56_2\" pad=\"1\"/>\n<contactref element=\"RIN2_11K\" pad=\"1\"/>\n<wire x1=\"59.7\" y1=\"12.4\" x2=\"59.7\" y2=\"11.5\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"11.5\" x2=\"59.7\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"10.2\" x2=\"59.65\" y2=\"10.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.7\" y1=\"12.4\" x2=\"59.65\" y2=\"12.4\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.1\" y1=\"9.7\" x2=\"59.1\" y2=\"7.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.6\" y1=\"10.2\" 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element=\"S7\" pad=\"3\"/>\n<contactref element=\"RIN3\" pad=\"1\"/>\n<contactref element=\"CIN5_3\" pad=\"1\"/>\n<wire x1=\"65.9\" y1=\"42.2\" x2=\"64.9\" y2=\"41.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"70.3\" y1=\"42.2\" x2=\"65.9\" y2=\"42.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"43.9\" x2=\"70.95\" y2=\"42.85\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.95\" y1=\"42.85\" x2=\"70.3\" y2=\"42.2\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"72\" y1=\"45.9\" x2=\"72\" y2=\"43.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"46.9\" x2=\"72\" y2=\"45.9\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.9\" y1=\"41.2\" x2=\"64.9\" y2=\"41.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"46.9\" x2=\"71\" y2=\"46.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.5\" y1=\"32.5\" x2=\"64.5\" y2=\"29.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"39\" x2=\"64.5\" y2=\"32.5\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"71\" y1=\"42.8\" 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width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"59.4\" y1=\"51.9\" x2=\"59.45\" y2=\"51.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"53.5\" y1=\"56.4\" x2=\"53.5\" y2=\"59.3\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.9\" y1=\"51\" x2=\"53.5\" y2=\"56.4\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"58.9\" y=\"51\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n<signal name=\"N$57\">\n<contactref element=\"S8\" pad=\"3\"/>\n<contactref element=\"CIN5_4\" pad=\"1\"/>\n<contactref element=\"RIN4\" pad=\"1\"/>\n<wire x1=\"62.8\" y1=\"54.8\" x2=\"63.9\" y2=\"53.7\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"62.8\" y1=\"55\" x2=\"62.8\" y2=\"54.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"58.5\" y1=\"59.3\" x2=\"62.75\" y2=\"55.05\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.75\" y1=\"55.05\" x2=\"62.8\" y2=\"55\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"63.9\" y1=\"53.7\" x2=\"63.9\" y2=\"53.65\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"71\" y1=\"56\" x2=\"71\" y2=\"50.95\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"70.2\" y1=\"56.8\" x2=\"71\" y2=\"56\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"64.5\" y1=\"56.8\" x2=\"70.2\" y2=\"56.8\" width=\"0.1524\" layer=\"1\"/>\n<wire x1=\"62.75\" y1=\"55.05\" x2=\"64.5\" y2=\"56.8\" width=\"0.1524\" layer=\"1\"/>\n<via x=\"62.8\" y=\"54.8\" extent=\"1-16\" drill=\"0.3048\"/>\n</signal>\n</signals>\n<mfgpreviewcolors>\n<mfgpreviewcolor name=\"soldermaskcolor\" color=\"0xC8008000\"/>\n<mfgpreviewcolor name=\"silkscreencolor\" color=\"0xFFFEFEFE\"/>\n<mfgpreviewcolor name=\"backgroundcolor\" color=\"0xFF282828\"/>\n<mfgpreviewcolor name=\"coppercolor\" color=\"0xFFFFBF00\"/>\n<mfgpreviewcolor name=\"substratecolor\" color=\"0xFF786E46\"/>\n</mfgpreviewcolors>\n</board>\n</drawing>\n<compatibility>\n<note version=\"6.3\" minversion=\"6.2.2\" severity=\"warning\">\nSince Version 6.2.2 text objects can contain more than one line,\nwhich will not be processed correctly with this version.\n</note>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/max10adc_v9.0_rack.sch",
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name=\"225bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"226\" name=\"226bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"227\" name=\"227bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"228\" name=\"228bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"229\" name=\"229bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"230\" name=\"230bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"231\" name=\"Eagle3D_PG1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"232\" name=\"Eagle3D_PG2\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"233\" name=\"Eagle3D_PG3\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"248\" name=\"Housing\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"249\" name=\"Edge\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"250\" name=\"Descript\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"251\" name=\"SMDround\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"254\" name=\"cooling\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"255\" name=\"Accent\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n</layers>\n<schematic xreflabel=\"%F%N/%S.%C%R\" xrefpart=\"/%S.%C%R\">\n<libraries>\n<library name=\"supply1\">\n<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;\n GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;\n Please keep in mind, that these devices are necessary for the\n automatic wiring of the supply signals.&lt;p&gt;\n The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;\n In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;\n &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"+5V\">\n<wire x1=\"1.27\" y1=\"-1.905\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"-1.905\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"+5V\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R90\"/>\n</symbol>\n<symbol name=\"GND\">\n<wire x1=\"-1.905\" y1=\"0\" x2=\"1.905\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"GND\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R270\"/>\n</symbol>\n<symbol name=\"+3V3\">\n<wire x1=\"1.27\" y1=\"-1.905\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"-1.905\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"+3V3\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"+5V\" prefix=\"P+\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"+5V\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"GND\" prefix=\"GND\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"GND\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"+3V3\" prefix=\"+3V3\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"+3V3\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"rcl\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 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3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n      3262X&lt;BR&gt;\n      3266P&lt;BR&gt;\n      3266W&lt;BR&gt;\n      3266X&lt;BR&gt;\n      3290H&lt;BR&gt;\n      3290P&lt;BR&gt;\n      3290W&lt;BR&gt;\n      3292P&lt;BR&gt;\n      3292W&lt;BR&gt;\n      3292X&lt;BR&gt;\n      3296P&lt;BR&gt;\n      3296W&lt;BR&gt;\n      3296X&lt;BR&gt;\n      3296Y&lt;BR&gt;\n      3296Z&lt;BR&gt;\n      3299P&lt;BR&gt;\n      3299W&lt;BR&gt;\n      3299X&lt;BR&gt;\n      3299Y&lt;BR&gt;\n      3299Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64W&amp;nbsp;ALT&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&amp;nbsp;ALT&lt;BR&gt;\n      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ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      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RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n    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25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n      25S&lt;BR&gt;\n      25U&lt;BR&gt;\n      25RX&lt;BR&gt;\n      25X&lt;BR&gt;\n      72XW&lt;BR&gt;\n      72XL&lt;BR&gt;\n      72PM&lt;BR&gt;\n      72RX&lt;BR&gt;\n      -&lt;BR&gt;\n      72PX&lt;BR&gt;\n      72P&lt;BR&gt;\n      72RXW&lt;BR&gt;\n      72RXL&lt;BR&gt;\n      72X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T7YB&lt;BR&gt;\n      T7YA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      TXD&lt;BR&gt;\n      TYA&lt;BR&gt;\n      TYP&lt;BR&gt;\n      -&lt;BR&gt;\n      TYD&lt;BR&gt;\n      TX&lt;BR&gt;\n      -&lt;BR&gt;\n      150SX&lt;BR&gt;\n      100SX&lt;BR&gt;\n      102T&lt;BR&gt;\n      101S&lt;BR&gt;\n      190T&lt;BR&gt;\n      150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD 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shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-040X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 4 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.905\" x2=\"2.159\" y2=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.905\" x2=\"-2.159\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.651\" x2=\"2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.651\" x2=\"-2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.905\" x2=\"2.413\" y2=\"1.651\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.651\" x2=\"-2.159\" y2=\"1.905\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-1.905\" x2=\"2.413\" y2=\"-1.651\" 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x=\"-2.286\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-050X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 5 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"2.286\" x2=\"2.159\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-2.286\" x2=\"-2.159\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"2.032\" x2=\"2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"2.032\" x2=\"-2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"2.286\" x2=\"2.413\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"2.032\" x2=\"-2.159\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-2.286\" x2=\"2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" 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layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.81\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-060X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 6 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"2.794\" x2=\"2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-2.794\" x2=\"-2.159\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"2.54\" x2=\"2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"2.54\" x2=\"-2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"2.794\" x2=\"2.413\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"2.54\" x2=\"-2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-2.794\" x2=\"2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.413\" y1=\"-2.54\" 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width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-2.286\" x2=\"-3.429\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.159\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-055X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 5.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"2.54\" x2=\"-3.683\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-2.794\" x2=\"3.429\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-2.54\" x2=\"3.683\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.794\" x2=\"-3.429\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.794\" x2=\"3.683\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-2.794\" x2=\"3.683\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-2.54\" x2=\"-3.429\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"2.54\" x2=\"-3.429\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"3.175\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.302\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-1.524\" y1=\"0\" x2=\"-0.4572\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.4572\" y1=\"0\" x2=\"-0.4572\" y2=\"0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.4572\" y1=\"0\" x2=\"-0.4572\" y2=\"-0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.4318\" y1=\"0.762\" x2=\"0.4318\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.4318\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.4318\" y1=\"0\" x2=\"0.4318\" y2=\"-0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"3.429\" x2=\"-3.683\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-3.683\" x2=\"3.429\" y2=\"-3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-3.429\" x2=\"3.683\" y2=\"3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"3.683\" x2=\"-3.429\" y2=\"3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"3.683\" x2=\"3.683\" y2=\"3.429\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-3.683\" x2=\"3.683\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-3.429\" x2=\"-3.429\" y2=\"-3.683\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"3.429\" x2=\"-3.429\" y2=\"3.683\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"4.064\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.921\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050H075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nHorizontal, grid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0.508\" x2=\"-3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.302\" y1=\"0.508\" x2=\"-1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.778\" y1=\"0.508\" x2=\"1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.778\" y1=\"0.508\" x2=\"3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"3.302\" y1=\"0.508\" x2=\"3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"0.508\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"2.413\" x2=\"-0.3048\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-0.3048\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"2.413\" x2=\"0.3302\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"0.3302\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<wire x1=\"2.54\" y1=\"0\" x2=\"2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.302\" y=\"8.001\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"3.175\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-2.794\" y1=\"0.127\" x2=\"-2.286\" y2=\"0.508\" layer=\"51\"/>\n<rectangle x1=\"2.286\" y1=\"0.127\" x2=\"2.794\" y2=\"0.508\" layer=\"51\"/>\n</package>\n<package name=\"C075-032X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 3.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-1.524\" x2=\"4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.27\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-1.524\" x2=\"5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.27\" x2=\"-4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-0.508\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0.889\" x2=\"-0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"-0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0.889\" x2=\"0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.826\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-042X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 4.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-2.032\" x2=\"4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.778\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-2.032\" x2=\"5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.778\" x2=\"-4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.699\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-052X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 5.2 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.54\" x2=\"4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.286\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-2.54\" x2=\"5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.286\" x2=\"-4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-043X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 4.3 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.032\" x2=\"6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"1.524\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.032\" x2=\"6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"1.524\" x2=\"-6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-054X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 5.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.54\" x2=\"6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.032\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.54\" x2=\"6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.032\" x2=\"-6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.905\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-064X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 6.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.54\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102_152-062X184\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm + 15.2 mm, outline 6.2 x 18.4 mm</description>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"3.683\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"0\" x2=\"8.636\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.223\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"3.048\" x2=\"6.731\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.731\" y1=\"2.54\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.176\" y1=\"3.048\" x2=\"11.684\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"7.112\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"3.048\" x2=\"11.176\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.684\" y1=\"2.54\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"10.033\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-5.969\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-054X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 5.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.032\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"2.54\" x2=\"8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"2.54\" x2=\"9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.032\" x2=\"-8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.382\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-064X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 6.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.54\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.048\" x2=\"8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.048\" x2=\"9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.54\" x2=\"-8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-072X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 7.2 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.048\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.556\" x2=\"8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.556\" x2=\"9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.048\" x2=\"-8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.937\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-084X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 8.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.556\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.064\" x2=\"8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.064\" x2=\"9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.556\" x2=\"-8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.445\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-091X182\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 9.1 x 18.2 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.937\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.445\" x2=\"8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.445\" x2=\"9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.937\" x2=\"-8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.826\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-062X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 6.2 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.048\" x2=\"12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"2.54\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.048\" x2=\"13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"2.54\" x2=\"-12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.7\" y=\"3.429\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-074X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 7.4 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.556\" x2=\"12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.048\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.556\" x2=\"13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.048\" x2=\"-12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"3.937\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-087X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 8.7 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"4.318\" x2=\"12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.81\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"4.318\" x2=\"13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.81\" x2=\"-12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"4.699\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-108X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 10.8 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.334\" x2=\"12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"4.826\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.334\" x2=\"13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"4.826\" x2=\"-12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.715\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-113X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 11.3 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.588\" x2=\"12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"5.08\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.588\" x2=\"13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"5.08\" x2=\"-12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-093X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 9.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"4.572\" x2=\"15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"4.064\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"4.572\" x2=\"15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"4.064\" x2=\"-15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"4.953\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-113X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 11.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"5.588\" x2=\"15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"5.08\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"5.588\" x2=\"15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"5.08\" x2=\"-15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-134X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 13.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"6.604\" x2=\"15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"6.096\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"6.604\" x2=\"15.748\" y2=\"6.096\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-6.096\" x2=\"-15.24\" y2=\"-6.604\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"6.096\" x2=\"-15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"6.985\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-205X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 20.5 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"10.16\" x2=\"15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"9.652\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"10.16\" x2=\"15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"9.652\" x2=\"-15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-4.318\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-137X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 13.7 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"6.731\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.2372\" y=\"7.0612\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-162X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 16.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"8.001\" x2=\"18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"8.001\" x2=\"-18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-8.001\" x2=\"18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"8.001\" x2=\"-18.542\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"8.3312\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-182X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 18.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"9.017\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"9.3472\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-192X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 19.2 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"8.509\" x2=\"20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"8.001\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"8.509\" x2=\"20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"8.001\" x2=\"-20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-203X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 20.3 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"10.16\" x2=\"20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"9.652\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"10.16\" x2=\"20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"9.652\" x2=\"-20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.32\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-035X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.778\" x2=\"3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.524\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.778\" x2=\"3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.524\" x2=\"-3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-155X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 15.5 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"7.62\" x2=\"20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"7.112\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"7.62\" x2=\"20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"7.112\" x2=\"-20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-063X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 6.3 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-3.048\" x2=\"4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.794\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-3.048\" x2=\"5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-154X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 15.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"7.112\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-7.62\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-7.112\" x2=\"-15.748\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"7.62\" x2=\"15.748\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-7.62\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-7.112\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"7.112\" x2=\"-15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-173X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 17.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"8.509\" x2=\"15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"8.001\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"8.509\" x2=\"15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"8.001\" x2=\"-15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C0402K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0204 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1005</description>\n<wire x1=\"-0.425\" y1=\"0.2\" x2=\"0.425\" y2=\"0.2\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.425\" y1=\"-0.2\" x2=\"-0.425\" y2=\"-0.2\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<text x=\"-0.5\" y=\"0.425\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.5\" y=\"-1.45\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.5\" y1=\"-0.25\" x2=\"-0.225\" y2=\"0.25\" layer=\"51\"/>\n<rectangle x1=\"0.225\" y1=\"-0.25\" x2=\"0.5\" y2=\"0.25\" layer=\"51\"/>\n</package>\n<package name=\"C0603K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0603 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1608</description>\n<wire x1=\"-0.725\" y1=\"0.35\" x2=\"0.725\" y2=\"0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.725\" y1=\"-0.35\" x2=\"-0.725\" y2=\"-0.35\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<text x=\"-0.8\" y=\"0.65\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.8\" y=\"-1.65\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8\" y1=\"-0.4\" x2=\"-0.45\" y2=\"0.4\" layer=\"51\"/>\n<rectangle x1=\"0.45\" y1=\"-0.4\" x2=\"0.8\" y2=\"0.4\" layer=\"51\"/>\n</package>\n<package name=\"C0805K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0805 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 2012</description>\n<wire x1=\"-0.925\" y1=\"0.6\" x2=\"0.925\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.925\" y1=\"-0.6\" x2=\"-0.925\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1\" y=\"0.875\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-1.9\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1\" y1=\"-0.65\" x2=\"-0.5\" y2=\"0.65\" layer=\"51\"/>\n<rectangle x1=\"0.5\" y1=\"-0.65\" x2=\"1\" y2=\"0.65\" layer=\"51\"/>\n</package>\n<package name=\"C1206K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1206 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3216</description>\n<wire x1=\"-1.525\" y1=\"0.75\" x2=\"1.525\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-0.75\" x2=\"-1.525\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.1\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.1\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.1\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-0.8\" x2=\"1.6\" y2=\"0.8\" layer=\"51\"/>\n</package>\n<package name=\"C1210K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1210 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3225</description>\n<wire x1=\"-1.525\" y1=\"1.175\" x2=\"1.525\" y2=\"1.175\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-1.175\" x2=\"-1.525\" y2=\"-1.175\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-1.25\" x2=\"-1.1\" y2=\"1.25\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-1.25\" x2=\"1.6\" y2=\"1.25\" layer=\"51\"/>\n</package>\n<package name=\"C1812K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1812 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4532</description>\n<wire x1=\"-2.175\" y1=\"1.525\" x2=\"2.175\" y2=\"1.525\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.175\" y1=\"-1.525\" x2=\"-2.175\" y2=\"-1.525\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<text x=\"-2.25\" y=\"1.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.25\" y1=\"-1.6\" x2=\"-1.65\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"1.65\" y1=\"-1.6\" x2=\"2.25\" y2=\"1.6\" layer=\"51\"/>\n</package>\n<package name=\"C1825K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1825 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4564</description>\n<wire x1=\"-1.525\" y1=\"3.125\" x2=\"1.525\" y2=\"3.125\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-3.125\" x2=\"-1.525\" y2=\"-3.125\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"3.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-4.625\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-3.2\" x2=\"-1.1\" y2=\"3.2\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-3.2\" x2=\"1.6\" y2=\"3.2\" layer=\"51\"/>\n</package>\n<package name=\"C2220K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2220 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5650</description>\n<wire x1=\"-2.725\" y1=\"2.425\" x2=\"2.725\" y2=\"2.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-2.425\" x2=\"-2.725\" y2=\"-2.425\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"2.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-3.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-2.5\" x2=\"-2.2\" y2=\"2.5\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-2.5\" x2=\"2.8\" y2=\"2.5\" layer=\"51\"/>\n</package>\n<package name=\"C2225K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2225 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5664</description>\n<wire x1=\"-2.725\" y1=\"3.075\" x2=\"2.725\" y2=\"3.075\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-3.075\" x2=\"-2.725\" y2=\"-3.075\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"3.6\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-4.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-3.15\" x2=\"-2.2\" y2=\"3.15\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-3.15\" x2=\"2.8\" y2=\"3.15\" layer=\"51\"/>\n</package>\n<package name=\"HPC0201\">\n<description>&lt;b&gt; &lt;/b&gt;&lt;p&gt;\nSource: http://www.vishay.com/docs/10129/hpc0201a.pdf</description>\n<smd name=\"1\" x=\"-0.18\" y=\"0\" dx=\"0.2\" dy=\"0.35\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.18\" y=\"0\" dx=\"0.2\" dy=\"0.35\" layer=\"1\"/>\n<text x=\"-0.75\" y=\"0.74\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.785\" y=\"-1.865\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.305\" y1=\"-0.15\" x2=\"0.305\" y2=\"0.15\" layer=\"51\"/>\n</package>\n<package name=\"C0201\">\n<description>Source: http://www.avxcorp.com/docs/catalogs/cx5r.pdf</description>\n<smd name=\"1\" x=\"-0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.1\" x2=\"0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"-0.1\" layer=\"51\"/>\n</package>\n<package name=\"C1808\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-1.4732\" y1=\"0.9502\" x2=\"1.4732\" y2=\"0.9502\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.4478\" y1=\"-0.9502\" x2=\"1.4732\" y2=\"-0.9502\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<text x=\"-2.233\" y=\"1.827\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.233\" y=\"-2.842\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.275\" y1=\"-1.015\" x2=\"-1.225\" y2=\"1.015\" layer=\"51\"/>\n<rectangle x1=\"1.225\" y1=\"-1.015\" x2=\"2.275\" y2=\"1.015\" layer=\"51\"/>\n</package>\n<package name=\"C3640\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-3.8322\" y1=\"5.0496\" x2=\"3.8322\" y2=\"5.0496\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-3.8322\" y1=\"-5.0496\" x2=\"3.8322\" y2=\"-5.0496\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<text x=\"-4.647\" y=\"6.465\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-4.647\" y=\"-7.255\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-4.57\" y1=\"-5.1\" x2=\"-3.05\" y2=\"5.1\" layer=\"51\"/>\n<rectangle x1=\"3.05\" y1=\"-5.1\" x2=\"4.5688\" y2=\"5.1\" layer=\"51\"/>\n</package>\n<package name=\"C01005\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n<smd name=\"1\" x=\"-0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<text x=\"-0.4\" y=\"0.3\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.4\" y=\"-1.6\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.2\" y1=\"-0.1\" x2=\"-0.075\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"0.075\" y1=\"-0.1\" x2=\"0.2\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.05\" x2=\"0.15\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.1\" x2=\"0.15\" y2=\"-0.05\" layer=\"51\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"C-EU\">\n<wire x1=\"0\" y1=\"0\" x2=\"0\" y2=\"-0.508\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"0\" y2=\"-2.032\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"1.524\" y=\"0.381\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"1.524\" y=\"-4.699\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<rectangle x1=\"-2.032\" y1=\"-2.032\" x2=\"2.032\" y2=\"-1.524\" layer=\"94\"/>\n<rectangle x1=\"-2.032\" y1=\"-1.016\" x2=\"2.032\" y2=\"-0.508\" layer=\"94\"/>\n<pin name=\"1\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R270\"/>\n<pin name=\"2\" x=\"0\" y=\"-5.08\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"C-EU\" prefix=\"C\" uservalue=\"yes\">\n<description>&lt;B&gt;CAPACITOR&lt;/B&gt;, European symbol</description>\n<gates>\n<gate name=\"G$1\" symbol=\"C-EU\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"C0402\" package=\"C0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0504\" package=\"C0504\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0603\" package=\"C0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0805\" package=\"C0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1206\" package=\"C1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1210\" package=\"C1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1310\" package=\"C1310\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1608\" package=\"C1608\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812\" package=\"C1812\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825\" package=\"C1825\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2012\" package=\"C2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3216\" package=\"C3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3225\" package=\"C3225\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C4532\" package=\"C4532\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C4564\" package=\"C4564\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-024X044\" package=\"C025-024X044\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-025X050\" package=\"C025-025X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-030X050\" package=\"C025-030X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-040X050\" package=\"C025-040X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-050X050\" package=\"C025-050X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025-060X050\" package=\"C025-060X050\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C025_050-024X070\" package=\"C025_050-024X070\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-025X075\" package=\"C025_050-025X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-035X075\" package=\"C025_050-035X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-045X075\" package=\"C025_050-045X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"025_050-055X075\" package=\"C025_050-055X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-024X044\" package=\"C050-024X044\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-025X075\" package=\"C050-025X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-045X075\" package=\"C050-045X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-030X075\" package=\"C050-030X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-050X075\" package=\"C050-050X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-055X075\" package=\"C050-055X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-075X075\" package=\"C050-075X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050H075X075\" package=\"C050H075X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-032X103\" package=\"C075-032X103\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-042X103\" package=\"C075-042X103\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-052X106\" package=\"C075-052X106\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"102-043X133\" package=\"C102-043X133\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"102-054X133\" package=\"C102-054X133\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"102-064X133\" package=\"C102-064X133\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"102_152-062X184\" package=\"C102_152-062X184\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-054X183\" package=\"C150-054X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-064X183\" package=\"C150-064X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-072X183\" package=\"C150-072X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-084X183\" package=\"C150-084X183\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"150-091X182\" package=\"C150-091X182\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-062X268\" package=\"C225-062X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-074X268\" package=\"C225-074X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-087X268\" package=\"C225-087X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-108X268\" package=\"C225-108X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"225-113X268\" package=\"C225-113X268\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-093X316\" package=\"C275-093X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-113X316\" package=\"C275-113X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-134X316\" package=\"C275-134X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-205X316\" package=\"C275-205X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-137X374\" package=\"C325-137X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-162X374\" package=\"C325-162X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"325-182X374\" package=\"C325-182X374\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-192X418\" package=\"C375-192X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-203X418\" package=\"C375-203X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"050-035X075\" package=\"C050-035X075\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"375-155X418\" package=\"C375-155X418\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"075-063X106\" package=\"C075-063X106\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-154X316\" package=\"C275-154X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"275-173X316\" package=\"C275-173X316\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0402K\" package=\"C0402K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0603K\" package=\"C0603K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0805K\" package=\"C0805K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1206K\" package=\"C1206K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1210K\" package=\"C1210K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812K\" package=\"C1812K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825K\" package=\"C1825K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2220K\" package=\"C2220K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C2225K\" package=\"C2225K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"HPC0201\" package=\"HPC0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0201\" package=\"C0201\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1808\" package=\"C1808\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3640\" package=\"C3640\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"C01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"resistor\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;map name=\"nav_main\"&gt;\n&lt;area shape=\"rect\" coords=\"0,1,140,23\" href=\"../military_specs.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,24,140,51\" href=\"../about.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,52,140,77\" href=\"../rfq.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,78,139,103\" href=\"../products.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,102,138,128\" href=\"../excess_inventory.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,129,138,150\" href=\"../edge.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,151,139,178\" href=\"../industry_links.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"0,179,139,201\" href=\"../comments.asp\" title=\"\"&gt;\n&lt;area shape=\"rect\" coords=\"1,203,138,231\" href=\"../directory.asp\" title=\"\"&gt;\n&lt;area shape=\"default\" nohref&gt;\n&lt;/map&gt;\n\n&lt;html&gt;\n\n&lt;title&gt;&lt;/title&gt;\n\n &lt;LINK REL=\"StyleSheet\" TYPE=\"text/css\" HREF=\"style-sheet.css\"&gt;\n\n&lt;body bgcolor=\"#ffffff\" text=\"#000000\" marginwidth=\"0\" marginheight=\"0\" topmargin=\"0\" leftmargin=\"0\"&gt;\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0 height=\"55%\"&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;/td&gt;\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL 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-&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n 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RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n    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CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n  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EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD 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ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"4.953\" y1=\"-0.4064\" x2=\"5.4102\" y2=\"0.4064\" layer=\"21\"/>\n<rectangle x1=\"-5.4102\" y1=\"-0.4064\" x2=\"-4.953\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"V235/17\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V235, grid 17.78 mm</description>\n<wire x1=\"-6.731\" y1=\"2.921\" x2=\"6.731\" y2=\"2.921\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.112\" y1=\"2.54\" x2=\"-7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.731\" y1=\"-2.921\" x2=\"-6.731\" y2=\"-2.921\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"2.54\" x2=\"7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.89\" y1=\"0\" x2=\"7.874\" y2=\"0\" width=\"1.016\" layer=\"51\"/>\n<wire x1=\"-7.874\" y1=\"0\" x2=\"-8.89\" y2=\"0\" width=\"1.016\" layer=\"51\"/>\n<wire x1=\"-7.112\" y1=\"-2.54\" x2=\"-6.731\" y2=\"-2.921\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"6.731\" y1=\"2.921\" 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ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0102R\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0102W\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"0\" dx=\"0.6\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.95\" y=\"0\" dx=\"0.6\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0204R\">\n<description>&lt;b&gt;CECC Size RC3715&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire 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x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.684\" y1=\"0.6\" x2=\"-0.684\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.684\" y1=\"-0.6\" x2=\"0.684\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207R\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.2125\" y1=\"1\" x2=\"-1.2125\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.2125\" y1=\"-1\" x2=\"1.2125\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.2225\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.2225\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207W\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.149\" y1=\"1\" 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name=\"2\" x=\"7.95\" y=\"0\" dx=\"3.94\" dy=\"5.97\" layer=\"1\"/>\n<text x=\"-8.75\" y=\"3.9\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-8.75\" y=\"-5.15\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"R1218\">\n<description>&lt;b&gt;CRCW1218 Thick Film, Rectangular Chip Resistors&lt;/b&gt;&lt;p&gt;\nSource: http://www.vishay.com .. dcrcw.pdf</description>\n<wire x1=\"-0.913\" y1=\"-2.219\" x2=\"0.939\" y2=\"-2.219\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.913\" y1=\"2.219\" x2=\"-0.939\" y2=\"2.219\" width=\"0.1524\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.475\" y=\"0\" dx=\"1.05\" dy=\"4.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.475\" y=\"0\" dx=\"1.05\" dy=\"4.9\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"2.54\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-3.81\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.651\" y1=\"-2.3\" x2=\"-0.9009\" y2=\"2.3\" layer=\"51\"/>\n<rectangle x1=\"0.9144\" y1=\"-2.3\" x2=\"1.6645\" y2=\"2.3\" layer=\"51\"/>\n</package>\n<package name=\"1812X7R\">\n<description>&lt;b&gt;Chip Monolithic Ceramic Capacitors&lt;/b&gt; Medium Voltage High Capacitance for General Use&lt;p&gt;\nSource: http://www.murata.com .. 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http://www.mouser.com/ds/2/392/products_18-2245.pdf</description>\n<wire x1=\"0.7275\" y1=\"-1.5228\" x2=\"-0.7277\" y2=\"-1.5228\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.7275\" y1=\"1.5228\" x2=\"-0.7152\" y2=\"1.5228\" width=\"0.1524\" layer=\"51\"/>\n<smd name=\"2\" x=\"0.822\" y=\"0\" dx=\"1\" dy=\"3.2\" layer=\"1\"/>\n<smd name=\"1\" x=\"-0.822\" y=\"0\" dx=\"1\" dy=\"3.2\" layer=\"1\"/>\n<text x=\"-1.4\" y=\"1.8\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.4\" y=\"-3\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8\" y1=\"-1.6\" x2=\"-0.4\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"0.4\" y1=\"-1.6\" x2=\"0.8\" y2=\"1.6\" layer=\"51\"/>\n</package>\n<package name=\"R01005\">\n<smd name=\"1\" x=\"-0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<text x=\"-0.4\" y=\"0.3\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.4\" y=\"-1.6\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.2\" y1=\"-0.1\" x2=\"-0.075\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"0.075\" y1=\"-0.1\" x2=\"0.2\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.05\" x2=\"0.15\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.1\" x2=\"0.15\" y2=\"-0.05\" layer=\"51\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"R-EU-1\">\n<wire x1=\"-2.54\" y1=\"-0.889\" x2=\"2.54\" y2=\"-0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"0.889\" x2=\"-2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-0.889\" x2=\"2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"-0.889\" x2=\"-2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-3.81\" y=\"1.4986\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-3.302\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"2\" x=\"5.08\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"1\" x=\"-5.08\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"R-EU_\" prefix=\"R\" uservalue=\"yes\">\n<description>&lt;B&gt;RESISTOR&lt;/B&gt;, European symbol</description>\n<gates>\n<gate name=\"G$1\" symbol=\"R-EU-1\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"R0402\" package=\"R0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0603\" package=\"R0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0805\" package=\"R0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0805W\" package=\"R0805W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1206\" package=\"R1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1206W\" package=\"R1206W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1210\" package=\"R1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1210W\" package=\"R1210W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2010\" package=\"R2010\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2010W\" package=\"R2010W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2012\" package=\"R2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2012W\" package=\"R2012W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2512\" package=\"R2512\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2512W\" package=\"R2512W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3216\" package=\"R3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3216W\" package=\"R3216W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3225\" package=\"R3225\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3225W\" package=\"R3225W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R5025\" package=\"R5025\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R5025W\" package=\"R5025W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R6332\" package=\"R6332\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R6332W\" package=\"R6332W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M0805\" package=\"M0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M1206\" package=\"M1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M1406\" package=\"M1406\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M2012\" package=\"M2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M2309\" package=\"M2309\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M3216\" package=\"M3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M3516\" package=\"M3516\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M5923\" package=\"M5923\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/5\" package=\"0204/5\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/7\" package=\"0204/7\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0204/2V\" package=\"0204V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/10\" package=\"0207/10\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/12\" package=\"0207/12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/15\" package=\"0207/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/2V\" package=\"0207/2V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/5V\" package=\"0207/5V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0207/7\" package=\"0207/7\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0309/10\" package=\"0309/10\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0309/12\" package=\"0309/12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0309/V\" package=\"0309V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0411/12\" package=\"0411/12\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0411/15\" package=\"0411/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0411/3V\" package=\"0411V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0414/15\" package=\"0414/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0414/5V\" package=\"0414V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/17\" package=\"0617/17\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/22\" package=\"0617/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0617/5V\" package=\"0617V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0922/22\" package=\"0922/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0613/5V\" package=\"P0613V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0613/15\" package=\"P0613/15\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0817/22\" package=\"P0817/22\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0817/7V\" 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA55\" package=\"VTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VTA56\" package=\"VTA56\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTA55\" package=\"VMTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTB60\" package=\"VMTB60\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R4527\" 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pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC4527\" package=\"WSC4527\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC6927\" package=\"WSC6927\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1218\" package=\"R1218\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1812X7R\" package=\"1812X7R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PRL1632\" package=\"PRL1632\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"R01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"10M08SAE144\">\n<packages>\n<package name=\"EQFP144\">\n<description>&lt;b&gt;EQFP144&lt;/b&gt;&lt;p&gt;\nSource: http://www.altera.com/literature/ds/144-EQFP.pdf</description>\n<wire x1=\"-9.8984\" y1=\"9.4\" x2=\"-9.4\" y2=\"9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-9.4\" y1=\"-9.8984\" x2=\"9.4\" y2=\"-9.8984\" width=\"0.2032\" layer=\"21\"/>\n<wire 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x2=\"1.016\" y2=\"0.254\" layer=\"31\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"10M08SAE144\">\n<wire x1=\"-63.5\" y1=\"53.34\" x2=\"66.04\" y2=\"53.34\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"GND1\" x=\"-68.58\" y=\"50.8\" length=\"middle\"/>\n<pin name=\"GND2\" x=\"-68.58\" y=\"48.26\" length=\"middle\"/>\n<pin name=\"GND3\" x=\"-68.58\" y=\"45.72\" length=\"middle\"/>\n<pin name=\"GND4\" x=\"-68.58\" y=\"43.18\" length=\"middle\"/>\n<pin name=\"GND5\" x=\"-68.58\" y=\"40.64\" length=\"middle\"/>\n<pin name=\"GND6\" x=\"-68.58\" y=\"38.1\" length=\"middle\"/>\n<pin name=\"GND7\" x=\"-68.58\" y=\"35.56\" length=\"middle\"/>\n<pin name=\"GND8\" x=\"-68.58\" y=\"33.02\" length=\"middle\"/>\n<pin name=\"GND9\" x=\"-68.58\" y=\"30.48\" length=\"middle\"/>\n<pin name=\"GND10\" x=\"-68.58\" y=\"27.94\" length=\"middle\"/>\n<pin name=\"GND11\" x=\"-68.58\" y=\"25.4\" length=\"middle\"/>\n<pin name=\"GND12\" x=\"-68.58\" y=\"22.86\" length=\"middle\"/>\n<pin name=\"VCC_ONE1\" x=\"12.7\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE2\" x=\"15.24\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE3\" x=\"17.78\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE4\" x=\"20.32\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE5\" x=\"22.86\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE6\" x=\"25.4\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE7\" x=\"27.94\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE10\" x=\"30.48\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE11\" x=\"33.02\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCC_ONE12\" x=\"35.56\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA1\" x=\"40.64\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA2\" x=\"43.18\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA3\" x=\"45.72\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA4\" x=\"48.26\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA5\" x=\"50.8\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VCCA6\" x=\"53.34\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<wire x1=\"66.04\" y1=\"53.34\" x2=\"66.04\" y2=\"-55.88\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"VCCIO1A\" x=\"71.12\" y=\"48.26\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO1B\" x=\"71.12\" y=\"45.72\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO2\" x=\"71.12\" y=\"43.18\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO3\" x=\"71.12\" y=\"40.64\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO3@2\" x=\"71.12\" y=\"38.1\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO4\" x=\"71.12\" y=\"35.56\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO5\" x=\"71.12\" y=\"33.02\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO6\" x=\"71.12\" y=\"30.48\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO6@2\" x=\"71.12\" y=\"27.94\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO7\" x=\"71.12\" y=\"25.4\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO8\" x=\"71.12\" y=\"22.86\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCCIO8@2\" x=\"71.12\" y=\"20.32\" length=\"middle\" rot=\"R180\"/>\n<wire x1=\"-63.5\" y1=\"53.34\" x2=\"-63.5\" y2=\"-55.88\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"IO1A_6\" x=\"-68.58\" y=\"12.7\" length=\"middle\"/>\n<pin name=\"IO1A_7\" x=\"-68.58\" y=\"10.16\" length=\"middle\"/>\n<pin name=\"IO1A_8\" x=\"-68.58\" y=\"7.62\" length=\"middle\"/>\n<pin name=\"IO1A_10\" x=\"-68.58\" y=\"5.08\" length=\"middle\"/>\n<pin name=\"IO1A_11\" x=\"-68.58\" y=\"2.54\" length=\"middle\"/>\n<pin name=\"IO1A_12\" x=\"-68.58\" y=\"0\" length=\"middle\"/>\n<pin name=\"IO1A_13\" x=\"-68.58\" y=\"-2.54\" length=\"middle\"/>\n<pin name=\"IO1A_14\" x=\"-68.58\" y=\"-5.08\" length=\"middle\"/>\n<pin name=\"JTAGEN\" x=\"-68.58\" y=\"-7.62\" length=\"middle\"/>\n<pin name=\"TMS\" x=\"-68.58\" y=\"-10.16\" length=\"middle\"/>\n<pin name=\"VREFB1\" x=\"-68.58\" y=\"-12.7\" length=\"middle\"/>\n<pin name=\"TCK\" x=\"-68.58\" y=\"-15.24\" length=\"middle\"/>\n<pin name=\"TDI\" x=\"-68.58\" y=\"-17.78\" length=\"middle\"/>\n<pin name=\"TDO\" x=\"-68.58\" y=\"-20.32\" length=\"middle\"/>\n<pin name=\"IO1B_21\" x=\"-68.58\" y=\"-22.86\" length=\"middle\"/>\n<pin name=\"IO1B_22\" x=\"-68.58\" y=\"-25.4\" length=\"middle\"/>\n<pin name=\"IO1B_24\" x=\"-68.58\" y=\"-27.94\" length=\"middle\"/>\n<pin name=\"IO1B_25\" x=\"-68.58\" y=\"-30.48\" length=\"middle\"/>\n<pin name=\"CLK0N\" x=\"-68.58\" y=\"-33.02\" length=\"middle\"/>\n<pin name=\"CLK0P\" x=\"-68.58\" y=\"-35.56\" length=\"middle\"/>\n<pin name=\"CLK1N\" x=\"-68.58\" y=\"-38.1\" length=\"middle\"/>\n<pin name=\"CLK1P\" x=\"-68.58\" y=\"-40.64\" length=\"middle\"/>\n<pin name=\"VREFB2\" x=\"-68.58\" y=\"-43.18\" length=\"middle\"/>\n<pin name=\"PLL_CLKOUTN\" x=\"-68.58\" y=\"-45.72\" length=\"middle\"/>\n<pin name=\"PLL_CLKOUTP\" x=\"-68.58\" y=\"-48.26\" length=\"middle\"/>\n<wire x1=\"-63.5\" y1=\"-55.88\" x2=\"66.04\" y2=\"-55.88\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"IO3_38\" x=\"-20.32\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_39\" x=\"-17.78\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_41\" x=\"-15.24\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_43\" x=\"-12.7\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_44\" x=\"-10.16\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_45\" x=\"-7.62\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_46\" x=\"-5.08\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_47\" x=\"-2.54\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"VREFB3\" x=\"0\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_50\" x=\"2.54\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_52\" x=\"5.08\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_54\" x=\"7.62\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_55\" x=\"10.16\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_56\" x=\"12.7\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_57\" x=\"15.24\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_58\" x=\"17.78\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_59\" x=\"20.32\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO3_60\" x=\"22.86\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"VREFB4\" x=\"27.94\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_62\" x=\"30.48\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_64\" x=\"33.02\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_65\" x=\"35.56\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_66\" x=\"38.1\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_69\" x=\"40.64\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO4_70\" x=\"43.18\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"IO5_74\" x=\"71.12\" y=\"-53.34\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_75\" x=\"71.12\" y=\"-50.8\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_76\" x=\"71.12\" y=\"-48.26\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_77\" x=\"71.12\" y=\"-45.72\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_78\" x=\"71.12\" y=\"-43.18\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_79\" x=\"71.12\" y=\"-40.64\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VREFB5\" x=\"71.12\" y=\"-38.1\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_81\" x=\"71.12\" y=\"-35.56\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_84\" x=\"71.12\" y=\"-33.02\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_85\" x=\"71.12\" y=\"-30.48\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_86\" x=\"71.12\" y=\"-27.94\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO5_87\" x=\"71.12\" y=\"-25.4\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK2P\" x=\"71.12\" y=\"-20.32\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK2N\" x=\"71.12\" y=\"-17.78\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK3P\" x=\"71.12\" y=\"-15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK3N\" x=\"71.12\" y=\"-12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_92\" x=\"71.12\" y=\"-10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_93\" x=\"71.12\" y=\"-7.62\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_96\" x=\"71.12\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VREFB6\" x=\"71.12\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_98\" x=\"71.12\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_99\" x=\"71.12\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_100\" x=\"71.12\" y=\"5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_101\" x=\"71.12\" y=\"7.62\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_102\" x=\"71.12\" y=\"10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_105\" x=\"71.12\" y=\"12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"IO6_106\" x=\"71.12\" y=\"15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"GND_PAD\" x=\"-68.58\" y=\"20.32\" length=\"middle\"/>\n<pin name=\"IO7_110\" x=\"7.62\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_111\" x=\"5.08\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VREFB7\" x=\"2.54\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_113\" x=\"0\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_114\" x=\"-2.54\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_118\" x=\"-5.08\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO7_119\" x=\"-7.62\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_120\" x=\"-12.7\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_121\" x=\"-15.24\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_122\" x=\"-17.78\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"VREFB8\" x=\"-20.32\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_124\" x=\"-22.86\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"CONFIG_SEL\" x=\"-25.4\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_127\" x=\"-27.94\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"NCONFIG\" x=\"-30.48\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_130\" x=\"-33.02\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_131\" x=\"-35.56\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_132\" x=\"-38.1\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_134\" x=\"-40.64\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_135\" x=\"-43.18\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"NSTATUS\" x=\"-45.72\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"CONF_DONE\" x=\"-48.26\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_140\" x=\"-50.8\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<pin name=\"IO8_141\" x=\"-53.34\" y=\"58.42\" length=\"middle\" rot=\"R270\"/>\n<text x=\"-17.78\" y=\"17.78\" size=\"1.27\" layer=\"95\">&gt;NAME</text>\n<text x=\"-17.78\" y=\"15.24\" size=\"1.27\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"REFGND\" x=\"-68.58\" y=\"17.78\" length=\"middle\"/>\n<pin name=\"ADC_VREF\" x=\"-43.18\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n<pin name=\"ANAIN1\" x=\"-40.64\" y=\"-60.96\" length=\"middle\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"10M08SAE144\">\n<gates>\n<gate name=\"G$1\" symbol=\"10M08SAE144\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"EQFP144\">\n<connects>\n<connect gate=\"G$1\" pin=\"ADC_VREF\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"ANAIN1\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"CLK0N\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"CLK0P\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"CLK1N\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"CLK1P\" pad=\"29\"/>\n<connect gate=\"G$1\" pin=\"CLK2N\" pad=\"89\"/>\n<connect gate=\"G$1\" pin=\"CLK2P\" pad=\"88\"/>\n<connect gate=\"G$1\" pin=\"CLK3N\" pad=\"91\"/>\n<connect gate=\"G$1\" pin=\"CLK3P\" pad=\"90\"/>\n<connect gate=\"G$1\" pin=\"CONFIG_SEL\" pad=\"126\"/>\n<connect gate=\"G$1\" pin=\"CONF_DONE\" pad=\"138\"/>\n<connect gate=\"G$1\" pin=\"GND1\" pad=\"95\"/>\n<connect gate=\"G$1\" pin=\"GND10\" pad=\"116\"/>\n<connect gate=\"G$1\" pin=\"GND11\" pad=\"104\"/>\n<connect gate=\"G$1\" pin=\"GND12\" pad=\"63\"/>\n<connect gate=\"G$1\" pin=\"GND2\" pad=\"83\"/>\n<connect gate=\"G$1\" pin=\"GND3\" pad=\"68\"/>\n<connect gate=\"G$1\" pin=\"GND4\" pad=\"53\"/>\n<connect gate=\"G$1\" pin=\"GND5\" pad=\"42\"/>\n<connect gate=\"G$1\" pin=\"GND6\" pad=\"142\"/>\n<connect gate=\"G$1\" pin=\"GND7\" pad=\"137\"/>\n<connect gate=\"G$1\" pin=\"GND8\" pad=\"133\"/>\n<connect gate=\"G$1\" pin=\"GND9\" pad=\"125\"/>\n<connect gate=\"G$1\" pin=\"GND_PAD\" pad=\"E\"/>\n<connect gate=\"G$1\" pin=\"IO1A_10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"IO1A_11\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"IO1A_12\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"IO1A_13\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"IO1A_14\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"IO1A_6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"IO1A_7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"IO1A_8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"IO1B_21\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"IO1B_22\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"IO1B_24\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"IO1B_25\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"IO3_38\" pad=\"38\"/>\n<connect gate=\"G$1\" pin=\"IO3_39\" pad=\"39\"/>\n<connect gate=\"G$1\" pin=\"IO3_41\" pad=\"41\"/>\n<connect gate=\"G$1\" pin=\"IO3_43\" pad=\"43\"/>\n<connect gate=\"G$1\" pin=\"IO3_44\" pad=\"44\"/>\n<connect gate=\"G$1\" pin=\"IO3_45\" pad=\"45\"/>\n<connect gate=\"G$1\" pin=\"IO3_46\" pad=\"46\"/>\n<connect gate=\"G$1\" pin=\"IO3_47\" pad=\"47\"/>\n<connect gate=\"G$1\" pin=\"IO3_50\" pad=\"50\"/>\n<connect gate=\"G$1\" pin=\"IO3_52\" pad=\"52\"/>\n<connect gate=\"G$1\" pin=\"IO3_54\" pad=\"54\"/>\n<connect gate=\"G$1\" pin=\"IO3_55\" pad=\"55\"/>\n<connect gate=\"G$1\" pin=\"IO3_56\" pad=\"56\"/>\n<connect gate=\"G$1\" pin=\"IO3_57\" pad=\"57\"/>\n<connect gate=\"G$1\" pin=\"IO3_58\" pad=\"58\"/>\n<connect gate=\"G$1\" pin=\"IO3_59\" pad=\"59\"/>\n<connect gate=\"G$1\" pin=\"IO3_60\" pad=\"60\"/>\n<connect gate=\"G$1\" pin=\"IO4_62\" pad=\"62\"/>\n<connect gate=\"G$1\" pin=\"IO4_64\" pad=\"64\"/>\n<connect gate=\"G$1\" pin=\"IO4_65\" pad=\"65\"/>\n<connect gate=\"G$1\" pin=\"IO4_66\" pad=\"66\"/>\n<connect gate=\"G$1\" pin=\"IO4_69\" pad=\"69\"/>\n<connect gate=\"G$1\" pin=\"IO4_70\" pad=\"70\"/>\n<connect gate=\"G$1\" pin=\"IO5_74\" pad=\"74\"/>\n<connect gate=\"G$1\" pin=\"IO5_75\" pad=\"75\"/>\n<connect gate=\"G$1\" pin=\"IO5_76\" pad=\"76\"/>\n<connect gate=\"G$1\" pin=\"IO5_77\" pad=\"77\"/>\n<connect gate=\"G$1\" pin=\"IO5_78\" pad=\"78\"/>\n<connect gate=\"G$1\" pin=\"IO5_79\" pad=\"79\"/>\n<connect gate=\"G$1\" pin=\"IO5_81\" pad=\"81\"/>\n<connect gate=\"G$1\" pin=\"IO5_84\" pad=\"84\"/>\n<connect gate=\"G$1\" pin=\"IO5_85\" pad=\"85\"/>\n<connect gate=\"G$1\" pin=\"IO5_86\" pad=\"86\"/>\n<connect gate=\"G$1\" pin=\"IO5_87\" pad=\"87\"/>\n<connect gate=\"G$1\" pin=\"IO6_100\" pad=\"100\"/>\n<connect gate=\"G$1\" pin=\"IO6_101\" pad=\"101\"/>\n<connect gate=\"G$1\" pin=\"IO6_102\" pad=\"102\"/>\n<connect gate=\"G$1\" pin=\"IO6_105\" pad=\"105\"/>\n<connect gate=\"G$1\" pin=\"IO6_106\" pad=\"106\"/>\n<connect gate=\"G$1\" pin=\"IO6_92\" pad=\"92\"/>\n<connect gate=\"G$1\" pin=\"IO6_93\" pad=\"93\"/>\n<connect gate=\"G$1\" pin=\"IO6_96\" pad=\"96\"/>\n<connect gate=\"G$1\" pin=\"IO6_98\" pad=\"98\"/>\n<connect gate=\"G$1\" pin=\"IO6_99\" pad=\"99\"/>\n<connect gate=\"G$1\" pin=\"IO7_110\" pad=\"110\"/>\n<connect gate=\"G$1\" pin=\"IO7_111\" pad=\"111\"/>\n<connect gate=\"G$1\" pin=\"IO7_113\" pad=\"113\"/>\n<connect gate=\"G$1\" pin=\"IO7_114\" pad=\"114\"/>\n<connect gate=\"G$1\" pin=\"IO7_118\" pad=\"118\"/>\n<connect gate=\"G$1\" pin=\"IO7_119\" pad=\"119\"/>\n<connect gate=\"G$1\" pin=\"IO8_120\" pad=\"120\"/>\n<connect gate=\"G$1\" pin=\"IO8_121\" pad=\"121\"/>\n<connect gate=\"G$1\" pin=\"IO8_122\" pad=\"122\"/>\n<connect gate=\"G$1\" pin=\"IO8_124\" pad=\"124\"/>\n<connect gate=\"G$1\" pin=\"IO8_127\" pad=\"127\"/>\n<connect gate=\"G$1\" pin=\"IO8_130\" pad=\"130\"/>\n<connect gate=\"G$1\" pin=\"IO8_131\" pad=\"131\"/>\n<connect gate=\"G$1\" pin=\"IO8_132\" pad=\"132\"/>\n<connect gate=\"G$1\" pin=\"IO8_134\" pad=\"134\"/>\n<connect gate=\"G$1\" pin=\"IO8_135\" pad=\"135\"/>\n<connect gate=\"G$1\" pin=\"IO8_140\" pad=\"140\"/>\n<connect gate=\"G$1\" pin=\"IO8_141\" pad=\"141\"/>\n<connect gate=\"G$1\" pin=\"JTAGEN\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"NCONFIG\" pad=\"129\"/>\n<connect gate=\"G$1\" pin=\"NSTATUS\" pad=\"136\"/>\n<connect gate=\"G$1\" pin=\"PLL_CLKOUTN\" pad=\"32\"/>\n<connect gate=\"G$1\" pin=\"PLL_CLKOUTP\" pad=\"33\"/>\n<connect gate=\"G$1\" pin=\"REFGND\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"TCK\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"TDI\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"TDO\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"TMS\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"VCCA1\" pad=\"35\"/>\n<connect gate=\"G$1\" pin=\"VCCA2\" pad=\"34\"/>\n<connect gate=\"G$1\" pin=\"VCCA3\" pad=\"107\"/>\n<connect gate=\"G$1\" pin=\"VCCA4\" pad=\"143\"/>\n<connect gate=\"G$1\" pin=\"VCCA5\" pad=\"71\"/>\n<connect gate=\"G$1\" pin=\"VCCA6\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"VCCIO1A\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VCCIO1B\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"VCCIO2\" pad=\"31\"/>\n<connect gate=\"G$1\" pin=\"VCCIO3\" pad=\"49\"/>\n<connect gate=\"G$1\" pin=\"VCCIO3@2\" pad=\"40\"/>\n<connect gate=\"G$1\" pin=\"VCCIO4\" pad=\"67\"/>\n<connect gate=\"G$1\" pin=\"VCCIO5\" pad=\"82\"/>\n<connect gate=\"G$1\" pin=\"VCCIO6\" pad=\"94\"/>\n<connect gate=\"G$1\" pin=\"VCCIO6@2\" pad=\"103\"/>\n<connect gate=\"G$1\" pin=\"VCCIO7\" pad=\"117\"/>\n<connect gate=\"G$1\" pin=\"VCCIO8\" pad=\"139\"/>\n<connect gate=\"G$1\" pin=\"VCCIO8@2\" pad=\"128\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE1\" pad=\"73\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE10\" pad=\"109\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE11\" pad=\"108\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE12\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE2\" pad=\"72\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE3\" pad=\"51\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE4\" pad=\"37\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE5\" pad=\"36\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE6\" pad=\"144\"/>\n<connect gate=\"G$1\" pin=\"VCC_ONE7\" pad=\"115\"/>\n<connect gate=\"G$1\" pin=\"VREFB1\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"VREFB2\" pad=\"30\"/>\n<connect gate=\"G$1\" pin=\"VREFB3\" pad=\"48\"/>\n<connect gate=\"G$1\" pin=\"VREFB4\" pad=\"61\"/>\n<connect gate=\"G$1\" pin=\"VREFB5\" pad=\"80\"/>\n<connect gate=\"G$1\" pin=\"VREFB6\" pad=\"97\"/>\n<connect gate=\"G$1\" pin=\"VREFB7\" pad=\"112\"/>\n<connect gate=\"G$1\" pin=\"VREFB8\" pad=\"123\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"crystal\">\n<description>&lt;b&gt;Crystals and Crystal Resonators&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"ASE\">\n<description>&lt;b&gt;3.3Vdc CMOS SMD CRYSTAL CLOCK OSCILLATOR&lt;/b&gt; ASE Series&lt;p&gt;\nSource: www.abracon.com</description>\n<wire x1=\"-1.3\" y1=\"1.15\" x2=\"1.3\" y2=\"1.15\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.5\" y1=\"0.95\" x2=\"1.5\" y2=\"-0.95\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.3\" y1=\"-1.15\" x2=\"-1.3\" y2=\"-1.15\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-0.95\" x2=\"-1.5\" y2=\"0.95\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.3\" y1=\"1.15\" x2=\"-1.5\" y2=\"0.95\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"1.5\" y1=\"0.95\" x2=\"1.3\" y2=\"1.15\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"-1.5\" y1=\"-0.95\" x2=\"-1.3\" y2=\"-1.15\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"1.3\" y1=\"-1.15\" x2=\"1.5\" y2=\"-0.95\" width=\"0.2032\" layer=\"51\" curve=\"-90\"/>\n<circle x=\"-1\" y=\"-0.7\" radius=\"0.1802\" width=\"0\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.05\" y=\"-0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.05\" y=\"-0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\"/>\n<smd name=\"3\" x=\"1.05\" y=\"0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-1.05\" y=\"0.825\" dx=\"0.9\" dy=\"0.65\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-2.25\" y=\"1.5\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.75\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"ASE\">\n<wire x1=\"-7.62\" y1=\"7.62\" x2=\"-7.62\" y2=\"-7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-7.62\" x2=\"-7.62\" y2=\"-7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-7.62\" x2=\"7.62\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-5.08\" x2=\"7.62\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"0\" x2=\"7.62\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-7.62\" y1=\"7.62\" x2=\"7.62\" y2=\"7.62\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"5.08\" x2=\"6.35\" y2=\"0\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"6.35\" y1=\"0\" x2=\"2.54\" y2=\"-2.54\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-2.54\" x2=\"-1.27\" y2=\"-5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"-5.08\" x2=\"-1.27\" y2=\"-3.175\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"-3.175\" x2=\"-1.27\" y2=\"3.175\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"3.175\" x2=\"-1.27\" y2=\"5.08\" width=\"0.4064\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"3.175\" x2=\"-1.27\" y2=\"3.175\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-3.175\" x2=\"-1.27\" y2=\"-3.175\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"6.35\" y1=\"0\" x2=\"7.62\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-4.826\" y1=\"-0.381\" x2=\"-4.826\" y2=\"0.381\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-4.826\" y1=\"0.381\" x2=\"-2.794\" y2=\"0.381\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.794\" y1=\"0.381\" x2=\"-2.794\" y2=\"-0.381\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-4.826\" y1=\"-0.381\" x2=\"-2.794\" y2=\"-0.381\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"-1.016\" x2=\"-3.81\" y2=\"-1.016\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-1.016\" x2=\"-2.54\" y2=\"-1.016\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"1.016\" x2=\"-3.81\" y2=\"3.175\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-3.175\" x2=\"-3.81\" y2=\"-1.016\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-5.08\" y1=\"1.016\" x2=\"-2.54\" y2=\"1.016\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-5.08\" x2=\"2.54\" y2=\"-2.54\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-5.08\" x2=\"2.54\" y2=\"-5.08\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"-7.62\" y=\"8.255\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-7.62\" y=\"-10.16\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<text x=\"-6.985\" y=\"4.318\" size=\"1.524\" layer=\"95\">VDD</text>\n<text x=\"-6.985\" y=\"-5.842\" size=\"1.524\" layer=\"95\">GND</text>\n<text x=\"-0.127\" y=\"-0.762\" size=\"1.524\" layer=\"95\">OUT</text>\n<text x=\"2.54\" y=\"-7.112\" size=\"1.524\" layer=\"95\">TRI</text>\n<pin name=\"GND\" x=\"-12.7\" y=\"-5.08\" visible=\"pad\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"VDD\" x=\"-12.7\" y=\"5.08\" visible=\"pad\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"OUT\" x=\"12.7\" y=\"0\" visible=\"pad\" length=\"middle\" direction=\"out\" rot=\"R180\"/>\n<pin name=\"TRI\" x=\"12.7\" y=\"-5.08\" visible=\"pad\" length=\"middle\" direction=\"in\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"ASE\">\n<description>&lt;b&gt;3.3Vdc CMOS SMD CRYSTAL CLOCK OSCILLATOR&lt;/b&gt;&lt;p&gt;\nSOurce: www.abracon.com</description>\n<gates>\n<gate name=\"G$1\" symbol=\"ASE\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"ASE\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"OUT\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"TRI\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"led\">\n<description>&lt;b&gt;LEDs&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;br&gt;\nExtended by Federico Battaglin &lt;author&gt;&amp;lt;federico.rd@fdpinternational.com&amp;gt;&lt;/author&gt; with DUOLED</description>\n<packages>\n<package name=\"1206\">\n<description>&lt;b&gt;CHICAGO MINIATURE LAMP, INC.&lt;/b&gt;&lt;p&gt;\n7022X Series SMT LEDs 1206 Package Size</description>\n<wire x1=\"1.55\" y1=\"-0.75\" x2=\"-1.55\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.55\" y1=\"-0.75\" x2=\"-1.55\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.55\" y1=\"0.75\" x2=\"1.55\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.55\" y1=\"0.75\" x2=\"1.55\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.55\" y1=\"-0.5\" x2=\"0.55\" y2=\"-0.5\" width=\"0.1016\" layer=\"21\" curve=\"95.452622\"/>\n<wire x1=\"-0.55\" y1=\"-0.5\" x2=\"-0.55\" y2=\"0.5\" width=\"0.1016\" layer=\"51\" curve=\"-84.547378\"/>\n<wire x1=\"-0.55\" y1=\"0.5\" x2=\"0.55\" y2=\"0.5\" width=\"0.1016\" layer=\"21\" curve=\"-95.452622\"/>\n<wire x1=\"0.55\" y1=\"0.5\" x2=\"0.55\" y2=\"-0.5\" width=\"0.1016\" layer=\"51\" curve=\"-84.547378\"/>\n<smd name=\"A\" x=\"-1.422\" y=\"0\" dx=\"1.6\" dy=\"1.803\" layer=\"1\"/>\n<smd name=\"C\" x=\"1.422\" y=\"0\" dx=\"1.6\" dy=\"1.803\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"1.27\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.1\" y1=\"-0.1\" x2=\"0.1\" y2=\"0.1\" layer=\"21\"/>\n<rectangle x1=\"0.45\" y1=\"-0.7\" x2=\"0.8\" y2=\"-0.45\" layer=\"51\"/>\n<rectangle x1=\"0.8\" y1=\"-0.7\" x2=\"0.9\" y2=\"0.5\" layer=\"51\"/>\n<rectangle x1=\"0.8\" y1=\"0.55\" x2=\"0.9\" y2=\"0.7\" layer=\"51\"/>\n<rectangle x1=\"-0.9\" y1=\"-0.7\" x2=\"-0.8\" y2=\"0.5\" layer=\"51\"/>\n<rectangle x1=\"-0.9\" y1=\"0.55\" x2=\"-0.8\" y2=\"0.7\" layer=\"51\"/>\n<rectangle x1=\"0.45\" y1=\"-0.7\" x2=\"0.6\" y2=\"-0.45\" layer=\"21\"/>\n</package>\n<package name=\"LD260\">\n<description>&lt;B&gt;LED&lt;/B&gt;&lt;p&gt;\n5 mm, square, Siemens</description>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"0\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"-1.27\" x2=\"1.27\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"1.27\" x2=\"0\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"1.27\" x2=\"-1.27\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-1.27\" x2=\"1.27\" y2=\"-0.889\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"1.27\" x2=\"1.27\" y2=\"0.889\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"0.889\" x2=\"1.27\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"1.27\" y1=\"0\" x2=\"1.27\" y2=\"-0.889\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0.889\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-1.27\" x2=\"-1.27\" y2=\"-0.889\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-0.889\" x2=\"-1.27\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"0.889\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"1.27\" x2=\"0.9917\" y2=\"0.7934\" width=\"0.1524\" layer=\"21\" curve=\"-51.33923\"/>\n<wire x1=\"-0.9917\" y1=\"0.7934\" x2=\"0\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-51.33923\"/>\n<wire x1=\"0\" y1=\"-1.27\" x2=\"0.9917\" y2=\"-0.7934\" width=\"0.1524\" layer=\"21\" curve=\"51.33923\"/>\n<wire x1=\"-0.9917\" y1=\"-0.7934\" x2=\"0\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"51.33923\"/>\n<wire x1=\"0.9558\" y1=\"-0.8363\" x2=\"1.27\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"41.185419\"/>\n<wire x1=\"0.9756\" y1=\"0.813\" x2=\"1.2699\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"-39.806332\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-0.9643\" y2=\"-0.8265\" width=\"0.1524\" layer=\"51\" curve=\"40.600331\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-0.9643\" y2=\"0.8265\" width=\"0.1524\" layer=\"51\" curve=\"-40.600331\"/>\n<wire x1=\"-0.889\" y1=\"0\" x2=\"0\" y2=\"0.889\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"0\" y2=\"0.508\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"0\" y1=\"-0.508\" x2=\"0.508\" y2=\"0\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"0\" y1=\"-0.889\" x2=\"0.889\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"90\"/>\n<pad name=\"A\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"K\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-1.2954\" y=\"1.4732\" size=\"1.016\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.4892\" size=\"1.016\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"1.27\" y1=\"-0.635\" x2=\"2.032\" y2=\"0.635\" layer=\"51\"/>\n<rectangle x1=\"1.905\" y1=\"-0.635\" x2=\"2.032\" y2=\"0.635\" layer=\"21\"/>\n</package>\n<package name=\"LED2X5\">\n<description>&lt;B&gt;LED&lt;/B&gt;&lt;p&gt;\n2 x 5 mm, rectangle</description>\n<wire x1=\"-2.54\" y1=\"-1.27\" x2=\"2.54\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"1.27\" x2=\"2.54\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"1.27\" x2=\"-2.54\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"-1.27\" x2=\"-2.54\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.905\" y1=\"0\" x2=\"0.508\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-0.508\" 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ratio=\"14\">K-</text>\n<text x=\"11.684\" y=\"-2.794\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\">&gt;NAME</text>\n<text x=\"0.635\" y=\"-4.445\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"2.921\" y1=\"1.016\" x2=\"6.731\" y2=\"1.524\" layer=\"21\"/>\n<rectangle x1=\"2.921\" y1=\"-1.524\" x2=\"6.731\" y2=\"-1.016\" layer=\"21\"/>\n<hole x=\"0\" y=\"0\" drill=\"0.8128\"/>\n</package>\n<package name=\"Q62902-B156\">\n<description>&lt;b&gt;LED HOLDER&lt;/b&gt;&lt;p&gt;\nSiemens</description>\n<wire x1=\"2.54\" y1=\"-1.905\" x2=\"2.54\" y2=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.143\" y1=\"0\" x2=\"0\" y2=\"1.143\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"0\" y1=\"-1.143\" x2=\"1.143\" y2=\"0\" width=\"0.1524\" layer=\"51\" curve=\"90\"/>\n<wire x1=\"-1.651\" y1=\"0\" x2=\"0\" y2=\"1.651\" width=\"0.1524\" layer=\"51\" curve=\"-90\"/>\n<wire x1=\"0\" y1=\"-1.651\" x2=\"1.651\" y2=\"0\" width=\"0.1524\" layer=\"51\" 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name=\"SFH482\">\n<description>&lt;B&gt;IR LED&lt;/B&gt;&lt;p&gt;\ninfrared emitting diode, Infineon\nTO-18, lead spacing 2.54 mm, cathode marking&lt;p&gt;\nInifineon</description>\n<wire x1=\"-2.159\" y1=\"1.524\" x2=\"-2.794\" y2=\"2.159\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.794\" y1=\"2.159\" x2=\"-2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-1.524\" y1=\"2.159\" x2=\"-2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0\" y1=\"1.778\" x2=\"1.5358\" y2=\"0.8959\" width=\"0.1524\" layer=\"21\" curve=\"-59.743278\"/>\n<wire x1=\"-1.5358\" y1=\"0.8959\" x2=\"0\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-59.743278\"/>\n<wire x1=\"-1.5358\" y1=\"-0.8959\" x2=\"0\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"59.743278\"/>\n<wire x1=\"0\" y1=\"-1.778\" x2=\"1.5358\" y2=\"-0.8959\" width=\"0.1524\" layer=\"21\" curve=\"59.743278\"/>\n<wire x1=\"1.5142\" y1=\"0.9318\" x2=\"1.778\" y2=\"0\" width=\"0.1524\" layer=\"51\" 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width=\"0.0634\" layer=\"21\"/>\n<circle x=\"-0.275\" y=\"0.4\" radius=\"0.125\" width=\"0\" layer=\"21\"/>\n<smd name=\"C\" x=\"-1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<smd name=\"A\" x=\"1.05\" y=\"0\" dx=\"1.2\" dy=\"1.2\" layer=\"1\"/>\n<text x=\"-1.5\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.5\" y=\"-2\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"SML1206\">\n<description>&lt;b&gt;SML10XXKH-TR (HIGH INTENSITY) LED&lt;/b&gt;&lt;p&gt;\n&lt;table&gt;\n&lt;tr&gt;&lt;td&gt;SML10R3KH-TR&lt;/td&gt;&lt;td&gt;ULTRA RED&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10E3KH-TR&lt;/td&gt;&lt;td&gt;SUPER REDSUPER BLUE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10O3KH-TR&lt;/td&gt;&lt;td&gt;SUPER ORANGE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10PY3KH-TR&lt;/td&gt;&lt;td&gt;PURE YELLOW&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10OY3KH-TR&lt;/td&gt;&lt;td&gt;ULTRA YELLOW&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10AG3KH-TR&lt;/td&gt;&lt;td&gt;AQUA GREEN&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10BG3KH-TR&lt;/td&gt;&lt;td&gt;BLUE GREEN&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10PB1KH-TR&lt;/td&gt;&lt;td&gt;SUPER BLUE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;SML10CW1KH-TR&lt;/td&gt;&lt;td&gt;WHITE&lt;/td&gt;&lt;/tr&gt;\n&lt;/table&gt;\n\nSource: http://www.ledtronics.com/ds/smd-1206/dstr0094.PDF</description>\n<wire x1=\"-1.5\" y1=\"0.5\" x2=\"-1.5\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\" curve=\"-180\"/>\n<wire x1=\"1.5\" y1=\"-0.5\" x2=\"1.5\" y2=\"0.5\" width=\"0.2032\" layer=\"51\" curve=\"-180\"/>\n<wire x1=\"-1.55\" y1=\"0.75\" x2=\"1.55\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.55\" y1=\"-0.75\" x2=\"-1.55\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<circle x=\"-0.725\" y=\"0.525\" radius=\"0.125\" width=\"0\" layer=\"21\"/>\n<smd name=\"C\" x=\"-1.75\" y=\"0\" dx=\"1.5\" dy=\"1.5\" layer=\"1\"/>\n<smd name=\"A\" x=\"1.75\" y=\"0\" dx=\"1.5\" dy=\"1.5\" layer=\"1\"/>\n<text x=\"-1.5\" y=\"1\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.5\" y=\"-2.5\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"0.4\" x2=\"-1.15\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.15\" y2=\"-0.4\" layer=\"51\"/>\n<rectangle x1=\"-1.175\" y1=\"-0.6\" x2=\"-1\" y2=\"-0.275\" layer=\"51\"/>\n<rectangle x1=\"1.15\" y1=\"-0.8\" x2=\"1.6\" y2=\"-0.4\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"1.15\" y1=\"0.4\" x2=\"1.6\" y2=\"0.8\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"1\" y1=\"0.275\" x2=\"1.175\" y2=\"0.6\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.1\" y1=\"-0.1\" x2=\"0.1\" y2=\"0.1\" layer=\"21\"/>\n</package>\n<package name=\"SML0603\">\n<description>&lt;b&gt;SML0603-XXX (HIGH INTENSITY) LED&lt;/b&gt;&lt;p&gt;\n&lt;table&gt;\n&lt;tr&gt;&lt;td&gt;AG3K&lt;/td&gt;&lt;td&gt;AQUA GREEN&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;B1K&lt;/td&gt;&lt;td&gt;SUPER BLUE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;R1K&lt;/td&gt;&lt;td&gt;SUPER RED&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;R3K&lt;/td&gt;&lt;td&gt;ULTRA RED&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;O3K&lt;/td&gt;&lt;td&gt;SUPER ORANGE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;O3KH&lt;/td&gt;&lt;td&gt;SOFT ORANGE&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;Y3KH&lt;/td&gt;&lt;td&gt;SUPER YELLOW&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;Y3K&lt;/td&gt;&lt;td&gt;SUPER YELLOW&lt;/td&gt;&lt;/tr&gt;\n&lt;tr&gt;&lt;td&gt;2CW&lt;/td&gt;&lt;td&gt;WHITE&lt;/td&gt;&lt;/tr&gt;\n&lt;/table&gt;\nSource: http://www.ledtronics.com/ds/smd-0603/Dstr0092.pdf</description>\n<wire x1=\"-0.75\" y1=\"0.35\" x2=\"0.75\" y2=\"0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.75\" y1=\"0.35\" x2=\"0.75\" y2=\"-0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.75\" y1=\"-0.35\" x2=\"-0.75\" y2=\"-0.35\" width=\"0.1016\" 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width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"-1.27\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-2.54\" x2=\"0\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"-1.27\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"0\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"0\" y2=\"-2.54\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-2.032\" y1=\"-0.762\" x2=\"-3.429\" y2=\"-2.159\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-1.905\" y1=\"-1.905\" x2=\"-3.302\" y2=\"-3.302\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"3.556\" y=\"-4.572\" size=\"1.778\" layer=\"95\" rot=\"R90\">&gt;NAME</text>\n<text x=\"5.715\" y=\"-4.572\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"C\" x=\"0\" y=\"-5.08\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R90\"/>\n<pin name=\"A\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"pas\" rot=\"R270\"/>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"-3.429\" y=\"-2.159\"/>\n<vertex x=\"-3.048\" y=\"-1.27\"/>\n<vertex x=\"-2.54\" y=\"-1.778\"/>\n</polygon>\n<polygon width=\"0.1524\" layer=\"94\">\n<vertex x=\"-3.302\" y=\"-3.302\"/>\n<vertex x=\"-2.921\" y=\"-2.413\"/>\n<vertex x=\"-2.413\" y=\"-2.921\"/>\n</polygon>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"LED\" prefix=\"LED\" uservalue=\"yes\">\n<description>&lt;b&gt;LED&lt;/b&gt;&lt;p&gt;\n&lt;u&gt;OSRAM&lt;/u&gt;:&lt;br&gt;\n\n- &lt;u&gt;CHIPLED&lt;/u&gt;&lt;br&gt;\nLG R971, LG N971, LY N971, LG Q971, LY Q971, LO R971, LY R971\nLH N974, LH R974&lt;br&gt;\nLS Q976, LO Q976, LY Q976&lt;br&gt;\nLO Q996&lt;br&gt;\n\n- &lt;u&gt;Hyper CHIPLED&lt;/u&gt;&lt;br&gt;\nLW Q18S&lt;br&gt;\nLB Q993, LB Q99A, LB R99A&lt;br&gt;\n\n- &lt;u&gt;SideLED&lt;/u&gt;&lt;br&gt;\nLS A670, LO A670, LY A670, LG A670, LP A670&lt;br&gt;\nLB A673, LV A673, LT A673, LW A673&lt;br&gt;\nLH A674&lt;br&gt;\nLY A675&lt;br&gt;\nLS A676, LA A676, LO A676, LY A676, LW A676&lt;br&gt;\nLS A679, LY A679, LG A679&lt;br&gt;\n\n-  &lt;u&gt;Hyper Micro SIDELED®&lt;/u&gt;&lt;br&gt;\nLS Y876, LA Y876, LO Y876, LY Y876&lt;br&gt;\nLT Y87S&lt;br&gt;\n\n- &lt;u&gt;SmartLED&lt;/u&gt;&lt;br&gt;\nLW L88C, LW L88S&lt;br&gt;\nLB L89C, LB L89S, LG L890&lt;br&gt;\nLS L89K, LO L89K, LY L89K&lt;br&gt;\nLS L896, LA L896, LO L896, LY L896&lt;br&gt;\n\n- &lt;u&gt;TOPLED&lt;/u&gt;&lt;br&gt;\nLS T670, LO T670, LY T670, LG T670, LP T670&lt;br&gt;\nLSG T670, LSP T670, LSY T670, LOP T670, LYG T670&lt;br&gt;\nLG T671, LOG T671, LSG T671&lt;br&gt;\nLB T673, LV T673, LT T673, LW T673&lt;br&gt;\nLH T674&lt;br&gt;\nLS T676, LA T676, LO T676, LY T676, LB T676, LH T676, LSB T676, LW T676&lt;br&gt;\nLB T67C, LV T67C, LT T67C, LS T67K, LO T67K, LY T67K, LW E67C&lt;br&gt;\nLS E67B, LA E67B, LO E67B, LY E67B, LB E67C, LV E67C, LT E67C&lt;br&gt;\nLW T67C&lt;br&gt;\nLS T679, LY T679, LG T679&lt;br&gt;\nLS T770, LO T770, LY T770, LG T770, LP T770&lt;br&gt;\nLB T773, LV T773, LT T773, LW T773&lt;br&gt;\nLH T774&lt;br&gt;\nLS E675, LA E675, LY E675, LS T675&lt;br&gt;\nLS T776, LA T776, LO T776, LY T776, LB T776&lt;br&gt;\nLHGB T686&lt;br&gt;\nLT T68C, LB T68C&lt;br&gt;\n\n- &lt;u&gt;Hyper Mini TOPLED®&lt;/u&gt;&lt;br&gt;\nLB M676&lt;br&gt;\n\n- &lt;u&gt;Mini TOPLED Santana®&lt;/u&gt;&lt;br&gt;\nLG M470&lt;br&gt;\nLS M47K, LO M47K, LY M47K\n&lt;p&gt;\nSource: http://www.osram.convergy.de&lt;p&gt;\n\n&lt;u&gt;LUXEON:&lt;/u&gt;&lt;br&gt;\n- &lt;u&gt;LUMILED®&lt;/u&gt;&lt;br&gt;\nLXK2-PW12-R00, LXK2-PW12-S00, LXK2-PW14-U00, LXK2-PW14-V00&lt;br&gt;\nLXK2-PM12-R00, LXK2-PM12-S00, LXK2-PM14-U00&lt;br&gt;\nLXK2-PE12-Q00, LXK2-PE12-R00, LXK2-PE12-S00, LXK2-PE14-T00, LXK2-PE14-U00&lt;br&gt;\nLXK2-PB12-K00, LXK2-PB12-L00, LXK2-PB12-M00, LXK2-PB14-N00, LXK2-PB14-P00, LXK2-PB14-Q00&lt;br&gt;\nLXK2-PR12-L00, LXK2-PR12-M00, LXK2-PR14-Q00, LXK2-PR14-R00&lt;br&gt;\nLXK2-PD12-Q00, LXK2-PD12-R00, LXK2-PD12-S00&lt;br&gt;\nLXK2-PH12-R00, LXK2-PH12-S00&lt;br&gt;\nLXK2-PL12-P00, LXK2-PL12-Q00, LXK2-PL12-R00\n&lt;p&gt;\nSource: www.luxeon.com&lt;p&gt;\n\n&lt;u&gt;KINGBRIGHT:&lt;/U&gt;&lt;p&gt;\nKA-3528ASYC&lt;br&gt;\nSource: www.kingbright.com</description>\n<gates>\n<gate name=\"G$1\" symbol=\"LED\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SMT1206\" package=\"1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LD260\" package=\"LD260\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SQR2X5\" package=\"LED2X5\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"3MM\" package=\"LED3MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"5MM\" package=\"LED5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LSU260\" package=\"LSU260\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"LZR181\" package=\"LZR181\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B152\" package=\"Q62902-B152\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B153\" package=\"Q62902-B153\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B155\" package=\"Q62902-B155\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"B156\" package=\"Q62902-B156\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SFH480\" package=\"SFH480\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SFH482\" package=\"SFH482\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SQR5.7X3.2\" package=\"U57X32\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"IRL80A\" package=\"IRL80A\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-2\" package=\"P-LCC-2\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MINI-TOP\" package=\"OSRAM-MINI-TOP-LED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SIDELED\" package=\"OSRAM-SIDELED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SMART-LED\" package=\"SMART-LED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"B\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-2-BACK\" package=\"P-LCC-2-TOPLED-RG\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"MICRO-SIDELED\" package=\"MICRO-SIDELED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"P-LCC-4\" package=\"P-LCC-4\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@4\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIP-LED0603\" package=\"CHIP-LED0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIP-LED0805\" package=\"CHIP-LED0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TOPLED-SANTANA\" package=\"MINI-TOPLED-SANTANA\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_0805\" package=\"CHIPLED_0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_1206\" package=\"CHIPLED_1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED_0603\" package=\"CHIPLED_0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CHIPLED-0603-TTW\" package=\"CHIPLED-0603-TTW\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A@1\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"\" package=\"SMARTLED-TTW\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A@1\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C@1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-LUMILED+\" package=\"LUMILED+\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"2+\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"4-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-LUMILED\" package=\"LUMILED\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"2+\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"4-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"10MM\" package=\"LED10MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"K\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"KA-3528ASYC\" package=\"KA-3528ASYC\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML0805\" package=\"SML0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML1206\" package=\"SML1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SML0603\" package=\"SML0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"A\"/>\n<connect gate=\"G$1\" pin=\"C\" pad=\"C\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-IC-2016\">\n<packages>\n<package name=\"SOT-223\">\n<description>&lt;b&gt;SMALL OUTLINE TRANSISTOR&lt;/b&gt;</description>\n<wire x1=\"3.277\" y1=\"1.778\" x2=\"3.277\" y2=\"-1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.277\" y1=\"-1.778\" x2=\"-3.277\" y2=\"-1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.277\" y1=\"-1.778\" x2=\"-3.277\" y2=\"1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.277\" y1=\"1.778\" x2=\"3.277\" y2=\"1.778\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.473\" y1=\"4.483\" x2=\"3.473\" y2=\"4.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"3.473\" y1=\"-4.483\" x2=\"-3.473\" y2=\"-4.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-3.473\" y1=\"-4.483\" x2=\"-3.473\" y2=\"4.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"3.473\" y1=\"4.483\" x2=\"3.473\" y2=\"-4.483\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-2.286\" y=\"-3.175\" dx=\"1.27\" dy=\"2.286\" layer=\"1\"/>\n<smd name=\"2\" x=\"0\" y=\"-3.175\" dx=\"1.27\" dy=\"2.286\" layer=\"1\"/>\n<smd name=\"3\" x=\"2.286\" y=\"-3.175\" dx=\"1.27\" dy=\"2.286\" layer=\"1\"/>\n<smd name=\"TER\" x=\"0\" y=\"3.175\" dx=\"3.556\" dy=\"2.159\" layer=\"1\"/>\n<text x=\"-3.81\" y=\"-3.81\" size=\"0.889\" layer=\"25\" ratio=\"11\" rot=\"R90\">&gt;NAME</text>\n<text x=\"4.445\" y=\"-3.81\" size=\"0.889\" layer=\"27\" ratio=\"11\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.6002\" y1=\"1.8034\" x2=\"1.6002\" y2=\"3.6576\" layer=\"51\"/>\n<rectangle x1=\"-0.4318\" y1=\"-3.6576\" x2=\"0.4318\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"-2.7432\" y1=\"-3.6576\" x2=\"-1.8796\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"1.8796\" y1=\"-3.6576\" x2=\"2.7432\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"-1.6002\" y1=\"1.8034\" x2=\"1.6002\" y2=\"3.6576\" layer=\"51\"/>\n<rectangle x1=\"-0.4318\" y1=\"-3.6576\" x2=\"0.4318\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"-2.7432\" y1=\"-3.6576\" x2=\"-1.8796\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"1.8796\" y1=\"-3.6576\" x2=\"2.7432\" y2=\"-1.8034\" layer=\"51\"/>\n<rectangle x1=\"-1\" y1=\"-1\" x2=\"1\" y2=\"1\" layer=\"35\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"PMIC-CJ*1117\">\n<text x=\"-7.62\" y=\"3.81\" size=\"1.27\" layer=\"95\">&gt;NAME</text>\n<text x=\"0\" y=\"3.81\" size=\"1.27\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"GND\" x=\"0\" y=\"-7.62\" length=\"short\" rot=\"R90\"/>\n<pin name=\"IN\" x=\"-11.43\" y=\"0\" length=\"short\"/>\n<pin name=\"OUT\" x=\"11.43\" y=\"0\" length=\"short\" rot=\"R180\"/>\n<wire x1=\"-7.62\" y1=\"3.81\" x2=\"7.62\" y2=\"3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"3.81\" x2=\"7.62\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"0\" x2=\"7.62\" y2=\"-3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"-3.81\" x2=\"0\" y2=\"-3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-3.81\" x2=\"-7.62\" y2=\"-3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-7.62\" y1=\"-3.81\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-8.89\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-5.08\" x2=\"0\" y2=\"-3.81\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"7.62\" y1=\"0\" x2=\"8.89\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"PMIC-CJT1117-3.3(SOT223)\" prefix=\"U\">\n<description>310030097</description>\n<gates>\n<gate name=\"G$1\" symbol=\"PMIC-CJ*1117\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"SOT-223\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"IN\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"OUT\" pad=\"2 TER\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MPN\" value=\"CJT1117-3.3\"/>\n<attribute name=\"VALUE\" value=\"CJT1117-3.3-SOT223\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"connector\">\n<description>&lt;b&gt;LAB11&lt;/b&gt; - Connectors for various cable types.</description>\n<packages>\n<package name=\"MOLEX-BNC-73100-0105\">\n<pad name=\"GND1\" x=\"-3.8\" y=\"-3.9\" drill=\"1.8\"/>\n<pad name=\"GND2\" x=\"3.8\" y=\"-3.9\" drill=\"1.8\"/>\n<pad name=\"SIGNAL\" x=\"0\" y=\"3.9\" drill=\"0.8\"/>\n<wire x1=\"-4.825\" y1=\"-8.5\" x2=\"4.825\" y2=\"-8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"4.825\" y1=\"-8.5\" x2=\"4.825\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"4.825\" y1=\"0.3\" x2=\"0.75\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.75\" y1=\"0.3\" x2=\"-0.75\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.75\" y1=\"0.3\" x2=\"-4.825\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-4.825\" y1=\"0.3\" x2=\"-4.825\" y2=\"-8.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-4.825\" y1=\"-21.5\" x2=\"4.825\" y2=\"-21.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-4.825\" y1=\"-21.5\" x2=\"-4.825\" y2=\"-8.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"4.825\" y1=\"-8.5\" x2=\"4.825\" y2=\"-21.5\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.75\" y1=\"0.3\" x2=\"-0.75\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.75\" y1=\"1.5\" x2=\"-0.25\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.25\" y1=\"1.5\" x2=\"0.25\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.25\" y1=\"1.5\" x2=\"0.75\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.75\" y1=\"1.5\" x2=\"0.75\" y2=\"0.3\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.25\" y1=\"1.5\" x2=\"-0.25\" y2=\"3.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.25\" y1=\"3.5\" x2=\"0.25\" y2=\"3.5\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.25\" y1=\"3.5\" x2=\"0.25\" y2=\"1.5\" width=\"0.127\" layer=\"21\"/>\n<text x=\"0\" y=\"5\" size=\"1.016\" layer=\"25\" font=\"vector\" ratio=\"12\" align=\"bottom-center\">&gt;NAME</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"BNC\">\n<pin name=\"SIGNAL\" x=\"7.62\" y=\"0\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<wire x1=\"5.08\" y1=\"-1.27\" x2=\"5.08\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.08\" y1=\"1.27\" x2=\"4.064\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"4.064\" y1=\"1.27\" x2=\"3.81\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"1.27\" x2=\"1.27\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"1.27\" x2=\"1.27\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"2.54\" x2=\"-3.81\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"2.54\" x2=\"-3.81\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-2.54\" x2=\"1.27\" y2=\"-2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-2.54\" x2=\"1.27\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-1.27\" x2=\"2.54\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-1.27\" x2=\"3.81\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-1.27\" x2=\"4.064\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"4.064\" y1=\"-1.27\" x2=\"5.08\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"1.27\" x2=\"1.27\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"1.27\" x2=\"3.81\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"1.524\" x2=\"4.064\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"4.064\" y1=\"1.524\" x2=\"4.064\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-1.27\" x2=\"3.81\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-1.524\" x2=\"4.064\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"4.064\" y1=\"-1.524\" x2=\"4.064\" y2=\"-1.27\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"GND\" x=\"7.62\" y=\"-5.08\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<wire x1=\"5.08\" y1=\"-5.08\" x2=\"2.54\" y2=\"-5.08\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-5.08\" x2=\"2.54\" y2=\"-1.27\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"-3.81\" y=\"3.048\" size=\"1.778\" layer=\"95\" ratio=\"12\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-4.826\" size=\"1.778\" layer=\"96\" ratio=\"12\">&gt;VALUE</text>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MOLEX_BNC_73100-0105\" prefix=\"J\">\n<description>CONN BNC JACK R/A 50 OHM PCB</description>\n<gates>\n<gate name=\"G$1\" symbol=\"BNC\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"MOLEX-BNC-73100-0105\">\n<connects>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND1 GND2\"/>\n<connect gate=\"G$1\" pin=\"SIGNAL\" pad=\"SIGNAL\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"DIGIKEY\" value=\"WM5524-ND\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"HaasMaxADC\">\n<packages>\n<package name=\"TQFP-48\">\n<description>48 TQFN-EP Package  IPC7351</description>\n<wire x1=\"-4.2\" y1=\"4.2\" x2=\"-4.2\" y2=\"-4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"-4.2\" y1=\"-4.2\" x2=\"4.2\" y2=\"-4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"4.2\" y1=\"-4.2\" x2=\"4.2\" y2=\"4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"4.2\" y1=\"4.2\" x2=\"-4.2\" y2=\"4.2\" width=\"0.1\" layer=\"21\"/>\n<wire x1=\"-2.75\" y1=\"2.75\" x2=\"-2.75\" y2=\"-2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-2.75\" y1=\"-2.75\" x2=\"2.75\" y2=\"-2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"2.75\" y1=\"-2.75\" x2=\"2.75\" y2=\"2.75\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"2.75\" y1=\"2.75\" x2=\"-2.75\" y2=\"2.75\" width=\"0.254\" layer=\"21\"/>\n<circle x=\"-2.25\" y=\"2.25\" radius=\"0.354\" width=\"0\" layer=\"21\"/>\n<smd name=\"1\" x=\"-3.5\" y=\"2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"-3.5\" y=\"2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"3\" x=\"-3.5\" y=\"1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"4\" x=\"-3.5\" y=\"1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"5\" x=\"-3.5\" y=\"0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"6\" x=\"-3.5\" y=\"0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"7\" x=\"-3.5\" y=\"-0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"8\" x=\"-3.5\" y=\"-0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"9\" x=\"-3.5\" y=\"-1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"10\" x=\"-3.5\" y=\"-1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"11\" x=\"-3.5\" y=\"-2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"12\" x=\"-3.5\" y=\"-2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"13\" x=\"-2.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"14\" x=\"-2.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"15\" x=\"-1.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"16\" x=\"-1.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"17\" x=\"-0.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"18\" x=\"-0.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"19\" x=\"0.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"20\" x=\"0.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"21\" x=\"1.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"22\" x=\"1.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"23\" x=\"2.25\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"24\" x=\"2.75\" y=\"-3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"25\" x=\"3.5\" y=\"-2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"26\" x=\"3.5\" y=\"-2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"27\" x=\"3.5\" y=\"-1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"28\" x=\"3.5\" y=\"-1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"29\" x=\"3.5\" y=\"-0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"30\" x=\"3.5\" y=\"-0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"31\" x=\"3.5\" y=\"0.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"32\" x=\"3.5\" y=\"0.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"33\" x=\"3.5\" y=\"1.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"34\" x=\"3.5\" y=\"1.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"35\" x=\"3.5\" y=\"2.25\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"36\" x=\"3.5\" y=\"2.75\" dx=\"0.8\" dy=\"0.3\" layer=\"1\"/>\n<smd name=\"37\" x=\"2.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"38\" x=\"2.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"39\" x=\"1.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"40\" x=\"1.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"41\" x=\"0.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"42\" x=\"0.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"43\" x=\"-0.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"44\" x=\"-0.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"45\" x=\"-1.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"46\" x=\"-1.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"47\" x=\"-2.25\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"48\" x=\"-2.75\" y=\"3.5\" dx=\"0.8\" dy=\"0.3\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-3.81\" y=\"4.445\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-5.715\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<dimension x1=\"-3.5\" y1=\"-0.5\" x2=\"3.5\" y2=\"-0.5\" x3=\"0\" y3=\"-1.3\" textsize=\"0.3\" layer=\"21\" width=\"0.03\" visible=\"yes\"/>\n<dimension x1=\"-2\" y1=\"3.5\" x2=\"-2\" y2=\"-3.5\" x3=\"-1.5\" y3=\"0\" textsize=\"0.3\" layer=\"21\" width=\"0.03\"/>\n<dimension x1=\"-2.8\" y1=\"0\" x2=\"2.8\" y2=\"0\" x3=\"0\" y3=\"0.5\" textsize=\"0.3\" layer=\"21\" dtype=\"horizontal\" width=\"0.03\"/>\n<dimension x1=\"3\" y1=\"-2.8\" x2=\"3\" y2=\"2.8\" x3=\"2\" y3=\"0\" textsize=\"0.3\" layer=\"21\" dtype=\"horizontal\" width=\"0.03\" visible=\"yes\"/>\n<smd name=\"EP_GND\" x=\"0\" y=\"0\" dx=\"5.588\" dy=\"5.588\" layer=\"1\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"PINOUT\">\n<description>PINOUT for the Max19506</description>\n<wire x1=\"-15.24\" y1=\"34.29\" x2=\"15.24\" y2=\"34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"15.24\" y1=\"34.29\" x2=\"15.24\" y2=\"-34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"15.24\" y1=\"-34.29\" x2=\"-15.24\" y2=\"-34.29\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-15.24\" y1=\"-34.29\" x2=\"-15.24\" y2=\"34.29\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-15.24\" y=\"35.56\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-15.24\" y=\"-38.1\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"AVDD1\" x=\"-20.32\" y=\"-15.24\" length=\"middle\" direction=\"pwr\"/>\n<pin name=\"D0A\" x=\"-20.32\" y=\"33.02\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D1A\" x=\"-20.32\" y=\"30.48\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D2A\" x=\"-20.32\" y=\"27.94\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D3A\" x=\"-20.32\" y=\"25.4\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D4A\" x=\"-20.32\" y=\"22.86\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D5A\" x=\"-20.32\" y=\"20.32\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D6A\" x=\"-20.32\" y=\"17.78\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D7A\" x=\"-20.32\" y=\"15.24\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D0B\" x=\"-20.32\" y=\"10.16\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D1B\" x=\"-20.32\" y=\"7.62\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D2B\" x=\"-20.32\" y=\"5.08\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D3B\" x=\"-20.32\" y=\"2.54\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D4B\" x=\"-20.32\" y=\"0\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D5B\" x=\"-20.32\" y=\"-2.54\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D6B\" x=\"-20.32\" y=\"-5.08\" length=\"middle\" direction=\"out\"/>\n<pin name=\"D7B\" x=\"-20.32\" y=\"-7.62\" length=\"middle\" direction=\"out\"/>\n<pin name=\"CMA\" x=\"-20.32\" y=\"-20.32\" length=\"middle\"/>\n<pin name=\"INA+\" x=\"-20.32\" y=\"-22.86\" length=\"middle\" direction=\"in\"/>\n<pin name=\"INA-\" x=\"-20.32\" y=\"-25.4\" length=\"middle\" direction=\"in\"/>\n<pin name=\"SPEN\" x=\"20.32\" y=\"-17.78\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"INB-\" x=\"-20.32\" y=\"-30.48\" length=\"middle\" direction=\"in\"/>\n<pin name=\"REFIO\" x=\"20.32\" y=\"-20.32\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CMB\" x=\"-20.32\" y=\"-33.02\" length=\"middle\"/>\n<pin name=\"DCLKB\" x=\"20.32\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DCLKA\" x=\"20.32\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DORA\" x=\"20.32\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"SCLK/DIV\" x=\"20.32\" y=\"15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"OVDD2\" x=\"20.32\" y=\"20.32\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK-\" x=\"20.32\" y=\"25.4\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"SYNC\" x=\"20.32\" y=\"30.48\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"CLK+\" x=\"20.32\" y=\"27.94\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"GND\" x=\"-20.32\" y=\"-12.7\" length=\"middle\"/>\n<pin name=\"SDIN/FORMAT\" x=\"20.32\" y=\"17.78\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"DORB\" x=\"20.32\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"SHDN\" x=\"20.32\" y=\"-22.86\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"INB+\" x=\"-20.32\" y=\"-27.94\" length=\"middle\" direction=\"in\"/>\n<pin name=\"I.C.\" x=\"20.32\" y=\"-10.16\" length=\"middle\" direction=\"nc\" rot=\"R180\"/>\n<pin name=\"CS/OUTSEL\" x=\"20.32\" y=\"12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"OVDD1\" x=\"20.32\" y=\"22.86\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"AVDD2\" x=\"-20.32\" y=\"-17.78\" length=\"middle\" direction=\"pwr\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MAX19506\" prefix=\"IC\">\n<description>The MAX19506 dual-channel, analog-to-digital converter\n(ADC) provides 8-bit resolution and a maximum sample\nrate of 100Msps.</description>\n<gates>\n<gate name=\"M\" symbol=\"PINOUT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"TQFP-48\">\n<connects>\n<connect gate=\"M\" pin=\"AVDD1\" pad=\"1 48\"/>\n<connect gate=\"M\" pin=\"AVDD2\" pad=\"12 13\"/>\n<connect gate=\"M\" pin=\"CLK+\" pad=\"15\"/>\n<connect gate=\"M\" pin=\"CLK-\" pad=\"16\"/>\n<connect gate=\"M\" pin=\"CMA\" pad=\"2\"/>\n<connect gate=\"M\" pin=\"CMB\" pad=\"11\"/>\n<connect gate=\"M\" pin=\"CS/OUTSEL\" pad=\"47\"/>\n<connect gate=\"M\" pin=\"D0A\" pad=\"34\"/>\n<connect gate=\"M\" pin=\"D0B\" pad=\"23\"/>\n<connect gate=\"M\" pin=\"D1A\" pad=\"35\"/>\n<connect gate=\"M\" pin=\"D1B\" pad=\"24\"/>\n<connect gate=\"M\" pin=\"D2A\" pad=\"37\"/>\n<connect gate=\"M\" pin=\"D2B\" pad=\"26\"/>\n<connect gate=\"M\" pin=\"D3A\" pad=\"38\"/>\n<connect gate=\"M\" pin=\"D3B\" pad=\"27\"/>\n<connect gate=\"M\" pin=\"D4A\" pad=\"39\"/>\n<connect gate=\"M\" pin=\"D4B\" pad=\"28\"/>\n<connect gate=\"M\" pin=\"D5A\" pad=\"40\"/>\n<connect gate=\"M\" pin=\"D5B\" pad=\"29\"/>\n<connect gate=\"M\" pin=\"D6A\" pad=\"41\"/>\n<connect gate=\"M\" pin=\"D6B\" pad=\"30\"/>\n<connect gate=\"M\" pin=\"D7A\" pad=\"42\"/>\n<connect gate=\"M\" pin=\"D7B\" pad=\"31\"/>\n<connect gate=\"M\" pin=\"DCLKA\" pad=\"44\"/>\n<connect gate=\"M\" pin=\"DCLKB\" pad=\"20\"/>\n<connect gate=\"M\" pin=\"DORA\" pad=\"43\"/>\n<connect gate=\"M\" pin=\"DORB\" pad=\"19\"/>\n<connect gate=\"M\" pin=\"GND\" pad=\"17 18 EP_GND\"/>\n<connect gate=\"M\" pin=\"I.C.\" pad=\"8 21 22 32 33\"/>\n<connect gate=\"M\" pin=\"INA+\" pad=\"3\"/>\n<connect gate=\"M\" pin=\"INA-\" pad=\"4\"/>\n<connect gate=\"M\" pin=\"INB+\" pad=\"9\"/>\n<connect gate=\"M\" pin=\"INB-\" pad=\"10\"/>\n<connect gate=\"M\" pin=\"OVDD1\" pad=\"25\"/>\n<connect gate=\"M\" pin=\"OVDD2\" pad=\"36\"/>\n<connect gate=\"M\" pin=\"REFIO\" pad=\"6\"/>\n<connect gate=\"M\" pin=\"SCLK/DIV\" pad=\"46\"/>\n<connect gate=\"M\" pin=\"SDIN/FORMAT\" pad=\"45\"/>\n<connect gate=\"M\" pin=\"SHDN\" pad=\"7\"/>\n<connect gate=\"M\" pin=\"SPEN\" pad=\"5\"/>\n<connect gate=\"M\" pin=\"SYNC\" pad=\"14\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-OPL-Connector\">\n<packages>\n<package name=\"H2X5-2.54\">\n<wire x1=\"-2.54\" y1=\"6.35\" x2=\"2.54\" y2=\"6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"6.35\" x2=\"2.54\" y2=\"-6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"-6.35\" x2=\"-2.54\" y2=\"-6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"-6.35\" x2=\"-2.54\" y2=\"6.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"6.35\" x2=\"2.54\" y2=\"6.35\" width=\"0\" layer=\"39\"/>\n<wire x1=\"2.54\" y1=\"6.35\" x2=\"2.54\" y2=\"-6.35\" width=\"0\" layer=\"39\"/>\n<wire x1=\"2.54\" y1=\"-6.35\" x2=\"-2.54\" y2=\"-6.35\" width=\"0\" layer=\"39\"/>\n<wire x1=\"-2.54\" y1=\"-6.35\" x2=\"-2.54\" y2=\"6.35\" width=\"0\" layer=\"39\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"5.08\" drill=\"0.889\" diameter=\"1.651\" shape=\"square\"/>\n<pad name=\"2\" x=\"-1.27\" y=\"2.54\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"3\" x=\"-1.27\" y=\"0\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"4\" x=\"-1.27\" y=\"-2.54\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"5\" x=\"-1.27\" y=\"-5.08\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"6\" x=\"1.27\" y=\"-5.08\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"7\" x=\"1.27\" y=\"-2.54\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"8\" x=\"1.27\" y=\"0\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"9\" x=\"1.27\" y=\"2.54\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"10\" x=\"1.27\" y=\"5.08\" drill=\"0.889\" diameter=\"1.651\"/>\n<text x=\"3.81\" y=\"-1.905\" size=\"0.889\" layer=\"27\" font=\"vector\" ratio=\"11\" rot=\"R90\">&gt;value</text>\n<text x=\"-3.175\" y=\"-1.905\" size=\"0.889\" layer=\"25\" font=\"vector\" ratio=\"11\" rot=\"R90\">&gt;name</text>\n<rectangle x1=\"-2.54\" y1=\"-6.35\" x2=\"2.54\" y2=\"6.35\" layer=\"39\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"HEADER-2X5P\">\n<wire x1=\"-3.81\" y1=\"6.35\" x2=\"3.81\" y2=\"6.35\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"6.35\" x2=\"3.81\" y2=\"-6.35\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-6.35\" x2=\"-3.81\" y2=\"-6.35\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-3.81\" y1=\"-6.35\" x2=\"-3.81\" y2=\"6.35\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-6.35\" y=\"7.62\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;name</text>\n<text x=\"1.27\" y=\"7.62\" size=\"1.27\" layer=\"96\" ratio=\"10\">&gt;value</text>\n<pin name=\"1\" x=\"-8.89\" y=\"5.08\" visible=\"pad\" length=\"middle\" function=\"dotclk\" swaplevel=\"9\"/>\n<pin name=\"2\" x=\"-8.89\" y=\"2.54\" visible=\"pad\" length=\"middle\" swaplevel=\"9\"/>\n<pin name=\"3\" x=\"-8.89\" y=\"0\" visible=\"pad\" length=\"middle\" swaplevel=\"9\"/>\n<pin name=\"4\" x=\"-8.89\" y=\"-2.54\" visible=\"pad\" length=\"middle\" swaplevel=\"9\"/>\n<pin name=\"5\" x=\"-8.89\" y=\"-5.08\" visible=\"pad\" length=\"middle\" swaplevel=\"9\"/>\n<pin name=\"6\" x=\"8.89\" y=\"-5.08\" visible=\"pad\" length=\"middle\" swaplevel=\"9\" rot=\"R180\"/>\n<pin name=\"7\" x=\"8.89\" y=\"-2.54\" visible=\"pad\" length=\"middle\" swaplevel=\"9\" rot=\"R180\"/>\n<pin name=\"8\" x=\"8.89\" y=\"0\" visible=\"pad\" length=\"middle\" swaplevel=\"9\" rot=\"R180\"/>\n<pin name=\"9\" x=\"8.89\" y=\"2.54\" visible=\"pad\" length=\"middle\" swaplevel=\"9\" rot=\"R180\"/>\n<pin name=\"10\" x=\"8.89\" y=\"5.08\" visible=\"pad\" length=\"middle\" swaplevel=\"9\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"DIP-BLACK-MALE-HEADER(2X5P-2.54)\" prefix=\"J\" uservalue=\"yes\">\n<description>320020122</description>\n<gates>\n<gate name=\"G$1\" symbol=\"HEADER-2X5P\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"H2X5-2.54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"9\" pad=\"9\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MPN\" value=\"P125-1210A0AS116A1\"/>\n<attribute name=\"VALUE\" value=\"2x5p-2.54\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"PP_Connectors\">\n<packages>\n<package name=\"500075-1517\">\n<pad name=\"D+\" x=\"0\" y=\"-1.3\" drill=\"0.7\"/>\n<pad name=\"ID\" x=\"0.8\" y=\"1.3\" drill=\"0.7\"/>\n<pad name=\"GND\" x=\"1.6\" y=\"-1.3\" drill=\"0.7\"/>\n<pad name=\"D-\" x=\"-0.8\" y=\"1.3\" drill=\"0.7\"/>\n<pad name=\"5V\" x=\"-1.6\" y=\"-1.3\" drill=\"0.7\"/>\n<wire x1=\"-3.325\" y1=\"-0.875\" x2=\"-3.325\" y2=\"0.875\" width=\"0.127\" layer=\"46\"/>\n<wire x1=\"-3.325\" y1=\"0.875\" x2=\"-3.975\" y2=\"0.875\" width=\"0.127\" layer=\"46\" curve=\"180\"/>\n<wire x1=\"-3.975\" y1=\"-0.875\" x2=\"-3.975\" y2=\"0.875\" width=\"0.127\" layer=\"46\"/>\n<wire x1=\"-3.325\" y1=\"-0.875\" x2=\"-3.975\" y2=\"-0.875\" width=\"0.127\" layer=\"46\" curve=\"-180\"/>\n<wire x1=\"3.975\" y1=\"-0.875\" x2=\"3.975\" y2=\"0.875\" width=\"0.127\" layer=\"46\"/>\n<wire x1=\"3.975\" y1=\"0.875\" x2=\"3.325\" y2=\"0.875\" width=\"0.127\" layer=\"46\" curve=\"180\"/>\n<wire x1=\"3.325\" y1=\"-0.875\" x2=\"3.325\" y2=\"0.875\" width=\"0.127\" layer=\"46\"/>\n<wire x1=\"3.975\" y1=\"-0.875\" x2=\"3.325\" y2=\"-0.875\" width=\"0.127\" layer=\"46\" curve=\"-180\"/>\n<smd name=\"P$1\" x=\"-3.65\" y=\"0\" dx=\"3.9\" dy=\"1.4\" layer=\"1\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"P$2\" x=\"3.65\" y=\"0\" dx=\"3.9\" dy=\"1.4\" layer=\"1\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"P$3\" x=\"-3.65\" y=\"0\" dx=\"3.9\" dy=\"1.4\" layer=\"16\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<smd name=\"P$4\" x=\"3.65\" y=\"0\" dx=\"3.9\" dy=\"1.4\" layer=\"16\" roundness=\"100\" rot=\"R90\" cream=\"no\"/>\n<wire x1=\"-3.85\" y1=\"2.4\" x2=\"3.85\" y2=\"2.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.85\" y1=\"-2.3\" x2=\"3.85\" y2=\"-2.3\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-4\" y=\"3\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n<hole x=\"-3.65\" y=\"0\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"0\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"0\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"0.3\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"0.6\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"0.9\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"-0.3\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"-0.6\" drill=\"0.6\"/>\n<hole x=\"3.65\" y=\"-0.9\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"0.6\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"0.9\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"-0.3\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"-0.6\" drill=\"0.6\"/>\n<hole x=\"-3.65\" y=\"-0.9\" drill=\"0.6\"/>\n</package>\n<package name=\"10118193-0001LF\">\n<smd name=\"3\" x=\"0\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"0.65\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"-0.65\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"1\" x=\"-1.3\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"5\" x=\"1.3\" y=\"2.54\" dx=\"0.4\" dy=\"1.35\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"S3\" x=\"-3.2\" y=\"2.54\" dx=\"1.4\" dy=\"1.6\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"S4\" x=\"3.2\" y=\"2.54\" dx=\"1.4\" dy=\"1.6\" layer=\"1\" rot=\"R90\"/>\n<pad name=\"S2\" x=\"3.3\" y=\"-0.135\" drill=\"0.9\" shape=\"long\" rot=\"R180\"/>\n<pad name=\"S1\" x=\"-3.3\" y=\"-0.135\" drill=\"0.9\" shape=\"long\" rot=\"R180\"/>\n<wire x1=\"-4.125\" y1=\"-1.585\" x2=\"4.125\" y2=\"-1.585\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-4\" y=\"3.54\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n</package>\n<package name=\"MC32599\">\n<pad name=\"D+\" x=\"0\" y=\"0\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R270\"/>\n<pad name=\"GND\" x=\"-1.6\" y=\"0\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R270\"/>\n<pad name=\"V_BUS\" x=\"1.6\" y=\"0\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R270\"/>\n<pad name=\"D-\" x=\"0.8\" y=\"1.2\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R90\"/>\n<pad name=\"N/C\" x=\"-0.8\" y=\"1.2\" drill=\"0.7\" diameter=\"1.016\" shape=\"offset\" rot=\"R90\"/>\n<pad name=\"SH_2\" x=\"-3.65\" y=\"0.9\" drill=\"1.6\"/>\n<pad name=\"SH_3\" x=\"3.65\" y=\"0.9\" drill=\"1.6\"/>\n<pad name=\"SH_1\" x=\"3.65\" y=\"5.55\" drill=\"1.6\"/>\n<pad name=\"SH_0\" x=\"-3.65\" y=\"5.55\" drill=\"1.6\"/>\n<wire x1=\"-3.85\" y1=\"8.7\" x2=\"3.85\" y2=\"8.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.85\" y1=\"8.7\" x2=\"3.85\" y2=\"-1.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.85\" y1=\"-1.8\" x2=\"-3.85\" y2=\"-1.8\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.85\" y1=\"-1.8\" x2=\"-3.85\" y2=\"8.7\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-3.81\" y=\"-3.81\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"USB_5PIN\">\n<pin name=\"5V\" x=\"12.7\" y=\"-2.54\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<pin name=\"D-\" x=\"12.7\" y=\"-5.08\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<pin name=\"D+\" x=\"12.7\" y=\"-7.62\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GND\" x=\"12.7\" y=\"-12.7\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<pin name=\"ID\" x=\"12.7\" y=\"-10.16\" visible=\"off\" length=\"short\" rot=\"R180\"/>\n<text x=\"5.08\" y=\"-1.524\" size=\"1.016\" layer=\"97\" font=\"vector\" align=\"bottom-center\">USB PORT</text>\n<wire x1=\"10.16\" y1=\"0\" x2=\"10.16\" y2=\"-17.78\" width=\"0.127\" layer=\"94\"/>\n<wire x1=\"10.16\" y1=\"-17.78\" x2=\"0\" y2=\"-17.78\" width=\"0.127\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"-17.78\" x2=\"0\" y2=\"0\" width=\"0.127\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"10.16\" y2=\"0\" width=\"0.127\" layer=\"94\"/>\n<text x=\"0\" y=\"5.08\" size=\"1.016\" layer=\"95\" font=\"vector\" align=\"top-left\">&gt;NAME</text>\n<text x=\"0\" y=\"2.54\" size=\"1.016\" layer=\"96\" font=\"vector\">&gt;VALUE</text>\n<pin name=\"SLD\" x=\"12.7\" y=\"-15.24\" visible=\"off\" length=\"short\" direction=\"pwr\" rot=\"R180\"/>\n<text x=\"9.652\" y=\"-2.54\" size=\"1.016\" layer=\"97\" font=\"vector\" align=\"center-right\">5V</text>\n<text x=\"9.652\" y=\"-5.08\" size=\"1.016\" layer=\"97\" font=\"vector\" align=\"center-right\">D-</text>\n<text x=\"9.652\" y=\"-7.62\" size=\"1.016\" layer=\"97\" font=\"vector\" align=\"center-right\">D+</text>\n<text x=\"9.652\" y=\"-10.16\" size=\"1.016\" layer=\"97\" font=\"vector\" align=\"center-right\">ID</text>\n<text x=\"9.652\" y=\"-12.7\" size=\"1.016\" layer=\"97\" font=\"vector\" align=\"center-right\">GND</text>\n<text x=\"9.652\" y=\"-15.24\" size=\"1.016\" layer=\"97\" font=\"vector\" align=\"center-right\">SHIELD</text>\n<polygon width=\"0.254\" layer=\"94\">\n<vertex x=\"3.175\" y=\"-4.445\"/>\n<vertex x=\"3.81\" y=\"-3.175\"/>\n<vertex x=\"4.445\" y=\"-4.445\"/>\n</polygon>\n<polygon width=\"0.254\" layer=\"94\">\n<vertex x=\"1.905\" y=\"-7.3025\" curve=\"-90\"/>\n<vertex x=\"2.2225\" y=\"-7.62\" curve=\"-90\"/>\n<vertex x=\"1.905\" y=\"-7.9375\" curve=\"-90\"/>\n<vertex x=\"1.5875\" y=\"-7.62\" curve=\"-90\"/>\n</polygon>\n<polygon width=\"0.254\" layer=\"94\">\n<vertex x=\"5.3975\" y=\"-6.0325\"/>\n<vertex x=\"5.3975\" y=\"-6.6675\"/>\n<vertex x=\"6.0325\" y=\"-6.6675\"/>\n<vertex x=\"6.0325\" y=\"-6.0325\"/>\n</polygon>\n<wire x1=\"3.81\" y1=\"-11.215840625\" x2=\"3.81\" y2=\"-9.945840625\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-9.945840625\" x2=\"3.81\" y2=\"-4.445\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.417421875\" y1=\"-7.917578125\" x2=\"4.107578125\" y2=\"-9.227421875\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.905\" y1=\"-7.62\" x2=\"1.905\" y2=\"-8.469159375\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.202578125\" y1=\"-9.187578125\" x2=\"3.512421875\" y2=\"-10.497421875\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.905\" y1=\"-8.469159375\" x2=\"2.202578125\" y2=\"-9.187578125\" width=\"0.254\" layer=\"94\" curve=\"44.999875\"/>\n<wire x1=\"5.715\" y1=\"-6.35\" x2=\"5.715\" y2=\"-7.199159375\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.715\" y1=\"-7.199159375\" x2=\"5.417421875\" y2=\"-7.917578125\" width=\"0.254\" layer=\"94\" curve=\"-44.999875\"/>\n<wire x1=\"3.81\" y1=\"-11.43\" x2=\"3.81\" y2=\"-11.215840625\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-11.215840625\" x2=\"3.512421875\" y2=\"-10.497421875\" width=\"0.254\" layer=\"94\" curve=\"44.999875\"/>\n<wire x1=\"3.81\" y1=\"-9.945840625\" x2=\"4.107578125\" y2=\"-9.227421875\" width=\"0.254\" layer=\"94\" curve=\"-44.999875\"/>\n<polygon width=\"0.254\" layer=\"94\">\n<vertex x=\"3.8735\" y=\"-13.335\"/>\n<vertex x=\"3.7465\" y=\"-13.335\" curve=\"-90\"/>\n<vertex x=\"2.8575\" y=\"-12.446\"/>\n<vertex x=\"2.8575\" y=\"-12.319\" curve=\"-90\"/>\n<vertex x=\"3.7465\" y=\"-11.43\"/>\n<vertex x=\"3.8735\" y=\"-11.43\" curve=\"-90\"/>\n<vertex x=\"4.7625\" y=\"-12.319\"/>\n<vertex x=\"4.7625\" y=\"-12.446\" curve=\"-90\"/>\n</polygon>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"USB_5PIN\" prefix=\"J\" uservalue=\"yes\">\n<gates>\n<gate name=\"G$1\" symbol=\"USB_5PIN\" x=\"2.54\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"_500075-1517\" package=\"500075-1517\">\n<connects>\n<connect gate=\"G$1\" pin=\"5V\" pad=\"5V\"/>\n<connect gate=\"G$1\" pin=\"D+\" pad=\"D+\"/>\n<connect gate=\"G$1\" pin=\"D-\" pad=\"D-\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND\"/>\n<connect gate=\"G$1\" pin=\"ID\" pad=\"ID\"/>\n<connect gate=\"G$1\" pin=\"SLD\" pad=\"P$1 P$2 P$3 P$4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"HOUSEPART\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"POPULATE\" value=\"1\" constant=\"no\"/>\n<attribute name=\"URL\" value=\"\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"_10118193-0001LF\" package=\"10118193-0001LF\">\n<connects>\n<connect gate=\"G$1\" pin=\"5V\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"D+\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"D-\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"ID\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"SLD\" pad=\"S1 S2 S3 S4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"HOUSEPART\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"POPULATE\" value=\"1\" constant=\"no\"/>\n<attribute name=\"URL\" value=\"\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"_MC32599\" package=\"MC32599\">\n<connects>\n<connect gate=\"G$1\" pin=\"5V\" pad=\"V_BUS\"/>\n<connect gate=\"G$1\" pin=\"D+\" pad=\"D+\"/>\n<connect gate=\"G$1\" pin=\"D-\" pad=\"D-\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"GND\"/>\n<connect gate=\"G$1\" pin=\"ID\" pad=\"N/C\"/>\n<connect gate=\"G$1\" pin=\"SLD\" pad=\"SH_0 SH_1 SH_2 SH_3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"HOUSEPART\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"POPULATE\" value=\"1\" constant=\"no\"/>\n<attribute name=\"URL\" value=\"\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"MF_Switches\">\n<packages>\n<package name=\"TACT6MM\">\n<description>&lt;b&gt;Description:&lt;/b&gt; Standard 6MM Tact Switch Package.&lt;br/&gt;</description>\n<smd name=\"P$1\" x=\"-3.975\" y=\"2.45\" dx=\"1.55\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"3.975\" y=\"2.45\" dx=\"1.55\" dy=\"1.3\" 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layer=\"21\"/>\n<wire x1=\"0\" y1=\"-1\" x2=\"-0.8\" y2=\"0.8\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-5.2\" y=\"3.6\" size=\"1.016\" layer=\"21\" font=\"vector\" ratio=\"16\">&gt;NAME</text>\n</package>\n<package name=\"TACT4.2MM\">\n<description>&lt;b&gt;Description:&lt;/b&gt; Standard 4.2MM Tact Switch Package.Based off C&amp;K PTS 810 Series Tact Switch.&lt;br/&gt;</description>\n<smd name=\"P$3\" x=\"-2.075\" y=\"-1.075\" dx=\"0.65\" dy=\"1.05\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$4\" x=\"2.075\" y=\"-1.075\" dx=\"0.65\" dy=\"1.05\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"2.075\" y=\"1.075\" dx=\"0.65\" dy=\"1.05\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$1\" x=\"-2.075\" y=\"1.075\" dx=\"0.65\" dy=\"1.05\" layer=\"1\" rot=\"R90\"/>\n<wire x1=\"-2.8\" y1=\"1.6\" x2=\"2.8\" y2=\"1.6\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.8\" y1=\"1.6\" x2=\"2.8\" y2=\"-1.6\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"2.8\" y1=\"-1.6\" x2=\"-2.8\" y2=\"-1.6\" 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pad=\"B2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DBVR\" package=\"DBV_R-PDSO-G6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"4\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DCKR\" package=\"DCK_R-PDSO-G6\">\n<connects>\n<connect gate=\"G$1\" pin=\"!A!/B\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"A\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"B\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"X\" pad=\"4\"/>\n<connect gate=\"P\" pin=\"GND\" pad=\"2\"/>\n<connect gate=\"P\" pin=\"VCC\" pad=\"5\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DRLR\" 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length=\"short\" rot=\"R180\"/>\n<pin name=\"GPB7\" x=\"12.7\" y=\"-20.32\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA0\" x=\"12.7\" y=\"20.32\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA1\" x=\"12.7\" y=\"17.78\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA2\" x=\"12.7\" y=\"15.24\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA3\" x=\"12.7\" y=\"12.7\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA4\" x=\"12.7\" y=\"10.16\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA5\" x=\"12.7\" y=\"7.62\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA6\" x=\"12.7\" y=\"5.08\" length=\"short\" rot=\"R180\"/>\n<pin name=\"GPA7\" x=\"12.7\" y=\"2.54\" length=\"short\" rot=\"R180\"/>\n<pin name=\"VDD\" x=\"-12.7\" y=\"20.32\" length=\"short\" direction=\"pwr\"/>\n<pin name=\"VSS\" x=\"-12.7\" y=\"-20.32\" length=\"short\" direction=\"pwr\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MCP23017\" prefix=\"IC\">\n<description>&lt;b&gt;http://ww1.microchip.com/downloads/en/DeviceDoc/21952a.pdf&lt;/b&gt;&lt;p&gt;\nSource: http://ww1.microchip.com/downloads/en/DeviceDoc/21952a.pdf</description>\n<gates>\n<gate name=\"G$1\" symbol=\"MCP23017\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SP\" package=\"DIL28-3\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/SP\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"1332088\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2959\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SO\" package=\"SO28W\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/SO\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"1332087\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2958\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SS\" package=\"SSOP28\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/SS\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"1467674\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2960\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"ML\" package=\"QFN28-ML_6X6MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"!RESET\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"A0\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"A1\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"A2\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"GPA0\" pad=\"17\"/>\n<connect gate=\"G$1\" pin=\"GPA1\" pad=\"18\"/>\n<connect gate=\"G$1\" pin=\"GPA2\" pad=\"19\"/>\n<connect gate=\"G$1\" pin=\"GPA3\" pad=\"20\"/>\n<connect gate=\"G$1\" pin=\"GPA4\" pad=\"21\"/>\n<connect gate=\"G$1\" pin=\"GPA5\" pad=\"22\"/>\n<connect gate=\"G$1\" pin=\"GPA6\" pad=\"23\"/>\n<connect gate=\"G$1\" pin=\"GPA7\" pad=\"24\"/>\n<connect gate=\"G$1\" pin=\"GPB0\" pad=\"25\"/>\n<connect gate=\"G$1\" pin=\"GPB1\" pad=\"26\"/>\n<connect gate=\"G$1\" pin=\"GPB2\" pad=\"27\"/>\n<connect gate=\"G$1\" pin=\"GPB3\" pad=\"28\"/>\n<connect gate=\"G$1\" pin=\"GPB4\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"GPB5\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"GPB6\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"GPB7\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"INTA\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"INTB\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"6\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"MICROCHIP\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"MCP23017-E/ML\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"31K2957\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"rcl@1\">\n<description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;\nBased on the previous libraries:\n&lt;ul&gt;\n&lt;li&gt;r.lbr\n&lt;li&gt;cap.lbr \n&lt;li&gt;cap-fe.lbr\n&lt;li&gt;captant.lbr\n&lt;li&gt;polcap.lbr\n&lt;li&gt;ipc-smd.lbr\n&lt;/ul&gt;\nAll SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;\n&lt;p&gt;\nfor Electrolyt Capacitors see also :&lt;p&gt;\nwww.bccomponents.com &lt;p&gt;\nwww.panasonic.com&lt;p&gt;\nwww.kemet.com&lt;p&gt;\nhttp://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;\n&lt;p&gt;\nfor trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;\n\n&lt;table border=0 cellspacing=0 cellpadding=0 width=\"100%\" cellpaddding=0&gt;\n&lt;tr valign=\"top\"&gt;\n\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PHILIPS/MEPCO&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MURATA&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;PANASONIC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;SPECTROL&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;MILSPEC&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;\n      3005P&lt;BR&gt;\n      3006P&lt;BR&gt;\n      3006W&lt;BR&gt;\n      3006Y&lt;BR&gt;\n      3009P&lt;BR&gt;\n      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-&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      RT/RTR12&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;\n      RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n   &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n     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50-2-X&lt;BR&gt;\n      50-4-X&lt;BR&gt;\n      50-3-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      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150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;&amp;nbsp;&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT color=\"#0000FF\" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;\n      &lt;P&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;</description>\n<packages>\n<package name=\"C0603\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.983\" x2=\"-1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-0.356\" y1=\"0.432\" x2=\"0.356\" y2=\"0.432\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-0.356\" y1=\"-0.419\" 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y1=\"0.483\" x2=\"1.473\" y2=\"-0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.473\" y1=\"-0.483\" x2=\"-1.473\" y2=\"-0.483\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"-1.473\" y1=\"-0.483\" x2=\"-1.473\" y2=\"0.483\" width=\"0.0508\" layer=\"39\"/>\n<smd name=\"1\" x=\"-0.65\" y=\"0\" dx=\"0.7\" dy=\"0.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.65\" y=\"0\" dx=\"0.7\" dy=\"0.9\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.554\" y1=\"-0.3048\" x2=\"-0.254\" y2=\"0.2951\" layer=\"51\"/>\n<rectangle x1=\"0.2588\" y1=\"-0.3048\" x2=\"0.5588\" y2=\"0.2951\" layer=\"51\"/>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n</package>\n<package name=\"C0504\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<wire x1=\"-1.473\" y1=\"0.983\" x2=\"1.473\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire 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ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-2.794\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-030X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 3 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.524\" x2=\"2.159\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.524\" x2=\"-2.159\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.27\" x2=\"2.413\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.27\" x2=\"-2.413\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.524\" x2=\"2.413\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.27\" x2=\"-2.159\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-1.524\" x2=\"2.413\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.413\" y1=\"-1.27\" x2=\"-2.159\" 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y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-040X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 4 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.905\" x2=\"2.159\" y2=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.905\" x2=\"-2.159\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"1.651\" x2=\"2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.651\" x2=\"-2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.905\" x2=\"2.413\" y2=\"1.651\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"1.651\" x2=\"-2.159\" y2=\"1.905\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-1.905\" x2=\"2.413\" y2=\"-1.651\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.413\" y1=\"-1.651\" x2=\"-2.159\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"0.762\" y1=\"0\" x2=\"0.381\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.381\" y1=\"0\" x2=\"0.254\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0.762\" x2=\"-0.254\" y2=\"0\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.381\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.381\" y1=\"0\" x2=\"-0.762\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-050X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 5 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"2.286\" x2=\"2.159\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-2.286\" x2=\"-2.159\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"2.032\" x2=\"2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"2.032\" x2=\"-2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"2.286\" x2=\"2.413\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"2.032\" x2=\"-2.159\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-2.286\" x2=\"2.413\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.413\" y1=\"-2.032\" x2=\"-2.159\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"0.762\" y1=\"0\" x2=\"0.381\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.381\" y1=\"0\" x2=\"0.254\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0.762\" x2=\"-0.254\" y2=\"0\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.381\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.381\" y1=\"0\" x2=\"-0.762\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"2.54\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.286\" y=\"-3.81\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025-060X050\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm, outline 6 x 5 mm</description>\n<wire x1=\"-2.159\" y1=\"2.794\" x2=\"2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-2.794\" x2=\"-2.159\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.413\" y1=\"2.54\" x2=\"2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"2.54\" x2=\"-2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"2.794\" x2=\"2.413\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" y1=\"2.54\" x2=\"-2.159\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.159\" y1=\"-2.794\" x2=\"2.413\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.413\" y1=\"-2.54\" x2=\"-2.159\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"0.762\" y1=\"0\" x2=\"0.381\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.381\" y1=\"0\" x2=\"0.254\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"0.254\" y1=\"0\" x2=\"0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0.762\" x2=\"-0.254\" y2=\"0\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.254\" y2=\"-0.762\" width=\"0.254\" layer=\"21\"/>\n<wire x1=\"-0.254\" y1=\"0\" x2=\"-0.381\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.381\" y1=\"0\" x2=\"-0.762\" y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.286\" y=\"3.048\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.032\" y=\"-2.413\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025_050-024X070\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 mm + 5 mm, outline 2.4 x 7 mm</description>\n<wire x1=\"-2.159\" y1=\"-0.635\" x2=\"-2.159\" y2=\"0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-2.159\" y1=\"0.635\" x2=\"-1.651\" y2=\"1.143\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.159\" y1=\"-0.635\" x2=\"-1.651\" y2=\"-1.143\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"1.651\" y1=\"1.143\" x2=\"-1.651\" y2=\"1.143\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-0.635\" x2=\"2.159\" y2=\"0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"1.651\" y1=\"-1.143\" x2=\"-1.651\" y2=\"-1.143\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.651\" y1=\"1.143\" x2=\"2.159\" y2=\"0.635\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-4.191\" y1=\"-1.143\" x2=\"-3.9624\" y2=\"-1.143\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.191\" 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y2=\"0\" width=\"0.1524\" layer=\"51\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"1.397\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-2.667\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C025_050-025X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 2.5 + 5 mm, outline 2.5 x 7.5 mm</description>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"2.159\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"-1.27\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.413\" y1=\"1.016\" x2=\"-2.413\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.159\" y1=\"1.27\" x2=\"2.413\" y2=\"1.016\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.413\" 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name=\"C050-030X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.27\" x2=\"-3.683\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.524\" x2=\"3.429\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.27\" x2=\"3.683\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.524\" x2=\"3.683\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.524\" x2=\"3.683\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.27\" x2=\"-3.429\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.27\" x2=\"-3.429\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-050X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"2.286\" x2=\"-3.683\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-2.54\" x2=\"3.429\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-2.286\" x2=\"3.683\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.54\" x2=\"-3.429\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.54\" x2=\"3.683\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-2.54\" x2=\"3.683\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-2.286\" x2=\"-3.429\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.159\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-055X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 5.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"2.54\" x2=\"-3.683\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-2.794\" x2=\"3.429\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-2.54\" x2=\"3.683\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.794\" x2=\"-3.429\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.794\" x2=\"3.683\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-2.794\" x2=\"3.683\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-2.54\" x2=\"-3.429\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"2.54\" x2=\"-3.429\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"3.175\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.302\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-1.524\" y1=\"0\" x2=\"-0.4572\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.4572\" y1=\"0\" x2=\"-0.4572\" y2=\"0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.4572\" y1=\"0\" x2=\"-0.4572\" y2=\"-0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.4318\" y1=\"0.762\" x2=\"0.4318\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.4318\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.4318\" y1=\"0\" x2=\"0.4318\" y2=\"-0.762\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"3.429\" x2=\"-3.683\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-3.683\" x2=\"3.429\" y2=\"-3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-3.429\" x2=\"3.683\" y2=\"3.429\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"3.683\" x2=\"-3.429\" y2=\"3.683\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"3.683\" x2=\"3.683\" y2=\"3.429\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-3.683\" x2=\"3.683\" y2=\"-3.429\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-3.429\" x2=\"-3.429\" y2=\"-3.683\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"3.429\" x2=\"-3.429\" y2=\"3.683\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.429\" y=\"4.064\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-2.921\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050H075X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nHorizontal, grid 5 mm, outline 7.5 x 7.5 mm</description>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0.508\" x2=\"-3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.302\" y1=\"0.508\" x2=\"-1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.778\" y1=\"0.508\" x2=\"1.778\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"1.778\" y1=\"0.508\" x2=\"3.302\" y2=\"0.508\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"3.302\" y1=\"0.508\" x2=\"3.683\" y2=\"0.508\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"0.508\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"2.413\" x2=\"-0.3048\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-0.3048\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"1.778\" x2=\"-1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"2.413\" x2=\"0.3302\" y2=\"1.778\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"0.3302\" y2=\"1.143\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"1.778\" x2=\"1.651\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"7.112\" x2=\"-3.175\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.175\" y1=\"7.62\" x2=\"3.683\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<wire x1=\"2.54\" y1=\"0\" x2=\"2.54\" y2=\"0.254\" width=\"0.508\" layer=\"51\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.302\" y=\"8.001\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"3.175\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-2.794\" y1=\"0.127\" x2=\"-2.286\" y2=\"0.508\" layer=\"51\"/>\n<rectangle x1=\"2.286\" y1=\"0.127\" x2=\"2.794\" y2=\"0.508\" layer=\"51\"/>\n</package>\n<package name=\"C075-032X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 3.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-1.524\" x2=\"4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.27\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"1.524\" x2=\"5.08\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-1.524\" x2=\"5.08\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.27\" x2=\"-4.826\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-4.826\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-0.508\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0.889\" x2=\"-0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-0.508\" y1=\"0\" x2=\"-0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0.889\" x2=\"0.508\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"0.508\" y1=\"0\" x2=\"0.508\" y2=\"-0.889\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.826\" y=\"-3.048\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-042X103\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 4.2 x 10.3 mm</description>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.826\" y1=\"-2.032\" x2=\"4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"-1.778\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.826\" y1=\"2.032\" x2=\"5.08\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.826\" y1=\"-2.032\" x2=\"5.08\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"-1.778\" x2=\"-4.826\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.08\" y1=\"1.778\" x2=\"-4.826\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.699\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-052X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 5.2 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.54\" x2=\"4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.286\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.54\" x2=\"5.207\" y2=\"2.286\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-2.54\" x2=\"5.207\" y2=\"-2.286\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.286\" x2=\"-4.953\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.286\" x2=\"-4.953\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-043X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 4.3 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.032\" x2=\"6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"1.524\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.032\" x2=\"6.604\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.032\" x2=\"6.604\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-1.524\" x2=\"-6.096\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"1.524\" x2=\"-6.096\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.413\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.651\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-054X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 5.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"2.54\" x2=\"6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.032\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"2.54\" x2=\"6.604\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-2.54\" x2=\"6.604\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.032\" x2=\"-6.096\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.032\" x2=\"-6.096\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-1.905\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102-064X133\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm, outline 6.4 x 13.3 mm</description>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"0\" x2=\"-2.286\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.604\" y1=\"2.54\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.604\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.096\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C102_152-062X184\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 10.2 mm + 15.2 mm, outline 6.2 x 18.4 mm</description>\n<wire x1=\"-2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"1.27\" x2=\"-3.175\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.175\" y1=\"0\" x2=\"-3.175\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"0\" x2=\"-3.175\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"0\" x2=\"3.683\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"0\" x2=\"8.636\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"6.223\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.604\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.223\" y1=\"3.048\" x2=\"6.731\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.223\" y1=\"-3.048\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"-2.54\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-6.604\" y1=\"2.54\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.731\" y1=\"2.54\" x2=\"6.731\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.176\" y1=\"3.048\" x2=\"11.684\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"11.176\" y1=\"-3.048\" x2=\"7.112\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"3.048\" x2=\"11.176\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"11.684\" y1=\"2.54\" x2=\"11.684\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"3\" x=\"10.033\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-5.969\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-1.524\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-054X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 5.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.032\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"2.54\" x2=\"8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"2.54\" x2=\"9.017\" y2=\"2.032\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-2.54\" x2=\"9.017\" y2=\"-2.032\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.032\" x2=\"-8.509\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.032\" x2=\"-8.509\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.382\" y=\"2.921\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-064X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 6.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"2.54\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.048\" x2=\"8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.048\" x2=\"9.017\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.048\" x2=\"9.017\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-2.54\" x2=\"-8.509\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"2.54\" x2=\"-8.509\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.032\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-072X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 7.2 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.048\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"3.556\" x2=\"8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"3.556\" x2=\"9.017\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-3.556\" x2=\"9.017\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.048\" x2=\"-8.509\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.048\" x2=\"-8.509\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"3.937\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.286\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-084X183\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 8.4 x 18.3 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.556\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.064\" x2=\"8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.064\" x2=\"9.017\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.064\" x2=\"9.017\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.556\" x2=\"-8.509\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.556\" x2=\"-8.509\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.445\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C150-091X182\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 15 mm, outline 9.1 x 18.2 mm</description>\n<wire x1=\"-5.08\" y1=\"1.27\" x2=\"-5.08\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-5.08\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"1.27\" x2=\"-4.191\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"-4.191\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-4.191\" y1=\"0\" x2=\"6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-6.096\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.017\" y1=\"3.937\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.509\" y1=\"4.445\" x2=\"8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.509\" y1=\"4.445\" x2=\"9.017\" y2=\"3.937\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"8.509\" y1=\"-4.445\" x2=\"9.017\" y2=\"-3.937\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"-3.937\" x2=\"-8.509\" y2=\"-4.445\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-9.017\" y1=\"3.937\" x2=\"-8.509\" y2=\"4.445\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.493\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-8.509\" y=\"4.826\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.429\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-062X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 6.2 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.048\" x2=\"12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"2.54\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.048\" x2=\"13.335\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.048\" x2=\"13.335\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-2.54\" x2=\"-12.827\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"2.54\" x2=\"-12.827\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.7\" y=\"3.429\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-074X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 7.4 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"3.556\" x2=\"12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.048\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"3.556\" x2=\"13.335\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-3.556\" x2=\"13.335\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.048\" x2=\"-12.827\" y2=\"-3.556\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.048\" x2=\"-12.827\" y2=\"3.556\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"3.937\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-087X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 8.7 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"4.318\" x2=\"12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"3.81\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"4.318\" x2=\"13.335\" y2=\"3.81\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-4.318\" x2=\"13.335\" y2=\"-3.81\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-3.81\" x2=\"-12.827\" y2=\"-4.318\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"3.81\" x2=\"-12.827\" y2=\"4.318\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.827\" y=\"4.699\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-108X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 10.8 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.334\" x2=\"12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"4.826\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.334\" x2=\"13.335\" y2=\"4.826\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.334\" x2=\"13.335\" y2=\"-4.826\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-4.826\" x2=\"-12.827\" y2=\"-5.334\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"4.826\" x2=\"-12.827\" y2=\"5.334\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.715\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C225-113X268\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 22.5 mm, outline 11.3 x 26.8 mm</description>\n<wire x1=\"-12.827\" y1=\"5.588\" x2=\"12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.335\" y1=\"5.08\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"12.827\" y1=\"5.588\" x2=\"13.335\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"12.827\" y1=\"-5.588\" x2=\"13.335\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"-5.08\" x2=\"-12.827\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-13.335\" y1=\"5.08\" x2=\"-12.827\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-9.652\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"9.652\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"11.303\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-12.954\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-093X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 9.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"4.572\" x2=\"15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"4.064\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"4.572\" x2=\"15.748\" y2=\"4.064\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-4.572\" x2=\"15.748\" y2=\"-4.064\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-4.064\" x2=\"-15.24\" y2=\"-4.572\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"4.064\" x2=\"-15.24\" y2=\"4.572\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"4.953\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-113X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 11.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"5.588\" x2=\"15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"5.08\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"5.588\" x2=\"15.748\" y2=\"5.08\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-5.588\" x2=\"15.748\" y2=\"-5.08\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-5.08\" x2=\"-15.24\" y2=\"-5.588\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"5.08\" x2=\"-15.24\" y2=\"5.588\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"5.969\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-134X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 13.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"6.604\" x2=\"15.24\" y2=\"6.604\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"6.096\" x2=\"15.748\" y2=\"-6.096\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-6.604\" x2=\"-15.24\" y2=\"-6.604\" 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layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"6.985\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-205X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 20.5 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"10.16\" x2=\"15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"9.652\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"10.16\" x2=\"15.748\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-10.16\" x2=\"15.748\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-9.652\" x2=\"-15.24\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"9.652\" x2=\"-15.24\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-4.318\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-137X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 13.7 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-6.731\" x2=\"18.542\" y2=\"-6.731\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"6.731\" x2=\"-18.542\" y2=\"6.731\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.2372\" y=\"7.0612\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-162X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 16.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"8.001\" x2=\"18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"8.001\" x2=\"-18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-8.001\" x2=\"18.542\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"8.001\" x2=\"-18.542\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"8.3312\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C325-182X374\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 32.5 mm, outline 18.2 x 37.4 mm</description>\n<wire x1=\"-14.2748\" y1=\"0\" x2=\"-12.7\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"1.905\" x2=\"-12.7\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"1.905\" x2=\"-11.811\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"14.2748\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-11.811\" y1=\"0\" x2=\"-11.811\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-12.7\" y1=\"0\" x2=\"-12.7\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-18.542\" y1=\"-9.017\" x2=\"18.542\" y2=\"-9.017\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"18.542\" y1=\"9.017\" x2=\"-18.542\" y2=\"9.017\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"16.256\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-18.3642\" y=\"9.3472\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-10.8458\" y=\"-2.8702\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-192X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 19.2 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"8.509\" x2=\"20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"8.001\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"8.509\" x2=\"20.828\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-8.509\" x2=\"20.828\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-8.001\" x2=\"-20.32\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"8.001\" x2=\"-20.32\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-203X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 20.3 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"10.16\" x2=\"20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"9.652\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"10.16\" x2=\"20.828\" y2=\"9.652\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-10.16\" x2=\"20.828\" y2=\"-9.652\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-9.652\" x2=\"-20.32\" y2=\"-10.16\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"9.652\" x2=\"-20.32\" y2=\"10.16\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.32\" y=\"10.541\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C050-035X075\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 5 mm, outline 3.5 x 7.5 mm</description>\n<wire x1=\"-0.3048\" y1=\"0.635\" x2=\"-0.3048\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-0.3048\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"-0.3048\" y1=\"0\" x2=\"-1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0.635\" x2=\"0.3302\" y2=\"0\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"0.3302\" y2=\"-0.635\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"0.3302\" y1=\"0\" x2=\"1.524\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.429\" y1=\"-1.778\" x2=\"3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.683\" y1=\"-1.524\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"1.778\" x2=\"3.683\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"3.429\" y1=\"-1.778\" x2=\"3.683\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"-1.524\" x2=\"-3.429\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-3.683\" y1=\"1.524\" x2=\"-3.429\" y2=\"1.778\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-3.556\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.556\" y=\"-3.429\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C375-155X418\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 37.5 mm, outline 15.5 x 41.8 mm</description>\n<wire x1=\"-20.32\" y1=\"7.62\" x2=\"20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.828\" y1=\"7.112\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"20.32\" y1=\"7.62\" x2=\"20.828\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"20.32\" y1=\"-7.62\" x2=\"20.828\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"-7.112\" x2=\"-20.32\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-20.828\" y1=\"7.112\" x2=\"-20.32\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-16.002\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"16.002\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"18.796\" y=\"0\" drill=\"1.3208\" shape=\"octagon\"/>\n<text x=\"-20.447\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C075-063X106\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 7.5 mm, outline 6.3 x 10.6 mm</description>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-3.048\" x2=\"4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.207\" y1=\"-2.794\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"3.048\" x2=\"5.207\" y2=\"2.794\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.953\" y1=\"-3.048\" x2=\"5.207\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-5.207\" y1=\"2.794\" x2=\"-4.953\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"2.667\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.667\" y1=\"0\" x2=\"-2.159\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"1.27\" x2=\"-2.159\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.159\" y1=\"0\" x2=\"-2.159\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"1.27\" x2=\"-1.27\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"0\" x2=\"-1.27\" y2=\"-1.27\" width=\"0.4064\" layer=\"21\"/>\n<pad name=\"1\" x=\"-3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"3.81\" y=\"0\" drill=\"0.9144\" shape=\"octagon\"/>\n<text x=\"-4.826\" y=\"3.429\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-154X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 15.4 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"7.112\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-7.62\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-7.112\" x2=\"-15.748\" y2=\"7.112\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"7.62\" x2=\"15.748\" y2=\"7.112\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-7.62\" x2=\"15.748\" y2=\"-7.112\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-7.112\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"7.112\" x2=\"-15.24\" y2=\"7.62\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.001\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C275-173X316\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\ngrid 27.5 mm, outline 17.3 x 31.6 mm</description>\n<wire x1=\"-15.24\" y1=\"8.509\" x2=\"15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.748\" y1=\"8.001\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"1.905\" x2=\"-6.731\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"-6.731\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"1.905\" x2=\"-7.62\" y2=\"0\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"15.24\" y1=\"8.509\" x2=\"15.748\" y2=\"8.001\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"15.24\" y1=\"-8.509\" x2=\"15.748\" y2=\"-8.001\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"-8.001\" x2=\"-15.24\" y2=\"-8.509\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-15.748\" y1=\"8.001\" x2=\"-15.24\" y2=\"8.509\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-11.557\" y1=\"0\" x2=\"-7.62\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.731\" y1=\"0\" x2=\"11.557\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"13.716\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-15.24\" y=\"8.89\" size=\"1.778\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.08\" y=\"-2.54\" size=\"1.778\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"C0402K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0204 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1005</description>\n<wire x1=\"-0.425\" y1=\"0.2\" x2=\"0.425\" y2=\"0.2\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.425\" y1=\"-0.2\" x2=\"-0.425\" y2=\"-0.2\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.6\" y=\"0\" dx=\"0.925\" dy=\"0.74\" layer=\"1\"/>\n<text x=\"-0.5\" y=\"0.425\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.5\" y=\"-1.45\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.5\" y1=\"-0.25\" x2=\"-0.225\" y2=\"0.25\" layer=\"51\"/>\n<rectangle x1=\"0.225\" y1=\"-0.25\" x2=\"0.5\" y2=\"0.25\" layer=\"51\"/>\n</package>\n<package name=\"C0603K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0603 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 1608</description>\n<wire x1=\"-0.725\" y1=\"0.35\" x2=\"0.725\" y2=\"0.35\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.725\" y1=\"-0.35\" x2=\"-0.725\" y2=\"-0.35\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.875\" y=\"0\" dx=\"1.05\" dy=\"1.08\" layer=\"1\"/>\n<text x=\"-0.8\" y=\"0.65\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.8\" y=\"-1.65\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8\" y1=\"-0.4\" x2=\"-0.45\" y2=\"0.4\" layer=\"51\"/>\n<rectangle x1=\"0.45\" y1=\"-0.4\" x2=\"0.8\" y2=\"0.4\" layer=\"51\"/>\n</package>\n<package name=\"C0805K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 0805 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 2012</description>\n<wire x1=\"-0.925\" y1=\"0.6\" x2=\"0.925\" y2=\"0.6\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"0.925\" y1=\"-0.6\" x2=\"-0.925\" y2=\"-0.6\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1\" y=\"0\" dx=\"1.3\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1\" y=\"0.875\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1\" y=\"-1.9\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1\" y1=\"-0.65\" x2=\"-0.5\" y2=\"0.65\" layer=\"51\"/>\n<rectangle x1=\"0.5\" y1=\"-0.65\" x2=\"1\" y2=\"0.65\" layer=\"51\"/>\n</package>\n<package name=\"C1206K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1206 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3216</description>\n<wire x1=\"-1.525\" y1=\"0.75\" x2=\"1.525\" y2=\"0.75\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-0.75\" x2=\"-1.525\" y2=\"-0.75\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.1\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.1\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-0.8\" x2=\"-1.1\" y2=\"0.8\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-0.8\" x2=\"1.6\" y2=\"0.8\" layer=\"51\"/>\n</package>\n<package name=\"C1210K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1210 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 3225</description>\n<wire x1=\"-1.525\" y1=\"1.175\" x2=\"1.525\" y2=\"1.175\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-1.175\" x2=\"-1.525\" y2=\"-1.175\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.5\" dy=\"2.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"1.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-2.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-1.25\" x2=\"-1.1\" y2=\"1.25\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-1.25\" x2=\"1.6\" y2=\"1.25\" layer=\"51\"/>\n</package>\n<package name=\"C1812K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1812 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4532</description>\n<wire x1=\"-2.175\" y1=\"1.525\" x2=\"2.175\" y2=\"1.525\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.175\" y1=\"-1.525\" x2=\"-2.175\" y2=\"-1.525\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.05\" y=\"0\" dx=\"1.8\" dy=\"3.7\" layer=\"1\"/>\n<text x=\"-2.25\" y=\"1.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.25\" y=\"-2.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.25\" y1=\"-1.6\" x2=\"-1.65\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"1.65\" y1=\"-1.6\" x2=\"2.25\" y2=\"1.6\" layer=\"51\"/>\n</package>\n<package name=\"C1825K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 1825 reflow solder&lt;/b&gt;&lt;p&gt;\nMetric Code Size 4564</description>\n<wire x1=\"-1.525\" y1=\"3.125\" x2=\"1.525\" y2=\"3.125\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"1.525\" y1=\"-3.125\" x2=\"-1.525\" y2=\"-3.125\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.8\" dy=\"6.9\" layer=\"1\"/>\n<text x=\"-1.6\" y=\"3.55\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.6\" y=\"-4.625\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.6\" y1=\"-3.2\" x2=\"-1.1\" y2=\"3.2\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-3.2\" x2=\"1.6\" y2=\"3.2\" layer=\"51\"/>\n</package>\n<package name=\"C2220K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2220 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5650</description>\n<wire x1=\"-2.725\" y1=\"2.425\" x2=\"2.725\" y2=\"2.425\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-2.425\" x2=\"-2.725\" y2=\"-2.425\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"5.5\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"2.95\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-3.975\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-2.5\" x2=\"-2.2\" y2=\"2.5\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-2.5\" x2=\"2.8\" y2=\"2.5\" layer=\"51\"/>\n</package>\n<package name=\"C2225K\">\n<description>&lt;b&gt;Ceramic Chip Capacitor KEMET 2225 reflow solder&lt;/b&gt;&lt;p&gt;Metric Code Size 5664</description>\n<wire x1=\"-2.725\" y1=\"3.075\" x2=\"2.725\" y2=\"3.075\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"2.725\" y1=\"-3.075\" x2=\"-2.725\" y2=\"-3.075\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.55\" y=\"0\" dx=\"1.85\" dy=\"6.8\" layer=\"1\"/>\n<text x=\"-2.8\" y=\"3.6\" size=\"1.016\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.8\" y=\"-4.575\" size=\"1.016\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.8\" y1=\"-3.15\" x2=\"-2.2\" y2=\"3.15\" layer=\"51\"/>\n<rectangle x1=\"2.2\" y1=\"-3.15\" x2=\"2.8\" y2=\"3.15\" layer=\"51\"/>\n</package>\n<package name=\"C0201\">\n<description>Source: http://www.avxcorp.com/docs/catalogs/cx5r.pdf</description>\n<smd name=\"1\" x=\"-0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.25\" y=\"0\" dx=\"0.25\" dy=\"0.35\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.1\" x2=\"0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"-0.1\" layer=\"51\"/>\n</package>\n<package name=\"C1808\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-1.4732\" y1=\"0.9502\" x2=\"1.4732\" y2=\"0.9502\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-1.4478\" y1=\"-0.9502\" x2=\"1.4732\" y2=\"-0.9502\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.95\" y=\"0\" dx=\"1.6\" dy=\"2.2\" layer=\"1\"/>\n<text x=\"-2.233\" y=\"1.827\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.233\" y=\"-2.842\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-2.275\" y1=\"-1.015\" x2=\"-1.225\" y2=\"1.015\" layer=\"51\"/>\n<rectangle x1=\"1.225\" y1=\"-1.015\" x2=\"2.275\" y2=\"1.015\" layer=\"51\"/>\n</package>\n<package name=\"C3640\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;&lt;p&gt;\nSource: AVX .. aphvc.pdf</description>\n<wire x1=\"-3.8322\" y1=\"5.0496\" x2=\"3.8322\" y2=\"5.0496\" width=\"0.1016\" layer=\"51\"/>\n<wire x1=\"-3.8322\" y1=\"-5.0496\" x2=\"3.8322\" y2=\"-5.0496\" width=\"0.1016\" layer=\"51\"/>\n<smd name=\"1\" x=\"-4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.267\" y=\"0\" dx=\"2.6\" dy=\"10.7\" layer=\"1\"/>\n<text x=\"-4.647\" y=\"6.465\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-4.647\" y=\"-7.255\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-4.57\" y1=\"-5.1\" x2=\"-3.05\" y2=\"5.1\" layer=\"51\"/>\n<rectangle x1=\"3.05\" y1=\"-5.1\" x2=\"4.5688\" y2=\"5.1\" layer=\"51\"/>\n</package>\n<package name=\"C01005\">\n<description>&lt;b&gt;CAPACITOR&lt;/b&gt;</description>\n<rectangle x1=\"-0.1999\" y1=\"-0.3\" x2=\"0.1999\" y2=\"0.3\" layer=\"35\"/>\n<rectangle x1=\"-0.2\" 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name=\"\"/>\n</technologies>\n</device>\n<device name=\"C0805K\" package=\"C0805K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1206K\" package=\"C1206K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1210K\" package=\"C1210K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1812K\" package=\"C1812K\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C1825K\" 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gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"C3640\" package=\"C3640\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"C01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"usb-serial\">\n<packages>\n<package name=\"SOIC16\">\n<description>&lt;b&gt;SMALL OUTLINE INTEGRATED CIRCUIT&lt;/b&gt;&lt;p&gt;\n16-Pin (150-Mil) SOIC&lt;br&gt;\nSource: http://www.cypress.com .. 38-12025_0P_V.pdf</description>\n<wire x1=\"4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"-1.795\" x2=\"-4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"1.795\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"4.79\" y1=\"1.795\" x2=\"4.79\" y2=\"-1.795\" width=\"0.2032\" layer=\"51\"/>\n<circle x=\"-4.05\" y=\"-0.995\" radius=\"0.3256\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"2\" x=\"-3.175\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"13\" x=\"-0.635\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"1\" x=\"-4.445\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"3\" x=\"-1.905\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"4\" x=\"-0.635\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"14\" x=\"-1.905\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"12\" x=\"0.635\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"11\" x=\"1.905\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"6\" x=\"1.905\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"9\" x=\"4.445\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"5\" x=\"0.635\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"7\" x=\"3.175\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"10\" x=\"3.175\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"8\" x=\"4.445\" y=\"-2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"15\" x=\"-3.175\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<smd name=\"16\" x=\"-4.445\" y=\"2.695\" dx=\"0.635\" dy=\"1.524\" layer=\"1\"/>\n<text x=\"-5.207\" y=\"-2.54\" size=\"1.016\" layer=\"21\" font=\"vector\" rot=\"R90\">CH340G</text>\n<rectangle x1=\"-4.6901\" y1=\"-2.921\" x2=\"-4.1999\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-3.4201\" y1=\"-2.921\" x2=\"-2.9299\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-2.1501\" y1=\"-2.921\" x2=\"-1.6599\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"-0.8801\" y1=\"-2.921\" x2=\"-0.3899\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"0.3899\" y1=\"-2.921\" x2=\"0.8801\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"1.6599\" y1=\"-2.921\" x2=\"2.1501\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"2.9299\" y1=\"-2.921\" x2=\"3.4201\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"4.1999\" y1=\"-2.921\" x2=\"4.6901\" y2=\"-1.8951\" layer=\"51\"/>\n<rectangle x1=\"4.1999\" y1=\"1.8951\" x2=\"4.6901\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"2.9299\" y1=\"1.8951\" x2=\"3.4201\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"1.6599\" y1=\"1.8951\" x2=\"2.1501\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"0.3899\" y1=\"1.8951\" x2=\"0.8801\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-0.8801\" y1=\"1.8951\" x2=\"-0.3899\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-2.1501\" y1=\"1.8951\" x2=\"-1.6599\" y2=\"2.921\" layer=\"51\"/>\n<rectangle x1=\"-3.4201\" y1=\"1.8951\" x2=\"-2.9299\" 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x=\"-10.16\" y=\"10.16\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"RTS\" x=\"-10.16\" y=\"12.7\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"RS232\" x=\"-10.16\" y=\"15.24\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VCC\" x=\"-10.16\" y=\"17.78\" length=\"middle\" rot=\"R180\"/>\n<text x=\"-27.94\" y=\"20.32\" size=\"1.778\" layer=\"94\">CH340G</text>\n<wire x1=\"-15.24\" y1=\"20.32\" x2=\"-15.24\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-15.24\" y1=\"20.32\" x2=\"-30.48\" y2=\"20.32\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-30.48\" y1=\"20.32\" x2=\"-30.48\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"-30.48\" y1=\"-2.54\" x2=\"-15.24\" y2=\"-2.54\" width=\"0.1524\" layer=\"97\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"CH340G\">\n<gates>\n<gate name=\"G$1\" symbol=\"CH340G\" x=\"22.86\" y=\"-5.08\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"SOIC16\">\n<connects>\n<connect gate=\"G$1\" pin=\"CTS\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"D+\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"D-\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"DCD\" pad=\"12\"/>\n<connect gate=\"G$1\" pin=\"DSR\" pad=\"10\"/>\n<connect gate=\"G$1\" pin=\"DTR\" pad=\"13\"/>\n<connect gate=\"G$1\" pin=\"GND\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"RI\" pad=\"11\"/>\n<connect gate=\"G$1\" pin=\"RS232\" pad=\"15\"/>\n<connect gate=\"G$1\" pin=\"RTS\" pad=\"14\"/>\n<connect gate=\"G$1\" pin=\"RX\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"TX\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"V3\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"VCC\" pad=\"16\"/>\n<connect gate=\"G$1\" pin=\"XI\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"XO\" pad=\"8\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"SparkFun-FreqCtrl\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find crystals and oscillators and other things that go \"tick\".&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"HC49U-V\">\n<description>&lt;b&gt;CRYSTAL&lt;/b&gt;</description>\n<wire x1=\"-2.921\" y1=\"-2.286\" x2=\"2.921\" y2=\"-2.286\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.921\" y1=\"2.286\" x2=\"2.921\" y2=\"2.286\" width=\"0.4064\" layer=\"21\"/>\n<wire x1=\"-2.921\" y1=\"-1.778\" x2=\"2.921\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.921\" y1=\"1.778\" x2=\"-2.921\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.921\" y1=\"1.778\" x2=\"2.921\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"2.921\" y1=\"2.286\" x2=\"2.921\" y2=\"-2.286\" width=\"0.4064\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-2.921\" y1=\"2.286\" x2=\"-2.921\" y2=\"-2.286\" width=\"0.4064\" layer=\"21\" curve=\"180\"/>\n<wire x1=\"-2.921\" y1=\"1.778\" x2=\"-2.921\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"180\"/>\n<wire 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y=\"0\" dx=\"5.334\" dy=\"1.9304\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.826\" y=\"0\" dx=\"5.334\" dy=\"1.9304\" layer=\"1\"/>\n<text x=\"-5.715\" y=\"2.794\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.715\" y=\"-4.191\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-6.604\" y1=\"-3.048\" x2=\"6.604\" y2=\"3.048\" layer=\"43\"/>\n</package>\n<package name=\"HC49US\">\n<description>&lt;B&gt;CRYSTAL&lt;/B&gt;</description>\n<wire x1=\"-3.429\" y1=\"-2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"2.286\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.429\" y1=\"2.286\" x2=\"3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"-180\"/>\n<wire x1=\"-3.429\" y1=\"2.286\" x2=\"-3.429\" y2=\"-2.286\" width=\"0.2032\" layer=\"21\" curve=\"180\"/>\n<pad name=\"1\" x=\"-2.54\" y=\"0\" drill=\"0.7\" diameter=\"1.651\" rot=\"R90\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" 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layer=\"21\"/>\n<wire x1=\"2.6\" y1=\"-1.6\" x2=\"-2.6\" y2=\"-1.6\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-1.016\" y=\"0.254\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.016\" y=\"-0.508\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"CRYSTAL-SMD-3.2X1.5MM\">\n<description>&lt;h3&gt;3.2 x 1.5mm Crystal Package&lt;/h3&gt;\n&lt;p&gt;e.g: &lt;a href=\"http://www.sii.co.jp/en/quartz/files/2013/03/file_PRODUCT_MASTER_50812_GRAPHIC03.pdf\"&gt;SX-32S&lt;/a&gt;&lt;/p&gt;</description>\n<smd name=\"P$1\" x=\"-1.25\" y=\"0\" dx=\"1\" dy=\"1.8\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"1.25\" y=\"0\" dx=\"1\" dy=\"1.8\" layer=\"1\"/>\n<wire x1=\"-1.6\" y1=\"0.75\" x2=\"1.6\" y2=\"0.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.6\" y1=\"0.75\" x2=\"1.6\" y2=\"-0.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.6\" y1=\"-0.75\" x2=\"-1.6\" y2=\"-0.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.6\" y1=\"-0.75\" x2=\"-1.6\" y2=\"0.75\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.5\" y1=\"0.75\" x2=\"0.5\" y2=\"0.75\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.5\" y1=\"-0.75\" x2=\"-0.5\" y2=\"-0.75\" width=\"0.2032\" layer=\"21\"/>\n<text x=\"0\" y=\"1.143\" size=\"0.8128\" layer=\"25\" align=\"bottom-center\">&gt;Name</text>\n<text x=\"0\" y=\"-1.143\" size=\"0.8128\" layer=\"27\" align=\"top-center\">&gt;Value</text>\n</package>\n</packages>\n<symbols>\n<symbol name=\"Q\">\n<wire x1=\"1.016\" y1=\"0\" x2=\"2.54\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"0\" x2=\"-1.016\" y2=\"0\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-0.381\" y1=\"1.524\" x2=\"-0.381\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-0.381\" y1=\"-1.524\" x2=\"0.381\" y2=\"-1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0.381\" y1=\"-1.524\" x2=\"0.381\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0.381\" y1=\"1.524\" x2=\"-0.381\" y2=\"1.524\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.016\" y1=\"1.778\" x2=\"1.016\" y2=\"-1.778\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-1.016\" y1=\"1.778\" x2=\"-1.016\" y2=\"-1.778\" width=\"0.254\" layer=\"94\"/>\n<text x=\"2.54\" y=\"1.016\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<text x=\"-2.159\" y=\"-1.143\" size=\"0.8636\" layer=\"93\">1</text>\n<text x=\"1.524\" y=\"-1.143\" size=\"0.8636\" layer=\"93\">2</text>\n<pin name=\"2\" x=\"2.54\" y=\"0\" visible=\"off\" length=\"point\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"1\" x=\"-2.54\" y=\"0\" visible=\"off\" length=\"point\" direction=\"pas\" swaplevel=\"1\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"CRYSTAL\" prefix=\"Y\" uservalue=\"yes\">\n<description>Various standard crystals. Proven footprints.</description>\n<gates>\n<gate name=\"G$1\" symbol=\"Q\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"HC49UV\" package=\"HC49U-V\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC38H\" package=\"TC38H\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC26H\" package=\"TC26H\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-10112\"/>\n<attribute name=\"VALUE\" value=\"32.768kHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"HC49UP\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"HC49US\" package=\"HC49US\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"32-SMD-MELF\" package=\"CRYSTAL-32KHZ-SMD-MELF\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"X1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"X2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-07894\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-16MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-08218\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"EPSONMC146\" package=\"CRYSTAL-32KHZ-SMD_EPSON_MC146\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$2\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$1\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"10.5X4.8\" package=\"CRYSTAL-SMD-10.5X4.8-2PIN\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TC26H_EZ\" package=\"TC26HEZ\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"TXC-7A\" package=\"CRYSTAL-TXC-7A\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-12.288MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-09653\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"12.288MHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"3.2X1.5MM\" package=\"CRYSTAL-SMD-3.2X1.5MM\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-13062\"/>\n<attribute name=\"VALUE\" value=\"32.768kHz\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CRYSTAL-SMD-5X3-12MHZ\" package=\"CRYSTAL-SMD-5X3\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"3\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"XTAL-08297\"/>\n<attribute name=\"VALUE\" value=\"12MHz\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Luca Eagle-Library\">\n<packages>\n<package name=\"MSOP10\">\n<description>&lt;b&gt;10-Lead Mini Small Outline Package [MSOP]&lt;/b&gt; (RM-10)&lt;p&gt;\nSource: http://www.analog.com/UploadedFiles/Data_Sheets/35641221898805SSM2167_b.pdf&lt;br&gt;\nCOMPLIANT TO JEDEC STANDARDS MO-187BA</description>\n<wire x1=\"-1.4\" y1=\"1.4\" x2=\"1.4\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"1.4\" x2=\"1.4\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1.4\" y1=\"-1.4\" x2=\"-1.4\" y2=\"-1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.4\" y1=\"-1.4\" x2=\"-1.4\" y2=\"1.4\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.8\" y1=\"-1.1\" x2=\"-0.8\" y2=\"-0.5\" width=\"0.2032\" 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ratio=\"10\" rot=\"R90\">&gt;NAME</text>\n<text x=\"3.302\" y=\"-2.54\" size=\"1.27\" layer=\"27\" ratio=\"10\" rot=\"R90\">&gt;VALUE</text>\n<rectangle x1=\"-1.1244\" y1=\"-2.5\" x2=\"-0.8744\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"-0.6244\" y1=\"-2.5\" x2=\"-0.3744\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"-0.1244\" y1=\"-2.5\" x2=\"0.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.3756\" y1=\"-2.5\" x2=\"0.6256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8756\" y1=\"-2.5\" x2=\"1.1256\" y2=\"-1.5\" layer=\"51\"/>\n<rectangle x1=\"0.8744\" y1=\"1.5\" x2=\"1.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"0.3744\" y1=\"1.5\" x2=\"0.6244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.1256\" y1=\"1.5\" x2=\"0.1244\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-0.6256\" y1=\"1.5\" x2=\"-0.3756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n<rectangle x1=\"-1.1256\" y1=\"1.5\" x2=\"-0.8756\" y2=\"2.5\" layer=\"51\" rot=\"R180\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"MCP4728\">\n<pin name=\"VDD\" x=\"-20.32\" y=\"5.08\" length=\"middle\"/>\n<pin name=\"SCL\" x=\"-20.32\" y=\"2.54\" length=\"middle\"/>\n<pin name=\"SDA\" x=\"-20.32\" y=\"0\" length=\"middle\"/>\n<pin name=\"!LDAC\" x=\"-20.32\" y=\"-2.54\" length=\"middle\"/>\n<pin name=\"RDY/!BSY\" x=\"-20.32\" y=\"-5.08\" length=\"middle\"/>\n<pin name=\"VOUT_A\" x=\"17.78\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_B\" x=\"17.78\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_C\" x=\"17.78\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VOUT_D\" x=\"17.78\" y=\"2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"VSS\" x=\"17.78\" y=\"5.08\" length=\"middle\" rot=\"R180\"/>\n<wire x1=\"-15.24\" y1=\"7.62\" x2=\"-15.24\" y2=\"-7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-15.24\" y1=\"-7.62\" x2=\"12.7\" y2=\"-7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"12.7\" y1=\"-7.62\" x2=\"12.7\" y2=\"7.62\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"12.7\" y1=\"7.62\" x2=\"-15.24\" y2=\"7.62\" width=\"0.254\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MCP4728\">\n<gates>\n<gate name=\"G$1\" symbol=\"MCP4728\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"MSOP10\">\n<connects>\n<connect gate=\"G$1\" pin=\"!LDAC\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"RDY/!BSY\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"SCL\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"SDA\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"VDD\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"VOUT_A\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"VOUT_B\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"VOUT_C\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"VOUT_D\" pad=\"9\"/>\n<connect gate=\"G$1\" pin=\"VSS\" pad=\"10\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"Seeed-Connector\" urn=\"urn:adsk.eagle:library:478\">\n<packages>\n<package name=\"H10-2.54\" urn=\"urn:adsk.eagle:footprint:33050/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"-12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"12.7\" x2=\"1.27\" y2=\"-12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0\" layer=\"39\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0\" layer=\"39\"/>\n<pad name=\"1\" x=\"0\" y=\"11.43\" drill=\"0.889\" diameter=\"1.651\" shape=\"square\"/>\n<pad name=\"2\" x=\"0\" y=\"8.89\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"3\" x=\"0\" y=\"6.35\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"4\" x=\"0\" y=\"3.81\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"5\" x=\"0\" y=\"1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"6\" x=\"0\" y=\"-1.27\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"7\" x=\"0\" y=\"-3.81\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"8\" x=\"0\" y=\"-6.35\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"9\" x=\"0\" y=\"-8.89\" drill=\"0.889\" diameter=\"1.651\"/>\n<pad name=\"10\" x=\"0\" y=\"-11.43\" drill=\"0.889\" diameter=\"1.651\"/>\n<text x=\"2.54\" y=\"-1.27\" size=\"0.889\" layer=\"27\" ratio=\"11\" rot=\"R90\">&gt;value</text>\n<text x=\"-1.905\" y=\"-1.27\" size=\"0.889\" layer=\"25\" ratio=\"11\" rot=\"R90\">&gt;name</text>\n<text x=\"0.635\" y=\"2.54\" size=\"1.27\" layer=\"33\" ratio=\"10\" rot=\"R90\">&gt;name</text>\n<rectangle x1=\"-1.27\" y1=\"-12.7\" x2=\"1.27\" y2=\"12.7\" layer=\"39\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"H10-2.54\" urn=\"urn:adsk.eagle:package:33117/1\" type=\"box\" library_version=\"1\">\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"HEADER-10P\" urn=\"urn:adsk.eagle:symbol:33049/1\" library_version=\"1\">\n<wire x1=\"-1.27\" y1=\"12.7\" x2=\"3.81\" y2=\"12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"12.7\" x2=\"3.81\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"3.81\" y1=\"-12.7\" x2=\"-1.27\" y2=\"-12.7\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"-1.27\" y1=\"-12.7\" x2=\"-1.27\" y2=\"12.7\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"-7.62\" y=\"13.97\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;name</text>\n<text x=\"-1.27\" y=\"13.97\" size=\"1.27\" layer=\"95\" ratio=\"10\">&gt;value</text>\n<pin name=\"1\" x=\"-6.35\" y=\"11.43\" visible=\"pad\" length=\"middle\" function=\"dotclk\"/>\n<pin name=\"2\" x=\"-6.35\" y=\"8.89\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"3\" x=\"-6.35\" y=\"6.35\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"4\" x=\"-6.35\" y=\"3.81\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"5\" x=\"-6.35\" y=\"1.27\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"6\" x=\"-6.35\" y=\"-1.27\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"7\" x=\"-6.35\" y=\"-3.81\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"8\" x=\"-6.35\" y=\"-6.35\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"9\" x=\"-6.35\" y=\"-8.89\" visible=\"pad\" length=\"middle\"/>\n<pin name=\"10\" x=\"-6.35\" y=\"-11.43\" visible=\"pad\" length=\"middle\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"DIP-YELLOW-FEMALE-HEADER-VERT(10P-2.54)\" urn=\"urn:adsk.eagle:component:33172/1\" prefix=\"J\" uservalue=\"yes\" library_version=\"1\">\n<description>320030059</description>\n<gates>\n<gate name=\"G$1\" symbol=\"HEADER-10P\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"H10-2.54\">\n<connects>\n<connect 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package3d_urn=\"urn:adsk.eagle:package:24376/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"21\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n<technology name=\"22\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n<technology name=\"41\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SMD\" package=\"AQY27-SMD04\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"DS1\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"DS2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"K\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:24372/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"27\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"AQY27\" package=\"AQY27\">\n<connects>\n<connect gate=\"G$1\" pin=\"A\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"DS1\" pad=\"4\"/>\n<connect gate=\"G$1\" pin=\"DS2\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"K\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:24374/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"MF\" value=\"\" constant=\"no\"/>\n<attribute name=\"MPN\" value=\"\" constant=\"no\"/>\n<attribute name=\"OC_FARNELL\" value=\"unknown\" constant=\"no\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"SparkFun-Passives\">\n<description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;\nIn this library you'll find resistors, capacitors, inductors, test points, jumper pads, etc.&lt;br&gt;&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is the end user's responsibility to ensure correctness and suitablity for a given componet or application. If you enjoy using this library, please buy one of our products at www.sparkfun.com.\n&lt;br&gt;&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n<package name=\"INDUCTOR-1206\">\n<wire x1=\"-1.778\" y1=\"2.032\" x2=\"-3.81\" y2=\"2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"2.032\" x2=\"-3.81\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"-2.032\" x2=\"-1.524\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.524\" y1=\"2.032\" x2=\"3.81\" y2=\"2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"2.032\" x2=\"3.81\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"3.81\" y1=\"-2.032\" x2=\"1.524\" y2=\"-2.032\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"-2.54\" y=\"0\" dx=\"3.556\" dy=\"2.032\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"2.54\" y=\"0\" dx=\"3.556\" dy=\"2.032\" layer=\"1\" rot=\"R90\"/>\n<text x=\"-1.27\" y=\"2.54\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<text x=\"-1.27\" y=\"-2.54\" size=\"0.4064\" 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layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"2.5\" x2=\"2.5\" y2=\"2.5\" width=\"0.1778\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"2.5\" x2=\"2.5\" y2=\"-2.5\" width=\"0.1778\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"-2.5\" x2=\"-2.5\" y2=\"-2.5\" width=\"0.1778\" layer=\"51\"/>\n<circle x=\"0\" y=\"0.508\" radius=\"0.127\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"0\" y=\"2.17\" dx=\"5\" dy=\"2.65\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"0\" y=\"-2.17\" dx=\"5\" dy=\"2.65\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"4.01\" size=\"0.4064\" layer=\"25\">&gt;Name</text>\n<text x=\"-2.7\" y=\"-4.39\" size=\"0.4064\" layer=\"27\">&gt;Value</text>\n</package>\n<package name=\"DR1030\">\n<description>For Coiltronics/Cooper DR1030 series inductors</description>\n<wire x1=\"5.15\" y1=\"5.25\" x2=\"5.15\" y2=\"-5.25\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-5.15\" y1=\"-5.25\" x2=\"-5.15\" y2=\"5.25\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"2\" x=\"0\" y=\"-4.45\" dx=\"3.3\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"1\" x=\"0\" y=\"4.45\" dx=\"3.3\" dy=\"1.6\" layer=\"1\"/>\n<wire x1=\"5.15\" y1=\"-5.25\" x2=\"2\" y2=\"-5.25\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-5.15\" y1=\"-5.25\" x2=\"-2\" y2=\"-5.25\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-5.15\" y1=\"5.25\" x2=\"-2\" y2=\"5.25\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"5.15\" y1=\"5.25\" x2=\"2\" y2=\"5.25\" width=\"0.127\" layer=\"21\"/>\n<text x=\"-3.81\" y=\"1.27\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-1.27\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"VLF4012A\">\n<wire x1=\"-1.85\" y1=\"0.925\" x2=\"-0.925\" y2=\"1.85\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.925\" y1=\"1.85\" x2=\"0.925\" y2=\"1.85\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"0.925\" y1=\"1.85\" x2=\"1.85\" y2=\"0.925\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.85\" y1=\"0.925\" x2=\"1.85\" y2=\"-0.925\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.85\" y1=\"-0.925\" x2=\"0.925\" y2=\"-1.85\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.925\" y1=\"-1.85\" x2=\"-1.85\" y2=\"-0.925\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.85\" y1=\"0.925\" x2=\"-1.85\" y2=\"-0.925\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-0.925\" y1=\"-1.85\" x2=\"0.925\" y2=\"-1.85\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"P$1\" x=\"-1.9\" y=\"0\" dx=\"0.9\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"1.9\" y=\"0\" dx=\"0.9\" dy=\"1.3\" layer=\"1\"/>\n</package>\n<package name=\"AXIAL-0.6\">\n<description>1W Resistor, 0.6\" wide&lt;p&gt;\n\nYageo CFR series &lt;a href=\"http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf\"&gt;http://www.yageo.com/pdf/yageo/Leaded-R_CFR_2008.pdf&lt;/a&gt;</description>\n<wire x1=\"-5.75\" y1=\"-2.25\" x2=\"-5.75\" y2=\"2.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.75\" y1=\"2.25\" x2=\"5.75\" y2=\"2.25\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.75\" y1=\"2.25\" x2=\"5.75\" y2=\"-2.25\" width=\"0.2032\" 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y2=\"-0.6\" width=\"0.03\" layer=\"51\"/>\n<smd name=\"P$1\" x=\"-1.5\" y=\"0\" dx=\"1.3\" dy=\"1.3\" layer=\"1\" rot=\"R90\"/>\n<smd name=\"P$2\" x=\"1.5\" y=\"0\" dx=\"1.3\" dy=\"1.3\" layer=\"1\" rot=\"R90\"/>\n<text x=\"2.8\" y=\"0.7\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"2.8\" y=\"-1\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"INDUCTOR_SDR1307\">\n<smd name=\"P$1\" x=\"0\" y=\"4.6\" dx=\"14\" dy=\"4.75\" layer=\"1\"/>\n<smd name=\"P$2\" x=\"0\" y=\"-4.6\" dx=\"14\" dy=\"4.75\" layer=\"1\"/>\n<wire x1=\"-6.5\" y1=\"1.5\" x2=\"-6.5\" y2=\"-1.5\" width=\"0.3048\" layer=\"21\"/>\n<wire x1=\"6.5\" y1=\"1.5\" x2=\"6.5\" y2=\"-1.5\" width=\"0.3048\" layer=\"21\"/>\n<text x=\"-7\" y=\"7.5\" size=\"0.8128\" layer=\"25\" font=\"vector\" ratio=\"15\">&gt;NAME</text>\n<text x=\"-7\" y=\"-8.5\" size=\"0.8128\" layer=\"27\" font=\"vector\" ratio=\"15\">&gt;VALUE</text>\n</package>\n<package name=\"CTZ3\">\n<description>Land pattern for variable capacitor - Murata Electronics TZY2 - by Haas</description>\n<wire x1=\"-1.346\" y1=\"1.4\" x2=\"-1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.346\" y1=\"-2.123\" x2=\"1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.346\" y1=\"1.4\" x2=\"1.346\" y2=\"-2.123\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-0.5\" y1=\"0\" x2=\"0.5\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.346\" y1=\"1.4\" x2=\"-1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"1.346\" y1=\"1.4\" x2=\"1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"2.073\" x2=\"1\" y2=\"2.073\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"0\" y1=\"1.6\" x2=\"0\" y2=\"-1.6\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.3\" y1=\"0\" x2=\"1.3\" y2=\"0\" width=\"0.127\" layer=\"51\"/>\n<wire x1=\"-1.05\" y1=\"2.25\" x2=\"-1.573\" y2=\"1.45\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.573\" y1=\"1.45\" x2=\"-1.573\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"-1.573\" y1=\"-2.35\" x2=\"-1.05\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.05\" y1=\"2.25\" x2=\"1.573\" y2=\"1.4\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.573\" y1=\"1.4\" x2=\"1.573\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<wire x1=\"1.573\" y1=\"-2.35\" x2=\"1.05\" y2=\"-2.35\" width=\"0.127\" layer=\"21\"/>\n<smd name=\"+\" x=\"0\" y=\"1.59788125\" dx=\"1.2\" dy=\"0.8\" layer=\"1\"/>\n<smd name=\"-\" x=\"0\" y=\"-1.58771875\" dx=\"1.2\" dy=\"0.8\" layer=\"1\"/>\n<text x=\"-0.984\" y=\"2.238\" size=\"0.4064\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.111\" y=\"-2.638\" size=\"0.4064\" layer=\"27\">&gt;VALUE</text>\n<dimension x1=\"0\" y1=\"1.2\" x2=\"0\" y2=\"-1.2\" x3=\"-0.4\" y3=\"0\" textsize=\"0.3048\" layer=\"21\" width=\"0.02\"/>\n<dimension x1=\"1\" y1=\"2\" x2=\"1\" y2=\"-2\" x3=\"0.6\" y3=\"0\" textsize=\"0.3048\" layer=\"21\" width=\"0.02\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"INDUCTOR\">\n<wire x1=\"0\" y1=\"5.08\" x2=\"1.27\" y2=\"3.81\" width=\"0.254\" layer=\"94\" curve=\"-90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"2.54\" x2=\"1.27\" y2=\"3.81\" width=\"0.254\" layer=\"94\" curve=\"90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"2.54\" x2=\"1.27\" y2=\"1.27\" width=\"0.254\" layer=\"94\" curve=\"-90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"1.27\" y2=\"1.27\" width=\"0.254\" layer=\"94\" curve=\"90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"1.27\" y2=\"-1.27\" width=\"0.254\" layer=\"94\" curve=\"-90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"1.27\" y2=\"-1.27\" width=\"0.254\" layer=\"94\" curve=\"90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"-2.54\" x2=\"1.27\" y2=\"-3.81\" width=\"0.254\" layer=\"94\" curve=\"-90\" cap=\"flat\"/>\n<wire x1=\"0\" y1=\"-5.08\" x2=\"1.27\" y2=\"-3.81\" width=\"0.254\" layer=\"94\" curve=\"90\" cap=\"flat\"/>\n<text x=\"2.54\" y=\"5.08\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"0\" y=\"7.62\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R270\"/>\n<pin name=\"2\" x=\"0\" y=\"-7.62\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R90\"/>\n</symbol>\n<symbol name=\"CAP_ADJ\">\n<wire x1=\"-2.032\" y1=\"-0.762\" x2=\"2.032\" y2=\"3.302\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"1.016\" y1=\"3.302\" x2=\"2.032\" y2=\"3.302\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.032\" y1=\"3.302\" x2=\"2.032\" y2=\"2.286\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"2.54\" x2=\"0\" y2=\"2.032\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"0\" y2=\"0.508\" width=\"0.1524\" layer=\"94\"/>\n<text x=\"1.524\" y=\"2.921\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"1.524\" y=\"-2.159\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<rectangle x1=\"-2.032\" y1=\"0.508\" x2=\"2.032\" y2=\"1.016\" layer=\"94\"/>\n<rectangle x1=\"-2.032\" y1=\"1.524\" x2=\"2.032\" y2=\"2.032\" layer=\"94\"/>\n<pin name=\"3\" x=\"0\" y=\"5.08\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R270\"/>\n<pin name=\"4\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R90\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"INDUCTOR\" prefix=\"L\" uservalue=\"yes\">\n<description>&lt;b&gt;Inductors&lt;/b&gt;&lt;p&gt;\nBasic Inductor/Choke - 0603 and 1206. Footprints are not proven and vary greatly between part numbers.&lt;br&gt;\nINDUCTOR POWER 3.3UH 4.0A SMD&lt;br&gt;\n0.197\" L x 0.197\" W x 0.177\" H (5.00mm x 5.00mm x 4.50mm)</description>\n<gates>\n<gate name=\"G$1\" symbol=\"INDUCTOR\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"H*\" package=\"INDUCTOR-1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"1206\"/>\n</technologies>\n</device>\n<device name=\"0603\" package=\"0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR54\" package=\"CR54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PWR\" package=\"CDRH125\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0402\" package=\"C0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-B82462G\" package=\"B82462G\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"68UH-1A\" package=\"CR75\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-09739\"/>\n<attribute name=\"VALUE\" value=\"68uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"1210\" package=\"1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1007\" package=\"1007\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"_\" package=\"COOPER_UP4B\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"-\" package=\"CDRH3D28\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"0805\" package=\"0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR75_V2\" package=\"CR75_V2\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\".\" package=\"CDRH2D09\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"NPI75\" package=\"NPI75C\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SRU5028\" package=\"SRU5028\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"SRU1038\" package=\"SRU1038\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"CR54-KIT\" package=\"CR54-KIT\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"DR1030\" package=\"DR1030\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VLF4012A\" package=\"VLF4012A\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"AXIAL-0.6\" package=\"AXIAL-0.6\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"RLB0912\" package=\"RLB0912\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"BOURNS_SRN6045\" package=\"SRN6045\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-11627\"/>\n<attribute name=\"VALUE\" value=\"33uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SDR0403-560KL\" package=\"SDR0403\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"DIST\" value=\"DIGIKEY\"/>\n<attribute name=\"DIST_ID\" value=\"SDR0403-560KLCT-ND\"/>\n<attribute name=\"VALUE\" value=\"56uH\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"30OHM,1.8A\" package=\"0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"RES-07859\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"\" package=\"INDUCTOR-SRP4020\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"INDUCTOR_4.7UH\" package=\"INDUCTOR_4.7UH\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-10146\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"SDR13-7-270ML\" package=\"INDUCTOR_SDR1307\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-12529\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"27uH\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CR54-3.3UH\" package=\"CR54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-11157\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"3.3uH\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"CR54-47UH\" package=\"CR54\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"P$1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"P$2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-10789\" constant=\"no\"/>\n<attribute name=\"VALUE\" value=\"47uH\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"0805-IND\" package=\"0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"PROD_ID\" value=\"NDUC-13076\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"CAP_ADJ\" prefix=\"C\">\n<description>Variable, non-polarized capacitor</description>\n<gates>\n<gate name=\"G$1\" symbol=\"CAP_ADJ\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"SMD\" package=\"CTZ3\">\n<connects>\n<connect gate=\"G$1\" pin=\"3\" pad=\"+\"/>\n<connect gate=\"G$1\" pin=\"4\" pad=\"-\"/>\n</connects>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"SparkFun-PowerSymbols\" urn=\"urn:adsk.eagle:library:530\">\n<description>&lt;h3&gt;SparkFun Power Symbols&lt;/h3&gt;\nThis library contains power, ground, and voltage-supply symbols.\n&lt;br&gt;\n&lt;br&gt;\nWe've spent an enormous amount of time creating and checking these footprints and parts, but it is &lt;b&gt; the end user's responsibility&lt;/b&gt; to ensure correctness and suitablity for a given componet or application. \n&lt;br&gt;\n&lt;br&gt;If you enjoy using this library, please buy one of our products at &lt;a href=\" www.sparkfun.com\"&gt;SparkFun.com&lt;/a&gt;.\n&lt;br&gt;\n&lt;br&gt;\n&lt;b&gt;Licensing:&lt;/b&gt; Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ \n&lt;br&gt;\n&lt;br&gt;\nYou are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"VCCA\" urn=\"urn:adsk.eagle:symbol:39420/1\" library_version=\"1\">\n<description>&lt;h3&gt;VCC Analog Voltage Supply&lt;/h3&gt;</description>\n<wire x1=\"0.762\" y1=\"1.27\" x2=\"0\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"2.54\" x2=\"-0.762\" y2=\"1.27\" width=\"0.254\" layer=\"94\"/>\n<pin name=\"VCCA\" x=\"0\" y=\"0\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R90\"/>\n<text x=\"0\" y=\"2.794\" size=\"1.778\" layer=\"96\" align=\"bottom-center\">&gt;VALUE</text>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"VCCA\" urn=\"urn:adsk.eagle:component:39457/1\" library_version=\"1\">\n<description>&lt;h3&gt;Analog VCC Voltage Supply&lt;/h3&gt;\n&lt;p&gt;Generic analog supply symbol.&lt;/p&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"VCCA\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"oshw\">\n<description>&lt;p&gt;&lt;strong&gt;Open Source Hardware PCB Logos&lt;/strong&gt;\n&lt;p&gt;A simple polygon based version of the OSHWA logos for use on Eagle PCB's\n&lt;p&gt;For use please refer to the OSHWA definition at &lt;a href=\"http://www.oshwa.org/definition/\"&gt;http://www.oshwa.org/definition/&lt;/a&gt;\n&lt;p&gt;Based on the NBitWonder version (&lt;a href=\"http://nbitwonder.com\"&gt;http://nbitwonder.com&lt;/a&gt;)\n&lt;p&gt;&lt;strong&gt;Andrew Cooper&lt;/strong&gt;&lt;br&gt;28Nov2016&lt;br&gt;&lt;a href=\"http://www.darkerview.com\"&gt;www.DarkerView.com&lt;/a&gt;</description>\n<packages>\n<package name=\"OSHW_16MM\">\n<polygon width=\"0.127\" layer=\"25\">\n<vertex x=\"-0.7874\" y=\"-2.032\" curve=\"-159.559114\"/>\n<vertex x=\"0\" y=\"2.1844\" curve=\"-161.899642\"/>\n<vertex x=\"0.9144\" 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valign=\"top\"&gt;\n\n&lt;/td&gt;\n&lt;! &lt;td width=\"10\"&gt;&amp;nbsp;&lt;/td&gt;\n&lt;td width=\"90%\"&gt;\n\n&lt;b&gt;&lt;font color=\"#0000FF\" size=\"4\"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;\n&lt;P&gt;\n&lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BOURNS&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL color=\"#FF0000\"&gt;DALE-VISHAY&lt;/FONT&gt;\n      &lt;/B&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;B&gt;\n      &lt;FONT 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ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3250L&lt;BR&gt;\n      3250P&lt;BR&gt;\n      3250W&lt;BR&gt;\n      3250X&lt;BR&gt;\n      3252P&lt;BR&gt;\n      3252W&lt;BR&gt;\n      3252X&lt;BR&gt;\n      3260P&lt;BR&gt;\n      3260W&lt;BR&gt;\n      3260X&lt;BR&gt;\n      3262P&lt;BR&gt;\n      3262W&lt;BR&gt;\n     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64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      66X&amp;nbsp;ALT&lt;BR&gt;\n      66P&amp;nbsp;ALT&lt;BR&gt;\n      66W&amp;nbsp;ALT&lt;BR&gt;\n      66P&lt;BR&gt;\n      66W&lt;BR&gt;\n      66X&lt;BR&gt;\n      67P&lt;BR&gt;\n      67W&lt;BR&gt;\n      67X&lt;BR&gt;\n      67Y&lt;BR&gt;\n      67Z&lt;BR&gt;\n      68P&lt;BR&gt;\n      68W&lt;BR&gt;\n      68X&lt;BR&gt;\n      67Y&amp;nbsp;ALT&lt;BR&gt;\n      67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      5050&lt;BR&gt;\n      5091&lt;BR&gt;\n      5080&lt;BR&gt;\n      5087&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T63YB&lt;BR&gt;\n      T63XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      5887&lt;BR&gt;\n      5891&lt;BR&gt;\n      5880&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      T93Z&lt;BR&gt;\n      T93YA&lt;BR&gt;\n      T93XA&lt;BR&gt;\n      T93YB&lt;BR&gt;\n      T93XB&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKW&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      8026EKP&lt;BR&gt;\n      8026EKB&lt;BR&gt;\n      8026EKM&lt;BR&gt;\n      1309X&lt;BR&gt;\n      1309P&lt;BR&gt;\n      1309W&lt;BR&gt;\n      8024EKP&lt;BR&gt;\n      8024EKW&lt;BR&gt;\n      8024EKN&lt;BR&gt;\n      RJ-9P/CT9P&lt;BR&gt;\n      RJ-9W&lt;BR&gt;\n      RJ-9X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      3103P&lt;BR&gt;\n      3103Y&lt;BR&gt;\n      3103Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3105P/3106P&lt;BR&gt;\n      3105W/3106W&lt;BR&gt;\n      3105X/3106X&lt;BR&gt;\n      3105Y/3106Y&lt;BR&gt;\n      3105Z/3105Z&lt;BR&gt;\n      3102P&lt;BR&gt;\n      3102W&lt;BR&gt;\n      3102X&lt;BR&gt;\n      3102Y&lt;BR&gt;\n      3102Z&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMCBG&lt;BR&gt;\n      EVMCCG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      55-1-X&lt;BR&gt;\n      55-4-X&lt;BR&gt;\n      55-3-X&lt;BR&gt;\n      55-2-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      50-2-X&lt;BR&gt;\n      50-4-X&lt;BR&gt;\n      50-3-X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      64P&lt;BR&gt;\n      64W&lt;BR&gt;\n      64X&lt;BR&gt;\n      64Y&lt;BR&gt;\n      64Z&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RT/RTR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RJ/RJR22&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RT/RTR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RJ/RJR26&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RT/RTR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      RJ/RJR24&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=8&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD ALIGN=CENTER&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3323P&lt;BR&gt;\n      3323S&lt;BR&gt;\n      3323W&lt;BR&gt;\n      3329H&lt;BR&gt;\n      3329P&lt;BR&gt;\n      3329W&lt;BR&gt;\n      3339H&lt;BR&gt;\n      3339P&lt;BR&gt;\n      3339W&lt;BR&gt;\n      3352E&lt;BR&gt;\n      3352H&lt;BR&gt;\n      3352K&lt;BR&gt;\n      3352P&lt;BR&gt;\n      3352T&lt;BR&gt;\n      3352V&lt;BR&gt;\n      3352W&lt;BR&gt;\n      3362H&lt;BR&gt;\n      3362M&lt;BR&gt;\n      3362P&lt;BR&gt;\n      3362R&lt;BR&gt;\n      3362S&lt;BR&gt;\n      3362U&lt;BR&gt;\n      3362W&lt;BR&gt;\n      3362X&lt;BR&gt;\n      3386B&lt;BR&gt;\n      3386C&lt;BR&gt;\n      3386F&lt;BR&gt;\n      3386H&lt;BR&gt;\n      3386K&lt;BR&gt;\n      3386M&lt;BR&gt;\n      3386P&lt;BR&gt;\n      3386S&lt;BR&gt;\n      3386W&lt;BR&gt;\n      3386X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      25P&lt;BR&gt;\n      25S&lt;BR&gt;\n      25RX&lt;BR&gt;\n      82P&lt;BR&gt;\n      82M&lt;BR&gt;\n      82PA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      91E&lt;BR&gt;\n      91X&lt;BR&gt;\n      91T&lt;BR&gt;\n      91B&lt;BR&gt;\n      91A&lt;BR&gt;\n      91V&lt;BR&gt;\n      91W&lt;BR&gt;\n      25W&lt;BR&gt;\n      25V&lt;BR&gt;\n      25P&lt;BR&gt;\n      -&lt;BR&gt;\n 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150TX&lt;BR&gt;\n      101&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      101SX&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ET6P&lt;BR&gt;\n      ET6S&lt;BR&gt;\n      ET6X&lt;BR&gt;\n      RJ-6W/8014EMW&lt;BR&gt;\n      RJ-6P/8014EMP&lt;BR&gt;\n      RJ-6X/8014EMX&lt;BR&gt;\n      TM7W&lt;BR&gt;\n      TM7P&lt;BR&gt;\n      TM7X&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMS&lt;BR&gt;\n      -&lt;BR&gt;\n      8017SMB&lt;BR&gt;\n      8017SMA&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6W&lt;BR&gt;\n      CT-6H&lt;BR&gt;\n      CT-6P&lt;BR&gt;\n      CT-6R&lt;BR&gt;\n      -&lt;BR&gt;\n      CT-6V&lt;BR&gt;\n      CT-6X&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKV&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKX&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      8038EKP&lt;BR&gt;\n      8038EKZ&lt;BR&gt;\n      8038EKW&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3321H&lt;BR&gt;\n      3321P&lt;BR&gt;\n      3321N&lt;BR&gt;\n      1102H&lt;BR&gt;\n      1102P&lt;BR&gt;\n      1102T&lt;BR&gt;\n      RVA0911V304A&lt;BR&gt;\n      -&lt;BR&gt;\n      RVA0911H413A&lt;BR&gt;\n      RVG0707V100A&lt;BR&gt;\n      RVA0607V(H)306A&lt;BR&gt;\n      RVA1214H213A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      3104B&lt;BR&gt;\n      3104C&lt;BR&gt;\n      3104F&lt;BR&gt;\n      3104H&lt;BR&gt;\n      -&lt;BR&gt;\n      3104M&lt;BR&gt;\n      3104P&lt;BR&gt;\n      3104S&lt;BR&gt;\n      3104W&lt;BR&gt;\n      3104X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMQIG&lt;BR&gt;\n      EVMQ3G&lt;BR&gt;\n      EVMS0G&lt;BR&gt;\n      EVMQ0G&lt;BR&gt;\n      EVMG0G&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMK4GA00B&lt;BR&gt;\n      EVM30GA00B&lt;BR&gt;\n      EVMK0GA00B&lt;BR&gt;\n      EVM38GA00B&lt;BR&gt;\n      EVMB6&lt;BR&gt;\n      EVLQ0&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMSG&lt;BR&gt;\n      EVMMBG&lt;BR&gt;\n      EVMMAG&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMMCS&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM0&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      EVMM3&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      62-3-1&lt;BR&gt;\n      62-1-2&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67R&lt;BR&gt;\n      -&lt;BR&gt;\n      67P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      67X&lt;BR&gt;\n      63V&lt;BR&gt;\n      63S&lt;BR&gt;\n      63M&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63H&lt;BR&gt;\n      63P&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      63X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      RJ/RJR50&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n    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FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3224G&lt;BR&gt;\n      3224J&lt;BR&gt;\n      3224W&lt;BR&gt;\n      3269P&lt;BR&gt;\n      3269W&lt;BR&gt;\n      3269X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      44G&lt;BR&gt;\n      44J&lt;BR&gt;\n      44W&lt;BR&gt;\n      84P&lt;BR&gt;\n      84W&lt;BR&gt;\n      84X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST63Z&lt;BR&gt;\n      ST63Y&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST5P&lt;BR&gt;\n      ST5W&lt;BR&gt;\n      ST5X&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;&amp;nbsp;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD COLSPAN=7&gt;\n      &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD&gt;\n      &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n  &lt;TR&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      3314G&lt;BR&gt;\n      3314J&lt;BR&gt;\n      3364A/B&lt;BR&gt;\n      3364C/D&lt;BR&gt;\n      3364W/X&lt;BR&gt;\n      3313G&lt;BR&gt;\n      3313J&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      23B&lt;BR&gt;\n      23A&lt;BR&gt;\n      21X&lt;BR&gt;\n      21W&lt;BR&gt;\n      -&lt;BR&gt;\n      22B&lt;BR&gt;\n      22A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST5YL/ST53YL&lt;BR&gt;\n      ST5YJ/5T53YJ&lt;BR&gt;\n      ST-23A&lt;BR&gt;\n      ST-22B&lt;BR&gt;\n      ST-22&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      ST-4B&lt;BR&gt;\n      ST-4A&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      ST-3B&lt;BR&gt;\n      ST-3A&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      EVM-6YS&lt;BR&gt;\n      EVM-1E&lt;BR&gt;\n      EVM-1G&lt;BR&gt;\n      EVM-1D&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      G4B&lt;BR&gt;\n      G4A&lt;BR&gt;\n      TR04-3S1&lt;BR&gt;\n      TRG04-2S1&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n    &lt;TD BGCOLOR=\"#cccccc\" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;\n      DVR-43A&lt;BR&gt;\n      CVR-42C&lt;BR&gt;\n      CVR-42A/C&lt;BR&gt;\n      -&lt;BR&gt;\n      -&lt;BR&gt;&lt;/FONT&gt;\n    &lt;/TD&gt;\n  &lt;/TR&gt;\n&lt;/TABLE&gt;\n&lt;P&gt;\n&lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;\n&lt;P&gt;\n\n&amp;nbsp;\n&lt;P&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/table&gt;\n&lt;/BODY&gt;&lt;/HTML&gt;</description>\n<packages>\n<package name=\"R0805\" urn=\"urn:adsk.eagle:footprint:25627/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;</description>\n<wire x1=\"-0.41\" y1=\"0.635\" x2=\"0.41\" y2=\"0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-0.41\" y1=\"-0.635\" x2=\"0.41\" y2=\"-0.635\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-1.973\" y1=\"0.983\" x2=\"1.973\" y2=\"0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.973\" y1=\"0.983\" x2=\"1.973\" y2=\"-0.983\" width=\"0.0508\" layer=\"39\"/>\n<wire x1=\"1.973\" y1=\"-0.983\" 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width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.699\" y1=\"1.778\" x2=\"4.953\" y2=\"1.524\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"4.699\" y1=\"-1.778\" x2=\"4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-4.953\" y1=\"-1.524\" x2=\"-4.699\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-4.699\" y1=\"1.778\" x2=\"4.699\" y2=\"1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"1.524\" x2=\"-4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.699\" y1=\"-1.778\" x2=\"-4.699\" y2=\"-1.778\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"1.524\" x2=\"4.953\" y2=\"-1.524\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.35\" y1=\"0\" x2=\"5.461\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.35\" y1=\"0\" x2=\"-5.461\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<pad name=\"1\" x=\"-6.35\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"6.35\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-4.953\" y=\"2.159\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"4.953\" y1=\"-0.4064\" x2=\"5.4102\" y2=\"0.4064\" layer=\"21\"/>\n<rectangle x1=\"-5.4102\" y1=\"-0.4064\" x2=\"-4.953\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"V235/17\" urn=\"urn:adsk.eagle:footprint:25672/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V235, grid 17.78 mm</description>\n<wire x1=\"-6.731\" y1=\"2.921\" x2=\"6.731\" y2=\"2.921\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.112\" y1=\"2.54\" x2=\"-7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.731\" y1=\"-2.921\" x2=\"-6.731\" y2=\"-2.921\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"7.112\" y1=\"2.54\" x2=\"7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"8.89\" y1=\"0\" x2=\"7.874\" y2=\"0\" width=\"1.016\" layer=\"51\"/>\n<wire x1=\"-7.874\" y1=\"0\" x2=\"-8.89\" y2=\"0\" width=\"1.016\" layer=\"51\"/>\n<wire x1=\"-7.112\" y1=\"-2.54\" x2=\"-6.731\" y2=\"-2.921\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"6.731\" y1=\"2.921\" x2=\"7.112\" y2=\"2.54\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.731\" y1=\"-2.921\" x2=\"7.112\" y2=\"-2.54\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-7.112\" y1=\"2.54\" x2=\"-6.731\" y2=\"2.921\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<pad name=\"1\" x=\"-8.89\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"8.89\" y=\"0\" drill=\"1.1938\" shape=\"octagon\"/>\n<text x=\"-6.858\" y=\"3.302\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-5.842\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"7.112\" y1=\"-0.508\" x2=\"7.747\" y2=\"0.508\" layer=\"21\"/>\n<rectangle x1=\"-7.747\" y1=\"-0.508\" x2=\"-7.112\" y2=\"0.508\" layer=\"21\"/>\n</package>\n<package name=\"V526-0\" urn=\"urn:adsk.eagle:footprint:25673/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype V526-0, grid 2.5 mm</description>\n<wire x1=\"-2.54\" y1=\"1.016\" x2=\"-2.286\" y2=\"1.27\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.286\" y1=\"1.27\" x2=\"2.54\" y2=\"1.016\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"2.286\" y1=\"-1.27\" x2=\"2.54\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"-2.54\" y1=\"-1.016\" x2=\"-2.286\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"2.286\" y1=\"1.27\" x2=\"-2.286\" y2=\"1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"2.54\" y1=\"-1.016\" x2=\"2.54\" y2=\"1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.286\" y1=\"-1.27\" x2=\"2.286\" y2=\"-1.27\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"1.016\" x2=\"-2.54\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"1.27\" y=\"0\" drill=\"0.8128\" shape=\"octagon\"/>\n<text x=\"-2.413\" y=\"1.651\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-2.413\" y=\"-2.794\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0102R\" urn=\"urn:adsk.eagle:footprint:25674/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.9\" y=\"0\" dx=\"0.5\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0102W\" urn=\"urn:adsk.eagle:footprint:25675/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC2211&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1\" y1=\"-0.5\" x2=\"1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"-0.5\" x2=\"1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1\" y1=\"0.5\" x2=\"-1\" y2=\"0.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1\" y1=\"0.5\" x2=\"-1\" y2=\"-0.5\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-0.95\" y=\"0\" dx=\"0.6\" dy=\"1.3\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.95\" y=\"0\" dx=\"0.6\" dy=\"1.3\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0204R\" urn=\"urn:adsk.eagle:footprint:25676/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC3715&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.938\" y1=\"0.6\" x2=\"-0.938\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.938\" y1=\"-0.6\" x2=\"0.938\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"0.8\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"0.8\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0204W\" urn=\"urn:adsk.eagle:footprint:25677/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC3715&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"-0.6\" x2=\"1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-1.7\" y1=\"0.6\" x2=\"-1.7\" y2=\"-0.6\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"0.684\" y1=\"0.6\" x2=\"-0.684\" y2=\"0.6\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-0.684\" y1=\"-0.6\" x2=\"0.684\" y2=\"-0.6\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.5\" y=\"0\" dx=\"1.2\" dy=\"1.6\" layer=\"1\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207R\" urn=\"urn:adsk.eagle:footprint:25678/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Reflow Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.2125\" y1=\"1\" x2=\"-1.2125\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.2125\" y1=\"-1\" x2=\"1.2125\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.25\" y=\"0\" dx=\"1.6\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.2225\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.2225\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"MINI_MELF-0207W\" urn=\"urn:adsk.eagle:footprint:25679/1\" library_version=\"1\">\n<description>&lt;b&gt;CECC Size RC6123&lt;/b&gt; Wave Soldering&lt;p&gt;\nsource Beyschlag</description>\n<wire x1=\"-2.8\" y1=\"-1\" x2=\"2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"-1\" x2=\"2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.8\" y1=\"1\" x2=\"-2.8\" y2=\"1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.8\" y1=\"1\" x2=\"-2.8\" y2=\"-1\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.149\" y1=\"1\" x2=\"-1.149\" y2=\"1\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.149\" y1=\"-1\" x2=\"1.149\" y2=\"-1\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.6\" y=\"0\" dx=\"2.4\" dy=\"2.5\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"1.5875\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"0922V\" urn=\"urn:adsk.eagle:footprint:25680/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype 0922, grid 7.5 mm</description>\n<wire x1=\"2.54\" y1=\"0\" x2=\"1.397\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-3.81\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"4.572\" width=\"0.1524\" layer=\"21\"/>\n<circle x=\"-5.08\" y=\"0\" radius=\"1.905\" width=\"0.1524\" layer=\"21\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"2.54\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-0.508\" y=\"1.6764\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-0.508\" y=\"-2.9972\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"-6.858\" y=\"2.54\" size=\"1.016\" layer=\"21\" ratio=\"12\">0922</text>\n<rectangle x1=\"-3.81\" y1=\"-0.4064\" x2=\"1.3208\" y2=\"0.4064\" layer=\"21\"/>\n</package>\n<package name=\"RDH/15\" urn=\"urn:adsk.eagle:footprint:25681/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt;&lt;p&gt;\ntype RDH, grid 15 mm</description>\n<wire x1=\"-7.62\" y1=\"0\" x2=\"-6.858\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.096\" y1=\"3.048\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"2.794\" x2=\"-5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.096\" y1=\"-3.048\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.953\" y1=\"-2.794\" x2=\"-5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"2.794\" x2=\"-4.953\" y2=\"2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.953\" y1=\"-2.794\" x2=\"-4.953\" y2=\"-2.794\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"5.207\" y2=\"3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"5.207\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"1.016\" x2=\"-6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"-2.667\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"-1.016\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"6.477\" y1=\"1.016\" x2=\"6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.858\" y1=\"0\" x2=\"7.62\" y2=\"0\" width=\"0.8128\" layer=\"51\"/>\n<wire x1=\"-6.477\" y1=\"2.667\" x2=\"-6.096\" y2=\"3.048\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"6.096\" y1=\"3.048\" x2=\"6.477\" y2=\"2.667\" width=\"0.1524\" layer=\"21\" curve=\"-90\"/>\n<wire x1=\"-6.477\" y1=\"-2.667\" x2=\"-6.096\" y2=\"-3.048\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<wire x1=\"6.096\" y1=\"-3.048\" x2=\"6.477\" y2=\"-2.667\" width=\"0.1524\" layer=\"21\" curve=\"90\"/>\n<pad name=\"1\" x=\"-7.62\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"7.62\" y=\"0\" drill=\"1.016\" shape=\"octagon\"/>\n<text x=\"-6.35\" y=\"3.4544\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.318\" y=\"-0.5842\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<text x=\"4.572\" y=\"-1.7272\" size=\"1.27\" layer=\"51\" ratio=\"10\" rot=\"R90\">RDH</text>\n<rectangle x1=\"-6.7564\" y1=\"-0.4064\" x2=\"-6.4516\" y2=\"0.4064\" layer=\"51\"/>\n<rectangle x1=\"6.4516\" y1=\"-0.4064\" x2=\"6.7564\" y2=\"0.4064\" layer=\"51\"/>\n</package>\n<package name=\"MINI_MELF-0102AX\" urn=\"urn:adsk.eagle:footprint:25682/1\" library_version=\"1\">\n<description>&lt;b&gt;Mini MELF 0102 Axial&lt;/b&gt;</description>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"51\"/>\n<circle x=\"0\" y=\"0\" radius=\"0.6\" width=\"0\" layer=\"52\"/>\n<smd name=\"1\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"1\" roundness=\"100\"/>\n<smd name=\"2\" x=\"0\" y=\"0\" dx=\"1.9\" dy=\"1.9\" layer=\"16\" roundness=\"100\"/>\n<text x=\"-1.27\" y=\"0.9525\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.27\" y=\"-2.2225\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<hole x=\"0\" y=\"0\" drill=\"1.3\"/>\n</package>\n<package name=\"R0201\" urn=\"urn:adsk.eagle:footprint:25683/1\" library_version=\"1\">\n<description>&lt;b&gt;RESISTOR&lt;/b&gt; chip&lt;p&gt;\nSource: http://www.vishay.com/docs/20008/dcrcw.pdf</description>\n<smd name=\"1\" x=\"-0.255\" y=\"0\" dx=\"0.28\" dy=\"0.43\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.255\" y=\"0\" dx=\"0.28\" dy=\"0.43\" layer=\"1\"/>\n<text x=\"-0.635\" y=\"0.635\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.635\" y=\"-1.905\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.3\" y1=\"-0.15\" x2=\"-0.15\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"0.15\" y1=\"-0.15\" x2=\"0.3\" y2=\"0.15\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.15\" x2=\"0.15\" y2=\"0.15\" layer=\"21\"/>\n</package>\n<package name=\"VTA52\" urn=\"urn:adsk.eagle:footprint:25684/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR52&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-15.24\" y1=\"0\" x2=\"-13.97\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"12.6225\" y1=\"0.025\" x2=\"12.6225\" y2=\"4.725\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.6225\" y1=\"4.725\" x2=\"-12.6225\" y2=\"4.725\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.6225\" y1=\"4.725\" x2=\"-12.6225\" y2=\"0.025\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.6225\" y1=\"0.025\" x2=\"-12.6225\" y2=\"-4.65\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-12.6225\" y1=\"-4.65\" x2=\"12.6225\" y2=\"-4.65\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"12.6225\" y1=\"-4.65\" x2=\"12.6225\" y2=\"0.025\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"13.97\" y1=\"0\" x2=\"15.24\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-15.24\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"15.24\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"5.08\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-13.97\" y1=\"-0.3048\" x2=\"-12.5675\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"12.5675\" y1=\"-0.3048\" x2=\"13.97\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VTA53\" urn=\"urn:adsk.eagle:footprint:25685/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR53&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-12.065\" y1=\"0\" x2=\"-10.795\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"9.8975\" y1=\"0\" x2=\"9.8975\" y2=\"4.7\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.8975\" y1=\"4.7\" x2=\"-9.8975\" y2=\"4.7\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"4.7\" x2=\"-9.8975\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"0\" x2=\"-9.8975\" y2=\"-4.675\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"-4.675\" x2=\"9.8975\" y2=\"-4.675\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.8975\" y1=\"-4.675\" x2=\"9.8975\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"10.795\" y1=\"0\" x2=\"12.065\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-12.065\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"12.065\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"5.08\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-10.795\" y1=\"-0.3048\" x2=\"-9.8425\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"9.8425\" y1=\"-0.3048\" x2=\"10.795\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VTA54\" urn=\"urn:adsk.eagle:footprint:25686/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR54&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-12.065\" y1=\"0\" x2=\"-10.795\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"9.8975\" y1=\"0\" x2=\"9.8975\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.8975\" y1=\"3.3\" x2=\"-9.8975\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"3.3\" x2=\"-9.8975\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"0\" x2=\"-9.8975\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-9.8975\" y1=\"-3.3\" x2=\"9.8975\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"9.8975\" y1=\"-3.3\" x2=\"9.8975\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"10.795\" y1=\"0\" x2=\"12.065\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-12.065\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"12.065\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"3.81\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-10.795\" y1=\"-0.3048\" x2=\"-9.8425\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"9.8425\" y1=\"-0.3048\" x2=\"10.795\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VTA55\" urn=\"urn:adsk.eagle:footprint:25687/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR55&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-8.255\" y1=\"0\" x2=\"-6.985\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"6.405\" y1=\"0\" x2=\"6.405\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.405\" y1=\"3.3\" x2=\"-6.405\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.405\" y1=\"3.3\" x2=\"-6.405\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.405\" y1=\"0\" x2=\"-6.405\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.405\" y1=\"-3.3\" x2=\"6.405\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.405\" y1=\"-3.3\" x2=\"6.405\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"6.985\" y1=\"0\" x2=\"8.255\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-8.255\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"8.255\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"3.81\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-6.985\" y1=\"-0.3048\" x2=\"-6.35\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"6.35\" y1=\"-0.3048\" x2=\"6.985\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VTA56\" urn=\"urn:adsk.eagle:footprint:25688/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RBR56&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-6.35\" y1=\"0\" x2=\"-5.08\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"0\" x2=\"4.5\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.5\" y1=\"3.3\" x2=\"-4.5\" y2=\"3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"3.3\" x2=\"-4.5\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"0\" x2=\"-4.5\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.5\" y1=\"-3.3\" x2=\"4.5\" y2=\"-3.3\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.5\" y1=\"-3.3\" x2=\"4.5\" y2=\"0\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.08\" y1=\"0\" x2=\"6.35\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-6.35\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"6.35\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.81\" y=\"3.81\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-5.08\" y1=\"-0.3048\" x2=\"-4.445\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"4.445\" y1=\"-0.3048\" x2=\"5.08\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VMTA55\" urn=\"urn:adsk.eagle:footprint:25689/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RNC55&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-5.08\" y1=\"0\" x2=\"-4.26\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"3.3375\" y1=\"-1.45\" x2=\"3.3375\" y2=\"1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"3.3375\" y1=\"1.45\" x2=\"-3.3625\" y2=\"1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.3625\" y1=\"1.45\" x2=\"-3.3625\" y2=\"-1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.3625\" y1=\"-1.45\" x2=\"3.3375\" y2=\"-1.45\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.235\" y1=\"0\" x2=\"5.08\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-5.08\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"5.08\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-3.175\" y=\"1.905\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-3.175\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-4.26\" y1=\"-0.3048\" x2=\"-3.3075\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"3.2825\" y1=\"-0.3048\" x2=\"4.235\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"VMTB60\" urn=\"urn:adsk.eagle:footprint:25690/1\" library_version=\"1\">\n<description>&lt;b&gt;Bulk Metal® Foil Technology&lt;/b&gt;, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements&lt;p&gt;\nMIL SIZE RNC60&lt;br&gt;\nSource: VISHAY .. vta56.pdf</description>\n<wire x1=\"-6.35\" y1=\"0\" x2=\"-5.585\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<wire x1=\"4.6875\" y1=\"-1.95\" x2=\"4.6875\" y2=\"1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"4.6875\" y1=\"1.95\" x2=\"-4.6875\" y2=\"1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.6875\" y1=\"1.95\" x2=\"-4.6875\" y2=\"-1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-4.6875\" y1=\"-1.95\" x2=\"4.6875\" y2=\"-1.95\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"5.585\" y1=\"0\" x2=\"6.35\" y2=\"0\" width=\"0.6096\" layer=\"51\"/>\n<pad name=\"1\" x=\"-6.35\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<pad name=\"2\" x=\"6.35\" y=\"0\" drill=\"1.1\" shape=\"octagon\"/>\n<text x=\"-4.445\" y=\"2.54\" size=\"1.27\" layer=\"25\" ratio=\"10\">&gt;NAME</text>\n<text x=\"-4.445\" y=\"-0.635\" size=\"1.27\" layer=\"27\" ratio=\"10\">&gt;VALUE</text>\n<rectangle x1=\"-5.585\" y1=\"-0.3048\" x2=\"-4.6325\" y2=\"0.3048\" layer=\"21\"/>\n<rectangle x1=\"4.6325\" y1=\"-0.3048\" x2=\"5.585\" y2=\"0.3048\" layer=\"21\"/>\n</package>\n<package name=\"R4527\" urn=\"urn:adsk.eagle:footprint:25691/1\" library_version=\"1\">\n<description>&lt;b&gt;Package 4527&lt;/b&gt;&lt;p&gt;\nSource: http://www.vishay.com/docs/31059/wsrhigh.pdf</description>\n<wire x1=\"-5.675\" y1=\"-3.375\" x2=\"5.65\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.65\" y1=\"-3.375\" x2=\"5.65\" y2=\"3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"5.65\" y1=\"3.375\" x2=\"-5.675\" y2=\"3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-5.675\" y1=\"3.375\" x2=\"-5.675\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<smd name=\"1\" x=\"-4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<text x=\"-5.715\" y=\"3.81\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-5.715\" y=\"-5.08\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC0001\" urn=\"urn:adsk.eagle:footprint:25692/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.075\" y1=\"-1.8\" x2=\"3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.075\" y1=\"-1.8\" x2=\"3.075\" y2=\"1.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"1.606\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.075\" y1=\"-1.606\" x2=\"-3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.075\" y1=\"1.606\" x2=\"3.075\" y2=\"1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.075\" y1=\"-1.8\" x2=\"3.075\" y2=\"-1.606\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.675\" y=\"0\" dx=\"2.29\" dy=\"2.92\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.675\" y=\"0\" dx=\"2.29\" dy=\"2.92\" layer=\"1\"/>\n<text x=\"-2.544\" y=\"2.229\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.544\" y=\"-3.501\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC0002\" urn=\"urn:adsk.eagle:footprint:25693/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-5.55\" y1=\"3.375\" x2=\"-5.55\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-5.55\" y1=\"-3.375\" x2=\"5.55\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.55\" y1=\"-3.375\" x2=\"5.55\" y2=\"3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"5.55\" y1=\"3.375\" x2=\"-5.55\" y2=\"3.375\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.575\" y=\"0.025\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<text x=\"-5.65\" y=\"3.9\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-5.65\" y=\"-5.15\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC01/2\" urn=\"urn:adsk.eagle:footprint:25694/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-2.45\" y1=\"1.475\" x2=\"-2.45\" y2=\"-1.475\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-2.45\" y1=\"-1.475\" x2=\"2.45\" y2=\"-1.475\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.45\" y1=\"-1.475\" x2=\"2.45\" y2=\"1.475\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"2.45\" y1=\"1.475\" x2=\"-2.45\" y2=\"1.475\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.45\" y1=\"1.475\" x2=\"-2.45\" y2=\"1.106\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-2.45\" y1=\"-1.106\" x2=\"-2.45\" y2=\"-1.475\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.45\" y1=\"1.106\" x2=\"2.45\" y2=\"1.475\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"2.45\" y1=\"-1.475\" x2=\"2.45\" y2=\"-1.106\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.1\" y=\"0\" dx=\"2.16\" dy=\"1.78\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.1\" y=\"0\" dx=\"2.16\" dy=\"1.78\" layer=\"1\"/>\n<text x=\"-2.544\" y=\"1.904\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.544\" y=\"-3.176\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC2515\" urn=\"urn:adsk.eagle:footprint:25695/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-3.075\" y1=\"-1.8\" x2=\"3.05\" y2=\"-1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.05\" y1=\"-1.8\" x2=\"3.05\" y2=\"1.8\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"3.05\" y1=\"1.8\" x2=\"-3.075\" y2=\"1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.075\" y1=\"1.8\" x2=\"-3.075\" y2=\"1.606\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-3.075\" y1=\"-1.606\" x2=\"-3.075\" y2=\"-1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.05\" y1=\"1.606\" x2=\"3.05\" y2=\"1.8\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.05\" y1=\"-1.8\" x2=\"3.05\" y2=\"-1.606\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-2.675\" y=\"0\" dx=\"2.29\" dy=\"2.92\" layer=\"1\"/>\n<smd name=\"2\" x=\"2.675\" y=\"0\" dx=\"2.29\" dy=\"2.92\" layer=\"1\"/>\n<text x=\"-3.2\" y=\"2.15\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-3.2\" y=\"-3.4\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC4527\" urn=\"urn:adsk.eagle:footprint:25696/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-5.675\" y1=\"3.4\" x2=\"-5.675\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-5.675\" y1=\"-3.375\" x2=\"5.675\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"5.675\" y1=\"-3.375\" x2=\"5.675\" y2=\"3.4\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"5.675\" y1=\"3.4\" x2=\"-5.675\" y2=\"3.4\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-4.575\" y=\"0.025\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<smd name=\"2\" x=\"4.575\" y=\"0\" dx=\"3.94\" dy=\"5.84\" layer=\"1\"/>\n<text x=\"-5.775\" y=\"3.925\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-5.775\" y=\"-5.15\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"WSC6927\" urn=\"urn:adsk.eagle:footprint:25697/1\" library_version=\"1\">\n<description>&lt;b&gt;Wirewound Resistors, Precision Power&lt;/b&gt;&lt;p&gt;\nSource: VISHAY wscwsn.pdf</description>\n<wire x1=\"-8.65\" y1=\"3.375\" x2=\"-8.65\" y2=\"-3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-8.65\" y1=\"-3.375\" x2=\"8.65\" y2=\"-3.375\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"8.65\" y1=\"-3.375\" x2=\"8.65\" y2=\"3.375\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"8.65\" y1=\"3.375\" x2=\"-8.65\" y2=\"3.375\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-7.95\" y=\"0.025\" dx=\"3.94\" dy=\"5.97\" layer=\"1\"/>\n<smd name=\"2\" x=\"7.95\" y=\"0\" dx=\"3.94\" dy=\"5.97\" layer=\"1\"/>\n<text x=\"-8.75\" y=\"3.9\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-8.75\" y=\"-5.15\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n</package>\n<package name=\"R1218\" urn=\"urn:adsk.eagle:footprint:25698/1\" library_version=\"1\">\n<description>&lt;b&gt;CRCW1218 Thick Film, Rectangular Chip Resistors&lt;/b&gt;&lt;p&gt;\nSource: http://www.vishay.com .. dcrcw.pdf</description>\n<wire x1=\"-0.913\" y1=\"-2.219\" x2=\"0.939\" y2=\"-2.219\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.913\" y1=\"2.219\" x2=\"-0.939\" y2=\"2.219\" width=\"0.1524\" layer=\"51\"/>\n<smd name=\"1\" x=\"-1.475\" y=\"0\" dx=\"1.05\" dy=\"4.9\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.475\" y=\"0\" dx=\"1.05\" dy=\"4.9\" layer=\"1\"/>\n<text x=\"-2.54\" y=\"2.54\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-2.54\" y=\"-3.81\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.651\" y1=\"-2.3\" x2=\"-0.9009\" y2=\"2.3\" layer=\"51\"/>\n<rectangle x1=\"0.9144\" y1=\"-2.3\" x2=\"1.6645\" y2=\"2.3\" layer=\"51\"/>\n</package>\n<package name=\"1812X7R\" urn=\"urn:adsk.eagle:footprint:25699/1\" library_version=\"1\">\n<description>&lt;b&gt;Chip Monolithic Ceramic Capacitors&lt;/b&gt; Medium Voltage High Capacitance for General Use&lt;p&gt;\nSource: http://www.murata.com .. GRM43DR72E224KW01.pdf</description>\n<wire x1=\"-1.1\" y1=\"1.5\" x2=\"1.1\" y2=\"1.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"1.1\" y1=\"-1.5\" x2=\"-1.1\" y2=\"-1.5\" width=\"0.2032\" layer=\"51\"/>\n<wire x1=\"-0.6\" y1=\"1.5\" x2=\"0.6\" y2=\"1.5\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"0.6\" y1=\"-1.5\" x2=\"-0.6\" y2=\"-1.5\" width=\"0.2032\" layer=\"21\"/>\n<smd name=\"1\" x=\"-1.425\" y=\"0\" dx=\"0.8\" dy=\"3.5\" layer=\"1\"/>\n<smd name=\"2\" x=\"1.425\" y=\"0\" dx=\"0.8\" dy=\"3.5\" layer=\"1\" rot=\"R180\"/>\n<text x=\"-1.9456\" y=\"1.9958\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.9456\" y=\"-3.7738\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-1.4\" y1=\"-1.6\" x2=\"-1.1\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"1.1\" y1=\"-1.6\" x2=\"1.4\" y2=\"1.6\" layer=\"51\" rot=\"R180\"/>\n</package>\n<package name=\"PRL1632\" urn=\"urn:adsk.eagle:footprint:25700/1\" library_version=\"1\">\n<description>&lt;b&gt;PRL1632 are realized as 1W for 3.2 × 1.6mm(1206)&lt;/b&gt;&lt;p&gt;\nSource: http://www.mouser.com/ds/2/392/products_18-2245.pdf</description>\n<wire x1=\"0.7275\" y1=\"-1.5228\" x2=\"-0.7277\" y2=\"-1.5228\" width=\"0.1524\" layer=\"51\"/>\n<wire x1=\"0.7275\" y1=\"1.5228\" x2=\"-0.7152\" y2=\"1.5228\" width=\"0.1524\" layer=\"51\"/>\n<smd name=\"2\" x=\"0.822\" y=\"0\" dx=\"1\" dy=\"3.2\" layer=\"1\"/>\n<smd name=\"1\" x=\"-0.822\" y=\"0\" dx=\"1\" dy=\"3.2\" layer=\"1\"/>\n<text x=\"-1.4\" y=\"1.8\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-1.4\" y=\"-3\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.8\" y1=\"-1.6\" x2=\"-0.4\" y2=\"1.6\" layer=\"51\"/>\n<rectangle x1=\"0.4\" y1=\"-1.6\" x2=\"0.8\" y2=\"1.6\" layer=\"51\"/>\n</package>\n<package name=\"R01005\" urn=\"urn:adsk.eagle:footprint:25701/1\" library_version=\"1\">\n<smd name=\"1\" x=\"-0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<smd name=\"2\" x=\"0.1625\" y=\"0\" dx=\"0.2\" dy=\"0.25\" layer=\"1\"/>\n<text x=\"-0.4\" y=\"0.3\" size=\"1.27\" layer=\"25\">&gt;NAME</text>\n<text x=\"-0.4\" y=\"-1.6\" size=\"1.27\" layer=\"27\">&gt;VALUE</text>\n<rectangle x1=\"-0.2\" y1=\"-0.1\" x2=\"-0.075\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"0.075\" y1=\"-0.1\" x2=\"0.2\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"0.05\" x2=\"0.15\" y2=\"0.1\" layer=\"51\"/>\n<rectangle x1=\"-0.15\" y1=\"-0.1\" x2=\"0.15\" y2=\"-0.05\" layer=\"51\"/>\n</package>\n</packages>\n<packages3d>\n<package3d name=\"R0805\" urn=\"urn:adsk.eagle:package:26059/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R0805\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R0402\" urn=\"urn:adsk.eagle:package:26058/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R0402\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R0603\" urn=\"urn:adsk.eagle:package:26057/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R0603\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R0805W\" urn=\"urn:adsk.eagle:package:26060/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR wave soldering</description>\n<packageinstances>\n<packageinstance name=\"R0805W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1206\" urn=\"urn:adsk.eagle:package:26062/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R1206\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1206W\" urn=\"urn:adsk.eagle:package:26064/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R1206W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1210\" urn=\"urn:adsk.eagle:package:26063/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R1210\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1210W\" urn=\"urn:adsk.eagle:package:26065/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R1210W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2010\" urn=\"urn:adsk.eagle:package:26066/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R2010\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2010W\" urn=\"urn:adsk.eagle:package:26068/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R2010W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2012\" urn=\"urn:adsk.eagle:package:26067/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R2012\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2012W\" urn=\"urn:adsk.eagle:package:26069/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R2012W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2512\" urn=\"urn:adsk.eagle:package:26070/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R2512\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R2512W\" urn=\"urn:adsk.eagle:package:26072/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R2512W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R3216\" urn=\"urn:adsk.eagle:package:26071/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R3216\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R3216W\" urn=\"urn:adsk.eagle:package:26074/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R3216W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R3225\" urn=\"urn:adsk.eagle:package:26073/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R3225\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R3225W\" urn=\"urn:adsk.eagle:package:26075/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R3225W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R5025\" urn=\"urn:adsk.eagle:package:26080/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR</description>\n<packageinstances>\n<packageinstance name=\"R5025\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R5025W\" urn=\"urn:adsk.eagle:package:26077/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nwave soldering</description>\n<packageinstances>\n<packageinstance name=\"R5025W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R6332\" urn=\"urn:adsk.eagle:package:26076/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nSource: http://download.siliconexpert.com/pdfs/2005/02/24/Semi_Ap/2/VSH/Resistor/dcrcwfre.pdf</description>\n<packageinstances>\n<packageinstance name=\"R6332\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R6332W\" urn=\"urn:adsk.eagle:package:26078/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR wave soldering\nSource: http://download.siliconexpert.com/pdfs/2005/02/24/Semi_Ap/2/VSH/Resistor/dcrcwfre.pdf</description>\n<packageinstances>\n<packageinstance name=\"R6332W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M0805\" urn=\"urn:adsk.eagle:package:26079/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.10 W</description>\n<packageinstances>\n<packageinstance name=\"M0805\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M1206\" urn=\"urn:adsk.eagle:package:26088/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.25 W</description>\n<packageinstances>\n<packageinstance name=\"M1206\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M1406\" urn=\"urn:adsk.eagle:package:26081/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.12 W</description>\n<packageinstances>\n<packageinstance name=\"M1406\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M2012\" urn=\"urn:adsk.eagle:package:26082/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.10 W</description>\n<packageinstances>\n<packageinstance name=\"M2012\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M2309\" urn=\"urn:adsk.eagle:package:26085/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.25 W</description>\n<packageinstances>\n<packageinstance name=\"M2309\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M3216\" urn=\"urn:adsk.eagle:package:26083/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.25 W</description>\n<packageinstances>\n<packageinstance name=\"M3216\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M3516\" urn=\"urn:adsk.eagle:package:26086/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.12 W</description>\n<packageinstances>\n<packageinstance name=\"M3516\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"M5923\" urn=\"urn:adsk.eagle:package:26084/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\nMELF 0.25 W</description>\n<packageinstances>\n<packageinstance name=\"M5923\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0204/5\" urn=\"urn:adsk.eagle:package:25955/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0204, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"0204/5\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0204/7\" urn=\"urn:adsk.eagle:package:25945/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0204, grid 7.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0204/7\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0204V\" urn=\"urn:adsk.eagle:package:25948/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0204, grid 2.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0204V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/10\" urn=\"urn:adsk.eagle:package:25939/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 10 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/10\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/12\" urn=\"urn:adsk.eagle:package:25938/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 12 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/12\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/15\" urn=\"urn:adsk.eagle:package:25947/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 15mm</description>\n<packageinstances>\n<packageinstance name=\"0207/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/2V\" urn=\"urn:adsk.eagle:package:25941/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 2.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/2V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/5V\" urn=\"urn:adsk.eagle:package:25944/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/5V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0207/7\" urn=\"urn:adsk.eagle:package:25942/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0207, grid 7.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0207/7\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0309/10\" urn=\"urn:adsk.eagle:package:26087/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0309, grid 10mm</description>\n<packageinstances>\n<packageinstance name=\"0309/10\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0309/12\" urn=\"urn:adsk.eagle:package:26089/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0309, grid 12.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0309/12\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0309V\" urn=\"urn:adsk.eagle:package:26090/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0309, grid 2.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0309V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0411/12\" urn=\"urn:adsk.eagle:package:26091/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0411, grid 12.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0411/12\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0411/15\" urn=\"urn:adsk.eagle:package:26093/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0411, grid 15 mm</description>\n<packageinstances>\n<packageinstance name=\"0411/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0411V\" urn=\"urn:adsk.eagle:package:26092/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0411, grid 3.81 mm</description>\n<packageinstances>\n<packageinstance name=\"0411V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0414/15\" urn=\"urn:adsk.eagle:package:26094/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0414, grid 15 mm</description>\n<packageinstances>\n<packageinstance name=\"0414/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0414V\" urn=\"urn:adsk.eagle:package:26095/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0414, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"0414V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0617/17\" urn=\"urn:adsk.eagle:package:26096/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0617, grid 17.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0617/17\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0617/22\" urn=\"urn:adsk.eagle:package:26103/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0617, grid 22.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0617/22\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0617V\" urn=\"urn:adsk.eagle:package:26097/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0617, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"0617V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0922/22\" urn=\"urn:adsk.eagle:package:26107/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0922, grid 22.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0922/22\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"P0613V\" urn=\"urn:adsk.eagle:package:26106/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0613, grid 5 mm</description>\n<packageinstances>\n<packageinstance name=\"P0613V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"P0613/15\" urn=\"urn:adsk.eagle:package:26098/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0613, grid 15 mm</description>\n<packageinstances>\n<packageinstance name=\"P0613/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"P0817/22\" urn=\"urn:adsk.eagle:package:26099/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0817, grid 22.5 mm</description>\n<packageinstances>\n<packageinstance name=\"P0817/22\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"P0817V\" urn=\"urn:adsk.eagle:package:26100/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0817, grid 6.35 mm</description>\n<packageinstances>\n<packageinstance name=\"P0817V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"V234/12\" urn=\"urn:adsk.eagle:package:26108/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype V234, grid 12.5 mm</description>\n<packageinstances>\n<packageinstance name=\"V234/12\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"V235/17\" urn=\"urn:adsk.eagle:package:26102/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype V235, grid 17.78 mm</description>\n<packageinstances>\n<packageinstance name=\"V235/17\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"V526-0\" urn=\"urn:adsk.eagle:package:26101/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype V526-0, grid 2.5 mm</description>\n<packageinstances>\n<packageinstance name=\"V526-0\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0102R\" urn=\"urn:adsk.eagle:package:26104/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC2211 Reflow Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0102R\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0102W\" urn=\"urn:adsk.eagle:package:26105/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC2211 Wave Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0102W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0204R\" urn=\"urn:adsk.eagle:package:26109/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC3715 Reflow Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0204R\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0204W\" urn=\"urn:adsk.eagle:package:26111/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC3715 Wave Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0204W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0207R\" urn=\"urn:adsk.eagle:package:26113/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC6123 Reflow Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0207R\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0207W\" urn=\"urn:adsk.eagle:package:26112/1\" type=\"box\" library_version=\"1\">\n<description>CECC Size RC6123 Wave Soldering\nsource Beyschlag</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0207W\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"0922V\" urn=\"urn:adsk.eagle:package:26110/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype 0922, grid 7.5 mm</description>\n<packageinstances>\n<packageinstance name=\"0922V\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"RDH/15\" urn=\"urn:adsk.eagle:package:26114/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR\ntype RDH, grid 15 mm</description>\n<packageinstances>\n<packageinstance name=\"RDH/15\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"MINI_MELF-0102AX\" urn=\"urn:adsk.eagle:package:26115/1\" type=\"box\" library_version=\"1\">\n<description>Mini MELF 0102 Axial</description>\n<packageinstances>\n<packageinstance name=\"MINI_MELF-0102AX\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R0201\" urn=\"urn:adsk.eagle:package:26117/1\" type=\"box\" library_version=\"1\">\n<description>RESISTOR chip\nSource: http://www.vishay.com/docs/20008/dcrcw.pdf</description>\n<packageinstances>\n<packageinstance name=\"R0201\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA52\" urn=\"urn:adsk.eagle:package:26116/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR52\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA52\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA53\" urn=\"urn:adsk.eagle:package:26118/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR53\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA53\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA54\" urn=\"urn:adsk.eagle:package:26119/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR54\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA54\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA55\" urn=\"urn:adsk.eagle:package:26120/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR55\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA55\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VTA56\" urn=\"urn:adsk.eagle:package:26129/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RBR56\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VTA56\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VMTA55\" urn=\"urn:adsk.eagle:package:26121/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RNC55\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VMTA55\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"VMTB60\" urn=\"urn:adsk.eagle:package:26122/1\" type=\"box\" library_version=\"1\">\n<description>Bulk Metal® Foil Technology, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements\nMIL SIZE RNC60\nSource: VISHAY .. vta56.pdf</description>\n<packageinstances>\n<packageinstance name=\"VMTB60\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R4527\" urn=\"urn:adsk.eagle:package:26124/1\" type=\"box\" library_version=\"1\">\n<description>Package 4527\nSource: http://www.vishay.com/docs/31059/wsrhigh.pdf</description>\n<packageinstances>\n<packageinstance name=\"R4527\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC0001\" urn=\"urn:adsk.eagle:package:26123/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC0001\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC0002\" urn=\"urn:adsk.eagle:package:26125/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC0002\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC01/2\" urn=\"urn:adsk.eagle:package:26127/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC01/2\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC2515\" urn=\"urn:adsk.eagle:package:26134/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC2515\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC4527\" urn=\"urn:adsk.eagle:package:26126/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC4527\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"WSC6927\" urn=\"urn:adsk.eagle:package:26128/1\" type=\"box\" library_version=\"1\">\n<description>Wirewound Resistors, Precision Power\nSource: VISHAY wscwsn.pdf</description>\n<packageinstances>\n<packageinstance name=\"WSC6927\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R1218\" urn=\"urn:adsk.eagle:package:26131/1\" type=\"box\" library_version=\"1\">\n<description>CRCW1218 Thick Film, Rectangular Chip Resistors\nSource: http://www.vishay.com .. dcrcw.pdf</description>\n<packageinstances>\n<packageinstance name=\"R1218\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"1812X7R\" urn=\"urn:adsk.eagle:package:26130/1\" type=\"box\" library_version=\"1\">\n<description>Chip Monolithic Ceramic Capacitors Medium Voltage High Capacitance for General Use\nSource: http://www.murata.com .. GRM43DR72E224KW01.pdf</description>\n<packageinstances>\n<packageinstance name=\"1812X7R\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"PRL1632\" urn=\"urn:adsk.eagle:package:26132/1\" type=\"box\" library_version=\"1\">\n<description>PRL1632 are realized as 1W for 3.2 × 1.6mm(1206)\nSource: http://www.mouser.com/ds/2/392/products_18-2245.pdf</description>\n<packageinstances>\n<packageinstance name=\"PRL1632\"/>\n</packageinstances>\n</package3d>\n<package3d name=\"R01005\" urn=\"urn:adsk.eagle:package:26133/1\" type=\"box\" library_version=\"1\">\n<packageinstances>\n<packageinstance name=\"R01005\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n<symbols>\n<symbol name=\"R-EU-1\" urn=\"urn:adsk.eagle:symbol:25624/1\" library_version=\"1\">\n<wire x1=\"-2.54\" y1=\"-0.889\" x2=\"2.54\" y2=\"-0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"0.889\" x2=\"-2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"2.54\" y1=\"-0.889\" x2=\"2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"-2.54\" y1=\"-0.889\" x2=\"-2.54\" y2=\"0.889\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-3.81\" y=\"1.4986\" size=\"1.778\" layer=\"95\">&gt;NAME</text>\n<text x=\"-3.81\" y=\"-3.302\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"2\" x=\"5.08\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\" rot=\"R180\"/>\n<pin name=\"1\" x=\"-5.08\" y=\"0\" visible=\"off\" length=\"short\" direction=\"pas\" swaplevel=\"1\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"R-EU_\" urn=\"urn:adsk.eagle:component:26223/1\" prefix=\"R\" uservalue=\"yes\" library_version=\"1\">\n<description>&lt;B&gt;RESISTOR&lt;/B&gt;, European symbol</description>\n<gates>\n<gate name=\"G$1\" symbol=\"R-EU-1\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"R0402\" package=\"R0402\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26058/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0603\" package=\"R0603\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26057/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0805\" package=\"R0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26059/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R0805W\" package=\"R0805W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26060/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1206\" package=\"R1206\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26062/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1206W\" package=\"R1206W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26064/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1210\" package=\"R1210\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26063/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1210W\" package=\"R1210W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26065/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2010\" package=\"R2010\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26066/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2010W\" package=\"R2010W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26068/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2012\" package=\"R2012\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26067/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2012W\" package=\"R2012W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26069/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2512\" package=\"R2512\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26070/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R2512W\" package=\"R2512W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26072/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3216\" package=\"R3216\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26071/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3216W\" package=\"R3216W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26074/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3225\" package=\"R3225\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26073/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R3225W\" package=\"R3225W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26075/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R5025\" package=\"R5025\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26080/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R5025W\" package=\"R5025W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26077/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R6332\" package=\"R6332\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26076/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R6332W\" package=\"R6332W\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26078/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"M0805\" package=\"M0805\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26079/1\"/>\n</package3dinstances>\n<technologies>\n<technology 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package=\"VMTA55\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26121/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"VMTB60\" package=\"VMTB60\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26122/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R4527\" package=\"R4527\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26124/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC0001\" package=\"WSC0001\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26123/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC0002\" package=\"WSC0002\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26125/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC01/2\" package=\"WSC01/2\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26127/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC2515\" package=\"WSC2515\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26134/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC4527\" package=\"WSC4527\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26126/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"WSC6927\" package=\"WSC6927\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26128/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"R1218\" package=\"R1218\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26131/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"1812X7R\" package=\"1812X7R\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26130/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"PRL1632\" package=\"PRL1632\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26132/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n<device name=\"01005\" package=\"R01005\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:26133/1\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"switch-ck\">\n<description>&lt;b&gt;C&amp;K Swtiches&lt;/b&gt; - v1.00&lt;p&gt;\nTHIS LIBRARY IS PROVIDED AS IS AND WITHOUT WARRANTY OF ANY KIND, EXPRESSED OR IMPLIED.\nUSE AT YOUR OWN RISK!\n&lt;p&gt;Copyright (C) 2011, Bob Starr&lt;br&gt;\nhttp://www.bobstarr.net</description>\n<packages>\n<package name=\"JS202011SCQN\">\n<description>DPDT SLIDE SWITCH</description>\n<smd name=\"1\" x=\"-2.5\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"2\" x=\"0\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"3\" x=\"2.5\" y=\"-2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"6\" x=\"2.5\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"5\" x=\"0\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<smd name=\"4\" x=\"-2.5\" y=\"2.7\" dx=\"1.27\" dy=\"2.4\" layer=\"1\" rot=\"R180\"/>\n<wire x1=\"-4.5\" y1=\"1.8\" x2=\"4.5\" y2=\"1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"1.8\" x2=\"4.5\" y2=\"-1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"4.5\" y1=\"-1.8\" x2=\"-4.5\" y2=\"-1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-4.5\" y1=\"-1.8\" x2=\"-4.5\" y2=\"1.8\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"1\" x2=\"2.5\" y2=\"1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"1\" x2=\"2.5\" y2=\"-1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"2.5\" y1=\"-1\" x2=\"-2.5\" y2=\"-1\" width=\"0.0508\" layer=\"51\"/>\n<wire x1=\"-2.5\" y1=\"-1\" x2=\"-2.5\" y2=\"1\" width=\"0.0508\" layer=\"51\"/>\n<rectangle x1=\"-2.25\" y1=\"-0.75\" x2=\"-0.25\" y2=\"0.75\" layer=\"51\"/>\n<wire x1=\"-3.5\" y1=\"2\" x2=\"-4.75\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.75\" y1=\"2\" x2=\"-4.75\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-4.75\" y1=\"-2\" x2=\"-3.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"3.5\" y1=\"2\" x2=\"4.75\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.75\" y1=\"2\" x2=\"4.75\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"4.75\" y1=\"-2\" x2=\"3.5\" y2=\"-2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"-1.5\" y1=\"2\" x2=\"-1\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire x1=\"1\" y1=\"2\" x2=\"1.5\" y2=\"2\" width=\"0.2032\" layer=\"21\"/>\n<wire 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direction=\"pas\" rot=\"R180\"/>\n<pin name=\"5\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" rot=\"R180\"/>\n<pin name=\"6\" x=\"5.08\" y=\"-2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" rot=\"R180\"/>\n<wire x1=\"1.27\" y1=\"2.8575\" x2=\"1.27\" y2=\"-2.8575\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"1.27\" y1=\"-2.8575\" x2=\"0.635\" y2=\"-2.8575\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.635\" y1=\"-2.8575\" x2=\"0.635\" y2=\"2.8575\" width=\"0.1524\" layer=\"94\"/>\n<wire x1=\"0.635\" y1=\"2.8575\" x2=\"1.27\" y2=\"2.8575\" width=\"0.1524\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"JS202011SCQN\" prefix=\"S\">\n<description>DPDT SLIDE SWITCH</description>\n<gates>\n<gate name=\"G$1\" symbol=\"SLIDE-DPDT\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"JS202011SCQN\">\n<connects>\n<connect gate=\"G$1\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"2\" pad=\"2\"/>\n<connect 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x1=\"1.5\" y1=\"-1.5\" x2=\"-1.5\" y2=\"-1.5\" width=\"0.1\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"-1.5\" x2=\"-1.5\" y2=\"1.5\" width=\"0.1\" layer=\"51\"/>\n<wire x1=\"-1.5\" y1=\"0.85\" x2=\"-0.85\" y2=\"1.5\" width=\"0.1\" layer=\"51\"/>\n<wire x1=\"-1.15\" y1=\"1.5\" x2=\"1.15\" y2=\"1.5\" width=\"0.2\" layer=\"21\"/>\n<wire x1=\"1.15\" y1=\"1.5\" x2=\"1.15\" y2=\"-1.5\" width=\"0.2\" layer=\"21\"/>\n<wire x1=\"1.15\" y1=\"-1.5\" x2=\"-1.15\" y2=\"-1.5\" width=\"0.2\" layer=\"21\"/>\n<wire x1=\"-1.15\" y1=\"-1.5\" x2=\"-1.15\" y2=\"1.5\" width=\"0.2\" layer=\"21\"/>\n<wire x1=\"-2.925\" y1=\"1.55\" x2=\"-1.5\" y2=\"1.55\" width=\"0.2\" layer=\"21\"/>\n</package>\n</packages>\n<symbols>\n<symbol name=\"MAX4416EUA+\">\n<wire x1=\"5.08\" y1=\"2.54\" x2=\"22.86\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"22.86\" y1=\"-10.16\" x2=\"22.86\" y2=\"2.54\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"22.86\" y1=\"-10.16\" x2=\"5.08\" y2=\"-10.16\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"5.08\" y1=\"2.54\" x2=\"5.08\" y2=\"-10.16\" width=\"0.254\" layer=\"94\"/>\n<text x=\"24.13\" y=\"7.62\" size=\"1.778\" layer=\"95\" align=\"center-left\">&gt;NAME</text>\n<text x=\"24.13\" y=\"5.08\" size=\"1.778\" layer=\"96\" align=\"center-left\">&gt;VALUE</text>\n<pin name=\"OUTA\" x=\"0\" y=\"0\" length=\"middle\"/>\n<pin name=\"INA-\" x=\"0\" y=\"-2.54\" length=\"middle\"/>\n<pin name=\"INA+\" x=\"0\" y=\"-5.08\" length=\"middle\"/>\n<pin name=\"VEE\" x=\"0\" y=\"-7.62\" length=\"middle\"/>\n<pin name=\"VCC\" x=\"27.94\" y=\"0\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"OUTB\" x=\"27.94\" y=\"-2.54\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"INB-\" x=\"27.94\" y=\"-5.08\" length=\"middle\" rot=\"R180\"/>\n<pin name=\"INB+\" x=\"27.94\" y=\"-7.62\" length=\"middle\" rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"MAX4416EUA+\" prefix=\"IC\">\n<description>&lt;b&gt;High Speed Operational Amplifiers Low-Power, +3V/+5V, 400MHz Single-Supply Op Amps with Rail-to-Rail Outputs&lt;/b&gt;&lt;p&gt;\nSource: &lt;a href=\"https://componentsearchengine.com/Datasheets/1/MAX4416EUA .pdf\"&gt; Datasheet &lt;/a&gt;</description>\n<gates>\n<gate name=\"G$1\" symbol=\"MAX4416EUA+\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"SOP65P490X110-8N\">\n<connects>\n<connect gate=\"G$1\" pin=\"INA+\" pad=\"3\"/>\n<connect gate=\"G$1\" pin=\"INA-\" pad=\"2\"/>\n<connect gate=\"G$1\" pin=\"INB+\" pad=\"5\"/>\n<connect gate=\"G$1\" pin=\"INB-\" pad=\"6\"/>\n<connect gate=\"G$1\" pin=\"OUTA\" pad=\"1\"/>\n<connect gate=\"G$1\" pin=\"OUTB\" pad=\"7\"/>\n<connect gate=\"G$1\" pin=\"VCC\" pad=\"8\"/>\n<connect gate=\"G$1\" pin=\"VEE\" pad=\"4\"/>\n</connects>\n<technologies>\n<technology name=\"\">\n<attribute name=\"DESCRIPTION\" value=\"High Speed Operational Amplifiers Low-Power, +3V/+5V, 400MHz Single-Supply Op Amps with Rail-to-Rail Outputs\" constant=\"no\"/>\n<attribute name=\"HEIGHT\" value=\"1.1mm\" constant=\"no\"/>\n<attribute name=\"MANUFACTURER_NAME\" value=\"Maxim Integrated\" constant=\"no\"/>\n<attribute name=\"MANUFACTURER_PART_NUMBER\" value=\"MAX4416EUA+\" constant=\"no\"/>\n<attribute name=\"MOUSER_PART_NUMBER\" value=\"700-MAX4416EUA\" constant=\"no\"/>\n<attribute name=\"MOUSER_PRICE-STOCK\" value=\"https://www.mouser.com/Search/Refine.aspx?Keyword=700-MAX4416EUA\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"1\" name=\"gnd\" width=\"0.3048\" drill=\"0\">\n</class>\n<class number=\"2\" name=\"three\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"3\" name=\"five\" width=\"0.381\" drill=\"0\">\n</class>\n</classes>\n<parts>\n<part name=\"FPGA\" library=\"10M08SAE144\" deviceset=\"10M08SAE144\" device=\"\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"10M08SAE144C8G\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"P+3\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"P+4\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"CP5\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"CP6\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"+3V1\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND14\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND15\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"OSC\" library=\"crystal\" deviceset=\"ASE\" device=\"\" value=\"ASE-50.000MHZ-ET\">\n<attribute name=\"MPN\" value=\"ASE-50.000MHZ-ET\"/>\n</part>\n<part name=\"GND16\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V2\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"C_OSC\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"0.01uF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\"/>\n</part>\n<part name=\"+3V4\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"CV11\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND22\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CV12\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"+3V5\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"CG13\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"GND21\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CG14\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"CG15\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND23\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RJ2\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"RJ3\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"RJ4\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"+3V6\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"RJ5\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"RS6\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"GND24\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RS7\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"RS8\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"+3V8\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"RS9\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"05M4535\"/>\n</part>\n<part name=\"RLED1\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LED1\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"GND26\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"REG\" library=\"Seeed-IC-2016\" deviceset=\"PMIC-CJT1117-3.3(SOT223)\" device=\"\" value=\"LDL1117S33R\">\n<attribute name=\"MPN\" value=\"LDL1117S33R\"/>\n</part>\n<part name=\"GND4\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CREF1\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND5\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RLED2\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LED2\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RLED3\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LED3\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"C-AIN1\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND12\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND27\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"J1\" library=\"connector\" deviceset=\"MOLEX_BNC_73100-0105\" device=\"\">\n<attribute name=\"MPN\" value=\"73100-0105\"/>\n</part>\n<part name=\"J2\" library=\"connector\" deviceset=\"MOLEX_BNC_73100-0105\" device=\"\">\n<attribute name=\"MPN\" value=\"73100-0105\"/>\n</part>\n<part name=\"J3\" library=\"connector\" deviceset=\"MOLEX_BNC_73100-0105\" device=\"\">\n<attribute name=\"MPN\" value=\"73100-0105\"/>\n</part>\n<part name=\"J4\" library=\"connector\" deviceset=\"MOLEX_BNC_73100-0105\" device=\"\">\n<attribute name=\"MPN\" value=\"73100-0105\"/>\n</part>\n<part name=\"IC1\" library=\"HaasMaxADC\" deviceset=\"MAX19506\" device=\"\">\n<attribute name=\"MPN\" value=\"MAX19506ETM+\"/>\n</part>\n<part name=\"GND32\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C0DD2_A\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND33\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C-AIN2\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND1\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND2\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CREF2\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND3\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C-AIN3\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"IC2\" library=\"HaasMaxADC\" deviceset=\"MAX19506\" device=\"\">\n<attribute name=\"MPN\" value=\"MAX19506ETM+\"/>\n</part>\n<part name=\"GND10\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"C0DD2_B\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"C-AIN4\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND37\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"JP1\" library=\"Seeed-OPL-Connector\" deviceset=\"DIP-BLACK-MALE-HEADER(2X5P-2.54)\" device=\"\" value=\"2x5p-2.54\">\n<attribute name=\"MPN\" value=\"\"/>\n</part>\n<part name=\"GND7\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"P+1\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"GND13\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RLED4\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LED4\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"USB1\" library=\"PP_Connectors\" deviceset=\"USB_5PIN\" device=\"_10118193-0001LF\" value=\"MF-CON-MICROUSB-RIGHT\"/>\n<part name=\"GND42\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"SW_RESET\" library=\"MF_Switches\" deviceset=\"TACT\" device=\"_4.2MM\" value=\"MF-SW-TACT-4.2MM\"/>\n<part name=\"+3V16\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GAINSW1\" library=\"74xx-little-us\" deviceset=\"74*1G3157\" device=\"DBVR\">\n<attribute name=\"MPN\" value=\"SN74LVC1G3157DBV\"/>\n</part>\n<part name=\"GND9\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RIN1\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1.1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"CRCW08051M10FKEA\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN2\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1.1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"CRCW08051M10FKEA\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN3\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1.1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"CRCW08051M10FKEA\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN4\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1.1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"CRCW08051M10FKEA\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"C5VOPAMP2\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"C5VOPAMP1\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"GND36\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND38\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND40\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"RGAIN1_1\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"100k\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-100k\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RGAIN2_1\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"1M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-1M\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"GAINSW2\" library=\"74xx-little-us\" deviceset=\"74*1G3157\" device=\"DBVR\">\n<attribute name=\"MPN\" value=\"SN74LVC1G3157DBV\"/>\n</part>\n<part name=\"GAINSW3\" library=\"74xx-little-us\" deviceset=\"74*1G3157\" device=\"DBVR\">\n<attribute name=\"MPN\" value=\"SN74LVC1G3157DBV\"/>\n</part>\n<part name=\"GAINSW4\" library=\"74xx-little-us\" deviceset=\"74*1G3157\" device=\"DBVR\">\n<attribute name=\"MPN\" value=\"SN74LVC1G3157DBV\"/>\n</part>\n<part name=\"GND46\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND47\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CADD1_A\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"C0DD1_A\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"CADD2_A\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" 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value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"R_SDA\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10K\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-10K\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"R50-4\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"R50-3\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"R50-2\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"R50-1\" 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deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"R50-15\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"R50-16\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"U340G\" library=\"usb-serial\" deviceset=\"CH340G\" device=\"\"/>\n<part name=\"Y1\" library=\"SparkFun-FreqCtrl\" deviceset=\"CRYSTAL\" device=\"HC49US\" value=\"ABL-12.000MHZ-B2\"/>\n<part name=\"C_OSC1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"22pF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-22pF\"/>\n</part>\n<part name=\"C_OSC2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"22pF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-22pF\"/>\n</part>\n<part name=\"GND66\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V30\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND67\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"DAC1\" library=\"Luca Eagle-Library\" deviceset=\"MCP4728\" device=\"\">\n<attribute name=\"MFN\" value=\"MCP4728-E/UN\"/>\n</part>\n<part name=\"GND39\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND43\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND44\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"COFFSET\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"C_5V_10NF\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"0.01uF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\"/>\n</part>\n<part name=\"GND45\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part 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library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"1nF\">\n<attribute name=\"MPN\" value=\"06035A102JAT2A\"/>\n</part>\n<part name=\"CIN1NF_2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"1nF\">\n<attribute name=\"MPN\" value=\"06035A102JAT2A\"/>\n</part>\n<part name=\"CIN1NF_3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"1nF\">\n<attribute name=\"MPN\" value=\"06035A102JAT2A\"/>\n</part>\n<part name=\"CIN1NF_4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"1nF\">\n<attribute name=\"MPN\" value=\"06035A102JAT2A\"/>\n</part>\n<part name=\"P+5\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"CP3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"CP4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"GND75\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"REG1\" library=\"Seeed-IC-2016\" deviceset=\"PMIC-CJT1117-3.3(SOT223)\" device=\"\" value=\"LDL1117S33R\">\n<attribute name=\"MPN\" value=\"LDL1117S33R\"/>\n</part>\n<part name=\"CP7\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"CP8\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"0.1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-0.1uF\"/>\n</part>\n<part name=\"L1\" library=\"SparkFun-Passives\" deviceset=\"INDUCTOR\" device=\"1210\" value=\"10uH\">\n<attribute name=\"MPN\" value=\"MF-IND-1210-10uH\"/>\n</part>\n<part name=\"CP9\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"ROFFSET1\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200\"/>\n<part name=\"ROFFSET2\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"ROFFSET3\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"ROFFSET4\" library=\"resistor\" library_urn=\"urn:adsk.eagle:library:348\" deviceset=\"R-EU_\" device=\"R0805\" package3d_urn=\"urn:adsk.eagle:package:26059/1\" value=\"200R\"/>\n<part name=\"U$1\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$2\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$3\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$7\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$8\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$9\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$11\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$13\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$15\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"L2\" library=\"SparkFun-Passives\" deviceset=\"INDUCTOR\" device=\"1210\" value=\"10uH\">\n<attribute name=\"MPN\" value=\"MF-IND-1210-10uH\"/>\n</part>\n<part name=\"C_5V_10NF1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"0.01uF\">\n<attribute name=\"MFN\" value=\"MF-CAP-0603-0.01uF\"/>\n</part>\n<part name=\"GND76\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CP10\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"CP11\" library=\"rcl\" deviceset=\"C-EU\" device=\"C0805K\" value=\"1uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0805-1uF\"/>\n</part>\n<part name=\"P+6\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"COFFSETA6\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"COFFSETA1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"COFFSETA2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"COFFSETA3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C1206\" value=\"10uF\">\n<attribute name=\"MPN\" value=\"MF-CAP-1206-10uF\"/>\n</part>\n<part name=\"RIN5\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"CRCW080510M0FKEB\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN6\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"CRCW080510M0FKEB\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN7\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"CRCW080510M0FKEB\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"RIN8\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"10M\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"CRCW080510M0FKEB\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"GND77\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"CH1\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CL1\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL2\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL3\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CL4\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"8-45pF\">\n<attribute name=\"MPN\" value=\"TZY2K450AC01\"/>\n</part>\n<part name=\"CH2\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CH3\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CH4\" library=\"SparkFun-Passives\" deviceset=\"CAP_ADJ\" device=\"SMD\" value=\"3-10pF\">\n<attribute name=\"MPN\" value=\"TZY2Z100AC01\"/>\n</part>\n<part name=\"CIN5_1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"CIN5_4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"10pF\">\n<attribute name=\"MPN\" value=\"MF-CAP-0603-10pF\"/>\n</part>\n<part name=\"RLEDPOW\" library=\"resistor\" deviceset=\"R-EU_\" device=\"R0805\" value=\"560\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-RES-0805-560\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"LEDPOW\" library=\"led\" deviceset=\"LED\" device=\"SML0805\" value=\"MF-LED-0805-RED\">\n<attribute name=\"MF\" value=\"\"/>\n<attribute name=\"MPN\" value=\"MF-LED-0805-RED\"/>\n<attribute name=\"OC_NEWARK\" value=\"unknown\"/>\n</part>\n<part name=\"CIN56_1\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_2\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_3\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"CIN56_4\" library=\"rcl@1\" deviceset=\"C-US\" device=\"C0603\" value=\"56pF\">\n<attribute name=\"MPN\" value=\"06035A560FAT2A\"/>\n</part>\n<part name=\"GOLD_ORB_SM1\" library=\"oshw\" deviceset=\"OSHWLOGO\" device=\"LOGO8MM\"/>\n<part name=\"+3V3\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND70\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V9\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND72\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND73\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND74\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND81\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND17\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND29\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND35\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND78\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND18\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND31\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND56\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND82\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$14\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"GND19\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND20\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND28\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND57\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$16\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$4\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"GND30\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND41\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND48\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$5\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$6\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"U$17\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"+3V11\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND25\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$12\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"GND11\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND49\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND6\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"U$10\" library=\"SparkFun-PowerSymbols\" library_urn=\"urn:adsk.eagle:library:530\" deviceset=\"VCCA\" device=\"\"/>\n<part name=\"+3V12\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND50\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND51\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND52\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND53\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND54\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"FRAME1\" library=\"frames\" library_urn=\"urn:adsk.eagle:library:229\" deviceset=\"A3L-LOC\" device=\"\"/>\n<part name=\"FRAME2\" library=\"frames\" library_urn=\"urn:adsk.eagle:library:229\" deviceset=\"A3L-LOC\" device=\"\"/>\n<part name=\"FRAME3\" library=\"frames\" library_urn=\"urn:adsk.eagle:library:229\" deviceset=\"A3L-LOC\" device=\"\"/>\n<part name=\"S1\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S2\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S3\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S4\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S5\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S6\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S7\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S8\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"S9\" library=\"switch-ck\" deviceset=\"JS202011SCQN\" device=\"\"/>\n<part name=\"GND55\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND62\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND63\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND79\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND80\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND83\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND84\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND85\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"+3V7\" library=\"supply1\" deviceset=\"+3V3\" device=\"\"/>\n<part name=\"GND86\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_ANALOG_IOEXP1\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"/90\" package3d_urn=\"urn:adsk.eagle:package:22488/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"IC3\" library=\"SamacSys_Parts\" deviceset=\"MAX4416EUA+\" device=\"\"/>\n<part name=\"IC4\" library=\"SamacSys_Parts\" deviceset=\"MAX4416EUA+\" device=\"\"/>\n</parts>\n<sheets>\n<sheet>\n<description>Front-End</description>\n<plain>\n<text x=\"7.62\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Front-Ends</text>\n<wire x1=\"5.08\" y1=\"193.04\" x2=\"167.64\" y2=\"193.04\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"193.04\" x2=\"193.04\" y2=\"193.04\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"193.04\" y1=\"193.04\" x2=\"193.04\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"193.04\" y1=\"248.92\" x2=\"193.04\" y2=\"256.54\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"193.04\" y1=\"193.04\" x2=\"358.14\" y2=\"193.04\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"360.68\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 3</text>\n<text x=\"170.18\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 1</text>\n<wire x1=\"358.14\" y1=\"193.04\" x2=\"383.54\" y2=\"193.04\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"5.08\" y1=\"134.62\" x2=\"63.5\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"63.5\" y1=\"134.62\" x2=\"162.56\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"162.56\" y1=\"134.62\" x2=\"193.04\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"193.04\" y1=\"134.62\" x2=\"353.06\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"353.06\" y1=\"134.62\" x2=\"383.54\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"193.04\" y1=\"193.04\" x2=\"193.04\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"170.18\" y=\"187.96\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 2</text>\n<text x=\"360.68\" y=\"187.96\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 4</text>\n<wire x1=\"193.04\" y1=\"185.42\" x2=\"193.04\" y2=\"134.62\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"5.08\" y1=\"248.92\" x2=\"33.02\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"33.02\" y1=\"248.92\" x2=\"33.02\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<text x=\"7.62\" y=\"129.54\" size=\"2.54\" layer=\"97\" font=\"vector\">Front-End gain and offset</text>\n<wire x1=\"5.08\" y1=\"127\" x2=\"63.5\" y2=\"127\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"63.5\" y1=\"127\" x2=\"63.5\" y2=\"134.62\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"5.08\" y1=\"33.02\" x2=\"30.48\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"30.48\" y1=\"33.02\" x2=\"162.56\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"162.56\" y1=\"33.02\" x2=\"193.04\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"193.04\" y1=\"33.02\" x2=\"383.54\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"193.04\" y1=\"134.62\" x2=\"193.04\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"193.04\" y1=\"127\" x2=\"193.04\" y2=\"33.02\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"193.04\" x2=\"167.64\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"185.42\" x2=\"193.04\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"256.54\" x2=\"167.64\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"167.64\" y1=\"248.92\" x2=\"193.04\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"358.14\" y1=\"256.54\" x2=\"358.14\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"358.14\" y1=\"248.92\" x2=\"383.54\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"358.14\" y1=\"193.04\" x2=\"358.14\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"358.14\" y1=\"185.42\" x2=\"383.54\" y2=\"185.42\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"165.1\" y=\"129.54\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 1+2</text>\n<text x=\"355.6\" y=\"129.54\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 3+4</text>\n<wire x1=\"162.56\" y1=\"134.62\" x2=\"162.56\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"162.56\" y1=\"127\" x2=\"193.04\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"353.06\" y1=\"134.62\" x2=\"353.06\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"353.06\" y1=\"127\" x2=\"383.54\" y2=\"127\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"7.62\" y=\"27.94\" size=\"2.54\" layer=\"97\" font=\"vector\">Offset DAC</text>\n<wire x1=\"5.08\" y1=\"25.4\" x2=\"30.48\" y2=\"25.4\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"30.48\" y1=\"25.4\" x2=\"30.48\" y2=\"33.02\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"162.56\" y1=\"33.02\" x2=\"162.56\" y2=\"5.08\" width=\"0.1524\" layer=\"97\"/>\n<text x=\"58.42\" y=\"198.12\" size=\"1.778\" layer=\"91\">4 200 Ohm resistors in parallel\nfor 50 Ohm termination</text>\n<text x=\"121.92\" y=\"198.12\" size=\"1.778\" layer=\"91\">10M Ohm resistor needed for AC coupling mode\nto bring the DC offset to 0.\nThe time constant for the AC couping is\nRC=0.01uF*10M=0.1 sec.</text>\n<text x=\"115.57\" y=\"212.344\" size=\"1.778\" layer=\"91\">These resistors, in parallel with 10M (or 50) Ohm termination, \nsets the input impedance.\nFor the 1.1M case, and high impedance, it is e.g. \n1/(1/1.1M+1/10M)=0.99M (so close to 1M).\nThe caps are for freq compensation.</text>\n<text x=\"38.1\" y=\"251.46\" size=\"1.778\" layer=\"91\">Switch for AC/DC coupling</text>\n<text x=\"30.48\" y=\"203.2\" size=\"1.778\" layer=\"91\">Switch for 1M / 50 Ohm \ninput impedance</text>\n<text x=\"93.98\" y=\"127\" size=\"1.778\" layer=\"91\">Analog switch that sends either\nCh 0 or Ch2 to the first input of ADC2, for oversampling</text>\n<text x=\"284.48\" y=\"127\" size=\"1.778\" layer=\"91\">Analog switch that sends either\nCh 1 or Ch3 to the second input of ADC2, for oversampling</text>\n<text x=\"104.14\" y=\"40.64\" size=\"1.778\" layer=\"91\">Dual channel high-bandwidth op-amps</text>\n<text x=\"73.66\" y=\"106.68\" size=\"1.778\" layer=\"91\">x1 or x10 gain switch</text>\n<text x=\"55.88\" y=\"38.1\" size=\"1.778\" layer=\"91\">These caps reduce \nnoise on the offsets</text>\n<text x=\"7.62\" y=\"40.64\" size=\"1.778\" layer=\"91\">Gain for negative feedback op-amp is R2/R1,\ni.e. (1M+1M)/1.1M = ~2 or ~0.2 for \nlow or high gain.\nCompensation must match the inverse, \ne.g. 5pF/10pF=~1/2 or \n50pF/10pF=~5 for low or high gain.\nVariable caps are added so it can be\nadjusted in situ.</text>\n<wire x1=\"119.888\" y1=\"204.216\" x2=\"83.82\" y2=\"231.14\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"83.82\" y1=\"228.6\" x2=\"83.82\" y2=\"231.14\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"83.82\" y1=\"231.14\" x2=\"86.36\" y2=\"231.14\" width=\"0.254\" layer=\"94\"/>\n</plain>\n<instances>\n<instance part=\"GND27\" gate=\"1\" x=\"27.94\" y=\"218.44\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"215.9\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"J1\" gate=\"G$1\" x=\"17.78\" y=\"228.6\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"25.4\" y=\"228.6\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"13.97\" y=\"231.648\" size=\"1.778\" layer=\"95\" ratio=\"12\"/>\n</instance>\n<instance part=\"J2\" gate=\"G$1\" x=\"17.78\" y=\"167.64\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"25.4\" y=\"167.64\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"13.97\" y=\"170.688\" size=\"1.778\" layer=\"95\" ratio=\"12\"/>\n</instance>\n<instance part=\"J3\" gate=\"G$1\" x=\"208.28\" y=\"228.6\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"215.9\" y=\"228.6\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"204.47\" y=\"231.648\" size=\"1.778\" layer=\"95\" ratio=\"12\"/>\n</instance>\n<instance part=\"J4\" gate=\"G$1\" x=\"208.28\" y=\"167.64\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"215.9\" y=\"167.64\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"204.47\" y=\"170.688\" size=\"1.778\" layer=\"95\" ratio=\"12\"/>\n</instance>\n<instance part=\"GAINSW1\" gate=\"G$1\" x=\"83.82\" y=\"96.52\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"83.82\" y=\"96.52\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"78.74\" y=\"102.235\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"76.2\" y=\"86.36\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND9\" gate=\"1\" x=\"96.52\" y=\"198.12\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"195.58\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"RIN1\" gate=\"G$1\" x=\"109.22\" y=\"233.68\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"109.22\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"109.22\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"109.22\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"110.49\" y=\"235.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"110.49\" y=\"230.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN2\" gate=\"G$1\" x=\"109.22\" y=\"172.72\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"109.22\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"109.22\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"109.22\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"110.49\" y=\"174.2186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"110.49\" y=\"169.418\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN3\" gate=\"G$1\" x=\"299.72\" y=\"233.68\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"299.72\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"299.72\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"299.72\" y=\"233.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"300.99\" y=\"235.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"300.99\" y=\"230.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN4\" gate=\"G$1\" x=\"299.72\" y=\"172.72\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"299.72\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"299.72\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"299.72\" y=\"172.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"300.99\" y=\"174.2186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"300.99\" y=\"169.418\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C5VOPAMP2\" gate=\"G$1\" x=\"231.14\" y=\"111.76\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"231.14\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"232.664\" y=\"112.141\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"232.664\" y=\"107.061\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C5VOPAMP1\" gate=\"G$1\" x=\"40.64\" y=\"111.76\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"40.64\" y=\"111.76\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"42.164\" y=\"112.141\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"42.164\" y=\"107.061\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND40\" gate=\"1\" x=\"96.52\" y=\"48.26\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"93.98\" y=\"45.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN1_1\" gate=\"G$1\" x=\"43.18\" y=\"71.12\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"43.18\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"43.18\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"43.18\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"44.45\" y=\"72.6186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"44.45\" y=\"67.818\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN2_1\" gate=\"G$1\" x=\"10.16\" y=\"71.12\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"10.16\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"10.16\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"10.16\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.43\" y=\"72.6186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.43\" y=\"67.818\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GAINSW2\" gate=\"G$1\" x=\"175.26\" y=\"101.6\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"175.26\" y=\"104.14\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"182.88\" y=\"107.315\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"185.42\" y=\"91.44\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GAINSW3\" gate=\"G$1\" x=\"274.32\" y=\"96.52\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"274.32\" y=\"96.52\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"269.24\" y=\"102.235\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"266.7\" y=\"86.36\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GAINSW4\" gate=\"G$1\" x=\"365.76\" y=\"101.6\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"365.76\" y=\"101.6\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"373.38\" y=\"107.315\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"375.92\" y=\"91.44\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GAINSW1\" gate=\"P\" x=\"10.16\" y=\"111.76\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"9.525\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GND46\" gate=\"1\" x=\"10.16\" y=\"99.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"7.62\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GAINSW2\" gate=\"P\" x=\"25.4\" y=\"111.76\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"24.765\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GAINSW3\" gate=\"P\" x=\"200.66\" y=\"111.76\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"200.025\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GAINSW4\" gate=\"P\" x=\"215.9\" y=\"111.76\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"215.265\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GND47\" gate=\"1\" x=\"25.4\" y=\"99.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"22.86\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C_AC1\" gate=\"G$1\" x=\"63.5\" y=\"236.22\" smashed=\"yes\">\n<attribute name=\"MFN\" x=\"63.5\" y=\"236.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"64.516\" y=\"236.855\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"64.516\" y=\"232.029\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND34\" gate=\"1\" x=\"33.02\" y=\"233.68\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"231.14\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"OVSAMP1\" gate=\"G$1\" x=\"109.22\" y=\"114.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"104.14\" y=\"104.14\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"104.14\" y=\"122.555\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"104.14\" y=\"106.68\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"OVSAMP2\" gate=\"G$1\" x=\"299.72\" y=\"114.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"294.64\" y=\"104.14\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"294.64\" y=\"122.555\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"294.64\" y=\"106.68\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"OVSAMP2\" gate=\"P\" x=\"248.92\" y=\"111.76\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"248.285\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"OVSAMP1\" gate=\"P\" x=\"58.42\" y=\"111.76\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"57.785\" y=\"111.125\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GND60\" gate=\"1\" x=\"248.92\" y=\"99.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"246.38\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND61\" gate=\"1\" x=\"58.42\" y=\"99.06\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"96.52\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"COFFSETB6\" gate=\"G$1\" x=\"60.96\" y=\"48.26\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"60.96\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"62.484\" y=\"52.959\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"62.484\" y=\"47.879\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND58\" gate=\"1\" x=\"78.74\" y=\"38.1\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"76.2\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"COFFSETB8\" gate=\"G$1\" x=\"157.48\" y=\"45.72\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"157.48\" y=\"45.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"159.004\" y=\"50.419\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"159.004\" y=\"45.339\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND59\" gate=\"1\" x=\"175.26\" y=\"35.56\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"172.72\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"COFFSETB10\" gate=\"G$1\" x=\"248.92\" y=\"48.26\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"248.92\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"250.444\" y=\"52.959\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"250.444\" y=\"47.879\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"COFFSETB12\" gate=\"G$1\" x=\"347.98\" y=\"45.72\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"347.98\" y=\"45.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"349.504\" y=\"50.419\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"349.504\" y=\"45.339\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"R50-4\" gate=\"G$1\" x=\"96.52\" y=\"210.82\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"97.79\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"97.79\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-3\" gate=\"G$1\" x=\"83.82\" y=\"210.82\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"85.09\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"85.09\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-2\" gate=\"G$1\" x=\"71.12\" y=\"210.82\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"72.39\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"72.39\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-1\" gate=\"G$1\" x=\"58.42\" y=\"210.82\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"59.69\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"59.69\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-5\" gate=\"G$1\" x=\"58.42\" y=\"149.86\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"59.69\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"59.69\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-6\" gate=\"G$1\" x=\"71.12\" y=\"149.86\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"72.39\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"72.39\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-7\" gate=\"G$1\" x=\"83.82\" y=\"149.86\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"85.09\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"85.09\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-8\" gate=\"G$1\" x=\"96.52\" y=\"149.86\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"97.79\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"97.79\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-9\" gate=\"G$1\" x=\"248.92\" y=\"210.82\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"250.19\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"250.19\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-10\" gate=\"G$1\" x=\"261.62\" y=\"210.82\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"262.89\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"262.89\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-11\" gate=\"G$1\" x=\"274.32\" y=\"210.82\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"275.59\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"275.59\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-12\" gate=\"G$1\" x=\"287.02\" y=\"210.82\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"288.29\" y=\"212.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"288.29\" y=\"207.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-13\" gate=\"G$1\" x=\"248.92\" y=\"149.86\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"250.19\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"250.19\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-14\" gate=\"G$1\" x=\"261.62\" y=\"149.86\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"262.89\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"262.89\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-15\" gate=\"G$1\" x=\"274.32\" y=\"149.86\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"275.59\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"275.59\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R50-16\" gate=\"G$1\" x=\"287.02\" y=\"149.86\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"NAME\" x=\"288.29\" y=\"151.3586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"288.29\" y=\"146.558\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"DAC1\" gate=\"G$1\" x=\"88.9\" y=\"17.78\" smashed=\"yes\">\n<attribute name=\"MFN\" x=\"88.9\" y=\"17.78\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND39\" gate=\"1\" x=\"109.22\" y=\"7.62\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"106.68\" y=\"5.08\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND43\" gate=\"1\" x=\"66.04\" y=\"7.62\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"63.5\" y=\"5.08\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND44\" gate=\"1\" x=\"38.1\" y=\"10.16\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"7.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"COFFSET\" gate=\"G$1\" x=\"38.1\" y=\"17.78\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"38.1\" y=\"17.78\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"39.624\" y=\"17.399\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"39.624\" y=\"22.479\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CGAIN1_1\" gate=\"G$1\" x=\"58.42\" y=\"76.2\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"58.42\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"60.96\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"60.96\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RGAIN3_1\" gate=\"G$1\" x=\"43.18\" y=\"83.82\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"43.18\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"43.18\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"43.18\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"44.45\" y=\"85.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"44.45\" y=\"80.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN4_1\" gate=\"G$1\" x=\"10.16\" y=\"83.82\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"10.16\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"10.16\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"10.16\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.43\" y=\"85.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.43\" y=\"80.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN1_2\" gate=\"G$1\" x=\"132.08\" y=\"76.2\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"132.08\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"132.08\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"132.08\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"133.35\" y=\"77.6986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"133.35\" y=\"72.898\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN2_2\" gate=\"G$1\" x=\"104.14\" y=\"76.2\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"104.14\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"104.14\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"104.14\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"105.41\" y=\"77.6986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"105.41\" y=\"72.898\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CGAIN1_2\" gate=\"G$1\" x=\"147.32\" y=\"81.28\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"149.86\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"149.86\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RGAIN3_2\" gate=\"G$1\" x=\"132.08\" y=\"88.9\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"132.08\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"132.08\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"132.08\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"133.35\" y=\"90.3986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"133.35\" y=\"85.598\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN4_2\" gate=\"G$1\" x=\"104.14\" y=\"88.9\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"104.14\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"104.14\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"104.14\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"105.41\" y=\"90.3986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"105.41\" y=\"85.598\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN1_3\" gate=\"G$1\" x=\"233.68\" y=\"71.12\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"233.68\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"233.68\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"233.68\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"234.95\" y=\"72.6186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"234.95\" y=\"67.818\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN2_3\" gate=\"G$1\" x=\"200.66\" y=\"71.12\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"200.66\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"200.66\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"200.66\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"201.93\" y=\"72.6186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"201.93\" y=\"67.818\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CGAIN1_3\" gate=\"G$1\" x=\"248.92\" y=\"76.2\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"248.92\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"251.46\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"251.46\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RGAIN3_3\" gate=\"G$1\" x=\"233.68\" y=\"83.82\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"233.68\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"233.68\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"233.68\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"234.95\" y=\"85.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"234.95\" y=\"80.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN4_3\" gate=\"G$1\" x=\"200.66\" y=\"83.82\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"200.66\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"200.66\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"200.66\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"201.93\" y=\"85.3186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"201.93\" y=\"80.518\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN1_4\" gate=\"G$1\" x=\"322.58\" y=\"76.2\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"322.58\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"322.58\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"322.58\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"77.6986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"72.898\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN2_4\" gate=\"G$1\" x=\"294.64\" y=\"76.2\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"294.64\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"294.64\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"294.64\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"295.91\" y=\"77.6986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"295.91\" y=\"72.898\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CGAIN1_4\" gate=\"G$1\" x=\"337.82\" y=\"81.28\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"337.82\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"340.36\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"340.36\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RGAIN3_4\" gate=\"G$1\" x=\"322.58\" y=\"88.9\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"322.58\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"322.58\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"322.58\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"90.3986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"85.598\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RGAIN4_4\" gate=\"G$1\" x=\"294.64\" y=\"88.9\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"294.64\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"294.64\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"294.64\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"295.91\" y=\"90.3986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"295.91\" y=\"85.598\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"K1\" gate=\"G$1\" x=\"45.72\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"38.1\" y=\"247.65\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"233.68\" size=\"1.778\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"C_AC2\" gate=\"G$1\" x=\"63.5\" y=\"175.26\" smashed=\"yes\">\n<attribute name=\"MFN\" x=\"63.5\" y=\"175.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"64.516\" y=\"175.895\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"64.516\" y=\"171.069\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"K2\" gate=\"G$1\" x=\"45.72\" y=\"180.34\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"38.1\" y=\"186.69\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"172.72\" size=\"1.778\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"C_AC3\" gate=\"G$1\" x=\"254\" y=\"236.22\" smashed=\"yes\">\n<attribute name=\"MFN\" x=\"254\" y=\"236.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"255.016\" y=\"236.855\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"255.016\" y=\"232.029\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"K3\" gate=\"G$1\" x=\"236.22\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"228.6\" y=\"247.65\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n<attribute name=\"VALUE\" x=\"228.6\" y=\"233.68\" size=\"1.778\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"C_AC4\" gate=\"G$1\" x=\"254\" y=\"175.26\" smashed=\"yes\">\n<attribute name=\"MFN\" x=\"254\" y=\"175.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"255.016\" y=\"175.895\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"255.016\" y=\"171.069\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"K4\" gate=\"G$1\" x=\"236.22\" y=\"180.34\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"228.6\" y=\"186.69\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n<attribute name=\"VALUE\" x=\"228.6\" y=\"172.72\" size=\"1.778\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"ACR1\" gate=\"G$1\" x=\"27.94\" y=\"243.84\" smashed=\"yes\">\n<attribute name=\"OC_NEWARK\" x=\"27.94\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"27.94\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"27.94\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"24.13\" y=\"245.3386\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.13\" y=\"240.538\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ACR2\" gate=\"G$1\" x=\"27.94\" y=\"182.88\" smashed=\"yes\">\n<attribute name=\"OC_NEWARK\" x=\"27.94\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"27.94\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"27.94\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"24.13\" y=\"184.3786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.13\" y=\"179.578\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ACR3\" gate=\"G$1\" x=\"218.44\" y=\"243.84\" smashed=\"yes\">\n<attribute name=\"OC_NEWARK\" x=\"218.44\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"218.44\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"218.44\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"214.63\" y=\"245.3386\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"214.63\" y=\"240.538\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ACR4\" gate=\"G$1\" x=\"218.44\" y=\"182.88\" smashed=\"yes\">\n<attribute name=\"OC_NEWARK\" x=\"218.44\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"218.44\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"218.44\" y=\"182.88\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"214.63\" y=\"184.3786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"214.63\" y=\"179.578\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN1_11K\" gate=\"G$1\" x=\"132.08\" y=\"233.68\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"132.08\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"132.08\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"132.08\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"133.35\" y=\"235.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"133.35\" y=\"230.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN2_11K\" gate=\"G$1\" x=\"132.08\" y=\"172.72\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"132.08\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"132.08\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"132.08\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"133.35\" y=\"174.2186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"133.35\" y=\"169.418\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN3_11K\" gate=\"G$1\" x=\"322.58\" y=\"233.68\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"322.58\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"322.58\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"322.58\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"235.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"230.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN4_11K\" gate=\"G$1\" x=\"322.58\" y=\"172.72\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"322.58\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"322.58\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"322.58\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"174.2186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"169.418\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN1NF_1\" gate=\"G$1\" x=\"147.32\" y=\"233.68\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"148.336\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"148.336\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN1NF_2\" gate=\"G$1\" x=\"147.32\" y=\"172.72\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"148.336\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"148.336\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN1NF_3\" gate=\"G$1\" x=\"337.82\" y=\"233.68\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"337.82\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"338.836\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"338.836\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN1NF_4\" gate=\"G$1\" x=\"337.82\" y=\"172.72\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"337.82\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"338.836\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"338.836\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ROFFSET1\" gate=\"G$1\" x=\"129.54\" y=\"12.7\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"111.76\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"134.62\" y=\"12.7\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ROFFSET2\" gate=\"G$1\" x=\"129.54\" y=\"15.24\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"111.76\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"134.62\" y=\"15.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ROFFSET3\" gate=\"G$1\" x=\"129.54\" y=\"17.78\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"111.76\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"134.62\" y=\"17.78\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"ROFFSET4\" gate=\"G$1\" x=\"129.54\" y=\"20.32\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"111.76\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"134.62\" y=\"20.32\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$2\" gate=\"G$1\" x=\"10.16\" y=\"121.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"10.16\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$3\" gate=\"G$1\" x=\"25.4\" y=\"121.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$7\" gate=\"G$1\" x=\"157.48\" y=\"63.5\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"157.48\" y=\"66.294\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$8\" gate=\"G$1\" x=\"66.04\" y=\"25.4\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"66.04\" y=\"28.194\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$13\" gate=\"G$1\" x=\"58.42\" y=\"121.92\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"58.42\" y=\"124.714\" size=\"1.778\" layer=\"96\" rot=\"MR0\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$15\" gate=\"G$1\" x=\"248.92\" y=\"121.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"248.92\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"COFFSETA6\" gate=\"G$1\" x=\"78.74\" y=\"48.26\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"78.74\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"79.756\" y=\"52.705\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"79.756\" y=\"47.371\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"COFFSETA1\" gate=\"G$1\" x=\"175.26\" y=\"45.72\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"175.26\" y=\"45.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"176.276\" y=\"50.165\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"176.276\" y=\"44.831\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"COFFSETA2\" gate=\"G$1\" x=\"269.24\" y=\"48.26\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"269.24\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"270.256\" y=\"52.705\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"270.256\" y=\"47.371\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"COFFSETA3\" gate=\"G$1\" x=\"365.76\" y=\"45.72\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"365.76\" y=\"45.72\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"366.776\" y=\"50.165\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"366.776\" y=\"44.831\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RIN5\" gate=\"G$1\" x=\"76.2\" y=\"236.22\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"76.2\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"76.2\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"76.2\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"77.47\" y=\"237.7186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"77.47\" y=\"232.918\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN6\" gate=\"G$1\" x=\"76.2\" y=\"175.26\" smashed=\"yes\" rot=\"MR270\">\n<attribute name=\"OC_NEWARK\" x=\"76.2\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"76.2\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"76.2\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"77.47\" y=\"176.7586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"77.47\" y=\"171.958\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN7\" gate=\"G$1\" x=\"266.7\" y=\"236.22\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"266.7\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"266.7\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"266.7\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"267.97\" y=\"237.7186\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"267.97\" y=\"232.918\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RIN8\" gate=\"G$1\" x=\"266.7\" y=\"175.26\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"266.7\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"266.7\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"266.7\" y=\"175.26\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"267.97\" y=\"176.7586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"267.97\" y=\"171.958\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND77\" gate=\"1\" x=\"76.2\" y=\"226.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"73.66\" y=\"223.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CH1\" gate=\"G$1\" x=\"25.4\" y=\"78.74\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"25.4\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"27.94\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"27.94\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CL1\" gate=\"G$1\" x=\"73.66\" y=\"78.74\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"73.66\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"76.2\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"76.2\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CL2\" gate=\"G$1\" x=\"165.1\" y=\"83.82\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"165.1\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"167.64\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"167.64\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CL3\" gate=\"G$1\" x=\"264.16\" y=\"78.74\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"264.16\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"266.7\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"266.7\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CL4\" gate=\"G$1\" x=\"355.6\" y=\"83.82\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"355.6\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"358.14\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"358.14\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CH2\" gate=\"G$1\" x=\"119.38\" y=\"83.82\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"119.38\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"121.92\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"121.92\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CH3\" gate=\"G$1\" x=\"215.9\" y=\"78.74\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"215.9\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"218.44\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"218.44\" y=\"76.2\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CH4\" gate=\"G$1\" x=\"309.88\" y=\"83.82\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"309.88\" y=\"83.82\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"312.42\" y=\"86.36\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"312.42\" y=\"81.28\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CIN5_1\" gate=\"G$1\" x=\"119.38\" y=\"233.68\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"119.38\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"120.396\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"120.396\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN5_2\" gate=\"G$1\" x=\"119.38\" y=\"172.72\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"119.38\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"120.396\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"120.396\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN5_3\" gate=\"G$1\" x=\"309.88\" y=\"233.68\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"309.88\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"310.896\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"310.896\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN5_4\" gate=\"G$1\" x=\"309.88\" y=\"172.72\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"309.88\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"310.896\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"310.896\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN56_1\" gate=\"G$1\" x=\"162.56\" y=\"233.68\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"162.56\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"163.576\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"163.576\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN56_2\" gate=\"G$1\" x=\"162.56\" y=\"172.72\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"162.56\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"163.576\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"163.576\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN56_3\" gate=\"G$1\" x=\"353.06\" y=\"233.68\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"353.06\" y=\"233.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"354.076\" y=\"234.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"354.076\" y=\"229.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CIN56_4\" gate=\"G$1\" x=\"353.06\" y=\"172.72\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"353.06\" y=\"172.72\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"354.076\" y=\"173.355\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"354.076\" y=\"168.529\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND72\" gate=\"1\" x=\"27.94\" y=\"157.48\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"30.48\" y=\"154.94\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND73\" gate=\"1\" x=\"96.52\" y=\"137.16\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"93.98\" y=\"137.16\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND74\" gate=\"1\" x=\"33.02\" y=\"172.72\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"170.18\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND81\" gate=\"1\" x=\"76.2\" y=\"165.1\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"73.66\" y=\"162.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND17\" gate=\"1\" x=\"218.44\" y=\"218.44\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"215.9\" y=\"215.9\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND29\" gate=\"1\" x=\"287.02\" y=\"198.12\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"289.56\" y=\"195.58\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND35\" gate=\"1\" x=\"223.52\" y=\"233.68\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"231.14\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND78\" gate=\"1\" x=\"266.7\" y=\"226.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"264.16\" y=\"223.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND18\" gate=\"1\" x=\"218.44\" y=\"157.48\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"215.9\" y=\"154.94\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND31\" gate=\"1\" x=\"287.02\" y=\"137.16\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"284.48\" y=\"137.16\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND56\" gate=\"1\" x=\"223.52\" y=\"172.72\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"170.18\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND82\" gate=\"1\" x=\"266.7\" y=\"165.1\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"264.16\" y=\"162.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$14\" gate=\"G$1\" x=\"40.64\" y=\"121.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"40.64\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"GND19\" gate=\"1\" x=\"40.64\" y=\"99.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"38.1\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND20\" gate=\"1\" x=\"287.02\" y=\"48.26\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"284.48\" y=\"45.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND28\" gate=\"1\" x=\"269.24\" y=\"38.1\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"266.7\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND57\" gate=\"1\" x=\"365.76\" y=\"35.56\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"363.22\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$16\" gate=\"G$1\" x=\"347.98\" y=\"63.5\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"347.98\" y=\"66.294\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$4\" gate=\"G$1\" x=\"231.14\" y=\"121.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"231.14\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"GND30\" gate=\"1\" x=\"231.14\" y=\"99.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"228.6\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND41\" gate=\"1\" x=\"215.9\" y=\"99.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"213.36\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND48\" gate=\"1\" x=\"200.66\" y=\"99.06\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"198.12\" y=\"96.52\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$5\" gate=\"G$1\" x=\"215.9\" y=\"121.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"215.9\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$6\" gate=\"G$1\" x=\"200.66\" y=\"121.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"200.66\" y=\"124.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$17\" gate=\"G$1\" x=\"38.1\" y=\"25.4\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"38.1\" y=\"28.194\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"FRAME2\" gate=\"G$1\" x=\"0\" y=\"0\" smashed=\"yes\">\n<attribute name=\"DRAWING_NAME\" x=\"344.17\" y=\"15.24\" size=\"2.54\" layer=\"94\"/>\n<attribute name=\"LAST_DATE_TIME\" x=\"344.17\" y=\"10.16\" size=\"2.286\" layer=\"94\"/>\n<attribute name=\"SHEET\" x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\"/>\n</instance>\n<instance part=\"S1\" gate=\"G$1\" x=\"50.8\" y=\"220.98\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"48.26\" y=\"225.1075\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"214.9475\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S2\" gate=\"G$1\" x=\"50.8\" y=\"160.02\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"48.26\" y=\"164.1475\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"153.9875\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S3\" gate=\"G$1\" x=\"241.3\" y=\"220.98\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"238.76\" y=\"225.1075\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"228.6\" y=\"214.9475\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S4\" gate=\"G$1\" x=\"241.3\" y=\"160.02\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"238.76\" y=\"164.1475\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"228.6\" y=\"153.9875\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S5\" gate=\"G$1\" x=\"99.06\" y=\"243.84\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"96.52\" y=\"247.9675\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"88.9\" y=\"237.8075\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S6\" gate=\"G$1\" x=\"99.06\" y=\"182.88\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"96.52\" y=\"187.0075\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"88.9\" y=\"176.8475\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S7\" gate=\"G$1\" x=\"289.56\" y=\"243.84\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"287.02\" y=\"247.9675\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"279.4\" y=\"237.8075\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"S8\" gate=\"G$1\" x=\"289.56\" y=\"182.88\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"NAME\" x=\"287.02\" y=\"187.0075\" size=\"1.778\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"279.4\" y=\"176.8475\" size=\"1.778\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"GND55\" gate=\"1\" x=\"38.1\" y=\"213.36\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"210.82\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND62\" gate=\"1\" x=\"88.9\" y=\"236.22\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"86.36\" y=\"233.68\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND63\" gate=\"1\" x=\"38.1\" y=\"149.86\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"147.32\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND79\" gate=\"1\" x=\"228.6\" y=\"213.36\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"210.82\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND80\" gate=\"1\" x=\"279.4\" y=\"236.22\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"276.86\" y=\"233.68\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND83\" gate=\"1\" x=\"228.6\" y=\"152.4\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"149.86\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND84\" gate=\"1\" x=\"279.4\" y=\"175.26\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"276.86\" y=\"172.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND86\" gate=\"1\" x=\"88.9\" y=\"175.26\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"86.36\" y=\"172.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"IC3\" gate=\"G$1\" x=\"111.76\" y=\"60.96\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"118.11\" y=\"48.26\" size=\"1.778\" layer=\"95\" align=\"center-left\"/>\n<attribute name=\"VALUE\" x=\"118.11\" y=\"66.04\" size=\"1.778\" layer=\"96\" align=\"center-left\"/>\n</instance>\n<instance part=\"IC4\" gate=\"G$1\" x=\"302.26\" y=\"60.96\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"308.61\" y=\"48.26\" size=\"1.778\" layer=\"95\" align=\"center-left\"/>\n<attribute name=\"VALUE\" x=\"308.61\" y=\"66.04\" size=\"1.778\" layer=\"96\" align=\"center-left\"/>\n</instance>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"GND\" class=\"1\">\n<segment>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND27\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"27.94\" y1=\"220.98\" x2=\"27.94\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"223.52\" x2=\"25.4\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND40\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"96.52\" y1=\"50.8\" x2=\"96.52\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"53.34\" x2=\"111.76\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC3\" gate=\"G$1\" pin=\"VEE\"/>\n</segment>\n<segment>\n<pinref part=\"GND46\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"GAINSW1\" gate=\"P\" pin=\"GND\"/>\n<wire x1=\"10.16\" y1=\"104.14\" x2=\"10.16\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW2\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND47\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"25.4\" y1=\"101.6\" x2=\"25.4\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND60\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"248.92\" y1=\"101.6\" x2=\"248.92\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND61\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"58.42\" y1=\"101.6\" x2=\"58.42\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND58\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"COFFSETA6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"78.74\" y1=\"40.64\" x2=\"78.74\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETB6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"78.74\" y1=\"43.18\" x2=\"78.74\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"60.96\" y1=\"45.72\" x2=\"60.96\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"60.96\" y1=\"43.18\" x2=\"78.74\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"78.74\" y=\"43.18\"/>\n</segment>\n<segment>\n<pinref part=\"GND59\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"COFFSETA1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"175.26\" y1=\"38.1\" x2=\"175.26\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETB8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"157.48\" y1=\"43.18\" x2=\"175.26\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"175.26\" y=\"43.18\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"GND39\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"109.22\" y1=\"10.16\" x2=\"109.22\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"109.22\" y1=\"22.86\" x2=\"106.68\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"!LDAC\"/>\n<pinref part=\"GND43\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"66.04\" y1=\"10.16\" x2=\"66.04\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"66.04\" y1=\"15.24\" x2=\"68.58\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"COFFSET\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND44\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"38.1\" y1=\"15.24\" x2=\"38.1\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"K\"/>\n<pinref part=\"GND34\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"33.02\" y1=\"236.22\" x2=\"33.02\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"33.02\" y1=\"238.76\" x2=\"35.56\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"RIN5\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND77\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"76.2\" y1=\"231.14\" x2=\"76.2\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND72\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"27.94\" y1=\"160.02\" x2=\"27.94\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"162.56\" x2=\"25.4\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND74\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"33.02\" y1=\"175.26\" x2=\"33.02\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"33.02\" y1=\"177.8\" x2=\"35.56\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"K\"/>\n</segment>\n<segment>\n<pinref part=\"GND81\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"76.2\" y1=\"170.18\" x2=\"76.2\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN6\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n<segment>\n<pinref part=\"GND17\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"218.44\" y1=\"220.98\" x2=\"218.44\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"218.44\" y1=\"223.52\" x2=\"215.9\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND35\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"223.52\" y1=\"236.22\" x2=\"223.52\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"238.76\" x2=\"226.06\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"K\"/>\n</segment>\n<segment>\n<pinref part=\"GND78\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"266.7\" y1=\"231.14\" x2=\"266.7\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN7\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n<segment>\n<pinref part=\"GND18\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"218.44\" y1=\"160.02\" x2=\"218.44\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"218.44\" y1=\"162.56\" x2=\"215.9\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND56\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"223.52\" y1=\"175.26\" x2=\"223.52\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"177.8\" x2=\"226.06\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"K\"/>\n</segment>\n<segment>\n<pinref part=\"GND82\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"266.7\" y1=\"170.18\" x2=\"266.7\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN8\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n<segment>\n<pinref part=\"R50-4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"96.52\" y1=\"203.2\" x2=\"83.82\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"203.2\" x2=\"71.12\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"71.12\" y1=\"203.2\" x2=\"58.42\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"205.74\" x2=\"96.52\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"96.52\" y=\"203.2\"/>\n<pinref part=\"R50-3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"83.82\" y1=\"205.74\" x2=\"83.82\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"203.2\"/>\n<pinref part=\"R50-2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"71.12\" y1=\"205.74\" x2=\"71.12\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"71.12\" y=\"203.2\"/>\n<pinref part=\"R50-1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"58.42\" y1=\"205.74\" x2=\"58.42\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND9\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"96.52\" y1=\"203.2\" x2=\"96.52\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<wire x1=\"58.42\" y1=\"142.24\" x2=\"71.12\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND73\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"71.12\" y1=\"142.24\" x2=\"83.82\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"142.24\" x2=\"96.52\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"139.7\" x2=\"96.52\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"58.42\" y1=\"144.78\" x2=\"58.42\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"71.12\" y1=\"144.78\" x2=\"71.12\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"71.12\" y=\"142.24\"/>\n<pinref part=\"R50-7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"83.82\" y1=\"144.78\" x2=\"83.82\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"142.24\"/>\n<pinref part=\"R50-8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"96.52\" y1=\"144.78\" x2=\"96.52\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"96.52\" y=\"142.24\"/>\n</segment>\n<segment>\n<pinref part=\"R50-9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"205.74\" x2=\"248.92\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-10\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"203.2\" x2=\"261.62\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"261.62\" y1=\"203.2\" x2=\"261.62\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-11\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"261.62\" y1=\"203.2\" x2=\"274.32\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"203.2\" x2=\"274.32\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"261.62\" y=\"203.2\"/>\n<pinref part=\"R50-12\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"274.32\" y1=\"203.2\" x2=\"287.02\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"203.2\" x2=\"287.02\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"203.2\"/>\n<junction x=\"287.02\" y=\"203.2\"/>\n<pinref part=\"GND29\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"287.02\" y1=\"200.66\" x2=\"287.02\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"R50-13\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"144.78\" x2=\"248.92\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-14\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"142.24\" x2=\"261.62\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"261.62\" y1=\"142.24\" x2=\"261.62\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-15\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"261.62\" y1=\"142.24\" x2=\"274.32\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"142.24\" x2=\"274.32\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"261.62\" y=\"142.24\"/>\n<pinref part=\"R50-16\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"287.02\" y1=\"144.78\" x2=\"287.02\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"142.24\" x2=\"274.32\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"142.24\"/>\n<junction x=\"287.02\" y=\"142.24\"/>\n<pinref part=\"GND31\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"287.02\" y1=\"139.7\" x2=\"287.02\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND19\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"40.64\" y1=\"101.6\" x2=\"40.64\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND20\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"287.02\" y1=\"50.8\" x2=\"287.02\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"53.34\" x2=\"302.26\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC4\" gate=\"G$1\" pin=\"VEE\"/>\n</segment>\n<segment>\n<pinref part=\"GND28\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"269.24\" y1=\"40.64\" x2=\"269.24\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"43.18\" x2=\"269.24\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"45.72\" x2=\"248.92\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"43.18\" x2=\"269.24\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"269.24\" y=\"43.18\"/>\n<pinref part=\"COFFSETA2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"COFFSETB10\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<pinref part=\"GND57\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"365.76\" y1=\"38.1\" x2=\"365.76\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"347.98\" y1=\"43.18\" x2=\"365.76\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"365.76\" y=\"43.18\"/>\n<pinref part=\"COFFSETA3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"COFFSETB12\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND30\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"231.14\" y1=\"101.6\" x2=\"231.14\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW4\" gate=\"P\" pin=\"GND\"/>\n<pinref part=\"GND41\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"215.9\" y1=\"101.6\" x2=\"215.9\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND48\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"GAINSW3\" gate=\"P\" pin=\"GND\"/>\n<wire x1=\"200.66\" y1=\"104.14\" x2=\"200.66\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S1\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"GND55\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"45.72\" y1=\"218.44\" x2=\"38.1\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"38.1\" y1=\"218.44\" x2=\"38.1\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"GND62\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"93.98\" y1=\"241.3\" x2=\"88.9\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"88.9\" y1=\"241.3\" x2=\"88.9\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S2\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"45.72\" y1=\"157.48\" x2=\"38.1\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"38.1\" y1=\"157.48\" x2=\"38.1\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND63\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"S3\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"236.22\" y1=\"218.44\" x2=\"228.6\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND79\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"228.6\" y1=\"218.44\" x2=\"228.6\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"284.48\" y1=\"241.3\" x2=\"279.4\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"279.4\" y1=\"241.3\" x2=\"279.4\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND80\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"S4\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"236.22\" y1=\"157.48\" x2=\"228.6\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"228.6\" y1=\"157.48\" x2=\"228.6\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND83\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"93.98\" y1=\"180.34\" x2=\"88.9\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND86\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"88.9\" y1=\"180.34\" x2=\"88.9\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"284.48\" y1=\"180.34\" x2=\"279.4\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND84\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"279.4\" y1=\"180.34\" x2=\"279.4\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L21_SDA\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"SDA\"/>\n<wire x1=\"68.58\" y1=\"17.78\" x2=\"53.34\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INA2\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"101.6\" y1=\"116.84\" x2=\"93.98\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"93.98\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"284.48\" y1=\"93.98\" x2=\"287.02\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"93.98\" x2=\"287.02\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"60.96\" x2=\"302.26\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"269.24\" y=\"60.96\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"287.02\" y1=\"60.96\" x2=\"269.24\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"287.02\" y=\"60.96\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"X\"/>\n<pinref part=\"IC4\" gate=\"G$1\" pin=\"OUTA\"/>\n</segment>\n</net>\n<net name=\"INB1\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"284.48\" y1=\"119.38\" x2=\"292.1\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"284.48\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"139.7\" y1=\"58.42\" x2=\"162.56\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"167.64\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"162.56\" y1=\"58.42\" x2=\"180.34\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"58.42\" x2=\"162.56\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"58.42\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"185.42\" y1=\"99.06\" x2=\"187.96\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"187.96\" y1=\"99.06\" x2=\"187.96\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"187.96\" y1=\"88.9\" x2=\"162.56\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC3\" gate=\"G$1\" pin=\"OUTB\"/>\n</segment>\n</net>\n<net name=\"INB2\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"292.1\" y1=\"116.84\" x2=\"284.48\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"284.48\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"330.2\" y1=\"58.42\" x2=\"353.06\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"358.14\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"353.06\" y1=\"58.42\" x2=\"368.3\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"58.42\" x2=\"353.06\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"58.42\"/>\n<wire x1=\"375.92\" y1=\"99.06\" x2=\"381\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"381\" y1=\"99.06\" x2=\"381\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"381\" y1=\"88.9\" x2=\"353.06\" y2=\"88.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"X\"/>\n<pinref part=\"IC4\" gate=\"G$1\" pin=\"OUTB\"/>\n</segment>\n</net>\n<net name=\"INA1\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"93.98\" y1=\"93.98\" x2=\"96.52\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"93.98\" x2=\"96.52\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"60.96\" x2=\"111.76\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"78.74\" y=\"60.96\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"96.52\" y1=\"60.96\" x2=\"78.74\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"96.52\" y=\"60.96\"/>\n<pinref part=\"IC3\" gate=\"G$1\" pin=\"OUTA\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"101.6\" y1=\"119.38\" x2=\"93.98\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"93.98\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INBMINUS1\" class=\"0\">\n<segment>\n<wire x1=\"119.38\" y1=\"165.1\" x2=\"132.08\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"170.18\" y=\"165.1\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"132.08\" y1=\"165.1\" x2=\"147.32\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"165.1\" x2=\"162.56\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"165.1\" x2=\"182.88\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"167.64\" x2=\"119.38\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"109.22\" y1=\"167.64\" x2=\"109.22\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"109.22\" y1=\"165.1\" x2=\"119.38\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"165.1\"/>\n<pinref part=\"RIN2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CIN5_2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RIN2_11K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"132.08\" y1=\"167.64\" x2=\"132.08\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"165.1\"/>\n<pinref part=\"CIN1NF_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"167.64\" x2=\"147.32\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"165.1\"/>\n<pinref part=\"CIN56_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"162.56\" y1=\"167.64\" x2=\"162.56\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"165.1\"/>\n</segment>\n<segment>\n<wire x1=\"139.7\" y1=\"55.88\" x2=\"165.1\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"167.64\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"165.1\" y1=\"55.88\" x2=\"180.34\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"165.1\" y1=\"55.88\" x2=\"165.1\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"165.1\" y=\"55.88\"/>\n<wire x1=\"165.1\" y1=\"68.58\" x2=\"147.32\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"68.58\" x2=\"132.08\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CGAIN1_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"147.32\" y1=\"78.74\" x2=\"147.32\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"68.58\"/>\n<pinref part=\"CL2\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"165.1\" y1=\"78.74\" x2=\"165.1\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"165.1\" y=\"68.58\"/>\n<wire x1=\"132.08\" y1=\"68.58\" x2=\"119.38\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"68.58\" x2=\"104.14\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CH2\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"119.38\" y1=\"78.74\" x2=\"119.38\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"68.58\"/>\n<pinref part=\"RGAIN2_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"104.14\" y1=\"71.12\" x2=\"104.14\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN1_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"132.08\" y1=\"71.12\" x2=\"132.08\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"68.58\"/>\n<pinref part=\"IC3\" gate=\"G$1\" pin=\"INB-\"/>\n</segment>\n</net>\n<net name=\"INBMINUS2\" class=\"0\">\n<segment>\n<wire x1=\"309.88\" y1=\"165.1\" x2=\"322.58\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"358.14\" y=\"165.1\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"322.58\" y1=\"165.1\" x2=\"337.82\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"165.1\" x2=\"353.06\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"165.1\" x2=\"370.84\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"167.64\" x2=\"309.88\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"167.64\" x2=\"299.72\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"165.1\" x2=\"309.88\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"165.1\"/>\n<pinref part=\"RIN4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CIN5_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RIN4_11K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"322.58\" y1=\"167.64\" x2=\"322.58\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"165.1\"/>\n<pinref part=\"CIN1NF_4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"337.82\" y1=\"167.64\" x2=\"337.82\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"165.1\"/>\n<pinref part=\"CIN56_4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"353.06\" y1=\"167.64\" x2=\"353.06\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"165.1\"/>\n</segment>\n<segment>\n<wire x1=\"330.2\" y1=\"55.88\" x2=\"355.6\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"358.14\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"355.6\" y1=\"55.88\" x2=\"370.84\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"355.6\" y1=\"55.88\" x2=\"355.6\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"355.6\" y=\"55.88\"/>\n<wire x1=\"355.6\" y1=\"68.58\" x2=\"337.82\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"68.58\" x2=\"322.58\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"68.58\" x2=\"322.58\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"78.74\" x2=\"337.82\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"68.58\"/>\n<wire x1=\"355.6\" y1=\"78.74\" x2=\"355.6\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"355.6\" y=\"68.58\"/>\n<wire x1=\"322.58\" y1=\"68.58\" x2=\"309.88\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"68.58\" x2=\"294.64\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"294.64\" y1=\"68.58\" x2=\"294.64\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"68.58\"/>\n<wire x1=\"309.88\" y1=\"78.74\" x2=\"309.88\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"68.58\"/>\n<pinref part=\"CH4\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"RGAIN2_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN1_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CL4\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"CGAIN1_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"IC4\" gate=\"G$1\" pin=\"INB-\"/>\n</segment>\n</net>\n<net name=\"OFFSET1\" class=\"0\">\n<segment>\n<wire x1=\"134.62\" y1=\"12.7\" x2=\"157.48\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"12.7\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ROFFSET1\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<pinref part=\"COFFSETB6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"60.96\" y1=\"53.34\" x2=\"60.96\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"COFFSETA6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"78.74\" y1=\"55.88\" x2=\"78.74\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"78.74\" y1=\"55.88\" x2=\"60.96\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"111.76\" y1=\"55.88\" x2=\"78.74\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"78.74\" y=\"55.88\"/>\n<wire x1=\"60.96\" y1=\"55.88\" x2=\"48.26\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"60.96\" y=\"55.88\"/>\n<label x=\"48.26\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"IC3\" gate=\"G$1\" pin=\"INA+\"/>\n</segment>\n</net>\n<net name=\"INAMINUS1\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"73.66\" y1=\"63.5\" x2=\"58.42\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"63.5\" x2=\"43.18\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"43.18\" y1=\"63.5\" x2=\"43.18\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CL1\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"73.66\" y1=\"73.66\" x2=\"73.66\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"73.66\" y=\"63.5\"/>\n<pinref part=\"CGAIN1_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"73.66\" x2=\"58.42\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"63.5\"/>\n<wire x1=\"111.76\" y1=\"58.42\" x2=\"93.98\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"58.42\" x2=\"93.98\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"63.5\" x2=\"73.66\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"58.42\" x2=\"78.74\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"58.42\"/>\n<label x=\"78.74\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"43.18\" y1=\"63.5\" x2=\"25.4\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"43.18\" y=\"63.5\"/>\n<pinref part=\"RGAIN2_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"25.4\" y1=\"63.5\" x2=\"10.16\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"63.5\" x2=\"10.16\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CH1\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"25.4\" y1=\"73.66\" x2=\"25.4\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"25.4\" y=\"63.5\"/>\n<pinref part=\"IC3\" gate=\"G$1\" pin=\"INA-\"/>\n</segment>\n<segment>\n<label x=\"172.72\" y=\"226.06\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"CIN56_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"162.56\" y1=\"228.6\" x2=\"162.56\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"226.06\" x2=\"185.42\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN1NF_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"162.56\" y1=\"226.06\" x2=\"147.32\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"226.06\" x2=\"147.32\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"226.06\"/>\n<pinref part=\"RIN1_11K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"226.06\" x2=\"132.08\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"132.08\" y1=\"226.06\" x2=\"132.08\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"226.06\"/>\n<pinref part=\"CIN5_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"119.38\" y1=\"228.6\" x2=\"119.38\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"226.06\" x2=\"132.08\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"226.06\"/>\n<pinref part=\"RIN1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"109.22\" y1=\"228.6\" x2=\"109.22\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"109.22\" y1=\"226.06\" x2=\"119.38\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"226.06\"/>\n</segment>\n</net>\n<net name=\"OFFSET2\" class=\"0\">\n<segment>\n<label x=\"177.8\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"COFFSETB8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"139.7\" y1=\"53.34\" x2=\"157.48\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"53.34\" x2=\"157.48\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"53.34\" x2=\"175.26\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"157.48\" y=\"53.34\"/>\n<pinref part=\"COFFSETA1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"175.26\" y1=\"53.34\" x2=\"187.96\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"175.26\" y1=\"50.8\" x2=\"175.26\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"175.26\" y=\"53.34\"/>\n<pinref part=\"IC3\" gate=\"G$1\" pin=\"INB+\"/>\n</segment>\n<segment>\n<wire x1=\"134.62\" y1=\"15.24\" x2=\"157.48\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"15.24\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ROFFSET2\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"OFFSET3\" class=\"0\">\n<segment>\n<wire x1=\"134.62\" y1=\"17.78\" x2=\"157.48\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"17.78\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ROFFSET3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<wire x1=\"248.92\" y1=\"53.34\" x2=\"248.92\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"55.88\" x2=\"269.24\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"55.88\" x2=\"248.92\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"302.26\" y1=\"55.88\" x2=\"269.24\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"269.24\" y=\"55.88\"/>\n<wire x1=\"248.92\" y1=\"55.88\" x2=\"233.68\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"55.88\"/>\n<label x=\"233.68\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"COFFSETA2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"COFFSETB10\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"IC4\" gate=\"G$1\" pin=\"INA+\"/>\n</segment>\n</net>\n<net name=\"OFFSET4\" class=\"0\">\n<segment>\n<wire x1=\"157.48\" y1=\"20.32\" x2=\"134.62\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ROFFSET4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n<segment>\n<label x=\"368.3\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"330.2\" y1=\"53.34\" x2=\"347.98\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"347.98\" y1=\"53.34\" x2=\"347.98\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"347.98\" y1=\"53.34\" x2=\"365.76\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"347.98\" y=\"53.34\"/>\n<wire x1=\"365.76\" y1=\"53.34\" x2=\"381\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"365.76\" y1=\"50.8\" x2=\"365.76\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"365.76\" y=\"53.34\"/>\n<pinref part=\"COFFSETA3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"COFFSETB12\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"IC4\" gate=\"G$1\" pin=\"INB+\"/>\n</segment>\n</net>\n<net name=\"INJ1\" class=\"0\">\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"DS2\"/>\n<pinref part=\"C_AC1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"238.76\" x2=\"58.42\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"238.76\" x2=\"58.42\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"228.6\" x2=\"63.5\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"228.6\" x2=\"63.5\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"228.6\"/>\n<pinref part=\"J1\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<wire x1=\"58.42\" y1=\"228.6\" x2=\"25.4\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"220.98\" x2=\"58.42\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"228.6\" x2=\"58.42\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INA12\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"X\"/>\n<label x=\"119.38\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"119.38\" y1=\"116.84\" x2=\"127\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INB12\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"X\"/>\n<wire x1=\"309.88\" y1=\"116.84\" x2=\"317.5\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"309.88\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP2\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"292.1\" y1=\"111.76\" x2=\"276.86\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"276.86\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW1\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"76.2\" y1=\"99.06\" x2=\"66.04\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"66.04\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW2\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"167.64\" y1=\"104.14\" x2=\"157.48\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"157.48\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW3\" class=\"0\">\n<segment>\n<wire x1=\"266.7\" y1=\"99.06\" x2=\"256.54\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"256.54\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"!A!/B\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP1\" class=\"0\">\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"G$1\" pin=\"!A!/B\"/>\n<wire x1=\"101.6\" y1=\"111.76\" x2=\"86.36\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L141_SCL\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"53.34\" y1=\"20.32\" x2=\"68.58\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW2\" class=\"0\">\n<segment>\n<wire x1=\"22.86\" y1=\"182.88\" x2=\"10.16\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"10.16\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR2\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"E_ACSW3\" class=\"0\">\n<segment>\n<wire x1=\"213.36\" y1=\"243.84\" x2=\"200.66\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"200.66\" y=\"243.84\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"E_ACSW4\" class=\"0\">\n<segment>\n<wire x1=\"213.36\" y1=\"182.88\" x2=\"200.66\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"200.66\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"ACR4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$2\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN3_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"43.18\" y1=\"76.2\" x2=\"43.18\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$3\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN2_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN4_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"10.16\" y1=\"76.2\" x2=\"10.16\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"CGAIN1\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"58.42\" y1=\"91.44\" x2=\"73.66\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"73.66\" y1=\"91.44\" x2=\"76.2\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CL1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"73.66\" y1=\"81.28\" x2=\"73.66\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"73.66\" y=\"91.44\"/>\n<pinref part=\"CGAIN1_1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"58.42\" y1=\"81.28\" x2=\"58.42\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN3_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"43.18\" y1=\"88.9\" x2=\"43.18\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"43.18\" y1=\"91.44\" x2=\"58.42\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"91.44\"/>\n</segment>\n</net>\n<net name=\"CGAIN2\" class=\"0\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"76.2\" y1=\"93.98\" x2=\"25.4\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN4_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"10.16\" y1=\"88.9\" x2=\"10.16\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"93.98\" x2=\"25.4\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CH1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"25.4\" y1=\"81.28\" x2=\"25.4\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"25.4\" y=\"93.98\"/>\n</segment>\n</net>\n<net name=\"CGAIN5\" class=\"0\">\n<segment>\n<wire x1=\"248.92\" y1=\"91.44\" x2=\"264.16\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"264.16\" y1=\"91.44\" x2=\"266.7\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"264.16\" y1=\"81.28\" x2=\"264.16\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"264.16\" y=\"91.44\"/>\n<wire x1=\"248.92\" y1=\"81.28\" x2=\"248.92\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"233.68\" y1=\"88.9\" x2=\"233.68\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"233.68\" y1=\"91.44\" x2=\"248.92\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"91.44\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"RGAIN3_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CGAIN1_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CL3\" gate=\"G$1\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"CGAIN6\" class=\"0\">\n<segment>\n<wire x1=\"266.7\" y1=\"93.98\" x2=\"215.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"88.9\" x2=\"200.66\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"93.98\" x2=\"215.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"81.28\" x2=\"215.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"215.9\" y=\"93.98\"/>\n<pinref part=\"GAINSW3\" gate=\"G$1\" pin=\"B\"/>\n<pinref part=\"RGAIN4_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CH3\" gate=\"G$1\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"CGAIN7\" class=\"0\">\n<segment>\n<wire x1=\"337.82\" y1=\"86.36\" x2=\"337.82\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"358.14\" y1=\"96.52\" x2=\"355.6\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"355.6\" y1=\"96.52\" x2=\"337.82\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"355.6\" y=\"96.52\"/>\n<wire x1=\"355.6\" y1=\"86.36\" x2=\"355.6\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"96.52\" x2=\"322.58\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"96.52\" x2=\"322.58\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"96.52\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"RGAIN3_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CL4\" gate=\"G$1\" pin=\"4\"/>\n<pinref part=\"CGAIN1_4\" gate=\"G$1\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"CGAIN8\" class=\"0\">\n<segment>\n<wire x1=\"309.88\" y1=\"86.36\" x2=\"309.88\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"358.14\" y1=\"99.06\" x2=\"309.88\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"99.06\" x2=\"294.64\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"294.64\" y1=\"99.06\" x2=\"294.64\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"99.06\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"B\"/>\n<pinref part=\"CH4\" gate=\"G$1\" pin=\"4\"/>\n<pinref part=\"RGAIN4_4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"INJ2\" class=\"0\">\n<segment>\n<wire x1=\"55.88\" y1=\"177.8\" x2=\"58.42\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"177.8\" x2=\"58.42\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"167.64\" x2=\"63.5\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"167.64\" x2=\"63.5\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"167.64\"/>\n<wire x1=\"58.42\" y1=\"167.64\" x2=\"25.4\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"J2\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"DS2\"/>\n<pinref part=\"C_AC2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"S2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"160.02\" x2=\"58.42\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"160.02\" x2=\"58.42\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$15\" class=\"0\">\n<segment>\n<wire x1=\"63.5\" y1=\"177.8\" x2=\"63.5\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"182.88\" x2=\"55.88\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"182.88\" x2=\"76.2\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"76.2\" y1=\"182.88\" x2=\"76.2\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"182.88\"/>\n<junction x=\"76.2\" y=\"182.88\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"DS1\"/>\n<pinref part=\"RIN6\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"C_AC2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"106.68\" y1=\"182.88\" x2=\"106.68\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"106.68\" y1=\"190.5\" x2=\"76.2\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"76.2\" y1=\"190.5\" x2=\"76.2\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"104.14\" y1=\"182.88\" x2=\"106.68\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INJ3\" class=\"0\">\n<segment>\n<wire x1=\"246.38\" y1=\"238.76\" x2=\"248.92\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"238.76\" x2=\"248.92\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"228.6\" x2=\"254\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"228.6\" x2=\"254\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"228.6\"/>\n<wire x1=\"248.92\" y1=\"228.6\" x2=\"215.9\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"DS2\"/>\n<pinref part=\"J3\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<pinref part=\"C_AC3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"228.6\" x2=\"248.92\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"220.98\" x2=\"246.38\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INJ4\" class=\"0\">\n<segment>\n<wire x1=\"246.38\" y1=\"177.8\" x2=\"248.92\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"177.8\" x2=\"248.92\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"167.64\" x2=\"254\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"167.64\" x2=\"254\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"167.64\"/>\n<wire x1=\"248.92\" y1=\"167.64\" x2=\"215.9\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"DS2\"/>\n<pinref part=\"J4\" gate=\"G$1\" pin=\"SIGNAL\"/>\n<pinref part=\"C_AC4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"167.64\" x2=\"248.92\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"248.92\" y1=\"160.02\" x2=\"246.38\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$11\" class=\"0\">\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"A\"/>\n<pinref part=\"ACR1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"35.56\" y1=\"243.84\" x2=\"33.02\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$21\" class=\"0\">\n<segment>\n<wire x1=\"35.56\" y1=\"182.88\" x2=\"33.02\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"ACR2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"K2\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"N$32\" class=\"0\">\n<segment>\n<wire x1=\"226.06\" y1=\"243.84\" x2=\"223.52\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"ACR3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"N$35\" class=\"0\">\n<segment>\n<wire x1=\"226.06\" y1=\"182.88\" x2=\"223.52\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"ACR4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"NSG_1\" class=\"0\">\n<segment>\n<wire x1=\"132.08\" y1=\"246.38\" x2=\"104.14\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RIN1_11K\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"132.08\" y1=\"238.76\" x2=\"132.08\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN1NF_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"147.32\" y1=\"236.22\" x2=\"147.32\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"246.38\" x2=\"132.08\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"246.38\"/>\n<pinref part=\"CIN56_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"162.56\" y1=\"236.22\" x2=\"162.56\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"246.38\" x2=\"147.32\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"246.38\"/>\n<label x=\"111.76\" y=\"246.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$19\" class=\"0\">\n<segment>\n<wire x1=\"132.08\" y1=\"177.8\" x2=\"132.08\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"132.08\" y1=\"185.42\" x2=\"147.32\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"185.42\" x2=\"147.32\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"185.42\" x2=\"162.56\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"185.42\" x2=\"162.56\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"185.42\"/>\n<pinref part=\"RIN2_11K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"104.14\" y1=\"185.42\" x2=\"132.08\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"132.08\" y=\"185.42\"/>\n</segment>\n</net>\n<net name=\"N$43\" class=\"0\">\n<segment>\n<wire x1=\"322.58\" y1=\"238.76\" x2=\"322.58\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"246.38\" x2=\"337.82\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"246.38\" x2=\"337.82\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"246.38\" x2=\"353.06\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"246.38\" x2=\"353.06\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"246.38\"/>\n<pinref part=\"RIN3_11K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"294.64\" y1=\"246.38\" x2=\"322.58\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"246.38\"/>\n</segment>\n</net>\n<net name=\"INAMINUS2\" class=\"0\">\n<segment>\n<wire x1=\"309.88\" y1=\"226.06\" x2=\"322.58\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"360.68\" y=\"226.06\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"322.58\" y1=\"226.06\" x2=\"337.82\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"226.06\" x2=\"353.06\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"226.06\" x2=\"373.38\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"228.6\" x2=\"309.88\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"228.6\" x2=\"299.72\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"226.06\" x2=\"309.88\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"226.06\"/>\n<pinref part=\"RIN3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CIN5_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RIN3_11K\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"322.58\" y1=\"228.6\" x2=\"322.58\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"226.06\"/>\n<pinref part=\"CIN1NF_3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"337.82\" y1=\"228.6\" x2=\"337.82\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"226.06\"/>\n<pinref part=\"CIN56_3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"353.06\" y1=\"228.6\" x2=\"353.06\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"226.06\"/>\n</segment>\n<segment>\n<wire x1=\"264.16\" y1=\"63.5\" x2=\"248.92\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"63.5\" x2=\"233.68\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"233.68\" y1=\"63.5\" x2=\"233.68\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"264.16\" y1=\"73.66\" x2=\"264.16\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"264.16\" y=\"63.5\"/>\n<wire x1=\"248.92\" y1=\"73.66\" x2=\"248.92\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"63.5\"/>\n<wire x1=\"302.26\" y1=\"58.42\" x2=\"284.48\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"284.48\" y1=\"58.42\" x2=\"284.48\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"284.48\" y1=\"63.5\" x2=\"264.16\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"284.48\" y1=\"58.42\" x2=\"269.24\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"284.48\" y=\"58.42\"/>\n<label x=\"269.24\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"233.68\" y1=\"63.5\" x2=\"215.9\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"233.68\" y=\"63.5\"/>\n<wire x1=\"215.9\" y1=\"63.5\" x2=\"200.66\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"63.5\" x2=\"200.66\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"73.66\" x2=\"215.9\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"215.9\" y=\"63.5\"/>\n<pinref part=\"RGAIN2_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN1_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"CH3\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"CGAIN1_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CL3\" gate=\"G$1\" pin=\"3\"/>\n<pinref part=\"IC4\" gate=\"G$1\" pin=\"INA-\"/>\n</segment>\n</net>\n<net name=\"N$44\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_A\"/>\n<pinref part=\"ROFFSET1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"12.7\" x2=\"106.68\" y2=\"12.7\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$45\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_B\"/>\n<pinref part=\"ROFFSET2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"15.24\" x2=\"106.68\" y2=\"15.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$46\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_C\"/>\n<pinref part=\"ROFFSET3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"17.78\" x2=\"106.68\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$47\" class=\"0\">\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VOUT_D\"/>\n<pinref part=\"ROFFSET4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"20.32\" x2=\"106.68\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"VCCA\" class=\"2\">\n<segment>\n<pinref part=\"GAINSW1\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$2\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"10.16\" y1=\"121.92\" x2=\"10.16\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW2\" gate=\"P\" pin=\"VCC\"/>\n<wire x1=\"25.4\" y1=\"121.92\" x2=\"25.4\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$3\" gate=\"G$1\" pin=\"VCCA\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP1\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$13\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"58.42\" y1=\"121.92\" x2=\"58.42\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"OVSAMP2\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$15\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"248.92\" y1=\"121.92\" x2=\"248.92\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"U$7\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"157.48\" y1=\"63.5\" x2=\"157.48\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"60.96\" x2=\"139.7\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC3\" gate=\"G$1\" pin=\"VCC\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"U$14\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"40.64\" y1=\"121.92\" x2=\"40.64\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"U$16\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"347.98\" y1=\"63.5\" x2=\"347.98\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"347.98\" y1=\"60.96\" x2=\"330.2\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC4\" gate=\"G$1\" pin=\"VCC\"/>\n</segment>\n<segment>\n<pinref part=\"C5VOPAMP2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"U$4\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"231.14\" y1=\"121.92\" x2=\"231.14\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GAINSW4\" gate=\"P\" pin=\"VCC\"/>\n<pinref part=\"U$5\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"215.9\" y1=\"121.92\" x2=\"215.9\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"DAC1\" gate=\"G$1\" pin=\"VDD\"/>\n<wire x1=\"68.58\" y1=\"22.86\" x2=\"66.04\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$8\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"66.04\" y1=\"22.86\" x2=\"66.04\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"COFFSET\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"U$17\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"38.1\" y1=\"25.4\" x2=\"38.1\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"U$6\" gate=\"G$1\" pin=\"VCCA\"/>\n<pinref part=\"GAINSW3\" gate=\"P\" pin=\"VCC\"/>\n<wire x1=\"200.66\" y1=\"119.38\" x2=\"200.66\" y2=\"121.92\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"NNG_1\" class=\"0\">\n<segment>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"104.14\" y1=\"241.3\" x2=\"109.22\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"109.22\" y1=\"241.3\" x2=\"109.22\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CIN5_1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"119.38\" y1=\"236.22\" x2=\"119.38\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"241.3\" x2=\"109.22\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"109.22\" y=\"241.3\"/>\n<label x=\"111.76\" y=\"241.3\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$56\" class=\"0\">\n<segment>\n<wire x1=\"322.58\" y1=\"177.8\" x2=\"322.58\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"185.42\" x2=\"337.82\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"185.42\" x2=\"337.82\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"185.42\" x2=\"353.06\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"185.42\" x2=\"353.06\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"337.82\" y=\"185.42\"/>\n<pinref part=\"RIN4_11K\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN1NF_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN56_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"294.64\" y1=\"185.42\" x2=\"322.58\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"322.58\" y=\"185.42\"/>\n</segment>\n</net>\n<net name=\"N$50\" class=\"0\">\n<segment>\n<wire x1=\"254\" y1=\"177.8\" x2=\"254\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"182.88\" x2=\"246.38\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"182.88\" x2=\"266.7\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"266.7\" y1=\"182.88\" x2=\"266.7\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"254\" y=\"182.88\"/>\n<pinref part=\"K4\" gate=\"G$1\" pin=\"DS1\"/>\n<pinref part=\"C_AC4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RIN8\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"294.64\" y1=\"182.88\" x2=\"299.72\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"182.88\" x2=\"299.72\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"190.5\" x2=\"266.7\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"266.7\" y1=\"190.5\" x2=\"266.7\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"266.7\" y=\"182.88\"/>\n</segment>\n</net>\n<net name=\"N$22\" class=\"0\">\n<segment>\n<wire x1=\"109.22\" y1=\"180.34\" x2=\"109.22\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"175.26\" x2=\"119.38\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"180.34\" x2=\"109.22\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN5_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"104.14\" y1=\"180.34\" x2=\"109.22\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"109.22\" y=\"180.34\"/>\n</segment>\n</net>\n<net name=\"N$51\" class=\"0\">\n<segment>\n<wire x1=\"299.72\" y1=\"241.3\" x2=\"299.72\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"236.22\" x2=\"309.88\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"241.3\" x2=\"299.72\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN5_3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"294.64\" y1=\"241.3\" x2=\"299.72\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"241.3\"/>\n</segment>\n</net>\n<net name=\"N$57\" class=\"0\">\n<segment>\n<wire x1=\"299.72\" y1=\"180.34\" x2=\"299.72\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"175.26\" x2=\"309.88\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"180.34\" x2=\"299.72\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"180.34\"/>\n<pinref part=\"RIN4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"CIN5_4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"294.64\" y1=\"180.34\" x2=\"299.72\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"E_ACSW1\" class=\"0\">\n<segment>\n<pinref part=\"ACR1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"22.86\" y1=\"243.84\" x2=\"10.16\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"10.16\" y=\"243.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$10\" class=\"0\">\n<segment>\n<pinref part=\"K1\" gate=\"G$1\" pin=\"DS1\"/>\n<pinref part=\"C_AC1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"63.5\" y1=\"238.76\" x2=\"63.5\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"243.84\" x2=\"55.88\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RIN5\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"63.5\" y1=\"243.84\" x2=\"76.2\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"76.2\" y1=\"243.84\" x2=\"76.2\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"243.84\"/>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"104.14\" y1=\"243.84\" x2=\"106.68\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"106.68\" y1=\"243.84\" x2=\"106.68\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"106.68\" y1=\"251.46\" x2=\"76.2\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"76.2\" y1=\"251.46\" x2=\"76.2\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"76.2\" y=\"243.84\"/>\n</segment>\n</net>\n<net name=\"N$25\" class=\"3\">\n<segment>\n<wire x1=\"55.88\" y1=\"157.48\" x2=\"58.42\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"157.48\" x2=\"71.12\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"71.12\" y1=\"157.48\" x2=\"83.82\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"157.48\" x2=\"96.52\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"154.94\" x2=\"96.52\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-7\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"83.82\" y1=\"154.94\" x2=\"83.82\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"157.48\"/>\n<pinref part=\"R50-6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"71.12\" y1=\"154.94\" x2=\"71.12\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"71.12\" y=\"157.48\"/>\n<pinref part=\"R50-5\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"154.94\" x2=\"58.42\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"157.48\"/>\n<pinref part=\"S2\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"N$26\" class=\"3\">\n<segment>\n<pinref part=\"R50-9\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"246.38\" y1=\"218.44\" x2=\"248.92\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"218.44\" x2=\"248.92\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-10\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"248.92\" y1=\"218.44\" x2=\"261.62\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"261.62\" y1=\"218.44\" x2=\"261.62\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"218.44\"/>\n<pinref part=\"R50-11\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"261.62\" y1=\"218.44\" x2=\"274.32\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"218.44\" x2=\"274.32\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"261.62\" y=\"218.44\"/>\n<pinref part=\"R50-12\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"274.32\" y1=\"218.44\" x2=\"287.02\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"218.44\" x2=\"287.02\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"218.44\"/>\n<pinref part=\"S3\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"N$28\" class=\"3\">\n<segment>\n<wire x1=\"246.38\" y1=\"157.48\" x2=\"248.92\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-13\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"248.92\" y1=\"157.48\" x2=\"248.92\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-14\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"261.62\" y1=\"154.94\" x2=\"261.62\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"261.62\" y1=\"157.48\" x2=\"248.92\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"157.48\"/>\n<pinref part=\"R50-15\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"274.32\" y1=\"154.94\" x2=\"274.32\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"157.48\" x2=\"261.62\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"261.62\" y=\"157.48\"/>\n<pinref part=\"R50-16\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"287.02\" y1=\"154.94\" x2=\"287.02\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"157.48\" x2=\"274.32\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"157.48\"/>\n<pinref part=\"S4\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"CGAIN3\" class=\"0\">\n<segment>\n<pinref part=\"CGAIN1_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"86.36\" x2=\"147.32\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"167.64\" y1=\"96.52\" x2=\"165.1\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"165.1\" y1=\"96.52\" x2=\"147.32\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"165.1\" y=\"96.52\"/>\n<pinref part=\"CL2\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"165.1\" y1=\"86.36\" x2=\"165.1\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"96.52\" x2=\"132.08\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"147.32\" y=\"96.52\"/>\n<pinref part=\"RGAIN3_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"132.08\" y1=\"93.98\" x2=\"132.08\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"CGAIN4\" class=\"0\">\n<segment>\n<pinref part=\"CH2\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"119.38\" y1=\"86.36\" x2=\"119.38\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GAINSW2\" gate=\"G$1\" pin=\"B\"/>\n<wire x1=\"167.64\" y1=\"99.06\" x2=\"119.38\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"99.06\" x2=\"104.14\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"99.06\"/>\n<pinref part=\"RGAIN4_2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"104.14\" y1=\"93.98\" x2=\"104.14\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$6\" class=\"0\">\n<segment>\n<wire x1=\"233.68\" y1=\"76.2\" x2=\"233.68\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN3_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN1_3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$7\" class=\"0\">\n<segment>\n<wire x1=\"200.66\" y1=\"76.2\" x2=\"200.66\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN4_3\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN2_3\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$8\" class=\"0\">\n<segment>\n<wire x1=\"322.58\" y1=\"83.82\" x2=\"322.58\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN3_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN1_4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$9\" class=\"0\">\n<segment>\n<wire x1=\"294.64\" y1=\"83.82\" x2=\"294.64\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RGAIN4_4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"RGAIN2_4\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"E_GSW4\" class=\"0\">\n<segment>\n<wire x1=\"358.14\" y1=\"104.14\" x2=\"347.98\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"347.98\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"GAINSW4\" gate=\"G$1\" pin=\"!A!/B\"/>\n</segment>\n</net>\n<net name=\"N50_1\" class=\"3\">\n<segment>\n<pinref part=\"R50-4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"55.88\" y1=\"218.44\" x2=\"58.42\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"218.44\" x2=\"71.12\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"71.12\" y1=\"218.44\" x2=\"83.82\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"218.44\" x2=\"96.52\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"96.52\" y1=\"218.44\" x2=\"96.52\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R50-1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"215.9\" x2=\"58.42\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"218.44\"/>\n<pinref part=\"R50-2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"71.12\" y1=\"215.9\" x2=\"71.12\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"71.12\" y=\"218.44\"/>\n<pinref part=\"R50-3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"83.82\" y1=\"215.9\" x2=\"83.82\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"218.44\"/>\n<pinref part=\"S1\" gate=\"G$1\" pin=\"3\"/>\n<label x=\"86.36\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$5\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN2_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN4_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"104.14\" y1=\"83.82\" x2=\"104.14\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$4\" class=\"0\">\n<segment>\n<pinref part=\"RGAIN1_2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RGAIN3_2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"132.08\" y1=\"83.82\" x2=\"132.08\" y2=\"81.28\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"E_21_B0\" class=\"0\">\n<segment>\n<pinref part=\"S1\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"45.72\" y1=\"220.98\" x2=\"33.02\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"33.02\" y=\"220.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B4\" class=\"0\">\n<segment>\n<pinref part=\"S5\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"93.98\" y1=\"243.84\" x2=\"81.28\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"81.28\" y=\"243.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B1\" class=\"0\">\n<segment>\n<pinref part=\"S2\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"45.72\" y1=\"160.02\" x2=\"33.02\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"33.02\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B2\" class=\"0\">\n<segment>\n<pinref part=\"S3\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"236.22\" y1=\"220.98\" x2=\"223.52\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"223.52\" y=\"220.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"N$39\" class=\"0\">\n<segment>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"294.64\" y1=\"243.84\" x2=\"299.72\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"243.84\" x2=\"299.72\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"251.46\" x2=\"266.7\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"238.76\" x2=\"254\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"243.84\" x2=\"246.38\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"243.84\" x2=\"266.7\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"266.7\" y1=\"243.84\" x2=\"266.7\" y2=\"241.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"254\" y=\"243.84\"/>\n<junction x=\"266.7\" y=\"243.84\"/>\n<pinref part=\"K3\" gate=\"G$1\" pin=\"DS1\"/>\n<pinref part=\"RIN7\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"C_AC3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"266.7\" y1=\"243.84\" x2=\"266.7\" y2=\"251.46\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"E_21_B6\" class=\"0\">\n<segment>\n<pinref part=\"S7\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"284.48\" y1=\"243.84\" x2=\"271.78\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"271.78\" y=\"243.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B7\" class=\"0\">\n<segment>\n<pinref part=\"S8\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"284.48\" y1=\"182.88\" x2=\"271.78\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"271.78\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B3\" class=\"0\">\n<segment>\n<pinref part=\"S4\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"236.22\" y1=\"160.02\" x2=\"223.52\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"223.52\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B5\" class=\"0\">\n<segment>\n<pinref part=\"S6\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"93.98\" y1=\"182.88\" x2=\"81.28\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"81.28\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n<sheet>\n<description>Digital</description>\n<plain>\n<text x=\"122.936\" y=\"120.904\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"122.936\" y=\"118.11\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"122.936\" y=\"115.316\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"122.936\" y=\"112.522\" size=\"1.778\" layer=\"91\">LOW Speed</text>\n<text x=\"161.036\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"158.496\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"150.876\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"145.796\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"140.716\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"138.176\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"135.636\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"133.096\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"130.556\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"122.936\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<text x=\"120.396\" y=\"170.688\" size=\"1.778\" layer=\"91\" rot=\"R90\">LOW Speed</text>\n<wire x1=\"66.04\" y1=\"175.26\" x2=\"5.08\" y2=\"175.26\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"292.1\" y1=\"210.82\" x2=\"292.1\" y2=\"157.48\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"292.1\" y1=\"157.48\" x2=\"292.1\" y2=\"109.22\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"292.1\" y1=\"109.22\" x2=\"292.1\" y2=\"71.12\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"292.1\" y1=\"71.12\" x2=\"66.04\" y2=\"71.12\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"66.04\" y1=\"71.12\" x2=\"66.04\" y2=\"256.54\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"68.58\" y=\"251.46\" size=\"2.54\" layer=\"95\">FPGA</text>\n<text x=\"7.62\" y=\"251.46\" size=\"2.54\" layer=\"95\">Back pinout 2</text>\n<text x=\"7.62\" y=\"170.18\" size=\"2.54\" layer=\"95\">Front pinout</text>\n<wire x1=\"5.08\" y1=\"167.64\" x2=\"45.72\" y2=\"167.64\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"5.08\" y1=\"248.92\" x2=\"48.26\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"48.26\" y1=\"248.92\" x2=\"48.26\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"66.04\" y1=\"248.92\" x2=\"81.28\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"81.28\" y1=\"248.92\" x2=\"81.28\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"66.04\" y1=\"71.12\" x2=\"66.04\" y2=\"50.8\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"66.04\" y1=\"50.8\" x2=\"5.08\" y2=\"50.8\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"7.62\" y=\"83.82\" size=\"2.54\" layer=\"95\">Oscillator</text>\n<wire x1=\"5.08\" y1=\"81.28\" x2=\"27.94\" y2=\"81.28\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"27.94\" y1=\"81.28\" x2=\"27.94\" y2=\"88.9\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"66.04\" y1=\"50.8\" x2=\"66.04\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"66.04\" y1=\"7.62\" x2=\"5.08\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"7.62\" y=\"45.72\" size=\"2.54\" layer=\"95\">Top pinouts</text>\n<wire x1=\"45.72\" y1=\"167.64\" x2=\"45.72\" y2=\"175.26\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"210.82\" y1=\"71.12\" x2=\"210.82\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"210.82\" y1=\"7.62\" x2=\"66.04\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"68.58\" y=\"66.04\" size=\"2.54\" layer=\"95\">IO expanders</text>\n<wire x1=\"5.08\" y1=\"88.9\" x2=\"63.5\" y2=\"88.9\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"33.02\" y1=\"50.8\" x2=\"33.02\" y2=\"43.18\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"33.02\" y1=\"43.18\" x2=\"5.08\" y2=\"43.18\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"96.52\" y1=\"71.12\" x2=\"96.52\" y2=\"63.5\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"96.52\" y1=\"63.5\" x2=\"66.04\" y2=\"63.5\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"365.76\" y1=\"63.5\" x2=\"365.76\" y2=\"25.4\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"365.76\" y1=\"25.4\" x2=\"210.82\" y2=\"25.4\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"210.82\" y1=\"25.4\" x2=\"210.82\" y2=\"63.5\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"213.36\" y=\"66.04\" size=\"2.54\" layer=\"95\">Serial to USB interface</text>\n<wire x1=\"210.82\" y1=\"63.5\" x2=\"210.82\" y2=\"71.12\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"210.82\" y1=\"71.12\" x2=\"261.62\" y2=\"71.12\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"335.28\" y1=\"210.82\" x2=\"335.28\" y2=\"157.48\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"294.64\" y=\"205.74\" size=\"2.54\" layer=\"95\">LEDs</text>\n<wire x1=\"383.54\" y1=\"210.82\" x2=\"292.1\" y2=\"210.82\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"292.1\" y1=\"210.82\" x2=\"292.1\" y2=\"256.54\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"294.64\" y=\"251.46\" size=\"2.54\" layer=\"95\">JTAG interface</text>\n<wire x1=\"292.1\" y1=\"71.12\" x2=\"365.76\" y2=\"71.12\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"365.76\" y1=\"71.12\" x2=\"365.76\" y2=\"63.5\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"210.82\" y1=\"63.5\" x2=\"264.16\" y2=\"63.5\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"264.16\" y1=\"63.5\" x2=\"264.16\" y2=\"71.12\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"304.8\" y1=\"203.2\" x2=\"304.8\" y2=\"210.82\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"292.1\" y1=\"248.92\" x2=\"325.12\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"325.12\" y1=\"248.92\" x2=\"325.12\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"304.8\" y1=\"203.2\" x2=\"292.1\" y2=\"203.2\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"335.28\" y1=\"157.48\" x2=\"292.1\" y2=\"157.48\" width=\"0.1524\" layer=\"97\"/>\n<text x=\"243.84\" y=\"35.56\" size=\"1.778\" layer=\"91\">Can take 5V from either the\nright side connector\nor the USB connector</text>\n<text x=\"335.28\" y=\"30.48\" size=\"1.778\" layer=\"91\">Chip that talks UART\nover USB</text>\n<text x=\"294.64\" y=\"152.4\" size=\"2.54\" layer=\"95\">Back pinout 1</text>\n<wire x1=\"383.54\" y1=\"109.22\" x2=\"292.1\" y2=\"109.22\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"383.54\" y1=\"157.48\" x2=\"292.1\" y2=\"157.48\" width=\"0.1524\" layer=\"95\"/>\n</plain>\n<instances>\n<instance part=\"FPGA\" gate=\"G$1\" x=\"172.72\" y=\"144.78\" smashed=\"yes\">\n<attribute name=\"OC_NEWARK\" x=\"172.72\" y=\"144.78\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"172.72\" y=\"144.78\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"154.94\" y=\"157.48\" size=\"1.778\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"154.94\" y=\"162.56\" size=\"1.27\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"154.94\" y=\"160.02\" size=\"1.27\" layer=\"96\"/>\n</instance>\n<instance part=\"GND15\" gate=\"1\" x=\"101.6\" y=\"160.02\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"157.48\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V4\" gate=\"G$1\" x=\"269.24\" y=\"198.12\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"266.7\" y=\"200.66\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CV11\" gate=\"G$1\" x=\"269.24\" y=\"187.96\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"269.24\" y=\"187.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"270.764\" y=\"188.341\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"270.764\" y=\"183.261\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND22\" gate=\"1\" x=\"269.24\" y=\"175.26\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"266.7\" y=\"172.72\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CV12\" gate=\"G$1\" x=\"259.08\" y=\"187.96\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"259.08\" y=\"187.96\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"260.604\" y=\"188.341\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"260.604\" y=\"183.261\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V5\" gate=\"G$1\" x=\"254\" y=\"218.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"251.46\" y=\"220.98\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CG13\" gate=\"G$1\" x=\"243.84\" y=\"208.28\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"243.84\" y=\"208.28\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"245.364\" y=\"208.661\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"245.364\" y=\"203.581\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND21\" gate=\"1\" x=\"254\" y=\"195.58\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"251.46\" y=\"193.04\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CG14\" gate=\"G$1\" x=\"231.14\" y=\"208.28\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"231.14\" y=\"208.28\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"232.156\" y=\"208.915\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"232.156\" y=\"204.089\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CG15\" gate=\"G$1\" x=\"254\" y=\"208.28\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"254\" y=\"208.28\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"255.524\" y=\"208.661\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"255.524\" y=\"203.581\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RS6\" gate=\"G$1\" x=\"154.94\" y=\"228.6\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"154.94\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"154.94\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"154.94\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"158.75\" y=\"230.0986\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"158.75\" y=\"225.298\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND24\" gate=\"1\" x=\"162.56\" y=\"220.98\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"160.02\" y=\"218.44\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RS7\" gate=\"G$1\" x=\"134.62\" y=\"246.38\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"134.62\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"134.62\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"134.62\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"138.43\" y=\"247.8786\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"138.43\" y=\"243.078\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"RS8\" gate=\"G$1\" x=\"134.62\" y=\"238.76\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"134.62\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"134.62\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"134.62\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"138.43\" y=\"240.2586\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"138.43\" y=\"235.458\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"+3V8\" gate=\"G$1\" x=\"142.24\" y=\"251.46\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"139.7\" y=\"254\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RS9\" gate=\"G$1\" x=\"149.86\" y=\"238.76\" smashed=\"yes\">\n<attribute name=\"OC_NEWARK\" x=\"149.86\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"149.86\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"149.86\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"146.05\" y=\"240.2586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"146.05\" y=\"235.458\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND26\" gate=\"1\" x=\"129.54\" y=\"73.66\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"127\" y=\"71.12\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND7\" gate=\"1\" x=\"22.86\" y=\"210.82\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"20.32\" y=\"208.28\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"P+1\" gate=\"1\" x=\"353.06\" y=\"144.78\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"350.52\" y=\"147.32\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND13\" gate=\"1\" x=\"332.74\" y=\"118.11\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"335.28\" y=\"115.57\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"SW_RESET\" gate=\"G$1\" x=\"160.02\" y=\"243.84\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"NAME\" x=\"157.48\" y=\"248.92\" size=\"1.016\" layer=\"95\" font=\"vector\" rot=\"MR180\" align=\"top-left\"/>\n<attribute name=\"VALUE\" x=\"157.48\" y=\"246.38\" size=\"1.016\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" x=\"33.02\" y=\"226.06\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"33.02\" y=\"226.06\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_IOEXP\" gate=\"A\" x=\"35.56\" y=\"149.86\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"35.56\" y=\"149.86\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n<instance part=\"GND70\" gate=\"1\" x=\"40.64\" y=\"210.82\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"38.1\" y=\"208.28\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V9\" gate=\"G$1\" x=\"45.72\" y=\"243.84\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"43.18\" y=\"246.38\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"OSC\" gate=\"G$1\" x=\"33.02\" y=\"66.04\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"31.75\" y=\"74.676\" size=\"0.762\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"25.4\" y=\"74.295\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"25.4\" y=\"55.88\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND16\" gate=\"1\" x=\"10.16\" y=\"55.88\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"7.62\" y=\"53.34\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V2\" gate=\"G$1\" x=\"10.16\" y=\"76.2\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"7.62\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"C_OSC\" gate=\"G$1\" x=\"10.16\" y=\"66.04\" smashed=\"yes\">\n<attribute name=\"MFN\" x=\"10.16\" y=\"66.04\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.176\" y=\"66.675\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.176\" y=\"61.849\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"FRAME1\" gate=\"G$1\" x=\"0\" y=\"0\" smashed=\"yes\">\n<attribute name=\"DRAWING_NAME\" x=\"344.17\" y=\"15.24\" size=\"2.54\" layer=\"94\"/>\n<attribute name=\"LAST_DATE_TIME\" x=\"344.17\" y=\"10.16\" size=\"2.286\" layer=\"94\"/>\n<attribute name=\"SHEET\" x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\"/>\n</instance>\n<instance part=\"GND42\" gate=\"1\" x=\"17.78\" y=\"12.7\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"10.16\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"PIN_DISPLAY\" gate=\"G$1\" x=\"10.16\" y=\"27.94\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"8.89\" y=\"33.02\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R270\"/>\n</instance>\n<instance part=\"PIN_IO_1\" gate=\"G$1\" x=\"40.64\" y=\"27.94\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"39.37\" y=\"33.02\" size=\"1.27\" layer=\"95\" ratio=\"10\" rot=\"R270\"/>\n</instance>\n<instance part=\"P+7\" gate=\"1\" x=\"63.5\" y=\"25.4\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"27.94\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND68\" gate=\"1\" x=\"48.26\" y=\"12.7\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"45.72\" y=\"10.16\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"P+6\" gate=\"1\" x=\"30.48\" y=\"25.4\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"27.94\" y=\"27.94\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" x=\"116.84\" y=\"40.64\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"106.68\" y=\"64.77\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"106.68\" y=\"15.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" x=\"177.8\" y=\"40.64\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"167.64\" y=\"64.77\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"167.64\" y=\"15.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V26\" gate=\"G$1\" x=\"101.6\" y=\"66.04\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"68.58\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND64\" gate=\"1\" x=\"101.6\" y=\"15.24\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"12.7\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V27\" gate=\"G$1\" x=\"162.56\" y=\"66.04\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"160.02\" y=\"68.58\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND65\" gate=\"1\" x=\"162.56\" y=\"15.24\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"160.02\" y=\"12.7\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R_SCL\" gate=\"G$1\" x=\"93.98\" y=\"48.26\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"93.98\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"93.98\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"93.98\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"95.25\" y=\"49.7586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"95.25\" y=\"44.958\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"R_SDA\" gate=\"G$1\" x=\"83.82\" y=\"48.26\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"83.82\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MF\" x=\"83.82\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"83.82\" y=\"48.26\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"85.09\" y=\"49.7586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"85.09\" y=\"44.958\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"P+4\" gate=\"1\" x=\"251.46\" y=\"60.96\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"248.92\" y=\"63.5\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"USB1\" gate=\"G$1\" x=\"215.9\" y=\"50.8\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"215.9\" y=\"53.34\" size=\"1.016\" layer=\"95\" font=\"vector\" align=\"top-left\"/>\n<attribute name=\"VALUE\" x=\"213.36\" y=\"27.94\" size=\"1.016\" layer=\"96\" font=\"vector\"/>\n</instance>\n<instance part=\"U340G\" gate=\"G$1\" x=\"365.76\" y=\"58.42\" smashed=\"yes\" rot=\"MR180\"/>\n<instance part=\"Y1\" gate=\"G$1\" x=\"284.48\" y=\"55.88\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"NAME\" x=\"276.86\" y=\"63.5\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"276.86\" y=\"60.96\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"C_OSC1\" gate=\"G$1\" x=\"289.56\" y=\"50.8\" smashed=\"yes\">\n<attribute name=\"MFN\" x=\"289.56\" y=\"50.8\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"290.576\" y=\"51.435\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"290.576\" y=\"46.609\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C_OSC2\" gate=\"G$1\" x=\"276.86\" y=\"50.8\" smashed=\"yes\">\n<attribute name=\"MFN\" x=\"276.86\" y=\"50.8\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"277.876\" y=\"51.435\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"277.876\" y=\"46.609\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND66\" gate=\"1\" x=\"289.56\" y=\"38.1\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"287.02\" y=\"35.56\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V30\" gate=\"G$1\" x=\"360.68\" y=\"45.72\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"358.14\" y=\"48.26\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND67\" gate=\"1\" x=\"327.66\" y=\"35.56\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"330.2\" y=\"33.02\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND69\" gate=\"1\" x=\"231.14\" y=\"33.02\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"228.6\" y=\"30.48\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V3\" gate=\"G$1\" x=\"327.66\" y=\"63.5\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"325.12\" y=\"66.04\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RLED1\" gate=\"G$1\" x=\"307.34\" y=\"198.12\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"307.34\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"307.34\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"307.34\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"311.15\" y=\"199.6186\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"311.15\" y=\"194.818\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"LED1\" gate=\"G$1\" x=\"320.04\" y=\"198.12\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"315.468\" y=\"202.184\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"RLED2\" gate=\"G$1\" x=\"307.34\" y=\"187.96\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"307.34\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"307.34\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"307.34\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"311.15\" y=\"189.4586\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"311.15\" y=\"184.658\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"LED2\" gate=\"G$1\" x=\"320.04\" y=\"187.96\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"187.96\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"315.468\" y=\"192.024\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"RLED3\" gate=\"G$1\" x=\"307.34\" y=\"177.8\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"307.34\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"307.34\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"307.34\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"311.15\" y=\"179.2986\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"311.15\" y=\"174.498\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"LED3\" gate=\"G$1\" x=\"320.04\" y=\"177.8\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"177.8\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"315.468\" y=\"181.864\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"RLED4\" gate=\"G$1\" x=\"307.34\" y=\"167.64\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"307.34\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"307.34\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"307.34\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"MR270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"311.15\" y=\"169.1386\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"311.15\" y=\"164.338\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"LED4\" gate=\"G$1\" x=\"320.04\" y=\"167.64\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"167.64\" size=\"1.778\" layer=\"96\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"315.468\" y=\"171.704\" size=\"1.778\" layer=\"95\"/>\n</instance>\n<instance part=\"GND71\" gate=\"1\" x=\"299.72\" y=\"162.56\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"297.18\" y=\"160.02\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND23\" gate=\"1\" x=\"350.52\" y=\"215.9\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"347.98\" y=\"213.36\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RJ2\" gate=\"G$1\" x=\"342.9\" y=\"238.76\" smashed=\"yes\">\n<attribute name=\"OC_NEWARK\" x=\"342.9\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"342.9\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"342.9\" y=\"238.76\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"339.09\" y=\"240.2586\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"339.09\" y=\"235.458\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"RJ3\" gate=\"G$1\" x=\"317.5\" y=\"243.84\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"317.5\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"317.5\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"317.5\" y=\"243.84\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"321.31\" y=\"245.3386\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"321.31\" y=\"240.538\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"RJ4\" gate=\"G$1\" x=\"320.04\" y=\"236.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"OC_NEWARK\" x=\"320.04\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"320.04\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"320.04\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"MR90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"323.85\" y=\"237.7186\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<attribute name=\"VALUE\" x=\"323.85\" y=\"232.918\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"+3V6\" gate=\"G$1\" x=\"353.06\" y=\"248.92\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"350.52\" y=\"251.46\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RJ5\" gate=\"G$1\" x=\"360.68\" y=\"228.6\" smashed=\"yes\">\n<attribute name=\"OC_NEWARK\" x=\"360.68\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"360.68\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"360.68\" y=\"228.6\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"356.87\" y=\"230.0986\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"356.87\" y=\"225.298\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"JP1\" gate=\"G$1\" x=\"340.36\" y=\"226.06\" smashed=\"yes\">\n<attribute name=\"NAME\" x=\"335.28\" y=\"233.68\" size=\"1.27\" layer=\"95\" ratio=\"10\"/>\n<attribute name=\"VALUE\" x=\"335.28\" y=\"218.44\" size=\"1.27\" layer=\"96\" ratio=\"10\"/>\n</instance>\n<instance part=\"GND85\" gate=\"1\" x=\"27.94\" y=\"132.08\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"25.4\" y=\"129.54\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V7\" gate=\"G$1\" x=\"25.4\" y=\"162.56\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"22.86\" y=\"165.1\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"S9\" gate=\"G$1\" x=\"259.08\" y=\"50.8\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"NAME\" x=\"256.54\" y=\"46.6725\" size=\"1.778\" layer=\"95\" ratio=\"10\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"256.54\" y=\"56.8325\" size=\"1.778\" layer=\"96\" ratio=\"10\" rot=\"MR180\"/>\n</instance>\n<instance part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" x=\"342.9\" y=\"130.81\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"342.9\" y=\"130.81\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n</instance>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"+5V\" class=\"3\">\n<segment>\n<pinref part=\"P+1\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"353.06\" y1=\"142.24\" x2=\"353.06\" y2=\"133.35\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"133.35\" x2=\"347.98\" y2=\"133.35\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"6\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"P+7\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"63.5\" y1=\"22.86\" x2=\"63.5\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"19.05\" x2=\"46.99\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"30.48\" y1=\"22.86\" x2=\"30.48\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"30.48\" y1=\"19.05\" x2=\"25.4\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"25.4\" y1=\"19.05\" x2=\"16.51\" y2=\"19.05\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"P+6\" gate=\"1\" pin=\"+5V\"/>\n</segment>\n<segment>\n<pinref part=\"P+4\" gate=\"1\" pin=\"+5V\"/>\n<pinref part=\"S9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"254\" y1=\"50.8\" x2=\"251.46\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"251.46\" y1=\"50.8\" x2=\"251.46\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"GND\" class=\"1\">\n<segment>\n<pinref part=\"RS6\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND24\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"160.02\" y1=\"228.6\" x2=\"162.56\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"228.6\" x2=\"162.56\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_RESET\" gate=\"G$1\" pin=\"P$2\"/>\n<wire x1=\"162.56\" y1=\"241.3\" x2=\"162.56\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"228.6\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"ADC_VREF\"/>\n<pinref part=\"GND26\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"129.54\" y1=\"76.2\" x2=\"129.54\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND7\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"22.86\" y1=\"213.36\" x2=\"22.86\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"22.86\" y1=\"223.52\" x2=\"27.94\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"226.06\" x2=\"22.86\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"226.06\" x2=\"22.86\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"223.52\"/>\n<wire x1=\"22.86\" y1=\"231.14\" x2=\"27.94\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"27.94\" y1=\"228.6\" x2=\"22.86\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"228.6\" x2=\"22.86\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"228.6\" x2=\"22.86\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"228.6\"/>\n<junction x=\"22.86\" y=\"226.06\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"22.86\" y1=\"236.22\" x2=\"27.94\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"233.68\" x2=\"22.86\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"233.68\" x2=\"22.86\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"22.86\" y1=\"233.68\" x2=\"22.86\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"233.68\"/>\n<junction x=\"22.86\" y=\"231.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND70\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"35.56\" y1=\"218.44\" x2=\"40.64\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"218.44\" x2=\"40.64\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"REFGND\"/>\n<pinref part=\"GND15\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"104.14\" y1=\"162.56\" x2=\"101.6\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"165.1\" x2=\"101.6\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"167.64\" x2=\"101.6\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"170.18\" x2=\"101.6\" y2=\"172.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"172.72\" x2=\"101.6\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"175.26\" x2=\"101.6\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"177.8\" x2=\"101.6\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND1\"/>\n<wire x1=\"104.14\" y1=\"195.58\" x2=\"101.6\" y2=\"195.58\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"195.58\" x2=\"101.6\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"180.34\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND2\"/>\n<wire x1=\"101.6\" y1=\"193.04\" x2=\"101.6\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"190.5\" x2=\"101.6\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"187.96\" x2=\"101.6\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"185.42\" x2=\"101.6\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"182.88\" x2=\"101.6\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"104.14\" y1=\"193.04\" x2=\"101.6\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"193.04\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND3\"/>\n<wire x1=\"104.14\" y1=\"190.5\" x2=\"101.6\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"190.5\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND4\"/>\n<wire x1=\"104.14\" y1=\"187.96\" x2=\"101.6\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"187.96\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND5\"/>\n<wire x1=\"104.14\" y1=\"185.42\" x2=\"101.6\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"185.42\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND6\"/>\n<wire x1=\"104.14\" y1=\"182.88\" x2=\"101.6\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"182.88\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND7\"/>\n<wire x1=\"104.14\" y1=\"180.34\" x2=\"101.6\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND8\"/>\n<wire x1=\"104.14\" y1=\"177.8\" x2=\"101.6\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"177.8\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND9\"/>\n<wire x1=\"104.14\" y1=\"175.26\" x2=\"101.6\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"175.26\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND10\"/>\n<wire x1=\"104.14\" y1=\"172.72\" x2=\"101.6\" y2=\"172.72\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"172.72\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND11\"/>\n<wire x1=\"104.14\" y1=\"170.18\" x2=\"101.6\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"170.18\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND12\"/>\n<wire x1=\"104.14\" y1=\"167.64\" x2=\"101.6\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"167.64\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"GND_PAD\"/>\n<wire x1=\"104.14\" y1=\"165.1\" x2=\"101.6\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"162.56\" x2=\"101.6\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"162.56\"/>\n<junction x=\"101.6\" y=\"165.1\"/>\n</segment>\n<segment>\n<pinref part=\"CG14\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"231.14\" y1=\"203.2\" x2=\"231.14\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CG13\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"231.14\" y1=\"200.66\" x2=\"243.84\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"243.84\" y1=\"200.66\" x2=\"243.84\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CG15\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"243.84\" y1=\"200.66\" x2=\"254\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"200.66\" x2=\"254\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"243.84\" y=\"200.66\"/>\n<pinref part=\"GND21\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"254\" y1=\"198.12\" x2=\"254\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"254\" y=\"200.66\"/>\n</segment>\n<segment>\n<pinref part=\"CV12\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"259.08\" y1=\"182.88\" x2=\"259.08\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CV11\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"259.08\" y1=\"180.34\" x2=\"269.24\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"180.34\" x2=\"269.24\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND22\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"269.24\" y1=\"177.8\" x2=\"269.24\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"269.24\" y=\"180.34\"/>\n</segment>\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"C_OSC\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"20.32\" y1=\"60.96\" x2=\"10.16\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND16\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"10.16\" y1=\"58.42\" x2=\"10.16\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"10.16\" y=\"60.96\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND42\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"17.78\" y1=\"15.24\" x2=\"17.78\" y2=\"16.51\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"17.78\" y1=\"16.51\" x2=\"16.51\" y2=\"16.51\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND68\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"48.26\" y1=\"15.24\" x2=\"48.26\" y2=\"16.51\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"48.26\" y1=\"16.51\" x2=\"46.99\" y2=\"16.51\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"GND64\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"104.14\" y1=\"20.32\" x2=\"101.6\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"20.32\" x2=\"101.6\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A2\"/>\n<wire x1=\"104.14\" y1=\"25.4\" x2=\"101.6\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"25.4\" x2=\"101.6\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"20.32\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A1\"/>\n<wire x1=\"104.14\" y1=\"27.94\" x2=\"101.6\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"27.94\" x2=\"101.6\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"25.4\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"A0\"/>\n<wire x1=\"104.14\" y1=\"30.48\" x2=\"101.6\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"30.48\" x2=\"101.6\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"27.94\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"VSS\"/>\n<pinref part=\"GND65\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"165.1\" y1=\"20.32\" x2=\"162.56\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"20.32\" x2=\"162.56\" y2=\"17.78\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"A2\"/>\n<wire x1=\"165.1\" y1=\"25.4\" x2=\"162.56\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"25.4\" x2=\"162.56\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"20.32\"/>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"A1\"/>\n<wire x1=\"165.1\" y1=\"27.94\" x2=\"162.56\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"27.94\" x2=\"162.56\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"25.4\"/>\n</segment>\n<segment>\n<pinref part=\"C_OSC1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND66\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"289.56\" y1=\"45.72\" x2=\"289.56\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_OSC2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"289.56\" y1=\"43.18\" x2=\"289.56\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"289.56\" y1=\"43.18\" x2=\"276.86\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"43.18\" x2=\"276.86\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"289.56\" y=\"43.18\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND67\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"327.66\" y1=\"38.1\" x2=\"327.66\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"40.64\" x2=\"330.2\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND69\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"231.14\" y1=\"35.56\" x2=\"231.14\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"231.14\" y1=\"38.1\" x2=\"228.6\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND71\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"RLED1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"299.72\" y1=\"165.1\" x2=\"299.72\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"167.64\" x2=\"299.72\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"177.8\" x2=\"299.72\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"187.96\" x2=\"299.72\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"198.12\" x2=\"302.26\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RLED2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"302.26\" y1=\"187.96\" x2=\"299.72\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"187.96\"/>\n<pinref part=\"RLED3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"302.26\" y1=\"177.8\" x2=\"299.72\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"177.8\"/>\n<pinref part=\"RLED4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"302.26\" y1=\"167.64\" x2=\"299.72\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"167.64\"/>\n</segment>\n<segment>\n<wire x1=\"349.25\" y1=\"220.98\" x2=\"350.52\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"349.25\" y1=\"231.14\" x2=\"350.52\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"231.14\" x2=\"350.52\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"350.52\" y=\"220.98\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"6\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"10\"/>\n<pinref part=\"GND23\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"350.52\" y1=\"218.44\" x2=\"350.52\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RJ2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"347.98\" y1=\"238.76\" x2=\"350.52\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"238.76\" x2=\"350.52\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"350.52\" y=\"231.14\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"147.32\" x2=\"27.94\" y2=\"147.32\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"9\"/>\n<pinref part=\"GND85\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"27.94\" y1=\"147.32\" x2=\"27.94\" y2=\"134.62\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<wire x1=\"332.74\" y1=\"120.65\" x2=\"340.36\" y2=\"120.65\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND13\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"15\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"340.36\" y1=\"120.65\" x2=\"347.98\" y2=\"120.65\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"340.36\" y=\"120.65\"/>\n</segment>\n</net>\n<net name=\"+3V3\" class=\"2\">\n<segment>\n<pinref part=\"+3V9\" gate=\"G$1\" pin=\"+3V3\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"45.72\" y1=\"241.3\" x2=\"45.72\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"45.72\" y1=\"220.98\" x2=\"35.56\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE6\"/>\n<wire x1=\"198.12\" y1=\"203.2\" x2=\"198.12\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"198.12\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE2\"/>\n<wire x1=\"187.96\" y1=\"213.36\" x2=\"190.5\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"190.5\" y1=\"213.36\" x2=\"193.04\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"193.04\" y1=\"213.36\" x2=\"195.58\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"213.36\" x2=\"198.12\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"187.96\" y1=\"203.2\" x2=\"187.96\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE3\"/>\n<wire x1=\"190.5\" y1=\"203.2\" x2=\"190.5\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"190.5\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE4\"/>\n<wire x1=\"193.04\" y1=\"203.2\" x2=\"193.04\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"193.04\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE5\"/>\n<wire x1=\"195.58\" y1=\"203.2\" x2=\"195.58\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"195.58\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE7\"/>\n<wire x1=\"200.66\" y1=\"203.2\" x2=\"200.66\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"213.36\" x2=\"198.12\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE10\"/>\n<wire x1=\"203.2\" y1=\"203.2\" x2=\"203.2\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"203.2\" y1=\"213.36\" x2=\"200.66\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"200.66\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE11\"/>\n<wire x1=\"205.74\" y1=\"203.2\" x2=\"205.74\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"205.74\" y1=\"213.36\" x2=\"203.2\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"203.2\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE12\"/>\n<wire x1=\"208.28\" y1=\"203.2\" x2=\"208.28\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"208.28\" y1=\"213.36\" x2=\"205.74\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"205.74\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA1\"/>\n<wire x1=\"213.36\" y1=\"203.2\" x2=\"213.36\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"213.36\" y1=\"213.36\" x2=\"208.28\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"208.28\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA2\"/>\n<wire x1=\"215.9\" y1=\"203.2\" x2=\"215.9\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"213.36\" x2=\"213.36\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"213.36\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA3\"/>\n<wire x1=\"218.44\" y1=\"203.2\" x2=\"218.44\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"218.44\" y1=\"213.36\" x2=\"215.9\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"215.9\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA4\"/>\n<wire x1=\"220.98\" y1=\"203.2\" x2=\"220.98\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"220.98\" y1=\"213.36\" x2=\"218.44\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"218.44\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA5\"/>\n<wire x1=\"223.52\" y1=\"203.2\" x2=\"223.52\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"213.36\" x2=\"220.98\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"220.98\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCA6\"/>\n<wire x1=\"226.06\" y1=\"203.2\" x2=\"226.06\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"226.06\" y1=\"213.36\" x2=\"223.52\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"223.52\" y=\"213.36\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCC_ONE1\"/>\n<wire x1=\"185.42\" y1=\"203.2\" x2=\"185.42\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"185.42\" y1=\"213.36\" x2=\"187.96\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"187.96\" y=\"213.36\"/>\n<pinref part=\"CG15\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"226.06\" y1=\"213.36\" x2=\"231.14\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"231.14\" y1=\"213.36\" x2=\"243.84\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"243.84\" y1=\"213.36\" x2=\"254\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"213.36\" x2=\"254\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"226.06\" y=\"213.36\"/>\n<pinref part=\"CG13\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"243.84\" y1=\"210.82\" x2=\"243.84\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"243.84\" y=\"213.36\"/>\n<pinref part=\"CG14\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"231.14\" y1=\"210.82\" x2=\"231.14\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"231.14\" y=\"213.36\"/>\n<pinref part=\"+3V5\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"254\" y1=\"215.9\" x2=\"254\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"254\" y=\"213.36\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO1A\"/>\n<wire x1=\"243.84\" y1=\"193.04\" x2=\"248.92\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO1B\"/>\n<wire x1=\"243.84\" y1=\"190.5\" x2=\"248.92\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"190.5\" x2=\"248.92\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO2\"/>\n<wire x1=\"243.84\" y1=\"187.96\" x2=\"248.92\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"187.96\" x2=\"248.92\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"190.5\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO3\"/>\n<wire x1=\"243.84\" y1=\"185.42\" x2=\"248.92\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"185.42\" x2=\"248.92\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"187.96\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO3@2\"/>\n<wire x1=\"243.84\" y1=\"182.88\" x2=\"248.92\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"182.88\" x2=\"248.92\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"185.42\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO4\"/>\n<wire x1=\"243.84\" y1=\"180.34\" x2=\"248.92\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"180.34\" x2=\"248.92\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"182.88\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO5\"/>\n<wire x1=\"243.84\" y1=\"177.8\" x2=\"248.92\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"177.8\" x2=\"248.92\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"180.34\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO6\"/>\n<wire x1=\"243.84\" y1=\"175.26\" x2=\"248.92\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"175.26\" x2=\"248.92\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"177.8\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO6@2\"/>\n<wire x1=\"243.84\" y1=\"172.72\" x2=\"248.92\" y2=\"172.72\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"172.72\" x2=\"248.92\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"175.26\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO7\"/>\n<wire x1=\"243.84\" y1=\"170.18\" x2=\"248.92\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"170.18\" x2=\"248.92\" y2=\"172.72\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"172.72\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO8\"/>\n<wire x1=\"243.84\" y1=\"167.64\" x2=\"248.92\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"167.64\" x2=\"248.92\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"170.18\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"VCCIO8@2\"/>\n<wire x1=\"243.84\" y1=\"165.1\" x2=\"248.92\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"165.1\" x2=\"248.92\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"167.64\"/>\n<pinref part=\"CV11\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"248.92\" y1=\"193.04\" x2=\"259.08\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"259.08\" y1=\"193.04\" x2=\"269.24\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"269.24\" y1=\"193.04\" x2=\"269.24\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"193.04\"/>\n<pinref part=\"+3V4\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"269.24\" y1=\"195.58\" x2=\"269.24\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"269.24\" y=\"193.04\"/>\n<pinref part=\"CV12\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"259.08\" y1=\"190.5\" x2=\"259.08\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"259.08\" y=\"193.04\"/>\n</segment>\n<segment>\n<pinref part=\"RS8\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"RS9\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"144.78\" y1=\"238.76\" x2=\"142.24\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"RS7\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"142.24\" y1=\"238.76\" x2=\"139.7\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"139.7\" y1=\"246.38\" x2=\"142.24\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"142.24\" y1=\"246.38\" x2=\"142.24\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"142.24\" y=\"238.76\"/>\n<pinref part=\"+3V8\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"142.24\" y1=\"248.92\" x2=\"142.24\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"142.24\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"C_OSC\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"20.32\" y1=\"71.12\" x2=\"10.16\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"71.12\" x2=\"10.16\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V2\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"10.16\" y1=\"73.66\" x2=\"10.16\" y2=\"71.12\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"10.16\" y=\"71.12\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"+3V26\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"101.6\" y1=\"63.5\" x2=\"101.6\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"60.96\" x2=\"104.14\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"60.96\" x2=\"93.98\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"60.96\"/>\n<pinref part=\"R_SCL\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"93.98\" y1=\"60.96\" x2=\"93.98\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"!RESET\"/>\n<wire x1=\"104.14\" y1=\"55.88\" x2=\"101.6\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"55.88\" x2=\"101.6\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R_SDA\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"83.82\" y1=\"55.88\" x2=\"83.82\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"60.96\" x2=\"83.82\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"60.96\" x2=\"83.82\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"60.96\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"VDD\"/>\n<pinref part=\"+3V27\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"162.56\" y1=\"63.5\" x2=\"162.56\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"60.96\" x2=\"165.1\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"!RESET\"/>\n<wire x1=\"165.1\" y1=\"55.88\" x2=\"162.56\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"55.88\" x2=\"162.56\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"60.96\"/>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"A0\"/>\n<wire x1=\"162.56\" y1=\"43.18\" x2=\"162.56\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"30.48\" x2=\"165.1\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"43.18\" x2=\"162.56\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"162.56\" y=\"55.88\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"VCC\"/>\n<pinref part=\"+3V30\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"360.68\" y1=\"43.18\" x2=\"360.68\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"360.68\" y1=\"40.64\" x2=\"355.6\" y2=\"40.64\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"+3V3\" gate=\"G$1\" pin=\"+3V3\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"V3\"/>\n<wire x1=\"327.66\" y1=\"60.96\" x2=\"327.66\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"48.26\" x2=\"330.2\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"+3V6\" gate=\"G$1\" pin=\"+3V3\"/>\n<pinref part=\"RJ3\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"353.06\" y1=\"243.84\" x2=\"353.06\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"322.58\" y1=\"243.84\" x2=\"327.66\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"243.84\"/>\n<wire x1=\"327.66\" y1=\"243.84\" x2=\"353.06\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"228.6\" x2=\"349.25\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"9\"/>\n<pinref part=\"RJ5\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"355.6\" y1=\"228.6\" x2=\"353.06\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"353.06\" y1=\"243.84\" x2=\"353.06\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"353.06\" y=\"228.6\"/>\n<pinref part=\"RJ4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"325.12\" y1=\"236.22\" x2=\"327.66\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"236.22\" x2=\"327.66\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"327.66\" y=\"243.84\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"33.02\" y1=\"139.7\" x2=\"25.4\" y2=\"139.7\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"25.4\" y1=\"139.7\" x2=\"25.4\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V7\" gate=\"G$1\" pin=\"+3V3\"/>\n</segment>\n</net>\n<net name=\"TCK\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TCK\"/>\n<wire x1=\"104.14\" y1=\"129.54\" x2=\"83.82\" y2=\"129.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"129.54\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"327.66\" y=\"231.14\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"RJ2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"331.47\" y1=\"231.14\" x2=\"330.2\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"330.2\" y1=\"231.14\" x2=\"327.66\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"330.2\" y1=\"231.14\" x2=\"330.2\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"330.2\" y1=\"238.76\" x2=\"337.82\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"330.2\" y=\"231.14\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"TDO\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TDO\"/>\n<wire x1=\"104.14\" y1=\"124.46\" x2=\"83.82\" y2=\"124.46\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"124.46\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"327.66\" y=\"228.6\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"331.47\" y1=\"228.6\" x2=\"327.66\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"TMS\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TMS\"/>\n<wire x1=\"104.14\" y1=\"134.62\" x2=\"83.82\" y2=\"134.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"134.62\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"307.34\" y=\"226.06\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"RJ3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"331.47\" y1=\"226.06\" x2=\"309.88\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"226.06\" x2=\"307.34\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"226.06\" x2=\"309.88\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"309.88\" y1=\"243.84\" x2=\"312.42\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"309.88\" y=\"226.06\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"TDI\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"TDI\"/>\n<wire x1=\"104.14\" y1=\"127\" x2=\"83.82\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"127\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"307.34\" y=\"220.98\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n<pinref part=\"RJ4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"331.47\" y1=\"220.98\" x2=\"312.42\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"312.42\" y1=\"220.98\" x2=\"307.34\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"312.42\" y1=\"220.98\" x2=\"312.42\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"312.42\" y1=\"233.68\" x2=\"312.42\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"312.42\" y1=\"236.22\" x2=\"314.96\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"312.42\" y=\"220.98\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"JTAGEN\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"JTAGEN\"/>\n<wire x1=\"104.14\" y1=\"137.16\" x2=\"83.82\" y2=\"137.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"83.82\" y=\"137.16\" size=\"1.27\" layer=\"95\" rot=\"R180\" xref=\"yes\"/>\n</segment>\n<segment>\n<label x=\"370.84\" y=\"223.52\" size=\"1.27\" layer=\"95\" xref=\"yes\"/>\n<pinref part=\"RJ5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"349.25\" y1=\"223.52\" x2=\"368.3\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"368.3\" y1=\"223.52\" x2=\"370.84\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"365.76\" y1=\"228.6\" x2=\"368.3\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"368.3\" y1=\"228.6\" x2=\"368.3\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"368.3\" y=\"223.52\"/>\n<pinref part=\"JP1\" gate=\"G$1\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"CONFIG_SEL\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CONFIG_SEL\"/>\n<pinref part=\"RS6\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"203.2\" x2=\"147.32\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"223.52\" x2=\"147.32\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"228.6\" x2=\"149.86\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"147.32\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"CONF\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CONF_DONE\"/>\n<pinref part=\"RS7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"124.46\" y1=\"203.2\" x2=\"124.46\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"124.46\" y1=\"236.22\" x2=\"124.46\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"124.46\" y1=\"243.84\" x2=\"124.46\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"124.46\" y1=\"246.38\" x2=\"129.54\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"124.46\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"STATUS\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"NSTATUS\"/>\n<pinref part=\"RS8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"127\" y1=\"203.2\" x2=\"127\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"127\" y1=\"233.68\" x2=\"127\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"127\" y1=\"238.76\" x2=\"129.54\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"127\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"NCONF\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"NCONFIG\"/>\n<wire x1=\"142.24\" y1=\"203.2\" x2=\"142.24\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n<pinref part=\"RS9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"142.24\" y1=\"233.68\" x2=\"157.48\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"233.68\" x2=\"157.48\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"157.48\" y1=\"238.76\" x2=\"154.94\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"SW_RESET\" gate=\"G$1\" pin=\"P$4\"/>\n<wire x1=\"157.48\" y1=\"241.3\" x2=\"157.48\" y2=\"238.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"157.48\" y=\"238.76\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_33\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"PLL_CLKOUTP\"/>\n<wire x1=\"104.14\" y1=\"96.52\" x2=\"86.36\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"101.6\" y=\"96.52\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n</segment>\n</net>\n<net name=\"D1C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_70\"/>\n<wire x1=\"215.9\" y1=\"76.2\" x2=\"215.9\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"215.9\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D2C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_69\"/>\n<wire x1=\"213.36\" y1=\"76.2\" x2=\"213.36\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"213.36\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D3C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_66\"/>\n<wire x1=\"210.82\" y1=\"76.2\" x2=\"210.82\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"210.82\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D4C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_65\"/>\n<wire x1=\"208.28\" y1=\"76.2\" x2=\"208.28\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"208.28\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D5C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_64\"/>\n<wire x1=\"205.74\" y1=\"76.2\" x2=\"205.74\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"205.74\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D6C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO4_62\"/>\n<wire x1=\"203.2\" y1=\"76.2\" x2=\"203.2\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"203.2\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D0C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_74\"/>\n<wire x1=\"254\" y1=\"91.44\" x2=\"243.84\" y2=\"91.44\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"91.44\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7C\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_60\"/>\n<wire x1=\"195.58\" y1=\"83.82\" x2=\"195.58\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D0D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_85\"/>\n<wire x1=\"254\" y1=\"114.3\" x2=\"243.84\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"114.3\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_84\"/>\n<wire x1=\"243.84\" y1=\"111.76\" x2=\"254\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_81\"/>\n<wire x1=\"254\" y1=\"109.22\" x2=\"243.84\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"109.22\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_79\"/>\n<wire x1=\"254\" y1=\"104.14\" x2=\"243.84\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_78\"/>\n<wire x1=\"254\" y1=\"101.6\" x2=\"243.84\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"101.6\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_77\"/>\n<wire x1=\"254\" y1=\"99.06\" x2=\"243.84\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_76\"/>\n<wire x1=\"254\" y1=\"96.52\" x2=\"243.84\" y2=\"96.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"96.52\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7D\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_75\"/>\n<wire x1=\"254\" y1=\"93.98\" x2=\"243.84\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"93.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L135\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_135\"/>\n<wire x1=\"129.54\" y1=\"203.2\" x2=\"129.54\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"129.54\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"24.13\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"16.51\" y1=\"24.13\" x2=\"25.4\" y2=\"24.13\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L140\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_140\"/>\n<wire x1=\"121.92\" y1=\"213.36\" x2=\"121.92\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"121.92\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"21.59\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"16.51\" y1=\"21.59\" x2=\"25.4\" y2=\"21.59\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L21_SDA\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_21\"/>\n<wire x1=\"104.14\" y1=\"121.92\" x2=\"86.36\" y2=\"121.92\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"121.92\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"SDA\"/>\n<pinref part=\"R_SDA\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"83.82\" y1=\"43.18\" x2=\"83.82\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"35.56\" x2=\"104.14\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"71.12\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"83.82\" y1=\"35.56\" x2=\"71.12\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"35.56\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"SDA\"/>\n<wire x1=\"165.1\" y1=\"35.56\" x2=\"149.86\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"149.86\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"142.24\" x2=\"12.7\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"142.24\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"13\"/>\n</segment>\n</net>\n<net name=\"AIN1\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"ANAIN1\"/>\n<wire x1=\"132.08\" y1=\"76.2\" x2=\"132.08\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n<segment>\n<label x=\"15.24\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"27.94\" y1=\"218.44\" x2=\"15.24\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"LOW_22\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_22\"/>\n<wire x1=\"104.14\" y1=\"119.38\" x2=\"86.36\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L134\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_134\"/>\n<wire x1=\"132.08\" y1=\"203.2\" x2=\"132.08\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"26.67\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"16.51\" y1=\"26.67\" x2=\"25.4\" y2=\"26.67\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"LOW_24\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_24\"/>\n<wire x1=\"86.36\" y1=\"116.84\" x2=\"104.14\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LOW_25\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1B_25\"/>\n<wire x1=\"86.36\" y1=\"114.3\" x2=\"104.14\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"114.3\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"OSC1\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK0P\"/>\n<wire x1=\"76.2\" y1=\"109.22\" x2=\"104.14\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"76.2\" y=\"109.22\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"OSC\" gate=\"G$1\" pin=\"OUT\"/>\n<wire x1=\"45.72\" y1=\"66.04\" x2=\"55.7276\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"66.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_47\"/>\n<wire x1=\"170.18\" y1=\"76.2\" x2=\"170.18\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"170.18\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D1A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_46\"/>\n<wire x1=\"167.64\" y1=\"76.2\" x2=\"167.64\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"167.64\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D2A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_45\"/>\n<wire x1=\"165.1\" y1=\"76.2\" x2=\"165.1\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"165.1\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D3A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_44\"/>\n<wire x1=\"162.56\" y1=\"76.2\" x2=\"162.56\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"162.56\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D4A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_43\"/>\n<wire x1=\"160.02\" y1=\"76.2\" x2=\"160.02\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"160.02\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D5A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_41\"/>\n<wire x1=\"157.48\" y1=\"76.2\" x2=\"157.48\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"157.48\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D6A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_39\"/>\n<wire x1=\"154.94\" y1=\"76.2\" x2=\"154.94\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"154.94\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D7A\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_38\"/>\n<wire x1=\"152.4\" y1=\"76.2\" x2=\"152.4\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"152.4\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D0B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_59\"/>\n<wire x1=\"193.04\" y1=\"76.2\" x2=\"193.04\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"193.04\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D1B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_58\"/>\n<wire x1=\"190.5\" y1=\"76.2\" x2=\"190.5\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"190.5\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D2B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_57\"/>\n<wire x1=\"187.96\" y1=\"76.2\" x2=\"187.96\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"187.96\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D3B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_56\"/>\n<wire x1=\"185.42\" y1=\"76.2\" x2=\"185.42\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"185.42\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D4B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_55\"/>\n<wire x1=\"182.88\" y1=\"76.2\" x2=\"182.88\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"182.88\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D5B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_54\"/>\n<wire x1=\"180.34\" y1=\"76.2\" x2=\"180.34\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"180.34\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D6B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_52\"/>\n<wire x1=\"177.8\" y1=\"76.2\" x2=\"177.8\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"177.8\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"D7B\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO3_50\"/>\n<wire x1=\"175.26\" y1=\"76.2\" x2=\"175.26\" y2=\"83.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"175.26\" y=\"81.28\" size=\"1.778\" layer=\"95\" rot=\"MR270\"/>\n</segment>\n</net>\n<net name=\"CLKOUTTOLEFT_29\" class=\"0\">\n<segment>\n<label x=\"76.2\" y=\"104.14\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK1P\"/>\n<wire x1=\"104.14\" y1=\"104.14\" x2=\"76.2\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<wire x1=\"347.98\" y1=\"138.43\" x2=\"378.714\" y2=\"138.43\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"378.46\" y=\"138.43\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"TRIGOUTTOLEFT_106\" class=\"0\">\n<segment>\n<wire x1=\"347.98\" y1=\"128.27\" x2=\"378.46\" y2=\"128.27\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"378.46\" y=\"128.27\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"10\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_106\"/>\n<wire x1=\"243.84\" y1=\"160.02\" x2=\"276.86\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"TRIGINFROMRIGHT_86\" class=\"0\">\n<segment>\n<label x=\"335.28\" y=\"128.27\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<wire x1=\"340.36\" y1=\"128.27\" x2=\"302.26\" y2=\"128.27\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"9\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_86\"/>\n<wire x1=\"274.32\" y1=\"116.84\" x2=\"243.84\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALTORIGHT_RX_92\" class=\"0\">\n<segment>\n<label x=\"335.28\" y=\"123.19\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<wire x1=\"340.36\" y1=\"123.19\" x2=\"302.26\" y2=\"123.19\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"13\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_92\"/>\n<wire x1=\"243.84\" y1=\"134.62\" x2=\"279.4\" y2=\"134.62\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"134.62\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"RX\"/>\n<wire x1=\"330.2\" y1=\"45.72\" x2=\"297.18\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"297.18\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALFROMRIGHT_TX_93\" class=\"0\">\n<segment>\n<label x=\"335.28\" y=\"125.73\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<wire x1=\"340.36\" y1=\"125.73\" x2=\"302.26\" y2=\"125.73\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"11\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_93\"/>\n<wire x1=\"281.94\" y1=\"137.16\" x2=\"243.84\" y2=\"137.16\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"137.16\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"TX\"/>\n<wire x1=\"297.18\" y1=\"43.18\" x2=\"330.2\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"297.18\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SERIALTOLEFT_96\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_96\"/>\n<wire x1=\"243.84\" y1=\"139.7\" x2=\"271.78\" y2=\"139.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"139.7\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"378.46\" y1=\"125.73\" x2=\"347.98\" y2=\"125.73\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"378.46\" y=\"125.73\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"12\"/>\n</segment>\n</net>\n<net name=\"SERIALFROMLEFT_98\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_98\"/>\n<wire x1=\"276.86\" y1=\"144.78\" x2=\"243.84\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"144.78\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"378.46\" y1=\"123.19\" x2=\"347.98\" y2=\"123.19\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"378.46\" y=\"123.19\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"14\"/>\n</segment>\n</net>\n<net name=\"CLKINFROMRIGHT_26\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK0N\"/>\n<wire x1=\"104.14\" y1=\"111.76\" x2=\"76.2\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"76.2\" y=\"111.76\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"340.36\" y1=\"138.43\" x2=\"302.26\" y2=\"138.43\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"335.28\" y=\"138.43\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"SPARELEFT_102\" class=\"0\">\n<segment>\n<wire x1=\"378.46\" y1=\"135.89\" x2=\"347.98\" y2=\"135.89\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"378.46\" y=\"135.89\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"4\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_102\"/>\n<wire x1=\"243.84\" y1=\"154.94\" x2=\"269.24\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"SPARERIGHT_99\" class=\"0\">\n<segment>\n<wire x1=\"340.36\" y1=\"135.89\" x2=\"302.26\" y2=\"135.89\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"335.28\" y=\"135.89\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"3\"/>\n</segment>\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_99\"/>\n<wire x1=\"243.84\" y1=\"147.32\" x2=\"269.24\" y2=\"147.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"147.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"A13\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_13\"/>\n<wire x1=\"40.64\" y1=\"142.24\" x2=\"104.14\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"142.24\" size=\"1.778\" layer=\"95\"/>\n<label x=\"86.36\" y=\"142.24\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"14\"/>\n</segment>\n</net>\n<net name=\"A12\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_12\"/>\n<wire x1=\"40.64\" y1=\"144.78\" x2=\"104.14\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"144.78\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"12\"/>\n</segment>\n</net>\n<net name=\"A11\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_11\"/>\n<wire x1=\"40.64\" y1=\"147.32\" x2=\"104.14\" y2=\"147.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"147.32\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"10\"/>\n</segment>\n</net>\n<net name=\"A10\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_10\"/>\n<wire x1=\"40.64\" y1=\"149.86\" x2=\"104.14\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"8\"/>\n</segment>\n</net>\n<net name=\"A8\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_8\"/>\n<wire x1=\"40.64\" y1=\"152.4\" x2=\"104.14\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"152.4\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"6\"/>\n</segment>\n</net>\n<net name=\"A7\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_7\"/>\n<wire x1=\"40.64\" y1=\"154.94\" x2=\"104.14\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"A6\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_6\"/>\n<wire x1=\"40.64\" y1=\"157.48\" x2=\"104.14\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"157.48\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"A14\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO1A_14\"/>\n<wire x1=\"40.64\" y1=\"139.7\" x2=\"104.14\" y2=\"139.7\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"139.7\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"16\"/>\n</segment>\n</net>\n<net name=\"L131\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_131\"/>\n<wire x1=\"137.16\" y1=\"203.2\" x2=\"137.16\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"137.16\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"29.21\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"16.51\" y1=\"29.21\" x2=\"25.4\" y2=\"29.21\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"L132\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_132\"/>\n<wire x1=\"134.62\" y1=\"203.2\" x2=\"134.62\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"134.62\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<label x=\"19.558\" y=\"31.75\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"7\"/>\n<wire x1=\"16.51\" y1=\"31.75\" x2=\"25.4\" y2=\"31.75\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"5VINFROMRIGHT\" class=\"3\">\n<segment>\n<wire x1=\"302.26\" y1=\"133.35\" x2=\"340.36\" y2=\"133.35\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"335.28\" y=\"133.35\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"5\"/>\n</segment>\n<segment>\n<wire x1=\"228.6\" y1=\"53.34\" x2=\"254\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"228.6\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"S9\" gate=\"G$1\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_32\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"PLL_CLKOUTN\"/>\n<wire x1=\"104.14\" y1=\"99.06\" x2=\"86.36\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"101.6\" y=\"99.06\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n</segment>\n</net>\n<net name=\"IO_101\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_101\"/>\n<wire x1=\"243.84\" y1=\"152.4\" x2=\"259.08\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"152.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"236.22\" x2=\"60.96\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"236.22\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"15\"/>\n</segment>\n</net>\n<net name=\"IO_100\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_100\"/>\n<wire x1=\"259.08\" y1=\"149.86\" x2=\"243.84\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"233.68\" x2=\"60.96\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"233.68\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"13\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_91\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK3N\"/>\n<wire x1=\"264.16\" y1=\"132.08\" x2=\"243.84\" y2=\"132.08\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"132.08\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"60.96\" y1=\"231.14\" x2=\"35.56\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"231.14\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"11\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_90\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK3P\"/>\n<wire x1=\"264.16\" y1=\"129.54\" x2=\"243.84\" y2=\"129.54\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"129.54\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"228.6\" x2=\"60.96\" y2=\"228.6\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"228.6\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"9\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_89\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK2N\"/>\n<wire x1=\"264.16\" y1=\"127\" x2=\"243.84\" y2=\"127\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"127\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"226.06\" x2=\"60.96\" y2=\"226.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"226.06\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_88\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK2P\"/>\n<wire x1=\"264.16\" y1=\"124.46\" x2=\"243.84\" y2=\"124.46\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"124.46\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"35.56\" y1=\"223.52\" x2=\"60.96\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"60.96\" y=\"223.52\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"L141_SCL\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_141\"/>\n<wire x1=\"119.38\" y1=\"203.2\" x2=\"119.38\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"119.38\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"104.14\" y1=\"38.1\" x2=\"93.98\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"R_SCL\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"93.98\" y1=\"38.1\" x2=\"93.98\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"71.12\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"93.98\" y1=\"38.1\" x2=\"71.12\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"38.1\"/>\n</segment>\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"SCL\"/>\n<wire x1=\"165.1\" y1=\"38.1\" x2=\"149.86\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"149.86\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"144.78\" x2=\"12.7\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"144.78\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"11\"/>\n</segment>\n</net>\n<net name=\"L130\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_130\"/>\n<wire x1=\"139.7\" y1=\"203.2\" x2=\"139.7\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"139.7\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"8\"/>\n<wire x1=\"16.51\" y1=\"34.29\" x2=\"25.4\" y2=\"34.29\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"19.558\" y=\"34.29\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L127\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_127\"/>\n<wire x1=\"144.78\" y1=\"203.2\" x2=\"144.78\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"144.78\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"9\"/>\n<wire x1=\"16.51\" y1=\"36.83\" x2=\"25.4\" y2=\"36.83\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"19.558\" y=\"36.83\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L124\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_124\"/>\n<wire x1=\"149.86\" y1=\"203.2\" x2=\"149.86\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"149.86\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_DISPLAY\" gate=\"G$1\" pin=\"10\"/>\n<wire x1=\"16.51\" y1=\"39.37\" x2=\"25.4\" y2=\"39.37\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"19.558\" y=\"39.37\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L120_SYNC\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_120\"/>\n<wire x1=\"160.02\" y1=\"203.2\" x2=\"160.02\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"160.02\" y=\"208.28\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n</net>\n<net name=\"IO_122\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_122\"/>\n<wire x1=\"154.94\" y1=\"213.36\" x2=\"154.94\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"154.94\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"10\"/>\n<wire x1=\"46.99\" y1=\"39.37\" x2=\"58.42\" y2=\"39.37\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"39.37\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"L121\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO8_121\"/>\n<wire x1=\"157.48\" y1=\"203.2\" x2=\"157.48\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"157.48\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<wire x1=\"15.24\" y1=\"220.98\" x2=\"27.94\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"15.24\" y=\"220.98\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_AIN_IO2_PWRGND\" gate=\"A\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"IO_119\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_119\"/>\n<wire x1=\"165.1\" y1=\"203.2\" x2=\"165.1\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"165.1\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"8\"/>\n<wire x1=\"46.99\" y1=\"34.29\" x2=\"58.166\" y2=\"34.29\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"34.29\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_118\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_118\"/>\n<wire x1=\"167.64\" y1=\"203.2\" x2=\"167.64\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"167.64\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"7\"/>\n<wire x1=\"46.99\" y1=\"31.75\" x2=\"58.166\" y2=\"31.75\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"31.75\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_114\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_114\"/>\n<wire x1=\"170.18\" y1=\"203.2\" x2=\"170.18\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"170.18\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"6\"/>\n<wire x1=\"46.99\" y1=\"29.21\" x2=\"58.166\" y2=\"29.21\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"29.21\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_111\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_111\"/>\n<wire x1=\"177.8\" y1=\"203.2\" x2=\"177.8\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"177.8\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"4\"/>\n<wire x1=\"46.99\" y1=\"24.13\" x2=\"58.166\" y2=\"24.13\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"24.13\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_110\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_110\"/>\n<wire x1=\"180.34\" y1=\"214.63\" x2=\"180.34\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"180.34\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"3\"/>\n<wire x1=\"46.99\" y1=\"21.59\" x2=\"58.166\" y2=\"21.59\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"21.59\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_113\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO7_113\"/>\n<wire x1=\"172.72\" y1=\"203.2\" x2=\"172.72\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"172.72\" y=\"205.74\" size=\"1.778\" layer=\"95\" rot=\"R90\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"5\"/>\n<wire x1=\"46.99\" y1=\"26.67\" x2=\"58.166\" y2=\"26.67\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"26.67\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"TRIGINFROMLEFT_28\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"CLK1N\"/>\n<wire x1=\"104.14\" y1=\"106.68\" x2=\"76.2\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"76.2\" y=\"106.68\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"378.46\" y1=\"130.81\" x2=\"347.98\" y2=\"130.81\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"378.46\" y=\"130.81\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"8\"/>\n</segment>\n</net>\n<net name=\"IO_105\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO6_105\"/>\n<wire x1=\"243.84\" y1=\"157.48\" x2=\"259.08\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"157.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_IO_1\" gate=\"G$1\" pin=\"9\"/>\n<wire x1=\"46.99\" y1=\"36.83\" x2=\"58.42\" y2=\"36.83\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"48.26\" y=\"36.83\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"TRIGOUTORIGHT_87\" class=\"0\">\n<segment>\n<pinref part=\"FPGA\" gate=\"G$1\" pin=\"IO5_87\"/>\n<wire x1=\"243.84\" y1=\"119.38\" x2=\"274.32\" y2=\"119.38\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"248.92\" y=\"119.38\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<label x=\"335.28\" y=\"130.81\" size=\"1.778\" layer=\"95\" rot=\"MR0\"/>\n<wire x1=\"340.36\" y1=\"130.81\" x2=\"302.26\" y2=\"130.81\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_IOEXP1\" gate=\"A\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"LED1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA0\"/>\n<wire x1=\"190.5\" y1=\"60.96\" x2=\"203.2\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"60.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"322.58\" y1=\"198.12\" x2=\"332.74\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"325.12\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"LED1\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"LED3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA2\"/>\n<wire x1=\"190.5\" y1=\"55.88\" x2=\"203.2\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"322.58\" y1=\"177.8\" x2=\"332.74\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"325.12\" y=\"177.8\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"LED3\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"LED2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA1\"/>\n<wire x1=\"190.5\" y1=\"58.42\" x2=\"203.2\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"332.74\" y1=\"187.96\" x2=\"322.58\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"325.12\" y=\"187.96\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"LED2\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"LED4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA3\"/>\n<wire x1=\"190.5\" y1=\"53.34\" x2=\"203.2\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<label x=\"325.12\" y=\"167.64\" size=\"1.778\" layer=\"95\"/>\n<wire x1=\"332.74\" y1=\"167.64\" x2=\"322.58\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"LED4\" gate=\"G$1\" pin=\"A\"/>\n</segment>\n</net>\n<net name=\"E_IO_1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA4\"/>\n<wire x1=\"190.5\" y1=\"50.8\" x2=\"203.2\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"50.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"157.48\" x2=\"12.7\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"157.48\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"E_IO_4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA7\"/>\n<wire x1=\"190.5\" y1=\"43.18\" x2=\"203.2\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"43.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"149.86\" x2=\"12.7\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"E_IO_3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA6\"/>\n<wire x1=\"190.5\" y1=\"45.72\" x2=\"203.2\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"45.72\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"152.4\" x2=\"12.7\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"152.4\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"E_IO_2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPA5\"/>\n<wire x1=\"190.5\" y1=\"48.26\" x2=\"203.2\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<wire x1=\"33.02\" y1=\"154.94\" x2=\"12.7\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"12.7\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"PIN_ANALOG_IOEXP\" gate=\"A\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"E_SHDN1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB4\"/>\n<wire x1=\"129.54\" y1=\"27.94\" x2=\"144.78\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"27.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_SHDN2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB5\"/>\n<wire x1=\"129.54\" y1=\"25.4\" x2=\"144.78\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"25.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA5\"/>\n<wire x1=\"129.54\" y1=\"48.26\" x2=\"147.32\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA0\"/>\n<wire x1=\"129.54\" y1=\"60.96\" x2=\"142.24\" y2=\"60.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"60.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA1\"/>\n<wire x1=\"129.54\" y1=\"58.42\" x2=\"142.24\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"58.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA2\"/>\n<wire x1=\"129.54\" y1=\"55.88\" x2=\"142.24\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"55.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_GSW4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA3\"/>\n<wire x1=\"129.54\" y1=\"53.34\" x2=\"142.24\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"53.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_OVSAMP1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPA4\"/>\n<wire x1=\"147.32\" y1=\"50.8\" x2=\"129.54\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"50.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB0\"/>\n<wire x1=\"129.54\" y1=\"38.1\" x2=\"144.78\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB1\"/>\n<wire x1=\"129.54\" y1=\"35.56\" x2=\"144.78\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB2\"/>\n<wire x1=\"129.54\" y1=\"33.02\" x2=\"144.78\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"33.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_ACSW4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X20_BOT\" gate=\"G$1\" pin=\"GPB3\"/>\n<wire x1=\"129.54\" y1=\"30.48\" x2=\"144.78\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"30.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"5VINFROMUSB\" class=\"3\">\n<segment>\n<wire x1=\"228.6\" y1=\"48.26\" x2=\"254\" y2=\"48.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"231.14\" y=\"48.26\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"5V\"/>\n<pinref part=\"S9\" gate=\"G$1\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"N$23\" class=\"0\">\n<segment>\n<pinref part=\"C_OSC1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"Y1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"289.56\" y1=\"53.34\" x2=\"289.56\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"289.56\" y1=\"55.88\" x2=\"287.02\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"289.56\" y1=\"55.88\" x2=\"294.64\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"289.56\" y=\"55.88\"/>\n<wire x1=\"294.64\" y1=\"55.88\" x2=\"299.72\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"55.88\" x2=\"322.58\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"XI\"/>\n<wire x1=\"322.58\" y1=\"55.88\" x2=\"330.2\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$31\" class=\"0\">\n<segment>\n<pinref part=\"C_OSC2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"Y1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"276.86\" y1=\"53.34\" x2=\"276.86\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"55.88\" x2=\"281.94\" y2=\"55.88\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"55.88\" x2=\"276.86\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"276.86\" y=\"55.88\"/>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"XO\"/>\n<wire x1=\"276.86\" y1=\"58.42\" x2=\"325.12\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"325.12\" y1=\"58.42\" x2=\"330.2\" y2=\"58.42\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$1\" class=\"0\">\n<segment>\n<pinref part=\"RLED4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED4\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"312.42\" y1=\"167.64\" x2=\"314.96\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$12\" class=\"0\">\n<segment>\n<pinref part=\"RLED3\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED3\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"312.42\" y1=\"177.8\" x2=\"314.96\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$13\" class=\"0\">\n<segment>\n<pinref part=\"RLED2\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED2\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"312.42\" y1=\"187.96\" x2=\"314.96\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$14\" class=\"0\">\n<segment>\n<pinref part=\"RLED1\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"LED1\" gate=\"G$1\" pin=\"C\"/>\n<wire x1=\"312.42\" y1=\"198.12\" x2=\"314.96\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"DPLUS\" class=\"0\">\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"D+\"/>\n<wire x1=\"330.2\" y1=\"50.8\" x2=\"317.5\" y2=\"50.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"317.5\" y=\"50.8\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n</segment>\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"D+\"/>\n<wire x1=\"228.6\" y1=\"43.18\" x2=\"241.3\" y2=\"43.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"231.14\" y=\"43.18\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n</segment>\n</net>\n<net name=\"DMINUS\" class=\"0\">\n<segment>\n<pinref part=\"U340G\" gate=\"G$1\" pin=\"D-\"/>\n<wire x1=\"330.2\" y1=\"53.34\" x2=\"317.5\" y2=\"53.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"317.5\" y=\"53.34\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n</segment>\n<segment>\n<pinref part=\"USB1\" gate=\"G$1\" pin=\"D-\"/>\n<wire x1=\"228.6\" y1=\"45.72\" x2=\"241.3\" y2=\"45.72\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"231.14\" y=\"45.72\" size=\"1.778\" layer=\"95\" font=\"vector\"/>\n</segment>\n</net>\n<net name=\"E_21_B0\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB0\"/>\n<wire x1=\"190.5\" y1=\"38.1\" x2=\"208.28\" y2=\"38.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"38.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B1\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB1\"/>\n<wire x1=\"190.5\" y1=\"35.56\" x2=\"208.28\" y2=\"35.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"35.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B2\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB2\"/>\n<wire x1=\"190.5\" y1=\"33.02\" x2=\"208.28\" y2=\"33.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"33.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B3\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB3\"/>\n<wire x1=\"190.5\" y1=\"30.48\" x2=\"208.28\" y2=\"30.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"30.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B4\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB4\"/>\n<wire x1=\"190.5\" y1=\"27.94\" x2=\"208.28\" y2=\"27.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"27.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B5\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB5\"/>\n<wire x1=\"190.5\" y1=\"25.4\" x2=\"208.28\" y2=\"25.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"25.4\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B6\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB6\"/>\n<wire x1=\"190.5\" y1=\"22.86\" x2=\"208.28\" y2=\"22.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"22.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_21_B7\" class=\"0\">\n<segment>\n<pinref part=\"IOEXPAND_0X21_TOP\" gate=\"G$1\" pin=\"GPB7\"/>\n<wire x1=\"190.5\" y1=\"20.32\" x2=\"208.28\" y2=\"20.32\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"20.32\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n<sheet>\n<description>ADCs &amp; Power</description>\n<plain>\n<wire x1=\"218.44\" y1=\"256.54\" x2=\"218.44\" y2=\"132.08\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"218.44\" y1=\"132.08\" x2=\"119.38\" y2=\"132.08\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"7.62\" y=\"251.46\" size=\"2.54\" layer=\"95\">ADCs</text>\n<wire x1=\"5.08\" y1=\"248.92\" x2=\"17.78\" y2=\"248.92\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"17.78\" y1=\"248.92\" x2=\"17.78\" y2=\"256.54\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"5.08\" y1=\"132.08\" x2=\"119.38\" y2=\"132.08\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"119.38\" y1=\"132.08\" x2=\"119.38\" y2=\"55.88\" width=\"0.1524\" layer=\"95\"/>\n<wire x1=\"119.38\" y1=\"55.88\" x2=\"5.08\" y2=\"55.88\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"7.62\" y=\"127\" size=\"2.54\" layer=\"95\">Power regulation and decoupling</text>\n<wire x1=\"5.08\" y1=\"124.46\" x2=\"76.2\" y2=\"124.46\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"76.2\" y1=\"124.46\" x2=\"76.2\" y2=\"132.08\" width=\"0.1524\" layer=\"97\"/>\n<wire x1=\"5.08\" y1=\"91.44\" x2=\"106.68\" y2=\"91.44\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"109.22\" y=\"127\" size=\"2.54\" layer=\"97\" font=\"vector\">3V3</text>\n<text x=\"109.22\" y=\"86.36\" size=\"2.54\" layer=\"97\" font=\"vector\">VCCA</text>\n<wire x1=\"106.68\" y1=\"91.44\" x2=\"119.38\" y2=\"91.44\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"119.38\" y1=\"83.82\" x2=\"106.68\" y2=\"83.82\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"106.68\" y1=\"83.82\" x2=\"106.68\" y2=\"91.44\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"119.38\" y1=\"124.46\" x2=\"106.68\" y2=\"124.46\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"106.68\" y1=\"124.46\" x2=\"106.68\" y2=\"132.08\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"109.22\" y1=\"132.08\" x2=\"109.22\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"109.22\" y1=\"248.92\" x2=\"109.22\" y2=\"256.54\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"81.28\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 1+2</text>\n<text x=\"193.04\" y=\"251.46\" size=\"2.54\" layer=\"97\" font=\"vector\">Channel 3+4</text>\n<wire x1=\"78.74\" y1=\"256.54\" x2=\"78.74\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"78.74\" y1=\"248.92\" x2=\"109.22\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"190.5\" y1=\"256.54\" x2=\"190.5\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<wire x1=\"190.5\" y1=\"248.92\" x2=\"218.44\" y2=\"248.92\" width=\"0.1524\" layer=\"97\" style=\"shortdash\"/>\n<text x=\"5.08\" y=\"50.8\" size=\"2.54\" layer=\"97\" font=\"vector\">Misc.</text>\n<wire x1=\"119.38\" y1=\"55.88\" x2=\"119.38\" y2=\"5.08\" width=\"0.1524\" layer=\"97\"/>\n<text x=\"66.04\" y=\"226.06\" size=\"1.778\" layer=\"91\">Note that the two ADCs have separate \nclocks (32 and 33), which can be \n50% out of phase, for oversampling.</text>\n<text x=\"83.82\" y=\"167.64\" size=\"1.778\" layer=\"91\">SHDN is used to turn\noff the ADCs when \ninactive, to save power</text>\n<text x=\"86.36\" y=\"187.96\" size=\"1.778\" layer=\"91\">SDIN/SCLK,CS\nis the SPI interface</text>\n<text x=\"15.24\" y=\"193.04\" size=\"1.778\" layer=\"91\">Dual 8-bit \nADC outputs</text>\n<text x=\"114.3\" y=\"165.1\" size=\"1.778\" layer=\"91\">Inputs to this ADC\nare from the \noversampling switches</text>\n<text x=\"22.352\" y=\"92.964\" size=\"1.778\" layer=\"91\">For reducing noise on the power.\nThe inductor helps reduce low-freq\nnoise on the USB 5V power input.</text>\n<text x=\"22.352\" y=\"57.404\" size=\"1.778\" layer=\"91\">Separate 3.3V power rail for the\nanalog components, so noise from\nFPGA etc. doesn't get into ADCs.</text>\n</plain>\n<instances>\n<instance part=\"GND4\" gate=\"1\" x=\"33.02\" y=\"144.78\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"30.48\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CREF1\" gate=\"G$1\" x=\"81.28\" y=\"154.94\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"81.28\" y=\"154.94\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"82.804\" y=\"155.321\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"82.804\" y=\"150.241\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND5\" gate=\"1\" x=\"81.28\" y=\"144.78\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"78.74\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN1\" gate=\"G$1\" x=\"10.16\" y=\"147.32\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"10.16\" y=\"147.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.684\" y=\"147.701\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.684\" y=\"142.621\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND12\" gate=\"1\" x=\"10.16\" y=\"137.16\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"7.62\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"IC1\" gate=\"M\" x=\"58.42\" y=\"182.88\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"58.42\" y=\"182.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"43.18\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"43.18\" y=\"144.78\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND32\" gate=\"1\" x=\"81.28\" y=\"190.5\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"78.74\" y=\"187.96\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C0DD2_A\" gate=\"G$1\" x=\"22.86\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"22.86\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"24.384\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"24.384\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND33\" gate=\"1\" x=\"22.86\" y=\"228.6\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"20.32\" y=\"226.06\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN2\" gate=\"G$1\" x=\"20.32\" y=\"147.32\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"20.32\" y=\"147.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"21.844\" y=\"147.701\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"21.844\" y=\"142.621\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND1\" gate=\"1\" x=\"20.32\" y=\"137.16\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"17.78\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND2\" gate=\"1\" x=\"142.24\" y=\"144.78\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"139.7\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CREF2\" gate=\"G$1\" x=\"190.5\" y=\"154.94\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"190.5\" y=\"154.94\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"192.024\" y=\"155.321\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"192.024\" y=\"150.241\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND3\" gate=\"1\" x=\"190.5\" y=\"144.78\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"187.96\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN3\" gate=\"G$1\" x=\"116.84\" y=\"147.32\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"116.84\" y=\"147.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"118.364\" y=\"147.701\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"118.364\" y=\"142.621\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"IC2\" gate=\"M\" x=\"167.64\" y=\"182.88\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"167.64\" y=\"182.88\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"152.4\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"152.4\" y=\"144.78\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND10\" gate=\"1\" x=\"190.5\" y=\"190.5\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"187.96\" y=\"187.96\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C0DD2_B\" gate=\"G$1\" x=\"129.54\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"129.54\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"131.064\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"131.064\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C-AIN4\" gate=\"G$1\" x=\"129.54\" y=\"147.32\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"129.54\" y=\"147.32\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"131.064\" y=\"147.701\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"131.064\" y=\"142.621\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND37\" gate=\"1\" x=\"129.54\" y=\"137.16\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"127\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V16\" gate=\"G$1\" x=\"22.86\" y=\"251.46\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"20.32\" y=\"254\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND36\" gate=\"1\" x=\"91.44\" y=\"144.78\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"88.9\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND38\" gate=\"1\" x=\"200.66\" y=\"144.78\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"198.12\" y=\"142.24\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CADD1_A\" gate=\"G$1\" x=\"40.64\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"40.64\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"42.164\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"42.164\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C0DD1_A\" gate=\"G$1\" x=\"10.16\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"10.16\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"11.684\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"11.684\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CADD2_A\" gate=\"G$1\" x=\"53.34\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"53.34\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"54.864\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"54.864\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CADD1_B\" gate=\"G$1\" x=\"147.32\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"148.844\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"148.844\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CADD2_B\" gate=\"G$1\" x=\"160.02\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"160.02\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"161.544\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"161.544\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CODD1_B\" gate=\"G$1\" x=\"116.84\" y=\"241.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"116.84\" y=\"241.3\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"118.364\" y=\"241.681\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"118.364\" y=\"236.601\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V21\" gate=\"G$1\" x=\"129.54\" y=\"251.46\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"127\" y=\"254\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"U$9\" gate=\"G$1\" x=\"160.02\" y=\"248.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"160.02\" y=\"251.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"U$11\" gate=\"G$1\" x=\"53.34\" y=\"248.92\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"53.34\" y=\"251.714\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"+3V11\" gate=\"G$1\" x=\"83.82\" y=\"220.98\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"81.28\" y=\"223.52\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND25\" gate=\"1\" x=\"53.34\" y=\"228.6\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"50.8\" y=\"226.06\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$12\" gate=\"G$1\" x=\"30.48\" y=\"170.18\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"30.48\" y=\"172.974\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"GND11\" gate=\"1\" x=\"129.54\" y=\"228.6\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"127\" y=\"226.06\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND49\" gate=\"1\" x=\"160.02\" y=\"228.6\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"157.48\" y=\"226.06\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND6\" gate=\"1\" x=\"116.84\" y=\"137.16\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"114.3\" y=\"134.62\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$10\" gate=\"G$1\" x=\"139.7\" y=\"170.18\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"139.7\" y=\"172.974\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"+3V12\" gate=\"G$1\" x=\"193.04\" y=\"220.98\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"190.5\" y=\"223.52\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"FRAME3\" gate=\"G$1\" x=\"0\" y=\"0\" smashed=\"yes\">\n<attribute name=\"DRAWING_NAME\" x=\"344.17\" y=\"15.24\" size=\"2.54\" layer=\"94\"/>\n<attribute name=\"LAST_DATE_TIME\" x=\"344.17\" y=\"10.16\" size=\"2.286\" layer=\"94\"/>\n<attribute name=\"SHEET\" x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\"/>\n</instance>\n<instance part=\"P+3\" gate=\"1\" x=\"17.78\" y=\"119.38\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"121.92\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CP5\" gate=\"G$1\" x=\"48.26\" y=\"109.22\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"48.26\" y=\"109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"49.276\" y=\"109.855\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"49.276\" y=\"105.029\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP6\" gate=\"G$1\" x=\"93.98\" y=\"106.68\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"104.14\" y=\"106.68\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"94.996\" y=\"107.315\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"94.996\" y=\"102.489\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"+3V1\" gate=\"G$1\" x=\"93.98\" y=\"119.38\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"91.44\" y=\"121.92\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND14\" gate=\"1\" x=\"78.74\" y=\"96.52\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"76.2\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"REG\" gate=\"G$1\" x=\"78.74\" y=\"114.3\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"68.58\" y=\"119.38\" size=\"1.27\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"71.12\" y=\"121.92\" size=\"1.27\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"76.2\" y=\"121.92\" size=\"1.27\" layer=\"96\"/>\n</instance>\n<instance part=\"CP1\" gate=\"G$1\" x=\"55.88\" y=\"109.22\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"55.88\" y=\"109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"57.404\" y=\"109.601\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"57.404\" y=\"104.521\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP2\" gate=\"G$1\" x=\"63.5\" y=\"109.22\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"63.5\" y=\"109.22\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"65.024\" y=\"109.601\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"65.024\" y=\"104.521\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C_5V_10NF\" gate=\"G$1\" x=\"27.94\" y=\"106.68\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MFN\" x=\"27.94\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"28.956\" y=\"111.125\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"28.956\" y=\"105.791\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND45\" gate=\"1\" x=\"17.78\" y=\"96.52\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"P+5\" gate=\"1\" x=\"17.78\" y=\"83.82\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"R90\"/>\n</instance>\n<instance part=\"CP3\" gate=\"G$1\" x=\"48.26\" y=\"73.66\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"48.26\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"49.276\" y=\"74.295\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"49.276\" y=\"69.469\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP4\" gate=\"G$1\" x=\"93.98\" y=\"73.66\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"104.14\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"94.996\" y=\"74.295\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"94.996\" y=\"69.469\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND75\" gate=\"1\" x=\"78.74\" y=\"60.96\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"76.2\" y=\"58.42\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"REG1\" gate=\"G$1\" x=\"78.74\" y=\"78.74\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"68.58\" y=\"83.82\" size=\"1.27\" layer=\"96\" display=\"both\"/>\n<attribute name=\"NAME\" x=\"71.12\" y=\"86.36\" size=\"1.27\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"78.74\" y=\"86.36\" size=\"1.27\" layer=\"96\"/>\n</instance>\n<instance part=\"CP7\" gate=\"G$1\" x=\"55.88\" y=\"73.66\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"55.88\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"57.404\" y=\"74.041\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"57.404\" y=\"68.961\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP8\" gate=\"G$1\" x=\"63.5\" y=\"73.66\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"63.5\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"65.024\" y=\"74.041\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"65.024\" y=\"68.961\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"L1\" gate=\"G$1\" x=\"38.1\" y=\"114.3\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"38.1\" y=\"114.3\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"33.02\" y=\"116.84\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"116.84\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP9\" gate=\"G$1\" x=\"101.6\" y=\"73.66\" smashed=\"yes\">\n<attribute name=\"MPN\" x=\"101.6\" y=\"73.66\" size=\"1.778\" layer=\"96\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"103.124\" y=\"74.041\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"103.124\" y=\"68.961\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"U$1\" gate=\"G$1\" x=\"101.6\" y=\"81.28\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"101.6\" y=\"84.074\" size=\"1.778\" layer=\"96\" align=\"bottom-center\"/>\n</instance>\n<instance part=\"L2\" gate=\"G$1\" x=\"38.1\" y=\"78.74\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" x=\"38.1\" y=\"78.74\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"33.02\" y=\"81.28\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"38.1\" y=\"81.28\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"C_5V_10NF1\" gate=\"G$1\" x=\"27.94\" y=\"71.12\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MFN\" x=\"27.94\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"28.956\" y=\"75.565\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"28.956\" y=\"70.231\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND76\" gate=\"1\" x=\"17.78\" y=\"60.96\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"15.24\" y=\"58.42\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"CP10\" gate=\"G$1\" x=\"17.78\" y=\"71.12\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"17.78\" y=\"71.12\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"19.304\" y=\"70.739\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"19.304\" y=\"75.819\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"CP11\" gate=\"G$1\" x=\"17.78\" y=\"106.68\" smashed=\"yes\" rot=\"MR180\">\n<attribute name=\"MPN\" x=\"17.78\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"MR180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"19.304\" y=\"106.299\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<attribute name=\"VALUE\" x=\"19.304\" y=\"111.379\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"RLEDPOW\" gate=\"G$1\" x=\"106.68\" y=\"106.68\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"OC_NEWARK\" x=\"106.68\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MF\" x=\"106.68\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"106.68\" y=\"106.68\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"107.95\" y=\"108.1786\" size=\"1.778\" layer=\"95\"/>\n<attribute name=\"VALUE\" x=\"107.95\" y=\"103.378\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"LEDPOW\" gate=\"G$1\" x=\"99.06\" y=\"114.3\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"OC_NEWARK\" x=\"99.06\" y=\"114.3\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MF\" x=\"99.06\" y=\"114.3\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"MPN\" x=\"99.06\" y=\"114.3\" size=\"1.778\" layer=\"96\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"106.172\" y=\"117.856\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n</instance>\n<instance part=\"GND50\" gate=\"1\" x=\"63.5\" y=\"96.52\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND51\" gate=\"1\" x=\"93.98\" y=\"96.52\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"91.44\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND52\" gate=\"1\" x=\"106.68\" y=\"96.52\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"104.14\" y=\"93.98\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND53\" gate=\"1\" x=\"101.6\" y=\"60.96\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"99.06\" y=\"58.42\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GND54\" gate=\"1\" x=\"63.5\" y=\"60.96\" smashed=\"yes\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"58.42\" size=\"1.778\" layer=\"96\"/>\n</instance>\n<instance part=\"GOLD_ORB_SM1\" gate=\"G$1\" x=\"15.24\" y=\"38.1\" smashed=\"yes\"/>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"GND\" class=\"1\">\n<segment>\n<pinref part=\"CREF1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND5\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"81.28\" y1=\"147.32\" x2=\"81.28\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"GND\"/>\n<pinref part=\"GND4\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"33.02\" y1=\"147.32\" x2=\"33.02\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"33.02\" y1=\"170.18\" x2=\"38.1\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CLK-\"/>\n<pinref part=\"GND32\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"78.74\" y1=\"208.28\" x2=\"81.28\" y2=\"208.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"81.28\" y1=\"208.28\" x2=\"81.28\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"CREF2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND3\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"190.5\" y1=\"147.32\" x2=\"190.5\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"GND\"/>\n<pinref part=\"GND2\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"142.24\" y1=\"147.32\" x2=\"142.24\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"142.24\" y1=\"170.18\" x2=\"144.78\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"170.18\" x2=\"147.32\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CLK-\"/>\n<pinref part=\"GND10\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"187.96\" y1=\"208.28\" x2=\"190.5\" y2=\"208.28\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"190.5\" y1=\"208.28\" x2=\"190.5\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN1\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND12\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"10.16\" y1=\"139.7\" x2=\"10.16\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN2\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND1\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"20.32\" y1=\"139.7\" x2=\"20.32\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"C-AIN4\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND37\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"129.54\" y1=\"142.24\" x2=\"129.54\" y2=\"139.7\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SPEN\"/>\n<pinref part=\"GND38\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"200.66\" y1=\"147.32\" x2=\"200.66\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"165.1\" x2=\"187.96\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SPEN\"/>\n<pinref part=\"GND36\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"91.44\" y1=\"147.32\" x2=\"91.44\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"91.44\" y1=\"165.1\" x2=\"78.74\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND33\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"22.86\" y1=\"233.68\" x2=\"22.86\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"233.68\" x2=\"22.86\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD1_A\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"10.16\" y1=\"233.68\" x2=\"10.16\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD2_A\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"22.86\" y1=\"236.22\" x2=\"22.86\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"233.68\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_A\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"40.64\" y1=\"236.22\" x2=\"40.64\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CADD2_A\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"40.64\" y1=\"233.68\" x2=\"53.34\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"53.34\" y1=\"233.68\" x2=\"53.34\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND25\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"53.34\" y1=\"231.14\" x2=\"53.34\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"53.34\" y=\"233.68\"/>\n</segment>\n<segment>\n<pinref part=\"CODD1_B\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"116.84\" y1=\"236.22\" x2=\"116.84\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD2_B\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"116.84\" y1=\"233.68\" x2=\"129.54\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"129.54\" y1=\"233.68\" x2=\"129.54\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"129.54\" y1=\"233.68\" x2=\"129.54\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"129.54\" y=\"233.68\"/>\n<pinref part=\"GND11\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_B\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"236.22\" x2=\"147.32\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CADD2_B\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"147.32\" y1=\"233.68\" x2=\"160.02\" y2=\"233.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"160.02\" y1=\"233.68\" x2=\"160.02\" y2=\"236.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"160.02\" y1=\"233.68\" x2=\"160.02\" y2=\"231.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"160.02\" y=\"233.68\"/>\n<pinref part=\"GND49\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"GND6\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"C-AIN3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"116.84\" y1=\"139.7\" x2=\"116.84\" y2=\"142.24\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND75\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"GND\"/>\n<junction x=\"78.74\" y=\"71.12\"/>\n<wire x1=\"78.74\" y1=\"71.12\" x2=\"78.74\" y2=\"63.5\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"CP11\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"GND45\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"17.78\" y1=\"104.14\" x2=\"17.78\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C_5V_10NF\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"17.78\" y1=\"101.6\" x2=\"17.78\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"104.14\" x2=\"27.94\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"101.6\" x2=\"17.78\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"17.78\" y=\"101.6\"/>\n</segment>\n<segment>\n<pinref part=\"REG\" gate=\"G$1\" pin=\"GND\"/>\n<pinref part=\"GND14\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"78.74\" y1=\"99.06\" x2=\"78.74\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"CP5\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"48.26\" y1=\"104.14\" x2=\"48.26\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP1\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"104.14\" x2=\"55.88\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"55.88\" y1=\"101.6\" x2=\"48.26\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP2\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"63.5\" y1=\"104.14\" x2=\"63.5\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"101.6\" x2=\"55.88\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"55.88\" y=\"101.6\"/>\n<pinref part=\"GND50\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"63.5\" y1=\"99.06\" x2=\"63.5\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"101.6\"/>\n</segment>\n<segment>\n<pinref part=\"CP6\" gate=\"G$1\" pin=\"2\"/>\n<pinref part=\"GND51\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"93.98\" y1=\"99.06\" x2=\"93.98\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"RLEDPOW\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"106.68\" y1=\"99.06\" x2=\"106.68\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND52\" gate=\"1\" pin=\"GND\"/>\n</segment>\n<segment>\n<pinref part=\"C_5V_10NF1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"27.94\" y1=\"68.58\" x2=\"27.94\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"27.94\" y1=\"66.04\" x2=\"17.78\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP10\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"17.78\" y1=\"66.04\" x2=\"17.78\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND76\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"17.78\" y1=\"63.5\" x2=\"17.78\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"17.78\" y=\"66.04\"/>\n</segment>\n<segment>\n<pinref part=\"CP9\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"101.6\" y1=\"68.58\" x2=\"101.6\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"66.04\" x2=\"93.98\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP4\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"93.98\" y1=\"66.04\" x2=\"93.98\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"GND53\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"101.6\" y1=\"63.5\" x2=\"101.6\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"66.04\"/>\n</segment>\n<segment>\n<pinref part=\"CP3\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"48.26\" y1=\"68.58\" x2=\"48.26\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"48.26\" y1=\"66.04\" x2=\"55.88\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP7\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"66.04\" x2=\"55.88\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP8\" gate=\"G$1\" pin=\"2\"/>\n<wire x1=\"55.88\" y1=\"66.04\" x2=\"63.5\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"66.04\" x2=\"63.5\" y2=\"68.58\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"55.88\" y=\"66.04\"/>\n<pinref part=\"GND54\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"63.5\" y1=\"63.5\" x2=\"63.5\" y2=\"66.04\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"66.04\"/>\n</segment>\n</net>\n<net name=\"+3V3\" class=\"2\">\n<segment>\n<wire x1=\"22.86\" y1=\"248.92\" x2=\"22.86\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V16\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"10.16\" y1=\"246.38\" x2=\"22.86\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD1_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"10.16\" y1=\"243.84\" x2=\"10.16\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C0DD2_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"22.86\" y1=\"243.84\" x2=\"22.86\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"22.86\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"OVDD1\"/>\n<wire x1=\"78.74\" y1=\"205.74\" x2=\"83.82\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"83.82\" y1=\"205.74\" x2=\"83.82\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"OVDD2\"/>\n<wire x1=\"83.82\" y1=\"203.2\" x2=\"78.74\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"+3V11\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"83.82\" y1=\"205.74\" x2=\"83.82\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"83.82\" y=\"205.74\"/>\n</segment>\n<segment>\n<pinref part=\"C0DD2_B\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"+3V21\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"129.54\" y1=\"248.92\" x2=\"129.54\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CODD1_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"129.54\" y1=\"246.38\" x2=\"129.54\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"116.84\" y1=\"243.84\" x2=\"116.84\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"116.84\" y1=\"246.38\" x2=\"129.54\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"129.54\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"OVDD2\"/>\n<wire x1=\"187.96\" y1=\"203.2\" x2=\"193.04\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"193.04\" y1=\"203.2\" x2=\"193.04\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"OVDD1\"/>\n<wire x1=\"187.96\" y1=\"205.74\" x2=\"193.04\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"193.04\" y1=\"205.74\" x2=\"193.04\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"193.04\" y=\"205.74\"/>\n<pinref part=\"+3V12\" gate=\"G$1\" pin=\"+3V3\"/>\n</segment>\n<segment>\n<pinref part=\"+3V1\" gate=\"G$1\" pin=\"+3V3\"/>\n<wire x1=\"93.98\" y1=\"116.84\" x2=\"93.98\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP6\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"93.98\" y1=\"109.22\" x2=\"93.98\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"REG\" gate=\"G$1\" pin=\"OUT\"/>\n<wire x1=\"93.98\" y1=\"114.3\" x2=\"90.17\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"114.3\"/>\n<pinref part=\"LEDPOW\" gate=\"G$1\" pin=\"A\"/>\n<wire x1=\"96.52\" y1=\"114.3\" x2=\"93.98\" y2=\"114.3\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"114.3\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_33\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CLK+\"/>\n<wire x1=\"187.96\" y1=\"210.82\" x2=\"195.58\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"210.82\" x2=\"210.82\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D1A\"/>\n<wire x1=\"147.32\" y1=\"213.36\" x2=\"139.7\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D2A\"/>\n<wire x1=\"147.32\" y1=\"210.82\" x2=\"139.7\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D3A\"/>\n<wire x1=\"147.32\" y1=\"208.28\" x2=\"139.7\" y2=\"208.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"208.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D4A\"/>\n<wire x1=\"147.32\" y1=\"205.74\" x2=\"139.7\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"205.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D5A\"/>\n<wire x1=\"147.32\" y1=\"203.2\" x2=\"139.7\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"203.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D6A\"/>\n<wire x1=\"147.32\" y1=\"200.66\" x2=\"139.7\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"200.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D0A\"/>\n<wire x1=\"147.32\" y1=\"215.9\" x2=\"139.7\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"215.9\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7C\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D7A\"/>\n<wire x1=\"147.32\" y1=\"198.12\" x2=\"139.7\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D0B\"/>\n<wire x1=\"147.32\" y1=\"193.04\" x2=\"139.7\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"193.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D1B\"/>\n<wire x1=\"147.32\" y1=\"190.5\" x2=\"139.7\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"190.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D2B\"/>\n<wire x1=\"147.32\" y1=\"187.96\" x2=\"139.7\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"187.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D3B\"/>\n<wire x1=\"147.32\" y1=\"185.42\" x2=\"139.7\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"185.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D4B\"/>\n<wire x1=\"147.32\" y1=\"182.88\" x2=\"139.7\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D5B\"/>\n<wire x1=\"147.32\" y1=\"180.34\" x2=\"139.7\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"180.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D6B\"/>\n<wire x1=\"147.32\" y1=\"177.8\" x2=\"139.7\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"177.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7D\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"D7B\"/>\n<wire x1=\"147.32\" y1=\"175.26\" x2=\"139.7\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"142.24\" y=\"175.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"REF1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"REFIO\"/>\n<pinref part=\"CREF1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"81.28\" y1=\"157.48\" x2=\"81.28\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"81.28\" y1=\"162.56\" x2=\"78.74\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"INA-1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CMA\"/>\n<wire x1=\"38.1\" y1=\"162.56\" x2=\"35.56\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INA-\"/>\n<wire x1=\"38.1\" y1=\"157.48\" x2=\"35.56\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"35.56\" y1=\"162.56\" x2=\"35.56\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"C-AIN1\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"35.56\" y1=\"162.56\" x2=\"10.16\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"10.16\" y1=\"162.56\" x2=\"10.16\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"35.56\" y=\"162.56\"/>\n</segment>\n</net>\n<net name=\"LOW_22\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CS/OUTSEL\"/>\n<wire x1=\"78.74\" y1=\"195.58\" x2=\"96.52\" y2=\"195.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"195.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CS/OUTSEL\"/>\n<wire x1=\"187.96\" y1=\"195.58\" x2=\"195.58\" y2=\"195.58\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"195.58\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LOW_24\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SCLK/DIV\"/>\n<wire x1=\"78.74\" y1=\"198.12\" x2=\"96.52\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SCLK/DIV\"/>\n<wire x1=\"187.96\" y1=\"198.12\" x2=\"195.58\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"LOW_25\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SDIN/FORMAT\"/>\n<wire x1=\"78.74\" y1=\"200.66\" x2=\"96.52\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"200.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SDIN/FORMAT\"/>\n<wire x1=\"187.96\" y1=\"200.66\" x2=\"195.58\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"200.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"REF2\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"REFIO\"/>\n<pinref part=\"CREF2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"190.5\" y1=\"157.48\" x2=\"190.5\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"190.5\" y1=\"162.56\" x2=\"187.96\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"D0A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D0A\"/>\n<wire x1=\"30.48\" y1=\"215.9\" x2=\"38.1\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"215.9\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D1A\"/>\n<wire x1=\"30.48\" y1=\"213.36\" x2=\"38.1\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D2A\"/>\n<wire x1=\"38.1\" y1=\"210.82\" x2=\"30.48\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D3A\"/>\n<wire x1=\"38.1\" y1=\"208.28\" x2=\"30.48\" y2=\"208.28\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"208.28\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D4A\"/>\n<wire x1=\"38.1\" y1=\"205.74\" x2=\"30.48\" y2=\"205.74\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"205.74\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D5A\"/>\n<wire x1=\"38.1\" y1=\"203.2\" x2=\"30.48\" y2=\"203.2\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"203.2\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D6A\"/>\n<wire x1=\"38.1\" y1=\"200.66\" x2=\"30.48\" y2=\"200.66\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"200.66\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7A\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D7A\"/>\n<wire x1=\"38.1\" y1=\"198.12\" x2=\"30.48\" y2=\"198.12\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"198.12\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D0B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D0B\"/>\n<wire x1=\"38.1\" y1=\"193.04\" x2=\"30.48\" y2=\"193.04\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"193.04\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D1B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D1B\"/>\n<wire x1=\"38.1\" y1=\"190.5\" x2=\"30.48\" y2=\"190.5\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"190.5\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D2B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D2B\"/>\n<wire x1=\"38.1\" y1=\"187.96\" x2=\"30.48\" y2=\"187.96\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"187.96\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D3B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D3B\"/>\n<wire x1=\"38.1\" y1=\"185.42\" x2=\"30.48\" y2=\"185.42\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"185.42\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D4B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D4B\"/>\n<wire x1=\"38.1\" y1=\"182.88\" x2=\"30.48\" y2=\"182.88\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"182.88\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D5B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D5B\"/>\n<wire x1=\"38.1\" y1=\"180.34\" x2=\"30.48\" y2=\"180.34\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"180.34\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D6B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D6B\"/>\n<wire x1=\"38.1\" y1=\"177.8\" x2=\"30.48\" y2=\"177.8\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"177.8\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"D7B\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"D7B\"/>\n<wire x1=\"38.1\" y1=\"175.26\" x2=\"30.48\" y2=\"175.26\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"30.48\" y=\"175.26\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INB1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INB+\"/>\n<wire x1=\"22.86\" y1=\"154.94\" x2=\"38.1\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"22.86\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INA1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INA+\"/>\n<wire x1=\"22.86\" y1=\"160.02\" x2=\"38.1\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"22.86\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"CLKOUT_32\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CLK+\"/>\n<wire x1=\"78.74\" y1=\"210.82\" x2=\"86.36\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"86.36\" y1=\"210.82\" x2=\"101.6\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INB-1\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"INB-\"/>\n<pinref part=\"C-AIN2\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"38.1\" y1=\"152.4\" x2=\"35.56\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"CMB\"/>\n<wire x1=\"35.56\" y1=\"152.4\" x2=\"20.32\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"20.32\" y1=\"152.4\" x2=\"20.32\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"38.1\" y1=\"149.86\" x2=\"35.56\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"35.56\" y1=\"149.86\" x2=\"35.56\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"35.56\" y=\"152.4\"/>\n</segment>\n</net>\n<net name=\"INB-2\" class=\"0\">\n<segment>\n<pinref part=\"C-AIN4\" gate=\"G$1\" pin=\"1\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INB-\"/>\n<wire x1=\"129.54\" y1=\"149.86\" x2=\"129.54\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"129.54\" y1=\"152.4\" x2=\"144.78\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"CMB\"/>\n<wire x1=\"144.78\" y1=\"152.4\" x2=\"147.32\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"149.86\" x2=\"144.78\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"149.86\" x2=\"144.78\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"144.78\" y=\"152.4\"/>\n</segment>\n</net>\n<net name=\"INA12\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INA+\"/>\n<wire x1=\"132.08\" y1=\"160.02\" x2=\"147.32\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"INB12\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INB+\"/>\n<wire x1=\"147.32\" y1=\"154.94\" x2=\"132.08\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"E_SHDN1\" class=\"0\">\n<segment>\n<wire x1=\"106.68\" y1=\"160.02\" x2=\"78.74\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"93.98\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SHDN\"/>\n</segment>\n</net>\n<net name=\"L120_SYNC\" class=\"0\">\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"SYNC\"/>\n<wire x1=\"78.74\" y1=\"213.36\" x2=\"101.6\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"86.36\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SYNC\"/>\n<wire x1=\"187.96\" y1=\"213.36\" x2=\"210.82\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"195.58\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"VCCA\" class=\"2\">\n<segment>\n<pinref part=\"U$11\" gate=\"G$1\" pin=\"VCCA\"/>\n<pinref part=\"CADD2_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"53.34\" y1=\"248.92\" x2=\"53.34\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CADD1_A\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"53.34\" y1=\"246.38\" x2=\"53.34\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"243.84\" x2=\"40.64\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"246.38\" x2=\"53.34\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"53.34\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"CADD1_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"147.32\" y1=\"243.84\" x2=\"147.32\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"246.38\" x2=\"160.02\" y2=\"246.38\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CADD2_B\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"160.02\" y1=\"246.38\" x2=\"160.02\" y2=\"243.84\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$9\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"160.02\" y1=\"246.38\" x2=\"160.02\" y2=\"248.92\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"160.02\" y=\"246.38\"/>\n</segment>\n<segment>\n<pinref part=\"IC1\" gate=\"M\" pin=\"AVDD2\"/>\n<wire x1=\"38.1\" y1=\"165.1\" x2=\"35.56\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC1\" gate=\"M\" pin=\"AVDD1\"/>\n<wire x1=\"38.1\" y1=\"167.64\" x2=\"35.56\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"35.56\" y1=\"167.64\" x2=\"35.56\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$12\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"35.56\" y1=\"167.64\" x2=\"30.48\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"30.48\" y1=\"167.64\" x2=\"30.48\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"35.56\" y=\"167.64\"/>\n</segment>\n<segment>\n<pinref part=\"U$10\" gate=\"G$1\" pin=\"VCCA\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"AVDD1\"/>\n<wire x1=\"139.7\" y1=\"167.64\" x2=\"139.7\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"167.64\" x2=\"144.78\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"AVDD2\"/>\n<wire x1=\"144.78\" y1=\"167.64\" x2=\"139.7\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"147.32\" y1=\"165.1\" x2=\"144.78\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"165.1\" x2=\"144.78\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"144.78\" y=\"167.64\"/>\n</segment>\n<segment>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"OUT\"/>\n<wire x1=\"90.17\" y1=\"78.74\" x2=\"93.98\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"CP9\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"93.98\" y1=\"78.74\" x2=\"101.6\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"101.6\" y1=\"78.74\" x2=\"101.6\" y2=\"76.2\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"U$1\" gate=\"G$1\" pin=\"VCCA\"/>\n<wire x1=\"101.6\" y1=\"81.28\" x2=\"101.6\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"101.6\" y=\"78.74\"/>\n<pinref part=\"CP4\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"93.98\" y1=\"76.2\" x2=\"93.98\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"78.74\"/>\n</segment>\n</net>\n<net name=\"E_SHDN2\" class=\"0\">\n<segment>\n<wire x1=\"205.74\" y1=\"160.02\" x2=\"215.9\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"160.02\" x2=\"195.58\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"160.02\" x2=\"187.96\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"203.2\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n<pinref part=\"IC2\" gate=\"M\" pin=\"SHDN\"/>\n</segment>\n</net>\n<net name=\"INA-2\" class=\"0\">\n<segment>\n<pinref part=\"IC2\" gate=\"M\" pin=\"INA-\"/>\n<wire x1=\"147.32\" y1=\"157.48\" x2=\"144.78\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"157.48\" x2=\"144.78\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref 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width=\"0.1524\" layer=\"91\"/>\n<junction x=\"48.26\" y=\"78.74\"/>\n<pinref part=\"CP8\" gate=\"G$1\" pin=\"1\"/>\n<wire x1=\"63.5\" y1=\"76.2\" x2=\"63.5\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"63.5\" y1=\"78.74\" x2=\"55.88\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"55.88\" y=\"78.74\"/>\n<pinref part=\"REG1\" gate=\"G$1\" pin=\"IN\"/>\n<wire x1=\"67.31\" y1=\"78.74\" x2=\"63.5\" y2=\"78.74\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"63.5\" y=\"78.74\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n</sheets>\n<errors>\n<approved hash=\"104,2,20.32,71.12,OSC,VDD,+3V3,,,\"/>\n<approved hash=\"202,2,45.72,60.96,OSC,TRI,,,,\"/>\n<approved hash=\"104,3,38.1,167.64,IC1,AVDD1,VCCA,,,\"/>\n<approved hash=\"104,3,38.1,165.1,IC1,AVDD2,VCCA,,,\"/>\n<approved hash=\"104,3,147.32,167.64,IC2,AVDD1,VCCA,,,\"/>\n<approved hash=\"104,3,147.32,165.1,IC2,AVDD2,VCCA,,,\"/>\n<approved hash=\"204,2,228.6,35.56,USB1,SLD,,,,\"/>\n<approved hash=\"104,1,10.16,119.38,GAINSW1P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,25.4,119.38,GAINSW2P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,200.66,119.38,GAINSW3P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,215.9,119.38,GAINSW4P,VCC,VCCA,,,\"/>\n<approved hash=\"104,2,104.14,60.96,IOEXPAND_0X20_BOT,VDD,+3V3,,,\"/>\n<approved hash=\"104,2,104.14,20.32,IOEXPAND_0X20_BOT,VSS,GND,,,\"/>\n<approved hash=\"104,2,165.1,60.96,IOEXPAND_0X21_TOP,VDD,+3V3,,,\"/>\n<approved hash=\"104,2,165.1,20.32,IOEXPAND_0X21_TOP,VSS,GND,,,\"/>\n<approved hash=\"104,1,58.42,119.38,OVSAMP1P,VCC,VCCA,,,\"/>\n<approved hash=\"104,1,248.92,119.38,OVSAMP2P,VCC,VCCA,,,\"/>\n<approved hash=\"113,2,193.571,130.071,FRAME1,,,,,\"/>\n<approved hash=\"113,1,193.571,130.071,FRAME2,,,,,\"/>\n<approved hash=\"113,3,193.571,130.071,FRAME3,,,,,\"/>\n</errors>\n</schematic>\n</drawing>\n<compatibility>\n<note version=\"6.3\" minversion=\"6.2.2\" severity=\"warning\">\nSince Version 6.2.2 text objects can contain more than one line,\nwhich will not be processed correctly with this version.\n</note>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/rack_backplane_v9.0.brd",
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name=\"2X08\"/>\n</packageinstances>\n</package3d>\n</packages3d>\n</library>\n<library name=\"oshw\">\n<description>&lt;p&gt;&lt;strong&gt;Open Source Hardware PCB Logos&lt;/strong&gt;\n&lt;p&gt;A simple polygon based version of the OSHWA logos for use on Eagle PCB's\n&lt;p&gt;For use please refer to the OSHWA definition at &lt;a href=\"http://www.oshwa.org/definition/\"&gt;http://www.oshwa.org/definition/&lt;/a&gt;\n&lt;p&gt;Based on the NBitWonder version (&lt;a href=\"http://nbitwonder.com\"&gt;http://nbitwonder.com&lt;/a&gt;)\n&lt;p&gt;&lt;strong&gt;Andrew Cooper&lt;/strong&gt;&lt;br&gt;28Nov2016&lt;br&gt;&lt;a href=\"http://www.darkerview.com\"&gt;www.DarkerView.com&lt;/a&gt;</description>\n<packages>\n<package name=\"OSHW_8MM\">\n<polygon width=\"0.0508\" layer=\"25\">\n<vertex x=\"-0.381\" y=\"-0.9906\" curve=\"-160.613168\"/>\n<vertex x=\"0\" y=\"1.0668\" curve=\"-162.088112\"/>\n<vertex x=\"0.4572\" y=\"-0.9906\"/>\n<vertex x=\"1.1176\" y=\"-2.6924\"/>\n<vertex x=\"1.2954\" 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drill=\"0\">\n</class>\n<class number=\"2\" name=\"three\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"3\" name=\"five\" width=\"0.381\" drill=\"0\">\n</class>\n<class number=\"4\" name=\"50ohm\" width=\"0.254\" drill=\"0\">\n<clearance class=\"0\" value=\"0.254\"/>\n<clearance class=\"1\" value=\"0.254\"/>\n<clearance class=\"2\" value=\"0.254\"/>\n<clearance class=\"3\" value=\"0.254\"/>\n<clearance class=\"4\" value=\"0.254\"/>\n</class>\n</classes>\n<designrules name=\"Seeed_AllPCB_MacroFab_haas6mil\">\n<description language=\"en\">\n\n\n\n\n\n\n&lt;b&gt;EAGLE Design Rules&lt;/b&gt;\n&lt;p&gt;\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name.\n</description>\n<param name=\"layerSetup\" value=\"(1*2*15*16)\"/>\n<param name=\"mtCopper\" value=\"0.035mm 0.0175mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.0175mm 0.035mm\"/>\n<param name=\"mtIsolate\" value=\"0.2mm 0.3mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm\"/>\n<param name=\"mdWireWire\" value=\"6mil\"/>\n<param name=\"mdWirePad\" value=\"6mil\"/>\n<param name=\"mdWireVia\" value=\"6mil\"/>\n<param name=\"mdPadPad\" value=\"6mil\"/>\n<param name=\"mdPadVia\" value=\"6mil\"/>\n<param name=\"mdViaVia\" value=\"6mil\"/>\n<param name=\"mdSmdPad\" value=\"0mil\"/>\n<param name=\"mdSmdVia\" value=\"0mil\"/>\n<param name=\"mdSmdSmd\" value=\"0mil\"/>\n<param name=\"mdViaViaSameLayer\" value=\"8mil\"/>\n<param name=\"mnLayersViaInSmd\" value=\"2\"/>\n<param name=\"mdCopperDimension\" value=\"6mil\"/>\n<param name=\"mdDrill\" value=\"6mil\"/>\n<param name=\"mdSmdStop\" value=\"0mil\"/>\n<param name=\"msWidth\" value=\"6mil\"/>\n<param name=\"msDrill\" value=\"12mil\"/>\n<param name=\"msMicroVia\" value=\"12mil\"/>\n<param name=\"msBlindViaRatio\" value=\"0.5\"/>\n<param name=\"rvPadTop\" value=\"0.25\"/>\n<param name=\"rvPadInner\" value=\"0.25\"/>\n<param name=\"rvPadBottom\" value=\"0.25\"/>\n<param name=\"rvViaOuter\" value=\"0.25\"/>\n<param name=\"rvViaInner\" value=\"0.25\"/>\n<param name=\"rvMicroViaOuter\" value=\"0.25\"/>\n<param name=\"rvMicroViaInner\" value=\"0.25\"/>\n<param name=\"rlMinPadTop\" value=\"6mil\"/>\n<param name=\"rlMaxPadTop\" value=\"20mil\"/>\n<param name=\"rlMinPadInner\" value=\"6mil\"/>\n<param name=\"rlMaxPadInner\" value=\"20mil\"/>\n<param name=\"rlMinPadBottom\" value=\"6mil\"/>\n<param name=\"rlMaxPadBottom\" value=\"20mil\"/>\n<param name=\"rlMinViaOuter\" value=\"6mil\"/>\n<param name=\"rlMaxViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinViaInner\" value=\"6mil\"/>\n<param name=\"rlMaxViaInner\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaOuter\" value=\"6mil\"/>\n<param name=\"rlMaxMicroViaOuter\" value=\"20mil\"/>\n<param name=\"rlMinMicroViaInner\" value=\"6mil\"/>\n<param name=\"rlMaxMicroViaInner\" value=\"20mil\"/>\n<param name=\"psTop\" value=\"-1\"/>\n<param name=\"psBottom\" value=\"-1\"/>\n<param name=\"psFirst\" value=\"-1\"/>\n<param name=\"psElongationLong\" value=\"100\"/>\n<param name=\"psElongationOffset\" value=\"100\"/>\n<param name=\"mvStopFrame\" value=\"1\"/>\n<param name=\"mvCreamFrame\" value=\"0\"/>\n<param name=\"mlMinStopFrame\" value=\"6mil\"/>\n<param name=\"mlMaxStopFrame\" value=\"6mil\"/>\n<param name=\"mlMinCreamFrame\" value=\"0mil\"/>\n<param name=\"mlMaxCreamFrame\" value=\"0mil\"/>\n<param name=\"mlViaStopLimit\" value=\"25mil\"/>\n<param name=\"srRoundness\" value=\"0\"/>\n<param name=\"srMinRoundness\" value=\"0mil\"/>\n<param name=\"srMaxRoundness\" value=\"0mil\"/>\n<param name=\"slThermalIsolate\" value=\"10mil\"/>\n<param name=\"slThermalsForVias\" value=\"0\"/>\n<param name=\"dpMaxLengthDifference\" value=\"10mm\"/>\n<param name=\"dpGapFactor\" value=\"2.5\"/>\n<param name=\"checkAngle\" value=\"0\"/>\n<param name=\"checkFont\" value=\"1\"/>\n<param name=\"checkRestrict\" value=\"1\"/>\n<param name=\"checkStop\" value=\"0\"/>\n<param name=\"checkValues\" value=\"0\"/>\n<param name=\"checkNames\" value=\"1\"/>\n<param name=\"checkWireStubs\" value=\"1\"/>\n<param name=\"checkPolygonWidth\" value=\"0\"/>\n<param name=\"useDiameter\" value=\"13\"/>\n<param name=\"maxErrors\" value=\"999999\"/>\n</designrules>\n<autorouter>\n<pass name=\"Default\">\n<param name=\"RoutingGrid\" value=\"0.1mm\"/>\n<param name=\"AutoGrid\" value=\"0\"/>\n<param name=\"Efforts\" value=\"1\"/>\n<param name=\"TopRouterVariant\" value=\"0\"/>\n<param name=\"tpViaShape\" value=\"round\"/>\n<param name=\"PrefDir.1\" value=\"*\"/>\n<param name=\"PrefDir.2\" value=\"*\"/>\n<param name=\"PrefDir.3\" value=\"0\"/>\n<param name=\"PrefDir.4\" value=\"0\"/>\n<param name=\"PrefDir.5\" value=\"0\"/>\n<param name=\"PrefDir.6\" value=\"0\"/>\n<param name=\"PrefDir.7\" value=\"0\"/>\n<param name=\"PrefDir.8\" value=\"0\"/>\n<param name=\"PrefDir.9\" value=\"0\"/>\n<param name=\"PrefDir.10\" value=\"0\"/>\n<param name=\"PrefDir.11\" value=\"0\"/>\n<param name=\"PrefDir.12\" value=\"0\"/>\n<param name=\"PrefDir.13\" value=\"0\"/>\n<param name=\"PrefDir.14\" value=\"0\"/>\n<param name=\"PrefDir.15\" value=\"*\"/>\n<param name=\"PrefDir.16\" value=\"*\"/>\n<param name=\"cfVia\" value=\"8\"/>\n<param name=\"cfNonPref\" value=\"5\"/>\n<param name=\"cfChangeDir\" value=\"2\"/>\n<param name=\"cfOrthStep\" value=\"2\"/>\n<param name=\"cfDiagStep\" value=\"3\"/>\n<param name=\"cfExtdStep\" value=\"0\"/>\n<param name=\"cfBonusStep\" value=\"1\"/>\n<param name=\"cfMalusStep\" value=\"1\"/>\n<param name=\"cfPadImpact\" value=\"4\"/>\n<param name=\"cfSmdImpact\" value=\"4\"/>\n<param name=\"cfBusImpact\" value=\"0\"/>\n<param name=\"cfHugging\" value=\"3\"/>\n<param name=\"cfAvoid\" value=\"4\"/>\n<param name=\"cfPolygon\" value=\"10\"/>\n<param name=\"cfBase.1\" value=\"1\"/>\n<param name=\"cfBase.2\" value=\"9\"/>\n<param name=\"cfBase.3\" value=\"1\"/>\n<param name=\"cfBase.4\" value=\"1\"/>\n<param name=\"cfBase.5\" value=\"1\"/>\n<param name=\"cfBase.6\" value=\"1\"/>\n<param name=\"cfBase.7\" value=\"1\"/>\n<param name=\"cfBase.8\" value=\"1\"/>\n<param name=\"cfBase.9\" value=\"1\"/>\n<param name=\"cfBase.10\" value=\"1\"/>\n<param name=\"cfBase.11\" value=\"1\"/>\n<param name=\"cfBase.12\" value=\"1\"/>\n<param name=\"cfBase.13\" value=\"1\"/>\n<param name=\"cfBase.14\" value=\"1\"/>\n<param name=\"cfBase.15\" value=\"0\"/>\n<param name=\"cfBase.16\" value=\"0\"/>\n<param name=\"mnVias\" value=\"20\"/>\n<param name=\"mnSegments\" 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display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_5\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"7\" y=\"44.45\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"7\" y=\"44.45\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"3.825\" y=\"34.29\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"7\" y=\"44.45\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_6\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-12.1\" y=\"44.5\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-12.1\" y=\"44.5\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-15.275\" y=\"34.34\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-12.1\" y=\"44.5\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_7\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-31.15\" y=\"44.5\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-31.15\" y=\"44.5\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-34.325\" y=\"34.34\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-31.15\" y=\"44.5\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_8\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-50.2\" y=\"44.55\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-50.2\" y=\"44.55\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-53.375\" y=\"34.39\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-50.2\" y=\"44.55\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_9\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-69.3\" y=\"44.55\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-69.3\" y=\"44.55\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-72.475\" y=\"34.39\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-69.3\" y=\"44.55\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_10\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-88.35\" y=\"44.65\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-88.35\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-91.525\" y=\"34.49\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-88.35\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_11\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-107.35\" y=\"44.65\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-107.35\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-110.525\" y=\"34.49\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-107.35\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_12\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-126.35\" y=\"44.65\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-126.35\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-129.525\" y=\"34.49\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-126.35\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_13\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-145.35\" y=\"44.65\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-145.35\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-148.525\" y=\"34.49\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-145.35\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_14\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-164.45\" y=\"44.6\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-164.45\" y=\"44.6\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-167.625\" y=\"34.44\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-164.45\" y=\"44.6\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_15\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-183.5\" y=\"44.65\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-183.5\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-186.675\" y=\"34.49\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-183.5\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_16\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-202.5\" y=\"44.65\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-202.5\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-205.675\" y=\"34.49\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-202.5\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_17\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-221.5\" y=\"44.65\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-221.5\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-224.675\" y=\"34.49\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-221.5\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_18\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-240.5\" y=\"44.65\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-240.5\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-243.675\" y=\"34.49\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-240.5\" y=\"44.65\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_19\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-259.55\" y=\"44.55\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-259.55\" y=\"44.55\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-262.725\" y=\"34.39\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R90\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-259.55\" y=\"44.55\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_ANALOG_20\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-278.7\" y=\"44.6\" smashed=\"yes\" rot=\"R90\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-278.7\" y=\"44.6\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-278.7\" y=\"44.6\" size=\"1.27\" layer=\"27\" rot=\"R90\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND3\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"45.15\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"45.15\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"48.325\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"45.15\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND4\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"26.1\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"26.1\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"29.275\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"26.1\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND5\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"7.05\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"7.05\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"10.225\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"7.05\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND6\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-12\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-12\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-8.825\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-12\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND7\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-31.05\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-31.05\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-27.875\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-31.05\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND8\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-50.1\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-50.1\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-46.925\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-50.1\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND9\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-69.15\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-69.15\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-65.975\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-69.15\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND10\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-88.2\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-88.2\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-85.025\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-88.2\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND11\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-107.25\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-107.25\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-104.075\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-107.25\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND12\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-126.3\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-126.3\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-123.125\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-126.3\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND13\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-145.35\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-145.35\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-142.175\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-145.35\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND14\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-164.4\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-164.4\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-161.225\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-164.4\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND15\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-183.45\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-183.45\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-180.275\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-183.45\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND16\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-202.5\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-202.5\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-199.325\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-202.5\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND17\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-221.55\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-221.55\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-218.375\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-221.55\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND18\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-240.6\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-240.6\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-237.425\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-240.6\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND19\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-259.65\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-259.65\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"NAME\" x=\"-256.475\" y=\"31.56\" size=\"1.27\" layer=\"25\" ratio=\"10\" rot=\"R270\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-259.65\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND20\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-278.7\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-278.7\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-278.7\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n<element name=\"PIN_AIN_PWRGND21\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" package=\"2X08\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\" x=\"-297.75\" y=\"21.4\" smashed=\"yes\" rot=\"R270\">\n<attribute name=\"MPN\" value=\"15-91-2160\" x=\"-297.75\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n<attribute name=\"POPULARITY\" value=\"6\" x=\"-297.75\" y=\"21.4\" size=\"1.27\" layer=\"27\" rot=\"R270\" display=\"off\"/>\n</element>\n</elements>\n<signals>\n<signal name=\"+5V\" class=\"3\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_2\" pad=\"5\"/>\n<contactref element=\"PIN_ANALOG_2\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"5\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"5\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"5\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"5\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"5\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"6\"/>\n<contactref element=\"PIN_ANALOG_8\" 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pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"1\"/>\n<contactref element=\"PIN_ANALOG_2\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND3\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND3\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND3\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND3\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND3\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND3\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND3\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND4\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND4\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND4\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND4\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND4\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND4\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND4\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND5\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND5\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND5\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND5\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND5\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND5\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND5\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND6\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND6\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND6\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND6\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND6\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND6\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND6\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND7\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND7\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND7\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND7\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND7\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND7\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND7\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND8\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND8\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND8\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND8\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND8\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND8\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND8\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND9\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND9\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND9\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND9\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND9\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND9\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND9\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND10\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND10\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND10\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND10\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND10\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND10\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND10\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND11\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND11\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND11\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND11\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND11\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND11\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND11\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND12\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND12\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND12\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND12\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND12\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND12\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND12\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND13\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND13\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND13\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND13\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND13\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND13\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND13\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND14\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND14\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND14\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND14\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND14\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND14\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND14\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND15\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND15\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND15\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND15\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND15\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND15\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND15\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND16\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND16\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND16\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND16\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND16\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND16\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND16\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND17\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND17\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND17\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND17\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND17\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND17\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND17\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND18\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND18\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND18\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND18\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND18\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND18\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND18\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND19\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND19\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND19\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND19\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND19\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND19\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND19\" pad=\"1\"/>\n<contactref element=\"PIN_AIN_PWRGND20\" pad=\"6\"/>\n<contactref element=\"PIN_AIN_PWRGND20\" pad=\"8\"/>\n<contactref element=\"PIN_AIN_PWRGND20\" pad=\"10\"/>\n<contactref element=\"PIN_AIN_PWRGND20\" pad=\"12\"/>\n<contactref element=\"PIN_AIN_PWRGND20\" pad=\"14\"/>\n<contactref element=\"PIN_AIN_PWRGND20\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND20\" pad=\"1\"/>\n<contactref element=\"PIN_ANALOG_2\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_8\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_8\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_9\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_9\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_10\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_10\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_11\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_11\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_12\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_12\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_13\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_13\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_14\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_14\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_15\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_15\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_16\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_16\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_17\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_17\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_18\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_18\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_19\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_19\" pad=\"16\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"16\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"2\"/>\n<polygon width=\"0.4064\" layer=\"15\">\n<vertex x=\"-318.008\" y=\"-13\"/>\n<vertex x=\"-318.008\" y=\"61.468\"/>\n<vertex x=\"99.7\" y=\"61.468\"/>\n<vertex x=\"99.7\" y=\"-13\"/>\n</polygon>\n</signal>\n<signal name=\"N$18\">\n</signal>\n<signal name=\"AIN1\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"2\"/>\n</signal>\n<signal name=\"TRIGINFROMRIGHT_86\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"9\"/>\n</signal>\n<signal name=\"TRIGOUTORIGHT_87\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"7\"/>\n</signal>\n<signal name=\"SERIALTORIGHT_RX_92\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"13\"/>\n</signal>\n<signal name=\"SERIALFROMRIGHT_TX_93\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"11\"/>\n</signal>\n<signal name=\"CLKINFROMRIGHT_26\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"1\"/>\n</signal>\n<signal name=\"SPARERIGHT_99\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"3\"/>\n</signal>\n<signal name=\"IO_101_1\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"14\"/>\n<wire x1=\"66.675\" y1=\"12.065\" x2=\"81.915\" y2=\"12.065\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"57.15\" y1=\"2.54\" x2=\"66.675\" y2=\"12.065\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.18\" y1=\"2.54\" x2=\"57.15\" y2=\"2.54\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-303.53\" y1=\"8.89\" x2=\"-297.18\" y2=\"2.54\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-303.53\" y1=\"46.355\" x2=\"-303.53\" y2=\"8.89\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-299.085\" y1=\"50.8\" x2=\"-303.53\" y2=\"46.355\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"81.915\" y1=\"12.065\" x2=\"81.98\" y2=\"12.61\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-299.085\" y1=\"50.8\" x2=\"-299.02\" y2=\"50.9\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_100_1\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"13\"/>\n</signal>\n<signal name=\"IO_CLK_91_1\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"11\"/>\n</signal>\n<signal name=\"IO_CLK_90_!\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"9\"/>\n</signal>\n<signal name=\"IO_CLK_89_1\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"7\"/>\n</signal>\n<signal name=\"IO_CLK_88_1\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"5\"/>\n</signal>\n<signal name=\"L121\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"4\"/>\n</signal>\n<signal name=\"N$1\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_2\" pad=\"13\"/>\n<wire x1=\"81.915\" y1=\"50.8\" x2=\"65.47\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.915\" y1=\"50.8\" x2=\"81.98\" y2=\"50.75\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$2\">\n<contactref element=\"PIN_ANALOG_2\" pad=\"11\"/>\n<contactref element=\"PIN_ANALOG_1\" pad=\"12\"/>\n<wire x1=\"81.915\" y1=\"48.26\" x2=\"65.47\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.915\" y1=\"48.26\" x2=\"81.98\" y2=\"48.21\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$3\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_2\" pad=\"9\"/>\n<wire x1=\"81.915\" y1=\"45.72\" x2=\"65.47\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.915\" y1=\"45.72\" x2=\"81.98\" y2=\"45.67\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$4\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_2\" pad=\"7\"/>\n<wire x1=\"81.915\" y1=\"43.18\" x2=\"65.47\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.915\" y1=\"43.18\" x2=\"81.98\" y2=\"43.13\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$5\">\n<contactref element=\"PIN_ANALOG_1\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_2\" pad=\"3\"/>\n<wire x1=\"81.915\" y1=\"38.1\" x2=\"65.47\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.915\" y1=\"38.1\" x2=\"81.98\" y2=\"38.05\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$6\">\n<contactref element=\"PIN_ANALOG_2\" pad=\"1\"/>\n<contactref element=\"PIN_ANALOG_1\" pad=\"2\"/>\n<wire x1=\"81.915\" y1=\"35.56\" x2=\"65.47\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"81.915\" y1=\"35.56\" x2=\"81.98\" y2=\"35.51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$7\">\n<contactref element=\"PIN_ANALOG_2\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"1\"/>\n<wire x1=\"62.93\" y1=\"35.56\" x2=\"46.37\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$8\">\n<contactref element=\"PIN_ANALOG_2\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"3\"/>\n<wire x1=\"62.93\" y1=\"38.1\" x2=\"46.37\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$10\">\n<contactref element=\"PIN_ANALOG_2\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"7\"/>\n<wire x1=\"62.93\" y1=\"43.18\" x2=\"46.37\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$11\">\n<contactref element=\"PIN_ANALOG_2\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"9\"/>\n<wire x1=\"62.93\" y1=\"45.72\" x2=\"46.37\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$12\">\n<contactref element=\"PIN_ANALOG_2\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"11\"/>\n<wire x1=\"62.93\" y1=\"48.26\" x2=\"46.37\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$13\">\n<contactref element=\"PIN_ANALOG_2\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_3\" pad=\"13\"/>\n<wire x1=\"62.93\" y1=\"50.8\" x2=\"46.37\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$15\">\n<contactref element=\"PIN_ANALOG_3\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"1\"/>\n<wire x1=\"43.83\" y1=\"35.56\" x2=\"27.37\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$16\">\n<contactref element=\"PIN_ANALOG_3\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"3\"/>\n<wire x1=\"43.83\" y1=\"38.1\" x2=\"27.37\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$19\">\n<contactref element=\"PIN_ANALOG_3\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"7\"/>\n<wire x1=\"43.83\" y1=\"43.18\" x2=\"27.37\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$20\">\n<contactref element=\"PIN_ANALOG_3\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"9\"/>\n<wire x1=\"43.83\" y1=\"45.72\" x2=\"27.37\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$21\">\n<contactref element=\"PIN_ANALOG_3\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"11\"/>\n<wire x1=\"43.83\" y1=\"48.26\" x2=\"27.37\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$22\">\n<contactref element=\"PIN_ANALOG_3\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_4\" pad=\"13\"/>\n<wire x1=\"43.83\" y1=\"50.8\" x2=\"27.37\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$24\">\n<contactref element=\"PIN_ANALOG_4\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"1\"/>\n<wire x1=\"24.83\" y1=\"35.56\" x2=\"8.27\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$25\">\n<contactref element=\"PIN_ANALOG_4\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"3\"/>\n<wire x1=\"24.83\" y1=\"38.1\" x2=\"8.27\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$27\">\n<contactref element=\"PIN_ANALOG_4\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"7\"/>\n<wire x1=\"24.83\" y1=\"43.18\" x2=\"8.27\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$28\">\n<contactref element=\"PIN_ANALOG_4\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"9\"/>\n<wire x1=\"24.83\" y1=\"45.72\" x2=\"8.27\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$29\">\n<contactref element=\"PIN_ANALOG_4\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"11\"/>\n<wire x1=\"24.83\" y1=\"48.26\" x2=\"8.27\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$30\">\n<contactref element=\"PIN_ANALOG_4\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_5\" pad=\"13\"/>\n<wire x1=\"24.83\" y1=\"50.8\" x2=\"8.27\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$32\">\n<contactref element=\"PIN_ANALOG_5\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"1\"/>\n<wire x1=\"5.73\" y1=\"35.56\" x2=\"-10.795\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.795\" y1=\"35.56\" x2=\"-10.83\" y2=\"35.61\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$33\">\n<contactref element=\"PIN_ANALOG_5\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"3\"/>\n<wire x1=\"5.73\" y1=\"38.1\" x2=\"-10.795\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.795\" y1=\"38.1\" x2=\"-10.83\" y2=\"38.15\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$35\">\n<contactref element=\"PIN_ANALOG_5\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"7\"/>\n<wire x1=\"5.73\" y1=\"43.18\" x2=\"-10.795\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.795\" y1=\"43.18\" x2=\"-10.83\" y2=\"43.23\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$36\">\n<contactref element=\"PIN_ANALOG_5\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"9\"/>\n<wire x1=\"5.73\" y1=\"45.72\" x2=\"-10.795\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.795\" y1=\"45.72\" x2=\"-10.83\" y2=\"45.77\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$37\">\n<contactref element=\"PIN_ANALOG_5\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"11\"/>\n<wire x1=\"5.73\" y1=\"48.26\" x2=\"-10.795\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.795\" y1=\"48.26\" x2=\"-10.83\" y2=\"48.31\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$38\">\n<contactref element=\"PIN_ANALOG_5\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_6\" pad=\"13\"/>\n<wire x1=\"5.73\" y1=\"50.8\" x2=\"-10.795\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-10.795\" y1=\"50.8\" x2=\"-10.83\" y2=\"50.85\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$40\">\n<contactref element=\"PIN_ANALOG_6\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"1\"/>\n<wire x1=\"-13.97\" y1=\"35.56\" x2=\"-29.845\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-29.845\" y1=\"35.56\" x2=\"-29.88\" y2=\"35.61\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-13.97\" y1=\"35.56\" x2=\"-13.37\" y2=\"35.61\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$41\">\n<contactref element=\"PIN_ANALOG_6\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"3\"/>\n<wire x1=\"-13.97\" y1=\"38.1\" x2=\"-29.845\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-29.845\" y1=\"38.1\" x2=\"-29.88\" y2=\"38.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-13.97\" y1=\"38.1\" x2=\"-13.37\" y2=\"38.15\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$43\">\n<contactref element=\"PIN_ANALOG_6\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"7\"/>\n<wire x1=\"-13.97\" y1=\"43.18\" x2=\"-29.845\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-29.845\" y1=\"43.18\" x2=\"-29.88\" y2=\"43.23\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-13.97\" y1=\"43.18\" x2=\"-13.37\" y2=\"43.23\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$44\">\n<contactref element=\"PIN_ANALOG_6\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"9\"/>\n<wire x1=\"-13.97\" y1=\"45.72\" x2=\"-29.845\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-29.845\" y1=\"45.72\" x2=\"-29.88\" y2=\"45.77\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-13.97\" y1=\"45.72\" x2=\"-13.37\" y2=\"45.77\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$45\">\n<contactref element=\"PIN_ANALOG_6\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"11\"/>\n<wire x1=\"-13.97\" y1=\"48.26\" x2=\"-29.845\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-29.845\" y1=\"48.26\" x2=\"-29.88\" y2=\"48.31\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-13.97\" y1=\"48.26\" x2=\"-13.37\" y2=\"48.31\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$46\">\n<contactref element=\"PIN_ANALOG_6\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_7\" pad=\"13\"/>\n<wire x1=\"-13.97\" y1=\"50.8\" x2=\"-29.845\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-29.845\" y1=\"50.8\" x2=\"-29.88\" y2=\"50.85\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-13.97\" y1=\"50.8\" x2=\"-13.37\" y2=\"50.85\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$48\">\n<contactref element=\"PIN_ANALOG_7\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_8\" pad=\"1\"/>\n<wire x1=\"-48.895\" y1=\"35.56\" x2=\"-33.02\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-33.02\" y1=\"35.56\" x2=\"-32.42\" y2=\"35.61\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-48.895\" y1=\"35.56\" x2=\"-48.93\" y2=\"35.66\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$49\">\n<contactref element=\"PIN_ANALOG_7\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_8\" pad=\"3\"/>\n<wire x1=\"-48.895\" y1=\"38.1\" x2=\"-33.02\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-33.02\" y1=\"38.1\" x2=\"-32.42\" y2=\"38.15\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-48.895\" y1=\"38.1\" x2=\"-48.93\" y2=\"38.2\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$51\">\n<contactref element=\"PIN_ANALOG_7\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_8\" pad=\"7\"/>\n<wire x1=\"-33.02\" y1=\"43.18\" x2=\"-48.895\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-48.895\" y1=\"43.18\" x2=\"-48.93\" y2=\"43.28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-33.02\" y1=\"43.18\" x2=\"-32.42\" y2=\"43.23\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$52\">\n<contactref element=\"PIN_ANALOG_7\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_8\" pad=\"9\"/>\n<wire x1=\"-33.02\" y1=\"45.72\" x2=\"-48.895\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-48.895\" y1=\"45.72\" x2=\"-48.93\" y2=\"45.82\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-33.02\" y1=\"45.72\" x2=\"-32.42\" y2=\"45.77\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$53\">\n<contactref element=\"PIN_ANALOG_7\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_8\" pad=\"11\"/>\n<wire x1=\"-33.02\" y1=\"48.26\" x2=\"-48.895\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-48.895\" y1=\"48.26\" x2=\"-48.93\" y2=\"48.36\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-33.02\" y1=\"48.26\" x2=\"-32.42\" y2=\"48.31\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$54\">\n<contactref element=\"PIN_ANALOG_7\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_8\" pad=\"13\"/>\n<wire x1=\"-33.02\" y1=\"50.8\" x2=\"-48.895\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-48.895\" y1=\"50.8\" x2=\"-48.93\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-33.02\" y1=\"50.8\" x2=\"-32.42\" y2=\"50.85\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$56\">\n<contactref element=\"PIN_ANALOG_8\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_9\" pad=\"1\"/>\n<wire x1=\"-52.07\" y1=\"35.56\" x2=\"-67.945\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-67.945\" y1=\"35.56\" x2=\"-68.03\" y2=\"35.66\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-52.07\" y1=\"35.56\" x2=\"-51.47\" y2=\"35.66\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$57\">\n<contactref element=\"PIN_ANALOG_8\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_9\" pad=\"3\"/>\n<wire x1=\"-52.07\" y1=\"38.1\" x2=\"-67.945\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-67.945\" y1=\"38.1\" x2=\"-68.03\" y2=\"38.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-52.07\" y1=\"38.1\" x2=\"-51.47\" y2=\"38.2\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$59\">\n<contactref element=\"PIN_ANALOG_8\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_9\" pad=\"7\"/>\n<wire x1=\"-52.07\" y1=\"43.18\" x2=\"-67.945\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-67.945\" y1=\"43.18\" x2=\"-68.03\" y2=\"43.28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-52.07\" y1=\"43.18\" x2=\"-51.47\" y2=\"43.28\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$60\">\n<contactref element=\"PIN_ANALOG_8\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_9\" pad=\"9\"/>\n<wire x1=\"-52.07\" y1=\"45.72\" x2=\"-67.945\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-67.945\" y1=\"45.72\" x2=\"-68.03\" y2=\"45.82\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-52.07\" y1=\"45.72\" x2=\"-51.47\" y2=\"45.82\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$61\">\n<contactref element=\"PIN_ANALOG_8\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_9\" pad=\"11\"/>\n<wire x1=\"-52.07\" y1=\"48.26\" x2=\"-67.945\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-67.945\" y1=\"48.26\" x2=\"-68.03\" y2=\"48.36\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-52.07\" y1=\"48.26\" x2=\"-51.47\" y2=\"48.36\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$62\">\n<contactref element=\"PIN_ANALOG_8\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_9\" pad=\"13\"/>\n<wire x1=\"-52.07\" y1=\"50.8\" x2=\"-67.945\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-67.945\" y1=\"50.8\" x2=\"-68.03\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-52.07\" y1=\"50.8\" x2=\"-51.47\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$64\">\n<contactref element=\"PIN_ANALOG_9\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_10\" pad=\"1\"/>\n<wire x1=\"-86.995\" y1=\"35.56\" x2=\"-71.12\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-71.12\" y1=\"35.56\" x2=\"-70.57\" y2=\"35.66\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-86.995\" y1=\"35.56\" x2=\"-87.08\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$65\">\n<contactref element=\"PIN_ANALOG_9\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_10\" pad=\"3\"/>\n<wire x1=\"-86.995\" y1=\"38.1\" x2=\"-71.12\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-71.12\" y1=\"38.1\" x2=\"-70.57\" y2=\"38.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-86.995\" y1=\"38.1\" x2=\"-87.08\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$67\">\n<contactref element=\"PIN_ANALOG_9\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_10\" pad=\"7\"/>\n<wire x1=\"-86.995\" y1=\"43.18\" x2=\"-71.12\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-71.12\" y1=\"43.18\" x2=\"-70.57\" y2=\"43.28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-86.995\" y1=\"43.18\" x2=\"-87.08\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$68\">\n<contactref element=\"PIN_ANALOG_9\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_10\" pad=\"9\"/>\n<wire x1=\"-86.995\" y1=\"45.72\" x2=\"-71.12\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-71.12\" y1=\"45.72\" x2=\"-70.57\" y2=\"45.82\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-86.995\" y1=\"45.72\" x2=\"-87.08\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$69\">\n<contactref element=\"PIN_ANALOG_9\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_10\" pad=\"11\"/>\n<wire x1=\"-86.995\" y1=\"48.26\" x2=\"-71.12\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-71.12\" y1=\"48.26\" x2=\"-70.57\" y2=\"48.36\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-86.995\" y1=\"48.26\" x2=\"-87.08\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$70\">\n<contactref element=\"PIN_ANALOG_9\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_10\" pad=\"13\"/>\n<wire x1=\"-86.995\" y1=\"50.8\" x2=\"-71.12\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-71.12\" y1=\"50.8\" x2=\"-70.57\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-86.995\" y1=\"50.8\" x2=\"-87.08\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$72\">\n<contactref element=\"PIN_ANALOG_10\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_11\" pad=\"1\"/>\n<wire x1=\"-90.17\" y1=\"36.195\" x2=\"-106.045\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-106.045\" y1=\"36.195\" x2=\"-106.08\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-90.17\" y1=\"36.195\" x2=\"-89.62\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$73\">\n<contactref element=\"PIN_ANALOG_10\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_11\" pad=\"3\"/>\n<wire x1=\"-90.17\" y1=\"38.735\" x2=\"-106.045\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-106.045\" y1=\"38.735\" x2=\"-106.08\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-90.17\" y1=\"38.735\" x2=\"-89.62\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$75\">\n<contactref element=\"PIN_ANALOG_10\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_11\" pad=\"7\"/>\n<wire x1=\"-90.17\" y1=\"43.815\" x2=\"-106.045\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-106.045\" y1=\"43.815\" x2=\"-106.08\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-90.17\" y1=\"43.815\" x2=\"-89.62\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$76\">\n<contactref element=\"PIN_ANALOG_10\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_11\" pad=\"9\"/>\n<wire x1=\"-90.17\" y1=\"46.355\" x2=\"-106.045\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-106.045\" y1=\"46.355\" x2=\"-106.08\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-90.17\" y1=\"46.355\" x2=\"-89.62\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$77\">\n<contactref element=\"PIN_ANALOG_10\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_11\" pad=\"11\"/>\n<wire x1=\"-90.17\" y1=\"48.895\" x2=\"-106.045\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-106.045\" y1=\"48.895\" x2=\"-106.08\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-90.17\" y1=\"48.895\" x2=\"-89.62\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$78\">\n<contactref element=\"PIN_ANALOG_10\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_11\" pad=\"13\"/>\n<wire x1=\"-90.17\" y1=\"51.435\" x2=\"-106.045\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-106.045\" y1=\"51.435\" x2=\"-106.08\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-90.17\" y1=\"51.435\" x2=\"-89.62\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$80\">\n<contactref element=\"PIN_ANALOG_11\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_12\" pad=\"1\"/>\n<wire x1=\"-109.22\" y1=\"36.195\" x2=\"-124.46\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-124.46\" y1=\"36.195\" x2=\"-125.08\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-109.22\" y1=\"36.195\" x2=\"-108.62\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$81\">\n<contactref element=\"PIN_ANALOG_11\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_12\" pad=\"3\"/>\n<wire x1=\"-109.22\" y1=\"38.735\" x2=\"-124.46\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-124.46\" y1=\"38.735\" x2=\"-125.08\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-109.22\" y1=\"38.735\" x2=\"-108.62\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$83\">\n<contactref element=\"PIN_ANALOG_11\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_12\" pad=\"7\"/>\n<wire x1=\"-109.22\" y1=\"43.815\" x2=\"-124.46\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-124.46\" y1=\"43.815\" x2=\"-125.08\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-109.22\" y1=\"43.815\" x2=\"-108.62\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$84\">\n<contactref element=\"PIN_ANALOG_11\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_12\" pad=\"9\"/>\n<wire x1=\"-109.22\" y1=\"46.355\" x2=\"-124.46\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-124.46\" y1=\"46.355\" x2=\"-125.08\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-109.22\" y1=\"46.355\" x2=\"-108.62\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$85\">\n<contactref element=\"PIN_ANALOG_11\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_12\" pad=\"11\"/>\n<wire x1=\"-109.22\" y1=\"48.895\" x2=\"-124.46\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-124.46\" y1=\"48.895\" x2=\"-125.08\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-109.22\" y1=\"48.895\" x2=\"-108.62\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$86\">\n<contactref element=\"PIN_ANALOG_11\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_12\" pad=\"13\"/>\n<wire x1=\"-109.22\" y1=\"51.435\" x2=\"-124.46\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-124.46\" y1=\"51.435\" x2=\"-125.08\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-109.22\" y1=\"51.435\" x2=\"-108.62\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$88\">\n<contactref element=\"PIN_ANALOG_12\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_13\" pad=\"1\"/>\n<wire x1=\"-127.635\" y1=\"36.195\" x2=\"-143.51\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-143.51\" y1=\"36.195\" x2=\"-144.08\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-127.635\" y1=\"36.195\" x2=\"-127.62\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$89\">\n<contactref element=\"PIN_ANALOG_12\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_13\" pad=\"3\"/>\n<wire x1=\"-127.635\" y1=\"38.735\" x2=\"-143.51\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-143.51\" y1=\"38.735\" x2=\"-144.08\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-127.635\" y1=\"38.735\" x2=\"-127.62\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$91\">\n<contactref element=\"PIN_ANALOG_12\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_13\" pad=\"7\"/>\n<wire x1=\"-127.635\" y1=\"43.815\" x2=\"-143.51\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-143.51\" y1=\"43.815\" x2=\"-144.08\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-127.635\" y1=\"43.815\" x2=\"-127.62\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$92\">\n<contactref element=\"PIN_ANALOG_12\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_13\" pad=\"9\"/>\n<wire x1=\"-127.635\" y1=\"46.355\" x2=\"-143.51\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-143.51\" y1=\"46.355\" x2=\"-144.08\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-127.635\" y1=\"46.355\" x2=\"-127.62\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$93\">\n<contactref element=\"PIN_ANALOG_12\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_13\" pad=\"11\"/>\n<wire x1=\"-127.635\" y1=\"48.895\" x2=\"-143.51\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-143.51\" y1=\"48.895\" x2=\"-144.08\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-127.635\" y1=\"48.895\" x2=\"-127.62\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$94\">\n<contactref element=\"PIN_ANALOG_12\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_13\" pad=\"13\"/>\n<wire x1=\"-127.635\" y1=\"51.435\" x2=\"-143.51\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-143.51\" y1=\"51.435\" x2=\"-144.08\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-127.635\" y1=\"51.435\" x2=\"-127.62\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$96\">\n<contactref element=\"PIN_ANALOG_13\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_14\" pad=\"1\"/>\n<wire x1=\"-146.685\" y1=\"35.56\" x2=\"-162.56\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-162.56\" y1=\"35.56\" x2=\"-163.18\" y2=\"35.71\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-146.685\" y1=\"35.56\" x2=\"-146.62\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$97\">\n<contactref element=\"PIN_ANALOG_13\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_14\" pad=\"3\"/>\n<wire x1=\"-146.685\" y1=\"38.1\" x2=\"-162.56\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-162.56\" y1=\"38.1\" x2=\"-163.18\" y2=\"38.25\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-146.685\" y1=\"38.1\" x2=\"-146.62\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$99\">\n<contactref element=\"PIN_ANALOG_13\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_14\" pad=\"7\"/>\n<wire x1=\"-146.685\" y1=\"43.18\" x2=\"-162.56\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-162.56\" y1=\"43.18\" x2=\"-163.18\" y2=\"43.33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-146.685\" y1=\"43.18\" x2=\"-146.62\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$100\">\n<contactref element=\"PIN_ANALOG_13\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_14\" pad=\"9\"/>\n<wire x1=\"-146.685\" y1=\"45.72\" x2=\"-162.56\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-162.56\" y1=\"45.72\" x2=\"-163.18\" y2=\"45.87\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-146.685\" y1=\"45.72\" x2=\"-146.62\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$101\">\n<contactref element=\"PIN_ANALOG_13\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_14\" pad=\"11\"/>\n<wire x1=\"-146.685\" y1=\"48.26\" x2=\"-162.56\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-162.56\" y1=\"48.26\" x2=\"-163.18\" y2=\"48.41\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-146.685\" y1=\"48.26\" x2=\"-146.62\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$102\">\n<contactref element=\"PIN_ANALOG_13\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_14\" pad=\"13\"/>\n<wire x1=\"-146.685\" y1=\"50.8\" x2=\"-162.56\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-162.56\" y1=\"50.8\" x2=\"-163.18\" y2=\"50.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-146.685\" y1=\"50.8\" x2=\"-146.62\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$104\">\n<contactref element=\"PIN_ANALOG_14\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_15\" pad=\"1\"/>\n<wire x1=\"-181.61\" y1=\"36.195\" x2=\"-165.735\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-165.735\" y1=\"36.195\" x2=\"-165.72\" y2=\"35.71\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-181.61\" y1=\"36.195\" x2=\"-182.23\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$105\">\n<contactref element=\"PIN_ANALOG_14\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_15\" pad=\"3\"/>\n<wire x1=\"-181.61\" y1=\"38.735\" x2=\"-165.735\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-165.735\" y1=\"38.735\" x2=\"-165.72\" y2=\"38.25\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-181.61\" y1=\"38.735\" x2=\"-182.23\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$107\">\n<contactref element=\"PIN_ANALOG_14\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_15\" pad=\"7\"/>\n<wire x1=\"-181.61\" y1=\"43.815\" x2=\"-165.735\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-165.735\" y1=\"43.815\" x2=\"-165.72\" y2=\"43.33\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-181.61\" y1=\"43.815\" x2=\"-182.23\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$108\">\n<contactref element=\"PIN_ANALOG_14\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_15\" pad=\"9\"/>\n<wire x1=\"-181.61\" y1=\"46.355\" x2=\"-165.735\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-165.735\" y1=\"46.355\" x2=\"-165.72\" y2=\"45.87\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-181.61\" y1=\"46.355\" x2=\"-182.23\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$109\">\n<contactref element=\"PIN_ANALOG_14\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_15\" pad=\"11\"/>\n<wire x1=\"-181.61\" y1=\"48.895\" x2=\"-165.735\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-165.735\" y1=\"48.895\" x2=\"-165.72\" y2=\"48.41\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-181.61\" y1=\"48.895\" x2=\"-182.23\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$110\">\n<contactref element=\"PIN_ANALOG_14\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_15\" pad=\"13\"/>\n<wire x1=\"-181.61\" y1=\"51.435\" x2=\"-165.735\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-165.735\" y1=\"51.435\" x2=\"-165.72\" y2=\"50.95\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-181.61\" y1=\"51.435\" x2=\"-182.23\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$112\">\n<contactref element=\"PIN_ANALOG_15\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_16\" pad=\"1\"/>\n<wire x1=\"-184.785\" y1=\"36.195\" x2=\"-200.66\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-200.66\" y1=\"36.195\" x2=\"-201.23\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-184.785\" y1=\"36.195\" x2=\"-184.77\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$113\">\n<contactref element=\"PIN_ANALOG_15\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_16\" pad=\"3\"/>\n<wire x1=\"-184.785\" y1=\"38.735\" x2=\"-200.66\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-200.66\" y1=\"38.735\" x2=\"-201.23\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-184.785\" y1=\"38.735\" x2=\"-184.77\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$115\">\n<contactref element=\"PIN_ANALOG_15\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_16\" pad=\"7\"/>\n<wire x1=\"-184.785\" y1=\"43.815\" x2=\"-200.66\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-200.66\" y1=\"43.815\" x2=\"-201.23\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-184.785\" y1=\"43.815\" x2=\"-184.77\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$116\">\n<contactref element=\"PIN_ANALOG_15\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_16\" pad=\"9\"/>\n<wire x1=\"-184.785\" y1=\"46.355\" x2=\"-200.66\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-200.66\" y1=\"46.355\" x2=\"-201.23\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-184.785\" y1=\"46.355\" x2=\"-184.77\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$117\">\n<contactref element=\"PIN_ANALOG_15\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_16\" pad=\"11\"/>\n<wire x1=\"-184.785\" y1=\"48.895\" x2=\"-200.66\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-200.66\" y1=\"48.895\" x2=\"-201.23\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-184.785\" y1=\"48.895\" x2=\"-184.77\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$118\">\n<contactref element=\"PIN_ANALOG_15\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_16\" pad=\"13\"/>\n<wire x1=\"-184.785\" y1=\"51.435\" x2=\"-200.66\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-200.66\" y1=\"51.435\" x2=\"-201.23\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-184.785\" y1=\"51.435\" x2=\"-184.77\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$120\">\n<contactref element=\"PIN_ANALOG_16\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_17\" pad=\"1\"/>\n<wire x1=\"-203.835\" y1=\"36.195\" x2=\"-219.71\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-219.71\" y1=\"36.195\" x2=\"-220.23\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-203.835\" y1=\"36.195\" x2=\"-203.77\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$121\">\n<contactref element=\"PIN_ANALOG_16\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_17\" pad=\"3\"/>\n<wire x1=\"-203.835\" y1=\"38.735\" x2=\"-219.71\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-219.71\" y1=\"38.735\" x2=\"-220.23\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-203.835\" y1=\"38.735\" x2=\"-203.77\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$123\">\n<contactref element=\"PIN_ANALOG_16\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_17\" pad=\"7\"/>\n<wire x1=\"-203.835\" y1=\"43.815\" x2=\"-219.71\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-219.71\" y1=\"43.815\" x2=\"-220.23\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-203.835\" y1=\"43.815\" x2=\"-203.77\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$124\">\n<contactref element=\"PIN_ANALOG_16\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_17\" pad=\"9\"/>\n<wire x1=\"-203.835\" y1=\"46.355\" x2=\"-219.71\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-219.71\" y1=\"46.355\" x2=\"-220.23\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-203.835\" y1=\"46.355\" x2=\"-203.77\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$125\">\n<contactref element=\"PIN_ANALOG_16\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_17\" pad=\"11\"/>\n<wire x1=\"-203.835\" y1=\"48.895\" x2=\"-219.71\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-219.71\" y1=\"48.895\" x2=\"-220.23\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-203.835\" y1=\"48.895\" x2=\"-203.77\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$126\">\n<contactref element=\"PIN_ANALOG_16\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_17\" pad=\"13\"/>\n<wire x1=\"-203.835\" y1=\"51.435\" x2=\"-219.71\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-219.71\" y1=\"51.435\" x2=\"-220.23\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-203.835\" y1=\"51.435\" x2=\"-203.77\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$128\">\n<contactref element=\"PIN_ANALOG_17\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_18\" pad=\"1\"/>\n<wire x1=\"-222.885\" y1=\"36.195\" x2=\"-238.76\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-238.76\" y1=\"36.195\" x2=\"-239.23\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-222.885\" y1=\"36.195\" x2=\"-222.77\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$129\">\n<contactref element=\"PIN_ANALOG_17\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_18\" pad=\"3\"/>\n<wire x1=\"-222.885\" y1=\"38.735\" x2=\"-238.76\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-238.76\" y1=\"38.735\" x2=\"-239.23\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-222.885\" y1=\"38.735\" x2=\"-222.77\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$131\">\n<contactref element=\"PIN_ANALOG_17\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_18\" pad=\"7\"/>\n<wire x1=\"-222.885\" y1=\"43.815\" x2=\"-238.76\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-238.76\" y1=\"43.815\" x2=\"-239.23\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-222.885\" y1=\"43.815\" x2=\"-222.77\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$132\">\n<contactref element=\"PIN_ANALOG_17\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_18\" pad=\"9\"/>\n<wire x1=\"-222.885\" y1=\"46.355\" x2=\"-238.76\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-238.76\" y1=\"46.355\" x2=\"-239.23\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-222.885\" y1=\"46.355\" x2=\"-222.77\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$133\">\n<contactref element=\"PIN_ANALOG_17\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_18\" pad=\"11\"/>\n<wire x1=\"-222.885\" y1=\"48.895\" x2=\"-238.76\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-238.76\" y1=\"48.895\" x2=\"-239.23\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-222.885\" y1=\"48.895\" x2=\"-222.77\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$134\">\n<contactref element=\"PIN_ANALOG_17\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_18\" pad=\"13\"/>\n<wire x1=\"-222.885\" y1=\"51.435\" x2=\"-238.76\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-238.76\" y1=\"51.435\" x2=\"-239.23\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-222.885\" y1=\"51.435\" x2=\"-222.77\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$136\">\n<contactref element=\"PIN_ANALOG_18\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_19\" pad=\"1\"/>\n<wire x1=\"-241.935\" y1=\"36.195\" x2=\"-257.81\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-257.81\" y1=\"36.195\" x2=\"-258.28\" y2=\"35.66\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-241.935\" y1=\"36.195\" x2=\"-241.77\" y2=\"35.76\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$137\">\n<contactref element=\"PIN_ANALOG_18\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_19\" pad=\"3\"/>\n<wire x1=\"-241.935\" y1=\"38.735\" x2=\"-257.81\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-257.81\" y1=\"38.735\" x2=\"-258.28\" y2=\"38.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-241.935\" y1=\"38.735\" x2=\"-241.77\" y2=\"38.3\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$139\">\n<contactref element=\"PIN_ANALOG_18\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_19\" pad=\"7\"/>\n<wire x1=\"-241.935\" y1=\"43.815\" x2=\"-257.81\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-257.81\" y1=\"43.815\" x2=\"-258.28\" y2=\"43.28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-241.935\" y1=\"43.815\" x2=\"-241.77\" y2=\"43.38\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$140\">\n<contactref element=\"PIN_ANALOG_18\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_19\" pad=\"9\"/>\n<wire x1=\"-241.935\" y1=\"46.355\" x2=\"-257.81\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-257.81\" y1=\"46.355\" x2=\"-258.28\" y2=\"45.82\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-241.935\" y1=\"46.355\" x2=\"-241.77\" y2=\"45.92\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$141\">\n<contactref element=\"PIN_ANALOG_18\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_19\" pad=\"11\"/>\n<wire x1=\"-241.935\" y1=\"48.895\" x2=\"-257.81\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-257.81\" y1=\"48.895\" x2=\"-258.28\" y2=\"48.36\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-241.935\" y1=\"48.895\" x2=\"-241.77\" y2=\"48.46\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$142\">\n<contactref element=\"PIN_ANALOG_18\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_19\" pad=\"13\"/>\n<wire x1=\"-241.935\" y1=\"51.435\" x2=\"-257.81\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-257.81\" y1=\"51.435\" x2=\"-258.28\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-241.935\" y1=\"51.435\" x2=\"-241.77\" y2=\"51\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$144\">\n<contactref element=\"PIN_ANALOG_19\" pad=\"2\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"1\"/>\n<wire x1=\"-276.86\" y1=\"36.195\" x2=\"-260.985\" y2=\"36.195\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-260.985\" y1=\"36.195\" x2=\"-260.82\" y2=\"35.66\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-276.86\" y1=\"36.195\" x2=\"-277.43\" y2=\"35.71\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$145\">\n<contactref element=\"PIN_ANALOG_19\" pad=\"4\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"3\"/>\n<wire x1=\"-276.86\" y1=\"38.735\" x2=\"-260.985\" y2=\"38.735\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-260.985\" y1=\"38.735\" x2=\"-260.82\" y2=\"38.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-276.86\" y1=\"38.735\" x2=\"-277.43\" y2=\"38.25\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$147\">\n<contactref element=\"PIN_ANALOG_19\" pad=\"8\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"7\"/>\n<wire x1=\"-276.86\" y1=\"43.815\" x2=\"-260.985\" y2=\"43.815\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-260.985\" y1=\"43.815\" x2=\"-260.82\" y2=\"43.28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-276.86\" y1=\"43.815\" x2=\"-277.43\" y2=\"43.33\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$148\">\n<contactref element=\"PIN_ANALOG_19\" pad=\"10\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"9\"/>\n<wire x1=\"-276.86\" y1=\"46.355\" x2=\"-260.985\" y2=\"46.355\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-260.985\" y1=\"46.355\" x2=\"-260.82\" y2=\"45.82\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-276.86\" y1=\"46.355\" x2=\"-277.43\" y2=\"45.87\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$149\">\n<contactref element=\"PIN_ANALOG_19\" pad=\"12\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"11\"/>\n<wire x1=\"-276.86\" y1=\"48.895\" x2=\"-260.985\" y2=\"48.895\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-260.985\" y1=\"48.895\" x2=\"-260.82\" y2=\"48.36\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-276.86\" y1=\"48.895\" x2=\"-277.43\" y2=\"48.41\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$150\">\n<contactref element=\"PIN_ANALOG_19\" pad=\"14\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"13\"/>\n<wire x1=\"-276.86\" y1=\"51.435\" x2=\"-260.985\" y2=\"51.435\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-260.985\" y1=\"51.435\" x2=\"-260.82\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-276.86\" y1=\"51.435\" x2=\"-277.43\" y2=\"50.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$152\">\n<contactref element=\"PIN_ANALOG_21\" pad=\"1\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"2\"/>\n<wire x1=\"-280.035\" y1=\"35.56\" x2=\"-295.91\" y2=\"35.56\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-295.91\" y1=\"35.56\" x2=\"-296.48\" y2=\"35.66\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-280.035\" y1=\"35.56\" x2=\"-279.97\" y2=\"35.71\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$153\">\n<contactref element=\"PIN_ANALOG_21\" pad=\"3\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"4\"/>\n<wire x1=\"-280.035\" y1=\"38.1\" x2=\"-295.91\" y2=\"38.1\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-295.91\" y1=\"38.1\" x2=\"-296.48\" y2=\"38.2\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-280.035\" y1=\"38.1\" x2=\"-279.97\" y2=\"38.25\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$155\">\n<contactref element=\"PIN_ANALOG_21\" pad=\"7\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"8\"/>\n<wire x1=\"-280.035\" y1=\"43.18\" x2=\"-295.91\" y2=\"43.18\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-295.91\" y1=\"43.18\" x2=\"-296.48\" y2=\"43.28\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-280.035\" y1=\"43.18\" x2=\"-279.97\" y2=\"43.33\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$156\">\n<contactref element=\"PIN_ANALOG_21\" pad=\"9\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"10\"/>\n<wire x1=\"-280.035\" y1=\"45.72\" x2=\"-295.91\" y2=\"45.72\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-295.91\" y1=\"45.72\" x2=\"-296.48\" y2=\"45.82\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-280.035\" y1=\"45.72\" x2=\"-279.97\" y2=\"45.87\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$157\">\n<contactref element=\"PIN_ANALOG_21\" pad=\"11\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"12\"/>\n<wire x1=\"-280.035\" y1=\"48.26\" x2=\"-295.91\" y2=\"48.26\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-295.91\" y1=\"48.26\" x2=\"-296.48\" y2=\"48.36\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-280.035\" y1=\"48.26\" x2=\"-279.97\" y2=\"48.41\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"N$158\">\n<contactref element=\"PIN_ANALOG_21\" pad=\"13\"/>\n<contactref element=\"PIN_ANALOG_20\" pad=\"14\"/>\n<wire x1=\"-280.035\" y1=\"50.8\" x2=\"-295.91\" y2=\"50.8\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-295.91\" y1=\"50.8\" x2=\"-296.48\" y2=\"50.9\" width=\"0.1524\" layer=\"16\"/>\n<wire x1=\"-280.035\" y1=\"50.8\" x2=\"-279.97\" y2=\"50.95\" width=\"0.1524\" layer=\"16\"/>\n</signal>\n<signal name=\"AIN1_2\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"2\"/>\n</signal>\n<signal name=\"L121_2\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"4\"/>\n</signal>\n<signal name=\"IO_CLK_88_2\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"5\"/>\n</signal>\n<signal name=\"IO_CLK_89_2\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"7\"/>\n</signal>\n<signal name=\"IO_CLK_90_2\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"9\"/>\n</signal>\n<signal name=\"IO_CLK_91_2\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"11\"/>\n</signal>\n<signal name=\"IO_100_2\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"13\"/>\n</signal>\n<signal name=\"IO_101_2\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"12\"/>\n<wire x1=\"47.625\" y1=\"12.065\" x2=\"62.865\" y2=\"12.065\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"38.735\" y1=\"3.175\" x2=\"47.625\" y2=\"12.065\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-296.545\" y1=\"3.175\" x2=\"38.735\" y2=\"3.175\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-302.895\" y1=\"9.525\" x2=\"-296.545\" y2=\"3.175\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-302.895\" y1=\"44.45\" x2=\"-302.895\" y2=\"9.525\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-299.085\" y1=\"48.26\" x2=\"-302.895\" y2=\"44.45\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"62.865\" y1=\"12.065\" x2=\"62.93\" y2=\"12.61\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-299.085\" y1=\"48.26\" x2=\"-299.02\" y2=\"48.36\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"3V3_1\" class=\"2\">\n<contactref element=\"PIN_AIN_PWRGND1\" pad=\"3\"/>\n</signal>\n<signal name=\"3V3_2\" class=\"2\">\n<contactref element=\"PIN_AIN_PWRGND2\" pad=\"3\"/>\n</signal>\n<signal name=\"IO_101_3\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND3\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"10\"/>\n<wire x1=\"28.575\" y1=\"27.94\" x2=\"43.815\" y2=\"12.7\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"28.575\" y1=\"53.975\" x2=\"28.575\" y2=\"27.94\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"26.035\" y1=\"56.515\" x2=\"28.575\" y2=\"53.975\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-286.385\" y1=\"56.515\" x2=\"26.035\" y2=\"56.515\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"46.99\" x2=\"-286.385\" y2=\"56.515\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.18\" y1=\"46.99\" x2=\"-295.91\" y2=\"46.99\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"45.72\" x2=\"-297.18\" y2=\"46.99\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"43.815\" y1=\"12.7\" x2=\"43.88\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"45.72\" x2=\"-299.02\" y2=\"45.82\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_4\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND4\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"8\"/>\n<wire x1=\"-297.18\" y1=\"44.45\" x2=\"-298.45\" y2=\"43.18\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-294.64\" y1=\"44.45\" x2=\"-297.18\" y2=\"44.45\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-283.21\" y1=\"55.88\" x2=\"-294.64\" y2=\"44.45\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-11.43\" y1=\"55.88\" x2=\"-283.21\" y2=\"55.88\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"5.08\" y1=\"39.37\" x2=\"-11.43\" y2=\"55.88\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"8.89\" y1=\"39.37\" x2=\"5.08\" y2=\"39.37\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"23.495\" y1=\"24.765\" x2=\"8.89\" y2=\"39.37\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"23.495\" y1=\"13.97\" x2=\"23.495\" y2=\"24.765\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"24.765\" y1=\"12.7\" x2=\"23.495\" y2=\"13.97\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"43.18\" x2=\"-299.02\" y2=\"43.28\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"24.765\" y1=\"12.7\" x2=\"24.83\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_5\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND5\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"6\"/>\n<wire x1=\"-297.18\" y1=\"41.91\" x2=\"-298.45\" y2=\"40.64\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"41.91\" x2=\"-297.18\" y2=\"41.91\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-282.575\" y1=\"55.245\" x2=\"-295.91\" y2=\"41.91\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-29.845\" y1=\"55.245\" x2=\"-282.575\" y2=\"55.245\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-13.97\" y1=\"39.37\" x2=\"-29.845\" y2=\"55.245\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-10.16\" y1=\"39.37\" x2=\"-13.97\" y2=\"39.37\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"4.445\" y1=\"24.765\" x2=\"-10.16\" y2=\"39.37\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"4.445\" y1=\"13.97\" x2=\"4.445\" y2=\"24.765\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"5.715\" y1=\"12.7\" x2=\"4.445\" y2=\"13.97\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"40.64\" x2=\"-299.02\" y2=\"40.74\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"5.715\" y1=\"12.7\" x2=\"5.78\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_6\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND6\" pad=\"15\"/>\n<contactref element=\"PIN_ANALOG_21\" pad=\"4\"/>\n<wire x1=\"-28.575\" y1=\"27.94\" x2=\"-13.335\" y2=\"12.7\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-28.575\" y1=\"31.115\" x2=\"-28.575\" y2=\"27.94\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-30.48\" y1=\"33.02\" x2=\"-28.575\" y2=\"31.115\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-292.1\" y1=\"33.02\" x2=\"-30.48\" y2=\"33.02\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"36.83\" x2=\"-292.1\" y2=\"33.02\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.18\" y1=\"36.83\" x2=\"-295.91\" y2=\"36.83\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"38.1\" x2=\"-297.18\" y2=\"36.83\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-13.335\" y1=\"12.7\" x2=\"-13.27\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"38.1\" x2=\"-299.02\" y2=\"38.2\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_7\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND7\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"1\"/>\n<wire x1=\"-298.45\" y1=\"31.75\" x2=\"-298.45\" y2=\"30.48\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.815\" y1=\"32.385\" x2=\"-298.45\" y2=\"31.75\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-48.895\" y1=\"32.385\" x2=\"-297.815\" y2=\"32.385\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-33.655\" y1=\"17.145\" x2=\"-48.895\" y2=\"32.385\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-33.655\" y1=\"13.97\" x2=\"-33.655\" y2=\"17.145\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-32.385\" y1=\"12.7\" x2=\"-33.655\" y2=\"13.97\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"30.48\" x2=\"-299.02\" y2=\"30.29\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-32.385\" y1=\"12.7\" x2=\"-32.32\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_8\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND8\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"3\"/>\n<wire x1=\"-302.26\" y1=\"24.13\" x2=\"-299.085\" y2=\"27.305\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-302.26\" y1=\"10.16\" x2=\"-302.26\" y2=\"24.13\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"6.35\" x2=\"-302.26\" y2=\"10.16\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-288.29\" y1=\"6.35\" x2=\"-298.45\" y2=\"6.35\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-285.75\" y1=\"3.81\" x2=\"-288.29\" y2=\"6.35\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-59.69\" y1=\"3.81\" x2=\"-285.75\" y2=\"3.81\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-51.435\" y1=\"12.065\" x2=\"-59.69\" y2=\"3.81\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-299.085\" y1=\"27.305\" x2=\"-299.02\" y2=\"27.75\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-51.435\" y1=\"12.065\" x2=\"-51.37\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_9\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND9\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"5\"/>\n<wire x1=\"-301.625\" y1=\"22.225\" x2=\"-299.085\" y2=\"24.765\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-301.625\" y1=\"10.795\" x2=\"-301.625\" y2=\"22.225\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.815\" y1=\"6.985\" x2=\"-301.625\" y2=\"10.795\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-287.655\" y1=\"6.985\" x2=\"-297.815\" y2=\"6.985\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-285.115\" y1=\"4.445\" x2=\"-287.655\" y2=\"6.985\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-78.105\" y1=\"4.445\" x2=\"-285.115\" y2=\"4.445\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-70.485\" y1=\"12.065\" x2=\"-78.105\" y2=\"4.445\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-299.085\" y1=\"24.765\" x2=\"-299.02\" y2=\"25.21\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-70.485\" y1=\"12.065\" x2=\"-70.42\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_10\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND10\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"7\"/>\n<wire x1=\"-298.45\" y1=\"24.13\" x2=\"-298.45\" y2=\"22.86\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.815\" y1=\"24.765\" x2=\"-298.45\" y2=\"24.13\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.815\" y1=\"31.115\" x2=\"-297.815\" y2=\"24.765\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.18\" y1=\"31.75\" x2=\"-297.815\" y2=\"31.115\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-105.41\" y1=\"31.75\" x2=\"-297.18\" y2=\"31.75\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-90.805\" y1=\"17.145\" x2=\"-105.41\" y2=\"31.75\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-90.805\" y1=\"13.97\" x2=\"-90.805\" y2=\"17.145\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-89.535\" y1=\"12.7\" x2=\"-90.805\" y2=\"13.97\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"22.86\" x2=\"-299.02\" y2=\"22.67\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-89.535\" y1=\"12.7\" x2=\"-89.47\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_20\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND20\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"2\"/>\n<wire x1=\"-281.305\" y1=\"15.24\" x2=\"-295.91\" y2=\"29.845\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-281.305\" y1=\"13.97\" x2=\"-281.305\" y2=\"15.24\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-280.035\" y1=\"12.7\" x2=\"-281.305\" y2=\"13.97\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"29.845\" x2=\"-296.48\" y2=\"30.29\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-280.035\" y1=\"12.7\" x2=\"-279.97\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_19\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND19\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"4\"/>\n<wire x1=\"-281.305\" y1=\"12.7\" x2=\"-295.91\" y2=\"27.305\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-281.305\" y1=\"12.065\" x2=\"-281.305\" y2=\"12.7\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-280.035\" y1=\"10.795\" x2=\"-281.305\" y2=\"12.065\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-262.255\" y1=\"10.795\" x2=\"-280.035\" y2=\"10.795\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-260.985\" y1=\"12.065\" x2=\"-262.255\" y2=\"10.795\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"27.305\" x2=\"-296.48\" y2=\"27.75\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-260.985\" y1=\"12.065\" x2=\"-260.92\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_18\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND18\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"6\"/>\n<wire x1=\"-294.005\" y1=\"22.86\" x2=\"-295.91\" y2=\"24.765\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-293.37\" y1=\"22.86\" x2=\"-294.005\" y2=\"22.86\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-280.67\" y1=\"10.16\" x2=\"-293.37\" y2=\"22.86\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-243.84\" y1=\"10.16\" x2=\"-280.67\" y2=\"10.16\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-241.935\" y1=\"12.065\" x2=\"-243.84\" y2=\"10.16\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"24.765\" x2=\"-296.48\" y2=\"25.21\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-241.935\" y1=\"12.065\" x2=\"-241.87\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_17\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND17\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"8\"/>\n<wire x1=\"-294.005\" y1=\"22.225\" x2=\"-295.91\" y2=\"22.225\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-280.67\" y1=\"8.89\" x2=\"-294.005\" y2=\"22.225\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-226.06\" y1=\"8.89\" x2=\"-280.67\" y2=\"8.89\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-222.885\" y1=\"12.065\" x2=\"-226.06\" y2=\"8.89\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"22.225\" x2=\"-296.48\" y2=\"22.67\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-222.885\" y1=\"12.065\" x2=\"-222.82\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_16\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND16\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"10\"/>\n<wire x1=\"-292.735\" y1=\"19.685\" x2=\"-295.91\" y2=\"19.685\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-281.305\" y1=\"8.255\" x2=\"-292.735\" y2=\"19.685\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-207.645\" y1=\"8.255\" x2=\"-281.305\" y2=\"8.255\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-203.835\" y1=\"12.065\" x2=\"-207.645\" y2=\"8.255\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"19.685\" x2=\"-296.48\" y2=\"20.13\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-203.835\" y1=\"12.065\" x2=\"-203.77\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_15\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND15\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"12\"/>\n<wire x1=\"-291.465\" y1=\"17.145\" x2=\"-295.91\" y2=\"17.145\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-281.94\" y1=\"7.62\" x2=\"-291.465\" y2=\"17.145\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-189.23\" y1=\"7.62\" x2=\"-281.94\" y2=\"7.62\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-184.785\" y1=\"12.065\" x2=\"-189.23\" y2=\"7.62\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"17.145\" x2=\"-296.48\" y2=\"17.59\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-184.785\" y1=\"12.065\" x2=\"-184.72\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_14\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND14\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"14\"/>\n<wire x1=\"-290.195\" y1=\"14.605\" x2=\"-295.91\" y2=\"14.605\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-282.575\" y1=\"6.985\" x2=\"-290.195\" y2=\"14.605\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-170.815\" y1=\"6.985\" x2=\"-282.575\" y2=\"6.985\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-165.735\" y1=\"12.065\" x2=\"-170.815\" y2=\"6.985\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-295.91\" y1=\"14.605\" x2=\"-296.48\" y2=\"15.05\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-165.735\" y1=\"12.065\" x2=\"-165.67\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_13\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND13\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"13\"/>\n<wire x1=\"-298.45\" y1=\"13.97\" x2=\"-298.45\" y2=\"14.605\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.815\" y1=\"13.335\" x2=\"-298.45\" y2=\"13.97\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.815\" y1=\"12.065\" x2=\"-297.815\" y2=\"13.335\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-294.64\" y1=\"8.89\" x2=\"-297.815\" y2=\"12.065\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-285.75\" y1=\"8.89\" x2=\"-294.64\" y2=\"8.89\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-283.21\" y1=\"6.35\" x2=\"-285.75\" y2=\"8.89\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-152.4\" y1=\"6.35\" x2=\"-283.21\" y2=\"6.35\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-146.685\" y1=\"12.065\" x2=\"-152.4\" y2=\"6.35\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-298.45\" y1=\"14.605\" x2=\"-299.02\" y2=\"15.05\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-146.685\" y1=\"12.065\" x2=\"-146.62\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_12\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND12\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"11\"/>\n<wire x1=\"-300.355\" y1=\"15.875\" x2=\"-299.085\" y2=\"17.145\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-300.355\" y1=\"12.065\" x2=\"-300.355\" y2=\"15.875\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-296.545\" y1=\"8.255\" x2=\"-300.355\" y2=\"12.065\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-286.385\" y1=\"8.255\" x2=\"-296.545\" y2=\"8.255\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-283.845\" y1=\"5.715\" x2=\"-286.385\" y2=\"8.255\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-133.985\" y1=\"5.715\" x2=\"-283.845\" y2=\"5.715\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-127.635\" y1=\"12.065\" x2=\"-133.985\" y2=\"5.715\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-299.085\" y1=\"17.145\" x2=\"-299.02\" y2=\"17.59\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-127.635\" y1=\"12.065\" x2=\"-127.57\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n<signal name=\"IO_101_11\" class=\"4\">\n<contactref element=\"PIN_AIN_PWRGND11\" pad=\"15\"/>\n<contactref element=\"PIN_AIN_PWRGND21\" pad=\"9\"/>\n<wire x1=\"-300.99\" y1=\"17.78\" x2=\"-299.085\" y2=\"19.685\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-300.99\" y1=\"11.43\" x2=\"-300.99\" y2=\"17.78\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-297.18\" y1=\"7.62\" x2=\"-300.99\" y2=\"11.43\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-287.02\" y1=\"7.62\" x2=\"-297.18\" y2=\"7.62\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-284.48\" y1=\"5.08\" x2=\"-287.02\" y2=\"7.62\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-115.57\" y1=\"5.08\" x2=\"-284.48\" y2=\"5.08\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-108.585\" y1=\"12.065\" x2=\"-115.57\" y2=\"5.08\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-299.085\" y1=\"19.685\" x2=\"-299.02\" y2=\"20.13\" width=\"0.254\" layer=\"1\"/>\n<wire x1=\"-108.585\" y1=\"12.065\" x2=\"-108.52\" y2=\"12.51\" width=\"0.254\" layer=\"1\"/>\n</signal>\n</signals>\n<mfgpreviewcolors>\n<mfgpreviewcolor name=\"soldermaskcolor\" color=\"0xC8008000\"/>\n<mfgpreviewcolor name=\"silkscreencolor\" color=\"0xFFFEFEFE\"/>\n<mfgpreviewcolor name=\"backgroundcolor\" color=\"0xFF282828\"/>\n<mfgpreviewcolor name=\"coppercolor\" color=\"0xFFFFBF00\"/>\n<mfgpreviewcolor name=\"substratecolor\" color=\"0xFF786E46\"/>\n</mfgpreviewcolors>\n</board>\n</drawing>\n<compatibility>\n<note version=\"6.3\" minversion=\"6.2.2\" severity=\"warning\">\nSince Version 6.2.2 text objects can contain more than one line,\nwhich will not be processed correctly with this version.\n</note>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "eagle/rack_backplane_v9.0.sch",
    "content": "<?xml version=\"1.0\" encoding=\"utf-8\"?>\n<!DOCTYPE eagle SYSTEM \"eagle.dtd\">\n<eagle version=\"9.6.2\">\n<drawing>\n<settings>\n<setting alwaysvectorfont=\"no\"/>\n<setting keepoldvectorfont=\"yes\"/>\n<setting verticaltext=\"up\"/>\n</settings>\n<grid distance=\"0.1\" unitdist=\"inch\" unit=\"inch\" style=\"lines\" multiple=\"1\" display=\"no\" altdistance=\"0.01\" altunitdist=\"inch\" altunit=\"inch\"/>\n<layers>\n<layer number=\"1\" name=\"Top\" color=\"4\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"2\" name=\"Route2\" color=\"58\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"3\" name=\"Route3\" color=\"4\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"4\" name=\"Route4\" color=\"1\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"5\" name=\"Route5\" color=\"4\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"6\" name=\"Route6\" color=\"1\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"7\" name=\"Route7\" color=\"4\" fill=\"8\" visible=\"no\" active=\"no\"/>\n<layer number=\"8\" name=\"Route8\" color=\"1\" fill=\"2\" visible=\"no\" active=\"no\"/>\n<layer number=\"9\" name=\"Route9\" color=\"4\" fill=\"2\" visible=\"no\" active=\"no\"/>\n<layer number=\"10\" name=\"Route10\" color=\"1\" fill=\"7\" visible=\"no\" active=\"no\"/>\n<layer number=\"11\" name=\"Route11\" color=\"4\" fill=\"7\" visible=\"no\" active=\"no\"/>\n<layer number=\"12\" name=\"Route12\" color=\"1\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"13\" name=\"Route13\" color=\"4\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"14\" name=\"Route14\" color=\"1\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"15\" name=\"Route15\" color=\"13\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"16\" name=\"Bottom\" color=\"1\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"17\" name=\"Pads\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"18\" name=\"Vias\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"19\" name=\"Unrouted\" color=\"6\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"20\" name=\"Dimension\" color=\"15\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"21\" name=\"tPlace\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"22\" name=\"bPlace\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"23\" name=\"tOrigins\" color=\"15\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"24\" name=\"bOrigins\" color=\"15\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"25\" name=\"tNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"26\" name=\"bNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"27\" name=\"tValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"28\" name=\"bValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"29\" name=\"tStop\" color=\"7\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"30\" name=\"bStop\" color=\"7\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"31\" name=\"tCream\" color=\"7\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"32\" name=\"bCream\" color=\"7\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"33\" name=\"tFinish\" color=\"6\" fill=\"3\" visible=\"no\" active=\"no\"/>\n<layer number=\"34\" name=\"bFinish\" color=\"6\" fill=\"6\" visible=\"no\" active=\"no\"/>\n<layer number=\"35\" name=\"tGlue\" color=\"7\" fill=\"4\" visible=\"no\" active=\"no\"/>\n<layer number=\"36\" name=\"bGlue\" color=\"7\" fill=\"5\" visible=\"no\" active=\"no\"/>\n<layer number=\"37\" name=\"tTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"38\" name=\"bTest\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"39\" name=\"tKeepout\" color=\"4\" fill=\"11\" visible=\"no\" active=\"no\"/>\n<layer number=\"40\" name=\"bKeepout\" color=\"1\" fill=\"11\" visible=\"no\" active=\"no\"/>\n<layer number=\"41\" name=\"tRestrict\" color=\"4\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"42\" name=\"bRestrict\" color=\"1\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"43\" name=\"vRestrict\" color=\"2\" fill=\"10\" visible=\"no\" active=\"no\"/>\n<layer number=\"44\" name=\"Drills\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"45\" name=\"Holes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"46\" name=\"Milling\" color=\"3\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"47\" name=\"Measures\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"48\" name=\"Document\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"49\" name=\"Reference\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"50\" name=\"dxf\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"51\" name=\"tDocu\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"52\" name=\"bDocu\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"53\" name=\"tGND_GNDA\" color=\"7\" fill=\"9\" visible=\"no\" active=\"no\"/>\n<layer number=\"54\" name=\"bGND_GNDA\" color=\"1\" fill=\"9\" visible=\"no\" active=\"no\"/>\n<layer number=\"56\" name=\"wert\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"57\" name=\"tCAD\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"59\" name=\"tCarbon\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"60\" name=\"bCarbon\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"90\" name=\"Modules\" color=\"5\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"91\" name=\"Nets\" color=\"2\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"92\" name=\"Busses\" color=\"1\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"93\" name=\"Pins\" color=\"2\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"94\" name=\"Symbols\" color=\"4\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"95\" name=\"Names\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"96\" name=\"Values\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"97\" name=\"Info\" color=\"7\" fill=\"1\" visible=\"yes\" active=\"yes\"/>\n<layer number=\"98\" name=\"Guide\" color=\"6\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"99\" name=\"SpiceOrder\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"100\" name=\"Muster\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"101\" name=\"Patch_Top\" color=\"12\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"102\" name=\"ID\" color=\"15\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"103\" name=\"tMap\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"104\" name=\"bMap\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"105\" name=\"tPlate\" color=\"14\" fill=\"6\" visible=\"no\" active=\"yes\"/>\n<layer number=\"106\" name=\"bPlate\" color=\"14\" fill=\"3\" visible=\"no\" active=\"yes\"/>\n<layer number=\"107\" name=\"Crop\" color=\"11\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"108\" name=\"fp8\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"109\" name=\"fp9\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"110\" name=\"fp0\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"111\" name=\"LPC17xx\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"112\" name=\"tSilk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"113\" name=\"ReferenceLS\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"114\" name=\"FRNTMAAT1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"115\" name=\"FRNTMAAT2\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"116\" name=\"Patch_BOT\" color=\"9\" fill=\"4\" visible=\"no\" active=\"yes\"/>\n<layer number=\"117\" name=\"BACKMAAT1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"118\" name=\"Rect_Pads\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"119\" name=\"KAP_TEKEN\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"120\" name=\"KAP_MAAT1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"121\" name=\"_tsilk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"122\" name=\"_bsilk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"123\" name=\"tTestmark\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"124\" name=\"bTestmark\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"125\" name=\"_tNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"126\" name=\"_bNames\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"127\" name=\"_tValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"128\" name=\"_bValues\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"129\" name=\"top_silk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"130\" name=\"SMDSTROOK\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"131\" name=\"tAdjust\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"132\" name=\"bAdjust\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"133\" name=\"bottom_silk\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"134\" name=\"silk_top\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"135\" name=\"silk_bottom\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"136\" name=\"silktop\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"137\" name=\"silkbottom\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"144\" name=\"Drill_legend\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"145\" name=\"DrillLegend_01-16\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"146\" name=\"DrillLegend_01-20\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"150\" name=\"Notes\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"151\" name=\"HeatSink\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"152\" name=\"_bDocu\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"153\" name=\"FabDoc1\" color=\"6\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"154\" name=\"FabDoc2\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"155\" name=\"FabDoc3\" color=\"7\" fill=\"15\" visible=\"no\" active=\"no\"/>\n<layer number=\"166\" name=\"AntennaArea\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"168\" name=\"4mmHeightArea\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"199\" name=\"Contour\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"200\" name=\"200bmp\" color=\"1\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"201\" name=\"201bmp\" color=\"2\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"202\" name=\"202bmp\" color=\"1\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"203\" name=\"203bmp\" color=\"4\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"204\" name=\"204bmp\" color=\"5\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"205\" name=\"205bmp\" color=\"6\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"206\" name=\"206bmp\" color=\"7\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"207\" name=\"207bmp\" color=\"8\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"208\" name=\"208bmp\" color=\"9\" fill=\"10\" visible=\"no\" active=\"yes\"/>\n<layer number=\"209\" name=\"209bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"210\" name=\"210bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"211\" name=\"211bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"212\" name=\"212bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"213\" name=\"213bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"214\" name=\"214bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"215\" name=\"215bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"216\" name=\"216bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"217\" name=\"217bmp\" color=\"18\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"218\" name=\"218bmp\" color=\"19\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"219\" name=\"219bmp\" color=\"20\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"220\" name=\"220bmp\" color=\"21\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"221\" name=\"221bmp\" color=\"22\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"222\" name=\"222bmp\" color=\"23\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"223\" name=\"223bmp\" color=\"24\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"224\" name=\"224bmp\" color=\"25\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"225\" name=\"225bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"226\" name=\"226bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"227\" name=\"227bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"228\" name=\"228bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"229\" name=\"229bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"230\" name=\"230bmp\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"231\" name=\"Eagle3D_PG1\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"232\" name=\"Eagle3D_PG2\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"233\" name=\"Eagle3D_PG3\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"248\" name=\"Housing\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"249\" name=\"Edge\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"250\" name=\"Descript\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"251\" name=\"SMDround\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n<layer number=\"254\" name=\"cooling\" color=\"7\" fill=\"1\" visible=\"no\" active=\"yes\"/>\n<layer number=\"255\" name=\"Accent\" color=\"7\" fill=\"1\" visible=\"no\" active=\"no\"/>\n</layers>\n<schematic xreflabel=\"%F%N/%S.%C%R\" xrefpart=\"/%S.%C%R\">\n<libraries>\n<library name=\"supply1\">\n<description>&lt;b&gt;Supply Symbols&lt;/b&gt;&lt;p&gt;\n GND, VCC, 0V, +5V, -5V, etc.&lt;p&gt;\n Please keep in mind, that these devices are necessary for the\n automatic wiring of the supply signals.&lt;p&gt;\n The pin name defined in the symbol is identical to the net which is to be wired automatically.&lt;p&gt;\n In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.&lt;p&gt;\n &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"+5V\">\n<wire x1=\"1.27\" y1=\"-1.905\" x2=\"0\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<wire x1=\"0\" y1=\"0\" x2=\"-1.27\" y2=\"-1.905\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-5.08\" size=\"1.778\" layer=\"96\" rot=\"R90\">&gt;VALUE</text>\n<pin name=\"+5V\" x=\"0\" y=\"-2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R90\"/>\n</symbol>\n<symbol name=\"GND\">\n<wire x1=\"-1.905\" y1=\"0\" x2=\"1.905\" y2=\"0\" width=\"0.254\" layer=\"94\"/>\n<text x=\"-2.54\" y=\"-2.54\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"GND\" x=\"0\" y=\"2.54\" visible=\"off\" length=\"short\" direction=\"sup\" rot=\"R270\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"+5V\" prefix=\"P+\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"+5V\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n<deviceset name=\"GND\" prefix=\"GND\">\n<description>&lt;b&gt;SUPPLY SYMBOL&lt;/b&gt;</description>\n<gates>\n<gate name=\"1\" symbol=\"GND\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"frames\" urn=\"urn:adsk.eagle:library:229\">\n<description>&lt;b&gt;Frames for Sheet and Layout&lt;/b&gt;</description>\n<packages>\n</packages>\n<symbols>\n<symbol name=\"A3L-LOC\" urn=\"urn:adsk.eagle:symbol:13881/1\" library_version=\"1\">\n<wire x1=\"288.29\" y1=\"3.81\" x2=\"342.265\" y2=\"3.81\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"3.81\" x2=\"373.38\" y2=\"3.81\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"373.38\" y1=\"3.81\" x2=\"383.54\" y2=\"3.81\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"383.54\" y1=\"3.81\" x2=\"383.54\" y2=\"8.89\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"383.54\" y1=\"8.89\" x2=\"383.54\" y2=\"13.97\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"383.54\" y1=\"13.97\" x2=\"383.54\" y2=\"19.05\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"383.54\" y1=\"19.05\" x2=\"383.54\" y2=\"24.13\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"288.29\" y1=\"3.81\" x2=\"288.29\" y2=\"24.13\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"288.29\" y1=\"24.13\" x2=\"342.265\" y2=\"24.13\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"24.13\" x2=\"383.54\" y2=\"24.13\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"373.38\" y1=\"3.81\" x2=\"373.38\" y2=\"8.89\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"373.38\" y1=\"8.89\" x2=\"383.54\" y2=\"8.89\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"373.38\" y1=\"8.89\" x2=\"342.265\" y2=\"8.89\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"8.89\" x2=\"342.265\" y2=\"3.81\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"8.89\" x2=\"342.265\" y2=\"13.97\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"13.97\" x2=\"383.54\" y2=\"13.97\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"13.97\" x2=\"342.265\" y2=\"19.05\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"19.05\" x2=\"383.54\" y2=\"19.05\" width=\"0.1016\" layer=\"94\"/>\n<wire x1=\"342.265\" y1=\"19.05\" x2=\"342.265\" y2=\"24.13\" width=\"0.1016\" layer=\"94\"/>\n<text x=\"344.17\" y=\"15.24\" size=\"2.54\" layer=\"94\">&gt;DRAWING_NAME</text>\n<text x=\"344.17\" y=\"10.16\" size=\"2.286\" layer=\"94\">&gt;LAST_DATE_TIME</text>\n<text x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\">&gt;SHEET</text>\n<text x=\"343.916\" y=\"4.953\" size=\"2.54\" layer=\"94\">Sheet:</text>\n<frame x1=\"0\" y1=\"0\" x2=\"387.35\" y2=\"260.35\" columns=\"8\" rows=\"5\" layer=\"94\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"A3L-LOC\" urn=\"urn:adsk.eagle:component:13942/1\" prefix=\"FRAME\" uservalue=\"yes\" library_version=\"1\">\n<description>&lt;b&gt;FRAME&lt;/b&gt;&lt;p&gt;\nDIN A3, landscape with location and doc. field</description>\n<gates>\n<gate name=\"G$1\" symbol=\"A3L-LOC\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\">\n<technologies>\n<technology name=\"\"/>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n<library name=\"pinhead\" urn=\"urn:adsk.eagle:library:325\">\n<description>&lt;b&gt;Pin Header Connectors&lt;/b&gt;&lt;p&gt;\n&lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>\n<packages>\n<package name=\"2X08/90\" urn=\"urn:adsk.eagle:footprint:22374/1\" library_version=\"4\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<wire x1=\"-10.16\" y1=\"-1.905\" x2=\"-7.62\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"-1.905\" x2=\"-7.62\" y2=\"0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"0.635\" x2=\"-10.16\" y2=\"0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-10.16\" y1=\"0.635\" x2=\"-10.16\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-8.89\" y1=\"6.985\" x2=\"-8.89\" y2=\"1.27\" width=\"0.762\" layer=\"21\"/>\n<wire x1=\"-7.62\" y1=\"-1.905\" x2=\"-5.08\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"-1.905\" x2=\"-5.08\" y2=\"0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"0.635\" x2=\"-7.62\" y2=\"0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-6.35\" y1=\"6.985\" x2=\"-6.35\" y2=\"1.27\" width=\"0.762\" layer=\"21\"/>\n<wire x1=\"-5.08\" y1=\"-1.905\" x2=\"-2.54\" y2=\"-1.905\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"-1.905\" x2=\"-2.54\" y2=\"0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-2.54\" y1=\"0.635\" x2=\"-5.08\" y2=\"0.635\" width=\"0.1524\" layer=\"21\"/>\n<wire x1=\"-3.81\" y1=\"6.985\" x2=\"-3.81\" y2=\"1.27\" width=\"0.762\" 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layer=\"95\">&gt;NAME</text>\n<text x=\"-6.35\" y=\"-15.24\" size=\"1.778\" layer=\"96\">&gt;VALUE</text>\n<pin name=\"1\" x=\"-2.54\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"2\" x=\"5.08\" y=\"7.62\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"3\" x=\"-2.54\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"4\" x=\"5.08\" y=\"5.08\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"5\" x=\"-2.54\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"6\" x=\"5.08\" y=\"2.54\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\" rot=\"R180\"/>\n<pin name=\"7\" x=\"-2.54\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" function=\"dot\"/>\n<pin name=\"8\" x=\"5.08\" y=\"0\" visible=\"pad\" length=\"short\" direction=\"pas\" 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rot=\"R180\"/>\n</symbol>\n</symbols>\n<devicesets>\n<deviceset name=\"PINHD-2X8\" urn=\"urn:adsk.eagle:component:22549/4\" prefix=\"JP\" uservalue=\"yes\" library_version=\"4\">\n<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>\n<gates>\n<gate name=\"A\" symbol=\"PINH2X8\" x=\"0\" y=\"0\"/>\n</gates>\n<devices>\n<device name=\"\" package=\"2X08\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:22481/2\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"POPULARITY\" value=\"6\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n<device name=\"/90\" package=\"2X08/90\">\n<connects>\n<connect gate=\"A\" pin=\"1\" pad=\"1\"/>\n<connect gate=\"A\" pin=\"10\" pad=\"10\"/>\n<connect gate=\"A\" pin=\"11\" pad=\"11\"/>\n<connect gate=\"A\" pin=\"12\" pad=\"12\"/>\n<connect gate=\"A\" pin=\"13\" pad=\"13\"/>\n<connect gate=\"A\" pin=\"14\" pad=\"14\"/>\n<connect gate=\"A\" pin=\"15\" pad=\"15\"/>\n<connect gate=\"A\" pin=\"16\" pad=\"16\"/>\n<connect gate=\"A\" pin=\"2\" pad=\"2\"/>\n<connect gate=\"A\" pin=\"3\" pad=\"3\"/>\n<connect gate=\"A\" pin=\"4\" pad=\"4\"/>\n<connect gate=\"A\" pin=\"5\" pad=\"5\"/>\n<connect gate=\"A\" pin=\"6\" pad=\"6\"/>\n<connect gate=\"A\" pin=\"7\" pad=\"7\"/>\n<connect gate=\"A\" pin=\"8\" pad=\"8\"/>\n<connect gate=\"A\" pin=\"9\" pad=\"9\"/>\n</connects>\n<package3dinstances>\n<package3dinstance package3d_urn=\"urn:adsk.eagle:package:22488/2\"/>\n</package3dinstances>\n<technologies>\n<technology name=\"\">\n<attribute name=\"POPULARITY\" value=\"0\" constant=\"no\"/>\n</technology>\n</technologies>\n</device>\n</devices>\n</deviceset>\n</devicesets>\n</library>\n</libraries>\n<attributes>\n</attributes>\n<variantdefs>\n</variantdefs>\n<classes>\n<class number=\"0\" name=\"default\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"1\" name=\"gnd\" width=\"0.3048\" drill=\"0\">\n</class>\n<class number=\"2\" name=\"three\" width=\"0.1524\" drill=\"0\">\n</class>\n<class number=\"3\" name=\"five\" width=\"0.381\" drill=\"0\">\n</class>\n<class number=\"4\" name=\"50ohm\" width=\"0.254\" drill=\"0\">\n<clearance class=\"0\" value=\"0.254\"/>\n<clearance class=\"1\" value=\"0.254\"/>\n<clearance class=\"2\" value=\"0.254\"/>\n<clearance class=\"3\" value=\"0.254\"/>\n<clearance class=\"4\" value=\"0.254\"/>\n</class>\n</classes>\n<parts>\n<part name=\"GND7\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"P+1\" library=\"supply1\" deviceset=\"+5V\" device=\"\"/>\n<part name=\"GND13\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND1\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND70\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"FRAME1\" library=\"frames\" library_urn=\"urn:adsk.eagle:library:229\" deviceset=\"A3L-LOC\" device=\"\"/>\n<part name=\"PIN_ANALOG_1\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND1\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND2\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND3\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_ANALOG_21\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_2\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_3\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_4\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_5\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_6\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_7\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_8\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_9\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_10\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_11\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_12\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_13\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_14\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_15\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_16\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_17\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_18\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_19\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"PIN_ANALOG_20\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND4\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND3\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND5\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND6\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND4\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND8\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND9\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND5\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND10\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND11\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND6\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND12\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND14\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND7\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND15\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND16\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND8\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND17\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND18\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND9\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND19\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND20\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND10\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND21\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND22\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND11\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND23\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND24\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND12\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND25\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND26\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND13\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND27\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND28\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND14\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND29\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND30\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND15\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND31\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND32\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND16\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND33\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND34\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND17\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND35\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND36\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND18\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND37\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND39\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND19\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND40\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND41\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND20\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND42\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"PIN_AIN_PWRGND21\" library=\"pinhead\" library_urn=\"urn:adsk.eagle:library:325\" deviceset=\"PINHD-2X8\" device=\"\" package3d_urn=\"urn:adsk.eagle:package:22481/2\" value=\"15-91-2160\">\n<attribute name=\"MPN\" value=\"15-91-2160\"/>\n</part>\n<part name=\"GND2\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n<part name=\"GND38\" library=\"supply1\" deviceset=\"GND\" device=\"\"/>\n</parts>\n<sheets>\n<sheet>\n<description>Digital</description>\n<plain>\n<wire x1=\"210.82\" y1=\"7.62\" x2=\"5.08\" y2=\"7.62\" width=\"0.1524\" layer=\"95\"/>\n<text x=\"22.86\" y=\"233.68\" size=\"1.778\" layer=\"97\">Trig board</text>\n<text x=\"22.86\" y=\"177.8\" size=\"1.778\" layer=\"97\">Trig board</text>\n</plain>\n<instances>\n<instance part=\"GND7\" gate=\"1\" x=\"327.66\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"330.2\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"P+1\" gate=\"1\" x=\"337.82\" y=\"233.68\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"335.28\" y=\"236.22\" size=\"1.778\" layer=\"96\" rot=\"MR180\"/>\n</instance>\n<instance part=\"GND13\" gate=\"1\" x=\"343.916\" y=\"203.2\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"346.456\" y=\"200.66\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND1\" gate=\"A\" x=\"337.82\" y=\"160.02\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"337.82\" y=\"160.02\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND70\" gate=\"1\" x=\"345.44\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"347.98\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"FRAME1\" gate=\"G$1\" x=\"0\" y=\"0\" smashed=\"yes\">\n<attribute name=\"SHEET\" x=\"357.505\" y=\"5.08\" size=\"2.54\" layer=\"94\"/>\n</instance>\n<instance part=\"PIN_ANALOG_1\" gate=\"A\" x=\"345.44\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"345.44\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"GND1\" gate=\"1\" x=\"276.86\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"279.4\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND2\" gate=\"A\" x=\"287.02\" y=\"160.02\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"287.02\" y=\"160.02\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND3\" gate=\"1\" x=\"294.64\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"297.18\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_ANALOG_21\" gate=\"A\" x=\"30.48\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"30.48\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_2\" gate=\"A\" x=\"330.2\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"330.2\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_3\" gate=\"A\" x=\"314.96\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"314.96\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_4\" gate=\"A\" x=\"299.72\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"299.72\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_5\" gate=\"A\" x=\"284.48\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"284.48\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_6\" gate=\"A\" x=\"269.24\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"269.24\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_7\" gate=\"A\" x=\"254\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"254\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_8\" gate=\"A\" x=\"238.76\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"238.76\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_9\" gate=\"A\" x=\"223.52\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"223.52\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_10\" gate=\"A\" x=\"208.28\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"208.28\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_11\" gate=\"A\" x=\"193.04\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"193.04\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_12\" gate=\"A\" x=\"177.8\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"177.8\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_13\" gate=\"A\" x=\"162.56\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"162.56\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_14\" gate=\"A\" x=\"147.32\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"147.32\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_15\" gate=\"A\" x=\"132.08\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"132.08\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_16\" gate=\"A\" x=\"116.84\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"116.84\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_17\" gate=\"A\" x=\"101.6\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"101.6\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_18\" gate=\"A\" x=\"86.36\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"86.36\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_19\" gate=\"A\" x=\"71.12\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"71.12\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"PIN_ANALOG_20\" gate=\"A\" x=\"55.88\" y=\"217.17\" smashed=\"yes\" rot=\"R180\">\n<attribute name=\"MPN\" x=\"55.88\" y=\"217.17\" size=\"1.778\" layer=\"96\" rot=\"R180\" display=\"off\"/>\n</instance>\n<instance part=\"GND4\" gate=\"1\" x=\"246.38\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"248.92\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND3\" gate=\"A\" x=\"256.54\" y=\"160.02\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"256.54\" y=\"160.02\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND5\" gate=\"1\" x=\"264.16\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"266.7\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND6\" gate=\"1\" x=\"220.98\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"223.52\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND4\" gate=\"A\" x=\"231.14\" y=\"160.02\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"231.14\" y=\"160.02\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND8\" gate=\"1\" x=\"238.76\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"241.3\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND9\" gate=\"1\" x=\"195.58\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"198.12\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND5\" gate=\"A\" x=\"205.74\" y=\"160.02\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"205.74\" y=\"160.02\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND10\" gate=\"1\" x=\"213.36\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"215.9\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND11\" gate=\"1\" x=\"170.18\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"172.72\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND6\" gate=\"A\" x=\"180.34\" y=\"160.02\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"180.34\" y=\"160.02\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND12\" gate=\"1\" x=\"187.96\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"190.5\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND14\" gate=\"1\" x=\"350.52\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"353.06\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND7\" gate=\"A\" x=\"360.68\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"360.68\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND15\" gate=\"1\" x=\"368.3\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"370.84\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND16\" gate=\"1\" x=\"325.12\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"327.66\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND8\" gate=\"A\" x=\"335.28\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"335.28\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND17\" gate=\"1\" x=\"342.9\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"345.44\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND18\" gate=\"1\" x=\"299.72\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"302.26\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND9\" gate=\"A\" x=\"309.88\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"309.88\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND19\" gate=\"1\" x=\"317.5\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"320.04\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND20\" gate=\"1\" x=\"274.32\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"276.86\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND10\" gate=\"A\" x=\"284.48\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"284.48\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND21\" gate=\"1\" x=\"292.1\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"294.64\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND22\" gate=\"1\" x=\"248.92\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"251.46\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND11\" gate=\"A\" x=\"259.08\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"259.08\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND23\" gate=\"1\" x=\"266.7\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"269.24\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND24\" gate=\"1\" x=\"223.52\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"226.06\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND12\" gate=\"A\" x=\"233.68\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"233.68\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND25\" gate=\"1\" x=\"241.3\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"243.84\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND26\" gate=\"1\" x=\"198.12\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"200.66\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND13\" gate=\"A\" x=\"208.28\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"208.28\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND27\" gate=\"1\" x=\"215.9\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"218.44\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND28\" gate=\"1\" x=\"172.72\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"175.26\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND14\" gate=\"A\" x=\"182.88\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"182.88\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND29\" gate=\"1\" x=\"190.5\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"193.04\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND30\" gate=\"1\" x=\"144.78\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"147.32\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND15\" gate=\"A\" x=\"154.94\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"154.94\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND31\" gate=\"1\" x=\"162.56\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"165.1\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND32\" gate=\"1\" x=\"119.38\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"121.92\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND16\" gate=\"A\" x=\"129.54\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"129.54\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND33\" gate=\"1\" x=\"137.16\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"139.7\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND34\" gate=\"1\" x=\"93.98\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"96.52\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND17\" gate=\"A\" x=\"104.14\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"104.14\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND35\" gate=\"1\" x=\"111.76\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"114.3\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND36\" gate=\"1\" x=\"68.58\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"71.12\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND18\" gate=\"A\" x=\"78.74\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"78.74\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND37\" gate=\"1\" x=\"86.36\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"88.9\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND39\" gate=\"1\" x=\"40.64\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"43.18\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND19\" gate=\"A\" x=\"50.8\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"50.8\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND40\" gate=\"1\" x=\"58.42\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"60.96\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND41\" gate=\"1\" x=\"15.24\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"17.78\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND20\" gate=\"A\" x=\"25.4\" y=\"109.22\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"25.4\" y=\"109.22\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND42\" gate=\"1\" x=\"33.02\" y=\"91.44\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"35.56\" y=\"88.9\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"PIN_AIN_PWRGND21\" gate=\"A\" x=\"30.48\" y=\"162.56\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"MPN\" x=\"30.48\" y=\"162.56\" size=\"1.778\" layer=\"96\" rot=\"MR0\" display=\"off\"/>\n</instance>\n<instance part=\"GND2\" gate=\"1\" x=\"25.4\" y=\"200.66\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"27.94\" y=\"198.12\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n<instance part=\"GND38\" gate=\"1\" x=\"25.4\" y=\"142.24\" smashed=\"yes\" rot=\"MR0\">\n<attribute name=\"VALUE\" x=\"27.94\" y=\"139.7\" size=\"1.778\" layer=\"96\" rot=\"MR0\"/>\n</instance>\n</instances>\n<busses>\n</busses>\n<nets>\n<net name=\"+5V\" class=\"3\">\n<segment>\n<pinref part=\"P+1\" gate=\"1\" pin=\"+5V\"/>\n<wire x1=\"337.82\" y1=\"231.14\" x2=\"337.82\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"337.82\" y1=\"214.63\" x2=\"340.36\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"332.74\" y1=\"214.63\" x2=\"340.36\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"340.36\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"317.5\" y1=\"214.63\" x2=\"325.12\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"332.74\" y1=\"214.63\" x2=\"325.12\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"332.74\" y=\"214.63\"/>\n<junction x=\"325.12\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"302.26\" y1=\"214.63\" x2=\"309.88\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"317.5\" y1=\"214.63\" x2=\"309.88\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"317.5\" y=\"214.63\"/>\n<junction x=\"309.88\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"287.02\" y1=\"214.63\" x2=\"294.64\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"302.26\" y1=\"214.63\" x2=\"294.64\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"302.26\" y=\"214.63\"/>\n<junction x=\"294.64\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"271.78\" y1=\"214.63\" x2=\"279.4\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"214.63\" x2=\"279.4\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"287.02\" y=\"214.63\"/>\n<junction x=\"279.4\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"256.54\" y1=\"214.63\" x2=\"264.16\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"271.78\" y1=\"214.63\" x2=\"264.16\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"271.78\" y=\"214.63\"/>\n<junction x=\"264.16\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"241.3\" y1=\"214.63\" x2=\"248.92\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"256.54\" y1=\"214.63\" x2=\"248.92\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"256.54\" y=\"214.63\"/>\n<junction x=\"248.92\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"226.06\" y1=\"214.63\" x2=\"233.68\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"241.3\" y1=\"214.63\" x2=\"233.68\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"241.3\" y=\"214.63\"/>\n<junction x=\"233.68\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"210.82\" y1=\"214.63\" x2=\"218.44\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"226.06\" y1=\"214.63\" x2=\"218.44\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"226.06\" y=\"214.63\"/>\n<junction x=\"218.44\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"195.58\" y1=\"214.63\" x2=\"203.2\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"210.82\" y1=\"214.63\" x2=\"203.2\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"210.82\" y=\"214.63\"/>\n<junction x=\"203.2\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"180.34\" y1=\"214.63\" x2=\"187.96\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"214.63\" x2=\"187.96\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"195.58\" y=\"214.63\"/>\n<junction x=\"187.96\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"165.1\" y1=\"214.63\" x2=\"172.72\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"180.34\" y1=\"214.63\" x2=\"172.72\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"180.34\" y=\"214.63\"/>\n<junction x=\"172.72\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"149.86\" y1=\"214.63\" x2=\"157.48\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"165.1\" y1=\"214.63\" x2=\"157.48\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"165.1\" y=\"214.63\"/>\n<junction x=\"157.48\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"134.62\" y1=\"214.63\" x2=\"142.24\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"149.86\" y1=\"214.63\" x2=\"142.24\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"149.86\" y=\"214.63\"/>\n<junction x=\"142.24\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"119.38\" y1=\"214.63\" x2=\"127\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"134.62\" y1=\"214.63\" x2=\"127\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"134.62\" y=\"214.63\"/>\n<junction x=\"127\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"104.14\" y1=\"214.63\" x2=\"111.76\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"214.63\" x2=\"111.76\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"214.63\"/>\n<junction x=\"111.76\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"88.9\" y1=\"214.63\" x2=\"96.52\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"104.14\" y1=\"214.63\" x2=\"96.52\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"104.14\" y=\"214.63\"/>\n<junction x=\"96.52\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"73.66\" y1=\"214.63\" x2=\"81.28\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"88.9\" y1=\"214.63\" x2=\"81.28\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"88.9\" y=\"214.63\"/>\n<junction x=\"81.28\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"58.42\" y1=\"214.63\" x2=\"66.04\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"73.66\" y1=\"214.63\" x2=\"66.04\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"73.66\" y=\"214.63\"/>\n<junction x=\"66.04\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"5\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"6\"/>\n<wire x1=\"50.8\" y1=\"214.63\" x2=\"33.02\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"214.63\" x2=\"50.8\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"58.42\" y=\"214.63\"/>\n<junction x=\"50.8\" y=\"214.63\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"347.98\" y1=\"214.63\" x2=\"340.36\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"GND\" class=\"1\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND7\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"327.66\" y1=\"144.78\" x2=\"327.66\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"327.66\" y1=\"162.56\" x2=\"332.74\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"332.74\" y1=\"160.02\" x2=\"327.66\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"160.02\" x2=\"327.66\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"327.66\" y=\"162.56\"/>\n<wire x1=\"327.66\" y1=\"154.94\" x2=\"332.74\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"332.74\" y1=\"157.48\" x2=\"327.66\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"157.48\" x2=\"327.66\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"157.48\" x2=\"327.66\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"327.66\" y=\"157.48\"/>\n<junction x=\"327.66\" y=\"160.02\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"327.66\" y1=\"149.86\" x2=\"332.74\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"332.74\" y1=\"152.4\" x2=\"327.66\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"152.4\" x2=\"327.66\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"327.66\" y1=\"152.4\" x2=\"327.66\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"327.66\" y=\"152.4\"/>\n<junction x=\"327.66\" y=\"154.94\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND70\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"340.36\" y1=\"167.64\" x2=\"345.44\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"345.44\" y1=\"167.64\" x2=\"345.44\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"GND13\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"343.916\" y1=\"205.74\" x2=\"343.916\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"15\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"347.98\" y1=\"227.33\" x2=\"340.36\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"343.916\" y1=\"227.33\" x2=\"347.98\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"347.98\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"332.74\" y1=\"227.33\" x2=\"340.36\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"340.36\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"317.5\" y1=\"227.33\" x2=\"325.12\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"332.74\" y1=\"227.33\" x2=\"325.12\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"332.74\" y=\"227.33\"/>\n<junction x=\"325.12\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"302.26\" y1=\"227.33\" x2=\"309.88\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"317.5\" y1=\"227.33\" x2=\"309.88\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"317.5\" y=\"227.33\"/>\n<junction x=\"309.88\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"287.02\" y1=\"227.33\" x2=\"294.64\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"302.26\" y1=\"227.33\" x2=\"294.64\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"302.26\" y=\"227.33\"/>\n<junction x=\"294.64\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"271.78\" y1=\"227.33\" x2=\"279.4\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"287.02\" y1=\"227.33\" x2=\"279.4\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"287.02\" y=\"227.33\"/>\n<junction x=\"279.4\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"256.54\" y1=\"227.33\" x2=\"264.16\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"271.78\" y1=\"227.33\" x2=\"264.16\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"271.78\" y=\"227.33\"/>\n<junction x=\"264.16\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"241.3\" y1=\"227.33\" x2=\"248.92\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"256.54\" y1=\"227.33\" x2=\"248.92\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"256.54\" y=\"227.33\"/>\n<junction x=\"248.92\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"226.06\" y1=\"227.33\" x2=\"233.68\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"241.3\" y1=\"227.33\" x2=\"233.68\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"241.3\" y=\"227.33\"/>\n<junction x=\"233.68\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"210.82\" y1=\"227.33\" x2=\"218.44\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"226.06\" y1=\"227.33\" x2=\"218.44\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"226.06\" y=\"227.33\"/>\n<junction x=\"218.44\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"195.58\" y1=\"227.33\" x2=\"203.2\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"210.82\" y1=\"227.33\" x2=\"203.2\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"210.82\" y=\"227.33\"/>\n<junction x=\"203.2\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"180.34\" y1=\"227.33\" x2=\"187.96\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"227.33\" x2=\"187.96\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"195.58\" y=\"227.33\"/>\n<junction x=\"187.96\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"165.1\" y1=\"227.33\" x2=\"172.72\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"180.34\" y1=\"227.33\" x2=\"172.72\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"180.34\" y=\"227.33\"/>\n<junction x=\"172.72\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"149.86\" y1=\"227.33\" x2=\"157.48\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"165.1\" y1=\"227.33\" x2=\"157.48\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"165.1\" y=\"227.33\"/>\n<junction x=\"157.48\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"134.62\" y1=\"227.33\" x2=\"142.24\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"149.86\" y1=\"227.33\" x2=\"142.24\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"149.86\" y=\"227.33\"/>\n<junction x=\"142.24\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"119.38\" y1=\"227.33\" x2=\"127\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"134.62\" y1=\"227.33\" x2=\"127\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"134.62\" y=\"227.33\"/>\n<junction x=\"127\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"104.14\" y1=\"227.33\" x2=\"111.76\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"227.33\" x2=\"111.76\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"227.33\"/>\n<junction x=\"111.76\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"88.9\" y1=\"227.33\" x2=\"96.52\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"104.14\" y1=\"227.33\" x2=\"96.52\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"104.14\" y=\"227.33\"/>\n<junction x=\"96.52\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"73.66\" y1=\"227.33\" x2=\"81.28\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"88.9\" y1=\"227.33\" x2=\"81.28\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"88.9\" y=\"227.33\"/>\n<junction x=\"81.28\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"15\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"50.8\" y1=\"227.33\" x2=\"33.02\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"58.42\" y1=\"227.33\" x2=\"66.04\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"50.8\" y1=\"227.33\" x2=\"58.42\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"50.8\" y=\"227.33\"/>\n<junction x=\"58.42\" y=\"227.33\"/>\n<wire x1=\"73.66\" y1=\"227.33\" x2=\"66.04\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"73.66\" y=\"227.33\"/>\n<junction x=\"66.04\" y=\"227.33\"/>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"33.02\" y1=\"227.33\" x2=\"25.4\" y2=\"227.33\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"33.02\" y=\"227.33\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND1\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"276.86\" y1=\"144.78\" x2=\"276.86\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"276.86\" y1=\"162.56\" x2=\"281.94\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"281.94\" y1=\"160.02\" x2=\"276.86\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"160.02\" x2=\"276.86\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"276.86\" y=\"162.56\"/>\n<wire x1=\"276.86\" y1=\"154.94\" x2=\"281.94\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"281.94\" y1=\"157.48\" x2=\"276.86\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"157.48\" x2=\"276.86\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"157.48\" x2=\"276.86\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"276.86\" y=\"157.48\"/>\n<junction x=\"276.86\" y=\"160.02\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"276.86\" y1=\"149.86\" x2=\"281.94\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"281.94\" y1=\"152.4\" x2=\"276.86\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"152.4\" x2=\"276.86\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"276.86\" y1=\"152.4\" x2=\"276.86\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"276.86\" y=\"152.4\"/>\n<junction x=\"276.86\" y=\"154.94\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND3\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"289.56\" y1=\"167.64\" x2=\"294.64\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"294.64\" y1=\"167.64\" x2=\"294.64\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND3\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND4\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"246.38\" y1=\"144.78\" x2=\"246.38\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND3\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"246.38\" y1=\"162.56\" x2=\"251.46\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"251.46\" y1=\"160.02\" x2=\"246.38\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"246.38\" y1=\"160.02\" x2=\"246.38\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"246.38\" y=\"162.56\"/>\n<wire x1=\"246.38\" y1=\"154.94\" x2=\"251.46\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND3\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND3\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"251.46\" y1=\"157.48\" x2=\"246.38\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"246.38\" y1=\"157.48\" x2=\"246.38\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"246.38\" y1=\"157.48\" x2=\"246.38\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"246.38\" y=\"157.48\"/>\n<junction x=\"246.38\" y=\"160.02\"/>\n<pinref part=\"PIN_AIN_PWRGND3\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND3\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"246.38\" y1=\"149.86\" x2=\"251.46\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"251.46\" y1=\"152.4\" x2=\"246.38\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"246.38\" y1=\"152.4\" x2=\"246.38\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"246.38\" y1=\"152.4\" x2=\"246.38\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"246.38\" y=\"152.4\"/>\n<junction x=\"246.38\" y=\"154.94\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND3\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND5\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"259.08\" y1=\"167.64\" x2=\"264.16\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"264.16\" y1=\"167.64\" x2=\"264.16\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND4\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND6\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"220.98\" y1=\"144.78\" x2=\"220.98\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND4\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"220.98\" y1=\"162.56\" x2=\"226.06\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"226.06\" y1=\"160.02\" x2=\"220.98\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"220.98\" y1=\"160.02\" x2=\"220.98\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"220.98\" y=\"162.56\"/>\n<wire x1=\"220.98\" y1=\"154.94\" x2=\"226.06\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND4\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND4\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"226.06\" y1=\"157.48\" x2=\"220.98\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"220.98\" y1=\"157.48\" x2=\"220.98\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"220.98\" y1=\"157.48\" x2=\"220.98\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"220.98\" y=\"157.48\"/>\n<junction x=\"220.98\" y=\"160.02\"/>\n<pinref part=\"PIN_AIN_PWRGND4\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND4\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"220.98\" y1=\"149.86\" x2=\"226.06\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"226.06\" y1=\"152.4\" x2=\"220.98\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"220.98\" y1=\"152.4\" x2=\"220.98\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"220.98\" y1=\"152.4\" x2=\"220.98\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"220.98\" y=\"152.4\"/>\n<junction x=\"220.98\" y=\"154.94\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND4\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND8\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"233.68\" y1=\"167.64\" x2=\"238.76\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"238.76\" y1=\"167.64\" x2=\"238.76\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND5\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND9\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"195.58\" y1=\"144.78\" x2=\"195.58\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND5\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"195.58\" y1=\"162.56\" x2=\"200.66\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"160.02\" x2=\"195.58\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"160.02\" x2=\"195.58\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"195.58\" y=\"162.56\"/>\n<wire x1=\"195.58\" y1=\"154.94\" x2=\"200.66\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND5\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND5\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"200.66\" y1=\"157.48\" x2=\"195.58\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"157.48\" x2=\"195.58\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"157.48\" x2=\"195.58\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"195.58\" y=\"157.48\"/>\n<junction x=\"195.58\" y=\"160.02\"/>\n<pinref part=\"PIN_AIN_PWRGND5\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND5\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"195.58\" y1=\"149.86\" x2=\"200.66\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"200.66\" y1=\"152.4\" x2=\"195.58\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"152.4\" x2=\"195.58\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"195.58\" y1=\"152.4\" x2=\"195.58\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"195.58\" y=\"152.4\"/>\n<junction x=\"195.58\" y=\"154.94\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND5\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND10\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"208.28\" y1=\"167.64\" x2=\"213.36\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"213.36\" y1=\"167.64\" x2=\"213.36\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND6\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND11\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"170.18\" y1=\"144.78\" x2=\"170.18\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND6\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"170.18\" y1=\"162.56\" x2=\"175.26\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"175.26\" y1=\"160.02\" x2=\"170.18\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"170.18\" y1=\"160.02\" x2=\"170.18\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"170.18\" y=\"162.56\"/>\n<wire x1=\"170.18\" y1=\"154.94\" x2=\"175.26\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND6\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND6\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"175.26\" y1=\"157.48\" x2=\"170.18\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"170.18\" y1=\"157.48\" x2=\"170.18\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"170.18\" y1=\"157.48\" x2=\"170.18\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"170.18\" y=\"157.48\"/>\n<junction x=\"170.18\" y=\"160.02\"/>\n<pinref part=\"PIN_AIN_PWRGND6\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND6\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"170.18\" y1=\"149.86\" x2=\"175.26\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"175.26\" y1=\"152.4\" x2=\"170.18\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"170.18\" y1=\"152.4\" x2=\"170.18\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"170.18\" y1=\"152.4\" x2=\"170.18\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"170.18\" y=\"152.4\"/>\n<junction x=\"170.18\" y=\"154.94\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND6\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND12\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"182.88\" y1=\"167.64\" x2=\"187.96\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"187.96\" y1=\"167.64\" x2=\"187.96\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND7\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND14\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"350.52\" y1=\"93.98\" x2=\"350.52\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND7\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"350.52\" y1=\"111.76\" x2=\"355.6\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"355.6\" y1=\"109.22\" x2=\"350.52\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"109.22\" x2=\"350.52\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"350.52\" y=\"111.76\"/>\n<wire x1=\"350.52\" y1=\"104.14\" x2=\"355.6\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND7\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND7\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"355.6\" y1=\"106.68\" x2=\"350.52\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"106.68\" x2=\"350.52\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"106.68\" x2=\"350.52\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"350.52\" y=\"106.68\"/>\n<junction x=\"350.52\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND7\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND7\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"350.52\" y1=\"99.06\" x2=\"355.6\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"355.6\" y1=\"101.6\" x2=\"350.52\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"101.6\" x2=\"350.52\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"350.52\" y1=\"101.6\" x2=\"350.52\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"350.52\" y=\"101.6\"/>\n<junction x=\"350.52\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND7\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND15\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"363.22\" y1=\"116.84\" x2=\"368.3\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"368.3\" y1=\"116.84\" x2=\"368.3\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND8\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND16\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"325.12\" y1=\"93.98\" x2=\"325.12\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND8\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"325.12\" y1=\"111.76\" x2=\"330.2\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"330.2\" y1=\"109.22\" x2=\"325.12\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"325.12\" y1=\"109.22\" x2=\"325.12\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"325.12\" y=\"111.76\"/>\n<wire x1=\"325.12\" y1=\"104.14\" x2=\"330.2\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND8\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND8\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"330.2\" y1=\"106.68\" x2=\"325.12\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"325.12\" y1=\"106.68\" x2=\"325.12\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"325.12\" y1=\"106.68\" x2=\"325.12\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"325.12\" y=\"106.68\"/>\n<junction x=\"325.12\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND8\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND8\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"325.12\" y1=\"99.06\" x2=\"330.2\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"330.2\" y1=\"101.6\" x2=\"325.12\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"325.12\" y1=\"101.6\" x2=\"325.12\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"325.12\" y1=\"101.6\" x2=\"325.12\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"325.12\" y=\"101.6\"/>\n<junction x=\"325.12\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND8\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND17\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"337.82\" y1=\"116.84\" x2=\"342.9\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"342.9\" y1=\"116.84\" x2=\"342.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND9\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND18\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"299.72\" y1=\"93.98\" x2=\"299.72\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND9\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"299.72\" y1=\"111.76\" x2=\"304.8\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"304.8\" y1=\"109.22\" x2=\"299.72\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"109.22\" x2=\"299.72\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"111.76\"/>\n<wire x1=\"299.72\" y1=\"104.14\" x2=\"304.8\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND9\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND9\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"304.8\" y1=\"106.68\" x2=\"299.72\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"106.68\" x2=\"299.72\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"106.68\" x2=\"299.72\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"106.68\"/>\n<junction x=\"299.72\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND9\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND9\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"299.72\" y1=\"99.06\" x2=\"304.8\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"304.8\" y1=\"101.6\" x2=\"299.72\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"101.6\" x2=\"299.72\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"299.72\" y1=\"101.6\" x2=\"299.72\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"299.72\" y=\"101.6\"/>\n<junction x=\"299.72\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND9\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND19\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"312.42\" y1=\"116.84\" x2=\"317.5\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"317.5\" y1=\"116.84\" x2=\"317.5\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND10\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND20\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"274.32\" y1=\"93.98\" x2=\"274.32\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND10\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"274.32\" y1=\"111.76\" x2=\"279.4\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"279.4\" y1=\"109.22\" x2=\"274.32\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"109.22\" x2=\"274.32\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"111.76\"/>\n<wire x1=\"274.32\" y1=\"104.14\" x2=\"279.4\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND10\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND10\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"279.4\" y1=\"106.68\" x2=\"274.32\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"106.68\" x2=\"274.32\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"106.68\" x2=\"274.32\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"106.68\"/>\n<junction x=\"274.32\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND10\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND10\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"274.32\" y1=\"99.06\" x2=\"279.4\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"279.4\" y1=\"101.6\" x2=\"274.32\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"101.6\" x2=\"274.32\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"274.32\" y1=\"101.6\" x2=\"274.32\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"274.32\" y=\"101.6\"/>\n<junction x=\"274.32\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND10\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND21\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"287.02\" y1=\"116.84\" x2=\"292.1\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"292.1\" y1=\"116.84\" x2=\"292.1\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND11\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND22\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"248.92\" y1=\"93.98\" x2=\"248.92\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND11\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"248.92\" y1=\"111.76\" x2=\"254\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"109.22\" x2=\"248.92\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"109.22\" x2=\"248.92\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"111.76\"/>\n<wire x1=\"248.92\" y1=\"104.14\" x2=\"254\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND11\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND11\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"254\" y1=\"106.68\" x2=\"248.92\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"106.68\" x2=\"248.92\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"106.68\" x2=\"248.92\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"106.68\"/>\n<junction x=\"248.92\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND11\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND11\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"248.92\" y1=\"99.06\" x2=\"254\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"254\" y1=\"101.6\" x2=\"248.92\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"101.6\" x2=\"248.92\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"248.92\" y1=\"101.6\" x2=\"248.92\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"248.92\" y=\"101.6\"/>\n<junction x=\"248.92\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND11\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND23\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"261.62\" y1=\"116.84\" x2=\"266.7\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"266.7\" y1=\"116.84\" x2=\"266.7\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND12\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND24\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"223.52\" y1=\"93.98\" x2=\"223.52\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND12\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"223.52\" y1=\"111.76\" x2=\"228.6\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"228.6\" y1=\"109.22\" x2=\"223.52\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"109.22\" x2=\"223.52\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"223.52\" y=\"111.76\"/>\n<wire x1=\"223.52\" y1=\"104.14\" x2=\"228.6\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND12\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND12\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"228.6\" y1=\"106.68\" x2=\"223.52\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"106.68\" x2=\"223.52\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"106.68\" x2=\"223.52\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"223.52\" y=\"106.68\"/>\n<junction x=\"223.52\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND12\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND12\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"223.52\" y1=\"99.06\" x2=\"228.6\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"228.6\" y1=\"101.6\" x2=\"223.52\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"101.6\" x2=\"223.52\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"223.52\" y1=\"101.6\" x2=\"223.52\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"223.52\" y=\"101.6\"/>\n<junction x=\"223.52\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND12\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND25\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"236.22\" y1=\"116.84\" x2=\"241.3\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"241.3\" y1=\"116.84\" x2=\"241.3\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND13\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND26\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"198.12\" y1=\"93.98\" x2=\"198.12\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND13\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"198.12\" y1=\"111.76\" x2=\"203.2\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"203.2\" y1=\"109.22\" x2=\"198.12\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"198.12\" y1=\"109.22\" x2=\"198.12\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"198.12\" y=\"111.76\"/>\n<wire x1=\"198.12\" y1=\"104.14\" x2=\"203.2\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND13\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND13\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"203.2\" y1=\"106.68\" x2=\"198.12\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"198.12\" y1=\"106.68\" x2=\"198.12\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"198.12\" y1=\"106.68\" x2=\"198.12\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"198.12\" y=\"106.68\"/>\n<junction x=\"198.12\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND13\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND13\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"198.12\" y1=\"99.06\" x2=\"203.2\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"203.2\" y1=\"101.6\" x2=\"198.12\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"198.12\" y1=\"101.6\" x2=\"198.12\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"198.12\" y1=\"101.6\" x2=\"198.12\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"198.12\" y=\"101.6\"/>\n<junction x=\"198.12\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND13\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND27\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"210.82\" y1=\"116.84\" x2=\"215.9\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"215.9\" y1=\"116.84\" x2=\"215.9\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND14\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND28\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"172.72\" y1=\"93.98\" x2=\"172.72\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND14\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"172.72\" y1=\"111.76\" x2=\"177.8\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"177.8\" y1=\"109.22\" x2=\"172.72\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"172.72\" y1=\"109.22\" x2=\"172.72\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"172.72\" y=\"111.76\"/>\n<wire x1=\"172.72\" y1=\"104.14\" x2=\"177.8\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND14\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND14\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"177.8\" y1=\"106.68\" x2=\"172.72\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"172.72\" y1=\"106.68\" x2=\"172.72\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"172.72\" y1=\"106.68\" x2=\"172.72\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"172.72\" y=\"106.68\"/>\n<junction x=\"172.72\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND14\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND14\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"172.72\" y1=\"99.06\" x2=\"177.8\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"177.8\" y1=\"101.6\" x2=\"172.72\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"172.72\" y1=\"101.6\" x2=\"172.72\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"172.72\" y1=\"101.6\" x2=\"172.72\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"172.72\" y=\"101.6\"/>\n<junction x=\"172.72\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND14\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND29\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"185.42\" y1=\"116.84\" x2=\"190.5\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"190.5\" y1=\"116.84\" x2=\"190.5\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND15\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND30\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"144.78\" y1=\"93.98\" x2=\"144.78\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND15\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"144.78\" y1=\"111.76\" x2=\"149.86\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"149.86\" y1=\"109.22\" x2=\"144.78\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"109.22\" x2=\"144.78\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"144.78\" y=\"111.76\"/>\n<wire x1=\"144.78\" y1=\"104.14\" x2=\"149.86\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND15\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND15\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"149.86\" y1=\"106.68\" x2=\"144.78\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"106.68\" x2=\"144.78\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"106.68\" x2=\"144.78\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"144.78\" y=\"106.68\"/>\n<junction x=\"144.78\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND15\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND15\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"144.78\" y1=\"99.06\" x2=\"149.86\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"149.86\" y1=\"101.6\" x2=\"144.78\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"101.6\" x2=\"144.78\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"144.78\" y1=\"101.6\" x2=\"144.78\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"144.78\" y=\"101.6\"/>\n<junction x=\"144.78\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND15\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND31\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"157.48\" y1=\"116.84\" x2=\"162.56\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"162.56\" y1=\"116.84\" x2=\"162.56\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND16\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND32\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"119.38\" y1=\"93.98\" x2=\"119.38\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND16\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"119.38\" y1=\"111.76\" x2=\"124.46\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"124.46\" y1=\"109.22\" x2=\"119.38\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"109.22\" x2=\"119.38\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"111.76\"/>\n<wire x1=\"119.38\" y1=\"104.14\" x2=\"124.46\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND16\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND16\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"124.46\" y1=\"106.68\" x2=\"119.38\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"106.68\" x2=\"119.38\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"106.68\" x2=\"119.38\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"106.68\"/>\n<junction x=\"119.38\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND16\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND16\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"119.38\" y1=\"99.06\" x2=\"124.46\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"124.46\" y1=\"101.6\" x2=\"119.38\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"101.6\" x2=\"119.38\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"119.38\" y1=\"101.6\" x2=\"119.38\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"119.38\" y=\"101.6\"/>\n<junction x=\"119.38\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND16\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND33\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"132.08\" y1=\"116.84\" x2=\"137.16\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"137.16\" y1=\"116.84\" x2=\"137.16\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND17\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND34\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"93.98\" y1=\"93.98\" x2=\"93.98\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND17\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"93.98\" y1=\"111.76\" x2=\"99.06\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"99.06\" y1=\"109.22\" x2=\"93.98\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"109.22\" x2=\"93.98\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"111.76\"/>\n<wire x1=\"93.98\" y1=\"104.14\" x2=\"99.06\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND17\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND17\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"99.06\" y1=\"106.68\" x2=\"93.98\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"106.68\" x2=\"93.98\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"106.68\" x2=\"93.98\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"106.68\"/>\n<junction x=\"93.98\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND17\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND17\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"93.98\" y1=\"99.06\" x2=\"99.06\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"99.06\" y1=\"101.6\" x2=\"93.98\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"101.6\" x2=\"93.98\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"93.98\" y1=\"101.6\" x2=\"93.98\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"93.98\" y=\"101.6\"/>\n<junction x=\"93.98\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND17\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND35\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"106.68\" y1=\"116.84\" x2=\"111.76\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"111.76\" y1=\"116.84\" x2=\"111.76\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND18\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND36\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"68.58\" y1=\"93.98\" x2=\"68.58\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND18\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"68.58\" y1=\"111.76\" x2=\"73.66\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"73.66\" y1=\"109.22\" x2=\"68.58\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"68.58\" y1=\"109.22\" x2=\"68.58\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"68.58\" y=\"111.76\"/>\n<wire x1=\"68.58\" y1=\"104.14\" x2=\"73.66\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND18\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND18\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"73.66\" y1=\"106.68\" x2=\"68.58\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"68.58\" y1=\"106.68\" x2=\"68.58\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"68.58\" y1=\"106.68\" x2=\"68.58\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"68.58\" y=\"106.68\"/>\n<junction x=\"68.58\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND18\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND18\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"68.58\" y1=\"99.06\" x2=\"73.66\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"73.66\" y1=\"101.6\" x2=\"68.58\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"68.58\" y1=\"101.6\" x2=\"68.58\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"68.58\" y1=\"101.6\" x2=\"68.58\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"68.58\" y=\"101.6\"/>\n<junction x=\"68.58\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND18\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND37\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"81.28\" y1=\"116.84\" x2=\"86.36\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"86.36\" y1=\"116.84\" x2=\"86.36\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND19\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND39\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"40.64\" y1=\"93.98\" x2=\"40.64\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND19\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"40.64\" y1=\"111.76\" x2=\"45.72\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"45.72\" y1=\"109.22\" x2=\"40.64\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"109.22\" x2=\"40.64\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"40.64\" y=\"111.76\"/>\n<wire x1=\"40.64\" y1=\"104.14\" x2=\"45.72\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND19\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND19\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"45.72\" y1=\"106.68\" x2=\"40.64\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"106.68\" x2=\"40.64\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"106.68\" x2=\"40.64\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"40.64\" y=\"106.68\"/>\n<junction x=\"40.64\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND19\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND19\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"40.64\" y1=\"99.06\" x2=\"45.72\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"45.72\" y1=\"101.6\" x2=\"40.64\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"101.6\" x2=\"40.64\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"40.64\" y1=\"101.6\" x2=\"40.64\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"40.64\" y=\"101.6\"/>\n<junction x=\"40.64\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND19\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND40\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"53.34\" y1=\"116.84\" x2=\"58.42\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"58.42\" y1=\"116.84\" x2=\"58.42\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND20\" gate=\"A\" pin=\"6\"/>\n<pinref part=\"GND41\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"15.24\" y1=\"93.98\" x2=\"15.24\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND20\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"15.24\" y1=\"111.76\" x2=\"20.32\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"20.32\" y1=\"109.22\" x2=\"15.24\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"15.24\" y1=\"109.22\" x2=\"15.24\" y2=\"111.76\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"15.24\" y=\"111.76\"/>\n<wire x1=\"15.24\" y1=\"104.14\" x2=\"20.32\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND20\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_AIN_PWRGND20\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"20.32\" y1=\"106.68\" x2=\"15.24\" y2=\"106.68\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"15.24\" y1=\"106.68\" x2=\"15.24\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"15.24\" y1=\"106.68\" x2=\"15.24\" y2=\"109.22\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"15.24\" y=\"106.68\"/>\n<junction x=\"15.24\" y=\"109.22\"/>\n<pinref part=\"PIN_AIN_PWRGND20\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_AIN_PWRGND20\" gate=\"A\" pin=\"16\"/>\n<wire x1=\"15.24\" y1=\"99.06\" x2=\"20.32\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"20.32\" y1=\"101.6\" x2=\"15.24\" y2=\"101.6\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"15.24\" y1=\"101.6\" x2=\"15.24\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"15.24\" y1=\"101.6\" x2=\"15.24\" y2=\"104.14\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"15.24\" y=\"101.6\"/>\n<junction x=\"15.24\" y=\"104.14\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND20\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"GND42\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"27.94\" y1=\"116.84\" x2=\"33.02\" y2=\"116.84\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"33.02\" y1=\"116.84\" x2=\"33.02\" y2=\"93.98\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"16\"/>\n<pinref part=\"GND38\" gate=\"1\" pin=\"GND\"/>\n<wire x1=\"25.4\" y1=\"152.4\" x2=\"25.4\" y2=\"144.78\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"33.02\" y1=\"152.4\" x2=\"25.4\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<junction x=\"25.4\" y=\"152.4\"/>\n</segment>\n<segment>\n<pinref part=\"GND2\" gate=\"1\" pin=\"GND\"/>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"2\"/>\n<wire x1=\"25.4\" y1=\"203.2\" x2=\"25.4\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"AIN1\" class=\"0\">\n<segment>\n<label x=\"320.04\" y=\"167.64\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<wire x1=\"332.74\" y1=\"167.64\" x2=\"320.04\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"TRIGINFROMRIGHT_86\" class=\"0\">\n<segment>\n<label x=\"353.06\" y=\"219.71\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<wire x1=\"347.98\" y1=\"219.71\" x2=\"383.54\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"9\"/>\n</segment>\n</net>\n<net name=\"SERIALTORIGHT_RX_92\" class=\"0\">\n<segment>\n<label x=\"353.06\" y=\"224.79\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<wire x1=\"347.98\" y1=\"224.79\" x2=\"378.46\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"13\"/>\n</segment>\n</net>\n<net name=\"SERIALFROMRIGHT_TX_93\" class=\"0\">\n<segment>\n<label x=\"353.06\" y=\"222.25\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<wire x1=\"347.98\" y1=\"222.25\" x2=\"383.54\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"11\"/>\n</segment>\n</net>\n<net name=\"CLKINFROMRIGHT_26\" class=\"0\">\n<segment>\n<wire x1=\"347.98\" y1=\"209.55\" x2=\"381\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"353.06\" y=\"209.55\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"1\"/>\n</segment>\n</net>\n<net name=\"SPARERIGHT_99\" class=\"0\">\n<segment>\n<wire x1=\"347.98\" y1=\"212.09\" x2=\"378.46\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"353.06\" y=\"212.09\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"3\"/>\n</segment>\n</net>\n<net name=\"IO_101_1\" class=\"4\">\n<segment>\n<wire x1=\"340.36\" y1=\"149.86\" x2=\"365.76\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"365.76\" y=\"149.86\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"15\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"14\"/>\n<wire x1=\"25.4\" y1=\"224.79\" x2=\"7.62\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"224.79\" x2=\"7.62\" y2=\"223.52\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"223.52\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_100_1\" class=\"0\">\n<segment>\n<wire x1=\"340.36\" y1=\"152.4\" x2=\"365.76\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"365.76\" y=\"152.4\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"13\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_91_1\" class=\"0\">\n<segment>\n<wire x1=\"365.76\" y1=\"154.94\" x2=\"340.36\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"365.76\" y=\"154.94\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"11\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_90_!\" class=\"0\">\n<segment>\n<wire x1=\"340.36\" y1=\"157.48\" x2=\"365.76\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"365.76\" y=\"157.48\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"9\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_89_1\" class=\"0\">\n<segment>\n<wire x1=\"340.36\" y1=\"160.02\" x2=\"365.76\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"365.76\" y=\"160.02\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_88_1\" class=\"0\">\n<segment>\n<wire x1=\"340.36\" y1=\"162.56\" x2=\"365.76\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"365.76\" y=\"162.56\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"L121\" class=\"0\">\n<segment>\n<wire x1=\"320.04\" y1=\"165.1\" x2=\"332.74\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"320.04\" y=\"165.1\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"TRIGOUTORIGHT_87\" class=\"0\">\n<segment>\n<label x=\"353.06\" y=\"217.17\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<wire x1=\"347.98\" y1=\"217.17\" x2=\"383.54\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"N$1\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"340.36\" y1=\"224.79\" x2=\"332.74\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$2\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"11\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"332.74\" y1=\"222.25\" x2=\"340.36\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$3\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"340.36\" y1=\"219.71\" x2=\"332.74\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$4\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"340.36\" y1=\"217.17\" x2=\"332.74\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$5\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"340.36\" y1=\"212.09\" x2=\"332.74\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$6\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"PIN_ANALOG_1\" gate=\"A\" pin=\"2\"/>\n<wire x1=\"332.74\" y1=\"209.55\" x2=\"340.36\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$7\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"317.5\" y1=\"209.55\" x2=\"325.12\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$8\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"317.5\" y1=\"212.09\" x2=\"325.12\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$10\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"317.5\" y1=\"217.17\" x2=\"325.12\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$11\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"317.5\" y1=\"219.71\" x2=\"325.12\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$12\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"317.5\" y1=\"222.25\" x2=\"325.12\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$13\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_2\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"317.5\" y1=\"224.79\" x2=\"325.12\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$15\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"302.26\" y1=\"209.55\" x2=\"309.88\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$16\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"302.26\" y1=\"212.09\" x2=\"309.88\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$19\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"302.26\" y1=\"217.17\" x2=\"309.88\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$20\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"302.26\" y1=\"219.71\" x2=\"309.88\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$21\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"302.26\" y1=\"222.25\" x2=\"309.88\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$22\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_3\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"302.26\" y1=\"224.79\" x2=\"309.88\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$24\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"287.02\" y1=\"209.55\" x2=\"294.64\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$25\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"287.02\" y1=\"212.09\" x2=\"294.64\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$27\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"287.02\" y1=\"217.17\" x2=\"294.64\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$28\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"287.02\" y1=\"219.71\" x2=\"294.64\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$29\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"287.02\" y1=\"222.25\" x2=\"294.64\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$30\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_4\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"287.02\" y1=\"224.79\" x2=\"294.64\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$32\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"271.78\" y1=\"209.55\" x2=\"279.4\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$33\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"271.78\" y1=\"212.09\" x2=\"279.4\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$35\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"271.78\" y1=\"217.17\" x2=\"279.4\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$36\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"271.78\" y1=\"219.71\" x2=\"279.4\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$37\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"271.78\" y1=\"222.25\" x2=\"279.4\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$38\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_5\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"271.78\" y1=\"224.79\" x2=\"279.4\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$40\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"256.54\" y1=\"209.55\" x2=\"264.16\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$41\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"256.54\" y1=\"212.09\" x2=\"264.16\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$43\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"256.54\" y1=\"217.17\" x2=\"264.16\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$44\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"256.54\" y1=\"219.71\" x2=\"264.16\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$45\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"256.54\" y1=\"222.25\" x2=\"264.16\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$46\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_6\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"256.54\" y1=\"224.79\" x2=\"264.16\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$48\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"241.3\" y1=\"209.55\" x2=\"248.92\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$49\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"241.3\" y1=\"212.09\" x2=\"248.92\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$51\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"241.3\" y1=\"217.17\" x2=\"248.92\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$52\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"241.3\" y1=\"219.71\" x2=\"248.92\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$53\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"241.3\" y1=\"222.25\" x2=\"248.92\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$54\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_7\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"241.3\" y1=\"224.79\" x2=\"248.92\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$56\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"226.06\" y1=\"209.55\" x2=\"233.68\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$57\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"226.06\" y1=\"212.09\" x2=\"233.68\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$59\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"226.06\" y1=\"217.17\" x2=\"233.68\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$60\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"226.06\" y1=\"219.71\" x2=\"233.68\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$61\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"226.06\" y1=\"222.25\" x2=\"233.68\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$62\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_8\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"226.06\" y1=\"224.79\" x2=\"233.68\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$64\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"210.82\" y1=\"209.55\" x2=\"218.44\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$65\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"210.82\" y1=\"212.09\" x2=\"218.44\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$67\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"210.82\" y1=\"217.17\" x2=\"218.44\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$68\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"210.82\" y1=\"219.71\" x2=\"218.44\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$69\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"210.82\" y1=\"222.25\" x2=\"218.44\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$70\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_9\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"210.82\" y1=\"224.79\" x2=\"218.44\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$72\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"195.58\" y1=\"209.55\" x2=\"203.2\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$73\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"195.58\" y1=\"212.09\" x2=\"203.2\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$75\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"195.58\" y1=\"217.17\" x2=\"203.2\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$76\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"195.58\" y1=\"219.71\" x2=\"203.2\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$77\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"195.58\" y1=\"222.25\" x2=\"203.2\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$78\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_10\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"195.58\" y1=\"224.79\" x2=\"203.2\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$80\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"180.34\" y1=\"209.55\" x2=\"187.96\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$81\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"180.34\" y1=\"212.09\" x2=\"187.96\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$83\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"180.34\" y1=\"217.17\" x2=\"187.96\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$84\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"180.34\" y1=\"219.71\" x2=\"187.96\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$85\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"180.34\" y1=\"222.25\" x2=\"187.96\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$86\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_11\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"180.34\" y1=\"224.79\" x2=\"187.96\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$88\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"165.1\" y1=\"209.55\" x2=\"172.72\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$89\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"165.1\" y1=\"212.09\" x2=\"172.72\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$91\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"165.1\" y1=\"217.17\" x2=\"172.72\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$92\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"165.1\" y1=\"219.71\" x2=\"172.72\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$93\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"165.1\" y1=\"222.25\" x2=\"172.72\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$94\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_12\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"165.1\" y1=\"224.79\" x2=\"172.72\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$96\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"149.86\" y1=\"209.55\" x2=\"157.48\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$97\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"149.86\" y1=\"212.09\" x2=\"157.48\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$99\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"149.86\" y1=\"217.17\" x2=\"157.48\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$100\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"149.86\" y1=\"219.71\" x2=\"157.48\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$101\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"149.86\" y1=\"222.25\" x2=\"157.48\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$102\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_13\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"149.86\" y1=\"224.79\" x2=\"157.48\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$104\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"134.62\" y1=\"209.55\" x2=\"142.24\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$105\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"134.62\" y1=\"212.09\" x2=\"142.24\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$107\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"134.62\" y1=\"217.17\" x2=\"142.24\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$108\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"134.62\" y1=\"219.71\" x2=\"142.24\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$109\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"134.62\" y1=\"222.25\" x2=\"142.24\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$110\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_14\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"134.62\" y1=\"224.79\" x2=\"142.24\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$112\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"119.38\" y1=\"209.55\" x2=\"127\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$113\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"119.38\" y1=\"212.09\" x2=\"127\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$115\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"119.38\" y1=\"217.17\" x2=\"127\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$116\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"119.38\" y1=\"219.71\" x2=\"127\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$117\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"119.38\" y1=\"222.25\" x2=\"127\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$118\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_15\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"119.38\" y1=\"224.79\" x2=\"127\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$120\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"104.14\" y1=\"209.55\" x2=\"111.76\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$121\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"104.14\" y1=\"212.09\" x2=\"111.76\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$123\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"104.14\" y1=\"217.17\" x2=\"111.76\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$124\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"104.14\" y1=\"219.71\" x2=\"111.76\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$125\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"104.14\" y1=\"222.25\" x2=\"111.76\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$126\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_16\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"104.14\" y1=\"224.79\" x2=\"111.76\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$128\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"88.9\" y1=\"209.55\" x2=\"96.52\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$129\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"88.9\" y1=\"212.09\" x2=\"96.52\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$131\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"88.9\" y1=\"217.17\" x2=\"96.52\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$132\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"88.9\" y1=\"219.71\" x2=\"96.52\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$133\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"88.9\" y1=\"222.25\" x2=\"96.52\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$134\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_17\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"88.9\" y1=\"224.79\" x2=\"96.52\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$136\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"73.66\" y1=\"209.55\" x2=\"81.28\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$137\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"73.66\" y1=\"212.09\" x2=\"81.28\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$139\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"73.66\" y1=\"217.17\" x2=\"81.28\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$140\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"73.66\" y1=\"219.71\" x2=\"81.28\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$141\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"73.66\" y1=\"222.25\" x2=\"81.28\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$142\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_18\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"73.66\" y1=\"224.79\" x2=\"81.28\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$144\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"2\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"58.42\" y1=\"209.55\" x2=\"66.04\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$145\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"4\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"58.42\" y1=\"212.09\" x2=\"66.04\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$147\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"8\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"58.42\" y1=\"217.17\" x2=\"66.04\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$148\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"10\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"58.42\" y1=\"219.71\" x2=\"66.04\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$149\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"12\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"58.42\" y1=\"222.25\" x2=\"66.04\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$150\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_19\" gate=\"A\" pin=\"14\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"58.42\" y1=\"224.79\" x2=\"66.04\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$152\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"1\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"2\"/>\n<wire x1=\"50.8\" y1=\"209.55\" x2=\"33.02\" y2=\"209.55\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$153\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"3\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"4\"/>\n<wire x1=\"50.8\" y1=\"212.09\" x2=\"33.02\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$155\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"7\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"50.8\" y1=\"217.17\" x2=\"33.02\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$156\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"9\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"10\"/>\n<wire x1=\"50.8\" y1=\"219.71\" x2=\"33.02\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$157\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"11\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"50.8\" y1=\"222.25\" x2=\"33.02\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"N$158\" class=\"0\">\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"13\"/>\n<pinref part=\"PIN_ANALOG_20\" gate=\"A\" pin=\"14\"/>\n<wire x1=\"50.8\" y1=\"224.79\" x2=\"33.02\" y2=\"224.79\" width=\"0.1524\" layer=\"91\"/>\n</segment>\n</net>\n<net name=\"AIN1_2\" class=\"0\">\n<segment>\n<label x=\"269.24\" y=\"167.64\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<wire x1=\"281.94\" y1=\"167.64\" x2=\"269.24\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"2\"/>\n</segment>\n</net>\n<net name=\"L121_2\" class=\"0\">\n<segment>\n<wire x1=\"269.24\" y1=\"165.1\" x2=\"281.94\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"269.24\" y=\"165.1\" size=\"1.778\" layer=\"95\" rot=\"MR180\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"4\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_88_2\" class=\"0\">\n<segment>\n<wire x1=\"289.56\" y1=\"162.56\" x2=\"314.96\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"314.96\" y=\"162.56\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"5\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_89_2\" class=\"0\">\n<segment>\n<wire x1=\"289.56\" y1=\"160.02\" x2=\"314.96\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"314.96\" y=\"160.02\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"7\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_90_2\" class=\"0\">\n<segment>\n<wire x1=\"289.56\" y1=\"157.48\" x2=\"314.96\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"314.96\" y=\"157.48\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"9\"/>\n</segment>\n</net>\n<net name=\"IO_CLK_91_2\" class=\"0\">\n<segment>\n<wire x1=\"314.96\" y1=\"154.94\" x2=\"289.56\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"314.96\" y=\"154.94\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"11\"/>\n</segment>\n</net>\n<net name=\"IO_100_2\" class=\"0\">\n<segment>\n<wire x1=\"289.56\" y1=\"152.4\" x2=\"314.96\" y2=\"152.4\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"314.96\" y=\"152.4\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"13\"/>\n</segment>\n</net>\n<net name=\"IO_101_2\" class=\"4\">\n<segment>\n<wire x1=\"289.56\" y1=\"149.86\" x2=\"314.96\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"314.96\" y=\"149.86\" size=\"1.778\" layer=\"95\" rot=\"R180\"/>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"15\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"25.4\" y1=\"222.25\" x2=\"7.62\" y2=\"222.25\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"222.25\" x2=\"7.62\" y2=\"220.98\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"220.98\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"3V3_1\" class=\"2\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND1\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"340.36\" y1=\"165.1\" x2=\"365.76\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"358.14\" y=\"165.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"3V3_2\" class=\"2\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND2\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"289.56\" y1=\"165.1\" x2=\"314.96\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"307.34\" y=\"165.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_3\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND3\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"259.08\" y1=\"149.86\" x2=\"269.24\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"259.08\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"10\"/>\n<wire x1=\"25.4\" y1=\"219.71\" x2=\"7.62\" y2=\"219.71\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"219.71\" x2=\"7.62\" y2=\"218.44\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"218.44\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_4\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND4\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"233.68\" y1=\"149.86\" x2=\"243.84\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"236.22\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"25.4\" y1=\"217.17\" x2=\"7.62\" y2=\"217.17\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"217.17\" x2=\"7.62\" y2=\"215.9\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"215.9\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_5\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND5\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"208.28\" y1=\"149.86\" x2=\"218.44\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"210.82\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"6\"/>\n<wire x1=\"25.4\" y1=\"214.63\" x2=\"7.62\" y2=\"214.63\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"214.63\" x2=\"7.62\" y2=\"213.36\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"213.36\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_6\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND6\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"182.88\" y1=\"149.86\" x2=\"193.04\" y2=\"149.86\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"185.42\" y=\"149.86\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_ANALOG_21\" gate=\"A\" pin=\"4\"/>\n<wire x1=\"25.4\" y1=\"212.09\" x2=\"7.62\" y2=\"212.09\" width=\"0.1524\" layer=\"91\"/>\n<wire x1=\"7.62\" y1=\"212.09\" x2=\"7.62\" y2=\"210.82\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"210.82\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_7\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND7\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"363.22\" y1=\"99.06\" x2=\"373.38\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"365.76\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"1\"/>\n<wire x1=\"33.02\" y1=\"170.18\" x2=\"45.72\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"35.56\" y=\"170.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_8\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND8\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"337.82\" y1=\"99.06\" x2=\"347.98\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"340.36\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"3\"/>\n<wire x1=\"33.02\" y1=\"167.64\" x2=\"45.72\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"35.56\" y=\"167.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_9\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND9\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"312.42\" y1=\"99.06\" x2=\"322.58\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"312.42\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"5\"/>\n<wire x1=\"33.02\" y1=\"165.1\" x2=\"45.72\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"35.56\" y=\"165.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_10\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND10\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"287.02\" y1=\"99.06\" x2=\"297.18\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"287.02\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"7\"/>\n<wire x1=\"33.02\" y1=\"162.56\" x2=\"45.72\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"35.56\" y=\"162.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_20\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND20\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"27.94\" y1=\"99.06\" x2=\"38.1\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"27.94\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"2\"/>\n<wire x1=\"25.4\" y1=\"170.18\" x2=\"12.7\" y2=\"170.18\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"170.18\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_19\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND19\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"53.34\" y1=\"99.06\" x2=\"63.5\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"53.34\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"4\"/>\n<wire x1=\"25.4\" y1=\"167.64\" x2=\"12.7\" y2=\"167.64\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"167.64\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_18\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND18\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"81.28\" y1=\"99.06\" x2=\"91.44\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"81.28\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"6\"/>\n<wire x1=\"25.4\" y1=\"165.1\" x2=\"12.7\" y2=\"165.1\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"165.1\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_17\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND17\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"106.68\" y1=\"99.06\" x2=\"116.84\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"106.68\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"8\"/>\n<wire x1=\"25.4\" y1=\"162.56\" x2=\"12.7\" y2=\"162.56\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"162.56\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_16\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND16\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"132.08\" y1=\"99.06\" x2=\"142.24\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"132.08\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"10\"/>\n<wire x1=\"25.4\" y1=\"160.02\" x2=\"12.7\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_15\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND15\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"157.48\" y1=\"99.06\" x2=\"170.18\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"160.02\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"12\"/>\n<wire x1=\"25.4\" y1=\"157.48\" x2=\"12.7\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"157.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_14\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND14\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"185.42\" y1=\"99.06\" x2=\"195.58\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"185.42\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"14\"/>\n<wire x1=\"25.4\" y1=\"154.94\" x2=\"12.7\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"7.62\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_13\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND13\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"210.82\" y1=\"99.06\" x2=\"220.98\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"210.82\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"13\"/>\n<wire x1=\"33.02\" y1=\"154.94\" x2=\"45.72\" y2=\"154.94\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"35.56\" y=\"154.94\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_12\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND12\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"236.22\" y1=\"99.06\" x2=\"246.38\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"236.22\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"11\"/>\n<wire x1=\"33.02\" y1=\"157.48\" x2=\"45.72\" y2=\"157.48\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"35.56\" y=\"157.48\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n<net name=\"IO_101_11\" class=\"4\">\n<segment>\n<pinref part=\"PIN_AIN_PWRGND11\" gate=\"A\" pin=\"15\"/>\n<wire x1=\"261.62\" y1=\"99.06\" x2=\"271.78\" y2=\"99.06\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"261.62\" y=\"99.06\" size=\"1.778\" layer=\"95\"/>\n</segment>\n<segment>\n<pinref part=\"PIN_AIN_PWRGND21\" gate=\"A\" pin=\"9\"/>\n<wire x1=\"33.02\" y1=\"160.02\" x2=\"45.72\" y2=\"160.02\" width=\"0.1524\" layer=\"91\"/>\n<label x=\"35.56\" y=\"160.02\" size=\"1.778\" layer=\"95\"/>\n</segment>\n</net>\n</nets>\n</sheet>\n</sheets>\n<errors>\n<approved hash=\"106,1,340.36,165.1,3V3_1,,,,,\"/>\n<approved hash=\"106,1,289.56,165.1,3V3_2,,,,,\"/>\n<approved hash=\"106,1,332.74,167.64,AIN1,,,,,\"/>\n<approved hash=\"106,1,281.94,167.64,AIN1_2,,,,,\"/>\n<approved hash=\"106,1,347.98,209.55,CLKINFROMRIGHT_26,,,,,\"/>\n<approved hash=\"106,1,340.36,152.4,IO_100_1,,,,,\"/>\n<approved hash=\"106,1,289.56,152.4,IO_100_2,,,,,\"/>\n<approved hash=\"106,1,340.36,162.56,IO_CLK_88_1,,,,,\"/>\n<approved hash=\"106,1,289.56,162.56,IO_CLK_88_2,,,,,\"/>\n<approved hash=\"106,1,340.36,160.02,IO_CLK_89_1,,,,,\"/>\n<approved hash=\"106,1,289.56,160.02,IO_CLK_89_2,,,,,\"/>\n<approved hash=\"106,1,340.36,157.48,IO_CLK_90_!,,,,,\"/>\n<approved hash=\"106,1,289.56,157.48,IO_CLK_90_2,,,,,\"/>\n<approved hash=\"106,1,340.36,154.94,IO_CLK_91_1,,,,,\"/>\n<approved hash=\"106,1,289.56,154.94,IO_CLK_91_2,,,,,\"/>\n<approved hash=\"106,1,332.74,165.1,L121,,,,,\"/>\n<approved hash=\"106,1,281.94,165.1,L121_2,,,,,\"/>\n<approved hash=\"106,1,347.98,222.25,SERIALFROMRIGHT_TX_93,,,,,\"/>\n<approved hash=\"106,1,347.98,224.79,SERIALTORIGHT_RX_92,,,,,\"/>\n<approved hash=\"106,1,347.98,212.09,SPARERIGHT_99,,,,,\"/>\n<approved hash=\"106,1,347.98,219.71,TRIGINFROMRIGHT_86,,,,,\"/>\n<approved hash=\"106,1,347.98,217.17,TRIGOUTORIGHT_87,,,,,\"/>\n<approved hash=\"113,1,193.571,130.071,FRAME1,,,,,\"/>\n</errors>\n</schematic>\n</drawing>\n<compatibility>\n<note version=\"8.2\" severity=\"warning\">\nSince Version 8.2, EAGLE supports online libraries. The ids\nof those online libraries will not be understood (or retained)\nwith this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports URNs for individual library\nassets (packages, symbols, and devices). The URNs of those assets\nwill not be understood (or retained) with this version.\n</note>\n<note version=\"8.3\" severity=\"warning\">\nSince Version 8.3, EAGLE supports the association of 3D packages\nwith devices in libraries, schematics, and board files. Those 3D\npackages will not be understood (or retained) with this version.\n</note>\n</compatibility>\n</eagle>\n"
  },
  {
    "path": "max10_adc_firmware/ASSERTION_ERROR.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 64 64)\r\n\t(text \"ASSERTION_ERROR\" (rect 5 0 107 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 32 20 44)(font \"Arial\" ))\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 32 32)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/BaudTickGen.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 152 96)\r\n\t(text \"BaudTickGen\" (rect 5 0 58 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 64 20 76)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"enable\" (rect 0 0 24 12)(font \"Arial\" ))\r\n\t\t(text \"enable\" (rect 21 43 45 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 136 32)\r\n\t\t(output)\r\n\t\t(text \"tick\" (rect 0 0 12 12)(font \"Arial\" ))\r\n\t\t(text \"tick\" (rect 103 27 115 39)(font \"Arial\" ))\r\n\t\t(line (pt 136 32)(pt 120 32)(line_width 1))\r\n\t)\r\n\t(parameter\r\n\t\t\"ClkFrequency\"\r\n\t\t\"25000000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Baud\"\r\n\t\t\"115200\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Oversampling\"\r\n\t\t\"1\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 120 64)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 152 -64 252 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/Chain1.cdf",
    "content": "/* Quartus Prime Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition */\r\nJedecChain;\r\n\tFileRevision(JESD32A);\r\n\tDefaultMfr(6E);\r\n\r\n\tP ActionCode(Cfg)\r\n\t\tDevice PartName(10M08SAE144ES) Path(\"C:/gitwork/master/Haasoscope/max10_adc_firmware/output_files/\") File(\"serial1.sof\") MfrSpec(OpMask(1));\r\n\r\nChainEnd;\r\n\r\nAlteraBegin;\r\n\tChainType(JTAG);\r\nAlteraEnd;\r\n"
  },
  {
    "path": "max10_adc_firmware/Chain2.cdf",
    "content": "/* Quartus Prime Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition */\r\nJedecChain;\r\n\tFileRevision(JESD32A);\r\n\tDefaultMfr(6E);\r\n\r\n\tP ActionCode(Cfg)\r\n\t\tDevice PartName(10M08SAE144ES) Path(\"C:/gitwork/master/Haasoscope/max10_adc_firmware/output_files/\") File(\"serial1.pof\") MfrSpec(OpMask(1) Child_OpMask(2 1 1));\r\n\r\nChainEnd;\r\n\r\nAlteraBegin;\r\n\tChainType(JTAG);\r\nAlteraEnd;\r\n"
  },
  {
    "path": "max10_adc_firmware/DelayLine.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 272 128)\r\n\t(text \"DelayLine\" (rect 5 0 45 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"a[data_width-1..0]\" (rect 0 0 67 12)(font \"Arial\" ))\r\n\t\t(text \"a[data_width-1..0]\" (rect 21 27 88 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"b[data_width-1..0]\" (rect 0 0 67 12)(font \"Arial\" ))\r\n\t\t(text \"b[data_width-1..0]\" (rect 21 43 88 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"START\" (rect 0 0 34 12)(font \"Arial\" ))\r\n\t\t(text \"START\" (rect 21 59 55 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"STOP\" (rect 0 0 24 12)(font \"Arial\" ))\r\n\t\t(text \"STOP\" (rect 21 75 45 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 32)\r\n\t\t(output)\r\n\t\t(text \"output[data_width-1..0]\" (rect 0 0 86 12)(font \"Arial\" ))\r\n\t\t(text \"output[data_width-1..0]\" (rect 149 27 235 39)(font \"Arial\" ))\r\n\t\t(line (pt 256 32)(pt 240 32)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"DATA_WIDTH\"\r\n\t\t\"20\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 240 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 272 -64 372 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/SPI.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 248 160)\r\n\t(text \"SPI\" (rect 5 0 19 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"ClkI\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"ClkI\" (rect 21 27 36 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"DI\" (rect 0 0 9 12)(font \"Arial\" ))\r\n\t\t(text \"DI\" (rect 21 43 30 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"Rst\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"Rst\" (rect 21 59 36 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"Trig\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"Trig\" (rect 21 75 36 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"PDI[bitwidth-1..0]\" (rect 0 0 63 12)(font \"Arial\" ))\r\n\t\t(text \"PDI[bitwidth-1..0]\" (rect 21 91 84 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 32)\r\n\t\t(output)\r\n\t\t(text \"ClkO\" (rect 0 0 20 12)(font \"Arial\" ))\r\n\t\t(text \"ClkO\" (rect 191 27 211 39)(font \"Arial\" ))\r\n\t\t(line (pt 232 32)(pt 216 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 48)\r\n\t\t(output)\r\n\t\t(text \"DO\" (rect 0 0 14 12)(font \"Arial\" ))\r\n\t\t(text \"DO\" (rect 197 43 211 55)(font \"Arial\" ))\r\n\t\t(line (pt 232 48)(pt 216 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 64)\r\n\t\t(output)\r\n\t\t(text \"CS\" (rect 0 0 12 12)(font \"Arial\" ))\r\n\t\t(text \"CS\" (rect 199 59 211 71)(font \"Arial\" ))\r\n\t\t(line (pt 232 64)(pt 216 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 80)\r\n\t\t(output)\r\n\t\t(text \"Bsy\" (rect 0 0 16 12)(font \"Arial\" ))\r\n\t\t(text \"Bsy\" (rect 195 75 211 87)(font \"Arial\" ))\r\n\t\t(line (pt 232 80)(pt 216 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 96)\r\n\t\t(output)\r\n\t\t(text \"PDO[bitwidth-1..0]\" (rect 0 0 68 12)(font \"Arial\" ))\r\n\t\t(text \"PDO[bitwidth-1..0]\" (rect 143 91 211 103)(font \"Arial\" ))\r\n\t\t(line (pt 232 96)(pt 216 96)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"BitWidth\"\r\n\t\t\"8\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Prescaler\"\r\n\t\t\"0\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Master\"\r\n\t\t\"'1'\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_ENUM\")\t)\r\n\t(parameter\r\n\t\t\"CPHA\"\r\n\t\t\"'1'\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_ENUM\")\t)\r\n\t(parameter\r\n\t\t\"CPOL\"\r\n\t\t\"'0'\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_ENUM\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 216 128)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 248 -64 348 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/SPI.vhd",
    "content": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity SPI is\n\tgeneric(\n\t\tBitWidth: natural := 8;\n\t\tPrescaler: natural := 0;\n\t\tMaster: std_logic := '1';\n\t\tCPHA: std_logic := '1'; --Rising edge = 1, Falling edge = 0\n\t\tCPOL: std_logic := '0' --Idle high = 1, Idle low = 0\n\t);\n\tport(\n\t\tClkO, DO, CS, Bsy: out std_logic;\n\t\tClkI, DI, Rst, Trig: in std_logic;\n\t\tPDI: in std_logic_vector(BitWidth-1 downto 0); --Parallel data in\n\t\tPDO: out std_logic_vector(BitWidth-1 downto 0) --Parallel data out\n\t);\nend SPI;\n\narchitecture A of SPI is\n\tconstant CSTog: std_logic := '1';\n\ttype States is (CSLow, CSHigh, DShift);\n\tsignal State: States := CSHigh;\n\tsignal DataI, DataO: std_logic_vector(BitWidth-1 downto 0);\n\tsignal Presc: unsigned(7 downto 0);\n\tsignal ClkOv: std_logic;\n\tsignal DCnt: unsigned(4 downto 0) := to_unsigned(BitWidth, 5);\n\tsignal TA, TAA: std_logic := '0';\n\t\n\tbegin\t\n\tprocess(ClkI, DI, Rst, ClkOv)\n\tbegin\n\t\tif(Rst = '0') then\n\t\t\tState <= CSHigh;\n\t\t\tCS <= '1';\n\t\t\tDO <= '0';\n\t\t\tClkO <= '0';\n\t\t\tTA <= '0';\n\t\t\tTAA <= '0';\n\t\telsif(rising_edge(ClkI)) then\n\t\t\tTAA <= TA;\n\t\t\tTA <= Trig;\n\t\t\t\n\t\t\t--Rising edge\n\t\t\tif(TAA = '0' and TA = '1') then\n\t\t\t\tDataO <= PDI;\n\t\t\t\tState <= CSLow;\n\t\t\tend if;\n\t\t\n\t\t\tif(Presc(Prescaler) = '1') then\n\t\t\tPresc <= (others => '0');\n\t\t\t\tif(Master = '1') then\t\t\t\t\t\n\t\t\t\t\tcase State is\n\t\t\t\t\t\twhen CSHigh => \n\t\t\t\t\t\t\tBsy <= '0';\n\t\t\t\t\t\t\t\r\n\t\t\t\t\t\t\t--if(CSTog = '1') then CS <= '1'; end if; -- ACH\r\n\t\t\t\t\t\t\tCS <= '1';\n\t\t\t\t\t\t\t\r\n\t\t\t\t\t\t\tDCnt <= to_unsigned(BitWidth, 5);\n\t\t\t\t\t\t\tDO <= '0';\n\t\t\t\t\t\t\tClkOv <= '0';\n\t\t\t\t\t\twhen CSLow =>\n\t\t\t\t\t\t\tBsy <= '1';\n\t\t\t\t\t\t\tState <= DShift;\n\t\t\t\t\t\t\tCS <= '0';\n\t\t\t\t\t\t\tDO <= DataO(7);\n\t\t\t\t\t\twhen DShift =>\n\t\t\t\t\t\t\tif(DCnt = \"000\") then\n\t\t\t\t\t\t\t\tState <= CSHigh;\n\t\t\t\t\t\t\t\tPDO <= DataI;\n\t\t\t\t\t\t\tend if;\n\t\t\t\t\t\t\t\n\t\t\t\t\t\t\tif(ClkOv = CPHA) then\n\t\t\t\t\t\t\t\tDO <= DataO(to_integer(DCnt-1));\n\t\t\t\t\t\t\telse\n\t\t\t\t\t\t\t\tDataI(7 downto 0) <= DataI(6 downto 0) & DI;\n\t\t\t\t\t\t\t\tDCnt <= DCnt - 1;\n\t\t\t\t\t\t\tend if;\n\t\t\t\t\t\t\tClkOv <= not ClkOv;\n\t\t\t\t\tend case;\n\t\t\t\telse --Slave not yet implemented!\n\t\t\t\tend if;\n\t\t\telse\n\t\t\t\tPresc <= Presc + 1;\n\t\t\tend if;\n\t\tend if;\n\t\tClkO <= ClkOv xor CPOL;\n\tend process;\nend A;"
  },
  {
    "path": "max10_adc_firmware/SSD1306.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 224 160)\r\n\t(text \"SSD1306\" (rect 5 0 41 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"Clk\" (rect 0 0 12 12)(font \"Arial\" ))\r\n\t\t(text \"Clk\" (rect 21 27 33 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"Rst\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"Rst\" (rect 21 43 36 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"Bsy\" (rect 0 0 16 12)(font \"Arial\" ))\r\n\t\t(text \"Bsy\" (rect 21 59 37 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"Source\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"Source\" (rect 21 75 49 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"MemDI[7..0]\" (rect 0 0 50 12)(font \"Arial\" ))\r\n\t\t(text \"MemDI[7..0]\" (rect 21 91 71 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 32)\r\n\t\t(output)\r\n\t\t(text \"PDO[7..0]\" (rect 0 0 40 12)(font \"Arial\" ))\r\n\t\t(text \"PDO[7..0]\" (rect 147 27 187 39)(font \"Arial\" ))\r\n\t\t(line (pt 208 32)(pt 192 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 48)\r\n\t\t(output)\r\n\t\t(text \"Trig\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"Trig\" (rect 172 43 187 55)(font \"Arial\" ))\r\n\t\t(line (pt 208 48)(pt 192 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 64)\r\n\t\t(output)\r\n\t\t(text \"CD\" (rect 0 0 14 12)(font \"Arial\" ))\r\n\t\t(text \"CD\" (rect 173 59 187 71)(font \"Arial\" ))\r\n\t\t(line (pt 208 64)(pt 192 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 80)\r\n\t\t(output)\r\n\t\t(text \"MADDR[9..0]\" (rect 0 0 59 12)(font \"Arial\" ))\r\n\t\t(text \"MADDR[9..0]\" (rect 128 75 187 87)(font \"Arial\" ))\r\n\t\t(line (pt 208 80)(pt 192 80)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 192 128)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/SSD1306.vhd",
    "content": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity SSD1306 is\n\tport(\n\t\tPDO: out std_logic_vector(7 downto 0);\t\t\n\t\tClk, Rst, Bsy, Source: in std_logic;\n\t\tTrig, CD: out std_logic;\t\t\n\t\tMADDR: out std_logic_vector(9 downto 0);\n\t\tMemDI: in std_logic_vector(7 downto 0)\n\t);\nend SSD1306;\n\narchitecture Ar of SSD1306 is\nconstant AMNT_INSTRS: natural := 27;\nconstant CONTRAST: std_logic_vector(7 downto 0) := x\"0F\";\ntype IAR is array (0 to AMNT_INSTRS-1) of std_logic_vector(7 downto 0);\nsignal Instrs: IAR := (x\"A8\", x\"3F\", x\"D3\", x\"00\", x\"40\", x\"A0\", x\"DA\", x\"12\", x\"81\", CONTRAST, x\"20\", x\"00\", x\"21\", x\"00\", x\"7F\", x\"22\", x\"00\", x\"07\", \nx\"A6\", --A6 for no invert --A7 for invert\nx\"DB\", x\"40\", x\"A4\", x\"D5\", x\"80\", x\"8D\", x\"14\", x\"AF\");\n\nconstant AMNT_DATA: natural := 1024;\ntype IDATA is array (0 to AMNT_DATA-1) of std_logic_vector(7 downto 0);\nsignal Datas: IDATA := ( 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PStates is (Init, Draw);\ntype SStates is (BusyWaitA, BusyWaitB, Writing, Done);\n\nsignal SPISt: SStates := Done;\nsignal PSt: PStates := Init;\nsignal PInstr: unsigned(7 downto 0);\nsignal MemAddr: unsigned(9 downto 0);\n\nbegin\n\tprocess(Clk, Rst, Bsy, Source,MemAddr) -- ACH added MemAddr\n\tbegin\n\t\tMADDR <= std_logic_vector(MemAddr);\n\t\t\n\t\tif(Rst = '0') then\n\t\t\tPSt <= Init;\n\t\t\tSPISt <= Done;\n\t\t\tPInstr <= (others => '0');\n\t\telsif(rising_edge(Clk)) then\n\t\t\tif(PSt = Init) then\n\t\t\t\tCD <= '0';\n\t\t\t\tif(SPISt = Done) then\n\t\t\t\t\tPDO <= (Instrs(to_integer(PInstr)));\n\t\t\t\t\tTrig <= '1';\n\t\t\t\t\tSPISt <= BusyWaitA;\n\t\t\t\telsif(SPISt = BusyWaitA) then\n\t\t\t\t\tif(Bsy = '1') then\n\t\t\t\t\t\tPInstr <= PInstr + 1;\n\t\t\t\t\t\tSPISt <= Writing;\n\t\t\t\t\t\tTrig <= '0';\n\t\t\t\t\tend if;\n\t\t\t\telse\n\t\t\t\t\tif(Bsy = '0') then\n\t\t\t\t\t\tSPISt <= Done;\n\t\t\t\t\t\tif(PInstr = AMNT_INSTRS) then\n\t\t\t\t\t\t\tPSt <= Draw;\n\t\t\t\t\t\t\tPInstr <= (others => '0');\n\t\t\t\t\t\t\tMemAddr <= b\"1111111111\";\n\t\t\t\t\t\tend if;\n\t\t\t\t\tend if;\n\t\t\t\tend if;\n\t\t\telse --Draw\n\t\t\t\tCD <= '1';\n\t\t\t\t\n\t\t\t\tif(SPISt = Done) then\n\t\t\t\t\t\n\t\t\t\t\t--if (MemAddr>150) then PDO <= x\"f0\";\n\t\t\t\t\t--else PDO <= x\"55\";\n\t\t\t\t\t--end if;\n\t\t\t\t\t\n\t\t\t\t\tif (Source = '0') then PDO <= Datas(to_integer(MemAddr));\t\t\t\t\t\n\t\t\t\t\telse PDO <= MemDI;\n\t\t\t\t\tend if;\n\t\t\t\t\t\n\t\t\t\t\tTrig <= '1';\n\t\t\t\t\tSPISt <= BusyWaitA;\n\t\t\t\telsif(SPISt = BusyWaitA) then\n\t\t\t\t\tif(Bsy = '1') then\n\t\t\t\t\t\tMemAddr <= MemAddr - 1;\n\t\t\t\t\t\tPInstr <= PInstr + 1;\n\t\t\t\t\t\tSPISt <= Writing;\n\t\t\t\t\t\tTrig <= '0';\n\t\t\t\t\tend if;\n\t\t\t\telse\n\t\t\t\t\tif(Bsy = '0') then SPISt <= Done; end if;\n\t\t\t\tend if;\n\t\t\tend if;\n\t\tend if;\n\tend process;\nend Ar;\n"
  },
  {
    "path": "max10_adc_firmware/SSD1306.vhd.bak",
    "content": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity SSD1306 is\n\tport(\n\t\tPDO: out std_logic_vector(7 downto 0);\n\t\t-- MADDR: out std_logic_vector(9 downto 0);\n\t\t-- MemDI: in std_logic_vector(7 downto 0);\n\t\tClk, Rst, Bsy: in std_logic;\n\t\tTrig, CD: out std_logic\n\t);\nend SSD1306;\n\narchitecture Ar of SSD1306 is\nconstant AMNT_INSTRS: natural := 27;\nconstant CONTRAST: std_logic_vector(7 downto 0) := x\"0F\";\ntype IAR is array (0 to AMNT_INSTRS-1) of std_logic_vector(7 downto 0);\nsignal Instrs: IAR := (x\"A8\", x\"3F\", x\"D3\", x\"00\", x\"40\", x\"A0\", x\"DA\", x\"12\", x\"81\", CONTRAST, x\"20\", x\"00\", x\"21\", x\"00\", x\"7F\", x\"22\", x\"00\", x\"07\", \nx\"A7\", --A6 for no invert\nx\"DB\", x\"40\", x\"A4\", x\"D5\", x\"80\", x\"8D\", x\"14\", x\"AF\");\n\nconstant AMNT_DATA: natural := 1024;\ntype IDATA is array (0 to AMNT_DATA-1) of std_logic_vector(7 downto 0);\nsignal Datas: IDATA := ( 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PStates is (Init, Draw);\ntype SStates is (BusyWaitA, BusyWaitB, Writing, Done);\n\nsignal SPISt: SStates := Done;\nsignal PSt: PStates := Init;\nsignal PInstr: unsigned(7 downto 0);\nsignal MemAddr: unsigned(9 downto 0);\n\nbegin\n\tprocess(Clk, Rst, Bsy)\n\tbegin\n\t\t -- MADDR <= std_logic_vector(MemAddr);\n\t\t\n\t\tif(Rst = '0') then\n\t\t\tPSt <= Init;\n\t\t\tSPISt <= Done;\n\t\t\tPInstr <= (others => '0');\n\t\telsif(rising_edge(Clk)) then\n\t\t\tif(PSt = Init) then\n\t\t\t\tCD <= '0';\n\t\t\t\tif(SPISt = Done) then\n\t\t\t\t\tPDO <= (Instrs(to_integer(PInstr)));\n\t\t\t\t\tTrig <= '1';\n\t\t\t\t\tSPISt <= BusyWaitA;\n\t\t\t\telsif(SPISt = BusyWaitA) then\n\t\t\t\t\tif(Bsy = '1') then\n\t\t\t\t\t\tPInstr <= PInstr + 1;\n\t\t\t\t\t\tSPISt <= Writing;\n\t\t\t\t\t\tTrig <= '0';\n\t\t\t\t\tend if;\n\t\t\t\telse\n\t\t\t\t\tif(Bsy = '0') then\n\t\t\t\t\t\tSPISt <= Done;\n\t\t\t\t\t\tif(PInstr = AMNT_INSTRS) then\n\t\t\t\t\t\t\tPSt <= Draw;\n\t\t\t\t\t\t\tPInstr <= (others => '0');\n\t\t\t\t\t\t\tMemAddr <= b\"1111111111\";\n\t\t\t\t\t\tend if;\n\t\t\t\t\tend if;\n\t\t\t\tend if;\n\t\t\telse --Draw\n\t\t\t\tCD <= '1';\n\t\t\t\t\n\t\t\t\tif(SPISt = Done) then\n\t\t\t\t\t\n\t\t\t\t\t--if (MemAddr>150) then PDO <= x\"f0\"; -- was MemDI\n\t\t\t\t\t--else PDO <= x\"55\";\n\t\t\t\t\t--end if;\n\t\t\t\t\t\n\t\t\t\t\tPDO <= Datas(to_integer(MemAddr));\n\t\t\t\t\t\n\t\t\t\t\tTrig <= '1';\n\t\t\t\t\tSPISt <= BusyWaitA;\n\t\t\t\telsif(SPISt = BusyWaitA) then\n\t\t\t\t\tif(Bsy = '1') then\n\t\t\t\t\t\tMemAddr <= MemAddr - 1;\n\t\t\t\t\t\tPInstr <= PInstr + 1;\n\t\t\t\t\t\tSPISt <= Writing;\n\t\t\t\t\t\tTrig <= '0';\n\t\t\t\t\tend if;\n\t\t\t\telse\n\t\t\t\t\tif(Bsy = '0') then SPISt <= Done; end if;\n\t\t\t\tend if;\n\t\t\tend if;\n\t\tend if;\n\tend process;\nend Ar;\n"
  },
  {
    "path": "max10_adc_firmware/async.v",
    "content": "////////////////////////////////////////////////////////\r\n// RS-232 RX and TX module\r\n// (c) fpga4fun.com & KNJN LLC - 2003 to 2016\r\n\r\n// The RS-232 settings are fixed\r\n// TX: 8-bit data, 2 stop, no-parity\r\n// RX: 8-bit data, 1 stop, no-parity (the receiver can accept more stop bits of course)\r\n\r\n//`define SIMULATION   // in this mode, TX outputs one bit per clock cycle\r\n                       // and RX receives one bit per clock cycle (for fast simulations)\r\n\r\n////////////////////////////////////////////////////////\r\nmodule async_transmitter(\r\n\tinput clk,\r\n\tinput TxD_start,\r\n\tinput [7:0] TxD_data,\r\n\toutput TxD,\r\n\toutput TxD_busy\r\n);\r\n\r\n// Assert TxD_start for (at least) one clock cycle to start transmission of TxD_data\r\n// TxD_data is latched so that it doesn't have to stay valid while it is being sent\r\n\r\nparameter ClkFrequency = 50000000;\t// 50MHz\r\nparameter Baud = 115200;\r\n\r\ngenerate\r\n\tif(ClkFrequency<Baud*8 && (ClkFrequency % Baud!=0)) ASSERTION_ERROR PARAMETER_OUT_OF_RANGE(\"Frequency incompatible with requested Baud rate\");\r\nendgenerate\r\n\r\n////////////////////////////////\r\n`ifdef SIMULATION\r\nwire BitTick = 1'b1;  // output one bit per clock cycle\r\n`else\r\nwire BitTick;\r\nBaudTickGen #(ClkFrequency, Baud) tickgen(.clk(clk), .enable(TxD_busy), .tick(BitTick));\r\n`endif\r\n\r\nreg [3:0] TxD_state = 0;\r\nwire TxD_ready = (TxD_state==0);\r\nassign TxD_busy = ~TxD_ready;\r\n\r\nreg [7:0] TxD_shift = 0;\r\nalways @(posedge clk)\r\nbegin\r\n\tif(TxD_ready & TxD_start)\r\n\t\tTxD_shift <= TxD_data;\r\n\telse\r\n\tif(TxD_state[3] & BitTick)\r\n\t\tTxD_shift <= (TxD_shift >> 1);\r\n\r\n\tcase(TxD_state)\r\n\t\t4'b0000: if(TxD_start) TxD_state <= 4'b0100;\r\n\t\t4'b0100: if(BitTick) TxD_state <= 4'b1000;  // start bit\r\n\t\t4'b1000: if(BitTick) TxD_state <= 4'b1001;  // bit 0\r\n\t\t4'b1001: if(BitTick) TxD_state <= 4'b1010;  // bit 1\r\n\t\t4'b1010: if(BitTick) TxD_state <= 4'b1011;  // bit 2\r\n\t\t4'b1011: if(BitTick) TxD_state <= 4'b1100;  // bit 3\r\n\t\t4'b1100: if(BitTick) TxD_state <= 4'b1101;  // bit 4\r\n\t\t4'b1101: if(BitTick) TxD_state <= 4'b1110;  // bit 5\r\n\t\t4'b1110: if(BitTick) TxD_state <= 4'b1111;  // bit 6\r\n\t\t4'b1111: if(BitTick) TxD_state <= 4'b0010;  // bit 7\r\n\t\t4'b0010: if(BitTick) TxD_state <= 4'b0011;  // stop1\r\n\t\t4'b0011: if(BitTick) TxD_state <= 4'b0000;  // stop2\r\n\t\tdefault: if(BitTick) TxD_state <= 4'b0000;\r\n\tendcase\r\nend\r\n\r\nassign TxD = (TxD_state<4) | (TxD_state[3] & TxD_shift[0]);  // put together the start, data and stop bits\r\nendmodule\r\n\r\n\r\n////////////////////////////////////////////////////////\r\nmodule async_receiver(\r\n\tinput clk,\r\n\tinput RxD,\r\n\toutput reg RxD_data_ready = 0,\r\n\toutput reg [7:0] RxD_data = 0,  // data received, valid only (for one clock cycle) when RxD_data_ready is asserted\r\n\r\n\t// We also detect if a gap occurs in the received stream of characters\r\n\t// That can be useful if multiple characters are sent in burst\r\n\t//  so that multiple characters can be treated as a \"packet\"\r\n\toutput RxD_idle,  // asserted when no data has been received for a while\r\n\toutput reg RxD_endofpacket = 0  // asserted for one clock cycle when a packet has been detected (i.e. RxD_idle is going high)\r\n);\r\n\r\nparameter ClkFrequency = 50000000; // 25MHz\r\nparameter Baud = 115200;\r\n\r\nparameter Oversampling = 8;  // needs to be a power of 2\r\n// we oversample the RxD line at a fixed rate to capture each RxD data bit at the \"right\" time\r\n// 8 times oversampling by default, use 16 for higher quality reception\r\n\r\ngenerate\r\n\tif(ClkFrequency<Baud*Oversampling) ASSERTION_ERROR PARAMETER_OUT_OF_RANGE(\"Frequency too low for current Baud rate and oversampling\");\r\n\tif(Oversampling<8 || ((Oversampling & (Oversampling-1))!=0)) ASSERTION_ERROR PARAMETER_OUT_OF_RANGE(\"Invalid oversampling value\");\r\nendgenerate\r\n\r\n////////////////////////////////\r\nreg [3:0] RxD_state = 0;\r\n\r\n`ifdef SIMULATION\r\nwire RxD_bit = RxD;\r\nwire sampleNow = 1'b1;  // receive one bit per clock cycle\r\n\r\n`else\r\nwire OversamplingTick;\r\nBaudTickGen #(ClkFrequency, Baud, Oversampling) tickgen(.clk(clk), .enable(1'b1), .tick(OversamplingTick));\r\n\r\n// synchronize RxD to our clk domain\r\nreg [1:0] RxD_sync = 2'b11;\r\nalways @(posedge clk) if(OversamplingTick) RxD_sync <= {RxD_sync[0], RxD};\r\n\r\n// and filter it\r\nreg [1:0] Filter_cnt = 2'b11;\r\nreg RxD_bit = 1'b1;\r\n\r\nalways @(posedge clk)\r\nif(OversamplingTick)\r\nbegin\r\n\tif(RxD_sync[1]==1'b1 && Filter_cnt!=2'b11) Filter_cnt <= Filter_cnt + 1'd1;\r\n\telse \r\n\tif(RxD_sync[1]==1'b0 && Filter_cnt!=2'b00) Filter_cnt <= Filter_cnt - 1'd1;\r\n\r\n\tif(Filter_cnt==2'b11) RxD_bit <= 1'b1;\r\n\telse\r\n\tif(Filter_cnt==2'b00) RxD_bit <= 1'b0;\r\nend\r\n\r\n// and decide when is the good time to sample the RxD line\r\nfunction integer log2(input integer v); begin log2=0; while(v>>log2) log2=log2+1; end endfunction\r\nlocalparam l2o = log2(Oversampling);\r\nreg [l2o-2:0] OversamplingCnt = 0;\r\nalways @(posedge clk) if(OversamplingTick) OversamplingCnt <= (RxD_state==0) ? 1'd0 : OversamplingCnt + 1'd1;\r\nwire sampleNow = OversamplingTick && (OversamplingCnt==Oversampling/2-1);\r\n`endif\r\n\r\n// now we can accumulate the RxD bits in a shift-register\r\nalways @(posedge clk)\r\ncase(RxD_state)\r\n\t4'b0000: if(~RxD_bit) RxD_state <= `ifdef SIMULATION 4'b1000 `else 4'b0001 `endif;  // start bit found?\r\n\t4'b0001: if(sampleNow) RxD_state <= 4'b1000;  // sync start bit to sampleNow\r\n\t4'b1000: if(sampleNow) RxD_state <= 4'b1001;  // bit 0\r\n\t4'b1001: if(sampleNow) RxD_state <= 4'b1010;  // bit 1\r\n\t4'b1010: if(sampleNow) RxD_state <= 4'b1011;  // bit 2\r\n\t4'b1011: if(sampleNow) RxD_state <= 4'b1100;  // bit 3\r\n\t4'b1100: if(sampleNow) RxD_state <= 4'b1101;  // bit 4\r\n\t4'b1101: if(sampleNow) RxD_state <= 4'b1110;  // bit 5\r\n\t4'b1110: if(sampleNow) RxD_state <= 4'b1111;  // bit 6\r\n\t4'b1111: if(sampleNow) RxD_state <= 4'b0010;  // bit 7\r\n\t4'b0010: if(sampleNow) RxD_state <= 4'b0000;  // stop bit\r\n\tdefault: RxD_state <= 4'b0000;\r\nendcase\r\n\r\nalways @(posedge clk)\r\nif(sampleNow && RxD_state[3]) RxD_data <= {RxD_bit, RxD_data[7:1]};\r\n\r\n//reg RxD_data_error = 0;\r\nalways @(posedge clk)\r\nbegin\r\n\tRxD_data_ready <= (sampleNow && RxD_state==4'b0010 && RxD_bit);  // make sure a stop bit is received\r\n\t//RxD_data_error <= (sampleNow && RxD_state==4'b0010 && ~RxD_bit);  // error if a stop bit is not received\r\nend\r\n\r\n`ifdef SIMULATION\r\nassign RxD_idle = 0;\r\n`else\r\nreg [l2o+1:0] GapCnt = 0;\r\nalways @(posedge clk) if (RxD_state!=0) GapCnt<=0; else if(OversamplingTick & ~GapCnt[log2(Oversampling)+1]) GapCnt <= GapCnt + 1'h1;\r\nassign RxD_idle = GapCnt[l2o+1];\r\nalways @(posedge clk) RxD_endofpacket <= OversamplingTick & ~GapCnt[l2o+1] & &GapCnt[l2o:0];\r\n`endif\r\n\r\nendmodule\r\n\r\n\r\n////////////////////////////////////////////////////////\r\n// dummy module used to be able to raise an assertion in Verilog\r\nmodule ASSERTION_ERROR();\r\nendmodule\r\n\r\n\r\n////////////////////////////////////////////////////////\r\nmodule BaudTickGen(\r\n\tinput clk, enable,\r\n\toutput tick  // generate a tick at the specified baud rate * oversampling\r\n);\r\nparameter ClkFrequency = 50000000;\r\nparameter Baud = 115200;\r\nparameter Oversampling = 1;\r\n\r\nfunction integer log2(input integer v); begin log2=0; while(v>>log2) log2=log2+1; end endfunction\r\nlocalparam AccWidth = log2(ClkFrequency/Baud)+8;  // +/- 2% max timing error over a byte\r\nreg [AccWidth:0] Acc = 0;\r\nlocalparam ShiftLimiter = log2(Baud*Oversampling >> (31-AccWidth));  // this makes sure Inc calculation doesn't overflow\r\nlocalparam Inc = ((Baud*Oversampling << (AccWidth-ShiftLimiter))+(ClkFrequency>>(ShiftLimiter+1)))/(ClkFrequency>>ShiftLimiter);\r\nalways @(posedge clk) if(enable) Acc <= Acc[AccWidth-1:0] + Inc[AccWidth:0]; else Acc <= Inc[AccWidth:0];\r\nassign tick = Acc[AccWidth];\r\nendmodule\r\n\r\n\r\n////////////////////////////////////////////////////////\r\n"
  },
  {
    "path": "max10_adc_firmware/async_receiver.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 216 128)\r\n\t(text \"async_receiver\" (rect 5 0 68 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"RxD\" (rect 0 0 20 12)(font \"Arial\" ))\r\n\t\t(text \"RxD\" (rect 21 43 41 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 32)\r\n\t\t(output)\r\n\t\t(text \"RxD_data_ready\" (rect 0 0 71 12)(font \"Arial\" ))\r\n\t\t(text \"RxD_data_ready\" (rect 108 27 179 39)(font \"Arial\" ))\r\n\t\t(line (pt 200 32)(pt 184 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 48)\r\n\t\t(output)\r\n\t\t(text \"RxD_data[7..0]\" (rect 0 0 62 12)(font \"Arial\" ))\r\n\t\t(text \"RxD_data[7..0]\" (rect 117 43 179 55)(font \"Arial\" ))\r\n\t\t(line (pt 200 48)(pt 184 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 64)\r\n\t\t(output)\r\n\t\t(text \"RxD_idle\" (rect 0 0 37 12)(font \"Arial\" ))\r\n\t\t(text \"RxD_idle\" (rect 142 59 179 71)(font \"Arial\" ))\r\n\t\t(line (pt 200 64)(pt 184 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 80)\r\n\t\t(output)\r\n\t\t(text \"RxD_endofpacket\" (rect 0 0 74 12)(font \"Arial\" ))\r\n\t\t(text \"RxD_endofpacket\" (rect 105 75 179 87)(font \"Arial\" ))\r\n\t\t(line (pt 200 80)(pt 184 80)(line_width 1))\r\n\t)\r\n\t(parameter\r\n\t\t\"ClkFrequency\"\r\n\t\t\"25000000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Baud\"\r\n\t\t\"115200\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Oversampling\"\r\n\t\t\"8\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 184 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 216 -64 316 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/async_transmitter.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 224 128)\r\n\t(text \"async_transmitter\" (rect 5 0 78 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"TxD_start\" (rect 0 0 41 12)(font \"Arial\" ))\r\n\t\t(text \"TxD_start\" (rect 21 43 62 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"TxD_data[7..0]\" (rect 0 0 60 12)(font \"Arial\" ))\r\n\t\t(text \"TxD_data[7..0]\" (rect 21 59 81 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 32)\r\n\t\t(output)\r\n\t\t(text \"TxD\" (rect 0 0 17 12)(font \"Arial\" ))\r\n\t\t(text \"TxD\" (rect 170 27 187 39)(font \"Arial\" ))\r\n\t\t(line (pt 208 32)(pt 192 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 48)\r\n\t\t(output)\r\n\t\t(text \"TxD_busy\" (rect 0 0 43 12)(font \"Arial\" ))\r\n\t\t(text \"TxD_busy\" (rect 144 43 187 55)(font \"Arial\" ))\r\n\t\t(line (pt 208 48)(pt 192 48)(line_width 1))\r\n\t)\r\n\t(parameter\r\n\t\t\"ClkFrequency\"\r\n\t\t\"25000000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Baud\"\r\n\t\t\"115200\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 192 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 224 -64 324 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/chain_delay.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 232 128)\r\n\t(text \"chain_delay\" (rect 5 0 52 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"start\" (rect 0 0 17 12)(font \"Arial\" ))\r\n\t\t(text \"start\" (rect 21 43 38 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"stop\" (rect 0 0 16 12)(font \"Arial\" ))\r\n\t\t(text \"stop\" (rect 21 59 37 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 216 32)\r\n\t\t(output)\r\n\t\t(text \"result[CHAIN_LEN-1..0]\" (rect 0 0 100 12)(font \"Arial\" ))\r\n\t\t(text \"result[CHAIN_LEN-1..0]\" (rect 95 27 195 39)(font \"Arial\" ))\r\n\t\t(line (pt 216 32)(pt 200 32)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"CHAIN_LEN\"\r\n\t\t\"200\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 200 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 232 -64 332 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/chain_delay_race.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 232 128)\r\n\t(text \"chain_delay_race\" (rect 5 0 75 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"start\" (rect 0 0 17 12)(font \"Arial\" ))\r\n\t\t(text \"start\" (rect 21 43 38 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"stop\" (rect 0 0 16 12)(font \"Arial\" ))\r\n\t\t(text \"stop\" (rect 21 59 37 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 216 32)\r\n\t\t(output)\r\n\t\t(text \"result[CHAIN_LEN..0]\" (rect 0 0 94 12)(font \"Arial\" ))\r\n\t\t(text \"result[CHAIN_LEN..0]\" (rect 101 27 195 39)(font \"Arial\" ))\r\n\t\t(line (pt 216 32)(pt 200 32)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"CHAIN_LEN\"\r\n\t\t\"32\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 200 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 232 -64 332 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/demux1.v",
    "content": "//Verilog module for 1:2 DEMUX\r\nmodule demux1to2(     Data_in,     sel,    Data_out_0,    Data_out_1    );\r\n\r\n//list the inputs and their sizes\r\n    input Data_in;\r\n    input sel;\r\n//list the outputs and their sizes \r\n    output Data_out_0;\r\n    output Data_out_1;\r\n//Internal variables\r\n    reg Data_out_0;\r\n    reg Data_out_1;\r\n\r\n//always block with Data_in and sel in its sensitivity list\r\n    always @(Data_in or sel)\r\n    begin\r\n        case (sel)\r\n            1'b0 : begin\r\n                        Data_out_0 = Data_in;\r\n                        Data_out_1 = 0;\r\n                      end\r\n            1'b1 : begin\r\n                        Data_out_0 = 0;\r\n                        Data_out_1 = Data_in;\r\n                      end\r\n        endcase\r\n    end\r\n    \r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/demux1.v.bak",
    "content": "//Verilog module for 1:2 DEMUX\r\nmodule demux1to2(     Data_in,     sel,    Data_out_0,    Data_out_1    );\r\n\r\n//list the inputs and their sizes\r\n    input Data_in;\r\n    input sel;\r\n//list the outputs and their sizes \r\n    output Data_out_0;\r\n    output Data_out_1;\r\n//Internal variables\r\n    reg Data_out_0;\r\n    reg Data_out_1;\r\n\r\n//always block with Data_in and sel in its sensitivity list\r\n    always @(Data_in or sel)\r\n    begin\r\n        case (sel)\r\n            1'b0 : begin\r\n                        Data_out_0 = Data_in;\r\n                        Data_out_1 = 0;\r\n                        Data_out_2 = 0;\r\n                        Data_out_3 = 0;\r\n                      end\r\n            1'b1 : begin\r\n                        Data_out_0 = 0;\r\n                        Data_out_1 = Data_in;\r\n                        Data_out_2 = 0;\r\n                        Data_out_3 = 0;\r\n                      end\r\n        endcase\r\n    end\r\n    \r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/demux1to2.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 192 96)\r\n\t(text \"demux1to2\" (rect 5 0 47 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 64 20 76)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"Data_in\" (rect 0 0 30 12)(font \"Arial\" ))\r\n\t\t(text \"Data_in\" (rect 21 27 51 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"sel\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"sel\" (rect 21 43 31 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 32)\r\n\t\t(output)\r\n\t\t(text \"Data_out_0\" (rect 0 0 47 12)(font \"Arial\" ))\r\n\t\t(text \"Data_out_0\" (rect 108 27 155 39)(font \"Arial\" ))\r\n\t\t(line (pt 176 32)(pt 160 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 48)\r\n\t\t(output)\r\n\t\t(text \"Data_out_1\" (rect 0 0 46 12)(font \"Arial\" ))\r\n\t\t(text \"Data_out_1\" (rect 109 43 155 55)(font \"Arial\" ))\r\n\t\t(line (pt 176 48)(pt 160 48)(line_width 1))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 160 64)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/dpram2.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 2018  Intel Corporation. All rights reserved.\r\nYour use of Intel Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Intel Program License \r\nSubscription Agreement, the Intel Quartus Prime License Agreement,\r\nthe Intel FPGA IP License Agreement, or other applicable license\r\nagreement, including, without limitation, that your use is for\r\nthe sole purpose of programming logic devices manufactured by\r\nIntel and sold by Intel or its authorized distributors.  Please\r\nrefer to the applicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 0 0 256 136)\r\n\t(text \"dpram2\" (rect 107 0 157 16)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 120 25 132)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"data[7..0]\" (rect 0 0 53 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"data[7..0]\" (rect 4 18 47 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 32)(pt 112 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"wraddress[9..0]\" (rect 0 0 92 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wraddress[9..0]\" (rect 4 34 80 47)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 48)(pt 112 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wren\" (rect 4 50 28 63)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 112 64))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 88)\r\n\t\t(input)\r\n\t\t(text \"rdaddress[9..0]\" (rect 0 0 87 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"rdaddress[9..0]\" (rect 4 74 76 87)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 88)(pt 112 88)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"clock\" (rect 0 0 29 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clock\" (rect 4 98 27 111)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 112)(pt 176 112))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 88)\r\n\t\t(output)\r\n\t\t(text \"q[7..0]\" (rect 0 0 35 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"q[7..0]\" (rect 223 74 251 87)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 256 88)(pt 192 88)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(text \"1024 Word(s)\" (rect 137 -5 236 187)(font \"Arial\" )(vertical))\r\n\t\t(text \"RAM\" (rect 148 -16 229 151)(font \"Arial\" )(vertical))\r\n\t\t(text \"Block Type: AUTO\" (rect 40 125 156 261)(font \"Arial\" ))\r\n\t\t(line (pt 128 24)(pt 168 24))\r\n\t\t(line (pt 168 24)(pt 168 96))\r\n\t\t(line (pt 168 96)(pt 128 96))\r\n\t\t(line (pt 128 96)(pt 128 24))\r\n\t\t(line (pt 112 27)(pt 120 27))\r\n\t\t(line (pt 120 27)(pt 120 39))\r\n\t\t(line (pt 120 39)(pt 112 39))\r\n\t\t(line (pt 112 39)(pt 112 27))\r\n\t\t(line (pt 112 34)(pt 114 36))\r\n\t\t(line (pt 114 36)(pt 112 38))\r\n\t\t(line (pt 104 36)(pt 112 36))\r\n\t\t(line (pt 120 32)(pt 128 32)(line_width 3))\r\n\t\t(line (pt 112 43)(pt 120 43))\r\n\t\t(line (pt 120 43)(pt 120 55))\r\n\t\t(line (pt 120 55)(pt 112 55))\r\n\t\t(line (pt 112 55)(pt 112 43))\r\n\t\t(line (pt 112 50)(pt 114 52))\r\n\t\t(line (pt 114 52)(pt 112 54))\r\n\t\t(line (pt 104 52)(pt 112 52))\r\n\t\t(line (pt 120 48)(pt 128 48)(line_width 3))\r\n\t\t(line (pt 112 59)(pt 120 59))\r\n\t\t(line (pt 120 59)(pt 120 71))\r\n\t\t(line (pt 120 71)(pt 112 71))\r\n\t\t(line (pt 112 71)(pt 112 59))\r\n\t\t(line (pt 112 66)(pt 114 68))\r\n\t\t(line (pt 114 68)(pt 112 70))\r\n\t\t(line (pt 104 68)(pt 112 68))\r\n\t\t(line (pt 120 64)(pt 128 64))\r\n\t\t(line (pt 112 83)(pt 120 83))\r\n\t\t(line (pt 120 83)(pt 120 95))\r\n\t\t(line (pt 120 95)(pt 112 95))\r\n\t\t(line (pt 112 95)(pt 112 83))\r\n\t\t(line (pt 112 90)(pt 114 92))\r\n\t\t(line (pt 114 92)(pt 112 94))\r\n\t\t(line (pt 104 92)(pt 112 92))\r\n\t\t(line (pt 120 88)(pt 128 88)(line_width 3))\r\n\t\t(line (pt 104 36)(pt 104 113))\r\n\t\t(line (pt 176 92)(pt 176 113))\r\n\t\t(line (pt 184 83)(pt 192 83))\r\n\t\t(line (pt 192 83)(pt 192 95))\r\n\t\t(line (pt 192 95)(pt 184 95))\r\n\t\t(line (pt 184 95)(pt 184 83))\r\n\t\t(line (pt 184 90)(pt 186 92))\r\n\t\t(line (pt 186 92)(pt 184 94))\r\n\t\t(line (pt 176 92)(pt 184 92))\r\n\t\t(line (pt 168 88)(pt 184 88)(line_width 3))\r\n\t\t(line (pt 0 0)(pt 257 0))\r\n\t\t(line (pt 257 0)(pt 257 138))\r\n\t\t(line (pt 0 138)(pt 257 138))\r\n\t\t(line (pt 0 0)(pt 0 138))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/dpram2.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 2-PORT\"\r\nset_global_assignment -name IP_TOOL_VERSION \"18.0\"\r\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\r\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"dpram2.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"dpram2.bsf\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"dpram2_bb.v\"]\r\n"
  },
  {
    "path": "max10_adc_firmware/dpram2.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: dpram2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\r\n//Your use of Intel Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Intel Program License \r\n//Subscription Agreement, the Intel Quartus Prime License Agreement,\r\n//the Intel FPGA IP License Agreement, or other applicable license\r\n//agreement, including, without limitation, that your use is for\r\n//the sole purpose of programming logic devices manufactured by\r\n//Intel and sold by Intel or its authorized distributors.  Please\r\n//refer to the applicable agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule dpram2 (\r\n\tclock,\r\n\tdata,\r\n\trdaddress,\r\n\twraddress,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t  clock;\r\n\tinput\t[7:0]  data;\r\n\tinput\t[9:0]  rdaddress;\r\n\tinput\t[9:0]  wraddress;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n\ttri0\t  wren;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [7:0] sub_wire0;\r\n\twire [7:0] q = sub_wire0[7:0];\r\n\r\n\taltsyncram\taltsyncram_component (\r\n\t\t\t\t.address_a (wraddress),\r\n\t\t\t\t.address_b (rdaddress),\r\n\t\t\t\t.clock0 (clock),\r\n\t\t\t\t.data_a (data),\r\n\t\t\t\t.wren_a (wren),\r\n\t\t\t\t.q_b (sub_wire0),\r\n\t\t\t\t.aclr0 (1'b0),\r\n\t\t\t\t.aclr1 (1'b0),\r\n\t\t\t\t.addressstall_a (1'b0),\r\n\t\t\t\t.addressstall_b (1'b0),\r\n\t\t\t\t.byteena_a (1'b1),\r\n\t\t\t\t.byteena_b (1'b1),\r\n\t\t\t\t.clock1 (1'b1),\r\n\t\t\t\t.clocken0 (1'b1),\r\n\t\t\t\t.clocken1 (1'b1),\r\n\t\t\t\t.clocken2 (1'b1),\r\n\t\t\t\t.clocken3 (1'b1),\r\n\t\t\t\t.data_b ({8{1'b1}}),\r\n\t\t\t\t.eccstatus (),\r\n\t\t\t\t.q_a (),\r\n\t\t\t\t.rden_a (1'b1),\r\n\t\t\t\t.rden_b (1'b1),\r\n\t\t\t\t.wren_b (1'b0));\r\n\tdefparam\r\n\t\taltsyncram_component.address_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.address_reg_b = \"CLOCK0\",\r\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_input_b = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_output_b = \"BYPASS\",\r\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\r\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\r\n\t\taltsyncram_component.numwords_a = 1024,\r\n\t\taltsyncram_component.numwords_b = 1024,\r\n\t\taltsyncram_component.operation_mode = \"DUAL_PORT\",\r\n\t\taltsyncram_component.outdata_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.outdata_reg_b = \"CLOCK0\",\r\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\r\n\t\taltsyncram_component.read_during_write_mode_mixed_ports = \"DONT_CARE\",\r\n\t\taltsyncram_component.widthad_a = 10,\r\n\t\taltsyncram_component.widthad_b = 10,\r\n\t\taltsyncram_component.width_a = 8,\r\n\t\taltsyncram_component.width_b = 8,\r\n\t\taltsyncram_component.width_byteena_a = 1;\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"8192\"\r\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGq NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_MIXED_PORTS STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: rdaddress 0 0 10 0 INPUT NODEFVAL \"rdaddress[9..0]\"\r\n// Retrieval info: USED_PORT: wraddress 0 0 10 0 INPUT NODEFVAL \"wraddress[9..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 10 0 wraddress 0 0 10 0\r\n// Retrieval info: CONNECT: @address_b 0 0 10 0 rdaddress 0 0 10 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware/dpram2_bb.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%VBB%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: dpram2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\r\n// ************************************************************\r\n\r\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\r\n//Your use of Intel Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Intel Program License \r\n//Subscription Agreement, the Intel Quartus Prime License Agreement,\r\n//the Intel FPGA IP License Agreement, or other applicable license\r\n//agreement, including, without limitation, that your use is for\r\n//the sole purpose of programming logic devices manufactured by\r\n//Intel and sold by Intel or its authorized distributors.  Please\r\n//refer to the applicable agreement for further details.\r\n\r\nmodule dpram2 (\r\n\tclock,\r\n\tdata,\r\n\trdaddress,\r\n\twraddress,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t  clock;\r\n\tinput\t[7:0]  data;\r\n\tinput\t[9:0]  rdaddress;\r\n\tinput\t[9:0]  wraddress;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n\ttri0\t  wren;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"8192\"\r\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGq NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_MIXED_PORTS STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: rdaddress 0 0 10 0 INPUT NODEFVAL \"rdaddress[9..0]\"\r\n// Retrieval info: USED_PORT: wraddress 0 0 10 0 INPUT NODEFVAL \"wraddress[9..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 10 0 wraddress 0 0 10 0\r\n// Retrieval info: CONNECT: @address_b 0 0 10 0 rdaddress 0 0 10 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware/flash_pof.cdf",
    "content": "/* Quartus II 64-Bit Version 15.0.0 Build 145 04/22/2015 SJ Web Edition */\r\nJedecChain;\r\n\tFileRevision(JESD32A);\r\n\tDefaultMfr(6E);\r\n\r\n\tP ActionCode(Cfg)\r\n\t\tDevice PartName(10M08SAE144ES) Path(\"C:/haas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10/output_files/\") File(\"serial1.pof\") MfrSpec(OpMask(7) Child_OpMask(2 7 7));\r\n\r\nChainEnd;\r\n\r\nAlteraBegin;\r\n\tChainType(JTAG);\r\nAlteraEnd;\r\n"
  },
  {
    "path": "max10_adc_firmware/haasoscope.cfg",
    "content": "# SPDX-License-Identifier: GPL-2.0-or-later\n\n# openocd config for connecting to a Haasoscope MAX10\n# Tested on a v9.01 board\n\nadapter driver usb_blaster\n# Intel SVF files might override this\nadapter speed 1000\ntransport select jtag\nsource [find fpga/altera-10m50.cfg]\n\ninit\n\n"
  },
  {
    "path": "max10_adc_firmware/hvsync_generator.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 184 160)\r\n\t(text \"hvsync_generator\" (rect 5 0 79 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 32)\r\n\t\t(output)\r\n\t\t(text \"vga_h_sync\" (rect 0 0 51 12)(font \"Arial\" ))\r\n\t\t(text \"vga_h_sync\" (rect 96 27 147 39)(font \"Arial\" ))\r\n\t\t(line (pt 168 32)(pt 152 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 48)\r\n\t\t(output)\r\n\t\t(text \"vga_v_sync\" (rect 0 0 53 12)(font \"Arial\" ))\r\n\t\t(text \"vga_v_sync\" (rect 94 43 147 55)(font \"Arial\" ))\r\n\t\t(line (pt 168 48)(pt 152 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 64)\r\n\t\t(output)\r\n\t\t(text \"inDisplayArea\" (rect 0 0 56 12)(font \"Arial\" ))\r\n\t\t(text \"inDisplayArea\" (rect 91 59 147 71)(font \"Arial\" ))\r\n\t\t(line (pt 168 64)(pt 152 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 80)\r\n\t\t(output)\r\n\t\t(text \"CounterX[9..0]\" (rect 0 0 57 12)(font \"Arial\" ))\r\n\t\t(text \"CounterX[9..0]\" (rect 90 75 147 87)(font \"Arial\" ))\r\n\t\t(line (pt 168 80)(pt 152 80)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 96)\r\n\t\t(output)\r\n\t\t(text \"CounterY[8..0]\" (rect 0 0 59 12)(font \"Arial\" ))\r\n\t\t(text \"CounterY[8..0]\" (rect 88 91 147 103)(font \"Arial\" ))\r\n\t\t(line (pt 168 96)(pt 152 96)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 152 128)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/hvsync_generator.v",
    "content": "module hvsync_generator(clk, vga_h_sync, vga_v_sync, inDisplayArea, CounterX, CounterY);\r\ninput clk;\r\noutput vga_h_sync, vga_v_sync;\r\noutput inDisplayArea;\r\noutput [9:0] CounterX;\r\noutput [8:0] CounterY;\r\n\r\n//////////////////////////////////////////////////\r\nreg [9:0] CounterX;\r\nreg CounterXflip;\r\nreg [8:0] CounterY;\r\nwire CounterXmaxed = (CounterX==767);\r\n\r\nalways @(posedge clk)\r\nif(CounterXmaxed)\r\n\tCounterX <= 0;\r\nelse begin\r\n\tif (CounterXflip) CounterX <= CounterX + 1;\r\n\tCounterXflip <= ~CounterXflip;//goes from 0 to 1, so we only increment half the times (for 50Mhz!)\r\n   end\r\n\t\r\nalways @(posedge clk)\r\nif(CounterXmaxed) CounterY <= CounterY + 1;\r\n\r\nreg vga_HS, vga_VS;\r\nalways @(posedge clk)\r\nbegin\r\n\tvga_HS <= (CounterX[9:4]==45); // change this value to move the display horizontally\r\n\tvga_VS <= (CounterY==498); // change this value to move the display vertically\r\nend\r\n\r\nreg inDisplayArea;\r\nalways @(posedge clk)\r\nif(inDisplayArea==0)\r\n\tinDisplayArea <= (CounterXmaxed) && (CounterY<480);\r\nelse\r\n\tinDisplayArea <= !(CounterX==639);\r\n\t\r\nassign vga_h_sync = ~vga_HS;\r\nassign vga_v_sync = ~vga_VS;\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/i2c_master.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 216 160)\r\n\t(text \"i2c_master\" (rect 5 0 49 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"reset_n\" (rect 0 0 30 12)(font \"Arial\" ))\r\n\t\t(text \"reset_n\" (rect 21 43 51 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"ena\" (rect 0 0 14 12)(font \"Arial\" ))\r\n\t\t(text \"ena\" (rect 21 59 35 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"addr[6..0]\" (rect 0 0 37 12)(font \"Arial\" ))\r\n\t\t(text \"addr[6..0]\" (rect 21 75 58 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"rw\" (rect 0 0 9 12)(font \"Arial\" ))\r\n\t\t(text \"rw\" (rect 21 91 30 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"data_wr[7..0]\" (rect 0 0 51 12)(font \"Arial\" ))\r\n\t\t(text \"data_wr[7..0]\" (rect 21 107 72 119)(font \"Arial\" ))\r\n\t\t(line (pt 0 112)(pt 16 112)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 32)\r\n\t\t(output)\r\n\t\t(text \"busy\" (rect 0 0 20 12)(font \"Arial\" ))\r\n\t\t(text \"busy\" (rect 159 27 179 39)(font \"Arial\" ))\r\n\t\t(line (pt 200 32)(pt 184 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 48)\r\n\t\t(output)\r\n\t\t(text \"data_rd[7..0]\" (rect 0 0 50 12)(font \"Arial\" ))\r\n\t\t(text \"data_rd[7..0]\" (rect 129 43 179 55)(font \"Arial\" ))\r\n\t\t(line (pt 200 48)(pt 184 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 64)\r\n\t\t(output)\r\n\t\t(text \"ack_error\" (rect 0 0 40 12)(font \"Arial\" ))\r\n\t\t(text \"ack_error\" (rect 139 59 179 71)(font \"Arial\" ))\r\n\t\t(line (pt 200 64)(pt 184 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 80)\r\n\t\t(bidir)\r\n\t\t(text \"sda\" (rect 0 0 14 12)(font \"Arial\" ))\r\n\t\t(text \"sda\" (rect 165 75 179 87)(font \"Arial\" ))\r\n\t\t(line (pt 200 80)(pt 184 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 96)\r\n\t\t(bidir)\r\n\t\t(text \"scl\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"scl\" (rect 169 91 179 103)(font \"Arial\" ))\r\n\t\t(line (pt 200 96)(pt 184 96)(line_width 1))\r\n\t)\r\n\t(parameter\r\n\t\t\"input_clk\"\r\n\t\t\"50000000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"bus_clk\"\r\n\t\t\"400000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 184 128)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 216 -64 316 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/i2c_master.vhd",
    "content": "--------------------------------------------------------------------------------\r\n--\r\n--   FileName:         i2c_master.vhd\r\n--   Dependencies:     none\r\n--   Design Software:  Quartus II 64-bit Version 13.1 Build 162 SJ Full Version\r\n--\r\n--   HDL CODE IS PROVIDED \"AS IS.\"  DIGI-KEY EXPRESSLY DISCLAIMS ANY\r\n--   WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING BUT NOT\r\n--   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A\r\n--   PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL DIGI-KEY\r\n--   BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR CONSEQUENTIAL\r\n--   DAMAGES, LOST PROFITS OR LOST DATA, HARM TO YOUR EQUIPMENT, COST OF\r\n--   PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS\r\n--   BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF),\r\n--   ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER SIMILAR COSTS.\r\n--\r\n--   Version History\r\n--   Version 1.0 11/01/2012 Scott Larson\r\n--     Initial Public Release\r\n--   Version 2.0 06/20/2014 Scott Larson\r\n--     Added ability to interface with different slaves in the same transaction\r\n--     Corrected ack_error bug where ack_error went 'Z' instead of '1' on error\r\n--     Corrected timing of when ack_error signal clears\r\n--   Version 2.1 10/21/2014 Scott Larson\r\n--     Replaced gated clock with clock enable\r\n--     Adjusted timing of SCL during start and stop conditions\r\n--   Version 2.2 02/05/2015 Scott Larson\r\n--     Corrected small SDA glitch introduced in version 2.1\r\n-- \r\n--------------------------------------------------------------------------------\r\n\r\nLIBRARY ieee;\r\nUSE ieee.std_logic_1164.all;\r\nUSE ieee.std_logic_unsigned.all;\r\n\r\nENTITY i2c_master IS\r\n  GENERIC(\r\n    input_clk : INTEGER := 50_000_000; --input clock speed from user logic in Hz\r\n    bus_clk   : INTEGER := 400_000);   --speed the i2c bus (scl) will run at in Hz\r\n  PORT(\r\n    clk       : IN     STD_LOGIC;                    --system clock\r\n    reset_n   : IN     STD_LOGIC;                    --active low reset\r\n    ena       : IN     STD_LOGIC;                    --latch in command\r\n    addr      : IN     STD_LOGIC_VECTOR(6 DOWNTO 0); --address of target slave\r\n    rw        : IN     STD_LOGIC;                    --'0' is write, '1' is read\r\n    data_wr   : IN     STD_LOGIC_VECTOR(7 DOWNTO 0); --data to write to slave\r\n    busy      : OUT    STD_LOGIC;                    --indicates transaction in progress\r\n    data_rd   : OUT    STD_LOGIC_VECTOR(7 DOWNTO 0); --data read from slave\r\n    ack_error : BUFFER STD_LOGIC;                    --flag if improper acknowledge from slave\r\n    sda       : INOUT  STD_LOGIC;                    --serial data output of i2c bus\r\n    scl       : INOUT  STD_LOGIC);                   --serial clock output of i2c bus\r\nEND i2c_master;\r\n\r\nARCHITECTURE logic OF i2c_master IS\r\n  CONSTANT divider  :  INTEGER := (input_clk/bus_clk)/4; --number of clocks in 1/4 cycle of scl\r\n  TYPE machine IS(ready, start, command, slv_ack1, wr, rd, slv_ack2, mstr_ack, stop); --needed states\r\n  SIGNAL state         : machine;                        --state machine\r\n  SIGNAL data_clk      : STD_LOGIC;                      --data clock for sda\r\n  SIGNAL data_clk_prev : STD_LOGIC;                      --data clock during previous system clock\r\n  SIGNAL scl_clk       : STD_LOGIC;                      --constantly running internal scl\r\n  SIGNAL scl_ena       : STD_LOGIC := '0';               --enables internal scl to output\r\n  SIGNAL sda_int       : STD_LOGIC := '1';               --internal sda\r\n  SIGNAL sda_ena_n     : STD_LOGIC;                      --enables internal sda to output\r\n  SIGNAL addr_rw       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --latched in address and read/write\r\n  SIGNAL data_tx       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --latched in data to write to slave\r\n  SIGNAL data_rx       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --data received from slave\r\n  SIGNAL bit_cnt       : INTEGER RANGE 0 TO 7 := 7;      --tracks bit number in transaction\r\n  SIGNAL stretch       : STD_LOGIC := '0';               --identifies if slave is stretching scl\r\nBEGIN\r\n\r\n  --generate the timing for the bus clock (scl_clk) and the data clock (data_clk)\r\n  PROCESS(clk, reset_n)\r\n    VARIABLE count  :  INTEGER RANGE 0 TO divider*4;  --timing for clock generation\r\n  BEGIN\r\n    IF(reset_n = '0') THEN                --reset asserted\r\n      stretch <= '0';\r\n      count := 0;\r\n    ELSIF(clk'EVENT AND clk = '1') THEN\r\n      data_clk_prev <= data_clk;          --store previous value of data clock\r\n      IF(count = divider*4-1) THEN        --end of timing cycle\r\n        count := 0;                       --reset timer\r\n      ELSIF(stretch = '0') THEN           --clock stretching from slave not detected\r\n        count := count + 1;               --continue clock generation timing\r\n      END IF;\r\n      CASE count IS\r\n        WHEN 0 TO divider-1 =>            --first 1/4 cycle of clocking\r\n          scl_clk <= '0';\r\n          data_clk <= '0';\r\n        WHEN divider TO divider*2-1 =>    --second 1/4 cycle of clocking\r\n          scl_clk <= '0';\r\n          data_clk <= '1';\r\n        WHEN divider*2 TO divider*3-1 =>  --third 1/4 cycle of clocking\r\n          scl_clk <= '1';                 --release scl\r\n          IF(scl = '0') THEN              --detect if slave is stretching clock\r\n            stretch <= '1';\r\n          ELSE\r\n            stretch <= '0';\r\n          END IF;\r\n          data_clk <= '1';\r\n        WHEN OTHERS =>                    --last 1/4 cycle of clocking\r\n          scl_clk <= '1';\r\n          data_clk <= '0';\r\n      END CASE;\r\n    END IF;\r\n  END PROCESS;\r\n\r\n  --state machine and writing to sda during scl low (data_clk rising edge)\r\n  PROCESS(clk, reset_n)\r\n  BEGIN\r\n    IF(reset_n = '0') THEN                 --reset asserted\r\n      state <= ready;                      --return to initial state\r\n      busy <= '1';                         --indicate not available\r\n      scl_ena <= '0';                      --sets scl high impedance\r\n      sda_int <= '1';                      --sets sda high impedance\r\n      ack_error <= '0';                    --clear acknowledge error flag\r\n      bit_cnt <= 7;                        --restarts data bit counter\r\n      data_rd <= \"00000000\";               --clear data read port\r\n    ELSIF(clk'EVENT AND clk = '1') THEN\r\n      IF(data_clk = '1' AND data_clk_prev = '0') THEN  --data clock rising edge\r\n        CASE state IS\r\n          WHEN ready =>                      --idle state\r\n            IF(ena = '1') THEN               --transaction requested\r\n              busy <= '1';                   --flag busy\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              state <= start;                --go to start bit\r\n            ELSE                             --remain idle\r\n              busy <= '0';                   --unflag busy\r\n              state <= ready;                --remain idle\r\n            END IF;\r\n          WHEN start =>                      --start bit of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            sda_int <= addr_rw(bit_cnt);     --set first address bit to bus\r\n            state <= command;                --go to command\r\n          WHEN command =>                    --address and command byte of transaction\r\n            IF(bit_cnt = 0) THEN             --command transmit finished\r\n              sda_int <= '1';                --release sda for slave acknowledge\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              state <= slv_ack1;             --go to slave acknowledge (command)\r\n            ELSE                             --next clock cycle of command state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              sda_int <= addr_rw(bit_cnt-1); --write address/command bit to bus\r\n              state <= command;              --continue with command\r\n            END IF;\r\n          WHEN slv_ack1 =>                   --slave acknowledge bit (command)\r\n            IF(addr_rw(0) = '0') THEN        --write command\r\n              sda_int <= data_tx(bit_cnt);   --write first bit of data\r\n              state <= wr;                   --go to write byte\r\n            ELSE                             --read command\r\n              sda_int <= '1';                --release sda from incoming data\r\n              state <= rd;                   --go to read byte\r\n            END IF;\r\n          WHEN wr =>                         --write byte of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            IF(bit_cnt = 0) THEN             --write byte transmit finished\r\n              sda_int <= '1';                --release sda for slave acknowledge\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              state <= slv_ack2;             --go to slave acknowledge (write)\r\n            ELSE                             --next clock cycle of write state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              sda_int <= data_tx(bit_cnt-1); --write next bit to bus\r\n              state <= wr;                   --continue writing\r\n            END IF;\r\n          WHEN rd =>                         --read byte of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            IF(bit_cnt = 0) THEN             --read byte receive finished\r\n              IF(ena = '1' AND addr_rw = addr & rw) THEN  --continuing with another read at same address\r\n                sda_int <= '0';              --acknowledge the byte has been received\r\n              ELSE                           --stopping or continuing with a write\r\n                sda_int <= '1';              --send a no-acknowledge (before stop or repeated start)\r\n              END IF;\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              data_rd <= data_rx;            --output received data\r\n              state <= mstr_ack;             --go to master acknowledge\r\n            ELSE                             --next clock cycle of read state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              state <= rd;                   --continue reading\r\n            END IF;\r\n          WHEN slv_ack2 =>                   --slave acknowledge bit (write)\r\n            IF(ena = '1') THEN               --continue transaction\r\n              busy <= '0';                   --continue is accepted\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              IF(addr_rw = addr & rw) THEN   --continue transaction with another write\r\n                sda_int <= data_wr(bit_cnt); --write first bit of data\r\n                state <= wr;                 --go to write byte\r\n              ELSE                           --continue transaction with a read or new slave\r\n                state <= start;              --go to repeated start\r\n              END IF;\r\n            ELSE                             --complete transaction\r\n              state <= stop;                 --go to stop bit\r\n            END IF;\r\n          WHEN mstr_ack =>                   --master acknowledge bit after a read\r\n            IF(ena = '1') THEN               --continue transaction\r\n              busy <= '0';                   --continue is accepted and data received is available on bus\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              IF(addr_rw = addr & rw) THEN   --continue transaction with another read\r\n                sda_int <= '1';              --release sda from incoming data\r\n                state <= rd;                 --go to read byte\r\n              ELSE                           --continue transaction with a write or new slave\r\n                state <= start;              --repeated start\r\n              END IF;    \r\n            ELSE                             --complete transaction\r\n              state <= stop;                 --go to stop bit\r\n            END IF;\r\n          WHEN stop =>                       --stop bit of transaction\r\n            busy <= '0';                     --unflag busy\r\n            state <= ready;                  --go to idle state\r\n        END CASE;    \r\n      ELSIF(data_clk = '0' AND data_clk_prev = '1') THEN  --data clock falling edge\r\n        CASE state IS\r\n          WHEN start =>                  \r\n            IF(scl_ena = '0') THEN                  --starting new transaction\r\n              scl_ena <= '1';                       --enable scl output\r\n              ack_error <= '0';                     --reset acknowledge error output\r\n            END IF;\r\n          WHEN slv_ack1 =>                          --receiving slave acknowledge (command)\r\n            IF(sda /= '0' OR ack_error = '1') THEN  --no-acknowledge or previous no-acknowledge\r\n              ack_error <= '1';                     --set error output if no-acknowledge\r\n            END IF;\r\n          WHEN rd =>                                --receiving slave data\r\n            data_rx(bit_cnt) <= sda;                --receive current slave data bit\r\n          WHEN slv_ack2 =>                          --receiving slave acknowledge (write)\r\n            IF(sda /= '0' OR ack_error = '1') THEN  --no-acknowledge or previous no-acknowledge\r\n              ack_error <= '1';                     --set error output if no-acknowledge\r\n            END IF;\r\n          WHEN stop =>\r\n            scl_ena <= '0';                         --disable scl\r\n          WHEN OTHERS =>\r\n            NULL;\r\n        END CASE;\r\n      END IF;\r\n    END IF;\r\n  END PROCESS;  \r\n\r\n  --set sda output\r\n  WITH state SELECT\r\n    sda_ena_n <= data_clk_prev WHEN start,     --generate start condition\r\n                 NOT data_clk_prev WHEN stop,  --generate stop condition\r\n                 sda_int WHEN OTHERS;          --set to internal sda signal    \r\n      \r\n  --set scl and sda outputs\r\n  scl <= '0' WHEN (scl_ena = '1' AND scl_clk = '0') ELSE 'Z';\r\n  sda <= '0' WHEN sda_ena_n = '0' ELSE 'Z';\r\n  \r\nEND logic;\r\n"
  },
  {
    "path": "max10_adc_firmware/i2c_master.vhd.bak",
    "content": "--------------------------------------------------------------------------------\r\n--\r\n--   FileName:         i2c_master.vhd\r\n--   Dependencies:     none\r\n--   Design Software:  Quartus II 64-bit Version 13.1 Build 162 SJ Full Version\r\n--\r\n--   HDL CODE IS PROVIDED \"AS IS.\"  DIGI-KEY EXPRESSLY DISCLAIMS ANY\r\n--   WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING BUT NOT\r\n--   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A\r\n--   PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL DIGI-KEY\r\n--   BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR CONSEQUENTIAL\r\n--   DAMAGES, LOST PROFITS OR LOST DATA, HARM TO YOUR EQUIPMENT, COST OF\r\n--   PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS\r\n--   BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF),\r\n--   ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER SIMILAR COSTS.\r\n--\r\n--   Version History\r\n--   Version 1.0 11/01/2012 Scott Larson\r\n--     Initial Public Release\r\n--   Version 2.0 06/20/2014 Scott Larson\r\n--     Added ability to interface with different slaves in the same transaction\r\n--     Corrected ack_error bug where ack_error went 'Z' instead of '1' on error\r\n--     Corrected timing of when ack_error signal clears\r\n--   Version 2.1 10/21/2014 Scott Larson\r\n--     Replaced gated clock with clock enable\r\n--     Adjusted timing of SCL during start and stop conditions\r\n--   Version 2.2 02/05/2015 Scott Larson\r\n--     Corrected small SDA glitch introduced in version 2.1\r\n-- \r\n--------------------------------------------------------------------------------\r\n\r\nLIBRARY ieee;\r\nUSE ieee.std_logic_1164.all;\r\nUSE ieee.std_logic_unsigned.all;\r\n\r\nENTITY i2c_master IS\r\n  GENERIC(\r\n    input_clk : INTEGER := 50_000_000; --input clock speed from user logic in Hz\r\n    bus_clk   : INTEGER := 400_000);   --speed the i2c bus (scl) will run at in Hz\r\n  PORT(\r\n    clk       : IN     STD_LOGIC;                    --system clock\r\n    reset_n   : IN     STD_LOGIC;                    --active low reset\r\n    ena       : IN     STD_LOGIC;                    --latch in command\r\n    addr      : IN     STD_LOGIC_VECTOR(6 DOWNTO 0); --address of target slave\r\n    rw        : IN     STD_LOGIC;                    --'0' is write, '1' is read\r\n    data_wr   : IN     STD_LOGIC_VECTOR(7 DOWNTO 0); --data to write to slave\r\n    busy      : OUT    STD_LOGIC;                    --indicates transaction in progress\r\n    data_rd   : OUT    STD_LOGIC_VECTOR(7 DOWNTO 0); --data read from slave\r\n    ack_error : BUFFER STD_LOGIC;                    --flag if improper acknowledge from slave\r\n    sda       : INOUT  STD_LOGIC;                    --serial data output of i2c bus\r\n    scl       : INOUT  STD_LOGIC);                   --serial clock output of i2c bus\r\nEND i2c_master;\r\n\r\nARCHITECTURE logic OF i2c_master IS\r\n  CONSTANT divider  :  INTEGER := (input_clk/bus_clk)/4; --number of clocks in 1/4 cycle of scl\r\n  TYPE machine IS(ready, start, command, slv_ack1, wr, rd, slv_ack2, mstr_ack, stop); --needed states\r\n  SIGNAL state         : machine;                        --state machine\r\n  SIGNAL data_clk      : STD_LOGIC;                      --data clock for sda\r\n  SIGNAL data_clk_prev : STD_LOGIC;                      --data clock during previous system clock\r\n  SIGNAL scl_clk       : STD_LOGIC;                      --constantly running internal scl\r\n  SIGNAL scl_ena       : STD_LOGIC := '0';               --enables internal scl to output\r\n  SIGNAL sda_int       : STD_LOGIC := '1';               --internal sda\r\n  SIGNAL sda_ena_n     : STD_LOGIC;                      --enables internal sda to output\r\n  SIGNAL addr_rw       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --latched in address and read/write\r\n  SIGNAL data_tx       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --latched in data to write to slave\r\n  SIGNAL data_rx       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --data received from slave\r\n  SIGNAL bit_cnt       : INTEGER RANGE 0 TO 7 := 7;      --tracks bit number in transaction\r\n  SIGNAL stretch       : STD_LOGIC := '0';               --identifies if slave is stretching scl\r\nBEGIN\r\n\r\n  --generate the timing for the bus clock (scl_clk) and the data clock (data_clk)\r\n  PROCESS(clk, reset_n)\r\n    VARIABLE count  :  INTEGER RANGE 0 TO divider*4;  --timing for clock generation\r\n  BEGIN\r\n    IF(reset_n = '0') THEN                --reset asserted\r\n      stretch <= '0';\r\n      count := 0;\r\n    ELSIF(clk'EVENT AND clk = '1') THEN\r\n      data_clk_prev <= data_clk;          --store previous value of data clock\r\n      IF(count = divider*4-1) THEN        --end of timing cycle\r\n        count := 0;                       --reset timer\r\n      ELSIF(stretch = '0') THEN           --clock stretching from slave not detected\r\n        count := count + 1;               --continue clock generation timing\r\n      END IF;\r\n      CASE count IS\r\n        WHEN 0 TO divider-1 =>            --first 1/4 cycle of clocking\r\n          scl_clk <= '0';\r\n          data_clk <= '0';\r\n        WHEN divider TO divider*2-1 =>    --second 1/4 cycle of clocking\r\n          scl_clk <= '0';\r\n          data_clk <= '1';\r\n        WHEN divider*2 TO divider*3-1 =>  --third 1/4 cycle of clocking\r\n          scl_clk <= '1';                 --release scl\r\n          IF(scl = '0') THEN              --detect if slave is stretching clock\r\n            stretch <= '1';\r\n          ELSE\r\n            stretch <= '0';\r\n          END IF;\r\n          data_clk <= '1';\r\n        WHEN OTHERS =>                    --last 1/4 cycle of clocking\r\n          scl_clk <= '1';\r\n          data_clk <= '0';\r\n      END CASE;\r\n    END IF;\r\n  END PROCESS;\r\n\r\n  --state machine and writing to sda during scl low (data_clk rising edge)\r\n  PROCESS(clk, reset_n)\r\n  BEGIN\r\n    IF(reset_n = '0') THEN                 --reset asserted\r\n      state <= ready;                      --return to initial state\r\n      busy <= '1';                         --indicate not available\r\n      scl_ena <= '0';                      --sets scl high impedance\r\n      sda_int <= '1';                      --sets sda high impedance\r\n      ack_error <= '0';                    --clear acknowledge error flag\r\n      bit_cnt <= 7;                        --restarts data bit counter\r\n      data_rd <= \"00000000\";               --clear data read port\r\n    ELSIF(clk'EVENT AND clk = '1') THEN\r\n      IF(data_clk = '1' AND data_clk_prev = '0') THEN  --data clock rising edge\r\n        CASE state IS\r\n          WHEN ready =>                      --idle state\r\n            IF(ena = '1') THEN               --transaction requested\r\n              busy <= '1';                   --flag busy\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              state <= start;                --go to start bit\r\n            ELSE                             --remain idle\r\n              busy <= '0';                   --unflag busy\r\n              state <= ready;                --remain idle\r\n            END IF;\r\n          WHEN start =>                      --start bit of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            sda_int <= addr_rw(bit_cnt);     --set first address bit to bus\r\n            state <= command;                --go to command\r\n          WHEN command =>                    --address and command byte of transaction\r\n            IF(bit_cnt = 0) THEN             --command transmit finished\r\n              sda_int <= '1';                --release sda for slave acknowledge\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              state <= slv_ack1;             --go to slave acknowledge (command)\r\n            ELSE                             --next clock cycle of command state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              sda_int <= addr_rw(bit_cnt-1); --write address/command bit to bus\r\n              state <= command;              --continue with command\r\n            END IF;\r\n          WHEN slv_ack1 =>                   --slave acknowledge bit (command)\r\n            IF(addr_rw(0) = '0') THEN        --write command\r\n              sda_int <= data_tx(bit_cnt);   --write first bit of data\r\n              state <= wr;                   --go to write byte\r\n            ELSE                             --read command\r\n              sda_int <= '1';                --release sda from incoming data\r\n              state <= rd;                   --go to read byte\r\n            END IF;\r\n          WHEN wr =>                         --write byte of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            IF(bit_cnt = 0) THEN             --write byte transmit finished\r\n              sda_int <= '1';                --release sda for slave acknowledge\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              state <= slv_ack2;             --go to slave acknowledge (write)\r\n            ELSE                             --next clock cycle of write state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              sda_int <= data_tx(bit_cnt-1); --write next bit to bus\r\n              state <= wr;                   --continue writing\r\n            END IF;\r\n          WHEN rd =>                         --read byte of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            IF(bit_cnt = 0) THEN             --read byte receive finished\r\n              IF(ena = '1' AND addr_rw = addr & rw) THEN  --continuing with another read at same address\r\n                sda_int <= '0';              --acknowledge the byte has been received\r\n              ELSE                           --stopping or continuing with a write\r\n                sda_int <= '1';              --send a no-acknowledge (before stop or repeated start)\r\n              END IF;\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              data_rd <= data_rx;            --output received data\r\n              state <= mstr_ack;             --go to master acknowledge\r\n            ELSE                             --next clock cycle of read state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              state <= rd;                   --continue reading\r\n            END IF;\r\n          WHEN slv_ack2 =>                   --slave acknowledge bit (write)\r\n            IF(ena = '1') THEN               --continue transaction\r\n              busy <= '0';                   --continue is accepted\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              IF(addr_rw = addr & rw) THEN   --continue transaction with another write\r\n                sda_int <= data_wr(bit_cnt); --write first bit of data\r\n                state <= wr;                 --go to write byte\r\n              ELSE                           --continue transaction with a read or new slave\r\n                state <= start;              --go to repeated start\r\n              END IF;\r\n            ELSE                             --complete transaction\r\n              state <= stop;                 --go to stop bit\r\n            END IF;\r\n          WHEN mstr_ack =>                   --master acknowledge bit after a read\r\n            IF(ena = '1') THEN               --continue transaction\r\n              busy <= '0';                   --continue is accepted and data received is available on bus\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              IF(addr_rw = addr & rw) THEN   --continue transaction with another read\r\n                sda_int <= '1';              --release sda from incoming data\r\n                state <= rd;                 --go to read byte\r\n              ELSE                           --continue transaction with a write or new slave\r\n                state <= start;              --repeated start\r\n              END IF;    \r\n            ELSE                             --complete transaction\r\n              state <= stop;                 --go to stop bit\r\n            END IF;\r\n          WHEN stop =>                       --stop bit of transaction\r\n            busy <= '0';                     --unflag busy\r\n            state <= ready;                  --go to idle state\r\n        END CASE;    \r\n      ELSIF(data_clk = '0' AND data_clk_prev = '1') THEN  --data clock falling edge\r\n        CASE state IS\r\n          WHEN start =>                  \r\n            IF(scl_ena = '0') THEN                  --starting new transaction\r\n              scl_ena <= '1';                       --enable scl output\r\n              ack_error <= '0';                     --reset acknowledge error output\r\n            END IF;\r\n          WHEN slv_ack1 =>                          --receiving slave acknowledge (command)\r\n            IF(sda /= '0' OR ack_error = '1') THEN  --no-acknowledge or previous no-acknowledge\r\n              ack_error <= '1';                     --set error output if no-acknowledge\r\n            END IF;\r\n          WHEN rd =>                                --receiving slave data\r\n            data_rx(bit_cnt) <= sda;                --receive current slave data bit\r\n          WHEN slv_ack2 =>                          --receiving slave acknowledge (write)\r\n            IF(sda /= '0' OR ack_error = '1') THEN  --no-acknowledge or previous no-acknowledge\r\n              ack_error <= '1';                     --set error output if no-acknowledge\r\n            END IF;\r\n          WHEN stop =>\r\n            scl_ena <= '0';                         --disable scl\r\n          WHEN OTHERS =>\r\n            NULL;\r\n        END CASE;\r\n      END IF;\r\n    END IF;\r\n  END PROCESS;  \r\n\r\n  --set sda output\r\n  WITH state SELECT\r\n    sda_ena_n <= data_clk_prev WHEN start,     --generate start condition\r\n                 NOT data_clk_prev WHEN stop,  --generate stop condition\r\n                 sda_int WHEN OTHERS;          --set to internal sda signal    \r\n      \r\n  --set scl and sda outputs\r\n  scl <= '0' WHEN (scl_ena = '1' AND scl_clk = '0') ELSE 'Z';\r\n  sda <= '0' WHEN sda_ena_n = '0' ELSE 'Z';\r\n  \r\nEND logic;\r\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp.bsf",
    "content": "/*\nWARNING: Do NOT edit the input and output ports in this file in a text\neditor if you plan to continue editing the block that represents it in\nthe Block Editor! File corruption is VERY likely to occur.\n*/\n/*\nCopyright (C) 2018  Intel Corporation. All rights reserved.\nYour use of Intel Corporation's design tools, logic functions \nand other software and tools, and its AMPP partner logic \nfunctions, and any output files from any of the foregoing \n(including device programming or simulation files), and any \nassociated documentation or information are expressly subject \nto the terms and conditions of the Intel Program License \nSubscription Agreement, the Intel Quartus Prime License Agreement,\nthe Intel FPGA IP License Agreement, or other applicable license\nagreement, including, without limitation, that your use is for\nthe sole purpose of programming logic devices manufactured by\nIntel and sold by Intel or its authorized distributors.  Please\nrefer to the applicable agreement for further details.\n*/\n(header \"symbol\" (version \"1.2\"))\n(symbol\n\t(rect 0 0 256 176)\n\t(text \"lp_ram_dp\" (rect 98 0 168 16)(font \"Arial\" (font_size 10)))\n\t(text \"inst\" (rect 8 160 25 172)(font \"Arial\" ))\n\t(port\n\t\t(pt 0 32)\n\t\t(input)\n\t\t(text \"data[7..0]\" (rect 0 0 53 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"data[7..0]\" (rect 4 18 47 31)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 32)(pt 112 32)(line_width 3))\n\t)\n\t(port\n\t\t(pt 0 48)\n\t\t(input)\n\t\t(text \"wraddress[12..0]\" (rect 0 0 99 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"wraddress[12..0]\" (rect 4 34 86 47)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 48)(pt 112 48)(line_width 3))\n\t)\n\t(port\n\t\t(pt 0 64)\n\t\t(input)\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"wren\" (rect 4 50 28 63)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 64)(pt 112 64))\n\t)\n\t(port\n\t\t(pt 0 88)\n\t\t(input)\n\t\t(text \"rdaddress[12..0]\" (rect 0 0 94 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"rdaddress[12..0]\" (rect 4 74 82 87)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 88)(pt 112 88)(line_width 3))\n\t)\n\t(port\n\t\t(pt 0 104)\n\t\t(input)\n\t\t(text \"rden\" (rect 0 0 25 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"rden\" (rect 4 90 24 103)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 104)(pt 112 104))\n\t)\n\t(port\n\t\t(pt 0 128)\n\t\t(input)\n\t\t(text \"wrclock\" (rect 0 0 46 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"wrclock\" (rect 4 114 41 127)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 128)(pt 98 128))\n\t)\n\t(port\n\t\t(pt 0 144)\n\t\t(input)\n\t\t(text \"rdclock\" (rect 0 0 41 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"rdclock\" (rect 4 130 37 143)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 144)(pt 176 144))\n\t)\n\t(port\n\t\t(pt 256 88)\n\t\t(output)\n\t\t(text \"q[7..0]\" (rect 0 0 35 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"q[7..0]\" (rect 223 74 251 87)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 256 88)(pt 192 88)(line_width 3))\n\t)\n\t(drawing\n\t\t(text \"8192 Word(s)\" (rect 137 11 244 203)(font \"Arial\" )(vertical))\n\t\t(text \"RAM\" (rect 148 0 237 167)(font \"Arial\" )(vertical))\n\t\t(text \"Block Type: AUTO\" (rect 40 165 156 341)(font \"Arial\" ))\n\t\t(line (pt 128 24)(pt 168 24))\n\t\t(line (pt 168 24)(pt 168 112))\n\t\t(line (pt 168 112)(pt 128 112))\n\t\t(line (pt 128 112)(pt 128 24))\n\t\t(line (pt 112 27)(pt 120 27))\n\t\t(line (pt 120 27)(pt 120 39))\n\t\t(line (pt 120 39)(pt 112 39))\n\t\t(line (pt 112 39)(pt 112 27))\n\t\t(line (pt 112 34)(pt 114 36))\n\t\t(line (pt 114 36)(pt 112 38))\n\t\t(line (pt 98 36)(pt 112 36))\n\t\t(line (pt 120 32)(pt 128 32)(line_width 3))\n\t\t(line (pt 112 43)(pt 120 43))\n\t\t(line (pt 120 43)(pt 120 55))\n\t\t(line (pt 120 55)(pt 112 55))\n\t\t(line (pt 112 55)(pt 112 43))\n\t\t(line (pt 112 50)(pt 114 52))\n\t\t(line (pt 114 52)(pt 112 54))\n\t\t(line (pt 98 52)(pt 112 52))\n\t\t(line (pt 120 48)(pt 128 48)(line_width 3))\n\t\t(line (pt 112 59)(pt 120 59))\n\t\t(line (pt 120 59)(pt 120 71))\n\t\t(line (pt 120 71)(pt 112 71))\n\t\t(line (pt 112 71)(pt 112 59))\n\t\t(line (pt 112 66)(pt 114 68))\n\t\t(line (pt 114 68)(pt 112 70))\n\t\t(line (pt 98 68)(pt 112 68))\n\t\t(line (pt 120 64)(pt 128 64))\n\t\t(line (pt 112 83)(pt 120 83))\n\t\t(line (pt 120 83)(pt 120 95))\n\t\t(line (pt 120 95)(pt 112 95))\n\t\t(line (pt 112 95)(pt 112 83))\n\t\t(line (pt 112 90)(pt 114 92))\n\t\t(line (pt 114 92)(pt 112 94))\n\t\t(line (pt 104 92)(pt 112 92))\n\t\t(line (pt 120 88)(pt 128 88)(line_width 3))\n\t\t(line (pt 112 99)(pt 120 99))\n\t\t(line (pt 120 99)(pt 120 111))\n\t\t(line (pt 120 111)(pt 112 111))\n\t\t(line (pt 112 111)(pt 112 99))\n\t\t(line (pt 112 106)(pt 114 108))\n\t\t(line (pt 114 108)(pt 112 110))\n\t\t(line (pt 104 108)(pt 112 108))\n\t\t(line (pt 120 104)(pt 128 104))\n\t\t(line (pt 98 36)(pt 98 129))\n\t\t(line (pt 104 92)(pt 104 145))\n\t\t(line (pt 176 92)(pt 176 145))\n\t\t(line (pt 184 83)(pt 192 83))\n\t\t(line (pt 192 83)(pt 192 95))\n\t\t(line (pt 192 95)(pt 184 95))\n\t\t(line (pt 184 95)(pt 184 83))\n\t\t(line (pt 184 90)(pt 186 92))\n\t\t(line (pt 186 92)(pt 184 94))\n\t\t(line (pt 176 92)(pt 184 92))\n\t\t(line (pt 168 88)(pt 184 88)(line_width 3))\n\t\t(line (pt 0 0)(pt 257 0))\n\t\t(line (pt 257 0)(pt 257 178))\n\t\t(line (pt 0 178)(pt 257 178))\n\t\t(line (pt 0 0)(pt 0 178))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t)\n)\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 2-PORT\"\nset_global_assignment -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"lp_ram_dp.v\"]\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"lp_ram_dp.bsf\"]\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"lp_ram_dp_bb.v\"]\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%\n// GENERATION: STANDARD\n// VERSION: WM1.0\n// MODULE: altsyncram \n\n// ============================================================\n// File Name: lp_ram_dp.v\n// Megafunction Name(s):\n// \t\t\taltsyncram\n//\n// Simulation Library Files(s):\n// \t\t\taltera_mf\n// ============================================================\n// ************************************************************\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\n//\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\n// ************************************************************\n\n\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\n//Your use of Intel Corporation's design tools, logic functions \n//and other software and tools, and its AMPP partner logic \n//functions, and any output files from any of the foregoing \n//(including device programming or simulation files), and any \n//associated documentation or information are expressly subject \n//to the terms and conditions of the Intel Program License \n//Subscription Agreement, the Intel Quartus Prime License Agreement,\n//the Intel FPGA IP License Agreement, or other applicable license\n//agreement, including, without limitation, that your use is for\n//the sole purpose of programming logic devices manufactured by\n//Intel and sold by Intel or its authorized distributors.  Please\n//refer to the applicable agreement for further details.\n\n\n// synopsys translate_off\n`timescale 1 ps / 1 ps\n// synopsys translate_on\nmodule lp_ram_dp (\n\tdata,\n\trdaddress,\n\trdclock,\n\trden,\n\twraddress,\n\twrclock,\n\twren,\n\tq);\n\n\tinput\t[7:0]  data;\n\tinput\t[12:0]  rdaddress;\n\tinput\t  rdclock;\n\tinput\t  rden;\n\tinput\t[12:0]  wraddress;\n\tinput\t  wrclock;\n\tinput\t  wren;\n\toutput\t[7:0]  q;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_off\n`endif\n\ttri1\t  rden;\n\ttri1\t  wrclock;\n\ttri0\t  wren;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_on\n`endif\n\n\twire [7:0] sub_wire0;\n\twire [7:0] q = sub_wire0[7:0];\n\n\taltsyncram\taltsyncram_component (\n\t\t\t\t.address_a (wraddress),\n\t\t\t\t.address_b (rdaddress),\n\t\t\t\t.clock0 (wrclock),\n\t\t\t\t.clock1 (rdclock),\n\t\t\t\t.data_a (data),\n\t\t\t\t.rden_b (rden),\n\t\t\t\t.wren_a (wren),\n\t\t\t\t.q_b (sub_wire0),\n\t\t\t\t.aclr0 (1'b0),\n\t\t\t\t.aclr1 (1'b0),\n\t\t\t\t.addressstall_a (1'b0),\n\t\t\t\t.addressstall_b (1'b0),\n\t\t\t\t.byteena_a (1'b1),\n\t\t\t\t.byteena_b (1'b1),\n\t\t\t\t.clocken0 (1'b1),\n\t\t\t\t.clocken1 (1'b1),\n\t\t\t\t.clocken2 (1'b1),\n\t\t\t\t.clocken3 (1'b1),\n\t\t\t\t.data_b ({8{1'b1}}),\n\t\t\t\t.eccstatus (),\n\t\t\t\t.q_a (),\n\t\t\t\t.rden_a (1'b1),\n\t\t\t\t.wren_b (1'b0));\n\tdefparam\n\t\taltsyncram_component.address_aclr_b = \"NONE\",\n\t\taltsyncram_component.address_reg_b = \"CLOCK1\",\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\n\t\taltsyncram_component.clock_enable_input_b = \"BYPASS\",\n\t\taltsyncram_component.clock_enable_output_b = \"BYPASS\",\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\n\t\taltsyncram_component.numwords_a = 8192,\n\t\taltsyncram_component.numwords_b = 8192,\n\t\taltsyncram_component.operation_mode = \"DUAL_PORT\",\n\t\taltsyncram_component.outdata_aclr_b = \"NONE\",\n\t\taltsyncram_component.outdata_reg_b = \"CLOCK1\",\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\n\t\taltsyncram_component.rdcontrol_reg_b = \"CLOCK1\",\n\t\taltsyncram_component.widthad_a = 13,\n\t\taltsyncram_component.widthad_b = 13,\n\t\taltsyncram_component.width_a = 8,\n\t\taltsyncram_component.width_b = 8,\n\t\taltsyncram_component.width_byteena_a = 1;\n\n\nendmodule\n\n// ============================================================\n// CNX file retrieval info\n// ============================================================\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock NUMERIC \"1\"\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"65536\"\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGq NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"8\"\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"8\"\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"8\"\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"8\"\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\n// Retrieval info: PRIVATE: rden NUMERIC \"1\"\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"8192\"\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"8192\"\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\n// Retrieval info: CONSTANT: RDCONTROL_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"13\"\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"13\"\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"8\"\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\n// Retrieval info: USED_PORT: rdaddress 0 0 13 0 INPUT NODEFVAL \"rdaddress[12..0]\"\n// Retrieval info: USED_PORT: rdclock 0 0 0 0 INPUT NODEFVAL \"rdclock\"\n// Retrieval info: USED_PORT: rden 0 0 0 0 INPUT VCC \"rden\"\n// Retrieval info: USED_PORT: wraddress 0 0 13 0 INPUT NODEFVAL \"wraddress[12..0]\"\n// Retrieval info: USED_PORT: wrclock 0 0 0 0 INPUT VCC \"wrclock\"\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\n// Retrieval info: CONNECT: @address_a 0 0 13 0 wraddress 0 0 13 0\n// Retrieval info: CONNECT: @address_b 0 0 13 0 rdaddress 0 0 13 0\n// Retrieval info: CONNECT: @clock0 0 0 0 0 wrclock 0 0 0 0\n// Retrieval info: CONNECT: @clock1 0 0 0 0 rdclock 0 0 0 0\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\n// Retrieval info: CONNECT: @rden_b 0 0 0 0 rden 0 0 0 0\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\n// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.inc FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.cmp FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.bsf TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_inst.v FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_bb.v TRUE\n// Retrieval info: LIB_FILE: altera_mf\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp_2.bsf",
    "content": "/*\nWARNING: Do NOT edit the input and output ports in this file in a text\neditor if you plan to continue editing the block that represents it in\nthe Block Editor! File corruption is VERY likely to occur.\n*/\n/*\nCopyright (C) 2018  Intel Corporation. All rights reserved.\nYour use of Intel Corporation's design tools, logic functions \nand other software and tools, and its AMPP partner logic \nfunctions, and any output files from any of the foregoing \n(including device programming or simulation files), and any \nassociated documentation or information are expressly subject \nto the terms and conditions of the Intel Program License \nSubscription Agreement, the Intel Quartus Prime License Agreement,\nthe Intel FPGA IP License Agreement, or other applicable license\nagreement, including, without limitation, that your use is for\nthe sole purpose of programming logic devices manufactured by\nIntel and sold by Intel or its authorized distributors.  Please\nrefer to the applicable agreement for further details.\n*/\n(header \"symbol\" (version \"1.2\"))\n(symbol\n\t(rect 0 0 256 176)\n\t(text \"lp_ram_dp_2\" (rect 91 0 178 16)(font \"Arial\" (font_size 10)))\n\t(text \"inst\" (rect 8 160 25 172)(font \"Arial\" ))\n\t(port\n\t\t(pt 0 32)\n\t\t(input)\n\t\t(text \"data[4..0]\" (rect 0 0 53 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"data[4..0]\" (rect 4 18 47 31)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 32)(pt 112 32)(line_width 3))\n\t)\n\t(port\n\t\t(pt 0 48)\n\t\t(input)\n\t\t(text \"wraddress[12..0]\" (rect 0 0 99 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"wraddress[12..0]\" (rect 4 34 86 47)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 48)(pt 112 48)(line_width 3))\n\t)\n\t(port\n\t\t(pt 0 64)\n\t\t(input)\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"wren\" (rect 4 50 28 63)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 64)(pt 112 64))\n\t)\n\t(port\n\t\t(pt 0 88)\n\t\t(input)\n\t\t(text \"rdaddress[12..0]\" (rect 0 0 94 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"rdaddress[12..0]\" (rect 4 74 82 87)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 88)(pt 112 88)(line_width 3))\n\t)\n\t(port\n\t\t(pt 0 104)\n\t\t(input)\n\t\t(text \"rden\" (rect 0 0 25 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"rden\" (rect 4 90 24 103)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 104)(pt 112 104))\n\t)\n\t(port\n\t\t(pt 0 128)\n\t\t(input)\n\t\t(text \"wrclock\" (rect 0 0 46 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"wrclock\" (rect 4 114 41 127)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 128)(pt 98 128))\n\t)\n\t(port\n\t\t(pt 0 144)\n\t\t(input)\n\t\t(text \"rdclock\" (rect 0 0 41 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"rdclock\" (rect 4 130 37 143)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 144)(pt 176 144))\n\t)\n\t(port\n\t\t(pt 256 88)\n\t\t(output)\n\t\t(text \"q[4..0]\" (rect 0 0 35 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"q[4..0]\" (rect 223 74 251 87)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 256 88)(pt 192 88)(line_width 3))\n\t)\n\t(drawing\n\t\t(text \"8192 Word(s)\" (rect 137 11 244 203)(font \"Arial\" )(vertical))\n\t\t(text \"RAM\" (rect 148 0 237 167)(font \"Arial\" )(vertical))\n\t\t(text \"Block Type: AUTO\" (rect 40 165 156 341)(font \"Arial\" ))\n\t\t(line (pt 128 24)(pt 168 24))\n\t\t(line (pt 168 24)(pt 168 112))\n\t\t(line (pt 168 112)(pt 128 112))\n\t\t(line (pt 128 112)(pt 128 24))\n\t\t(line (pt 112 27)(pt 120 27))\n\t\t(line (pt 120 27)(pt 120 39))\n\t\t(line (pt 120 39)(pt 112 39))\n\t\t(line (pt 112 39)(pt 112 27))\n\t\t(line (pt 112 34)(pt 114 36))\n\t\t(line (pt 114 36)(pt 112 38))\n\t\t(line (pt 98 36)(pt 112 36))\n\t\t(line (pt 120 32)(pt 128 32)(line_width 3))\n\t\t(line (pt 112 43)(pt 120 43))\n\t\t(line (pt 120 43)(pt 120 55))\n\t\t(line (pt 120 55)(pt 112 55))\n\t\t(line (pt 112 55)(pt 112 43))\n\t\t(line (pt 112 50)(pt 114 52))\n\t\t(line (pt 114 52)(pt 112 54))\n\t\t(line (pt 98 52)(pt 112 52))\n\t\t(line (pt 120 48)(pt 128 48)(line_width 3))\n\t\t(line (pt 112 59)(pt 120 59))\n\t\t(line (pt 120 59)(pt 120 71))\n\t\t(line (pt 120 71)(pt 112 71))\n\t\t(line (pt 112 71)(pt 112 59))\n\t\t(line (pt 112 66)(pt 114 68))\n\t\t(line (pt 114 68)(pt 112 70))\n\t\t(line (pt 98 68)(pt 112 68))\n\t\t(line (pt 120 64)(pt 128 64))\n\t\t(line (pt 112 83)(pt 120 83))\n\t\t(line (pt 120 83)(pt 120 95))\n\t\t(line (pt 120 95)(pt 112 95))\n\t\t(line (pt 112 95)(pt 112 83))\n\t\t(line (pt 112 90)(pt 114 92))\n\t\t(line (pt 114 92)(pt 112 94))\n\t\t(line (pt 104 92)(pt 112 92))\n\t\t(line (pt 120 88)(pt 128 88)(line_width 3))\n\t\t(line (pt 112 99)(pt 120 99))\n\t\t(line (pt 120 99)(pt 120 111))\n\t\t(line (pt 120 111)(pt 112 111))\n\t\t(line (pt 112 111)(pt 112 99))\n\t\t(line (pt 112 106)(pt 114 108))\n\t\t(line (pt 114 108)(pt 112 110))\n\t\t(line (pt 104 108)(pt 112 108))\n\t\t(line (pt 120 104)(pt 128 104))\n\t\t(line (pt 98 36)(pt 98 129))\n\t\t(line (pt 104 92)(pt 104 145))\n\t\t(line (pt 176 92)(pt 176 145))\n\t\t(line (pt 184 83)(pt 192 83))\n\t\t(line (pt 192 83)(pt 192 95))\n\t\t(line (pt 192 95)(pt 184 95))\n\t\t(line (pt 184 95)(pt 184 83))\n\t\t(line (pt 184 90)(pt 186 92))\n\t\t(line (pt 186 92)(pt 184 94))\n\t\t(line (pt 176 92)(pt 184 92))\n\t\t(line (pt 168 88)(pt 184 88)(line_width 3))\n\t\t(line (pt 0 0)(pt 257 0))\n\t\t(line (pt 257 0)(pt 257 178))\n\t\t(line (pt 0 178)(pt 257 178))\n\t\t(line (pt 0 0)(pt 0 178))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t)\n)\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp_2.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 2-PORT\"\nset_global_assignment -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"lp_ram_dp_2.v\"]\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"lp_ram_dp_2.bsf\"]\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"lp_ram_dp_2_inst.v\"]\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"lp_ram_dp_2_bb.v\"]\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp_2.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%\n// GENERATION: STANDARD\n// VERSION: WM1.0\n// MODULE: altsyncram \n\n// ============================================================\n// File Name: lp_ram_dp_2.v\n// Megafunction Name(s):\n// \t\t\taltsyncram\n//\n// Simulation Library Files(s):\n// \t\t\taltera_mf\n// ============================================================\n// ************************************************************\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\n//\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\n// ************************************************************\n\n\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\n//Your use of Intel Corporation's design tools, logic functions \n//and other software and tools, and its AMPP partner logic \n//functions, and any output files from any of the foregoing \n//(including device programming or simulation files), and any \n//associated documentation or information are expressly subject \n//to the terms and conditions of the Intel Program License \n//Subscription Agreement, the Intel Quartus Prime License Agreement,\n//the Intel FPGA IP License Agreement, or other applicable license\n//agreement, including, without limitation, that your use is for\n//the sole purpose of programming logic devices manufactured by\n//Intel and sold by Intel or its authorized distributors.  Please\n//refer to the applicable agreement for further details.\n\n\n// synopsys translate_off\n`timescale 1 ps / 1 ps\n// synopsys translate_on\nmodule lp_ram_dp_2 (\n\tdata,\n\trdaddress,\n\trdclock,\n\trden,\n\twraddress,\n\twrclock,\n\twren,\n\tq);\n\n\tinput\t[4:0]  data;\n\tinput\t[12:0]  rdaddress;\n\tinput\t  rdclock;\n\tinput\t  rden;\n\tinput\t[12:0]  wraddress;\n\tinput\t  wrclock;\n\tinput\t  wren;\n\toutput\t[4:0]  q;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_off\n`endif\n\ttri1\t  rden;\n\ttri1\t  wrclock;\n\ttri0\t  wren;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_on\n`endif\n\n\twire [4:0] sub_wire0;\n\twire [4:0] q = sub_wire0[4:0];\n\n\taltsyncram\taltsyncram_component (\n\t\t\t\t.address_a (wraddress),\n\t\t\t\t.address_b (rdaddress),\n\t\t\t\t.clock0 (wrclock),\n\t\t\t\t.clock1 (rdclock),\n\t\t\t\t.data_a (data),\n\t\t\t\t.rden_b (rden),\n\t\t\t\t.wren_a (wren),\n\t\t\t\t.q_b (sub_wire0),\n\t\t\t\t.aclr0 (1'b0),\n\t\t\t\t.aclr1 (1'b0),\n\t\t\t\t.addressstall_a (1'b0),\n\t\t\t\t.addressstall_b (1'b0),\n\t\t\t\t.byteena_a (1'b1),\n\t\t\t\t.byteena_b (1'b1),\n\t\t\t\t.clocken0 (1'b1),\n\t\t\t\t.clocken1 (1'b1),\n\t\t\t\t.clocken2 (1'b1),\n\t\t\t\t.clocken3 (1'b1),\n\t\t\t\t.data_b ({5{1'b1}}),\n\t\t\t\t.eccstatus (),\n\t\t\t\t.q_a (),\n\t\t\t\t.rden_a (1'b1),\n\t\t\t\t.wren_b (1'b0));\n\tdefparam\n\t\taltsyncram_component.address_aclr_b = \"NONE\",\n\t\taltsyncram_component.address_reg_b = \"CLOCK1\",\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\n\t\taltsyncram_component.clock_enable_input_b = \"BYPASS\",\n\t\taltsyncram_component.clock_enable_output_b = \"BYPASS\",\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\n\t\taltsyncram_component.numwords_a = 8192,\n\t\taltsyncram_component.numwords_b = 8192,\n\t\taltsyncram_component.operation_mode = \"DUAL_PORT\",\n\t\taltsyncram_component.outdata_aclr_b = \"NONE\",\n\t\taltsyncram_component.outdata_reg_b = \"CLOCK1\",\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\n\t\taltsyncram_component.rdcontrol_reg_b = \"CLOCK1\",\n\t\taltsyncram_component.widthad_a = 13,\n\t\taltsyncram_component.widthad_b = 13,\n\t\taltsyncram_component.width_a = 5,\n\t\taltsyncram_component.width_b = 5,\n\t\taltsyncram_component.width_byteena_a = 1;\n\n\nendmodule\n\n// ============================================================\n// CNX file retrieval info\n// ============================================================\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock NUMERIC \"1\"\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"40960\"\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGq NUMERIC \"0\"\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"5\"\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"5\"\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"5\"\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"5\"\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\n// Retrieval info: PRIVATE: rden NUMERIC \"1\"\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"8192\"\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"8192\"\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\n// Retrieval info: CONSTANT: RDCONTROL_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"13\"\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"13\"\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"5\"\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"5\"\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\n// Retrieval info: USED_PORT: data 0 0 5 0 INPUT NODEFVAL \"data[4..0]\"\n// Retrieval info: USED_PORT: q 0 0 5 0 OUTPUT NODEFVAL \"q[4..0]\"\n// Retrieval info: USED_PORT: rdaddress 0 0 13 0 INPUT NODEFVAL \"rdaddress[12..0]\"\n// Retrieval info: USED_PORT: rdclock 0 0 0 0 INPUT NODEFVAL \"rdclock\"\n// Retrieval info: USED_PORT: rden 0 0 0 0 INPUT VCC \"rden\"\n// Retrieval info: USED_PORT: wraddress 0 0 13 0 INPUT NODEFVAL \"wraddress[12..0]\"\n// Retrieval info: USED_PORT: wrclock 0 0 0 0 INPUT VCC \"wrclock\"\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\n// Retrieval info: CONNECT: @address_a 0 0 13 0 wraddress 0 0 13 0\n// Retrieval info: CONNECT: @address_b 0 0 13 0 rdaddress 0 0 13 0\n// Retrieval info: CONNECT: @clock0 0 0 0 0 wrclock 0 0 0 0\n// Retrieval info: CONNECT: @clock1 0 0 0 0 rdclock 0 0 0 0\n// Retrieval info: CONNECT: @data_a 0 0 5 0 data 0 0 5 0\n// Retrieval info: CONNECT: @rden_b 0 0 0 0 rden 0 0 0 0\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\n// Retrieval info: CONNECT: q 0 0 5 0 @q_b 0 0 5 0\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2.inc FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2.cmp FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2.bsf TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2_inst.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2_bb.v TRUE\n// Retrieval info: LIB_FILE: altera_mf\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp_2_bb.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%VBB%\n// GENERATION: STANDARD\n// VERSION: WM1.0\n// MODULE: altsyncram \n\n// ============================================================\n// File Name: lp_ram_dp_2.v\n// Megafunction Name(s):\n// \t\t\taltsyncram\n//\n// Simulation Library Files(s):\n// \t\t\taltera_mf\n// ============================================================\n// ************************************************************\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\n//\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\n// ************************************************************\n\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\n//Your use of Intel Corporation's design tools, logic functions \n//and other software and tools, and its AMPP partner logic \n//functions, and any output files from any of the foregoing \n//(including device programming or simulation files), and any \n//associated documentation or information are expressly subject \n//to the terms and conditions of the Intel Program License \n//Subscription Agreement, the Intel Quartus Prime License Agreement,\n//the Intel FPGA IP License Agreement, or other applicable license\n//agreement, including, without limitation, that your use is for\n//the sole purpose of programming logic devices manufactured by\n//Intel and sold by Intel or its authorized distributors.  Please\n//refer to the applicable agreement for further details.\n\nmodule lp_ram_dp_2 (\n\tdata,\n\trdaddress,\n\trdclock,\n\trden,\n\twraddress,\n\twrclock,\n\twren,\n\tq);\n\n\tinput\t[4:0]  data;\n\tinput\t[12:0]  rdaddress;\n\tinput\t  rdclock;\n\tinput\t  rden;\n\tinput\t[12:0]  wraddress;\n\tinput\t  wrclock;\n\tinput\t  wren;\n\toutput\t[4:0]  q;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_off\n`endif\n\ttri1\t  rden;\n\ttri1\t  wrclock;\n\ttri0\t  wren;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_on\n`endif\n\nendmodule\n\n// ============================================================\n// CNX file retrieval info\n// ============================================================\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock NUMERIC \"1\"\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"40960\"\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGq NUMERIC \"0\"\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"5\"\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"5\"\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"5\"\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"5\"\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\n// Retrieval info: PRIVATE: rden NUMERIC \"1\"\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"8192\"\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"8192\"\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\n// Retrieval info: CONSTANT: RDCONTROL_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"13\"\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"13\"\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"5\"\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"5\"\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\n// Retrieval info: USED_PORT: data 0 0 5 0 INPUT NODEFVAL \"data[4..0]\"\n// Retrieval info: USED_PORT: q 0 0 5 0 OUTPUT NODEFVAL \"q[4..0]\"\n// Retrieval info: USED_PORT: rdaddress 0 0 13 0 INPUT NODEFVAL \"rdaddress[12..0]\"\n// Retrieval info: USED_PORT: rdclock 0 0 0 0 INPUT NODEFVAL \"rdclock\"\n// Retrieval info: USED_PORT: rden 0 0 0 0 INPUT VCC \"rden\"\n// Retrieval info: USED_PORT: wraddress 0 0 13 0 INPUT NODEFVAL \"wraddress[12..0]\"\n// Retrieval info: USED_PORT: wrclock 0 0 0 0 INPUT VCC \"wrclock\"\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\n// Retrieval info: CONNECT: @address_a 0 0 13 0 wraddress 0 0 13 0\n// Retrieval info: CONNECT: @address_b 0 0 13 0 rdaddress 0 0 13 0\n// Retrieval info: CONNECT: @clock0 0 0 0 0 wrclock 0 0 0 0\n// Retrieval info: CONNECT: @clock1 0 0 0 0 rdclock 0 0 0 0\n// Retrieval info: CONNECT: @data_a 0 0 5 0 data 0 0 5 0\n// Retrieval info: CONNECT: @rden_b 0 0 0 0 rden 0 0 0 0\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\n// Retrieval info: CONNECT: q 0 0 5 0 @q_b 0 0 5 0\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2.inc FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2.cmp FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2.bsf TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2_inst.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_2_bb.v TRUE\n// Retrieval info: LIB_FILE: altera_mf\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp_2_inst.v",
    "content": "lp_ram_dp_2\tlp_ram_dp_2_inst (\n\t.data ( data_sig ),\n\t.rdaddress ( rdaddress_sig ),\n\t.rdclock ( rdclock_sig ),\n\t.rden ( rden_sig ),\n\t.wraddress ( wraddress_sig ),\n\t.wrclock ( wrclock_sig ),\n\t.wren ( wren_sig ),\n\t.q ( q_sig )\n\t);\n"
  },
  {
    "path": "max10_adc_firmware/lp_ram_dp_bb.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%VBB%\n// GENERATION: STANDARD\n// VERSION: WM1.0\n// MODULE: altsyncram \n\n// ============================================================\n// File Name: lp_ram_dp.v\n// Megafunction Name(s):\n// \t\t\taltsyncram\n//\n// Simulation Library Files(s):\n// \t\t\taltera_mf\n// ============================================================\n// ************************************************************\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\n//\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\n// ************************************************************\n\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\n//Your use of Intel Corporation's design tools, logic functions \n//and other software and tools, and its AMPP partner logic \n//functions, and any output files from any of the foregoing \n//(including device programming or simulation files), and any \n//associated documentation or information are expressly subject \n//to the terms and conditions of the Intel Program License \n//Subscription Agreement, the Intel Quartus Prime License Agreement,\n//the Intel FPGA IP License Agreement, or other applicable license\n//agreement, including, without limitation, that your use is for\n//the sole purpose of programming logic devices manufactured by\n//Intel and sold by Intel or its authorized distributors.  Please\n//refer to the applicable agreement for further details.\n\nmodule lp_ram_dp (\n\tdata,\n\trdaddress,\n\trdclock,\n\trden,\n\twraddress,\n\twrclock,\n\twren,\n\tq);\n\n\tinput\t[7:0]  data;\n\tinput\t[12:0]  rdaddress;\n\tinput\t  rdclock;\n\tinput\t  rden;\n\tinput\t[12:0]  wraddress;\n\tinput\t  wrclock;\n\tinput\t  wren;\n\toutput\t[7:0]  q;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_off\n`endif\n\ttri1\t  rden;\n\ttri1\t  wrclock;\n\ttri0\t  wren;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_on\n`endif\n\nendmodule\n\n// ============================================================\n// CNX file retrieval info\n// ============================================================\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock NUMERIC \"1\"\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"65536\"\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGq NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"8\"\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"8\"\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"8\"\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"8\"\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\n// Retrieval info: PRIVATE: rden NUMERIC \"1\"\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"8192\"\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"8192\"\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\n// Retrieval info: CONSTANT: RDCONTROL_REG_B STRING \"CLOCK1\"\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"13\"\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"13\"\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"8\"\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\n// Retrieval info: USED_PORT: rdaddress 0 0 13 0 INPUT NODEFVAL \"rdaddress[12..0]\"\n// Retrieval info: USED_PORT: rdclock 0 0 0 0 INPUT NODEFVAL \"rdclock\"\n// Retrieval info: USED_PORT: rden 0 0 0 0 INPUT VCC \"rden\"\n// Retrieval info: USED_PORT: wraddress 0 0 13 0 INPUT NODEFVAL \"wraddress[12..0]\"\n// Retrieval info: USED_PORT: wrclock 0 0 0 0 INPUT VCC \"wrclock\"\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\n// Retrieval info: CONNECT: @address_a 0 0 13 0 wraddress 0 0 13 0\n// Retrieval info: CONNECT: @address_b 0 0 13 0 rdaddress 0 0 13 0\n// Retrieval info: CONNECT: @clock0 0 0 0 0 wrclock 0 0 0 0\n// Retrieval info: CONNECT: @clock1 0 0 0 0 rdclock 0 0 0 0\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\n// Retrieval info: CONNECT: @rden_b 0 0 0 0 rden 0 0 0 0\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\n// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.inc FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.cmp FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.bsf TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_inst.v FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_bb.v TRUE\n// Retrieval info: LIB_FILE: altera_mf\n"
  },
  {
    "path": "max10_adc_firmware/mball.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 192 128)\r\n\t(text \"mball\" (rect 5 0 25 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"CounterX[9..0]\" (rect 0 0 57 12)(font \"Arial\" ))\r\n\t\t(text \"CounterX[9..0]\" (rect 21 43 78 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"CounterY[8..0]\" (rect 0 0 59 12)(font \"Arial\" ))\r\n\t\t(text \"CounterY[8..0]\" (rect 21 59 80 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 32)\r\n\t\t(output)\r\n\t\t(text \"ball\" (rect 0 0 11 12)(font \"Arial\" ))\r\n\t\t(text \"ball\" (rect 144 27 155 39)(font \"Arial\" ))\r\n\t\t(line (pt 176 32)(pt 160 32)(line_width 1))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 160 96)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/mball.v",
    "content": "module mball(clk, BouncingObject, inotherball, CounterX, CounterY, ballX, ballY, inball, ballspeed, ballmass);\r\ninput clk;\r\ninput BouncingObject;\r\ninput inotherball;\r\ninput [9:0] CounterX;\r\ninput [8:0] CounterY;\r\nparameter [9:0] startX;\r\nparameter [8:0] startY;\r\nparameter ballsize = 5;\r\nparameter twoballsize = 2*ballsize;\r\noutput reg [9:0] ballX;\r\noutput reg [8:0] ballY;\r\noutput reg [8:0] ballspeed;\r\nparameter [8:0] pballmass;\r\nparameter [8:0] pballspeed;\r\n\r\noutput [8:0] ballmass = pballmass;//just set to the input parameter\r\n\r\nreg ball_inX, ball_inY;\r\nalways @(posedge clk)\r\nif(ball_inX==0) ball_inX <= (CounterX==ballX) & ball_inY; else ball_inX <= !(CounterX==ballX+twoballsize);\r\nalways @(posedge clk)\r\nif(ball_inY==0) ball_inY <= (CounterY==ballY); else ball_inY <= !(CounterY==ballY+twoballsize);\r\noutput inball = ball_inX & ball_inY;\r\n\r\ninitial begin\r\n    ballX<=startX;\r\n\t ballY<=startY;\r\n\t ball_dirX <= startX%2;\r\n\t ball_dirY <= startY%2;\r\n\t ballspeed<=pballspeed;\r\nend\r\n\r\nreg ResetCollision;\r\nalways @(posedge clk) ResetCollision <= (CounterY==500) & (CounterX==0);  // active only once for every video frame\r\n\r\nreg CollisionX1, CollisionX2, CollisionY1, CollisionY2;\r\nalways @(posedge clk) if(ResetCollision) CollisionX1<=0; else if(BouncingObject & (CounterX==ballX   ) & (CounterY==ballY+ballsize)) CollisionX1<=1;\r\nalways @(posedge clk) if(ResetCollision) CollisionX2<=0; else if(BouncingObject & (CounterX==ballX+twoballsize) & (CounterY==ballY+ballsize)) CollisionX2<=1;\r\nalways @(posedge clk) if(ResetCollision) CollisionY1<=0; else if(BouncingObject & (CounterX==ballX+ballsize) & (CounterY==ballY   )) CollisionY1<=1;\r\nalways @(posedge clk) if(ResetCollision) CollisionY2<=0; else if(BouncingObject & (CounterX==ballX+ballsize) & (CounterY==ballY+twoballsize)) CollisionY2<=1;\r\n\r\nwire UpdateBallPosition = ResetCollision;  // update the ball position at the same time that we reset the collision detectors\r\n\r\nreg ballcollision;\r\nalways @(posedge clk) if(ResetCollision) ballcollision<=0; else if (inotherball) ballcollision<=1;//inotherball;\r\n\r\nreg ball_dirX, ball_dirY;\r\nalways @(posedge clk) begin\r\n\tif(UpdateBallPosition) begin\r\n\t\tif(~(CollisionX1 & CollisionX2))        // if collision on both X-sides, don't move in the X direction\r\n\t\tbegin\r\n\t\t\tif (ballcollision) begin\r\n\t\t\t   ball_dirX = !ball_dirX;\r\n\t\t\t\tballspeed = 1+((ballspeed+1)%2);//ballcollision;///ballmass; // v=p/m\r\n\t\t\tend\r\n\t\t\tballX = ballX + (ball_dirX ? -ballspeed : ballspeed);\r\n\t\t\tif (CollisionX2) ball_dirX <= 1; else if (CollisionX1) ball_dirX <= 0;\r\n\t\tend\r\n\t\r\n\t\tif(~(CollisionY1 & CollisionY2))        // if collision on both Y-sides, don't move in the Y direction\r\n\t\tbegin\r\n\t\t\tballY <= ballY + (ball_dirY ? -1 : 1);\r\n\t\t\tif (CollisionY2) ball_dirY <= 1; else if (CollisionY1) ball_dirY <= 0;\r\n\t\tend\r\n\tend\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 2018  Intel Corporation. All rights reserved.\r\nYour use of Intel Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Intel Program License \r\nSubscription Agreement, the Intel Quartus Prime License Agreement,\r\nthe Intel FPGA IP License Agreement, or other applicable license\r\nagreement, including, without limitation, that your use is for\r\nthe sole purpose of programming logic devices manufactured by\r\nIntel and sold by Intel or its authorized distributors.  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  },
  {
    "path": "max10_adc_firmware/myadc/myadc.cmp",
    "content": "\tcomponent myadc is\r\n\t\tport (\n\t\t\tadc_pll_clock_clk      : in  std_logic                     := 'X';             -- clk\n\t\t\tadc_pll_locked_export  : in  std_logic                     := 'X';             -- export\n\t\t\tclock_clk              : in  std_logic                     := 'X';             -- clk\n\t\t\tcommand_valid          : in  std_logic                     := 'X';             -- valid\n\t\t\tcommand_channel        : in  std_logic_vector(4 downto 0)  := (others => 'X'); -- channel\n\t\t\tcommand_startofpacket  : in  std_logic                     := 'X';             -- startofpacket\n\t\t\tcommand_endofpacket    : in  std_logic                     := 'X';             -- endofpacket\n\t\t\tcommand_ready          : out std_logic;                                        -- ready\n\t\t\treset_sink_reset_n     : in  std_logic                     := 'X';             -- reset_n\n\t\t\tresponse_valid         : out std_logic;                                        -- valid\n\t\t\tresponse_channel       : out std_logic_vector(4 downto 0);                     -- channel\n\t\t\tresponse_data          : out std_logic_vector(11 downto 0);                    -- data\n\t\t\tresponse_startofpacket : out std_logic;                                        -- startofpacket\n\t\t\tresponse_endofpacket   : out std_logic                                         -- endofpacket\n\t\t);\n\tend component myadc;\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc.csv",
    "content": "# system info myadc on 2021.05.28.12:56:46\nsystem_info:\nname,value\nDEVICE,10M08SAE144C8GES\nDEVICE_FAMILY,MAX 10\nGENERATION_ID,1622221001\n#\n#\n# Files generated for myadc on 2021.05.28.12:56:46\nfiles:\nfilepath,kind,attributes,module,is_top\nsimulation/myadc.v,VERILOG,,myadc,true\nsimulation/submodules/myadc_modular_adc_0.v,VERILOG,,myadc_modular_adc_0,false\nsimulation/submodules/altera_modular_adc_control.v,VERILOG,,altera_modular_adc_control,false\nsimulation/submodules/altera_modular_adc_control_avrg_fifo.v,VERILOG,,altera_modular_adc_control,false\nsimulation/submodules/altera_modular_adc_control_fsm.v,VERILOG,,altera_modular_adc_control,false\nsimulation/submodules/chsel_code_converter_sw_to_hw.v,VERILOG,,altera_modular_adc_control,false\nsimulation/submodules/fiftyfivenm_adcblock_primitive_wrapper.v,VERILOG,,altera_modular_adc_control,false\nsimulation/submodules/fiftyfivenm_adcblock_top_wrapper.v,VERILOG,,altera_modular_adc_control,false\n#\n# Map from instance-path to kind of module\ninstances:\ninstancePath,module\nmyadc.modular_adc_0,myadc_modular_adc_0\nmyadc.modular_adc_0.control_internal,altera_modular_adc_control\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc.html",
    "content": "<!DOCTYPE HTML PUBLIC \"-//W3C//DTD HTML 4.0 Transitional//EN\">\n\n<html xmlns=\"http://www.w3.org/1999/xhtml\">\n <head>\n  <title>datasheet for myadc</title>\n  <style type=\"text/css\">\nbody { font-family:arial ;}\na { text-decoration:underline ; color:#003000 ;}\na:hover { text-decoration:underline ; color:0030f0 ;}\ntd { padding : 5px ;}\ntable.topTitle { width:100% ;}\ntable.topTitle td.l { text-align:left ; font-weight: bold ; font-size:30px ;}\ntable.topTitle td.r { text-align:right ; font-weight: bold ; font-size:16px ;}\ntable.blueBar { width : 100% ; border-spacing : 0px ;}\ntable.blueBar td { background:#0036ff ; font-size:12px ; color : white ; text-align : left ; font-weight : bold ;}\ntable.blueBar td.l { text-align : left ;}\ntable.blueBar td.r { text-align : right ;}\ntable.items { width:100% ; border-collapse:collapse ;}\ntable.items td.label { font-weight:bold ; font-size:16px ; vertical-align:top ;}\ntable.items td.mono { font-family:courier ; font-size:12px ; white-space:pre ;}\ndiv.label { font-weight:bold ; font-size:16px ; vertical-align:top ; text-align:center ;}\ntable.grid { border-collapse:collapse ;}\ntable.grid td { border:1px solid #bbb ; font-size:12px ;}\nbody { font-family:arial ;}\ntable.x { font-family:courier ; border-collapse:collapse ; padding:2px ;}\ntable.x td { border:1px solid #bbb ;}\ntd.tableTitle { font-weight:bold ; text-align:center ;}\ntable.grid { border-collapse:collapse ;}\ntable.grid td { border:1px solid #bbb ;}\ntable.grid td.tableTitle { font-weight:bold ; text-align:center ;}\ntable.mmap { border-collapse:collapse ; text-size:11px ; border:1px solid #d8d8d8 ;}\ntable.mmap td { border-color:#d8d8d8 ; border-width:1px ; border-style:solid ;}\ntable.mmap td.empty { border-style:none ; background-color:#f0f0f0 ;}\ntable.mmap td.slavemodule { text-align:left ; font-size:11px ; border-style:solid solid none solid ;}\ntable.mmap td.slavem { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid none solid ;}\ntable.mmap td.slaveb { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}\ntable.mmap td.mastermodule { text-align:center ; font-size:11px ; border-style:solid solid none solid ;}\ntable.mmap td.masterlr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}\ntable.mmap td.masterl { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid solid ;}\ntable.mmap td.masterm { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid none ;}\ntable.mmap td.masterr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid none ;}\ntable.mmap td.addr { font-family:courier ; font-size:9px ; text-align:right ;}\ntable.connectionboxes { border-collapse:separate ; border-spacing:0px ; font-family:arial ;}\ntable.connectionboxes td.from { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}\ntable.connectionboxes td.to { font-size:9px ; font-style:italic ; vertical-align:top ; text-align:right ;}\ntable.connectionboxes td.lefthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:right ;}\ntable.connectionboxes td.righthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}\ntable.connectionboxes td.righthandlabel { font-size:11px ; vertical-align:bottom ; text-align:left ;}\ntable.connectionboxes td.neighbor { padding:3px ; border:1px solid black ; font-size: 11px ; background:#e8e8e8 ; vertical-align:center ; text-align:center ;}\ntable.connectionboxes td.main { padding:8px ; border:1px solid black ; font-size: 14px ; font-weight:bold ; background:#ffffff ; vertical-align:center ; text-align:center ;}\n.parametersbox { border:1px solid #d0d0d0 ; display:inline-block ; max-height:160px ; overflow:auto ; width:360px ; font-size:10px ;}\n.flowbox { display:inline-block ;}\n.parametersbox table { font-size:10px ;}\ntd.parametername { font-style:italic ;}\ntd.parametervalue { font-weight:bold ;}\ndiv.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; border-top:1px solid #707070 ; border-bottom:1px solid #707070 ; padding:20px ; margin:20px ; width:auto ;}</style>\n </head>\n <body>\n  <table class=\"topTitle\">\n   <tr>\n    <td class=\"l\">myadc</td>\n    <td class=\"r\">\n     <br/>\n     <br/>\n    </td>\n   </tr>\n  </table>\n  <table class=\"blueBar\">\n   <tr>\n    <td class=\"l\">2021.05.28.12:56:54</td>\n    <td class=\"r\">Datasheet</td>\n   </tr>\n  </table>\n  <div style=\"width:100% ;  height:10px\"> </div>\n  <div class=\"label\">Overview</div>\n  <div class=\"greydiv\">\n   <div style=\"display:inline-block ; text-align:left\">\n    <table class=\"connectionboxes\">\n     <tr style=\"height:6px\">\n      <td></td>\n     </tr>\n    </table>\n   </div><span style=\"display:inline-block ; width:28px\"> </span>\n   <div style=\"display:inline-block ; text-align:left\"><span>\n     <br/></span>\n   </div>\n  </div>\n  <div style=\"width:100% ;  height:10px\"> </div>\n  <div class=\"label\">Memory Map</div>\n  <table class=\"mmap\">\n   <tr>\n    <td class=\"empty\" rowspan=\"2\"></td>\n   </tr>\n  </table>\n  <a name=\"module_modular_adc_0\"> </a>\n  <div>\n   <hr/>\n   <h2>modular_adc_0</h2>altera_modular_adc v18.0\n   <br/>\n   <br/>\n   <br/>\n   <table class=\"flowbox\">\n    <tr>\n     <td class=\"parametersbox\">\n      <h2>Parameters</h2>\n      <table>\n       <tr>\n        <td class=\"parametername\">CORE_VAR</td>\n        <td class=\"parametervalue\">3</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">ENABLE_DEBUG</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">MONITOR_COUNT_WIDTH</td>\n        <td class=\"parametervalue\">12</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">CLOCK_FREQ</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">FAMILY</td>\n        <td class=\"parametervalue\">MAX10FPGA</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">DEVICE_PART</td>\n        <td class=\"parametervalue\">10M08SAE144C8GES</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">device_partname_fivechar_prefix</td>\n        <td class=\"parametervalue\">10M08</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">device_adc_type</td>\n        <td class=\"parametervalue\">22</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">max_adc_count_on_die</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">adc_count_on_device</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">device_power_supply_type</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">ip_is_for_which_adc</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">is_this_first_or_second_adc</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">analog_input_pin_mask</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">hard_pwd</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">sample_rate</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">clkdiv</td>\n        <td class=\"parametervalue\">2</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">derived_clkdiv</td>\n        <td class=\"parametervalue\">2</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">tsclkdiv</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">tsclksel</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">refsel</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">external_vref</td>\n        <td class=\"parametervalue\">2.5</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">int_vref_vr</td>\n        <td class=\"parametervalue\">3.3</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">int_vref_nonvr</td>\n        <td class=\"parametervalue\">2.5</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">reference_voltage</td>\n        <td class=\"parametervalue\">3.3</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">reference_voltage_sim</td>\n        <td class=\"parametervalue\">65536</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">prescalar</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">enable_usr_sim</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_tsd</td>\n        <td class=\"parametervalue\">true</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_tsd_max</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">tsd_max</td>\n        <td class=\"parametervalue\">125</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_tsd_min</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">tsd_min</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch0</td>\n        <td class=\"parametervalue\">true</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch0</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch0</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch0</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch0</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch0</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch1</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch1</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch1</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch1</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch1</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch1</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch2</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch2</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch2</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch2</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch2</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch2</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch3</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch3</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch3</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch3</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch3</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch3</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch4</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch4</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch4</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch4</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch4</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch4</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch5</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch5</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch5</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch5</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch5</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch5</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch6</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch6</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch6</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch6</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch6</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch6</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch7</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch7</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch7</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch7</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch7</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch7</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch8</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">prescaler_ch8</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch8</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch8</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch8</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch8</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch8</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch9</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch9</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch9</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch9</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch9</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch9</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch10</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch10</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch10</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch10</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch10</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch10</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch11</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch11</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch11</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch11</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch11</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch11</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch12</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch12</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch12</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch12</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch12</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch12</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch13</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch13</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch13</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch13</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch13</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch13</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch14</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch14</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch14</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch14</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch14</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch14</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch15</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch15</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch15</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch15</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch15</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch15</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch16</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">prescaler_ch16</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch16</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch16</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch16</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch16</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">simfilename_ch16</td>\n        <td class=\"parametervalue\"></td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_length</td>\n        <td class=\"parametervalue\">2</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_1</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_2</td>\n        <td class=\"parametervalue\">17</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_3</td>\n        <td class=\"parametervalue\">17</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_4</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_5</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_6</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_7</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_8</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_9</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_10</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_11</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_12</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_13</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_14</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_15</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_16</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_17</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_18</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_19</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_20</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_21</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_22</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_23</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_24</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_25</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_26</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_27</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_28</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_29</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_30</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_31</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_32</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_33</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_34</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_35</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_36</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_37</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_38</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_39</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_40</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_41</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_42</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_43</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_44</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_45</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_46</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_47</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_48</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_49</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_50</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_51</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_52</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_53</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_54</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_55</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_56</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_57</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_58</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_59</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_60</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_61</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_62</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_63</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_64</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">AUTO_DEVICE_SPEEDGRADE</td>\n        <td class=\"parametervalue\">8</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">deviceFamily</td>\n        <td class=\"parametervalue\">UNKNOWN</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">generateLegacySim</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n      </table>\n     </td>\n    </tr>\n   </table>&#160;&#160;\n   <table class=\"flowbox\">\n    <tr>\n     <td class=\"parametersbox\">\n      <h2>Software Assignments</h2>\n      <table>\n       <tr>\n        <td class=\"parametername\">CORE_VARIANT</td>\n        <td class=\"parametervalue\">3</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">DUAL_ADC_MODE</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">PRESCALER_CH16</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">PRESCALER_CH8</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">REFSEL</td>\n        <td class=\"parametervalue\">Internal VREF</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH0</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH1</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH10</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH11</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH12</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH13</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH14</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH15</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH16</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH2</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH3</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH4</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH5</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH6</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH7</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH8</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH9</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_TSD</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">VREF</td>\n        <td class=\"parametervalue\">3.3</td>\n       </tr>\n      </table>\n     </td>\n    </tr>\n   </table>\n  </div>\n  <table class=\"blueBar\">\n   <tr>\n    <td class=\"l\">generation took 0.00 seconds</td>\n    <td class=\"r\">rendering took 0.01 seconds</td>\n   </tr>\n  </table>\n </body>\n</html>\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc.ppf",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<pinplan\n variation_name=\"modular_adc_0\"\n megafunction_name=\"ALTERA_MODULAR_ADC\"\n intended_family=\"MAX 10\"\n specifies=\"all_ports\">\n <global>\n  <pin name=\"clock_clk\" direction=\"input\" scope=\"external\" />\n  <pin name=\"reset_sink_reset_n\" direction=\"input\" scope=\"external\" />\n  <pin name=\"adc_pll_clock_clk\" direction=\"input\" scope=\"external\" />\n  <pin name=\"adc_pll_locked_export\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_valid\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_channel[4..0]\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_startofpacket\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_endofpacket\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_ready\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_valid\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_channel[4..0]\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_data[11..0]\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_startofpacket\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_endofpacket\" direction=\"output\" scope=\"external\" />\n </global>\n</pinplan>\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc.spd",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<simPackage>\n <file\n   path=\"simulation/submodules/altera_modular_adc_control.v\"\n   type=\"VERILOG\"\n   library=\"control_internal\" />\n <file\n   path=\"simulation/submodules/altera_modular_adc_control_avrg_fifo.v\"\n   type=\"VERILOG\"\n   library=\"control_internal\" />\n <file\n   path=\"simulation/submodules/altera_modular_adc_control_fsm.v\"\n   type=\"VERILOG\"\n   library=\"control_internal\" />\n <file\n   path=\"simulation/submodules/chsel_code_converter_sw_to_hw.v\"\n   type=\"VERILOG\"\n   library=\"control_internal\" />\n <file\n   path=\"simulation/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"\n   type=\"VERILOG\"\n   library=\"control_internal\" />\n <file\n   path=\"simulation/submodules/fiftyfivenm_adcblock_top_wrapper.v\"\n   type=\"VERILOG\"\n   library=\"control_internal\" />\n <file\n   path=\"simulation/submodules/myadc_modular_adc_0.v\"\n   type=\"VERILOG\"\n   library=\"modular_adc_0\" />\n <file path=\"simulation/myadc.v\" type=\"VERILOG\" />\n <topLevel name=\"myadc\" />\n <deviceFamily name=\"max10\" />\n</simPackage>\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc.xml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<deploy\n date=\"2021.05.28.12:56:58\"\n outputDirectory=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/\">\n <perimeter>\n  <parameter\n     name=\"AUTO_GENERATION_ID\"\n     type=\"Integer\"\n     defaultValue=\"0\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_UNIQUE_ID\"\n     type=\"String\"\n     defaultValue=\"\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_DEVICE_FAMILY\"\n     type=\"String\"\n     defaultValue=\"MAX 10\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_DEVICE\"\n     type=\"String\"\n     defaultValue=\"10M08SAE144C8GES\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_DEVICE_SPEEDGRADE\"\n     type=\"String\"\n     defaultValue=\"8\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_ADC_PLL_CLOCK_CLOCK_RATE\"\n     type=\"Long\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_ADC_PLL_CLOCK_CLOCK_DOMAIN\"\n     type=\"Integer\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_ADC_PLL_CLOCK_RESET_DOMAIN\"\n     type=\"Integer\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_CLOCK_CLOCK_RATE\"\n     type=\"Long\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_CLOCK_CLOCK_DOMAIN\"\n     type=\"Integer\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_CLOCK_RESET_DOMAIN\"\n     type=\"Integer\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <interface name=\"adc_pll_clock\" kind=\"clock\" start=\"0\">\n   <property name=\"clockRate\" value=\"0\" />\n   <property name=\"externallyDriven\" value=\"false\" />\n   <property name=\"ptfSchematicName\" value=\"\" />\n   <port name=\"adc_pll_clock_clk\" direction=\"input\" role=\"clk\" width=\"1\" />\n  </interface>\n  <interface name=\"adc_pll_locked\" kind=\"conduit\" start=\"0\">\n   <property name=\"associatedClock\" value=\"\" />\n   <property name=\"associatedReset\" value=\"\" />\n   <port\n       name=\"adc_pll_locked_export\"\n       direction=\"input\"\n       role=\"export\"\n       width=\"1\" />\n  </interface>\n  <interface name=\"clock\" kind=\"clock\" start=\"0\">\n   <property name=\"clockRate\" value=\"0\" />\n   <property name=\"externallyDriven\" value=\"false\" />\n   <property name=\"ptfSchematicName\" value=\"\" />\n   <port name=\"clock_clk\" direction=\"input\" role=\"clk\" width=\"1\" />\n  </interface>\n  <interface name=\"command\" kind=\"avalon_streaming\" start=\"0\">\n   <property name=\"associatedClock\" value=\"clock\" />\n   <property name=\"associatedReset\" value=\"reset_sink\" />\n   <property name=\"beatsPerCycle\" value=\"1\" />\n   <property name=\"dataBitsPerSymbol\" value=\"8\" />\n   <property name=\"emptyWithinPacket\" value=\"false\" />\n   <property name=\"errorDescriptor\" value=\"\" />\n   <property name=\"firstSymbolInHighOrderBits\" value=\"true\" />\n   <property name=\"highOrderSymbolAtMSB\" value=\"false\" />\n   <property name=\"maxChannel\" value=\"31\" />\n   <property name=\"packetDescription\" value=\"\" />\n   <property name=\"readyLatency\" value=\"0\" />\n   <property name=\"symbolsPerBeat\" value=\"1\" />\n   <port name=\"command_valid\" direction=\"input\" role=\"valid\" width=\"1\" />\n   <port name=\"command_channel\" direction=\"input\" role=\"channel\" width=\"5\" />\n   <port\n       name=\"command_startofpacket\"\n       direction=\"input\"\n       role=\"startofpacket\"\n       width=\"1\" />\n   <port\n       name=\"command_endofpacket\"\n       direction=\"input\"\n       role=\"endofpacket\"\n       width=\"1\" />\n   <port name=\"command_ready\" direction=\"output\" role=\"ready\" width=\"1\" />\n  </interface>\n  <interface name=\"reset_sink\" kind=\"reset\" start=\"0\">\n   <property name=\"associatedClock\" value=\"clock\" />\n   <property name=\"synchronousEdges\" value=\"DEASSERT\" />\n   <port name=\"reset_sink_reset_n\" direction=\"input\" role=\"reset_n\" width=\"1\" />\n  </interface>\n  <interface name=\"response\" kind=\"avalon_streaming\" start=\"1\">\n   <property name=\"associatedClock\" value=\"clock\" />\n   <property name=\"associatedReset\" value=\"reset_sink\" />\n   <property name=\"beatsPerCycle\" value=\"1\" />\n   <property name=\"dataBitsPerSymbol\" value=\"12\" />\n   <property name=\"emptyWithinPacket\" value=\"false\" />\n   <property name=\"errorDescriptor\" value=\"\" />\n   <property name=\"firstSymbolInHighOrderBits\" value=\"true\" />\n   <property name=\"highOrderSymbolAtMSB\" value=\"false\" />\n   <property name=\"maxChannel\" value=\"31\" />\n   <property name=\"packetDescription\" value=\"\" />\n   <property name=\"readyLatency\" value=\"0\" />\n   <property name=\"symbolsPerBeat\" value=\"1\" />\n   <port name=\"response_valid\" direction=\"output\" role=\"valid\" width=\"1\" />\n   <port name=\"response_channel\" direction=\"output\" role=\"channel\" width=\"5\" />\n   <port name=\"response_data\" direction=\"output\" role=\"data\" width=\"12\" />\n   <port\n       name=\"response_startofpacket\"\n       direction=\"output\"\n       role=\"startofpacket\"\n       width=\"1\" />\n   <port\n       name=\"response_endofpacket\"\n       direction=\"output\"\n       role=\"endofpacket\"\n       width=\"1\" />\n  </interface>\n </perimeter>\n <entity\n   path=\"\"\n   parameterizationKey=\"myadc:1.0:AUTO_ADC_PLL_CLOCK_CLOCK_DOMAIN=-1,AUTO_ADC_PLL_CLOCK_CLOCK_RATE=-1,AUTO_ADC_PLL_CLOCK_RESET_DOMAIN=-1,AUTO_CLOCK_CLOCK_DOMAIN=-1,AUTO_CLOCK_CLOCK_RATE=-1,AUTO_CLOCK_RESET_DOMAIN=-1,AUTO_DEVICE=10M08SAE144C8GES,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=8,AUTO_GENERATION_ID=1622221014,AUTO_UNIQUE_ID=(altera_modular_adc:18.0:AUTO_DEVICE_SPEEDGRADE=8,CLOCK_FREQ=0,CORE_VAR=3,DEVICE_PART=10M08SAE144C8GES,ENABLE_DEBUG=0,FAMILY=MAX 10,MONITOR_COUNT_WIDTH=12,adc_count_on_device=1,analog_input_pin_mask=0,clkdiv=2,derived_clkdiv=2,device_adc_type=22,device_partname_fivechar_prefix=10M08,device_power_supply_type=1,en_thmax_ch0=false,en_thmax_ch1=false,en_thmax_ch10=false,en_thmax_ch11=false,en_thmax_ch12=false,en_thmax_ch13=false,en_thmax_ch14=false,en_thmax_ch15=false,en_thmax_ch16=false,en_thmax_ch2=false,en_thmax_ch3=false,en_thmax_ch4=false,en_thmax_ch5=false,en_thmax_ch6=false,en_thmax_ch7=false,en_thmax_ch8=false,en_thmax_ch9=false,en_thmin_ch0=false,en_thmin_ch1=false,en_thmin_ch10=false,en_thmin_ch11=false,en_thmin_ch12=false,en_thmin_ch13=false,en_thmin_ch14=false,en_thmin_ch15=false,en_thmin_ch16=false,en_thmin_ch2=false,en_thmin_ch3=false,en_thmin_ch4=false,en_thmin_ch5=false,en_thmin_ch6=false,en_thmin_ch7=false,en_thmin_ch8=false,en_thmin_ch9=false,en_tsd_max=false,en_tsd_min=false,enable_usr_sim=0,external_vref=2.5,hard_pwd=0,int_vref_nonvr=2.5,int_vref_vr=3.3,ip_is_for_which_adc=1,is_this_first_or_second_adc=1,max_adc_count_on_die=1,prescalar=0,prescaler_ch16=false,prescaler_ch8=false,reference_voltage=3.3,reference_voltage_sim=65536,refsel=1,sample_rate=0,seq_order_length=2,seq_order_slot_1=0,seq_order_slot_10=30,seq_order_slot_11=30,seq_order_slot_12=30,seq_order_slot_13=30,seq_order_slot_14=30,seq_order_slot_15=30,seq_order_slot_16=30,seq_order_slot_17=30,seq_order_slot_18=30,seq_order_slot_19=30,seq_order_slot_2=17,seq_order_slot_20=30,seq_order_slot_21=30,seq_order_slot_22=30,seq_order_slot_23=30,seq_order_slot_24=30,seq_order_slot_25=30,seq_order_slot_26=30,seq_order_slot_27=30,seq_order_slot_28=30,seq_order_slot_29=30,seq_order_slot_3=17,seq_order_slot_30=30,seq_order_slot_31=30,seq_order_slot_32=30,seq_order_slot_33=30,seq_order_slot_34=30,seq_order_slot_35=30,seq_order_slot_36=30,seq_order_slot_37=30,seq_order_slot_38=30,seq_order_slot_39=30,seq_order_slot_4=30,seq_order_slot_40=30,seq_order_slot_41=30,seq_order_slot_42=30,seq_order_slot_43=30,seq_order_slot_44=30,seq_order_slot_45=30,seq_order_slot_46=30,seq_order_slot_47=30,seq_order_slot_48=30,seq_order_slot_49=30,seq_order_slot_5=30,seq_order_slot_50=30,seq_order_slot_51=30,seq_order_slot_52=30,seq_order_slot_53=30,seq_order_slot_54=30,seq_order_slot_55=30,seq_order_slot_56=30,seq_order_slot_57=30,seq_order_slot_58=30,seq_order_slot_59=30,seq_order_slot_6=30,seq_order_slot_60=30,seq_order_slot_61=30,seq_order_slot_62=30,seq_order_slot_63=30,seq_order_slot_64=30,seq_order_slot_7=30,seq_order_slot_8=30,seq_order_slot_9=30,simfilename_ch0=,simfilename_ch1=,simfilename_ch10=,simfilename_ch11=,simfilename_ch12=,simfilename_ch13=,simfilename_ch14=,simfilename_ch15=,simfilename_ch16=,simfilename_ch2=,simfilename_ch3=,simfilename_ch4=,simfilename_ch5=,simfilename_ch6=,simfilename_ch7=,simfilename_ch8=,simfilename_ch9=,thmax_ch0=0.0,thmax_ch1=0.0,thmax_ch10=0.0,thmax_ch11=0.0,thmax_ch12=0.0,thmax_ch13=0.0,thmax_ch14=0.0,thmax_ch15=0.0,thmax_ch16=0.0,thmax_ch2=0.0,thmax_ch3=0.0,thmax_ch4=0.0,thmax_ch5=0.0,thmax_ch6=0.0,thmax_ch7=0.0,thmax_ch8=0.0,thmax_ch9=0.0,thmin_ch0=0.0,thmin_ch1=0.0,thmin_ch10=0.0,thmin_ch11=0.0,thmin_ch12=0.0,thmin_ch13=0.0,thmin_ch14=0.0,thmin_ch15=0.0,thmin_ch16=0.0,thmin_ch2=0.0,thmin_ch3=0.0,thmin_ch4=0.0,thmin_ch5=0.0,thmin_ch6=0.0,thmin_ch7=0.0,thmin_ch8=0.0,thmin_ch9=0.0,tsclkdiv=1,tsclksel=1,tsd_max=125,tsd_min=0,use_ch0=true,use_ch1=false,use_ch10=false,use_ch11=false,use_ch12=false,use_ch13=false,use_ch14=false,use_ch15=false,use_ch16=false,use_ch2=false,use_ch3=false,use_ch4=false,use_ch5=false,use_ch6=false,use_ch7=false,use_ch8=false,use_ch9=false,use_tsd=true(altera_clock_bridge:18.0:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=0,NUM_CLOCK_OUTPUTS=1)(altera_reset_bridge:18.0:ACTIVE_LOW_RESET=1,AUTO_CLK_CLOCK_RATE=0,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(altera_modular_adc_control:18.0:analog_input_pin_mask=65536,clkdiv=2,device_partname_fivechar_prefix=10M08,dual_adc_mode=false,enable_usr_sim=0,hard_pwd=0,is_this_first_or_second_adc=1,prescalar=0,reference_voltage_sim=65536,refsel=1,simfilename_ch0=,simfilename_ch1=,simfilename_ch10=,simfilename_ch11=,simfilename_ch12=,simfilename_ch13=,simfilename_ch14=,simfilename_ch15=,simfilename_ch16=,simfilename_ch2=,simfilename_ch3=,simfilename_ch4=,simfilename_ch5=,simfilename_ch6=,simfilename_ch7=,simfilename_ch8=,simfilename_ch9=,tsclkdiv=1,tsclksel=1)(clock:18.0:)(clock:18.0:)(reset:18.0:))\"\n   instancePathKey=\"myadc\"\n   kind=\"myadc\"\n   version=\"1.0\"\n   name=\"myadc\">\n  <parameter name=\"AUTO_ADC_PLL_CLOCK_CLOCK_DOMAIN\" value=\"-1\" />\n  <parameter name=\"AUTO_CLOCK_CLOCK_RATE\" value=\"-1\" />\n  <parameter name=\"AUTO_CLOCK_CLOCK_DOMAIN\" value=\"-1\" />\n  <parameter name=\"AUTO_CLOCK_RESET_DOMAIN\" value=\"-1\" />\n  <parameter name=\"AUTO_GENERATION_ID\" value=\"1622221014\" />\n  <parameter name=\"AUTO_DEVICE\" value=\"10M08SAE144C8GES\" />\n  <parameter name=\"AUTO_DEVICE_FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"AUTO_ADC_PLL_CLOCK_RESET_DOMAIN\" value=\"-1\" />\n  <parameter name=\"AUTO_ADC_PLL_CLOCK_CLOCK_RATE\" value=\"-1\" />\n  <parameter name=\"AUTO_UNIQUE_ID\" value=\"\" />\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\" value=\"8\" />\n  <generatedFiles>\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/myadc.v\"\n       type=\"VERILOG\" />\n  </generatedFiles>\n  <childGeneratedFiles>\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/myadc_modular_adc_0.v\"\n       type=\"VERILOG\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control.v\"\n       type=\"VERILOG\"\n       attributes=\"TOP_LEVEL_FILE\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control_avrg_fifo.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control_fsm.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/chsel_code_converter_sw_to_hw.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/fiftyfivenm_adcblock_top_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control.sdc\"\n       type=\"SDC\"\n       attributes=\"\" />\n  </childGeneratedFiles>\n  <sourceFiles>\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc.qsys\" />\n  </sourceFiles>\n  <childSourceFiles>\n   <file\n       path=\"C:/intelfpga_lite/18.0/ip/altera/altera_modular_adc/top/altera_modular_adc_hw.tcl\" />\n   <file\n       path=\"C:/intelfpga_lite/18.0/ip/altera/altera_modular_adc/control/altera_modular_adc_control_hw.tcl\" />\n  </childSourceFiles>\n  <messages>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:myadc \"myadc\"</message>\n   <message level=\"Progress\" culprit=\"min\"></message>\n   <message level=\"Progress\" culprit=\"max\"></message>\n   <message level=\"Progress\" culprit=\"current\"></message>\n   <message level=\"Debug\">Transform: CustomInstructionTransform</message>\n   <message level=\"Debug\">No custom instruction connections, skipping transform </message>\n   <message level=\"Debug\" culprit=\"merlin_custom_instruction_transform\"><![CDATA[After transform: <b>1</b> modules, <b>0</b> connections]]></message>\n   <message level=\"Debug\">Transform: MMTransform</message>\n   <message level=\"Debug\">Transform: InterruptMapperTransform</message>\n   <message level=\"Debug\">Transform: InterruptSyncTransform</message>\n   <message level=\"Debug\">Transform: InterruptFanoutTransform</message>\n   <message level=\"Debug\">Transform: AvalonStreamingTransform</message>\n   <message level=\"Debug\">Transform: ResetAdaptation</message>\n   <message level=\"Debug\" culprit=\"myadc\"><![CDATA[\"<b>myadc</b>\" reuses <b>altera_modular_adc</b> \"<b>submodules/myadc_modular_adc_0</b>\"]]></message>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc \"submodules/myadc_modular_adc_0\"</message>\n   <message level=\"Progress\" culprit=\"min\"></message>\n   <message level=\"Progress\" culprit=\"max\"></message>\n   <message level=\"Progress\" culprit=\"current\"></message>\n   <message level=\"Debug\">Transform: CustomInstructionTransform</message>\n   <message level=\"Debug\">No custom instruction connections, skipping transform </message>\n   <message level=\"Debug\" culprit=\"merlin_custom_instruction_transform\"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>\n   <message level=\"Debug\">Transform: MMTransform</message>\n   <message level=\"Debug\">Transform: InterruptMapperTransform</message>\n   <message level=\"Debug\">Transform: InterruptSyncTransform</message>\n   <message level=\"Debug\">Transform: InterruptFanoutTransform</message>\n   <message level=\"Debug\">Transform: AvalonStreamingTransform</message>\n   <message level=\"Debug\">Transform: ResetAdaptation</message>\n   <message level=\"Debug\" culprit=\"modular_adc_0\"><![CDATA[\"<b>modular_adc_0</b>\" reuses <b>altera_modular_adc_control</b> \"<b>submodules/altera_modular_adc_control</b>\"]]></message>\n   <message level=\"Info\" culprit=\"modular_adc_0\"><![CDATA[\"<b>myadc</b>\" instantiated <b>altera_modular_adc</b> \"<b>modular_adc_0</b>\"]]></message>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc_control \"submodules/altera_modular_adc_control\"</message>\n   <message level=\"Info\" culprit=\"control_internal\"><![CDATA[\"<b>modular_adc_0</b>\" instantiated <b>altera_modular_adc_control</b> \"<b>control_internal</b>\"]]></message>\n  </messages>\n </entity>\n <entity\n   path=\"submodules/\"\n   parameterizationKey=\"altera_modular_adc:18.0:AUTO_DEVICE_SPEEDGRADE=8,CLOCK_FREQ=0,CORE_VAR=3,DEVICE_PART=10M08SAE144C8GES,ENABLE_DEBUG=0,FAMILY=MAX 10,MONITOR_COUNT_WIDTH=12,adc_count_on_device=1,analog_input_pin_mask=0,clkdiv=2,derived_clkdiv=2,device_adc_type=22,device_partname_fivechar_prefix=10M08,device_power_supply_type=1,en_thmax_ch0=false,en_thmax_ch1=false,en_thmax_ch10=false,en_thmax_ch11=false,en_thmax_ch12=false,en_thmax_ch13=false,en_thmax_ch14=false,en_thmax_ch15=false,en_thmax_ch16=false,en_thmax_ch2=false,en_thmax_ch3=false,en_thmax_ch4=false,en_thmax_ch5=false,en_thmax_ch6=false,en_thmax_ch7=false,en_thmax_ch8=false,en_thmax_ch9=false,en_thmin_ch0=false,en_thmin_ch1=false,en_thmin_ch10=false,en_thmin_ch11=false,en_thmin_ch12=false,en_thmin_ch13=false,en_thmin_ch14=false,en_thmin_ch15=false,en_thmin_ch16=false,en_thmin_ch2=false,en_thmin_ch3=false,en_thmin_ch4=false,en_thmin_ch5=false,en_thmin_ch6=false,en_thmin_ch7=false,en_thmin_ch8=false,en_thmin_ch9=false,en_tsd_max=false,en_tsd_min=false,enable_usr_sim=0,external_vref=2.5,hard_pwd=0,int_vref_nonvr=2.5,int_vref_vr=3.3,ip_is_for_which_adc=1,is_this_first_or_second_adc=1,max_adc_count_on_die=1,prescalar=0,prescaler_ch16=false,prescaler_ch8=false,reference_voltage=3.3,reference_voltage_sim=65536,refsel=1,sample_rate=0,seq_order_length=2,seq_order_slot_1=0,seq_order_slot_10=30,seq_order_slot_11=30,seq_order_slot_12=30,seq_order_slot_13=30,seq_order_slot_14=30,seq_order_slot_15=30,seq_order_slot_16=30,seq_order_slot_17=30,seq_order_slot_18=30,seq_order_slot_19=30,seq_order_slot_2=17,seq_order_slot_20=30,seq_order_slot_21=30,seq_order_slot_22=30,seq_order_slot_23=30,seq_order_slot_24=30,seq_order_slot_25=30,seq_order_slot_26=30,seq_order_slot_27=30,seq_order_slot_28=30,seq_order_slot_29=30,seq_order_slot_3=17,seq_order_slot_30=30,seq_order_slot_31=30,seq_order_slot_32=30,seq_order_slot_33=30,seq_order_slot_34=30,seq_order_slot_35=30,seq_order_slot_36=30,seq_order_slot_37=30,seq_order_slot_38=30,seq_order_slot_39=30,seq_order_slot_4=30,seq_order_slot_40=30,seq_order_slot_41=30,seq_order_slot_42=30,seq_order_slot_43=30,seq_order_slot_44=30,seq_order_slot_45=30,seq_order_slot_46=30,seq_order_slot_47=30,seq_order_slot_48=30,seq_order_slot_49=30,seq_order_slot_5=30,seq_order_slot_50=30,seq_order_slot_51=30,seq_order_slot_52=30,seq_order_slot_53=30,seq_order_slot_54=30,seq_order_slot_55=30,seq_order_slot_56=30,seq_order_slot_57=30,seq_order_slot_58=30,seq_order_slot_59=30,seq_order_slot_6=30,seq_order_slot_60=30,seq_order_slot_61=30,seq_order_slot_62=30,seq_order_slot_63=30,seq_order_slot_64=30,seq_order_slot_7=30,seq_order_slot_8=30,seq_order_slot_9=30,simfilename_ch0=,simfilename_ch1=,simfilename_ch10=,simfilename_ch11=,simfilename_ch12=,simfilename_ch13=,simfilename_ch14=,simfilename_ch15=,simfilename_ch16=,simfilename_ch2=,simfilename_ch3=,simfilename_ch4=,simfilename_ch5=,simfilename_ch6=,simfilename_ch7=,simfilename_ch8=,simfilename_ch9=,thmax_ch0=0.0,thmax_ch1=0.0,thmax_ch10=0.0,thmax_ch11=0.0,thmax_ch12=0.0,thmax_ch13=0.0,thmax_ch14=0.0,thmax_ch15=0.0,thmax_ch16=0.0,thmax_ch2=0.0,thmax_ch3=0.0,thmax_ch4=0.0,thmax_ch5=0.0,thmax_ch6=0.0,thmax_ch7=0.0,thmax_ch8=0.0,thmax_ch9=0.0,thmin_ch0=0.0,thmin_ch1=0.0,thmin_ch10=0.0,thmin_ch11=0.0,thmin_ch12=0.0,thmin_ch13=0.0,thmin_ch14=0.0,thmin_ch15=0.0,thmin_ch16=0.0,thmin_ch2=0.0,thmin_ch3=0.0,thmin_ch4=0.0,thmin_ch5=0.0,thmin_ch6=0.0,thmin_ch7=0.0,thmin_ch8=0.0,thmin_ch9=0.0,tsclkdiv=1,tsclksel=1,tsd_max=125,tsd_min=0,use_ch0=true,use_ch1=false,use_ch10=false,use_ch11=false,use_ch12=false,use_ch13=false,use_ch14=false,use_ch15=false,use_ch16=false,use_ch2=false,use_ch3=false,use_ch4=false,use_ch5=false,use_ch6=false,use_ch7=false,use_ch8=false,use_ch9=false,use_tsd=true(altera_clock_bridge:18.0:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=0,NUM_CLOCK_OUTPUTS=1)(altera_reset_bridge:18.0:ACTIVE_LOW_RESET=1,AUTO_CLK_CLOCK_RATE=0,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(altera_modular_adc_control:18.0:analog_input_pin_mask=65536,clkdiv=2,device_partname_fivechar_prefix=10M08,dual_adc_mode=false,enable_usr_sim=0,hard_pwd=0,is_this_first_or_second_adc=1,prescalar=0,reference_voltage_sim=65536,refsel=1,simfilename_ch0=,simfilename_ch1=,simfilename_ch10=,simfilename_ch11=,simfilename_ch12=,simfilename_ch13=,simfilename_ch14=,simfilename_ch15=,simfilename_ch16=,simfilename_ch2=,simfilename_ch3=,simfilename_ch4=,simfilename_ch5=,simfilename_ch6=,simfilename_ch7=,simfilename_ch8=,simfilename_ch9=,tsclkdiv=1,tsclksel=1)(clock:18.0:)(clock:18.0:)(reset:18.0:)\"\n   instancePathKey=\"myadc:.:modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"18.0\"\n   name=\"myadc_modular_adc_0\">\n  <parameter name=\"derived_clkdiv\" value=\"2\" />\n  <parameter name=\"thmin_ch10\" value=\"0.0\" />\n  <parameter name=\"thmin_ch12\" value=\"0.0\" />\n  <parameter name=\"thmin_ch11\" value=\"0.0\" />\n  <parameter name=\"thmin_ch14\" value=\"0.0\" />\n  <parameter name=\"thmin_ch13\" value=\"0.0\" />\n  <parameter name=\"thmin_ch16\" value=\"0.0\" />\n  <parameter name=\"thmin_ch15\" value=\"0.0\" />\n  <parameter name=\"use_ch14\" value=\"false\" />\n  <parameter name=\"ip_is_for_which_adc\" value=\"1\" />\n  <parameter name=\"use_ch15\" value=\"false\" />\n  <parameter name=\"use_ch16\" value=\"false\" />\n  <parameter name=\"DEVICE_PART\" value=\"10M08SAE144C8GES\" />\n  <parameter name=\"adc_count_on_device\" value=\"1\" />\n  <parameter name=\"seq_order_length\" value=\"2\" />\n  <parameter name=\"use_tsd\" value=\"true\" />\n  <parameter name=\"FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"en_tsd_min\" value=\"false\" />\n  <parameter name=\"use_ch0\" value=\"true\" />\n  <parameter name=\"device_partname_fivechar_prefix\" value=\"10M08\" />\n  <parameter name=\"use_ch3\" value=\"false\" />\n  <parameter name=\"use_ch4\" value=\"false\" />\n  <parameter name=\"CORE_VAR\" value=\"3\" />\n  <parameter name=\"use_ch1\" value=\"false\" />\n  <parameter name=\"en_thmin_ch15\" value=\"false\" />\n  <parameter name=\"use_ch2\" value=\"false\" />\n  <parameter name=\"en_thmin_ch16\" value=\"false\" />\n  <parameter name=\"use_ch7\" value=\"false\" />\n  <parameter name=\"use_ch8\" value=\"false\" />\n  <parameter name=\"use_ch5\" value=\"false\" />\n  <parameter name=\"use_ch6\" value=\"false\" />\n  <parameter name=\"MONITOR_COUNT_WIDTH\" value=\"12\" />\n  <parameter name=\"use_ch9\" value=\"false\" />\n  <parameter name=\"refsel\" value=\"1\" />\n  <parameter name=\"prescaler_ch8\" value=\"false\" />\n  <parameter name=\"prescalar\" value=\"0\" />\n  <parameter name=\"device_adc_type\" value=\"22\" />\n  <parameter name=\"reference_voltage_sim\" value=\"65536\" />\n  <parameter name=\"en_thmin_ch13\" value=\"false\" />\n  <parameter name=\"en_thmin_ch14\" value=\"false\" />\n  <parameter name=\"en_thmin_ch11\" value=\"false\" />\n  <parameter name=\"en_thmin_ch12\" value=\"false\" />\n  <parameter name=\"en_thmin_ch10\" value=\"false\" />\n  <parameter name=\"thmax_ch1\" value=\"0.0\" />\n  <parameter name=\"thmax_ch0\" value=\"0.0\" />\n  <parameter name=\"thmax_ch3\" value=\"0.0\" />\n  <parameter name=\"thmax_ch2\" value=\"0.0\" />\n  <parameter name=\"int_vref_vr\" value=\"3.3\" />\n  <parameter name=\"tsd_min\" value=\"0\" />\n  <parameter name=\"thmax_ch16\" value=\"0.0\" />\n  <parameter name=\"thmax_ch15\" value=\"0.0\" />\n  <parameter name=\"thmax_ch14\" value=\"0.0\" />\n  <parameter name=\"thmax_ch13\" value=\"0.0\" />\n  <parameter name=\"thmax_ch12\" value=\"0.0\" />\n  <parameter name=\"thmax_ch11\" value=\"0.0\" />\n  <parameter name=\"thmax_ch10\" value=\"0.0\" />\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\" value=\"8\" />\n  <parameter name=\"thmax_ch5\" value=\"0.0\" />\n  <parameter name=\"thmax_ch4\" value=\"0.0\" />\n  <parameter name=\"thmax_ch7\" value=\"0.0\" />\n  <parameter name=\"thmax_ch6\" value=\"0.0\" />\n  <parameter name=\"thmax_ch9\" value=\"0.0\" />\n  <parameter name=\"simfilename_ch15\" value=\"\" />\n  <parameter name=\"thmax_ch8\" value=\"0.0\" />\n  <parameter name=\"simfilename_ch16\" value=\"\" />\n  <parameter name=\"simfilename_ch13\" value=\"\" />\n  <parameter name=\"simfilename_ch14\" value=\"\" />\n  <parameter name=\"simfilename_ch11\" value=\"\" />\n  <parameter name=\"simfilename_ch12\" value=\"\" />\n  <parameter name=\"analog_input_pin_mask\" value=\"0\" />\n  <parameter name=\"simfilename_ch10\" value=\"\" />\n  <parameter name=\"seq_order_slot_23\" value=\"30\" />\n  <parameter name=\"seq_order_slot_22\" value=\"30\" />\n  <parameter name=\"seq_order_slot_25\" value=\"30\" />\n  <parameter name=\"seq_order_slot_24\" value=\"30\" />\n  <parameter name=\"hard_pwd\" value=\"0\" />\n  <parameter name=\"seq_order_slot_27\" value=\"30\" />\n  <parameter name=\"seq_order_slot_26\" value=\"30\" />\n  <parameter name=\"device_power_supply_type\" value=\"1\" />\n  <parameter name=\"seq_order_slot_29\" value=\"30\" />\n  <parameter name=\"seq_order_slot_28\" value=\"30\" />\n  <parameter name=\"simfilename_ch6\" value=\"\" />\n  <parameter name=\"simfilename_ch7\" value=\"\" />\n  <parameter name=\"simfilename_ch8\" value=\"\" />\n  <parameter name=\"simfilename_ch9\" value=\"\" />\n  <parameter name=\"simfilename_ch2\" value=\"\" />\n  <parameter name=\"simfilename_ch3\" value=\"\" />\n  <parameter name=\"simfilename_ch4\" value=\"\" />\n  <parameter name=\"reference_voltage\" value=\"3.3\" />\n  <parameter name=\"simfilename_ch5\" value=\"\" />\n  <parameter name=\"simfilename_ch0\" value=\"\" />\n  <parameter name=\"simfilename_ch1\" value=\"\" />\n  <parameter name=\"seq_order_slot_21\" value=\"30\" />\n  <parameter name=\"seq_order_slot_20\" value=\"30\" />\n  <parameter name=\"seq_order_slot_34\" value=\"30\" />\n  <parameter name=\"seq_order_slot_33\" value=\"30\" />\n  <parameter name=\"seq_order_slot_36\" value=\"30\" />\n  <parameter name=\"seq_order_slot_35\" value=\"30\" />\n  <parameter name=\"seq_order_slot_38\" value=\"30\" />\n  <parameter name=\"seq_order_slot_37\" value=\"30\" />\n  <parameter name=\"seq_order_slot_39\" value=\"30\" />\n  <parameter name=\"max_adc_count_on_die\" value=\"1\" />\n  <parameter name=\"clkdiv\" value=\"2\" />\n  <parameter name=\"seq_order_slot_30\" value=\"30\" />\n  <parameter name=\"seq_order_slot_32\" value=\"30\" />\n  <parameter name=\"seq_order_slot_31\" value=\"30\" />\n  <parameter name=\"en_thmax_ch13\" value=\"false\" />\n  <parameter name=\"en_thmax_ch14\" value=\"false\" />\n  <parameter name=\"en_thmax_ch15\" value=\"false\" />\n  <parameter name=\"en_thmax_ch16\" value=\"false\" />\n  <parameter name=\"en_thmax_ch10\" value=\"false\" />\n  <parameter name=\"en_thmax_ch11\" value=\"false\" />\n  <parameter name=\"en_thmax_ch12\" value=\"false\" />\n  <parameter name=\"en_thmax_ch7\" value=\"false\" />\n  <parameter name=\"seq_order_slot_4\" value=\"30\" />\n  <parameter name=\"seq_order_slot_12\" value=\"30\" />\n  <parameter name=\"en_thmax_ch6\" value=\"false\" />\n  <parameter name=\"seq_order_slot_5\" value=\"30\" />\n  <parameter name=\"seq_order_slot_11\" value=\"30\" />\n  <parameter name=\"en_thmax_ch9\" value=\"false\" />\n  <parameter name=\"seq_order_slot_6\" value=\"30\" />\n  <parameter name=\"seq_order_slot_14\" value=\"30\" />\n  <parameter name=\"en_thmax_ch8\" value=\"false\" />\n  <parameter name=\"seq_order_slot_7\" value=\"30\" />\n  <parameter name=\"seq_order_slot_13\" value=\"30\" />\n  <parameter name=\"en_thmax_ch3\" value=\"false\" />\n  <parameter name=\"seq_order_slot_16\" value=\"30\" />\n  <parameter name=\"en_thmax_ch2\" value=\"false\" />\n  <parameter name=\"seq_order_slot_1\" value=\"0\" />\n  <parameter name=\"seq_order_slot_15\" value=\"30\" />\n  <parameter name=\"en_thmax_ch5\" value=\"false\" />\n  <parameter name=\"seq_order_slot_2\" value=\"17\" />\n  <parameter name=\"seq_order_slot_18\" value=\"30\" />\n  <parameter name=\"en_thmax_ch4\" value=\"false\" />\n  <parameter name=\"seq_order_slot_3\" value=\"17\" />\n  <parameter name=\"seq_order_slot_17\" value=\"30\" />\n  <parameter name=\"seq_order_slot_19\" value=\"30\" />\n  <parameter name=\"en_thmax_ch1\" value=\"false\" />\n  <parameter name=\"en_thmax_ch0\" value=\"false\" />\n  <parameter name=\"seq_order_slot_8\" value=\"30\" />\n  <parameter name=\"seq_order_slot_9\" value=\"30\" />\n  <parameter name=\"en_thmin_ch3\" value=\"false\" />\n  <parameter name=\"prescaler_ch16\" value=\"false\" />\n  <parameter name=\"en_thmin_ch2\" value=\"false\" />\n  <parameter name=\"en_thmin_ch1\" value=\"false\" />\n  <parameter name=\"en_thmin_ch0\" value=\"false\" />\n  <parameter name=\"sample_rate\" value=\"0\" />\n  <parameter name=\"en_thmin_ch9\" value=\"false\" />\n  <parameter name=\"en_tsd_max\" value=\"false\" />\n  <parameter name=\"en_thmin_ch8\" value=\"false\" />\n  <parameter name=\"en_thmin_ch7\" value=\"false\" />\n  <parameter name=\"en_thmin_ch6\" value=\"false\" />\n  <parameter name=\"en_thmin_ch5\" value=\"false\" />\n  <parameter name=\"seq_order_slot_10\" value=\"30\" />\n  <parameter name=\"en_thmin_ch4\" value=\"false\" />\n  <parameter name=\"external_vref\" value=\"2.5\" />\n  <parameter name=\"seq_order_slot_61\" value=\"30\" />\n  <parameter name=\"seq_order_slot_60\" value=\"30\" />\n  <parameter name=\"seq_order_slot_63\" value=\"30\" />\n  <parameter name=\"seq_order_slot_62\" value=\"30\" />\n  <parameter name=\"seq_order_slot_64\" value=\"30\" />\n  <parameter name=\"CLOCK_FREQ\" value=\"0\" />\n  <parameter name=\"tsclksel\" value=\"1\" />\n  <parameter name=\"is_this_first_or_second_adc\" value=\"1\" />\n  <parameter name=\"seq_order_slot_45\" value=\"30\" />\n  <parameter name=\"seq_order_slot_44\" value=\"30\" />\n  <parameter name=\"seq_order_slot_47\" value=\"30\" />\n  <parameter name=\"seq_order_slot_46\" value=\"30\" />\n  <parameter name=\"seq_order_slot_49\" value=\"30\" />\n  <parameter name=\"seq_order_slot_48\" value=\"30\" />\n  <parameter name=\"ENABLE_DEBUG\" value=\"0\" />\n  <parameter name=\"int_vref_nonvr\" value=\"2.5\" />\n  <parameter name=\"tsd_max\" value=\"125\" />\n  <parameter name=\"seq_order_slot_41\" value=\"30\" />\n  <parameter name=\"seq_order_slot_40\" value=\"30\" />\n  <parameter name=\"seq_order_slot_43\" value=\"30\" />\n  <parameter name=\"seq_order_slot_42\" value=\"30\" />\n  <parameter name=\"thmin_ch1\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_56\" value=\"30\" />\n  <parameter name=\"thmin_ch0\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_55\" value=\"30\" />\n  <parameter name=\"seq_order_slot_58\" value=\"30\" />\n  <parameter name=\"seq_order_slot_57\" value=\"30\" />\n  <parameter name=\"thmin_ch5\" value=\"0.0\" />\n  <parameter name=\"use_ch10\" value=\"false\" />\n  <parameter name=\"thmin_ch4\" value=\"0.0\" />\n  <parameter name=\"use_ch11\" value=\"false\" />\n  <parameter name=\"seq_order_slot_59\" value=\"30\" />\n  <parameter name=\"tsclkdiv\" value=\"1\" />\n  <parameter name=\"thmin_ch3\" value=\"0.0\" />\n  <parameter name=\"use_ch12\" value=\"false\" />\n  <parameter name=\"thmin_ch2\" value=\"0.0\" />\n  <parameter name=\"use_ch13\" value=\"false\" />\n  <parameter name=\"enable_usr_sim\" value=\"0\" />\n  <parameter name=\"thmin_ch9\" value=\"0.0\" />\n  <parameter name=\"thmin_ch8\" value=\"0.0\" />\n  <parameter name=\"thmin_ch7\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_50\" value=\"30\" />\n  <parameter name=\"thmin_ch6\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_52\" value=\"30\" />\n  <parameter name=\"seq_order_slot_51\" value=\"30\" />\n  <parameter name=\"seq_order_slot_54\" value=\"30\" />\n  <parameter name=\"seq_order_slot_53\" value=\"30\" />\n  <generatedFiles>\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/myadc_modular_adc_0.v\"\n       type=\"VERILOG\" />\n  </generatedFiles>\n  <childGeneratedFiles>\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control.v\"\n       type=\"VERILOG\"\n       attributes=\"TOP_LEVEL_FILE\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control_avrg_fifo.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control_fsm.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/chsel_code_converter_sw_to_hw.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/fiftyfivenm_adcblock_top_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control.sdc\"\n       type=\"SDC\"\n       attributes=\"\" />\n  </childGeneratedFiles>\n  <sourceFiles>\n   <file\n       path=\"C:/intelfpga_lite/18.0/ip/altera/altera_modular_adc/top/altera_modular_adc_hw.tcl\" />\n  </sourceFiles>\n  <childSourceFiles>\n   <file\n       path=\"C:/intelfpga_lite/18.0/ip/altera/altera_modular_adc/control/altera_modular_adc_control_hw.tcl\" />\n  </childSourceFiles>\n  <instantiator instantiator=\"myadc\" as=\"modular_adc_0\" />\n  <messages>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc \"submodules/myadc_modular_adc_0\"</message>\n   <message level=\"Progress\" culprit=\"min\"></message>\n   <message level=\"Progress\" culprit=\"max\"></message>\n   <message level=\"Progress\" culprit=\"current\"></message>\n   <message level=\"Debug\">Transform: CustomInstructionTransform</message>\n   <message level=\"Debug\">No custom instruction connections, skipping transform </message>\n   <message level=\"Debug\" culprit=\"merlin_custom_instruction_transform\"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>\n   <message level=\"Debug\">Transform: MMTransform</message>\n   <message level=\"Debug\">Transform: InterruptMapperTransform</message>\n   <message level=\"Debug\">Transform: InterruptSyncTransform</message>\n   <message level=\"Debug\">Transform: InterruptFanoutTransform</message>\n   <message level=\"Debug\">Transform: AvalonStreamingTransform</message>\n   <message level=\"Debug\">Transform: ResetAdaptation</message>\n   <message level=\"Debug\" culprit=\"modular_adc_0\"><![CDATA[\"<b>modular_adc_0</b>\" reuses <b>altera_modular_adc_control</b> \"<b>submodules/altera_modular_adc_control</b>\"]]></message>\n   <message level=\"Info\" culprit=\"modular_adc_0\"><![CDATA[\"<b>myadc</b>\" instantiated <b>altera_modular_adc</b> \"<b>modular_adc_0</b>\"]]></message>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc_control \"submodules/altera_modular_adc_control\"</message>\n   <message level=\"Info\" culprit=\"control_internal\"><![CDATA[\"<b>modular_adc_0</b>\" instantiated <b>altera_modular_adc_control</b> \"<b>control_internal</b>\"]]></message>\n  </messages>\n </entity>\n <entity\n   path=\"submodules/\"\n   parameterizationKey=\"altera_modular_adc_control:18.0:analog_input_pin_mask=65536,clkdiv=2,device_partname_fivechar_prefix=10M08,dual_adc_mode=false,enable_usr_sim=0,hard_pwd=0,is_this_first_or_second_adc=1,prescalar=0,reference_voltage_sim=65536,refsel=1,simfilename_ch0=,simfilename_ch1=,simfilename_ch10=,simfilename_ch11=,simfilename_ch12=,simfilename_ch13=,simfilename_ch14=,simfilename_ch15=,simfilename_ch16=,simfilename_ch2=,simfilename_ch3=,simfilename_ch4=,simfilename_ch5=,simfilename_ch6=,simfilename_ch7=,simfilename_ch8=,simfilename_ch9=,tsclkdiv=1,tsclksel=1\"\n   instancePathKey=\"myadc:.:modular_adc_0:.:control_internal\"\n   kind=\"altera_modular_adc_control\"\n   version=\"18.0\"\n   name=\"altera_modular_adc_control\">\n  <parameter name=\"is_this_first_or_second_adc\" value=\"1\" />\n  <parameter name=\"device_partname_fivechar_prefix\" value=\"10M08\" />\n  <parameter name=\"dual_adc_mode\" value=\"false\" />\n  <parameter name=\"hard_pwd\" value=\"0\" />\n  <parameter name=\"simfilename_ch6\" value=\"\" />\n  <parameter name=\"simfilename_ch7\" value=\"\" />\n  <parameter name=\"simfilename_ch8\" value=\"\" />\n  <parameter name=\"simfilename_ch9\" value=\"\" />\n  <parameter name=\"simfilename_ch2\" value=\"\" />\n  <parameter name=\"simfilename_ch3\" value=\"\" />\n  <parameter name=\"simfilename_ch4\" value=\"\" />\n  <parameter name=\"simfilename_ch5\" value=\"\" />\n  <parameter name=\"simfilename_ch0\" value=\"\" />\n  <parameter name=\"simfilename_ch1\" value=\"\" />\n  <parameter name=\"refsel\" value=\"1\" />\n  <parameter name=\"prescalar\" value=\"0\" />\n  <parameter name=\"tsclkdiv\" value=\"1\" />\n  <parameter name=\"reference_voltage_sim\" value=\"65536\" />\n  <parameter name=\"enable_usr_sim\" value=\"0\" />\n  <parameter name=\"simfilename_ch15\" value=\"\" />\n  <parameter name=\"simfilename_ch16\" value=\"\" />\n  <parameter name=\"simfilename_ch13\" value=\"\" />\n  <parameter name=\"simfilename_ch14\" value=\"\" />\n  <parameter name=\"simfilename_ch11\" value=\"\" />\n  <parameter name=\"simfilename_ch12\" value=\"\" />\n  <parameter name=\"analog_input_pin_mask\" value=\"65536\" />\n  <parameter name=\"simfilename_ch10\" value=\"\" />\n  <parameter name=\"clkdiv\" value=\"2\" />\n  <parameter name=\"tsclksel\" value=\"1\" />\n  <generatedFiles>\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control.v\"\n       type=\"VERILOG\"\n       attributes=\"TOP_LEVEL_FILE\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control_avrg_fifo.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control_fsm.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/chsel_code_converter_sw_to_hw.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/fiftyfivenm_adcblock_top_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control.sdc\"\n       type=\"SDC\"\n       attributes=\"\" />\n  </generatedFiles>\n  <childGeneratedFiles/>\n  <sourceFiles>\n   <file\n       path=\"C:/intelfpga_lite/18.0/ip/altera/altera_modular_adc/control/altera_modular_adc_control_hw.tcl\" />\n  </sourceFiles>\n  <childSourceFiles/>\n  <instantiator instantiator=\"myadc_modular_adc_0\" as=\"control_internal\" />\n  <messages>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc_control \"submodules/altera_modular_adc_control\"</message>\n   <message level=\"Info\" culprit=\"control_internal\"><![CDATA[\"<b>modular_adc_0</b>\" instantiated <b>altera_modular_adc_control</b> \"<b>control_internal</b>\"]]></message>\n  </messages>\n </entity>\n</deploy>\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc_bb.v",
    "content": "\nmodule myadc (\n\tadc_pll_clock_clk,\n\tadc_pll_locked_export,\n\tclock_clk,\n\tcommand_valid,\n\tcommand_channel,\n\tcommand_startofpacket,\n\tcommand_endofpacket,\n\tcommand_ready,\n\treset_sink_reset_n,\n\tresponse_valid,\n\tresponse_channel,\n\tresponse_data,\n\tresponse_startofpacket,\n\tresponse_endofpacket);\t\n\n\tinput\t\tadc_pll_clock_clk;\n\tinput\t\tadc_pll_locked_export;\n\tinput\t\tclock_clk;\n\tinput\t\tcommand_valid;\n\tinput\t[4:0]\tcommand_channel;\n\tinput\t\tcommand_startofpacket;\n\tinput\t\tcommand_endofpacket;\n\toutput\t\tcommand_ready;\n\tinput\t\treset_sink_reset_n;\n\toutput\t\tresponse_valid;\n\toutput\t[4:0]\tresponse_channel;\n\toutput\t[11:0]\tresponse_data;\n\toutput\t\tresponse_startofpacket;\n\toutput\t\tresponse_endofpacket;\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc_generation.rpt",
    "content": "Info: Starting: Create simulation model\nInfo: qsys-generate C:\\Users\\haas\\Downloads\\Haasoscope\\max10_adc_firmware\\myadc.qsys --simulation=VERILOG --allow-mixed-language-simulation --output-directory=C:\\Users\\haas\\Downloads\\Haasoscope\\max10_adc_firmware\\myadc\\simulation --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading max10_adc_firmware/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 18.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: myadc: Generating myadc \"myadc\" for SIM_VERILOG\nInfo: modular_adc_0: \"myadc\" instantiated altera_modular_adc \"modular_adc_0\"\nInfo: control_internal: \"modular_adc_0\" instantiated altera_modular_adc_control \"control_internal\"\nInfo: myadc: Done \"myadc\" with 3 modules, 8 files\nInfo: qsys-generate succeeded.\nInfo: Finished: Create simulation model\nInfo: Starting: Create Modelsim Project.\nInfo: sim-script-gen --spd=C:\\Users\\haas\\Downloads\\Haasoscope\\max10_adc_firmware\\myadc\\myadc.spd --output-directory=C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/simulation/ --use-relative-paths=true\nInfo: Doing: ip-make-simscript --spd=C:\\Users\\haas\\Downloads\\Haasoscope\\max10_adc_firmware\\myadc\\myadc.spd --output-directory=C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/simulation/ --use-relative-paths=true\nInfo: Generating the following file(s) for MODELSIM simulator in C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/simulation/ directory:\nInfo: \tmentor/msim_setup.tcl\nInfo: Generating the following file(s) for VCS simulator in C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/simulation/ directory:\nInfo: \tsynopsys/vcs/vcs_setup.sh\nInfo: Generating the following file(s) for VCSMX simulator in C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/simulation/ directory:\nInfo: \tsynopsys/vcsmx/synopsys_sim.setup\nInfo: \tsynopsys/vcsmx/vcsmx_setup.sh\nInfo: Generating the following file(s) for NCSIM simulator in C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/simulation/ directory:\nInfo: \tcadence/cds.lib\nInfo: \tcadence/hdl.var\nInfo: \tcadence/ncsim_setup.sh\nInfo: \t2 .cds.lib files in cadence/cds_libs/ directory\nInfo: Generating the following file(s) for RIVIERA simulator in C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/simulation/ directory:\nInfo: \taldec/rivierapro_setup.tcl\nInfo: For information on how to simulate your IP, see the explanatory comments in the simulator-specific subdirectories under C:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/myadc/simulation/.\nInfo: Regenerate these scripts whenever you make any change to any Quartus-generated IP in your project.\nInfo: Finished: Create Modelsim Project.\nInfo: Starting: Create block symbol file (.bsf)\nInfo: qsys-generate C:\\Users\\haas\\Downloads\\Haasoscope\\max10_adc_firmware\\myadc.qsys --block-symbol-file --output-directory=C:\\Users\\haas\\Downloads\\Haasoscope\\max10_adc_firmware\\myadc --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading max10_adc_firmware/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 18.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: qsys-generate succeeded.\nInfo: Finished: Create block symbol file (.bsf)\nInfo: \nInfo: Starting: Create HDL design files for synthesis\nInfo: qsys-generate C:\\Users\\haas\\Downloads\\Haasoscope\\max10_adc_firmware\\myadc.qsys --synthesis=VERILOG --output-directory=C:\\Users\\haas\\Downloads\\Haasoscope\\max10_adc_firmware\\myadc\\synthesis --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading max10_adc_firmware/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 18.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: myadc: Generating myadc \"myadc\" for QUARTUS_SYNTH\nInfo: modular_adc_0: \"myadc\" instantiated altera_modular_adc \"modular_adc_0\"\nInfo: control_internal: \"modular_adc_0\" instantiated altera_modular_adc_control \"control_internal\"\nInfo: myadc: Done \"myadc\" with 3 modules, 9 files\nInfo: qsys-generate succeeded.\nInfo: Finished: Create HDL design files for synthesis\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc_generation_previous.rpt",
    "content": "Info: Starting: Create block symbol file (.bsf)\nInfo: qsys-generate C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc.qsys --block-symbol-file --output-directory=C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading serial_vga_pong_max10_adc_tdc/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 15.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: ip-generate succeeded.\nInfo: Finished: Create block symbol file (.bsf)\nInfo: \nInfo: Starting: Create HDL design files for synthesis\nInfo: qsys-generate C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc.qsys --synthesis=VERILOG --output-directory=C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc\\synthesis --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading serial_vga_pong_max10_adc_tdc/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 15.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: myadc: Generating myadc \"myadc\" for QUARTUS_SYNTH\nInfo: modular_adc_0: \"myadc\" instantiated altera_modular_adc \"modular_adc_0\"\nInfo: control_internal: \"modular_adc_0\" instantiated altera_modular_adc_control \"control_internal\"\nInfo: myadc: Done \"myadc\" with 3 modules, 9 files\nInfo: ip-generate succeeded.\nInfo: Finished: Create HDL design files for synthesis\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc_inst.v",
    "content": "\tmyadc u0 (\n\t\t.adc_pll_clock_clk      (<connected-to-adc_pll_clock_clk>),      //  adc_pll_clock.clk\n\t\t.adc_pll_locked_export  (<connected-to-adc_pll_locked_export>),  // adc_pll_locked.export\n\t\t.clock_clk              (<connected-to-clock_clk>),              //          clock.clk\n\t\t.command_valid          (<connected-to-command_valid>),          //        command.valid\n\t\t.command_channel        (<connected-to-command_channel>),        //               .channel\n\t\t.command_startofpacket  (<connected-to-command_startofpacket>),  //               .startofpacket\n\t\t.command_endofpacket    (<connected-to-command_endofpacket>),    //               .endofpacket\n\t\t.command_ready          (<connected-to-command_ready>),          //               .ready\n\t\t.reset_sink_reset_n     (<connected-to-reset_sink_reset_n>),     //     reset_sink.reset_n\n\t\t.response_valid         (<connected-to-response_valid>),         //       response.valid\n\t\t.response_channel       (<connected-to-response_channel>),       //               .channel\n\t\t.response_data          (<connected-to-response_data>),          //               .data\n\t\t.response_startofpacket (<connected-to-response_startofpacket>), //               .startofpacket\n\t\t.response_endofpacket   (<connected-to-response_endofpacket>)    //               .endofpacket\n\t);\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/myadc_inst.vhd",
    "content": "\tcomponent myadc is\r\n\t\tport (\n\t\t\tadc_pll_clock_clk      : in  std_logic                     := 'X';             -- clk\n\t\t\tadc_pll_locked_export  : in  std_logic                     := 'X';             -- export\n\t\t\tclock_clk              : in  std_logic                     := 'X';             -- clk\n\t\t\tcommand_valid          : in  std_logic                     := 'X';             -- valid\n\t\t\tcommand_channel        : in  std_logic_vector(4 downto 0)  := (others => 'X'); -- channel\n\t\t\tcommand_startofpacket  : in  std_logic                     := 'X';             -- startofpacket\n\t\t\tcommand_endofpacket    : in  std_logic                     := 'X';             -- endofpacket\n\t\t\tcommand_ready          : out std_logic;                                        -- ready\n\t\t\treset_sink_reset_n     : in  std_logic                     := 'X';             -- reset_n\n\t\t\tresponse_valid         : out std_logic;                                        -- valid\n\t\t\tresponse_channel       : out std_logic_vector(4 downto 0);                     -- channel\n\t\t\tresponse_data          : out std_logic_vector(11 downto 0);                    -- data\n\t\t\tresponse_startofpacket : out std_logic;                                        -- startofpacket\n\t\t\tresponse_endofpacket   : out std_logic                                         -- endofpacket\n\t\t);\n\tend component myadc;\r\n\r\n\tu0 : component myadc\r\n\t\tport map (\n\t\t\tadc_pll_clock_clk      => CONNECTED_TO_adc_pll_clock_clk,      --  adc_pll_clock.clk\n\t\t\tadc_pll_locked_export  => CONNECTED_TO_adc_pll_locked_export,  -- adc_pll_locked.export\n\t\t\tclock_clk              => CONNECTED_TO_clock_clk,              --          clock.clk\n\t\t\tcommand_valid          => CONNECTED_TO_command_valid,          --        command.valid\n\t\t\tcommand_channel        => CONNECTED_TO_command_channel,        --               .channel\n\t\t\tcommand_startofpacket  => CONNECTED_TO_command_startofpacket,  --               .startofpacket\n\t\t\tcommand_endofpacket    => CONNECTED_TO_command_endofpacket,    --               .endofpacket\n\t\t\tcommand_ready          => CONNECTED_TO_command_ready,          --               .ready\n\t\t\treset_sink_reset_n     => CONNECTED_TO_reset_sink_reset_n,     --     reset_sink.reset_n\n\t\t\tresponse_valid         => CONNECTED_TO_response_valid,         --       response.valid\n\t\t\tresponse_channel       => CONNECTED_TO_response_channel,       --               .channel\n\t\t\tresponse_data          => CONNECTED_TO_response_data,          --               .data\n\t\t\tresponse_startofpacket => CONNECTED_TO_response_startofpacket, --               .startofpacket\n\t\t\tresponse_endofpacket   => CONNECTED_TO_response_endofpacket    --               .endofpacket\n\t\t);\n\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/aldec/rivierapro_setup.tcl",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 18.0 614 win32 2021.05.28.12:56:47\n# ----------------------------------------\n# Auto-generated simulation script rivierapro_setup.tcl\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     myadc\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level script that compiles Altera simulation libraries and\n# the Quartus-generated IP in your project, along with your design and\n# testbench files, copy the text from the TOP-LEVEL TEMPLATE section below\n# into a new file, e.g. named \"aldec.do\", and modify the text as directed.\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator.\n# #\n# set QSYS_SIMDIR <script generation output directory>\n# #\n# # Source the generated IP simulation script.\n# source $QSYS_SIMDIR/aldec/rivierapro_setup.tcl\n# #\n# # Set any compilation options you require (this is unusual).\n# set USER_DEFINED_COMPILE_OPTIONS <compilation options>\n# set USER_DEFINED_VHDL_COMPILE_OPTIONS <compilation options for VHDL>\n# set USER_DEFINED_VERILOG_COMPILE_OPTIONS <compilation options for Verilog>\n# #\n# # Call command to compile the Quartus EDA simulation library.\n# dev_com\n# #\n# # Call command to compile the Quartus-generated IP simulation files.\n# com\n# #\n# # Add commands to compile all design files and testbench files, including\n# # the top level. (These are all the files required for simulation other\n# # than the files compiled by the Quartus-generated IP simulation script)\n# #\n# vlog -sv2k5 <your compilation options> <design and testbench files>\n# #\n# # Set the top-level simulation or testbench module/entity name, which is\n# # used by the elab command to elaborate the top level.\n# #\n# set TOP_LEVEL_NAME <simulation top>\n# #\n# # Set any elaboration options you require.\n# set USER_DEFINED_ELAB_OPTIONS <elaboration options>\n# #\n# # Call command to elaborate your design and testbench.\n# elab\n# #\n# # Run the simulation.\n# run\n# #\n# # Report success to the shell.\n# exit -code 0\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If myadc is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n\n# ----------------------------------------\n# Initialize variables\nif ![info exists SYSTEM_INSTANCE_NAME] { \n  set SYSTEM_INSTANCE_NAME \"\"\n} elseif { ![ string match \"\" $SYSTEM_INSTANCE_NAME ] } { \n  set SYSTEM_INSTANCE_NAME \"/$SYSTEM_INSTANCE_NAME\"\n}\n\nif ![info exists TOP_LEVEL_NAME] { \n  set TOP_LEVEL_NAME \"myadc\"\n}\n\nif ![info exists QSYS_SIMDIR] { \n  set QSYS_SIMDIR \"./../\"\n}\n\nif ![info exists QUARTUS_INSTALL_DIR] { \n  set QUARTUS_INSTALL_DIR \"C:/intelfpga_lite/18.0/quartus/\"\n}\n\nif ![info exists USER_DEFINED_COMPILE_OPTIONS] { \n  set USER_DEFINED_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_VHDL_COMPILE_OPTIONS] { \n  set USER_DEFINED_VHDL_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_VERILOG_COMPILE_OPTIONS] { \n  set USER_DEFINED_VERILOG_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_ELAB_OPTIONS] { \n  set USER_DEFINED_ELAB_OPTIONS \"\"\n}\n\n# ----------------------------------------\n# Initialize simulation properties - DO NOT MODIFY!\nset ELAB_OPTIONS \"\"\nset SIM_OPTIONS \"\"\nif ![ string match \"*-64 vsim*\" [ vsim -version ] ] {\n} else {\n}\n\nset Aldec \"Riviera\"\nif { [ string match \"*Active-HDL*\" [ vsim -version ] ] } {\n  set Aldec \"Active\"\n}\n\nif { [ string match \"Active\" $Aldec ] } {\n  scripterconf -tcl\n  createdesign \"$TOP_LEVEL_NAME\"  \".\"\n  opendesign \"$TOP_LEVEL_NAME\"\n}\n\n# ----------------------------------------\n# Copy ROM/RAM files to simulation directory\nalias file_copy {\n  echo \"\\[exec\\] file_copy\"\n}\n\n# ----------------------------------------\n# Create compilation libraries\nproc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }\nensure_lib      ./libraries     \nensure_lib      ./libraries/work\nvmap       work ./libraries/work\nensure_lib                  ./libraries/altera_ver      \nvmap       altera_ver       ./libraries/altera_ver      \nensure_lib                  ./libraries/lpm_ver         \nvmap       lpm_ver          ./libraries/lpm_ver         \nensure_lib                  ./libraries/sgate_ver       \nvmap       sgate_ver        ./libraries/sgate_ver       \nensure_lib                  ./libraries/altera_mf_ver   \nvmap       altera_mf_ver    ./libraries/altera_mf_ver   \nensure_lib                  ./libraries/altera_lnsim_ver\nvmap       altera_lnsim_ver ./libraries/altera_lnsim_ver\nensure_lib                  ./libraries/fiftyfivenm_ver \nvmap       fiftyfivenm_ver  ./libraries/fiftyfivenm_ver \nensure_lib                  ./libraries/control_internal\nvmap       control_internal ./libraries/control_internal\nensure_lib                  ./libraries/modular_adc_0   \nvmap       modular_adc_0    ./libraries/modular_adc_0   \n\n# ----------------------------------------\n# Compile device library files\nalias dev_com {\n  echo \"\\[exec\\] dev_com\"\n  eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"              -work altera_ver      \n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                       -work lpm_ver         \n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                          -work sgate_ver       \n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                      -work altera_mf_ver   \n  vlog  $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS      \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                  -work altera_lnsim_ver\n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"              -work fiftyfivenm_ver \n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \n}\n\n# ----------------------------------------\n# Compile the design files in correct order\nalias com {\n  echo \"\\[exec\\] com\"\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control.v\"             -work control_internal\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control_avrg_fifo.v\"   -work control_internal\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control_fsm.v\"         -work control_internal\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/chsel_code_converter_sw_to_hw.v\"          -work control_internal\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\" -work control_internal\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_top_wrapper.v\"       -work control_internal\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/myadc_modular_adc_0.v\"                    -work modular_adc_0   \n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/myadc.v\"                                                                   \n}\n\n# ----------------------------------------\n# Elaborate top level design\nalias elab {\n  echo \"\\[exec\\] elab\"\n  eval vsim +access +r -t ps $ELAB_OPTIONS -L work -L control_internal -L modular_adc_0 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Elaborate the top level design with -dbg -O2 option\nalias elab_debug {\n  echo \"\\[exec\\] elab_debug\"\n  eval vsim -dbg -O2 +access +r -t ps $ELAB_OPTIONS -L work -L control_internal -L modular_adc_0 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design\nalias ld \"\n  dev_com\n  com\n  elab\n\"\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design with -dbg -O2\nalias ld_debug \"\n  dev_com\n  com\n  elab_debug\n\"\n\n# ----------------------------------------\n# Print out user commmand line aliases\nalias h {\n  echo \"List Of Command Line Aliases\"\n  echo\n  echo \"file_copy                                         -- Copy ROM/RAM files to simulation directory\"\n  echo\n  echo \"dev_com                                           -- Compile device library files\"\n  echo\n  echo \"com                                               -- Compile the design files in correct order\"\n  echo\n  echo \"elab                                              -- Elaborate top level design\"\n  echo\n  echo \"elab_debug                                        -- Elaborate the top level design with -dbg -O2 option\"\n  echo\n  echo \"ld                                                -- Compile all the design files and elaborate the top level design\"\n  echo\n  echo \"ld_debug                                          -- Compile all the design files and elaborate the top level design with -dbg -O2\"\n  echo\n  echo \n  echo\n  echo \"List Of Variables\"\n  echo\n  echo \"TOP_LEVEL_NAME                                    -- Top level module name.\"\n  echo \"                                                     For most designs, this should be overridden\"\n  echo \"                                                     to enable the elab/elab_debug aliases.\"\n  echo\n  echo \"SYSTEM_INSTANCE_NAME                              -- Instantiated system module name inside top level module.\"\n  echo\n  echo \"QSYS_SIMDIR                                       -- Platform Designer base simulation directory.\"\n  echo\n  echo \"QUARTUS_INSTALL_DIR                               -- Quartus installation directory.\"\n  echo\n  echo \"USER_DEFINED_COMPILE_OPTIONS                      -- User-defined compile options, added to com/dev_com aliases.\"\n  echo\n  echo \"USER_DEFINED_ELAB_OPTIONS                         -- User-defined elaboration options, added to elab/elab_debug aliases.\"\n  echo\n  echo \"USER_DEFINED_VHDL_COMPILE_OPTIONS                 -- User-defined vhdl compile options, added to com/dev_com aliases.\"\n  echo\n  echo \"USER_DEFINED_VERILOG_COMPILE_OPTIONS              -- User-defined verilog compile options, added to com/dev_com aliases.\"\n}\nfile_copy\nh\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/cadence/cds.lib",
    "content": "\nDEFINE std              $CDS_ROOT/tools/inca/files/STD/           \nDEFINE synopsys         $CDS_ROOT/tools/inca/files/SYNOPSYS/      \nDEFINE ieee             $CDS_ROOT/tools/inca/files/IEEE/          \nDEFINE ambit            $CDS_ROOT/tools/inca/files/AMBIT/         \nDEFINE vital_memory     $CDS_ROOT/tools/inca/files/VITAL_MEMORY/  \nDEFINE ncutils          $CDS_ROOT/tools/inca/files/NCUTILS/       \nDEFINE ncinternal       $CDS_ROOT/tools/inca/files/NCINTERNAL/    \nDEFINE ncmodels         $CDS_ROOT/tools/inca/files/NCMODELS/      \nDEFINE cds_assertions   $CDS_ROOT/tools/inca/files/CDS_ASSERTIONS/\nDEFINE work             ./libraries/work/                         \nDEFINE control_internal ./libraries/control_internal/             \nDEFINE modular_adc_0    ./libraries/modular_adc_0/                \nDEFINE altera_ver       ./libraries/altera_ver/                   \nDEFINE lpm_ver          ./libraries/lpm_ver/                      \nDEFINE sgate_ver        ./libraries/sgate_ver/                    \nDEFINE altera_mf_ver    ./libraries/altera_mf_ver/                \nDEFINE altera_lnsim_ver ./libraries/altera_lnsim_ver/             \nDEFINE fiftyfivenm_ver  ./libraries/fiftyfivenm_ver/              \n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/cadence/cds_libs/control_internal.cds.lib",
    "content": "\nDEFINE std              $CDS_ROOT/tools/inca/files/STD/           \nDEFINE synopsys         $CDS_ROOT/tools/inca/files/SYNOPSYS/      \nDEFINE ieee             $CDS_ROOT/tools/inca/files/IEEE/          \nDEFINE ambit            $CDS_ROOT/tools/inca/files/AMBIT/         \nDEFINE vital_memory     $CDS_ROOT/tools/inca/files/VITAL_MEMORY/  \nDEFINE ncutils          $CDS_ROOT/tools/inca/files/NCUTILS/       \nDEFINE ncinternal       $CDS_ROOT/tools/inca/files/NCINTERNAL/    \nDEFINE ncmodels         $CDS_ROOT/tools/inca/files/NCMODELS/      \nDEFINE cds_assertions   $CDS_ROOT/tools/inca/files/CDS_ASSERTIONS/\nDEFINE work             ./../libraries/work/                      \nDEFINE altera_ver       ./../libraries/altera_ver/                \nDEFINE lpm_ver          ./../libraries/lpm_ver/                   \nDEFINE sgate_ver        ./../libraries/sgate_ver/                 \nDEFINE altera_mf_ver    ./../libraries/altera_mf_ver/             \nDEFINE altera_lnsim_ver ./../libraries/altera_lnsim_ver/          \nDEFINE fiftyfivenm_ver  ./../libraries/fiftyfivenm_ver/           \nDEFINE control_internal ./../libraries/control_internal/          \n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/cadence/cds_libs/modular_adc_0.cds.lib",
    "content": "\nDEFINE std              $CDS_ROOT/tools/inca/files/STD/           \nDEFINE synopsys         $CDS_ROOT/tools/inca/files/SYNOPSYS/      \nDEFINE ieee             $CDS_ROOT/tools/inca/files/IEEE/          \nDEFINE ambit            $CDS_ROOT/tools/inca/files/AMBIT/         \nDEFINE vital_memory     $CDS_ROOT/tools/inca/files/VITAL_MEMORY/  \nDEFINE ncutils          $CDS_ROOT/tools/inca/files/NCUTILS/       \nDEFINE ncinternal       $CDS_ROOT/tools/inca/files/NCINTERNAL/    \nDEFINE ncmodels         $CDS_ROOT/tools/inca/files/NCMODELS/      \nDEFINE cds_assertions   $CDS_ROOT/tools/inca/files/CDS_ASSERTIONS/\nDEFINE work             ./../libraries/work/                      \nDEFINE altera_ver       ./../libraries/altera_ver/                \nDEFINE lpm_ver          ./../libraries/lpm_ver/                   \nDEFINE sgate_ver        ./../libraries/sgate_ver/                 \nDEFINE altera_mf_ver    ./../libraries/altera_mf_ver/             \nDEFINE altera_lnsim_ver ./../libraries/altera_lnsim_ver/          \nDEFINE fiftyfivenm_ver  ./../libraries/fiftyfivenm_ver/           \nDEFINE modular_adc_0    ./../libraries/modular_adc_0/             \n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/cadence/hdl.var",
    "content": "\nDEFINE WORK work\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/cadence/ncsim_setup.sh",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 18.0 614 win32 2021.05.28.12:56:47\n\n# ----------------------------------------\n# ncsim - auto-generated simulation script\n\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     myadc\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level shell script that compiles Altera simulation libraries\n# and the Quartus-generated IP in your project, along with your design and\n# testbench files, copy the text from the TOP-LEVEL TEMPLATE section below\n# into a new file, e.g. named \"ncsim.sh\", and modify text as directed.\n# \n# You can also modify the simulation flow to suit your needs. Set the\n# following variables to 1 to disable their corresponding processes:\n# - SKIP_FILE_COPY: skip copying ROM/RAM initialization files\n# - SKIP_DEV_COM: skip compiling the Quartus EDA simulation library\n# - SKIP_COM: skip compiling Quartus-generated IP simulation files\n# - SKIP_ELAB and SKIP_SIM: skip elaboration and simulation\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator. In this case, you must also copy the generated files\n# # \"cds.lib\" and \"hdl.var\" - plus the directory \"cds_libs\" if generated - \n# # into the location from which you launch the simulator, or incorporate\n# # into any existing library setup.\n# #\n# # Run Quartus-generated IP simulation script once to compile Quartus EDA\n# # simulation libraries and Quartus-generated IP simulation files, and copy\n# # any ROM/RAM initialization files to the simulation directory.\n# # - If necessary, specify any compilation options:\n# #   USER_DEFINED_COMPILE_OPTIONS\n# #   USER_DEFINED_VHDL_COMPILE_OPTIONS applied to vhdl compiler\n# #   USER_DEFINED_VERILOG_COMPILE_OPTIONS applied to verilog compiler\n# #\n# source <script generation output directory>/cadence/ncsim_setup.sh \\\n# SKIP_ELAB=1 \\\n# SKIP_SIM=1 \\\n# USER_DEFINED_COMPILE_OPTIONS=<compilation options for your design> \\\n# USER_DEFINED_VHDL_COMPILE_OPTIONS=<VHDL compilation options for your design> \\\n# USER_DEFINED_VERILOG_COMPILE_OPTIONS=<Verilog compilation options for your design> \\\n# QSYS_SIMDIR=<script generation output directory>\n# #\n# # Compile all design files and testbench files, including the top level.\n# # (These are all the files required for simulation other than the files\n# # compiled by the IP script)\n# #\n# ncvlog <compilation options> <design and testbench files>\n# #\n# # TOP_LEVEL_NAME is used in this script to set the top-level simulation or\n# # testbench module/entity name.\n# #\n# # Run the IP script again to elaborate and simulate the top level:\n# # - Specify TOP_LEVEL_NAME and USER_DEFINED_ELAB_OPTIONS.\n# # - Override the default USER_DEFINED_SIM_OPTIONS. For example, to run\n# #   until $finish(), set to an empty string: USER_DEFINED_SIM_OPTIONS=\"\".\n# #\n# source <script generation output directory>/cadence/ncsim_setup.sh \\\n# SKIP_FILE_COPY=1 \\\n# SKIP_DEV_COM=1 \\\n# SKIP_COM=1 \\\n# TOP_LEVEL_NAME=<simulation top> \\\n# USER_DEFINED_ELAB_OPTIONS=<elaboration options for your design> \\\n# USER_DEFINED_SIM_OPTIONS=<simulation options for your design>\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If myadc is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n# ACDS 18.0 614 win32 2021.05.28.12:56:47\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"myadc\"\nQSYS_SIMDIR=\"./../\"\nQUARTUS_INSTALL_DIR=\"C:/intelfpga_lite/18.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_DEV_COM=0\nSKIP_COM=0\nSKIP_ELAB=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"-input \\\"@run 100; exit\\\"\"\n\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `ncsim -version` != *\"ncsim(64)\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# create compilation libraries\nmkdir -p ./libraries/work/\nmkdir -p ./libraries/control_internal/\nmkdir -p ./libraries/modular_adc_0/\nmkdir -p ./libraries/altera_ver/\nmkdir -p ./libraries/lpm_ver/\nmkdir -p ./libraries/sgate_ver/\nmkdir -p ./libraries/altera_mf_ver/\nmkdir -p ./libraries/altera_lnsim_ver/\nmkdir -p ./libraries/fiftyfivenm_ver/\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\n# ----------------------------------------\n# compile device library files\nif [ $SKIP_DEV_COM -eq 0 ]; then\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"                -work altera_ver      \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                         -work lpm_ver         \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                            -work sgate_ver       \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                        -work altera_mf_ver   \n  ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                    -work altera_lnsim_ver\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"                -work fiftyfivenm_ver \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \nfi\n\n# ----------------------------------------\n# compile design files in correct order\nif [ $SKIP_COM -eq 0 ]; then\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control.v\"             -work control_internal -cdslib ./cds_libs/control_internal.cds.lib\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control_avrg_fifo.v\"   -work control_internal -cdslib ./cds_libs/control_internal.cds.lib\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control_fsm.v\"         -work control_internal -cdslib ./cds_libs/control_internal.cds.lib\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/chsel_code_converter_sw_to_hw.v\"          -work control_internal -cdslib ./cds_libs/control_internal.cds.lib\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\" -work control_internal -cdslib ./cds_libs/control_internal.cds.lib\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_top_wrapper.v\"       -work control_internal -cdslib ./cds_libs/control_internal.cds.lib\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/myadc_modular_adc_0.v\"                    -work modular_adc_0    -cdslib ./cds_libs/modular_adc_0.cds.lib   \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/myadc.v\"                                                                                                               \nfi\n\n# ----------------------------------------\n# elaborate top level design\nif [ $SKIP_ELAB -eq 0 ]; then\n  export GENERIC_PARAM_COMPAT_CHECK=1\n  ncelab -access +w+r+c -namemap_mixgen $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME\nfi\n\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  eval ncsim -licqueue $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS $TOP_LEVEL_NAME\nfi\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/mentor/msim_setup.tcl",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ----------------------------------------\n# Auto-generated simulation script msim_setup.tcl\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     myadc\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level script that compiles Altera simulation libraries and\n# the Quartus-generated IP in your project, along with your design and\n# testbench files, copy the text from the TOP-LEVEL TEMPLATE section below\n# into a new file, e.g. named \"mentor.do\", and modify the text as directed.\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator.\n# #\n# set QSYS_SIMDIR <script generation output directory>\n# #\n# # Source the generated IP simulation script.\n# source $QSYS_SIMDIR/mentor/msim_setup.tcl\n# #\n# # Set any compilation options you require (this is unusual).\n# set USER_DEFINED_COMPILE_OPTIONS <compilation options>\n# set USER_DEFINED_VHDL_COMPILE_OPTIONS <compilation options for VHDL>\n# set USER_DEFINED_VERILOG_COMPILE_OPTIONS <compilation options for Verilog>\n# #\n# # Call command to compile the Quartus EDA simulation library.\n# dev_com\n# #\n# # Call command to compile the Quartus-generated IP simulation files.\n# com\n# #\n# # Add commands to compile all design files and testbench files, including\n# # the top level. (These are all the files required for simulation other\n# # than the files compiled by the Quartus-generated IP simulation script)\n# #\n# vlog <compilation options> <design and testbench files>\n# #\n# # Set the top-level simulation or testbench module/entity name, which is\n# # used by the elab command to elaborate the top level.\n# #\n# set TOP_LEVEL_NAME <simulation top>\n# #\n# # Set any elaboration options you require.\n# set USER_DEFINED_ELAB_OPTIONS <elaboration options>\n# #\n# # Call command to elaborate your design and testbench.\n# elab\n# #\n# # Run the simulation.\n# run -a\n# #\n# # Report success to the shell.\n# exit -code 0\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If myadc is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n# ACDS 18.0 614 win32 2021.05.28.12:56:47\n\n# ----------------------------------------\n# Initialize variables\nif ![info exists SYSTEM_INSTANCE_NAME] { \n  set SYSTEM_INSTANCE_NAME \"\"\n} elseif { ![ string match \"\" $SYSTEM_INSTANCE_NAME ] } { \n  set SYSTEM_INSTANCE_NAME \"/$SYSTEM_INSTANCE_NAME\"\n}\n\nif ![info exists TOP_LEVEL_NAME] { \n  set TOP_LEVEL_NAME \"myadc\"\n}\n\nif ![info exists QSYS_SIMDIR] { \n  set QSYS_SIMDIR \"./../\"\n}\n\nif ![info exists QUARTUS_INSTALL_DIR] { \n  set QUARTUS_INSTALL_DIR \"C:/intelfpga_lite/18.0/quartus/\"\n}\n\nif ![info exists USER_DEFINED_COMPILE_OPTIONS] { \n  set USER_DEFINED_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_VHDL_COMPILE_OPTIONS] { \n  set USER_DEFINED_VHDL_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_VERILOG_COMPILE_OPTIONS] { \n  set USER_DEFINED_VERILOG_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_ELAB_OPTIONS] { \n  set USER_DEFINED_ELAB_OPTIONS \"\"\n}\n\n# ----------------------------------------\n# Initialize simulation properties - DO NOT MODIFY!\nset ELAB_OPTIONS \"\"\nset SIM_OPTIONS \"\"\nif ![ string match \"*-64 vsim*\" [ vsim -version ] ] {\n} else {\n}\n\n# ----------------------------------------\n# Copy ROM/RAM files to simulation directory\nalias file_copy {\n  echo \"\\[exec\\] file_copy\"\n}\n\n# ----------------------------------------\n# Create compilation libraries\nproc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }\nensure_lib          ./libraries/     \nensure_lib          ./libraries/work/\nvmap       work     ./libraries/work/\nvmap       work_lib ./libraries/work/\nif ![ string match \"*ModelSim ALTERA*\" [ vsim -version ] ] {\n  ensure_lib                  ./libraries/altera_ver/      \n  vmap       altera_ver       ./libraries/altera_ver/      \n  ensure_lib                  ./libraries/lpm_ver/         \n  vmap       lpm_ver          ./libraries/lpm_ver/         \n  ensure_lib                  ./libraries/sgate_ver/       \n  vmap       sgate_ver        ./libraries/sgate_ver/       \n  ensure_lib                  ./libraries/altera_mf_ver/   \n  vmap       altera_mf_ver    ./libraries/altera_mf_ver/   \n  ensure_lib                  ./libraries/altera_lnsim_ver/\n  vmap       altera_lnsim_ver ./libraries/altera_lnsim_ver/\n  ensure_lib                  ./libraries/fiftyfivenm_ver/ \n  vmap       fiftyfivenm_ver  ./libraries/fiftyfivenm_ver/ \n}\nensure_lib                  ./libraries/control_internal/\nvmap       control_internal ./libraries/control_internal/\nensure_lib                  ./libraries/modular_adc_0/   \nvmap       modular_adc_0    ./libraries/modular_adc_0/   \n\n# ----------------------------------------\n# Compile device library files\nalias dev_com {\n  echo \"\\[exec\\] dev_com\"\n  if ![ string match \"*ModelSim ALTERA*\" [ vsim -version ] ] {\n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"               -work altera_ver      \n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                        -work lpm_ver         \n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                           -work sgate_ver       \n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                       -work altera_mf_ver   \n    eval  vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                   -work altera_lnsim_ver\n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"               -work fiftyfivenm_ver \n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/mentor/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \n  }\n}\n\n# ----------------------------------------\n# Compile the design files in correct order\nalias com {\n  echo \"\\[exec\\] com\"\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control.v\"             -work control_internal\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control_avrg_fifo.v\"   -work control_internal\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control_fsm.v\"         -work control_internal\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/chsel_code_converter_sw_to_hw.v\"          -work control_internal\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\" -work control_internal\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_top_wrapper.v\"       -work control_internal\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/myadc_modular_adc_0.v\"                    -work modular_adc_0   \n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/myadc.v\"                                                                   \n}\n\n# ----------------------------------------\n# Elaborate top level design\nalias elab {\n  echo \"\\[exec\\] elab\"\n  eval vsim -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS -L work -L work_lib -L control_internal -L modular_adc_0 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Elaborate the top level design with novopt option\nalias elab_debug {\n  echo \"\\[exec\\] elab_debug\"\n  eval vsim -novopt -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS -L work -L work_lib -L control_internal -L modular_adc_0 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design\nalias ld \"\n  dev_com\n  com\n  elab\n\"\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design with -novopt\nalias ld_debug \"\n  dev_com\n  com\n  elab_debug\n\"\n\n# ----------------------------------------\n# Print out user commmand line aliases\nalias h {\n  echo \"List Of Command Line Aliases\"\n  echo\n  echo \"file_copy                                         -- Copy ROM/RAM files to simulation directory\"\n  echo\n  echo \"dev_com                                           -- Compile device library files\"\n  echo\n  echo \"com                                               -- Compile the design files in correct order\"\n  echo\n  echo \"elab                                              -- Elaborate top level design\"\n  echo\n  echo \"elab_debug                                        -- Elaborate the top level design with novopt option\"\n  echo\n  echo \"ld                                                -- Compile all the design files and elaborate the top level design\"\n  echo\n  echo \"ld_debug                                          -- Compile all the design files and elaborate the top level design with -novopt\"\n  echo\n  echo \n  echo\n  echo \"List Of Variables\"\n  echo\n  echo \"TOP_LEVEL_NAME                                    -- Top level module name.\"\n  echo \"                                                     For most designs, this should be overridden\"\n  echo \"                                                     to enable the elab/elab_debug aliases.\"\n  echo\n  echo \"SYSTEM_INSTANCE_NAME                              -- Instantiated system module name inside top level module.\"\n  echo\n  echo \"QSYS_SIMDIR                                       -- Platform Designer base simulation directory.\"\n  echo\n  echo \"QUARTUS_INSTALL_DIR                               -- Quartus installation directory.\"\n  echo\n  echo \"USER_DEFINED_COMPILE_OPTIONS                      -- User-defined compile options, added to com/dev_com aliases.\"\n  echo\n  echo \"USER_DEFINED_ELAB_OPTIONS                         -- User-defined elaboration options, added to elab/elab_debug aliases.\"\n  echo\n  echo \"USER_DEFINED_VHDL_COMPILE_OPTIONS                 -- User-defined vhdl compile options, added to com/dev_com aliases.\"\n  echo\n  echo \"USER_DEFINED_VERILOG_COMPILE_OPTIONS              -- User-defined verilog compile options, added to com/dev_com aliases.\"\n}\nfile_copy\nh\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/myadc.sip",
    "content": "set_global_assignment -entity \"myadc\" -library \"lib_myadc\" -name IP_TOOL_NAME \"Qsys\"\nset_global_assignment -entity \"myadc\" -library \"lib_myadc\" -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -entity \"myadc\" -library \"lib_myadc\" -name IP_TOOL_ENV \"Qsys\"\nset_global_assignment -library \"lib_myadc\" -name SPD_FILE [file join $::quartus(sip_path) \"../myadc.spd\"]\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"../../myadc.qsys\"]\n\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"myadc.v\"]\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"submodules/myadc_modular_adc_0.v\"]\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"submodules/altera_modular_adc_control.v\"]\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"submodules/altera_modular_adc_control_avrg_fifo.v\"]\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"submodules/altera_modular_adc_control_fsm.v\"]\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"submodules/chsel_code_converter_sw_to_hw.v\"]\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"]\nset_global_assignment -library \"lib_myadc\" -name MISC_FILE [file join $::quartus(sip_path) \"submodules/fiftyfivenm_adcblock_top_wrapper.v\"]\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/myadc.v",
    "content": "// myadc.v\n\n// Generated using ACDS version 18.0 614\n\n`timescale 1 ps / 1 ps\nmodule myadc (\n\t\tinput  wire        adc_pll_clock_clk,      //  adc_pll_clock.clk\n\t\tinput  wire        adc_pll_locked_export,  // adc_pll_locked.export\n\t\tinput  wire        clock_clk,              //          clock.clk\n\t\tinput  wire        command_valid,          //        command.valid\n\t\tinput  wire [4:0]  command_channel,        //               .channel\n\t\tinput  wire        command_startofpacket,  //               .startofpacket\n\t\tinput  wire        command_endofpacket,    //               .endofpacket\n\t\toutput wire        command_ready,          //               .ready\n\t\tinput  wire        reset_sink_reset_n,     //     reset_sink.reset_n\n\t\toutput wire        response_valid,         //       response.valid\n\t\toutput wire [4:0]  response_channel,       //               .channel\n\t\toutput wire [11:0] response_data,          //               .data\n\t\toutput wire        response_startofpacket, //               .startofpacket\n\t\toutput wire        response_endofpacket    //               .endofpacket\n\t);\n\n\tmyadc_modular_adc_0 modular_adc_0 (\n\t\t.clock_clk              (clock_clk),              //          clock.clk\n\t\t.reset_sink_reset_n     (reset_sink_reset_n),     //     reset_sink.reset_n\n\t\t.adc_pll_clock_clk      (adc_pll_clock_clk),      //  adc_pll_clock.clk\n\t\t.adc_pll_locked_export  (adc_pll_locked_export),  // adc_pll_locked.export\n\t\t.command_valid          (command_valid),          //        command.valid\n\t\t.command_channel        (command_channel),        //               .channel\n\t\t.command_startofpacket  (command_startofpacket),  //               .startofpacket\n\t\t.command_endofpacket    (command_endofpacket),    //               .endofpacket\n\t\t.command_ready          (command_ready),          //               .ready\n\t\t.response_valid         (response_valid),         //       response.valid\n\t\t.response_channel       (response_channel),       //               .channel\n\t\t.response_data          (response_data),          //               .data\n\t\t.response_startofpacket (response_startofpacket), //               .startofpacket\n\t\t.response_endofpacket   (response_endofpacket)    //               .endofpacket\n\t);\n\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/submodules/altera_modular_adc_control.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// synthesis translate_off\n`timescale 1ns / 1ps\n// synthesis translate_on\n\nmodule altera_modular_adc_control #(\n    parameter clkdiv        = 1,\n    parameter tsclkdiv      = 0,\n    parameter tsclksel      = 0,\n    parameter prescalar     = 0,\n    parameter refsel        = 0,\n    parameter device_partname_fivechar_prefix   = \"10M08\",\n    parameter is_this_first_or_second_adc = 1,\n    parameter analog_input_pin_mask = 17'h0,\n    parameter hard_pwd = 0,\n    parameter dual_adc_mode = 0,\n    parameter enable_usr_sim = 0,\n    parameter reference_voltage_sim = 65536,\n    parameter simfilename_ch0 = \"simfilename_ch0\",\n    parameter simfilename_ch1 = \"simfilename_ch1\",\n    parameter simfilename_ch2 = \"simfilename_ch2\",\n    parameter simfilename_ch3 = \"simfilename_ch3\",\n    parameter simfilename_ch4 = \"simfilename_ch4\",\n    parameter simfilename_ch5 = \"simfilename_ch5\",\n    parameter simfilename_ch6 = \"simfilename_ch6\",\n    parameter simfilename_ch7 = \"simfilename_ch7\",\n    parameter simfilename_ch8 = \"simfilename_ch8\",\n    parameter simfilename_ch9 = \"simfilename_ch9\",\n    parameter simfilename_ch10 = \"simfilename_ch10\",\n    parameter simfilename_ch11 = \"simfilename_ch11\",\n    parameter simfilename_ch12 = \"simfilename_ch12\",\n    parameter simfilename_ch13 = \"simfilename_ch13\",\n    parameter simfilename_ch14 = \"simfilename_ch14\",\n    parameter simfilename_ch15 = \"simfilename_ch15\",\n    parameter simfilename_ch16 = \"simfilename_ch16\"\n) (\n    input           clk,\n    input           rst_n,\n    input           clk_in_pll_c0,\n    input           clk_in_pll_locked,\n    input           cmd_valid,\n    input [4:0]     cmd_channel,\n    input           cmd_sop,\n    input           cmd_eop,\n    input           sync_ready,\n\n    output          cmd_ready,\n    output          rsp_valid,\n    output [4:0]    rsp_channel,\n    output [11:0]   rsp_data,\n    output          rsp_sop,\n    output          rsp_eop,\n    output          sync_valid\n\n);\n\nwire        clkout_adccore;\nwire        eoc;\nwire [11:0] dout;\nwire [4:0]  chsel;\nwire        soc;\nwire        tsen;\nwire        usr_pwd;\n\naltera_modular_adc_control_fsm #(\n    .is_this_first_or_second_adc    (is_this_first_or_second_adc),\n    .dual_adc_mode                  (dual_adc_mode)    \n) u_control_fsm (\n    // inputs\n    .clk                (clk),\n    .rst_n              (rst_n),\n    .clk_in_pll_locked  (clk_in_pll_locked),\n    .cmd_valid          (cmd_valid),\n    .cmd_channel        (cmd_channel),\n    .cmd_sop            (cmd_sop),\n    .cmd_eop            (cmd_eop),\n    .clk_dft            (clkout_adccore),\n    .eoc                (eoc),\n    .dout               (dout),\n    .sync_ready         (sync_ready),\n    // outputs\n    .rsp_valid          (rsp_valid),\n    .rsp_channel        (rsp_channel),\n    .rsp_data           (rsp_data),\n    .rsp_sop            (rsp_sop),\n    .rsp_eop            (rsp_eop),\n    .cmd_ready          (cmd_ready),\n    .chsel              (chsel),\n    .soc                (soc),\n    .usr_pwd            (usr_pwd),\n    .tsen               (tsen),\n    .sync_valid         (sync_valid)\n\n\n\n);\n\n\n\nfiftyfivenm_adcblock_top_wrapper #(\n    .device_partname_fivechar_prefix (device_partname_fivechar_prefix),\n    .clkdiv                          (clkdiv),\n    .tsclkdiv                        (tsclkdiv),\n    .tsclksel                        (tsclksel),\n    .refsel                          (refsel),\n    .prescalar                       (prescalar),\n    .is_this_first_or_second_adc     (is_this_first_or_second_adc),\n    .analog_input_pin_mask           (analog_input_pin_mask),\n    .hard_pwd                        (hard_pwd),\n    .enable_usr_sim                  (enable_usr_sim),\n    .reference_voltage_sim           (reference_voltage_sim),\n    .simfilename_ch0                 (simfilename_ch0),\n    .simfilename_ch1                 (simfilename_ch1),\n    .simfilename_ch2                 (simfilename_ch2),\n    .simfilename_ch3                 (simfilename_ch3),\n    .simfilename_ch4                 (simfilename_ch4),\n    .simfilename_ch5                 (simfilename_ch5),\n    .simfilename_ch6                 (simfilename_ch6),\n    .simfilename_ch7                 (simfilename_ch7),\n    .simfilename_ch8                 (simfilename_ch8),\n    .simfilename_ch9                 (simfilename_ch9),\n    .simfilename_ch10                (simfilename_ch10),\n    .simfilename_ch11                (simfilename_ch11),\n    .simfilename_ch12                (simfilename_ch12),\n    .simfilename_ch13                (simfilename_ch13),\n    .simfilename_ch14                (simfilename_ch14),\n    .simfilename_ch15                (simfilename_ch15),\n    .simfilename_ch16                (simfilename_ch16)\n) adc_inst (\n    //.reset              (reset),\n    .chsel              (chsel),                        // 5-bits channel selection.\n    .soc                (soc),                          // signal Start-of-Conversion to ADC\n    .eoc                (eoc),                          // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\n    .dout               (dout),                         // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\n    .usr_pwd            (usr_pwd),                      // User Power Down during run time.  0 = Power Up;  1 = Power Down.\n    .tsen               (tsen),                         // MUST power down ADC before changing TSEN.  0 = Normal Mode; 1 = Temperature Sensing Mode.\n    .clkout_adccore     (clkout_adccore),               // Output clock from the clock divider\n    .clkin_from_pll_c0  (clk_in_pll_c0)               // Clock source from PLL1/3 c-counter[0]\n    //.dout_ch            (dout_ch)                     // Indicate dout is for which chsel\n);\n\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/submodules/altera_modular_adc_control_avrg_fifo.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// megafunction wizard: %FIFO%\n// GENERATION: STANDARD\n// VERSION: WM1.0\n// MODULE: scfifo \n\n// ============================================================\n// File Name: altera_modular_adc_control_avrg_fifo.v\n// Megafunction Name(s):\n// \t\t\tscfifo\n//\n// Simulation Library Files(s):\n// \t\t\taltera_mf\n// ============================================================\n// ************************************************************\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\n//\n// 15.0.0 Internal Build 30 11/13/2014 PN Full Version\n// ************************************************************\n\n\n//Copyright (C) 1991-2014 Altera Corporation. All rights reserved.\n//Your use of Altera Corporation's design tools, logic functions \n//and other software and tools, and its AMPP partner logic \n//functions, and any output files from any of the foregoing \n//(including device programming or simulation files), and any \n//associated documentation or information are expressly subject \n//to the terms and conditions of the Altera Program License \n//Subscription Agreement, the Altera Quartus II License Agreement,\n//the Altera MegaCore Function License Agreement, or other \n//applicable license agreement, including, without limitation, \n//that your use is for the sole purpose of programming logic \n//devices manufactured by Altera and sold by Altera or its \n//authorized distributors.  Please refer to the applicable \n//agreement for further details.\n\n\n// synopsys translate_off\n`timescale 1 ps / 1 ps\n// synopsys translate_on\nmodule altera_modular_adc_control_avrg_fifo (\n\tclock,\n\tdata,\n\trdreq,\n\tsclr,\n\twrreq,\n\tempty,\n\tfull,\n\tq);\n\n\tinput\t  clock;\n\tinput\t[11:0]  data;\n\tinput\t  rdreq;\n\tinput\t  sclr;\n\tinput\t  wrreq;\n\toutput\t  empty;\n\toutput\t  full;\n\toutput\t[11:0]  q;\n\n\twire  sub_wire0;\n\twire  sub_wire1;\n\twire [11:0] sub_wire2;\n\twire  empty = sub_wire0;\n\twire  full = sub_wire1;\n\twire [11:0] q = sub_wire2[11:0];\n\n\tscfifo\tscfifo_component (\n\t\t\t\t.clock (clock),\n\t\t\t\t.data (data),\n\t\t\t\t.rdreq (rdreq),\n\t\t\t\t.sclr (sclr),\n\t\t\t\t.wrreq (wrreq),\n\t\t\t\t.empty (sub_wire0),\n\t\t\t\t.full (sub_wire1),\n\t\t\t\t.q (sub_wire2),\n\t\t\t\t.aclr (),\n\t\t\t\t.almost_empty (),\n\t\t\t\t.almost_full (),\n\t\t\t\t.usedw ());\n\tdefparam\n\t\tscfifo_component.add_ram_output_register = \"OFF\",\n\t\tscfifo_component.intended_device_family = \"MAX 10\",\n\t\tscfifo_component.lpm_hint = \"RAM_BLOCK_TYPE=M9K\",\n\t\tscfifo_component.lpm_numwords = 64,\n\t\tscfifo_component.lpm_showahead = \"OFF\",\n\t\tscfifo_component.lpm_type = \"scfifo\",\n\t\tscfifo_component.lpm_width = 12,\n\t\tscfifo_component.lpm_widthu = 6,\n\t\tscfifo_component.overflow_checking = \"ON\",\n\t\tscfifo_component.underflow_checking = \"ON\",\n\t\tscfifo_component.use_eab = \"ON\";\n\n\nendmodule\n\n// ============================================================\n// CNX file retrieval info\n// ============================================================\n// Retrieval info: PRIVATE: AlmostEmpty NUMERIC \"0\"\n// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC \"-1\"\n// Retrieval info: PRIVATE: AlmostFull NUMERIC \"0\"\n// Retrieval info: PRIVATE: AlmostFullThr NUMERIC \"-1\"\n// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clock NUMERIC \"0\"\n// Retrieval info: PRIVATE: Depth NUMERIC \"64\"\n// Retrieval info: PRIVATE: Empty NUMERIC \"1\"\n// Retrieval info: PRIVATE: Full NUMERIC \"1\"\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC \"0\"\n// Retrieval info: PRIVATE: LegacyRREQ NUMERIC \"1\"\n// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC \"0\"\n// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC \"0\"\n// Retrieval info: PRIVATE: Optimize NUMERIC \"2\"\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"2\"\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\n// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC \"0\"\n// Retrieval info: PRIVATE: UsedW NUMERIC \"0\"\n// Retrieval info: PRIVATE: Width NUMERIC \"12\"\n// Retrieval info: PRIVATE: dc_aclr NUMERIC \"0\"\n// Retrieval info: PRIVATE: diff_widths NUMERIC \"0\"\n// Retrieval info: PRIVATE: msb_usedw NUMERIC \"0\"\n// Retrieval info: PRIVATE: output_width NUMERIC \"12\"\n// Retrieval info: PRIVATE: rsEmpty NUMERIC \"1\"\n// Retrieval info: PRIVATE: rsFull NUMERIC \"0\"\n// Retrieval info: PRIVATE: rsUsedW NUMERIC \"0\"\n// Retrieval info: PRIVATE: sc_aclr NUMERIC \"0\"\n// Retrieval info: PRIVATE: sc_sclr NUMERIC \"1\"\n// Retrieval info: PRIVATE: wsEmpty NUMERIC \"0\"\n// Retrieval info: PRIVATE: wsFull NUMERIC \"1\"\n// Retrieval info: PRIVATE: wsUsedW NUMERIC \"0\"\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\n// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING \"OFF\"\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: CONSTANT: LPM_HINT STRING \"RAM_BLOCK_TYPE=M9K\"\n// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC \"64\"\n// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING \"OFF\"\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"scfifo\"\n// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC \"12\"\n// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC \"6\"\n// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING \"ON\"\n// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING \"ON\"\n// Retrieval info: CONSTANT: USE_EAB STRING \"ON\"\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL \"clock\"\n// Retrieval info: USED_PORT: data 0 0 12 0 INPUT NODEFVAL \"data[11..0]\"\n// Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL \"empty\"\n// Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL \"full\"\n// Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL \"q[11..0]\"\n// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL \"rdreq\"\n// Retrieval info: USED_PORT: sclr 0 0 0 0 INPUT NODEFVAL \"sclr\"\n// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL \"wrreq\"\n// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0\n// Retrieval info: CONNECT: @data 0 0 12 0 data 0 0 12 0\n// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0\n// Retrieval info: CONNECT: @sclr 0 0 0 0 sclr 0 0 0 0\n// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0\n// Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0\n// Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0\n// Retrieval info: CONNECT: q 0 0 12 0 @q 0 0 12 0\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.inc FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.cmp FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.bsf FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo_inst.v FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo_bb.v TRUE\n// Retrieval info: LIB_FILE: altera_mf\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/submodules/altera_modular_adc_control_fsm.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// synthesis translate_off\n`timescale 1ns / 1ps\n// synthesis translate_on\n\nmodule altera_modular_adc_control_fsm #(\n    parameter is_this_first_or_second_adc = 1,\n    parameter dual_adc_mode = 0\n) (\n    input               clk, \n    input               rst_n,\n    input               clk_in_pll_locked,\n    input               cmd_valid,\n    input [4:0]         cmd_channel,\n    input               cmd_sop,\n    input               cmd_eop,\n    input               clk_dft,\n    input               eoc,\n    input [11:0]        dout,\n    input               sync_ready,\n\n    output reg          rsp_valid,\n    output reg [4:0]    rsp_channel,\n    output reg [11:0]   rsp_data,\n    output reg          rsp_sop,\n    output reg          rsp_eop,\n    output reg          cmd_ready,\n    output reg [4:0]    chsel,\n    output reg          soc,\n    output reg          usr_pwd,\n    output reg          tsen,\n    output reg          sync_valid\n\n);\n\nreg [4:0]   ctrl_state;\nreg [4:0]   ctrl_state_nxt;\nreg         clk_dft_synch_dly;\nreg         eoc_synch_dly;\nreg [4:0]   chsel_nxt;\nreg         soc_nxt;\nreg         usr_pwd_nxt;\nreg         tsen_nxt;\nreg         prev_cmd_is_ts;\nreg         cmd_fetched;\nreg         pend;\nreg [4:0]   cmd_channel_dly;\nreg         cmd_sop_dly;\nreg         cmd_eop_dly;\nreg [7:0]   int_timer;\nreg [17:0]  avrg_sum;\nreg         avrg_cnt_done;\nreg         frst_64_ptr_done;\nreg         conv_dly1_s_flp;\nreg [11:0]  dout_flp;\nreg [4:0]   prev_ctrl_state;\nreg [4:0]   sync_ctrl_state;\nreg [4:0]   sync_ctrl_state_nxt;\n\nwire        clk_dft_synch;\nwire        eoc_synch;\nwire        clk_dft_lh;\nwire        clk_dft_hl;\nwire        eoc_hl;\nwire        cmd_is_rclb;\nwire        cmd_is_ts;\nwire        arc_conv_conv_dly1;\nwire        arc_sync1_conv_dly1;\nwire        arc_wait_pend_wait_pend_dly1;\nwire        arc_sync1_wait_pend_dly1;\nwire        arc_to_conv;\nwire        arc_to_avrg_cnt;\nwire        load_rsp;\nwire        load_cmd_ready;\nwire        arc_getcmd_w_pwrdwn;\nwire        arc_getcmd_pwrdwn;\nwire        load_cmd_fetched;\nwire        load_int_timer;\nwire        incr_int_timer;\nwire        arc_out_from_pwrup_soc;\nwire        clr_cmd_fetched;\nwire        adc_change_mode;\nwire        add_avrg_sum;\nwire        add_avrg_sum_run;\nwire        clear_avrg_sum;\nwire        clear_avrg_cnt_done;\nwire        set_frst_64_ptr_done;\nwire        clear_frst_64_ptr_done;\nwire [11:0] fifo_q;\nwire        fifo_sclr;\nwire        fifo_rdreq;\nwire        fifo_wrreq;\nwire        putresp_s;\nwire        putresp_pend_s;\nwire        pwrdwn_s;\nwire        pwrdwn_tsen_s;\nwire        avrg_cnt_s;\nwire        wait_pend_dly1_s;\nwire        conv_dly1_s;\nwire        conv_s;\nwire        putresp_dly3_s;\nwire        load_dout;\nwire        avrg_enable;\nwire [11:0] rsp_data_nxt;\n\nlocalparam [4:0]    IDLE                = 5'b00000;\nlocalparam [4:0]    PWRDWN              = 5'b00001;\nlocalparam [4:0]    PWRDWN_TSEN         = 5'b00010;\nlocalparam [4:0]    PWRDWN_DONE         = 5'b00011;\nlocalparam [4:0]    PWRUP_CH            = 5'b00100;\nlocalparam [4:0]    PWRUP_SOC           = 5'b00101;\nlocalparam [4:0]    WAIT                = 5'b00110;\nlocalparam [4:0]    GETCMD              = 5'b00111;\nlocalparam [4:0]    GETCMD_W            = 5'b01000;\nlocalparam [4:0]    PRE_CONV            = 5'b01001;\nlocalparam [4:0]    CONV                = 5'b01010; // Drive chsel. Get out of this state when falling edge of EOC detected (DOUT is ready for sample)\n                                                    // Read averaging fifo.\n                                                    // Capture DOUT into dout internal buffer register (dout_flp) \nlocalparam [4:0]    CONV_DLY1           = 5'b01011; // Additional state for processing when DOUT is ready. Perform averaging calculation (adds and minus operation). \nlocalparam [4:0]    PUTRESP             = 5'b01100; // Load response\nlocalparam [4:0]    PUTRESP_DLY1        = 5'b01101;\nlocalparam [4:0]    PUTRESP_DLY2        = 5'b01110;\nlocalparam [4:0]    PUTRESP_DLY3        = 5'b01111;\nlocalparam [4:0]    WAIT_PEND           = 5'b10000; // Get out of this state when falling edge of EOC detected (DOUT is ready for sample)\n                                                    // Read averaging fifo.\n                                                    // Capture DOUT into dout internal buffer register (dout_flp) \nlocalparam [4:0]    WAIT_PEND_DLY1      = 5'b10001; // Additional state for processing when DOUT is ready. Perform averaging calculation (adds and minus operation).\nlocalparam [4:0]    PUTRESP_PEND        = 5'b10010; // Load response\nlocalparam [4:0]    AVRG_CNT            = 5'b10011;\nlocalparam [4:0]    SYNC1               = 5'b10100; // Allocates 1 soft ip clock mismatch due to asynchronous between soft ip clock and ADC clock domain\n\nlocalparam [7:0]    NUM_AVRG_POINTS     = 8'd64;\n\n//--------------------------------------------------------------------------------------------//\n// Double Synchronize control signal from ADC hardblock\n//--------------------------------------------------------------------------------------------//\naltera_std_synchronizer #(\n    .depth    (2)\n) u_clk_dft_synchronizer (\n    .clk        (clk),\n    .reset_n    (rst_n),\n    .din        (clk_dft),\n    .dout       (clk_dft_synch)\n);\n\naltera_std_synchronizer #(\n    .depth    (2)\n) u_eoc_synchronizer (\n    .clk        (clk),\n    .reset_n    (rst_n),\n    .din        (eoc),\n    .dout       (eoc_synch)\n);\n\n\n\n//--------------------------------------------------------------------------------------------//\n// Edge detection for both synchronized clk_dft and eoc\n//--------------------------------------------------------------------------------------------//\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n) begin\n        clk_dft_synch_dly   <= 1'b0;\n        eoc_synch_dly       <= 1'b0;\n    end\n    else begin\n        clk_dft_synch_dly   <= clk_dft_synch;\n        eoc_synch_dly       <= eoc_synch;\n    end\nend\n\nassign clk_dft_lh   = clk_dft_synch & ~clk_dft_synch_dly;\nassign clk_dft_hl   = ~clk_dft_synch & clk_dft_synch_dly;\nassign eoc_hl       = ~eoc_synch & eoc_synch_dly;\n\n\n//--------------------------------------------------------------------------------------------//\n// Dual ADC\n//--------------------------------------------------------------------------------------------//\n\ngenerate\nif (dual_adc_mode == 1) begin\n\n    // Buffer up ctrl_state\n    // To be used when both ADC is out of sync\n    always @(posedge clk or negedge rst_n) begin\n        if (!rst_n)\n            prev_ctrl_state   <= IDLE;\n        else\n            prev_ctrl_state   <= ctrl_state;\n    end\n\n    // Buffer up ctrl_state\n    // To be used when both ADC mismatches by 1 soft ip clock\n    always @(posedge clk or negedge rst_n) begin\n        if (!rst_n)\n            sync_ctrl_state   <= IDLE;\n        else\n            sync_ctrl_state   <= sync_ctrl_state_nxt;\n    end\n\nend\nelse begin\n\n    always @* begin\n        prev_ctrl_state = 5'h0;\n        sync_ctrl_state = 5'h0;\n    end\n\nend\nendgenerate\n\n\n\n//--------------------------------------------------------------------------------------------//\n// Main FSM\n//--------------------------------------------------------------------------------------------//\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        ctrl_state   <= IDLE;\n    else\n        ctrl_state   <= ctrl_state_nxt;\nend\n\n\nalways @* begin\n\n    // Default assignment, perform assignment only at relevant state\n    sync_ctrl_state_nxt = sync_ctrl_state;\n    sync_valid          = 1'b0;\n\n    case (ctrl_state)\n        IDLE: begin\n            if (clk_in_pll_locked)\n                ctrl_state_nxt = PWRDWN;\n            else\n                ctrl_state_nxt = IDLE;\n        end\n\n        PWRDWN: begin\n            if (int_timer[6])\n                ctrl_state_nxt = PWRDWN_TSEN;\n            else\n                ctrl_state_nxt = PWRDWN;\n        end\n\n        PWRDWN_TSEN: begin\n            if (int_timer[7])\n                ctrl_state_nxt = PWRDWN_DONE;\n            else\n                ctrl_state_nxt = PWRDWN_TSEN;\n        end\n\n        PWRDWN_DONE: begin\n            if (dual_adc_mode == 1) begin\n                if (clk_dft_lh) begin\n                    if (sync_ready)\n                        ctrl_state_nxt = PWRUP_CH;\n                    else\n                        ctrl_state_nxt = SYNC1;\n                end\n                else begin\n                    ctrl_state_nxt = PWRDWN_DONE;\n                end\n\n                if (clk_dft_lh) begin\n                    sync_ctrl_state_nxt = PWRUP_CH;\n                    sync_valid          = 1'b1;\n                end\n                \n            end\n            else begin\n                if (clk_dft_lh)\n                    ctrl_state_nxt = PWRUP_CH;\n                else\n                    ctrl_state_nxt = PWRDWN_DONE;\n            end\n        end\n\n        PWRUP_CH: begin\n            if (dual_adc_mode == 1) begin\n                if (clk_dft_hl) begin\n                    if (sync_ready)\n                        ctrl_state_nxt = PWRUP_SOC;\n                    else\n                        ctrl_state_nxt = SYNC1;\n                end\n                else begin\n                    ctrl_state_nxt = PWRUP_CH;\n                end\n\n                if (clk_dft_hl) begin\n                    sync_ctrl_state_nxt = PWRUP_SOC;\n                    sync_valid          = 1'b1;\n                end\n\n            end\n            else begin\n                if (clk_dft_hl)\n                    ctrl_state_nxt = PWRUP_SOC;\n                else\n                    ctrl_state_nxt = PWRUP_CH;\n            end\n        end\n\n        PWRUP_SOC: begin\n            if (dual_adc_mode == 1) begin\n                if (eoc_hl) begin\n                    if (sync_ready) begin\n                        if (cmd_fetched & ~cmd_is_rclb)\n                            ctrl_state_nxt = CONV;\n                        else if (cmd_fetched & cmd_is_rclb)\n                            ctrl_state_nxt = PUTRESP;\n                        else if (cmd_valid)\n                            ctrl_state_nxt = GETCMD;\n                        else\n                            ctrl_state_nxt = WAIT;\n                    end\n                    else begin\n                        ctrl_state_nxt = SYNC1;\n                    end\n                end\n                else begin\n                    ctrl_state_nxt = PWRUP_SOC;\n                end\n\n                if (eoc_hl) begin\n                    if (cmd_fetched & ~cmd_is_rclb)\n                        sync_ctrl_state_nxt = CONV;\n                    else if (cmd_fetched & cmd_is_rclb)\n                        sync_ctrl_state_nxt = PUTRESP;\n                    else if (cmd_valid)\n                        sync_ctrl_state_nxt = GETCMD;\n                    else\n                        sync_ctrl_state_nxt = WAIT;\n\n                    sync_valid  = 1'b1;\n                end\n\n            end\n            else begin\n                if (cmd_fetched & ~cmd_is_rclb & eoc_hl)\n                    ctrl_state_nxt = CONV;\n                else if (cmd_fetched & cmd_is_rclb & eoc_hl)\n                    ctrl_state_nxt = PUTRESP;\n                else if (cmd_valid & eoc_hl)\n                    ctrl_state_nxt = GETCMD;\n                else if (eoc_hl)\n                    ctrl_state_nxt = WAIT;\n                else\n                    ctrl_state_nxt = PWRUP_SOC;\n            end\n        end\n\n        SYNC1: begin\n            if (sync_ready)\n                ctrl_state_nxt = sync_ctrl_state;   // mismatches by 1 soft ip clock, proceed to next state\n            else\n                ctrl_state_nxt = prev_ctrl_state;   // Both ADC is out of sync, go back to previous state\n\n            sync_valid  = 1'b1;\n\n        end\n        \n        WAIT: begin\n            if (cmd_valid)\n                ctrl_state_nxt = GETCMD_W;\n            else\n                ctrl_state_nxt = WAIT;\n        end\n\n        GETCMD_W: begin\n            if (cmd_is_rclb | adc_change_mode)\n                ctrl_state_nxt = PWRDWN;\n            else\n                ctrl_state_nxt = PRE_CONV;\n        end\n\n        PRE_CONV: begin\n            if (dual_adc_mode == 1) begin\n                if (eoc_hl) begin\n                    if (sync_ready)\n                        ctrl_state_nxt = CONV;\n                    else\n                        ctrl_state_nxt = SYNC1;\n                end\n                else begin\n                    ctrl_state_nxt = PRE_CONV;\n                end\n\n                if (eoc_hl) begin\n                    sync_ctrl_state_nxt = CONV;\n                    sync_valid          = 1'b1;\n                end\n\n            end\n            else begin\n                if (eoc_hl)\n                    ctrl_state_nxt = CONV;\n                else\n                    ctrl_state_nxt = PRE_CONV;\n            end\n        end\n\n        GETCMD: begin\n            if ((cmd_is_rclb | adc_change_mode) & ~pend)\n                ctrl_state_nxt = PWRDWN;\n            else if ((cmd_is_rclb | adc_change_mode) & pend)\n                ctrl_state_nxt = WAIT_PEND;\n            else\n                ctrl_state_nxt = CONV;\n        end\n\n        CONV: begin\n            if (dual_adc_mode == 1) begin\n                if (eoc_hl) begin\n                    if (sync_ready) begin\n                        if (avrg_enable & ~avrg_cnt_done)\n                            ctrl_state_nxt = AVRG_CNT;\n                        else\n                            ctrl_state_nxt = CONV_DLY1;\n                    end\n                    else begin\n                        ctrl_state_nxt = SYNC1;\n                    end\n                end\n                else begin\n                    ctrl_state_nxt = CONV;\n                end\n\n                if (eoc_hl) begin\n                    if (avrg_enable & ~avrg_cnt_done)\n                        sync_ctrl_state_nxt = AVRG_CNT;\n                    else \n                        sync_ctrl_state_nxt = CONV_DLY1;\n\n                    sync_valid  = 1'b1;\n                end\n\n            end\n            else begin\n                if (eoc_hl & avrg_enable & ~avrg_cnt_done)\n                    ctrl_state_nxt = AVRG_CNT;\n                else if (eoc_hl)\n                    ctrl_state_nxt = CONV_DLY1;\n                else\n                    ctrl_state_nxt = CONV;\n            end\n        end\n        \n        AVRG_CNT: begin\n            ctrl_state_nxt = CONV;\n        end\n        \n        CONV_DLY1: begin\n            ctrl_state_nxt = PUTRESP;\n        end\n\n        PUTRESP: begin\n            ctrl_state_nxt = PUTRESP_DLY1;\n        end\n        \n        PUTRESP_DLY1: begin\n            ctrl_state_nxt = PUTRESP_DLY2;\n        end\n        \n        PUTRESP_DLY2: begin\n            ctrl_state_nxt = PUTRESP_DLY3;\n        end\n\n        PUTRESP_DLY3: begin\n            if (cmd_valid)\n                ctrl_state_nxt = GETCMD;\n            else if (pend)\n                ctrl_state_nxt = WAIT_PEND;\n            else\n                ctrl_state_nxt = WAIT;\n        end\n\n        WAIT_PEND: begin\n            if (dual_adc_mode == 1) begin\n                if (eoc_hl) begin\n                    if (sync_ready)\n                        ctrl_state_nxt = WAIT_PEND_DLY1;\n                    else\n                        ctrl_state_nxt = SYNC1;\n                end\n                else begin\n                    ctrl_state_nxt = WAIT_PEND;\n                end\n\n                if (eoc_hl) begin\n                    sync_ctrl_state_nxt = WAIT_PEND_DLY1;\n                    sync_valid          = 1'b1;\n                end\n\n            end\n            else begin\n                if (eoc_hl)\n                    ctrl_state_nxt = WAIT_PEND_DLY1;\n                else\n                    ctrl_state_nxt = WAIT_PEND;\n            end\n        end\n        \n        WAIT_PEND_DLY1: begin\n            ctrl_state_nxt = PUTRESP_PEND;\n        end\n        \n        PUTRESP_PEND: begin\n            if (cmd_valid)\n                ctrl_state_nxt = GETCMD;\n            else\n                ctrl_state_nxt = WAIT;\n        end\n\n        default: begin\n            ctrl_state_nxt = IDLE;\n        end\n\n    endcase\nend\n\n\n\n//--------------------------------------------------------------------------------------------//\n// ADC control signal generation from FSM\n//--------------------------------------------------------------------------------------------//\nalways @* begin\n    chsel_nxt       = chsel;\n    soc_nxt         = soc;\n    usr_pwd_nxt     = usr_pwd;\n    tsen_nxt        = tsen;\n\n    case (ctrl_state_nxt)\n        IDLE: begin\n            chsel_nxt   = 5'b11110;\n            soc_nxt     = 1'b0;\n            usr_pwd_nxt = 1'b1;\n            tsen_nxt    = 1'b0;\n        end\n\n        PWRDWN: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = 1'b0;\n            usr_pwd_nxt = 1'b1;\n            tsen_nxt    = tsen;\n        end\n\n        PWRDWN_TSEN: begin\n            //chsel_nxt   = chsel;\n            soc_nxt     = 1'b0;\n            usr_pwd_nxt = 1'b1;\n            if (cmd_fetched & cmd_is_ts)        // Transition to TS mode\n                tsen_nxt    = 1'b1;\n            else if (cmd_fetched & cmd_is_rclb) // In recalibration mode, maintain previous TSEN setting\n                tsen_nxt    = tsen;\n            else\n                tsen_nxt    = 1'b0;             // Transition to Normal mode\n            \n            // Case:496977 \n            // Ensure the right chsel during power up sequence (voltage sensing mode vs temperature sensing mode)\n            if (cmd_fetched & (cmd_is_ts | (cmd_is_rclb & tsen)))   // Set channel select to TSD channel if transition to TS mode or recalibration on TS mode\n                chsel_nxt   = 5'b10001;\n            else\n                chsel_nxt   = 5'b11110;                                // Set channel select to dummy channel for voltage sensing mode (just like the original design)\n        end\n\n        PWRDWN_DONE: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = 1'b0;\n            usr_pwd_nxt = 1'b0;\n            tsen_nxt    = tsen;\n        end\n\n        PWRUP_CH: begin\n            //chsel_nxt   = 5'b11110;\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = 1'b0;\n            tsen_nxt    = tsen;\n        end\n\n        PWRUP_SOC: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = 1'b1;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        SYNC1: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        WAIT: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        GETCMD_W: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        PRE_CONV: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        GETCMD: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        CONV: begin\n            chsel_nxt   = cmd_channel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n        \n        AVRG_CNT: begin\n            chsel_nxt   = cmd_channel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n        \n        CONV_DLY1: begin\n            chsel_nxt   = cmd_channel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        PUTRESP: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n        \n        PUTRESP_DLY1: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        PUTRESP_DLY2: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n        \n        PUTRESP_DLY3: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        WAIT_PEND: begin\n            //chsel_nxt   = chsel;\n            if (tsen)\n                chsel_nxt   = chsel;         \n            else                             \n                chsel_nxt   = 5'b11110;     // The reason for this change is to support ADC's simulation model (case:226093).\n                                            // During the final sampling cycle which meant to complete the pending ADC sampling (ADC output is one cycle delay in nature),\n                                            // we assign a dummy channel value instead of maintaining the previous channel value. Functionally, it does not matter. \n                                            // But it does matter to simulation model where it keep popping up the expected value from user's simulation file based on current channel value.\n                                            // This will avoid the simulation model from incorrectly popping out the value from previous channel twice during ADC mode transition.\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n        \n        WAIT_PEND_DLY1: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n\n        PUTRESP_PEND: begin\n            chsel_nxt   = chsel;\n            soc_nxt     = soc;\n            usr_pwd_nxt = usr_pwd;\n            tsen_nxt    = tsen;\n        end\n        \n        default: begin\n            chsel_nxt   = 5'bx;\n            soc_nxt     = 1'bx;\n            usr_pwd_nxt = 1'bx;\n            tsen_nxt    = 1'bx;\n        end\n\n    endcase\nend\n\n\n\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n) begin\n        chsel       <= 5'b11110;\n        soc         <= 1'b0;\n        usr_pwd     <= 1'b1;\n        tsen        <= 1'b0;\n    end\n    else begin\n        chsel       <= chsel_nxt;\n        soc         <= soc_nxt;\n        usr_pwd     <= usr_pwd_nxt;\n        tsen        <= tsen_nxt;\n\n    end\nend\n\n\n\n//--------------------------------------------------------------------------------------------//\n// Control signal from FSM arc transition\n//--------------------------------------------------------------------------------------------//\n// These 3 events indicate DOUT from ADC hardblock is ready to be consumed.\nassign arc_conv_conv_dly1               = (ctrl_state == CONV) & (ctrl_state_nxt == CONV_DLY1);\nassign arc_wait_pend_wait_pend_dly1     = (ctrl_state == WAIT_PEND) & (ctrl_state_nxt == WAIT_PEND_DLY1);\nassign arc_to_avrg_cnt                  = ((ctrl_state == CONV) & (ctrl_state_nxt == AVRG_CNT)) | ((ctrl_state == SYNC1) & (ctrl_state_nxt == AVRG_CNT));\n\n// CONV to CONV_DLY1 can also be trasition from SYNC1 in dual adc mode \n// WAIT_PEND to WAIT_PEND_DLY1 can also be trasition from SYNC1 in dual adc mode \nassign arc_sync1_conv_dly1              = (ctrl_state == SYNC1) & (ctrl_state_nxt == CONV_DLY1);        // prev_ctrl_state is guaranteed by design to be CONV\nassign arc_sync1_wait_pend_dly1         = (ctrl_state == SYNC1) & (ctrl_state_nxt == WAIT_PEND_DLY1);   // prev_ctrl_state is guaranteed by design to be WAIT_PEND\n\n\n//--------------------------------------------------------------------------------------------//\n// Control signal from FSM current state\n//--------------------------------------------------------------------------------------------//\nassign putresp_s        = (ctrl_state == PUTRESP);\nassign putresp_pend_s   = (ctrl_state == PUTRESP_PEND);\nassign pwrdwn_s         = (ctrl_state == PWRDWN);\nassign pwrdwn_tsen_s    = (ctrl_state == PWRDWN_TSEN);\nassign avrg_cnt_s       = (ctrl_state == AVRG_CNT);\nassign wait_pend_dly1_s = (ctrl_state == WAIT_PEND_DLY1);\nassign conv_dly1_s      = (ctrl_state == CONV_DLY1);\nassign conv_s           = (ctrl_state == CONV);\nassign putresp_dly3_s   = (ctrl_state == PUTRESP_DLY3);\n\n\n\n// Load Response when\n// 1) In putresp state and there is pending response\n// 2) In putresp_pend state\nassign load_rsp                     = (putresp_s & ~cmd_is_rclb & pend) | putresp_pend_s;\nassign load_dout                    = ((arc_conv_conv_dly1 | arc_sync1_conv_dly1) & ~cmd_is_rclb & pend) | arc_wait_pend_wait_pend_dly1 | arc_sync1_wait_pend_dly1 | ((int_timer != 8'h0) & arc_to_avrg_cnt);\nassign load_cmd_ready               = putresp_s;\nassign arc_to_conv                  = (ctrl_state != CONV) & (ctrl_state != AVRG_CNT) & ~((ctrl_state == SYNC1) & (prev_ctrl_state == CONV)) & (ctrl_state_nxt == CONV);\n\nassign arc_getcmd_w_pwrdwn          = (ctrl_state == GETCMD_W) & (ctrl_state_nxt == PWRDWN);\nassign arc_getcmd_pwrdwn            = (ctrl_state == GETCMD) & (ctrl_state_nxt == PWRDWN);\nassign load_cmd_fetched             = arc_getcmd_w_pwrdwn | arc_getcmd_pwrdwn;\nassign load_int_timer               = arc_getcmd_w_pwrdwn | arc_getcmd_pwrdwn | arc_to_conv; // arc_to_conv is added for averaging\nassign incr_int_timer               = pwrdwn_s | pwrdwn_tsen_s | avrg_cnt_s; \n\nassign arc_out_from_pwrup_soc       = ((ctrl_state == PWRUP_SOC) & (ctrl_state_nxt != PWRUP_SOC) & (ctrl_state_nxt != SYNC1)) |\n                                        ((ctrl_state == SYNC1) & (prev_ctrl_state == PWRUP_SOC) & (ctrl_state_nxt != PWRUP_SOC));\nassign clr_cmd_fetched              = arc_out_from_pwrup_soc;\n\n\n//--------------------------------------------------------------------------------------------//\n// Control signal required by FSM\n//--------------------------------------------------------------------------------------------//\nassign cmd_is_rclb      = (cmd_channel == 5'b11111);\nassign cmd_is_ts        = (cmd_channel == 5'b10001);\nassign adc_change_mode  = (~prev_cmd_is_ts & cmd_is_ts) | (prev_cmd_is_ts & ~cmd_is_ts);\n\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        prev_cmd_is_ts  <= 1'b0;\n    else if (load_cmd_ready & ~cmd_is_rclb)\n        prev_cmd_is_ts  <= cmd_is_ts;\nend\n\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        cmd_fetched  <= 1'b0;\n    else if (load_cmd_fetched)\n        cmd_fetched  <= 1'b1;\n    else if (clr_cmd_fetched)\n        cmd_fetched  <= 1'b0;\nend\n\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        conv_dly1_s_flp <= 1'b0;\n    else\n        conv_dly1_s_flp <= conv_dly1_s;\nend\n\n// Using conv_dly1_s_flp instead of (ctrl_state == PUTRESP) to set the pend flag\n// This is to cover cases where during recalibration the state can go from PWRUP_SOC to PUTRESP directly \n// In averaging pend is set at pt 63, leaving pt 64 to be captured at WAIT PEND state (consistent with non-averaging)\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        pend <= 1'b0;\n    else if (conv_dly1_s_flp)\n        pend <= 1'b1;\n    else if (wait_pend_dly1_s)\n        pend <= 1'b0;\n\nend\n\n\n//------------------------------------------------------------------------------------------------------------------//\n// Register the DOUT bus from ADC hardblock\n// This eliminates sampling invalid DOUT bus (validity of DOUT bus is limited by TDAC timing spec of ADC hardblock) \n// if latency of load_rsp increases in future\n// Example: Previously DOUT is consumed by the design 2 clocks from falling edge of EOC\n//          Without this register, to support averaging, DOUT is consumed by the design 4 clocks from falling edge of EOC\n//          (additional 2 clocks for RAM accesses) \n//------------------------------------------------------------------------------------------------------------------//\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        dout_flp <= 12'd0;\n    else if (load_dout) \n        dout_flp <= dout;\nend\n\n\n//--------------------------------------------------------------------------------------------//\n// Internal timer to ensure soft power down stays at least for 1us\n// Also used as AVRG counter\n//--------------------------------------------------------------------------------------------//\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        int_timer <= 8'h0;\n    else if (load_int_timer)\n        int_timer <= 8'h0;\n    else if (incr_int_timer)\n        int_timer <= int_timer + 8'h1;\nend\n\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        avrg_cnt_done <= 1'b0;\n    else if ((int_timer == (NUM_AVRG_POINTS - 8'd1)) & conv_s)\n        avrg_cnt_done <= 1'b1;\n    else if (clear_avrg_cnt_done)\n        avrg_cnt_done <= 1'b0;\nend\n\nassign clear_avrg_cnt_done = putresp_dly3_s & ~cmd_valid; // Restart 64 point sampling if continuous sample is broken  \n\n//--------------------------------------------------------------------------------------------//\n// Store up CMD information due to \n// Resp is always one clk_dft later from current cmd (ADC hardblock characteristic)\n//--------------------------------------------------------------------------------------------//\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n) begin\n        cmd_channel_dly <= 5'h0;\n        cmd_sop_dly     <= 1'b0;\n        cmd_eop_dly     <= 1'b0;\n    end\n    else if (load_cmd_ready) begin\n        cmd_channel_dly <= cmd_channel;\n        cmd_sop_dly     <= cmd_sop;\n        cmd_eop_dly     <= cmd_eop;\n    end\nend\n\n\n\n//--------------------------------------------------------------------------------------------//\n// Averaging logic \n// \n//--------------------------------------------------------------------------------------------//\n// Only temperature sensing mode has averaging feature\nassign avrg_enable = cmd_is_ts;\n\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        avrg_sum    <= 18'h0;\n    else if (clear_avrg_sum)\n        avrg_sum    <= 18'h0;\n    else if (add_avrg_sum_run)\n        avrg_sum  <= (avrg_sum - fifo_q) + {6'h0, dout_flp};\n    else if (add_avrg_sum)\n        avrg_sum  <= avrg_sum + {6'h0, dout_flp};\nend\n\nassign add_avrg_sum     = ((int_timer != 8'h0) & avrg_cnt_s) |  // when int_timer == 0 the DOUT is not yet ready (ADC hard block introduce one ADC clock delay in the ADC output) \n                            (conv_dly1_s & avrg_enable & pend) |    // cover averaging pt 64 and beyond (in back 2 back TS scenario)\n                            (conv_dly1_s & avrg_enable & ~pend & ~frst_64_ptr_done) | // cover averaging pt 63\n                            (wait_pend_dly1_s & prev_cmd_is_ts); // cover averaging pt 64 and beyond (in switching between ts to non-ts scenario)\n\nassign add_avrg_sum_run = set_frst_64_ptr_done & frst_64_ptr_done;\n\nassign clear_avrg_sum           = ~avrg_cnt_done & putresp_pend_s;  // Restart 64 point sampling if continuous sample is broken\n                                                                    // Not avrg_cnt_done is to ensure put response pending state is caused by broken continuous sampling\n\nassign set_frst_64_ptr_done     = (wait_pend_dly1_s & prev_cmd_is_ts) | // set at averaging pt 64 and beyond (where next conversion is non-ts)\n                                    (conv_dly1_s & avrg_enable & pend); // set at averaging pt 64 and beyond (where next conversion is ts)\n                                                                        // No harm to set this signal beyond pt 64\n\nassign clear_frst_64_ptr_done   = clear_avrg_sum;\n\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        frst_64_ptr_done <= 1'b0;\n    else if (set_frst_64_ptr_done)\n        frst_64_ptr_done <= 1'b1;\n    else if (clear_frst_64_ptr_done)\n        frst_64_ptr_done <= 1'b0;\nend\n\nassign fifo_sclr    = clear_avrg_sum;\nassign fifo_rdreq   = (((arc_wait_pend_wait_pend_dly1 | arc_sync1_wait_pend_dly1) & prev_cmd_is_ts) | ((arc_conv_conv_dly1 | arc_sync1_conv_dly1) & avrg_enable & pend)) & frst_64_ptr_done;\nassign fifo_wrreq   = ((int_timer != 8'h0) & avrg_cnt_s) |\n                        (conv_dly1_s & avrg_enable & pend) |\n                        (conv_dly1_s & avrg_enable & ~pend & ~frst_64_ptr_done) |\n                        (wait_pend_dly1_s & prev_cmd_is_ts);\n\naltera_modular_adc_control_avrg_fifo ts_avrg_fifo (\n    .clock      (clk),\n    .data       (dout_flp),\n    .rdreq      (fifo_rdreq),\n    .wrreq      (fifo_wrreq),\n    .sclr       (fifo_sclr),\n    .empty      (),\n    .full       (),\n    .q          (fifo_q)\n);\n\n\n\n\n//--------------------------------------------------------------------------------------------//\n// Avalon ST response interface output register\n// Avalon ST command interface output register (cmd_ready)\n//--------------------------------------------------------------------------------------------//\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n) begin\n        rsp_valid   <= 1'b0;\n        rsp_channel <= 5'h0;\n        rsp_data    <= 12'h0;\n        rsp_sop     <= 1'b0;\n        rsp_eop     <= 1'b0;\n    end\n    else if (load_rsp) begin\n        rsp_valid   <= 1'b1;\n        rsp_channel <= cmd_channel_dly;\n        rsp_data    <= rsp_data_nxt;\n        rsp_sop     <= cmd_sop_dly;\n        rsp_eop     <= cmd_eop_dly;\n    end \n    else begin\n        rsp_valid   <= 1'b0;\n        rsp_channel <= 5'h0;\n        rsp_data    <= 12'h0;\n        rsp_sop     <= 1'b0;\n        rsp_eop     <= 1'b0;\n    end\nend\n\ngenerate\nif (is_this_first_or_second_adc == 2) begin\n    assign rsp_data_nxt = prev_cmd_is_ts ? 12'h0 : dout_flp;    // For ADC2, mask out TSD value since TSD is not supported in ADC2\nend\nelse begin\n    assign rsp_data_nxt = prev_cmd_is_ts ? avrg_sum[17:6] : dout_flp;\nend\nendgenerate\n\nalways @(posedge clk or negedge rst_n) begin\n    if (!rst_n)\n        cmd_ready   <= 1'b0;\n    else if (load_cmd_ready)\n        cmd_ready   <= 1'b1;\n    else\n        cmd_ready   <= 1'b0;\nend\n\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/submodules/chsel_code_converter_sw_to_hw.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\n// **   Filename       : chsel_code_converter_sw_to_hw.v\n// **\n// **   Description    : Translate channel code coming from software to hardware format\n// **\n// **   Change Log     :\n// **   2014/02/07     : Initial design\n// **\n// *******************************************************************************************************\n\n// synthesis translate_off\n`timescale 1ns / 1ps\n// synthesis translate_on\n\n// *******************************************************************************************************\n// **   MODULE\n// *******************************************************************************************************\n\nmodule  chsel_code_converter_sw_to_hw (\n    chsel_from_sw,            // 5-bits channel selection.\n    chsel_to_hw               // 5-bits channel selection.\n);\n\n// *******************************************************************************************************\n// **   PARAMETERS\n// *******************************************************************************************************\n\n    // Ordering Part Number 10MXX... code\n    parameter           device_partname_fivechar_prefix = \"10M08\";   // Valid options = 04, 08, 16, 25, 40, 50\n\n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\n    parameter           is_this_first_or_second_adc = 1;             // Valid options = 1 or 2\n\n// .......................................................................................................\n\n    // DESCRIBE THE LOCALPARAM CONSTANT:\n    // Actual Hardware map CHSEL[4:0] out of sequential order to different channel pad due to route-ability,\n    // Soft IP will have S/W mapping to translate it back to sequential order from user perspective (PAD label)\n\n    // 10M04/08/16 hardware equivalent chsel code for a particular software chsel code\n    localparam          variant_08n16_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00100;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch02_code_00010 = 5'b00110;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch03_code_00011 = 5'b01010;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01100;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch05_code_00101 = 5'b10000;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch06_code_00110 = 5'b01110;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01101;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00010;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch09_code_01001 = 5'b00101;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch10_code_01010 = 5'b01001;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch11_code_01011 = 5'b10001;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch12_code_01100 = 5'b01111;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch13_code_01101 = 5'b01000;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch14_code_01110 = 5'b00111;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch15_code_01111 = 5'b01011;\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch16_code_10000 = 5'b00001;\n\n    // First ADC of 10M25/40/50 hardware equivalent chsel code for a particular software chsel code\n    localparam          dual_first_adc_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00100;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch02_code_00010 = 5'b00110;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch03_code_00011 = 5'b01010;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01100;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch05_code_00101 = 5'b10000;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch06_code_00110 = 5'b01110;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01101;\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00010;\n\n    // Second ADC of 10M25/40/50 hardware equivalent chsel code for a particular software chsel code\n    // Note that: Second ADC do not support internal temperature sensor.\n    // However internal temperature sensor mapping for ADC2 is later included for dual adc mode\n    // When in dual adc mode, if ADC1 is operating in TSD mode, ADC2 will perform a dummy TSD mode as well\n    localparam          dual_second_adc_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00101;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch02_code_00010 = 5'b01001;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch03_code_00011 = 5'b10001;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01111;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch05_code_00101 = 5'b01000;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch06_code_00110 = 5'b00111;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01011;\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00001;\n\n// *******************************************************************************************************\n// **   INPUTS\n// *******************************************************************************************************\n\n    input   [4:0]       chsel_from_sw;  // 5-bits channel selection number from software perspective\n\n// *******************************************************************************************************\n// **   OUTPUTS\n// *******************************************************************************************************\n\n    output  [4:0]       chsel_to_hw;    // 5-bits channel selection code to be send to ADC Hard IP\n\n// *******************************************************************************************************\n// **   EXTERNAL NET AND REGISTER DATA TYPE (with input / output / inout ports)\n// *******************************************************************************************************\n\n    reg     [4:0]       chsel_to_hw;    // 5-bits channel selection code to be send to ADC Hard IP\n\n// *******************************************************************************************************\n// **   MAIN CODE\n// *******************************************************************************************************\n\n// -------------------------------------------------------------------------------------------------------\n//      1.00: Channel Mapping\n// -------------------------------------------------------------------------------------------------------\n\n    // DESCRIBE THE ALWAYS BLOCK:\n    // This block execute on divided internal clock\n    // Its job is mainly to determine what value to be set for the digital_out and eoc_rise\n    always @(chsel_from_sw)\n    begin\n        // DESCRIBE THE CASE STATEMENT:\n        // Output the equivalent chsel code for hardware\nif  ((device_partname_fivechar_prefix == \"10M04\") || (device_partname_fivechar_prefix == \"10M08\") || (device_partname_fivechar_prefix == \"10M16\"))\nbegin\n        // COMMENT FOR THIS BRANCH:\n        // 10M08/04 channel mapping\n        case(chsel_from_sw)\n            5'b10001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_temp_code_10001;\n            5'b00000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch00_code_00000;\n            5'b00001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch01_code_00001;\n            5'b00010: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch02_code_00010;\n            5'b00011: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch03_code_00011;\n            5'b00100: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch04_code_00100;\n            5'b00101: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch05_code_00101;\n            5'b00110: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch06_code_00110;\n            5'b00111: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch07_code_00111;\n            5'b01000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch08_code_01000;\n            5'b01001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch09_code_01001;\n            5'b01010: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch10_code_01010;\n            5'b01011: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch11_code_01011;\n            5'b01100: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch12_code_01100;\n            5'b01101: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch13_code_01101;\n            5'b01110: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch14_code_01110;\n            5'b01111: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch15_code_01111;\n            5'b10000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch16_code_10000;\n            default : chsel_to_hw <= 5'b11111;\n        endcase\nend\nelse\nif ((is_this_first_or_second_adc == 1) &&\n    ((device_partname_fivechar_prefix == \"10M25\") ||\n     (device_partname_fivechar_prefix == \"10M40\") ||\n     (device_partname_fivechar_prefix == \"10M50\")))\nbegin\n        // COMMENT FOR THIS BRANCH:\n        // First ADC of 10M25/40/50 channel mapping\n        case(chsel_from_sw)\n            5'b10001: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_temp_code_10001;\n            5'b00000: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch00_code_00000;\n            5'b00001: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch01_code_00001;\n            5'b00010: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch02_code_00010;\n            5'b00011: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch03_code_00011;\n            5'b00100: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch04_code_00100;\n            5'b00101: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch05_code_00101;\n            5'b00110: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch06_code_00110;\n            5'b00111: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch07_code_00111;\n            5'b01000: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch08_code_01000;\n            default : chsel_to_hw <= 5'b11111;\n        endcase\nend\nelse\nif ((is_this_first_or_second_adc == 2) &&\n    ((device_partname_fivechar_prefix == \"10M25\") ||\n     (device_partname_fivechar_prefix == \"10M40\") ||\n     (device_partname_fivechar_prefix == \"10M50\")))\nbegin\n        // COMMENT FOR THIS BRANCH:\n        // Second ADC of 10M25/40/50 channel mapping\n        case(chsel_from_sw)\n            5'b10001: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_temp_code_10001;\n            5'b00000: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch00_code_00000;\n            5'b00001: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch01_code_00001;\n            5'b00010: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch02_code_00010;\n            5'b00011: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch03_code_00011;\n            5'b00100: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch04_code_00100;\n            5'b00101: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch05_code_00101;\n            5'b00110: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch06_code_00110;\n            5'b00111: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch07_code_00111;\n            5'b01000: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch08_code_01000;\n            default : chsel_to_hw <= 5'b11111;\n        endcase\nend\n    end // end always\n\n// *******************************************************************************************************\n// **   END OF MODULE\n// *******************************************************************************************************\n\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/submodules/fiftyfivenm_adcblock_primitive_wrapper.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\n// **   Filename       : fiftyfivenm_adcblock_primitive_wrapper.v\n// **\n// **   Description    : The lowest layer of the ADC Mega Function code that instantiate the ADC primitive\n// **                    The purpose mirror each input/output register from ADC hard block to soft ip\n// **                    to be clocked by clf_dft signal to close timing for the path between soft and hard blocks.\n// **   Change Log     :\n// **   01/17/2014     : Initial design\n// **\n// *******************************************************************************************************\n\n// *******************************************************************************************************\n// **   DEFINES\n// *******************************************************************************************************\n// synthesis translate_off\n`timescale 1ns / 1ps\n// synthesis translate_on\n\n//`define DEBUG_AND_DEVELOPMENT 1\n\n// *******************************************************************************************************\n// **   TOP MODULE\n// *******************************************************************************************************\nmodule fiftyfivenm_adcblock_primitive_wrapper(\n    //reset,\n    chsel,               // 5-bits channel selection.\n    soc,                 // signal Start-of-Conversion to ADC\n    eoc,                 // signal end of conversion. Data can be latched on the positive edge of clk_dft after this signal becomes high.  EOC becomes low at every positive edge of the clk_dft signal.\n    dout,                // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\n    usr_pwd,             // User Power Down during run time.  0 = Power Up;  1 = Power Down.\n    tsen,                // 0 = Normal Mode; 1 = Temperature Sensing Mode.\n    clkout_adccore,      // Output clock from the clock divider\n    clkin_from_pll_c0    // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\n);\n\n// *******************************************************************************************************\n// **   PARAMETERS\n// *******************************************************************************************************\n\n// -------------------------------------------------------------------------------------------------------\n//      WRAPPED PARAMETERS USED BY fiftyfivenm_adcblock\n// -------------------------------------------------------------------------------------------------------\n\n    // 3-bits 1st stage clock divider.\n    // 0..5 = DIV by 1/2/10/20/40/80;\n    // 6..7 = invalid\n    parameter           clkdiv    = 1;\n    \n    // 2nd stage clock divider.\n    // 0 = DIV by 10;\n    // 1 = DIV by 20\n    parameter           tsclkdiv  = 0;\n    \n    // 0 = Use 1st stage clock divider when TSEN.\n    // 1 = Use 2nd stage clock divider when TSEN.\n    parameter           tsclksel  = 0;\n    \n    // 2-bits To enable the R ladder for the prescalar input channels.\n    // 00 = disable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\n    // 01 = enable prescalar for CH8 only\n    // 10 = enable prescalar for CH16 only (CH8 for device with 2nd ADC)\n    // 11 = enable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\n    // please note that this is not supported in VR mode\n    parameter           prescalar = 0;\n    \n    // Reference voltage selection for ADC.\n    // 0 = external;\n    // 1 = internal VCCADC_2P5\n    parameter           refsel    = 0;\n       \n    // Ordering Part Number 10MXX... code\n    parameter           device_partname_fivechar_prefix = \"10M08\";      // Valid options = 04, 08, 16, 25, 40, 50\n    \n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\n    parameter           is_this_first_or_second_adc = 1;    // Valid options = 1 or 2\n    \n    // is_using_dedicated_analog_input_pin_only? -> removed, replaced with analog_input_pin_mask\n    //parameter           is_using_dedicated_analog_input_pin_only = 0;\n\n    // 16 bits to indicate whether each of the dual purpose analog input pin (ADCIN) is in use or not.\n    // 1 bit to indicate whether dedicated analog input pin (ANAIN) is in use or not (bit 16) \n    parameter           analog_input_pin_mask = 17'h0;\n    \n    // Power Down. Use to disable the ADC during compilation time if no ADC is in use.\n    parameter           hard_pwd = 0;\n    \n    // Logic simulation parameters which only affects simulation behavior\n    parameter           enable_usr_sim = 0;\n    parameter           reference_voltage_sim = 65536;\n    parameter           simfilename_ch0 = \"simfilename_ch0\";\n    parameter           simfilename_ch1 = \"simfilename_ch1\";\n    parameter           simfilename_ch2 = \"simfilename_ch2\";\n    parameter           simfilename_ch3 = \"simfilename_ch3\";\n    parameter           simfilename_ch4 = \"simfilename_ch4\";\n    parameter           simfilename_ch5 = \"simfilename_ch5\";\n    parameter           simfilename_ch6 = \"simfilename_ch6\";\n    parameter           simfilename_ch7 = \"simfilename_ch7\";\n    parameter           simfilename_ch8 = \"simfilename_ch8\";\n    parameter           simfilename_ch9 = \"simfilename_ch9\";\n    parameter           simfilename_ch10 = \"simfilename_ch10\";\n    parameter           simfilename_ch11 = \"simfilename_ch11\";\n    parameter           simfilename_ch12 = \"simfilename_ch12\";\n    parameter           simfilename_ch13 = \"simfilename_ch13\";\n    parameter           simfilename_ch14 = \"simfilename_ch14\";\n    parameter           simfilename_ch15 = \"simfilename_ch15\";\n    parameter           simfilename_ch16 = \"simfilename_ch16\";\n\n\n// *******************************************************************************************************\n// **   INPUTS\n// *******************************************************************************************************\n\n    //input               reset;\n\n    input               clkin_from_pll_c0;  // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\n\n    input               soc;        // signal Start-of-Conversion to ADC\n    input               usr_pwd;    // User Power Down during run time.  0 = Power Up;  1 = Power Down.\n    input               tsen;       // 0 = Normal Mode; 1 = Temperature Sensing Mode.\n    input   [4:0]       chsel;      // 5-bits channel selection.\n\n    //reg                 reg_clk_dft_soc;\n    //reg     [4:0]       reg_clk_dft_chsel;\n\n// *******************************************************************************************************\n// **   OUTPUTS\n// *******************************************************************************************************\n\n    output              clkout_adccore;\n    output              eoc;\n\n    output  [11:0]      dout;\n    wire    [11:0]      wire_from_adc_dout;\n    //reg     [11:0]      reg_clk_dft_dout;\n\n// *******************************************************************************************************\n// **   OUTPUTS ASSIGNMENTS\n// *******************************************************************************************************\n\n    //assign       dout = reg_clk_dft_dout;\n    assign       dout = wire_from_adc_dout;\n\n// *******************************************************************************************************\n// **   INITIALIZATION\n// *******************************************************************************************************\n\n// *******************************************************************************************************\n// **   MAIN CODE\n// *******************************************************************************************************\n\n// -------------------------------------------------------------------------------------------------------\n//      1.00: Instantiate ADC Block primitive\n// -------------------------------------------------------------------------------------------------------\n`ifdef DEBUG_AND_DEVELOPMENT\n    fiftyfivenm_adcblock_emulation primitive_instance(\n`else\n    fiftyfivenm_adcblock primitive_instance(\n`endif\n        //.chsel            (reg_clk_dft_chsel),\n        //.soc              (reg_clk_dft_soc),\n        .chsel            (chsel),\n        .soc              (soc),\n        .eoc              (eoc),\n        .dout             (wire_from_adc_dout),\n        .usr_pwd          (usr_pwd),\n        .tsen             (tsen),\n        .clk_dft          (clkout_adccore),\n        .clkin_from_pll_c0(clkin_from_pll_c0)\n    );\n    defparam           primitive_instance.clkdiv                          = clkdiv;\n    defparam           primitive_instance.tsclkdiv                        = tsclkdiv;\n    defparam           primitive_instance.tsclksel                        = tsclksel;\n    defparam           primitive_instance.prescalar                       = prescalar;\n    defparam           primitive_instance.refsel                          = refsel;\n    defparam           primitive_instance.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\n    defparam           primitive_instance.is_this_first_or_second_adc     = is_this_first_or_second_adc;\n    defparam           primitive_instance.analog_input_pin_mask           = analog_input_pin_mask;\n    defparam           primitive_instance.pwd                             = hard_pwd;\n    defparam           primitive_instance.enable_usr_sim                  = enable_usr_sim;\n    defparam           primitive_instance.reference_voltage_sim           = reference_voltage_sim;\n    defparam           primitive_instance.simfilename_ch0                 = simfilename_ch0;\n    defparam           primitive_instance.simfilename_ch1                 = simfilename_ch1;\n    defparam           primitive_instance.simfilename_ch2                 = simfilename_ch2;\n    defparam           primitive_instance.simfilename_ch3                 = simfilename_ch3;\n    defparam           primitive_instance.simfilename_ch4                 = simfilename_ch4;\n    defparam           primitive_instance.simfilename_ch5                 = simfilename_ch5;\n    defparam           primitive_instance.simfilename_ch6                 = simfilename_ch6;\n    defparam           primitive_instance.simfilename_ch7                 = simfilename_ch7;\n    defparam           primitive_instance.simfilename_ch8                 = simfilename_ch8;\n    defparam           primitive_instance.simfilename_ch9                 = simfilename_ch9;\n    defparam           primitive_instance.simfilename_ch10                = simfilename_ch10;\n    defparam           primitive_instance.simfilename_ch11                = simfilename_ch11;\n    defparam           primitive_instance.simfilename_ch12                = simfilename_ch12;\n    defparam           primitive_instance.simfilename_ch13                = simfilename_ch13;\n    defparam           primitive_instance.simfilename_ch14                = simfilename_ch14;\n    defparam           primitive_instance.simfilename_ch15                = simfilename_ch15;\n    defparam           primitive_instance.simfilename_ch16                = simfilename_ch16;\n\n// -------------------------------------------------------------------------------------------------------\n//      2.00: Clock the registers with ADC Clock source\n// -------------------------------------------------------------------------------------------------------\n\n    // DESCRIBE THE ALWAYS BLOCK:\n    // The purpose is to clock the registers using clk_dft signal for timing closure\n    // ADC primitive signals type\n    // Type  Sync: chsel, soc, eoc, dout, clk_dft\n    // Type Async: usr_pwd, tsen\n    // Signals need a register clocked by clk_dft: chsel, dout, soc\n    //always @ (posedge clkout_adccore or posedge reset)\n    //begin\n    //    if (reset)\n    //    begin\n    //        // Reset signal asserted\n    //        reg_clk_dft_soc     <= 0;\n    //        reg_clk_dft_chsel   <= 0;\n    //        reg_clk_dft_dout    <= 0;\n    //    end\n    //    else\n    //    begin\n    //        reg_clk_dft_soc     <= soc;\n    //        reg_clk_dft_chsel   <= chsel;\n    //        reg_clk_dft_dout    <= wire_from_adc_dout;\n    //    end //end-if        \n    //end\n\n// *******************************************************************************************************\n// **   END OF MODULE\n// *******************************************************************************************************\n\nendmodule\n\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/submodules/fiftyfivenm_adcblock_top_wrapper.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\r\n// **   Filename       : fiftyfivenm_adcblock_top_wrapper.v\r\n// **\r\n// **   Description    : Represent the ADC BLOCK primitive with channel code mapped for software\r\n// **                    in incremental order.  The hardware chsel code is not in sequence due to routability.\r\n// **   Change Log     :\r\n// **   08/31/2013     : Initial design\r\n// **\r\n// *******************************************************************************************************\r\n\r\n// synthesis translate_off\r\r\n`timescale 1ns / 1ps\r\r\n// synthesis translate_on\r\n\r\n// *******************************************************************************************************\r\n// **   MODULE\r\n// *******************************************************************************************************\r\nmodule fiftyfivenm_adcblock_top_wrapper(\r\n    //reset,               // reset\r\n    chsel,               // 5-bits channel selection.\r\n    soc,                 // signal Start-of-Conversion to ADC\r\n    eoc,                 // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\r\n    dout,                // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    usr_pwd,             // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    tsen,                // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    clkout_adccore,      // Output clock from the clock divider\r\n    clkin_from_pll_c0   // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n    //dout_ch              // Indicator to tell that current dout data is for which channel\r\n);\r\n\r\n// *******************************************************************************************************\r\n// **   PARAMETERS\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      WRAPPED PARAMETERS USED BY fiftyfivenm_adcblock\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // 3-bits 1st stage clock divider.\r\n    // 0..5 = DIV by 1/2/10/20/40/80;\r\n    // 6..7 = invalid\r\n    parameter           clkdiv    = 1;\r\n\r\n    // 2nd stage clock divider.\r\n    // 0 = DIV by 10;\r\n    // 1 = DIV by 20\r\n    parameter           tsclkdiv  = 0;\r\n\r\n    // 0 = Use 1st stage clock divider when TSEN.\r\n    // 1 = Use 2nd stage clock divider when TSEN.\r\n    parameter           tsclksel  = 0;\r\n\r\n    // 2-bits To enable the R ladder for the prescalar input channels.\r\n    // 00 = disable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // 01 = enable prescalar for CH8 only\r\n    // 10 = enable prescalar for CH16 only (CH8 for device with 2nd ADC)\r\n    // 11 = enable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // please note that this is not supported in VR mode\r\n    parameter           prescalar = 0;\r\n\r\n    // Reference voltage selection for ADC.\r\n    // 0 = external;\r\n    // 1 = internal VCCADC_2P5\r\n    parameter           refsel    = 0;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      WRAPPED PARAMETERS  USED BY both chsel_code_converter_sw_to_hw and fiftyfivenm_adcblock\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // Ordering Part Number 10MXX... code\r\n    parameter           device_partname_fivechar_prefix = \"10M08\";      // Valid options = 04, 08, 16, 25, 40, 50\r\n\r\n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\r\n    parameter           is_this_first_or_second_adc = 1;    // Valid options = 1 or 2\r\n\r\n    // 16 bits to indicate whether each of the dual purpose analog input pin (ADCIN) is in use or not.\r\n    // 1 bit to indicate whether dedicated analog input pin (ANAIN) is in use or not (bit 16) \r\n    parameter           analog_input_pin_mask = 17'h0;\r\n    \r\n    // Power Down. Use to disable the ADC during compilation time if no ADC is in use.\r\n    parameter           hard_pwd = 0;\r\n\r\n    // Logic simulation parameters which only affects simulation behavior\r\n    parameter           enable_usr_sim = 0;\r\n    parameter           reference_voltage_sim = 65536;\r\n    parameter           simfilename_ch0 = \"simfilename_ch0\";\r\n    parameter           simfilename_ch1 = \"simfilename_ch1\";\r\n    parameter           simfilename_ch2 = \"simfilename_ch2\";\r\n    parameter           simfilename_ch3 = \"simfilename_ch3\";\r\n    parameter           simfilename_ch4 = \"simfilename_ch4\";\r\n    parameter           simfilename_ch5 = \"simfilename_ch5\";\r\n    parameter           simfilename_ch6 = \"simfilename_ch6\";\r\n    parameter           simfilename_ch7 = \"simfilename_ch7\";\r\n    parameter           simfilename_ch8 = \"simfilename_ch8\";\r\n    parameter           simfilename_ch9 = \"simfilename_ch9\";\r\n    parameter           simfilename_ch10 = \"simfilename_ch10\";\r\n    parameter           simfilename_ch11 = \"simfilename_ch11\";\r\n    parameter           simfilename_ch12 = \"simfilename_ch12\";\r\n    parameter           simfilename_ch13 = \"simfilename_ch13\";\r\n    parameter           simfilename_ch14 = \"simfilename_ch14\";\r\n    parameter           simfilename_ch15 = \"simfilename_ch15\";\r\n    parameter           simfilename_ch16 = \"simfilename_ch16\";\r\n\r\n// *******************************************************************************************************\r\n// **   INPUTS\r\n// *******************************************************************************************************\r\n\r\n    //input               reset;      // reset\r\n\r\n    input               clkin_from_pll_c0;  // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n\r\n    input               soc;        // signal Start-of-Conversion to ADC\r\n    input               usr_pwd;    // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    input               tsen;       // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    input   [4:0]       chsel;      // 5-bits channel selection.\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS\r\n// *******************************************************************************************************\r\n\r\n    output              clkout_adccore;  // Output clock from the clock divider\r\n    output              eoc;        // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\r\n    output [11:0]       dout;       // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    //output  [4:0]       dout_ch;    // Indicator to tell that current dout data is for which channel (clone of EOC)\r\n\r\n// *******************************************************************************************************\r\n// **   INTERNAL NET AND REGISTER DATA TYPE (internal signals used within this module)\r\n// *******************************************************************************************************\r\n\r\n    //reg     [4:0]       prev1_chsel; // Backup chsel, because the data available at EOC is always for chsel value at previous EOC\r\n    //reg     [4:0]       prev2_chsel; // Data for previous channel is further delay by 1 clkout_adccore due to adcblock_primitive_wrapper have a register clocked by clkout_adccore\r\n    //reg     [4:0]       dout_ch;     // Indicator to tell that current dout data is for which channel\r\n\r\n   // chsel_to_hw is the output after port mapping will be wired into chsel of fiftyfivenm_adcblock\r\n    wire    [4:0]       chsel_to_hw;\r\n\r\n// *******************************************************************************************************\r\n// **   INITIALIZATION\r\n// *******************************************************************************************************\r\n\r\n    //initial begin\r\n        //prev1_chsel = 0;\r\n        //prev2_chsel = 0;\r\n        //dout_ch    = 0;\r\n    //end\r\n\r\n// *******************************************************************************************************\r\n// **   MAIN CODE\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      1.00: Instantiate Software to Hardware Channel Mapping module\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    chsel_code_converter_sw_to_hw decoder(\r\n        // The 5-bits chsel input port are wired to chsel_from_sw for conversion\r\n        .chsel_from_sw(chsel),\r\n        // The chsel_code_converter_sw_to_hw output chsel_to_hw which will be wired into fiftyfivenm_adcblock\r\n        .chsel_to_hw(chsel_to_hw)\r\n    );\r\n    defparam           decoder.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\r\n    defparam           decoder.is_this_first_or_second_adc     = is_this_first_or_second_adc;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      2.00: Instantiate ADC Block primitive\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    fiftyfivenm_adcblock_primitive_wrapper adcblock_instance(\r\n       // .reset            (reset),\r\n        .chsel            (chsel_to_hw),\r\n        .soc              (soc),\r\n        .eoc              (eoc),\r\n        .dout             (dout),\r\n        .usr_pwd          (usr_pwd),\r\n        .tsen             (tsen),\r\n        .clkout_adccore   (clkout_adccore),\r\n        .clkin_from_pll_c0(clkin_from_pll_c0)\r\n    );\r\n    defparam  adcblock_instance.clkdiv                          = clkdiv;\r\n    defparam  adcblock_instance.tsclkdiv                        = tsclkdiv;\r\n    defparam  adcblock_instance.tsclksel                        = tsclksel;\r\n    defparam  adcblock_instance.prescalar                       = prescalar;\r\n    defparam  adcblock_instance.refsel                          = refsel;\r\n    defparam  adcblock_instance.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\r\n    defparam  adcblock_instance.is_this_first_or_second_adc     = is_this_first_or_second_adc;\r\n    defparam  adcblock_instance.analog_input_pin_mask           = analog_input_pin_mask;\r\n    defparam  adcblock_instance.hard_pwd                        = hard_pwd;\r\n    defparam  adcblock_instance.enable_usr_sim                  = enable_usr_sim;\r\n    defparam  adcblock_instance.reference_voltage_sim           = reference_voltage_sim;\r\n    defparam  adcblock_instance.simfilename_ch0                 = simfilename_ch0;\r\n    defparam  adcblock_instance.simfilename_ch1                 = simfilename_ch1;\r\n    defparam  adcblock_instance.simfilename_ch2                 = simfilename_ch2;\r\n    defparam  adcblock_instance.simfilename_ch3                 = simfilename_ch3;\r\n    defparam  adcblock_instance.simfilename_ch4                 = simfilename_ch4;\r\n    defparam  adcblock_instance.simfilename_ch5                 = simfilename_ch5;\r\n    defparam  adcblock_instance.simfilename_ch6                 = simfilename_ch6;\r\n    defparam  adcblock_instance.simfilename_ch7                 = simfilename_ch7;\r\n    defparam  adcblock_instance.simfilename_ch8                 = simfilename_ch8;\r\n    defparam  adcblock_instance.simfilename_ch9                 = simfilename_ch9;\r\n    defparam  adcblock_instance.simfilename_ch10                = simfilename_ch10;\r\n    defparam  adcblock_instance.simfilename_ch11                = simfilename_ch11;\r\n    defparam  adcblock_instance.simfilename_ch12                = simfilename_ch12;\r\n    defparam  adcblock_instance.simfilename_ch13                = simfilename_ch13;\r\n    defparam  adcblock_instance.simfilename_ch14                = simfilename_ch14;\r\n    defparam  adcblock_instance.simfilename_ch15                = simfilename_ch15;\r\n    defparam  adcblock_instance.simfilename_ch16                = simfilename_ch16;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      4.00: Update dout_ch to tell current dout data is for which channel\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // DESCRIBE THE ALWAYS BLOCK:\r\n    // output previously backed-up chsel to dout_ch\r\n    // backup existing chsel to later use\r\n   // always @ (posedge clkout_adccore or posedge reset)\r\n   // begin\r\n   //     if (reset)\r\n   //     begin\r\n   //         dout_ch     <= 0;\r\n   //         prev2_chsel <= 0;\r\n   //         prev1_chsel <= 0;\r\n   //     end\r\n   //     else\r\n   //     begin\r\n   //         dout_ch     <= prev2_chsel;\r\n   //         prev2_chsel <= prev1_chsel;\r\n   //         prev1_chsel <= chsel;\r\n   //     end //end-if\r\n   // end\r\n\r\n// *******************************************************************************************************\r\n// **   END OF MODULE\r\n// *******************************************************************************************************\r\n\r\nendmodule\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/submodules/myadc_modular_adc_0.v",
    "content": "// myadc_modular_adc_0.v\n\n// This file was auto-generated from altera_modular_adc_hw.tcl.  If you edit it your changes\n// will probably be lost.\n// \n// Generated using ACDS version 18.0 614\n\n`timescale 1 ps / 1 ps\nmodule myadc_modular_adc_0 (\n\t\tinput  wire        clock_clk,              //          clock.clk\n\t\tinput  wire        reset_sink_reset_n,     //     reset_sink.reset_n\n\t\tinput  wire        adc_pll_clock_clk,      //  adc_pll_clock.clk\n\t\tinput  wire        adc_pll_locked_export,  // adc_pll_locked.export\n\t\tinput  wire        command_valid,          //        command.valid\n\t\tinput  wire [4:0]  command_channel,        //               .channel\n\t\tinput  wire        command_startofpacket,  //               .startofpacket\n\t\tinput  wire        command_endofpacket,    //               .endofpacket\n\t\toutput wire        command_ready,          //               .ready\n\t\toutput wire        response_valid,         //       response.valid\n\t\toutput wire [4:0]  response_channel,       //               .channel\n\t\toutput wire [11:0] response_data,          //               .data\n\t\toutput wire        response_startofpacket, //               .startofpacket\n\t\toutput wire        response_endofpacket    //               .endofpacket\n\t);\n\n\taltera_modular_adc_control #(\n\t\t.clkdiv                          (2),\n\t\t.tsclkdiv                        (1),\n\t\t.tsclksel                        (1),\n\t\t.hard_pwd                        (0),\n\t\t.prescalar                       (0),\n\t\t.refsel                          (1),\n\t\t.device_partname_fivechar_prefix (\"10M08\"),\n\t\t.is_this_first_or_second_adc     (1),\n\t\t.analog_input_pin_mask           (65536),\n\t\t.dual_adc_mode                   (0),\n\t\t.enable_usr_sim                  (0),\n\t\t.reference_voltage_sim           (65536),\n\t\t.simfilename_ch0                 (\"\"),\n\t\t.simfilename_ch1                 (\"\"),\n\t\t.simfilename_ch2                 (\"\"),\n\t\t.simfilename_ch3                 (\"\"),\n\t\t.simfilename_ch4                 (\"\"),\n\t\t.simfilename_ch5                 (\"\"),\n\t\t.simfilename_ch6                 (\"\"),\n\t\t.simfilename_ch7                 (\"\"),\n\t\t.simfilename_ch8                 (\"\"),\n\t\t.simfilename_ch9                 (\"\"),\n\t\t.simfilename_ch10                (\"\"),\n\t\t.simfilename_ch11                (\"\"),\n\t\t.simfilename_ch12                (\"\"),\n\t\t.simfilename_ch13                (\"\"),\n\t\t.simfilename_ch14                (\"\"),\n\t\t.simfilename_ch15                (\"\"),\n\t\t.simfilename_ch16                (\"\")\n\t) control_internal (\n\t\t.clk               (clock_clk),              //         clock.clk\n\t\t.cmd_valid         (command_valid),          //       command.valid\n\t\t.cmd_channel       (command_channel),        //              .channel\n\t\t.cmd_sop           (command_startofpacket),  //              .startofpacket\n\t\t.cmd_eop           (command_endofpacket),    //              .endofpacket\n\t\t.cmd_ready         (command_ready),          //              .ready\n\t\t.rst_n             (reset_sink_reset_n),     //    reset_sink.reset_n\n\t\t.rsp_valid         (response_valid),         //      response.valid\n\t\t.rsp_channel       (response_channel),       //              .channel\n\t\t.rsp_data          (response_data),          //              .data\n\t\t.rsp_sop           (response_startofpacket), //              .startofpacket\n\t\t.rsp_eop           (response_endofpacket),   //              .endofpacket\n\t\t.clk_in_pll_c0     (adc_pll_clock_clk),      // adc_pll_clock.clk\n\t\t.clk_in_pll_locked (adc_pll_locked_export),  //   conduit_end.export\n\t\t.sync_valid        (),                       //   (terminated)\n\t\t.sync_ready        (1'b0)                    //   (terminated)\n\t);\n\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/synopsys/vcs/vcs_setup.sh",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 18.0 614 win32 2021.05.28.12:56:47\n\n# ----------------------------------------\n# vcs - auto-generated simulation script\n\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     myadc\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level shell script that compiles Altera simulation libraries\n# and the Quartus-generated IP in your project, along with your design and\n# testbench files, follow the guidelines below.\n# \n# 1) Copy the shell script text from the TOP-LEVEL TEMPLATE section\n# below into a new file, e.g. named \"vcs_sim.sh\".\n# \n# 2) Copy the text from the DESIGN FILE LIST & OPTIONS TEMPLATE section into\n# a separate file, e.g. named \"filelist.f\".\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # TOP_LEVEL_NAME is used in the Quartus-generated IP simulation script to\n# # set the top-level simulation or testbench module/entity name.\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator.\n# #\n# # Source the Quartus-generated IP simulation script and do the following:\n# # - Compile the Quartus EDA simulation library and IP simulation files.\n# # - Specify TOP_LEVEL_NAME and QSYS_SIMDIR.\n# # - Compile the design and top-level simulation module/entity using\n# #   information specified in \"filelist.f\".\n# # - Override the default USER_DEFINED_SIM_OPTIONS. For example, to run\n# #   until $finish(), set to an empty string: USER_DEFINED_SIM_OPTIONS=\"\".\n# # - Run the simulation.\n# #\n# source <script generation output directory>/synopsys/vcs/vcs_setup.sh \\\n# TOP_LEVEL_NAME=<simulation top> \\\n# QSYS_SIMDIR=<script generation output directory> \\\n# USER_DEFINED_ELAB_OPTIONS=\"\\\"-f filelist.f\\\"\" \\\n# USER_DEFINED_SIM_OPTIONS=<simulation options for your design>\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# ----------------------------------------\n# # DESIGN FILE LIST & OPTIONS TEMPLATE - BEGIN\n# #\n# # Compile all design files and testbench files, including the top level.\n# # (These are all the files required for simulation other than the files\n# # compiled by the Quartus-generated IP simulation script)\n# #\n# +systemverilogext+.sv\n# <design and testbench files, compile-time options, elaboration options>\n# #\n# # DESIGN FILE LIST & OPTIONS TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If myadc is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n# ACDS 18.0 614 win32 2021.05.28.12:56:47\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"myadc\"\nQSYS_SIMDIR=\"./../../\"\nQUARTUS_INSTALL_DIR=\"C:/intelfpga_lite/18.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"+vcs+finish+100\"\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `vcs -platform` != *\"amd64\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\nvcs -lca -timescale=1ps/1ps -sverilog +verilog2001ext+.v -ntb_opts dtm $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v \\\n  $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/fiftyfivenm_atoms_ncrypt.v \\\n  $QSYS_SIMDIR/submodules/altera_modular_adc_control.v \\\n  $QSYS_SIMDIR/submodules/altera_modular_adc_control_avrg_fifo.v \\\n  $QSYS_SIMDIR/submodules/altera_modular_adc_control_fsm.v \\\n  $QSYS_SIMDIR/submodules/chsel_code_converter_sw_to_hw.v \\\n  $QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_primitive_wrapper.v \\\n  $QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_top_wrapper.v \\\n  $QSYS_SIMDIR/submodules/myadc_modular_adc_0.v \\\n  $QSYS_SIMDIR/myadc.v \\\n  -top $TOP_LEVEL_NAME\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  ./simv $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS\nfi\n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/synopsys/vcsmx/synopsys_sim.setup",
    "content": "\nWORK > DEFAULT\nDEFAULT:          ./libraries/work/            \nwork:             ./libraries/work/            \ncontrol_internal: ./libraries/control_internal/\nmodular_adc_0:    ./libraries/modular_adc_0/   \naltera_ver:       ./libraries/altera_ver/      \nlpm_ver:          ./libraries/lpm_ver/         \nsgate_ver:        ./libraries/sgate_ver/       \naltera_mf_ver:    ./libraries/altera_mf_ver/   \naltera_lnsim_ver: ./libraries/altera_lnsim_ver/\nfiftyfivenm_ver:  ./libraries/fiftyfivenm_ver/ \n"
  },
  {
    "path": "max10_adc_firmware/myadc/simulation/synopsys/vcsmx/vcsmx_setup.sh",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 18.0 614 win32 2021.05.28.12:56:47\n\n# ----------------------------------------\n# vcsmx - auto-generated simulation script\n\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     myadc\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level shell script that compiles Altera simulation libraries \n# and the Quartus-generated IP in your project, along with your design and\n# testbench files, copy the text from the TOP-LEVEL TEMPLATE section below\n# into a new file, e.g. named \"vcsmx_sim.sh\", and modify text as directed.\n# \n# You can also modify the simulation flow to suit your needs. Set the\n# following variables to 1 to disable their corresponding processes:\n# - SKIP_FILE_COPY: skip copying ROM/RAM initialization files\n# - SKIP_DEV_COM: skip compiling the Quartus EDA simulation library\n# - SKIP_COM: skip compiling Quartus-generated IP simulation files\n# - SKIP_ELAB and SKIP_SIM: skip elaboration and simulation\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator. In this case, you must also copy the generated library\n# # setup \"synopsys_sim.setup\" into the location from which you launch the\n# # simulator, or incorporate into any existing library setup.\n# #\n# # Run Quartus-generated IP simulation script once to compile Quartus EDA\n# # simulation libraries and Quartus-generated IP simulation files, and copy\n# # any ROM/RAM initialization files to the simulation directory.\n# #\n# # - If necessary, specify any compilation options:\n# #   USER_DEFINED_COMPILE_OPTIONS\n# #   USER_DEFINED_VHDL_COMPILE_OPTIONS applied to vhdl compiler\n# #   USER_DEFINED_VERILOG_COMPILE_OPTIONS applied to verilog compiler\n# #\n# source <script generation output directory>/synopsys/vcsmx/vcsmx_setup.sh \\\n# SKIP_ELAB=1 \\\n# SKIP_SIM=1 \\\n# USER_DEFINED_COMPILE_OPTIONS=<compilation options for your design> \\\n# USER_DEFINED_VHDL_COMPILE_OPTIONS=<VHDL compilation options for your design> \\\n# USER_DEFINED_VERILOG_COMPILE_OPTIONS=<Verilog compilation options for your design> \\\n# QSYS_SIMDIR=<script generation output directory>\n# #\n# # Compile all design files and testbench files, including the top level.\n# # (These are all the files required for simulation other than the files\n# # compiled by the IP script)\n# #\n# vlogan <compilation options> <design and testbench files>\n# #\n# # TOP_LEVEL_NAME is used in this script to set the top-level simulation or\n# # testbench module/entity name.\n# #\n# # Run the IP script again to elaborate and simulate the top level:\n# # - Specify TOP_LEVEL_NAME and USER_DEFINED_ELAB_OPTIONS.\n# # - Override the default USER_DEFINED_SIM_OPTIONS. For example, to run\n# #   until $finish(), set to an empty string: USER_DEFINED_SIM_OPTIONS=\"\".\n# #\n# source <script generation output directory>/synopsys/vcsmx/vcsmx_setup.sh \\\n# SKIP_FILE_COPY=1 \\\n# SKIP_DEV_COM=1 \\\n# SKIP_COM=1 \\\n# TOP_LEVEL_NAME=\"'-top <simulation top>'\" \\\n# QSYS_SIMDIR=<script generation output directory> \\\n# USER_DEFINED_ELAB_OPTIONS=<elaboration options for your design> \\\n# USER_DEFINED_SIM_OPTIONS=<simulation options for your design>\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If myadc is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n# ACDS 18.0 614 win32 2021.05.28.12:56:47\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"myadc\"\nQSYS_SIMDIR=\"./../../\"\nQUARTUS_INSTALL_DIR=\"C:/intelfpga_lite/18.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_DEV_COM=0\nSKIP_COM=0\nSKIP_ELAB=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"+vcs+finish+100\"\n\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `vcs -platform` != *\"amd64\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# create compilation libraries\nmkdir -p ./libraries/work/\nmkdir -p ./libraries/control_internal/\nmkdir -p ./libraries/modular_adc_0/\nmkdir -p ./libraries/altera_ver/\nmkdir -p ./libraries/lpm_ver/\nmkdir -p ./libraries/sgate_ver/\nmkdir -p ./libraries/altera_mf_ver/\nmkdir -p ./libraries/altera_lnsim_ver/\nmkdir -p ./libraries/fiftyfivenm_ver/\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\n# ----------------------------------------\n# compile device library files\nif [ $SKIP_DEV_COM -eq 0 ]; then\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"                 -work altera_ver      \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                          -work lpm_ver         \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                             -work sgate_ver       \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                         -work altera_mf_ver   \n  vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                     -work altera_lnsim_ver\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"                 -work fiftyfivenm_ver \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \nfi\n\n# ----------------------------------------\n# compile design files in correct order\nif [ $SKIP_COM -eq 0 ]; then\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control.v\"             -work control_internal\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control_avrg_fifo.v\"   -work control_internal\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/altera_modular_adc_control_fsm.v\"         -work control_internal\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/chsel_code_converter_sw_to_hw.v\"          -work control_internal\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\" -work control_internal\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/fiftyfivenm_adcblock_top_wrapper.v\"       -work control_internal\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/submodules/myadc_modular_adc_0.v\"                    -work modular_adc_0   \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/myadc.v\"                                                                   \nfi\n\n# ----------------------------------------\n# elaborate top level design\nif [ $SKIP_ELAB -eq 0 ]; then\n  vcs -lca -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME\nfi\n\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  ./simv $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS\nfi\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/greybox_tmp/cbx_args.txt",
    "content": "CLOCK_ENABLE_INPUT_A=BYPASS\r\nCLOCK_ENABLE_OUTPUT_A=BYPASS\r\nINTENDED_DEVICE_FAMILY=\"MAX 10\"\r\nNUMWORDS_A=1024\r\nOPERATION_MODE=SINGLE_PORT\r\nOUTDATA_ACLR_A=NONE\r\nOUTDATA_REG_A=UNREGISTERED\r\nPOWER_UP_UNINITIALIZED=FALSE\r\nREAD_DURING_WRITE_MODE_PORT_A=DONT_CARE\r\nWIDTHAD_A=10\r\nWIDTH_A=12\r\nWIDTH_BYTEENA_A=1\r\nDEVICE_FAMILY=\"MAX 10\"\r\naddress_a\r\nclock0\r\nq_a\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/myadc.debuginfo",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<EnsembleReport name=\"myadc\" kind=\"system\" version=\"18.0\" fabric=\"QSYS\">\n <!-- Format version 18.0 614 (Future versions may contain additional information.) -->\n <!-- 2021.05.28.12:56:58 -->\n <!-- A collection of modules and connections -->\n <parameter name=\"clockCrossingAdapter\">\n  <type>com.altera.sopcmodel.ensemble.EClockAdapter</type>\n  <value>HANDSHAKE</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"device\">\n  <type>java.lang.String</type>\n  <value>10M08SAE144C8GES</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"deviceFamily\">\n  <type>java.lang.String</type>\n  <value>MAX10FPGA</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"deviceSpeedGrade\">\n  <type>java.lang.String</type>\n  <value>8</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"fabricMode\">\n  <type>com.altera.sopcmodel.ensemble.Ensemble$EFabricMode</type>\n  <value>QSYS</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"generateLegacySim\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"generationId\">\n  <type>int</type>\n  <value>1622221014</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"globalResetBus\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"hdlLanguage\">\n  <type>com.altera.entityinterfaces.moduleext.IModuleGenerateHDL$HDLLanguage</type>\n  <value>VERILOG</value>\n  <derived>false</derived>\n  <enabled>false</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"hideFromIPCatalog\">\n  <type>boolean</type>\n  <value>true</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"lockedInterfaceDefinition\">\n  <type>com.altera.sopcmodel.definition.BoundaryDefinition</type>\n  <value></value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"maxAdditionalLatency\">\n  <type>int</type>\n  <value>1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"projectName\">\n  <type>java.lang.String</type>\n  <value>serial1.qpf</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"sopcBorderPoints\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"systemHash\">\n  <type>long</type>\n  <value>0</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"testBenchDutName\">\n  <type>java.lang.String</type>\n  <value></value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"timeStamp\">\n  <type>long</type>\n  <value>0</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"useTestBenchNamingPattern\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <module\n   name=\"modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"18.0\"\n   path=\"modular_adc_0\">\n  <!-- Describes a single module. Module parameters are\nthe requested settings for a module instance. -->\n  <assignment>\n   <name>embeddedsw.CMacro.CORE_VARIANT</name>\n   <value>3</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.DUAL_ADC_MODE</name>\n   <value>false</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.PRESCALER_CH16</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.PRESCALER_CH8</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.REFSEL</name>\n   <value>Internal VREF</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH0</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH1</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH10</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH11</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH12</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH13</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH14</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH15</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH16</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH2</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH3</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH4</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH5</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH6</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH7</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH8</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH9</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_TSD</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.VREF</name>\n   <value>3.3</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.compatible</name>\n   <value>altr,modular-adc-1.0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.group</name>\n   <value>adc</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.name</name>\n   <value>modular-adc</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.params.altr,adc-mode</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.params.altr,adc-number</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.params.altr,adc-slot-count</name>\n   <value>2</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.vendor</name>\n   <value>altr</value>\n  </assignment>\n  <parameter name=\"CORE_VAR\">\n   <type>int</type>\n   <value>3</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"ENABLE_DEBUG\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"MONITOR_COUNT_WIDTH\">\n   <type>int</type>\n   <value>12</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQ\">\n   <type>long</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>CLOCK_RATE</sysinfo_type>\n   <sysinfo_arg>clock</sysinfo_arg>\n  </parameter>\n  <parameter name=\"FAMILY\">\n   <type>java.lang.String</type>\n   <value>MAX10FPGA</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n  </parameter>\n  <parameter name=\"DEVICE_PART\">\n   <type>java.lang.String</type>\n   <value>10M08SAE144C8GES</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE</sysinfo_type>\n  </parameter>\n  <parameter name=\"device_partname_fivechar_prefix\">\n   <type>java.lang.String</type>\n   <value>10M08</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"device_adc_type\">\n   <type>int</type>\n   <value>22</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"max_adc_count_on_die\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"adc_count_on_device\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"device_power_supply_type\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"ip_is_for_which_adc\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"is_this_first_or_second_adc\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"analog_input_pin_mask\">\n   <type>java.math.BigInteger</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"hard_pwd\">\n   <type>int</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"sample_rate\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"clkdiv\">\n   <type>int</type>\n   <value>2</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"derived_clkdiv\">\n   <type>int</type>\n   <value>2</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsclkdiv\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsclksel\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"refsel\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"external_vref\">\n   <type>double</type>\n   <value>2.5</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"int_vref_vr\">\n   <type>double</type>\n   <value>3.3</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"int_vref_nonvr\">\n   <type>double</type>\n   <value>2.5</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"reference_voltage\">\n   <type>double</type>\n   <value>3.3</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"reference_voltage_sim\">\n   <type>int</type>\n   <value>65536</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescalar\">\n   <type>int</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"enable_usr_sim\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_tsd\">\n   <type>boolean</type>\n   <value>true</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_tsd_max\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsd_max\">\n   <type>int</type>\n   <value>125</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_tsd_min\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsd_min\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch0\">\n   <type>boolean</type>\n   <value>true</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch0\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch0\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch0\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch0\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch0\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch1\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch1\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch1\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch2\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch2\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch2\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch3\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch3\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch3\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch4\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch4\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch4\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch5\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch5\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch5\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch6\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch6\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch6\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch7\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch7\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch7\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescaler_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch8\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch8\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch8\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch9\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch9\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch9\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch10\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch10\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch10\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch11\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch11\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch11\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch12\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch12\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch12\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch13\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch13\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch13\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch14\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch14\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch14\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch15\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch15\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch15\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescaler_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch16\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch16\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch16\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_length\">\n   <type>int</type>\n   <value>2</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_1\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_2\">\n   <type>int</type>\n   <value>17</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_3\">\n   <type>int</type>\n   <value>17</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_4\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_5\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_6\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_7\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_8\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_9\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_10\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_11\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_12\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_13\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_14\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_15\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_16\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_17\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_18\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_19\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_20\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_21\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_22\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_23\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_24\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_25\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_26\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_27\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_28\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_29\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_30\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_31\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_32\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_33\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_34\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_35\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_36\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_37\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_38\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_39\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_40\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_41\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_42\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_43\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_44\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_45\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_46\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_47\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_48\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_49\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_50\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_51\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_52\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_53\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_54\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_55\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_56\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_57\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_58\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_59\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_60\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_61\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_62\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_63\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_64\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\">\n   <type>java.lang.String</type>\n   <value>8</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>\n  </parameter>\n  <parameter name=\"deviceFamily\">\n   <type>java.lang.String</type>\n   <value>UNKNOWN</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"generateLegacySim\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <interface name=\"clock\" kind=\"clock_sink\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRateKnown\">\n    <type>java.lang.Boolean</type>\n    <value>false</value>\n    <derived>true</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRate\">\n    <type>java.lang.Long</type>\n    <value>0</value>\n    <derived>true</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>false</isStart>\n   <port>\n    <name>clock_clk</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n  <interface name=\"reset_sink\" kind=\"reset_sink\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"synchronousEdges\">\n    <type>com.altera.sopcmodel.reset.Reset$Edges</type>\n    <value>DEASSERT</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>reset</type>\n   <isStart>false</isStart>\n   <port>\n    <name>reset_sink_reset_n</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>reset_n</role>\n   </port>\n  </interface>\n  <interface name=\"adc_pll_clock\" kind=\"clock_sink\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>false</isStart>\n   <port>\n    <name>adc_pll_clock_clk</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n  <interface name=\"adc_pll_locked\" kind=\"conduit_end\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>conduit</type>\n   <isStart>false</isStart>\n   <port>\n    <name>adc_pll_locked_export</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>export</role>\n   </port>\n  </interface>\n  <interface name=\"command\" kind=\"avalon_streaming_sink\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value>reset_sink</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"beatsPerCycle\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"dataBitsPerSymbol\">\n    <type>int</type>\n    <value>8</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"emptyWithinPacket\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"errorDescriptor\">\n    <type>[Ljava.lang.String;</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"firstSymbolInHighOrderBits\">\n    <type>boolean</type>\n    <value>true</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"highOrderSymbolAtMSB\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"maxChannel\">\n    <type>int</type>\n    <value>31</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"packetDescription\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"readyLatency\">\n    <type>int</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"symbolsPerBeat\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>avalon_streaming</type>\n   <isStart>false</isStart>\n   <port>\n    <name>command_valid</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>valid</role>\n   </port>\n   <port>\n    <name>command_channel</name>\n    <direction>Input</direction>\n    <width>5</width>\n    <role>channel</role>\n   </port>\n   <port>\n    <name>command_startofpacket</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>startofpacket</role>\n   </port>\n   <port>\n    <name>command_endofpacket</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>endofpacket</role>\n   </port>\n   <port>\n    <name>command_ready</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>ready</role>\n   </port>\n  </interface>\n  <interface name=\"response\" kind=\"avalon_streaming_source\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value>reset_sink</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"beatsPerCycle\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"dataBitsPerSymbol\">\n    <type>int</type>\n    <value>12</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"emptyWithinPacket\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"errorDescriptor\">\n    <type>[Ljava.lang.String;</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"firstSymbolInHighOrderBits\">\n    <type>boolean</type>\n    <value>true</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"highOrderSymbolAtMSB\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"maxChannel\">\n    <type>int</type>\n    <value>31</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"packetDescription\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"readyLatency\">\n    <type>int</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"symbolsPerBeat\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>avalon_streaming</type>\n   <isStart>true</isStart>\n   <port>\n    <name>response_valid</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>valid</role>\n   </port>\n   <port>\n    <name>response_channel</name>\n    <direction>Output</direction>\n    <width>5</width>\n    <role>channel</role>\n   </port>\n   <port>\n    <name>response_data</name>\n    <direction>Output</direction>\n    <width>12</width>\n    <role>data</role>\n   </port>\n   <port>\n    <name>response_startofpacket</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>startofpacket</role>\n   </port>\n   <port>\n    <name>response_endofpacket</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>endofpacket</role>\n   </port>\n  </interface>\n </module>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>altera_modular_adc</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IModule</subtype>\n  <displayName>Modular ADC core Intel FPGA IP</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>2</instanceCount>\n  <name>clock_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Clock Input</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>reset_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Reset Input</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>conduit_end</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Conduit</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>avalon_streaming_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Avalon Streaming Sink</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>avalon_streaming_source</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Avalon Streaming Source</displayName>\n  <version>18.0</version>\n </plugin>\n <reportVersion>18.0 614</reportVersion>\n <uniqueIdentifier>98482746E38400000179B3E84B48</uniqueIdentifier>\n</EnsembleReport>\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/myadc.qip",
    "content": "set_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_TOOL_NAME \"Qsys\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_TOOL_ENV \"Qsys\"\nset_global_assignment -library \"myadc\" -name SOPCINFO_FILE [file join $::quartus(qip_path) \"../../myadc.sopcinfo\"]\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name SLD_INFO \"QSYS_NAME myadc HAS_SOPCINFO 1 GENERATION_ID 1622221014\"\nset_global_assignment -library \"myadc\" -name MISC_FILE [file join $::quartus(qip_path) \"../myadc.cmp\"]\nset_global_assignment -library \"myadc\" -name SLD_FILE [file join $::quartus(qip_path) \"myadc.debuginfo\"]\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_TARGETED_DEVICE_FAMILY \"MAX 10\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_QSYS_MODE \"STANDALONE\"\nset_global_assignment -name SYNTHESIS_ONLY_QIP ON\nset_global_assignment -library \"myadc\" -name MISC_FILE [file join $::quartus(qip_path) \"../../myadc.qsys\"]\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_NAME \"bXlhZGM=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_DISPLAY_NAME \"bXlhZGM=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_REPORT_HIERARCHY \"On\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_INTERNAL \"Off\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_VERSION \"MS4w\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19HRU5FUkFUSU9OX0lE::MTYyMjIyMTAxNA==::QXV0byBHRU5FUkFUSU9OX0lE\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19ERVZJQ0VfRkFNSUxZ::TUFYIDEw::QXV0byBERVZJQ0VfRkFNSUxZ\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19ERVZJQ0U=::MTBNMDhTQUUxNDRDOEdFUw==::QXV0byBERVZJQ0U=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::OA==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ==\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19BRENfUExMX0NMT0NLX0NMT0NLX1JBVEU=::LTE=::QXV0byBDTE9DS19SQVRF\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19BRENfUExMX0NMT0NLX0NMT0NLX0RPTUFJTg==::LTE=::QXV0byBDTE9DS19ET01BSU4=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19BRENfUExMX0NMT0NLX1JFU0VUX0RPTUFJTg==::LTE=::QXV0byBSRVNFVF9ET01BSU4=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19DTE9DS19DTE9DS19SQVRF::LTE=::QXV0byBDTE9DS19SQVRF\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19DTE9DS19DTE9DS19ET01BSU4=::LTE=::QXV0byBDTE9DS19ET01BSU4=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19DTE9DS19SRVNFVF9ET01BSU4=::LTE=::QXV0byBSRVNFVF9ET01BSU4=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_NAME \"bXlhZGNfbW9kdWxhcl9hZGNfMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_DISPLAY_NAME \"TW9kdWxhciBBREMgY29yZSBJbnRlbCBGUEdBIElQ\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_REPORT_HIERARCHY \"Off\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_INTERNAL \"Off\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_AUTHOR \"SW50ZWwgQ29ycG9yYXRpb24=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_VERSION \"MTguMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_DESCRIPTION \"QWx0ZXJhIE1vZHVsYXIgQURD\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"Q09SRV9WQVI=::Mw==::Q29yZSBWYXJpYW50\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"RU5BQkxFX0RFQlVH::MA==::RGVidWcgUGF0aA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"TU9OSVRPUl9DT1VOVF9XSURUSA==::MTI=::TU9OSVRPUl9DT1VOVF9XSURUSA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"Q0xPQ0tfRlJFUQ==::MA==::Q0xPQ0tfRlJFUQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"RkFNSUxZ::TUFYIDEw::RGV2aWNlIEZhbWlseQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"REVWSUNFX1BBUlQ=::MTBNMDhTQUUxNDRDOEdFUw==::RGV2aWNlIFBhcnQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGV2aWNlX3BhcnRuYW1lX2ZpdmVjaGFyX3ByZWZpeA==::MTBNMDg=::ZGV2aWNlX3BhcnRuYW1lX2ZpdmVjaGFyX3ByZWZpeA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGV2aWNlX2FkY190eXBl::MjI=::UGxlYXNlIHNlbGVjdCBkZXZpY2UgUGFydCBOdW1iZXIgcHJlZml4\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"bWF4X2FkY19jb3VudF9vbl9kaWU=::MQ==::TWF4IEFEQ3MgY291bnQgb24gc2lsaWNvbiBkaWU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"YWRjX2NvdW50X29uX2RldmljZQ==::MQ==::QURDcyBjb3VudCBvbiBkZXZpY2U=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGV2aWNlX3Bvd2VyX3N1cHBseV90eXBl::MQ==::SXMgdGhpcyBhIHNpbmdsZSBvciBkdWFsIHN1cHBseSB2b2x0YWdlIGRldmljZQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aXBfaXNfZm9yX3doaWNoX2FkYw==::MQ==::R2VuZXJhdGUgSVAgZm9yIHdoaWNoIEFEQ3Mgb2YgdGhpcyBkZXZpY2U/\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aXNfdGhpc19maXJzdF9vcl9zZWNvbmRfYWRj::MQ==::VGhpcyBBREMgYXRvbSBwcmltaXRpdmUgKFdZU0lXWUcpIGlzIGZvciBmaXJzdCBvciBzZWNvbmQgQURDPw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"YW5hbG9nX2lucHV0X3Bpbl9tYXNr::MA==::YW5hbG9nX2lucHV0X3Bpbl9tYXNr\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aGFyZF9wd2Q=::MA==::aGFyZF9wd2Q=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2FtcGxlX3JhdGU=::MA==::QURDIFNhbXBsZSBSYXRl\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"Y2xrZGl2::Mg==::QURDIElucHV0IENsb2Nr\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGVyaXZlZF9jbGtkaXY=::Mg==::RGVyaXZlZCBBREMgSW5wdXQgQ2xvY2s=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNjbGtkaXY=::MQ==::dHNjbGtkaXY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNjbGtzZWw=::MQ==::dHNjbGtzZWw=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cmVmc2Vs::MQ==::UmVmZXJlbmNlIFZvbHRhZ2UgU291cmNl\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZXh0ZXJuYWxfdnJlZg==::Mi41::RXh0ZXJuYWwgUmVmZXJlbmNlIFZvbHRhZ2U=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aW50X3ZyZWZfdnI=::My4z::SW50ZXJuYWwgUmVmZXJlbmNlIFZvbHRhZ2U=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aW50X3ZyZWZfbm9udnI=::Mi41::SW50ZXJuYWwgUmVmZXJlbmNlIFZvbHRhZ2U=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cmVmZXJlbmNlX3ZvbHRhZ2U=::My4z::QURDIFJlZmVyZW5jZSBWb2x0YWdl\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cmVmZXJlbmNlX3ZvbHRhZ2Vfc2lt::NjU1MzY=::SW50ZWdlciBlbmNvZGVkIHJlZmVyZW5jZSB2b2x0YWdlIGZvciBzaW11bGF0aW9uIHB1cnBvc2Vz\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cHJlc2NhbGFy::MA==::cHJlc2NhbGFy\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5hYmxlX3Vzcl9zaW0=::MA==::RW5hYmxlIHVzZXIgY3JlYXRlZCBleHBlY3RlZCBvdXRwdXQgZmlsZQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX3RzZA==::dHJ1ZQ==::VXNlIG9uLWNoaXAgVFNE\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdHNkX21heA==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBvbi1jaGlwIFRTRA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNkX21heA==::MTI1::TWF4aW11bSBUZW1wZXJhdHVyZSBUaHJlc2hvbGQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdHNkX21pbg==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBvbi1jaGlwIFRTRA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNkX21pbg==::MA==::TWluaW11bSBUZW1wZXJhdHVyZSBUaHJlc2hvbGQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMA==::dHJ1ZQ==::VXNlIENoYW5uZWwgMCAoRGVkaWNhdGVkIGFuYWxvZyBpbnB1dCBwaW4gLSBBTkFJTik=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gw::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gw::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gw::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gw::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMQ==::ZmFsc2U=::VXNlIENoYW5uZWwgMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gx::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gx::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gx::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gx::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMg==::ZmFsc2U=::VXNlIENoYW5uZWwgMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gy::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gy::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gy::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gy::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMw==::ZmFsc2U=::VXNlIENoYW5uZWwgMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gz::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gz::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gz::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gz::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoNA==::ZmFsc2U=::VXNlIENoYW5uZWwgNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g0::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g0::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g0::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g0::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoNQ==::ZmFsc2U=::VXNlIENoYW5uZWwgNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g1::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g1::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g1::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g1::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoNg==::ZmFsc2U=::VXNlIENoYW5uZWwgNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g2::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g2::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g2::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g2::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoNw==::ZmFsc2U=::VXNlIENoYW5uZWwgNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g3::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDc=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g3::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g3::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDc=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g3::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoOA==::ZmFsc2U=::VXNlIENoYW5uZWwgOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cHJlc2NhbGVyX2NoOA==::ZmFsc2U=::RW5hYmxlIFByZXNjYWxlciBmb3IgQ2hhbm5lbCA4\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g4::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDg=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g4::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g4::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDg=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g4::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoOQ==::ZmFsc2U=::VXNlIENoYW5uZWwgOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g5::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDk=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g5::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g5::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDk=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g5::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTA=::ZmFsc2U=::VXNlIENoYW5uZWwgMTA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxMA==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEw\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxMA==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxMA==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEw\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxMA==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTE=::ZmFsc2U=::VXNlIENoYW5uZWwgMTE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxMQ==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEx\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxMQ==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxMQ==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEx\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxMQ==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTI=::ZmFsc2U=::VXNlIENoYW5uZWwgMTI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxMg==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEy\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxMg==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxMg==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEy\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxMg==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTM=::ZmFsc2U=::VXNlIENoYW5uZWwgMTM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxMw==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEz\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxMw==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxMw==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEz\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxMw==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTQ=::ZmFsc2U=::VXNlIENoYW5uZWwgMTQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxNA==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE0\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxNA==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxNA==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE0\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxNA==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTU=::ZmFsc2U=::VXNlIENoYW5uZWwgMTU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxNQ==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE1\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxNQ==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxNQ==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE1\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxNQ==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTY=::ZmFsc2U=::VXNlIENoYW5uZWwgMTY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cHJlc2NhbGVyX2NoMTY=::ZmFsc2U=::RW5hYmxlIFByZXNjYWxlciBmb3IgQ2hhbm5lbCAxNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxNg==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE2\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxNg==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxNg==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE2\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxNg==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX2xlbmd0aA==::Mg==::TnVtYmVyIG9mIHNsb3QgdXNlZA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMQ==::MA==::U2xvdCAx\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMg==::MTc=::U2xvdCAy\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMw==::MTc=::U2xvdCAz\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNA==::MzA=::U2xvdCA0\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNQ==::MzA=::U2xvdCA1\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNg==::MzA=::U2xvdCA2\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNw==::MzA=::U2xvdCA3\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfOA==::MzA=::U2xvdCA4\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfOQ==::MzA=::U2xvdCA5\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTA=::MzA=::U2xvdCAxMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTE=::MzA=::U2xvdCAxMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTI=::MzA=::U2xvdCAxMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTM=::MzA=::U2xvdCAxMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTQ=::MzA=::U2xvdCAxNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTU=::MzA=::U2xvdCAxNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTY=::MzA=::U2xvdCAxNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTc=::MzA=::U2xvdCAxNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTg=::MzA=::U2xvdCAxOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTk=::MzA=::U2xvdCAxOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjA=::MzA=::U2xvdCAyMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjE=::MzA=::U2xvdCAyMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjI=::MzA=::U2xvdCAyMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjM=::MzA=::U2xvdCAyMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjQ=::MzA=::U2xvdCAyNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjU=::MzA=::U2xvdCAyNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjY=::MzA=::U2xvdCAyNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjc=::MzA=::U2xvdCAyNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjg=::MzA=::U2xvdCAyOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjk=::MzA=::U2xvdCAyOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzA=::MzA=::U2xvdCAzMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzE=::MzA=::U2xvdCAzMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzI=::MzA=::U2xvdCAzMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzM=::MzA=::U2xvdCAzMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzQ=::MzA=::U2xvdCAzNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzU=::MzA=::U2xvdCAzNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzY=::MzA=::U2xvdCAzNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzc=::MzA=::U2xvdCAzNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzg=::MzA=::U2xvdCAzOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzk=::MzA=::U2xvdCAzOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDA=::MzA=::U2xvdCA0MA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDE=::MzA=::U2xvdCA0MQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDI=::MzA=::U2xvdCA0Mg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDM=::MzA=::U2xvdCA0Mw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDQ=::MzA=::U2xvdCA0NA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDU=::MzA=::U2xvdCA0NQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDY=::MzA=::U2xvdCA0Ng==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDc=::MzA=::U2xvdCA0Nw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDg=::MzA=::U2xvdCA0OA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDk=::MzA=::U2xvdCA0OQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTA=::MzA=::U2xvdCA1MA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTE=::MzA=::U2xvdCA1MQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTI=::MzA=::U2xvdCA1Mg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTM=::MzA=::U2xvdCA1Mw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTQ=::MzA=::U2xvdCA1NA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTU=::MzA=::U2xvdCA1NQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTY=::MzA=::U2xvdCA1Ng==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTc=::MzA=::U2xvdCA1Nw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTg=::MzA=::U2xvdCA1OA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTk=::MzA=::U2xvdCA1OQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjA=::MzA=::U2xvdCA2MA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjE=::MzA=::U2xvdCA2MQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjI=::MzA=::U2xvdCA2Mg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjM=::MzA=::U2xvdCA2Mw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjQ=::MzA=::U2xvdCA2NA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::OA==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ==\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_NAME \"YWx0ZXJhX21vZHVsYXJfYWRjX2NvbnRyb2w=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_DISPLAY_NAME \"TW9kdWxhciBBREMgQ29udHJvbCBjb3JlIEludGVsIEZQR0EgSVA=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_REPORT_HIERARCHY \"Off\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_INTERNAL \"On\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_AUTHOR \"SW50ZWwgQ29ycG9yYXRpb24=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_VERSION \"MTguMA==\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_DESCRIPTION \"QWx0ZXJhIE1vZHVsYXIgQURDIC0gQ29udHJvbCBjb3Jl\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"Y2xrZGl2::Mg==::Y2xrZGl2\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNjbGtkaXY=::MQ==::dHNjbGtkaXY=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNjbGtzZWw=::MQ==::dHNjbGtzZWw=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aGFyZF9wd2Q=::MA==::aGFyZF9wd2Q=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cHJlc2NhbGFy::MA==::cHJlc2NhbGFy\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cmVmc2Vs::MQ==::cmVmc2Vs\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGV2aWNlX3BhcnRuYW1lX2ZpdmVjaGFyX3ByZWZpeA==::MTBNMDg=::ZGV2aWNlX3BhcnRuYW1lX2ZpdmVjaGFyX3ByZWZpeA==\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aXNfdGhpc19maXJzdF9vcl9zZWNvbmRfYWRj::MQ==::aXNfdGhpc19maXJzdF9vcl9zZWNvbmRfYWRj\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"YW5hbG9nX2lucHV0X3Bpbl9tYXNr::NjU1MzY=::YW5hbG9nX2lucHV0X3Bpbl9tYXNr\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZHVhbF9hZGNfbW9kZQ==::ZmFsc2U=::RW5hYmxlIER1YWwgQURDIE1vZGU=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5hYmxlX3Vzcl9zaW0=::MA==::RW5hYmxlIHVzZXIgY3JlYXRlZCBleHBlY3RlZCBvdXRwdXQgZmlsZQ==\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cmVmZXJlbmNlX3ZvbHRhZ2Vfc2lt::NjU1MzY=::SW50ZWdlciBlbmNvZGVkIHJlZmVyZW5jZSB2b2x0YWdlIGZvciBzaW11bGF0aW9uIHB1cnBvc2Vz\"\n\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"myadc.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/myadc_modular_adc_0.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/altera_modular_adc_control.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/altera_modular_adc_control_avrg_fifo.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/altera_modular_adc_control_fsm.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/chsel_code_converter_sw_to_hw.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/fiftyfivenm_adcblock_top_wrapper.v\"]\nset_global_assignment -library \"myadc\" -name SDC_FILE [file join $::quartus(qip_path) \"submodules/altera_modular_adc_control.sdc\"]\n\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_TOOL_NAME \"altera_modular_adc\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_TOOL_ENV \"Qsys\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_TOOL_NAME \"altera_modular_adc_control\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_TOOL_ENV \"Qsys\"\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/myadc.v",
    "content": "// myadc.v\r\n\r\n// Generated using ACDS version 18.0 614\r\n\r\n`timescale 1 ps / 1 ps\nmodule myadc (\r\n\t\tinput  wire        adc_pll_clock_clk,      //  adc_pll_clock.clk\n\t\tinput  wire        adc_pll_locked_export,  // adc_pll_locked.export\n\t\tinput  wire        clock_clk,              //          clock.clk\n\t\tinput  wire        command_valid,          //        command.valid\n\t\tinput  wire [4:0]  command_channel,        //               .channel\n\t\tinput  wire        command_startofpacket,  //               .startofpacket\n\t\tinput  wire        command_endofpacket,    //               .endofpacket\n\t\toutput wire        command_ready,          //               .ready\n\t\tinput  wire        reset_sink_reset_n,     //     reset_sink.reset_n\n\t\toutput wire        response_valid,         //       response.valid\n\t\toutput wire [4:0]  response_channel,       //               .channel\n\t\toutput wire [11:0] response_data,          //               .data\n\t\toutput wire        response_startofpacket, //               .startofpacket\n\t\toutput wire        response_endofpacket    //               .endofpacket\n\t);\r\n\r\n\tmyadc_modular_adc_0 modular_adc_0 (\n\t\t.clock_clk              (clock_clk),              //          clock.clk\n\t\t.reset_sink_reset_n     (reset_sink_reset_n),     //     reset_sink.reset_n\n\t\t.adc_pll_clock_clk      (adc_pll_clock_clk),      //  adc_pll_clock.clk\n\t\t.adc_pll_locked_export  (adc_pll_locked_export),  // adc_pll_locked.export\n\t\t.command_valid          (command_valid),          //        command.valid\n\t\t.command_channel        (command_channel),        //               .channel\n\t\t.command_startofpacket  (command_startofpacket),  //               .startofpacket\n\t\t.command_endofpacket    (command_endofpacket),    //               .endofpacket\n\t\t.command_ready          (command_ready),          //               .ready\n\t\t.response_valid         (response_valid),         //       response.valid\n\t\t.response_channel       (response_channel),       //               .channel\n\t\t.response_data          (response_data),          //               .data\n\t\t.response_startofpacket (response_startofpacket), //               .startofpacket\n\t\t.response_endofpacket   (response_endofpacket)    //               .endofpacket\n\t);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control.sdc",
    "content": "# (C) 2001-2018 Intel Corporation. All rights reserved.\n# Your use of Intel Corporation's design tools, logic functions and other \n# software and tools, and its AMPP partner logic functions, and any output \n# files from any of the foregoing (including device programming or simulation \n# files), and any associated documentation or information are expressly subject \n# to the terms and conditions of the Intel Program License Subscription \n# Agreement, Intel FPGA IP License Agreement, or other applicable \n# license agreement, including, without limitation, that your use is for the \n# sole purpose of programming logic devices manufactured by Intel and sold by \n# Intel or its authorized distributors.  Please refer to the applicable \n# agreement for further details.\n\n\n#**************************************************************\r\n# Set False Path - ADC Hard to/from Soft Logic is asynchronous\r\n#**************************************************************\r\n## EOC - Automatically covered in reset_synchronizer SDC\r\n## CLK_DFT - Automatically covered in reset_synchronizer SDC\r\n\r\n## DOUT\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[0]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[0]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[1]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[1]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[2]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[2]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[3]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[3]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[4]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[4]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[5]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[5]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[6]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[6]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[7]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[7]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[8]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[8]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[9]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[9]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[10]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[10]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[11]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[11]}]\r\n\r\n## CHSEL\r\nset_false_path -from [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|chsel[*]}] -to [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|chsel[*]}]\r\n\r\n## SOC\r\nset_false_path -from [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|soc}] -to [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|soc}]\r\n\r\n\r\n#******************************************************************************************************************\r\n# Set Net Delay - ADC Hard to/from Soft Logic is constrained to be max data delay of 5ns and min data delay of 0ns\r\n#******************************************************************************************************************\r\n\r\n## EOC\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|eoc}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|eoc}] -min 0\r\n\r\n## CLK_DFT\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|clk_dft}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|clk_dft}] -min 0\r\n\r\n## DOUT\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[0]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[1]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[2]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[3]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[4]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[5]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[6]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[7]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[8]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[9]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[10]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[11]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[0]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[1]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[2]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[3]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[4]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[5]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[6]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[7]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[8]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[9]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[10]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[11]}] -min 0\r\n\r\n## CHSEL\r\nset_net_delay -from [get_pins -compatibility_mode {*|u_control_fsm|chsel[*]|q}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|u_control_fsm|chsel[*]|q}] -min 0\r\n\r\n## SOC\r\nset_net_delay -from [get_pins -compatibility_mode {*|u_control_fsm|soc|q}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|u_control_fsm|soc|q}] -min 0\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// synthesis translate_off\r\n`timescale 1ns / 1ps\r\n// synthesis translate_on\r\n\r\nmodule altera_modular_adc_control #(\r\n    parameter clkdiv        = 1,\r\n    parameter tsclkdiv      = 0,\r\n    parameter tsclksel      = 0,\r\n    parameter prescalar     = 0,\r\n    parameter refsel        = 0,\r\n    parameter device_partname_fivechar_prefix   = \"10M08\",\r\n    parameter is_this_first_or_second_adc = 1,\r\n    parameter analog_input_pin_mask = 17'h0,\r\n    parameter hard_pwd = 0,\r\n    parameter dual_adc_mode = 0,\r\n    parameter enable_usr_sim = 0,\r\n    parameter reference_voltage_sim = 65536,\r\n    parameter simfilename_ch0 = \"simfilename_ch0\",\r\n    parameter simfilename_ch1 = \"simfilename_ch1\",\r\n    parameter simfilename_ch2 = \"simfilename_ch2\",\r\n    parameter simfilename_ch3 = \"simfilename_ch3\",\r\n    parameter simfilename_ch4 = \"simfilename_ch4\",\r\n    parameter simfilename_ch5 = \"simfilename_ch5\",\r\n    parameter simfilename_ch6 = \"simfilename_ch6\",\r\n    parameter simfilename_ch7 = \"simfilename_ch7\",\r\n    parameter simfilename_ch8 = \"simfilename_ch8\",\r\n    parameter simfilename_ch9 = \"simfilename_ch9\",\r\n    parameter simfilename_ch10 = \"simfilename_ch10\",\r\n    parameter simfilename_ch11 = \"simfilename_ch11\",\r\n    parameter simfilename_ch12 = \"simfilename_ch12\",\r\n    parameter simfilename_ch13 = \"simfilename_ch13\",\r\n    parameter simfilename_ch14 = \"simfilename_ch14\",\r\n    parameter simfilename_ch15 = \"simfilename_ch15\",\r\n    parameter simfilename_ch16 = \"simfilename_ch16\"\r\n) (\r\n    input           clk,\r\n    input           rst_n,\r\n    input           clk_in_pll_c0,\r\n    input           clk_in_pll_locked,\r\n    input           cmd_valid,\r\n    input [4:0]     cmd_channel,\r\n    input           cmd_sop,\r\n    input           cmd_eop,\r\n    input           sync_ready,\r\n\r\n    output          cmd_ready,\r\n    output          rsp_valid,\r\n    output [4:0]    rsp_channel,\r\n    output [11:0]   rsp_data,\r\n    output          rsp_sop,\r\n    output          rsp_eop,\r\n    output          sync_valid\r\n\r\n);\r\n\r\nwire        clkout_adccore;\r\nwire        eoc;\r\nwire [11:0] dout;\r\nwire [4:0]  chsel;\r\nwire        soc;\r\nwire        tsen;\r\nwire        usr_pwd;\r\n\r\naltera_modular_adc_control_fsm #(\r\n    .is_this_first_or_second_adc    (is_this_first_or_second_adc),\r\n    .dual_adc_mode                  (dual_adc_mode)    \r\n) u_control_fsm (\r\n    // inputs\r\n    .clk                (clk),\r\n    .rst_n              (rst_n),\r\n    .clk_in_pll_locked  (clk_in_pll_locked),\r\n    .cmd_valid          (cmd_valid),\r\n    .cmd_channel        (cmd_channel),\r\n    .cmd_sop            (cmd_sop),\r\n    .cmd_eop            (cmd_eop),\r\n    .clk_dft            (clkout_adccore),\r\n    .eoc                (eoc),\r\n    .dout               (dout),\r\n    .sync_ready         (sync_ready),\r\n    // outputs\r\n    .rsp_valid          (rsp_valid),\r\n    .rsp_channel        (rsp_channel),\r\n    .rsp_data           (rsp_data),\r\n    .rsp_sop            (rsp_sop),\r\n    .rsp_eop            (rsp_eop),\r\n    .cmd_ready          (cmd_ready),\r\n    .chsel              (chsel),\r\n    .soc                (soc),\r\n    .usr_pwd            (usr_pwd),\r\n    .tsen               (tsen),\r\n    .sync_valid         (sync_valid)\r\n\r\n\r\n\r\n);\r\n\r\n\r\n\r\nfiftyfivenm_adcblock_top_wrapper #(\r\n    .device_partname_fivechar_prefix (device_partname_fivechar_prefix),\r\n    .clkdiv                          (clkdiv),\r\n    .tsclkdiv                        (tsclkdiv),\r\n    .tsclksel                        (tsclksel),\r\n    .refsel                          (refsel),\r\n    .prescalar                       (prescalar),\r\n    .is_this_first_or_second_adc     (is_this_first_or_second_adc),\r\n    .analog_input_pin_mask           (analog_input_pin_mask),\r\n    .hard_pwd                        (hard_pwd),\r\n    .enable_usr_sim                  (enable_usr_sim),\r\n    .reference_voltage_sim           (reference_voltage_sim),\r\n    .simfilename_ch0                 (simfilename_ch0),\r\n    .simfilename_ch1                 (simfilename_ch1),\r\n    .simfilename_ch2                 (simfilename_ch2),\r\n    .simfilename_ch3                 (simfilename_ch3),\r\n    .simfilename_ch4                 (simfilename_ch4),\r\n    .simfilename_ch5                 (simfilename_ch5),\r\n    .simfilename_ch6                 (simfilename_ch6),\r\n    .simfilename_ch7                 (simfilename_ch7),\r\n    .simfilename_ch8                 (simfilename_ch8),\r\n    .simfilename_ch9                 (simfilename_ch9),\r\n    .simfilename_ch10                (simfilename_ch10),\r\n    .simfilename_ch11                (simfilename_ch11),\r\n    .simfilename_ch12                (simfilename_ch12),\r\n    .simfilename_ch13                (simfilename_ch13),\r\n    .simfilename_ch14                (simfilename_ch14),\r\n    .simfilename_ch15                (simfilename_ch15),\r\n    .simfilename_ch16                (simfilename_ch16)\r\n) adc_inst (\r\n    //.reset              (reset),\r\n    .chsel              (chsel),                        // 5-bits channel selection.\r\n    .soc                (soc),                          // signal Start-of-Conversion to ADC\r\n    .eoc                (eoc),                          // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\r\n    .dout               (dout),                         // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    .usr_pwd            (usr_pwd),                      // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    .tsen               (tsen),                         // MUST power down ADC before changing TSEN.  0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    .clkout_adccore     (clkout_adccore),               // Output clock from the clock divider\r\n    .clkin_from_pll_c0  (clk_in_pll_c0)               // Clock source from PLL1/3 c-counter[0]\r\n    //.dout_ch            (dout_ch)                     // Indicate dout is for which chsel\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control_avrg_fifo.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// megafunction wizard: %FIFO%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: scfifo \r\n\r\n// ============================================================\r\n// File Name: altera_modular_adc_control_avrg_fifo.v\r\n// Megafunction Name(s):\r\n// \t\t\tscfifo\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Internal Build 30 11/13/2014 PN Full Version\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2014 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule altera_modular_adc_control_avrg_fifo (\r\n\tclock,\r\n\tdata,\r\n\trdreq,\r\n\tsclr,\r\n\twrreq,\r\n\tempty,\r\n\tfull,\r\n\tq);\r\n\r\n\tinput\t  clock;\r\n\tinput\t[11:0]  data;\r\n\tinput\t  rdreq;\r\n\tinput\t  sclr;\r\n\tinput\t  wrreq;\r\n\toutput\t  empty;\r\n\toutput\t  full;\r\n\toutput\t[11:0]  q;\r\n\r\n\twire  sub_wire0;\r\n\twire  sub_wire1;\r\n\twire [11:0] sub_wire2;\r\n\twire  empty = sub_wire0;\r\n\twire  full = sub_wire1;\r\n\twire [11:0] q = sub_wire2[11:0];\r\n\r\n\tscfifo\tscfifo_component (\r\n\t\t\t\t.clock (clock),\r\n\t\t\t\t.data (data),\r\n\t\t\t\t.rdreq (rdreq),\r\n\t\t\t\t.sclr (sclr),\r\n\t\t\t\t.wrreq (wrreq),\r\n\t\t\t\t.empty (sub_wire0),\r\n\t\t\t\t.full (sub_wire1),\r\n\t\t\t\t.q (sub_wire2),\r\n\t\t\t\t.aclr (),\r\n\t\t\t\t.almost_empty (),\r\n\t\t\t\t.almost_full (),\r\n\t\t\t\t.usedw ());\r\n\tdefparam\r\n\t\tscfifo_component.add_ram_output_register = \"OFF\",\r\n\t\tscfifo_component.intended_device_family = \"MAX 10\",\r\n\t\tscfifo_component.lpm_hint = \"RAM_BLOCK_TYPE=M9K\",\r\n\t\tscfifo_component.lpm_numwords = 64,\r\n\t\tscfifo_component.lpm_showahead = \"OFF\",\r\n\t\tscfifo_component.lpm_type = \"scfifo\",\r\n\t\tscfifo_component.lpm_width = 12,\r\n\t\tscfifo_component.lpm_widthu = 6,\r\n\t\tscfifo_component.overflow_checking = \"ON\",\r\n\t\tscfifo_component.underflow_checking = \"ON\",\r\n\t\tscfifo_component.use_eab = \"ON\";\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: AlmostEmpty NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC \"-1\"\r\n// Retrieval info: PRIVATE: AlmostFull NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AlmostFullThr NUMERIC \"-1\"\r\n// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Depth NUMERIC \"64\"\r\n// Retrieval info: PRIVATE: Empty NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: Full NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: LegacyRREQ NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Optimize NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: UsedW NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Width NUMERIC \"12\"\r\n// Retrieval info: PRIVATE: dc_aclr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: diff_widths NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: msb_usedw NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: output_width NUMERIC \"12\"\r\n// Retrieval info: PRIVATE: rsEmpty NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: rsFull NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: rsUsedW NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: sc_aclr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: sc_sclr NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: wsEmpty NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: wsFull NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: wsUsedW NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING \"OFF\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_HINT STRING \"RAM_BLOCK_TYPE=M9K\"\r\n// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC \"64\"\r\n// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING \"OFF\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"scfifo\"\r\n// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC \"6\"\r\n// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING \"ON\"\r\n// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING \"ON\"\r\n// Retrieval info: CONSTANT: USE_EAB STRING \"ON\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 12 0 INPUT NODEFVAL \"data[11..0]\"\r\n// Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL \"empty\"\r\n// Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL \"full\"\r\n// Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL \"q[11..0]\"\r\n// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL \"rdreq\"\r\n// Retrieval info: USED_PORT: sclr 0 0 0 0 INPUT NODEFVAL \"sclr\"\r\n// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL \"wrreq\"\r\n// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data 0 0 12 0 data 0 0 12 0\r\n// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0\r\n// Retrieval info: CONNECT: @sclr 0 0 0 0 sclr 0 0 0 0\r\n// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0\r\n// Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0\r\n// Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 12 0 @q 0 0 12 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.bsf FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_control_fsm.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// synthesis translate_off\r\n`timescale 1ns / 1ps\r\n// synthesis translate_on\r\n\r\nmodule altera_modular_adc_control_fsm #(\r\n    parameter is_this_first_or_second_adc = 1,\r\n    parameter dual_adc_mode = 0\r\n) (\r\n    input               clk, \r\n    input               rst_n,\r\n    input               clk_in_pll_locked,\r\n    input               cmd_valid,\r\n    input [4:0]         cmd_channel,\r\n    input               cmd_sop,\r\n    input               cmd_eop,\r\n    input               clk_dft,\r\n    input               eoc,\r\n    input [11:0]        dout,\r\n    input               sync_ready,\r\n\r\n    output reg          rsp_valid,\r\n    output reg [4:0]    rsp_channel,\r\n    output reg [11:0]   rsp_data,\r\n    output reg          rsp_sop,\r\n    output reg          rsp_eop,\r\n    output reg          cmd_ready,\r\n    output reg [4:0]    chsel,\r\n    output reg          soc,\r\n    output reg          usr_pwd,\r\n    output reg          tsen,\r\n    output reg          sync_valid\r\n\r\n);\r\n\r\nreg [4:0]   ctrl_state;\r\nreg [4:0]   ctrl_state_nxt;\r\nreg         clk_dft_synch_dly;\r\nreg         eoc_synch_dly;\r\nreg [4:0]   chsel_nxt;\r\nreg         soc_nxt;\r\nreg         usr_pwd_nxt;\r\nreg         tsen_nxt;\r\nreg         prev_cmd_is_ts;\r\nreg         cmd_fetched;\r\nreg         pend;\r\nreg [4:0]   cmd_channel_dly;\r\nreg         cmd_sop_dly;\r\nreg         cmd_eop_dly;\r\nreg [7:0]   int_timer;\r\nreg [17:0]  avrg_sum;\r\nreg         avrg_cnt_done;\r\nreg         frst_64_ptr_done;\r\nreg         conv_dly1_s_flp;\r\nreg [11:0]  dout_flp;\r\nreg [4:0]   prev_ctrl_state;\r\nreg [4:0]   sync_ctrl_state;\r\nreg [4:0]   sync_ctrl_state_nxt;\r\n\r\nwire        clk_dft_synch;\r\nwire        eoc_synch;\r\nwire        clk_dft_lh;\r\nwire        clk_dft_hl;\r\nwire        eoc_hl;\r\nwire        cmd_is_rclb;\r\nwire        cmd_is_ts;\r\nwire        arc_conv_conv_dly1;\r\nwire        arc_sync1_conv_dly1;\r\nwire        arc_wait_pend_wait_pend_dly1;\r\nwire        arc_sync1_wait_pend_dly1;\r\nwire        arc_to_conv;\r\nwire        arc_to_avrg_cnt;\r\nwire        load_rsp;\r\nwire        load_cmd_ready;\r\nwire        arc_getcmd_w_pwrdwn;\r\nwire        arc_getcmd_pwrdwn;\r\nwire        load_cmd_fetched;\r\nwire        load_int_timer;\r\nwire        incr_int_timer;\r\nwire        arc_out_from_pwrup_soc;\r\nwire        clr_cmd_fetched;\r\nwire        adc_change_mode;\r\nwire        add_avrg_sum;\r\nwire        add_avrg_sum_run;\r\nwire        clear_avrg_sum;\r\nwire        clear_avrg_cnt_done;\r\nwire        set_frst_64_ptr_done;\r\nwire        clear_frst_64_ptr_done;\r\nwire [11:0] fifo_q;\r\nwire        fifo_sclr;\r\nwire        fifo_rdreq;\r\nwire        fifo_wrreq;\r\nwire        putresp_s;\r\nwire        putresp_pend_s;\r\nwire        pwrdwn_s;\r\nwire        pwrdwn_tsen_s;\r\nwire        avrg_cnt_s;\r\nwire        wait_pend_dly1_s;\r\nwire        conv_dly1_s;\r\nwire        conv_s;\r\nwire        putresp_dly3_s;\r\nwire        load_dout;\r\nwire        avrg_enable;\r\nwire [11:0] rsp_data_nxt;\r\n\r\nlocalparam [4:0]    IDLE                = 5'b00000;\r\nlocalparam [4:0]    PWRDWN              = 5'b00001;\r\nlocalparam [4:0]    PWRDWN_TSEN         = 5'b00010;\r\nlocalparam [4:0]    PWRDWN_DONE         = 5'b00011;\r\nlocalparam [4:0]    PWRUP_CH            = 5'b00100;\r\nlocalparam [4:0]    PWRUP_SOC           = 5'b00101;\r\nlocalparam [4:0]    WAIT                = 5'b00110;\r\nlocalparam [4:0]    GETCMD              = 5'b00111;\r\nlocalparam [4:0]    GETCMD_W            = 5'b01000;\r\nlocalparam [4:0]    PRE_CONV            = 5'b01001;\r\nlocalparam [4:0]    CONV                = 5'b01010; // Drive chsel. Get out of this state when falling edge of EOC detected (DOUT is ready for sample)\r\n                                                    // Read averaging fifo.\r\n                                                    // Capture DOUT into dout internal buffer register (dout_flp) \r\nlocalparam [4:0]    CONV_DLY1           = 5'b01011; // Additional state for processing when DOUT is ready. Perform averaging calculation (adds and minus operation). \r\nlocalparam [4:0]    PUTRESP             = 5'b01100; // Load response\r\nlocalparam [4:0]    PUTRESP_DLY1        = 5'b01101;\r\nlocalparam [4:0]    PUTRESP_DLY2        = 5'b01110;\r\nlocalparam [4:0]    PUTRESP_DLY3        = 5'b01111;\r\nlocalparam [4:0]    WAIT_PEND           = 5'b10000; // Get out of this state when falling edge of EOC detected (DOUT is ready for sample)\r\n                                                    // Read averaging fifo.\r\n                                                    // Capture DOUT into dout internal buffer register (dout_flp) \r\nlocalparam [4:0]    WAIT_PEND_DLY1      = 5'b10001; // Additional state for processing when DOUT is ready. Perform averaging calculation (adds and minus operation).\r\nlocalparam [4:0]    PUTRESP_PEND        = 5'b10010; // Load response\r\nlocalparam [4:0]    AVRG_CNT            = 5'b10011;\r\nlocalparam [4:0]    SYNC1               = 5'b10100; // Allocates 1 soft ip clock mismatch due to asynchronous between soft ip clock and ADC clock domain\r\n\r\nlocalparam [7:0]    NUM_AVRG_POINTS     = 8'd64;\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Double Synchronize control signal from ADC hardblock\r\n//--------------------------------------------------------------------------------------------//\r\naltera_std_synchronizer #(\r\n    .depth    (2)\r\n) u_clk_dft_synchronizer (\r\n    .clk        (clk),\r\n    .reset_n    (rst_n),\r\n    .din        (clk_dft),\r\n    .dout       (clk_dft_synch)\r\n);\r\n\r\naltera_std_synchronizer #(\r\n    .depth    (2)\r\n) u_eoc_synchronizer (\r\n    .clk        (clk),\r\n    .reset_n    (rst_n),\r\n    .din        (eoc),\r\n    .dout       (eoc_synch)\r\n);\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Edge detection for both synchronized clk_dft and eoc\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        clk_dft_synch_dly   <= 1'b0;\r\n        eoc_synch_dly       <= 1'b0;\r\n    end\r\n    else begin\r\n        clk_dft_synch_dly   <= clk_dft_synch;\r\n        eoc_synch_dly       <= eoc_synch;\r\n    end\r\nend\r\n\r\nassign clk_dft_lh   = clk_dft_synch & ~clk_dft_synch_dly;\r\nassign clk_dft_hl   = ~clk_dft_synch & clk_dft_synch_dly;\r\nassign eoc_hl       = ~eoc_synch & eoc_synch_dly;\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Dual ADC\r\n//--------------------------------------------------------------------------------------------//\r\n\r\ngenerate\r\nif (dual_adc_mode == 1) begin\r\n\r\n    // Buffer up ctrl_state\r\n    // To be used when both ADC is out of sync\r\n    always @(posedge clk or negedge rst_n) begin\r\n        if (!rst_n)\r\n            prev_ctrl_state   <= IDLE;\r\n        else\r\n            prev_ctrl_state   <= ctrl_state;\r\n    end\r\n\r\n    // Buffer up ctrl_state\r\n    // To be used when both ADC mismatches by 1 soft ip clock\r\n    always @(posedge clk or negedge rst_n) begin\r\n        if (!rst_n)\r\n            sync_ctrl_state   <= IDLE;\r\n        else\r\n            sync_ctrl_state   <= sync_ctrl_state_nxt;\r\n    end\r\n\r\nend\r\nelse begin\r\n\r\n    always @* begin\r\n        prev_ctrl_state = 5'h0;\r\n        sync_ctrl_state = 5'h0;\r\n    end\r\n\r\nend\r\nendgenerate\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Main FSM\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        ctrl_state   <= IDLE;\r\n    else\r\n        ctrl_state   <= ctrl_state_nxt;\r\nend\r\n\r\n\r\nalways @* begin\r\n\r\n    // Default assignment, perform assignment only at relevant state\r\n    sync_ctrl_state_nxt = sync_ctrl_state;\r\n    sync_valid          = 1'b0;\r\n\r\n    case (ctrl_state)\r\n        IDLE: begin\r\n            if (clk_in_pll_locked)\r\n                ctrl_state_nxt = PWRDWN;\r\n            else\r\n                ctrl_state_nxt = IDLE;\r\n        end\r\n\r\n        PWRDWN: begin\r\n            if (int_timer[6])\r\n                ctrl_state_nxt = PWRDWN_TSEN;\r\n            else\r\n                ctrl_state_nxt = PWRDWN;\r\n        end\r\n\r\n        PWRDWN_TSEN: begin\r\n            if (int_timer[7])\r\n                ctrl_state_nxt = PWRDWN_DONE;\r\n            else\r\n                ctrl_state_nxt = PWRDWN_TSEN;\r\n        end\r\n\r\n        PWRDWN_DONE: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (clk_dft_lh) begin\r\n                    if (sync_ready)\r\n                        ctrl_state_nxt = PWRUP_CH;\r\n                    else\r\n                        ctrl_state_nxt = SYNC1;\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = PWRDWN_DONE;\r\n                end\r\n\r\n                if (clk_dft_lh) begin\r\n                    sync_ctrl_state_nxt = PWRUP_CH;\r\n                    sync_valid          = 1'b1;\r\n                end\r\n                \r\n            end\r\n            else begin\r\n                if (clk_dft_lh)\r\n                    ctrl_state_nxt = PWRUP_CH;\r\n                else\r\n                    ctrl_state_nxt = PWRDWN_DONE;\r\n            end\r\n        end\r\n\r\n        PWRUP_CH: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (clk_dft_hl) begin\r\n                    if (sync_ready)\r\n                        ctrl_state_nxt = PWRUP_SOC;\r\n                    else\r\n                        ctrl_state_nxt = SYNC1;\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = PWRUP_CH;\r\n                end\r\n\r\n                if (clk_dft_hl) begin\r\n                    sync_ctrl_state_nxt = PWRUP_SOC;\r\n                    sync_valid          = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (clk_dft_hl)\r\n                    ctrl_state_nxt = PWRUP_SOC;\r\n                else\r\n                    ctrl_state_nxt = PWRUP_CH;\r\n            end\r\n        end\r\n\r\n        PWRUP_SOC: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (eoc_hl) begin\r\n                    if (sync_ready) begin\r\n                        if (cmd_fetched & ~cmd_is_rclb)\r\n                            ctrl_state_nxt = CONV;\r\n                        else if (cmd_fetched & cmd_is_rclb)\r\n                            ctrl_state_nxt = PUTRESP;\r\n                        else if (cmd_valid)\r\n                            ctrl_state_nxt = GETCMD;\r\n                        else\r\n                            ctrl_state_nxt = WAIT;\r\n                    end\r\n                    else begin\r\n                        ctrl_state_nxt = SYNC1;\r\n                    end\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = PWRUP_SOC;\r\n                end\r\n\r\n                if (eoc_hl) begin\r\n                    if (cmd_fetched & ~cmd_is_rclb)\r\n                        sync_ctrl_state_nxt = CONV;\r\n                    else if (cmd_fetched & cmd_is_rclb)\r\n                        sync_ctrl_state_nxt = PUTRESP;\r\n                    else if (cmd_valid)\r\n                        sync_ctrl_state_nxt = GETCMD;\r\n                    else\r\n                        sync_ctrl_state_nxt = WAIT;\r\n\r\n                    sync_valid  = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (cmd_fetched & ~cmd_is_rclb & eoc_hl)\r\n                    ctrl_state_nxt = CONV;\r\n                else if (cmd_fetched & cmd_is_rclb & eoc_hl)\r\n                    ctrl_state_nxt = PUTRESP;\r\n                else if (cmd_valid & eoc_hl)\r\n                    ctrl_state_nxt = GETCMD;\r\n                else if (eoc_hl)\r\n                    ctrl_state_nxt = WAIT;\r\n                else\r\n                    ctrl_state_nxt = PWRUP_SOC;\r\n            end\r\n        end\r\n\r\n        SYNC1: begin\r\n            if (sync_ready)\r\n                ctrl_state_nxt = sync_ctrl_state;   // mismatches by 1 soft ip clock, proceed to next state\r\n            else\r\n                ctrl_state_nxt = prev_ctrl_state;   // Both ADC is out of sync, go back to previous state\r\n\r\n            sync_valid  = 1'b1;\r\n\r\n        end\r\n        \r\n        WAIT: begin\r\n            if (cmd_valid)\r\n                ctrl_state_nxt = GETCMD_W;\r\n            else\r\n                ctrl_state_nxt = WAIT;\r\n        end\r\n\r\n        GETCMD_W: begin\r\n            if (cmd_is_rclb | adc_change_mode)\r\n                ctrl_state_nxt = PWRDWN;\r\n            else\r\n                ctrl_state_nxt = PRE_CONV;\r\n        end\r\n\r\n        PRE_CONV: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (eoc_hl) begin\r\n                    if (sync_ready)\r\n                        ctrl_state_nxt = CONV;\r\n                    else\r\n                        ctrl_state_nxt = SYNC1;\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = PRE_CONV;\r\n                end\r\n\r\n                if (eoc_hl) begin\r\n                    sync_ctrl_state_nxt = CONV;\r\n                    sync_valid          = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (eoc_hl)\r\n                    ctrl_state_nxt = CONV;\r\n                else\r\n                    ctrl_state_nxt = PRE_CONV;\r\n            end\r\n        end\r\n\r\n        GETCMD: begin\r\n            if ((cmd_is_rclb | adc_change_mode) & ~pend)\r\n                ctrl_state_nxt = PWRDWN;\r\n            else if ((cmd_is_rclb | adc_change_mode) & pend)\r\n                ctrl_state_nxt = WAIT_PEND;\r\n            else\r\n                ctrl_state_nxt = CONV;\r\n        end\r\n\r\n        CONV: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (eoc_hl) begin\r\n                    if (sync_ready) begin\r\n                        if (avrg_enable & ~avrg_cnt_done)\r\n                            ctrl_state_nxt = AVRG_CNT;\r\n                        else\r\n                            ctrl_state_nxt = CONV_DLY1;\r\n                    end\r\n                    else begin\r\n                        ctrl_state_nxt = SYNC1;\r\n                    end\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = CONV;\r\n                end\r\n\r\n                if (eoc_hl) begin\r\n                    if (avrg_enable & ~avrg_cnt_done)\r\n                        sync_ctrl_state_nxt = AVRG_CNT;\r\n                    else \r\n                        sync_ctrl_state_nxt = CONV_DLY1;\r\n\r\n                    sync_valid  = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (eoc_hl & avrg_enable & ~avrg_cnt_done)\r\n                    ctrl_state_nxt = AVRG_CNT;\r\n                else if (eoc_hl)\r\n                    ctrl_state_nxt = CONV_DLY1;\r\n                else\r\n                    ctrl_state_nxt = CONV;\r\n            end\r\n        end\r\n        \r\n        AVRG_CNT: begin\r\n            ctrl_state_nxt = CONV;\r\n        end\r\n        \r\n        CONV_DLY1: begin\r\n            ctrl_state_nxt = PUTRESP;\r\n        end\r\n\r\n        PUTRESP: begin\r\n            ctrl_state_nxt = PUTRESP_DLY1;\r\n        end\r\n        \r\n        PUTRESP_DLY1: begin\r\n            ctrl_state_nxt = PUTRESP_DLY2;\r\n        end\r\n        \r\n        PUTRESP_DLY2: begin\r\n            ctrl_state_nxt = PUTRESP_DLY3;\r\n        end\r\n\r\n        PUTRESP_DLY3: begin\r\n            if (cmd_valid)\r\n                ctrl_state_nxt = GETCMD;\r\n            else if (pend)\r\n                ctrl_state_nxt = WAIT_PEND;\r\n            else\r\n                ctrl_state_nxt = WAIT;\r\n        end\r\n\r\n        WAIT_PEND: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (eoc_hl) begin\r\n                    if (sync_ready)\r\n                        ctrl_state_nxt = WAIT_PEND_DLY1;\r\n                    else\r\n                        ctrl_state_nxt = SYNC1;\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = WAIT_PEND;\r\n                end\r\n\r\n                if (eoc_hl) begin\r\n                    sync_ctrl_state_nxt = WAIT_PEND_DLY1;\r\n                    sync_valid          = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (eoc_hl)\r\n                    ctrl_state_nxt = WAIT_PEND_DLY1;\r\n                else\r\n                    ctrl_state_nxt = WAIT_PEND;\r\n            end\r\n        end\r\n        \r\n        WAIT_PEND_DLY1: begin\r\n            ctrl_state_nxt = PUTRESP_PEND;\r\n        end\r\n        \r\n        PUTRESP_PEND: begin\r\n            if (cmd_valid)\r\n                ctrl_state_nxt = GETCMD;\r\n            else\r\n                ctrl_state_nxt = WAIT;\r\n        end\r\n\r\n        default: begin\r\n            ctrl_state_nxt = IDLE;\r\n        end\r\n\r\n    endcase\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// ADC control signal generation from FSM\r\n//--------------------------------------------------------------------------------------------//\r\nalways @* begin\r\n    chsel_nxt       = chsel;\r\n    soc_nxt         = soc;\r\n    usr_pwd_nxt     = usr_pwd;\r\n    tsen_nxt        = tsen;\r\n\r\n    case (ctrl_state_nxt)\r\n        IDLE: begin\r\n            chsel_nxt   = 5'b11110;\r\n            soc_nxt     = 1'b0;\r\n            usr_pwd_nxt = 1'b1;\r\n            tsen_nxt    = 1'b0;\r\n        end\r\n\r\n        PWRDWN: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = 1'b0;\r\n            usr_pwd_nxt = 1'b1;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PWRDWN_TSEN: begin\r\n            //chsel_nxt   = chsel;\r\n            soc_nxt     = 1'b0;\r\n            usr_pwd_nxt = 1'b1;\r\n            if (cmd_fetched & cmd_is_ts)        // Transition to TS mode\r\n                tsen_nxt    = 1'b1;\r\n            else if (cmd_fetched & cmd_is_rclb) // In recalibration mode, maintain previous TSEN setting\r\n                tsen_nxt    = tsen;\r\n            else\r\n                tsen_nxt    = 1'b0;             // Transition to Normal mode\r\n            \r\n            // Case:496977 \r\n            // Ensure the right chsel during power up sequence (voltage sensing mode vs temperature sensing mode)\r\n            if (cmd_fetched & (cmd_is_ts | (cmd_is_rclb & tsen)))   // Set channel select to TSD channel if transition to TS mode or recalibration on TS mode\r\n                chsel_nxt   = 5'b10001;\r\n            else\r\n                chsel_nxt   = 5'b11110;                                // Set channel select to dummy channel for voltage sensing mode (just like the original design)\r\n        end\r\n\r\n        PWRDWN_DONE: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = 1'b0;\r\n            usr_pwd_nxt = 1'b0;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PWRUP_CH: begin\r\n            //chsel_nxt   = 5'b11110;\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = 1'b0;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PWRUP_SOC: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = 1'b1;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        SYNC1: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        WAIT: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        GETCMD_W: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PRE_CONV: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        GETCMD: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        CONV: begin\r\n            chsel_nxt   = cmd_channel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        AVRG_CNT: begin\r\n            chsel_nxt   = cmd_channel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        CONV_DLY1: begin\r\n            chsel_nxt   = cmd_channel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PUTRESP: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        PUTRESP_DLY1: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PUTRESP_DLY2: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        PUTRESP_DLY3: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        WAIT_PEND: begin\r\n            //chsel_nxt   = chsel;\r\n            if (tsen)\r\n                chsel_nxt   = chsel;         \r\n            else                             \r\n                chsel_nxt   = 5'b11110;     // The reason for this change is to support ADC's simulation model (case:226093).\r\n                                            // During the final sampling cycle which meant to complete the pending ADC sampling (ADC output is one cycle delay in nature),\r\n                                            // we assign a dummy channel value instead of maintaining the previous channel value. Functionally, it does not matter. \r\n                                            // But it does matter to simulation model where it keep popping up the expected value from user's simulation file based on current channel value.\r\n                                            // This will avoid the simulation model from incorrectly popping out the value from previous channel twice during ADC mode transition.\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        WAIT_PEND_DLY1: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PUTRESP_PEND: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        default: begin\r\n            chsel_nxt   = 5'bx;\r\n            soc_nxt     = 1'bx;\r\n            usr_pwd_nxt = 1'bx;\r\n            tsen_nxt    = 1'bx;\r\n        end\r\n\r\n    endcase\r\nend\r\n\r\n\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        chsel       <= 5'b11110;\r\n        soc         <= 1'b0;\r\n        usr_pwd     <= 1'b1;\r\n        tsen        <= 1'b0;\r\n    end\r\n    else begin\r\n        chsel       <= chsel_nxt;\r\n        soc         <= soc_nxt;\r\n        usr_pwd     <= usr_pwd_nxt;\r\n        tsen        <= tsen_nxt;\r\n\r\n    end\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Control signal from FSM arc transition\r\n//--------------------------------------------------------------------------------------------//\r\n// These 3 events indicate DOUT from ADC hardblock is ready to be consumed.\r\nassign arc_conv_conv_dly1               = (ctrl_state == CONV) & (ctrl_state_nxt == CONV_DLY1);\r\nassign arc_wait_pend_wait_pend_dly1     = (ctrl_state == WAIT_PEND) & (ctrl_state_nxt == WAIT_PEND_DLY1);\r\nassign arc_to_avrg_cnt                  = ((ctrl_state == CONV) & (ctrl_state_nxt == AVRG_CNT)) | ((ctrl_state == SYNC1) & (ctrl_state_nxt == AVRG_CNT));\r\n\r\n// CONV to CONV_DLY1 can also be trasition from SYNC1 in dual adc mode \r\n// WAIT_PEND to WAIT_PEND_DLY1 can also be trasition from SYNC1 in dual adc mode \r\nassign arc_sync1_conv_dly1              = (ctrl_state == SYNC1) & (ctrl_state_nxt == CONV_DLY1);        // prev_ctrl_state is guaranteed by design to be CONV\r\nassign arc_sync1_wait_pend_dly1         = (ctrl_state == SYNC1) & (ctrl_state_nxt == WAIT_PEND_DLY1);   // prev_ctrl_state is guaranteed by design to be WAIT_PEND\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Control signal from FSM current state\r\n//--------------------------------------------------------------------------------------------//\r\nassign putresp_s        = (ctrl_state == PUTRESP);\r\nassign putresp_pend_s   = (ctrl_state == PUTRESP_PEND);\r\nassign pwrdwn_s         = (ctrl_state == PWRDWN);\r\nassign pwrdwn_tsen_s    = (ctrl_state == PWRDWN_TSEN);\r\nassign avrg_cnt_s       = (ctrl_state == AVRG_CNT);\r\nassign wait_pend_dly1_s = (ctrl_state == WAIT_PEND_DLY1);\r\nassign conv_dly1_s      = (ctrl_state == CONV_DLY1);\r\nassign conv_s           = (ctrl_state == CONV);\r\nassign putresp_dly3_s   = (ctrl_state == PUTRESP_DLY3);\r\n\r\n\r\n\r\n// Load Response when\r\n// 1) In putresp state and there is pending response\r\n// 2) In putresp_pend state\r\nassign load_rsp                     = (putresp_s & ~cmd_is_rclb & pend) | putresp_pend_s;\r\nassign load_dout                    = ((arc_conv_conv_dly1 | arc_sync1_conv_dly1) & ~cmd_is_rclb & pend) | arc_wait_pend_wait_pend_dly1 | arc_sync1_wait_pend_dly1 | ((int_timer != 8'h0) & arc_to_avrg_cnt);\r\nassign load_cmd_ready               = putresp_s;\r\nassign arc_to_conv                  = (ctrl_state != CONV) & (ctrl_state != AVRG_CNT) & ~((ctrl_state == SYNC1) & (prev_ctrl_state == CONV)) & (ctrl_state_nxt == CONV);\r\n\r\nassign arc_getcmd_w_pwrdwn          = (ctrl_state == GETCMD_W) & (ctrl_state_nxt == PWRDWN);\r\nassign arc_getcmd_pwrdwn            = (ctrl_state == GETCMD) & (ctrl_state_nxt == PWRDWN);\r\nassign load_cmd_fetched             = arc_getcmd_w_pwrdwn | arc_getcmd_pwrdwn;\r\nassign load_int_timer               = arc_getcmd_w_pwrdwn | arc_getcmd_pwrdwn | arc_to_conv; // arc_to_conv is added for averaging\r\nassign incr_int_timer               = pwrdwn_s | pwrdwn_tsen_s | avrg_cnt_s; \r\n\r\nassign arc_out_from_pwrup_soc       = ((ctrl_state == PWRUP_SOC) & (ctrl_state_nxt != PWRUP_SOC) & (ctrl_state_nxt != SYNC1)) |\r\n                                        ((ctrl_state == SYNC1) & (prev_ctrl_state == PWRUP_SOC) & (ctrl_state_nxt != PWRUP_SOC));\r\nassign clr_cmd_fetched              = arc_out_from_pwrup_soc;\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Control signal required by FSM\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_is_rclb      = (cmd_channel == 5'b11111);\r\nassign cmd_is_ts        = (cmd_channel == 5'b10001);\r\nassign adc_change_mode  = (~prev_cmd_is_ts & cmd_is_ts) | (prev_cmd_is_ts & ~cmd_is_ts);\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        prev_cmd_is_ts  <= 1'b0;\r\n    else if (load_cmd_ready & ~cmd_is_rclb)\r\n        prev_cmd_is_ts  <= cmd_is_ts;\r\nend\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        cmd_fetched  <= 1'b0;\r\n    else if (load_cmd_fetched)\r\n        cmd_fetched  <= 1'b1;\r\n    else if (clr_cmd_fetched)\r\n        cmd_fetched  <= 1'b0;\r\nend\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        conv_dly1_s_flp <= 1'b0;\r\n    else\r\n        conv_dly1_s_flp <= conv_dly1_s;\r\nend\r\n\r\n// Using conv_dly1_s_flp instead of (ctrl_state == PUTRESP) to set the pend flag\r\n// This is to cover cases where during recalibration the state can go from PWRUP_SOC to PUTRESP directly \r\n// In averaging pend is set at pt 63, leaving pt 64 to be captured at WAIT PEND state (consistent with non-averaging)\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        pend <= 1'b0;\r\n    else if (conv_dly1_s_flp)\r\n        pend <= 1'b1;\r\n    else if (wait_pend_dly1_s)\r\n        pend <= 1'b0;\r\n\r\nend\r\n\r\n\r\n//------------------------------------------------------------------------------------------------------------------//\r\n// Register the DOUT bus from ADC hardblock\r\n// This eliminates sampling invalid DOUT bus (validity of DOUT bus is limited by TDAC timing spec of ADC hardblock) \r\n// if latency of load_rsp increases in future\r\n// Example: Previously DOUT is consumed by the design 2 clocks from falling edge of EOC\r\n//          Without this register, to support averaging, DOUT is consumed by the design 4 clocks from falling edge of EOC\r\n//          (additional 2 clocks for RAM accesses) \r\n//------------------------------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        dout_flp <= 12'd0;\r\n    else if (load_dout) \r\n        dout_flp <= dout;\r\nend\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Internal timer to ensure soft power down stays at least for 1us\r\n// Also used as AVRG counter\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        int_timer <= 8'h0;\r\n    else if (load_int_timer)\r\n        int_timer <= 8'h0;\r\n    else if (incr_int_timer)\r\n        int_timer <= int_timer + 8'h1;\r\nend\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        avrg_cnt_done <= 1'b0;\r\n    else if ((int_timer == (NUM_AVRG_POINTS - 8'd1)) & conv_s)\r\n        avrg_cnt_done <= 1'b1;\r\n    else if (clear_avrg_cnt_done)\r\n        avrg_cnt_done <= 1'b0;\r\nend\r\n\r\nassign clear_avrg_cnt_done = putresp_dly3_s & ~cmd_valid; // Restart 64 point sampling if continuous sample is broken  \r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Store up CMD information due to \r\n// Resp is always one clk_dft later from current cmd (ADC hardblock characteristic)\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        cmd_channel_dly <= 5'h0;\r\n        cmd_sop_dly     <= 1'b0;\r\n        cmd_eop_dly     <= 1'b0;\r\n    end\r\n    else if (load_cmd_ready) begin\r\n        cmd_channel_dly <= cmd_channel;\r\n        cmd_sop_dly     <= cmd_sop;\r\n        cmd_eop_dly     <= cmd_eop;\r\n    end\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Averaging logic \r\n// \r\n//--------------------------------------------------------------------------------------------//\r\n// Only temperature sensing mode has averaging feature\r\nassign avrg_enable = cmd_is_ts;\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        avrg_sum    <= 18'h0;\r\n    else if (clear_avrg_sum)\r\n        avrg_sum    <= 18'h0;\r\n    else if (add_avrg_sum_run)\r\n        avrg_sum  <= (avrg_sum - fifo_q) + {6'h0, dout_flp};\r\n    else if (add_avrg_sum)\r\n        avrg_sum  <= avrg_sum + {6'h0, dout_flp};\r\nend\r\n\r\nassign add_avrg_sum     = ((int_timer != 8'h0) & avrg_cnt_s) |  // when int_timer == 0 the DOUT is not yet ready (ADC hard block introduce one ADC clock delay in the ADC output) \r\n                            (conv_dly1_s & avrg_enable & pend) |    // cover averaging pt 64 and beyond (in back 2 back TS scenario)\r\n                            (conv_dly1_s & avrg_enable & ~pend & ~frst_64_ptr_done) | // cover averaging pt 63\r\n                            (wait_pend_dly1_s & prev_cmd_is_ts); // cover averaging pt 64 and beyond (in switching between ts to non-ts scenario)\r\n\r\nassign add_avrg_sum_run = set_frst_64_ptr_done & frst_64_ptr_done;\r\n\r\nassign clear_avrg_sum           = ~avrg_cnt_done & putresp_pend_s;  // Restart 64 point sampling if continuous sample is broken\r\n                                                                    // Not avrg_cnt_done is to ensure put response pending state is caused by broken continuous sampling\r\n\r\nassign set_frst_64_ptr_done     = (wait_pend_dly1_s & prev_cmd_is_ts) | // set at averaging pt 64 and beyond (where next conversion is non-ts)\r\n                                    (conv_dly1_s & avrg_enable & pend); // set at averaging pt 64 and beyond (where next conversion is ts)\r\n                                                                        // No harm to set this signal beyond pt 64\r\n\r\nassign clear_frst_64_ptr_done   = clear_avrg_sum;\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        frst_64_ptr_done <= 1'b0;\r\n    else if (set_frst_64_ptr_done)\r\n        frst_64_ptr_done <= 1'b1;\r\n    else if (clear_frst_64_ptr_done)\r\n        frst_64_ptr_done <= 1'b0;\r\nend\r\n\r\nassign fifo_sclr    = clear_avrg_sum;\r\nassign fifo_rdreq   = (((arc_wait_pend_wait_pend_dly1 | arc_sync1_wait_pend_dly1) & prev_cmd_is_ts) | ((arc_conv_conv_dly1 | arc_sync1_conv_dly1) & avrg_enable & pend)) & frst_64_ptr_done;\r\nassign fifo_wrreq   = ((int_timer != 8'h0) & avrg_cnt_s) |\r\n                        (conv_dly1_s & avrg_enable & pend) |\r\n                        (conv_dly1_s & avrg_enable & ~pend & ~frst_64_ptr_done) |\r\n                        (wait_pend_dly1_s & prev_cmd_is_ts);\r\n\r\naltera_modular_adc_control_avrg_fifo ts_avrg_fifo (\r\n    .clock      (clk),\r\n    .data       (dout_flp),\r\n    .rdreq      (fifo_rdreq),\r\n    .wrreq      (fifo_wrreq),\r\n    .sclr       (fifo_sclr),\r\n    .empty      (),\r\n    .full       (),\r\n    .q          (fifo_q)\r\n);\r\n\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Avalon ST response interface output register\r\n// Avalon ST command interface output register (cmd_ready)\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        rsp_valid   <= 1'b0;\r\n        rsp_channel <= 5'h0;\r\n        rsp_data    <= 12'h0;\r\n        rsp_sop     <= 1'b0;\r\n        rsp_eop     <= 1'b0;\r\n    end\r\n    else if (load_rsp) begin\r\n        rsp_valid   <= 1'b1;\r\n        rsp_channel <= cmd_channel_dly;\r\n        rsp_data    <= rsp_data_nxt;\r\n        rsp_sop     <= cmd_sop_dly;\r\n        rsp_eop     <= cmd_eop_dly;\r\n    end \r\n    else begin\r\n        rsp_valid   <= 1'b0;\r\n        rsp_channel <= 5'h0;\r\n        rsp_data    <= 12'h0;\r\n        rsp_sop     <= 1'b0;\r\n        rsp_eop     <= 1'b0;\r\n    end\r\nend\r\n\r\ngenerate\r\nif (is_this_first_or_second_adc == 2) begin\r\n    assign rsp_data_nxt = prev_cmd_is_ts ? 12'h0 : dout_flp;    // For ADC2, mask out TSD value since TSD is not supported in ADC2\r\nend\r\nelse begin\r\n    assign rsp_data_nxt = prev_cmd_is_ts ? avrg_sum[17:6] : dout_flp;\r\nend\r\nendgenerate\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        cmd_ready   <= 1'b0;\r\n    else if (load_cmd_ready)\r\n        cmd_ready   <= 1'b1;\r\n    else\r\n        cmd_ready   <= 1'b0;\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_sample_store.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_sample_store #(\r\n    parameter DUAL_ADC_MODE     = 0,\r\n    parameter RSP_DATA_WIDTH    = 12\r\n) (\r\n    input                       clk,\r\n    input                       rst_n,\r\n    input [6:0]                 addr,\r\n    input                       read,\r\n    input                       write,\r\n    input [31:0]                writedata,\r\n    input                       rsp_valid,\r\n    input [4:0]                 rsp_channel,\r\n    input [RSP_DATA_WIDTH-1:0]  rsp_data,\r\n    input                       rsp_sop,\r\n    input                       rsp_eop,\r\n    output reg [31:0]           readdata,\r\n    output reg                  irq\r\n\r\n);\r\n\r\nlocalparam RAM_DATA_WIDTH = (DUAL_ADC_MODE == 1) ? 32 : 16;\r\n\r\nreg                         e_eop;\r\nreg                         s_eop;\r\nreg [31:0]                  csr_readdata;\r\nreg                         ram_rd_en_flp;\r\nreg [5:0]                   slot_num;\r\n\r\nwire                        ier_addr;\r\nwire                        isr_addr;\r\nwire                        ram_addr;\r\nwire                        ier_wr_en;\r\nwire                        isr_wr_en;\r\nwire                        ier_rd_en;\r\nwire                        isr_rd_en;\r\nwire                        ram_rd_en;\r\nwire                        set_eop;\r\nwire [31:0]                 csr_readdata_nxt;\r\nwire [31:0]                 ier_internal;\r\nwire [31:0]                 isr_internal;\r\nwire [31:0]                 readdata_nxt;\r\nwire [RAM_DATA_WIDTH-1:0]   q_out;\r\nwire                        irq_nxt;\r\nwire [RAM_DATA_WIDTH-1:0]   ram_datain;\r\nwire [RAM_DATA_WIDTH-1:0]   ram_readdata;\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// address decode\r\n//--------------------------------------------------------------------------------------------//\r\nassign ier_addr = (addr == 7'h40);\r\nassign isr_addr = (addr == 7'h41);\r\nassign ram_addr = (addr < 7'h40);\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// write enable\r\n//--------------------------------------------------------------------------------------------//\r\nassign ier_wr_en = ier_addr & write;\r\nassign isr_wr_en = isr_addr & write;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// read enable\r\n//--------------------------------------------------------------------------------------------//\r\nassign ier_rd_en = ier_addr & read;\r\nassign isr_rd_en = isr_addr & read;\r\nassign ram_rd_en = ram_addr & read;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// interrupt enable register\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        e_eop <= 1'b1;\r\n    else if (ier_wr_en)\r\n        e_eop <= writedata[0];\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// interrupt status register\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        s_eop <= 1'b0;\r\n    else if (set_eop)\r\n        s_eop <= 1'b1;\r\n    else if (isr_wr_en & writedata[0])\r\n        s_eop <= 1'b0;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Avalon slave readdata path - read latency of 2 due to RAM's address and dataout register\r\n//--------------------------------------------------------------------------------------------//\r\nassign ier_internal     = {31'h0, e_eop};\r\nassign isr_internal     = {31'h0, s_eop};\r\nassign csr_readdata_nxt = (ier_internal & {32{ier_rd_en}}) |\r\n                            (isr_internal & {32{isr_rd_en}});\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        csr_readdata <= 32'h0;\r\n    else\r\n        csr_readdata <= csr_readdata_nxt;\r\nend\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        ram_rd_en_flp <= 1'b0;\r\n    else\r\n        ram_rd_en_flp <= ram_rd_en;\r\nend\r\n\r\nassign readdata_nxt = ram_rd_en_flp ? ram_readdata : csr_readdata;\r\nassign ram_readdata = q_out[RAM_DATA_WIDTH-1:0]; \r\n\r\n\r\ngenerate\r\nif (DUAL_ADC_MODE) begin\r\n    assign ram_datain   = {4'h0, rsp_data[23:12], 4'h0, rsp_data[11:0]};\r\nend\r\nelse begin\r\n    assign ram_datain   = {4'h0, rsp_data};\r\nend\r\nendgenerate\r\n\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        readdata <= 32'h0;\r\n    else\r\n        readdata <= readdata_nxt;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// RAM to store ADC sample\r\n//--------------------------------------------------------------------------------------------//\r\naltera_modular_adc_sample_store_ram #(\r\n    .DATA_WIDTH (RAM_DATA_WIDTH)    \r\n) u_ss_ram (\r\n    .clock      (clk),\r\n    .data       (ram_datain),\r\n    .rdaddress  (addr[5:0]),\r\n    .rden       (ram_rd_en),\r\n    .wraddress  (slot_num),\r\n    .wren       (rsp_valid),\r\n    .q          (q_out)\r\n\r\n);\r\n\r\n//assign ram_datain = (DUAL_ADC_MODE == 1) ? ({8'h0, rsp_data}) : ({4'h0, rsp_data});\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Sequential counter to indicate which RAM location to store ADC sample\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        slot_num <= 6'h0;\r\n    else if (set_eop)\r\n        slot_num <= 6'h0;\r\n    else if (rsp_valid)\r\n        slot_num <= slot_num + 6'h1; \r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Set EOP status\r\n//--------------------------------------------------------------------------------------------//\r\nassign set_eop = rsp_valid & rsp_eop;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// IRQ\r\n//--------------------------------------------------------------------------------------------//\r\nassign irq_nxt = e_eop & s_eop;\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        irq <= 1'b0;\r\n    else\r\n        irq <= irq_nxt;\r\nend\r\n\r\n\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_sample_store_ram.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// megafunction wizard: %RAM: 2-PORT%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: altera_modular_adc_sample_store_ram.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 14.1.0 Internal Build 94 06/25/2014 PN Full Version\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2014 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule altera_modular_adc_sample_store_ram #(\r\n    parameter DATA_WIDTH = 16\r\n) (\r\n\tclock,\r\n\tdata,\r\n\trdaddress,\r\n\trden,\r\n\twraddress,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t  clock;\r\n\tinput\t[DATA_WIDTH-1:0]  data;\r\n\tinput\t[5:0]  rdaddress;\r\n\tinput\t  rden;\r\n\tinput\t[5:0]  wraddress;\r\n\tinput\t  wren;\r\n\toutput\t[DATA_WIDTH-1:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n\ttri1\t  rden;\r\n\ttri0\t  wren;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [DATA_WIDTH-1:0] sub_wire0;\r\n\twire [DATA_WIDTH-1:0] q = sub_wire0[DATA_WIDTH-1:0];\r\n\r\n\taltsyncram\taltsyncram_component (\r\n\t\t\t\t.address_a (wraddress),\r\n\t\t\t\t.address_b (rdaddress),\r\n\t\t\t\t.clock0 (clock),\r\n\t\t\t\t.data_a (data),\r\n\t\t\t\t.rden_b (rden),\r\n\t\t\t\t.wren_a (wren),\r\n\t\t\t\t.q_b (sub_wire0),\r\n\t\t\t\t.aclr0 (1'b0),\r\n\t\t\t\t.aclr1 (1'b0),\r\n\t\t\t\t.addressstall_a (1'b0),\r\n\t\t\t\t.addressstall_b (1'b0),\r\n\t\t\t\t.byteena_a (1'b1),\r\n\t\t\t\t.byteena_b (1'b1),\r\n\t\t\t\t.clock1 (1'b1),\r\n\t\t\t\t.clocken0 (1'b1),\r\n\t\t\t\t.clocken1 (1'b1),\r\n\t\t\t\t.clocken2 (1'b1),\r\n\t\t\t\t.clocken3 (1'b1),\r\n\t\t\t\t.data_b ({DATA_WIDTH{1'b1}}),\r\n\t\t\t\t.eccstatus (),\r\n\t\t\t\t.q_a (),\r\n\t\t\t\t.rden_a (1'b1),\r\n\t\t\t\t.wren_b (1'b0));\r\n\tdefparam\r\n\t\taltsyncram_component.address_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.address_reg_b = \"CLOCK0\",\r\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_input_b = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_output_b = \"BYPASS\",\r\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\r\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\r\n\t\taltsyncram_component.numwords_a = 64,\r\n\t\taltsyncram_component.numwords_b = 64,\r\n\t\taltsyncram_component.operation_mode = \"DUAL_PORT\",\r\n\t\taltsyncram_component.outdata_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.outdata_reg_b = \"UNREGISTERED\",\r\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\r\n\t\taltsyncram_component.ram_block_type = \"M9K\",\r\n\t\taltsyncram_component.rdcontrol_reg_b = \"CLOCK0\",\r\n\t\taltsyncram_component.read_during_write_mode_mixed_ports = \"OLD_DATA\",\r\n\t\taltsyncram_component.widthad_a = 6,\r\n\t\taltsyncram_component.widthad_b = 6,\r\n\t\taltsyncram_component.width_a = DATA_WIDTH,\r\n\t\taltsyncram_component.width_b = DATA_WIDTH,\r\n\t\taltsyncram_component.width_byteena_a = 1;\r\n\r\n\r\nendmodule\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_sequencer.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_sequencer #(\r\n    parameter   DUAL_ADC_MODE   = 0,\r\n    parameter   CSD_LENGTH      = 64,\r\n    parameter   CSD_SLOT_0      = 5'h0,\r\n    parameter   CSD_SLOT_1      = 5'h0,\r\n    parameter   CSD_SLOT_2      = 5'h0,\r\n    parameter   CSD_SLOT_3      = 5'h0,\r\n    parameter   CSD_SLOT_4      = 5'h0,\r\n    parameter   CSD_SLOT_5      = 5'h0,\r\n    parameter   CSD_SLOT_6      = 5'h0,\r\n    parameter   CSD_SLOT_7      = 5'h0,\r\n    parameter   CSD_SLOT_8      = 5'h0,\r\n    parameter   CSD_SLOT_9      = 5'h0,\r\n    parameter   CSD_SLOT_10     = 5'h0,\r\n    parameter   CSD_SLOT_11     = 5'h0,\r\n    parameter   CSD_SLOT_12     = 5'h0,\r\n    parameter   CSD_SLOT_13     = 5'h0,\r\n    parameter   CSD_SLOT_14     = 5'h0,\r\n    parameter   CSD_SLOT_15     = 5'h0,\r\n    parameter   CSD_SLOT_16     = 5'h0,\r\n    parameter   CSD_SLOT_17     = 5'h0,\r\n    parameter   CSD_SLOT_18     = 5'h0,\r\n    parameter   CSD_SLOT_19     = 5'h0,\r\n    parameter   CSD_SLOT_20     = 5'h0,\r\n    parameter   CSD_SLOT_21     = 5'h0,\r\n    parameter   CSD_SLOT_22     = 5'h0,\r\n    parameter   CSD_SLOT_23     = 5'h0,\r\n    parameter   CSD_SLOT_24     = 5'h0,\r\n    parameter   CSD_SLOT_25     = 5'h0,\r\n    parameter   CSD_SLOT_26     = 5'h0,\r\n    parameter   CSD_SLOT_27     = 5'h0,\r\n    parameter   CSD_SLOT_28     = 5'h0,\r\n    parameter   CSD_SLOT_29     = 5'h0,\r\n    parameter   CSD_SLOT_30     = 5'h0,\r\n    parameter   CSD_SLOT_31     = 5'h0,\r\n    parameter   CSD_SLOT_32     = 5'h0,\r\n    parameter   CSD_SLOT_33     = 5'h0,\r\n    parameter   CSD_SLOT_34     = 5'h0,\r\n    parameter   CSD_SLOT_35     = 5'h0,\r\n    parameter   CSD_SLOT_36     = 5'h0,\r\n    parameter   CSD_SLOT_37     = 5'h0,\r\n    parameter   CSD_SLOT_38     = 5'h0,\r\n    parameter   CSD_SLOT_39     = 5'h0,\r\n    parameter   CSD_SLOT_40     = 5'h0,\r\n    parameter   CSD_SLOT_41     = 5'h0,\r\n    parameter   CSD_SLOT_42     = 5'h0,\r\n    parameter   CSD_SLOT_43     = 5'h0,\r\n    parameter   CSD_SLOT_44     = 5'h0,\r\n    parameter   CSD_SLOT_45     = 5'h0,\r\n    parameter   CSD_SLOT_46     = 5'h0,\r\n    parameter   CSD_SLOT_47     = 5'h0,\r\n    parameter   CSD_SLOT_48     = 5'h0,\r\n    parameter   CSD_SLOT_49     = 5'h0,\r\n    parameter   CSD_SLOT_50     = 5'h0,\r\n    parameter   CSD_SLOT_51     = 5'h0,\r\n    parameter   CSD_SLOT_52     = 5'h0,\r\n    parameter   CSD_SLOT_53     = 5'h0,\r\n    parameter   CSD_SLOT_54     = 5'h0,\r\n    parameter   CSD_SLOT_55     = 5'h0,\r\n    parameter   CSD_SLOT_56     = 5'h0,\r\n    parameter   CSD_SLOT_57     = 5'h0,\r\n    parameter   CSD_SLOT_58     = 5'h0,\r\n    parameter   CSD_SLOT_59     = 5'h0,\r\n    parameter   CSD_SLOT_60     = 5'h0,\r\n    parameter   CSD_SLOT_61     = 5'h0,\r\n    parameter   CSD_SLOT_62     = 5'h0,\r\n    parameter   CSD_SLOT_63     = 5'h0,\r\n    parameter   CSD_SLOT_0_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_1_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_2_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_3_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_4_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_5_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_6_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_7_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_8_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_9_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_10_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_11_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_12_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_13_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_14_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_15_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_16_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_17_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_18_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_19_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_20_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_21_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_22_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_23_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_24_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_25_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_26_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_27_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_28_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_29_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_30_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_31_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_32_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_33_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_34_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_35_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_36_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_37_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_38_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_39_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_40_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_41_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_42_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_43_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_44_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_45_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_46_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_47_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_48_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_49_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_50_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_51_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_52_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_53_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_54_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_55_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_56_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_57_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_58_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_59_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_60_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_61_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_62_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_63_ADC2    = 5'h0\r\n) (\r\n    input           clk,\r\n    input           rst_n,\r\n    input           addr,\r\n    input           read,\r\n    input           write,\r\n    input [31:0]    writedata,\r\n    input           cmd_ready,\r\n    input           cmd_ready_2,\r\n\r\n    output [31:0]   readdata,\r\n    output          cmd_valid,\r\n    output [4:0]    cmd_channel,\r\n    output          cmd_sop,\r\n    output          cmd_eop,\r\n    output          cmd_valid_2,\r\n    output [4:0]    cmd_channel_2,\r\n    output          cmd_sop_2,\r\n    output          cmd_eop_2\r\n\r\n);\r\n\r\nwire        clr_run;\r\nwire        clr_run_2;\r\nwire        run;\r\nwire        sw_clr_run;\r\nwire        con_mode;\r\nwire        single_mode;\r\nwire        recab_mode;\r\n\r\nfunction integer clog2;\r\n    input [31:0] value;  // Input variable\r\n    if (value == 32'h0) begin\r\n       clog2 = 1;\r\n    end\r\n    else begin\r\n        for (clog2=0; value>0; clog2=clog2+1) \r\n            value = value>>'d1;\r\n    end\r\nendfunction\r\n\r\n\r\nlocalparam CSD_ASIZE = clog2(CSD_LENGTH - 1);\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// CSR block instantiation\r\n//--------------------------------------------------------------------------------------------//\r\naltera_modular_adc_sequencer_csr u_seq_csr (\r\n    // inputs\r\n    .clk            (clk),\r\n    .rst_n          (rst_n),\r\n    .addr           (addr),\r\n    .read           (read),\r\n    .write          (write),\r\n    .writedata      (writedata),\r\n    .clr_run        (clr_run),      // clr_run and clr_run_2 shall assert/de-assert at the same cycle (design requirement)\r\n                                    // therefore, only one of them is feed back into csr block\r\n    // outputs        \r\n    .readdata       (readdata),\r\n    .run            (run),\r\n    .sw_clr_run     (sw_clr_run),\r\n    .con_mode       (con_mode),\r\n    .single_mode    (single_mode),\r\n    .recab_mode     (recab_mode)\r\n\r\n);\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Sequencer control block instantiation\r\n//--------------------------------------------------------------------------------------------//\r\naltera_modular_adc_sequencer_ctrl #(\r\n    .CSD_LENGTH    (CSD_LENGTH),\r\n    .CSD_ASIZE     (CSD_ASIZE),\r\n    .CSD_SLOT_0    (CSD_SLOT_0),\r\n    .CSD_SLOT_1    (CSD_SLOT_1),\r\n    .CSD_SLOT_2    (CSD_SLOT_2),\r\n    .CSD_SLOT_3    (CSD_SLOT_3),\r\n    .CSD_SLOT_4    (CSD_SLOT_4),\r\n    .CSD_SLOT_5    (CSD_SLOT_5),\r\n    .CSD_SLOT_6    (CSD_SLOT_6),\r\n    .CSD_SLOT_7    (CSD_SLOT_7),\r\n    .CSD_SLOT_8    (CSD_SLOT_8),\r\n    .CSD_SLOT_9    (CSD_SLOT_9),\r\n    .CSD_SLOT_10   (CSD_SLOT_10),\r\n    .CSD_SLOT_11   (CSD_SLOT_11),\r\n    .CSD_SLOT_12   (CSD_SLOT_12),\r\n    .CSD_SLOT_13   (CSD_SLOT_13),\r\n    .CSD_SLOT_14   (CSD_SLOT_14),\r\n    .CSD_SLOT_15   (CSD_SLOT_15),\r\n    .CSD_SLOT_16   (CSD_SLOT_16),\r\n    .CSD_SLOT_17   (CSD_SLOT_17),\r\n    .CSD_SLOT_18   (CSD_SLOT_18),\r\n    .CSD_SLOT_19   (CSD_SLOT_19),\r\n    .CSD_SLOT_20   (CSD_SLOT_20),\r\n    .CSD_SLOT_21   (CSD_SLOT_21),\r\n    .CSD_SLOT_22   (CSD_SLOT_22),\r\n    .CSD_SLOT_23   (CSD_SLOT_23),\r\n    .CSD_SLOT_24   (CSD_SLOT_24),\r\n    .CSD_SLOT_25   (CSD_SLOT_25),\r\n    .CSD_SLOT_26   (CSD_SLOT_26),\r\n    .CSD_SLOT_27   (CSD_SLOT_27),\r\n    .CSD_SLOT_28   (CSD_SLOT_28),\r\n    .CSD_SLOT_29   (CSD_SLOT_29),\r\n    .CSD_SLOT_30   (CSD_SLOT_30),\r\n    .CSD_SLOT_31   (CSD_SLOT_31),\r\n    .CSD_SLOT_32   (CSD_SLOT_32),\r\n    .CSD_SLOT_33   (CSD_SLOT_33),\r\n    .CSD_SLOT_34   (CSD_SLOT_34),\r\n    .CSD_SLOT_35   (CSD_SLOT_35),\r\n    .CSD_SLOT_36   (CSD_SLOT_36),\r\n    .CSD_SLOT_37   (CSD_SLOT_37),\r\n    .CSD_SLOT_38   (CSD_SLOT_38),\r\n    .CSD_SLOT_39   (CSD_SLOT_39),\r\n    .CSD_SLOT_40   (CSD_SLOT_40),\r\n    .CSD_SLOT_41   (CSD_SLOT_41),\r\n    .CSD_SLOT_42   (CSD_SLOT_42),\r\n    .CSD_SLOT_43   (CSD_SLOT_43),\r\n    .CSD_SLOT_44   (CSD_SLOT_44),\r\n    .CSD_SLOT_45   (CSD_SLOT_45),\r\n    .CSD_SLOT_46   (CSD_SLOT_46),\r\n    .CSD_SLOT_47   (CSD_SLOT_47),\r\n    .CSD_SLOT_48   (CSD_SLOT_48),\r\n    .CSD_SLOT_49   (CSD_SLOT_49),\r\n    .CSD_SLOT_50   (CSD_SLOT_50),\r\n    .CSD_SLOT_51   (CSD_SLOT_51),\r\n    .CSD_SLOT_52   (CSD_SLOT_52),\r\n    .CSD_SLOT_53   (CSD_SLOT_53),\r\n    .CSD_SLOT_54   (CSD_SLOT_54),\r\n    .CSD_SLOT_55   (CSD_SLOT_55),\r\n    .CSD_SLOT_56   (CSD_SLOT_56),\r\n    .CSD_SLOT_57   (CSD_SLOT_57),\r\n    .CSD_SLOT_58   (CSD_SLOT_58),\r\n    .CSD_SLOT_59   (CSD_SLOT_59),\r\n    .CSD_SLOT_60   (CSD_SLOT_60),\r\n    .CSD_SLOT_61   (CSD_SLOT_61),\r\n    .CSD_SLOT_62   (CSD_SLOT_62),\r\n    .CSD_SLOT_63   (CSD_SLOT_63)\r\n) u_seq_ctrl (\r\n    // inputs\r\n    .clk            (clk),\r\n    .rst_n          (rst_n),\r\n    .run            (run),\r\n    .sw_clr_run     (sw_clr_run),\r\n    .con_mode       (con_mode),\r\n    .single_mode    (single_mode),\r\n    .recab_mode     (recab_mode),\r\n    .cmd_ready      (cmd_ready),\r\n    // outputs\r\n    .cmd_valid      (cmd_valid),\r\n    .cmd_channel    (cmd_channel),\r\n    .cmd_sop        (cmd_sop),\r\n    .cmd_eop        (cmd_eop),\r\n    .clr_run        (clr_run)\r\n);\r\n\r\ngenerate\r\nif (DUAL_ADC_MODE == 1) begin\r\n\r\naltera_modular_adc_sequencer_ctrl #(\r\n    .CSD_LENGTH    (CSD_LENGTH),\r\n    .CSD_ASIZE     (CSD_ASIZE),\r\n    .CSD_SLOT_0    (CSD_SLOT_0_ADC2),\r\n    .CSD_SLOT_1    (CSD_SLOT_1_ADC2),\r\n    .CSD_SLOT_2    (CSD_SLOT_2_ADC2),\r\n    .CSD_SLOT_3    (CSD_SLOT_3_ADC2),\r\n    .CSD_SLOT_4    (CSD_SLOT_4_ADC2),\r\n    .CSD_SLOT_5    (CSD_SLOT_5_ADC2),\r\n    .CSD_SLOT_6    (CSD_SLOT_6_ADC2),\r\n    .CSD_SLOT_7    (CSD_SLOT_7_ADC2),\r\n    .CSD_SLOT_8    (CSD_SLOT_8_ADC2),\r\n    .CSD_SLOT_9    (CSD_SLOT_9_ADC2),\r\n    .CSD_SLOT_10   (CSD_SLOT_10_ADC2),\r\n    .CSD_SLOT_11   (CSD_SLOT_11_ADC2),\r\n    .CSD_SLOT_12   (CSD_SLOT_12_ADC2),\r\n    .CSD_SLOT_13   (CSD_SLOT_13_ADC2),\r\n    .CSD_SLOT_14   (CSD_SLOT_14_ADC2),\r\n    .CSD_SLOT_15   (CSD_SLOT_15_ADC2),\r\n    .CSD_SLOT_16   (CSD_SLOT_16_ADC2),\r\n    .CSD_SLOT_17   (CSD_SLOT_17_ADC2),\r\n    .CSD_SLOT_18   (CSD_SLOT_18_ADC2),\r\n    .CSD_SLOT_19   (CSD_SLOT_19_ADC2),\r\n    .CSD_SLOT_20   (CSD_SLOT_20_ADC2),\r\n    .CSD_SLOT_21   (CSD_SLOT_21_ADC2),\r\n    .CSD_SLOT_22   (CSD_SLOT_22_ADC2),\r\n    .CSD_SLOT_23   (CSD_SLOT_23_ADC2),\r\n    .CSD_SLOT_24   (CSD_SLOT_24_ADC2),\r\n    .CSD_SLOT_25   (CSD_SLOT_25_ADC2),\r\n    .CSD_SLOT_26   (CSD_SLOT_26_ADC2),\r\n    .CSD_SLOT_27   (CSD_SLOT_27_ADC2),\r\n    .CSD_SLOT_28   (CSD_SLOT_28_ADC2),\r\n    .CSD_SLOT_29   (CSD_SLOT_29_ADC2),\r\n    .CSD_SLOT_30   (CSD_SLOT_30_ADC2),\r\n    .CSD_SLOT_31   (CSD_SLOT_31_ADC2),\r\n    .CSD_SLOT_32   (CSD_SLOT_32_ADC2),\r\n    .CSD_SLOT_33   (CSD_SLOT_33_ADC2),\r\n    .CSD_SLOT_34   (CSD_SLOT_34_ADC2),\r\n    .CSD_SLOT_35   (CSD_SLOT_35_ADC2),\r\n    .CSD_SLOT_36   (CSD_SLOT_36_ADC2),\r\n    .CSD_SLOT_37   (CSD_SLOT_37_ADC2),\r\n    .CSD_SLOT_38   (CSD_SLOT_38_ADC2),\r\n    .CSD_SLOT_39   (CSD_SLOT_39_ADC2),\r\n    .CSD_SLOT_40   (CSD_SLOT_40_ADC2),\r\n    .CSD_SLOT_41   (CSD_SLOT_41_ADC2),\r\n    .CSD_SLOT_42   (CSD_SLOT_42_ADC2),\r\n    .CSD_SLOT_43   (CSD_SLOT_43_ADC2),\r\n    .CSD_SLOT_44   (CSD_SLOT_44_ADC2),\r\n    .CSD_SLOT_45   (CSD_SLOT_45_ADC2),\r\n    .CSD_SLOT_46   (CSD_SLOT_46_ADC2),\r\n    .CSD_SLOT_47   (CSD_SLOT_47_ADC2),\r\n    .CSD_SLOT_48   (CSD_SLOT_48_ADC2),\r\n    .CSD_SLOT_49   (CSD_SLOT_49_ADC2),\r\n    .CSD_SLOT_50   (CSD_SLOT_50_ADC2),\r\n    .CSD_SLOT_51   (CSD_SLOT_51_ADC2),\r\n    .CSD_SLOT_52   (CSD_SLOT_52_ADC2),\r\n    .CSD_SLOT_53   (CSD_SLOT_53_ADC2),\r\n    .CSD_SLOT_54   (CSD_SLOT_54_ADC2),\r\n    .CSD_SLOT_55   (CSD_SLOT_55_ADC2),\r\n    .CSD_SLOT_56   (CSD_SLOT_56_ADC2),\r\n    .CSD_SLOT_57   (CSD_SLOT_57_ADC2),\r\n    .CSD_SLOT_58   (CSD_SLOT_58_ADC2),\r\n    .CSD_SLOT_59   (CSD_SLOT_59_ADC2),\r\n    .CSD_SLOT_60   (CSD_SLOT_60_ADC2),\r\n    .CSD_SLOT_61   (CSD_SLOT_61_ADC2),\r\n    .CSD_SLOT_62   (CSD_SLOT_62_ADC2),\r\n    .CSD_SLOT_63   (CSD_SLOT_63_ADC2)\r\n) u_seq_ctrl_adc2 (\r\n    // inputs\r\n    .clk            (clk),\r\n    .rst_n          (rst_n),\r\n    .run            (run),\r\n    .sw_clr_run     (sw_clr_run),\r\n    .con_mode       (con_mode),\r\n    .single_mode    (single_mode),\r\n    .recab_mode     (recab_mode),\r\n    .cmd_ready      (cmd_ready_2),\r\n    // outputs\r\n    .cmd_valid      (cmd_valid_2),\r\n    .cmd_channel    (cmd_channel_2),\r\n    .cmd_sop        (cmd_sop_2),\r\n    .cmd_eop        (cmd_eop_2),\r\n    .clr_run        (clr_run_2)         // clr_run_2 shall assert/de-assert at the same cycle as clr_run\r\n);\r\n\r\nend\r\nelse begin\r\n\r\nassign cmd_valid_2      = 1'b0;\r\nassign cmd_channel_2    = 5'h0;\r\nassign cmd_sop_2        = 1'b0;\r\nassign cmd_eop_2        = 1'b0;\r\n\r\nend\r\nendgenerate\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_sequencer_csr.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_sequencer_csr (\r\n    input               clk,\r\n    input               rst_n,\r\n    input               addr,\r\n    input               read,\r\n    input               write,\r\n    input [31:0]        writedata,\r\n    input               clr_run,\r\n\r\n    output reg [31:0]   readdata,\r\n    output reg          run,\r\n    output reg          sw_clr_run,\r\n    output              con_mode,\r\n    output              single_mode,\r\n    output              recab_mode\r\n);\r\n\r\nreg [2:0]   mode;\r\n\r\nwire        cmd_addr;\r\nwire        cmd_wr_en;\r\nwire        cmd_rd_en;\r\nwire [31:0] cmd_internal;\r\nwire [31:0] readdata_nxt;\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// address decode\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_addr = (addr == 1'b0);\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// write enable\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_wr_en = cmd_addr & write;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// read enable\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_rd_en = cmd_addr & read;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// mode register bits\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        mode <= 3'h0;\r\n    else if (cmd_wr_en & ~run)\r\n        mode <= writedata[3:1];\r\nend\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// run register bit\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        run <= 1'b0;\r\n    else if (clr_run)\r\n        run <= 1'b0;\r\n    else if (cmd_wr_en & writedata[0])\r\n        run <= 1'b1;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Logic to detect SW perform a clear on the run bit\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        sw_clr_run <= 1'b0;\r\n    else if (clr_run)\r\n        sw_clr_run <= 1'b0;\r\n    else if (run & con_mode & cmd_wr_en & ~writedata[0])\r\n        sw_clr_run <= 1'b1;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Avalon read data path\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_internal = {28'h0, mode, run};\r\nassign readdata_nxt = cmd_internal & {32{cmd_rd_en}};\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        readdata <= 32'h0;\r\n    else\r\n        readdata <= readdata_nxt;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Mode decoding\r\n//--------------------------------------------------------------------------------------------//\r\nassign con_mode     = (mode == 3'b000);\r\nassign single_mode  = (mode == 3'b001);\r\nassign recab_mode   = (mode == 3'b111);\r\n\r\n\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/altera_modular_adc_sequencer_ctrl.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_sequencer_ctrl #(\r\n    parameter   CSD_LENGTH      = 64,\r\n    parameter   CSD_ASIZE       = 6,\r\n    parameter   CSD_SLOT_0      = 5'h0,\r\n    parameter   CSD_SLOT_1      = 5'h0,\r\n    parameter   CSD_SLOT_2      = 5'h0,\r\n    parameter   CSD_SLOT_3      = 5'h0,\r\n    parameter   CSD_SLOT_4      = 5'h0,\r\n    parameter   CSD_SLOT_5      = 5'h0,\r\n    parameter   CSD_SLOT_6      = 5'h0,\r\n    parameter   CSD_SLOT_7      = 5'h0,\r\n    parameter   CSD_SLOT_8      = 5'h0,\r\n    parameter   CSD_SLOT_9      = 5'h0,\r\n    parameter   CSD_SLOT_10     = 5'h0,\r\n    parameter   CSD_SLOT_11     = 5'h0,\r\n    parameter   CSD_SLOT_12     = 5'h0,\r\n    parameter   CSD_SLOT_13     = 5'h0,\r\n    parameter   CSD_SLOT_14     = 5'h0,\r\n    parameter   CSD_SLOT_15     = 5'h0,\r\n    parameter   CSD_SLOT_16     = 5'h0,\r\n    parameter   CSD_SLOT_17     = 5'h0,\r\n    parameter   CSD_SLOT_18     = 5'h0,\r\n    parameter   CSD_SLOT_19     = 5'h0,\r\n    parameter   CSD_SLOT_20     = 5'h0,\r\n    parameter   CSD_SLOT_21     = 5'h0,\r\n    parameter   CSD_SLOT_22     = 5'h0,\r\n    parameter   CSD_SLOT_23     = 5'h0,\r\n    parameter   CSD_SLOT_24     = 5'h0,\r\n    parameter   CSD_SLOT_25     = 5'h0,\r\n    parameter   CSD_SLOT_26     = 5'h0,\r\n    parameter   CSD_SLOT_27     = 5'h0,\r\n    parameter   CSD_SLOT_28     = 5'h0,\r\n    parameter   CSD_SLOT_29     = 5'h0,\r\n    parameter   CSD_SLOT_30     = 5'h0,\r\n    parameter   CSD_SLOT_31     = 5'h0,\r\n    parameter   CSD_SLOT_32     = 5'h0,\r\n    parameter   CSD_SLOT_33     = 5'h0,\r\n    parameter   CSD_SLOT_34     = 5'h0,\r\n    parameter   CSD_SLOT_35     = 5'h0,\r\n    parameter   CSD_SLOT_36     = 5'h0,\r\n    parameter   CSD_SLOT_37     = 5'h0,\r\n    parameter   CSD_SLOT_38     = 5'h0,\r\n    parameter   CSD_SLOT_39     = 5'h0,\r\n    parameter   CSD_SLOT_40     = 5'h0,\r\n    parameter   CSD_SLOT_41     = 5'h0,\r\n    parameter   CSD_SLOT_42     = 5'h0,\r\n    parameter   CSD_SLOT_43     = 5'h0,\r\n    parameter   CSD_SLOT_44     = 5'h0,\r\n    parameter   CSD_SLOT_45     = 5'h0,\r\n    parameter   CSD_SLOT_46     = 5'h0,\r\n    parameter   CSD_SLOT_47     = 5'h0,\r\n    parameter   CSD_SLOT_48     = 5'h0,\r\n    parameter   CSD_SLOT_49     = 5'h0,\r\n    parameter   CSD_SLOT_50     = 5'h0,\r\n    parameter   CSD_SLOT_51     = 5'h0,\r\n    parameter   CSD_SLOT_52     = 5'h0,\r\n    parameter   CSD_SLOT_53     = 5'h0,\r\n    parameter   CSD_SLOT_54     = 5'h0,\r\n    parameter   CSD_SLOT_55     = 5'h0,\r\n    parameter   CSD_SLOT_56     = 5'h0,\r\n    parameter   CSD_SLOT_57     = 5'h0,\r\n    parameter   CSD_SLOT_58     = 5'h0,\r\n    parameter   CSD_SLOT_59     = 5'h0,\r\n    parameter   CSD_SLOT_60     = 5'h0,\r\n    parameter   CSD_SLOT_61     = 5'h0,\r\n    parameter   CSD_SLOT_62     = 5'h0,\r\n    parameter   CSD_SLOT_63     = 5'h0\r\n) (\r\n    input               clk,\r\n    input               rst_n,\r\n    input               run,\r\n    input               sw_clr_run,\r\n    input               con_mode,\r\n    input               single_mode,\r\n    input               recab_mode,\r\n    input               cmd_ready,\r\n\r\n    output reg          cmd_valid,\r\n    output reg [4:0]    cmd_channel,\r\n    output reg          cmd_sop,\r\n    output reg          cmd_eop,\r\n    output reg          clr_run\r\n);\r\n\r\nreg                     seq_state;\r\nreg                     seq_state_nxt;\r\nreg [CSD_ASIZE-1:0]     slot_sel;\r\nreg [CSD_ASIZE-1:0]     slot_sel_nxt;\r\nreg                     valid_req;\r\n\r\nwire [4:0]      csd[0:63];\r\nwire [4:0]      csdmem[0:CSD_LENGTH-1];\r\nwire            last_slot;\r\nwire            done;\r\nwire            done_con;\r\nwire            done_single;\r\nwire            valid_mode;\r\nwire [4:0]      cmd_channel_nxt;\r\nwire            cmd_sop_nxt;\r\nwire            cmd_eop_nxt;\r\n\r\nlocalparam          IDLE        = 1'b0;\r\nlocalparam          READY       = 1'b1;\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Assign conversion sequence data parameter into a temporary array\r\n//--------------------------------------------------------------------------------------------//\r\nassign csd[0] = CSD_SLOT_0;\r\nassign csd[1] = CSD_SLOT_1;\r\nassign csd[2] = CSD_SLOT_2;\r\nassign csd[3] = CSD_SLOT_3;\r\nassign csd[4] = CSD_SLOT_4;\r\nassign csd[5] = CSD_SLOT_5;\r\nassign csd[6] = CSD_SLOT_6;\r\nassign csd[7] = CSD_SLOT_7;\r\nassign csd[8] = CSD_SLOT_8;\r\nassign csd[9] = CSD_SLOT_9;\r\nassign csd[10] = CSD_SLOT_10;\r\nassign csd[11] = CSD_SLOT_11;\r\nassign csd[12] = CSD_SLOT_12;\r\nassign csd[13] = CSD_SLOT_13;\r\nassign csd[14] = CSD_SLOT_14;\r\nassign csd[15] = CSD_SLOT_15;\r\nassign csd[16] = CSD_SLOT_16;\r\nassign csd[17] = CSD_SLOT_17;\r\nassign csd[18] = CSD_SLOT_18;\r\nassign csd[19] = CSD_SLOT_19;\r\nassign csd[20] = CSD_SLOT_20;\r\nassign csd[21] = CSD_SLOT_21;\r\nassign csd[22] = CSD_SLOT_22;\r\nassign csd[23] = CSD_SLOT_23;\r\nassign csd[24] = CSD_SLOT_24;\r\nassign csd[25] = CSD_SLOT_25;\r\nassign csd[26] = CSD_SLOT_26;\r\nassign csd[27] = CSD_SLOT_27;\r\nassign csd[28] = CSD_SLOT_28;\r\nassign csd[29] = CSD_SLOT_29;\r\nassign csd[30] = CSD_SLOT_30;\r\nassign csd[31] = CSD_SLOT_31;\r\nassign csd[32] = CSD_SLOT_32;\r\nassign csd[33] = CSD_SLOT_33;\r\nassign csd[34] = CSD_SLOT_34;\r\nassign csd[35] = CSD_SLOT_35;\r\nassign csd[36] = CSD_SLOT_36;\r\nassign csd[37] = CSD_SLOT_37;\r\nassign csd[38] = CSD_SLOT_38;\r\nassign csd[39] = CSD_SLOT_39;\r\nassign csd[40] = CSD_SLOT_40;\r\nassign csd[41] = CSD_SLOT_41;\r\nassign csd[42] = CSD_SLOT_42;\r\nassign csd[43] = CSD_SLOT_43;\r\nassign csd[44] = CSD_SLOT_44;\r\nassign csd[45] = CSD_SLOT_45;\r\nassign csd[46] = CSD_SLOT_46;\r\nassign csd[47] = CSD_SLOT_47;\r\nassign csd[48] = CSD_SLOT_48;\r\nassign csd[49] = CSD_SLOT_49;\r\nassign csd[50] = CSD_SLOT_50;\r\nassign csd[51] = CSD_SLOT_51;\r\nassign csd[52] = CSD_SLOT_52;\r\nassign csd[53] = CSD_SLOT_53;\r\nassign csd[54] = CSD_SLOT_54;\r\nassign csd[55] = CSD_SLOT_55;\r\nassign csd[56] = CSD_SLOT_56;\r\nassign csd[57] = CSD_SLOT_57;\r\nassign csd[58] = CSD_SLOT_58;\r\nassign csd[59] = CSD_SLOT_59;\r\nassign csd[60] = CSD_SLOT_60;\r\nassign csd[61] = CSD_SLOT_61;\r\nassign csd[62] = CSD_SLOT_62;\r\nassign csd[63] = CSD_SLOT_63;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Assign valid conversion sequence data parameter into an array\r\n//--------------------------------------------------------------------------------------------//\r\ngenvar i;\r\ngenerate\r\n    for (i=0; i<CSD_LENGTH; i=i+1) begin : assign_csdmem\r\n        assign csdmem[i] = csd[i];\r\n    end\r\nendgenerate\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Sequncer FSM\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        seq_state   <= IDLE;\r\n    else\r\n        seq_state   <= seq_state_nxt;\r\nend\r\n\r\nalways @* begin\r\n    case (seq_state)\r\n        IDLE: begin\r\n            clr_run         = 1'b0;\r\n            slot_sel_nxt    = {CSD_ASIZE{1'b0}};\r\n\r\n            if (run & valid_mode) begin\r\n                seq_state_nxt   = READY;\r\n                valid_req       = 1'b1;\r\n            end\r\n            else begin\r\n                seq_state_nxt   = IDLE;\r\n                valid_req       = 1'b0;\r\n            end\r\n        end\r\n\r\n        READY: begin\r\n            if (cmd_ready & (recab_mode | done)) begin\r\n                seq_state_nxt   = IDLE;\r\n                valid_req       = 1'b0;\r\n                slot_sel_nxt    = {CSD_ASIZE{1'b0}};\r\n                clr_run         = 1'b1;\r\n            end\r\n            else if (cmd_ready) begin\r\n                seq_state_nxt   = READY;\r\n                valid_req       = 1'b1;\r\n                clr_run         = 1'b0;\r\n\r\n                if (last_slot)\r\n                    slot_sel_nxt    = {CSD_ASIZE{1'b0}};\r\n                else\r\n                    slot_sel_nxt    = slot_sel + {{(CSD_ASIZE-1){1'b0}}, 1'b1};\r\n\r\n            end\r\n            else begin\r\n                seq_state_nxt   = READY;\r\n                valid_req       = 1'b0;\r\n                slot_sel_nxt    = slot_sel;\r\n                clr_run         = 1'b0;\r\n            end\r\n        end\r\n        \r\n        default: begin\r\n            seq_state_nxt   = IDLE;\r\n            valid_req       = 1'b0;\r\n            slot_sel_nxt    = {CSD_ASIZE{1'b0}};\r\n            clr_run         = 1'b0;\r\n        end\r\n\r\n    endcase\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Counter for slot selector\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        slot_sel <= {CSD_ASIZE{1'b0}};\r\n    else\r\n        slot_sel <= slot_sel_nxt;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Misc logic to detect sequence complete\r\n//--------------------------------------------------------------------------------------------//\r\nassign last_slot        = (slot_sel == (CSD_LENGTH-1));\r\nassign done_single      = single_mode & last_slot;\r\nassign done_con         = last_slot & sw_clr_run;\r\nassign done             = done_con | done_single;\r\nassign valid_mode       = con_mode | single_mode | recab_mode;\r\nassign cmd_channel_nxt  = recab_mode ? 5'h1f : csdmem[slot_sel_nxt];\r\nassign cmd_sop_nxt      = recab_mode ? 1'b1 : (slot_sel_nxt == {CSD_ASIZE{1'b0}});\r\nassign cmd_eop_nxt      = recab_mode ? 1'b1 : (slot_sel_nxt == (CSD_LENGTH-1));\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Output register for Avalon ST Command Interface\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        cmd_valid       <= 1'b0;\r\n        cmd_channel     <= 5'h0;\r\n        cmd_sop         <= 1'b0;\r\n        cmd_eop         <= 1'b0;\r\n    end\r\n    else if (valid_req) begin\r\n        cmd_valid       <= 1'b1;\r\n        cmd_channel     <= cmd_channel_nxt;\r\n        cmd_sop         <= cmd_sop_nxt;\r\n        cmd_eop         <= cmd_eop_nxt;\r\n    end\r\n    else if (cmd_ready) begin\r\n        cmd_valid       <= 1'b0;\r\n        cmd_channel     <= 5'h0;\r\n        cmd_sop         <= 1'b0;\r\n        cmd_eop         <= 1'b0;\r\n    end\r\nend\r\n\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/chsel_code_converter_sw_to_hw.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\r\n// **   Filename       : chsel_code_converter_sw_to_hw.v\r\n// **\r\n// **   Description    : Translate channel code coming from software to hardware format\r\n// **\r\n// **   Change Log     :\r\n// **   2014/02/07     : Initial design\r\n// **\r\n// *******************************************************************************************************\r\n\r\n// synthesis translate_off\r\n`timescale 1ns / 1ps\r\n// synthesis translate_on\r\n\r\n// *******************************************************************************************************\r\n// **   MODULE\r\n// *******************************************************************************************************\r\n\r\nmodule  chsel_code_converter_sw_to_hw (\r\n    chsel_from_sw,            // 5-bits channel selection.\r\n    chsel_to_hw               // 5-bits channel selection.\r\n);\r\n\r\n// *******************************************************************************************************\r\n// **   PARAMETERS\r\n// *******************************************************************************************************\r\n\r\n    // Ordering Part Number 10MXX... code\r\n    parameter           device_partname_fivechar_prefix = \"10M08\";   // Valid options = 04, 08, 16, 25, 40, 50\r\n\r\n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\r\n    parameter           is_this_first_or_second_adc = 1;             // Valid options = 1 or 2\r\n\r\n// .......................................................................................................\r\n\r\n    // DESCRIBE THE LOCALPARAM CONSTANT:\r\n    // Actual Hardware map CHSEL[4:0] out of sequential order to different channel pad due to route-ability,\r\n    // Soft IP will have S/W mapping to translate it back to sequential order from user perspective (PAD label)\r\n\r\n    // 10M04/08/16 hardware equivalent chsel code for a particular software chsel code\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00100;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch02_code_00010 = 5'b00110;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch03_code_00011 = 5'b01010;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01100;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch05_code_00101 = 5'b10000;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch06_code_00110 = 5'b01110;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01101;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00010;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch09_code_01001 = 5'b00101;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch10_code_01010 = 5'b01001;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch11_code_01011 = 5'b10001;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch12_code_01100 = 5'b01111;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch13_code_01101 = 5'b01000;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch14_code_01110 = 5'b00111;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch15_code_01111 = 5'b01011;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch16_code_10000 = 5'b00001;\r\n\r\n    // First ADC of 10M25/40/50 hardware equivalent chsel code for a particular software chsel code\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00100;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch02_code_00010 = 5'b00110;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch03_code_00011 = 5'b01010;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01100;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch05_code_00101 = 5'b10000;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch06_code_00110 = 5'b01110;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01101;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00010;\r\n\r\n    // Second ADC of 10M25/40/50 hardware equivalent chsel code for a particular software chsel code\r\n    // Note that: Second ADC do not support internal temperature sensor.\r\n    // However internal temperature sensor mapping for ADC2 is later included for dual adc mode\r\n    // When in dual adc mode, if ADC1 is operating in TSD mode, ADC2 will perform a dummy TSD mode as well\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00101;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch02_code_00010 = 5'b01001;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch03_code_00011 = 5'b10001;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01111;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch05_code_00101 = 5'b01000;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch06_code_00110 = 5'b00111;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01011;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00001;\r\n\r\n// *******************************************************************************************************\r\n// **   INPUTS\r\n// *******************************************************************************************************\r\n\r\n    input   [4:0]       chsel_from_sw;  // 5-bits channel selection number from software perspective\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS\r\n// *******************************************************************************************************\r\n\r\n    output  [4:0]       chsel_to_hw;    // 5-bits channel selection code to be send to ADC Hard IP\r\n\r\n// *******************************************************************************************************\r\n// **   EXTERNAL NET AND REGISTER DATA TYPE (with input / output / inout ports)\r\n// *******************************************************************************************************\r\n\r\n    reg     [4:0]       chsel_to_hw;    // 5-bits channel selection code to be send to ADC Hard IP\r\n\r\n// *******************************************************************************************************\r\n// **   MAIN CODE\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      1.00: Channel Mapping\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // DESCRIBE THE ALWAYS BLOCK:\r\n    // This block execute on divided internal clock\r\n    // Its job is mainly to determine what value to be set for the digital_out and eoc_rise\r\n    always @(chsel_from_sw)\r\n    begin\r\n        // DESCRIBE THE CASE STATEMENT:\r\n        // Output the equivalent chsel code for hardware\r\nif  ((device_partname_fivechar_prefix == \"10M04\") || (device_partname_fivechar_prefix == \"10M08\") || (device_partname_fivechar_prefix == \"10M16\"))\r\nbegin\r\n        // COMMENT FOR THIS BRANCH:\r\n        // 10M08/04 channel mapping\r\n        case(chsel_from_sw)\r\n            5'b10001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_temp_code_10001;\r\n            5'b00000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch00_code_00000;\r\n            5'b00001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch01_code_00001;\r\n            5'b00010: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch02_code_00010;\r\n            5'b00011: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch03_code_00011;\r\n            5'b00100: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch04_code_00100;\r\n            5'b00101: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch05_code_00101;\r\n            5'b00110: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch06_code_00110;\r\n            5'b00111: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch07_code_00111;\r\n            5'b01000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch08_code_01000;\r\n            5'b01001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch09_code_01001;\r\n            5'b01010: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch10_code_01010;\r\n            5'b01011: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch11_code_01011;\r\n            5'b01100: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch12_code_01100;\r\n            5'b01101: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch13_code_01101;\r\n            5'b01110: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch14_code_01110;\r\n            5'b01111: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch15_code_01111;\r\n            5'b10000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch16_code_10000;\r\n            default : chsel_to_hw <= 5'b11111;\r\n        endcase\r\nend\r\nelse\r\nif ((is_this_first_or_second_adc == 1) &&\r\n    ((device_partname_fivechar_prefix == \"10M25\") ||\r\n     (device_partname_fivechar_prefix == \"10M40\") ||\r\n     (device_partname_fivechar_prefix == \"10M50\")))\r\nbegin\r\n        // COMMENT FOR THIS BRANCH:\r\n        // First ADC of 10M25/40/50 channel mapping\r\n        case(chsel_from_sw)\r\n            5'b10001: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_temp_code_10001;\r\n            5'b00000: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch00_code_00000;\r\n            5'b00001: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch01_code_00001;\r\n            5'b00010: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch02_code_00010;\r\n            5'b00011: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch03_code_00011;\r\n            5'b00100: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch04_code_00100;\r\n            5'b00101: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch05_code_00101;\r\n            5'b00110: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch06_code_00110;\r\n            5'b00111: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch07_code_00111;\r\n            5'b01000: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch08_code_01000;\r\n            default : chsel_to_hw <= 5'b11111;\r\n        endcase\r\nend\r\nelse\r\nif ((is_this_first_or_second_adc == 2) &&\r\n    ((device_partname_fivechar_prefix == \"10M25\") ||\r\n     (device_partname_fivechar_prefix == \"10M40\") ||\r\n     (device_partname_fivechar_prefix == \"10M50\")))\r\nbegin\r\n        // COMMENT FOR THIS BRANCH:\r\n        // Second ADC of 10M25/40/50 channel mapping\r\n        case(chsel_from_sw)\r\n            5'b10001: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_temp_code_10001;\r\n            5'b00000: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch00_code_00000;\r\n            5'b00001: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch01_code_00001;\r\n            5'b00010: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch02_code_00010;\r\n            5'b00011: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch03_code_00011;\r\n            5'b00100: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch04_code_00100;\r\n            5'b00101: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch05_code_00101;\r\n            5'b00110: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch06_code_00110;\r\n            5'b00111: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch07_code_00111;\r\n            5'b01000: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch08_code_01000;\r\n            default : chsel_to_hw <= 5'b11111;\r\n        endcase\r\nend\r\n    end // end always\r\n\r\n// *******************************************************************************************************\r\n// **   END OF MODULE\r\n// *******************************************************************************************************\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/fiftyfivenm_adcblock_primitive_wrapper.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\r\n// **   Filename       : fiftyfivenm_adcblock_primitive_wrapper.v\r\n// **\r\n// **   Description    : The lowest layer of the ADC Mega Function code that instantiate the ADC primitive\r\n// **                    The purpose mirror each input/output register from ADC hard block to soft ip\r\n// **                    to be clocked by clf_dft signal to close timing for the path between soft and hard blocks.\r\n// **   Change Log     :\r\n// **   01/17/2014     : Initial design\r\n// **\r\n// *******************************************************************************************************\r\n\r\n// *******************************************************************************************************\r\n// **   DEFINES\r\n// *******************************************************************************************************\r\n// synthesis translate_off\r\n`timescale 1ns / 1ps\r\n// synthesis translate_on\r\n\r\n//`define DEBUG_AND_DEVELOPMENT 1\r\n\r\n// *******************************************************************************************************\r\n// **   TOP MODULE\r\n// *******************************************************************************************************\r\nmodule fiftyfivenm_adcblock_primitive_wrapper(\r\n    //reset,\r\n    chsel,               // 5-bits channel selection.\r\n    soc,                 // signal Start-of-Conversion to ADC\r\n    eoc,                 // signal end of conversion. Data can be latched on the positive edge of clk_dft after this signal becomes high.  EOC becomes low at every positive edge of the clk_dft signal.\r\n    dout,                // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    usr_pwd,             // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    tsen,                // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    clkout_adccore,      // Output clock from the clock divider\r\n    clkin_from_pll_c0    // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n);\r\n\r\n// *******************************************************************************************************\r\n// **   PARAMETERS\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      WRAPPED PARAMETERS USED BY fiftyfivenm_adcblock\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // 3-bits 1st stage clock divider.\r\n    // 0..5 = DIV by 1/2/10/20/40/80;\r\n    // 6..7 = invalid\r\n    parameter           clkdiv    = 1;\r\n    \r\n    // 2nd stage clock divider.\r\n    // 0 = DIV by 10;\r\n    // 1 = DIV by 20\r\n    parameter           tsclkdiv  = 0;\r\n    \r\n    // 0 = Use 1st stage clock divider when TSEN.\r\n    // 1 = Use 2nd stage clock divider when TSEN.\r\n    parameter           tsclksel  = 0;\r\n    \r\n    // 2-bits To enable the R ladder for the prescalar input channels.\r\n    // 00 = disable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // 01 = enable prescalar for CH8 only\r\n    // 10 = enable prescalar for CH16 only (CH8 for device with 2nd ADC)\r\n    // 11 = enable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // please note that this is not supported in VR mode\r\n    parameter           prescalar = 0;\r\n    \r\n    // Reference voltage selection for ADC.\r\n    // 0 = external;\r\n    // 1 = internal VCCADC_2P5\r\n    parameter           refsel    = 0;\r\n       \r\n    // Ordering Part Number 10MXX... code\r\n    parameter           device_partname_fivechar_prefix = \"10M08\";      // Valid options = 04, 08, 16, 25, 40, 50\r\n    \r\n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\r\n    parameter           is_this_first_or_second_adc = 1;    // Valid options = 1 or 2\r\n    \r\n    // is_using_dedicated_analog_input_pin_only? -> removed, replaced with analog_input_pin_mask\r\n    //parameter           is_using_dedicated_analog_input_pin_only = 0;\r\n\r\n    // 16 bits to indicate whether each of the dual purpose analog input pin (ADCIN) is in use or not.\r\n    // 1 bit to indicate whether dedicated analog input pin (ANAIN) is in use or not (bit 16) \r\n    parameter           analog_input_pin_mask = 17'h0;\r\n    \r\n    // Power Down. Use to disable the ADC during compilation time if no ADC is in use.\r\n    parameter           hard_pwd = 0;\r\n    \r\n    // Logic simulation parameters which only affects simulation behavior\r\n    parameter           enable_usr_sim = 0;\r\n    parameter           reference_voltage_sim = 65536;\r\n    parameter           simfilename_ch0 = \"simfilename_ch0\";\r\n    parameter           simfilename_ch1 = \"simfilename_ch1\";\r\n    parameter           simfilename_ch2 = \"simfilename_ch2\";\r\n    parameter           simfilename_ch3 = \"simfilename_ch3\";\r\n    parameter           simfilename_ch4 = \"simfilename_ch4\";\r\n    parameter           simfilename_ch5 = \"simfilename_ch5\";\r\n    parameter           simfilename_ch6 = \"simfilename_ch6\";\r\n    parameter           simfilename_ch7 = \"simfilename_ch7\";\r\n    parameter           simfilename_ch8 = \"simfilename_ch8\";\r\n    parameter           simfilename_ch9 = \"simfilename_ch9\";\r\n    parameter           simfilename_ch10 = \"simfilename_ch10\";\r\n    parameter           simfilename_ch11 = \"simfilename_ch11\";\r\n    parameter           simfilename_ch12 = \"simfilename_ch12\";\r\n    parameter           simfilename_ch13 = \"simfilename_ch13\";\r\n    parameter           simfilename_ch14 = \"simfilename_ch14\";\r\n    parameter           simfilename_ch15 = \"simfilename_ch15\";\r\n    parameter           simfilename_ch16 = \"simfilename_ch16\";\r\n\r\n\r\n// *******************************************************************************************************\r\n// **   INPUTS\r\n// *******************************************************************************************************\r\n\r\n    //input               reset;\r\n\r\n    input               clkin_from_pll_c0;  // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n\r\n    input               soc;        // signal Start-of-Conversion to ADC\r\n    input               usr_pwd;    // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    input               tsen;       // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    input   [4:0]       chsel;      // 5-bits channel selection.\r\n\r\n    //reg                 reg_clk_dft_soc;\r\n    //reg     [4:0]       reg_clk_dft_chsel;\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS\r\n// *******************************************************************************************************\r\n\r\n    output              clkout_adccore;\r\n    output              eoc;\r\n\r\n    output  [11:0]      dout;\r\n    wire    [11:0]      wire_from_adc_dout;\r\n    //reg     [11:0]      reg_clk_dft_dout;\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS ASSIGNMENTS\r\n// *******************************************************************************************************\r\n\r\n    //assign       dout = reg_clk_dft_dout;\r\n    assign       dout = wire_from_adc_dout;\r\n\r\n// *******************************************************************************************************\r\n// **   INITIALIZATION\r\n// *******************************************************************************************************\r\n\r\n// *******************************************************************************************************\r\n// **   MAIN CODE\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      1.00: Instantiate ADC Block primitive\r\n// -------------------------------------------------------------------------------------------------------\r\n`ifdef DEBUG_AND_DEVELOPMENT\r\n    fiftyfivenm_adcblock_emulation primitive_instance(\r\n`else\r\n    fiftyfivenm_adcblock primitive_instance(\r\n`endif\r\n        //.chsel            (reg_clk_dft_chsel),\r\n        //.soc              (reg_clk_dft_soc),\r\n        .chsel            (chsel),\r\n        .soc              (soc),\r\n        .eoc              (eoc),\r\n        .dout             (wire_from_adc_dout),\r\n        .usr_pwd          (usr_pwd),\r\n        .tsen             (tsen),\r\n        .clk_dft          (clkout_adccore),\r\n        .clkin_from_pll_c0(clkin_from_pll_c0)\r\n    );\r\n    defparam           primitive_instance.clkdiv                          = clkdiv;\r\n    defparam           primitive_instance.tsclkdiv                        = tsclkdiv;\r\n    defparam           primitive_instance.tsclksel                        = tsclksel;\r\n    defparam           primitive_instance.prescalar                       = prescalar;\r\n    defparam           primitive_instance.refsel                          = refsel;\r\n    defparam           primitive_instance.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\r\n    defparam           primitive_instance.is_this_first_or_second_adc     = is_this_first_or_second_adc;\r\n    defparam           primitive_instance.analog_input_pin_mask           = analog_input_pin_mask;\r\n    defparam           primitive_instance.pwd                             = hard_pwd;\r\n    defparam           primitive_instance.enable_usr_sim                  = enable_usr_sim;\r\n    defparam           primitive_instance.reference_voltage_sim           = reference_voltage_sim;\r\n    defparam           primitive_instance.simfilename_ch0                 = simfilename_ch0;\r\n    defparam           primitive_instance.simfilename_ch1                 = simfilename_ch1;\r\n    defparam           primitive_instance.simfilename_ch2                 = simfilename_ch2;\r\n    defparam           primitive_instance.simfilename_ch3                 = simfilename_ch3;\r\n    defparam           primitive_instance.simfilename_ch4                 = simfilename_ch4;\r\n    defparam           primitive_instance.simfilename_ch5                 = simfilename_ch5;\r\n    defparam           primitive_instance.simfilename_ch6                 = simfilename_ch6;\r\n    defparam           primitive_instance.simfilename_ch7                 = simfilename_ch7;\r\n    defparam           primitive_instance.simfilename_ch8                 = simfilename_ch8;\r\n    defparam           primitive_instance.simfilename_ch9                 = simfilename_ch9;\r\n    defparam           primitive_instance.simfilename_ch10                = simfilename_ch10;\r\n    defparam           primitive_instance.simfilename_ch11                = simfilename_ch11;\r\n    defparam           primitive_instance.simfilename_ch12                = simfilename_ch12;\r\n    defparam           primitive_instance.simfilename_ch13                = simfilename_ch13;\r\n    defparam           primitive_instance.simfilename_ch14                = simfilename_ch14;\r\n    defparam           primitive_instance.simfilename_ch15                = simfilename_ch15;\r\n    defparam           primitive_instance.simfilename_ch16                = simfilename_ch16;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      2.00: Clock the registers with ADC Clock source\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // DESCRIBE THE ALWAYS BLOCK:\r\n    // The purpose is to clock the registers using clk_dft signal for timing closure\r\n    // ADC primitive signals type\r\n    // Type  Sync: chsel, soc, eoc, dout, clk_dft\r\n    // Type Async: usr_pwd, tsen\r\n    // Signals need a register clocked by clk_dft: chsel, dout, soc\r\n    //always @ (posedge clkout_adccore or posedge reset)\r\n    //begin\r\n    //    if (reset)\r\n    //    begin\r\n    //        // Reset signal asserted\r\n    //        reg_clk_dft_soc     <= 0;\r\n    //        reg_clk_dft_chsel   <= 0;\r\n    //        reg_clk_dft_dout    <= 0;\r\n    //    end\r\n    //    else\r\n    //    begin\r\n    //        reg_clk_dft_soc     <= soc;\r\n    //        reg_clk_dft_chsel   <= chsel;\r\n    //        reg_clk_dft_dout    <= wire_from_adc_dout;\r\n    //    end //end-if        \r\n    //end\r\n\r\n// *******************************************************************************************************\r\n// **   END OF MODULE\r\n// *******************************************************************************************************\r\n\r\nendmodule\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/fiftyfivenm_adcblock_top_wrapper.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\r\n// **   Filename       : fiftyfivenm_adcblock_top_wrapper.v\r\n// **\r\n// **   Description    : Represent the ADC BLOCK primitive with channel code mapped for software\r\n// **                    in incremental order.  The hardware chsel code is not in sequence due to routability.\r\n// **   Change Log     :\r\n// **   08/31/2013     : Initial design\r\n// **\r\n// *******************************************************************************************************\r\n\r\n// synthesis translate_off\r\r\n`timescale 1ns / 1ps\r\r\n// synthesis translate_on\r\n\r\n// *******************************************************************************************************\r\n// **   MODULE\r\n// *******************************************************************************************************\r\nmodule fiftyfivenm_adcblock_top_wrapper(\r\n    //reset,               // reset\r\n    chsel,               // 5-bits channel selection.\r\n    soc,                 // signal Start-of-Conversion to ADC\r\n    eoc,                 // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\r\n    dout,                // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    usr_pwd,             // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    tsen,                // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    clkout_adccore,      // Output clock from the clock divider\r\n    clkin_from_pll_c0   // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n    //dout_ch              // Indicator to tell that current dout data is for which channel\r\n);\r\n\r\n// *******************************************************************************************************\r\n// **   PARAMETERS\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      WRAPPED PARAMETERS USED BY fiftyfivenm_adcblock\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // 3-bits 1st stage clock divider.\r\n    // 0..5 = DIV by 1/2/10/20/40/80;\r\n    // 6..7 = invalid\r\n    parameter           clkdiv    = 1;\r\n\r\n    // 2nd stage clock divider.\r\n    // 0 = DIV by 10;\r\n    // 1 = DIV by 20\r\n    parameter           tsclkdiv  = 0;\r\n\r\n    // 0 = Use 1st stage clock divider when TSEN.\r\n    // 1 = Use 2nd stage clock divider when TSEN.\r\n    parameter           tsclksel  = 0;\r\n\r\n    // 2-bits To enable the R ladder for the prescalar input channels.\r\n    // 00 = disable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // 01 = enable prescalar for CH8 only\r\n    // 10 = enable prescalar for CH16 only (CH8 for device with 2nd ADC)\r\n    // 11 = enable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // please note that this is not supported in VR mode\r\n    parameter           prescalar = 0;\r\n\r\n    // Reference voltage selection for ADC.\r\n    // 0 = external;\r\n    // 1 = internal VCCADC_2P5\r\n    parameter           refsel    = 0;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      WRAPPED PARAMETERS  USED BY both chsel_code_converter_sw_to_hw and fiftyfivenm_adcblock\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // Ordering Part Number 10MXX... code\r\n    parameter           device_partname_fivechar_prefix = \"10M08\";      // Valid options = 04, 08, 16, 25, 40, 50\r\n\r\n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\r\n    parameter           is_this_first_or_second_adc = 1;    // Valid options = 1 or 2\r\n\r\n    // 16 bits to indicate whether each of the dual purpose analog input pin (ADCIN) is in use or not.\r\n    // 1 bit to indicate whether dedicated analog input pin (ANAIN) is in use or not (bit 16) \r\n    parameter           analog_input_pin_mask = 17'h0;\r\n    \r\n    // Power Down. Use to disable the ADC during compilation time if no ADC is in use.\r\n    parameter           hard_pwd = 0;\r\n\r\n    // Logic simulation parameters which only affects simulation behavior\r\n    parameter           enable_usr_sim = 0;\r\n    parameter           reference_voltage_sim = 65536;\r\n    parameter           simfilename_ch0 = \"simfilename_ch0\";\r\n    parameter           simfilename_ch1 = \"simfilename_ch1\";\r\n    parameter           simfilename_ch2 = \"simfilename_ch2\";\r\n    parameter           simfilename_ch3 = \"simfilename_ch3\";\r\n    parameter           simfilename_ch4 = \"simfilename_ch4\";\r\n    parameter           simfilename_ch5 = \"simfilename_ch5\";\r\n    parameter           simfilename_ch6 = \"simfilename_ch6\";\r\n    parameter           simfilename_ch7 = \"simfilename_ch7\";\r\n    parameter           simfilename_ch8 = \"simfilename_ch8\";\r\n    parameter           simfilename_ch9 = \"simfilename_ch9\";\r\n    parameter           simfilename_ch10 = \"simfilename_ch10\";\r\n    parameter           simfilename_ch11 = \"simfilename_ch11\";\r\n    parameter           simfilename_ch12 = \"simfilename_ch12\";\r\n    parameter           simfilename_ch13 = \"simfilename_ch13\";\r\n    parameter           simfilename_ch14 = \"simfilename_ch14\";\r\n    parameter           simfilename_ch15 = \"simfilename_ch15\";\r\n    parameter           simfilename_ch16 = \"simfilename_ch16\";\r\n\r\n// *******************************************************************************************************\r\n// **   INPUTS\r\n// *******************************************************************************************************\r\n\r\n    //input               reset;      // reset\r\n\r\n    input               clkin_from_pll_c0;  // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n\r\n    input               soc;        // signal Start-of-Conversion to ADC\r\n    input               usr_pwd;    // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    input               tsen;       // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    input   [4:0]       chsel;      // 5-bits channel selection.\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS\r\n// *******************************************************************************************************\r\n\r\n    output              clkout_adccore;  // Output clock from the clock divider\r\n    output              eoc;        // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\r\n    output [11:0]       dout;       // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    //output  [4:0]       dout_ch;    // Indicator to tell that current dout data is for which channel (clone of EOC)\r\n\r\n// *******************************************************************************************************\r\n// **   INTERNAL NET AND REGISTER DATA TYPE (internal signals used within this module)\r\n// *******************************************************************************************************\r\n\r\n    //reg     [4:0]       prev1_chsel; // Backup chsel, because the data available at EOC is always for chsel value at previous EOC\r\n    //reg     [4:0]       prev2_chsel; // Data for previous channel is further delay by 1 clkout_adccore due to adcblock_primitive_wrapper have a register clocked by clkout_adccore\r\n    //reg     [4:0]       dout_ch;     // Indicator to tell that current dout data is for which channel\r\n\r\n   // chsel_to_hw is the output after port mapping will be wired into chsel of fiftyfivenm_adcblock\r\n    wire    [4:0]       chsel_to_hw;\r\n\r\n// *******************************************************************************************************\r\n// **   INITIALIZATION\r\n// *******************************************************************************************************\r\n\r\n    //initial begin\r\n        //prev1_chsel = 0;\r\n        //prev2_chsel = 0;\r\n        //dout_ch    = 0;\r\n    //end\r\n\r\n// *******************************************************************************************************\r\n// **   MAIN CODE\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      1.00: Instantiate Software to Hardware Channel Mapping module\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    chsel_code_converter_sw_to_hw decoder(\r\n        // The 5-bits chsel input port are wired to chsel_from_sw for conversion\r\n        .chsel_from_sw(chsel),\r\n        // The chsel_code_converter_sw_to_hw output chsel_to_hw which will be wired into fiftyfivenm_adcblock\r\n        .chsel_to_hw(chsel_to_hw)\r\n    );\r\n    defparam           decoder.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\r\n    defparam           decoder.is_this_first_or_second_adc     = is_this_first_or_second_adc;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      2.00: Instantiate ADC Block primitive\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    fiftyfivenm_adcblock_primitive_wrapper adcblock_instance(\r\n       // .reset            (reset),\r\n        .chsel            (chsel_to_hw),\r\n        .soc              (soc),\r\n        .eoc              (eoc),\r\n        .dout             (dout),\r\n        .usr_pwd          (usr_pwd),\r\n        .tsen             (tsen),\r\n        .clkout_adccore   (clkout_adccore),\r\n        .clkin_from_pll_c0(clkin_from_pll_c0)\r\n    );\r\n    defparam  adcblock_instance.clkdiv                          = clkdiv;\r\n    defparam  adcblock_instance.tsclkdiv                        = tsclkdiv;\r\n    defparam  adcblock_instance.tsclksel                        = tsclksel;\r\n    defparam  adcblock_instance.prescalar                       = prescalar;\r\n    defparam  adcblock_instance.refsel                          = refsel;\r\n    defparam  adcblock_instance.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\r\n    defparam  adcblock_instance.is_this_first_or_second_adc     = is_this_first_or_second_adc;\r\n    defparam  adcblock_instance.analog_input_pin_mask           = analog_input_pin_mask;\r\n    defparam  adcblock_instance.hard_pwd                        = hard_pwd;\r\n    defparam  adcblock_instance.enable_usr_sim                  = enable_usr_sim;\r\n    defparam  adcblock_instance.reference_voltage_sim           = reference_voltage_sim;\r\n    defparam  adcblock_instance.simfilename_ch0                 = simfilename_ch0;\r\n    defparam  adcblock_instance.simfilename_ch1                 = simfilename_ch1;\r\n    defparam  adcblock_instance.simfilename_ch2                 = simfilename_ch2;\r\n    defparam  adcblock_instance.simfilename_ch3                 = simfilename_ch3;\r\n    defparam  adcblock_instance.simfilename_ch4                 = simfilename_ch4;\r\n    defparam  adcblock_instance.simfilename_ch5                 = simfilename_ch5;\r\n    defparam  adcblock_instance.simfilename_ch6                 = simfilename_ch6;\r\n    defparam  adcblock_instance.simfilename_ch7                 = simfilename_ch7;\r\n    defparam  adcblock_instance.simfilename_ch8                 = simfilename_ch8;\r\n    defparam  adcblock_instance.simfilename_ch9                 = simfilename_ch9;\r\n    defparam  adcblock_instance.simfilename_ch10                = simfilename_ch10;\r\n    defparam  adcblock_instance.simfilename_ch11                = simfilename_ch11;\r\n    defparam  adcblock_instance.simfilename_ch12                = simfilename_ch12;\r\n    defparam  adcblock_instance.simfilename_ch13                = simfilename_ch13;\r\n    defparam  adcblock_instance.simfilename_ch14                = simfilename_ch14;\r\n    defparam  adcblock_instance.simfilename_ch15                = simfilename_ch15;\r\n    defparam  adcblock_instance.simfilename_ch16                = simfilename_ch16;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      4.00: Update dout_ch to tell current dout data is for which channel\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // DESCRIBE THE ALWAYS BLOCK:\r\n    // output previously backed-up chsel to dout_ch\r\n    // backup existing chsel to later use\r\n   // always @ (posedge clkout_adccore or posedge reset)\r\n   // begin\r\n   //     if (reset)\r\n   //     begin\r\n   //         dout_ch     <= 0;\r\n   //         prev2_chsel <= 0;\r\n   //         prev1_chsel <= 0;\r\n   //     end\r\n   //     else\r\n   //     begin\r\n   //         dout_ch     <= prev2_chsel;\r\n   //         prev2_chsel <= prev1_chsel;\r\n   //         prev1_chsel <= chsel;\r\n   //     end //end-if\r\n   // end\r\n\r\n// *******************************************************************************************************\r\n// **   END OF MODULE\r\n// *******************************************************************************************************\r\n\r\nendmodule\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/myadc_modular_adc_0.v",
    "content": "// myadc_modular_adc_0.v\r\n\r\n// This file was auto-generated from altera_modular_adc_hw.tcl.  If you edit it your changes\n// will probably be lost.\n// \n// Generated using ACDS version 18.0 614\r\n\r\n`timescale 1 ps / 1 ps\nmodule myadc_modular_adc_0 (\r\n\t\tinput  wire        clock_clk,              //          clock.clk\n\t\tinput  wire        reset_sink_reset_n,     //     reset_sink.reset_n\n\t\tinput  wire        adc_pll_clock_clk,      //  adc_pll_clock.clk\n\t\tinput  wire        adc_pll_locked_export,  // adc_pll_locked.export\n\t\tinput  wire        command_valid,          //        command.valid\n\t\tinput  wire [4:0]  command_channel,        //               .channel\n\t\tinput  wire        command_startofpacket,  //               .startofpacket\n\t\tinput  wire        command_endofpacket,    //               .endofpacket\n\t\toutput wire        command_ready,          //               .ready\n\t\toutput wire        response_valid,         //       response.valid\n\t\toutput wire [4:0]  response_channel,       //               .channel\n\t\toutput wire [11:0] response_data,          //               .data\n\t\toutput wire        response_startofpacket, //               .startofpacket\n\t\toutput wire        response_endofpacket    //               .endofpacket\n\t);\r\n\r\n\taltera_modular_adc_control #(\r\n\t\t.clkdiv                          (2),\r\n\t\t.tsclkdiv                        (1),\r\n\t\t.tsclksel                        (1),\r\n\t\t.hard_pwd                        (0),\r\n\t\t.prescalar                       (0),\r\n\t\t.refsel                          (1),\r\n\t\t.device_partname_fivechar_prefix (\"10M08\"),\r\n\t\t.is_this_first_or_second_adc     (1),\r\n\t\t.analog_input_pin_mask           (65536),\r\n\t\t.dual_adc_mode                   (0),\r\n\t\t.enable_usr_sim                  (0),\r\n\t\t.reference_voltage_sim           (65536),\r\n\t\t.simfilename_ch0                 (\"\"),\r\n\t\t.simfilename_ch1                 (\"\"),\r\n\t\t.simfilename_ch2                 (\"\"),\r\n\t\t.simfilename_ch3                 (\"\"),\r\n\t\t.simfilename_ch4                 (\"\"),\r\n\t\t.simfilename_ch5                 (\"\"),\r\n\t\t.simfilename_ch6                 (\"\"),\r\n\t\t.simfilename_ch7                 (\"\"),\r\n\t\t.simfilename_ch8                 (\"\"),\r\n\t\t.simfilename_ch9                 (\"\"),\r\n\t\t.simfilename_ch10                (\"\"),\r\n\t\t.simfilename_ch11                (\"\"),\r\n\t\t.simfilename_ch12                (\"\"),\r\n\t\t.simfilename_ch13                (\"\"),\r\n\t\t.simfilename_ch14                (\"\"),\r\n\t\t.simfilename_ch15                (\"\"),\r\n\t\t.simfilename_ch16                (\"\")\r\n\t) control_internal (\n\t\t.clk               (clock_clk),              //         clock.clk\n\t\t.cmd_valid         (command_valid),          //       command.valid\n\t\t.cmd_channel       (command_channel),        //              .channel\n\t\t.cmd_sop           (command_startofpacket),  //              .startofpacket\n\t\t.cmd_eop           (command_endofpacket),    //              .endofpacket\n\t\t.cmd_ready         (command_ready),          //              .ready\n\t\t.rst_n             (reset_sink_reset_n),     //    reset_sink.reset_n\n\t\t.rsp_valid         (response_valid),         //      response.valid\n\t\t.rsp_channel       (response_channel),       //              .channel\n\t\t.rsp_data          (response_data),          //              .data\n\t\t.rsp_sop           (response_startofpacket), //              .startofpacket\n\t\t.rsp_eop           (response_endofpacket),   //              .endofpacket\n\t\t.clk_in_pll_c0     (adc_pll_clock_clk),      // adc_pll_clock.clk\n\t\t.clk_in_pll_locked (adc_pll_locked_export),  //   conduit_end.export\n\t\t.sync_valid        (),                       //   (terminated)\n\t\t.sync_ready        (1'b0)                    //   (terminated)\n\t);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc/synthesis/submodules/myadc_modular_adc_0.v.bak",
    "content": "// myadc_modular_adc_0.v\r\n\r\n// This file was auto-generated from altera_modular_adc_hw.tcl.  If you edit it your changes\n// will probably be lost.\n// \n// Generated using ACDS version 15.0 145\r\n\r\n`timescale 1 ps / 1 ps\nmodule myadc_modular_adc_0 (\r\n\t\tinput  wire        clock_clk,              //          clock.clk\n\t\tinput  wire        reset_sink_reset_n,     //     reset_sink.reset_n\n\t\tinput  wire        adc_pll_clock_clk,      //  adc_pll_clock.clk\n\t\tinput  wire        adc_pll_locked_export,  // adc_pll_locked.export\n\t\tinput  wire        command_valid,          //        command.valid\n\t\tinput  wire [4:0]  command_channel,        //               .channel\n\t\tinput  wire        command_startofpacket,  //               .startofpacket\n\t\tinput  wire        command_endofpacket,    //               .endofpacket\n\t\toutput wire        command_ready,          //               .ready\n\t\toutput wire        response_valid,         //       response.valid\n\t\toutput wire [4:0]  response_channel,       //               .channel\n\t\toutput wire [11:0] response_data,          //               .data\n\t\toutput wire        response_startofpacket, //               .startofpacket\n\t\toutput wire        response_endofpacket    //               .endofpacket\n\t);\r\n\r\n\taltera_modular_adc_control #(\r\n\t\t.clkdiv                          (2),\r\n\t\t.tsclkdiv                        (1),\r\n\t\t.tsclksel                        (1),\r\n\t\t.hard_pwd                        (0),\r\n\t\t.prescalar                       (0),\r\n\t\t.refsel                          (1),\r\n\t\t.device_partname_fivechar_prefix (\"10M08\"),\r\n\t\t.is_this_first_or_second_adc     (1),\r\n\t\t.analog_input_pin_mask           (65536),\r\n\t\t.dual_adc_mode                   (0)\r\n\t) control_internal (\n\t\t.clk               (clock_clk),              //         clock.clk\n\t\t.cmd_valid         (command_valid),          //       command.valid\n\t\t.cmd_channel       (command_channel),        //              .channel\n\t\t.cmd_sop           (command_startofpacket),  //              .startofpacket\n\t\t.cmd_eop           (command_endofpacket),    //              .endofpacket\n\t\t.cmd_ready         (command_ready),          //              .ready\n\t\t.rst_n             (reset_sink_reset_n),     //    reset_sink.reset_n\n\t\t.rsp_valid         (response_valid),         //      response.valid\n\t\t.rsp_channel       (response_channel),       //              .channel\n\t\t.rsp_data          (response_data),          //              .data\n\t\t.rsp_sop           (response_startofpacket), //              .startofpacket\n\t\t.rsp_eop           (response_endofpacket),   //              .endofpacket\n\t\t.clk_in_pll_c0     (adc_pll_clock_clk),      // adc_pll_clock.clk\n\t\t.clk_in_pll_locked (adc_pll_locked_export),  //   conduit_end.export\n\t\t.sync_valid        (),                       //   (terminated)\n\t\t.sync_ready        (1'b0)                    //   (terminated)\n\t);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/myadc.BAK.qsys",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<system name=\"$${FILENAME}\">\n <component\n   name=\"$${FILENAME}\"\n   displayName=\"$${FILENAME}\"\n   version=\"1.0\"\n   description=\"\"\n   tags=\"INTERNAL_COMPONENT=true\"\n   categories=\"System\" />\n <parameter name=\"bonusData\"><![CDATA[bonusData \n{\n   element $${FILENAME}\n   {\n      datum _originalDeviceFamily\n      {\n         value = \"MAX 10\";\n         type = \"String\";\n      }\n   }\n   element modular_adc_0\n   {\n      datum _sortIndex\n      {\n         value = \"0\";\n         type = \"int\";\n      }\n   }\n}\n]]></parameter>\n <parameter name=\"clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <parameter name=\"device\" value=\"10M08SAE144C8GES\" />\n <parameter name=\"deviceFamily\" value=\"MAX 10\" />\n <parameter name=\"deviceSpeedGrade\" value=\"8\" />\n <parameter name=\"fabricMode\" value=\"QSYS\" />\n <parameter name=\"generateLegacySim\" value=\"false\" />\n <parameter name=\"generationId\" value=\"0\" />\n <parameter name=\"globalResetBus\" value=\"false\" />\n <parameter name=\"hdlLanguage\" value=\"VERILOG\" />\n <parameter name=\"hideFromIPCatalog\" value=\"true\" />\n <parameter name=\"lockedInterfaceDefinition\" value=\"\" />\n <parameter name=\"maxAdditionalLatency\" value=\"1\" />\n <parameter name=\"projectName\" value=\"serial1.qpf\" />\n <parameter name=\"sopcBorderPoints\" value=\"false\" />\n <parameter name=\"systemHash\" value=\"0\" />\n <parameter name=\"testBenchDutName\" value=\"\" />\n <parameter name=\"timeStamp\" value=\"0\" />\n <parameter name=\"useTestBenchNamingPattern\" value=\"false\" />\n <instanceScript></instanceScript>\n <interface\n   name=\"adc_pll_clock\"\n   internal=\"modular_adc_0.adc_pll_clock\"\n   type=\"clock\"\n   dir=\"end\">\n  <port name=\"adc_pll_clock_clk\" internal=\"adc_pll_clock_clk\" />\n </interface>\n <interface\n   name=\"adc_pll_locked\"\n   internal=\"modular_adc_0.adc_pll_locked\"\n   type=\"conduit\"\n   dir=\"end\">\n  <port name=\"adc_pll_locked_export\" internal=\"adc_pll_locked_export\" />\n </interface>\n <interface name=\"clock\" internal=\"modular_adc_0.clock\" type=\"clock\" dir=\"end\">\n  <port name=\"clock_clk\" internal=\"clock_clk\" />\n </interface>\n <interface\n   name=\"command\"\n   internal=\"modular_adc_0.command\"\n   type=\"avalon_streaming\"\n   dir=\"end\">\n  <port name=\"command_valid\" internal=\"command_valid\" />\n  <port name=\"command_channel\" internal=\"command_channel\" />\n  <port name=\"command_startofpacket\" internal=\"command_startofpacket\" />\n  <port name=\"command_endofpacket\" internal=\"command_endofpacket\" />\n  <port name=\"command_ready\" internal=\"command_ready\" />\n </interface>\n <interface\n   name=\"reset_sink\"\n   internal=\"modular_adc_0.reset_sink\"\n   type=\"reset\"\n   dir=\"end\">\n  <port name=\"reset_sink_reset_n\" internal=\"reset_sink_reset_n\" />\n </interface>\n <interface\n   name=\"response\"\n   internal=\"modular_adc_0.response\"\n   type=\"avalon_streaming\"\n   dir=\"start\">\n  <port name=\"response_valid\" internal=\"response_valid\" />\n  <port name=\"response_channel\" internal=\"response_channel\" />\n  <port name=\"response_data\" internal=\"response_data\" />\n  <port name=\"response_startofpacket\" internal=\"response_startofpacket\" />\n  <port name=\"response_endofpacket\" internal=\"response_endofpacket\" />\n </interface>\n <interface name=\"sample_store_csr\" internal=\"modular_adc_0.sample_store_csr\" />\n <interface name=\"sample_store_irq\" internal=\"modular_adc_0.sample_store_irq\" />\n <interface name=\"sequencer_csr\" internal=\"modular_adc_0.sequencer_csr\" />\n <interface name=\"threshold\" internal=\"modular_adc_0.threshold\" />\n <module\n   name=\"modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"15.0\"\n   enabled=\"1\"\n   autoexport=\"1\">\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\" value=\"8\" />\n  <parameter name=\"CLOCK_FREQ\" value=\"0\" />\n  <parameter name=\"CORE_VAR\" value=\"3\" />\n  <parameter name=\"DEVICE_PART\" value=\"10M08SAE144C8GES\" />\n  <parameter name=\"ENABLE_DEBUG\" value=\"0\" />\n  <parameter name=\"FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"MONITOR_COUNT_WIDTH\" value=\"12\" />\n  <parameter name=\"clkdiv\" value=\"2\" />\n  <parameter name=\"en_thmax_ch0\" value=\"false\" />\n  <parameter name=\"en_thmax_ch1\" value=\"false\" />\n  <parameter name=\"en_thmax_ch10\" value=\"false\" />\n  <parameter name=\"en_thmax_ch11\" value=\"false\" />\n  <parameter name=\"en_thmax_ch12\" value=\"false\" />\n  <parameter name=\"en_thmax_ch13\" value=\"false\" />\n  <parameter name=\"en_thmax_ch14\" value=\"false\" />\n  <parameter name=\"en_thmax_ch15\" value=\"false\" />\n  <parameter name=\"en_thmax_ch16\" value=\"false\" />\n  <parameter name=\"en_thmax_ch2\" value=\"false\" />\n  <parameter name=\"en_thmax_ch3\" value=\"false\" />\n  <parameter name=\"en_thmax_ch4\" value=\"false\" />\n  <parameter name=\"en_thmax_ch5\" value=\"false\" />\n  <parameter name=\"en_thmax_ch6\" value=\"false\" />\n  <parameter name=\"en_thmax_ch7\" value=\"false\" />\n  <parameter name=\"en_thmax_ch8\" value=\"false\" />\n  <parameter name=\"en_thmax_ch9\" value=\"false\" />\n  <parameter name=\"en_thmin_ch0\" value=\"false\" />\n  <parameter name=\"en_thmin_ch1\" value=\"false\" />\n  <parameter name=\"en_thmin_ch10\" value=\"false\" />\n  <parameter name=\"en_thmin_ch11\" value=\"false\" />\n  <parameter name=\"en_thmin_ch12\" value=\"false\" />\n  <parameter name=\"en_thmin_ch13\" value=\"false\" />\n  <parameter name=\"en_thmin_ch14\" value=\"false\" />\n  <parameter name=\"en_thmin_ch15\" value=\"false\" />\n  <parameter name=\"en_thmin_ch16\" value=\"false\" />\n  <parameter name=\"en_thmin_ch2\" value=\"false\" />\n  <parameter name=\"en_thmin_ch3\" value=\"false\" />\n  <parameter name=\"en_thmin_ch4\" value=\"false\" />\n  <parameter name=\"en_thmin_ch5\" value=\"false\" />\n  <parameter name=\"en_thmin_ch6\" value=\"false\" />\n  <parameter name=\"en_thmin_ch7\" value=\"false\" />\n  <parameter name=\"en_thmin_ch8\" value=\"false\" />\n  <parameter name=\"en_thmin_ch9\" value=\"false\" />\n  <parameter name=\"en_tsd_max\" value=\"false\" />\n  <parameter name=\"en_tsd_min\" value=\"false\" />\n  <parameter name=\"external_vref\" value=\"2.5\" />\n  <parameter name=\"int_vref_vr\" value=\"3.3\" />\n  <parameter name=\"ip_is_for_which_adc\" value=\"1\" />\n  <parameter name=\"prescaler_ch16\" value=\"false\" />\n  <parameter name=\"prescaler_ch8\" value=\"false\" />\n  <parameter name=\"refsel\" value=\"1\" />\n  <parameter name=\"seq_order_length\" value=\"2\" />\n  <parameter name=\"seq_order_slot_1\" value=\"0\" />\n  <parameter name=\"seq_order_slot_10\" value=\"30\" />\n  <parameter name=\"seq_order_slot_11\" value=\"30\" />\n  <parameter name=\"seq_order_slot_12\" value=\"30\" />\n  <parameter name=\"seq_order_slot_13\" value=\"30\" />\n  <parameter name=\"seq_order_slot_14\" value=\"30\" />\n  <parameter name=\"seq_order_slot_15\" value=\"30\" />\n  <parameter name=\"seq_order_slot_16\" value=\"30\" />\n  <parameter name=\"seq_order_slot_17\" value=\"30\" />\n  <parameter name=\"seq_order_slot_18\" value=\"30\" />\n  <parameter name=\"seq_order_slot_19\" value=\"30\" />\n  <parameter name=\"seq_order_slot_2\" value=\"17\" />\n  <parameter name=\"seq_order_slot_20\" value=\"30\" />\n  <parameter name=\"seq_order_slot_21\" value=\"30\" />\n  <parameter name=\"seq_order_slot_22\" value=\"30\" />\n  <parameter name=\"seq_order_slot_23\" value=\"30\" />\n  <parameter name=\"seq_order_slot_24\" value=\"30\" />\n  <parameter name=\"seq_order_slot_25\" value=\"30\" />\n  <parameter name=\"seq_order_slot_26\" value=\"30\" />\n  <parameter name=\"seq_order_slot_27\" value=\"30\" />\n  <parameter name=\"seq_order_slot_28\" value=\"30\" />\n  <parameter name=\"seq_order_slot_29\" value=\"30\" />\n  <parameter name=\"seq_order_slot_3\" value=\"17\" />\n  <parameter name=\"seq_order_slot_30\" value=\"30\" />\n  <parameter name=\"seq_order_slot_31\" value=\"30\" />\n  <parameter name=\"seq_order_slot_32\" value=\"30\" />\n  <parameter name=\"seq_order_slot_33\" value=\"30\" />\n  <parameter name=\"seq_order_slot_34\" value=\"30\" />\n  <parameter name=\"seq_order_slot_35\" value=\"30\" />\n  <parameter name=\"seq_order_slot_36\" value=\"30\" />\n  <parameter name=\"seq_order_slot_37\" value=\"30\" />\n  <parameter name=\"seq_order_slot_38\" value=\"30\" />\n  <parameter name=\"seq_order_slot_39\" value=\"30\" />\n  <parameter name=\"seq_order_slot_4\" value=\"30\" />\n  <parameter name=\"seq_order_slot_40\" value=\"30\" />\n  <parameter name=\"seq_order_slot_41\" value=\"30\" />\n  <parameter name=\"seq_order_slot_42\" value=\"30\" />\n  <parameter name=\"seq_order_slot_43\" value=\"30\" />\n  <parameter name=\"seq_order_slot_44\" value=\"30\" />\n  <parameter name=\"seq_order_slot_45\" value=\"30\" />\n  <parameter name=\"seq_order_slot_46\" value=\"30\" />\n  <parameter name=\"seq_order_slot_47\" value=\"30\" />\n  <parameter name=\"seq_order_slot_48\" value=\"30\" />\n  <parameter name=\"seq_order_slot_49\" value=\"30\" />\n  <parameter name=\"seq_order_slot_5\" value=\"30\" />\n  <parameter name=\"seq_order_slot_50\" value=\"30\" />\n  <parameter name=\"seq_order_slot_51\" value=\"30\" />\n  <parameter name=\"seq_order_slot_52\" value=\"30\" />\n  <parameter name=\"seq_order_slot_53\" value=\"30\" />\n  <parameter name=\"seq_order_slot_54\" value=\"30\" />\n  <parameter name=\"seq_order_slot_55\" value=\"30\" />\n  <parameter name=\"seq_order_slot_56\" value=\"30\" />\n  <parameter name=\"seq_order_slot_57\" value=\"30\" />\n  <parameter name=\"seq_order_slot_58\" value=\"30\" />\n  <parameter name=\"seq_order_slot_59\" value=\"30\" />\n  <parameter name=\"seq_order_slot_6\" value=\"30\" />\n  <parameter name=\"seq_order_slot_60\" value=\"30\" />\n  <parameter name=\"seq_order_slot_61\" value=\"30\" />\n  <parameter name=\"seq_order_slot_62\" value=\"30\" />\n  <parameter name=\"seq_order_slot_63\" value=\"30\" />\n  <parameter name=\"seq_order_slot_64\" value=\"30\" />\n  <parameter name=\"seq_order_slot_7\" value=\"30\" />\n  <parameter name=\"seq_order_slot_8\" value=\"30\" />\n  <parameter name=\"seq_order_slot_9\" value=\"30\" />\n  <parameter name=\"thmax_ch0\" value=\"0.0\" />\n  <parameter name=\"thmax_ch1\" value=\"0.0\" />\n  <parameter name=\"thmax_ch10\" value=\"0.0\" />\n  <parameter name=\"thmax_ch11\" value=\"0.0\" />\n  <parameter name=\"thmax_ch12\" value=\"0.0\" />\n  <parameter name=\"thmax_ch13\" value=\"0.0\" />\n  <parameter name=\"thmax_ch14\" value=\"0.0\" />\n  <parameter name=\"thmax_ch15\" value=\"0.0\" />\n  <parameter name=\"thmax_ch16\" value=\"0.0\" />\n  <parameter name=\"thmax_ch2\" value=\"0.0\" />\n  <parameter name=\"thmax_ch3\" value=\"0.0\" />\n  <parameter name=\"thmax_ch4\" value=\"0.0\" />\n  <parameter name=\"thmax_ch5\" value=\"0.0\" />\n  <parameter name=\"thmax_ch6\" value=\"0.0\" />\n  <parameter name=\"thmax_ch7\" value=\"0.0\" />\n  <parameter name=\"thmax_ch8\" value=\"0.0\" />\n  <parameter name=\"thmax_ch9\" value=\"0.0\" />\n  <parameter name=\"thmin_ch0\" value=\"0.0\" />\n  <parameter name=\"thmin_ch1\" value=\"0.0\" />\n  <parameter name=\"thmin_ch10\" value=\"0.0\" />\n  <parameter name=\"thmin_ch11\" value=\"0.0\" />\n  <parameter name=\"thmin_ch12\" value=\"0.0\" />\n  <parameter name=\"thmin_ch13\" value=\"0.0\" />\n  <parameter name=\"thmin_ch14\" value=\"0.0\" />\n  <parameter name=\"thmin_ch15\" value=\"0.0\" />\n  <parameter name=\"thmin_ch16\" value=\"0.0\" />\n  <parameter name=\"thmin_ch2\" value=\"0.0\" />\n  <parameter name=\"thmin_ch3\" value=\"0.0\" />\n  <parameter name=\"thmin_ch4\" value=\"0.0\" />\n  <parameter name=\"thmin_ch5\" value=\"0.0\" />\n  <parameter name=\"thmin_ch6\" value=\"0.0\" />\n  <parameter name=\"thmin_ch7\" value=\"0.0\" />\n  <parameter name=\"thmin_ch8\" value=\"0.0\" />\n  <parameter name=\"thmin_ch9\" value=\"0.0\" />\n  <parameter name=\"tsclkdiv\" value=\"1\" />\n  <parameter name=\"tsclksel\" value=\"1\" />\n  <parameter name=\"tsd_max\" value=\"125\" />\n  <parameter name=\"tsd_min\" value=\"0\" />\n  <parameter name=\"use_ch0\" value=\"true\" />\n  <parameter name=\"use_ch1\" value=\"false\" />\n  <parameter name=\"use_ch10\" value=\"false\" />\n  <parameter name=\"use_ch11\" value=\"false\" />\n  <parameter name=\"use_ch12\" value=\"false\" />\n  <parameter name=\"use_ch13\" value=\"false\" />\n  <parameter name=\"use_ch14\" value=\"false\" />\n  <parameter name=\"use_ch15\" value=\"false\" />\n  <parameter name=\"use_ch16\" value=\"false\" />\n  <parameter name=\"use_ch2\" value=\"false\" />\n  <parameter name=\"use_ch3\" value=\"false\" />\n  <parameter name=\"use_ch4\" value=\"false\" />\n  <parameter name=\"use_ch5\" value=\"false\" />\n  <parameter name=\"use_ch6\" value=\"false\" />\n  <parameter name=\"use_ch7\" value=\"false\" />\n  <parameter name=\"use_ch8\" value=\"false\" />\n  <parameter name=\"use_ch9\" value=\"false\" />\n  <parameter name=\"use_tsd\" value=\"true\" />\n </module>\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.enableEccProtection\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.insertDefaultSlave\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.maxAdditionalLatency\" value=\"1\" />\n</system>\n"
  },
  {
    "path": "max10_adc_firmware/myadc.qsys",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<system name=\"$${FILENAME}\">\n <component\n   name=\"$${FILENAME}\"\n   displayName=\"$${FILENAME}\"\n   version=\"1.0\"\n   description=\"\"\n   tags=\"INTERNAL_COMPONENT=true\"\n   categories=\"System\" />\n <parameter name=\"bonusData\"><![CDATA[bonusData \r\n{\r\n   element modular_adc_0\r\n   {\r\n      datum _sortIndex\r\n      {\r\n         value = \"0\";\r\n         type = \"int\";\r\n      }\r\n   }\r\n}\r\n]]></parameter>\n <parameter name=\"clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <parameter name=\"device\" value=\"10M08SAE144C8GES\" />\n <parameter name=\"deviceFamily\" value=\"MAX 10\" />\n <parameter name=\"deviceSpeedGrade\" value=\"8\" />\n <parameter name=\"fabricMode\" value=\"QSYS\" />\n <parameter name=\"generateLegacySim\" value=\"false\" />\n <parameter name=\"generationId\" value=\"0\" />\n <parameter name=\"globalResetBus\" value=\"false\" />\n <parameter name=\"hdlLanguage\" value=\"VERILOG\" />\n <parameter name=\"hideFromIPCatalog\" value=\"true\" />\n <parameter name=\"lockedInterfaceDefinition\" value=\"\" />\n <parameter name=\"maxAdditionalLatency\" value=\"1\" />\n <parameter name=\"projectName\" value=\"serial1.qpf\" />\n <parameter name=\"sopcBorderPoints\" value=\"false\" />\n <parameter name=\"systemHash\" value=\"0\" />\n <parameter name=\"testBenchDutName\" value=\"\" />\n <parameter name=\"timeStamp\" value=\"0\" />\n <parameter name=\"useTestBenchNamingPattern\" value=\"false\" />\n <instanceScript></instanceScript>\n <interface\n   name=\"adc_pll_clock\"\n   internal=\"modular_adc_0.adc_pll_clock\"\n   type=\"clock\"\n   dir=\"end\">\n  <port name=\"adc_pll_clock_clk\" internal=\"adc_pll_clock_clk\" />\n </interface>\n <interface\n   name=\"adc_pll_locked\"\n   internal=\"modular_adc_0.adc_pll_locked\"\n   type=\"conduit\"\n   dir=\"end\">\n  <port name=\"adc_pll_locked_export\" internal=\"adc_pll_locked_export\" />\n </interface>\n <interface name=\"clock\" internal=\"modular_adc_0.clock\" type=\"clock\" dir=\"end\">\n  <port name=\"clock_clk\" internal=\"clock_clk\" />\n </interface>\n <interface\n   name=\"command\"\n   internal=\"modular_adc_0.command\"\n   type=\"avalon_streaming\"\n   dir=\"end\">\n  <port name=\"command_valid\" internal=\"command_valid\" />\n  <port name=\"command_channel\" internal=\"command_channel\" />\n  <port name=\"command_startofpacket\" internal=\"command_startofpacket\" />\n  <port name=\"command_endofpacket\" internal=\"command_endofpacket\" />\n  <port name=\"command_ready\" internal=\"command_ready\" />\n </interface>\n <interface\n   name=\"reset_sink\"\n   internal=\"modular_adc_0.reset_sink\"\n   type=\"reset\"\n   dir=\"end\">\n  <port name=\"reset_sink_reset_n\" internal=\"reset_sink_reset_n\" />\n </interface>\n <interface\n   name=\"response\"\n   internal=\"modular_adc_0.response\"\n   type=\"avalon_streaming\"\n   dir=\"start\">\n  <port name=\"response_valid\" internal=\"response_valid\" />\n  <port name=\"response_channel\" internal=\"response_channel\" />\n  <port name=\"response_data\" internal=\"response_data\" />\n  <port name=\"response_startofpacket\" internal=\"response_startofpacket\" />\n  <port name=\"response_endofpacket\" internal=\"response_endofpacket\" />\n </interface>\n <interface name=\"sample_store_csr\" internal=\"modular_adc_0.sample_store_csr\" />\n <interface name=\"sample_store_irq\" internal=\"modular_adc_0.sample_store_irq\" />\n <interface name=\"sequencer_csr\" internal=\"modular_adc_0.sequencer_csr\" />\n <interface name=\"threshold\" internal=\"modular_adc_0.threshold\" />\n <module\n   name=\"modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"18.0\"\n   enabled=\"1\"\n   autoexport=\"1\">\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\" value=\"8\" />\n  <parameter name=\"CLOCK_FREQ\" value=\"0\" />\n  <parameter name=\"CORE_VAR\" value=\"3\" />\n  <parameter name=\"DEVICE_PART\" value=\"10M08SAE144C8GES\" />\n  <parameter name=\"ENABLE_DEBUG\" value=\"0\" />\n  <parameter name=\"FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"MONITOR_COUNT_WIDTH\" value=\"12\" />\n  <parameter name=\"clkdiv\" value=\"2\" />\n  <parameter name=\"en_thmax_ch0\" value=\"false\" />\n  <parameter name=\"en_thmax_ch1\" value=\"false\" />\n  <parameter name=\"en_thmax_ch10\" value=\"false\" />\n  <parameter name=\"en_thmax_ch11\" value=\"false\" />\n  <parameter name=\"en_thmax_ch12\" value=\"false\" />\n  <parameter name=\"en_thmax_ch13\" value=\"false\" />\n  <parameter name=\"en_thmax_ch14\" value=\"false\" />\n  <parameter name=\"en_thmax_ch15\" value=\"false\" />\n  <parameter name=\"en_thmax_ch16\" value=\"false\" />\n  <parameter name=\"en_thmax_ch2\" value=\"false\" />\n  <parameter name=\"en_thmax_ch3\" value=\"false\" />\n  <parameter name=\"en_thmax_ch4\" value=\"false\" />\n  <parameter name=\"en_thmax_ch5\" value=\"false\" />\n  <parameter name=\"en_thmax_ch6\" value=\"false\" />\n  <parameter name=\"en_thmax_ch7\" value=\"false\" />\n  <parameter name=\"en_thmax_ch8\" value=\"false\" />\n  <parameter name=\"en_thmax_ch9\" value=\"false\" />\n  <parameter name=\"en_thmin_ch0\" value=\"false\" />\n  <parameter name=\"en_thmin_ch1\" value=\"false\" />\n  <parameter name=\"en_thmin_ch10\" value=\"false\" />\n  <parameter name=\"en_thmin_ch11\" value=\"false\" />\n  <parameter name=\"en_thmin_ch12\" value=\"false\" />\n  <parameter name=\"en_thmin_ch13\" value=\"false\" />\n  <parameter name=\"en_thmin_ch14\" value=\"false\" />\n  <parameter name=\"en_thmin_ch15\" value=\"false\" />\n  <parameter name=\"en_thmin_ch16\" value=\"false\" />\n  <parameter name=\"en_thmin_ch2\" value=\"false\" />\n  <parameter name=\"en_thmin_ch3\" value=\"false\" />\n  <parameter name=\"en_thmin_ch4\" value=\"false\" />\n  <parameter name=\"en_thmin_ch5\" value=\"false\" />\n  <parameter name=\"en_thmin_ch6\" value=\"false\" />\n  <parameter name=\"en_thmin_ch7\" value=\"false\" />\n  <parameter name=\"en_thmin_ch8\" value=\"false\" />\n  <parameter name=\"en_thmin_ch9\" value=\"false\" />\n  <parameter name=\"en_tsd_max\" value=\"false\" />\n  <parameter name=\"en_tsd_min\" value=\"false\" />\n  <parameter name=\"enable_usr_sim\" value=\"0\" />\n  <parameter name=\"external_vref\" value=\"2.5\" />\n  <parameter name=\"int_vref_vr\" value=\"3.3\" />\n  <parameter name=\"ip_is_for_which_adc\" value=\"1\" />\n  <parameter name=\"prescaler_ch16\" value=\"false\" />\n  <parameter name=\"prescaler_ch8\" value=\"false\" />\n  <parameter name=\"refsel\" value=\"1\" />\n  <parameter name=\"sample_rate\" value=\"0\" />\n  <parameter name=\"seq_order_length\" value=\"2\" />\n  <parameter name=\"seq_order_slot_1\" value=\"0\" />\n  <parameter name=\"seq_order_slot_10\" value=\"30\" />\n  <parameter name=\"seq_order_slot_11\" value=\"30\" />\n  <parameter name=\"seq_order_slot_12\" value=\"30\" />\n  <parameter name=\"seq_order_slot_13\" value=\"30\" />\n  <parameter name=\"seq_order_slot_14\" value=\"30\" />\n  <parameter name=\"seq_order_slot_15\" value=\"30\" />\n  <parameter name=\"seq_order_slot_16\" value=\"30\" />\n  <parameter name=\"seq_order_slot_17\" value=\"30\" />\n  <parameter name=\"seq_order_slot_18\" value=\"30\" />\n  <parameter name=\"seq_order_slot_19\" value=\"30\" />\n  <parameter name=\"seq_order_slot_2\" value=\"17\" />\n  <parameter name=\"seq_order_slot_20\" value=\"30\" />\n  <parameter name=\"seq_order_slot_21\" value=\"30\" />\n  <parameter name=\"seq_order_slot_22\" value=\"30\" />\n  <parameter name=\"seq_order_slot_23\" value=\"30\" />\n  <parameter name=\"seq_order_slot_24\" value=\"30\" />\n  <parameter name=\"seq_order_slot_25\" value=\"30\" />\n  <parameter name=\"seq_order_slot_26\" value=\"30\" />\n  <parameter name=\"seq_order_slot_27\" value=\"30\" />\n  <parameter name=\"seq_order_slot_28\" value=\"30\" />\n  <parameter name=\"seq_order_slot_29\" value=\"30\" />\n  <parameter name=\"seq_order_slot_3\" value=\"17\" />\n  <parameter name=\"seq_order_slot_30\" value=\"30\" />\n  <parameter name=\"seq_order_slot_31\" value=\"30\" />\n  <parameter name=\"seq_order_slot_32\" value=\"30\" />\n  <parameter name=\"seq_order_slot_33\" value=\"30\" />\n  <parameter name=\"seq_order_slot_34\" value=\"30\" />\n  <parameter name=\"seq_order_slot_35\" value=\"30\" />\n  <parameter name=\"seq_order_slot_36\" value=\"30\" />\n  <parameter name=\"seq_order_slot_37\" value=\"30\" />\n  <parameter name=\"seq_order_slot_38\" value=\"30\" />\n  <parameter name=\"seq_order_slot_39\" value=\"30\" />\n  <parameter name=\"seq_order_slot_4\" value=\"30\" />\n  <parameter name=\"seq_order_slot_40\" value=\"30\" />\n  <parameter name=\"seq_order_slot_41\" value=\"30\" />\n  <parameter name=\"seq_order_slot_42\" value=\"30\" />\n  <parameter name=\"seq_order_slot_43\" value=\"30\" />\n  <parameter name=\"seq_order_slot_44\" value=\"30\" />\n  <parameter name=\"seq_order_slot_45\" value=\"30\" />\n  <parameter name=\"seq_order_slot_46\" value=\"30\" />\n  <parameter name=\"seq_order_slot_47\" value=\"30\" />\n  <parameter name=\"seq_order_slot_48\" value=\"30\" />\n  <parameter name=\"seq_order_slot_49\" value=\"30\" />\n  <parameter name=\"seq_order_slot_5\" value=\"30\" />\n  <parameter name=\"seq_order_slot_50\" value=\"30\" />\n  <parameter name=\"seq_order_slot_51\" value=\"30\" />\n  <parameter name=\"seq_order_slot_52\" value=\"30\" />\n  <parameter name=\"seq_order_slot_53\" value=\"30\" />\n  <parameter name=\"seq_order_slot_54\" value=\"30\" />\n  <parameter name=\"seq_order_slot_55\" value=\"30\" />\n  <parameter name=\"seq_order_slot_56\" value=\"30\" />\n  <parameter name=\"seq_order_slot_57\" value=\"30\" />\n  <parameter name=\"seq_order_slot_58\" value=\"30\" />\n  <parameter name=\"seq_order_slot_59\" value=\"30\" />\n  <parameter name=\"seq_order_slot_6\" value=\"30\" />\n  <parameter name=\"seq_order_slot_60\" value=\"30\" />\n  <parameter name=\"seq_order_slot_61\" value=\"30\" />\n  <parameter name=\"seq_order_slot_62\" value=\"30\" />\n  <parameter name=\"seq_order_slot_63\" value=\"30\" />\n  <parameter name=\"seq_order_slot_64\" value=\"30\" />\n  <parameter name=\"seq_order_slot_7\" value=\"30\" />\n  <parameter name=\"seq_order_slot_8\" value=\"30\" />\n  <parameter name=\"seq_order_slot_9\" value=\"30\" />\n  <parameter name=\"simfilename_ch0\" value=\"\" />\n  <parameter name=\"simfilename_ch1\" value=\"\" />\n  <parameter name=\"simfilename_ch10\" value=\"\" />\n  <parameter name=\"simfilename_ch11\" value=\"\" />\n  <parameter name=\"simfilename_ch12\" value=\"\" />\n  <parameter name=\"simfilename_ch13\" value=\"\" />\n  <parameter name=\"simfilename_ch14\" value=\"\" />\n  <parameter name=\"simfilename_ch15\" value=\"\" />\n  <parameter name=\"simfilename_ch16\" value=\"\" />\n  <parameter name=\"simfilename_ch2\" value=\"\" />\n  <parameter name=\"simfilename_ch3\" value=\"\" />\n  <parameter name=\"simfilename_ch4\" value=\"\" />\n  <parameter name=\"simfilename_ch5\" value=\"\" />\n  <parameter name=\"simfilename_ch6\" value=\"\" />\n  <parameter name=\"simfilename_ch7\" value=\"\" />\n  <parameter name=\"simfilename_ch8\" value=\"\" />\n  <parameter name=\"simfilename_ch9\" value=\"\" />\n  <parameter name=\"thmax_ch0\" value=\"0.0\" />\n  <parameter name=\"thmax_ch1\" value=\"0.0\" />\n  <parameter name=\"thmax_ch10\" value=\"0.0\" />\n  <parameter name=\"thmax_ch11\" value=\"0.0\" />\n  <parameter name=\"thmax_ch12\" value=\"0.0\" />\n  <parameter name=\"thmax_ch13\" value=\"0.0\" />\n  <parameter name=\"thmax_ch14\" value=\"0.0\" />\n  <parameter name=\"thmax_ch15\" value=\"0.0\" />\n  <parameter name=\"thmax_ch16\" value=\"0.0\" />\n  <parameter name=\"thmax_ch2\" value=\"0.0\" />\n  <parameter name=\"thmax_ch3\" value=\"0.0\" />\n  <parameter name=\"thmax_ch4\" value=\"0.0\" />\n  <parameter name=\"thmax_ch5\" value=\"0.0\" />\n  <parameter name=\"thmax_ch6\" value=\"0.0\" />\n  <parameter name=\"thmax_ch7\" value=\"0.0\" />\n  <parameter name=\"thmax_ch8\" value=\"0.0\" />\n  <parameter name=\"thmax_ch9\" value=\"0.0\" />\n  <parameter name=\"thmin_ch0\" value=\"0.0\" />\n  <parameter name=\"thmin_ch1\" value=\"0.0\" />\n  <parameter name=\"thmin_ch10\" value=\"0.0\" />\n  <parameter name=\"thmin_ch11\" value=\"0.0\" />\n  <parameter name=\"thmin_ch12\" value=\"0.0\" />\n  <parameter name=\"thmin_ch13\" value=\"0.0\" />\n  <parameter name=\"thmin_ch14\" value=\"0.0\" />\n  <parameter name=\"thmin_ch15\" value=\"0.0\" />\n  <parameter name=\"thmin_ch16\" value=\"0.0\" />\n  <parameter name=\"thmin_ch2\" value=\"0.0\" />\n  <parameter name=\"thmin_ch3\" value=\"0.0\" />\n  <parameter name=\"thmin_ch4\" value=\"0.0\" />\n  <parameter name=\"thmin_ch5\" value=\"0.0\" />\n  <parameter name=\"thmin_ch6\" value=\"0.0\" />\n  <parameter name=\"thmin_ch7\" value=\"0.0\" />\n  <parameter name=\"thmin_ch8\" value=\"0.0\" />\n  <parameter name=\"thmin_ch9\" value=\"0.0\" />\n  <parameter name=\"tsclksel\" value=\"1\" />\n  <parameter name=\"tsd_max\" value=\"125\" />\n  <parameter name=\"tsd_min\" value=\"0\" />\n  <parameter name=\"use_ch0\" value=\"true\" />\n  <parameter name=\"use_ch1\" value=\"false\" />\n  <parameter name=\"use_ch10\" value=\"false\" />\n  <parameter name=\"use_ch11\" value=\"false\" />\n  <parameter name=\"use_ch12\" value=\"false\" />\n  <parameter name=\"use_ch13\" value=\"false\" />\n  <parameter name=\"use_ch14\" value=\"false\" />\n  <parameter name=\"use_ch15\" value=\"false\" />\n  <parameter name=\"use_ch16\" value=\"false\" />\n  <parameter name=\"use_ch2\" value=\"false\" />\n  <parameter name=\"use_ch3\" value=\"false\" />\n  <parameter name=\"use_ch4\" value=\"false\" />\n  <parameter name=\"use_ch5\" value=\"false\" />\n  <parameter name=\"use_ch6\" value=\"false\" />\n  <parameter name=\"use_ch7\" value=\"false\" />\n  <parameter name=\"use_ch8\" value=\"false\" />\n  <parameter name=\"use_ch9\" value=\"false\" />\n  <parameter name=\"use_tsd\" value=\"true\" />\n </module>\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.enableEccProtection\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.insertDefaultSlave\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.maxAdditionalLatency\" value=\"1\" />\n</system>\n"
  },
  {
    "path": "max10_adc_firmware/myadc.sopcinfo",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<EnsembleReport name=\"myadc\" kind=\"myadc\" version=\"1.0\" fabric=\"QSYS\">\n <!-- Format version 18.0 614 (Future versions may contain additional information.) -->\n <!-- 2021.05.28.12:56:54 -->\n <!-- A collection of modules and connections -->\n <parameter name=\"AUTO_GENERATION_ID\">\n  <type>java.lang.Integer</type>\n  <value>1622221014</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>GENERATION_ID</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_UNIQUE_ID\">\n  <type>java.lang.String</type>\n  <value></value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>UNIQUE_ID</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE_FAMILY\">\n  <type>java.lang.String</type>\n  <value>MAX10FPGA</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE\">\n  <type>java.lang.String</type>\n  <value>10M08SAE144C8GES</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE_SPEEDGRADE\">\n  <type>java.lang.String</type>\n  <value>8</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_ADC_PLL_CLOCK_CLOCK_RATE\">\n  <type>java.lang.Long</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>CLOCK_RATE</sysinfo_type>\n  <sysinfo_arg>adc_pll_clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_ADC_PLL_CLOCK_CLOCK_DOMAIN\">\n  <type>java.lang.Integer</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>\n  <sysinfo_arg>adc_pll_clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_ADC_PLL_CLOCK_RESET_DOMAIN\">\n  <type>java.lang.Integer</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>RESET_DOMAIN</sysinfo_type>\n  <sysinfo_arg>adc_pll_clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_CLOCK_CLOCK_RATE\">\n  <type>java.lang.Long</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>CLOCK_RATE</sysinfo_type>\n  <sysinfo_arg>clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_CLOCK_CLOCK_DOMAIN\">\n  <type>java.lang.Integer</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>\n  <sysinfo_arg>clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_CLOCK_RESET_DOMAIN\">\n  <type>java.lang.Integer</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>RESET_DOMAIN</sysinfo_type>\n  <sysinfo_arg>clock</sysinfo_arg>\n </parameter>\n <parameter name=\"deviceFamily\">\n  <type>java.lang.String</type>\n  <value>MAX 10</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n </parameter>\n <parameter name=\"generateLegacySim\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <module\n   name=\"modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"18.0\"\n   path=\"modular_adc_0\">\n  <!-- Describes a single module. Module parameters are\nthe requested settings for a module instance. -->\n  <assignment>\n   <name>embeddedsw.CMacro.CORE_VARIANT</name>\n   <value>3</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.DUAL_ADC_MODE</name>\n   <value>false</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.PRESCALER_CH16</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.PRESCALER_CH8</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.REFSEL</name>\n   <value>Internal VREF</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH0</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH1</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH10</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH11</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH12</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH13</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH14</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH15</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH16</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH2</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH3</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH4</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH5</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH6</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH7</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH8</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH9</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_TSD</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.VREF</name>\n   <value>3.3</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.compatible</name>\n   <value>altr,modular-adc-1.0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.group</name>\n   <value>adc</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.name</name>\n   <value>modular-adc</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.params.altr,adc-mode</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.params.altr,adc-number</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.params.altr,adc-slot-count</name>\n   <value>2</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.dts.vendor</name>\n   <value>altr</value>\n  </assignment>\n  <parameter name=\"CORE_VAR\">\n   <type>int</type>\n   <value>3</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"ENABLE_DEBUG\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"MONITOR_COUNT_WIDTH\">\n   <type>int</type>\n   <value>12</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQ\">\n   <type>long</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>CLOCK_RATE</sysinfo_type>\n   <sysinfo_arg>clock</sysinfo_arg>\n  </parameter>\n  <parameter name=\"FAMILY\">\n   <type>java.lang.String</type>\n   <value>MAX10FPGA</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n  </parameter>\n  <parameter name=\"DEVICE_PART\">\n   <type>java.lang.String</type>\n   <value>10M08SAE144C8GES</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE</sysinfo_type>\n  </parameter>\n  <parameter name=\"device_partname_fivechar_prefix\">\n   <type>java.lang.String</type>\n   <value>10M08</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"device_adc_type\">\n   <type>int</type>\n   <value>22</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"max_adc_count_on_die\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"adc_count_on_device\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"device_power_supply_type\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"ip_is_for_which_adc\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"is_this_first_or_second_adc\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"analog_input_pin_mask\">\n   <type>java.math.BigInteger</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"hard_pwd\">\n   <type>int</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"sample_rate\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"clkdiv\">\n   <type>int</type>\n   <value>2</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"derived_clkdiv\">\n   <type>int</type>\n   <value>2</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsclkdiv\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsclksel\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"refsel\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"external_vref\">\n   <type>double</type>\n   <value>2.5</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"int_vref_vr\">\n   <type>double</type>\n   <value>3.3</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"int_vref_nonvr\">\n   <type>double</type>\n   <value>2.5</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"reference_voltage\">\n   <type>double</type>\n   <value>3.3</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"reference_voltage_sim\">\n   <type>int</type>\n   <value>65536</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescalar\">\n   <type>int</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"enable_usr_sim\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_tsd\">\n   <type>boolean</type>\n   <value>true</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_tsd_max\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsd_max\">\n   <type>int</type>\n   <value>125</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_tsd_min\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsd_min\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch0\">\n   <type>boolean</type>\n   <value>true</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch0\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch0\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch0\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch0\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch0\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch1\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch1\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch1\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch2\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch2\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch2\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch3\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch3\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch3\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch4\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch4\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch4\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch5\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch5\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch5\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch6\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch6\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch6\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch7\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch7\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch7\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescaler_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch8\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch8\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch8\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch9\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch9\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch9\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch10\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch10\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch10\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch11\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch11\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch11\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch12\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch12\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch12\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch13\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch13\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch13\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch14\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch14\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch14\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch15\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch15\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch15\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescaler_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch16\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch16\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"simfilename_ch16\">\n   <type>java.lang.String</type>\n   <value></value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_length\">\n   <type>int</type>\n   <value>2</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_1\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_2\">\n   <type>int</type>\n   <value>17</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_3\">\n   <type>int</type>\n   <value>17</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_4\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_5\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_6\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_7\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_8\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_9\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_10\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_11\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_12\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_13\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_14\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_15\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_16\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_17\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_18\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_19\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_20\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_21\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_22\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_23\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_24\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_25\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_26\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_27\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_28\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_29\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_30\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_31\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_32\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_33\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_34\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_35\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_36\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_37\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_38\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_39\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_40\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_41\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_42\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_43\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_44\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_45\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_46\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_47\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_48\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_49\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_50\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_51\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_52\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_53\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_54\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_55\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_56\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_57\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_58\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_59\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_60\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_61\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_62\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_63\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_64\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\">\n   <type>java.lang.String</type>\n   <value>8</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>\n  </parameter>\n  <parameter name=\"deviceFamily\">\n   <type>java.lang.String</type>\n   <value>UNKNOWN</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"generateLegacySim\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <interface name=\"clock\" kind=\"clock_sink\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRateKnown\">\n    <type>java.lang.Boolean</type>\n    <value>false</value>\n    <derived>true</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRate\">\n    <type>java.lang.Long</type>\n    <value>0</value>\n    <derived>true</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>false</isStart>\n   <port>\n    <name>clock_clk</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n  <interface name=\"reset_sink\" kind=\"reset_sink\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"synchronousEdges\">\n    <type>com.altera.sopcmodel.reset.Reset$Edges</type>\n    <value>DEASSERT</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>reset</type>\n   <isStart>false</isStart>\n   <port>\n    <name>reset_sink_reset_n</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>reset_n</role>\n   </port>\n  </interface>\n  <interface name=\"adc_pll_clock\" kind=\"clock_sink\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>false</isStart>\n   <port>\n    <name>adc_pll_clock_clk</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n  <interface name=\"adc_pll_locked\" kind=\"conduit_end\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>conduit</type>\n   <isStart>false</isStart>\n   <port>\n    <name>adc_pll_locked_export</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>export</role>\n   </port>\n  </interface>\n  <interface name=\"command\" kind=\"avalon_streaming_sink\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value>reset_sink</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"beatsPerCycle\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"dataBitsPerSymbol\">\n    <type>int</type>\n    <value>8</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"emptyWithinPacket\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"errorDescriptor\">\n    <type>[Ljava.lang.String;</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"firstSymbolInHighOrderBits\">\n    <type>boolean</type>\n    <value>true</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"highOrderSymbolAtMSB\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"maxChannel\">\n    <type>int</type>\n    <value>31</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"packetDescription\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"readyLatency\">\n    <type>int</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"symbolsPerBeat\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>avalon_streaming</type>\n   <isStart>false</isStart>\n   <port>\n    <name>command_valid</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>valid</role>\n   </port>\n   <port>\n    <name>command_channel</name>\n    <direction>Input</direction>\n    <width>5</width>\n    <role>channel</role>\n   </port>\n   <port>\n    <name>command_startofpacket</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>startofpacket</role>\n   </port>\n   <port>\n    <name>command_endofpacket</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>endofpacket</role>\n   </port>\n   <port>\n    <name>command_ready</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>ready</role>\n   </port>\n  </interface>\n  <interface name=\"response\" kind=\"avalon_streaming_source\" version=\"18.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value>reset_sink</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"beatsPerCycle\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"dataBitsPerSymbol\">\n    <type>int</type>\n    <value>12</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"emptyWithinPacket\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"errorDescriptor\">\n    <type>[Ljava.lang.String;</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"firstSymbolInHighOrderBits\">\n    <type>boolean</type>\n    <value>true</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"highOrderSymbolAtMSB\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"maxChannel\">\n    <type>int</type>\n    <value>31</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"packetDescription\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"readyLatency\">\n    <type>int</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"symbolsPerBeat\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>avalon_streaming</type>\n   <isStart>true</isStart>\n   <port>\n    <name>response_valid</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>valid</role>\n   </port>\n   <port>\n    <name>response_channel</name>\n    <direction>Output</direction>\n    <width>5</width>\n    <role>channel</role>\n   </port>\n   <port>\n    <name>response_data</name>\n    <direction>Output</direction>\n    <width>12</width>\n    <role>data</role>\n   </port>\n   <port>\n    <name>response_startofpacket</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>startofpacket</role>\n   </port>\n   <port>\n    <name>response_endofpacket</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>endofpacket</role>\n   </port>\n  </interface>\n </module>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>altera_modular_adc</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IModule</subtype>\n  <displayName>Modular ADC core Intel FPGA IP</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>2</instanceCount>\n  <name>clock_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Clock Input</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>reset_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Reset Input</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>conduit_end</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Conduit</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>avalon_streaming_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Avalon Streaming Sink</displayName>\n  <version>18.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>avalon_streaming_source</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Avalon Streaming Source</displayName>\n  <version>18.0</version>\n </plugin>\n <reportVersion>18.0 614</reportVersion>\n <uniqueIdentifier></uniqueIdentifier>\n</EnsembleReport>\n"
  },
  {
    "path": "max10_adc_firmware/mypll2.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 2018  Intel Corporation. All rights reserved.\r\nYour use of Intel Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Intel Program License \r\nSubscription Agreement, the Intel Quartus Prime License Agreement,\r\nthe Intel FPGA IP License Agreement, or other applicable license\r\nagreement, including, without limitation, that your use is for\r\nthe sole purpose of programming logic devices manufactured by\r\nIntel and sold by Intel or its authorized distributors.  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))\r\n\t\t(text \"inclk0 frequency: 50.000 MHz\" (rect 130 59 383 129)(font \"Arial\" ))\r\n\t\t(text \"Operation Mode: Normal\" (rect 130 72 359 155)(font \"Arial\" ))\r\n\t\t(text \"Clk \" (rect 131 93 276 197)(font \"Arial\" ))\r\n\t\t(text \"Ratio\" (rect 152 93 324 197)(font \"Arial\" ))\r\n\t\t(text \"Ph (dg)\" (rect 178 93 385 197)(font \"Arial\" ))\r\n\t\t(text \"DC (%)\" (rect 212 93 454 197)(font \"Arial\" ))\r\n\t\t(text \"c0\" (rect 134 107 276 225)(font \"Arial\" ))\r\n\t\t(text \"1/5\" (rect 157 107 325 225)(font \"Arial\" ))\r\n\t\t(text \"0.00\" (rect 184 107 384 225)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 216 107 453 225)(font \"Arial\" ))\r\n\t\t(text \"c1\" (rect 134 121 275 253)(font \"Arial\" ))\r\n\t\t(text \"5/2\" (rect 157 121 325 253)(font \"Arial\" ))\r\n\t\t(text \"0.00\" (rect 184 121 384 253)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 216 121 453 253)(font \"Arial\" ))\r\n\t\t(text \"c2\" (rect 134 135 276 281)(font \"Arial\" ))\r\n\t\t(text \"1/1\" (rect 157 135 324 281)(font \"Arial\" ))\r\n\t\t(text \"0.00\" (rect 184 135 384 281)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 216 135 453 281)(font \"Arial\" ))\r\n\t\t(text \"c3\" (rect 134 149 276 309)(font \"Arial\" ))\r\n\t\t(text \"1/1\" (rect 157 149 324 309)(font \"Arial\" ))\r\n\t\t(text \"0.00\" (rect 184 149 384 309)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 216 149 453 309)(font \"Arial\" ))\r\n\t\t(text \"c4\" (rect 134 163 277 337)(font \"Arial\" ))\r\n\t\t(text \"5/2\" (rect 157 163 325 337)(font \"Arial\" ))\r\n\t\t(text \"180.00\" (rect 179 163 384 337)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 216 163 453 337)(font \"Arial\" ))\r\n\t\t(line (pt 0 0)(pt 353 0))\r\n\t\t(line (pt 353 0)(pt 353 209))\r\n\t\t(line (pt 0 209)(pt 353 209))\r\n\t\t(line (pt 0 0)(pt 0 209))\r\n\t\t(line (pt 128 91)(pt 244 91))\r\n\t\t(line (pt 128 104)(pt 244 104))\r\n\t\t(line (pt 128 118)(pt 244 118))\r\n\t\t(line (pt 128 132)(pt 244 132))\r\n\t\t(line (pt 128 146)(pt 244 146))\r\n\t\t(line (pt 128 160)(pt 244 160))\r\n\t\t(line (pt 128 174)(pt 244 174))\r\n\t\t(line (pt 128 91)(pt 128 174))\r\n\t\t(line (pt 149 91)(pt 149 174)(line_width 3))\r\n\t\t(line (pt 175 91)(pt 175 174)(line_width 3))\r\n\t\t(line (pt 209 91)(pt 209 174)(line_width 3))\r\n\t\t(line (pt 243 91)(pt 243 174))\r\n\t\t(line (pt 120 48)(pt 287 48))\r\n\t\t(line (pt 287 48)(pt 287 191))\r\n\t\t(line (pt 120 191)(pt 287 191))\r\n\t\t(line (pt 120 48)(pt 120 191))\r\n\t\t(line (pt 351 64)(pt 287 64))\r\n\t\t(line (pt 351 80)(pt 287 80))\r\n\t\t(line (pt 351 96)(pt 287 96))\r\n\t\t(line (pt 351 112)(pt 287 112))\r\n\t\t(line (pt 351 128)(pt 287 128))\r\n\t\t(line (pt 351 144)(pt 287 144))\r\n\t\t(line (pt 351 160)(pt 287 160))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/mypll2.ppf",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\" ?>\r\n<!DOCTYPE pinplan>\r\n<pinplan intended_family=\"MAX 10\" variation_name=\"mypll2\" megafunction_name=\"ALTPLL\" specifies=\"all_ports\">\r\n<global>\r\n<pin name=\"inclk0\" direction=\"input\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"phasecounterselect[2..0]\" direction=\"input\" scope=\"external\"  />\r\n<pin name=\"phasestep\" direction=\"input\" scope=\"external\"  />\r\n<pin name=\"phaseupdown\" direction=\"input\" scope=\"external\"  />\r\n<pin name=\"scanclk\" direction=\"input\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c0\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c1\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c2\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c3\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c4\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"locked\" direction=\"output\" scope=\"external\"  />\r\n<pin name=\"phasedone\" direction=\"output\" scope=\"external\"  />\r\n\r\n</global>\r\n</pinplan>\r\n"
  },
  {
    "path": "max10_adc_firmware/mypll2.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"ALTPLL\"\r\nset_global_assignment -name IP_TOOL_VERSION \"18.0\"\r\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\r\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"mypll2.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"mypll2.bsf\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"mypll2_inst.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"mypll2_bb.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"mypll2.ppf\"]\r\n"
  },
  {
    "path": "max10_adc_firmware/mypll2.v",
    "content": "// megafunction wizard: %ALTPLL%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altpll \r\n\r\n// ============================================================\r\n// File Name: mypll2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltpll\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\r\n//Your use of Intel Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Intel Program License \r\n//Subscription Agreement, the Intel Quartus Prime License Agreement,\r\n//the Intel FPGA IP License Agreement, or other applicable license\r\n//agreement, including, without limitation, that your use is for\r\n//the sole purpose of programming logic devices manufactured by\r\n//Intel and sold by Intel or its authorized distributors.  Please\r\n//refer to the applicable agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule mypll2 (\r\n\tinclk0,\r\n\tphasecounterselect,\r\n\tphasestep,\r\n\tphaseupdown,\r\n\tscanclk,\r\n\tc0,\r\n\tc1,\r\n\tc2,\r\n\tc3,\r\n\tc4,\r\n\tlocked,\r\n\tphasedone);\r\n\r\n\tinput\t  inclk0;\r\n\tinput\t[2:0]  phasecounterselect;\r\n\tinput\t  phasestep;\r\n\tinput\t  phaseupdown;\r\n\tinput\t  scanclk;\r\n\toutput\t  c0;\r\n\toutput\t  c1;\r\n\toutput\t  c2;\r\n\toutput\t  c3;\r\n\toutput\t  c4;\r\n\toutput\t  locked;\r\n\toutput\t  phasedone;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri0\t[2:0]  phasecounterselect;\r\n\ttri0\t  phasestep;\r\n\ttri0\t  phaseupdown;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [0:0] sub_wire2 = 1'h0;\r\n\twire [4:0] sub_wire3;\r\n\twire  sub_wire9;\r\n\twire  sub_wire10;\r\n\twire  sub_wire0 = inclk0;\r\n\twire [1:0] sub_wire1 = {sub_wire2, sub_wire0};\r\n\twire [4:4] sub_wire8 = sub_wire3[4:4];\r\n\twire [3:3] sub_wire7 = sub_wire3[3:3];\r\n\twire [2:2] sub_wire6 = sub_wire3[2:2];\r\n\twire [1:1] sub_wire5 = sub_wire3[1:1];\r\n\twire [0:0] sub_wire4 = sub_wire3[0:0];\r\n\twire  c0 = sub_wire4;\r\n\twire  c1 = sub_wire5;\r\n\twire  c2 = sub_wire6;\r\n\twire  c3 = sub_wire7;\r\n\twire  c4 = sub_wire8;\r\n\twire  locked = sub_wire9;\r\n\twire  phasedone = sub_wire10;\r\n\r\n\taltpll\taltpll_component (\r\n\t\t\t\t.inclk (sub_wire1),\r\n\t\t\t\t.phasecounterselect (phasecounterselect),\r\n\t\t\t\t.phasestep (phasestep),\r\n\t\t\t\t.phaseupdown (phaseupdown),\r\n\t\t\t\t.scanclk (scanclk),\r\n\t\t\t\t.clk (sub_wire3),\r\n\t\t\t\t.locked (sub_wire9),\r\n\t\t\t\t.phasedone (sub_wire10),\r\n\t\t\t\t.activeclock (),\r\n\t\t\t\t.areset (1'b0),\r\n\t\t\t\t.clkbad (),\r\n\t\t\t\t.clkena ({6{1'b1}}),\r\n\t\t\t\t.clkloss (),\r\n\t\t\t\t.clkswitch (1'b0),\r\n\t\t\t\t.configupdate (1'b0),\r\n\t\t\t\t.enable0 (),\r\n\t\t\t\t.enable1 (),\r\n\t\t\t\t.extclk (),\r\n\t\t\t\t.extclkena ({4{1'b1}}),\r\n\t\t\t\t.fbin (1'b1),\r\n\t\t\t\t.fbmimicbidir (),\r\n\t\t\t\t.fbout (),\r\n\t\t\t\t.fref (),\r\n\t\t\t\t.icdrclk (),\r\n\t\t\t\t.pfdena (1'b1),\r\n\t\t\t\t.pllena (1'b1),\r\n\t\t\t\t.scanaclr (1'b0),\r\n\t\t\t\t.scanclkena (1'b1),\r\n\t\t\t\t.scandata (1'b0),\r\n\t\t\t\t.scandataout (),\r\n\t\t\t\t.scandone (),\r\n\t\t\t\t.scanread (1'b0),\r\n\t\t\t\t.scanwrite (1'b0),\r\n\t\t\t\t.sclkout0 (),\r\n\t\t\t\t.sclkout1 (),\r\n\t\t\t\t.vcooverrange (),\r\n\t\t\t\t.vcounderrange ());\r\n\tdefparam\r\n\t\taltpll_component.bandwidth_type = \"LOW\",\r\n\t\taltpll_component.clk0_divide_by = 5,\r\n\t\taltpll_component.clk0_duty_cycle = 50,\r\n\t\taltpll_component.clk0_multiply_by = 1,\r\n\t\taltpll_component.clk0_phase_shift = \"0\",\r\n\t\taltpll_component.clk1_divide_by = 2,\r\n\t\taltpll_component.clk1_duty_cycle = 50,\r\n\t\taltpll_component.clk1_multiply_by = 5,\r\n\t\taltpll_component.clk1_phase_shift = \"0\",\r\n\t\taltpll_component.clk2_divide_by = 1,\r\n\t\taltpll_component.clk2_duty_cycle = 50,\r\n\t\taltpll_component.clk2_multiply_by = 1,\r\n\t\taltpll_component.clk2_phase_shift = \"0\",\r\n\t\taltpll_component.clk3_divide_by = 1,\r\n\t\taltpll_component.clk3_duty_cycle = 50,\r\n\t\taltpll_component.clk3_multiply_by = 1,\r\n\t\taltpll_component.clk3_phase_shift = \"0\",\r\n\t\taltpll_component.clk4_divide_by = 2,\r\n\t\taltpll_component.clk4_duty_cycle = 50,\r\n\t\taltpll_component.clk4_multiply_by = 5,\r\n\t\taltpll_component.clk4_phase_shift = \"4000\",\r\n\t\taltpll_component.compensate_clock = \"CLK0\",\r\n\t\taltpll_component.inclk0_input_frequency = 20000,\r\n\t\taltpll_component.intended_device_family = \"MAX 10\",\r\n\t\taltpll_component.lpm_hint = \"CBX_MODULE_PREFIX=mypll2\",\r\n\t\taltpll_component.lpm_type = \"altpll\",\r\n\t\taltpll_component.operation_mode = \"NORMAL\",\r\n\t\taltpll_component.pll_type = \"AUTO\",\r\n\t\taltpll_component.port_activeclock = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_areset = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkbad0 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkbad1 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkloss = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkswitch = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_configupdate = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_fbin = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_inclk0 = \"PORT_USED\",\r\n\t\taltpll_component.port_inclk1 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_locked = \"PORT_USED\",\r\n\t\taltpll_component.port_pfdena = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_phasecounterselect = \"PORT_USED\",\r\n\t\taltpll_component.port_phasedone = \"PORT_USED\",\r\n\t\taltpll_component.port_phasestep = \"PORT_USED\",\r\n\t\taltpll_component.port_phaseupdown = \"PORT_USED\",\r\n\t\taltpll_component.port_pllena = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanaclr = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanclk = \"PORT_USED\",\r\n\t\taltpll_component.port_scanclkena = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scandata = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scandataout = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scandone = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanread = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanwrite = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clk0 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk1 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk2 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk3 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk4 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk5 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena0 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena1 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena2 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena3 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena4 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena5 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_extclk0 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_extclk1 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_extclk2 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_extclk3 = \"PORT_UNUSED\",\r\n\t\taltpll_component.self_reset_on_loss_lock = \"ON\",\r\n\t\taltpll_component.vco_frequency_control = \"MANUAL_PHASE\",\r\n\t\taltpll_component.vco_phase_shift_step = 100,\r\n\t\taltpll_component.width_clock = 5,\r\n\t\taltpll_component.width_phasecounterselect = 3;\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: BANDWIDTH STRING \"1.000\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING \"MHz\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING \"Low\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING \"0\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING \"1\"\r\n// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING \"c0\"\r\n// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING \"c0\"\r\n// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING \"8\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR4 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE3 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE4 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING \"10.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING \"125.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING \"50.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING \"50.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE4 STRING \"125.000000\"\r\n// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING \"0\"\r\n// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC \"1048575\"\r\n// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING \"50.000\"\r\n// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING \"MHz\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING \"100.000\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING \"MHz\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING \"1\"\r\n// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING \"Not Available\"\r\n// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING \"deg\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING \"deg\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING \"ps\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT3 STRING \"ps\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT4 STRING \"ps\"\r\n// Retrieval info: PRIVATE: MANUAL_PHASE_SHIFT_STEP_EDIT STRING \"100.00000000\"\r\n// Retrieval info: PRIVATE: MANUAL_PHASE_SHIFT_STEP_UNIT STRING \"ps\"\r\n// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING \"Any\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK0 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK1 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK2 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK3 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK4 STRING \"0\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR4 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING \"10.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING \"125.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ4 STRING \"125.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE4 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT3 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT4 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING \"1\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT3 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT4 STRING \"180.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING \"1\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT4 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING \"inclk0\"\r\n// Retrieval info: PRIVATE: RECONFIG_FILE STRING \"mypll2.mif\"\r\n// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING \"1\"\r\n// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING \"0\"\r\n// Retrieval info: PRIVATE: SPREAD_FREQ STRING \"50.000\"\r\n// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING \"KHz\"\r\n// Retrieval info: PRIVATE: SPREAD_PERCENT STRING \"0.500\"\r\n// Retrieval info: PRIVATE: SPREAD_USE STRING \"0\"\r\n// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: STICKY_CLK0 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK1 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK2 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK3 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK4 STRING \"1\"\r\n// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLK0 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK1 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK2 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK3 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK4 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLKENA0 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA1 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA2 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA3 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA4 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING \"LOW\"\r\n// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC \"2\"\r\n// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK4_DIVIDE_BY NUMERIC \"2\"\r\n// Retrieval info: CONSTANT: CLK4_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK4_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK4_PHASE_SHIFT STRING \"4000\"\r\n// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING \"CLK0\"\r\n// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC \"20000\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altpll\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"NORMAL\"\r\n// Retrieval info: CONSTANT: PLL_TYPE STRING \"AUTO\"\r\n// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_ARESET STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKLOSS STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_FBIN STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_INCLK0 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_INCLK1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_LOCKED STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PFDENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PHASEDONE STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PHASESTEP STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PLLENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANACLR STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANCLK STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDATA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDONE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANREAD STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANWRITE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clk0 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk1 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk2 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk3 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk4 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk5 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena2 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena3 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena4 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena5 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk2 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk3 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING \"ON\"\r\n// Retrieval info: CONSTANT: VCO_FREQUENCY_CONTROL STRING \"MANUAL_PHASE\"\r\n// Retrieval info: CONSTANT: VCO_PHASE_SHIFT_STEP NUMERIC \"100\"\r\n// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: WIDTH_PHASECOUNTERSELECT NUMERIC \"3\"\r\n// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC \"@clk[4..0]\"\r\n// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC \"c0\"\r\n// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC \"c1\"\r\n// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC \"c2\"\r\n// Retrieval info: USED_PORT: c3 0 0 0 0 OUTPUT_CLK_EXT VCC \"c3\"\r\n// Retrieval info: USED_PORT: c4 0 0 0 0 OUTPUT_CLK_EXT VCC \"c4\"\r\n// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND \"inclk0\"\r\n// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND \"locked\"\r\n// Retrieval info: USED_PORT: phasecounterselect 0 0 3 0 INPUT GND \"phasecounterselect[2..0]\"\r\n// Retrieval info: USED_PORT: phasedone 0 0 0 0 OUTPUT GND \"phasedone\"\r\n// Retrieval info: USED_PORT: phasestep 0 0 0 0 INPUT GND \"phasestep\"\r\n// Retrieval info: USED_PORT: phaseupdown 0 0 0 0 INPUT GND \"phaseupdown\"\r\n// Retrieval info: USED_PORT: scanclk 0 0 0 0 INPUT_CLK_EXT VCC \"scanclk\"\r\n// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0\r\n// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0\r\n// Retrieval info: CONNECT: @phasecounterselect 0 0 3 0 phasecounterselect 0 0 3 0\r\n// Retrieval info: CONNECT: @phasestep 0 0 0 0 phasestep 0 0 0 0\r\n// Retrieval info: CONNECT: @phaseupdown 0 0 0 0 phaseupdown 0 0 0 0\r\n// Retrieval info: CONNECT: @scanclk 0 0 0 0 scanclk 0 0 0 0\r\n// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0\r\n// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1\r\n// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2\r\n// Retrieval info: CONNECT: c3 0 0 0 0 @clk 0 0 1 3\r\n// Retrieval info: CONNECT: c4 0 0 0 0 @clk 0 0 1 4\r\n// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0\r\n// Retrieval info: CONNECT: phasedone 0 0 0 0 @phasedone 0 0 0 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.ppf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2_inst.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n// Retrieval info: CBX_MODULE_PREFIX: ON\r\n"
  },
  {
    "path": "max10_adc_firmware/mypll2_bb.v",
    "content": "// megafunction wizard: %ALTPLL%VBB%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altpll \r\n\r\n// ============================================================\r\n// File Name: mypll2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltpll\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\r\n// ************************************************************\r\n\r\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\r\n//Your use of Intel Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Intel Program License \r\n//Subscription Agreement, the Intel Quartus Prime License Agreement,\r\n//the Intel FPGA IP License Agreement, or other applicable license\r\n//agreement, including, without limitation, that your use is for\r\n//the sole purpose of programming logic devices manufactured by\r\n//Intel and sold by Intel or its authorized distributors.  Please\r\n//refer to the applicable agreement for further details.\r\n\r\nmodule mypll2 (\r\n\tinclk0,\r\n\tphasecounterselect,\r\n\tphasestep,\r\n\tphaseupdown,\r\n\tscanclk,\r\n\tc0,\r\n\tc1,\r\n\tc2,\r\n\tc3,\r\n\tc4,\r\n\tlocked,\r\n\tphasedone);\r\n\r\n\tinput\t  inclk0;\r\n\tinput\t[2:0]  phasecounterselect;\r\n\tinput\t  phasestep;\r\n\tinput\t  phaseupdown;\r\n\tinput\t  scanclk;\r\n\toutput\t  c0;\r\n\toutput\t  c1;\r\n\toutput\t  c2;\r\n\toutput\t  c3;\r\n\toutput\t  c4;\r\n\toutput\t  locked;\r\n\toutput\t  phasedone;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri0\t[2:0]  phasecounterselect;\r\n\ttri0\t  phasestep;\r\n\ttri0\t  phaseupdown;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: BANDWIDTH STRING \"1.000\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING \"MHz\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING \"Low\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING \"0\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING \"1\"\r\n// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING \"c0\"\r\n// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING \"c0\"\r\n// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING \"8\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR4 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE3 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE4 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING \"10.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING \"125.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING \"50.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING \"50.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE4 STRING \"125.000000\"\r\n// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING \"0\"\r\n// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC \"1048575\"\r\n// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING \"50.000\"\r\n// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING \"MHz\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING \"100.000\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING \"MHz\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING \"1\"\r\n// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING \"Not Available\"\r\n// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING \"deg\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING \"deg\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING \"ps\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT3 STRING \"ps\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT4 STRING \"ps\"\r\n// Retrieval info: PRIVATE: MANUAL_PHASE_SHIFT_STEP_EDIT STRING \"100.00000000\"\r\n// Retrieval info: PRIVATE: MANUAL_PHASE_SHIFT_STEP_UNIT STRING \"ps\"\r\n// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING \"Any\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK0 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK1 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK2 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK3 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK4 STRING \"0\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR4 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING \"10.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING \"125.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ4 STRING \"125.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE4 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT3 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT4 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING \"1\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT3 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT4 STRING \"180.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING \"1\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT4 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING \"inclk0\"\r\n// Retrieval info: PRIVATE: RECONFIG_FILE STRING \"mypll2.mif\"\r\n// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING \"1\"\r\n// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING \"0\"\r\n// Retrieval info: PRIVATE: SPREAD_FREQ STRING \"50.000\"\r\n// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING \"KHz\"\r\n// Retrieval info: PRIVATE: SPREAD_PERCENT STRING \"0.500\"\r\n// Retrieval info: PRIVATE: SPREAD_USE STRING \"0\"\r\n// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: STICKY_CLK0 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK1 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK2 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK3 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK4 STRING \"1\"\r\n// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLK0 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK1 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK2 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK3 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK4 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLKENA0 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA1 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA2 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA3 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA4 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING \"LOW\"\r\n// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC \"2\"\r\n// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK4_DIVIDE_BY NUMERIC \"2\"\r\n// Retrieval info: CONSTANT: CLK4_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK4_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK4_PHASE_SHIFT STRING \"4000\"\r\n// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING \"CLK0\"\r\n// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC \"20000\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altpll\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"NORMAL\"\r\n// Retrieval info: CONSTANT: PLL_TYPE STRING \"AUTO\"\r\n// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_ARESET STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKLOSS STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_FBIN STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_INCLK0 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_INCLK1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_LOCKED STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PFDENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PHASEDONE STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PHASESTEP STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PLLENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANACLR STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANCLK STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDATA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDONE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANREAD STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANWRITE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clk0 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk1 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk2 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk3 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk4 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk5 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena2 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena3 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena4 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena5 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk2 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk3 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING \"ON\"\r\n// Retrieval info: CONSTANT: VCO_FREQUENCY_CONTROL STRING \"MANUAL_PHASE\"\r\n// Retrieval info: CONSTANT: VCO_PHASE_SHIFT_STEP NUMERIC \"100\"\r\n// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: WIDTH_PHASECOUNTERSELECT NUMERIC \"3\"\r\n// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC \"@clk[4..0]\"\r\n// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC \"c0\"\r\n// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC \"c1\"\r\n// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC \"c2\"\r\n// Retrieval info: USED_PORT: c3 0 0 0 0 OUTPUT_CLK_EXT VCC \"c3\"\r\n// Retrieval info: USED_PORT: c4 0 0 0 0 OUTPUT_CLK_EXT VCC \"c4\"\r\n// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND \"inclk0\"\r\n// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND \"locked\"\r\n// Retrieval info: USED_PORT: phasecounterselect 0 0 3 0 INPUT GND \"phasecounterselect[2..0]\"\r\n// Retrieval info: USED_PORT: phasedone 0 0 0 0 OUTPUT GND \"phasedone\"\r\n// Retrieval info: USED_PORT: phasestep 0 0 0 0 INPUT GND \"phasestep\"\r\n// Retrieval info: USED_PORT: phaseupdown 0 0 0 0 INPUT GND \"phaseupdown\"\r\n// Retrieval info: USED_PORT: scanclk 0 0 0 0 INPUT_CLK_EXT VCC \"scanclk\"\r\n// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0\r\n// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0\r\n// Retrieval info: CONNECT: @phasecounterselect 0 0 3 0 phasecounterselect 0 0 3 0\r\n// Retrieval info: CONNECT: @phasestep 0 0 0 0 phasestep 0 0 0 0\r\n// Retrieval info: CONNECT: @phaseupdown 0 0 0 0 phaseupdown 0 0 0 0\r\n// Retrieval info: CONNECT: @scanclk 0 0 0 0 scanclk 0 0 0 0\r\n// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0\r\n// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1\r\n// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2\r\n// Retrieval info: CONNECT: c3 0 0 0 0 @clk 0 0 1 3\r\n// Retrieval info: CONNECT: c4 0 0 0 0 @clk 0 0 1 4\r\n// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0\r\n// Retrieval info: CONNECT: phasedone 0 0 0 0 @phasedone 0 0 0 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.ppf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2_inst.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n// Retrieval info: CBX_MODULE_PREFIX: ON\r\n"
  },
  {
    "path": "max10_adc_firmware/mypll2_inst.v",
    "content": "mypll2\tmypll2_inst (\r\n\t.inclk0 ( inclk0_sig ),\r\n\t.phasecounterselect ( phasecounterselect_sig ),\r\n\t.phasestep ( phasestep_sig ),\r\n\t.phaseupdown ( phaseupdown_sig ),\r\n\t.scanclk ( scanclk_sig ),\r\n\t.c0 ( c0_sig ),\r\n\t.c1 ( c1_sig ),\r\n\t.c2 ( c2_sig ),\r\n\t.c3 ( c3_sig ),\r\n\t.c4 ( c4_sig ),\r\n\t.locked ( locked_sig ),\r\n\t.phasedone ( phasedone_sig )\r\n\t);\r\n"
  },
  {
    "path": "max10_adc_firmware/openocd_program.sh",
    "content": "openocd -f ./haasoscope.cfg -c \"svf /tmp/serial1.svf ; exit\"\n\n"
  },
  {
    "path": "max10_adc_firmware/osc_1.qsys",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<system name=\"$${FILENAME}\">\n <component\n   name=\"$${FILENAME}\"\n   displayName=\"$${FILENAME}\"\n   version=\"1.0\"\n   description=\"\"\n   tags=\"INTERNAL_COMPONENT=true\"\n   categories=\"\" />\n <parameter name=\"bonusData\"><![CDATA[bonusData \r\n{\r\n   element $${FILENAME}\r\n   {\r\n   }\r\n   element int_osc_0\r\n   {\r\n      datum _sortIndex\r\n      {\r\n         value = \"0\";\r\n         type = \"int\";\r\n      }\r\n   }\r\n}\r\n]]></parameter>\n <parameter name=\"clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <parameter name=\"device\" value=\"10M08SAE144C8GES\" />\n <parameter name=\"deviceFamily\" value=\"MAX 10\" />\n <parameter name=\"deviceSpeedGrade\" value=\"8\" />\n <parameter name=\"fabricMode\" value=\"QSYS\" />\n <parameter name=\"generateLegacySim\" value=\"false\" />\n <parameter name=\"generationId\" value=\"0\" />\n <parameter name=\"globalResetBus\" value=\"false\" />\n <parameter name=\"hdlLanguage\" value=\"VERILOG\" />\n <parameter name=\"hideFromIPCatalog\" value=\"true\" />\n <parameter name=\"lockedInterfaceDefinition\" value=\"\" />\n <parameter name=\"maxAdditionalLatency\" value=\"1\" />\n <parameter name=\"projectName\" value=\"\" />\n <parameter name=\"sopcBorderPoints\" value=\"false\" />\n <parameter name=\"systemHash\" value=\"0\" />\n <parameter name=\"testBenchDutName\" value=\"\" />\n <parameter name=\"timeStamp\" value=\"0\" />\n <parameter name=\"useTestBenchNamingPattern\" value=\"false\" />\n <instanceScript></instanceScript>\n <interface name=\"clkout\" internal=\"int_osc_0.clkout\" type=\"clock\" dir=\"start\">\n  <port name=\"clkout\" internal=\"clkout\" />\n </interface>\n <interface name=\"oscena\" internal=\"int_osc_0.oscena\" type=\"conduit\" dir=\"end\">\n  <port name=\"oscena\" internal=\"oscena\" />\n </interface>\n <module\n   name=\"int_osc_0\"\n   kind=\"altera_int_osc\"\n   version=\"15.0\"\n   enabled=\"1\"\n   autoexport=\"1\">\n  <parameter name=\"CBX_AUTO_BLACKBOX\" value=\"ALL\" />\n  <parameter name=\"CLOCK_FREQUENCY_1\" value=\"55\" />\n  <parameter name=\"CLOCK_FREQUENCY_2\" value=\"77\" />\n  <parameter name=\"DEVICE_FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"PART_NAME\" value=\"10M08SAE144C8GES\" />\n </module>\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.enableEccProtection\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.insertDefaultSlave\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.maxAdditionalLatency\" value=\"1\" />\n</system>\n"
  },
  {
    "path": "max10_adc_firmware/osc_1.sopcinfo",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<EnsembleReport name=\"osc_1\" kind=\"osc_1\" version=\"1.0\" fabric=\"QSYS\">\n <!-- Format version 15.0 145 (Future versions may contain additional information.) -->\n <!-- 2017.05.22.13:20:43 -->\n <!-- A collection of modules and connections -->\n <parameter name=\"AUTO_GENERATION_ID\">\n  <type>java.lang.Integer</type>\n  <value>1495473643</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>GENERATION_ID</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_UNIQUE_ID\">\n  <type>java.lang.String</type>\n  <value></value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>UNIQUE_ID</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE_FAMILY\">\n  <type>java.lang.String</type>\n  <value>MAX10FPGA</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE\">\n  <type>java.lang.String</type>\n  <value>10M08SAE144C8GES</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE_SPEEDGRADE\">\n  <type>java.lang.String</type>\n  <value>8</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>\n </parameter>\n <parameter name=\"deviceFamily\">\n  <type>java.lang.String</type>\n  <value>MAX 10</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n </parameter>\n <parameter name=\"generateLegacySim\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <module\n   name=\"int_osc_0\"\n   kind=\"altera_int_osc\"\n   version=\"15.0\"\n   path=\"int_osc_0\">\n  <!-- Describes a single module. Module parameters are\nthe requested settings for a module instance. -->\n  <parameter name=\"INFORMATION\">\n   <type>java.lang.String</type>\n   <value><![CDATA[The output frequency for 10M02, 10M04, 10M08, 10M16, and 10M25 devices is 55~116MHz <br>The output frequency for 10M40, and 10M50 devices is 35~77MHz <br>]]></value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"DEVICE_FAMILY\">\n   <type>java.lang.String</type>\n   <value>MAX10FPGA</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n  </parameter>\n  <parameter name=\"PART_NAME\">\n   <type>java.lang.String</type>\n   <value>10M08SAE144C8GES</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE</sysinfo_type>\n  </parameter>\n  <parameter name=\"DEVICE_ID\">\n   <type>java.lang.String</type>\n   <value>08</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQUENCY_1\">\n   <type>java.lang.String</type>\n   <value>55</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQUENCY_2\">\n   <type>java.lang.String</type>\n   <value>77</value>\n   <derived>false</derived>\n   <enabled>false</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQUENCY\">\n   <type>java.lang.String</type>\n   <value>55</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CBX_AUTO_BLACKBOX\">\n   <type>java.lang.String</type>\n   <value>ALL</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"deviceFamily\">\n   <type>java.lang.String</type>\n   <value>UNKNOWN</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"generateLegacySim\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <interface name=\"oscena\" kind=\"conduit_end\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <assignment>\n    <name>ui.blockdiagram.direction</name>\n    <value>INPUT</value>\n   </assignment>\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>conduit</type>\n   <isStart>false</isStart>\n   <port>\n    <name>oscena</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>oscena</role>\n   </port>\n  </interface>\n  <interface name=\"clkout\" kind=\"clock_source\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <assignment>\n    <name>ui.blockdiagram.direction</name>\n    <value>OUTPUT</value>\n   </assignment>\n   <parameter name=\"associatedDirectClock\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRate\">\n    <type>long</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRateKnown\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>true</isStart>\n   <port>\n    <name>clkout</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n </module>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>altera_int_osc</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IModule</subtype>\n  <displayName>Internal Oscillator</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>conduit_end</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Conduit</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>clock_source</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Clock Output</displayName>\n  <version>15.0</version>\n </plugin>\n <reportVersion>15.0 145</reportVersion>\n <uniqueIdentifier></uniqueIdentifier>\n</EnsembleReport>\n"
  },
  {
    "path": "max10_adc_firmware/oscillo.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 2018  Intel Corporation. All rights reserved.\r\nYour use of Intel Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Intel Program License \r\nSubscription Agreement, the Intel Quartus Prime License Agreement,\r\nthe Intel FPGA IP License Agreement, or other applicable license\r\nagreement, including, without limitation, that your use is for\r\nthe sole purpose of programming logic devices manufactured by\r\nIntel and sold by Intel or its authorized distributors.  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  {
    "path": "max10_adc_firmware/oscillo.v",
    "content": "module oscillo(clk, startTrigger, clk_flash, data_flash1, data_flash2, data_flash3, data_flash4, pwr1, pwr2, shdn_out, spen_out, trig_in, trig_out, rden, rdaddress, \ndata_ready, wraddress_triggerpoint, imthelast, imthefirst,rollingtrigger,trigDebug,triggerpoint,downsample,\ntrigthresh,trigchannels,triggertype,triggertot,format_sdin_out,div_sclk_out,outsel_cs_out,clk_spi,SPIsend,SPIsenddata,\nwraddress,Acquiring,SPIstate,clk_flash2,trigthreshtwo,dout1,dout2,dout3,dout4,highres,ext_trig_in,use_ext_trig, nsmp, trigout, spareright, spareleft,\ndelaycounter,ext_trig_delay, noselftrig, nselftrigcoincidentreq, selftrigtempholdtime, allowsamechancoin,\ntrigratecounter,trigratecountreset);\ninput clk,clk_spi;\ninput startTrigger;\ninput [1:0] trig_in;\noutput reg [1:0] trig_out;\noutput reg pwr1=0;//to power up adc, set low\noutput reg pwr2=0;//to power up adc, set low\noutput reg shdn_out=0;//Active-High Power-Down. If SPEN is high (parallel programming mode), a register reset is initiated on the falling edge of SHDN.\noutput reg spen_out=0;//Active-Low SPI Enable. Drive high to enable parallel programming mode.\noutput reg format_sdin_out=0;//0=2's complement, 1=offset binary, unconnected=gray code\noutput reg div_sclk_out=0;//0=divide clock by 1, 1=divide clock by 2, unconnected=divide clock by 4\noutput reg outsel_cs_out=1;//0=CMOS (dual bus), 1=MUX CMOS (channel A data bus), unconnected=MUX CMOS (channel b data bus)\ninput clk_flash, clk_flash2;\ninput [7:0] data_flash1, data_flash2, data_flash3, data_flash4;\noutput reg [7:0] dout1, dout2, dout3, dout4;\nparameter ram_width=10;\noutput reg[ram_width-1:0] wraddress_triggerpoint;\nreg[ram_width-1:0] wraddress_triggerpoint2;//to pass timing (need to send to slow clk domain)\ninput wire [ram_width-1:0] rdaddress;\ninput wire rden;//read enable\noutput reg data_ready=0;\ninput wire imthelast, imthefirst;\ninput wire rollingtrigger;\noutput reg trigDebug=1;\ninput [7:0] trigthresh, trigthreshtwo;\ninput [3:0] trigchannels;\ninput [ram_width-1:0] triggerpoint;\ninput [7:0] downsample; // only record 1 out of every 2^downsample samples\nreg [7:0] downsample2; // to pass timing\ninput [3:0] triggertype;\nreg [3:0] triggertype2; // to pass timing\ninput [ram_width:0] triggertot; // the top bit says whether to do check every sample or only according to downsample\ninput highres;\nparameter maxhighres=5;\nreg [7+maxhighres:0] highres1, highres2, highres3, highres4;\ninput ext_trig_in, use_ext_trig;\ninput [ram_width-1:0] nsmp;\nreg [ram_width-1:0] nsmp2; // to pass timing\ninput [4:0] ext_trig_delay; // clk ticks to delay ext trigger by\ninput noselftrig; \ninput [1:0] nselftrigcoincidentreq; // number of self trig channels required to be fired simultaneously\ninput [7:0] selftrigtempholdtime; // how long to fire a channel for\ninput allowsamechancoin; // whether to allow same channel, firing in the past, to count as coincidence\n\noutput reg [3:0] trigout;\noutput wire spareright;\ninput wire spareleft;\n\nreg [31:0] SPIcounter=0;//clock counter for SPI\ninput [15:0] SPIsenddata;//the bits to send\ninput SPIsend;//start sending\nreg [3:0] SPIsendcounter;//which bit to send\nlocalparam SPI0=0, SPI1=1, SPI2=2, SPI3=3;\noutput reg[3:0] SPIstate=SPI0;\nalways @(posedge clk_spi) begin\nif (!spen_out) begin // we're in SPI mode\nSPIcounter=SPIcounter+1;\ncase (SPIstate)\n\tSPI0: begin // this is the beginning\n\t\tif (SPIsend) begin\n\t\t\tSPIcounter=0;\n\t\t\toutsel_cs_out=1;//start high\n\t\t\tdiv_sclk_out=1;\n\t\t\tSPIsendcounter=4'b1111;\n\t\t\tSPIstate=SPI1;\n\t\tend\n\tend\n\tSPI1: begin\n\t\tif (SPIcounter[2]) begin // start of sending, note that we wait a full tick (was 4)\n\t\t\tdiv_sclk_out=0;\n\t\t\toutsel_cs_out=0;//start sending\n\t\t\tformat_sdin_out=SPIsenddata[SPIsendcounter];//the data\n\t\t\tSPIsendcounter=SPIsendcounter-4'b001;//keep track of how many bits we've sent\n\t\t\tSPIstate=SPI2;\n\t\tend\n\tend\n\tSPI2: begin\n\t\tif (!SPIcounter[2]) begin // sending data on rising edge, note that we wait a full tick\n\t\t\tdiv_sclk_out=1;\n\t\t\tif (SPIsendcounter==4'b1111) SPIstate=SPI3; //done\n\t\t\telse SPIstate=SPI1;//send next bit\n\t\tend\n\tend\n\tSPI3: begin\n\t\tif (SPIcounter[2]) begin // done sending, note that we wait a full tick\n\t\t\toutsel_cs_out=1;//back to high\n\t\t\tdiv_sclk_out=0;\n\t\t\tSPIstate=SPI0;\n\t\tend\n\tend\nendcase\nend // SPI mode\nend // clk_spi posedge\n\nreg Threshold1[3:0], Threshold2[3:0];\nreg [ram_width:0] Threshold3[3:0];//keep track of the counter time it was above/below threshold for \nreg selftrigtemp[3:0];\nreg Trigger;\nreg AcquiringAndTriggered=0;\nreg HaveFullData=0;\ninteger i;\ninitial begin\n\tThreshold3[0]=0;\n\tThreshold3[1]=0;\n\tThreshold3[2]=0;\n\tThreshold3[3]=0;\nend\nreg [ram_width-1:0] samplecount=0;\noutput reg [ram_width-1:0] wraddress;\noutput reg Acquiring;\nreg PreOrPostAcquiring;\n\nreg [7:0] data_flash1_reg; always @(posedge clk_flash) data_flash1_reg <= data_flash1;\nreg [7:0] data_flash2_reg; always @(posedge clk_flash) data_flash2_reg <= data_flash2; // no multiplexing\n//reg [7:0] data_flash2_reg; always @(negedge clk_flash) data_flash2_reg <= data_flash1; // for multiplexing\n\nreg [7:0] data_flash3_reg_temp; always @(posedge clk_flash2) data_flash3_reg_temp <= data_flash3;\nreg [7:0] data_flash4_reg_temp; always @(posedge clk_flash2) data_flash4_reg_temp <= data_flash4; // no multiplexing\n//reg [7:0] data_flash4_reg_temp; always @(negedge clk_flash2) data_flash4_reg_temp <= data_flash3; // for multiplexing\n\n//pipelines the reading in from clk2 to clk1, so we have a full clk1 cycle for calculations below\nreg [7:0] data_flash3_reg; always @(posedge clk_flash) data_flash3_reg <= data_flash3_reg_temp;\nreg [7:0] data_flash4_reg; always @(posedge clk_flash) data_flash4_reg <= data_flash4_reg_temp; // no multiplexing\n//reg [7:0] data_flash4_reg; always @(negedge clk_flash) data_flash4_reg <= data_flash3_reg_temp; // for multiplexing\n\nalways @(posedge clk_flash) begin\n\ti=0;\n\twhile (i<4) begin\n\t\t//if (trigchannels[i]) begin // always calculate the trigger, for output, even if we won't self-trigger on it\n\t\t\n\t\t\t// above threshold now?\n\t\t\tif (i==0) Threshold1[i] <= (data_flash1_reg>=trigthresh && data_flash1_reg<=trigthreshtwo);\n\t\t\tif (i==1) Threshold1[i] <= (data_flash2_reg>=trigthresh && data_flash2_reg<=trigthreshtwo);\n\t\t\tif (i==2) Threshold1[i] <= (data_flash3_reg>=trigthresh && data_flash3_reg<=trigthreshtwo);\n\t\t\tif (i==3) Threshold1[i] <= (data_flash4_reg>=trigthresh && data_flash4_reg<=trigthreshtwo);\n\t\t\tThreshold2[i] <= Threshold1[i]; // was above threshold?\n\t\t\t\n\t\t\tif (triggertype2[0]) begin // if positive edge, trigger! (possibly after demanding a timeout)\n\t\t\t\tif (triggertot[ram_width-1:0]) begin\n\t\t\t\t\tselftrigtemp[i] = 0;//assume we are not firing\n\t\t\t\t\tif (Threshold3[i]) begin\n\t\t\t\t\t\tif (triggertot[ram_width]) begin // only check every 2^downsample samples\n\t\t\t\t\t\t\tif (downsamplego) begin\n\t\t\t\t\t\t\t\tif (Threshold1[i]) Threshold3[i] <= Threshold3[i]+1; // keep track of how long it's been above threshold\n\t\t\t\t\t\t\t\telse Threshold3[i] <= 0; // reset once it goes below threshold\n\t\t\t\t\t\t\tend\n\t\t\t\t\t\tend\n\t\t\t\t\t\telse begin // check every sample\n\t\t\t\t\t\t\tif (Threshold1[i]) Threshold3[i] <= Threshold3[i]+1; // keep track of how long it's been above threshold\n\t\t\t\t\t\t\telse Threshold3[i] <= 0; // reset once it goes below threshold\n\t\t\t\t\t\tend\n\t\t\t\t\t\tif (Threshold3[i]>triggertot[ram_width-1:0]) begin //fired!\n\t\t\t\t\t\t\tselftrigtemp[i] = 1;\n\t\t\t\t\t\t\tThreshold3[i] <= 0; // reset once it fires\n\t\t\t\t\t\tend\n\t\t\t\t\tend\n\t\t\t\t\telse if (Threshold1[i] & ~Threshold2[i]) begin // got a positive edge\n\t\t\t\t\t\tThreshold3[i] <= 1; // start counting\t\t\t\t\t\t\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\t\telse selftrigtemp[i] <= (Threshold1[i] & ~Threshold2[i]);// got a positive edge, just trigger\n\t\t\tend\n\t\t\t\n\t\t\telse begin // if negative edge, trigger! (possibly after demanding a timeout)\t\t\t\t\n\t\t\t\tif (triggertot[ram_width-1:0]) begin\n\t\t\t\t\tselftrigtemp[i] = 0;//assume we are not firing\n\t\t\t\t\tif (Threshold3[i]) begin\t\t\t\t\t\n\t\t\t\t\t\tif (triggertot[ram_width]) begin // only check every 2^downsample samples\n\t\t\t\t\t\t\tif (downsamplego) begin\n\t\t\t\t\t\t\t\tif (~Threshold1[i]) Threshold3[i] <= Threshold3[i]+1; // keep track of how long it's been below threshold\n\t\t\t\t\t\t\t\telse Threshold3[i] <= 0; // reset once it goes above threshold\n\t\t\t\t\t\t\tend\n\t\t\t\t\t\tend\n\t\t\t\t\t\telse begin // check every sample\n\t\t\t\t\t\t\tif (~Threshold1[i]) Threshold3[i] <= Threshold3[i]+1; // keep track of how long it's been below threshold\n\t\t\t\t\t\t\telse Threshold3[i] <= 0; // reset once it goes above threshold\n\t\t\t\t\t\tend\t\t\t\t\t\t\n\t\t\t\t\t\tif (Threshold3[i]>triggertot[ram_width-1:0]) begin //fired!\n\t\t\t\t\t\t\tselftrigtemp[i] = 1;\n\t\t\t\t\t\t\tThreshold3[i] <= 0; // reset once it fires\n\t\t\t\t\t\tend\n\t\t\t\t\tend\n\t\t\t\t\telse if (~Threshold1[i] & Threshold2[i]) begin // got a negative edge\n\t\t\t\t\t\tThreshold3[i] <= 1; // start counting\t\t\t\t\t\t\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\t\telse selftrigtemp[i] <= (~Threshold1[i] & Threshold2[i]);// got a negative edge, just trigger\n\t\t\tend\n\t\t\t\n\t\t//end // if (trigchannels[i])\n\t\ti=i+1;\n\tend\nend\n\nreg[12:0] ext_trig_in_delay_bits=0;\nreg ext_trig_in_delayed;\nalways @(posedge clk_flash) begin\n\text_trig_in_delayed <= ext_trig_in_delay_bits[ext_trig_delay];\n\text_trig_in_delay_bits <= {ext_trig_in_delay_bits[12-1:0], ext_trig_in};\nend\n\nreg[31:0] thecounter; // counter for the rolling trigger\nreg[1:0] nselftrigstemp[4]; // number of self trig channels fired, other than this one\nreg[7:0] selftrigtemphold[4]; // will keep track of which channel have fired\nalways @(posedge clk_flash) begin\n\tif (Trigger) thecounter<=0; else thecounter<=thecounter+1;\n\ti=0;\n\twhile (i<4) begin\n\t\tif (selftrigtemp[i]) selftrigtemphold[i]<=selftrigtempholdtime; // trigger has fired\n\t\telse if (selftrigtemphold[i]>0 && downsamplego) selftrigtemphold[i]<=selftrigtemphold[i]-1; // count down (paying attention to downsample) so the trigger stops firing after selftrigtempholdtime\n\t\tif (allowsamechancoin) nselftrigstemp[i] <= (trigchannels[(i)%4]&&selftrigtemphold[(i)%4]>0) + (trigchannels[(i+1)%4]&&selftrigtemphold[(i+1)%4]>0) + (trigchannels[(i+2)%4]&&selftrigtemphold[(i+2)%4]>0) + (trigchannels[(i+3)%4]&&selftrigtemphold[(i+3)%4]>0);\n\t\telse nselftrigstemp[i] <= (trigchannels[(i+1)%4]&&selftrigtemphold[(i+1)%4]>0) + (trigchannels[(i+2)%4]&&selftrigtemphold[(i+2)%4]>0) + (trigchannels[(i+3)%4]&&selftrigtemphold[(i+3)%4]>0);\n\t\ti=i+1;\n\tend\nend\nwire selfedgetrig; // currently on an edge\nassign selfedgetrig = (trigchannels[0]&&selftrigtemp[0]&&nselftrigstemp[0]>=nselftrigcoincidentreq)||\n\t\t\t\t\t\t\t (trigchannels[1]&&selftrigtemp[1]&&nselftrigstemp[1]>=nselftrigcoincidentreq)||\n\t\t\t\t\t\t\t (trigchannels[2]&&selftrigtemp[2]&&nselftrigstemp[2]>=nselftrigcoincidentreq)||\n\t\t\t\t\t\t\t (trigchannels[3]&&selftrigtemp[3]&&nselftrigstemp[3]>=nselftrigcoincidentreq);\nwire selftrig; //trigger is an OR of all the channels which are active // also trigger every second or so (rolling)\nassign selftrig = selfedgetrig || (rollingtrigger&thecounter>=25000000) || (use_ext_trig&ext_trig_in_delayed);\n\n// trigger rate counter stuff\noutput reg[31:0] trigratecounter=0;\ninput trigratecountreset;\nreg [7:0] selfedgetrigdeadtime=0; // to keep track of deadtime for the trigger rate counter\nalways @(posedge clk_flash) begin\n\tif (selfedgetrig && selfedgetrigdeadtime==0) begin // only count it if the counter is not dead because a trigger fired recently\n\t\ttrigratecounter = trigratecounter+1;\n\t\tselfedgetrigdeadtime<=selftrigtempholdtime; // trigger has fired, start counting down deadtime, from selftrigtempholdtime (same as used for coincidence trigger)\n\tend\n\tif (selfedgetrigdeadtime>0 && downsamplego) selfedgetrigdeadtime<=selfedgetrigdeadtime-1; // count down deadtime (paying attention to downsample) so the trigger stops being dead after selftrigtempholdtime\n\tif (trigratecountreset) trigratecounter=0;\nend\n// end trigger rate counter stuff\n\nalways @(posedge clk_flash)\nif (noselftrig) Trigger = trig_in[1]; // just trigger if we get a trigger in towards to right\nelse if (imthefirst & imthelast) Trigger = selftrig; // we trigger if we triggered ourselves\nelse if (imthefirst) Trigger = selftrig||trig_in[1]; // we trigger if we triggered ourselves, or got a trigger in towards the right\nelse if (imthelast) Trigger = selftrig||trig_in[0]; // we trigger if we triggered ourselves, or got a trigger in towards the left\nelse Trigger = selftrig||trig_in[0]||trig_in[1]; // we trigger if we triggered ourselves, or got a trigger from the left or right\n\nalways @(posedge clk_flash)\nif (noselftrig) trig_out[0] = 0; // we don't trigger out to the left\nelse if (imthefirst) trig_out[0] = selftrig; // we trigger out to the left if we triggered ourselves\nelse trig_out[0] = trig_in[0]||selftrig; // we trigger out to the left if we got a trig in towards the left, or we triggered ourselves\n\nalways @(posedge clk_flash)\nif (noselftrig) trig_out[1] = trig_in[1]; // we trigger out to the right if we got a trig in towards the right\nelse if (imthelast) trig_out[1] = selftrig; // we trigger out to the right if we triggered ourselves\nelse trig_out[1] = trig_in[1]||selftrig; // we trigger out to the right if we got a trig in towards the right, or we triggered ourselves\n\nreg Ttrig[4]; // whether to fire each of the 4 trigger bits\nreg[3:0] Tcounter[4]; // counters for the output trigger bits (to hold them high for a while after a trigger)\nreg[7:0] Tcounter_test_countdown; // use for sending 50 test triggers\noutput reg[7:0] delaycounter;\nreg[7:0] spareleftcounter;\nalways @(posedge clk_flash) begin\n\tif (spareleft) begin\n\t\tif (spareleftcounter<205) begin\n\t\t\tspareleftcounter<=spareleftcounter+1; // delays for 205 ticks, to wait for trigger board to be ready for counting (it was waiting for all normal triggers from all boards to cease)\n\t\t\tTtrig[0]<=0; Ttrig[1]<=0; Ttrig[2]<=0; Ttrig[3]<=0; // no pulses yet\n\t\t\tTcounter[0]<=0; Tcounter[1]<=0; Tcounter[2]<=0; Tcounter[3]<=0; //reset trig counters\n\t\tend\n\t\telse begin\n\t\t\tTtrig[0] <= (Tcounter_test_countdown!=0); // for calibration (clock skew) we fire trigger 0\n\t\t\tif (Tcounter_test_countdown) Tcounter_test_countdown <= Tcounter_test_countdown-1;\n\t\tend\n\tend\n\telse begin\n\t\ti=0; while (i<4) begin\n\t\t\tif (selftrigtemp[i]) Tcounter[i]<=4; // will count down from 4 to send the trigger out once\n\t\t\telse if (Tcounter[i]) Tcounter[i]<=Tcounter[i]-1;\n\t\t\tTtrig[i] <= (Tcounter[i]>0);\n\t\t\ti=i+1;\n\t\tend\n\t\tTcounter_test_countdown <= 219; // should give 54 or 55 pulses (depending on when spareleft fires)\n\t\tspareleftcounter<=0;\n\tend\nend\nreg[1:0] Pulsecounter=0;\nreg[3:0] trig_ext_out=4'd0;\nalways @(posedge clk_flash) begin\n\tif (noselftrig) trigout[0]<=(Ttrig[Pulsecounter]);\n\telse begin\n\t\tif (Trigger) begin\n\t\t\ttrig_ext_out<=4'd10;//time to fire trig_ext_out for (max 15)\n\t\t\ttrigout[0]<=1'b1;\n\t\tend\n\t\telse if (trig_ext_out>4'd0) begin\n\t\t\ttrig_ext_out<=trig_ext_out-4'd1;\n\t\t\ttrigout[0]<=1'b1;\n\t\tend\n\t\telse trigout[0]<=1'b0;\n\tend\n\tPulsecounter<=Pulsecounter+1; // for iterating through the trigger bins\nend\nassign spareright = spareleft; // pass the calibration signal along to the right\n\nreg startAcquisition;//ready to trigger?\nalways @(posedge clk) begin\n\tif(~startAcquisition) startAcquisition <= startTrigger; // an input to the module\n\telse if(AcquiringAndTriggered2) startAcquisition <= 0;\n\t//assign trigDebug = startAcquisition;\nend\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition;\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\n\nlocalparam INIT=0, PREACQ=1, WAITING=2, POSTACQ=3;\nreg[2:0] state=INIT;\nreg [23:0] downsamplecounter;//max downsample is 22\nreg [maxhighres:0] highrescounter;//for counting highres\nwire downsamplego;\nassign downsamplego = downsamplecounter[downsample2] || downsample2==0; // pay attention to sample when downsamplego is true\nalways @(posedge clk_flash) begin\n\tnsmp2<=nsmp;//to pass timing\n\ttriggertype2<=triggertype;//to pass timing\n\tdownsample2<=downsample;//to pass timing\n\t\n\tcase (state)\n\tINIT: begin // this is the beginning... wait for the go-ahead to start acquiring the pre-trigger samples\n\t\tif (startAcquisition2) begin\n\t\t\tsamplecount <= 0;\n\t\t\tAcquiring <= 1; // start acquiring?\n\t\t\tHaveFullData <= 0;\n\t\t\tPreOrPostAcquiring <= 1; // preacquiring\n\t\t\tdownsamplecounter=1;\n\t\t\thighrescounter=0;\n\t\t\thighres1=0;\n\t\t\thighres2=0;\n\t\t\thighres3=0;\n\t\t\thighres4=0;\n\t\t\tstate=PREACQ;\n\t\tend\n\tend\n\tPREACQ: begin // pre-trigger bytes acquired already?\n\t\tif( (samplecount==triggerpoint) ) begin\n\t\t\tPreOrPostAcquiring <= 0;\n\t\t\tstate=WAITING;\n\t\tend\n\tend\n\tWAITING: begin\n\t\tif(Trigger) begin // now we wait for the trigger, and then record the triggerpoint\n\t\t\tAcquiringAndTriggered <= 1; // Trigger? Start getting the rest of the bytes\n\t\t\tPreOrPostAcquiring <= 1;\n\t\t\twraddress_triggerpoint2 <= wraddress; // keep track of where the trigger happened\n\t\t\tstate=POSTACQ;\n\t\tend\n\tend\n\tPOSTACQ: begin\n\t\tif(samplecount==nsmp2) begin // got the rest of the bytes? then stop acquiring\n\t\t\tAcquiring <= 0;\n\t\t\tAcquiringAndTriggered <= 0;\n\t\t\tHaveFullData <= 1;\n\t\t\tPreOrPostAcquiring <= 0;\n\t\t\tstate=INIT;\n\t\tend\n\tend\n\tendcase\n\t\n\tdownsamplecounter=downsamplecounter+1;\n\tif (highres) begin // doing highres mode (averaging over samples within each downsample)\n\t\thighrescounter=highrescounter+1;\n\t\thighres1=highres1+data_flash1_reg;\n\t\thighres2=highres2+data_flash2_reg;\n\t\thighres3=highres3+data_flash3_reg;\n\t\thighres4=highres4+data_flash4_reg;\n\t\tif (downsamplego || highrescounter[maxhighres]) begin\n\t\t\thighrescounter=0;\n\t\t\tif (downsample2>maxhighres) begin\t\t\t\n\t\t\t\tdout1=highres1>>maxhighres;\n\t\t\t\tdout2=highres2>>maxhighres;\n\t\t\t\tdout3=highres3>>maxhighres;\n\t\t\t\tdout4=highres4>>maxhighres;\n\t\t\tend\n\t\t\telse begin\n\t\t\t\tdout1=highres1>>downsample2;\n\t\t\t\tdout2=highres2>>downsample2;\n\t\t\t\tdout3=highres3>>downsample2;\n\t\t\t\tdout4=highres4>>downsample2;\n\t\t\tend\n\t\t\thighres1=0;\n\t\t\thighres2=0;\n\t\t\thighres3=0;\n\t\t\thighres4=0;\n\t\tend\n\tend\n\telse begin // not highres mode, just copy in the data\n\t\tdout1=data_flash1_reg;\n\t\tdout2=data_flash2_reg;\n\t\tdout3=data_flash3_reg;\n\t\tdout4=data_flash4_reg;\n\tend\n\tif (downsamplego) begin // increment the write address (store new data) every 1/2^downsample samples\n\t\tdownsamplecounter=1;\n\t\tif(Acquiring) wraddress <= wraddress + 1;\n\t\tif(PreOrPostAcquiring) samplecount <= samplecount + 1;\n\tend\nend\n\n// go from flash clock to fpga main clock domain\nreg AcquiringAndTriggered1; always @(posedge clk) AcquiringAndTriggered1 <= AcquiringAndTriggered;\nreg AcquiringAndTriggered2; always @(posedge clk) AcquiringAndTriggered2 <= AcquiringAndTriggered1;\nreg HaveFullData1; always @(posedge clk) HaveFullData1 <= HaveFullData;\nreg HaveFullData2; always @(posedge clk) HaveFullData2 <= HaveFullData1;\n\nalways @(posedge clk) begin\n\twraddress_triggerpoint=wraddress_triggerpoint2; // sends to slow clk domain\n\tif (startAcquisition) data_ready=0; // waiting for trigger\n\telse if (HaveFullData2) data_ready=1; // ready to read out\nend\n\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/oscillo.v.bak",
    "content": "module oscillo(clk, TxD, clk_flash, data_flash);\r\ninput clk;\r\noutput TxD;\r\n\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\n\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nwire [7:0] q_fifo;\r\nfifo myfifo(.data(data_flash_reg), .wrreq(wrreq), .wrclk(clk_flash), .wrfull(wrfull), .wrempty(wrempty), .q(q_fifo), .rdreq(rdreq), .rdclk(clk), .rdempty(rdempty));\r\n\r\n// The flash ADC side starts filling the fifo only when it is completely empty,\r\n// and stops when it is full, and then waits until it is completely empty again\r\nreg fillfifo;\r\nalways @(posedge clk_flash)\r\nif(~fillfifo)\r\n  fillfifo <= wrempty; // start when empty\r\nelse\r\n  fillfifo <= ~wrfull; // stop when full\r\n\r\nassign wrreq = fillfifo;\r\n\r\n// the manager side sends when the fifo is not empty\r\nwire TxD_busy;\r\nwire TxD_start = ~TxD_busy & ~rdempty;\r\nassign rdreq = TxD_start;\r\n\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(q_fifo));\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/oscillo_notrigger.v",
    "content": "module oscillo(clk, RxD, TxD, clk_flash, data_flash);\r\ninput clk;\r\ninput RxD;\r\noutput TxD;\r\n\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\n\r\n///////////////////////////////////////////////////////////////////\r\n\r\n//wire [7:0] RxD_data;\r\n//async_receiver async_rxd(.clk(clk), .RxD(RxD), .RxD_data_ready(RxD_data_ready), .RxD_data(RxD_data));\r\n\r\nreg startAcquisition;\r\nwire AcquisitionStarted;\r\n\r\nalways @(posedge clk)\r\nif(~startAcquisition)\r\n  //startAcquisition <= RxD_data_ready;\r\n  startAcquisition <= RxD;\r\nelse\r\nif(AcquisitionStarted)\r\n  startAcquisition <= 0;\r\n\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition ;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nreg Acquiring;\r\nalways @(posedge clk_flash)\r\nif(~Acquiring)\r\n  Acquiring <= startAcquisition2;\r\nelse\r\nif(&wraddress)\r\n  Acquiring <= 0;\r\n\r\nreg [8:0] wraddress;\r\nalways @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1;\r\n\r\nreg Acquiring1; always @(posedge clk) Acquiring1 <= Acquiring;\r\nreg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1;\r\nassign AcquisitionStarted = Acquiring2;\r\n\r\nreg [8:0] rdaddress;\r\nreg Sending;\r\nwire TxD_busy;\r\n\r\nalways @(posedge clk)\r\nif(~Sending)\r\n  Sending <= AcquisitionStarted;\r\nelse\r\nif(~TxD_busy)\r\nbegin\r\n  rdaddress <= rdaddress + 1;\r\n  if(&rdaddress) Sending <= 0;\r\nend\r\n\r\nwire TxD_start = ~TxD_busy & Sending;\r\nwire rden = TxD_start;\r\n\r\nwire [7:0] ram_output;\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(ram_output));\r\n\r\n///////////////////////////////////////////////////////////////////\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nLPM_RAM_DP #(.LPM_WIDTH(8), .LPM_WIDTHAD(9)) ram_flash (\r\n  .data(data_flash_reg), .wraddress(wraddress), .wren(Acquiring), .wrclock(clk_flash),\r\n  .q(ram_output), .rdaddress(rdaddress), .rden(rden), .rdclock(clk)\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/oscillo_notrigger.v.bak",
    "content": "module oscillo(clk, RxD, TxD, clk_flash, data_flash);\r\ninput clk;\r\ninput RxD;\r\noutput TxD;\r\n\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\n\r\n///////////////////////////////////////////////////////////////////\r\n\r\n//wire [7:0] RxD_data;\r\n//async_receiver async_rxd(.clk(clk), .RxD(RxD), .RxD_data_ready(RxD_data_ready), .RxD_data(RxD_data));\r\n\r\nreg Threshold1, Threshold2;\r\nalways @(posedge clk_flash) Threshold1 <= (data_flash_reg>=8'h80);\r\nalways @(posedge clk_flash) Threshold2 <= Threshold1;\r\nassign Trigger = Threshold1 & ~Threshold2;  // if positive edge, trigger!\r\n\r\nreg startAcquisition;\r\nwire AcquisitionStarted;\r\n\r\nalways @(posedge clk)\r\nif(~startAcquisition)\r\n  //startAcquisition <= RxD_data_ready;\r\n  startAcquisition <= RxD;\r\nelse\r\nif(AcquisitionStarted)\r\n  startAcquisition <= 0;\r\n\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition ;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nreg Acquiring;\r\nalways @(posedge clk_flash)\r\nif(~Acquiring)\r\n  Acquiring <= startAcquisition2;\r\nelse\r\nif(&wraddress)\r\n  Acquiring <= 0;\r\n\r\nreg [8:0] wraddress;\r\nalways @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1;\r\n\r\nreg Acquiring1; always @(posedge clk) Acquiring1 <= Acquiring;\r\nreg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1;\r\nassign AcquisitionStarted = Acquiring2;\r\n\r\nreg [8:0] rdaddress;\r\nreg Sending;\r\nwire TxD_busy;\r\n\r\nalways @(posedge clk)\r\nif(~Sending)\r\n  Sending <= AcquisitionStarted;\r\nelse\r\nif(~TxD_busy)\r\nbegin\r\n  rdaddress <= rdaddress + 1;\r\n  if(&rdaddress) Sending <= 0;\r\nend\r\n\r\nwire TxD_start = ~TxD_busy & Sending;\r\nwire rden = TxD_start;\r\n\r\nwire [7:0] ram_output;\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(ram_output));\r\n\r\n///////////////////////////////////////////////////////////////////\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nLPM_RAM_DP #(.LPM_WIDTH(8), .LPM_WIDTHAD(9)) ram_flash (\r\n  .data(data_flash_reg), .wraddress(wraddress), .wren(Acquiring), .wrclock(clk_flash),\r\n  .q(ram_output), .rdaddress(rdaddress), .rden(rden), .rdclock(clk)\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/oscillo_sometrigger.v",
    "content": "module oscillo(clk, RxD, TxD, clk_flash, data_flash);\r\ninput clk;\r\ninput RxD;\r\noutput TxD;\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\nreg startAcquisition;\r\nwire AcquisitionStarted;\r\n\r\nalways @(posedge clk)\r\nif(~startAcquisition)  startAcquisition <= RxD;\r\nelse if(AcquisitionStarted)  startAcquisition <= 0;\r\n\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition ;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nreg Acquiring;\r\nalways @(posedge clk_flash)\r\nif(~Acquiring)  Acquiring <= startAcquisition2;\r\nelse if(&wraddress)  Acquiring <= 0;\r\n\r\nreg [8:0] wraddress;\r\nalways @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1;\r\n\r\nreg Acquiring1; always @(posedge clk) Acquiring1 <= Acquiring;\r\nreg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1;\r\nassign AcquisitionStarted = Acquiring2;\r\n\r\nreg [8:0] rdaddress;\r\nreg Sending;\r\nwire TxD_busy;\r\n\r\nalways @(posedge clk)\r\nif(~Sending)  Sending <= AcquisitionStarted;\r\nelse if(~TxD_busy) begin\r\n  rdaddress <= rdaddress + 1;\r\n  if(&rdaddress) Sending <= 0;\r\nend\r\n\r\nwire TxD_start = ~TxD_busy & Sending;\r\nwire rden = TxD_start;\r\n\r\nwire [7:0] ram_output;\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(ram_output));\r\n\r\n///////////////////////////////////////////////////////////////////\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nLPM_RAM_DP #(.LPM_WIDTH(8), .LPM_WIDTHAD(9)) ram_flash (\r\n  .data(data_flash_reg), .wraddress(wraddress), .wren(Acquiring), .wrclock(clk_flash),\r\n  .q(ram_output), .rdaddress(rdaddress), .rden(rden), .rdclock(clk)\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/oscillo_sometrigger.v.bak",
    "content": "module oscillo(clk, RxD, TxD, clk_flash, data_flash);\r\ninput clk;\r\ninput RxD;\r\noutput TxD;\r\n\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\n\r\n///////////////////////////////////////////////////////////////////\r\n\r\n//wire [7:0] RxD_data;\r\n//async_receiver async_rxd(.clk(clk), .RxD(RxD), .RxD_data_ready(RxD_data_ready), .RxD_data(RxD_data));\r\n\r\nreg startAcquisition;\r\nwire AcquisitionStarted;\r\n\r\nalways @(posedge clk)\r\nif(~startAcquisition)\r\n  //startAcquisition <= RxD_data_ready;\r\n  startAcquisition <= RxD;\r\nelse\r\nif(AcquisitionStarted)\r\n  startAcquisition <= 0;\r\n\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition ;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nreg Acquiring;\r\nalways @(posedge clk_flash)\r\nif(~Acquiring)\r\n  Acquiring <= startAcquisition2;\r\nelse\r\nif(&wraddress)\r\n  Acquiring <= 0;\r\n\r\nreg [8:0] wraddress;\r\nalways @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1;\r\n\r\nreg Acquiring1; always @(posedge clk) Acquiring1 <= Acquiring;\r\nreg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1;\r\nassign AcquisitionStarted = Acquiring2;\r\n\r\nreg [8:0] rdaddress;\r\nreg Sending;\r\nwire TxD_busy;\r\n\r\nalways @(posedge clk)\r\nif(~Sending)\r\n  Sending <= AcquisitionStarted;\r\nelse\r\nif(~TxD_busy)\r\nbegin\r\n  rdaddress <= rdaddress + 1;\r\n  if(&rdaddress) Sending <= 0;\r\nend\r\n\r\nwire TxD_start = ~TxD_busy & Sending;\r\nwire rden = TxD_start;\r\n\r\nwire [7:0] ram_output;\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(ram_output));\r\n\r\n///////////////////////////////////////////////////////////////////\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nLPM_RAM_DP #(.LPM_WIDTH(8), .LPM_WIDTHAD(9)) ram_flash (\r\n  .data(data_flash_reg), .wraddress(wraddress), .wren(Acquiring), .wrclock(clk_flash),\r\n  .q(ram_output), .rdaddress(rdaddress), .rden(rden), .rdclock(clk)\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/pong.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 248 160)\r\n\t(text \"pong\" (rect 5 0 23 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"PaddlePosition[7..0]\" (rect 0 0 75 12)(font \"Arial\" ))\r\n\t\t(text \"PaddlePosition[7..0]\" (rect 21 43 96 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 32)\r\n\t\t(output)\r\n\t\t(text \"vga_h_sync\" (rect 0 0 51 12)(font \"Arial\" ))\r\n\t\t(text \"vga_h_sync\" (rect 160 27 211 39)(font \"Arial\" ))\r\n\t\t(line (pt 232 32)(pt 216 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 48)\r\n\t\t(output)\r\n\t\t(text \"vga_v_sync\" (rect 0 0 53 12)(font \"Arial\" ))\r\n\t\t(text \"vga_v_sync\" (rect 158 43 211 55)(font \"Arial\" ))\r\n\t\t(line (pt 232 48)(pt 216 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 64)\r\n\t\t(output)\r\n\t\t(text \"vga_R\" (rect 0 0 29 12)(font \"Arial\" ))\r\n\t\t(text \"vga_R\" (rect 182 59 211 71)(font \"Arial\" ))\r\n\t\t(line (pt 232 64)(pt 216 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 80)\r\n\t\t(output)\r\n\t\t(text \"vga_G\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"vga_G\" (rect 183 75 211 87)(font \"Arial\" ))\r\n\t\t(line (pt 232 80)(pt 216 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 96)\r\n\t\t(output)\r\n\t\t(text \"vga_B\" (rect 0 0 27 12)(font \"Arial\" ))\r\n\t\t(text \"vga_B\" (rect 184 91 211 103)(font \"Arial\" ))\r\n\t\t(line (pt 232 96)(pt 216 96)(line_width 1))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 216 128)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/pong.v",
    "content": "module pong(clk, vga_h_sync, vga_v_sync, vga_R, vga_G, vga_B, PaddlePosition);\r\ninput clk;\r\ninput [7:0] PaddlePosition;\r\noutput vga_h_sync, vga_v_sync, vga_R, vga_G, vga_B;\r\n\r\nwire inDisplayArea;\r\nwire [9:0] CounterX;\r\nwire [8:0] CounterY;\r\n\r\nhvsync_generator syncgen(.clk(clk), .vga_h_sync(vga_h_sync), .vga_v_sync(vga_v_sync), \r\n  .inDisplayArea(inDisplayArea), .CounterX(CounterX), .CounterY(CounterY));\r\n\r\n/////////////////////////////////////////////////////////////////\r\nwire border = (CounterX[9:3]==0) || (CounterX[9:3]==79) || (CounterY[8:3]==0) || (CounterY[8:3]==59);\r\nwire[10:0] PaddlePosition2 = (PaddlePosition-49)*80;\r\nwire paddle = (CounterX>=PaddlePosition2+8) && (CounterX<=PaddlePosition2+120) && (CounterY[8:4]==27);\r\nwire BouncingObject = border | paddle; // active if the border or paddle is redrawing itself\r\n\r\n/////////////////////////////////////////////////////////////////\r\nparameter Nballs = 15;\r\nwire [Nballs:0] inball;\r\nreg [Nballs:0] inotherball;\r\nwire [9:0] ballX [Nballs:0];\r\nwire [8:0] ballY [Nballs:0];\r\nwire [8:0] ballspeed [Nballs:0];\r\nwire [8:0] ballmass [Nballs:0];\r\n\r\ngenerate\r\n  genvar i;\r\n  for (i=0; i<Nballs; i=i+1) begin : dff\r\n    mball #(.startX(20+((131*i)%600)), .startY(29+((7*i)%440)), .pballmass(1), .pballspeed(1)) ball_i (.clk(clk), \r\n\t    .BouncingObject(BouncingObject), .inotherball(inotherball[i]), \r\n       .CounterX(CounterX), .CounterY(CounterY), .ballX(ballX[i]), .ballY(ballY[i]), \r\n\t\t .inball(inball[i]), .ballspeed(ballspeed[i]), .ballmass(ballmass[i]) );\r\n  end\r\nendgenerate\r\n\r\n/////////////////////////////////////////////////////////////////\r\nwire inaball = (inball!=0);\r\nwire R = BouncingObject | inaball | (CounterX[3] ^ CounterY[3]);\r\nwire G = BouncingObject | inaball;\r\nwire B = BouncingObject | inaball;\r\n\r\nreg [Nballs:0] iball;\r\nreg [Nballs:0] jball;\r\nalways @(posedge clk) begin\r\n   for (iball=0; iball<Nballs; iball=iball+1) begin\r\n\t   inotherball[iball] = 0;\r\n\t   for (jball=0; jball<Nballs; jball=jball+1) begin\r\n\t\t   if (inball[iball] & iball!=jball & inball[jball]) inotherball[iball] = 1;//ballmass[jball]*ballspeed[jball];\r\n\t   end\r\n\tend\r\nend\r\n\r\nreg vga_R, vga_G, vga_B;\r\nalways @(posedge clk) begin\r\n\tvga_R <= R & inDisplayArea;\r\n\tvga_G <= G & inDisplayArea;\r\n\tvga_B <= B & inDisplayArea;\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/processor.bsf",
    "content": "/*\nWARNING: Do NOT edit the input and output ports in this file in a text\neditor if you plan to continue editing the block that represents it in\nthe Block Editor! File corruption is VERY likely to occur.\n*/\n/*\nCopyright (C) 2018  Intel Corporation. All rights reserved.\nYour use of Intel Corporation's design tools, logic functions \nand other software and tools, and its AMPP partner logic \nfunctions, and any output files from any of the foregoing \n(including device programming or simulation files), and any \nassociated documentation or information are expressly subject \nto the terms and conditions of the Intel Program License \nSubscription Agreement, the Intel Quartus Prime License Agreement,\nthe Intel FPGA IP License Agreement, or other applicable license\nagreement, including, without limitation, that your use is for\nthe sole purpose of programming logic devices manufactured by\nIntel and sold by Intel or its authorized distributors.  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    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 224 160)\r\n\t(text \"processor_slave\" (rect 5 0 72 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"rxReady\" (rect 0 0 36 12)(font \"Arial\" ))\r\n\t\t(text \"rxReady\" (rect 21 43 57 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"rxData[7..0]\" (rect 0 0 47 12)(font \"Arial\" ))\r\n\t\t(text \"rxData[7..0]\" (rect 21 59 68 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"txBusy\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"txBusy\" (rect 21 75 49 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"newgotdata\" (rect 0 0 43 12)(font \"Arial\" ))\r\n\t\t(text \"newgotdata\" (rect 21 91 64 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"gotdata[7..0]\" (rect 0 0 48 12)(font \"Arial\" ))\r\n\t\t(text \"gotdata[7..0]\" (rect 21 107 69 119)(font \"Arial\" ))\r\n\t\t(line (pt 0 112)(pt 16 112)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 32)\r\n\t\t(output)\r\n\t\t(text \"txStart\" (rect 0 0 25 12)(font \"Arial\" ))\r\n\t\t(text \"txStart\" (rect 162 27 187 39)(font \"Arial\" ))\r\n\t\t(line (pt 208 32)(pt 192 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 48)\r\n\t\t(output)\r\n\t\t(text \"txData[7..0]\" (rect 0 0 46 12)(font \"Arial\" ))\r\n\t\t(text \"txData[7..0]\" (rect 141 43 187 55)(font \"Arial\" ))\r\n\t\t(line (pt 208 48)(pt 192 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 64)\r\n\t\t(output)\r\n\t\t(text \"readdata[7..0]\" (rect 0 0 54 12)(font \"Arial\" ))\r\n\t\t(text \"readdata[7..0]\" (rect 133 59 187 71)(font \"Arial\" ))\r\n\t\t(line (pt 208 64)(pt 192 64)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 192 128)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/qmegawiz_errors_log.txt",
    "content": "\n\nC:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/uniqueid.v\n\nMay 28 12PM:57:47>: Megafunction Altera Unique Chip ID v15.0 is not listed in any \nwizard.lst file in the specified library path(s).Wizard launch aborted\n\nC:/Users/haas/Downloads/Haasoscope/max10_adc_firmware/uniqueid.v\n\nMay 28 12PM:58:30>: Megafunction Altera Unique Chip ID v15.0 is not listed in any \nwizard.lst file in the specified library path(s).Wizard launch aborted"
  },
  {
    "path": "max10_adc_firmware/ram1.bsf",
    "content": "/*\nWARNING: Do NOT edit the input and output ports in this file in a text\neditor if you plan to continue editing the block that represents it in\nthe Block Editor! File corruption is VERY likely to occur.\n*/\n/*\nCopyright (C) 2018  Intel Corporation. All rights reserved.\nYour use of Intel Corporation's design tools, logic functions \nand other software and tools, and its AMPP partner logic \nfunctions, and any output files from any of the foregoing \n(including device programming or simulation files), and any \nassociated documentation or information are expressly subject \nto the terms and conditions of the Intel Program License \nSubscription Agreement, the Intel Quartus Prime License Agreement,\nthe Intel FPGA IP License Agreement, or other applicable license\nagreement, including, without limitation, that your use is for\nthe sole purpose of programming logic devices manufactured by\nIntel and sold by Intel or its authorized distributors.  Please\nrefer to the applicable agreement for further details.\n*/\n(header \"symbol\" (version \"1.2\"))\n(symbol\n\t(rect 0 0 216 128)\n\t(text \"ram1\" (rect 94 0 128 16)(font \"Arial\" (font_size 10)))\n\t(text \"inst\" (rect 8 112 25 124)(font \"Arial\" ))\n\t(port\n\t\t(pt 0 32)\n\t\t(input)\n\t\t(text \"data[11..0]\" (rect 0 0 59 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"data[11..0]\" (rect 4 18 52 31)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 32)(pt 88 32)(line_width 3))\n\t)\n\t(port\n\t\t(pt 0 48)\n\t\t(input)\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"wren\" (rect 4 34 28 47)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 48)(pt 88 48))\n\t)\n\t(port\n\t\t(pt 0 64)\n\t\t(input)\n\t\t(text \"address[10..0]\" (rect 0 0 82 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"address[10..0]\" (rect 4 50 72 63)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 64)(pt 88 64)(line_width 3))\n\t)\n\t(port\n\t\t(pt 0 112)\n\t\t(input)\n\t\t(text \"clock\" (rect 0 0 29 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"clock\" (rect 4 98 27 111)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 112)(pt 80 112))\n\t)\n\t(port\n\t\t(pt 216 32)\n\t\t(output)\n\t\t(text \"q[11..0]\" (rect 0 0 41 14)(font \"Arial\" (font_size 8)))\n\t\t(text \"q[11..0]\" (rect 178 18 211 31)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 216 32)(pt 136 32)(line_width 3))\n\t)\n\t(drawing\n\t\t(text \"12 bits\" (rect 109 24 194 159)(font \"Arial\" )(vertical))\n\t\t(text \"2048 words\" (rect 120 12 214 177)(font \"Arial\" )(vertical))\n\t\t(text \"Block type: AUTO\" (rect 48 114 170 239)(font \"Arial\" ))\n\t\t(line (pt 104 24)(pt 136 24))\n\t\t(line (pt 136 24)(pt 136 96))\n\t\t(line (pt 136 96)(pt 104 96))\n\t\t(line (pt 104 96)(pt 104 24))\n\t\t(line (pt 118 58)(pt 123 63))\n\t\t(line (pt 118 62)(pt 123 57))\n\t\t(line (pt 88 27)(pt 96 27))\n\t\t(line (pt 96 27)(pt 96 39))\n\t\t(line (pt 96 39)(pt 88 39))\n\t\t(line (pt 88 39)(pt 88 27))\n\t\t(line (pt 88 34)(pt 90 36))\n\t\t(line (pt 90 36)(pt 88 38))\n\t\t(line (pt 80 36)(pt 88 36))\n\t\t(line (pt 96 32)(pt 104 32)(line_width 3))\n\t\t(line (pt 88 43)(pt 96 43))\n\t\t(line (pt 96 43)(pt 96 55))\n\t\t(line (pt 96 55)(pt 88 55))\n\t\t(line (pt 88 55)(pt 88 43))\n\t\t(line (pt 88 50)(pt 90 52))\n\t\t(line (pt 90 52)(pt 88 54))\n\t\t(line (pt 80 52)(pt 88 52))\n\t\t(line (pt 96 48)(pt 104 48))\n\t\t(line (pt 88 59)(pt 96 59))\n\t\t(line (pt 96 59)(pt 96 71))\n\t\t(line (pt 96 71)(pt 88 71))\n\t\t(line (pt 88 71)(pt 88 59))\n\t\t(line (pt 88 66)(pt 90 68))\n\t\t(line (pt 90 68)(pt 88 70))\n\t\t(line (pt 80 68)(pt 88 68))\n\t\t(line (pt 96 64)(pt 104 64)(line_width 3))\n\t\t(line (pt 80 112)(pt 80 36))\n\t\t(line (pt 0 0)(pt 217 0))\n\t\t(line (pt 217 0)(pt 217 130))\n\t\t(line (pt 0 130)(pt 217 130))\n\t\t(line (pt 0 0)(pt 0 130))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t\t(line (pt 0 0)(pt 0 0))\n\t)\n)\n"
  },
  {
    "path": "max10_adc_firmware/ram1.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 1-PORT\"\nset_global_assignment -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"ram1.v\"]\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"ram1.bsf\"]\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"ram1_bb.v\"]\n"
  },
  {
    "path": "max10_adc_firmware/ram1.v",
    "content": "// megafunction wizard: %RAM: 1-PORT%\n// GENERATION: STANDARD\n// VERSION: WM1.0\n// MODULE: altsyncram \n\n// ============================================================\n// File Name: ram1.v\n// Megafunction Name(s):\n// \t\t\taltsyncram\n//\n// Simulation Library Files(s):\n// \t\t\taltera_mf\n// ============================================================\n// ************************************************************\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\n//\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\n// ************************************************************\n\n\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\n//Your use of Intel Corporation's design tools, logic functions \n//and other software and tools, and its AMPP partner logic \n//functions, and any output files from any of the foregoing \n//(including device programming or simulation files), and any \n//associated documentation or information are expressly subject \n//to the terms and conditions of the Intel Program License \n//Subscription Agreement, the Intel Quartus Prime License Agreement,\n//the Intel FPGA IP License Agreement, or other applicable license\n//agreement, including, without limitation, that your use is for\n//the sole purpose of programming logic devices manufactured by\n//Intel and sold by Intel or its authorized distributors.  Please\n//refer to the applicable agreement for further details.\n\n\n// synopsys translate_off\n`timescale 1 ps / 1 ps\n// synopsys translate_on\nmodule ram1 (\n\taddress,\n\tclock,\n\tdata,\n\twren,\n\tq);\n\n\tinput\t[10:0]  address;\n\tinput\t  clock;\n\tinput\t[11:0]  data;\n\tinput\t  wren;\n\toutput\t[11:0]  q;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_off\n`endif\n\ttri1\t  clock;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_on\n`endif\n\n\twire [11:0] sub_wire0;\n\twire [11:0] q = sub_wire0[11:0];\n\n\taltsyncram\taltsyncram_component (\n\t\t\t\t.address_a (address),\n\t\t\t\t.clock0 (clock),\n\t\t\t\t.data_a (data),\n\t\t\t\t.wren_a (wren),\n\t\t\t\t.q_a (sub_wire0),\n\t\t\t\t.aclr0 (1'b0),\n\t\t\t\t.aclr1 (1'b0),\n\t\t\t\t.address_b (1'b1),\n\t\t\t\t.addressstall_a (1'b0),\n\t\t\t\t.addressstall_b (1'b0),\n\t\t\t\t.byteena_a (1'b1),\n\t\t\t\t.byteena_b (1'b1),\n\t\t\t\t.clock1 (1'b1),\n\t\t\t\t.clocken0 (1'b1),\n\t\t\t\t.clocken1 (1'b1),\n\t\t\t\t.clocken2 (1'b1),\n\t\t\t\t.clocken3 (1'b1),\n\t\t\t\t.data_b (1'b1),\n\t\t\t\t.eccstatus (),\n\t\t\t\t.q_b (),\n\t\t\t\t.rden_a (1'b1),\n\t\t\t\t.rden_b (1'b1),\n\t\t\t\t.wren_b (1'b0));\n\tdefparam\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\n\t\taltsyncram_component.clock_enable_output_a = \"BYPASS\",\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\n\t\taltsyncram_component.lpm_hint = \"ENABLE_RUNTIME_MOD=NO\",\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\n\t\taltsyncram_component.numwords_a = 2048,\n\t\taltsyncram_component.operation_mode = \"SINGLE_PORT\",\n\t\taltsyncram_component.outdata_aclr_a = \"NONE\",\n\t\taltsyncram_component.outdata_reg_a = \"UNREGISTERED\",\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\n\t\taltsyncram_component.read_during_write_mode_port_a = \"DONT_CARE\",\n\t\taltsyncram_component.widthad_a = 11,\n\t\taltsyncram_component.width_a = 12,\n\t\taltsyncram_component.width_byteena_a = 1;\n\n\nendmodule\n\n// ============================================================\n// CNX file retrieval info\n// ============================================================\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: AclrAddr NUMERIC \"0\"\n// Retrieval info: PRIVATE: AclrByte NUMERIC \"0\"\n// Retrieval info: PRIVATE: AclrData NUMERIC \"0\"\n// Retrieval info: PRIVATE: AclrOutput NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clken NUMERIC \"0\"\n// Retrieval info: PRIVATE: DataBusSeparated NUMERIC \"1\"\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_A\"\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\n// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC \"2048\"\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"2\"\n// Retrieval info: PRIVATE: RegAddr NUMERIC \"1\"\n// Retrieval info: PRIVATE: RegData NUMERIC \"1\"\n// Retrieval info: PRIVATE: RegOutput NUMERIC \"0\"\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\n// Retrieval info: PRIVATE: SingleClock NUMERIC \"1\"\n// Retrieval info: PRIVATE: UseDQRAM NUMERIC \"1\"\n// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: WidthAddr NUMERIC \"11\"\n// Retrieval info: PRIVATE: WidthData NUMERIC \"12\"\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING \"BYPASS\"\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: CONSTANT: LPM_HINT STRING \"ENABLE_RUNTIME_MOD=NO\"\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"2048\"\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"SINGLE_PORT\"\n// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING \"NONE\"\n// Retrieval info: CONSTANT: OUTDATA_REG_A STRING \"UNREGISTERED\"\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING \"DONT_CARE\"\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"11\"\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"12\"\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\n// Retrieval info: USED_PORT: address 0 0 11 0 INPUT NODEFVAL \"address[10..0]\"\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\n// Retrieval info: USED_PORT: data 0 0 12 0 INPUT NODEFVAL \"data[11..0]\"\n// Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL \"q[11..0]\"\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL \"wren\"\n// Retrieval info: CONNECT: @address_a 0 0 11 0 address 0 0 11 0\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\n// Retrieval info: CONNECT: @data_a 0 0 12 0 data 0 0 12 0\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\n// Retrieval info: CONNECT: q 0 0 12 0 @q_a 0 0 12 0\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.inc FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.cmp FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.bsf TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1_inst.v FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1_bb.v TRUE\n// Retrieval info: LIB_FILE: altera_mf\n"
  },
  {
    "path": "max10_adc_firmware/ram1_bb.v",
    "content": "// megafunction wizard: %RAM: 1-PORT%VBB%\n// GENERATION: STANDARD\n// VERSION: WM1.0\n// MODULE: altsyncram \n\n// ============================================================\n// File Name: ram1.v\n// Megafunction Name(s):\n// \t\t\taltsyncram\n//\n// Simulation Library Files(s):\n// \t\t\taltera_mf\n// ============================================================\n// ************************************************************\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\n//\n// 18.0.0 Build 614 04/24/2018 SJ Lite Edition\n// ************************************************************\n\n//Copyright (C) 2018  Intel Corporation. All rights reserved.\n//Your use of Intel Corporation's design tools, logic functions \n//and other software and tools, and its AMPP partner logic \n//functions, and any output files from any of the foregoing \n//(including device programming or simulation files), and any \n//associated documentation or information are expressly subject \n//to the terms and conditions of the Intel Program License \n//Subscription Agreement, the Intel Quartus Prime License Agreement,\n//the Intel FPGA IP License Agreement, or other applicable license\n//agreement, including, without limitation, that your use is for\n//the sole purpose of programming logic devices manufactured by\n//Intel and sold by Intel or its authorized distributors.  Please\n//refer to the applicable agreement for further details.\n\nmodule ram1 (\n\taddress,\n\tclock,\n\tdata,\n\twren,\n\tq);\n\n\tinput\t[10:0]  address;\n\tinput\t  clock;\n\tinput\t[11:0]  data;\n\tinput\t  wren;\n\toutput\t[11:0]  q;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_off\n`endif\n\ttri1\t  clock;\n`ifndef ALTERA_RESERVED_QIS\n// synopsys translate_on\n`endif\n\nendmodule\n\n// ============================================================\n// CNX file retrieval info\n// ============================================================\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: AclrAddr NUMERIC \"0\"\n// Retrieval info: PRIVATE: AclrByte NUMERIC \"0\"\n// Retrieval info: PRIVATE: AclrData NUMERIC \"0\"\n// Retrieval info: PRIVATE: AclrOutput NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC \"0\"\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: Clken NUMERIC \"0\"\n// Retrieval info: PRIVATE: DataBusSeparated NUMERIC \"1\"\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_A\"\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\n// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC \"2048\"\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"2\"\n// Retrieval info: PRIVATE: RegAddr NUMERIC \"1\"\n// Retrieval info: PRIVATE: RegData NUMERIC \"1\"\n// Retrieval info: PRIVATE: RegOutput NUMERIC \"0\"\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\n// Retrieval info: PRIVATE: SingleClock NUMERIC \"1\"\n// Retrieval info: PRIVATE: UseDQRAM NUMERIC \"1\"\n// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC \"0\"\n// Retrieval info: PRIVATE: WidthAddr NUMERIC \"11\"\n// Retrieval info: PRIVATE: WidthData NUMERIC \"12\"\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING \"BYPASS\"\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\n// Retrieval info: CONSTANT: LPM_HINT STRING \"ENABLE_RUNTIME_MOD=NO\"\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"2048\"\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"SINGLE_PORT\"\n// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING \"NONE\"\n// Retrieval info: CONSTANT: OUTDATA_REG_A STRING \"UNREGISTERED\"\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING \"DONT_CARE\"\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"11\"\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"12\"\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\n// Retrieval info: USED_PORT: address 0 0 11 0 INPUT NODEFVAL \"address[10..0]\"\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\n// Retrieval info: USED_PORT: data 0 0 12 0 INPUT NODEFVAL \"data[11..0]\"\n// Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL \"q[11..0]\"\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL \"wren\"\n// Retrieval info: CONNECT: @address_a 0 0 11 0 address 0 0 11 0\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\n// Retrieval info: CONNECT: @data_a 0 0 12 0 data 0 0 12 0\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\n// Retrieval info: CONNECT: q 0 0 12 0 @q_a 0 0 12 0\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.v TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.inc FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.cmp FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.bsf TRUE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1_inst.v FALSE\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1_bb.v TRUE\n// Retrieval info: LIB_FILE: altera_mf\n"
  },
  {
    "path": "max10_adc_firmware/ram2.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 0 0 216 128)\r\n\t(text \"ram2\" (rect 94 0 128 16)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 112 25 124)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"data[7..0]\" (rect 0 0 53 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"data[7..0]\" (rect 4 18 47 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 32)(pt 88 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wren\" (rect 4 34 28 47)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 48)(pt 88 48))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"address[9..0]\" (rect 0 0 75 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"address[9..0]\" (rect 4 50 66 63)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 88 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"clock\" (rect 0 0 29 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clock\" (rect 4 98 27 111)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 112)(pt 144 112))\r\n\t)\r\n\t(port\r\n\t\t(pt 216 32)\r\n\t\t(output)\r\n\t\t(text \"q[7..0]\" (rect 0 0 35 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"q[7..0]\" (rect 183 18 211 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 216 32)(pt 160 32)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(text \"8 bits\" (rect 109 23 191 153)(font \"Arial\" )(vertical))\r\n\t\t(text \"1024 words\" (rect 120 12 214 177)(font \"Arial\" )(vertical))\r\n\t\t(text \"Block type: AUTO\" (rect 48 114 170 239)(font \"Arial\" ))\r\n\t\t(line (pt 104 24)(pt 136 24))\r\n\t\t(line (pt 136 24)(pt 136 96))\r\n\t\t(line (pt 136 96)(pt 104 96))\r\n\t\t(line (pt 104 96)(pt 104 24))\r\n\t\t(line (pt 118 58)(pt 123 63))\r\n\t\t(line (pt 118 62)(pt 123 57))\r\n\t\t(line (pt 88 27)(pt 96 27))\r\n\t\t(line (pt 96 27)(pt 96 39))\r\n\t\t(line (pt 96 39)(pt 88 39))\r\n\t\t(line (pt 88 39)(pt 88 27))\r\n\t\t(line (pt 88 34)(pt 90 36))\r\n\t\t(line (pt 90 36)(pt 88 38))\r\n\t\t(line (pt 80 36)(pt 88 36))\r\n\t\t(line (pt 96 32)(pt 104 32)(line_width 3))\r\n\t\t(line (pt 152 27)(pt 160 27))\r\n\t\t(line (pt 160 27)(pt 160 39))\r\n\t\t(line (pt 160 39)(pt 152 39))\r\n\t\t(line (pt 152 39)(pt 152 27))\r\n\t\t(line (pt 152 34)(pt 154 36))\r\n\t\t(line (pt 154 36)(pt 152 38))\r\n\t\t(line (pt 144 36)(pt 152 36))\r\n\t\t(line (pt 136 32)(pt 152 32)(line_width 3))\r\n\t\t(line (pt 88 43)(pt 96 43))\r\n\t\t(line (pt 96 43)(pt 96 55))\r\n\t\t(line (pt 96 55)(pt 88 55))\r\n\t\t(line (pt 88 55)(pt 88 43))\r\n\t\t(line (pt 88 50)(pt 90 52))\r\n\t\t(line (pt 90 52)(pt 88 54))\r\n\t\t(line (pt 80 52)(pt 88 52))\r\n\t\t(line (pt 96 48)(pt 104 48))\r\n\t\t(line (pt 88 59)(pt 96 59))\r\n\t\t(line (pt 96 59)(pt 96 71))\r\n\t\t(line (pt 96 71)(pt 88 71))\r\n\t\t(line (pt 88 71)(pt 88 59))\r\n\t\t(line (pt 88 66)(pt 90 68))\r\n\t\t(line (pt 90 68)(pt 88 70))\r\n\t\t(line (pt 80 68)(pt 88 68))\r\n\t\t(line (pt 96 64)(pt 104 64)(line_width 3))\r\n\t\t(line (pt 80 112)(pt 80 36))\r\n\t\t(line (pt 144 112)(pt 144 36))\r\n\t\t(line (pt 0 0)(pt 217 0))\r\n\t\t(line (pt 217 0)(pt 217 130))\r\n\t\t(line (pt 0 130)(pt 217 130))\r\n\t\t(line (pt 0 0)(pt 0 130))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/ram2.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 1-PORT\"\r\nset_global_assignment -name IP_TOOL_VERSION \"15.0\"\r\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\r\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"ram2.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"ram2.bsf\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"ram2_bb.v\"]\r\n"
  },
  {
    "path": "max10_adc_firmware/ram2.v",
    "content": "// megafunction wizard: %RAM: 1-PORT%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: ram2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule ram2 (\r\n\taddress,\r\n\tclock,\r\n\tdata,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t[9:0]  address;\r\n\tinput\t  clock;\r\n\tinput\t[7:0]  data;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [7:0] sub_wire0;\r\n\twire [7:0] q = sub_wire0[7:0];\r\n\r\n\taltsyncram\taltsyncram_component (\r\n\t\t\t\t.address_a (address),\r\n\t\t\t\t.clock0 (clock),\r\n\t\t\t\t.data_a (data),\r\n\t\t\t\t.wren_a (wren),\r\n\t\t\t\t.q_a (sub_wire0),\r\n\t\t\t\t.aclr0 (1'b0),\r\n\t\t\t\t.aclr1 (1'b0),\r\n\t\t\t\t.address_b (1'b1),\r\n\t\t\t\t.addressstall_a (1'b0),\r\n\t\t\t\t.addressstall_b (1'b0),\r\n\t\t\t\t.byteena_a (1'b1),\r\n\t\t\t\t.byteena_b (1'b1),\r\n\t\t\t\t.clock1 (1'b1),\r\n\t\t\t\t.clocken0 (1'b1),\r\n\t\t\t\t.clocken1 (1'b1),\r\n\t\t\t\t.clocken2 (1'b1),\r\n\t\t\t\t.clocken3 (1'b1),\r\n\t\t\t\t.data_b (1'b1),\r\n\t\t\t\t.eccstatus (),\r\n\t\t\t\t.q_b (),\r\n\t\t\t\t.rden_a (1'b1),\r\n\t\t\t\t.rden_b (1'b1),\r\n\t\t\t\t.wren_b (1'b0));\r\n\tdefparam\r\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_output_a = \"BYPASS\",\r\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\r\n\t\taltsyncram_component.lpm_hint = \"ENABLE_RUNTIME_MOD=NO\",\r\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\r\n\t\taltsyncram_component.numwords_a = 1024,\r\n\t\taltsyncram_component.operation_mode = \"SINGLE_PORT\",\r\n\t\taltsyncram_component.outdata_aclr_a = \"NONE\",\r\n\t\taltsyncram_component.outdata_reg_a = \"CLOCK0\",\r\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\r\n\t\taltsyncram_component.read_during_write_mode_port_a = \"DONT_CARE\",\r\n\t\taltsyncram_component.widthad_a = 10,\r\n\t\taltsyncram_component.width_a = 8,\r\n\t\taltsyncram_component.width_byteena_a = 1;\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrAddr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrByte NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrData NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrOutput NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clken NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: DataBusSeparated NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_A\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: RegAddr NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegData NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegOutput NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: SingleClock NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: UseDQRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WidthAddr NUMERIC \"10\"\r\n// Retrieval info: PRIVATE: WidthData NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_HINT STRING \"ENABLE_RUNTIME_MOD=NO\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"SINGLE_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_A STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: address 0 0 10 0 INPUT NODEFVAL \"address[9..0]\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 10 0 address 0 0 10 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware/ram2_bb.v",
    "content": "// megafunction wizard: %RAM: 1-PORT%VBB%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: ram2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\nmodule ram2 (\r\n\taddress,\r\n\tclock,\r\n\tdata,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t[9:0]  address;\r\n\tinput\t  clock;\r\n\tinput\t[7:0]  data;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrAddr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrByte NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrData NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrOutput NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clken NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: DataBusSeparated NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_A\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: RegAddr NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegData NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegOutput NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: SingleClock NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: UseDQRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WidthAddr NUMERIC \"10\"\r\n// Retrieval info: PRIVATE: WidthData NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_HINT STRING \"ENABLE_RUNTIME_MOD=NO\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"SINGLE_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_A STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: address 0 0 10 0 INPUT NODEFVAL \"address[9..0]\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 10 0 address 0 0 10 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware/remove_unused_qprogrammer_stuff.sh",
    "content": "\nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/stratixv_* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/nightfury* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/arriav* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/cyclonev_* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/pfl* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/sfl* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/ep4* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/ep3* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/ep2* \n\n\n"
  },
  {
    "path": "max10_adc_firmware/ring_counter.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 264 128)\r\n\t(text \"ring_counter\" (rect 5 0 54 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"carryin\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"carryin\" (rect 21 43 49 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"delayin[DELAY-1..0]\" (rect 0 0 83 12)(font \"Arial\" ))\r\n\t\t(text \"delayin[DELAY-1..0]\" (rect 21 59 104 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 248 32)\r\n\t\t(output)\r\n\t\t(text \"out_carry[7..0]\" (rect 0 0 60 12)(font \"Arial\" ))\r\n\t\t(text \"out_carry[7..0]\" (rect 167 27 227 39)(font \"Arial\" ))\r\n\t\t(line (pt 248 32)(pt 232 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 248 48)\r\n\t\t(output)\r\n\t\t(text \"carryout\" (rect 0 0 34 12)(font \"Arial\" ))\r\n\t\t(text \"carryout\" (rect 193 43 227 55)(font \"Arial\" ))\r\n\t\t(line (pt 248 48)(pt 232 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 248 64)\r\n\t\t(output)\r\n\t\t(text \"start\" (rect 0 0 17 12)(font \"Arial\" ))\r\n\t\t(text \"start\" (rect 210 59 227 71)(font \"Arial\" ))\r\n\t\t(line (pt 248 64)(pt 232 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 248 80)\r\n\t\t(output)\r\n\t\t(text \"out_delay[7..0]\" (rect 0 0 59 12)(font \"Arial\" ))\r\n\t\t(text \"out_delay[7..0]\" (rect 168 75 227 87)(font \"Arial\" ))\r\n\t\t(line (pt 248 80)(pt 232 80)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"DELAY\"\r\n\t\t\"100\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 232 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 264 -64 364 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/ring_counter.v",
    "content": "module ring_counter (clk,out_carry,carryin,carryout,delayin,start,out_delay);\r\ninput clk;\r\noutput reg [7:0] out_carry;\r\noutput reg [7:0] out_delay;\r\ninput carryin;\r\noutput carryout;\r\ninput wire [DELAY-1:0] delayin;\r\n\r\nparameter DELAY=100; // about 13-14 per tick (10ns) // actually set in serial bdf design file\r\nwire [DELAY-1:0] delay_line /* synthesis keep */;\r\noutput reg start;\r\nreg freeze;\r\nassign carryout = freeze; // set the output high when we freeze\r\n\r\nwire freezeline;\r\n// assign freezeline = freeze; // freeze the chain whenever we say to freeze internally\r\nassign freezeline = carryin; // freeze the chain based on external freeze signal\r\n\r\n//delay line\r\ngenvar i;\r\ngenerate\r\nfor (i=1; i<DELAY; i=i+1)\r\n\tbegin : del\r\n\t\t//assign delay_line [i] = delay_line[i-1+freezeline]; // when freeze is 1, it just is assigned to itself... otherwise it is assigned to it's friend from the left\r\n\t\tassign delay_line [i] = (freezeline) ? delay_line[i] : delay_line[i-1]; // when freeze is 1, it just is assigned to itself... otherwise it is assigned to it's friend from the left\r\n\tend\r\nendgenerate\r\nassign delay_line[0] = start; // we trigger the chain with the \"start\" command\r\n\r\ninitial begin\r\n\tstart<=0;\r\n\tfreeze<=0;\r\nend\r\n\r\n//sync them over to the input clock\r\ninteger delay_counter=0;\r\nalways @(posedge clk) begin\r\n\tif (freeze) begin\r\n\t\t//count until the first 0\r\n\t\tif (delay_line[delay_counter]) delay_counter=delay_counter+1;//keep counting\r\n\t\telse out_delay[7:0] = delay_counter;//found the first 0\r\n\tend\r\n\telse delay_counter=0;//just wait\r\nend\r\n\r\ninteger counter=0;\r\ninteger delayer=0;\r\n//integer cycles=0;\r\nalways @(posedge clk) begin\r\n\tcounter = counter+1;\r\n\tif (counter==200000000) begin // every 2 seconds, reset to 0 and wait for start\r\n\t\tfreeze=0;\r\n\t\tstart=0;\r\n\tend\r\n\tif (counter==200000050) begin // 500 ns later, start\r\n\t\tstart=1;\r\n\tend\r\n\tif (counter==200000050+delayer) begin // then freeze, after some delay possibly\r\n\t\tfreeze=1;\r\n\t\t\r\n//\t\tcycles=cycles+1;\r\n//\t\tif (cycles==10) begin //every 3 seconds, increment the delayer time by a tick\r\n//\t\t\tdelayer=delayer+1;\r\n//\t\t\tcycles=7;//wait 10 seconds before starting up the incrementing\r\n//\t\tend\r\n\t\t\r\n\tend\r\n\tif (counter==200000050+delayer+ 100000) counter=0;//do it again\r\nend\r\n\r\ninteger delay_counter2=1;\r\nalways @(posedge clk) begin\r\n\tif (counter > 200000050+delayer + 10) begin // give it time to stop\r\n\t\t//count until a 1\r\n\t\tif (delayin[delay_counter2]) out_carry[7:0] = delay_counter2 - 150;//found a 1\r\n\t\telse delay_counter2=delay_counter2+1;//keep counting\r\n\tend\r\n\telse delay_counter2=1;//just wait\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/ring_counter.v.bak",
    "content": "\r\n// counter with unstable count enable signal based on ring oscillator.\r\n\r\nmodule ring_counter (clk,out);\r\nparameter DELAY = 100;\r\ninput clk;\r\noutput reg [DELAY-1:0] out;\r\n\r\nwire [DELAY-1:0] delay_line /* synthesis keep */;\r\nreg start;\r\n\r\n// carry chain\r\ngenvar i;\r\ngenerate\r\nfor (i=1; i<DELAY; i=i+1)\r\n\tbegin : del\r\n\t\tassign delay_line [i] = delay_line[i-1];\r\n\tend\r\nendgenerate\r\nassign delay_line[0] = start;\r\n\r\ninitial begin\r\n\tstart=0;\r\nend\r\n\r\n// sync it over to the input clock\r\nalways @(posedge clk) begin\r\n\tout <= delay_line;\r\nend\r\n\r\ninteger counter=0;\r\nalways @(posedge clk) begin\r\n\tcounter = counter+1;\r\n\tif (counter==200000000) begin // every 2 seconds\r\n\t\tcounter=0;\r\n\t\tstart=1;\r\n\tend\r\n\tif (start) start=0;\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/serial1.bdf",
    "content": "/*\nWARNING: Do NOT edit the input and output ports in this file in a text\neditor if you plan to continue editing the block that represents it in\nthe Block Editor! File corruption is VERY likely to occur.\n*/\n/*\nCopyright (C) 2018  Intel Corporation. All rights reserved.\nYour use of Intel Corporation's design tools, logic functions \nand other software and tools, and its AMPP partner logic \nfunctions, and any output files from any of the foregoing \n(including device programming or simulation files), and any \nassociated documentation or information are expressly subject \nto the terms and conditions of the Intel Program License \nSubscription Agreement, the Intel Quartus Prime License Agreement,\nthe Intel FPGA IP License Agreement, or other applicable license\nagreement, including, without limitation, that your use is for\nthe sole purpose of programming logic devices manufactured by\nIntel and sold by Intel or its authorized distributors.  Please\nrefer to the applicable agreement for further details.\n*/\n(header \"graphic\" (version \"1.4\"))\n(pin\n\t(input)\n\t(rect -160 400 16 416)\n\t(text \"INPUT\" (rect 133 0 161 10)(font \"Arial\" (font_size 6)))\n\t(text \"232_in\" (rect 9 0 40 12)(font \"Arial\" ))\n\t(pt 176 8)\n\t(drawing\n\t\t(line (pt 92 12)(pt 117 12))\n\t\t(line (pt 92 4)(pt 117 4))\n\t\t(line (pt 121 8)(pt 176 8))\n\t\t(line (pt 92 12)(pt 92 4))\n\t\t(line (pt 117 4)(pt 121 8))\n\t\t(line (pt 117 12)(pt 121 8))\n\t)\n\t(text \"VCC\" (rect 136 7 156 17)(font \"Arial\" (font_size 6)))\n\t(annotation_block (location)(rect -216 416 -160 440))\n)\n(pin\n\t(input)\n\t(rect 192 -360 368 -344)\n\t(text \"INPUT\" (rect 133 0 161 10)(font \"Arial\" (font_size 6)))\n\t(text \"din1[7..0]\" (rect 9 0 55 12)(font \"Arial\" ))\n\t(pt 176 8)\n\t(drawing\n\t\t(line (pt 92 12)(pt 117 12))\n\t\t(line (pt 92 4)(pt 117 4))\n\t\t(line (pt 121 8)(pt 176 8))\n\t\t(line (pt 92 12)(pt 92 4))\n\t\t(line (pt 117 4)(pt 121 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1512 -520)\n\t(pt 1424 -520)\n)\n(connector\n\t(text \"digital_buffer1[7..0]\" (rect 200 744 296 756)(font \"Arial\" ))\n\t(pt 392 760)\n\t(pt 200 760)\n\t(bus)\n)\n(connector\n\t(pt 56 392)\n\t(pt 96 392)\n)\n(connector\n\t(pt 944 360)\n\t(pt 968 360)\n)\n(connector\n\t(pt 1192 904)\n\t(pt 1136 904)\n)\n(connector\n\t(pt 1136 816)\n\t(pt 1136 848)\n)\n(connector\n\t(pt 1136 848)\n\t(pt 1136 904)\n)\n(connector\n\t(pt 1096 848)\n\t(pt 1136 848)\n)\n(connector\n\t(pt 944 360)\n\t(pt 944 328)\n)\n(connector\n\t(pt 56 680)\n\t(pt 64 680)\n)\n(connector\n\t(pt 384 376)\n\t(pt 392 376)\n)\n(connector\n\t(pt 384 328)\n\t(pt 384 376)\n)\n(connector\n\t(pt 384 328)\n\t(pt 944 328)\n)\n(connector\n\t(pt 56 328)\n\t(pt 384 328)\n)\n(connector\n\t(pt 1456 816)\n\t(pt 1456 416)\n)\n(connector\n\t(pt 1456 416)\n\t(pt 1504 416)\n)\n(connector\n\t(pt 1136 816)\n\t(pt 1456 816)\n)\n(connector\n\t(pt 1456 816)\n\t(pt 1488 816)\n)\n(connector\n\t(pt 1352 376)\n\t(pt 1352 360)\n\t(bus)\n)\n(connector\n\t(pt 1344 376)\n\t(pt 1352 376)\n\t(bus)\n)\n(connector\n\t(pt 1352 360)\n\t(pt 1384 360)\n\t(bus)\n)\n(connector\n\t(text \"chip_id[63..0]\" (rect 1640 -16 1706 -4)(font \"Arial\" ))\n\t(pt 1712 0)\n\t(pt 1632 0)\n\t(bus)\n)\n(connector\n\t(text \"clk_50\" (rect 1378 -32 1409 -20)(font \"Arial\" ))\n\t(pt 1344 -16)\n\t(pt 1440 -16)\n)\n(connector\n\t(text \"clk_mainadc\" (rect -78 920 -18 937)(font \"Intel Clear\" ))\n\t(pt -96 936)\n\t(pt -24 936)\n)\n(connector\n\t(text \"clk_spare\" (rect -77 936 -31 953)(font \"Intel Clear\" ))\n\t(pt -96 952)\n\t(pt -24 952)\n)\n(connector\n\t(text \"clk_10\" (rect -77 904 -46 921)(font \"Intel Clear\" ))\n\t(pt -24 920)\n\t(pt -96 920)\n)\n(connector\n\t(text \"clk_mainadc2\" (rect -77 968 -11 985)(font \"Intel Clear\" ))\n\t(pt -24 984)\n\t(pt -96 984)\n)\n(connector\n\t(text \"pll_locked\" (rect -80 1000 -30 1017)(font \"Intel Clear\" ))\n\t(pt -96 1016)\n\t(pt -24 1016)\n)\n(connector\n\t(pt -448 936)\n\t(pt 752 1208)\n\t(bus)\n)\n(connector\n\t(pt -448 952)\n\t(pt 752 1224)\n)\n(connector\n\t(pt -448 968)\n\t(pt 752 1240)\n)\n(connector\n\t(pt -448 984)\n\t(pt 752 1256)\n)\n(connector\n\t(pt 344 728)\n\t(pt 392 728)\n)\n(connector\n\t(text \"clk60\" (rect 359 704 384 716)(font \"Arial\" ))\n\t(pt 344 712)\n\t(pt 392 712)\n)\n(connector\n\t(text \"clk_10\" (rect -544 552 -513 569)(font \"Intel Clear\" ))\n\t(pt -496 568)\n\t(pt -552 568)\n)\n(connector\n\t(text \"clk_50\" (rect -544 632 -513 649)(font \"Intel Clear\" ))\n\t(pt -496 648)\n\t(pt -552 648)\n)\n(connector\n\t(pt 392 584)\n\t(pt -96 568)\n)\n(connector\n\t(pt 392 552)\n\t(pt -96 600)\n\t(bus)\n)\n(connector\n\t(text \"pll_locked\" (rect -544 592 -494 609)(font \"Intel Clear\" ))\n\t(pt -496 608)\n\t(pt -552 608)\n)\n(connector\n\t(pt 392 568)\n\t(pt -496 752)\n)\n(connector\n\t(pt -496 792)\n\t(pt 752 664)\n)\n(connector\n\t(pt -496 688)\n\t(pt 752 632)\n)\n(connector\n\t(pt 752 648)\n\t(pt -496 704)\n\t(bus)\n)\n(connector\n\t(text \"clk_rd\" (rect -510 -496 -481 -484)(font \"Arial\" ))\n\t(pt -448 -480)\n\t(pt -520 -480)\n)\n(connector\n\t(text \"clk_rd\" (rect -78 -496 -49 -484)(font \"Arial\" ))\n\t(pt -16 -480)\n\t(pt -88 -480)\n)\n(connector\n\t(text \"clk_rd\" (rect 362 -496 391 -484)(font \"Arial\" ))\n\t(pt 352 -480)\n\t(pt 424 -480)\n)\n(connector\n\t(text \"clk_rd\" (rect 802 -496 831 -484)(font \"Arial\" ))\n\t(pt 792 -480)\n\t(pt 864 -480)\n)\n(connector\n\t(text \"clk_rd\" (rect 1432 -496 1461 -484)(font \"Arial\" ))\n\t(pt 1512 -480)\n\t(pt 1424 -480)\n)\n(connector\n\t(pt 1136 744)\n\t(pt 1096 744)\n)\n(connector\n\t(pt 904 1712)\n\t(pt 376 1712)\n)\n(connector\n\t(pt 920 1568)\n\t(pt 888 1568)\n)\n(connector\n\t(pt 904 1584)\n\t(pt 888 1584)\n)\n(connector\n\t(pt 904 1712)\n\t(pt 904 1584)\n)\n(connector\n\t(pt 96 1616)\n\t(pt 16 1616)\n)\n(connector\n\t(pt 1232 392)\n\t(pt 16 1632)\n)\n(connector\n\t(pt 752 552)\n\t(pt -160 1632)\n)\n(connector\n\t(pt 376 1712)\n\t(pt 376 1632)\n)\n(connector\n\t(pt 376 1632)\n\t(pt 392 1632)\n)\n(connector\n\t(pt 680 1584)\n\t(pt 600 1584)\n)\n(connector\n\t(pt 296 1600)\n\t(pt 392 1600)\n)\n(connector\n\t(pt 680 1600)\n\t(pt 600 1600)\n\t(bus)\n)\n(connector\n\t(pt 296 1616)\n\t(pt 392 1616)\n\t(bus)\n)\n(connector\n\t(pt 752 472)\n\t(pt 392 1648)\n)\n(connector\n\t(pt 752 488)\n\t(pt 392 1664)\n\t(bus)\n)\n(connector\n\t(pt -192 1616)\n\t(pt -160 1616)\n)\n(connector\n\t(pt 672 1568)\n\t(pt 680 1568)\n)\n(connector\n\t(pt 1096 1528)\n\t(pt 672 1528)\n)\n(connector\n\t(pt 384 1584)\n\t(pt 392 1584)\n)\n(connector\n\t(pt 384 1552)\n\t(pt 384 1584)\n)\n(connector\n\t(pt 1096 744)\n\t(pt 1096 848)\n)\n(connector\n\t(pt 1096 848)\n\t(pt 1096 1528)\n)\n(connector\n\t(pt 672 1528)\n\t(pt 672 1552)\n)\n(connector\n\t(pt 672 1552)\n\t(pt 672 1568)\n)\n(connector\n\t(pt 56 1552)\n\t(pt 384 1552)\n)\n(connector\n\t(pt 384 1552)\n\t(pt 672 1552)\n)\n(connector\n\t(text \"wraddress[12..0]\" (rect -510 -592 -429 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1256)\n)\n(connector\n\t(text \"clk_50_pllin\" (rect -518 904 -462 916)(font \"Arial\" ))\n\t(pt -448 920)\n\t(pt -528 920)\n)\n(connector\n\t(text \"clk_50\" (rect -79 952 -48 969)(font \"Intel Clear\" ))\n\t(pt -96 968)\n\t(pt -24 968)\n)\n(connector\n\t(text \"clk_mainadc\" (rect 1330 -208 1391 -196)(font \"Arial\" ))\n\t(pt 1320 -192)\n\t(pt 1432 -192)\n)\n(connector\n\t(text \"clk_mainadc2\" (rect 1330 -232 1397 -220)(font \"Arial\" ))\n\t(pt 1320 -216)\n\t(pt 1432 -216)\n)\n(connector\n\t(text \"displayin[2]\" (rect 1824 960 1880 972)(font \"Arial\" ))\n\t(pt 1440 976)\n\t(pt 1880 976)\n)\n(connector\n\t(text \"displayin[1]\" (rect 1826 920 1882 932)(font \"Arial\" ))\n\t(pt 1880 936)\n\t(pt 1400 936)\n)\n(connector\n\t(text \"do_usb\" (rect 889 952 924 964)(font \"Arial\" ))\n\t(pt 752 968)\n\t(pt 928 968)\n)\n(connector\n\t(pt 752 1192)\n\t(pt 1456 1528)\n)\n(connector\n\t(pt 1512 1488)\n\t(pt 1536 1488)\n\t(bus)\n)\n(connector\n\t(text \"digital_inputs[3]\" (rect 1698 -768 1774 -756)(font \"Arial\" ))\n\t(pt 1664 -752)\n\t(pt 1768 -752)\n)\n(connector\n\t(text \"digital_inputs[2]\" (rect 1696 -792 1772 -780)(font \"Arial\" ))\n\t(pt 1664 -776)\n\t(pt 1768 -776)\n)\n(connector\n\t(text \"digital_inputs[1]\" (rect 1693 -816 1769 -804)(font \"Arial\" ))\n\t(pt 1664 -800)\n\t(pt 1768 -800)\n)\n(connector\n\t(text \"digital_inputs[0]\" (rect 1694 -840 1770 -828)(font \"Arial\" ))\n\t(pt 1664 -824)\n\t(pt 1768 -824)\n)\n(connector\n\t(text \"digital_inputs[4..0]\" (rect 1432 -608 1521 -596)(font \"Arial\" ))\n\t(pt 1512 -592)\n\t(pt 1424 -592)\n\t(bus)\n)\n(connector\n\t(text \"digital_buffer1[4..0]\" (rect 1784 -552 1880 -540)(font \"Arial\" ))\n\t(pt 1768 -536)\n\t(pt 1880 -536)\n\t(bus)\n)\n(connector\n\t(pt 392 776)\n\t(pt 384 776)\n)\n(connector\n\t(pt 752 1304)\n\t(pt 760 1304)\n)\n(connector\n\t(pt 752 1320)\n\t(pt 760 1320)\n)\n(connector\n\t(pt 752 1336)\n\t(pt 760 1336)\n)\n(connector\n\t(pt 752 1352)\n\t(pt 760 1352)\n)\n(connector\n\t(pt 760 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392 -160)\n\t(bus)\n)\n(connector\n\t(pt 752 840)\n\t(pt 392 -144)\n\t(bus)\n)\n(connector\n\t(pt 752 856)\n\t(pt 392 -128)\n\t(bus)\n)\n(connector\n\t(pt 752 872)\n\t(pt 392 -112)\n\t(bus)\n)\n(connector\n\t(pt 752 904)\n\t(pt 392 -64)\n\t(bus)\n)\n(connector\n\t(pt 752 888)\n\t(pt 392 -80)\n)\n(connector\n\t(text \"clk_10\" (rect 322 -112 353 -100)(font \"Arial\" ))\n\t(pt 392 -96)\n\t(pt 312 -96)\n)\n(connector\n\t(pt 392 536)\n\t(pt 752 -288)\n)\n(connector\n\t(pt 392 648)\n\t(pt 752 -192)\n\t(bus)\n)\n(connector\n\t(text \"acquiring\" (rect 762 -224 805 -212)(font \"Arial\" ))\n\t(pt 752 -208)\n\t(pt 816 -208)\n)\n(connector\n\t(text \"trig_out[1]\" (rect 960 -304 1009 -292)(font \"Arial\" ))\n\t(pt 960 -288)\n\t(pt 1016 -288)\n)\n(connector\n\t(text \"trig_out[0]\" (rect 960 -320 1009 -308)(font \"Arial\" ))\n\t(pt 960 -304)\n\t(pt 1016 -304)\n)\n(connector\n\t(text \"clk_mainadc2\" (rect 317 -64 384 -52)(font \"Arial\" ))\n\t(pt 392 -48)\n\t(pt 312 -48)\n)\n(connector\n\t(pt 752 1096)\n\t(pt 392 -32)\n\t(bus)\n)\n(connector\n\t(text \"dout3[7..0]\" (rect 759 -160 812 -148)(font \"Arial\" ))\n\t(pt 752 -144)\n\t(pt 808 -144)\n\t(bus)\n)\n(connector\n\t(text \"dout1[7..0]\" (rect 760 -192 813 -180)(font \"Arial\" ))\n\t(pt 752 -176)\n\t(pt 808 -176)\n\t(bus)\n)\n(connector\n\t(text \"dout2[7..0]\" (rect 760 -176 813 -164)(font \"Arial\" ))\n\t(pt 752 -160)\n\t(pt 808 -160)\n\t(bus)\n)\n(connector\n\t(text \"dout4[7..0]\" (rect 757 -144 810 -132)(font \"Arial\" ))\n\t(pt 752 -128)\n\t(pt 808 -128)\n\t(bus)\n)\n(connector\n\t(pt 752 1144)\n\t(pt 392 -16)\n)\n(connector\n\t(pt 752 1160)\n\t(pt 392 16)\n)\n(connector\n\t(pt 752 1176)\n\t(pt 392 32)\n\t(bus)\n)\n(connector\n\t(text \"trigout[1]\" (rect 945 -176 988 -159)(font \"Intel Clear\" ))\n\t(pt 920 -160)\n\t(pt 992 -160)\n)\n(connector\n\t(text \"trigout[3]\" (rect 940 -144 983 -127)(font \"Intel Clear\" ))\n\t(pt 920 -128)\n\t(pt 992 -128)\n)\n(connector\n\t(text \"trigout[0]\" (rect 941 -192 984 -175)(font \"Intel Clear\" ))\n\t(pt 920 -176)\n\t(pt 992 -176)\n)\n(connector\n\t(text \"trigout[3..0]\" (rect 760 -128 814 -111)(font \"Intel Clear\" ))\n\t(pt 752 -112)\n\t(pt 840 -112)\n\t(bus)\n)\n(connector\n\t(text \"trigout[2]\" (rect 944 -160 987 -143)(font \"Intel Clear\" ))\n\t(pt 920 -144)\n\t(pt 992 -144)\n)\n(connector\n\t(pt 392 48)\n\t(pt 384 48)\n)\n(connector\n\t(pt 392 0)\n\t(pt 384 0)\n)\n(connector\n\t(pt 752 584)\n\t(pt 392 -240)\n)\n(connector\n\t(pt 752 1272)\n\t(pt 392 64)\n\t(bus)\n)\n(connector\n\t(pt 752 1288)\n\t(pt 392 80)\n)\n(connector\n\t(pt 392 616)\n\t(pt 752 -80)\n\t(bus)\n)\n(connector\n\t(text \"clk_50\" (rect 266 -416 297 -399)(font \"Intel Clear\" ))\n\t(pt 392 -400)\n\t(pt 56 -400)\n)\n(connector\n\t(text \"wraddress[12..0]\" (rect 866 -216 947 -204)(font \"Arial\" ))\n\t(pt 920 -224)\n\t(pt 752 -224)\n\t(bus)\n)\n(connector\n\t(text \"clk_mainadc\" (rect 321 -384 381 -367)(font \"Intel Clear\" ))\n\t(pt 312 -368)\n\t(pt 392 -368)\n)\n(connector\n\t(pt 752 1368)\n\t(pt 392 96)\n\t(bus)\n)\n(connector\n\t(pt 752 1384)\n\t(pt 392 112)\n\t(bus)\n)\n(connector\n\t(pt 56 -400)\n\t(pt 56 328)\n)\n(connector\n\t(pt 56 328)\n\t(pt 56 392)\n)\n(connector\n\t(pt 56 392)\n\t(pt 56 680)\n)\n(connector\n\t(pt 56 680)\n\t(pt 56 1552)\n)\n(connector\n\t(pt 56 1552)\n\t(pt 56 1600)\n)\n(connector\n\t(pt 1768 -704)\n\t(pt 1672 -704)\n)\n(connector\n\t(text \"digital_inputs[5]\" (rect 1696 -720 1772 -703)(font \"Intel Clear\" ))\n\t(pt 1672 -704)\n\t(pt 1664 -704)\n)\n(connector\n\t(pt 1664 -680)\n\t(pt 1672 -680)\n)\n(connector\n\t(text \"digital_inputs[6]\" (rect 1696 -696 1772 -679)(font \"Intel Clear\" ))\n\t(pt 1672 -680)\n\t(pt 1768 -680)\n)\n(connector\n\t(pt 1664 -656)\n\t(pt 1672 -656)\n)\n(connector\n\t(text \"digital_inputs[7]\" (rect 1695 -672 1771 -655)(font \"Intel Clear\" ))\n\t(pt 1672 -656)\n\t(pt 1768 -656)\n)\n(connector\n\t(pt 1664 -728)\n\t(pt 1672 -728)\n)\n(connector\n\t(text \"digital_inputs[4]\" (rect 1693 -744 1769 -727)(font \"Intel Clear\" ))\n\t(pt 1672 -728)\n\t(pt 1768 -728)\n)\n(connector\n\t(pt 752 1112)\n\t(pt 760 1112)\n)\n(connector\n\t(pt 760 1112)\n\t(pt 880 1112)\n)\n(connector\n\t(pt 752 1128)\n\t(pt 760 1128)\n)\n(connector\n\t(pt 760 1128)\n\t(pt 880 1128)\n)\n(connector\n\t(pt 752 504)\n\t(pt 776 504)\n)\n(connector\n\t(pt 776 504)\n\t(pt 912 504)\n)\n(connector\n\t(pt 752 520)\n\t(pt 776 520)\n)\n(connector\n\t(pt 776 520)\n\t(pt 912 520)\n)\n(connector\n\t(pt 392 128)\n\t(pt 752 1400)\n)\n(connector\n\t(text \"rdaddress[12..0]\" (rect 304 197 316 277)(font \"Arial\" )(vertical)(invisible))\n\t(pt 752 456)\n\t(pt 392 -256)\n\t(bus)\n)\n(connector\n\t(text \"rden\" (rect 358 -278 370 -257)(font \"Arial\" )(vertical)(invisible))\n\t(pt 752 440)\n\t(pt 392 -272)\n)\n(connector\n\t(pt 752 -64)\n\t(pt 392 792)\n\t(bus)\n)\n(connector\n\t(pt 752 1416)\n\t(pt 392 144)\n)\n(junction (pt 56 328))\n(junction (pt 56 392))\n(junction (pt 56 680))\n(junction (pt 1440 848))\n(junction (pt 1136 848))\n(junction (pt 1096 848))\n(junction (pt 1152 920))\n(junction (pt 384 328))\n(junction (pt 1456 816))\n(junction (pt 1472 848))\n(junction (pt 384 1552))\n(junction (pt 56 1552))\n(junction (pt 672 1552))\n(junction (pt 776 520))\n(junction (pt 776 504))\n(junction (pt 760 1112))\n(junction (pt 760 1128))\n(junction (pt 1672 -704))\n(junction (pt 1672 -680))\n(junction (pt 1672 -656))\n(junction (pt 1672 -728))\n"
  },
  {
    "path": "max10_adc_firmware/serial1.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 16 16 192 112)\r\n\t(text \"serial1\" (rect 5 0 42 14)(font \"Arial\" (font_size 8)))\r\n\t(text \"inst\" (rect 8 80 25 92)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"din[7..0]\" (rect 0 0 44 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"din[7..0]\" (rect 21 27 65 41)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"clock1\" (rect 0 0 36 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clock1\" (rect 21 43 57 57)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 48)(pt 16 48))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"232_in\" (rect 0 0 37 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"232_in\" (rect 21 59 58 73)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 16 64))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 32)\r\n\t\t(output)\r\n\t\t(text \"clk_flash_out\" (rect 0 0 75 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clk_flash_out\" (rect 80 27 155 41)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 176 32)(pt 160 32))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 48)\r\n\t\t(output)\r\n\t\t(text \"232_out\" (rect 0 0 46 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"232_out\" (rect 109 43 155 57)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 176 48)(pt 160 48))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 160 80))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware/serial1.cdf",
    "content": "/* Quartus Prime Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition */\nJedecChain;\n\tFileRevision(JESD32A);\n\tDefaultMfr(6E);\n\n\tP ActionCode(Cfg)\n\t\tDevice PartName(10M08SAE144ES) Path(\"C:/gitwork/master/Haasoscope/max10_adc_firmware/output_files/\") File(\"serial1.sof\") MfrSpec(OpMask(1));\n\nChainEnd;\n\nAlteraBegin;\n\tChainType(JTAG);\nAlteraEnd;\n"
  },
  {
    "path": "max10_adc_firmware/serial1.ipregen.rpt",
    "content": "IP Upgrade report for serial1\nWed Jun 02 21:48:53 2021\nQuartus Prime Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition\n\n\n---------------------\n; Table of Contents ;\n---------------------\n  1. Legal Notice\n  2. IP Upgrade Summary\n  3. IP Upgrade Messages\n\n\n\n----------------\n; Legal Notice ;\n----------------\nCopyright (C) 2018  Intel Corporation. All rights reserved.\nYour use of Intel Corporation's design tools, logic functions \nand other software and tools, and its AMPP partner logic \nfunctions, and any output files from any of the foregoing \n(including device programming or simulation files), and any \nassociated documentation or information are expressly subject \nto the terms and conditions of the Intel Program License \nSubscription Agreement, the Intel Quartus Prime License Agreement,\nthe Intel FPGA IP License Agreement, or other applicable license\nagreement, including, without limitation, that your use is for\nthe sole purpose of programming logic devices manufactured by\nIntel and sold by Intel or its authorized distributors.  Please\nrefer to the applicable agreement for further details.\n\n\n\n+----------------------------------------------------------------------------+\n; IP Upgrade Summary                                                         ;\n+------------------------------+---------------------------------------------+\n; IP Components Upgrade Status ; Failed - Wed Jun 02 21:48:53 2021           ;\n; Quartus Prime Version        ; 18.0.0 Build 614 04/24/2018 SJ Lite Edition ;\n; Revision Name                ; serial1                                     ;\n; Top-level Entity Name        ; serial1                                     ;\n; Family                       ; MAX 10                                      ;\n+------------------------------+---------------------------------------------+\n\n\n+---------------------+\n; IP Upgrade Messages ;\n+---------------------+\nInfo (23030): Evaluation of Tcl script c:/intelfpga_lite/18.0/quartus/common/tcl/internal/ip_regen/ip_regen.tcl was successful\nInfo: Quartus Prime Shell was successful. 0 errors, 0 warnings\n    Info: Peak virtual memory: 4851 megabytes\n    Info: Processing ended: Wed Jun 02 21:48:53 2021\n    Info: Elapsed time: 00:00:10\n    Info: Total CPU time (on all processors): 00:00:23\n\n\n"
  },
  {
    "path": "max10_adc_firmware/serial1.qpf",
    "content": "# -------------------------------------------------------------------------- #\r\n#\r\n# Copyright (C) 1991-2013 Altera Corporation\r\n# Your use of Altera Corporation's design tools, logic functions \r\n# and other software and tools, and its AMPP partner logic \r\n# functions, and any output files from any of the foregoing \r\n# (including device programming or simulation files), and any \r\n# associated documentation or information are expressly subject \r\n# to the terms and conditions of the Altera Program License \r\n# Subscription Agreement, Altera MegaCore Function License \r\n# Agreement, or other applicable license agreement, including, \r\n# without limitation, that your use is for the sole purpose of \r\n# programming logic devices manufactured by Altera and sold by \r\n# Altera or its authorized distributors.  Please refer to the \r\n# applicable agreement for further details.\r\n#\r\n# -------------------------------------------------------------------------- #\r\n#\r\n# Quartus II 32-bit\r\n# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition\r\n# Date created = 17:22:48  September 13, 2016\r\n#\r\n# -------------------------------------------------------------------------- #\r\n\r\nQUARTUS_VERSION = \"13.0\"\r\nDATE = \"17:22:48  September 13, 2016\"\r\n\r\n# Revisions\r\n\r\nPROJECT_REVISION = \"serial1\"\r\n"
  },
  {
    "path": "max10_adc_firmware/serial1.qsf",
    "content": "# -------------------------------------------------------------------------- #\n#\n# Copyright (C) 1991-2013 Altera Corporation\n# Your use of Altera Corporation's design tools, logic functions \n# and other software and tools, and its AMPP partner logic \n# functions, and any output files from any of the foregoing \n# (including device programming or simulation files), and any \n# associated documentation or information are expressly subject \n# to the terms and conditions of the Altera Program License \n# Subscription Agreement, Altera MegaCore Function License \n# Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by \n# Altera or its authorized distributors.  Please refer to the \n# applicable agreement for further details.\n#\n# -------------------------------------------------------------------------- #\n#\n# Quartus II 32-bit\n# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition\n# Date created = 17:22:48  September 13, 2016\n#\n# -------------------------------------------------------------------------- #\n#\n# Notes:\n#\n# 1) The default values for assignments are stored in the file:\n#\t\tserial1_assignment_defaults.qdf\n#    If this file doesn't exist, see file:\n#\t\tassignment_defaults.qdf\n#\n# 2) Altera recommends that you do not modify this file. This\n#    file is updated automatically by the Quartus II software\n#    and any changes you make may be lost or overwritten.\n#\n# -------------------------------------------------------------------------- #\n\n\nset_global_assignment -name FAMILY \"MAX 10\"\nset_global_assignment -name DEVICE 10M08SAE144C8GES\nset_global_assignment -name TOP_LEVEL_ENTITY serial1\nset_global_assignment -name ORIGINAL_QUARTUS_VERSION \"13.0 SP1\"\nset_global_assignment -name PROJECT_CREATION_TIME_DATE \"17:22:48  SEPTEMBER 13, 2016\"\nset_global_assignment -name LAST_QUARTUS_VERSION \"18.0.0 Lite Edition\"\nset_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files\nset_global_assignment -name MIN_CORE_JUNCTION_TEMP 0\nset_global_assignment -name MAX_CORE_JUNCTION_TEMP 85\nset_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 2\nset_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top\nset_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top\nset_global_assignment -name PARTITION_COLOR 16764057 -section_id Top\nset_global_assignment -name STRATIX_DEVICE_IO_STANDARD \"3.3-V LVTTL\"\nset_location_assignment PIN_93 -to 232_in\nset_location_assignment PIN_92 -to 232_out\nset_location_assignment PIN_33 -to clk_flash_out\nset_location_assignment PIN_38 -to din1[7]\nset_location_assignment PIN_39 -to din1[6]\nset_location_assignment PIN_41 -to din1[5]\nset_location_assignment PIN_43 -to din1[4]\nset_location_assignment PIN_44 -to din1[3]\nset_location_assignment PIN_45 -to din1[2]\nset_location_assignment PIN_46 -to din1[1]\nset_location_assignment PIN_47 -to din1[0]\nset_location_assignment PIN_50 -to din2[7]\nset_location_assignment PIN_52 -to din2[6]\nset_location_assignment PIN_54 -to din2[5]\nset_location_assignment PIN_55 -to din2[4]\nset_location_assignment PIN_56 -to din2[3]\nset_location_assignment PIN_57 -to din2[2]\nset_location_assignment PIN_58 -to din2[1]\nset_location_assignment PIN_59 -to din2[0]\nset_location_assignment PIN_60 -to din3[7]\nset_location_assignment PIN_62 -to din3[6]\nset_location_assignment PIN_64 -to din3[5]\nset_location_assignment PIN_65 -to din3[4]\nset_location_assignment PIN_66 -to din3[3]\nset_location_assignment PIN_69 -to din3[2]\nset_location_assignment PIN_70 -to din3[1]\nset_location_assignment PIN_74 -to din3[0]\nset_location_assignment PIN_75 -to din4[7]\nset_location_assignment PIN_76 -to din4[6]\nset_location_assignment PIN_77 -to din4[5]\nset_location_assignment PIN_78 -to din4[4]\nset_location_assignment PIN_79 -to din4[3]\nset_location_assignment PIN_81 -to din4[2]\nset_location_assignment PIN_84 -to din4[1]\nset_location_assignment PIN_85 -to din4[0]\nset_location_assignment PIN_96 -to 232_out2\nset_location_assignment PIN_29 -to outclk_pin\nset_location_assignment PIN_86 -to trig_in_towards_left\nset_location_assignment PIN_87 -to trig_out_to_right\nset_location_assignment PIN_106 -to trig_out_to_left\nset_global_assignment -name PROJECT_IP_REGENERATION_POLICY ALWAYS_REGENERATE_IP\nset_global_assignment -name POWER_PRESET_COOLING_SOLUTION \"23 MM HEAT SINK WITH 200 LFPM AIRFLOW\"\nset_global_assignment -name POWER_BOARD_THERMAL_MODEL \"NONE (CONSERVATIVE)\"\nset_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON\nset_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE \"12.5 %\"\nset_location_assignment PIN_27 -to clock_ext_osc\nset_location_assignment PIN_26 -to clock_in\nset_parameter -name SERIAL_BAUD_RATE 1500000\nset_location_assignment PIN_22 -to outsel_out\nset_location_assignment PIN_25 -to format_out\nset_location_assignment PIN_24 -to div_out\nset_global_assignment -name EDA_SIMULATION_TOOL \"ModelSim-Altera (Verilog)\"\nset_global_assignment -name EDA_TIME_SCALE \"1 ps\" -section_id eda_simulation\nset_global_assignment -name EDA_OUTPUT_DATA_FORMAT \"VERILOG HDL\" -section_id eda_simulation\nset_global_assignment -name EDA_USER_COMPILED_SIMULATION_LIBRARY_DIRECTORY \"C:\\\\haas\\\\Dropbox\\\\documents\\\\FPGA\\\\QuartusII\\\\serial_vga_pong_max10_adc\\\\simulation\\\\modelsim\" -section_id eda_simulation\nset_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST ON -section_id eda_simulation\nset_location_assignment PIN_98 -to 232_in2\nset_parameter -name ADC_RAM_WIDTH 12\nset_location_assignment PIN_32 -to clk_flash_out_2\nset_location_assignment PIN_21 -to i2c_sda\nset_location_assignment PIN_141 -to i2c_scl\nset_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS ON\nset_global_assignment -name OPTIMIZATION_MODE \"HIGH PERFORMANCE EFFORT\"\nset_location_assignment PIN_132 -to usb_wr\nset_location_assignment PIN_127 -to usb_txe_busy\nset_location_assignment PIN_134 -to usb_clk60\nset_location_assignment PIN_131 -to usb_siwu\nset_location_assignment PIN_110 -to pin_110\nset_location_assignment PIN_111 -to pin_111\nset_location_assignment PIN_113 -to pin_113\nset_location_assignment PIN_114 -to pin_114\nset_location_assignment PIN_118 -to pin_118\nset_location_assignment PIN_119 -to pin_119\nset_location_assignment PIN_122 -to pin_122\nset_location_assignment PIN_121 -to ext_trig_in\nset_location_assignment PIN_88 -to digital_in1\nset_location_assignment PIN_105 -to pin_105\nset_location_assignment PIN_28 -to trig_in_towards_right\nset_location_assignment PIN_101 -to trigout0_6\nset_location_assignment PIN_102 -to spareleft\nset_location_assignment PIN_99 -to spareright\nset_location_assignment PIN_130 -to usb_rd\nset_location_assignment PIN_135 -to usb_oe\nset_location_assignment PIN_124 -to usb_rxf\nset_location_assignment PIN_140 -to usb_pwrsv\nset_location_assignment PIN_89 -to debug1 -disable\nset_location_assignment PIN_90 -to debug2 -disable\nset_location_assignment PIN_91 -to debug3 -disable\nset_location_assignment PIN_100 -to debug4 -disable\nset_location_assignment PIN_89 -to digital_in2\nset_location_assignment PIN_90 -to digital_in3\nset_location_assignment PIN_91 -to digital_in4\nset_location_assignment PIN_100 -to digital_in5\nset_global_assignment -name BDF_FILE serial1.bdf\nset_global_assignment -name SDC_FILE serial1.sdc\nset_global_assignment -name VERILOG_FILE oscillo.v\nset_global_assignment -name VERILOG_FILE serialprocessor.v\nset_global_assignment -name VERILOG_FILE serialprocessor_slave.v\nset_global_assignment -name VHDL_FILE SSD1306.vhd\nset_global_assignment -name VHDL_FILE SPI.vhd\nset_global_assignment -name VHDL_FILE i2c_master.vhd\nset_global_assignment -name VERILOG_FILE async.v\nset_global_assignment -name VERILOG_FILE demux1.v\nset_global_assignment -name QIP_FILE mypll2.qip\nset_global_assignment -name QIP_FILE ram1.qip\nset_global_assignment -name QIP_FILE dpram2.qip\nset_global_assignment -name QIP_FILE lp_ram_dp.qip\nset_global_assignment -name QIP_FILE lp_ram_dp_2.qip\nset_global_assignment -name QIP_FILE myadc/synthesis/myadc.qip\nset_global_assignment -name QIP_FILE uniqueid2.qip\nset_global_assignment -name SIP_FILE uniqueid2.sip\nset_global_assignment -name CDF_FILE Chain1.cdf\nset_global_assignment -name CDF_FILE Chain2.cdf\nset_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top"
  },
  {
    "path": "max10_adc_firmware/serial1.sdc",
    "content": "## Generated SDC file \"serial1.sdc\"\n\n## Copyright (C) 2018  Intel Corporation. All rights reserved.\n## Your use of Intel Corporation's design tools, logic functions \n## and other software and tools, and its AMPP partner logic \n## functions, and any output files from any of the foregoing \n## (including device programming or simulation files), and any \n## associated documentation or information are expressly subject \n## to the terms and conditions of the Intel Program License \n## Subscription Agreement, the Intel Quartus Prime License Agreement,\n## the Intel FPGA IP License Agreement, or other applicable license\n## agreement, including, without limitation, that your use is for\n## the sole purpose of programming logic devices manufactured by\n## Intel and sold by Intel or its authorized distributors.  Please\n## refer to the applicable agreement for further details.\n\n\n## VENDOR  \"Altera\"\n## PROGRAM \"Quartus Prime\"\n## VERSION \"Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition\"\n\n## DATE    \"Sat May 22 11:51:39 2021\"\n\n##\n## DEVICE  \"10M08SAE144C8GES\"\n##\n\n\n#**************************************************************\n# Time Information\n#**************************************************************\n\nset_time_format -unit ns -decimal_places 3\n\n\n#**************************************************************\n# Create Clock\n#**************************************************************\n\ncreate_clock -name {clock_ext_osc} -period 20.000 -waveform { 0.000 10.000 } [get_ports {clock_ext_osc}]\ncreate_clock -name {scanclk} -period 100.000 -waveform { 0.000 50.000 } [get_registers {processor:inst|scanclk}]\ncreate_clock -name {usb_clk60} -period 16.666 -waveform { 0.000 8.333 } [get_ports {usb_clk60}]\n\n\n#**************************************************************\n# Create Generated Clock\n#**************************************************************\n\ncreate_generated_clock -name {clk_slowadc10} -source [get_pins {inst15|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 1 -divide_by 5 -master_clock {clock_ext_osc} [get_pins {inst15|altpll_component|auto_generated|pll1|clk[0]}] \ncreate_generated_clock -name {clk_mainadc} -source [get_pins {inst15|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 5 -divide_by 2 -master_clock {clock_ext_osc} [get_pins {inst15|altpll_component|auto_generated|pll1|clk[1]}] \ncreate_generated_clock -name {clk_50} -source [get_pins {inst15|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 1 -divide_by 1 -master_clock {clock_ext_osc} [get_pins {inst15|altpll_component|auto_generated|pll1|clk[3]}] \ncreate_generated_clock -name {clk_mainadc2} -source [get_pins {inst15|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 5 -divide_by 2 -phase 180/1 -master_clock {clock_ext_osc} [get_pins {inst15|altpll_component|auto_generated|pll1|clk[4]}] \n\n#**************************************************************\n# Set Clock Latency\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Clock Uncertainty\n#**************************************************************\n\nderive_clock_uncertainty\n\n#**************************************************************\n# Set Input Delay\n#**************************************************************\n\nset_input_delay -clock { clk_50 } 1 [get_ports 232_in*]\nset_input_delay -clock { clk_50 } 1 [get_ports clock_in]\nset_input_delay -clock { clk_50 } 1 [get_ports i2c_*]\n\nset_input_delay -clock { usb_clk60 } 1 {usb_txe_busy usb_clk60 usb_rxf}\n\nset_input_delay -clock { clk_mainadc } 1 [get_ports ext_trig_in]\nset_input_delay -clock { clk_mainadc } 1 [get_ports spareleft]\nset_input_delay -clock { clk_mainadc } 1 [get_ports trig_in*]\n\nset_input_delay -clock { clk_mainadc } 1 [get_ports din1*]\nset_input_delay -clock { clk_mainadc } 1 [get_ports din2*]\nset_input_delay -clock { clk_mainadc2 } 1 [get_ports din3*]\nset_input_delay -clock { clk_mainadc2 } 1 [get_ports din4*]\nset_input_delay -clock { clk_mainadc } -max -4 [get_ports digital_in*]\nset_input_delay -clock { clk_mainadc } -min 4 [get_ports digital_in*]\n\n\n#**************************************************************\n# Set Output Delay\n#**************************************************************\n\nset_output_delay -clock { clk_50 } 1 [get_ports debug*]\nset_output_delay -clock { clk_50 } 1 [get_ports 232_out*]\nset_output_delay -clock { clk_50 } 1 [get_ports div_out]\nset_output_delay -clock { clk_50 } 1 [get_ports format_out]\nset_output_delay -clock { clk_50 } 1 [get_ports outsel_out]\nset_output_delay -clock { clk_50 } 1 [get_ports i2c_*]\nset_output_delay -clock { clk_50 } 1 [get_ports outclk_pin]\n\nset_output_delay -clock { clk_50 } 1 [get_ports pin_*]\nset_output_delay -clock { usb_clk60 } 1 [get_ports pin_*] -add_delay\n\nset_output_delay -clock { clk_mainadc } -1 [get_ports spareright]\nset_output_delay -clock { clk_mainadc } -1 [get_ports trigout*]\nset_output_delay -clock { clk_mainadc } -2 [get_ports trig_out*]\n\nset_output_delay -clock { clk_50 } -min 1 {usb_wr usb_siwu usb_pwrsv usb_oe usb_rd}\nset_output_delay -clock { clk_50 } -max 1 {usb_wr usb_siwu usb_pwrsv usb_oe usb_rd}\nset_output_delay -clock { usb_clk60 } -min 1 {usb_wr usb_siwu usb_pwrsv usb_oe usb_rd} -add_delay\nset_output_delay -clock { usb_clk60 } -max 1 {usb_wr usb_siwu usb_pwrsv usb_oe usb_rd} -add_delay\nset_output_delay -clock { clk_mainadc } -min 1 [get_ports clk_flash_out]\nset_output_delay -clock { clk_mainadc } -max 0 [get_ports clk_flash_out]\nset_output_delay -clock { clk_mainadc2 } -min 1 [get_ports clk_flash_out_2]\nset_output_delay -clock { clk_mainadc2 } -max 0 [get_ports clk_flash_out_2]\n\n\n#**************************************************************\n# Set Clock Groups\n#**************************************************************\n\nset_clock_groups -asynchronous -group {clock_ext_osc clk_slowadc10 clk_mainadc clk_50 clk_mainadc2} -group {usb_clk60}\n\n#**************************************************************\n# Set False Path\n#**************************************************************\n\nset_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}]\nset_false_path -from [get_keepers {**}] -to [get_keepers {*phasedone_state*}]\nset_false_path -from [get_keepers {**}] -to [get_keepers {*internal_phasestep*}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[0]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[0]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[1]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[1]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[2]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[2]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[3]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[3]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[4]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[4]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[5]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[5]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[6]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[6]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[7]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[7]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[8]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[8]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[9]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[9]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[10]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[10]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[11]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[11]}]\nset_false_path -from [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|chsel[*]}] -to [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|chsel[*]}]\nset_false_path -from [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|soc}] -to [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|soc}]\n\n#slow signals we don't care about being on time\nset_false_path -from [get_registers processor:inst|triggertot*]\nset_false_path -to [get_registers processor:inst|screencolumndata*]\nset_false_path -to [get_registers processor:inst|screenwren*]\nset_false_path -from [get_registers processor:inst|rollingtrigger*]\nset_false_path -from [get_registers processor:inst|highres*]\nset_false_path -from [get_registers processor:inst|send_fast_usb2_done]\nset_false_path -from [get_registers processor:inst|send_fast_usb2]\nset_false_path -from [get_registers processor:inst|blockstosend*]\nset_false_path -from [get_registers processor:inst|do_usb]\nset_false_path -from [get_registers processor:inst|do_fast_usb]\nset_false_path -from [get_registers processor:inst|imthelast]\nset_false_path -from [get_registers processor:inst|noselftrig]\nset_false_path -from [get_registers processor:inst|trigchannels*]\nset_false_path -from [get_registers processor:inst|myid*]\nset_false_path -from [get_registers processor:inst|triggerpoint*]\nset_false_path -from [get_registers processor:inst|trigthresh*]\nset_false_path -from [get_registers processor:inst|nselftrigcoincidentreq*]\n\n#ignore for now, don't understand it\n#set_false_path -from [get_registers processor:inst|clockbitstowaitlockin*]\n#ignore for now, not sure how to fix it\nset_false_path -to [get_registers processor:inst|lockinresult*]\n#probably don't care about these\n#set_false_path -to [get_registers processor:inst|sendincrementfast*]\n#set_false_path -from [get_registers lp_ram_dp*] -to [get_registers processor:inst|chan*mean*]\n#set_false_path -from [get_registers lp_ram_dp*] -to [get_registers processor:inst|txData*]\n#set_false_path -from [get_registers processor:inst|rden] -to [get_registers lp_ram_dp*]\n#set_false_path -from [get_registers *triggerpoint*] -to [get_registers *rdaddress*]\n#set_false_path -from [get_registers *nsmp*] -to [get_registers *nsmp2*]\n#set_false_path -from [get_registers processor:inst|rdaddress_slow*]\n#set_false_path -from [get_registers processor:inst|rdaddress2_slow*]\n#set_false_path -to [get_registers processor:inst|usb_dataio_slow*]\n\n\n#**************************************************************\n# Set Multicycle Path\n#**************************************************************\n\nset_multicycle_path -from [get_clocks {scanclk}] -to [get_clocks {clk_50}] -hold -end 2\n\nset_multicycle_path -from {clk_mainadc} -to {clk_flash_out} -setup -end 2\nset_multicycle_path -from {clk_mainadc2} -to {clk_flash_out_2} -setup -end 2\nset_multicycle_path -from {clk_mainadc} -to {clk_flash_out} -hold -end 2\nset_multicycle_path -from {clk_mainadc2} -to {clk_flash_out_2} -hold -end 2\n\n#**************************************************************\n# Set Maximum Delay\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Minimum Delay\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Input Transition\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Net Delay\n#**************************************************************\n\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|eoc}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|eoc}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|clk_dft}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|clk_dft}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[0]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[1]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[2]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[3]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[4]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[5]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[6]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[7]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[8]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[9]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[10]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[11]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[0]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[1]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[2]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[3]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[4]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[5]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[6]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[7]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[8]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[9]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[10]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[11]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|u_control_fsm|chsel[*]|q}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|u_control_fsm|chsel[*]|q}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|u_control_fsm|soc|q}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|u_control_fsm|soc|q}]\n"
  },
  {
    "path": "max10_adc_firmware/serial1.sdc.bak",
    "content": "## Generated SDC file \"serial1.sdc\"\n\n## Copyright (C) 2018  Intel Corporation. All rights reserved.\n## Your use of Intel Corporation's design tools, logic functions \n## and other software and tools, and its AMPP partner logic \n## functions, and any output files from any of the foregoing \n## (including device programming or simulation files), and any \n## associated documentation or information are expressly subject \n## to the terms and conditions of the Intel Program License \n## Subscription Agreement, the Intel Quartus Prime License Agreement,\n## the Intel FPGA IP License Agreement, or other applicable license\n## agreement, including, without limitation, that your use is for\n## the sole purpose of programming logic devices manufactured by\n## Intel and sold by Intel or its authorized distributors.  Please\n## refer to the applicable agreement for further details.\n\n\n## VENDOR  \"Altera\"\n## PROGRAM \"Quartus Prime\"\n## VERSION \"Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition\"\n\n## DATE    \"Sat May 22 11:51:39 2021\"\n\n##\n## DEVICE  \"10M08SAE144C8GES\"\n##\n\n\n#**************************************************************\n# Time Information\n#**************************************************************\n\nset_time_format -unit ns -decimal_places 3\n\n\n\n#**************************************************************\n# Create Clock\n#**************************************************************\n\ncreate_clock -name {clock_ext_osc} -period 1.000 -waveform { 0.000 0.500 } [get_ports {clock_ext_osc}]\ncreate_clock -name {processor:inst|scanclk} -period 1.000 -waveform { 0.000 0.500 } [get_registers {processor:inst|scanclk}]\ncreate_clock -name {usb_clk60} -period 1.000 -waveform { 0.000 0.500 } [get_ports {usb_clk60}]\n\n\n#**************************************************************\n# Create Generated Clock\n#**************************************************************\n\ncreate_generated_clock -name {inst15|altpll_component|auto_generated|pll1|clk[0]} -source [get_pins {inst15|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 1 -divide_by 5 -master_clock {clock_ext_osc} [get_pins {inst15|altpll_component|auto_generated|pll1|clk[0]}] \ncreate_generated_clock -name {inst15|altpll_component|auto_generated|pll1|clk[1]} -source [get_pins {inst15|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 5 -divide_by 2 -master_clock {clock_ext_osc} [get_pins {inst15|altpll_component|auto_generated|pll1|clk[1]}] \ncreate_generated_clock -name {inst15|altpll_component|auto_generated|pll1|clk[4]} -source [get_pins {inst15|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 5 -divide_by 2 -phase 180/1 -master_clock {clock_ext_osc} [get_pins {inst15|altpll_component|auto_generated|pll1|clk[4]}] \n\n\n#**************************************************************\n# Set Clock Latency\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Clock Uncertainty\n#**************************************************************\n\nset_clock_uncertainty -rise_from [get_clocks {usb_clk60}] -rise_to [get_clocks {usb_clk60}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {usb_clk60}] -fall_to [get_clocks {usb_clk60}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {usb_clk60}] -rise_to [get_clocks {clock_ext_osc}] -setup 0.100  \nset_clock_uncertainty -rise_from [get_clocks {usb_clk60}] -rise_to [get_clocks {clock_ext_osc}] -hold 0.130  \nset_clock_uncertainty -rise_from [get_clocks {usb_clk60}] -fall_to [get_clocks {clock_ext_osc}] -setup 0.100  \nset_clock_uncertainty -rise_from [get_clocks {usb_clk60}] -fall_to [get_clocks {clock_ext_osc}] -hold 0.130  \nset_clock_uncertainty -fall_from [get_clocks {usb_clk60}] -rise_to [get_clocks {usb_clk60}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {usb_clk60}] -fall_to [get_clocks {usb_clk60}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {usb_clk60}] -rise_to [get_clocks {clock_ext_osc}] -setup 0.100  \nset_clock_uncertainty -fall_from [get_clocks {usb_clk60}] -rise_to [get_clocks {clock_ext_osc}] -hold 0.130  \nset_clock_uncertainty -fall_from [get_clocks {usb_clk60}] -fall_to [get_clocks {clock_ext_osc}] -setup 0.100  \nset_clock_uncertainty -fall_from [get_clocks {usb_clk60}] -fall_to [get_clocks {clock_ext_osc}] -hold 0.130  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {usb_clk60}] -setup 0.130  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {usb_clk60}] -hold 0.100  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {usb_clk60}] -setup 0.130  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {usb_clk60}] -hold 0.100  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {clock_ext_osc}]  0.130  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {clock_ext_osc}]  0.130  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {processor:inst|scanclk}] -setup 0.120  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {processor:inst|scanclk}] -hold 0.100  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {processor:inst|scanclk}] -setup 0.120  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {processor:inst|scanclk}] -hold 0.100  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -setup 0.110  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -hold 0.140  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -setup 0.110  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -hold 0.140  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -setup 0.110  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -hold 0.140  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -setup 0.110  \nset_clock_uncertainty -rise_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -hold 0.140  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {usb_clk60}] -setup 0.130  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {usb_clk60}] -hold 0.100  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {usb_clk60}] -setup 0.130  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {usb_clk60}] -hold 0.100  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {clock_ext_osc}]  0.130  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {clock_ext_osc}]  0.130  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {processor:inst|scanclk}] -setup 0.120  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {processor:inst|scanclk}] -hold 0.100  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {processor:inst|scanclk}] -setup 0.120  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {processor:inst|scanclk}] -hold 0.100  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -setup 0.110  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -hold 0.140  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -setup 0.110  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -hold 0.140  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -setup 0.110  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -hold 0.140  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -setup 0.110  \nset_clock_uncertainty -fall_from [get_clocks {clock_ext_osc}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -hold 0.140  \nset_clock_uncertainty -rise_from [get_clocks {processor:inst|scanclk}] -rise_to [get_clocks {clock_ext_osc}] -setup 0.100  \nset_clock_uncertainty -rise_from [get_clocks {processor:inst|scanclk}] -rise_to [get_clocks {clock_ext_osc}] -hold 0.120  \nset_clock_uncertainty -rise_from [get_clocks {processor:inst|scanclk}] -fall_to [get_clocks {clock_ext_osc}] -setup 0.100  \nset_clock_uncertainty -rise_from [get_clocks {processor:inst|scanclk}] -fall_to [get_clocks {clock_ext_osc}] -hold 0.120  \nset_clock_uncertainty -rise_from [get_clocks {processor:inst|scanclk}] -rise_to [get_clocks {processor:inst|scanclk}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {processor:inst|scanclk}] -fall_to [get_clocks {processor:inst|scanclk}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {processor:inst|scanclk}] -rise_to [get_clocks {clock_ext_osc}] -setup 0.100  \nset_clock_uncertainty -fall_from [get_clocks {processor:inst|scanclk}] -rise_to [get_clocks {clock_ext_osc}] -hold 0.120  \nset_clock_uncertainty -fall_from [get_clocks {processor:inst|scanclk}] -fall_to [get_clocks {clock_ext_osc}] -setup 0.100  \nset_clock_uncertainty -fall_from [get_clocks {processor:inst|scanclk}] -fall_to [get_clocks {clock_ext_osc}] -hold 0.120  \nset_clock_uncertainty -fall_from [get_clocks {processor:inst|scanclk}] -rise_to [get_clocks {processor:inst|scanclk}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {processor:inst|scanclk}] -fall_to [get_clocks {processor:inst|scanclk}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[4]}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[4]}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[4]}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[4]}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {usb_clk60}] -setup 0.130  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {usb_clk60}] -hold 0.110  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {usb_clk60}] -setup 0.130  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {usb_clk60}] -hold 0.110  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {clock_ext_osc}] -setup 0.140  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {clock_ext_osc}] -hold 0.110  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {clock_ext_osc}] -setup 0.140  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {clock_ext_osc}] -hold 0.110  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[4]}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[4]}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {usb_clk60}] -setup 0.130  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {usb_clk60}] -hold 0.110  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {usb_clk60}] -setup 0.130  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {usb_clk60}] -hold 0.110  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {clock_ext_osc}] -setup 0.140  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {clock_ext_osc}] -hold 0.110  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {clock_ext_osc}] -setup 0.140  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {clock_ext_osc}] -hold 0.110  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[4]}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[4]}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[1]}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -rise_to [get_clocks {clock_ext_osc}] -setup 0.140  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -rise_to [get_clocks {clock_ext_osc}] -hold 0.110  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -fall_to [get_clocks {clock_ext_osc}] -setup 0.140  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -fall_to [get_clocks {clock_ext_osc}] -hold 0.110  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}]  0.070  \nset_clock_uncertainty -rise_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -rise_to [get_clocks {clock_ext_osc}] -setup 0.140  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -rise_to [get_clocks {clock_ext_osc}] -hold 0.110  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -fall_to [get_clocks {clock_ext_osc}] -setup 0.140  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -fall_to [get_clocks {clock_ext_osc}] -hold 0.110  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -rise_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}]  0.070  \nset_clock_uncertainty -fall_from [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}] -fall_to [get_clocks {inst15|altpll_component|auto_generated|pll1|clk[0]}]  0.070  \n\n\n#**************************************************************\n# Set Input Delay\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Output Delay\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Clock Groups\n#**************************************************************\n\n\n\n#**************************************************************\n# Set False Path\n#**************************************************************\n\nset_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}]\nset_false_path -from [get_keepers {**}] -to [get_keepers {*phasedone_state*}]\nset_false_path -from [get_keepers {**}] -to [get_keepers {*internal_phasestep*}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[0]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[0]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[1]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[1]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[2]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[2]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[3]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[3]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[4]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[4]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[5]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[5]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[6]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[6]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[7]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[7]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[8]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[8]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[9]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[9]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[10]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[10]}]\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[11]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[11]}]\nset_false_path -from [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|chsel[*]}] -to [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|chsel[*]}]\nset_false_path -from [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|soc}] -to [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|soc}]\n\n\n#**************************************************************\n# Set Multicycle Path\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Maximum Delay\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Minimum Delay\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Input Transition\n#**************************************************************\n\n\n\n#**************************************************************\n# Set Net Delay\n#**************************************************************\n\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|eoc}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|eoc}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|clk_dft}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|clk_dft}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[0]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[1]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[2]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[3]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[4]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[5]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[6]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[7]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[8]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[9]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[10]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[11]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[0]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[1]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[2]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[3]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[4]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[5]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[6]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[7]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[8]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[9]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[10]}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[11]}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|u_control_fsm|chsel[*]|q}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|u_control_fsm|chsel[*]|q}]\nset_net_delay -max 5.000 -from [get_pins -compatibility_mode {*|u_control_fsm|soc|q}]\nset_net_delay -min 0.000 -from [get_pins -compatibility_mode {*|u_control_fsm|soc|q}]\n"
  },
  {
    "path": "max10_adc_firmware/serial1_assignment_defaults.qdf",
    "content": "# -------------------------------------------------------------------------- #\r\n#\r\n# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n# Your use of Altera Corporation's design tools, logic functions \r\n# and other software and tools, and its AMPP partner logic \r\n# functions, and any output files from any of the foregoing \r\n# (including device programming or simulation files), and any \r\n# associated documentation or information are expressly subject \r\n# to the terms and conditions of the Altera Program License \r\n# Subscription Agreement, the Altera Quartus II License Agreement,\r\n# the Altera MegaCore Function License Agreement, or other \r\n# applicable license agreement, including, without limitation, \r\n# that your use is for the sole purpose of programming logic \r\n# devices manufactured by Altera and sold by Altera or its \r\n# authorized distributors.  Please refer to the applicable \r\n# agreement for further details.\r\n#\r\n# -------------------------------------------------------------------------- #\r\n#\r\n# Quartus II 64-Bit\r\n# Version 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n# Date created = 10:23:14  April 27, 2017\r\n#\r\n# -------------------------------------------------------------------------- #\r\n#\r\n# Note:\r\n#\r\n# 1) Do not modify this file. This file was generated\r\n#    automatically by the Quartus II software and is used\r\n#    to preserve global assignments across Quartus II versions.\r\n#\r\n# -------------------------------------------------------------------------- #\r\n\r\nset_global_assignment -name IP_COMPONENT_REPORT_HIERARCHY Off\r\nset_global_assignment -name IP_COMPONENT_INTERNAL Off\r\nset_global_assignment -name PROJECT_SHOW_ENTITY_NAME On\r\nset_global_assignment -name PROJECT_USE_SIMPLIFIED_NAMES Off\r\nset_global_assignment -name ENABLE_REDUCED_MEMORY_MODE Off\r\nset_global_assignment -name VER_COMPATIBLE_DB_DIR export_db\r\nset_global_assignment -name AUTO_EXPORT_VER_COMPATIBLE_DB Off\r\nset_global_assignment -name FLOW_DISABLE_ASSEMBLER Off\r\nset_global_assignment -name FLOW_ENABLE_POWER_ANALYZER Off\r\nset_global_assignment -name FLOW_ENABLE_HC_COMPARE Off\r\nset_global_assignment -name HC_OUTPUT_DIR hc_output\r\nset_global_assignment -name SAVE_MIGRATION_INFO_DURING_COMPILATION Off\r\nset_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS Off\r\nset_global_assignment -name RUN_FULL_COMPILE_ON_DEVICE_CHANGE On\r\nset_global_assignment -name FLOW_ENABLE_RTL_VIEWER Off\r\nset_global_assignment -name READ_OR_WRITE_IN_BYTE_ADDRESS \"Use global settings\"\r\nset_global_assignment -name FLOW_HARDCOPY_DESIGN_READINESS_CHECK On\r\nset_global_assignment -name FLOW_ENABLE_PARALLEL_MODULES On\r\nset_global_assignment -name ENABLE_COMPACT_REPORT_TABLE Off\r\nset_global_assignment -name REVISION_TYPE Base\r\nset_global_assignment -name DEFAULT_HOLD_MULTICYCLE \"Same as Multicycle\"\r\nset_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS On\r\nset_global_assignment -name CUT_OFF_READ_DURING_WRITE_PATHS On\r\nset_global_assignment -name CUT_OFF_IO_PIN_FEEDBACK On\r\nset_global_assignment -name DO_COMBINED_ANALYSIS Off\r\nset_global_assignment -name TDC_AGGRESSIVE_HOLD_CLOSURE_EFFORT Off\r\nset_global_assignment -name EMIF_SOC_PHYCLK_ADVANCE_MODELING Off\r\nset_global_assignment -name USE_DLL_FREQUENCY_FOR_DQS_DELAY_CHAIN Off\r\nset_global_assignment -name ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS On\r\nset_global_assignment -name TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS On\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria V\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"MAX 10\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Stratix IV\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Cyclone IV E\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria 10\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family \"MAX V\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Stratix V\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria V GZ\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family \"MAX II\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria II GX\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria II GZ\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Cyclone IV GX\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Cyclone V\"\r\nset_global_assignment -name TIMEQUEST_DO_REPORT_TIMING Off\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria V\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"MAX 10\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Stratix IV\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS On -family \"Cyclone IV E\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria 10\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS On -family \"MAX V\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Stratix V\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria V GZ\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS On -family \"MAX II\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria II GX\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria II GZ\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS On -family \"Cyclone IV GX\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Cyclone V\"\r\nset_global_assignment -name TIMEQUEST_REPORT_NUM_WORST_CASE_TIMING_PATHS 100\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria V\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"MAX 10\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Cyclone IV E\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Stratix IV\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria 10\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family \"MAX V\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Stratix V\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria V GZ\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family \"MAX II\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria II GX\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria II GZ\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Cyclone IV GX\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Cyclone V\"\r\nset_global_assignment -name OPTIMIZATION_MODE Balanced\r\nset_global_assignment -name ALLOW_REGISTER_MERGING On\r\nset_global_assignment -name ALLOW_REGISTER_DUPLICATION On\r\nset_global_assignment -name TIMEQUEST2 on -family \"Arria 10\"\r\nset_global_assignment -name TIMEQUEST2 OFF -family \"Stratix V\"\r\nset_global_assignment -name MUX_RESTRUCTURE Auto\r\nset_global_assignment -name MLAB_ADD_TIMING_CONSTRAINTS_FOR_MIXED_PORT_FEED_THROUGH_MODE_SETTING_DONT_CARE Off\r\nset_global_assignment -name ENABLE_IP_DEBUG Off\r\nset_global_assignment -name SAVE_DISK_SPACE On\r\nset_global_assignment -name DISABLE_OCP_HW_EVAL Off\r\nset_global_assignment -name DEVICE_FILTER_PACKAGE Any\r\nset_global_assignment -name DEVICE_FILTER_PIN_COUNT Any\r\nset_global_assignment -name DEVICE_FILTER_SPEED_GRADE Any\r\nset_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL \"<None>\"\r\nset_global_assignment -name VERILOG_INPUT_VERSION Verilog_2001\r\nset_global_assignment -name VHDL_INPUT_VERSION VHDL_1993\r\nset_global_assignment -name FAMILY -value \"Cyclone V\"\r\nset_global_assignment -name TRUE_WYSIWYG_FLOW Off\r\nset_global_assignment -name SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES Off\r\nset_global_assignment -name STATE_MACHINE_PROCESSING Auto\r\nset_global_assignment -name SAFE_STATE_MACHINE Off\r\nset_global_assignment -name EXTRACT_VERILOG_STATE_MACHINES On\r\nset_global_assignment -name EXTRACT_VHDL_STATE_MACHINES On\r\nset_global_assignment -name IGNORE_VERILOG_INITIAL_CONSTRUCTS Off\r\nset_global_assignment -name VERILOG_CONSTANT_LOOP_LIMIT 5000\r\nset_global_assignment -name VERILOG_NON_CONSTANT_LOOP_LIMIT 250\r\nset_global_assignment -name INFER_RAMS_FROM_RAW_LOGIC On\r\nset_global_assignment -name PARALLEL_SYNTHESIS On\r\nset_global_assignment -name DSP_BLOCK_BALANCING Auto\r\nset_global_assignment -name MAX_BALANCING_DSP_BLOCKS \"-1 (Unlimited)\"\r\nset_global_assignment -name NOT_GATE_PUSH_BACK On\r\nset_global_assignment -name ALLOW_POWER_UP_DONT_CARE On\r\nset_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS Off\r\nset_global_assignment -name REMOVE_DUPLICATE_REGISTERS On\r\nset_global_assignment -name IGNORE_CARRY_BUFFERS Off\r\nset_global_assignment -name IGNORE_CASCADE_BUFFERS Off\r\nset_global_assignment -name IGNORE_GLOBAL_BUFFERS Off\r\nset_global_assignment -name IGNORE_ROW_GLOBAL_BUFFERS Off\r\nset_global_assignment -name IGNORE_LCELL_BUFFERS Off\r\nset_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS AUTO\r\nset_global_assignment -name IGNORE_SOFT_BUFFERS On\r\nset_global_assignment -name MAX7000_IGNORE_SOFT_BUFFERS Off\r\nset_global_assignment -name LIMIT_AHDL_INTEGERS_TO_32_BITS Off\r\nset_global_assignment -name AUTO_GLOBAL_CLOCK_MAX On\r\nset_global_assignment -name AUTO_GLOBAL_OE_MAX On\r\nset_global_assignment -name MAX_AUTO_GLOBAL_REGISTER_CONTROLS On\r\nset_global_assignment -name AUTO_IMPLEMENT_IN_ROM Off\r\nset_global_assignment -name APEX20K_TECHNOLOGY_MAPPER Lut\r\nset_global_assignment -name OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE Speed\r\nset_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name MERCURY_OPTIMIZATION_TECHNIQUE Area\r\nset_global_assignment -name FLEX6K_OPTIMIZATION_TECHNIQUE Area\r\nset_global_assignment -name FLEX10K_OPTIMIZATION_TECHNIQUE Area\r\nset_global_assignment -name ALLOW_XOR_GATE_USAGE On\r\nset_global_assignment -name AUTO_LCELL_INSERTION On\r\nset_global_assignment -name CARRY_CHAIN_LENGTH 48\r\nset_global_assignment -name FLEX6K_CARRY_CHAIN_LENGTH 32\r\nset_global_assignment -name FLEX10K_CARRY_CHAIN_LENGTH 32\r\nset_global_assignment -name MERCURY_CARRY_CHAIN_LENGTH 48\r\nset_global_assignment -name STRATIX_CARRY_CHAIN_LENGTH 70\r\nset_global_assignment -name STRATIXII_CARRY_CHAIN_LENGTH 70\r\nset_global_assignment -name CASCADE_CHAIN_LENGTH 2\r\nset_global_assignment -name PARALLEL_EXPANDER_CHAIN_LENGTH 16\r\nset_global_assignment -name MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH 4\r\nset_global_assignment -name AUTO_CARRY_CHAINS On\r\nset_global_assignment -name AUTO_CASCADE_CHAINS On\r\nset_global_assignment -name AUTO_PARALLEL_EXPANDERS On\r\nset_global_assignment -name AUTO_OPEN_DRAIN_PINS On\r\nset_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP Off\r\nset_global_assignment -name AUTO_ROM_RECOGNITION On\r\nset_global_assignment -name AUTO_RAM_RECOGNITION On\r\nset_global_assignment -name AUTO_DSP_RECOGNITION On\r\nset_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION Auto\r\nset_global_assignment -name ALLOW_SHIFT_REGISTER_MERGING_ACROSS_HIERARCHIES Auto\r\nset_global_assignment -name AUTO_CLOCK_ENABLE_RECOGNITION On\r\nset_global_assignment -name STRICT_RAM_RECOGNITION Off\r\nset_global_assignment -name ALLOW_SYNCH_CTRL_USAGE On\r\nset_global_assignment -name FORCE_SYNCH_CLEAR Off\r\nset_global_assignment -name AUTO_RAM_BLOCK_BALANCING On\r\nset_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION Off\r\nset_global_assignment -name AUTO_RESOURCE_SHARING Off\r\nset_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION Off\r\nset_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION Off\r\nset_global_assignment -name ALLOW_ANY_SHIFT_REGISTER_SIZE_FOR_RECOGNITION Off\r\nset_global_assignment -name MAX7000_FANIN_PER_CELL 100\r\nset_global_assignment -name USE_LOGICLOCK_CONSTRAINTS_IN_BALANCING On\r\nset_global_assignment -name MAX_RAM_BLOCKS_M512 \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_RAM_BLOCKS_M4K \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_RAM_BLOCKS_MRAM \"-1 (Unlimited)\"\r\nset_global_assignment -name IGNORE_TRANSLATE_OFF_AND_SYNTHESIS_OFF Off\r\nset_global_assignment -name STRATIXGX_BYPASS_REMAPPING_OF_FORCE_SIGNAL_DETECT_SIGNAL_THRESHOLD_SELECT Off\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria II GZ\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria V\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"MAX 10\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Cyclone IV GX\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Stratix IV\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Cyclone IV E\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria 10\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Stratix V\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria V GZ\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Cyclone V\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria II GX\"\r\nset_global_assignment -name REPORT_PARAMETER_SETTINGS On\r\nset_global_assignment -name REPORT_SOURCE_ASSIGNMENTS On\r\nset_global_assignment -name REPORT_CONNECTIVITY_CHECKS On\r\nset_global_assignment -name IGNORE_MAX_FANOUT_ASSIGNMENTS Off\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria V\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"MAX 10\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"Cyclone IV E\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Stratix IV\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria 10\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"MAX V\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Stratix V\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"MAX II\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria V GZ\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria II GX\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria II GZ\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"Cyclone IV GX\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Cyclone V\"\r\nset_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS \"Normal compilation\"\r\nset_global_assignment -name HDL_MESSAGE_LEVEL Level2\r\nset_global_assignment -name USE_HIGH_SPEED_ADDER Auto\r\nset_global_assignment -name NUMBER_OF_REMOVED_REGISTERS_REPORTED 5000\r\nset_global_assignment -name NUMBER_OF_SYNTHESIS_MIGRATION_ROWS 5000\r\nset_global_assignment -name SYNTHESIS_S10_MIGRATION_CHECKS Off\r\nset_global_assignment -name NUMBER_OF_SWEPT_NODES_REPORTED 5000\r\nset_global_assignment -name NUMBER_OF_INVERTED_REGISTERS_REPORTED 100\r\nset_global_assignment -name SYNTH_CLOCK_MUX_PROTECTION On\r\nset_global_assignment -name SYNTH_GATED_CLOCK_CONVERSION Off\r\nset_global_assignment -name BLOCK_DESIGN_NAMING Auto\r\nset_global_assignment -name SYNTH_PROTECT_SDC_CONSTRAINT Off\r\nset_global_assignment -name SYNTHESIS_EFFORT Auto\r\nset_global_assignment -name SHIFT_REGISTER_RECOGNITION_ACLR_SIGNAL On\r\nset_global_assignment -name PRE_MAPPING_RESYNTHESIS Off\r\nset_global_assignment -name SYNTH_MESSAGE_LEVEL Medium\r\nset_global_assignment -name DISABLE_REGISTER_MERGING_ACROSS_HIERARCHIES Auto\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria II GZ\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria V\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"MAX 10\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Cyclone IV GX\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Stratix IV\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Cyclone IV E\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria 10\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Stratix V\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria V GZ\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Cyclone V\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria II GX\"\r\nset_global_assignment -name MAX_LABS \"-1 (Unlimited)\"\r\nset_global_assignment -name RBCGEN_CRITICAL_WARNING_TO_ERROR On\r\nset_global_assignment -name MAX_NUMBER_OF_REGISTERS_FROM_UNINFERRED_RAMS \"-1 (Unlimited)\"\r\nset_global_assignment -name AUTO_PARALLEL_SYNTHESIS On\r\nset_global_assignment -name PRPOF_ID Off\r\nset_global_assignment -name DISABLE_DSP_NEGATE_INFERENCING Off\r\nset_global_assignment -name FLEX10K_ENABLE_LOCK_OUTPUT Off\r\nset_global_assignment -name AUTO_MERGE_PLLS On\r\nset_global_assignment -name IGNORE_MODE_FOR_MERGE Off\r\nset_global_assignment -name TXPMA_SLEW_RATE Low\r\nset_global_assignment -name ADCE_ENABLED Auto\r\nset_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL Normal\r\nset_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS Off\r\nset_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.0\r\nset_global_assignment -name ROUTER_EFFORT_MULTIPLIER 1.0\r\nset_global_assignment -name FIT_ATTEMPTS_TO_SKIP 0.0\r\nset_global_assignment -name ECO_ALLOW_ROUTING_CHANGES Off\r\nset_global_assignment -name DEVICE AUTO\r\nset_global_assignment -name BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE Off\r\nset_global_assignment -name ENABLE_JTAG_BST_SUPPORT Off\r\nset_global_assignment -name MAX7000_ENABLE_JTAG_BST_SUPPORT On\r\nset_global_assignment -name ENABLE_NCEO_OUTPUT Off\r\nset_global_assignment -name RESERVE_NCEO_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION \"Use as programming pin\"\r\nset_global_assignment -name STRATIXIII_UPDATE_MODE Standard\r\nset_global_assignment -name STRATIX_UPDATE_MODE Standard\r\nset_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"Single Image\"\r\nset_global_assignment -name CVP_MODE Off\r\nset_global_assignment -name STRATIXV_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name STRATIXIII_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name MAX10FPGA_CONFIGURATION_SCHEME \"Internal Configuration\"\r\nset_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME \"Active Serial\"\r\nset_global_assignment -name STRATIXII_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name CYCLONEII_CONFIGURATION_SCHEME \"Active Serial\"\r\nset_global_assignment -name APEX20K_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name STRATIX_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name CYCLONE_CONFIGURATION_SCHEME \"Active Serial\"\r\nset_global_assignment -name MERCURY_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name FLEX6K_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name FLEX10K_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name APEXII_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name USER_START_UP_CLOCK Off\r\nset_global_assignment -name DEVICE_INITIALIZATION_CLOCK INIT_INTOSC\r\nset_global_assignment -name ENABLE_VREFA_PIN Off\r\nset_global_assignment -name ENABLE_VREFB_PIN Off\r\nset_global_assignment -name ALWAYS_ENABLE_INPUT_BUFFERS Off\r\nset_global_assignment -name ENABLE_ASMI_FOR_FLASH_LOADER Off\r\nset_global_assignment -name ENABLE_DEVICE_WIDE_RESET Off\r\nset_global_assignment -name ENABLE_DEVICE_WIDE_OE Off\r\nset_global_assignment -name RESERVE_ALL_UNUSED_PINS \"As output driving ground\"\r\nset_global_assignment -name ENABLE_INIT_DONE_OUTPUT Off\r\nset_global_assignment -name INIT_DONE_OPEN_DRAIN On\r\nset_global_assignment -name RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_RDYNBUSY_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA31_THROUGH_DATA16_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA15_THROUGH_DATA8_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION \"As input tri-stated\"\r\nset_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION \"As input tri-stated\"\r\nset_global_assignment -name RESERVE_DATA7_THROUGH_DATA2_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA7_THROUGH_DATA5_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION \"As input tri-stated\"\r\nset_global_assignment -name RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION \"Use as programming pin\"\r\nset_global_assignment -name ENABLE_CONFIGURATION_PINS On\r\nset_global_assignment -name ENABLE_JTAG_PIN_SHARING Off\r\nset_global_assignment -name ENABLE_NCE_PIN Off\r\nset_global_assignment -name ENABLE_BOOT_SEL_PIN On\r\nset_global_assignment -name CRC_ERROR_CHECKING Off\r\nset_global_assignment -name INTERNAL_SCRUBBING Off\r\nset_global_assignment -name PR_ERROR_OPEN_DRAIN On\r\nset_global_assignment -name PR_READY_OPEN_DRAIN On\r\nset_global_assignment -name ENABLE_CVP_CONFDONE Off\r\nset_global_assignment -name CVP_CONFDONE_OPEN_DRAIN On\r\nset_global_assignment -name ENABLE_NCONFIG_FROM_CORE On\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria II GZ\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria V\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"MAX 10\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Cyclone IV GX\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Stratix IV\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Cyclone IV E\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria 10\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"IO Paths and Minimum TPD Paths\" -family \"MAX V\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Stratix V\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"IO Paths and Minimum TPD Paths\" -family \"MAX II\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria V GZ\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Cyclone V\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria II GX\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria V\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"MAX 10\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Cyclone IV E\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Stratix IV\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria 10\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING Off -family \"MAX V\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Stratix V\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria V GZ\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING Off -family \"MAX II\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria II GX\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria II GZ\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Cyclone IV GX\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Cyclone V\"\r\nset_global_assignment -name BLOCK_RAM_TO_MLAB_CELL_CONVERSION On\r\nset_global_assignment -name BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS Auto\r\nset_global_assignment -name BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES Care\r\nset_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family \"Stratix IV\"\r\nset_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family \"Arria 10\"\r\nset_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family \"Stratix V\"\r\nset_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family \"Arria V GZ\"\r\nset_global_assignment -name PROGRAMMABLE_POWER_MAXIMUM_HIGH_SPEED_FRACTION_OF_USED_LAB_TILES 1.0\r\nset_global_assignment -name GUARANTEE_MIN_DELAY_CORNER_IO_ZERO_HOLD_TIME On\r\nset_global_assignment -name OPTIMIZE_POWER_DURING_FITTING \"Normal compilation\"\r\nset_global_assignment -name OPTIMIZE_SSN Off\r\nset_global_assignment -name OPTIMIZE_TIMING \"Normal compilation\"\r\nset_global_assignment -name ECO_OPTIMIZE_TIMING Off\r\nset_global_assignment -name ECO_REGENERATE_REPORT Off\r\nset_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING Normal\r\nset_global_assignment -name FIT_ONLY_ONE_ATTEMPT Off\r\nset_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION Automatically\r\nset_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION Automatically\r\nset_global_assignment -name SEED 1\r\nset_global_assignment -name SLOW_SLEW_RATE Off\r\nset_global_assignment -name PCI_IO Off\r\nset_global_assignment -name TURBO_BIT On\r\nset_global_assignment -name WEAK_PULL_UP_RESISTOR Off\r\nset_global_assignment -name ENABLE_BUS_HOLD_CIRCUITRY Off\r\nset_global_assignment -name AUTO_GLOBAL_MEMORY_CONTROLS Off\r\nset_global_assignment -name MIGRATION_CONSTRAIN_CORE_RESOURCES On\r\nset_global_assignment -name QII_AUTO_PACKED_REGISTERS Auto\r\nset_global_assignment -name AUTO_PACKED_REGISTERS_MAX Auto\r\nset_global_assignment -name NORMAL_LCELL_INSERT On\r\nset_global_assignment -name CARRY_OUT_PINS_LCELL_INSERT On\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Arria V\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"MAX 10\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Stratix IV\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Cyclone IV E\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS Off -family \"Arria 10\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"MAX V\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Stratix V\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"MAX II\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Arria V GZ\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Arria II GX\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Arria II GZ\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Cyclone IV GX\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Cyclone V\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS OFF\r\nset_global_assignment -name XSTL_INPUT_ALLOW_SE_BUFFER Off\r\nset_global_assignment -name TREAT_BIDIR_AS_OUTPUT Off\r\nset_global_assignment -name AUTO_TURBO_BIT ON\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_LOG_FILE Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING Off\r\nset_global_assignment -name IO_PLACEMENT_OPTIMIZATION On\r\nset_global_assignment -name ALLOW_LVTTL_LVCMOS_INPUT_LEVELS_TO_OVERDRIVE_INPUT_BUFFER Off\r\nset_global_assignment -name OVERRIDE_DEFAULT_ELECTROMIGRATION_PARAMETERS Off\r\nset_global_assignment -name FITTER_EFFORT \"Auto Fit\"\r\nset_global_assignment -name FITTER_AUTO_EFFORT_DESIRED_SLACK_MARGIN 0ns\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT Normal\r\nset_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION Auto\r\nset_global_assignment -name ROUTER_REGISTER_DUPLICATION Auto\r\nset_global_assignment -name STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET Off\r\nset_global_assignment -name AUTO_GLOBAL_CLOCK On\r\nset_global_assignment -name AUTO_GLOBAL_OE On\r\nset_global_assignment -name AUTO_GLOBAL_REGISTER_CONTROLS On\r\nset_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE Realistic\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_UNDER_FULL_DATARATE_RANGE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_RX_CORECLK_FROM_NON_RX_CLKOUT_SOURCE_IN_DOUBLE_DATA_WIDTH_MODE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_IN_DOUBLE_DATA_WIDTH_MODE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_PARALLEL_LOOPBACK_IN_DOUBLE_DATA_WIDTH_MODE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_XAUI_IN_SINGLE_DATA_WIDTH_MODE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off\r\nset_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_WITHOUT_8B10B Off\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_POST8B10B_LOOPBACK Off\r\nset_global_assignment -name STRATIXGX_ALLOW_REVERSE_PARALLEL_LOOPBACK Off\r\nset_global_assignment -name STRATIXGX_ALLOW_USE_OF_GXB_COUPLED_IOS Off\r\nset_global_assignment -name GENERATE_GXB_RECONFIG_MIF Off\r\nset_global_assignment -name GENERATE_GXB_RECONFIG_MIF_WITH_PLL Off\r\nset_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP \"As input tri-stated with weak pull-up\"\r\nset_global_assignment -name ENABLE_HOLD_BACK_OFF On\r\nset_global_assignment -name CONFIGURATION_VCCIO_LEVEL Auto\r\nset_global_assignment -name FORCE_CONFIGURATION_VCCIO Off\r\nset_global_assignment -name SYNCHRONIZER_IDENTIFICATION Off\r\nset_global_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION On\r\nset_global_assignment -name OPTIMIZE_FOR_METASTABILITY On\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Arria V\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN Off -family \"MAX 10\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN Off -family \"Cyclone IV E\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Arria 10\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Stratix V\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Arria V GZ\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Cyclone V\"\r\nset_global_assignment -name MAX_GLOBAL_CLOCKS_ALLOWED \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_REGIONAL_CLOCKS_ALLOWED \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_PERIPHERY_CLOCKS_ALLOWED \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_CLOCKS_ALLOWED \"-1 (Unlimited)\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Arria 10\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Arria V\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Stratix V\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_40MHz -family \"Cyclone IV GX\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Arria V GZ\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Cyclone V\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_40MHz -family \"Arria II GX\"\r\nset_global_assignment -name M144K_BLOCK_READ_CLOCK_DUTY_CYCLE_DEPENDENCY Off\r\nset_global_assignment -name STRATIXIII_MRAM_COMPATIBILITY On\r\nset_global_assignment -name FORCE_FITTER_TO_AVOID_PERIPHERY_PLACEMENT_WARNINGS Off\r\nset_global_assignment -name AUTO_C3_M9K_BIT_SKIP Off\r\nset_global_assignment -name PR_DONE_OPEN_DRAIN On\r\nset_global_assignment -name NCEO_OPEN_DRAIN On\r\nset_global_assignment -name ENABLE_CRC_ERROR_PIN Off\r\nset_global_assignment -name ENABLE_PR_PINS Off\r\nset_global_assignment -name PR_PINS_OPEN_DRAIN Off\r\nset_global_assignment -name CLAMPING_DIODE Off\r\nset_global_assignment -name TRI_STATE_SPI_PINS Off\r\nset_global_assignment -name UNUSED_TSD_PINS_GND Off\r\nset_global_assignment -name IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE Off\r\nset_global_assignment -name FORM_DDR_CLUSTERING_CLIQUE Off\r\nset_global_assignment -name ALM_REGISTER_PACKING_EFFORT Medium\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Arria V\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION Off -family \"Stratix IV\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Arria 10\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Stratix V\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Arria V GZ\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Cyclone V\"\r\nset_global_assignment -name EDA_SIMULATION_TOOL \"<None>\"\r\nset_global_assignment -name EDA_TIMING_ANALYSIS_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_TIMING_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_SYMBOL_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_SIGNAL_INTEGRITY_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_BOUNDARY_SCAN_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_TOOL \"<None>\"\r\nset_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL \"<None>\"\r\nset_global_assignment -name EDA_RESYNTHESIS_TOOL \"<None>\"\r\nset_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION On\r\nset_global_assignment -name COMPRESSION_MODE Off\r\nset_global_assignment -name CLOCK_SOURCE Internal\r\nset_global_assignment -name CONFIGURATION_CLOCK_FREQUENCY \"10 MHz\"\r\nset_global_assignment -name CONFIGURATION_CLOCK_DIVISOR 1\r\nset_global_assignment -name ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On\r\nset_global_assignment -name FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE Off\r\nset_global_assignment -name FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On\r\nset_global_assignment -name MAX7000S_JTAG_USER_CODE FFFF\r\nset_global_assignment -name STRATIX_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name APEX20K_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name MERCURY_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name FLEX10K_JTAG_USER_CODE 7F\r\nset_global_assignment -name MAX7000_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name MAX7000_USE_CHECKSUM_AS_USERCODE Off\r\nset_global_assignment -name USE_CHECKSUM_AS_USERCODE On\r\nset_global_assignment -name SECURITY_BIT Off\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE On -family \"MAX 10\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Cyclone IV E\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Stratix IV\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE On -family \"MAX V\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE On -family \"MAX II\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Arria II GX\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Arria II GZ\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Cyclone IV GX\"\r\nset_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name STRATIXII_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name APEX20K_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name MERCURY_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name FLEX6K_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name FLEX10K_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name CYCLONE_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name STRATIX_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name APEX20K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name STRATIX_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name MERCURY_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name EPROM_USE_CHECKSUM_AS_USERCODE Off\r\nset_global_assignment -name AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE On\r\nset_global_assignment -name DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE Off\r\nset_global_assignment -name GENERATE_TTF_FILE Off\r\nset_global_assignment -name GENERATE_RBF_FILE Off\r\nset_global_assignment -name GENERATE_HEX_FILE Off\r\nset_global_assignment -name HEXOUT_FILE_START_ADDRESS 0\r\nset_global_assignment -name HEXOUT_FILE_COUNT_DIRECTION Up\r\nset_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND \"As output driving an unspecified signal\"\r\nset_global_assignment -name RELEASE_CLEARS_BEFORE_TRI_STATES Off\r\nset_global_assignment -name AUTO_RESTART_CONFIGURATION On\r\nset_global_assignment -name HARDCOPYII_POWER_ON_EXTRA_DELAY Off\r\nset_global_assignment -name STRATIXII_MRAM_COMPATIBILITY Off\r\nset_global_assignment -name CYCLONEII_M4K_COMPATIBILITY On\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Arria V\"\r\nset_global_assignment -name ENABLE_OCT_DONE On -family \"MAX 10\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Cyclone IV E\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Arria 10\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Stratix V\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Arria V GZ\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Arria II GX\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Cyclone IV GX\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Cyclone V\"\r\nset_global_assignment -name USE_CHECKERED_PATTERN_AS_UNINITIALIZED_RAM_CONTENT OFF\r\nset_global_assignment -name ARRIAIIGX_RX_CDR_LOCKUP_FIX_OVERRIDE Off\r\nset_global_assignment -name ENABLE_AUTONOMOUS_PCIE_HIP Off\r\nset_global_assignment -name ENABLE_ADV_SEU_DETECTION Off\r\nset_global_assignment -name POR_SCHEME \"Instant ON\"\r\nset_global_assignment -name EN_USER_IO_WEAK_PULLUP On\r\nset_global_assignment -name EN_SPI_IO_WEAK_PULLUP On\r\nset_global_assignment -name POF_VERIFY_PROTECT Off\r\nset_global_assignment -name ENABLE_SPI_MODE_CHECK Off\r\nset_global_assignment -name FORCE_SSMCLK_TO_ISMCLK On\r\nset_global_assignment -name FALLBACK_TO_EXTERNAL_FLASH Off\r\nset_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 0\r\nset_global_assignment -name START_TIME 0ns\r\nset_global_assignment -name SIMULATION_MODE TIMING\r\nset_global_assignment -name AUTO_USE_SIMULATION_PDB_NETLIST Off\r\nset_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS On\r\nset_global_assignment -name SETUP_HOLD_DETECTION Off\r\nset_global_assignment -name SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off\r\nset_global_assignment -name CHECK_OUTPUTS Off\r\nset_global_assignment -name SIMULATION_COVERAGE On\r\nset_global_assignment -name SIMULATION_COMPLETE_COVERAGE_REPORT_PANEL On\r\nset_global_assignment -name SIMULATION_MISSING_1_VALUE_COVERAGE_REPORT_PANEL On\r\nset_global_assignment -name SIMULATION_MISSING_0_VALUE_COVERAGE_REPORT_PANEL On\r\nset_global_assignment -name GLITCH_DETECTION Off\r\nset_global_assignment -name GLITCH_INTERVAL 1ns\r\nset_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE Off\r\nset_global_assignment -name SIMULATION_WITH_GLITCH_FILTERING_WHEN_GENERATING_SAF On\r\nset_global_assignment -name SIMULATION_BUS_CHANNEL_GROUPING Off\r\nset_global_assignment -name SIMULATION_VDB_RESULT_FLUSH On\r\nset_global_assignment -name VECTOR_COMPARE_TRIGGER_MODE INPUT_EDGE\r\nset_global_assignment -name SIMULATION_NETLIST_VIEWER Off\r\nset_global_assignment -name SIMULATION_INTERCONNECT_DELAY_MODEL_TYPE TRANSPORT\r\nset_global_assignment -name SIMULATION_CELL_DELAY_MODEL_TYPE TRANSPORT\r\nset_global_assignment -name SIMULATOR_GENERATE_POWERPLAY_VCD_FILE Off\r\nset_global_assignment -name SIMULATOR_PVT_TIMING_MODEL_TYPE AUTO\r\nset_global_assignment -name SIMULATION_WITH_AUTO_GLITCH_FILTERING AUTO\r\nset_global_assignment -name DRC_TOP_FANOUT 50\r\nset_global_assignment -name DRC_FANOUT_EXCEEDING 30\r\nset_global_assignment -name DRC_GATED_CLOCK_FEED 30\r\nset_global_assignment -name HARDCOPY_FLOW_AUTOMATION MIGRATION_ONLY\r\nset_global_assignment -name ENABLE_DRC_SETTINGS Off\r\nset_global_assignment -name CLK_RULE_CLKNET_CLKSPINES_THRESHOLD 25\r\nset_global_assignment -name DRC_DETAIL_MESSAGE_LIMIT 10\r\nset_global_assignment -name DRC_VIOLATION_MESSAGE_LIMIT 30\r\nset_global_assignment -name DRC_DEADLOCK_STATE_LIMIT 2\r\nset_global_assignment -name MERGE_HEX_FILE Off\r\nset_global_assignment -name GENERATE_SVF_FILE Off\r\nset_global_assignment -name GENERATE_ISC_FILE Off\r\nset_global_assignment -name GENERATE_JAM_FILE Off\r\nset_global_assignment -name GENERATE_JBC_FILE Off\r\nset_global_assignment -name GENERATE_JBC_FILE_COMPRESSED On\r\nset_global_assignment -name GENERATE_CONFIG_SVF_FILE Off\r\nset_global_assignment -name GENERATE_CONFIG_ISC_FILE Off\r\nset_global_assignment -name GENERATE_CONFIG_JAM_FILE Off\r\nset_global_assignment -name GENERATE_CONFIG_JBC_FILE Off\r\nset_global_assignment -name GENERATE_CONFIG_JBC_FILE_COMPRESSED On\r\nset_global_assignment -name GENERATE_CONFIG_HEXOUT_FILE Off\r\nset_global_assignment -name ISP_CLAMP_STATE_DEFAULT \"Tri-state\"\r\nset_global_assignment -name HPS_EARLY_IO_RELEASE Off\r\nset_global_assignment -name SIGNALPROBE_ALLOW_OVERUSE Off\r\nset_global_assignment -name SIGNALPROBE_DURING_NORMAL_COMPILATION Off\r\nset_global_assignment -name POWER_DEFAULT_TOGGLE_RATE 12.5%\r\nset_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE 12.5%\r\nset_global_assignment -name POWER_USE_PVA On\r\nset_global_assignment -name POWER_USE_INPUT_FILE \"No File\"\r\nset_global_assignment -name POWER_USE_INPUT_FILES Off\r\nset_global_assignment -name POWER_VCD_FILTER_GLITCHES On\r\nset_global_assignment -name POWER_REPORT_SIGNAL_ACTIVITY Off\r\nset_global_assignment -name POWER_REPORT_POWER_DISSIPATION Off\r\nset_global_assignment -name POWER_USE_DEVICE_CHARACTERISTICS TYPICAL\r\nset_global_assignment -name POWER_AUTO_COMPUTE_TJ On\r\nset_global_assignment -name POWER_TJ_VALUE 25\r\nset_global_assignment -name POWER_USE_TA_VALUE 25\r\nset_global_assignment -name POWER_USE_CUSTOM_COOLING_SOLUTION Off\r\nset_global_assignment -name POWER_BOARD_TEMPERATURE 25\r\nset_global_assignment -name POWER_HPS_ENABLE Off\r\nset_global_assignment -name POWER_HPS_PROC_FREQ 0.0\r\nset_global_assignment -name ENABLE_SMART_VOLTAGE_ID Off\r\nset_global_assignment -name IGNORE_PARTITIONS Off\r\nset_global_assignment -name AUTO_EXPORT_INCREMENTAL_COMPILATION Off\r\nset_global_assignment -name RAPID_RECOMPILE_ASSIGNMENT_CHECKING On\r\nset_global_assignment -name OUTPUT_IO_TIMING_ENDPOINT \"Near End\"\r\nset_global_assignment -name RTLV_REMOVE_FANOUT_FREE_REGISTERS On\r\nset_global_assignment -name RTLV_SIMPLIFIED_LOGIC On\r\nset_global_assignment -name RTLV_GROUP_RELATED_NODES On\r\nset_global_assignment -name RTLV_GROUP_COMB_LOGIC_IN_CLOUD Off\r\nset_global_assignment -name RTLV_GROUP_COMB_LOGIC_IN_CLOUD_TMV Off\r\nset_global_assignment -name RTLV_GROUP_RELATED_NODES_TMV On\r\nset_global_assignment -name EQC_CONSTANT_DFF_DETECTION On\r\nset_global_assignment -name EQC_DUPLICATE_DFF_DETECTION On\r\nset_global_assignment -name EQC_BBOX_MERGE On\r\nset_global_assignment -name EQC_LVDS_MERGE On\r\nset_global_assignment -name EQC_RAM_UNMERGING On\r\nset_global_assignment -name EQC_DFF_SS_EMULATION On\r\nset_global_assignment -name EQC_RAM_REGISTER_UNPACK On\r\nset_global_assignment -name EQC_MAC_REGISTER_UNPACK On\r\nset_global_assignment -name EQC_SET_PARTITION_BB_TO_VCC_GND On\r\nset_global_assignment -name EQC_STRUCTURE_MATCHING On\r\nset_global_assignment -name EQC_AUTO_BREAK_CONE On\r\nset_global_assignment -name EQC_POWER_UP_COMPARE Off\r\nset_global_assignment -name EQC_AUTO_COMP_LOOP_CUT On\r\nset_global_assignment -name EQC_AUTO_INVERSION On\r\nset_global_assignment -name EQC_AUTO_TERMINATE On\r\nset_global_assignment -name EQC_SUB_CONE_REPORT Off\r\nset_global_assignment -name EQC_RENAMING_RULES On\r\nset_global_assignment -name EQC_PARAMETER_CHECK On\r\nset_global_assignment -name EQC_AUTO_PORTSWAP On\r\nset_global_assignment -name EQC_DETECT_DONT_CARES On\r\nset_global_assignment -name EQC_SHOW_ALL_MAPPED_POINTS Off\r\nset_global_assignment -name EDA_INPUT_GND_NAME GND -section_id ?\r\nset_global_assignment -name EDA_INPUT_VCC_NAME VCC -section_id ?\r\nset_global_assignment -name EDA_INPUT_DATA_FORMAT NONE -section_id ?\r\nset_global_assignment -name EDA_SHOW_LMF_MAPPING_MESSAGES Off -section_id ?\r\nset_global_assignment -name EDA_RUN_TOOL_AUTOMATICALLY Off -section_id ?\r\nset_global_assignment -name RESYNTHESIS_RETIMING FULL -section_id ?\r\nset_global_assignment -name RESYNTHESIS_OPTIMIZATION_EFFORT Normal -section_id ?\r\nset_global_assignment -name RESYNTHESIS_PHYSICAL_SYNTHESIS Normal -section_id ?\r\nset_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS On -section_id ?\r\nset_global_assignment -name VCCPD_VOLTAGE 3.3V -section_id ?\r\nset_global_assignment -name EDA_USER_COMPILED_SIMULATION_LIBRARY_DIRECTORY \"<None>\" -section_id ?\r\nset_global_assignment -name EDA_LAUNCH_CMD_LINE_TOOL Off -section_id ?\r\nset_global_assignment -name EDA_ENABLE_IPUTF_MODE On -section_id ?\r\nset_global_assignment -name EDA_NATIVELINK_PORTABLE_FILE_PATHS Off -section_id ?\r\nset_global_assignment -name EDA_NATIVELINK_GENERATE_SCRIPT_ONLY Off -section_id ?\r\nset_global_assignment -name EDA_WAIT_FOR_GUI_TOOL_COMPLETION Off -section_id ?\r\nset_global_assignment -name EDA_TRUNCATE_LONG_HIERARCHY_PATHS Off -section_id ?\r\nset_global_assignment -name EDA_FLATTEN_BUSES Off -section_id ?\r\nset_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS Off -section_id ?\r\nset_global_assignment -name EDA_GENERATE_TIMING_CLOSURE_DATA Off -section_id ?\r\nset_global_assignment -name EDA_GENERATE_POWER_INPUT_FILE Off -section_id ?\r\nset_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS NOT_USED -section_id ?\r\nset_global_assignment -name EDA_RTL_SIM_MODE NOT_USED -section_id ?\r\nset_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY OFF -section_id ?\r\nset_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST Off -section_id ?\r\nset_global_assignment -name EDA_WRITE_DEVICE_CONTROL_PORTS Off -section_id ?\r\nset_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_TCL_FILE Off -section_id ?\r\nset_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE \"All Except Combinational Logic Element Outputs\" -section_id ?\r\nset_global_assignment -name EDA_ENABLE_GLITCH_FILTERING Off -section_id ?\r\nset_global_assignment -name EDA_WRITE_NODES_FOR_POWER_ESTIMATION OFF -section_id ?\r\nset_global_assignment -name EDA_SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off -section_id ?\r\nset_global_assignment -name EDA_WRITER_DONT_WRITE_TOP_ENTITY Off -section_id ?\r\nset_global_assignment -name EDA_VHDL_ARCH_NAME structure -section_id ?\r\nset_global_assignment -name EDA_IBIS_MODEL_SELECTOR Off -section_id ?\r\nset_global_assignment -name EDA_IBIS_MUTUAL_COUPLING Off -section_id ?\r\nset_global_assignment -name EDA_FORMAL_VERIFICATION_ALLOW_RETIMING Off -section_id ?\r\nset_global_assignment -name EDA_BOARD_BOUNDARY_SCAN_OPERATION PRE_CONFIG -section_id ?\r\nset_global_assignment -name EDA_GENERATE_RTL_SIMULATION_COMMAND_SCRIPT Off -section_id ?\r\nset_global_assignment -name EDA_GENERATE_GATE_LEVEL_SIMULATION_COMMAND_SCRIPT Off -section_id ?\r\nset_global_assignment -name EDA_IBIS_SPECIFICATION_VERSION 4p1 -section_id ?\r\nset_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_OFFSET 0ns -section_id ?\r\nset_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_DUTY_CYCLE 50 -section_id ?\r\nset_global_assignment -name APEX20K_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name MAX7K_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name MERCURY_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name FLEX6K_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name FLEX10K_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_PRESERVE_HIGH_SPEED_TILES On -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IGNORE_SOURCE_FILE_CHANGES Off -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_ALWAYS_USE_QXP_NETLIST Off -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IMPORT_ASSIGNMENTS On -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IMPORT_EXISTING_ASSIGNMENTS REPLACE_CONFLICTING -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IMPORT_EXISTING_LOGICLOCK_REGIONS UPDATE_CONFLICTING -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IMPORT_PROMOTE_ASSIGNMENTS On -section_id ? -entity ?\r\nset_global_assignment -name ALLOW_MULTIPLE_PERSONAS Off -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_ASD_REGION_ID 1 -section_id ? -entity ?\r\nset_global_assignment -name CROSS_BOUNDARY_OPTIMIZATIONS Off -section_id ? -entity ?\r\nset_global_assignment -name PROPAGATE_CONSTANTS_ON_INPUTS On -section_id ? -entity ?\r\nset_global_assignment -name PROPAGATE_INVERSIONS_ON_INPUTS On -section_id ? -entity ?\r\nset_global_assignment -name REMOVE_LOGIC_ON_UNCONNECTED_OUTPUTS On -section_id ? -entity ?\r\nset_global_assignment -name MERGE_EQUIVALENT_INPUTS On -section_id ? -entity ?\r\nset_global_assignment -name MERGE_EQUIVALENT_BIDIRS On -section_id ? -entity ?\r\nset_global_assignment -name ABSORB_PATHS_FROM_OUTPUTS_TO_INPUTS On -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_ENABLE_STRICT_PRESERVATION Off -section_id ? -entity ?\r\n"
  },
  {
    "path": "max10_adc_firmware/serial1_nativelink_simulation.rpt",
    "content": "Info: Start Nativelink Simulation process\r\n\r\n========= EDA Simulation Settings =====================\r\n\r\nSim Mode              :  RTL\r\nFamily                :  max10\r\nQuartus root          :  c:/altera/15.0/quartus/bin64/\r\nQuartus sim root      :  c:/altera/15.0/quartus/eda/sim_lib\r\nSimulation Tool       :  modelsim-altera\r\nSimulation Language   :  verilog\r\nSimulation Mode       :  GUI\r\nSim Output File       :  \r\nSim SDF file          :  \r\nSim dir               :  simulation\\modelsim\r\n\r\n=======================================================\r\n\r\nInfo: Starting NativeLink simulation with ModelSim-Altera software\r\nSourced NativeLink script c:/altera/15.0/quartus/common/tcl/internal/nativelink/modelsim.tcl\r\nWarning: File serial1_run_msim_rtl_verilog.do already exists - backing up current file as serial1_run_msim_rtl_verilog.do.bak10\r\nInfo: Spawning ModelSim-Altera Simulation software \r\n"
  },
  {
    "path": "max10_adc_firmware/serialprocessor.v",
    "content": "// from http://www.sparxeng.com/blog/software/communicating-with-your-cyclone-ii-fpga-over-serial-port-part-3-number-crunching\n\nmodule processor(clk, rxReady, rxData, txBusy, txStart, txData, readdata, get_ext_data, ext_data_ready, wraddress_triggerpoint, rden, rdaddress, ram_output1, ram_output2, ram_output3, ram_output4,\nnewcomdata,comdata,debug3,debug4,spare,serial_passthrough,master_clock, imthelast,imthefirst,rollingtrigger,trigDebug, \nadcdata,adcready,getadcdata,getadcadr,adcvalid,adcreset,adcramdata,writesamp,writeadc,adctestout,\ntriggerpoint,downsample, screendata,screenwren,screenaddr,screenreset,trigthresh,trigchannels,triggertype,triggertot,\nSPIsend,SPIsenddata,delaycounter,carrycounter,usb_siwu,SPIstate,offset,gainsw,do_usb,\ni2c_ena,i2c_addr,i2c_rw,i2c_datawr,i2c_datard,i2c_busy,i2c_ackerror,   usb_clk60,usb_dataio,usb_txe_busy,usb_wr,\nrdadtwo,trigthreshtwo, debug1,debug2,chip_id, highres,  use_ext_trig,  digital_buffer1, nsmp, outputclk,\nphasecounterselect,phaseupdown,phasestep,scanclk,\next_trig_delay, noselftrig, usb_oe, usb_rd, usb_rxf, usb_pwrsv, clk_rd,\nnselftrigcoincidentreq, selftrigtempholdtime, allowsamechancoin,\ntrigratecounter,trigratecountreset);\n   input clk;\n\tinput[7:0] rxData;\n   input rxReady;\n   input txBusy;\n   output reg txStart;\n   output reg[7:0] txData;\n   output reg[7:0] readdata;//first byte we got\n   output wire spare,debug3,debug4;\n\treg led1,led2,led3,led4;\n\treg io1,io2,io3,io4;\n  \toutput reg get_ext_data;\n\tinput ext_data_ready;\n\tparameter ram_width=12;//9 is 512 samples\n\tinput wire[ram_width-1:0] wraddress_triggerpoint;\n\toutput wire [ram_width-1:0] rdaddress;\n\toutput wire [ram_width-1:0] rdadtwo;\n\treg [ram_width-1:0] rdaddress_slow;\n\treg [ram_width-1:0] rdadtwo_slow;\n\treg [ram_width-1:0] rdaddress_fast;\n\t//reg [ram_width-1:0] rdadtwo_fast;//only for lockin stuff\n\toutput reg [ram_width-1:0] triggerpoint;\n\toutput reg rden=0;\n\tinput wire [7:0] ram_output1;\n\tinput wire [7:0] ram_output2;\n\tinput wire [7:0] ram_output3;\n\tinput wire [7:0] ram_output4;\n\tinput wire [7:0] digital_buffer1;\n\toutput reg serial_passthrough;\n\toutput reg [1:0] master_clock;\n\toutput reg[7:0] comdata;\n\toutput reg newcomdata;\n\toutput reg imthelast; // to remember if we're the last one in the chain\n\toutput wire imthefirst; // to remember if we're the last one in the chain\n\toutput reg rollingtrigger;\n\tinput trigDebug;\n\tinput [11:0] adcdata;\n\tinput adcready;\n\tinput adcvalid;\n\toutput reg getadcdata;\n\toutput reg [4:0] getadcadr;\n\toutput reg adcreset;\n\toutput reg [10:0] writesamp;\n\toutput reg writeadc;\n\toutput reg [11:0] adctestout;\n\toutput reg [7:0] downsample;\n\toutput reg [7:0] screendata;\n\toutput reg screenwren=0;\n\toutput reg [9:0] screenaddr = 10'd0;\n\toutput reg screenreset=0;\n\toutput reg [7:0] trigthresh = 8'h80, trigthreshtwo=8'hff; // the normal and high trigger thresholds\n\toutput reg [3:0] trigchannels = 4'b1111;\n\toutput reg [3:0] triggertype = 4'b0001;//rising edge on, falling edge off, other off\n   output reg [ram_width:0] triggertot;\n\toutput reg [15:0] SPIsenddata;//the bits to send\n\toutput reg SPIsend;//start sending\n\tinput [7:0] delaycounter;\n\tinput [7:0] carrycounter;\n\tinput [3:0] SPIstate;\n\toutput wire[3:0] offset;\n\toutput reg[3:0] gainsw;\n\treg[3:0] oversamp;\n\toutput wire debug1,debug2;\n\tinput [63:0] chip_id;\n\toutput reg highres=0;\n\toutput reg use_ext_trig=0;\n\toutput reg outputclk=1;\n\toutput reg[4:0] ext_trig_delay=0;\n\toutput reg noselftrig=0;\n\toutput reg[1:0] nselftrigcoincidentreq=0; // how many additional coincident channels to require for self trigger\n\toutput reg[7:0] selftrigtempholdtime=10; // how long to fire a channel for, to use for coincidence (and now the trigger rate counter too)\n\toutput reg allowsamechancoin=0; // whether to allow same channel, firing in the past, to count as coincidence\n\t\n\tinput [31:0] trigratecounter;\n\toutput reg trigratecountreset=0;\n\t\n\toutput reg i2c_ena;\n\toutput reg [6:0] i2c_addr;\n\toutput reg i2c_rw;\n\toutput reg [7:0] i2c_datawr;\n\tinput [7:0] i2c_datard;\n\tinput i2c_busy;\n\tinput i2c_ackerror;\n\treg [7:0] i2cdata[8];//up to 8 bytes of data to send\n\treg [3:0] i2c_datacounttosend,i2c_datacount;\n\treg i2cgo=0;\n\treg i2cdoread=0;\n\n  localparam READ=0, SOLVING=1, WAITING=2, WRITE_EXT1=3, WRITE_EXT2=4, WAIT_ADC1=5, WAIT_ADC2=6, WRITE_BYTE1=7, WRITE_BYTE2=8, READMORE=9, \n\tWRITE1=10, WRITE2=11,SPIWAIT=12,I2CWAIT=13,I2CSEND1=14,I2CSEND2=15,\n\tWRITE_USBFAST_EXT1=16, WRITE_USBFAST_EXT2=17,\n\tLOCKIN1=18,LOCKIN2=19,LOCKIN3=20,LOCKINWRITE1=21,LOCKINWRITE2=22,\n\tWRITE_USB_EXT1=24, WRITE_USB_EXT2=25, WRITE_USB_EXT3=26, WRITE_USB_EXT4=27, WRITE_USB_EXT5=28,\n\tPLLCLOCK=30;\n  reg[4:0] state,i2cstate;\n\n  reg [7:0] myid;\n  assign imthefirst = (myid==0);\n  reg [7:0] extradata[10];//to store command extra data, like arguemnts (up to 10 bytes)\n  reg [ram_width+2:0] SendCount=0;\n  reg [2:0] blockstosend=4; // will be 4 for normal, but 5 (or more) for sending logic analyzer stuff etc.\n  reg [15:0] nsamp = 6;\n  input [11:0] adcramdata;\n  reg writebyte;//whether we're sending the first or second byte (since it's 12 bits from the Max10 ADC)\n  reg[7:0] bytesread, byteswanted;\n  reg thecounterbit, thecounterbitlockin;\n  reg [7:0] clockbitstowait=5, clockbitstowaitlockin=3; //wait 2^clockbitstowait (8?) ticks before sending each data byte\n  reg [3:0] sendincrement = 0; //skip 2**sendincrement bytes each time\n  output reg [ram_width-1:0] nsmp = 0; // samplestosend\n  reg [7:0] chanforscreen=0;\n  reg autorearm=0;\n  integer thecounter=0, timeoutcounter=0, serialdelaytimer=0,serialdelaytimerwait=0;\n  reg[4:0] serialdelaycounter=0;\n  reg addonetoextradata=0;\n  \n  output wire clk_rd;\n  reg [7:0] usb2counter;\n  output reg do_usb=0;\n  input usb_clk60;\n  output wire [7:0] usb_dataio;\n  reg [7:0] usb_dataio_slow;\n  reg [7:0] usb_dataio_fast;\n\n  input usb_txe_busy;\n  reg usb_txe_not_busy;\n  output reg usb_oe=1;\n  output reg usb_rd=1;\n  input usb_rxf;\n  output reg usb_pwrsv=1;\n  output wire usb_wr, usb_siwu;\n  reg usb_wr_slow, usb_siwu_slow;\n  reg usb_wr_fast, usb_siwu_fast;\n  reg checkfastusbwriting=0;\n  \n  //TODO: use memory bits for this, not register space??\n  reg [5:0] screencolumndata [128]; //all the screen data, 128 columns of (8 rows of 8 dots)\n  \n  //For writing out data in WRITE1,2\n  reg[7:0] ioCount, ioCountToSend;\n  reg[7:0] data[0:15];\n  \n  //For lockin calculations\n  reg [7:0] numlockinbytes=16;//number of bytes of info to send for lockin info\n  integer lockinresult1;\n  integer lockinresult2;\n  reg [15:0] lockinnumtoshift = 0;\n  reg [31:0] chan2mean, chan3mean;\n  reg calcmeans;\n  \n  //for clock phase\n  reg[7:0] pllclock_counter=0;\n  reg[7:0] scanclk_cycles=0;\n  output reg[2:0] phasecounterselect; // Dynamic phase shift counter Select. 000:all 001:M 010:C0 011:C1 100:C2 101:C3 110:C4. Registered in the rising edge of scanclk.\n  output reg phaseupdown=1; // Dynamic phase shift direction; 1:UP, 0:DOWN. Registered in the PLL on the rising edge of scanclk.\n  output reg phasestep=0;\n  output reg scanclk=0;\n  \n  initial begin\n    state<=READ;\n\t i2cstate<=READ;\n\t usb2state<=USBFAST_IDLE;\n\t myid<=200;\n\t master_clock<=2'b00;//start as my own master\n\t imthelast<=0;//probably not last\n\t rollingtrigger<=1;\n\t triggerpoint<=(2**(ram_width-2));// 1/4 of the screen\n\t downsample<=1;\n\t serial_passthrough<=0;\n\t usb_siwu_slow<=1;\n\t gainsw<=4'b0000;//1 is for 1k resistor (gain 2), 0 is for 100 Ohm resistor (gain .2)\n\t oversamp<=4'b0011;//1 is for _no_ oversampling (and only matters for bits 0 and 1)\n\t led1<=1; //on\n\t led2<=1; //on\n\t led3<=1; //on\n\t led4<=1; //on\n\t io1<=0; //off\n\t io2<=0; //off\n\t io3<=0; //off\n\t io4<=0; //off\n  end\n  \n  //set the LEDs to indicate my ID\n  always @(posedge clk) begin\n\tthecounter<=thecounter+1;\n   if (thecounter[26]==1'b1 ) begin //flash every few seconds\n\t\tif (imthelast) begin\n\t\t\tled1<=0;\t\tled2<=0;\t\tled3<=0;//all off\n\t\tend\n\t\telse if (myid==0) begin\n\t\t\tled1<=0;\t\tled2<=0;\n\t\tend\n\t\telse begin\n\t\t\tled1<=0;\n\t\tend\n\tend\n\telse begin\n\t\tif (imthelast) begin\n\t\t\tled1<=1;\t\tled2<=1;\t\tled3<=1;//all on\n\t\tend\n\t\telse if (myid==0) begin\n\t\t\tled1<=1;\t\tled2<=1;\n\t\tend\n\t\telse begin\n\t\t\tled1<=1;\n\t\tend\n\tend\n\tif (thecounter[24]==1'b1 ) begin //pulse faster\n\t\tio3 <= 0;\n\tend\n\telse begin\n\t\tio3 <= 1;\n\tend\n  end\n  reg oldled1,oldled2,oldled3,oldled4,oldio1,oldio2,oldio3,oldio4;\n  \n//\treg [7:0] PWMoffset0 = 58; //22.7% *256;\n//\treg [7:0] PWMoffset1 = 58; //22.7% *256;\n//\treg [7:0] PWMoffset2 = 58; //22.7% *256;\n//\treg [7:0] PWMoffset3 = 58; //22.7% *256;\n//\treg [7:0] pwmcounter;\n//\t//For 1k and 0.1uF, freq=1.6kHz\n//\t//For 1k and 1uF, freq=160Hz\n//\tinteger PWMratecounter=0;\n//\tinteger PWMrate=2;//how fast we count the pwm clock\n//   always @(posedge clk) begin\n//\t\tif (PWMratecounter>=PWMrate) begin\n//\t\t\tpwmcounter <= pwmcounter + 1'b1;  // free-running counter\n//\t\t\tPWMratecounter=0;\n//\t\tend\n//\t\telse PWMratecounter=PWMratecounter+1;\n//\tend\n//\tassign offset[0] = (PWMoffset0 > pwmcounter);  // comparators\n//\tassign offset[1] = (PWMoffset1 > pwmcounter);  // comparators\n//\tassign offset[2] = (PWMoffset2 > pwmcounter);  // comparators\n//\tassign offset[3] = (PWMoffset3 > pwmcounter);  // comparators\n  \n  always @(posedge clk) begin\n    usb_txe_not_busy <= ~usb_txe_busy;\n    case (state)\n\t \n      READ: begin\n\t\t  get_ext_data<=0;\n\t\t  adcreset<=1;\n\t\t  txStart<=0;\n\t\t  getadcdata<=0;\n\t\t  bytesread<=0;\n\t\t  byteswanted<=0;\n\t\t  newcomdata<=0;\n\t\t  SPIsend<=0;\n\t\t  i2cgo=0;\n\t\t  usb_wr_slow<=1;\n        ioCount = 0;\n\t\t  send_fast_usb2=0;\n\t\t  addonetoextradata=0;\n\t\t  serialdelaycounter=0;\n\t\t  trigratecountreset=0;\n        if (rxReady) begin\n\t\t\t readdata = rxData;\n          state = SOLVING;\n        end\n\t\t  if (oldled1!=led1 || oldled2!=led2 || oldled3!=led3 || oldled4!=led4 || oldio1!=io1 || oldio2!=io2 || oldio3!=io3 || oldio4!=io4) begin\n\t\t\t oldled1=led1; oldled2=led2; oldled3=led3; oldled4=led4;\n\t\t\t oldio1=io1; oldio2=io2; oldio3=io3; oldio4=io4;\n\t\t\t //now send to i2c\n\t\t\t i2c_datacounttosend=2;//how many bytes of info to send (not counting address)\n\t\t\t i2c_addr=8'h21; // the second mcp io expander\n\t\t\t i2cdata[0]=8'h12; // port a\n\t\t\t i2cdata[1][0]=led1; i2cdata[1][1]=led2; i2cdata[1][2]=led3; i2cdata[1][3]=led4; // set the low 4 bits to be correct for the leds\n\t\t\t i2cdata[1][4]=io1; i2cdata[1][5]=io2; i2cdata[1][6]=io3; i2cdata[1][7]=io4; // set the high 4 bits to be correct for the ios\n\t\t\t i2cdata[2]=0; // not used for mcp io expanders\n\t\t\t if (i2cstate==READ) begin // if it's busy, we'll do nothing, oh well\n\t\t\t   i2cdoread = 0;\n\t\t\t\ti2cgo=1;\n\t\t\t end\n\t\t  end\n      end\n\t\t\n\t\tREADMORE: begin\n\t\t\tnewcomdata=0;\n\t\t\tif (rxReady) begin\n\t\t\t\textradata[bytesread] = rxData;\n\t\t\t\tif (addonetoextradata) comdata=rxData+1;//for propogating the board ID\n\t\t\t\telse comdata=rxData;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tbytesread = bytesread+1;\n\t\t\t\tif (bytesread>=byteswanted) state=SOLVING;\n\t\t\tend\n\t\tend\n\n      SOLVING: begin\n\t\t\tif (readdata < 10) begin // got character \"0-9\"\n\t\t\t\tmyid=readdata;//remember my ID\n\t\t\t\tif (readdata==0) begin\n\t\t\t\t\tmaster_clock=2'b00; //remain my own master\n\t\t\t\tend\n\t\t\t\telse master_clock=2'b01; //now a slave!\n\t\t\t\tcomdata=(readdata+1); // give the next one an ID one larger\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (readdata > 9 && readdata < 20) begin // got character \"10-19\"\n\t\t\t\tif (myid==(readdata-10)) begin\n\t\t\t\t\t//read me out\n\t\t\t\t\tserial_passthrough=0;\n\t\t\t\t\ttimeoutcounter=0;//start the clock\n\t\t\t\t\tstate=WAITING;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\t//pass it on, and set serial to \"passthrough mode\"\n\t\t\t\t\tserial_passthrough=1;\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata > 19 && readdata < 30) begin // got character \"20-29\"\n\t\t\t\tif (myid==(readdata-20)) begin\n\t\t\t\t\timthelast=1; // I'm the last one\n\t\t\t\t\toutputclk=0;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\timthelast=0;\n\t\t\t\t\toutputclk=1;\n\t\t\t\tend\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (readdata > 29 && readdata < 40) begin // got character \"30-39\"\n\t\t\t\tif (myid==(readdata-30)) begin\n\t\t\t\t\t//make me active\n\t\t\t\t\tserial_passthrough=0;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\t//pass it on, and set serial to \"passthrough mode\"\n\t\t\t\t\tserial_passthrough=1;\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tend\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\t\n\t\t\t// 40 is reserved for doing nothing, to check timing\n\t\t\t\n\t\t\telse if (readdata==50) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the ID to take (replacing 0-9)\n\t\t\t\tcomdata=readdata;\t\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\taddonetoextradata=1;// give the next one an ID one larger\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tmyid=extradata[0];//remember my ID\n\t\t\t\t\tif (extradata[0]==0) begin\n\t\t\t\t\t\tmaster_clock=2'b00; //remain my own master\n\t\t\t\t\tend\n\t\t\t\t\telse master_clock=2'b01; //now a slave!\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==51) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the board to read out (replacing 10-19)\n\t\t\t\tcomdata=readdata;\t\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tif (myid==extradata[0] || extradata[0]==255) begin // if 255 all boards read out with one command\n\t\t\t\t\t\t//read me out\n\t\t\t\t\t\tserial_passthrough=0;\n\t\t\t\t\t\ttimeoutcounter=0;//start the clock\n\t\t\t\t\t\tstate=WAITING;\n\t\t\t\t\tend\n\t\t\t\t\telse begin\n\t\t\t\t\t\t//if (myid<extradata[0]) begin\n\t\t\t\t\t\t\t//pass it on, and set serial to \"passthrough mode\"\n\t\t\t\t\t\t\tserial_passthrough=1;\n\t\t\t\t\t\t//end\n\t\t\t\t\t\tstate=READ;\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==52) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the board id that's the last one (replacing 20-29)\n\t\t\t\tcomdata=readdata;\t\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tif (myid==extradata[0]) begin\n\t\t\t\t\t\timthelast=1; // I'm the last one\n\t\t\t\t\t\toutputclk=0;\n\t\t\t\t\tend\n\t\t\t\t\telse begin\n\t\t\t\t\t\timthelast=0;\n\t\t\t\t\t\toutputclk=1;\n\t\t\t\t\tend\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==53) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the board to not set to serial passthrough, but all others go into serial passthough (replacing 30-39)\n\t\t\t\tcomdata=readdata;\t\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tif (myid==extradata[0]) begin\n\t\t\t\t\t\t//make me active\n\t\t\t\t\t\tserial_passthrough=0;\n\t\t\t\t\tend\n\t\t\t\t\telse begin\n\t\t\t\t\t\t//if (myid<extradata[0]) begin\n\t\t\t\t\t\t\t//pass it on, and set serial to \"passthrough mode\"\n\t\t\t\t\t\t\tserial_passthrough=1;\n\t\t\t\t\t\t//end\n\t\t\t\t\tend\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\t\n\t\t\telse if (54==readdata) begin\n\t\t\t\tif (imthelast) outputclk = ~outputclk; //tell the last one to toggle outputting the clock on the left\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (55==readdata) begin //adjust clock phases, if I'm the active one\n\t\t\t\tif (serial_passthrough) begin\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tphasecounterselect=3'b000; // all clocks - see https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyc3/cyc3_ciii51006.pdf table 5-10\n\t\t\t\t\t//phaseupdown=1'b1; // up\n\t\t\t\t\tscanclk=1'b0; // start low\n\t\t\t\t\tphasestep=1'b1; // assert!\n\t\t\t\t\tpllclock_counter=0;\n\t\t\t\t\tscanclk_cycles=0;\n\t\t\t\t\tstate=PLLCLOCK;\n\t\t\t\tend\n\t\t\tend\n\t\t\t\n\t\t\telse if (readdata==56) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the ext_trig_delay\n\t\t\t\tcomdata=readdata;\t\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\text_trig_delay = extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (57==readdata) begin // tell them all toggle just taking triggers in towards the right\n\t\t\t\tnoselftrig=~noselftrig;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (58==readdata) begin // tell them all toggle fast usb2 (sync 245 fifo)\n\t\t\t\tdo_fast_usb=~do_fast_usb;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (59==readdata) begin // tell them all toggle fast usb2 write cross-checking\n\t\t\t\tcheckfastusbwriting=~checkfastusbwriting;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\t\t\t\n\t\t\t\n\t\t\telse if (100==readdata) begin\n\t\t\t\t//tell them all to prime the trigger\n\t\t\t\tget_ext_data=1;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\t\n\t\t\telse if (101==readdata) begin\n\t\t\t\t//tell them all to roll the trigger\n\t\t\t\tio1=1;\n\t\t\t\trollingtrigger=1;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (102==readdata) begin\n\t\t\t\t//tell them all to not roll the trigger\n\t\t\t\tio1=0;\n\t\t\t\trollingtrigger=0;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\t\n\t\t\telse if (readdata>109 && readdata<120) begin // 110 to 119\n\t\t\t\tif (serial_passthrough) begin\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tif (readdata==119) getadcadr<=17;//send the data from the temp sensor\n\t\t\t\t\telse getadcadr<=(readdata-110);//send the data from adc, so 110->0 (pin AIN1), 111->1 (pin 6), up to 118->8 (pin 14)\n\t\t\t\t\twritesamp<=0;\n\t\t\t\t\tstate=WAIT_ADC1;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==120) begin\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the number of samples to read from max10 adc\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tnsamp=256*extradata[0]+extradata[1];\n\t\t\t\t\tif (nsamp>4095) nsamp=4095; //max of 4096 samples stored in the ram (12 bit writesamp address), and one less is needed (not sure why...)\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==121) begin\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the trigger point\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\ttriggerpoint=256*extradata[0]+extradata[1];\n\t\t\t\t\tif (triggerpoint>(2**ram_width)-16) triggerpoint=(2**ram_width)-16;\n\t\t\t\t\telse if (triggerpoint<4) triggerpoint=4;\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==122) begin\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the number of samples to send\n\t\t\t\tcomdata=readdata;\t\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tnsmp=256*extradata[0]+extradata[1];\n\t\t\t\t\tif (triggerpoint>(nsmp-5)) triggerpoint=nsmp/2;\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==123) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of bytes to skip after each send, log2\n\t\t\t\tcomdata=readdata;\t\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tsendincrement=extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==124) begin\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of samples to skip in the ADC, log2\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tif (extradata[0]>22) extradata[0]=22;\n\t\t\t\t\tdownsample=extradata[0];\n\t\t\t\t\tclockbitstowaitlockin = extradata[0]-2; // TODO - seems to work OK\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==125) begin\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of clock ticks to wait between sending bytes, log2\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tif (extradata[0]>30) extradata[0]=30;\n\t\t\t\t\tclockbitstowait=extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==126) begin\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel to draw on the mini-display\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tchanforscreen=extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\t\n\t\t\telse if (readdata==127) begin\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\n\t\t\t\tbyteswanted=1;//wait for next byte which is the trigger threshold\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\ttrigthresh=extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==128) begin\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\n\t\t\t\tbyteswanted=1;//wait for next byte which is the trigger type: rising, falling, either, ...\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\ttriggertype=extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==129) begin\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the trigger time over/under threshold required\n\t\t\t\tcomdata=readdata;\t\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\ttriggertot=256*extradata[0]+extradata[1];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==130) begin\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\n\t\t\t\tbyteswanted=1;//wait for next byte which is whether to trigger or not trigger on a given channel\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tif (extradata[0]/4 ==myid) begin //I have this channel\n\t\t\t\t\t\ttrigchannels[extradata[0]%4]=~trigchannels[extradata[0]%4];//invert previous value\n\t\t\t\t\tend\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==131) begin\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the data to send to SPI on the ADCs\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tSPIsenddata[15:8]=extradata[0];//0 (write) and the 7 bit address\n\t\t\t\t\tSPIsenddata[7:0]=extradata[1];//the bits to write to that address\n\t\t\t\t\tSPIsenddata[15]=1'b0;//write is 0\n\t\t\t\t\tSPIsend=1;\n\t\t\t\t\tstate=SPIWAIT;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==132) begin // send the delaycounter TDC data, if I'm the board being read out\n\t\t\t\tif (serial_passthrough) begin\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tioCountToSend = 1;\n\t\t\t\t\tdata[0]=delaycounter;\n\t\t\t\t\tstate=WRITE1;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==133) begin // send the carrycounter TDC data, if I'm the board being read out\n\t\t\t\tif (serial_passthrough) begin\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tioCountToSend = 1;\n\t\t\t\t\tdata[0]=carrycounter;\n\t\t\t\t\tstate=WRITE1;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==134) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tif (extradata[0]/4 ==myid) begin //I have this channel\n\t\t\t\t\t\tgainsw[extradata[0]%4]=~gainsw[extradata[0]%4];//switch the gain of the channel\n\t\t\t\t\tend\n\t\t\t\t\t//now send to i2c\n\t\t\t\t\ti2c_datacounttosend=2;//how many bytes of info to send (not counting address)\n\t\t\t\t\ti2c_addr=8'h20; // the first mcp io expander\n\t\t\t\t\ti2cdata[0]=8'h12; // port a\n\t\t\t\t\ti2cdata[1][3:0]=gainsw; // set the low 4 bits to be correct for the gain\n\t\t\t\t\ti2cdata[1][7:4]=oversamp; // set the high 4 bits to be correct for the oversampling\n\t\t\t\t\ti2cdata[2]=0; // not used for mcp io expanders\n\t\t\t\t\tif (i2cstate==READ) begin\n\t\t\t\t\t\ti2cdoread = 0;\n\t\t\t\t\t\ti2cgo=1;\n\t\t\t\t\tend\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==135) begin\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the serialdelaytimerwait\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tserialdelaytimerwait=50*(256*extradata[0]+extradata[1]); // 50 * amount given, so amount given in microseconds (20ns*50=1us) (except for the flipping clockbitstowait, so actually 2 us steps!)\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==136) begin\n\t\t\t\tbyteswanted=6;//wait for next bytes which are the stuff to send over i2c\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\t//i2c_addr = 7'b0100000;// 0x20 // for all 3 pins of (last 3 digits) to GND of MCP23017\n\t\t\t\t\t//i2c_addr = 7'b0100001;// 0x21 // for all a pin to VCC of MCP23017\n\t\t\t\t\t//i2c_addr = 7'b1100000;// 0x60 // for MCP4728\n\t\t\t\t\ti2c_datacounttosend=extradata[0];//how many bytes of info to send (not counting address)\n\t\t\t\t\ti2c_addr=extradata[1]; // get address to write to\n\t\t\t\t\ti2cdata[0]=extradata[2];\n\t\t\t\t\ti2cdata[1]=extradata[3];\n\t\t\t\t\ti2cdata[2]=extradata[4];\n\t\t\t\t\tif ((extradata[5]==myid || extradata[5]==200) && i2cstate==READ) begin // only pay attention if the board is broadcast (id 200) or for my id!\n\t\t\t\t\t\ti2cdoread = 0;\n\t\t\t\t\t\ti2cgo=1;\n\t\t\t\t\tend\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (137==readdata) begin\n\t\t\t\t//tell them to send over FT232H USB\n\t\t\t\tdo_usb=~do_usb;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (readdata==138) begin\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the lockinnumtoshift\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tlockinnumtoshift = 256*extradata[0]+extradata[1];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (139==readdata) begin\n\t\t\t\t//tell them to toggle automatic rearm of the trigger\n\t\t\t\tautorearm=~autorearm;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (readdata==140) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the high trigger threshold (must be below this to trigger)\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\ttrigthreshtwo = extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==141) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel to toggle oversampling for\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tif (extradata[0]/4 ==myid) begin //I have this channel\n\t\t\t\t\t\toversamp[extradata[0]%4]=~oversamp[extradata[0]%4];//switch the oversampling of the channel\n\t\t\t\t\tend\n\t\t\t\t\t//now send to i2c\n\t\t\t\t\ti2c_datacounttosend=2;//how many bytes of info to send (not counting address)\n\t\t\t\t\ti2c_addr=8'h20; // the first mcp io expander\n\t\t\t\t\ti2cdata[0]=8'h12; // port a\n\t\t\t\t\ti2cdata[1][3:0]=gainsw; // set the low 4 bits to be correct for the gain\n\t\t\t\t\ti2cdata[1][7:4]=oversamp; // set the high 4 bits to be correct for the oversampling\n\t\t\t\t\ti2cdata[2]=0; // not used for mcp io expanders\n\t\t\t\t\tif (i2cstate==READ) begin\n\t\t\t\t\t\ti2cdoread = 0;\n\t\t\t\t\t\ti2cgo=1;\n\t\t\t\t\tend\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\t\t\t\n\t\t\telse if (readdata==142) begin // send the uniqueID\n\t\t\t\tif (serial_passthrough) begin\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tdata[0]=chip_id[7+8*0:8*0];\n\t\t\t\t\tdata[1]=chip_id[7+8*1:8*1];\n\t\t\t\t\tdata[2]=chip_id[7+8*2:8*2];\n\t\t\t\t\tdata[3]=chip_id[7+8*3:8*3];\n\t\t\t\t\tdata[4]=chip_id[7+8*4:8*4];\n\t\t\t\t\tdata[5]=chip_id[7+8*5:8*5];\n\t\t\t\t\tdata[6]=chip_id[7+8*6:8*6];\n\t\t\t\t\tdata[7]=chip_id[7+8*7:8*7];\n\t\t\t\t\tioCountToSend = 8; // send 8 bytes\n\t\t\t\t\tstate=WRITE1;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (143==readdata) begin\n\t\t\t\t//tell them to toggle highres mode\n\t\t\t\thighres=~highres;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (144==readdata) begin\n\t\t\t\t//tell them to toggle using ext_trig_in\n\t\t\t\tuse_ext_trig=~use_ext_trig;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (readdata==145) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of blocks to send out (for fast adc data, digitial logic analyzer data, etc.)\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tblockstosend = extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==146) begin // send out a byte read from i2c\n\t\t\t\tbyteswanted=3;//wait for next bytes which are the chip/address to read from and the board id (or all)\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\ti2c_addr=extradata[0]; // get chip to read from\n\t\t\t\t\ti2c_datacounttosend=2;\n\t\t\t\t\ti2cdata[0]=extradata[1]; // get address to read from\n\t\t\t\t\ti2cdata[1]=0; // dummy\n\t\t\t\t\tif ((extradata[2]==myid || extradata[2]==200) && i2cstate==READ) begin // only pay attention if the board is broadcast (id 200) or for my id!\n\t\t\t\t\t\ti2cdoread = 1;\n\t\t\t\t\t\ti2cgo=1;\n\t\t\t\t\t\t//send message with read info (note - it won't be correct yet, since it takes time to read, so check back a little later!)\n\t\t\t\t\t\tioCountToSend = 1;\n\t\t\t\t\t\tdata[0] = i2c_datard;\n\t\t\t\t\t\tstate=WRITE1;\n\t\t\t\t\tend\n\t\t\t\t\telse state=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==147) begin // send the firmware version\n\t\t\t\tif (serial_passthrough) begin\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tioCountToSend = 1;\n\t\t\t\t\tdata[0]=22; // this is the firmware version\n\t\t\t\t\tstate=WRITE1;\n\t\t\t\tend\n\t\t\t\t\n\t\t\t\t//reset stuff!\t\t\t\t\n\t\t\t\trden=0;\n\t\t\t\ttrigthresh = 8'h80;\n\t\t\t\ttrigthreshtwo=8'hff;\n\t\t\t\ttrigchannels = 4'b1111;\n\t\t\t\ttriggertype = 4'b0001;   \n\t\t\t\thighres=0;\n\t\t\t\tuse_ext_trig=0;\n\t\t\t\text_trig_delay=0;\n\t\t\t\tnoselftrig=0;\n\t\t\t\tSendCount=0;\n\t\t\t\tblockstosend=4;\n\t\t\t\tnsamp = 6;\n\t\t\t\tclockbitstowait=5;\n\t\t\t\tsendincrement = 0;\n\t\t\t\tnsmp = 0;\n\t\t\t\tchanforscreen=0;\n\t\t\t\tautorearm=0;\n\t\t\t\tdo_usb=0;\n\t\t\t\tcheckfastusbwriting=0;\n\t\t\t\trollingtrigger=1;\n\t\t\t\ttriggerpoint=(2**(ram_width-2));\n\t\t\t\tdownsample=1;\n\t\t\t\tgainsw=4'b0000;\n\t\t\t\toversamp=4'b0011;\n\t\t\t\tsend_fast_usb2=0;\n\t\t\t\tdo_fast_usb=0;\n\t\t\t\tusbdonecounterslow=0;\n\t\t\t\tnselftrigcoincidentreq=0;\n\t\t\t\tselftrigtempholdtime=10;\n\t\t\t\tallowsamechancoin=0;\n\t\t\tend\n\t\t\telse if (readdata==148) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of coincident channels to require for the self trigger\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tnselftrigcoincidentreq = extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (readdata==149) begin\n\t\t\t\tbyteswanted=1;//wait for next byte which is how long to hold the self trigger active for (for coincidence purposes, and now trigger rate counter deadtime too)\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\n\t\t\t\telse begin\n\t\t\t\t\tselftrigtempholdtime = extradata[0];\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\tend\n\t\t\telse if (150==readdata) begin\n\t\t\t\t//tell them to toggle allow same channel coincidence\n\t\t\t\tallowsamechancoin=~allowsamechancoin;\n\t\t\t\tcomdata=readdata;\n\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\tstate=READ;\n\t\t\tend\n\t\t\telse if (readdata==151) begin // send the number of triggers, and reset\n\t\t\t\tif (serial_passthrough) begin\n\t\t\t\t\tcomdata=readdata;\n\t\t\t\t\tnewcomdata=1; //pass it on\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tdata[0]=trigratecounter[7+8*0:8*0];\n\t\t\t\t\tdata[1]=trigratecounter[7+8*1:8*1];\n\t\t\t\t\tdata[2]=trigratecounter[7+8*2:8*2];\n\t\t\t\t\tdata[3]=trigratecounter[7+8*3:8*3];\n\t\t\t\t\tioCountToSend = 4; // send 4 bytes\n\t\t\t\t\ttrigratecountreset=1;\n\t\t\t\t\tstate=WRITE1;\n\t\t\t\tend\n\t\t\tend\n\t\t\t\n\t\t\telse state=READ; // if we got some other command, just ignore it\n      end\n\t\t\n\t\tSPIWAIT: begin\n\t\t\tnewcomdata<=0; //set this back, to just send out data once\n\t\t\t//wait for SPIstate from oscillo to be nearly done\n\t\t\tif (SPIstate==3) begin \n\t\t\t\tstate=READ;\n\t\t\tend\n\t\tend\n\t\t\n\t\tPLLCLOCK: begin // to step the clock phase, you have to toggle scanclk a few times\n\t\t\tpllclock_counter=pllclock_counter+1;\n\t\t\tif (pllclock_counter[4]) begin\n\t\t\t\tscanclk = ~scanclk;\n\t\t\t\tpllclock_counter=0;\n\t\t\t\tscanclk_cycles=scanclk_cycles+1;\n\t\t\t\tif (scanclk_cycles>5) phasestep=1'b0; // deassert!\n\t\t\t\tif (scanclk_cycles>7) state=READ;\n\t\t\tend\n\t\tend\n\t\t\n\t\tWAITING: begin\n\t\t\tnewcomdata<=0; //set this back, to just send out data once\n\t\t\ttimeoutcounter=timeoutcounter+1;\n\t\t\tif (ext_data_ready) begin // can read out\n\t\t\t\tSendCount= 0;\n\t\t\t\trdaddress_slow = wraddress_triggerpoint - triggerpoint;// - 1;\n\t\t\t\trdadtwo_slow = rdaddress_slow;\n\t\t\t\tthecounterbit=thecounter[clockbitstowait];\n\t\t\t\tthecounterbitlockin=thecounter[clockbitstowaitlockin];\n\t\t\t\tif (lockinnumtoshift>0) begin\n\t\t\t\t\tlockinresult1=0;\n\t\t\t\t\tlockinresult2=0;\n\t\t\t\t\tchan2mean=0;\n\t\t\t\t\tchan3mean=0;\n\t\t\t\t\tcalcmeans=1;\n\t\t\t\t\tstate=LOCKIN1;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tif (do_usb) begin\n\t\t\t\t\t\tif (do_fast_usb) begin\n\t\t\t\t\t\t\tif (checkfastusbwriting) begin\n\t\t\t\t\t\t\t\tdo_usb<=0;\n\t\t\t\t\t\t\t\tstate=WRITE_EXT1;\n\t\t\t\t\t\t\tend\n\t\t\t\t\t\t\telse state=WRITE_USBFAST_EXT1;\n\t\t\t\t\t\tend\n\t\t\t\t\t\telse state=WRITE_USB_EXT1;\n\t\t\t\t\tend\n\t\t\t\t\telse state=WRITE_EXT1;\n\t\t\t\tend\n\t\t\tend\n\t\t\tif ( timeoutcounter > 100000000 ) begin\n\t\t\t\tstate=READ;//timeout!\n\t\t\t\t//ioCountToSend = 1;\n\t\t\t\t//data[0] = 8'hfb;//send message indicating timeout\n\t\t\t\t//state=WRITE1;\n\t\t\tend\n\t\tend\n\t\tLOCKIN1: begin\n\t\t\trden = 1;\n\t\t\tif ( (thecounter[clockbitstowaitlockin]!=thecounterbitlockin) ) begin\n\t\t\tcase(SendCount[ram_width+1:ram_width]) // we go through the samples 4 times\n\t\t\t\t0: begin\n\t\t\t\t\t// first time through we calculate the means\n\t\t\t\t\tchan2mean = chan2mean + ram_output3;\n\t\t\t\t\tchan3mean = chan3mean + ram_output4;\n\t\t\t\tend\n\t\t\t\t1: begin\n\t\t\t\t\tif (calcmeans) begin // do this just once - divide by the number of samples to get the average\n\t\t\t\t\t\tcalcmeans=0;\n\t\t\t\t\t\tchan2mean = chan2mean/4096;\n\t\t\t\t\t\tchan3mean = chan3mean/4096;\n\t\t\t\t\tend\n\t\t\t\t\t// next time through we calculate c2 * offset c3\n\t\t\t\t\t// shift rdadtwo and then accumulate\n\t\t\t\t\tif (SendCount[ram_width-1:0]>lockinnumtoshift && SendCount[ram_width-1:0]<(4096-lockinnumtoshift)) begin\n\t\t\t\t\t\tlockinresult2 = lockinresult2 + (ram_output3-chan2mean[7:0])*(ram_output4-chan3mean[7:0]);\t// accumulate the vector of channel 2 * shifted channel 3\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\t\t2: begin\n\t\t\t\t\t// next time through we calculate c2*c3\n\t\t\t\t\tif (SendCount[ram_width-1:0]>lockinnumtoshift && SendCount[ram_width-1:0]<(4096-lockinnumtoshift)) begin\n\t\t\t\t\t\tlockinresult1 = lockinresult1 + (ram_output3-chan2mean)*(ram_output4-chan3mean);\t// accumulate the vector of channel 2 * channel 3\t\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\t\t3: begin\n\t\t\t\t\t\t\n\t\t\t\tend\n\t\t\tendcase\t\t\t\n\t\t\tSendCount = SendCount + 1;\n\t\t\trdaddress_slow = rdaddress_slow + 1;\n\t\t\tif (SendCount[ram_width+1:ram_width]==1) rdadtwo_slow=rdaddress_slow-lockinnumtoshift;\n\t\t\telse rdadtwo_slow=rdaddress_slow;\n\t\t\tstate=LOCKIN2;\n\t\t\tend // the counter\n\t\tend\n\t\tLOCKIN2: begin\t\n\t\t\tstate=LOCKIN3;\n\t\tend\n\t\tLOCKIN3: begin\n\t\t\tif ( (thecounter[clockbitstowaitlockin]==thecounterbitlockin) ) begin\n\t\t\tif(SendCount[ram_width+1:0]==0) begin // we're done\n\t\t\t\tioCount = 0;\n\t\t\t\tSendCount = 0; // have to reset that top bit\n\t\t\t\tstate=LOCKINWRITE1;\n\t\t\tend\n\t\t\telse begin\n\t\t\t\tstate=LOCKIN1;\n\t\t\tend\n\t\t\tend // the counter\n\t\tend\n\t\tLOCKINWRITE1: begin\n       if (!txBusy) begin\n          if (ioCount==0) txData = lockinresult1[7+8*0:0+8*0];\n          else if (ioCount==1) txData = lockinresult1[7+8*1:0+8*1];\n          else if (ioCount==2) txData = lockinresult1[7+8*2:0+8*2];\n          else if (ioCount==3) txData = lockinresult1[7+8*3:0+8*3];\n          else if (ioCount==4) txData = lockinresult2[7+8*0:0+8*0];\n          else if (ioCount==5) txData = lockinresult2[7+8*1:0+8*1];\n          else if (ioCount==6) txData = lockinresult2[7+8*2:0+8*2];\n          else if (ioCount==7) txData = lockinresult2[7+8*3:0+8*3];\t\t\t \n\t\t\t else if (ioCount==8) txData = chan2mean[7+8*0:0+8*0];\n          else if (ioCount==9) txData = chan2mean[7+8*1:0+8*1];\n          else if (ioCount==10) txData = chan2mean[7+8*2:0+8*2];\n          else if (ioCount==11) txData = chan2mean[7+8*3:0+8*3];\n\t\t\t else if (ioCount==12) txData = chan3mean[7+8*0:0+8*0];\n          else if (ioCount==13) txData = chan3mean[7+8*1:0+8*1];\n          else if (ioCount==14) txData = chan3mean[7+8*2:0+8*2];\n          else if (ioCount==15) txData = chan3mean[7+8*3:0+8*3];\n\t\t\t else txData = 0;\n          txStart = 1;\n          state = LOCKINWRITE2;\n        end\n      end\n      LOCKINWRITE2: begin\n        txStart = 0;\n        if (ioCount < numlockinbytes-1) begin\n          ioCount = ioCount + 1;\n          state = LOCKINWRITE1;\n        end\n\t\t  else begin\n\t\t\t\trdaddress_slow = wraddress_triggerpoint - triggerpoint;// - 1;\n\t\t\t\trdadtwo_slow = rdaddress_slow;\n\t\t\t\tthecounterbit=thecounter[clockbitstowait];\n\t\t\t\tif (do_usb) begin\n\t\t\t\t\tif (do_fast_usb) begin\n\t\t\t\t\t\tstate=WRITE_USBFAST_EXT1;\n\t\t\t\t\tend\n\t\t\t\t\telse state=WRITE_USB_EXT1;\n\t\t\t\tend\n\t\t\t\telse state=WRITE_EXT1;\n        end\n      end\n\t\tWRITE_EXT1: begin\n\t\t\ttimeoutcounter=timeoutcounter+1;\n\t\t\trden = 1;\n\t\t\t//rotate through the outputs\n\t\t\tcase(SendCount[ram_width+2:ram_width])\n\t\t\t0: txData<=ram_output1;\n\t\t\t1: txData<=ram_output2;\n\t\t\t2: txData<=ram_output3;\n\t\t\t3: txData<=ram_output4;\n\t\t\t4: txData<=digital_buffer1; // the digital logic analyzer buffer\n\t\t\tendcase\n\t\t\tif( (!txBusy) && (thecounter[clockbitstowait]!=thecounterbit)) begin // wait a few clock cycles\t\t\t\t\n\t\t\t\ttxStart<= 1;\t\t\t\t\n\t\t\t\tserialdelaycounter=serialdelaycounter+1;\n\t\t\t\tSendCount = SendCount + (2**sendincrement);\n\t\t\t\trdaddress_slow = rdaddress_slow + (2**sendincrement);\n\t\t\t\trdadtwo_slow = rdaddress_slow;\n\t\t\t\tif (nsmp>0 && SendCount[ram_width-1:0]>=nsmp) begin\n\t\t\t\t\tSendCount[ram_width-1:0]=0;\n\t\t\t\t\tSendCount[ram_width+2:ram_width] = (SendCount[ram_width+2:ram_width] + 1);\n\t\t\t\t\trdaddress_slow = wraddress_triggerpoint - triggerpoint;// - 1;\n\t\t\t\t\trdadtwo_slow = rdaddress_slow;\n\t\t\t\tend\n\t\t\t\tstate=WRITE_EXT2;\n\t\t\tend\n\t\t\tif ( timeoutcounter > 100000000 ) begin\n\t\t\t\trden = 0;\n\t\t\t\tstate=READ;//timeout!\n\t\t\tend\n\t\tend\n\t\tWRITE_EXT2: begin\n\t\t\tif( thecounter[clockbitstowait]==thecounterbit ) begin\n\t\t\t\ttxStart<= 0;\n\t\t\t\tif(SendCount[ram_width+2:ram_width]==blockstosend) begin // it's 5 (or more) blocks including the logic analyzer info\n\t\t\t\t\tif (!checkfastusbwriting) begin\n\t\t\t\t\t\trden = 0;\n\t\t\t\t\t\tif (autorearm) begin\n\t\t\t\t\t\t\t//tell them all to prime the trigger\n\t\t\t\t\t\t\tget_ext_data=1;\n\t\t\t\t\t\tend\n\t\t\t\t\t\tstate=READ;\n\t\t\t\t\tend\n\t\t\t\t\telse begin\n\t\t\t\t\t\tdo_usb<=1;\n\t\t\t\t\t\tstate=WRITE_USBFAST_EXT1;\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\t\telse begin\t\t\t\t\t\n\t\t\t\t\tif(serialdelaycounter==0 && serialdelaytimer<serialdelaytimerwait) begin // every 32 bytes, 50000 is 1 ms\n\t\t\t\t\t\tserialdelaytimer=serialdelaytimer+1;\n\t\t\t\t\tend\n\t\t\t\t\telse begin\n\t\t\t\t\t\tif ( (rdaddress_slow-wraddress_triggerpoint-64)>=0 && (rdaddress_slow-wraddress_triggerpoint+64)<128 && (!SendCount[ram_width+2]) ) begin //update display // ignore logic analyzer info\n\t\t\t\t\t\t\tif (SendCount[ram_width+1:ram_width]==chanforscreen) screencolumndata[rdaddress_slow - wraddress_triggerpoint - 64]=(63-txData[7:2]);//store most significant 6 bits\n\t\t\t\t\t\t\tscreenwren = 1;\n\t\t\t\t\t\tend\n\t\t\t\t\t\tserialdelaytimer=0;\n\t\t\t\t\t\tstate=WRITE_EXT1;\n\t\t\t\t\tend\n\t\t\t\tend\n\t\t\tend\n\t\tend\n\t\t\n\t\tWRITE_USB_EXT1: begin\n\t\t\tif (usb_txe_not_busy) begin\n\t\t\t\tthecounterbit=thecounter[clockbitstowait];\n\t\t\t\tusb2counter<=0;\n\t\t\t\tstate=WRITE_USB_EXT2;\n\t\t\tend\n\t\t\t//debug2<=1;\n\t\t\trden = 1;\n\t\tend\n\t\tWRITE_USB_EXT2: begin\n\t\t\t//debug2<=0;\n\t\t\tusb2counter<=usb2counter+1;\n\t\t\t//rotate through the outputs\n\t\t\tcase(SendCount[ram_width+2:ram_width])\n\t\t\t\t0: usb_dataio_slow<=ram_output1;\n\t\t\t\t1: usb_dataio_slow<=ram_output2;\n\t\t\t\t2: usb_dataio_slow<=ram_output3;\n\t\t\t\t3: usb_dataio_slow<=ram_output4;\n\t\t\t\t4: usb_dataio_slow<=digital_buffer1; // the digital logic analyzer buffer\n\t\t\tendcase\n\t\t\tif( (usb2counter>clockbitstowait) && (thecounter[clockbitstowait]!=thecounterbit)) begin // wait a few clock cycles (usb2counter was set to 0 in last state)\n\t\t\t\tSendCount = SendCount + (2**sendincrement);\n\t\t\t\trdaddress_slow = rdaddress_slow + (2**sendincrement);\n\t\t\t\trdadtwo_slow = rdaddress_slow;\n\t\t\t\tif (nsmp>0 && SendCount[ram_width-1:0]>=nsmp) begin\n\t\t\t\t\tSendCount[ram_width-1:0]=0;\n\t\t\t\t\tSendCount[ram_width+2:ram_width] = (SendCount[ram_width+2:ram_width] + 1);\n\t\t\t\t\trdaddress_slow = wraddress_triggerpoint - triggerpoint;// - 1;\n\t\t\t\t\trdadtwo_slow = rdaddress_slow;\n\t\t\t\tend\n\t\t\t\tstate=WRITE_USB_EXT3;\n\t\t\tend\n\t\tend\n\t\tWRITE_USB_EXT3: begin\n\t\t\tusb_wr_slow<= 0;\n\t\t\tusb2counter<=0;\n\t\t\tstate=WRITE_USB_EXT4;\n\t\tend\n\t\tWRITE_USB_EXT4: begin\n\t\t\tusb2counter=usb2counter+1;\n\t\t\tif( (usb2counter>clockbitstowait) && (thecounter[clockbitstowait]==thecounterbit) ) begin // wait a few clock cycles (usb2counter was set to 0 in last state)\n\t\t\t\tusb_wr_slow<= 1;\t\n\t\t\t\tif(SendCount[ram_width+2:ram_width]==blockstosend) begin // it's 5 (or more) blocks including the logic analyzer info\n\t\t\t\t\trden = 0;\n\t\t\t\t\tif (autorearm) begin\n\t\t\t\t\t\t//tell them all to prime the trigger\n\t\t\t\t\t\tget_ext_data=1;\n\t\t\t\t\tend\n\t\t\t\t\tstate=WRITE_USB_EXT5;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tusb2counter=0;\n\t\t\t\t\tstate=WRITE_USB_EXT1;\n\t\t\t\tend\n\t\t\tend\n\t\tend\n\t\tWRITE_USB_EXT5: begin\n\t\t\tusb_siwu_slow=0;//this sends out the data to the PC immediately, without waiting for the latency timer (16 ms by default!)\n\t\t\tusb2counter<=usb2counter+1;\n\t\t\tif( (usb2counter>8) ) begin // wait a few clock cycles (usb2counter was set to 0 in last state)\n\t\t\t\tstate=READ;\n\t\t\t\tusb_siwu_slow=1;\n\t\t\tend\n\t\tend\n\n\t\tWAIT_ADC1: begin\n\t\t\tnewcomdata<=0; //set this back, to just send out data once\n\t\t\twriteadc<=0;\n\t\t\tgetadcdata<=1;\n\t\t\t//if (adcready) begin\n\t\t\t\tstate=WAIT_ADC2;\n\t\t\t//end\n\t\tend\n\t\tWAIT_ADC2: begin\n\t\t\tif (adcvalid) begin\n\t\t\t\tadctestout<=adcdata;\n\t\t\t\twriteadc<=1;\n\t\t\t\tgetadcdata<=0;\n\t\t\t\tif (writesamp>=(nsamp-1)) begin\n\t\t\t\t\twritesamp<=0;\n\t\t\t\t\twritebyte<=0;\n\t\t\t\t\tthecounterbit=thecounter[clockbitstowait];\n\t\t\t\t\tstate<=WRITE_BYTE1;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\twritesamp=writesamp+1;\n\t\t\t\t\tstate=WAIT_ADC1;\n\t\t\t\tend\n\t\t\tend\n\t\tend\n\t\tWRITE_BYTE1: begin\n\t\t\tnewcomdata<=0; //set this back, to just send out data once\n\t\t\twriteadc<=0;\n\t\t\tif(!txBusy && (thecounter[clockbitstowait]!=thecounterbit)) begin\n\t\t\t\tif (writebyte) txData=adcramdata[11:8];\n\t\t\t\telse txData=adcramdata[7:0];\n\t\t\t\ttxStart=1;\n\t\t\t\tserialdelaycounter=serialdelaycounter+1;\n\t\t\t\tstate=WRITE_BYTE2;\n\t\t\tend\n\t\tend\n\t\tWRITE_BYTE2: begin\n\t\t\ttxStart=0;\n\t\t\tif(serialdelaycounter==0 && serialdelaytimer<serialdelaytimerwait) begin // every 32 bytes, 50000 is 1 ms\n\t\t\t\tserialdelaytimer=serialdelaytimer+1;\n\t\t\tend\n\t\t\telse begin\n\t\t\t\tserialdelaytimer=0;\n\t\t\t\tif (writebyte) writesamp=writesamp+1;\n\t\t\t\twritebyte = ~writebyte;\n\t\t\t\tif (writesamp>(nsamp-1)) state=READ;\n\t\t\t\telse state=WRITE_BYTE1;\n\t\t\tend\n\t\tend\n\t\t\n\t\t//just writng out some data bytes over serial\n\t\tWRITE1: begin\n       newcomdata<=0; //set this back, to just send out data once\n       if (!txBusy) begin\n          txData = data[ioCount];\n          txStart = 1;\n          state = WRITE2;\n        end\n      end\n      WRITE2: begin\n        txStart = 0;\n        if (ioCount < ioCountToSend-1) begin\n          ioCount = ioCount + 1;\n          state = WRITE1;\n        end else begin\n          state = READ;\n        end\n      end\n\t\t\n\t\t //writing out over fast usb2\n\t\t WRITE_USBFAST_EXT1: begin\n\t\t\tsend_fast_usb2=1;\n\t\t\trden=1;\n\t\t\tif (usbdonecounterslow>1) state=WRITE_USBFAST_EXT2;\n\t\t\telse usbdonecounterslow<=usbdonecounterslow+1;\n\t\t end\n\t\t WRITE_USBFAST_EXT2: begin\n\t\t\tsend_fast_usb2=0;\n\t\t\tusbdonecounterslow<=0;\n\t\t\tif (send_fast_usb2_done) begin\n\t\t\t\trden=0;\n\t\t\t\tif (usbdonecounterslow==0) begin\n\t\t\t\t\t//doesn't work reliably for some reason\n\t\t\t\t\t//if (autorearm) begin\n\t\t\t\t\t//\t//tell them all to prime the trigger\n\t\t\t\t\t//\tget_ext_data=1;\n\t\t\t\t\t//end\n\t\t\t\t\tstate=READ;\n\t\t\t\tend\n\t\t\t\telse usbdonecounterslow<=usbdonecounterslow-1;\n\t\t\tend\n\t\t end\n\t\t\n    endcase\n\t \n  end\n\n//for debugging\nassign debug1=send_fast_usb2;//state[0];\nassign debug2=send_fast_usb2_done;//state[1];\nassign debug3=(usb2state[0]);\nassign debug4=(usb2state[1]);\n\n//for fast usb2\nreg send_fast_usb2=0;\nreg send_fast_usb2_done=0;\nreg do_fast_usb=0;\nreg[3:0] usbdonecounterfast=0;\nreg[3:0] usbdonecounterslow=0;\nreg [ram_width:0] SendCount_fast=0;\nreg[1:0] usb2state;\nlocalparam USBFAST_IDLE=0, USBFAST_BUSY=1, USBFAST_WRITE=2, USBFAST_DONE=3;\nassign rdaddress = ((do_usb && do_fast_usb) ? rdaddress_fast : rdaddress_slow);\nassign rdadtwo = ((do_usb && do_fast_usb) ? rdaddress_fast : rdadtwo_slow);\nassign usb_dataio = ((do_usb && do_fast_usb) ? usb_dataio_fast : usb_dataio_slow);\nassign usb_wr = ((do_usb && do_fast_usb) ? usb_wr_fast : usb_wr_slow);\nassign usb_siwu = ((do_usb && do_fast_usb) ? usb_siwu_fast : usb_siwu_slow);\nassign clk_rd = ((do_usb && do_fast_usb) ? usb_clk60 : clk);\nreg [ram_width:0] nsmp2 = 0; // for timing\nreg [2:0] SendCount_fast_chan=0;\nlocalparam fastusbpadding=3;\nalways @(posedge usb_clk60) begin\n\tcase (usb2state)\n\t\tUSBFAST_IDLE: begin\n\t\t\tsend_fast_usb2_done<=0;\n\t\t\tusb_wr_fast<=1;\n\t\t\tusb_siwu_fast<=1;\n\t\t\tif (nsmp>0) nsmp2<=nsmp+fastusbpadding;\n\t\t\telse nsmp2<=(2**ram_width)+fastusbpadding;\n\t\t\tSendCount_fast<=nsmp2-1;\n\t\t\tSendCount_fast_chan<=0;\n\t\t\trdaddress_fast = wraddress_triggerpoint - triggerpoint - 2*(2**sendincrement);\n\t\t\tusbdonecounterfast<=0;\n\t\t\tif (send_fast_usb2) begin\n\t\t\t\tusb2state<=USBFAST_BUSY;\n\t\t\tend\n\t\tend\n\t\tUSBFAST_BUSY: begin\n\t\t\tif (!usb_txe_busy) begin\n\t\t\t\trdaddress_fast = rdaddress_fast + (2**sendincrement);\n\t\t\t\tif (usbdonecounterfast>1) begin //need time to get data from the rdaddress of the dp_ram!\n\t\t\t\t\tusb_wr_fast<=0;\t\t\t\t\t\n\t\t\t\t\tusb2state<=USBFAST_WRITE;\n\t\t\t\t\tusbdonecounterfast<=0;\n\t\t\t\tend\n\t\t\t\telse usbdonecounterfast<=usbdonecounterfast+1;\n\t\t\tend\n\t\tend\n\t\tUSBFAST_WRITE: begin\n\t\t\tif (!usb_txe_busy) begin\n\t\t\t\tif(SendCount_fast_chan==blockstosend) begin // it's 5 (or more) blocks including the logic analyzer info\n\t\t\t\t\tusb_wr_fast<=1;\n\t\t\t\t\tsend_fast_usb2_done<=1;\n\t\t\t\t\tusb_siwu_fast<=0;//this sends out the data to the PC immediately, without waiting for the latency timer (16 ms by default!)\n\t\t\t\t\tusb2state<=USBFAST_DONE;\n\t\t\t\tend\n\t\t\t\telse if (SendCount_fast==0) begin\n\t\t\t\t\tusb_wr_fast<=0;\n\t\t\t\t\tSendCount_fast <= nsmp2;\n\t\t\t\t\tSendCount_fast_chan <= SendCount_fast_chan + 1;\n\t\t\t\t\trdaddress_fast = wraddress_triggerpoint - triggerpoint;\n\t\t\t\tend\n\t\t\t\telse begin\n\t\t\t\t\tusb_wr_fast<=0;\n\t\t\t\t\tSendCount_fast <= SendCount_fast - (2**sendincrement);\n\t\t\t\t\trdaddress_fast = rdaddress_fast + (2**sendincrement);\n\t\t\t\tend\n\t\t\tend\n\t\t\telse begin\n\t\t\t\tusb_wr_fast<=1;\n\t\t\t\tusb2state<=USBFAST_BUSY;\n\t\t\t\trdaddress_fast = rdaddress_fast - 3*(2**sendincrement);\n\t\t\tend\n\t\tend\n\t\tUSBFAST_DONE: begin\n\t\t\tif (usbdonecounterfast>1) usb2state<=USBFAST_IDLE;//gives a little time to make sure the processor sees the done signal\n\t\t\telse usbdonecounterfast<=usbdonecounterfast+1;\n\t\tend\n\tendcase\n\tcase(SendCount_fast_chan) //rotate through the outputs\n\t\t0: usb_dataio_fast=ram_output1;\n\t\t1: usb_dataio_fast=ram_output2;\n\t\t2: usb_dataio_fast=ram_output3;\n\t\t3: usb_dataio_fast=ram_output4;\n\t\t4: usb_dataio_fast=digital_buffer1; // the digital logic analyzer buffer\n\tendcase\nend\n  \n  //I2C, from https://eewiki.net/pages/viewpage.action?pageId=10125324\n  always @(posedge clk) begin\n   case (i2cstate)\n\t\tREAD: begin\n\t\t\ti2c_ena<=0;\n\t\t\tif (i2cgo) begin\n\t\t\t\ti2cstate=I2CWAIT;\n\t\t\tend\n\t\tend\n\t\tI2CWAIT: begin\n\t\t\tif (~i2c_busy) begin\n\t\t\t\t//i2c_addr set elsewhere first\n\t\t\t\ti2c_rw=0;\n\t\t\t\t//i2c_datacounttosend set elsewhere first\n\t\t\t\ti2c_datawr = i2cdata[0];\n\t\t\t\ti2c_datacount=1;\n\t\t\t\ti2cstate=I2CSEND1;\n\t\t\tend\n\t\tend\n\t\tI2CSEND1: begin\n\t\t\ti2c_ena = 1;\n\t\t\tif (i2c_datacount >= i2c_datacounttosend) begin\n\t\t\t\ti2cstate=READ; //sets i2c_ena back to 0\n\t\t\tend\n\t\t\telse if (i2c_busy) begin\n\t\t\t\ti2c_datawr = i2cdata[i2c_datacount];\n\t\t\t\tif (i2cdoread) begin\n\t\t\t\t\ti2c_rw=1; // set to read for second byte \n\t\t\t\tend\n\t\t\t\ti2cstate=I2CSEND2;\n\t\t\tend\n\t\tend\n\t\tI2CSEND2: begin\n\t\t\tif (~i2c_busy) begin\n\t\t\t\t//i2c_ackerror\n\t\t\t\ti2c_datacount = i2c_datacount+1;\n\t\t\t\ti2cstate=I2CSEND1;\n\t\t\tend\n\t\tend\n\tendcase\n\tend\n  \n  \t//update display\n\treg [5:0] columndata;\n\treg [2:0] row;\n\treg [6:0] column;\n\treg [3:0] b;\n\talways @(posedge clk) begin\n\t\tif (screenaddr>1000) screenreset<=1;\n\t\tscreenaddr = screenaddr + 1; // reset the screen at the beginning of the day - just once\n\t\trow=7-screenaddr[9:7];\n\t\tcolumn=screenaddr[6:0];\n\t\t\n\t\t//if (column>44) screencolumndata[column] = 64'h0000ff;//test hack\n\t\t//else screencolumndata[column] = 64'h000022;//test hack\t\t\n\t\t\n\t\tcolumndata = screencolumndata[column];//the current column, 64 bits, of screen data\n\t\t\n\t\t//now draw this row of this column\n\t\tif (columndata>=8*(row+1)) screendata = 8'hff; // e.g. if row=1, then if data is 16 and up, all on\n\t\telse if (columndata>=8*row) begin // e.g. if row=1, then if data is 8-15, set the appropriate bits, e.g. 5 -> 00011111\n\t\t\tscreendata=8'h00; b=0;\n\t\t\twhile (b<8) begin\n\t\t\t\tif (columndata[2:0]>b) screendata[b]=1;//7-b?\n\t\t\t\tb=b+1;\n\t\t\tend\n\t\tend\n\t\telse screendata = 8'h00; // e.g. if d=1, then if data is also not >7 (7 and down), all off\n\t\t\n\t\t//screendata = 8'h00;//temporarily turn off histo\n\t\t//if (column>44) screendata = 8'hff;//test hack\n\t\t\n\t\t//draws the board ID\n\t\tif (row==7 & trigDebug) begin\n\t\t\tif (myid>=screenaddr[6:1] && !screenaddr[0]) screendata = 8'hfa;\n\t\tend\n\t\tif (row==6 & !trigDebug) begin\n\t\t\tif (myid>=screenaddr[6:1] && !screenaddr[0]) screendata = 8'hfa;\n\t\tend\t\n\tend\n\t\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/serialprocessor.v.bak",
    "content": "// from http://www.sparxeng.com/blog/software/communicating-with-your-cyclone-ii-fpga-over-serial-port-part-3-number-crunching\r\n\r\nmodule processor(clk, rxReady, rxData, txBusy, txStart, txData, readdata, get_ext_data, ext_data_ready, wraddress_triggerpoint, rden, rdaddress, ram_output1, ram_output2, ram_output3, ram_output4,\r\nnewcomdata,comdata,led1,led2,led3,serial_passthrough,master_clock, imthelast,imthefirst,rollingtrigger,trigDebug, \r\nadcdata,adcready,getadcdata,getadcadr,adcvalid,adcreset,adcramdata,writesamp,writeadc,adctestout,\r\ntriggerpoint,downsample, screendata,screenwren,screenaddr,screenreset,trigthresh,trigchannels,triggertype,triggertot,\r\nSPIsend,SPIsenddata,delaycounter,carrycounter,ledbase,SPIstate,offset,gainsw,led4,\r\ni2c_ena,i2c_addr,i2c_rw,i2c_datawr,i2c_datard,i2c_busy,i2c_ackerror);\r\n   input clk;\r\n\tinput[7:0] rxData;\r\n   input rxReady;\r\n   input txBusy;\r\n   output reg txStart;\r\n   output reg[7:0] txData;\r\n   output reg[7:0] readdata;//first byte we got\r\n   output reg led1,led2,led3,led4,ledbase;\r\n  \toutput reg get_ext_data;\r\n\tinput ext_data_ready;\r\n\tparameter ram_width=12;//9 is 512 samples\r\n\tinput wire[ram_width-1:0] wraddress_triggerpoint;\r\n\toutput reg [ram_width-1:0] rdaddress;\r\n\toutput reg [ram_width-1:0] triggerpoint;\r\n\toutput reg rden;\r\n\tinput wire [7:0] ram_output1;\r\n\tinput wire [7:0] ram_output2;\r\n\tinput wire [7:0] ram_output3;\r\n\tinput wire [7:0] ram_output4;\r\n\toutput reg serial_passthrough;\r\n\toutput reg [1:0] master_clock;\r\n\toutput reg[7:0] comdata;\r\n\toutput reg newcomdata;\r\n\toutput reg imthelast; // to remember if we're the last one in the chain\r\n\toutput wire imthefirst; // to remember if we're the last one in the chain\r\n\toutput reg rollingtrigger;\r\n\tinput trigDebug;\r\n\tinput [11:0] adcdata;\r\n\tinput adcready;\r\n\tinput adcvalid;\r\n\toutput reg getadcdata;\r\n\toutput reg [4:0] getadcadr;\r\n\toutput reg adcreset;\r\n\toutput reg [11:0] writesamp;//max of 4096 samples\r\n\toutput reg writeadc;\r\n\toutput reg [11:0] adctestout;\r\n\toutput reg [4:0] downsample;\r\n\toutput reg [7:0] screendata;\r\n\toutput reg screenwren=0;\r\n\toutput reg [9:0] screenaddr = 10'd0;\r\n\toutput reg screenreset=0;\r\n\toutput reg [7:0] trigthresh = 8'h80;\r\n\toutput reg [3:0] trigchannels = 4'b1111;\r\n\toutput reg [3:0] triggertype = 4'b0001;//rising edge on, falling edge off, other off\r\n   output reg [ram_width:0] triggertot;\r\n\toutput reg [15:0] SPIsenddata;//the bits to send\r\n\toutput reg SPIsend;//start sending\r\n\tinput [7:0] delaycounter;\r\n\tinput [7:0] carrycounter;\r\n\tinput [3:0] SPIstate;\r\n\toutput wire[3:0] offset;\r\n\toutput reg[3:0] gainsw;\r\n\t\r\n\toutput reg i2c_ena;\r\n\toutput reg [6:0] i2c_addr;\r\n\toutput reg i2c_rw;\r\n\toutput reg [7:0] i2c_datawr;\r\n\tinput [7:0] i2c_datard;\r\n\tinput i2c_busy;\r\n\tinput i2c_ackerror;\r\n\treg [7:0] i2cdata1;\r\n\treg [7:0] i2cdata2;\r\n\r\n  localparam READ=0, SOLVING=1, WAITING=2, WRITE_EXT1=3, WRITE_EXT2=4, WAIT_ADC1=5, WAIT_ADC2=6, WRITE_BYTE1=7, WRITE_BYTE2=8, READMORE=9, WRITE1=10, WRITE2=11,SPIWAIT=12,I2CWAIT=13,I2CSEND1=14,I2CSEND2=15;\r\n  integer state;\r\n\r\n  reg [7:0] myid;\r\n  reg [7:0] extradata[3:0];//to store command extra data, like arguemnts\r\n  reg [ram_width+1:0] SendCount;\r\n  integer nsamp = 6;\r\n  input [11:0] adcramdata;\r\n  reg writebyte;//whether we're sending the first or second byte (since it's 12 bits from the Max10 ADC)\r\n  integer bytesread, byteswanted;\r\n  reg thecounterbit;\r\n  integer clockbitstowait = 5; //wait 2^clockbitstowait (8?) ticks before sending each data byte\r\n  reg [3:0] sendincrement = 0; //skip 2**sendincrement bytes each time\r\n  reg [ram_width-1:0] samplestosend = 0;\r\n  reg [7:0] chanforscreen=0;\r\n  reg canreadout;\r\n  \r\n  //TODO: use memory bits for this, not register space??\r\n  reg [5:0] screencolumndata [128]; //all the screen data, 128 columns of (8 rows of 8 dots)\r\n  \r\n  //For writing out data in WRITE1,2\r\n  localparam LEN = 1;//number of bytes to write out\r\n  localparam LENMAX = LEN - 1;\r\n  integer ioCount;\r\n  reg[7:0] data[0:LENMAX];\r\n  \r\n  initial begin\r\n    state<=READ;\r\n\t myid<=200;\r\n\t canreadout<=0;\r\n\t master_clock<=2'b00;//start as my own master\r\n\t imthelast<=0;//probably not last\r\n\t rollingtrigger<=1;\r\n\t triggerpoint<=(2**(ram_width-2));// 1/4 of the screen\r\n\t downsample<=1;\r\n\t serial_passthrough<=0;\r\n\t ledbase<=1;\r\n\t gainsw[0]<=0;//1 is for 1k resistor (gain 2), 0 is for 100 Ohm resistor (gain .2)\r\n\t gainsw[1]<=0;\r\n\t gainsw[2]<=0;\r\n\t gainsw[3]<=0;\r\n  end\r\n  \r\n  assign imthefirst = (myid==0);\r\n  \r\n  integer thecounter;\r\n  integer theoldcounter;\r\n  //set the LEDs to indicate my ID\r\n  always @(posedge clk) begin\r\n\tthecounter<=thecounter+1;\r\n\t\r\n\tif (state==READ) led4<=1;\r\n\telse led4<=0;\r\n  \r\n   if ( imthelast & thecounter[26]==1'b1 ) begin //flash every few seconds\r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=0;//all on\r\n\tend\r\n\telse if (txStart) begin\r\n\t//if (trigDebug) begin\t\t\r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=0;//all on\r\n\tend\r\n\telse if (myid==0) begin\t   \r\n\t\tled1<=1;\t\tled2<=1;\t\tled3<=1;//all off\r\n\tend\r\n\telse if (myid==1) begin\t   \r\n\t\tled1<=0;\t\tled2<=1;\t\tled3<=1;//binary 1\r\n\tend\r\n\telse if (myid==2) begin\t   \r\n\t\tled1<=1;\t\tled2<=0;\t\tled3<=1;//binary 2\r\n\tend\r\n\telse if (myid==3) begin\t   \r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=1;//binary 3\r\n\tend\r\n\telse if (myid==4) begin\t   \r\n\t\tled1<=1;\t\tled2<=1;\t\tled3<=0;//binary 4\r\n\tend\r\n\telse begin\t\t\r\n\t\tled1<=1;\t\tled2<=1;\t\tled3<=1;\r\n\tend\r\n  end\r\n  \r\n   //reg [7:0] PWMoffset = 23; //9.1%  *256;\r\n\treg [7:0] PWMoffset0 = 58; //22.7% *256;\r\n\treg [7:0] PWMoffset1 = 58; //22.7% *256;\r\n\treg [7:0] PWMoffset2 = 58; //22.7% *256;\r\n\treg [7:0] PWMoffset3 = 58; //22.7% *256;\r\n\treg [7:0] pwmcounter;\r\n   always @(posedge clk) begin\r\n\t\tpwmcounter <= pwmcounter + 1'b1;  // free-running counter\r\n\tend\r\n\tassign offset[0] = (PWMoffset0 > pwmcounter);  // comparators\r\n\tassign offset[1] = (PWMoffset1 > pwmcounter);  // comparators\r\n\tassign offset[2] = (PWMoffset2 > pwmcounter);  // comparators\r\n\tassign offset[3] = (PWMoffset3 > pwmcounter);  // comparators\r\n\r\n   always @(posedge clk) begin\r\n\t\tif (get_ext_data) canreadout=0;\r\n\t\tif (ext_data_ready) canreadout=1;\r\n\tend\r\n  \r\n  always @(posedge clk) begin\r\n    case (state)\r\n\t \r\n      READ: begin\r\n\t\t  get_ext_data<=0;\r\n\t\t  adcreset<=1;\r\n\t\t  txStart<=0;\r\n\t\t  getadcdata<=0;\r\n\t\t  bytesread<=0;\r\n\t\t  byteswanted<=0;\r\n\t\t  newcomdata<=0;\r\n\t\t  SPIsend<=0;\r\n\t\t  i2c_ena<=0;\r\n        if (rxReady) begin\r\n\t\t\t readdata = rxData;\r\n          state = SOLVING;\r\n        end\r\n      end\r\n\t\t\r\n\t\tREADMORE: begin\r\n\t\t\tnewcomdata=0;\r\n\t\t\tif (rxReady) begin\r\n\t\t\t\textradata[bytesread] = rxData;\r\n\t\t\t\tcomdata=rxData;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tbytesread = bytesread+1;\r\n\t\t\t\tif (bytesread>=byteswanted) state=SOLVING;\r\n\t\t\tend\r\n\t\tend\r\n\r\n      SOLVING: begin\r\n\t\t\tif (readdata < 10) begin // got character \"0-9\"\r\n\t\t\t\tmyid=readdata;//remember my ID\r\n\t\t\t\tif (readdata==0) begin\r\n\t\t\t\t\tmaster_clock=2'b00; //remain my own master\r\n\t\t\t\tend\r\n\t\t\t\telse master_clock=2'b01; //now a slave!\r\n\t\t\t\tcomdata=(readdata+1); // give the next one an ID one larger\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\t\t\t\r\n\t\t\t\r\n\t\t\telse if (readdata > 9 && readdata < 20) begin // got character \"10-19\"\r\n\t\t\t\tif (myid==(readdata-10)) begin\r\n\t\t\t\t\t//read me out\r\n\t\t\t\t\tserial_passthrough=0;\r\n\t\t\t\t\ttheoldcounter=thecounter;//start the clock\r\n\t\t\t\t\tstate=WAITING;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\t//pass it on, and set serial to \"passthrough mode\"\r\n\t\t\t\t\tserial_passthrough=1;\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (readdata > 19 && readdata < 30) begin // got character \"20-29\"\r\n\t\t\t\tif (myid==(readdata-20)) imthelast=1; // I'm the last one\r\n\t\t\t\telse imthelast=0;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (100==readdata) begin\r\n\t\t\t\t//tell them all to prime the trigger\r\n\t\t\t\tget_ext_data=1;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (101==readdata) begin\r\n\t\t\t\t//tell them all to roll the trigger\r\n\t\t\t\trollingtrigger=1;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (102==readdata) begin\r\n\t\t\t\t//tell them all to not roll the trigger\r\n\t\t\t\trollingtrigger=0;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (readdata>109 && readdata<120) begin // 110 to 119\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (readdata==119) getadcadr<=17;//send the data from the temp sensor\r\n\t\t\t\t\telse getadcadr<=(readdata-110);//send the data from adc, so 110->0 (pin AIN1), 111->1 (pin 6), up to 118->8 (pin 14)\r\n\t\t\t\t\twritesamp<=0;\r\n\t\t\t\t\tstate=WAIT_ADC1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==120) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the number of samples to read from max10 adc\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tnsamp=256*extradata[0]+1*extradata[1];\r\n\t\t\t\t\tif (nsamp>4095) nsamp=4095; //max of 4096 samples stored in the ram (12 bit writesamp address), and one less is needed (not sure why...)\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==121) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the trigger point\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggerpoint=256*extradata[0]+1*extradata[1];\r\n\t\t\t\t\tif (triggerpoint>(2**ram_width)-16) triggerpoint=(2**ram_width)-16;\r\n\t\t\t\t\telse if (triggerpoint<4) triggerpoint=4;\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==122) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the number of samples to send\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tsamplestosend=256*extradata[0]+1*extradata[1];\r\n\t\t\t\t\tif (triggerpoint>(samplestosend-5)) triggerpoint=samplestosend/2;\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==123) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of bytes to skip after each send, log2\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tsendincrement=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==124) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of samples to skip in the ADC, log2\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]>30) extradata[0]=30;\r\n\t\t\t\t\tdownsample=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==125) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of clock ticks to wait between sending bytes, log2\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]>30) extradata[0]=30;\r\n\t\t\t\t\tclockbitstowait=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==126) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel to draw on the mini-display\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tchanforscreen=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (readdata==127) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the trigger threshold\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttrigthresh=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==128) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the trigger type: rising, falling, either, ...\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggertype=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==129) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the trigger time over/under threshold required\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggertot=256*extradata[0]+1*extradata[1];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==130) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is whether to trigger or not trigger on a given channel\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]<4) trigchannels[extradata[0]]=~trigchannels[extradata[0]];//invert previous value\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==131) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the data to send to SPI on the ADCs\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tSPIsenddata[15:8]=extradata[0];//0 (write) and the 7 bit address\r\n\t\t\t\t\tSPIsenddata[7:0]=extradata[1];//the bits to write to that address\r\n\t\t\t\t\tSPIsenddata[15]=1'b0;//write is 0\r\n\t\t\t\t\tSPIsend=1;\r\n\t\t\t\t\tstate=SPIWAIT;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==132) begin // send the delaycounter TDC data, if I'm the board being read out\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tioCount = 0;\r\n\t\t\t\t\tdata[0]=delaycounter;\r\n\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==133) begin // send the carrycounter TDC data, if I'm the board being read out\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tioCount = 0;\r\n\t\t\t\t\tdata[0]=carrycounter;\r\n\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==134) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tgainsw[extradata[0]]=~gainsw[extradata[0]];//switch the gain of the channel\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==135) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the channel and PWM\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]==0) PWMoffset0 = extradata[1];//set the PWM value for the channel (fraction of 256 of which to be on for, *3.3V)\r\n\t\t\t\t\tif (extradata[0]==1) PWMoffset1 = extradata[1];\r\n\t\t\t\t\tif (extradata[0]==2) PWMoffset2 = extradata[1];\r\n\t\t\t\t\tif (extradata[0]==3) PWMoffset3 = extradata[1];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==136) begin\r\n\t\t\t\tbyteswanted=2;//wait for next byte which is the stuff to send over i2c\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\t//send over i2c!\t\t\t\t\t\r\n\t\t\t\t\ti2cdata1=extradata[0];\r\n\t\t\t\t\ti2cdata2=extradata[1];\r\n\t\t\t\t\tstate=I2CWAIT;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse state=READ; // if we got some other command, just ignore it\r\n      end\r\n\t\t\r\n\t\tSPIWAIT: begin\r\n\t\t\t//wait for SPIstate from oscillo to be nearly done\r\n\t\t\tif (SPIstate==3) begin \r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\tend\r\n\t\t\r\n\t\tWAITING: begin\r\n\t\t\tif (canreadout) begin\r\n\t\t\t\tSendCount = 0;\r\n\t\t\t\trdaddress = wraddress_triggerpoint - triggerpoint;// - 1;\r\n\t\t\t\tthecounterbit=thecounter[clockbitstowait];\r\n\t\t\t\tstate=WRITE_EXT1;\r\n\t\t\tend\r\n\t\t\tif ( (thecounter-theoldcounter) > 100000000 ) begin\r\n\t\t\t\tstate=READ;//timeout!\r\n\t\t\tend\r\n\t\tend\t\t\r\n\t\tWRITE_EXT1: begin\r\n\t\t\trden = 1;\r\n\t\t\tif(!txBusy && (thecounter[clockbitstowait]!=thecounterbit)) begin // wait a few clock cycles??\r\n\t\t\t\t//rotate through the 4 outputs\r\n\t\t\t\tif (SendCount[ram_width+1:ram_width]==0) txData=ram_output1;\r\n\t\t\t\tif (SendCount[ram_width+1:ram_width]==1) txData=ram_output2;\r\n\t\t\t\tif (SendCount[ram_width+1:ram_width]==2) txData=ram_output3;\r\n\t\t\t\tif (SendCount[ram_width+1:ram_width]==3) txData=ram_output4;\r\n\t\t\t\ttxStart = 1;\t\t\t\t\r\n\t\t\t\tSendCount = SendCount + (2**sendincrement);\r\n\t\t\t\trdaddress = rdaddress + (2**sendincrement);\r\n\t\t\t\tif (samplestosend>0 && SendCount[ram_width-1:0]>=samplestosend) begin\r\n\t\t\t\t\tSendCount[ram_width-1:0]=0;\r\n\t\t\t\t\tSendCount[ram_width+1:ram_width] = SendCount[ram_width+1:ram_width] + 1;\r\n\t\t\t\t\trdaddress = wraddress_triggerpoint - triggerpoint;// - 1;\r\n\t\t\t\tend\r\n\t\t\t\tstate=WRITE_EXT2;\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_EXT2: begin\r\n         txStart = 0;\r\n\t\t\tif(SendCount==0) begin \r\n\t\t\t\trden = 0;\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse begin\r\n\t\t\t\tif ( (rdaddress- wraddress_triggerpoint-64)>=0 && (rdaddress-wraddress_triggerpoint+64)<128 ) begin //update display // - triggerpoint ??\r\n\t\t\t\t\tif (SendCount[ram_width+1:ram_width]==chanforscreen) screencolumndata[rdaddress - wraddress_triggerpoint - 64]=63-txData[7:2];//store most significant 6 bits\r\n\t\t\t\t\tscreenwren <= 1;\r\n\t\t\t\tend\r\n\t\t\t\tstate=WRITE_EXT1;\r\n\t\t\tend\r\n\t\tend\t\t\r\n\t\t\r\n\t\tWAIT_ADC1: begin\r\n\t\t\twriteadc<=0;\r\n\t\t\tgetadcdata<=1;\r\n\t\t\t//if (adcready) begin\r\n\t\t\t\tstate=WAIT_ADC2;\r\n\t\t\t//end\r\n\t\tend\r\n\t\tWAIT_ADC2: begin\r\n\t\t\tif (adcvalid) begin\r\n\t\t\t\tadctestout<=adcdata;\r\n\t\t\t\twriteadc<=1;\r\n\t\t\t\tgetadcdata<=0;\r\n\t\t\t\tif (writesamp>=(nsamp-1)) begin\r\n\t\t\t\t\twritesamp<=0;\r\n\t\t\t\t\twritebyte<=0;\r\n\t\t\t\t\tthecounterbit=thecounter[clockbitstowait];\r\n\t\t\t\t\tstate<=WRITE_BYTE1;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\twritesamp=writesamp+1;\r\n\t\t\t\t\tstate=WAIT_ADC1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_BYTE1: begin\r\n\t\t\twriteadc<=0;\r\n\t\t\tif(!txBusy && (thecounter[clockbitstowait]!=thecounterbit)) begin\r\n\t\t\t\tif (writebyte) txData=adcramdata[11:8];\r\n\t\t\t\telse txData=adcramdata[7:0];\r\n\t\t\t\ttxStart=1;\r\n\t\t\t\tstate=WRITE_BYTE2;\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_BYTE2: begin\r\n\t\t\ttxStart=0;\r\n\t\t\tif (writebyte) writesamp=writesamp+1;\r\n\t\t\twritebyte = ~writebyte;\r\n\t\t\tif (writesamp>(nsamp-1)) state=READ;\r\n\t\t\telse state=WRITE_BYTE1;\r\n\t\tend\r\n\t\t\r\n\t\t//just writng out some data bytes\r\n\t\tWRITE1: begin\r\n        if (!txBusy) begin\r\n          txData = data[ioCount];\r\n          txStart = 1;\r\n          state = WRITE2;\r\n        end\r\n      end\r\n      WRITE2: begin\r\n        txStart = 0;\r\n        if (ioCount != LENMAX) begin\r\n          ioCount = ioCount + 1;\r\n          state = WRITE1;\r\n        end else begin\r\n          ioCount = 0;\r\n          state = READ;\r\n        end\r\n      end\r\n\t\t\r\n\t\t//I2C\r\n\t\tI2CWAIT: begin\r\n\t\t\tif (~i2c_busy) begin\r\n\t\t\t\ti2c_addr = 7'b0100000;// for all 3 pins (last 3 digits) to GND\r\n\t\t\t\t//i2c_addr = 7'b0100111;// for all 3 pins (last 3 digits) to VCC\r\n\t\t\t\ti2c_rw = 0;\r\n\t\t\t\ti2c_datawr = i2cdata1;\r\n\t\t\t\t//i2c_datard = \r\n\t\t\t\tstate=I2CSEND1;\r\n\t\t\tend\r\n\t\tend\r\n\t\tI2CSEND1: begin\r\n\t\t\ti2c_ena = 1;\r\n\t\t\tif (i2c_busy) begin\r\n\t\t\t\ti2c_datawr = i2cdata2;\r\n\t\t\t\tstate=I2CSEND2;\r\n\t\t\tend\t\t\t\t\r\n\t\tend\r\n\t\tI2CSEND2: begin\r\n\t\t\tif (~i2c_busy) begin\r\n\t\t\t\t//i2c_ackerror\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\tend\r\n\t\t\r\n    endcase\r\n\t \r\n  end\r\n  \r\n  \t//update display\r\n\treg [5:0] columndata;\r\n\treg [2:0] row;\r\n\treg [6:0] column;\r\n\treg [3:0] b;\r\n\talways @(posedge clk) begin\r\n\t\tif (screenaddr>1000) screenreset<=1;\r\n\t\tscreenaddr = screenaddr + 1; // reset the screen at the beginning of the day - just once\r\n\t\trow=7-screenaddr[9:7];\r\n\t\tcolumn=screenaddr[6:0];\r\n\t\t\r\n\t\t//if (column>44) screencolumndata[column] = 64'h0000ff;//test hack\r\n\t\t//else screencolumndata[column] = 64'h000022;//test hack\t\t\r\n\t\t\r\n\t\tcolumndata = screencolumndata[column];//the current column, 64 bits, of screen data\r\n\t\t\r\n\t\t//now draw this row of this column\r\n\t\tif (columndata>=8*(row+1)) screendata = 8'hff; // e.g. if row=1, then if data is 16 and up, all on\r\n\t\telse if (columndata>=8*row) begin // e.g. if row=1, then if data is 8-15, set the appropriate bits, e.g. 5 -> 00011111\r\n\t\t\tscreendata=8'h00; b=0;\r\n\t\t\twhile (b<8) begin\r\n\t\t\t\tif (columndata[2:0]>b) screendata[b]=1;//7-b?\r\n\t\t\t\tb=b+1;\r\n\t\t\tend\r\n\t\tend\r\n\t\telse screendata = 8'h00; // e.g. if d=1, then if data is also not >7 (7 and down), all off\r\n\t\t\r\n\t\t//screendata = 8'h00;//temporarily turn off histo\r\n\t\t//if (column>44) screendata = 8'hff;//test hack\r\n\t\t\r\n\t\t//draws the board ID\r\n\t\tif (row==7 & trigDebug) begin\r\n\t\t\tif (myid>=screenaddr[6:1] && !screenaddr[0]) screendata = 8'hfa;\r\n\t\tend\r\n\t\tif (row==6 & !trigDebug) begin\r\n\t\t\tif (myid>=screenaddr[6:1] && !screenaddr[0]) screendata = 8'hfa;\r\n\t\tend\r\n\t\r\n\tend\r\n  \r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/serialprocessor_slave.v",
    "content": "// from http://www.sparxeng.com/blog/software/communicating-with-your-cyclone-ii-fpga-over-serial-port-part-3-number-crunching\r\n\r\nmodule processor_slave(clk, rxReady, rxData, txBusy, txStart, txData, readdata, newgotdata, gotdata);\r\n  input clk;\r\n  input[7:0] rxData;\r\n  input rxReady;\r\n  input txBusy;\r\n  output reg txStart;\r\n  output reg[7:0] txData;\r\n  output reg[7:0] readdata;//first byte we got\r\n  input newgotdata;//from other processor\r\n  input[7:0] gotdata;\r\n  \r\n  localparam READ=0, SOLVING=1, WRITE1=2, WRITE2=3;\r\n  localparam LEN = 1;\r\n  localparam LENMAX = LEN - 1;\r\n\r\n  integer ioCount;\r\n  reg[7:0] data[0:LENMAX];\r\n  integer state;\r\n\r\n  initial begin\r\n    state = READ;\r\n  end\r\n\r\n  always @(posedge clk) begin\r\n    case (state)\r\n\t \r\n      READ: begin\r\n\t\t  txStart = 0;\r\n        if (rxReady) begin\r\n          data[ioCount] = rxData;\r\n\t\t\t if (ioCount == 0) readdata = rxData;\r\n          if (ioCount == LENMAX) begin\r\n            ioCount = 0;\r\n            state = SOLVING;\r\n          end else begin\r\n            ioCount = ioCount + 1;\r\n          end\r\n        end\r\n\t\t  \tif (newgotdata) begin\r\n\t\t\t\tioCount = 0;\r\n\t\t\t\tdata[0]=gotdata;\r\n\t\t\t\tstate=WRITE1;\r\n\t\t\tend\r\n      end\r\n\r\n      SOLVING: begin\r\n\t\t  begin\r\n          //if (readdata == 49) get_ext_data=1;\r\n        end\r\n\t\t  state=READ;\r\n        //state = WRITE1;\r\n      end\r\n\r\n      WRITE1: begin\r\n        if (!txBusy) begin\r\n          txData = data[ioCount];\r\n          txStart = 1;\r\n          state = WRITE2;\r\n        end\r\n      end\r\n\r\n      WRITE2: begin\r\n        txStart = 0;\r\n        if (ioCount != LENMAX) begin\r\n          ioCount = ioCount + 1;\r\n          state = WRITE1;\r\n        end else begin\r\n          ioCount = 0;\r\n          state = READ;\r\n        end\r\n      end\r\n\t\t\r\n    endcase\r\n\t \r\n  end\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/serialprocessor_slave.v.bak",
    "content": "// from http://www.sparxeng.com/blog/software/communicating-with-your-cyclone-ii-fpga-over-serial-port-part-3-number-crunching\r\n\r\nmodule processor(clk, rxReady, rxData, txBusy, txStart, txData, readdata, get_ext_data);\r\n  input clk;\r\n  input[7:0] rxData;\r\n  input rxReady;\r\n  input txBusy;\r\n  output reg txStart;\r\n  output reg get_ext_data;\r\n  output reg[7:0] txData;\r\n  output reg[7:0] readdata;//first byte we got\r\n\r\n  localparam READ=0, SOLVING=1, WRITE1=2, WRITE2=3;\r\n  localparam LEN = 1;\r\n  localparam LENMAX = LEN - 1;\r\n\r\n  integer ioCount;\r\n  reg[7:0] data[0:LENMAX];\r\n  integer state;\r\n\r\n  initial begin\r\n    txStart = 0;\r\n    state = READ;\r\n  end\r\n\r\n  always @(posedge clk) begin\r\n    case (state)\r\n\t \r\n      READ: begin\r\n\t\t  get_ext_data=0;\r\n        if (rxReady) begin\r\n          data[ioCount] = rxData;\r\n\t\t\t if (ioCount == 0) readdata = rxData;\r\n          if (ioCount == LENMAX) begin\r\n            ioCount = 0;\r\n            state = SOLVING;\r\n          end else begin\r\n            ioCount = ioCount + 1;\r\n          end\r\n        end\r\n      end\r\n\r\n      SOLVING: begin\r\n\t\t  begin\r\n          if (readdata == 49) get_ext_data=1;\r\n        end\r\n\t\t  state=READ;\r\n        //state = WRITE1;\r\n      end\r\n\r\n      WRITE1: begin\r\n        if (!txBusy) begin\r\n          txData = data[ioCount];\r\n          txStart = 1;\r\n          state = WRITE2;\r\n        end\r\n      end\r\n\r\n      WRITE2: begin\r\n        txStart = 0;\r\n        if (ioCount != LENMAX) begin\r\n          ioCount = ioCount + 1;\r\n          state = WRITE1;\r\n        end else begin\r\n          ioCount = 0;\r\n          state = READ;\r\n        end\r\n      end\r\n    endcase\r\n  end\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/tdc1.vhd",
    "content": "library ieee;\r\nuse ieee.std_logic_1164.all;\r\nuse ieee.numeric_std.all;\r\n\r\nentity DelayLine is\r\ngeneric (\r\nDATA_WIDTH : natural := 20\r\n);\r\n\r\nport (\r\noutput: out signed ((DATA_WIDTH-1) downto 0);\r\na: in signed ((DATA_WIDTH-1) downto 0); \r\nb: in signed ((DATA_WIDTH-1) downto 0); \r\nSTART: in std_logic;\r\nSTOP: in std_logic\r\n);\r\nend DelayLine;\r\n\r\narchitecture rtl of DelayLine is\r\n--SIGNAL reg: signed ((DATA_WIDTH-1) downto 0);\r\nSIGNAL buf: signed ((DATA_WIDTH-1) downto 0);\r\n\r\nbegin\r\nprocess (START,STOP,a,b)\r\nvariable s : signed ((DATA_WIDTH) downto 0);\r\nbegin\r\ns := ('0' & a) + ('0' & b) + ('0' & START); -- if a and b are 0 and 1, start will start filling buf with 0's, I think\r\nbuf<=s((DATA_WIDTH-1) downto 0);\r\n\r\nif (rising_edge(STOP)) then\r\noutput<=buf((DATA_WIDTH-1) downto 0); -- stop should freeze the output\r\nend if;\r\nend process;\r\n\r\nend rtl;\r\n"
  },
  {
    "path": "max10_adc_firmware/tdc1.vhd.bak",
    "content": "library ieee;\r\nuse ieee.std_logic_1164.all;\r\nuse ieee.numeric_std.all;\r\nentity signed_adder is \r\n\tgeneric ( DATA_WIDTH : natural := 127);\t\r\n\tport (\ta : in signed ((DATA_WIDTH-1) downto 0);\r\n\t\t\t\t\tb\t: in signed ((DATA_WIDTH-1) downto 0); \r\n\t\t\t\t\tcin : in std_logic; \r\n\t\t\t\t\tcout : out std_logic; \r\n\t\t\t\t\tresult : out signed ((DATA_WIDTH-1) downto 0) ); \r\nend entity; \r\narchitecture rtl of signed_adder is \r\nbegin \r\nPROCESS (cin, a, b) \r\n\tVARIABLE s : signed ((DATA_WIDTH) downto 0); \r\n\tBEGIN \r\n\t\ts := ('0' & a) + ('0' & b) + ('0' & cin); \r\n\t\tresult<=s((DATA_WIDTH-1) downto 0); \r\n\t\tcout <= s(DATA_WIDTH); \r\n\tEND process;\r\nend rtl; \r\n"
  },
  {
    "path": "max10_adc_firmware/tdc2.v",
    "content": "module chain_delay(clk,start,stop,result);\r\ninput clk, start, stop;\r\nparameter CHAIN_LEN = 200;\r\nwire [CHAIN_LEN-2:0] input1 = {{CHAIN_LEN-2{1'b0}},start} /* synthesis keep */; // that's ...0000000 or ...00000001\r\nwire [CHAIN_LEN-1:0] chain = {CHAIN_LEN-1{1'b1}} + input1 /* synthesis keep */; // that's 1111...1111, added to 1 or 0\r\n\r\n// I think it works like this... \r\n// when start is 0:  011111111 + 0000 = 011111111\r\n// when start goes to 1:  011111111 + 0001 = 100000000  i.e. 255+1=256\r\n// before the operation completes: 011110000, so the more 0's, the longer it ran\r\n// if it got to the end, the last bit should be a 1\r\n\r\noutput reg [CHAIN_LEN-1:0] result /* synthesis keep */;\r\nalways @(posedge stop) result<=chain;\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/tdc2.v.bak",
    "content": "\r\nmodule chain_delay_race\r\n(\r\n\tclk,rst,\r\n\tcalibrate_a,\r\n\tcalibrate_b,\r\n\ta_wins,\r\n\tb_wins,\r\n\tvalid\t\t\r\n);\r\n\r\nparameter CHAIN_LEN = 32;\r\nparameter CALIBRATE_BITS = 4;\r\nlocalparam CALIBRATE_DEC = (1<<CALIBRATE_BITS);\r\n\r\ninput clk,rst;\r\ninput [CALIBRATE_BITS-1:0] calibrate_a;\r\ninput [CALIBRATE_BITS-1:0] calibrate_b;\r\noutput a_wins,b_wins,valid;\r\n\r\nreg flush, valid;\r\n\r\n///////////////////////\r\n// input regs\r\n///////////////////////\r\nreg [CALIBRATE_BITS-1:0] calibrate_a_r /* synthesis preserve */;\r\nreg [CALIBRATE_BITS-1:0] calibrate_b_r /* synthesis preserve */;\r\n\r\nalways @(posedge clk) begin\r\n\tif (rst) begin\r\n\t\tcalibrate_a_r <= 0;\r\n\t\tcalibrate_b_r <= 0;\r\n\tend\r\n\telse begin\r\n\t\tcalibrate_a_r <= calibrate_a;\r\n\t\tcalibrate_b_r <= calibrate_b;\r\n\tend\r\nend\r\n\r\n///////////////////////\r\n// path A\r\n///////////////////////\r\nreg [CALIBRATE_DEC-1:0] calibrate_a_dec;\r\nalways @(posedge clk) begin\r\n\tcalibrate_a_dec <= 0;\r\n\tcalibrate_a_dec[calibrate_a_r] <= !flush;\r\nend\r\n\r\nwire [CHAIN_LEN:0] chain_a = {CHAIN_LEN{1'b1}} + calibrate_a_dec;\r\nwire a_out = chain_a[CHAIN_LEN];\r\n\r\n///////////////////////\r\n// path B\r\n///////////////////////\r\nreg [CALIBRATE_DEC-1:0] calibrate_b_dec;\r\nalways @(posedge clk) begin\r\n\tcalibrate_b_dec <= 0;\r\n\tcalibrate_b_dec[calibrate_b_r] <= !flush;\r\nend\r\n\r\nwire [CHAIN_LEN:0] chain_b = {CHAIN_LEN{1'b1}} + calibrate_b_dec;\r\nwire b_out = chain_b[CHAIN_LEN];\r\n\r\n///////////////////////\r\n// finish line latches\r\n///////////////////////\r\nwire a_wins_latch, b_wins_latch /* synthesis keep */;\r\nwire trial_complete = a_out & b_out;\r\nassign a_wins_latch = !flush & (a_wins_latch | (a_out & !b_out));\r\nassign b_wins_latch = !flush & (b_wins_latch | (b_out & !a_out));\r\n\r\n///////////////////////\r\n// resynchronize\r\n///////////////////////\r\nreg a_wins, b_wins, stable /* synthesis preserve */;\r\nalways @(posedge clk) begin\r\n\ta_wins <= a_wins_latch;\r\n\tb_wins <= b_wins_latch;\r\n\tstable <= trial_complete;\t\r\nend\r\n\r\n////////////////////////////////////\r\n// control - continuous retrigger\r\n////////////////////////////////////\r\nreg [1:0] state /* synthesis preserve */;\r\n\r\nalways @(posedge clk) begin\r\n\tif (rst) begin\r\n\t\tflush <= 1'b1;\r\n\t\tstate <= 2'b00;\r\n\t\tvalid <= 1'b0;\r\n\tend\r\n\telse begin\r\n\t\tcase (state)\r\n\t\t\t2'b00 : begin\r\n\t\t\t\tflush <= 1'b1;\r\n\t\t\t\tvalid <= 1'b0;\r\n\t\t\t\tif (!a_wins & !b_wins & !stable) state <= 2'b01;\r\n\t\t\tend\r\n\t\t\t2'b01 : begin\r\n\t\t\t\tflush <= 1'b0;\r\n\t\t\t\tif (stable) state <= 2'b10;\r\n\t\t\tend\r\n\t\t\t2'b10 : begin\r\n\t\t\t\tvalid <= 1'b1;\r\n\t\t\t\tstate <= 2'b00;\r\n\t\t\tend\r\n\t\t\t2'b11 : begin\r\n\t\t\t\t// unreachable\r\n\t\t\t\tstate <= 2'b00;\r\n\t\t\tend\r\n\t\tendcase\r\n\tend\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2/altchip_id.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n////////////////////////////////////////////////////////////////////\n//\n//   ALTCHIP_ID\n//\n//  Copyright (C) 1991-2013 Altera Corporation\n//  Your use of Altera Corporation's design tools, logic functions \n//  and other software and tools, and its AMPP partner logic \n//  functions, and any output files from any of the foregoing \n//  (including device programming or simulation files), and any \n//  associated documentation or information are expressly subject \n//  to the terms and conditions of the Altera Program License \n//  Subscription Agreement, Altera MegaCore Function License \n//  Agreement, or other applicable license agreement, including, \n//  without limitation, that your use is for the sole purpose of \n//  programming logic devices manufactured by Altera and sold by \n//  Altera or its authorized distributors.  Please refer to the \n//  applicable agreement for further details.\n//\n////////////////////////////////////////////////////////////////////\n\n// synthesis VERILOG_INPUT_VERSION VERILOG_2001\n\nmodule  altchip_id\n\t( \n\tclkin,\n\tchip_id,\n\tdata_valid,\n\treset);\n\t\n\tinput\tclkin;\n\toutput\t[63:0]\tchip_id;\n\toutput\tdata_valid;\n\tinput\treset;\n\t\n\tparameter\tDEVICE_FAMILY\t= \"Stratix V\";\t\n\tparameter\tID_VALUE\t= 64'hffffffffffffffff;\n\tparameter\tID_VALUE_STR\t= \"ffffffffffffffff\";\n\t\n\t// clock cycle for shiftnld\n\tlocalparam\tLOAD_WIDTH\t= 'h01;\t\n\tlocalparam\tDATA_WIDTH\t= 'h60;\t// gray of binary 0100 0000, for 64 clock cycles\n\t\n\twire  \tclkin_wire;\n\twire\tcurrent_state_wire;\n\twire\tregout_wire;\n\twire\t[6:0]   wire_gen_cntr_q;\n\twire\t[63:0]\twire_shift_reg_q;\n\twire \treset_wire;\n\treg\t\tcurrent_state_reg;\n\treg\t\tdata_valid_reg;\n\treg\t\tend_op_reg;\n\treg\t\tend_stage_pos_reg;\n\treg\t\t[63:0]\toutput_reg;\n\treg\t\tbusy_reg;\n\t\n\tinitial begin\n\t\tcurrent_state_reg = 1'b0;\n\t\tdata_valid_reg = 1'b0;\n\t\tend_op_reg = 1'b0;\n\t\tend_stage_pos_reg = 1'b0;\n\t\toutput_reg = 64'h0000000000000000;\n\t\tbusy_reg = 1'b0;\n\tend\n\t\n\t// clkin and reset input\n\tassign clkin_wire = clkin;\n\tassign reset_wire = reset; \n\t\n\t// busy_reg to indicate read id operation is in progress\n\talways @ (posedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) busy_reg <= 1'b0;\n\t\telse if (data_valid_reg) busy_reg <= 1'b0;\n\t\telse busy_reg <= 1'b1;\n\t\t\n\t// general counter to count the number of clock cycles in each stage\n\ta_graycounter   gen_cntr\n\t( \n\t\t.aclr(reset_wire),\n\t\t.clk_en(busy_reg),\n\t\t.clock(~ clkin_wire),\n\t\t.q(wire_gen_cntr_q),\n\t\t.qbin(),\n\t\t.sclr(end_stage_pos_reg | end_op_reg),\n\t\t.cnt_en(1'b1),\n\t\t.updown(1'b1)\n\t);\n\tdefparam\n\t\tgen_cntr.width = 7,\n\t\tgen_cntr.lpm_type = \"a_graycounter\";\n\t\n\t// state machine to control the shiftnld of chipidblock\n\t// state 0 - loading the unique chip id from fuse to shift register, 1 clock cycle\n\t// state 1 - shifting shift register to read out the value of unique chip id, 64 clock cycles\n\talways @ (posedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1)  current_state_reg <= 1'b0;\n\t\telse if (busy_reg == 1'b0) current_state_reg <= 1'b0;\n\t\telse if (data_valid_reg == 1'b1) current_state_reg <= 1'b0;\n\t\telse if (end_stage_pos_reg == 1'b1) current_state_reg <= (~ current_state_wire);\n\t\telse current_state_reg <= current_state_reg;\n\tassign current_state_wire = current_state_reg;\n\t\n\t// end stage signal\n\talways @ (posedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) end_stage_pos_reg <= 1'b0;\n\t\telse if (data_valid_reg == 1'b1) end_stage_pos_reg <= 1'b0;\n\t\telse end_stage_pos_reg <= (((~ current_state_wire) & (wire_gen_cntr_q == LOAD_WIDTH)) | \n\t\t\t\t\t\t\t\t\t\t(current_state_wire & (wire_gen_cntr_q == DATA_WIDTH)));\n\t\n\talways @ (negedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) end_op_reg <= 1'b0;\n\t\telse end_op_reg <= (current_state_wire & end_stage_pos_reg);\n\t\t\n\t// -------------------------------------------------------------------\n\t// Instantiate wysiwyg for chipidblock according to device family\n\t// -------------------------------------------------------------------\t\n\tgenerate\n\t\tif (DEVICE_FAMILY == \"MAX 10\") begin\n\t\t\tfiftyfivenm_chipidblock   chipidblock_dut\t//MAX 10 FPGA\n\t\t\t( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tdefparam\n\t\t\t\tchipidblock_dut.id_value = ID_VALUE_STR;\n\t\t\tend\n\t\telse if (DEVICE_FAMILY == \"Stratix V\") begin\n\t\t\tstratixv_chipidblock   chipidblock_dut\t\t//Stratix V\n\t\t\t( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\n\t\telse if (DEVICE_FAMILY == \"Arria V GZ\") begin\n\t\t\tarriavgz_chipidblock   chipidblock_dut\t\t//Arria V GZ\n\t\t\t( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\n\t\telse if (DEVICE_FAMILY == \"Arria V\") begin\n\t\t\tarriav_chipidblock   chipidblock_dut\t\t//Arria V\n\t\t\t( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\n\t\telse begin\n\t\t\tcyclonev_chipidblock   chipidblock_dut\t\t//Cyclone V\n\t\t\t( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\n\tendgenerate\n\t\n\t// -------------------------------------------------------------------\n\t// Output signals\n\t// -------------------------------------------------------------------\n\t// data_valid output - operation is completed\n\talways @ (posedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) data_valid_reg <= 1'b0;\n\t\telse if (end_op_reg == 1'b1) data_valid_reg <= 1'b1;\n\t\telse data_valid_reg <= data_valid_reg;\n\tassign data_valid = data_valid_reg;\n\t// shift register to convert serial output to parallel\n\tgenerate\n\t\tif (DEVICE_FAMILY == \"MAX 10\") begin\n            lpm_shiftreg\tshift_reg \n                (\n\t\t         .aclr (reset_wire),\n\t\t         .clock (~clkin_wire),\n\t\t         .shiftin (regout_wire),\n\t\t         .q (wire_shift_reg_q),\n\t\t         .enable(((~ end_op_reg) & (~ data_valid_reg)) | (~ busy_reg)),\n\t\t         .aset (1'b0),\n\t\t         .data (64'b0),\n\t\t         .load (1'b0),\n\t\t         .sclr (~ busy_reg),\n\t\t         .shiftout (),\n\t\t         .sset (1'b0)\n\t             );\n\t        defparam\n\t\t        shift_reg.lpm_direction = \"RIGHT\",\n\t\t        shift_reg.lpm_type = \"LPM_SHIFTREG\",\n\t\t        shift_reg.lpm_width = 64;\n\t\tend\n\t\telse begin\n\t        lpm_shiftreg\tshift_reg \n                (\n\t\t         .aclr (reset_wire),\n\t\t         .clock (clkin_wire),\n\t\t         .shiftin (regout_wire),\n\t\t         .q (wire_shift_reg_q),\n\t\t         .enable(((~ end_op_reg) & (~ data_valid_reg)) | (~ busy_reg)),\n\t\t         .aset (1'b0),\n\t\t         .data (64'b0),\n\t\t         .load (1'b0),\n\t\t         .sclr (~ busy_reg),\n\t\t         .shiftout (),\n\t\t         .sset (1'b0)\n\t             );\n\t        defparam\n\t\t        shift_reg.lpm_direction = \"RIGHT\",\n\t\t        shift_reg.lpm_type = \"LPM_SHIFTREG\",\n\t\t        shift_reg.lpm_width = 64;\n\t\tend\n\tendgenerate\n\n\n\t\n\talways @ (negedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) output_reg <= 64'h0000000000000000;\n\t\telse if (data_valid_reg == 1'b0) begin\n\t\t\tif  (end_stage_pos_reg == 1'b1)   output_reg <= {wire_shift_reg_q[63:0]};\n\t\t\telse output_reg <= output_reg;\n\t\tend\n\t\telse output_reg <= output_reg;\n\t\n\t//output\n\tassign chip_id = output_reg;\n\t\t\nendmodule //altchip_id\n//VALID FILE\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2.bsf",
    "content": "/*\nWARNING: Do NOT edit the input and output ports in this file in a text\neditor if you plan to continue editing the block that represents it in\nthe Block Editor! File corruption is VERY likely to occur.\n*/\n/*\nCopyright (C) 2018  Intel Corporation. All rights reserved.\nYour use of Intel Corporation's design tools, logic functions \nand other software and tools, and its AMPP partner logic \nfunctions, and any output files from any of the foregoing \n(including device programming or simulation files), and any \nassociated documentation or information are expressly subject \nto the terms and conditions of the Intel Program License \nSubscription Agreement, the Intel Quartus Prime License Agreement,\nthe Intel FPGA IP License Agreement, or other applicable license\nagreement, including, without limitation, that your use is for\nthe sole purpose of programming logic devices manufactured by\nIntel and sold by Intel or its authorized distributors.  Please\nrefer to the applicable agreement for further details.\n*/\n(header \"symbol\" (version \"1.1\"))\n(symbol\n\t(rect 0 0 192 144)\n\t(text \"uniqueid2\" (rect 69 -1 104 11)(font \"Arial\" (font_size 10)))\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\n\t(port\n\t\t(pt 0 72)\n\t\t(input)\n\t\t(text \"clkin\" (rect 0 0 16 12)(font \"Arial\" (font_size 8)))\n\t\t(text \"clkin\" (rect 4 61 34 72)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 72)(pt 48 72)(line_width 1))\n\t)\n\t(port\n\t\t(pt 0 112)\n\t\t(input)\n\t\t(text \"reset\" (rect 0 0 20 12)(font \"Arial\" (font_size 8)))\n\t\t(text \"reset\" (rect 4 101 34 112)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 0 112)(pt 48 112)(line_width 1))\n\t)\n\t(port\n\t\t(pt 192 72)\n\t\t(output)\n\t\t(text \"data_valid\" (rect 0 0 40 12)(font \"Arial\" (font_size 8)))\n\t\t(text \"data_valid\" (rect 140 61 200 72)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 192 72)(pt 112 72)(line_width 1))\n\t)\n\t(port\n\t\t(pt 192 88)\n\t\t(output)\n\t\t(text \"chip_id[63..0]\" (rect 0 0 51 12)(font \"Arial\" (font_size 8)))\n\t\t(text \"chip_id[63..0]\" (rect 125 77 209 88)(font \"Arial\" (font_size 8)))\n\t\t(line (pt 192 88)(pt 112 88)(line_width 3))\n\t)\n\t(drawing\n\t\t(text \"clkin\" (rect 23 43 76 99)(font \"Arial\" (color 128 0 0)(font_size 9)))\n\t\t(text \"clk\" (rect 53 67 124 144)(font \"Arial\" (color 0 0 0)))\n\t\t(text \"reset\" (rect 19 83 68 179)(font \"Arial\" (color 128 0 0)(font_size 9)))\n\t\t(text \"reset\" (rect 53 107 136 224)(font \"Arial\" (color 0 0 0)))\n\t\t(text \"output\" (rect 113 43 262 99)(font \"Arial\" (color 128 0 0)(font_size 9)))\n\t\t(text \"valid\" (rect 89 67 208 144)(font \"Arial\" (color 0 0 0)))\n\t\t(text \"data\" (rect 91 83 206 176)(font \"Arial\" (color 0 0 0)))\n\t\t(text \" altchip_id \" (rect 149 128 370 266)(font \"Arial\" ))\n\t\t(line (pt 48 32)(pt 112 32)(line_width 1))\n\t\t(line (pt 112 32)(pt 112 128)(line_width 1))\n\t\t(line (pt 48 128)(pt 112 128)(line_width 1))\n\t\t(line (pt 48 32)(pt 48 128)(line_width 1))\n\t\t(line (pt 49 52)(pt 49 76)(line_width 1))\n\t\t(line (pt 50 52)(pt 50 76)(line_width 1))\n\t\t(line (pt 49 92)(pt 49 116)(line_width 1))\n\t\t(line (pt 50 92)(pt 50 116)(line_width 1))\n\t\t(line (pt 111 52)(pt 111 92)(line_width 1))\n\t\t(line (pt 110 52)(pt 110 92)(line_width 1))\n\t\t(line (pt 0 0)(pt 192 0)(line_width 1))\n\t\t(line (pt 192 0)(pt 192 144)(line_width 1))\n\t\t(line (pt 0 144)(pt 192 144)(line_width 1))\n\t\t(line (pt 0 0)(pt 0 144)(line_width 1))\n\t)\n)\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2.cmp",
    "content": "\tcomponent uniqueid2 is\n\t\tport (\n\t\t\tclkin      : in  std_logic                     := 'X'; -- clk\n\t\t\treset      : in  std_logic                     := 'X'; -- reset\n\t\t\tdata_valid : out std_logic;                            -- valid\n\t\t\tchip_id    : out std_logic_vector(63 downto 0)         -- data\n\t\t);\n\tend component uniqueid2;\n\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2.ppf",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<pinplan\n variation_name=\"uniqueid2\"\n megafunction_name=\"ALTCHIP_ID\"\n intended_family=\"MAX 10\"\n specifies=\"all_ports\">\n <global>\n  <pin name=\"clkin\" direction=\"input\" scope=\"external\" />\n  <pin name=\"reset\" direction=\"input\" scope=\"external\" />\n  <pin name=\"data_valid\" direction=\"output\" scope=\"external\" />\n  <pin name=\"chip_id[63..0]\" direction=\"output\" scope=\"external\" />\n </global>\n</pinplan>\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2.qip",
    "content": "set_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_TOOL_NAME \"altchip_id\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_TOOL_ENV \"mwpim\"\nset_global_assignment -library \"uniqueid2\" -name MISC_FILE [file join $::quartus(qip_path) \"uniqueid2.cmp\"]\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_TARGETED_DEVICE_FAMILY \"MAX 10\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_QSYS_MODE \"UNKNOWN\"\nset_global_assignment -name SYNTHESIS_ONLY_QIP ON\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_COMPONENT_NAME \"dW5pcXVlaWQy\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_COMPONENT_DISPLAY_NAME \"VW5pcXVlIENoaXAgSUQgSW50ZWwgRlBHQSBJUA==\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_COMPONENT_REPORT_HIERARCHY \"Off\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_COMPONENT_INTERNAL \"Off\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_COMPONENT_AUTHOR \"QWx0ZXJhIENvcnBvcmF0aW9u\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_COMPONENT_VERSION \"MTguMA==\"\nset_global_assignment -entity \"uniqueid2\" -library \"uniqueid2\" -name IP_COMPONENT_DESCRIPTION \"VGhlIEFsdGVyYSBVbmlxdWUgQ2hpcCBJRCBtZWdhZnVuY3Rpb24gcHJvdmlkZXMgZmVhdHVyZSB0byBhY3F1aXJlIHRoZSB1bmlxdWUgY2hpcCBJRCBvZiBGUEdBLg==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_NAME \"YWx0Y2hpcF9pZA==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_DISPLAY_NAME \"VW5pcXVlIENoaXAgSUQgSW50ZWwgRlBHQSBJUA==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_REPORT_HIERARCHY \"Off\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_INTERNAL \"Off\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_AUTHOR \"QWx0ZXJhIENvcnBvcmF0aW9u\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_VERSION \"MTguMA==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_DESCRIPTION \"VGhlIEFsdGVyYSBVbmlxdWUgQ2hpcCBJRCBtZWdhZnVuY3Rpb24gcHJvdmlkZXMgZmVhdHVyZSB0byBhY3F1aXJlIHRoZSB1bmlxdWUgY2hpcCBJRCBvZiBGUEdBLg==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_PARAMETER \"REVWSUNFX0ZBTUlMWQ==::TUFYIDEw::REVWSUNFX0ZBTUlMWQ==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_PARAMETER \"SURfVkFMVUU=::MTg0NDY3NDQwNzM3MDk1NTE2MTU=::UGxlYXNlIGVudGVyIHRoZSBkZXNpcmVkIFVuaXF1ZSBDaGlwIElEIGluIEhleGFkZWNpbWFsIGZvciBzaW11bGF0aW9uOg==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_COMPONENT_PARAMETER \"SURfVkFMVUVfU1RS::MDAwMDAwMDBmZmZmZmZmZg==::SURfVkFMVUVfU1RS\"\n\nset_global_assignment -library \"uniqueid2\" -name VERILOG_FILE [file join $::quartus(qip_path) \"uniqueid2.v\"]\nset_global_assignment -library \"uniqueid2\" -name VERILOG_FILE [file join $::quartus(qip_path) \"uniqueid2/altchip_id.v\"]\n\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_TOOL_NAME \"altchip_id\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid2\" -name IP_TOOL_ENV \"mwpim\"\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2.sip",
    "content": "set_global_assignment -entity \"uniqueid2\" -library \"lib_uniqueid2\" -name IP_TOOL_NAME \"altchip_id\"\nset_global_assignment -entity \"uniqueid2\" -library \"lib_uniqueid2\" -name IP_TOOL_VERSION \"18.0\"\nset_global_assignment -entity \"uniqueid2\" -library \"lib_uniqueid2\" -name IP_TOOL_ENV \"mwpim\"\nset_global_assignment -library \"lib_uniqueid2\" -name SPD_FILE [file join $::quartus(sip_path) \"uniqueid2.spd\"]\n\nset_global_assignment -library \"lib_uniqueid2\" -name MISC_FILE [file join $::quartus(sip_path) \"uniqueid2_sim/uniqueid2.v\"]\nset_global_assignment -library \"lib_uniqueid2\" -name MISC_FILE [file join $::quartus(sip_path) \"uniqueid2_sim/altchip_id/altchip_id.v\"]\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2.spd",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<simPackage>\n <file\n   path=\"uniqueid2_sim/altchip_id/altchip_id.v\"\n   type=\"VERILOG\"\n   library=\"uniqueid2\" />\n <file path=\"uniqueid2_sim/uniqueid2.v\" type=\"VERILOG\" />\n <topLevel name=\"uniqueid2\" />\n <deviceFamily name=\"max10\" />\n</simPackage>\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2.v",
    "content": "// megafunction wizard: %Unique Chip ID Intel FPGA IP v18.0%\n// GENERATION: XML\n// uniqueid2.v\n\n// Generated using ACDS version 18.0 614\n\n`timescale 1 ps / 1 ps\nmodule uniqueid2 (\n\t\tinput  wire        clkin,      //  clkin.clk\n\t\tinput  wire        reset,      //  reset.reset\n\t\toutput wire        data_valid, // output.valid\n\t\toutput wire [63:0] chip_id     //       .data\n\t);\n\n\taltchip_id #(\n\t\t.DEVICE_FAMILY (\"MAX 10\"),\n\t\t.ID_VALUE      (64'b1111111111111111111111111111111111111111111111111111111111111111),\n\t\t.ID_VALUE_STR  (\"00000000ffffffff\")\n\t) uniqueid2_inst (\n\t\t.clkin      (clkin),      //  clkin.clk\n\t\t.reset      (reset),      //  reset.reset\n\t\t.data_valid (data_valid), // output.valid\n\t\t.chip_id    (chip_id)     //       .data\n\t);\n\nendmodule\n// Retrieval info: <?xml version=\"1.0\"?>\n//<!--\n//\tGenerated by Altera MegaWizard Launcher Utility version 1.0\n//\t************************************************************\n//\tTHIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\n//\t************************************************************\n//\tCopyright (C) 1991-2021 Altera Corporation\n//\tAny megafunction design, and related net list (encrypted or decrypted),\n//\tsupport information, device programming or simulation file, and any other\n//\tassociated documentation or information provided by Altera or a partner\n//\tunder Altera's Megafunction Partnership Program may be used only to\n//\tprogram PLD devices (but not masked PLD devices) from Altera.  Any other\n//\tuse of such megafunction design, net list, support information, device\n//\tprogramming or simulation file, or any other related documentation or\n//\tinformation is prohibited for any other purpose, including, but not\n//\tlimited to modification, reverse engineering, de-compiling, or use with\n//\tany other silicon devices, unless such use is explicitly licensed under\n//\ta separate agreement with Altera or a megafunction partner.  Title to\n//\tthe intellectual property, including patents, copyrights, trademarks,\n//\ttrade secrets, or maskworks, embodied in any such megafunction design,\n//\tnet list, support information, device programming or simulation file, or\n//\tany other related documentation or information provided by Altera or a\n//\tmegafunction partner, remains with Altera, the megafunction partner, or\n//\ttheir respective licensors.  No other licenses, including any licenses\n//\tneeded under any third party's intellectual property, are provided herein.\n//-->\n// Retrieval info: <instance entity-name=\"altchip_id\" version=\"18.0\" >\n// Retrieval info: \t<generic name=\"DEVICE_FAMILY\" value=\"MAX 10\" />\n// Retrieval info: \t<generic name=\"ID_VALUE\" value=\"18446744073709551615\" />\n// Retrieval info: </instance>\n// IPFS_FILES : uniqueid2.vo\n// RELATED_FILES: uniqueid2.v, altchip_id.v\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/aldec/rivierapro_setup.tcl",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 18.0 614 win32 2021.05.28.12:59:19\n# ----------------------------------------\n# Auto-generated simulation script rivierapro_setup.tcl\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     uniqueid2\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level script that compiles Altera simulation libraries and\n# the Quartus-generated IP in your project, along with your design and\n# testbench files, copy the text from the TOP-LEVEL TEMPLATE section below\n# into a new file, e.g. named \"aldec.do\", and modify the text as directed.\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator.\n# #\n# set QSYS_SIMDIR <script generation output directory>\n# #\n# # Source the generated IP simulation script.\n# source $QSYS_SIMDIR/aldec/rivierapro_setup.tcl\n# #\n# # Set any compilation options you require (this is unusual).\n# set USER_DEFINED_COMPILE_OPTIONS <compilation options>\n# set USER_DEFINED_VHDL_COMPILE_OPTIONS <compilation options for VHDL>\n# set USER_DEFINED_VERILOG_COMPILE_OPTIONS <compilation options for Verilog>\n# #\n# # Call command to compile the Quartus EDA simulation library.\n# dev_com\n# #\n# # Call command to compile the Quartus-generated IP simulation files.\n# com\n# #\n# # Add commands to compile all design files and testbench files, including\n# # the top level. (These are all the files required for simulation other\n# # than the files compiled by the Quartus-generated IP simulation script)\n# #\n# vlog -sv2k5 <your compilation options> <design and testbench files>\n# #\n# # Set the top-level simulation or testbench module/entity name, which is\n# # used by the elab command to elaborate the top level.\n# #\n# set TOP_LEVEL_NAME <simulation top>\n# #\n# # Set any elaboration options you require.\n# set USER_DEFINED_ELAB_OPTIONS <elaboration options>\n# #\n# # Call command to elaborate your design and testbench.\n# elab\n# #\n# # Run the simulation.\n# run\n# #\n# # Report success to the shell.\n# exit -code 0\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If uniqueid2 is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n\n# ----------------------------------------\n# Initialize variables\nif ![info exists SYSTEM_INSTANCE_NAME] { \n  set SYSTEM_INSTANCE_NAME \"\"\n} elseif { ![ string match \"\" $SYSTEM_INSTANCE_NAME ] } { \n  set SYSTEM_INSTANCE_NAME \"/$SYSTEM_INSTANCE_NAME\"\n}\n\nif ![info exists TOP_LEVEL_NAME] { \n  set TOP_LEVEL_NAME \"uniqueid2\"\n}\n\nif ![info exists QSYS_SIMDIR] { \n  set QSYS_SIMDIR \"./../\"\n}\n\nif ![info exists QUARTUS_INSTALL_DIR] { \n  set QUARTUS_INSTALL_DIR \"C:/intelfpga_lite/18.0/quartus/\"\n}\n\nif ![info exists USER_DEFINED_COMPILE_OPTIONS] { \n  set USER_DEFINED_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_VHDL_COMPILE_OPTIONS] { \n  set USER_DEFINED_VHDL_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_VERILOG_COMPILE_OPTIONS] { \n  set USER_DEFINED_VERILOG_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_ELAB_OPTIONS] { \n  set USER_DEFINED_ELAB_OPTIONS \"\"\n}\n\n# ----------------------------------------\n# Initialize simulation properties - DO NOT MODIFY!\nset ELAB_OPTIONS \"\"\nset SIM_OPTIONS \"\"\nif ![ string match \"*-64 vsim*\" [ vsim -version ] ] {\n} else {\n}\n\nset Aldec \"Riviera\"\nif { [ string match \"*Active-HDL*\" [ vsim -version ] ] } {\n  set Aldec \"Active\"\n}\n\nif { [ string match \"Active\" $Aldec ] } {\n  scripterconf -tcl\n  createdesign \"$TOP_LEVEL_NAME\"  \".\"\n  opendesign \"$TOP_LEVEL_NAME\"\n}\n\n# ----------------------------------------\n# Copy ROM/RAM files to simulation directory\nalias file_copy {\n  echo \"\\[exec\\] file_copy\"\n}\n\n# ----------------------------------------\n# Create compilation libraries\nproc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }\nensure_lib      ./libraries     \nensure_lib      ./libraries/work\nvmap       work ./libraries/work\nensure_lib                  ./libraries/altera_ver      \nvmap       altera_ver       ./libraries/altera_ver      \nensure_lib                  ./libraries/lpm_ver         \nvmap       lpm_ver          ./libraries/lpm_ver         \nensure_lib                  ./libraries/sgate_ver       \nvmap       sgate_ver        ./libraries/sgate_ver       \nensure_lib                  ./libraries/altera_mf_ver   \nvmap       altera_mf_ver    ./libraries/altera_mf_ver   \nensure_lib                  ./libraries/altera_lnsim_ver\nvmap       altera_lnsim_ver ./libraries/altera_lnsim_ver\nensure_lib                  ./libraries/fiftyfivenm_ver \nvmap       fiftyfivenm_ver  ./libraries/fiftyfivenm_ver \nensure_lib           ./libraries/uniqueid2\nvmap       uniqueid2 ./libraries/uniqueid2\n\n# ----------------------------------------\n# Compile device library files\nalias dev_com {\n  echo \"\\[exec\\] dev_com\"\n  eval vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"              -work altera_ver      \n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                       -work lpm_ver         \n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                          -work sgate_ver       \n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                      -work altera_mf_ver   \n  vlog  $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS      \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                  -work altera_lnsim_ver\n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"              -work fiftyfivenm_ver \n  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \n}\n\n# ----------------------------------------\n# Compile the design files in correct order\nalias com {\n  echo \"\\[exec\\] com\"\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/altchip_id/altchip_id.v\" -work uniqueid2\n  eval  vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/uniqueid2.v\"                            \n}\n\n# ----------------------------------------\n# Elaborate top level design\nalias elab {\n  echo \"\\[exec\\] elab\"\n  eval vsim +access +r -t ps $ELAB_OPTIONS -L work -L uniqueid2 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Elaborate the top level design with -dbg -O2 option\nalias elab_debug {\n  echo \"\\[exec\\] elab_debug\"\n  eval vsim -dbg -O2 +access +r -t ps $ELAB_OPTIONS -L work -L uniqueid2 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design\nalias ld \"\n  dev_com\n  com\n  elab\n\"\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design with -dbg -O2\nalias ld_debug \"\n  dev_com\n  com\n  elab_debug\n\"\n\n# ----------------------------------------\n# Print out user commmand line aliases\nalias h {\n  echo \"List Of Command Line Aliases\"\n  echo\n  echo \"file_copy                                         -- Copy ROM/RAM files to simulation directory\"\n  echo\n  echo \"dev_com                                           -- Compile device library files\"\n  echo\n  echo \"com                                               -- Compile the design files in correct order\"\n  echo\n  echo \"elab                                              -- Elaborate top level design\"\n  echo\n  echo \"elab_debug                                        -- Elaborate the top level design with -dbg -O2 option\"\n  echo\n  echo \"ld                                                -- Compile all the design files and elaborate the top level design\"\n  echo\n  echo \"ld_debug                                          -- Compile all the design files and elaborate the top level design with -dbg -O2\"\n  echo\n  echo \n  echo\n  echo \"List Of Variables\"\n  echo\n  echo \"TOP_LEVEL_NAME                                    -- Top level module name.\"\n  echo \"                                                     For most designs, this should be overridden\"\n  echo \"                                                     to enable the elab/elab_debug aliases.\"\n  echo\n  echo \"SYSTEM_INSTANCE_NAME                              -- Instantiated system module name inside top level module.\"\n  echo\n  echo \"QSYS_SIMDIR                                       -- Platform Designer base simulation directory.\"\n  echo\n  echo \"QUARTUS_INSTALL_DIR                               -- Quartus installation directory.\"\n  echo\n  echo \"USER_DEFINED_COMPILE_OPTIONS                      -- User-defined compile options, added to com/dev_com aliases.\"\n  echo\n  echo \"USER_DEFINED_ELAB_OPTIONS                         -- User-defined elaboration options, added to elab/elab_debug aliases.\"\n  echo\n  echo \"USER_DEFINED_VHDL_COMPILE_OPTIONS                 -- User-defined vhdl compile options, added to com/dev_com aliases.\"\n  echo\n  echo \"USER_DEFINED_VERILOG_COMPILE_OPTIONS              -- User-defined verilog compile options, added to com/dev_com aliases.\"\n}\nfile_copy\nh\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/altchip_id/altchip_id.v",
    "content": "// (C) 2001-2018 Intel Corporation. All rights reserved.\n// Your use of Intel Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files from any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Intel Program License Subscription \n// Agreement, Intel FPGA IP License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Intel and sold by \n// Intel or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n////////////////////////////////////////////////////////////////////\n//\n//   ALTCHIP_ID\n//\n//  Copyright (C) 1991-2013 Altera Corporation\n//  Your use of Altera Corporation's design tools, logic functions \n//  and other software and tools, and its AMPP partner logic \n//  functions, and any output files from any of the foregoing \n//  (including device programming or simulation files), and any \n//  associated documentation or information are expressly subject \n//  to the terms and conditions of the Altera Program License \n//  Subscription Agreement, Altera MegaCore Function License \n//  Agreement, or other applicable license agreement, including, \n//  without limitation, that your use is for the sole purpose of \n//  programming logic devices manufactured by Altera and sold by \n//  Altera or its authorized distributors.  Please refer to the \n//  applicable agreement for further details.\n//\n////////////////////////////////////////////////////////////////////\n\n// synthesis VERILOG_INPUT_VERSION VERILOG_2001\n\nmodule  altchip_id\n\t( \n\tclkin,\n\tchip_id,\n\tdata_valid,\n\treset);\n\t\n\tinput\tclkin;\n\toutput\t[63:0]\tchip_id;\n\toutput\tdata_valid;\n\tinput\treset;\n\t\n\tparameter\tDEVICE_FAMILY = \"Stratix V\";\t\n\tparameter\tID_VALUE = 64'hffffffffffffffff;\n\tparameter\tID_VALUE_STR = \"ffffffffffffffff\";\n\t\n\t// clock cycle for shiftnld\n\tlocalparam\tLOAD_WIDTH\t= 'h01;\t\n\tlocalparam\tDATA_WIDTH\t= 'h60;\t// gray of binary 0100 0000, for 64 clock cycles\n\t\n\twire  \tclkin_wire;\n\twire\tcurrent_state_wire;\n\twire\tregout_wire;\n\twire\t[6:0]   wire_gen_cntr_q;\n\twire\t[63:0]\twire_shift_reg_q;\n\twire \treset_wire;\n\treg\t\tcurrent_state_reg;\n\treg\t\tdata_valid_reg;\n\treg\t\tend_op_reg;\n\treg\t\tend_stage_pos_reg;\n\treg\t\t[63:0]\toutput_reg;\n\treg\t\tbusy_reg;\n\t\n\tinitial begin\n\t\tcurrent_state_reg = 1'b0;\n\t\tdata_valid_reg = 1'b0;\n\t\tend_op_reg = 1'b0;\n\t\tend_stage_pos_reg = 1'b0;\n\t\toutput_reg = 64'h0000000000000000;\n\t\tbusy_reg = 1'b0;\n\tend\n\t\n\t// clkin and reset input\n\tassign clkin_wire = clkin;\n\tassign reset_wire = reset; \n\t\n\t// busy_reg to indicate read id operation is in progress\n\talways @ (posedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) busy_reg <= 1'b0;\n\t\telse if (data_valid_reg) busy_reg <= 1'b0;\n\t\telse busy_reg <= 1'b1;\n\t\t\n\t// general counter to count the number of clock cycles in each stage\n\ta_graycounter #(\n\t\t.width (7),\n\t\t.lpm_type (\"a_graycounter\"),\n\t\t.pvalue (0)\n\t) gen_cntr ( \n\t\t.aclr(reset_wire),\n\t\t.clk_en(busy_reg),\n\t\t.clock(~ clkin_wire),\n\t\t.q(wire_gen_cntr_q),\n\t\t.qbin(),\n\t\t.sclr(end_stage_pos_reg | end_op_reg),\n\t\t.cnt_en(1'b1),\n\t\t.updown(1'b1)\n\t);\n\t\n\t// state machine to control the shiftnld of chipidblock\n\t// state 0 - loading the unique chip id from fuse to shift register, 1 clock cycle\n\t// state 1 - shifting shift register to read out the value of unique chip id, 64 clock cycles\n\talways @ (posedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1)  current_state_reg <= 1'b0;\n\t\telse if (busy_reg == 1'b0) current_state_reg <= 1'b0;\n\t\telse if (data_valid_reg == 1'b1) current_state_reg <= 1'b0;\n\t\telse if (end_stage_pos_reg == 1'b1) current_state_reg <= (~ current_state_wire);\n\t\telse current_state_reg <= current_state_reg;\n\tassign current_state_wire = current_state_reg;\n\t\n\t// end stage signal\n\talways @ (posedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) end_stage_pos_reg <= 1'b0;\n\t\telse if (data_valid_reg == 1'b1) end_stage_pos_reg <= 1'b0;\n\t\telse end_stage_pos_reg <= (((~ current_state_wire) & (wire_gen_cntr_q == LOAD_WIDTH)) | \n\t\t\t\t\t\t\t\t\t\t(current_state_wire & (wire_gen_cntr_q == DATA_WIDTH)));\n\t\n\talways @ (negedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) end_op_reg <= 1'b0;\n\t\telse end_op_reg <= (current_state_wire & end_stage_pos_reg);\n\t\t\n\t// -------------------------------------------------------------------\n\t// Instantiate wysiwyg for chipidblock according to device family\n\t// -------------------------------------------------------------------\t\n\tgenerate\n\t\tif (DEVICE_FAMILY == \"MAX 10\") begin\t\t//MAX 10 FPGA\n\t\t\tfiftyfivenm_chipidblock #(\n\t\t\t\t.id_value(ID_VALUE_STR)\n\t\t\t) chipidblock_dut ( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\n\t\telse if (DEVICE_FAMILY == \"Stratix V\") begin\t\t//Stratix V\n\t\t\tstratixv_chipidblock #(\n\t\t\t\t.ID_VALUE(ID_VALUE)\n\t\t\t) chipidblock_dut ( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\n\t\telse if (DEVICE_FAMILY == \"Arria V GZ\") begin\t\t//Arria V GZ\n\t\t\tarriavgz_chipidblock #(\n\t\t\t\t.ID_VALUE(ID_VALUE)\n\t\t\t) chipidblock_dut ( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\t\t\n\t\telse if (DEVICE_FAMILY == \"Arria V\") begin\t\t//Arria V\n\t\t\tarriav_chipidblock #(\n\t\t\t\t.ID_VALUE(ID_VALUE)\n\t\t\t) chipidblock_dut ( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\n\t\telse begin\t\t\t\t\t\t//Cyclone V\n\t\t\tcyclonev_chipidblock #(\n\t\t\t\t.ID_VALUE(ID_VALUE)\n\t\t\t) chipidblock_dut ( \n\t\t\t\t.clk(clkin_wire),\n\t\t\t\t.regout(regout_wire),\n\t\t\t\t.shiftnld(current_state_wire));\n\t\t\tend\n\tendgenerate\n\t\n\t// -------------------------------------------------------------------\n\t// Output signals\n\t// -------------------------------------------------------------------\n\t// data_valid output - operation is completed\n\talways @ (posedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) data_valid_reg <= 1'b0;\n\t\telse if (end_op_reg == 1'b1) data_valid_reg <= 1'b1;\n\t\telse data_valid_reg <= data_valid_reg;\n\tassign data_valid = data_valid_reg;\n\t\n\t// shift register to convert serial output to parallel\n\tlpm_shiftreg #(\n\t\t.lpm_direction (\"RIGHT\"),\n\t\t.lpm_type (\"LPM_SHIFTREG\"),\n\t\t.lpm_width (64)\n\t) shift_reg ( \n\t\t.aclr (reset_wire),\n\t\t.clock (clkin_wire),\n\t\t.shiftin (regout_wire),\n\t\t.q (wire_shift_reg_q),\n\t\t.enable(((~ end_op_reg) & (~ data_valid_reg)) | (~ busy_reg)),\n\t\t.aset (1'b0),\n\t\t.data (64'b0),\n\t\t.load (1'b0),\n\t\t.sclr (~ busy_reg),\n\t\t.shiftout (),\n\t\t.sset (1'b0)\n\t);\n\t\n\talways @ (negedge clkin_wire or posedge reset_wire)\n\t\tif (reset_wire == 1'b1) output_reg <= 64'h0000000000000000;\n\t\telse if (data_valid_reg == 1'b0) begin\n\t\t\tif  (end_stage_pos_reg == 1'b1)   output_reg <= {wire_shift_reg_q[63:0]};\n\t\t\telse output_reg <= output_reg;\n\t\tend\n\t\telse output_reg <= output_reg;\n\t\n\t//output\n\tassign chip_id = output_reg;\n\t\t\nendmodule //altchip_id"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/cadence/cds.lib",
    "content": "\nDEFINE std              $CDS_ROOT/tools/inca/files/STD/           \nDEFINE synopsys         $CDS_ROOT/tools/inca/files/SYNOPSYS/      \nDEFINE ieee             $CDS_ROOT/tools/inca/files/IEEE/          \nDEFINE ambit            $CDS_ROOT/tools/inca/files/AMBIT/         \nDEFINE vital_memory     $CDS_ROOT/tools/inca/files/VITAL_MEMORY/  \nDEFINE ncutils          $CDS_ROOT/tools/inca/files/NCUTILS/       \nDEFINE ncinternal       $CDS_ROOT/tools/inca/files/NCINTERNAL/    \nDEFINE ncmodels         $CDS_ROOT/tools/inca/files/NCMODELS/      \nDEFINE cds_assertions   $CDS_ROOT/tools/inca/files/CDS_ASSERTIONS/\nDEFINE work             ./libraries/work/                         \nDEFINE uniqueid2        ./libraries/uniqueid2/                    \nDEFINE altera_ver       ./libraries/altera_ver/                   \nDEFINE lpm_ver          ./libraries/lpm_ver/                      \nDEFINE sgate_ver        ./libraries/sgate_ver/                    \nDEFINE altera_mf_ver    ./libraries/altera_mf_ver/                \nDEFINE altera_lnsim_ver ./libraries/altera_lnsim_ver/             \nDEFINE fiftyfivenm_ver  ./libraries/fiftyfivenm_ver/              \n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/cadence/cds_libs/uniqueid2.cds.lib",
    "content": "\nDEFINE std              $CDS_ROOT/tools/inca/files/STD/           \nDEFINE synopsys         $CDS_ROOT/tools/inca/files/SYNOPSYS/      \nDEFINE ieee             $CDS_ROOT/tools/inca/files/IEEE/          \nDEFINE ambit            $CDS_ROOT/tools/inca/files/AMBIT/         \nDEFINE vital_memory     $CDS_ROOT/tools/inca/files/VITAL_MEMORY/  \nDEFINE ncutils          $CDS_ROOT/tools/inca/files/NCUTILS/       \nDEFINE ncinternal       $CDS_ROOT/tools/inca/files/NCINTERNAL/    \nDEFINE ncmodels         $CDS_ROOT/tools/inca/files/NCMODELS/      \nDEFINE cds_assertions   $CDS_ROOT/tools/inca/files/CDS_ASSERTIONS/\nDEFINE work             ./../libraries/work/                      \nDEFINE altera_ver       ./../libraries/altera_ver/                \nDEFINE lpm_ver          ./../libraries/lpm_ver/                   \nDEFINE sgate_ver        ./../libraries/sgate_ver/                 \nDEFINE altera_mf_ver    ./../libraries/altera_mf_ver/             \nDEFINE altera_lnsim_ver ./../libraries/altera_lnsim_ver/          \nDEFINE fiftyfivenm_ver  ./../libraries/fiftyfivenm_ver/           \nDEFINE uniqueid2        ./../libraries/uniqueid2/                 \n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/cadence/hdl.var",
    "content": "\nDEFINE WORK work\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/cadence/ncsim_setup.sh",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 18.0 614 win32 2021.05.28.12:59:19\n\n# ----------------------------------------\n# ncsim - auto-generated simulation script\n\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     uniqueid2\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level shell script that compiles Altera simulation libraries\n# and the Quartus-generated IP in your project, along with your design and\n# testbench files, copy the text from the TOP-LEVEL TEMPLATE section below\n# into a new file, e.g. named \"ncsim.sh\", and modify text as directed.\n# \n# You can also modify the simulation flow to suit your needs. Set the\n# following variables to 1 to disable their corresponding processes:\n# - SKIP_FILE_COPY: skip copying ROM/RAM initialization files\n# - SKIP_DEV_COM: skip compiling the Quartus EDA simulation library\n# - SKIP_COM: skip compiling Quartus-generated IP simulation files\n# - SKIP_ELAB and SKIP_SIM: skip elaboration and simulation\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator. In this case, you must also copy the generated files\n# # \"cds.lib\" and \"hdl.var\" - plus the directory \"cds_libs\" if generated - \n# # into the location from which you launch the simulator, or incorporate\n# # into any existing library setup.\n# #\n# # Run Quartus-generated IP simulation script once to compile Quartus EDA\n# # simulation libraries and Quartus-generated IP simulation files, and copy\n# # any ROM/RAM initialization files to the simulation directory.\n# # - If necessary, specify any compilation options:\n# #   USER_DEFINED_COMPILE_OPTIONS\n# #   USER_DEFINED_VHDL_COMPILE_OPTIONS applied to vhdl compiler\n# #   USER_DEFINED_VERILOG_COMPILE_OPTIONS applied to verilog compiler\n# #\n# source <script generation output directory>/cadence/ncsim_setup.sh \\\n# SKIP_ELAB=1 \\\n# SKIP_SIM=1 \\\n# USER_DEFINED_COMPILE_OPTIONS=<compilation options for your design> \\\n# USER_DEFINED_VHDL_COMPILE_OPTIONS=<VHDL compilation options for your design> \\\n# USER_DEFINED_VERILOG_COMPILE_OPTIONS=<Verilog compilation options for your design> \\\n# QSYS_SIMDIR=<script generation output directory>\n# #\n# # Compile all design files and testbench files, including the top level.\n# # (These are all the files required for simulation other than the files\n# # compiled by the IP script)\n# #\n# ncvlog <compilation options> <design and testbench files>\n# #\n# # TOP_LEVEL_NAME is used in this script to set the top-level simulation or\n# # testbench module/entity name.\n# #\n# # Run the IP script again to elaborate and simulate the top level:\n# # - Specify TOP_LEVEL_NAME and USER_DEFINED_ELAB_OPTIONS.\n# # - Override the default USER_DEFINED_SIM_OPTIONS. For example, to run\n# #   until $finish(), set to an empty string: USER_DEFINED_SIM_OPTIONS=\"\".\n# #\n# source <script generation output directory>/cadence/ncsim_setup.sh \\\n# SKIP_FILE_COPY=1 \\\n# SKIP_DEV_COM=1 \\\n# SKIP_COM=1 \\\n# TOP_LEVEL_NAME=<simulation top> \\\n# USER_DEFINED_ELAB_OPTIONS=<elaboration options for your design> \\\n# USER_DEFINED_SIM_OPTIONS=<simulation options for your design>\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If uniqueid2 is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n# ACDS 18.0 614 win32 2021.05.28.12:59:19\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"uniqueid2\"\nQSYS_SIMDIR=\"./../\"\nQUARTUS_INSTALL_DIR=\"C:/intelfpga_lite/18.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_DEV_COM=0\nSKIP_COM=0\nSKIP_ELAB=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"-input \\\"@run 100; exit\\\"\"\n\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `ncsim -version` != *\"ncsim(64)\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# create compilation libraries\nmkdir -p ./libraries/work/\nmkdir -p ./libraries/uniqueid2/\nmkdir -p ./libraries/altera_ver/\nmkdir -p ./libraries/lpm_ver/\nmkdir -p ./libraries/sgate_ver/\nmkdir -p ./libraries/altera_mf_ver/\nmkdir -p ./libraries/altera_lnsim_ver/\nmkdir -p ./libraries/fiftyfivenm_ver/\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\n# ----------------------------------------\n# compile device library files\nif [ $SKIP_DEV_COM -eq 0 ]; then\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"                -work altera_ver      \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                         -work lpm_ver         \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                            -work sgate_ver       \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                        -work altera_mf_ver   \n  ncvlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                    -work altera_lnsim_ver\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"                -work fiftyfivenm_ver \n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \nfi\n\n# ----------------------------------------\n# compile design files in correct order\nif [ $SKIP_COM -eq 0 ]; then\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/altchip_id/altchip_id.v\" -work uniqueid2 -cdslib ./cds_libs/uniqueid2.cds.lib\n  ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/uniqueid2.v\"                                                                 \nfi\n\n# ----------------------------------------\n# elaborate top level design\nif [ $SKIP_ELAB -eq 0 ]; then\n  export GENERIC_PARAM_COMPAT_CHECK=1\n  ncelab -access +w+r+c -namemap_mixgen $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME\nfi\n\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  eval ncsim -licqueue $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS $TOP_LEVEL_NAME\nfi\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/mentor/msim_setup.tcl",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ----------------------------------------\n# Auto-generated simulation script msim_setup.tcl\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     uniqueid2\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level script that compiles Altera simulation libraries and\n# the Quartus-generated IP in your project, along with your design and\n# testbench files, copy the text from the TOP-LEVEL TEMPLATE section below\n# into a new file, e.g. named \"mentor.do\", and modify the text as directed.\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator.\n# #\n# set QSYS_SIMDIR <script generation output directory>\n# #\n# # Source the generated IP simulation script.\n# source $QSYS_SIMDIR/mentor/msim_setup.tcl\n# #\n# # Set any compilation options you require (this is unusual).\n# set USER_DEFINED_COMPILE_OPTIONS <compilation options>\n# set USER_DEFINED_VHDL_COMPILE_OPTIONS <compilation options for VHDL>\n# set USER_DEFINED_VERILOG_COMPILE_OPTIONS <compilation options for Verilog>\n# #\n# # Call command to compile the Quartus EDA simulation library.\n# dev_com\n# #\n# # Call command to compile the Quartus-generated IP simulation files.\n# com\n# #\n# # Add commands to compile all design files and testbench files, including\n# # the top level. (These are all the files required for simulation other\n# # than the files compiled by the Quartus-generated IP simulation script)\n# #\n# vlog <compilation options> <design and testbench files>\n# #\n# # Set the top-level simulation or testbench module/entity name, which is\n# # used by the elab command to elaborate the top level.\n# #\n# set TOP_LEVEL_NAME <simulation top>\n# #\n# # Set any elaboration options you require.\n# set USER_DEFINED_ELAB_OPTIONS <elaboration options>\n# #\n# # Call command to elaborate your design and testbench.\n# elab\n# #\n# # Run the simulation.\n# run -a\n# #\n# # Report success to the shell.\n# exit -code 0\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If uniqueid2 is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n# ACDS 18.0 614 win32 2021.05.28.12:59:19\n\n# ----------------------------------------\n# Initialize variables\nif ![info exists SYSTEM_INSTANCE_NAME] { \n  set SYSTEM_INSTANCE_NAME \"\"\n} elseif { ![ string match \"\" $SYSTEM_INSTANCE_NAME ] } { \n  set SYSTEM_INSTANCE_NAME \"/$SYSTEM_INSTANCE_NAME\"\n}\n\nif ![info exists TOP_LEVEL_NAME] { \n  set TOP_LEVEL_NAME \"uniqueid2\"\n}\n\nif ![info exists QSYS_SIMDIR] { \n  set QSYS_SIMDIR \"./../\"\n}\n\nif ![info exists QUARTUS_INSTALL_DIR] { \n  set QUARTUS_INSTALL_DIR \"C:/intelfpga_lite/18.0/quartus/\"\n}\n\nif ![info exists USER_DEFINED_COMPILE_OPTIONS] { \n  set USER_DEFINED_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_VHDL_COMPILE_OPTIONS] { \n  set USER_DEFINED_VHDL_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_VERILOG_COMPILE_OPTIONS] { \n  set USER_DEFINED_VERILOG_COMPILE_OPTIONS \"\"\n}\nif ![info exists USER_DEFINED_ELAB_OPTIONS] { \n  set USER_DEFINED_ELAB_OPTIONS \"\"\n}\n\n# ----------------------------------------\n# Initialize simulation properties - DO NOT MODIFY!\nset ELAB_OPTIONS \"\"\nset SIM_OPTIONS \"\"\nif ![ string match \"*-64 vsim*\" [ vsim -version ] ] {\n} else {\n}\n\n# ----------------------------------------\n# Copy ROM/RAM files to simulation directory\nalias file_copy {\n  echo \"\\[exec\\] file_copy\"\n}\n\n# ----------------------------------------\n# Create compilation libraries\nproc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }\nensure_lib          ./libraries/     \nensure_lib          ./libraries/work/\nvmap       work     ./libraries/work/\nvmap       work_lib ./libraries/work/\nif ![ string match \"*ModelSim ALTERA*\" [ vsim -version ] ] {\n  ensure_lib                  ./libraries/altera_ver/      \n  vmap       altera_ver       ./libraries/altera_ver/      \n  ensure_lib                  ./libraries/lpm_ver/         \n  vmap       lpm_ver          ./libraries/lpm_ver/         \n  ensure_lib                  ./libraries/sgate_ver/       \n  vmap       sgate_ver        ./libraries/sgate_ver/       \n  ensure_lib                  ./libraries/altera_mf_ver/   \n  vmap       altera_mf_ver    ./libraries/altera_mf_ver/   \n  ensure_lib                  ./libraries/altera_lnsim_ver/\n  vmap       altera_lnsim_ver ./libraries/altera_lnsim_ver/\n  ensure_lib                  ./libraries/fiftyfivenm_ver/ \n  vmap       fiftyfivenm_ver  ./libraries/fiftyfivenm_ver/ \n}\nensure_lib           ./libraries/uniqueid2/\nvmap       uniqueid2 ./libraries/uniqueid2/\n\n# ----------------------------------------\n# Compile device library files\nalias dev_com {\n  echo \"\\[exec\\] dev_com\"\n  if ![ string match \"*ModelSim ALTERA*\" [ vsim -version ] ] {\n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"               -work altera_ver      \n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                        -work lpm_ver         \n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                           -work sgate_ver       \n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                       -work altera_mf_ver   \n    eval  vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                   -work altera_lnsim_ver\n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"               -work fiftyfivenm_ver \n    eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/mentor/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \n  }\n}\n\n# ----------------------------------------\n# Compile the design files in correct order\nalias com {\n  echo \"\\[exec\\] com\"\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/altchip_id/altchip_id.v\" -work uniqueid2\n  eval  vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/uniqueid2.v\"                            \n}\n\n# ----------------------------------------\n# Elaborate top level design\nalias elab {\n  echo \"\\[exec\\] elab\"\n  eval vsim -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS -L work -L work_lib -L uniqueid2 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Elaborate the top level design with novopt option\nalias elab_debug {\n  echo \"\\[exec\\] elab_debug\"\n  eval vsim -novopt -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS -L work -L work_lib -L uniqueid2 -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design\nalias ld \"\n  dev_com\n  com\n  elab\n\"\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design with -novopt\nalias ld_debug \"\n  dev_com\n  com\n  elab_debug\n\"\n\n# ----------------------------------------\n# Print out user commmand line aliases\nalias h {\n  echo \"List Of Command Line Aliases\"\n  echo\n  echo \"file_copy                                         -- Copy ROM/RAM files to simulation directory\"\n  echo\n  echo \"dev_com                                           -- Compile device library files\"\n  echo\n  echo \"com                                               -- Compile the design files in correct order\"\n  echo\n  echo \"elab                                              -- Elaborate top level design\"\n  echo\n  echo \"elab_debug                                        -- Elaborate the top level design with novopt option\"\n  echo\n  echo \"ld                                                -- Compile all the design files and elaborate the top level design\"\n  echo\n  echo \"ld_debug                                          -- Compile all the design files and elaborate the top level design with -novopt\"\n  echo\n  echo \n  echo\n  echo \"List Of Variables\"\n  echo\n  echo \"TOP_LEVEL_NAME                                    -- Top level module name.\"\n  echo \"                                                     For most designs, this should be overridden\"\n  echo \"                                                     to enable the elab/elab_debug aliases.\"\n  echo\n  echo \"SYSTEM_INSTANCE_NAME                              -- Instantiated system module name inside top level module.\"\n  echo\n  echo \"QSYS_SIMDIR                                       -- Platform Designer base simulation directory.\"\n  echo\n  echo \"QUARTUS_INSTALL_DIR                               -- Quartus installation directory.\"\n  echo\n  echo \"USER_DEFINED_COMPILE_OPTIONS                      -- User-defined compile options, added to com/dev_com aliases.\"\n  echo\n  echo \"USER_DEFINED_ELAB_OPTIONS                         -- User-defined elaboration options, added to elab/elab_debug aliases.\"\n  echo\n  echo \"USER_DEFINED_VHDL_COMPILE_OPTIONS                 -- User-defined vhdl compile options, added to com/dev_com aliases.\"\n  echo\n  echo \"USER_DEFINED_VERILOG_COMPILE_OPTIONS              -- User-defined verilog compile options, added to com/dev_com aliases.\"\n}\nfile_copy\nh\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/synopsys/vcs/vcs_setup.sh",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 18.0 614 win32 2021.05.28.12:59:19\n\n# ----------------------------------------\n# vcs - auto-generated simulation script\n\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     uniqueid2\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level shell script that compiles Altera simulation libraries\n# and the Quartus-generated IP in your project, along with your design and\n# testbench files, follow the guidelines below.\n# \n# 1) Copy the shell script text from the TOP-LEVEL TEMPLATE section\n# below into a new file, e.g. named \"vcs_sim.sh\".\n# \n# 2) Copy the text from the DESIGN FILE LIST & OPTIONS TEMPLATE section into\n# a separate file, e.g. named \"filelist.f\".\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # TOP_LEVEL_NAME is used in the Quartus-generated IP simulation script to\n# # set the top-level simulation or testbench module/entity name.\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator.\n# #\n# # Source the Quartus-generated IP simulation script and do the following:\n# # - Compile the Quartus EDA simulation library and IP simulation files.\n# # - Specify TOP_LEVEL_NAME and QSYS_SIMDIR.\n# # - Compile the design and top-level simulation module/entity using\n# #   information specified in \"filelist.f\".\n# # - Override the default USER_DEFINED_SIM_OPTIONS. For example, to run\n# #   until $finish(), set to an empty string: USER_DEFINED_SIM_OPTIONS=\"\".\n# # - Run the simulation.\n# #\n# source <script generation output directory>/synopsys/vcs/vcs_setup.sh \\\n# TOP_LEVEL_NAME=<simulation top> \\\n# QSYS_SIMDIR=<script generation output directory> \\\n# USER_DEFINED_ELAB_OPTIONS=\"\\\"-f filelist.f\\\"\" \\\n# USER_DEFINED_SIM_OPTIONS=<simulation options for your design>\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# ----------------------------------------\n# # DESIGN FILE LIST & OPTIONS TEMPLATE - BEGIN\n# #\n# # Compile all design files and testbench files, including the top level.\n# # (These are all the files required for simulation other than the files\n# # compiled by the Quartus-generated IP simulation script)\n# #\n# +systemverilogext+.sv\n# <design and testbench files, compile-time options, elaboration options>\n# #\n# # DESIGN FILE LIST & OPTIONS TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If uniqueid2 is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n# ACDS 18.0 614 win32 2021.05.28.12:59:19\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"uniqueid2\"\nQSYS_SIMDIR=\"./../../\"\nQUARTUS_INSTALL_DIR=\"C:/intelfpga_lite/18.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"+vcs+finish+100\"\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `vcs -platform` != *\"amd64\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\nvcs -lca -timescale=1ps/1ps -sverilog +verilog2001ext+.v -ntb_opts dtm $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v \\\n  $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/fiftyfivenm_atoms_ncrypt.v \\\n  $QSYS_SIMDIR/altchip_id/altchip_id.v \\\n  $QSYS_SIMDIR/uniqueid2.v \\\n  -top $TOP_LEVEL_NAME\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  ./simv $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS\nfi\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/synopsys/vcsmx/synopsys_sim.setup",
    "content": "\nWORK > DEFAULT\nDEFAULT:          ./libraries/work/            \nwork:             ./libraries/work/            \nuniqueid2:        ./libraries/uniqueid2/       \naltera_ver:       ./libraries/altera_ver/      \nlpm_ver:          ./libraries/lpm_ver/         \nsgate_ver:        ./libraries/sgate_ver/       \naltera_mf_ver:    ./libraries/altera_mf_ver/   \naltera_lnsim_ver: ./libraries/altera_lnsim_ver/\nfiftyfivenm_ver:  ./libraries/fiftyfivenm_ver/ \n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/synopsys/vcsmx/vcsmx_setup.sh",
    "content": "\n# (C) 2001-2021 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 18.0 614 win32 2021.05.28.12:59:19\n\n# ----------------------------------------\n# vcsmx - auto-generated simulation script\n\n# ----------------------------------------\n# This script provides commands to simulate the following IP detected in\n# your Quartus project:\n#     uniqueid2\n# \n# Altera recommends that you source this Quartus-generated IP simulation\n# script from your own customized top-level script, and avoid editing this\n# generated script.\n# \n# To write a top-level shell script that compiles Altera simulation libraries \n# and the Quartus-generated IP in your project, along with your design and\n# testbench files, copy the text from the TOP-LEVEL TEMPLATE section below\n# into a new file, e.g. named \"vcsmx_sim.sh\", and modify text as directed.\n# \n# You can also modify the simulation flow to suit your needs. Set the\n# following variables to 1 to disable their corresponding processes:\n# - SKIP_FILE_COPY: skip copying ROM/RAM initialization files\n# - SKIP_DEV_COM: skip compiling the Quartus EDA simulation library\n# - SKIP_COM: skip compiling Quartus-generated IP simulation files\n# - SKIP_ELAB and SKIP_SIM: skip elaboration and simulation\n# \n# ----------------------------------------\n# # TOP-LEVEL TEMPLATE - BEGIN\n# #\n# # QSYS_SIMDIR is used in the Quartus-generated IP simulation script to\n# # construct paths to the files required to simulate the IP in your Quartus\n# # project. By default, the IP script assumes that you are launching the\n# # simulator from the IP script location. If launching from another\n# # location, set QSYS_SIMDIR to the output directory you specified when you\n# # generated the IP script, relative to the directory from which you launch\n# # the simulator. In this case, you must also copy the generated library\n# # setup \"synopsys_sim.setup\" into the location from which you launch the\n# # simulator, or incorporate into any existing library setup.\n# #\n# # Run Quartus-generated IP simulation script once to compile Quartus EDA\n# # simulation libraries and Quartus-generated IP simulation files, and copy\n# # any ROM/RAM initialization files to the simulation directory.\n# #\n# # - If necessary, specify any compilation options:\n# #   USER_DEFINED_COMPILE_OPTIONS\n# #   USER_DEFINED_VHDL_COMPILE_OPTIONS applied to vhdl compiler\n# #   USER_DEFINED_VERILOG_COMPILE_OPTIONS applied to verilog compiler\n# #\n# source <script generation output directory>/synopsys/vcsmx/vcsmx_setup.sh \\\n# SKIP_ELAB=1 \\\n# SKIP_SIM=1 \\\n# USER_DEFINED_COMPILE_OPTIONS=<compilation options for your design> \\\n# USER_DEFINED_VHDL_COMPILE_OPTIONS=<VHDL compilation options for your design> \\\n# USER_DEFINED_VERILOG_COMPILE_OPTIONS=<Verilog compilation options for your design> \\\n# QSYS_SIMDIR=<script generation output directory>\n# #\n# # Compile all design files and testbench files, including the top level.\n# # (These are all the files required for simulation other than the files\n# # compiled by the IP script)\n# #\n# vlogan <compilation options> <design and testbench files>\n# #\n# # TOP_LEVEL_NAME is used in this script to set the top-level simulation or\n# # testbench module/entity name.\n# #\n# # Run the IP script again to elaborate and simulate the top level:\n# # - Specify TOP_LEVEL_NAME and USER_DEFINED_ELAB_OPTIONS.\n# # - Override the default USER_DEFINED_SIM_OPTIONS. For example, to run\n# #   until $finish(), set to an empty string: USER_DEFINED_SIM_OPTIONS=\"\".\n# #\n# source <script generation output directory>/synopsys/vcsmx/vcsmx_setup.sh \\\n# SKIP_FILE_COPY=1 \\\n# SKIP_DEV_COM=1 \\\n# SKIP_COM=1 \\\n# TOP_LEVEL_NAME=\"'-top <simulation top>'\" \\\n# QSYS_SIMDIR=<script generation output directory> \\\n# USER_DEFINED_ELAB_OPTIONS=<elaboration options for your design> \\\n# USER_DEFINED_SIM_OPTIONS=<simulation options for your design>\n# #\n# # TOP-LEVEL TEMPLATE - END\n# ----------------------------------------\n# \n# IP SIMULATION SCRIPT\n# ----------------------------------------\n# If uniqueid2 is one of several IP cores in your\n# Quartus project, you can generate a simulation script\n# suitable for inclusion in your top-level simulation\n# script by running the following command line:\n# \n# ip-setup-simulation --quartus-project=<quartus project>\n# \n# ip-setup-simulation will discover the Altera IP\n# within the Quartus project, and generate a unified\n# script which supports all the Altera IP within the design.\n# ----------------------------------------\n# ACDS 18.0 614 win32 2021.05.28.12:59:19\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"uniqueid2\"\nQSYS_SIMDIR=\"./../../\"\nQUARTUS_INSTALL_DIR=\"C:/intelfpga_lite/18.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_DEV_COM=0\nSKIP_COM=0\nSKIP_ELAB=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"+vcs+finish+100\"\n\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `vcs -platform` != *\"amd64\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# create compilation libraries\nmkdir -p ./libraries/work/\nmkdir -p ./libraries/uniqueid2/\nmkdir -p ./libraries/altera_ver/\nmkdir -p ./libraries/lpm_ver/\nmkdir -p ./libraries/sgate_ver/\nmkdir -p ./libraries/altera_mf_ver/\nmkdir -p ./libraries/altera_lnsim_ver/\nmkdir -p ./libraries/fiftyfivenm_ver/\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\n# ----------------------------------------\n# compile device library files\nif [ $SKIP_DEV_COM -eq 0 ]; then\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"                 -work altera_ver      \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                          -work lpm_ver         \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                             -work sgate_ver       \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                         -work altera_mf_ver   \n  vlogan +v2k -sverilog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                     -work altera_lnsim_ver\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"                 -work fiftyfivenm_ver \n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \nfi\n\n# ----------------------------------------\n# compile design files in correct order\nif [ $SKIP_COM -eq 0 ]; then\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/altchip_id/altchip_id.v\" -work uniqueid2\n  vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/uniqueid2.v\"                            \nfi\n\n# ----------------------------------------\n# elaborate top level design\nif [ $SKIP_ELAB -eq 0 ]; then\n  vcs -lca -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME\nfi\n\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  ./simv $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS\nfi\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim/uniqueid2.v",
    "content": "// uniqueid2.v\n\n// Generated using ACDS version 18.0 614\n\n`timescale 1 ps / 1 ps\nmodule uniqueid2 (\n\t\tinput  wire        clkin,      //  clkin.clk\n\t\tinput  wire        reset,      //  reset.reset\n\t\toutput wire        data_valid, // output.valid\n\t\toutput wire [63:0] chip_id     //       .data\n\t);\n\n\taltchip_id #(\n\t\t.DEVICE_FAMILY (\"MAX 10\"),\n\t\t.ID_VALUE      (64'b1111111111111111111111111111111111111111111111111111111111111111),\n\t\t.ID_VALUE_STR  (\"00000000ffffffff\")\n\t) uniqueid2_inst (\n\t\t.clkin      (clkin),      //  clkin.clk\n\t\t.reset      (reset),      //  reset.reset\n\t\t.data_valid (data_valid), // output.valid\n\t\t.chip_id    (chip_id)     //       .data\n\t);\n\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware/uniqueid2_sim.f",
    "content": "uniqueid2_sim/uniqueid2.v\nuniqueid2_sim/altchip_id/altchip_id.v\n"
  },
  {
    "path": "max10_adc_firmware/upload_latest_flash.sh",
    "content": "~/intelFPGA/18.0/qprogrammer/bin/quartus_pgm -bgp -m jtag -o \"p;output_files/serial1.pof\"\n\n"
  },
  {
    "path": "max10_adc_firmware/upload_latest_temp.sh",
    "content": "~/intelFPGA/18.0/qprogrammer/bin/quartus_pgm -m jtag -o \"p;output_files/serial1.sof\"\n\n"
  },
  {
    "path": "max10_adc_firmware_v8/ASSERTION_ERROR.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 64 64)\r\n\t(text \"ASSERTION_ERROR\" (rect 5 0 107 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 32 20 44)(font \"Arial\" ))\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 32 32)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/BaudTickGen.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 152 96)\r\n\t(text \"BaudTickGen\" (rect 5 0 58 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 64 20 76)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"enable\" (rect 0 0 24 12)(font \"Arial\" ))\r\n\t\t(text \"enable\" (rect 21 43 45 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 136 32)\r\n\t\t(output)\r\n\t\t(text \"tick\" (rect 0 0 12 12)(font \"Arial\" ))\r\n\t\t(text \"tick\" (rect 103 27 115 39)(font \"Arial\" ))\r\n\t\t(line (pt 136 32)(pt 120 32)(line_width 1))\r\n\t)\r\n\t(parameter\r\n\t\t\"ClkFrequency\"\r\n\t\t\"25000000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Baud\"\r\n\t\t\"115200\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Oversampling\"\r\n\t\t\"1\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 120 64)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 152 -64 252 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/Chain1.cdf",
    "content": "/* Quartus II 64-Bit Version 15.0.0 Build 145 04/22/2015 SJ Web Edition */\r\nJedecChain;\r\n\tFileRevision(JESD32A);\r\n\tDefaultMfr(6E);\r\n\r\n\tP ActionCode(Cfg)\r\n\t\tDevice PartName(10M08SAE144ES) Path(\"C:/Users/ahaas/Dropbox/cygwin/home/cygwinhome/Haasoscope/max10_adc_firmware/output_files/\") File(\"serial1.sof\") MfrSpec(OpMask(1));\r\n\r\nChainEnd;\r\n\r\nAlteraBegin;\r\n\tChainType(JTAG);\r\nAlteraEnd;\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/Chain2.cdf",
    "content": "/* Quartus II 64-Bit Version 15.0.0 Build 145 04/22/2015 SJ Web Edition */\r\nJedecChain;\r\n\tFileRevision(JESD32A);\r\n\tDefaultMfr(6E);\r\n\r\n\tP ActionCode(Cfg)\r\n\t\tDevice PartName(10M08SAE144ES) Path(\"C:/Users/ahaas/Dropbox/cygwin/home/cygwinhome/Haasoscope/max10_adc_firmware/output_files/\") File(\"serial1.pof\") MfrSpec(OpMask(1) Child_OpMask(2 1 1));\r\n\r\nChainEnd;\r\n\r\nAlteraBegin;\r\n\tChainType(JTAG);\r\nAlteraEnd;\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/DelayLine.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 272 128)\r\n\t(text \"DelayLine\" (rect 5 0 45 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"a[data_width-1..0]\" (rect 0 0 67 12)(font \"Arial\" ))\r\n\t\t(text \"a[data_width-1..0]\" (rect 21 27 88 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"b[data_width-1..0]\" (rect 0 0 67 12)(font \"Arial\" ))\r\n\t\t(text \"b[data_width-1..0]\" (rect 21 43 88 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"START\" (rect 0 0 34 12)(font \"Arial\" ))\r\n\t\t(text \"START\" (rect 21 59 55 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"STOP\" (rect 0 0 24 12)(font \"Arial\" ))\r\n\t\t(text \"STOP\" (rect 21 75 45 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 32)\r\n\t\t(output)\r\n\t\t(text \"output[data_width-1..0]\" (rect 0 0 86 12)(font \"Arial\" ))\r\n\t\t(text \"output[data_width-1..0]\" (rect 149 27 235 39)(font \"Arial\" ))\r\n\t\t(line (pt 256 32)(pt 240 32)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"DATA_WIDTH\"\r\n\t\t\"20\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 240 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 272 -64 372 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/SPI.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 248 160)\r\n\t(text \"SPI\" (rect 5 0 19 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"ClkI\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"ClkI\" (rect 21 27 36 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"DI\" (rect 0 0 9 12)(font \"Arial\" ))\r\n\t\t(text \"DI\" (rect 21 43 30 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"Rst\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"Rst\" (rect 21 59 36 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"Trig\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"Trig\" (rect 21 75 36 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"PDI[bitwidth-1..0]\" (rect 0 0 63 12)(font \"Arial\" ))\r\n\t\t(text \"PDI[bitwidth-1..0]\" (rect 21 91 84 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 32)\r\n\t\t(output)\r\n\t\t(text \"ClkO\" (rect 0 0 20 12)(font \"Arial\" ))\r\n\t\t(text \"ClkO\" (rect 191 27 211 39)(font \"Arial\" ))\r\n\t\t(line (pt 232 32)(pt 216 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 48)\r\n\t\t(output)\r\n\t\t(text \"DO\" (rect 0 0 14 12)(font \"Arial\" ))\r\n\t\t(text \"DO\" (rect 197 43 211 55)(font \"Arial\" ))\r\n\t\t(line (pt 232 48)(pt 216 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 64)\r\n\t\t(output)\r\n\t\t(text \"CS\" (rect 0 0 12 12)(font \"Arial\" ))\r\n\t\t(text \"CS\" (rect 199 59 211 71)(font \"Arial\" ))\r\n\t\t(line (pt 232 64)(pt 216 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 80)\r\n\t\t(output)\r\n\t\t(text \"Bsy\" (rect 0 0 16 12)(font \"Arial\" ))\r\n\t\t(text \"Bsy\" (rect 195 75 211 87)(font \"Arial\" ))\r\n\t\t(line (pt 232 80)(pt 216 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 96)\r\n\t\t(output)\r\n\t\t(text \"PDO[bitwidth-1..0]\" (rect 0 0 68 12)(font \"Arial\" ))\r\n\t\t(text \"PDO[bitwidth-1..0]\" (rect 143 91 211 103)(font \"Arial\" ))\r\n\t\t(line (pt 232 96)(pt 216 96)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"BitWidth\"\r\n\t\t\"8\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Prescaler\"\r\n\t\t\"0\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Master\"\r\n\t\t\"'1'\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_ENUM\")\t)\r\n\t(parameter\r\n\t\t\"CPHA\"\r\n\t\t\"'1'\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_ENUM\")\t)\r\n\t(parameter\r\n\t\t\"CPOL\"\r\n\t\t\"'0'\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_ENUM\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 216 128)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 248 -64 348 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/SPI.vhd",
    "content": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity SPI is\n\tgeneric(\n\t\tBitWidth: natural := 8;\n\t\tPrescaler: natural := 0;\n\t\tMaster: std_logic := '1';\n\t\tCPHA: std_logic := '1'; --Rising edge = 1, Falling edge = 0\n\t\tCPOL: std_logic := '0' --Idle high = 1, Idle low = 0\n\t);\n\tport(\n\t\tClkO, DO, CS, Bsy: out std_logic;\n\t\tClkI, DI, Rst, Trig: in std_logic;\n\t\tPDI: in std_logic_vector(BitWidth-1 downto 0); --Parallel data in\n\t\tPDO: out std_logic_vector(BitWidth-1 downto 0) --Parallel data out\n\t);\nend SPI;\n\narchitecture A of SPI is\n\tconstant CSTog: std_logic := '1';\n\ttype States is (CSLow, CSHigh, DShift);\n\tsignal State: States := CSHigh;\n\tsignal DataI, DataO: std_logic_vector(BitWidth-1 downto 0);\n\tsignal Presc: unsigned(7 downto 0);\n\tsignal ClkOv: std_logic;\n\tsignal DCnt: unsigned(4 downto 0) := to_unsigned(BitWidth, 5);\n\tsignal TA, TAA: std_logic := '0';\n\t\n\tbegin\t\n\tprocess(ClkI, DI, Rst, ClkOv)\n\tbegin\n\t\tif(Rst = '0') then\n\t\t\tState <= CSHigh;\n\t\t\tCS <= '1';\n\t\t\tDO <= '0';\n\t\t\tClkO <= '0';\n\t\t\tTA <= '0';\n\t\t\tTAA <= '0';\n\t\telsif(rising_edge(ClkI)) then\n\t\t\tTAA <= TA;\n\t\t\tTA <= Trig;\n\t\t\t\n\t\t\t--Rising edge\n\t\t\tif(TAA = '0' and TA = '1') then\n\t\t\t\tDataO <= PDI;\n\t\t\t\tState <= CSLow;\n\t\t\tend if;\n\t\t\n\t\t\tif(Presc(Prescaler) = '1') then\n\t\t\tPresc <= (others => '0');\n\t\t\t\tif(Master = '1') then\t\t\t\t\t\n\t\t\t\t\tcase State is\n\t\t\t\t\t\twhen CSHigh => \n\t\t\t\t\t\t\tBsy <= '0';\n\t\t\t\t\t\t\t\r\n\t\t\t\t\t\t\t--if(CSTog = '1') then CS <= '1'; end if; -- ACH\r\n\t\t\t\t\t\t\tCS <= '1';\n\t\t\t\t\t\t\t\r\n\t\t\t\t\t\t\tDCnt <= to_unsigned(BitWidth, 5);\n\t\t\t\t\t\t\tDO <= '0';\n\t\t\t\t\t\t\tClkOv <= '0';\n\t\t\t\t\t\twhen CSLow =>\n\t\t\t\t\t\t\tBsy <= '1';\n\t\t\t\t\t\t\tState <= DShift;\n\t\t\t\t\t\t\tCS <= '0';\n\t\t\t\t\t\t\tDO <= DataO(7);\n\t\t\t\t\t\twhen DShift =>\n\t\t\t\t\t\t\tif(DCnt = \"000\") then\n\t\t\t\t\t\t\t\tState <= CSHigh;\n\t\t\t\t\t\t\t\tPDO <= DataI;\n\t\t\t\t\t\t\tend if;\n\t\t\t\t\t\t\t\n\t\t\t\t\t\t\tif(ClkOv = CPHA) then\n\t\t\t\t\t\t\t\tDO <= DataO(to_integer(DCnt-1));\n\t\t\t\t\t\t\telse\n\t\t\t\t\t\t\t\tDataI(7 downto 0) <= DataI(6 downto 0) & DI;\n\t\t\t\t\t\t\t\tDCnt <= DCnt - 1;\n\t\t\t\t\t\t\tend if;\n\t\t\t\t\t\t\tClkOv <= not ClkOv;\n\t\t\t\t\tend case;\n\t\t\t\telse --Slave not yet implemented!\n\t\t\t\tend if;\n\t\t\telse\n\t\t\t\tPresc <= Presc + 1;\n\t\t\tend if;\n\t\tend if;\n\t\tClkO <= ClkOv xor CPOL;\n\tend process;\nend A;"
  },
  {
    "path": "max10_adc_firmware_v8/SSD1306.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 224 160)\r\n\t(text \"SSD1306\" (rect 5 0 41 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"Clk\" (rect 0 0 12 12)(font \"Arial\" ))\r\n\t\t(text \"Clk\" (rect 21 27 33 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"Rst\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"Rst\" (rect 21 43 36 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"Bsy\" (rect 0 0 16 12)(font \"Arial\" ))\r\n\t\t(text \"Bsy\" (rect 21 59 37 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"Source\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"Source\" (rect 21 75 49 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"MemDI[7..0]\" (rect 0 0 50 12)(font \"Arial\" ))\r\n\t\t(text \"MemDI[7..0]\" (rect 21 91 71 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 32)\r\n\t\t(output)\r\n\t\t(text \"PDO[7..0]\" (rect 0 0 40 12)(font \"Arial\" ))\r\n\t\t(text \"PDO[7..0]\" (rect 147 27 187 39)(font \"Arial\" ))\r\n\t\t(line (pt 208 32)(pt 192 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 48)\r\n\t\t(output)\r\n\t\t(text \"Trig\" (rect 0 0 15 12)(font \"Arial\" ))\r\n\t\t(text \"Trig\" (rect 172 43 187 55)(font \"Arial\" ))\r\n\t\t(line (pt 208 48)(pt 192 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 64)\r\n\t\t(output)\r\n\t\t(text \"CD\" (rect 0 0 14 12)(font \"Arial\" ))\r\n\t\t(text \"CD\" (rect 173 59 187 71)(font \"Arial\" ))\r\n\t\t(line (pt 208 64)(pt 192 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 80)\r\n\t\t(output)\r\n\t\t(text \"MADDR[9..0]\" (rect 0 0 59 12)(font \"Arial\" ))\r\n\t\t(text \"MADDR[9..0]\" (rect 128 75 187 87)(font \"Arial\" ))\r\n\t\t(line (pt 208 80)(pt 192 80)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 192 128)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/SSD1306.vhd",
    "content": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity SSD1306 is\n\tport(\n\t\tPDO: out std_logic_vector(7 downto 0);\t\t\n\t\tClk, Rst, Bsy, Source: in std_logic;\n\t\tTrig, CD: out std_logic;\t\t\n\t\tMADDR: out std_logic_vector(9 downto 0);\n\t\tMemDI: in std_logic_vector(7 downto 0)\n\t);\nend SSD1306;\n\narchitecture Ar of SSD1306 is\nconstant AMNT_INSTRS: natural := 27;\nconstant CONTRAST: std_logic_vector(7 downto 0) := x\"0F\";\ntype IAR is array (0 to AMNT_INSTRS-1) of std_logic_vector(7 downto 0);\nsignal Instrs: IAR := (x\"A8\", x\"3F\", x\"D3\", x\"00\", x\"40\", x\"A0\", x\"DA\", x\"12\", x\"81\", CONTRAST, x\"20\", x\"00\", x\"21\", x\"00\", x\"7F\", x\"22\", x\"00\", x\"07\", \nx\"A6\", --A6 for no invert --A7 for invert\nx\"DB\", x\"40\", x\"A4\", x\"D5\", x\"80\", x\"8D\", x\"14\", x\"AF\");\n\nconstant AMNT_DATA: natural := 1024;\ntype IDATA is array (0 to AMNT_DATA-1) of std_logic_vector(7 downto 0);\nsignal Datas: IDATA := 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PStates is (Init, Draw);\ntype SStates is (BusyWaitA, BusyWaitB, Writing, Done);\n\nsignal SPISt: SStates := Done;\nsignal PSt: PStates := Init;\nsignal PInstr: unsigned(7 downto 0);\nsignal MemAddr: unsigned(9 downto 0);\n\nbegin\n\tprocess(Clk, Rst, Bsy, Source,MemAddr) -- ACH added MemAddr\n\tbegin\n\t\tMADDR <= std_logic_vector(MemAddr);\n\t\t\n\t\tif(Rst = '0') then\n\t\t\tPSt <= Init;\n\t\t\tSPISt <= Done;\n\t\t\tPInstr <= (others => '0');\n\t\telsif(rising_edge(Clk)) then\n\t\t\tif(PSt = Init) then\n\t\t\t\tCD <= '0';\n\t\t\t\tif(SPISt = Done) then\n\t\t\t\t\tPDO <= (Instrs(to_integer(PInstr)));\n\t\t\t\t\tTrig <= '1';\n\t\t\t\t\tSPISt <= BusyWaitA;\n\t\t\t\telsif(SPISt = BusyWaitA) then\n\t\t\t\t\tif(Bsy = '1') then\n\t\t\t\t\t\tPInstr <= PInstr + 1;\n\t\t\t\t\t\tSPISt <= Writing;\n\t\t\t\t\t\tTrig <= '0';\n\t\t\t\t\tend if;\n\t\t\t\telse\n\t\t\t\t\tif(Bsy = '0') then\n\t\t\t\t\t\tSPISt <= Done;\n\t\t\t\t\t\tif(PInstr = AMNT_INSTRS) then\n\t\t\t\t\t\t\tPSt <= Draw;\n\t\t\t\t\t\t\tPInstr <= (others => '0');\n\t\t\t\t\t\t\tMemAddr <= b\"1111111111\";\n\t\t\t\t\t\tend if;\n\t\t\t\t\tend if;\n\t\t\t\tend if;\n\t\t\telse --Draw\n\t\t\t\tCD <= '1';\n\t\t\t\t\n\t\t\t\tif(SPISt = Done) then\n\t\t\t\t\t\n\t\t\t\t\t--if (MemAddr>150) then PDO <= x\"f0\";\n\t\t\t\t\t--else PDO <= x\"55\";\n\t\t\t\t\t--end if;\n\t\t\t\t\t\n\t\t\t\t\tif (Source = '0') then PDO <= Datas(to_integer(MemAddr));\t\t\t\t\t\n\t\t\t\t\telse PDO <= MemDI;\n\t\t\t\t\tend if;\n\t\t\t\t\t\n\t\t\t\t\tTrig <= '1';\n\t\t\t\t\tSPISt <= BusyWaitA;\n\t\t\t\telsif(SPISt = BusyWaitA) then\n\t\t\t\t\tif(Bsy = '1') then\n\t\t\t\t\t\tMemAddr <= MemAddr - 1;\n\t\t\t\t\t\tPInstr <= PInstr + 1;\n\t\t\t\t\t\tSPISt <= Writing;\n\t\t\t\t\t\tTrig <= '0';\n\t\t\t\t\tend if;\n\t\t\t\telse\n\t\t\t\t\tif(Bsy = '0') then SPISt <= Done; end if;\n\t\t\t\tend if;\n\t\t\tend if;\n\t\tend if;\n\tend process;\nend Ar;\n"
  },
  {
    "path": "max10_adc_firmware_v8/SSD1306.vhd.bak",
    "content": "library ieee;\nuse ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\nentity SSD1306 is\n\tport(\n\t\tPDO: out std_logic_vector(7 downto 0);\n\t\t-- MADDR: out std_logic_vector(9 downto 0);\n\t\t-- MemDI: in std_logic_vector(7 downto 0);\n\t\tClk, Rst, Bsy: in std_logic;\n\t\tTrig, CD: out std_logic\n\t);\nend SSD1306;\n\narchitecture Ar of SSD1306 is\nconstant AMNT_INSTRS: natural := 27;\nconstant CONTRAST: std_logic_vector(7 downto 0) := x\"0F\";\ntype IAR is array (0 to AMNT_INSTRS-1) of std_logic_vector(7 downto 0);\nsignal Instrs: IAR := (x\"A8\", x\"3F\", x\"D3\", x\"00\", x\"40\", x\"A0\", x\"DA\", x\"12\", x\"81\", CONTRAST, x\"20\", x\"00\", x\"21\", x\"00\", x\"7F\", x\"22\", x\"00\", x\"07\", \nx\"A7\", --A6 for no invert\nx\"DB\", x\"40\", x\"A4\", x\"D5\", x\"80\", x\"8D\", x\"14\", x\"AF\");\n\nconstant AMNT_DATA: natural := 1024;\ntype IDATA is array (0 to AMNT_DATA-1) of std_logic_vector(7 downto 0);\nsignal Datas: IDATA := ( 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PStates is (Init, Draw);\ntype SStates is (BusyWaitA, BusyWaitB, Writing, Done);\n\nsignal SPISt: SStates := Done;\nsignal PSt: PStates := Init;\nsignal PInstr: unsigned(7 downto 0);\nsignal MemAddr: unsigned(9 downto 0);\n\nbegin\n\tprocess(Clk, Rst, Bsy)\n\tbegin\n\t\t -- MADDR <= std_logic_vector(MemAddr);\n\t\t\n\t\tif(Rst = '0') then\n\t\t\tPSt <= Init;\n\t\t\tSPISt <= Done;\n\t\t\tPInstr <= (others => '0');\n\t\telsif(rising_edge(Clk)) then\n\t\t\tif(PSt = Init) then\n\t\t\t\tCD <= '0';\n\t\t\t\tif(SPISt = Done) then\n\t\t\t\t\tPDO <= (Instrs(to_integer(PInstr)));\n\t\t\t\t\tTrig <= '1';\n\t\t\t\t\tSPISt <= BusyWaitA;\n\t\t\t\telsif(SPISt = BusyWaitA) then\n\t\t\t\t\tif(Bsy = '1') then\n\t\t\t\t\t\tPInstr <= PInstr + 1;\n\t\t\t\t\t\tSPISt <= Writing;\n\t\t\t\t\t\tTrig <= '0';\n\t\t\t\t\tend if;\n\t\t\t\telse\n\t\t\t\t\tif(Bsy = '0') then\n\t\t\t\t\t\tSPISt <= Done;\n\t\t\t\t\t\tif(PInstr = AMNT_INSTRS) then\n\t\t\t\t\t\t\tPSt <= Draw;\n\t\t\t\t\t\t\tPInstr <= (others => '0');\n\t\t\t\t\t\t\tMemAddr <= b\"1111111111\";\n\t\t\t\t\t\tend if;\n\t\t\t\t\tend if;\n\t\t\t\tend if;\n\t\t\telse --Draw\n\t\t\t\tCD <= '1';\n\t\t\t\t\n\t\t\t\tif(SPISt = Done) then\n\t\t\t\t\t\n\t\t\t\t\t--if (MemAddr>150) then PDO <= x\"f0\"; -- was MemDI\n\t\t\t\t\t--else PDO <= x\"55\";\n\t\t\t\t\t--end if;\n\t\t\t\t\t\n\t\t\t\t\tPDO <= Datas(to_integer(MemAddr));\n\t\t\t\t\t\n\t\t\t\t\tTrig <= '1';\n\t\t\t\t\tSPISt <= BusyWaitA;\n\t\t\t\telsif(SPISt = BusyWaitA) then\n\t\t\t\t\tif(Bsy = '1') then\n\t\t\t\t\t\tMemAddr <= MemAddr - 1;\n\t\t\t\t\t\tPInstr <= PInstr + 1;\n\t\t\t\t\t\tSPISt <= Writing;\n\t\t\t\t\t\tTrig <= '0';\n\t\t\t\t\tend if;\n\t\t\t\telse\n\t\t\t\t\tif(Bsy = '0') then SPISt <= Done; end if;\n\t\t\t\tend if;\n\t\t\tend if;\n\t\tend if;\n\tend process;\nend Ar;\n"
  },
  {
    "path": "max10_adc_firmware_v8/async.v",
    "content": "////////////////////////////////////////////////////////\r\n// RS-232 RX and TX module\r\n// (c) fpga4fun.com & KNJN LLC - 2003 to 2016\r\n\r\n// The RS-232 settings are fixed\r\n// TX: 8-bit data, 2 stop, no-parity\r\n// RX: 8-bit data, 1 stop, no-parity (the receiver can accept more stop bits of course)\r\n\r\n//`define SIMULATION   // in this mode, TX outputs one bit per clock cycle\r\n                       // and RX receives one bit per clock cycle (for fast simulations)\r\n\r\n////////////////////////////////////////////////////////\r\nmodule async_transmitter(\r\n\tinput clk,\r\n\tinput TxD_start,\r\n\tinput [7:0] TxD_data,\r\n\toutput TxD,\r\n\toutput TxD_busy\r\n);\r\n\r\n// Assert TxD_start for (at least) one clock cycle to start transmission of TxD_data\r\n// TxD_data is latched so that it doesn't have to stay valid while it is being sent\r\n\r\nparameter ClkFrequency = 50000000;\t// 50MHz\r\nparameter Baud = 115200;\r\n\r\ngenerate\r\n\tif(ClkFrequency<Baud*8 && (ClkFrequency % Baud!=0)) ASSERTION_ERROR PARAMETER_OUT_OF_RANGE(\"Frequency incompatible with requested Baud rate\");\r\nendgenerate\r\n\r\n////////////////////////////////\r\n`ifdef SIMULATION\r\nwire BitTick = 1'b1;  // output one bit per clock cycle\r\n`else\r\nwire BitTick;\r\nBaudTickGen #(ClkFrequency, Baud) tickgen(.clk(clk), .enable(TxD_busy), .tick(BitTick));\r\n`endif\r\n\r\nreg [3:0] TxD_state = 0;\r\nwire TxD_ready = (TxD_state==0);\r\nassign TxD_busy = ~TxD_ready;\r\n\r\nreg [7:0] TxD_shift = 0;\r\nalways @(posedge clk)\r\nbegin\r\n\tif(TxD_ready & TxD_start)\r\n\t\tTxD_shift <= TxD_data;\r\n\telse\r\n\tif(TxD_state[3] & BitTick)\r\n\t\tTxD_shift <= (TxD_shift >> 1);\r\n\r\n\tcase(TxD_state)\r\n\t\t4'b0000: if(TxD_start) TxD_state <= 4'b0100;\r\n\t\t4'b0100: if(BitTick) TxD_state <= 4'b1000;  // start bit\r\n\t\t4'b1000: if(BitTick) TxD_state <= 4'b1001;  // bit 0\r\n\t\t4'b1001: if(BitTick) TxD_state <= 4'b1010;  // bit 1\r\n\t\t4'b1010: if(BitTick) TxD_state <= 4'b1011;  // bit 2\r\n\t\t4'b1011: if(BitTick) TxD_state <= 4'b1100;  // bit 3\r\n\t\t4'b1100: if(BitTick) TxD_state <= 4'b1101;  // bit 4\r\n\t\t4'b1101: if(BitTick) TxD_state <= 4'b1110;  // bit 5\r\n\t\t4'b1110: if(BitTick) TxD_state <= 4'b1111;  // bit 6\r\n\t\t4'b1111: if(BitTick) TxD_state <= 4'b0010;  // bit 7\r\n\t\t4'b0010: if(BitTick) TxD_state <= 4'b0011;  // stop1\r\n\t\t4'b0011: if(BitTick) TxD_state <= 4'b0000;  // stop2\r\n\t\tdefault: if(BitTick) TxD_state <= 4'b0000;\r\n\tendcase\r\nend\r\n\r\nassign TxD = (TxD_state<4) | (TxD_state[3] & TxD_shift[0]);  // put together the start, data and stop bits\r\nendmodule\r\n\r\n\r\n////////////////////////////////////////////////////////\r\nmodule async_receiver(\r\n\tinput clk,\r\n\tinput RxD,\r\n\toutput reg RxD_data_ready = 0,\r\n\toutput reg [7:0] RxD_data = 0,  // data received, valid only (for one clock cycle) when RxD_data_ready is asserted\r\n\r\n\t// We also detect if a gap occurs in the received stream of characters\r\n\t// That can be useful if multiple characters are sent in burst\r\n\t//  so that multiple characters can be treated as a \"packet\"\r\n\toutput RxD_idle,  // asserted when no data has been received for a while\r\n\toutput reg RxD_endofpacket = 0  // asserted for one clock cycle when a packet has been detected (i.e. RxD_idle is going high)\r\n);\r\n\r\nparameter ClkFrequency = 50000000; // 25MHz\r\nparameter Baud = 115200;\r\n\r\nparameter Oversampling = 8;  // needs to be a power of 2\r\n// we oversample the RxD line at a fixed rate to capture each RxD data bit at the \"right\" time\r\n// 8 times oversampling by default, use 16 for higher quality reception\r\n\r\ngenerate\r\n\tif(ClkFrequency<Baud*Oversampling) ASSERTION_ERROR PARAMETER_OUT_OF_RANGE(\"Frequency too low for current Baud rate and oversampling\");\r\n\tif(Oversampling<8 || ((Oversampling & (Oversampling-1))!=0)) ASSERTION_ERROR PARAMETER_OUT_OF_RANGE(\"Invalid oversampling value\");\r\nendgenerate\r\n\r\n////////////////////////////////\r\nreg [3:0] RxD_state = 0;\r\n\r\n`ifdef SIMULATION\r\nwire RxD_bit = RxD;\r\nwire sampleNow = 1'b1;  // receive one bit per clock cycle\r\n\r\n`else\r\nwire OversamplingTick;\r\nBaudTickGen #(ClkFrequency, Baud, Oversampling) tickgen(.clk(clk), .enable(1'b1), .tick(OversamplingTick));\r\n\r\n// synchronize RxD to our clk domain\r\nreg [1:0] RxD_sync = 2'b11;\r\nalways @(posedge clk) if(OversamplingTick) RxD_sync <= {RxD_sync[0], RxD};\r\n\r\n// and filter it\r\nreg [1:0] Filter_cnt = 2'b11;\r\nreg RxD_bit = 1'b1;\r\n\r\nalways @(posedge clk)\r\nif(OversamplingTick)\r\nbegin\r\n\tif(RxD_sync[1]==1'b1 && Filter_cnt!=2'b11) Filter_cnt <= Filter_cnt + 1'd1;\r\n\telse \r\n\tif(RxD_sync[1]==1'b0 && Filter_cnt!=2'b00) Filter_cnt <= Filter_cnt - 1'd1;\r\n\r\n\tif(Filter_cnt==2'b11) RxD_bit <= 1'b1;\r\n\telse\r\n\tif(Filter_cnt==2'b00) RxD_bit <= 1'b0;\r\nend\r\n\r\n// and decide when is the good time to sample the RxD line\r\nfunction integer log2(input integer v); begin log2=0; while(v>>log2) log2=log2+1; end endfunction\r\nlocalparam l2o = log2(Oversampling);\r\nreg [l2o-2:0] OversamplingCnt = 0;\r\nalways @(posedge clk) if(OversamplingTick) OversamplingCnt <= (RxD_state==0) ? 1'd0 : OversamplingCnt + 1'd1;\r\nwire sampleNow = OversamplingTick && (OversamplingCnt==Oversampling/2-1);\r\n`endif\r\n\r\n// now we can accumulate the RxD bits in a shift-register\r\nalways @(posedge clk)\r\ncase(RxD_state)\r\n\t4'b0000: if(~RxD_bit) RxD_state <= `ifdef SIMULATION 4'b1000 `else 4'b0001 `endif;  // start bit found?\r\n\t4'b0001: if(sampleNow) RxD_state <= 4'b1000;  // sync start bit to sampleNow\r\n\t4'b1000: if(sampleNow) RxD_state <= 4'b1001;  // bit 0\r\n\t4'b1001: if(sampleNow) RxD_state <= 4'b1010;  // bit 1\r\n\t4'b1010: if(sampleNow) RxD_state <= 4'b1011;  // bit 2\r\n\t4'b1011: if(sampleNow) RxD_state <= 4'b1100;  // bit 3\r\n\t4'b1100: if(sampleNow) RxD_state <= 4'b1101;  // bit 4\r\n\t4'b1101: if(sampleNow) RxD_state <= 4'b1110;  // bit 5\r\n\t4'b1110: if(sampleNow) RxD_state <= 4'b1111;  // bit 6\r\n\t4'b1111: if(sampleNow) RxD_state <= 4'b0010;  // bit 7\r\n\t4'b0010: if(sampleNow) RxD_state <= 4'b0000;  // stop bit\r\n\tdefault: RxD_state <= 4'b0000;\r\nendcase\r\n\r\nalways @(posedge clk)\r\nif(sampleNow && RxD_state[3]) RxD_data <= {RxD_bit, RxD_data[7:1]};\r\n\r\n//reg RxD_data_error = 0;\r\nalways @(posedge clk)\r\nbegin\r\n\tRxD_data_ready <= (sampleNow && RxD_state==4'b0010 && RxD_bit);  // make sure a stop bit is received\r\n\t//RxD_data_error <= (sampleNow && RxD_state==4'b0010 && ~RxD_bit);  // error if a stop bit is not received\r\nend\r\n\r\n`ifdef SIMULATION\r\nassign RxD_idle = 0;\r\n`else\r\nreg [l2o+1:0] GapCnt = 0;\r\nalways @(posedge clk) if (RxD_state!=0) GapCnt<=0; else if(OversamplingTick & ~GapCnt[log2(Oversampling)+1]) GapCnt <= GapCnt + 1'h1;\r\nassign RxD_idle = GapCnt[l2o+1];\r\nalways @(posedge clk) RxD_endofpacket <= OversamplingTick & ~GapCnt[l2o+1] & &GapCnt[l2o:0];\r\n`endif\r\n\r\nendmodule\r\n\r\n\r\n////////////////////////////////////////////////////////\r\n// dummy module used to be able to raise an assertion in Verilog\r\nmodule ASSERTION_ERROR();\r\nendmodule\r\n\r\n\r\n////////////////////////////////////////////////////////\r\nmodule BaudTickGen(\r\n\tinput clk, enable,\r\n\toutput tick  // generate a tick at the specified baud rate * oversampling\r\n);\r\nparameter ClkFrequency = 50000000;\r\nparameter Baud = 115200;\r\nparameter Oversampling = 1;\r\n\r\nfunction integer log2(input integer v); begin log2=0; while(v>>log2) log2=log2+1; end endfunction\r\nlocalparam AccWidth = log2(ClkFrequency/Baud)+8;  // +/- 2% max timing error over a byte\r\nreg [AccWidth:0] Acc = 0;\r\nlocalparam ShiftLimiter = log2(Baud*Oversampling >> (31-AccWidth));  // this makes sure Inc calculation doesn't overflow\r\nlocalparam Inc = ((Baud*Oversampling << (AccWidth-ShiftLimiter))+(ClkFrequency>>(ShiftLimiter+1)))/(ClkFrequency>>ShiftLimiter);\r\nalways @(posedge clk) if(enable) Acc <= Acc[AccWidth-1:0] + Inc[AccWidth:0]; else Acc <= Inc[AccWidth:0];\r\nassign tick = Acc[AccWidth];\r\nendmodule\r\n\r\n\r\n////////////////////////////////////////////////////////\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/async_receiver.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 216 128)\r\n\t(text \"async_receiver\" (rect 5 0 68 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"RxD\" (rect 0 0 20 12)(font \"Arial\" ))\r\n\t\t(text \"RxD\" (rect 21 43 41 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 32)\r\n\t\t(output)\r\n\t\t(text \"RxD_data_ready\" (rect 0 0 71 12)(font \"Arial\" ))\r\n\t\t(text \"RxD_data_ready\" (rect 108 27 179 39)(font \"Arial\" ))\r\n\t\t(line (pt 200 32)(pt 184 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 48)\r\n\t\t(output)\r\n\t\t(text \"RxD_data[7..0]\" (rect 0 0 62 12)(font \"Arial\" ))\r\n\t\t(text \"RxD_data[7..0]\" (rect 117 43 179 55)(font \"Arial\" ))\r\n\t\t(line (pt 200 48)(pt 184 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 64)\r\n\t\t(output)\r\n\t\t(text \"RxD_idle\" (rect 0 0 37 12)(font \"Arial\" ))\r\n\t\t(text \"RxD_idle\" (rect 142 59 179 71)(font \"Arial\" ))\r\n\t\t(line (pt 200 64)(pt 184 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 80)\r\n\t\t(output)\r\n\t\t(text \"RxD_endofpacket\" (rect 0 0 74 12)(font \"Arial\" ))\r\n\t\t(text \"RxD_endofpacket\" (rect 105 75 179 87)(font \"Arial\" ))\r\n\t\t(line (pt 200 80)(pt 184 80)(line_width 1))\r\n\t)\r\n\t(parameter\r\n\t\t\"ClkFrequency\"\r\n\t\t\"25000000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Baud\"\r\n\t\t\"115200\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Oversampling\"\r\n\t\t\"8\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 184 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 216 -64 316 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/async_transmitter.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 224 128)\r\n\t(text \"async_transmitter\" (rect 5 0 78 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"TxD_start\" (rect 0 0 41 12)(font \"Arial\" ))\r\n\t\t(text \"TxD_start\" (rect 21 43 62 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"TxD_data[7..0]\" (rect 0 0 60 12)(font \"Arial\" ))\r\n\t\t(text \"TxD_data[7..0]\" (rect 21 59 81 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 32)\r\n\t\t(output)\r\n\t\t(text \"TxD\" (rect 0 0 17 12)(font \"Arial\" ))\r\n\t\t(text \"TxD\" (rect 170 27 187 39)(font \"Arial\" ))\r\n\t\t(line (pt 208 32)(pt 192 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 48)\r\n\t\t(output)\r\n\t\t(text \"TxD_busy\" (rect 0 0 43 12)(font \"Arial\" ))\r\n\t\t(text \"TxD_busy\" (rect 144 43 187 55)(font \"Arial\" ))\r\n\t\t(line (pt 208 48)(pt 192 48)(line_width 1))\r\n\t)\r\n\t(parameter\r\n\t\t\"ClkFrequency\"\r\n\t\t\"25000000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"Baud\"\r\n\t\t\"115200\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 192 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 224 -64 324 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/chain_delay.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 232 128)\r\n\t(text \"chain_delay\" (rect 5 0 52 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"start\" (rect 0 0 17 12)(font \"Arial\" ))\r\n\t\t(text \"start\" (rect 21 43 38 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"stop\" (rect 0 0 16 12)(font \"Arial\" ))\r\n\t\t(text \"stop\" (rect 21 59 37 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 216 32)\r\n\t\t(output)\r\n\t\t(text \"result[CHAIN_LEN-1..0]\" (rect 0 0 100 12)(font \"Arial\" ))\r\n\t\t(text \"result[CHAIN_LEN-1..0]\" (rect 95 27 195 39)(font \"Arial\" ))\r\n\t\t(line (pt 216 32)(pt 200 32)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"CHAIN_LEN\"\r\n\t\t\"200\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 200 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 232 -64 332 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/chain_delay_race.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 232 128)\r\n\t(text \"chain_delay_race\" (rect 5 0 75 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"start\" (rect 0 0 17 12)(font \"Arial\" ))\r\n\t\t(text \"start\" (rect 21 43 38 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"stop\" (rect 0 0 16 12)(font \"Arial\" ))\r\n\t\t(text \"stop\" (rect 21 59 37 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 216 32)\r\n\t\t(output)\r\n\t\t(text \"result[CHAIN_LEN..0]\" (rect 0 0 94 12)(font \"Arial\" ))\r\n\t\t(text \"result[CHAIN_LEN..0]\" (rect 101 27 195 39)(font \"Arial\" ))\r\n\t\t(line (pt 216 32)(pt 200 32)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"CHAIN_LEN\"\r\n\t\t\"32\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 200 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 232 -64 332 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/demux1.v",
    "content": "//Verilog module for 1:2 DEMUX\r\nmodule demux1to2(     Data_in,     sel,    Data_out_0,    Data_out_1    );\r\n\r\n//list the inputs and their sizes\r\n    input Data_in;\r\n    input sel;\r\n//list the outputs and their sizes \r\n    output Data_out_0;\r\n    output Data_out_1;\r\n//Internal variables\r\n    reg Data_out_0;\r\n    reg Data_out_1;\r\n\r\n//always block with Data_in and sel in its sensitivity list\r\n    always @(Data_in or sel)\r\n    begin\r\n        case (sel)\r\n            1'b0 : begin\r\n                        Data_out_0 = Data_in;\r\n                        Data_out_1 = 0;\r\n                      end\r\n            1'b1 : begin\r\n                        Data_out_0 = 0;\r\n                        Data_out_1 = Data_in;\r\n                      end\r\n        endcase\r\n    end\r\n    \r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/demux1.v.bak",
    "content": "//Verilog module for 1:2 DEMUX\r\nmodule demux1to2(     Data_in,     sel,    Data_out_0,    Data_out_1    );\r\n\r\n//list the inputs and their sizes\r\n    input Data_in;\r\n    input sel;\r\n//list the outputs and their sizes \r\n    output Data_out_0;\r\n    output Data_out_1;\r\n//Internal variables\r\n    reg Data_out_0;\r\n    reg Data_out_1;\r\n\r\n//always block with Data_in and sel in its sensitivity list\r\n    always @(Data_in or sel)\r\n    begin\r\n        case (sel)\r\n            1'b0 : begin\r\n                        Data_out_0 = Data_in;\r\n                        Data_out_1 = 0;\r\n                        Data_out_2 = 0;\r\n                        Data_out_3 = 0;\r\n                      end\r\n            1'b1 : begin\r\n                        Data_out_0 = 0;\r\n                        Data_out_1 = Data_in;\r\n                        Data_out_2 = 0;\r\n                        Data_out_3 = 0;\r\n                      end\r\n        endcase\r\n    end\r\n    \r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/demux1to2.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 192 96)\r\n\t(text \"demux1to2\" (rect 5 0 47 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 64 20 76)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"Data_in\" (rect 0 0 30 12)(font \"Arial\" ))\r\n\t\t(text \"Data_in\" (rect 21 27 51 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"sel\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"sel\" (rect 21 43 31 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 32)\r\n\t\t(output)\r\n\t\t(text \"Data_out_0\" (rect 0 0 47 12)(font \"Arial\" ))\r\n\t\t(text \"Data_out_0\" (rect 108 27 155 39)(font \"Arial\" ))\r\n\t\t(line (pt 176 32)(pt 160 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 48)\r\n\t\t(output)\r\n\t\t(text \"Data_out_1\" (rect 0 0 46 12)(font \"Arial\" ))\r\n\t\t(text \"Data_out_1\" (rect 109 43 155 55)(font \"Arial\" ))\r\n\t\t(line (pt 176 48)(pt 160 48)(line_width 1))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 160 64)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/dpram2.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 0 0 256 136)\r\n\t(text \"dpram2\" (rect 107 0 157 16)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 120 25 132)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"data[7..0]\" (rect 0 0 53 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"data[7..0]\" (rect 4 18 47 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 32)(pt 112 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"wraddress[9..0]\" (rect 0 0 92 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wraddress[9..0]\" (rect 4 34 80 47)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 48)(pt 112 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wren\" (rect 4 50 28 63)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 112 64))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 88)\r\n\t\t(input)\r\n\t\t(text \"rdaddress[9..0]\" (rect 0 0 87 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"rdaddress[9..0]\" (rect 4 74 76 87)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 88)(pt 112 88)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"clock\" (rect 0 0 29 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clock\" (rect 4 98 27 111)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 112)(pt 176 112))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 88)\r\n\t\t(output)\r\n\t\t(text \"q[7..0]\" (rect 0 0 35 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"q[7..0]\" (rect 223 74 251 87)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 256 88)(pt 192 88)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(text \"1024 Word(s)\" (rect 137 -5 236 187)(font \"Arial\" )(vertical))\r\n\t\t(text \"RAM\" (rect 148 -16 229 151)(font \"Arial\" )(vertical))\r\n\t\t(text \"Block Type: AUTO\" (rect 40 125 156 261)(font \"Arial\" ))\r\n\t\t(line (pt 128 24)(pt 168 24))\r\n\t\t(line (pt 168 24)(pt 168 96))\r\n\t\t(line (pt 168 96)(pt 128 96))\r\n\t\t(line (pt 128 96)(pt 128 24))\r\n\t\t(line (pt 112 27)(pt 120 27))\r\n\t\t(line (pt 120 27)(pt 120 39))\r\n\t\t(line (pt 120 39)(pt 112 39))\r\n\t\t(line (pt 112 39)(pt 112 27))\r\n\t\t(line (pt 112 34)(pt 114 36))\r\n\t\t(line (pt 114 36)(pt 112 38))\r\n\t\t(line (pt 104 36)(pt 112 36))\r\n\t\t(line (pt 120 32)(pt 128 32)(line_width 3))\r\n\t\t(line (pt 112 43)(pt 120 43))\r\n\t\t(line (pt 120 43)(pt 120 55))\r\n\t\t(line (pt 120 55)(pt 112 55))\r\n\t\t(line (pt 112 55)(pt 112 43))\r\n\t\t(line (pt 112 50)(pt 114 52))\r\n\t\t(line (pt 114 52)(pt 112 54))\r\n\t\t(line (pt 104 52)(pt 112 52))\r\n\t\t(line (pt 120 48)(pt 128 48)(line_width 3))\r\n\t\t(line (pt 112 59)(pt 120 59))\r\n\t\t(line (pt 120 59)(pt 120 71))\r\n\t\t(line (pt 120 71)(pt 112 71))\r\n\t\t(line (pt 112 71)(pt 112 59))\r\n\t\t(line (pt 112 66)(pt 114 68))\r\n\t\t(line (pt 114 68)(pt 112 70))\r\n\t\t(line (pt 104 68)(pt 112 68))\r\n\t\t(line (pt 120 64)(pt 128 64))\r\n\t\t(line (pt 112 83)(pt 120 83))\r\n\t\t(line (pt 120 83)(pt 120 95))\r\n\t\t(line (pt 120 95)(pt 112 95))\r\n\t\t(line (pt 112 95)(pt 112 83))\r\n\t\t(line (pt 112 90)(pt 114 92))\r\n\t\t(line (pt 114 92)(pt 112 94))\r\n\t\t(line (pt 104 92)(pt 112 92))\r\n\t\t(line (pt 120 88)(pt 128 88)(line_width 3))\r\n\t\t(line (pt 104 36)(pt 104 113))\r\n\t\t(line (pt 176 92)(pt 176 113))\r\n\t\t(line (pt 184 83)(pt 192 83))\r\n\t\t(line (pt 192 83)(pt 192 95))\r\n\t\t(line (pt 192 95)(pt 184 95))\r\n\t\t(line (pt 184 95)(pt 184 83))\r\n\t\t(line (pt 184 90)(pt 186 92))\r\n\t\t(line (pt 186 92)(pt 184 94))\r\n\t\t(line (pt 176 92)(pt 184 92))\r\n\t\t(line (pt 168 88)(pt 184 88)(line_width 3))\r\n\t\t(line (pt 0 0)(pt 257 0))\r\n\t\t(line (pt 257 0)(pt 257 138))\r\n\t\t(line (pt 0 138)(pt 257 138))\r\n\t\t(line (pt 0 0)(pt 0 138))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/dpram2.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 2-PORT\"\r\nset_global_assignment -name IP_TOOL_VERSION \"15.0\"\r\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\r\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"dpram2.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"dpram2.bsf\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"dpram2_bb.v\"]\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/dpram2.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: dpram2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule dpram2 (\r\n\tclock,\r\n\tdata,\r\n\trdaddress,\r\n\twraddress,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t  clock;\r\n\tinput\t[7:0]  data;\r\n\tinput\t[9:0]  rdaddress;\r\n\tinput\t[9:0]  wraddress;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n\ttri0\t  wren;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [7:0] sub_wire0;\r\n\twire [7:0] q = sub_wire0[7:0];\r\n\r\n\taltsyncram\taltsyncram_component (\r\n\t\t\t\t.address_a (wraddress),\r\n\t\t\t\t.address_b (rdaddress),\r\n\t\t\t\t.clock0 (clock),\r\n\t\t\t\t.data_a (data),\r\n\t\t\t\t.wren_a (wren),\r\n\t\t\t\t.q_b (sub_wire0),\r\n\t\t\t\t.aclr0 (1'b0),\r\n\t\t\t\t.aclr1 (1'b0),\r\n\t\t\t\t.addressstall_a (1'b0),\r\n\t\t\t\t.addressstall_b (1'b0),\r\n\t\t\t\t.byteena_a (1'b1),\r\n\t\t\t\t.byteena_b (1'b1),\r\n\t\t\t\t.clock1 (1'b1),\r\n\t\t\t\t.clocken0 (1'b1),\r\n\t\t\t\t.clocken1 (1'b1),\r\n\t\t\t\t.clocken2 (1'b1),\r\n\t\t\t\t.clocken3 (1'b1),\r\n\t\t\t\t.data_b ({8{1'b1}}),\r\n\t\t\t\t.eccstatus (),\r\n\t\t\t\t.q_a (),\r\n\t\t\t\t.rden_a (1'b1),\r\n\t\t\t\t.rden_b (1'b1),\r\n\t\t\t\t.wren_b (1'b0));\r\n\tdefparam\r\n\t\taltsyncram_component.address_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.address_reg_b = \"CLOCK0\",\r\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_input_b = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_output_b = \"BYPASS\",\r\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\r\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\r\n\t\taltsyncram_component.numwords_a = 1024,\r\n\t\taltsyncram_component.numwords_b = 1024,\r\n\t\taltsyncram_component.operation_mode = \"DUAL_PORT\",\r\n\t\taltsyncram_component.outdata_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.outdata_reg_b = \"CLOCK0\",\r\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\r\n\t\taltsyncram_component.read_during_write_mode_mixed_ports = \"DONT_CARE\",\r\n\t\taltsyncram_component.widthad_a = 10,\r\n\t\taltsyncram_component.widthad_b = 10,\r\n\t\taltsyncram_component.width_a = 8,\r\n\t\taltsyncram_component.width_b = 8,\r\n\t\taltsyncram_component.width_byteena_a = 1;\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"8192\"\r\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGq NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_MIXED_PORTS STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: rdaddress 0 0 10 0 INPUT NODEFVAL \"rdaddress[9..0]\"\r\n// Retrieval info: USED_PORT: wraddress 0 0 10 0 INPUT NODEFVAL \"wraddress[9..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 10 0 wraddress 0 0 10 0\r\n// Retrieval info: CONNECT: @address_b 0 0 10 0 rdaddress 0 0 10 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/dpram2_bb.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%VBB%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: dpram2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\nmodule dpram2 (\r\n\tclock,\r\n\tdata,\r\n\trdaddress,\r\n\twraddress,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t  clock;\r\n\tinput\t[7:0]  data;\r\n\tinput\t[9:0]  rdaddress;\r\n\tinput\t[9:0]  wraddress;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n\ttri0\t  wren;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"8192\"\r\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGq NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_MIXED_PORTS STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: rdaddress 0 0 10 0 INPUT NODEFVAL \"rdaddress[9..0]\"\r\n// Retrieval info: USED_PORT: wraddress 0 0 10 0 INPUT NODEFVAL \"wraddress[9..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 10 0 wraddress 0 0 10 0\r\n// Retrieval info: CONNECT: @address_b 0 0 10 0 rdaddress 0 0 10 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL dpram2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/flash_pof.cdf",
    "content": "/* Quartus II 64-Bit Version 15.0.0 Build 145 04/22/2015 SJ Web Edition */\r\nJedecChain;\r\n\tFileRevision(JESD32A);\r\n\tDefaultMfr(6E);\r\n\r\n\tP ActionCode(Cfg)\r\n\t\tDevice PartName(10M08SAE144ES) Path(\"C:/haas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10/output_files/\") File(\"serial1.pof\") MfrSpec(OpMask(7) Child_OpMask(2 7 7));\r\n\r\nChainEnd;\r\n\r\nAlteraBegin;\r\n\tChainType(JTAG);\r\nAlteraEnd;\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/greybox_tmp/cbx_args.txt",
    "content": "ADDRESS_ACLR_B=NONE\r\nADDRESS_REG_B=CLOCK1\r\nCLOCK_ENABLE_INPUT_A=BYPASS\r\nCLOCK_ENABLE_INPUT_B=BYPASS\r\nCLOCK_ENABLE_OUTPUT_B=BYPASS\r\nINTENDED_DEVICE_FAMILY=\"MAX 10\"\r\nLPM_TYPE=altsyncram\r\nNUMWORDS_A=4096\r\nNUMWORDS_B=4096\r\nOPERATION_MODE=DUAL_PORT\r\nOUTDATA_ACLR_B=NONE\r\nOUTDATA_REG_B=CLOCK1\r\nPOWER_UP_UNINITIALIZED=FALSE\r\nRDCONTROL_REG_B=CLOCK1\r\nWIDTHAD_A=12\r\nWIDTHAD_B=12\r\nWIDTH_A=8\r\nWIDTH_B=8\r\nWIDTH_BYTEENA_A=1\r\nDEVICE_FAMILY=\"MAX 10\"\r\naddress_a\r\naddress_b\r\nclock0\r\nclock1\r\ndata_a\r\nrden_b\r\nwren_a\r\nq_b\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/hvsync_generator.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 184 160)\r\n\t(text \"hvsync_generator\" (rect 5 0 79 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 32)\r\n\t\t(output)\r\n\t\t(text \"vga_h_sync\" (rect 0 0 51 12)(font \"Arial\" ))\r\n\t\t(text \"vga_h_sync\" (rect 96 27 147 39)(font \"Arial\" ))\r\n\t\t(line (pt 168 32)(pt 152 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 48)\r\n\t\t(output)\r\n\t\t(text \"vga_v_sync\" (rect 0 0 53 12)(font \"Arial\" ))\r\n\t\t(text \"vga_v_sync\" (rect 94 43 147 55)(font \"Arial\" ))\r\n\t\t(line (pt 168 48)(pt 152 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 64)\r\n\t\t(output)\r\n\t\t(text \"inDisplayArea\" (rect 0 0 56 12)(font \"Arial\" ))\r\n\t\t(text \"inDisplayArea\" (rect 91 59 147 71)(font \"Arial\" ))\r\n\t\t(line (pt 168 64)(pt 152 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 80)\r\n\t\t(output)\r\n\t\t(text \"CounterX[9..0]\" (rect 0 0 57 12)(font \"Arial\" ))\r\n\t\t(text \"CounterX[9..0]\" (rect 90 75 147 87)(font \"Arial\" ))\r\n\t\t(line (pt 168 80)(pt 152 80)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 168 96)\r\n\t\t(output)\r\n\t\t(text \"CounterY[8..0]\" (rect 0 0 59 12)(font \"Arial\" ))\r\n\t\t(text \"CounterY[8..0]\" (rect 88 91 147 103)(font \"Arial\" ))\r\n\t\t(line (pt 168 96)(pt 152 96)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 152 128)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/hvsync_generator.v",
    "content": "module hvsync_generator(clk, vga_h_sync, vga_v_sync, inDisplayArea, CounterX, CounterY);\r\ninput clk;\r\noutput vga_h_sync, vga_v_sync;\r\noutput inDisplayArea;\r\noutput [9:0] CounterX;\r\noutput [8:0] CounterY;\r\n\r\n//////////////////////////////////////////////////\r\nreg [9:0] CounterX;\r\nreg CounterXflip;\r\nreg [8:0] CounterY;\r\nwire CounterXmaxed = (CounterX==767);\r\n\r\nalways @(posedge clk)\r\nif(CounterXmaxed)\r\n\tCounterX <= 0;\r\nelse begin\r\n\tif (CounterXflip) CounterX <= CounterX + 1;\r\n\tCounterXflip <= ~CounterXflip;//goes from 0 to 1, so we only increment half the times (for 50Mhz!)\r\n   end\r\n\t\r\nalways @(posedge clk)\r\nif(CounterXmaxed) CounterY <= CounterY + 1;\r\n\r\nreg vga_HS, vga_VS;\r\nalways @(posedge clk)\r\nbegin\r\n\tvga_HS <= (CounterX[9:4]==45); // change this value to move the display horizontally\r\n\tvga_VS <= (CounterY==498); // change this value to move the display vertically\r\nend\r\n\r\nreg inDisplayArea;\r\nalways @(posedge clk)\r\nif(inDisplayArea==0)\r\n\tinDisplayArea <= (CounterXmaxed) && (CounterY<480);\r\nelse\r\n\tinDisplayArea <= !(CounterX==639);\r\n\t\r\nassign vga_h_sync = ~vga_HS;\r\nassign vga_v_sync = ~vga_VS;\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/i2c_master.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 216 160)\r\n\t(text \"i2c_master\" (rect 5 0 49 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"reset_n\" (rect 0 0 30 12)(font \"Arial\" ))\r\n\t\t(text \"reset_n\" (rect 21 43 51 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"ena\" (rect 0 0 14 12)(font \"Arial\" ))\r\n\t\t(text \"ena\" (rect 21 59 35 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"addr[6..0]\" (rect 0 0 37 12)(font \"Arial\" ))\r\n\t\t(text \"addr[6..0]\" (rect 21 75 58 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"rw\" (rect 0 0 9 12)(font \"Arial\" ))\r\n\t\t(text \"rw\" (rect 21 91 30 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"data_wr[7..0]\" (rect 0 0 51 12)(font \"Arial\" ))\r\n\t\t(text \"data_wr[7..0]\" (rect 21 107 72 119)(font \"Arial\" ))\r\n\t\t(line (pt 0 112)(pt 16 112)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 32)\r\n\t\t(output)\r\n\t\t(text \"busy\" (rect 0 0 20 12)(font \"Arial\" ))\r\n\t\t(text \"busy\" (rect 159 27 179 39)(font \"Arial\" ))\r\n\t\t(line (pt 200 32)(pt 184 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 48)\r\n\t\t(output)\r\n\t\t(text \"data_rd[7..0]\" (rect 0 0 50 12)(font \"Arial\" ))\r\n\t\t(text \"data_rd[7..0]\" (rect 129 43 179 55)(font \"Arial\" ))\r\n\t\t(line (pt 200 48)(pt 184 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 64)\r\n\t\t(output)\r\n\t\t(text \"ack_error\" (rect 0 0 40 12)(font \"Arial\" ))\r\n\t\t(text \"ack_error\" (rect 139 59 179 71)(font \"Arial\" ))\r\n\t\t(line (pt 200 64)(pt 184 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 80)\r\n\t\t(bidir)\r\n\t\t(text \"sda\" (rect 0 0 14 12)(font \"Arial\" ))\r\n\t\t(text \"sda\" (rect 165 75 179 87)(font \"Arial\" ))\r\n\t\t(line (pt 200 80)(pt 184 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 200 96)\r\n\t\t(bidir)\r\n\t\t(text \"scl\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"scl\" (rect 169 91 179 103)(font \"Arial\" ))\r\n\t\t(line (pt 200 96)(pt 184 96)(line_width 1))\r\n\t)\r\n\t(parameter\r\n\t\t\"input_clk\"\r\n\t\t\"50000000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(parameter\r\n\t\t\"bus_clk\"\r\n\t\t\"400000\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 184 128)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 216 -64 316 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/i2c_master.vhd",
    "content": "--------------------------------------------------------------------------------\r\n--\r\n--   FileName:         i2c_master.vhd\r\n--   Dependencies:     none\r\n--   Design Software:  Quartus II 64-bit Version 13.1 Build 162 SJ Full Version\r\n--\r\n--   HDL CODE IS PROVIDED \"AS IS.\"  DIGI-KEY EXPRESSLY DISCLAIMS ANY\r\n--   WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING BUT NOT\r\n--   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A\r\n--   PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL DIGI-KEY\r\n--   BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR CONSEQUENTIAL\r\n--   DAMAGES, LOST PROFITS OR LOST DATA, HARM TO YOUR EQUIPMENT, COST OF\r\n--   PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS\r\n--   BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF),\r\n--   ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER SIMILAR COSTS.\r\n--\r\n--   Version History\r\n--   Version 1.0 11/01/2012 Scott Larson\r\n--     Initial Public Release\r\n--   Version 2.0 06/20/2014 Scott Larson\r\n--     Added ability to interface with different slaves in the same transaction\r\n--     Corrected ack_error bug where ack_error went 'Z' instead of '1' on error\r\n--     Corrected timing of when ack_error signal clears\r\n--   Version 2.1 10/21/2014 Scott Larson\r\n--     Replaced gated clock with clock enable\r\n--     Adjusted timing of SCL during start and stop conditions\r\n--   Version 2.2 02/05/2015 Scott Larson\r\n--     Corrected small SDA glitch introduced in version 2.1\r\n-- \r\n--------------------------------------------------------------------------------\r\n\r\nLIBRARY ieee;\r\nUSE ieee.std_logic_1164.all;\r\nUSE ieee.std_logic_unsigned.all;\r\n\r\nENTITY i2c_master IS\r\n  GENERIC(\r\n    input_clk : INTEGER := 50_000_000; --input clock speed from user logic in Hz\r\n    bus_clk   : INTEGER := 400_000);   --speed the i2c bus (scl) will run at in Hz\r\n  PORT(\r\n    clk       : IN     STD_LOGIC;                    --system clock\r\n    reset_n   : IN     STD_LOGIC;                    --active low reset\r\n    ena       : IN     STD_LOGIC;                    --latch in command\r\n    addr      : IN     STD_LOGIC_VECTOR(6 DOWNTO 0); --address of target slave\r\n    rw        : IN     STD_LOGIC;                    --'0' is write, '1' is read\r\n    data_wr   : IN     STD_LOGIC_VECTOR(7 DOWNTO 0); --data to write to slave\r\n    busy      : OUT    STD_LOGIC;                    --indicates transaction in progress\r\n    data_rd   : OUT    STD_LOGIC_VECTOR(7 DOWNTO 0); --data read from slave\r\n    ack_error : BUFFER STD_LOGIC;                    --flag if improper acknowledge from slave\r\n    sda       : INOUT  STD_LOGIC;                    --serial data output of i2c bus\r\n    scl       : INOUT  STD_LOGIC);                   --serial clock output of i2c bus\r\nEND i2c_master;\r\n\r\nARCHITECTURE logic OF i2c_master IS\r\n  CONSTANT divider  :  INTEGER := (input_clk/bus_clk)/4; --number of clocks in 1/4 cycle of scl\r\n  TYPE machine IS(ready, start, command, slv_ack1, wr, rd, slv_ack2, mstr_ack, stop); --needed states\r\n  SIGNAL state         : machine;                        --state machine\r\n  SIGNAL data_clk      : STD_LOGIC;                      --data clock for sda\r\n  SIGNAL data_clk_prev : STD_LOGIC;                      --data clock during previous system clock\r\n  SIGNAL scl_clk       : STD_LOGIC;                      --constantly running internal scl\r\n  SIGNAL scl_ena       : STD_LOGIC := '0';               --enables internal scl to output\r\n  SIGNAL sda_int       : STD_LOGIC := '1';               --internal sda\r\n  SIGNAL sda_ena_n     : STD_LOGIC;                      --enables internal sda to output\r\n  SIGNAL addr_rw       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --latched in address and read/write\r\n  SIGNAL data_tx       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --latched in data to write to slave\r\n  SIGNAL data_rx       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --data received from slave\r\n  SIGNAL bit_cnt       : INTEGER RANGE 0 TO 7 := 7;      --tracks bit number in transaction\r\n  SIGNAL stretch       : STD_LOGIC := '0';               --identifies if slave is stretching scl\r\nBEGIN\r\n\r\n  --generate the timing for the bus clock (scl_clk) and the data clock (data_clk)\r\n  PROCESS(clk, reset_n)\r\n    VARIABLE count  :  INTEGER RANGE 0 TO divider*4;  --timing for clock generation\r\n  BEGIN\r\n    IF(reset_n = '0') THEN                --reset asserted\r\n      stretch <= '0';\r\n      count := 0;\r\n    ELSIF(clk'EVENT AND clk = '1') THEN\r\n      data_clk_prev <= data_clk;          --store previous value of data clock\r\n      IF(count = divider*4-1) THEN        --end of timing cycle\r\n        count := 0;                       --reset timer\r\n      ELSIF(stretch = '0') THEN           --clock stretching from slave not detected\r\n        count := count + 1;               --continue clock generation timing\r\n      END IF;\r\n      CASE count IS\r\n        WHEN 0 TO divider-1 =>            --first 1/4 cycle of clocking\r\n          scl_clk <= '0';\r\n          data_clk <= '0';\r\n        WHEN divider TO divider*2-1 =>    --second 1/4 cycle of clocking\r\n          scl_clk <= '0';\r\n          data_clk <= '1';\r\n        WHEN divider*2 TO divider*3-1 =>  --third 1/4 cycle of clocking\r\n          scl_clk <= '1';                 --release scl\r\n          IF(scl = '0') THEN              --detect if slave is stretching clock\r\n            stretch <= '1';\r\n          ELSE\r\n            stretch <= '0';\r\n          END IF;\r\n          data_clk <= '1';\r\n        WHEN OTHERS =>                    --last 1/4 cycle of clocking\r\n          scl_clk <= '1';\r\n          data_clk <= '0';\r\n      END CASE;\r\n    END IF;\r\n  END PROCESS;\r\n\r\n  --state machine and writing to sda during scl low (data_clk rising edge)\r\n  PROCESS(clk, reset_n)\r\n  BEGIN\r\n    IF(reset_n = '0') THEN                 --reset asserted\r\n      state <= ready;                      --return to initial state\r\n      busy <= '1';                         --indicate not available\r\n      scl_ena <= '0';                      --sets scl high impedance\r\n      sda_int <= '1';                      --sets sda high impedance\r\n      ack_error <= '0';                    --clear acknowledge error flag\r\n      bit_cnt <= 7;                        --restarts data bit counter\r\n      data_rd <= \"00000000\";               --clear data read port\r\n    ELSIF(clk'EVENT AND clk = '1') THEN\r\n      IF(data_clk = '1' AND data_clk_prev = '0') THEN  --data clock rising edge\r\n        CASE state IS\r\n          WHEN ready =>                      --idle state\r\n            IF(ena = '1') THEN               --transaction requested\r\n              busy <= '1';                   --flag busy\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              state <= start;                --go to start bit\r\n            ELSE                             --remain idle\r\n              busy <= '0';                   --unflag busy\r\n              state <= ready;                --remain idle\r\n            END IF;\r\n          WHEN start =>                      --start bit of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            sda_int <= addr_rw(bit_cnt);     --set first address bit to bus\r\n            state <= command;                --go to command\r\n          WHEN command =>                    --address and command byte of transaction\r\n            IF(bit_cnt = 0) THEN             --command transmit finished\r\n              sda_int <= '1';                --release sda for slave acknowledge\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              state <= slv_ack1;             --go to slave acknowledge (command)\r\n            ELSE                             --next clock cycle of command state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              sda_int <= addr_rw(bit_cnt-1); --write address/command bit to bus\r\n              state <= command;              --continue with command\r\n            END IF;\r\n          WHEN slv_ack1 =>                   --slave acknowledge bit (command)\r\n            IF(addr_rw(0) = '0') THEN        --write command\r\n              sda_int <= data_tx(bit_cnt);   --write first bit of data\r\n              state <= wr;                   --go to write byte\r\n            ELSE                             --read command\r\n              sda_int <= '1';                --release sda from incoming data\r\n              state <= rd;                   --go to read byte\r\n            END IF;\r\n          WHEN wr =>                         --write byte of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            IF(bit_cnt = 0) THEN             --write byte transmit finished\r\n              sda_int <= '1';                --release sda for slave acknowledge\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              state <= slv_ack2;             --go to slave acknowledge (write)\r\n            ELSE                             --next clock cycle of write state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              sda_int <= data_tx(bit_cnt-1); --write next bit to bus\r\n              state <= wr;                   --continue writing\r\n            END IF;\r\n          WHEN rd =>                         --read byte of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            IF(bit_cnt = 0) THEN             --read byte receive finished\r\n              IF(ena = '1' AND addr_rw = addr & rw) THEN  --continuing with another read at same address\r\n                sda_int <= '0';              --acknowledge the byte has been received\r\n              ELSE                           --stopping or continuing with a write\r\n                sda_int <= '1';              --send a no-acknowledge (before stop or repeated start)\r\n              END IF;\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              data_rd <= data_rx;            --output received data\r\n              state <= mstr_ack;             --go to master acknowledge\r\n            ELSE                             --next clock cycle of read state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              state <= rd;                   --continue reading\r\n            END IF;\r\n          WHEN slv_ack2 =>                   --slave acknowledge bit (write)\r\n            IF(ena = '1') THEN               --continue transaction\r\n              busy <= '0';                   --continue is accepted\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              IF(addr_rw = addr & rw) THEN   --continue transaction with another write\r\n                sda_int <= data_wr(bit_cnt); --write first bit of data\r\n                state <= wr;                 --go to write byte\r\n              ELSE                           --continue transaction with a read or new slave\r\n                state <= start;              --go to repeated start\r\n              END IF;\r\n            ELSE                             --complete transaction\r\n              state <= stop;                 --go to stop bit\r\n            END IF;\r\n          WHEN mstr_ack =>                   --master acknowledge bit after a read\r\n            IF(ena = '1') THEN               --continue transaction\r\n              busy <= '0';                   --continue is accepted and data received is available on bus\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              IF(addr_rw = addr & rw) THEN   --continue transaction with another read\r\n                sda_int <= '1';              --release sda from incoming data\r\n                state <= rd;                 --go to read byte\r\n              ELSE                           --continue transaction with a write or new slave\r\n                state <= start;              --repeated start\r\n              END IF;    \r\n            ELSE                             --complete transaction\r\n              state <= stop;                 --go to stop bit\r\n            END IF;\r\n          WHEN stop =>                       --stop bit of transaction\r\n            busy <= '0';                     --unflag busy\r\n            state <= ready;                  --go to idle state\r\n        END CASE;    \r\n      ELSIF(data_clk = '0' AND data_clk_prev = '1') THEN  --data clock falling edge\r\n        CASE state IS\r\n          WHEN start =>                  \r\n            IF(scl_ena = '0') THEN                  --starting new transaction\r\n              scl_ena <= '1';                       --enable scl output\r\n              ack_error <= '0';                     --reset acknowledge error output\r\n            END IF;\r\n          WHEN slv_ack1 =>                          --receiving slave acknowledge (command)\r\n            IF(sda /= '0' OR ack_error = '1') THEN  --no-acknowledge or previous no-acknowledge\r\n              ack_error <= '1';                     --set error output if no-acknowledge\r\n            END IF;\r\n          WHEN rd =>                                --receiving slave data\r\n            data_rx(bit_cnt) <= sda;                --receive current slave data bit\r\n          WHEN slv_ack2 =>                          --receiving slave acknowledge (write)\r\n            IF(sda /= '0' OR ack_error = '1') THEN  --no-acknowledge or previous no-acknowledge\r\n              ack_error <= '1';                     --set error output if no-acknowledge\r\n            END IF;\r\n          WHEN stop =>\r\n            scl_ena <= '0';                         --disable scl\r\n          WHEN OTHERS =>\r\n            NULL;\r\n        END CASE;\r\n      END IF;\r\n    END IF;\r\n  END PROCESS;  \r\n\r\n  --set sda output\r\n  WITH state SELECT\r\n    sda_ena_n <= data_clk_prev WHEN start,     --generate start condition\r\n                 NOT data_clk_prev WHEN stop,  --generate stop condition\r\n                 sda_int WHEN OTHERS;          --set to internal sda signal    \r\n      \r\n  --set scl and sda outputs\r\n  scl <= '0' WHEN (scl_ena = '1' AND scl_clk = '0') ELSE 'Z';\r\n  sda <= '0' WHEN sda_ena_n = '0' ELSE 'Z';\r\n  \r\nEND logic;\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/i2c_master.vhd.bak",
    "content": "--------------------------------------------------------------------------------\r\n--\r\n--   FileName:         i2c_master.vhd\r\n--   Dependencies:     none\r\n--   Design Software:  Quartus II 64-bit Version 13.1 Build 162 SJ Full Version\r\n--\r\n--   HDL CODE IS PROVIDED \"AS IS.\"  DIGI-KEY EXPRESSLY DISCLAIMS ANY\r\n--   WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING BUT NOT\r\n--   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A\r\n--   PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL DIGI-KEY\r\n--   BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR CONSEQUENTIAL\r\n--   DAMAGES, LOST PROFITS OR LOST DATA, HARM TO YOUR EQUIPMENT, COST OF\r\n--   PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS\r\n--   BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF),\r\n--   ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER SIMILAR COSTS.\r\n--\r\n--   Version History\r\n--   Version 1.0 11/01/2012 Scott Larson\r\n--     Initial Public Release\r\n--   Version 2.0 06/20/2014 Scott Larson\r\n--     Added ability to interface with different slaves in the same transaction\r\n--     Corrected ack_error bug where ack_error went 'Z' instead of '1' on error\r\n--     Corrected timing of when ack_error signal clears\r\n--   Version 2.1 10/21/2014 Scott Larson\r\n--     Replaced gated clock with clock enable\r\n--     Adjusted timing of SCL during start and stop conditions\r\n--   Version 2.2 02/05/2015 Scott Larson\r\n--     Corrected small SDA glitch introduced in version 2.1\r\n-- \r\n--------------------------------------------------------------------------------\r\n\r\nLIBRARY ieee;\r\nUSE ieee.std_logic_1164.all;\r\nUSE ieee.std_logic_unsigned.all;\r\n\r\nENTITY i2c_master IS\r\n  GENERIC(\r\n    input_clk : INTEGER := 50_000_000; --input clock speed from user logic in Hz\r\n    bus_clk   : INTEGER := 400_000);   --speed the i2c bus (scl) will run at in Hz\r\n  PORT(\r\n    clk       : IN     STD_LOGIC;                    --system clock\r\n    reset_n   : IN     STD_LOGIC;                    --active low reset\r\n    ena       : IN     STD_LOGIC;                    --latch in command\r\n    addr      : IN     STD_LOGIC_VECTOR(6 DOWNTO 0); --address of target slave\r\n    rw        : IN     STD_LOGIC;                    --'0' is write, '1' is read\r\n    data_wr   : IN     STD_LOGIC_VECTOR(7 DOWNTO 0); --data to write to slave\r\n    busy      : OUT    STD_LOGIC;                    --indicates transaction in progress\r\n    data_rd   : OUT    STD_LOGIC_VECTOR(7 DOWNTO 0); --data read from slave\r\n    ack_error : BUFFER STD_LOGIC;                    --flag if improper acknowledge from slave\r\n    sda       : INOUT  STD_LOGIC;                    --serial data output of i2c bus\r\n    scl       : INOUT  STD_LOGIC);                   --serial clock output of i2c bus\r\nEND i2c_master;\r\n\r\nARCHITECTURE logic OF i2c_master IS\r\n  CONSTANT divider  :  INTEGER := (input_clk/bus_clk)/4; --number of clocks in 1/4 cycle of scl\r\n  TYPE machine IS(ready, start, command, slv_ack1, wr, rd, slv_ack2, mstr_ack, stop); --needed states\r\n  SIGNAL state         : machine;                        --state machine\r\n  SIGNAL data_clk      : STD_LOGIC;                      --data clock for sda\r\n  SIGNAL data_clk_prev : STD_LOGIC;                      --data clock during previous system clock\r\n  SIGNAL scl_clk       : STD_LOGIC;                      --constantly running internal scl\r\n  SIGNAL scl_ena       : STD_LOGIC := '0';               --enables internal scl to output\r\n  SIGNAL sda_int       : STD_LOGIC := '1';               --internal sda\r\n  SIGNAL sda_ena_n     : STD_LOGIC;                      --enables internal sda to output\r\n  SIGNAL addr_rw       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --latched in address and read/write\r\n  SIGNAL data_tx       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --latched in data to write to slave\r\n  SIGNAL data_rx       : STD_LOGIC_VECTOR(7 DOWNTO 0);   --data received from slave\r\n  SIGNAL bit_cnt       : INTEGER RANGE 0 TO 7 := 7;      --tracks bit number in transaction\r\n  SIGNAL stretch       : STD_LOGIC := '0';               --identifies if slave is stretching scl\r\nBEGIN\r\n\r\n  --generate the timing for the bus clock (scl_clk) and the data clock (data_clk)\r\n  PROCESS(clk, reset_n)\r\n    VARIABLE count  :  INTEGER RANGE 0 TO divider*4;  --timing for clock generation\r\n  BEGIN\r\n    IF(reset_n = '0') THEN                --reset asserted\r\n      stretch <= '0';\r\n      count := 0;\r\n    ELSIF(clk'EVENT AND clk = '1') THEN\r\n      data_clk_prev <= data_clk;          --store previous value of data clock\r\n      IF(count = divider*4-1) THEN        --end of timing cycle\r\n        count := 0;                       --reset timer\r\n      ELSIF(stretch = '0') THEN           --clock stretching from slave not detected\r\n        count := count + 1;               --continue clock generation timing\r\n      END IF;\r\n      CASE count IS\r\n        WHEN 0 TO divider-1 =>            --first 1/4 cycle of clocking\r\n          scl_clk <= '0';\r\n          data_clk <= '0';\r\n        WHEN divider TO divider*2-1 =>    --second 1/4 cycle of clocking\r\n          scl_clk <= '0';\r\n          data_clk <= '1';\r\n        WHEN divider*2 TO divider*3-1 =>  --third 1/4 cycle of clocking\r\n          scl_clk <= '1';                 --release scl\r\n          IF(scl = '0') THEN              --detect if slave is stretching clock\r\n            stretch <= '1';\r\n          ELSE\r\n            stretch <= '0';\r\n          END IF;\r\n          data_clk <= '1';\r\n        WHEN OTHERS =>                    --last 1/4 cycle of clocking\r\n          scl_clk <= '1';\r\n          data_clk <= '0';\r\n      END CASE;\r\n    END IF;\r\n  END PROCESS;\r\n\r\n  --state machine and writing to sda during scl low (data_clk rising edge)\r\n  PROCESS(clk, reset_n)\r\n  BEGIN\r\n    IF(reset_n = '0') THEN                 --reset asserted\r\n      state <= ready;                      --return to initial state\r\n      busy <= '1';                         --indicate not available\r\n      scl_ena <= '0';                      --sets scl high impedance\r\n      sda_int <= '1';                      --sets sda high impedance\r\n      ack_error <= '0';                    --clear acknowledge error flag\r\n      bit_cnt <= 7;                        --restarts data bit counter\r\n      data_rd <= \"00000000\";               --clear data read port\r\n    ELSIF(clk'EVENT AND clk = '1') THEN\r\n      IF(data_clk = '1' AND data_clk_prev = '0') THEN  --data clock rising edge\r\n        CASE state IS\r\n          WHEN ready =>                      --idle state\r\n            IF(ena = '1') THEN               --transaction requested\r\n              busy <= '1';                   --flag busy\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              state <= start;                --go to start bit\r\n            ELSE                             --remain idle\r\n              busy <= '0';                   --unflag busy\r\n              state <= ready;                --remain idle\r\n            END IF;\r\n          WHEN start =>                      --start bit of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            sda_int <= addr_rw(bit_cnt);     --set first address bit to bus\r\n            state <= command;                --go to command\r\n          WHEN command =>                    --address and command byte of transaction\r\n            IF(bit_cnt = 0) THEN             --command transmit finished\r\n              sda_int <= '1';                --release sda for slave acknowledge\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              state <= slv_ack1;             --go to slave acknowledge (command)\r\n            ELSE                             --next clock cycle of command state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              sda_int <= addr_rw(bit_cnt-1); --write address/command bit to bus\r\n              state <= command;              --continue with command\r\n            END IF;\r\n          WHEN slv_ack1 =>                   --slave acknowledge bit (command)\r\n            IF(addr_rw(0) = '0') THEN        --write command\r\n              sda_int <= data_tx(bit_cnt);   --write first bit of data\r\n              state <= wr;                   --go to write byte\r\n            ELSE                             --read command\r\n              sda_int <= '1';                --release sda from incoming data\r\n              state <= rd;                   --go to read byte\r\n            END IF;\r\n          WHEN wr =>                         --write byte of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            IF(bit_cnt = 0) THEN             --write byte transmit finished\r\n              sda_int <= '1';                --release sda for slave acknowledge\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              state <= slv_ack2;             --go to slave acknowledge (write)\r\n            ELSE                             --next clock cycle of write state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              sda_int <= data_tx(bit_cnt-1); --write next bit to bus\r\n              state <= wr;                   --continue writing\r\n            END IF;\r\n          WHEN rd =>                         --read byte of transaction\r\n            busy <= '1';                     --resume busy if continuous mode\r\n            IF(bit_cnt = 0) THEN             --read byte receive finished\r\n              IF(ena = '1' AND addr_rw = addr & rw) THEN  --continuing with another read at same address\r\n                sda_int <= '0';              --acknowledge the byte has been received\r\n              ELSE                           --stopping or continuing with a write\r\n                sda_int <= '1';              --send a no-acknowledge (before stop or repeated start)\r\n              END IF;\r\n              bit_cnt <= 7;                  --reset bit counter for \"byte\" states\r\n              data_rd <= data_rx;            --output received data\r\n              state <= mstr_ack;             --go to master acknowledge\r\n            ELSE                             --next clock cycle of read state\r\n              bit_cnt <= bit_cnt - 1;        --keep track of transaction bits\r\n              state <= rd;                   --continue reading\r\n            END IF;\r\n          WHEN slv_ack2 =>                   --slave acknowledge bit (write)\r\n            IF(ena = '1') THEN               --continue transaction\r\n              busy <= '0';                   --continue is accepted\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              IF(addr_rw = addr & rw) THEN   --continue transaction with another write\r\n                sda_int <= data_wr(bit_cnt); --write first bit of data\r\n                state <= wr;                 --go to write byte\r\n              ELSE                           --continue transaction with a read or new slave\r\n                state <= start;              --go to repeated start\r\n              END IF;\r\n            ELSE                             --complete transaction\r\n              state <= stop;                 --go to stop bit\r\n            END IF;\r\n          WHEN mstr_ack =>                   --master acknowledge bit after a read\r\n            IF(ena = '1') THEN               --continue transaction\r\n              busy <= '0';                   --continue is accepted and data received is available on bus\r\n              addr_rw <= addr & rw;          --collect requested slave address and command\r\n              data_tx <= data_wr;            --collect requested data to write\r\n              IF(addr_rw = addr & rw) THEN   --continue transaction with another read\r\n                sda_int <= '1';              --release sda from incoming data\r\n                state <= rd;                 --go to read byte\r\n              ELSE                           --continue transaction with a write or new slave\r\n                state <= start;              --repeated start\r\n              END IF;    \r\n            ELSE                             --complete transaction\r\n              state <= stop;                 --go to stop bit\r\n            END IF;\r\n          WHEN stop =>                       --stop bit of transaction\r\n            busy <= '0';                     --unflag busy\r\n            state <= ready;                  --go to idle state\r\n        END CASE;    \r\n      ELSIF(data_clk = '0' AND data_clk_prev = '1') THEN  --data clock falling edge\r\n        CASE state IS\r\n          WHEN start =>                  \r\n            IF(scl_ena = '0') THEN                  --starting new transaction\r\n              scl_ena <= '1';                       --enable scl output\r\n              ack_error <= '0';                     --reset acknowledge error output\r\n            END IF;\r\n          WHEN slv_ack1 =>                          --receiving slave acknowledge (command)\r\n            IF(sda /= '0' OR ack_error = '1') THEN  --no-acknowledge or previous no-acknowledge\r\n              ack_error <= '1';                     --set error output if no-acknowledge\r\n            END IF;\r\n          WHEN rd =>                                --receiving slave data\r\n            data_rx(bit_cnt) <= sda;                --receive current slave data bit\r\n          WHEN slv_ack2 =>                          --receiving slave acknowledge (write)\r\n            IF(sda /= '0' OR ack_error = '1') THEN  --no-acknowledge or previous no-acknowledge\r\n              ack_error <= '1';                     --set error output if no-acknowledge\r\n            END IF;\r\n          WHEN stop =>\r\n            scl_ena <= '0';                         --disable scl\r\n          WHEN OTHERS =>\r\n            NULL;\r\n        END CASE;\r\n      END IF;\r\n    END IF;\r\n  END PROCESS;  \r\n\r\n  --set sda output\r\n  WITH state SELECT\r\n    sda_ena_n <= data_clk_prev WHEN start,     --generate start condition\r\n                 NOT data_clk_prev WHEN stop,  --generate stop condition\r\n                 sda_int WHEN OTHERS;          --set to internal sda signal    \r\n      \r\n  --set scl and sda outputs\r\n  scl <= '0' WHEN (scl_ena = '1' AND scl_clk = '0') ELSE 'Z';\r\n  sda <= '0' WHEN sda_ena_n = '0' ELSE 'Z';\r\n  \r\nEND logic;\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/lp_ram_dp.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 0 0 256 176)\r\n\t(text \"lp_ram_dp\" (rect 98 0 168 16)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 160 25 172)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"data[7..0]\" (rect 0 0 53 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"data[7..0]\" (rect 4 18 47 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 32)(pt 112 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"wraddress[11..0]\" (rect 0 0 97 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wraddress[11..0]\" (rect 4 34 85 47)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 48)(pt 112 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wren\" (rect 4 50 28 63)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 112 64))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 88)\r\n\t\t(input)\r\n\t\t(text \"rdaddress[11..0]\" (rect 0 0 93 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"rdaddress[11..0]\" (rect 4 74 81 87)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 88)(pt 112 88)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 104)\r\n\t\t(input)\r\n\t\t(text \"rden\" (rect 0 0 25 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"rden\" (rect 4 90 24 103)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 104)(pt 112 104))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 128)\r\n\t\t(input)\r\n\t\t(text \"wrclock\" (rect 0 0 46 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wrclock\" (rect 4 114 41 127)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 128)(pt 98 128))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 144)\r\n\t\t(input)\r\n\t\t(text \"rdclock\" (rect 0 0 41 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"rdclock\" (rect 4 130 37 143)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 144)(pt 176 144))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 88)\r\n\t\t(output)\r\n\t\t(text \"q[7..0]\" (rect 0 0 35 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"q[7..0]\" (rect 223 74 251 87)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 256 88)(pt 192 88)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(text \"4096 Word(s)\" (rect 137 11 244 203)(font \"Arial\" )(vertical))\r\n\t\t(text \"RAM\" (rect 148 0 237 167)(font \"Arial\" )(vertical))\r\n\t\t(text \"Block Type: AUTO\" (rect 40 165 156 341)(font \"Arial\" ))\r\n\t\t(line (pt 128 24)(pt 168 24))\r\n\t\t(line (pt 168 24)(pt 168 112))\r\n\t\t(line (pt 168 112)(pt 128 112))\r\n\t\t(line (pt 128 112)(pt 128 24))\r\n\t\t(line (pt 112 27)(pt 120 27))\r\n\t\t(line (pt 120 27)(pt 120 39))\r\n\t\t(line (pt 120 39)(pt 112 39))\r\n\t\t(line (pt 112 39)(pt 112 27))\r\n\t\t(line (pt 112 34)(pt 114 36))\r\n\t\t(line (pt 114 36)(pt 112 38))\r\n\t\t(line (pt 98 36)(pt 112 36))\r\n\t\t(line (pt 120 32)(pt 128 32)(line_width 3))\r\n\t\t(line (pt 112 43)(pt 120 43))\r\n\t\t(line (pt 120 43)(pt 120 55))\r\n\t\t(line (pt 120 55)(pt 112 55))\r\n\t\t(line (pt 112 55)(pt 112 43))\r\n\t\t(line (pt 112 50)(pt 114 52))\r\n\t\t(line (pt 114 52)(pt 112 54))\r\n\t\t(line (pt 98 52)(pt 112 52))\r\n\t\t(line (pt 120 48)(pt 128 48)(line_width 3))\r\n\t\t(line (pt 112 59)(pt 120 59))\r\n\t\t(line (pt 120 59)(pt 120 71))\r\n\t\t(line (pt 120 71)(pt 112 71))\r\n\t\t(line (pt 112 71)(pt 112 59))\r\n\t\t(line (pt 112 66)(pt 114 68))\r\n\t\t(line (pt 114 68)(pt 112 70))\r\n\t\t(line (pt 98 68)(pt 112 68))\r\n\t\t(line (pt 120 64)(pt 128 64))\r\n\t\t(line (pt 112 83)(pt 120 83))\r\n\t\t(line (pt 120 83)(pt 120 95))\r\n\t\t(line (pt 120 95)(pt 112 95))\r\n\t\t(line (pt 112 95)(pt 112 83))\r\n\t\t(line (pt 112 90)(pt 114 92))\r\n\t\t(line (pt 114 92)(pt 112 94))\r\n\t\t(line (pt 104 92)(pt 112 92))\r\n\t\t(line (pt 120 88)(pt 128 88)(line_width 3))\r\n\t\t(line (pt 112 99)(pt 120 99))\r\n\t\t(line (pt 120 99)(pt 120 111))\r\n\t\t(line (pt 120 111)(pt 112 111))\r\n\t\t(line (pt 112 111)(pt 112 99))\r\n\t\t(line (pt 112 106)(pt 114 108))\r\n\t\t(line (pt 114 108)(pt 112 110))\r\n\t\t(line (pt 104 108)(pt 112 108))\r\n\t\t(line (pt 120 104)(pt 128 104))\r\n\t\t(line (pt 98 36)(pt 98 129))\r\n\t\t(line (pt 104 92)(pt 104 145))\r\n\t\t(line (pt 176 92)(pt 176 145))\r\n\t\t(line (pt 184 83)(pt 192 83))\r\n\t\t(line (pt 192 83)(pt 192 95))\r\n\t\t(line (pt 192 95)(pt 184 95))\r\n\t\t(line (pt 184 95)(pt 184 83))\r\n\t\t(line (pt 184 90)(pt 186 92))\r\n\t\t(line (pt 186 92)(pt 184 94))\r\n\t\t(line (pt 176 92)(pt 184 92))\r\n\t\t(line (pt 168 88)(pt 184 88)(line_width 3))\r\n\t\t(line (pt 0 0)(pt 257 0))\r\n\t\t(line (pt 257 0)(pt 257 178))\r\n\t\t(line (pt 0 178)(pt 257 178))\r\n\t\t(line (pt 0 0)(pt 0 178))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/lp_ram_dp.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 2-PORT\"\r\nset_global_assignment -name IP_TOOL_VERSION \"15.0\"\r\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\r\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"lp_ram_dp.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"lp_ram_dp.bsf\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"lp_ram_dp_bb.v\"]\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/lp_ram_dp.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: lp_ram_dp.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule lp_ram_dp (\r\n\tdata,\r\n\trdaddress,\r\n\trdclock,\r\n\trden,\r\n\twraddress,\r\n\twrclock,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t[7:0]  data;\r\n\tinput\t[11:0]  rdaddress;\r\n\tinput\t  rdclock;\r\n\tinput\t  rden;\r\n\tinput\t[11:0]  wraddress;\r\n\tinput\t  wrclock;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  rden;\r\n\ttri1\t  wrclock;\r\n\ttri0\t  wren;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [7:0] sub_wire0;\r\n\twire [7:0] q = sub_wire0[7:0];\r\n\r\n\taltsyncram\taltsyncram_component (\r\n\t\t\t\t.address_a (wraddress),\r\n\t\t\t\t.address_b (rdaddress),\r\n\t\t\t\t.clock0 (wrclock),\r\n\t\t\t\t.clock1 (rdclock),\r\n\t\t\t\t.data_a (data),\r\n\t\t\t\t.rden_b (rden),\r\n\t\t\t\t.wren_a (wren),\r\n\t\t\t\t.q_b (sub_wire0),\r\n\t\t\t\t.aclr0 (1'b0),\r\n\t\t\t\t.aclr1 (1'b0),\r\n\t\t\t\t.addressstall_a (1'b0),\r\n\t\t\t\t.addressstall_b (1'b0),\r\n\t\t\t\t.byteena_a (1'b1),\r\n\t\t\t\t.byteena_b (1'b1),\r\n\t\t\t\t.clocken0 (1'b1),\r\n\t\t\t\t.clocken1 (1'b1),\r\n\t\t\t\t.clocken2 (1'b1),\r\n\t\t\t\t.clocken3 (1'b1),\r\n\t\t\t\t.data_b ({8{1'b1}}),\r\n\t\t\t\t.eccstatus (),\r\n\t\t\t\t.q_a (),\r\n\t\t\t\t.rden_a (1'b1),\r\n\t\t\t\t.wren_b (1'b0));\r\n\tdefparam\r\n\t\taltsyncram_component.address_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.address_reg_b = \"CLOCK1\",\r\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_input_b = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_output_b = \"BYPASS\",\r\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\r\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\r\n\t\taltsyncram_component.numwords_a = 4096,\r\n\t\taltsyncram_component.numwords_b = 4096,\r\n\t\taltsyncram_component.operation_mode = \"DUAL_PORT\",\r\n\t\taltsyncram_component.outdata_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.outdata_reg_b = \"CLOCK1\",\r\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\r\n\t\taltsyncram_component.rdcontrol_reg_b = \"CLOCK1\",\r\n\t\taltsyncram_component.widthad_a = 12,\r\n\t\taltsyncram_component.widthad_b = 12,\r\n\t\taltsyncram_component.width_a = 8,\r\n\t\taltsyncram_component.width_b = 8,\r\n\t\taltsyncram_component.width_byteena_a = 1;\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"32768\"\r\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGq NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"1\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK1\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"4096\"\r\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"4096\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK1\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: RDCONTROL_REG_B STRING \"CLOCK1\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: rdaddress 0 0 12 0 INPUT NODEFVAL \"rdaddress[11..0]\"\r\n// Retrieval info: USED_PORT: rdclock 0 0 0 0 INPUT NODEFVAL \"rdclock\"\r\n// Retrieval info: USED_PORT: rden 0 0 0 0 INPUT VCC \"rden\"\r\n// Retrieval info: USED_PORT: wraddress 0 0 12 0 INPUT NODEFVAL \"wraddress[11..0]\"\r\n// Retrieval info: USED_PORT: wrclock 0 0 0 0 INPUT VCC \"wrclock\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 12 0 wraddress 0 0 12 0\r\n// Retrieval info: CONNECT: @address_b 0 0 12 0 rdaddress 0 0 12 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 wrclock 0 0 0 0\r\n// Retrieval info: CONNECT: @clock1 0 0 0 0 rdclock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @rden_b 0 0 0 0 rden 0 0 0 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/lp_ram_dp_bb.v",
    "content": "// megafunction wizard: %RAM: 2-PORT%VBB%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: lp_ram_dp.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\nmodule lp_ram_dp (\r\n\tdata,\r\n\trdaddress,\r\n\trdclock,\r\n\trden,\r\n\twraddress,\r\n\twrclock,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t[7:0]  data;\r\n\tinput\t[11:0]  rdaddress;\r\n\tinput\t  rdclock;\r\n\tinput\t  rden;\r\n\tinput\t[11:0]  wraddress;\r\n\tinput\t  wrclock;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  rden;\r\n\ttri1\t  wrclock;\r\n\ttri0\t  wren;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRdata NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRq NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrdaddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRrren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwraddress NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLRwren NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: Clock_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INDATA_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_B\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MEMSIZE NUMERIC \"32768\"\r\n// Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: OPERATION_MODE NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC \"3\"\r\n// Retrieval info: PRIVATE: REGdata NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGq NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrdaddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGrren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwraddress NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: REGwren NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: UseDPRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: VarWidth NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: enable NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"1\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: ADDRESS_REG_B STRING \"CLOCK1\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"4096\"\r\n// Retrieval info: CONSTANT: NUMWORDS_B NUMERIC \"4096\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"DUAL_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_B STRING \"CLOCK1\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: RDCONTROL_REG_B STRING \"CLOCK1\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: WIDTHAD_B NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_B NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: rdaddress 0 0 12 0 INPUT NODEFVAL \"rdaddress[11..0]\"\r\n// Retrieval info: USED_PORT: rdclock 0 0 0 0 INPUT NODEFVAL \"rdclock\"\r\n// Retrieval info: USED_PORT: rden 0 0 0 0 INPUT VCC \"rden\"\r\n// Retrieval info: USED_PORT: wraddress 0 0 12 0 INPUT NODEFVAL \"wraddress[11..0]\"\r\n// Retrieval info: USED_PORT: wrclock 0 0 0 0 INPUT VCC \"wrclock\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 12 0 wraddress 0 0 12 0\r\n// Retrieval info: CONNECT: @address_b 0 0 12 0 rdaddress 0 0 12 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 wrclock 0 0 0 0\r\n// Retrieval info: CONNECT: @clock1 0 0 0 0 rdclock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @rden_b 0 0 0 0 rden 0 0 0 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL lp_ram_dp_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/mball.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 192 128)\r\n\t(text \"mball\" (rect 5 0 25 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"CounterX[9..0]\" (rect 0 0 57 12)(font \"Arial\" ))\r\n\t\t(text \"CounterX[9..0]\" (rect 21 43 78 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"CounterY[8..0]\" (rect 0 0 59 12)(font \"Arial\" ))\r\n\t\t(text \"CounterY[8..0]\" (rect 21 59 80 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 32)\r\n\t\t(output)\r\n\t\t(text \"ball\" (rect 0 0 11 12)(font \"Arial\" ))\r\n\t\t(text \"ball\" (rect 144 27 155 39)(font \"Arial\" ))\r\n\t\t(line (pt 176 32)(pt 160 32)(line_width 1))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 160 96)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/mball.v",
    "content": "module mball(clk, BouncingObject, inotherball, CounterX, CounterY, ballX, ballY, inball, ballspeed, ballmass);\r\ninput clk;\r\ninput BouncingObject;\r\ninput inotherball;\r\ninput [9:0] CounterX;\r\ninput [8:0] CounterY;\r\nparameter [9:0] startX;\r\nparameter [8:0] startY;\r\nparameter ballsize = 5;\r\nparameter twoballsize = 2*ballsize;\r\noutput reg [9:0] ballX;\r\noutput reg [8:0] ballY;\r\noutput reg [8:0] ballspeed;\r\nparameter [8:0] pballmass;\r\nparameter [8:0] pballspeed;\r\n\r\noutput [8:0] ballmass = pballmass;//just set to the input parameter\r\n\r\nreg ball_inX, ball_inY;\r\nalways @(posedge clk)\r\nif(ball_inX==0) ball_inX <= (CounterX==ballX) & ball_inY; else ball_inX <= !(CounterX==ballX+twoballsize);\r\nalways @(posedge clk)\r\nif(ball_inY==0) ball_inY <= (CounterY==ballY); else ball_inY <= !(CounterY==ballY+twoballsize);\r\noutput inball = ball_inX & ball_inY;\r\n\r\ninitial begin\r\n    ballX<=startX;\r\n\t ballY<=startY;\r\n\t ball_dirX <= startX%2;\r\n\t ball_dirY <= startY%2;\r\n\t ballspeed<=pballspeed;\r\nend\r\n\r\nreg ResetCollision;\r\nalways @(posedge clk) ResetCollision <= (CounterY==500) & (CounterX==0);  // active only once for every video frame\r\n\r\nreg CollisionX1, CollisionX2, CollisionY1, CollisionY2;\r\nalways @(posedge clk) if(ResetCollision) CollisionX1<=0; else if(BouncingObject & (CounterX==ballX   ) & (CounterY==ballY+ballsize)) CollisionX1<=1;\r\nalways @(posedge clk) if(ResetCollision) CollisionX2<=0; else if(BouncingObject & (CounterX==ballX+twoballsize) & (CounterY==ballY+ballsize)) CollisionX2<=1;\r\nalways @(posedge clk) if(ResetCollision) CollisionY1<=0; else if(BouncingObject & (CounterX==ballX+ballsize) & (CounterY==ballY   )) CollisionY1<=1;\r\nalways @(posedge clk) if(ResetCollision) CollisionY2<=0; else if(BouncingObject & (CounterX==ballX+ballsize) & (CounterY==ballY+twoballsize)) CollisionY2<=1;\r\n\r\nwire UpdateBallPosition = ResetCollision;  // update the ball position at the same time that we reset the collision detectors\r\n\r\nreg ballcollision;\r\nalways @(posedge clk) if(ResetCollision) ballcollision<=0; else if (inotherball) ballcollision<=1;//inotherball;\r\n\r\nreg ball_dirX, ball_dirY;\r\nalways @(posedge clk) begin\r\n\tif(UpdateBallPosition) begin\r\n\t\tif(~(CollisionX1 & CollisionX2))        // if collision on both X-sides, don't move in the X direction\r\n\t\tbegin\r\n\t\t\tif (ballcollision) begin\r\n\t\t\t   ball_dirX = !ball_dirX;\r\n\t\t\t\tballspeed = 1+((ballspeed+1)%2);//ballcollision;///ballmass; // v=p/m\r\n\t\t\tend\r\n\t\t\tballX = ballX + (ball_dirX ? -ballspeed : ballspeed);\r\n\t\t\tif (CollisionX2) ball_dirX <= 1; else if (CollisionX1) ball_dirX <= 0;\r\n\t\tend\r\n\t\r\n\t\tif(~(CollisionY1 & CollisionY2))        // if collision on both Y-sides, don't move in the Y direction\r\n\t\tbegin\r\n\t\t\tballY <= ballY + (ball_dirY ? -1 : 1);\r\n\t\t\tif (CollisionY2) ball_dirY <= 1; else if (CollisionY1) ball_dirY <= 0;\r\n\t\tend\r\n\tend\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 0 0 400 328)\r\n\t(text \"myadc\" (rect 181 -1 209 11)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 312 20 324)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 72)\r\n\t\t(input)\r\n\t\t(text \"adc_pll_clock_clk\" (rect 0 0 69 12)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"adc_pll_clock_clk\" (rect 4 61 106 72)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 72)(pt 128 72)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"adc_pll_locked_export\" (rect 0 0 88 12)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"adc_pll_locked_export\" (rect 4 101 130 112)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 112)(pt 128 112)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 152)\r\n\t\t(input)\r\n\t\t(text \"clock_clk\" (rect 0 0 36 12)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clock_clk\" (rect 4 141 58 152)(font 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  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc.cmp",
    "content": "\tcomponent myadc is\r\n\t\tport (\n\t\t\tadc_pll_clock_clk      : in  std_logic                     := 'X';             -- clk\n\t\t\tadc_pll_locked_export  : in  std_logic                     := 'X';             -- export\n\t\t\tclock_clk              : in  std_logic                     := 'X';             -- clk\n\t\t\tcommand_valid          : in  std_logic                     := 'X';             -- valid\n\t\t\tcommand_channel        : in  std_logic_vector(4 downto 0)  := (others => 'X'); -- channel\n\t\t\tcommand_startofpacket  : in  std_logic                     := 'X';             -- startofpacket\n\t\t\tcommand_endofpacket    : in  std_logic                     := 'X';             -- endofpacket\n\t\t\tcommand_ready          : out std_logic;                                        -- ready\n\t\t\treset_sink_reset_n     : in  std_logic                     := 'X';             -- reset_n\n\t\t\tresponse_valid         : out std_logic;                                        -- valid\n\t\t\tresponse_channel       : out std_logic_vector(4 downto 0);                     -- channel\n\t\t\tresponse_data          : out std_logic_vector(11 downto 0);                    -- data\n\t\t\tresponse_startofpacket : out std_logic;                                        -- startofpacket\n\t\t\tresponse_endofpacket   : out std_logic                                         -- endofpacket\n\t\t);\n\tend component myadc;\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc.html",
    "content": "<!DOCTYPE HTML PUBLIC \"-//W3C//DTD HTML 4.0 Transitional//EN\">\n\n<html xmlns=\"http://www.w3.org/1999/xhtml\">\n <head>\n  <title>datasheet for myadc</title>\n  <style type=\"text/css\">\nbody { font-family:arial ;}\na { text-decoration:underline ; color:#003000 ;}\na:hover { text-decoration:underline ; color:0030f0 ;}\ntd { padding : 5px ;}\ntable.topTitle { width:100% ;}\ntable.topTitle td.l { text-align:left ; font-weight: bold ; font-size:30px ;}\ntable.topTitle td.r { text-align:right ; font-weight: bold ; font-size:16px ;}\ntable.blueBar { width : 100% ; border-spacing : 0px ;}\ntable.blueBar td { background:#0036ff ; font-size:12px ; color : white ; text-align : left ; font-weight : bold ;}\ntable.blueBar td.l { text-align : left ;}\ntable.blueBar td.r { text-align : right ;}\ntable.items { width:100% ; border-collapse:collapse ;}\ntable.items td.label { font-weight:bold ; font-size:16px ; vertical-align:top ;}\ntable.items td.mono { font-family:courier ; font-size:12px ; white-space:pre ;}\ndiv.label { font-weight:bold ; font-size:16px ; vertical-align:top ; text-align:center ;}\ntable.grid { border-collapse:collapse ;}\ntable.grid td { border:1px solid #bbb ; font-size:12px ;}\nbody { font-family:arial ;}\ntable.x { font-family:courier ; border-collapse:collapse ; padding:2px ;}\ntable.x td { border:1px solid #bbb ;}\ntd.tableTitle { font-weight:bold ; text-align:center ;}\ntable.grid { border-collapse:collapse ;}\ntable.grid td { border:1px solid #bbb ;}\ntable.grid td.tableTitle { font-weight:bold ; text-align:center ;}\ntable.mmap { border-collapse:collapse ; text-size:11px ; border:1px solid #d8d8d8 ;}\ntable.mmap td { border-color:#d8d8d8 ; border-width:1px ; border-style:solid ;}\ntable.mmap td.empty { border-style:none ; background-color:#f0f0f0 ;}\ntable.mmap td.slavemodule { text-align:left ; font-size:11px ; border-style:solid solid none solid ;}\ntable.mmap td.slavem { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid none solid ;}\ntable.mmap td.slaveb { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}\ntable.mmap td.mastermodule { text-align:center ; font-size:11px ; border-style:solid solid none solid ;}\ntable.mmap td.masterlr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}\ntable.mmap td.masterl { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid solid ;}\ntable.mmap td.masterm { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid none ;}\ntable.mmap td.masterr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid none ;}\ntable.mmap td.addr { font-family:courier ; font-size:9px ; text-align:right ;}\ntable.connectionboxes { border-collapse:separate ; border-spacing:0px ; font-family:arial ;}\ntable.connectionboxes td.from { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}\ntable.connectionboxes td.to { font-size:9px ; font-style:italic ; vertical-align:top ; text-align:right ;}\ntable.connectionboxes td.lefthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:right ;}\ntable.connectionboxes td.righthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}\ntable.connectionboxes td.righthandlabel { font-size:11px ; vertical-align:bottom ; text-align:left ;}\ntable.connectionboxes td.neighbor { padding:3px ; border:1px solid black ; font-size: 11px ; background:#e8e8e8 ; vertical-align:center ; text-align:center ;}\ntable.connectionboxes td.main { padding:8px ; border:1px solid black ; font-size: 14px ; font-weight:bold ; background:#ffffff ; vertical-align:center ; text-align:center ;}\n.parametersbox { border:1px solid #d0d0d0 ; display:inline-block ; max-height:160px ; overflow:auto ; width:360px ; font-size:10px ;}\n.flowbox { display:inline-block ;}\n.parametersbox table { font-size:10px ;}\ntd.parametername { font-style:italic ;}\ntd.parametervalue { font-weight:bold ;}\ndiv.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; border-top:1px solid #707070 ; border-bottom:1px solid #707070 ; padding:20px ; margin:20px ; width:auto ;}</style>\n </head>\n <body>\n  <table class=\"topTitle\">\n   <tr>\n    <td class=\"l\">myadc</td>\n    <td class=\"r\">\n     <br/>\n     <br/>\n    </td>\n   </tr>\n  </table>\n  <table class=\"blueBar\">\n   <tr>\n    <td class=\"l\">2017.10.27.10:04:12</td>\n    <td class=\"r\">Datasheet</td>\n   </tr>\n  </table>\n  <div style=\"width:100% ;  height:10px\"> </div>\n  <div class=\"label\">Overview</div>\n  <div class=\"greydiv\">\n   <div style=\"display:inline-block ; text-align:left\">\n    <table class=\"connectionboxes\">\n     <tr style=\"height:6px\">\n      <td></td>\n     </tr>\n    </table>\n   </div><span style=\"display:inline-block ; width:28px\"> </span>\n   <div style=\"display:inline-block ; text-align:left\"><span>\n     <br/></span>\n   </div>\n  </div>\n  <div style=\"width:100% ;  height:10px\"> </div>\n  <div class=\"label\">Memory Map</div>\n  <table class=\"mmap\">\n   <tr>\n    <td class=\"empty\" rowspan=\"2\"></td>\n   </tr>\n  </table>\n  <a name=\"module_modular_adc_0\"> </a>\n  <div>\n   <hr/>\n   <h2>modular_adc_0</h2>altera_modular_adc v15.0\n   <br/>\n   <br/>\n   <br/>\n   <table class=\"flowbox\">\n    <tr>\n     <td class=\"parametersbox\">\n      <h2>Parameters</h2>\n      <table>\n       <tr>\n        <td class=\"parametername\">CORE_VAR</td>\n        <td class=\"parametervalue\">3</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">ENABLE_DEBUG</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">MONITOR_COUNT_WIDTH</td>\n        <td class=\"parametervalue\">12</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">CLOCK_FREQ</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">FAMILY</td>\n        <td class=\"parametervalue\">MAX10FPGA</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">DEVICE_PART</td>\n        <td class=\"parametervalue\">10M08SAE144C8GES</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">device_partname_fivechar_prefix</td>\n        <td class=\"parametervalue\">10M08</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">device_adc_type</td>\n        <td class=\"parametervalue\">22</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">max_adc_count_on_die</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">adc_count_on_device</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">device_power_supply_type</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">ip_is_for_which_adc</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">is_this_first_or_second_adc</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">analog_input_pin_mask</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">hard_pwd</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">clkdiv</td>\n        <td class=\"parametervalue\">2</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">tsclkdiv</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">tsclksel</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">refsel</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">external_vref</td>\n        <td class=\"parametervalue\">2.5</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">int_vref_vr</td>\n        <td class=\"parametervalue\">3.3</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">int_vref_nonvr</td>\n        <td class=\"parametervalue\">2.5</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">reference_voltage</td>\n        <td class=\"parametervalue\">3.3</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">prescalar</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_tsd</td>\n        <td class=\"parametervalue\">true</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_tsd_max</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">tsd_max</td>\n        <td class=\"parametervalue\">125</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_tsd_min</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">tsd_min</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch0</td>\n        <td class=\"parametervalue\">true</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch0</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch0</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch0</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch0</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch1</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch1</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch1</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch1</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch1</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch2</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch2</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch2</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch2</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch2</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch3</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch3</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch3</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch3</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch3</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch4</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch4</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch4</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch4</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch4</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch5</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch5</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch5</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch5</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch5</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch6</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch6</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch6</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch6</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch6</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch7</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch7</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch7</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch7</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch7</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch8</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">prescaler_ch8</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch8</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch8</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch8</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch8</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch9</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch9</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch9</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch9</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch9</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch10</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch10</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch10</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch10</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch10</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch11</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch11</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch11</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch11</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch11</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch12</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch12</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch12</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch12</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch12</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch13</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch13</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch13</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch13</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch13</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch14</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch14</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch14</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch14</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch14</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch15</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch15</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch15</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch15</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch15</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">use_ch16</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">prescaler_ch16</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmax_ch16</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmax_ch16</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">en_thmin_ch16</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">thmin_ch16</td>\n        <td class=\"parametervalue\">0.0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_length</td>\n        <td class=\"parametervalue\">2</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_1</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_2</td>\n        <td class=\"parametervalue\">17</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_3</td>\n        <td class=\"parametervalue\">17</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_4</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_5</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_6</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_7</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_8</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_9</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_10</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_11</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_12</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_13</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_14</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_15</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_16</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_17</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_18</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_19</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_20</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_21</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_22</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_23</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_24</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_25</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_26</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_27</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_28</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_29</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_30</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_31</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_32</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_33</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_34</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_35</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_36</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_37</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_38</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_39</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_40</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_41</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_42</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_43</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_44</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_45</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_46</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_47</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_48</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_49</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_50</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_51</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_52</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_53</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_54</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_55</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_56</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_57</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_58</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_59</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_60</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_61</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_62</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_63</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">seq_order_slot_64</td>\n        <td class=\"parametervalue\">30</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">AUTO_DEVICE_SPEEDGRADE</td>\n        <td class=\"parametervalue\">8</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">deviceFamily</td>\n        <td class=\"parametervalue\">UNKNOWN</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">generateLegacySim</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n      </table>\n     </td>\n    </tr>\n   </table>&#160;&#160;\n   <table class=\"flowbox\">\n    <tr>\n     <td class=\"parametersbox\">\n      <h2>Software Assignments</h2>\n      <table>\n       <tr>\n        <td class=\"parametername\">CORE_VARIANT</td>\n        <td class=\"parametervalue\">3</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">DUAL_ADC_MODE</td>\n        <td class=\"parametervalue\">false</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">PRESCALER_CH16</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">PRESCALER_CH8</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">REFSEL</td>\n        <td class=\"parametervalue\">Internal VREF</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH0</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH1</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH10</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH11</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH12</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH13</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH14</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH15</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH16</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH2</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH3</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH4</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH5</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH6</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH7</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH8</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_CH9</td>\n        <td class=\"parametervalue\">0</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">USE_TSD</td>\n        <td class=\"parametervalue\">1</td>\n       </tr>\n       <tr>\n        <td class=\"parametername\">VREF</td>\n        <td class=\"parametervalue\">3.3</td>\n       </tr>\n      </table>\n     </td>\n    </tr>\n   </table>\n  </div>\n  <table class=\"blueBar\">\n   <tr>\n    <td class=\"l\">generation took 0.00 seconds</td>\n    <td class=\"r\">rendering took 0.02 seconds</td>\n   </tr>\n  </table>\n </body>\n</html>\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc.ppf",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<pinplan\n variation_name=\"modular_adc_0\"\n megafunction_name=\"ALTERA_MODULAR_ADC\"\n intended_family=\"MAX 10\"\n specifies=\"all_ports\">\n <global>\n  <pin name=\"clock_clk\" direction=\"input\" scope=\"external\" />\n  <pin name=\"reset_sink_reset_n\" direction=\"input\" scope=\"external\" />\n  <pin name=\"adc_pll_clock_clk\" direction=\"input\" scope=\"external\" />\n  <pin name=\"adc_pll_locked_export\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_valid\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_channel[4..0]\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_startofpacket\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_endofpacket\" direction=\"input\" scope=\"external\" />\n  <pin name=\"command_ready\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_valid\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_channel[4..0]\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_data[11..0]\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_startofpacket\" direction=\"output\" scope=\"external\" />\n  <pin name=\"response_endofpacket\" direction=\"output\" scope=\"external\" />\n </global>\n</pinplan>\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc.xml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<deploy\n date=\"2017.10.27.10:04:12\"\n outputDirectory=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/\">\n <perimeter>\n  <parameter\n     name=\"AUTO_GENERATION_ID\"\n     type=\"Integer\"\n     defaultValue=\"0\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_UNIQUE_ID\"\n     type=\"String\"\n     defaultValue=\"\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_DEVICE_FAMILY\"\n     type=\"String\"\n     defaultValue=\"MAX 10\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_DEVICE\"\n     type=\"String\"\n     defaultValue=\"10M08SAE144C8GES\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_DEVICE_SPEEDGRADE\"\n     type=\"String\"\n     defaultValue=\"8\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_ADC_PLL_CLOCK_CLOCK_RATE\"\n     type=\"Long\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_ADC_PLL_CLOCK_CLOCK_DOMAIN\"\n     type=\"Integer\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_ADC_PLL_CLOCK_RESET_DOMAIN\"\n     type=\"Integer\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_CLOCK_CLOCK_RATE\"\n     type=\"Long\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_CLOCK_CLOCK_DOMAIN\"\n     type=\"Integer\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <parameter\n     name=\"AUTO_CLOCK_RESET_DOMAIN\"\n     type=\"Integer\"\n     defaultValue=\"-1\"\n     onHdl=\"0\"\n     affectsHdl=\"1\" />\n  <interface name=\"adc_pll_clock\" kind=\"clock\" start=\"0\">\n   <property name=\"clockRate\" value=\"0\" />\n   <property name=\"externallyDriven\" value=\"false\" />\n   <property name=\"ptfSchematicName\" value=\"\" />\n   <port name=\"adc_pll_clock_clk\" direction=\"input\" role=\"clk\" width=\"1\" />\n  </interface>\n  <interface name=\"adc_pll_locked\" kind=\"conduit\" start=\"0\">\n   <property name=\"associatedClock\" value=\"\" />\n   <property name=\"associatedReset\" value=\"\" />\n   <port\n       name=\"adc_pll_locked_export\"\n       direction=\"input\"\n       role=\"export\"\n       width=\"1\" />\n  </interface>\n  <interface name=\"clock\" kind=\"clock\" start=\"0\">\n   <property name=\"clockRate\" value=\"0\" />\n   <property name=\"externallyDriven\" value=\"false\" />\n   <property name=\"ptfSchematicName\" value=\"\" />\n   <port name=\"clock_clk\" direction=\"input\" role=\"clk\" width=\"1\" />\n  </interface>\n  <interface name=\"command\" kind=\"avalon_streaming\" start=\"0\">\n   <property name=\"associatedClock\" value=\"clock\" />\n   <property name=\"associatedReset\" value=\"reset_sink\" />\n   <property name=\"beatsPerCycle\" value=\"1\" />\n   <property name=\"dataBitsPerSymbol\" value=\"8\" />\n   <property name=\"emptyWithinPacket\" value=\"false\" />\n   <property name=\"errorDescriptor\" value=\"\" />\n   <property name=\"firstSymbolInHighOrderBits\" value=\"true\" />\n   <property name=\"highOrderSymbolAtMSB\" value=\"false\" />\n   <property name=\"maxChannel\" value=\"31\" />\n   <property name=\"packetDescription\" value=\"\" />\n   <property name=\"readyLatency\" value=\"0\" />\n   <property name=\"symbolsPerBeat\" value=\"1\" />\n   <port name=\"command_valid\" direction=\"input\" role=\"valid\" width=\"1\" />\n   <port name=\"command_channel\" direction=\"input\" role=\"channel\" width=\"5\" />\n   <port\n       name=\"command_startofpacket\"\n       direction=\"input\"\n       role=\"startofpacket\"\n       width=\"1\" />\n   <port\n       name=\"command_endofpacket\"\n       direction=\"input\"\n       role=\"endofpacket\"\n       width=\"1\" />\n   <port name=\"command_ready\" direction=\"output\" role=\"ready\" width=\"1\" />\n  </interface>\n  <interface name=\"reset_sink\" kind=\"reset\" start=\"0\">\n   <property name=\"associatedClock\" value=\"clock\" />\n   <property name=\"synchronousEdges\" value=\"DEASSERT\" />\n   <port name=\"reset_sink_reset_n\" direction=\"input\" role=\"reset_n\" width=\"1\" />\n  </interface>\n  <interface name=\"response\" kind=\"avalon_streaming\" start=\"1\">\n   <property name=\"associatedClock\" value=\"clock\" />\n   <property name=\"associatedReset\" value=\"reset_sink\" />\n   <property name=\"beatsPerCycle\" value=\"1\" />\n   <property name=\"dataBitsPerSymbol\" value=\"12\" />\n   <property name=\"emptyWithinPacket\" value=\"false\" />\n   <property name=\"errorDescriptor\" value=\"\" />\n   <property name=\"firstSymbolInHighOrderBits\" value=\"true\" />\n   <property name=\"highOrderSymbolAtMSB\" value=\"false\" />\n   <property name=\"maxChannel\" value=\"31\" />\n   <property name=\"packetDescription\" value=\"\" />\n   <property name=\"readyLatency\" value=\"0\" />\n   <property name=\"symbolsPerBeat\" value=\"1\" />\n   <port name=\"response_valid\" direction=\"output\" role=\"valid\" width=\"1\" />\n   <port name=\"response_channel\" direction=\"output\" role=\"channel\" width=\"5\" />\n   <port name=\"response_data\" direction=\"output\" role=\"data\" width=\"12\" />\n   <port\n       name=\"response_startofpacket\"\n       direction=\"output\"\n       role=\"startofpacket\"\n       width=\"1\" />\n   <port\n       name=\"response_endofpacket\"\n       direction=\"output\"\n       role=\"endofpacket\"\n       width=\"1\" />\n  </interface>\n </perimeter>\n <entity\n   path=\"\"\n   parameterizationKey=\"myadc:1.0:AUTO_ADC_PLL_CLOCK_CLOCK_DOMAIN=-1,AUTO_ADC_PLL_CLOCK_CLOCK_RATE=-1,AUTO_ADC_PLL_CLOCK_RESET_DOMAIN=-1,AUTO_CLOCK_CLOCK_DOMAIN=-1,AUTO_CLOCK_CLOCK_RATE=-1,AUTO_CLOCK_RESET_DOMAIN=-1,AUTO_DEVICE=10M08SAE144C8GES,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=8,AUTO_GENERATION_ID=1509113052,AUTO_UNIQUE_ID=(altera_modular_adc:15.0:AUTO_DEVICE_SPEEDGRADE=8,CLOCK_FREQ=0,CORE_VAR=3,DEVICE_PART=10M08SAE144C8GES,ENABLE_DEBUG=0,FAMILY=MAX 10,MONITOR_COUNT_WIDTH=12,adc_count_on_device=1,analog_input_pin_mask=0,clkdiv=2,device_adc_type=22,device_partname_fivechar_prefix=10M08,device_power_supply_type=1,en_thmax_ch0=false,en_thmax_ch1=false,en_thmax_ch10=false,en_thmax_ch11=false,en_thmax_ch12=false,en_thmax_ch13=false,en_thmax_ch14=false,en_thmax_ch15=false,en_thmax_ch16=false,en_thmax_ch2=false,en_thmax_ch3=false,en_thmax_ch4=false,en_thmax_ch5=false,en_thmax_ch6=false,en_thmax_ch7=false,en_thmax_ch8=false,en_thmax_ch9=false,en_thmin_ch0=false,en_thmin_ch1=false,en_thmin_ch10=false,en_thmin_ch11=false,en_thmin_ch12=false,en_thmin_ch13=false,en_thmin_ch14=false,en_thmin_ch15=false,en_thmin_ch16=false,en_thmin_ch2=false,en_thmin_ch3=false,en_thmin_ch4=false,en_thmin_ch5=false,en_thmin_ch6=false,en_thmin_ch7=false,en_thmin_ch8=false,en_thmin_ch9=false,en_tsd_max=false,en_tsd_min=false,external_vref=2.5,hard_pwd=0,int_vref_nonvr=2.5,int_vref_vr=3.3,ip_is_for_which_adc=1,is_this_first_or_second_adc=1,max_adc_count_on_die=1,prescalar=0,prescaler_ch16=false,prescaler_ch8=false,reference_voltage=3.3,refsel=1,seq_order_length=2,seq_order_slot_1=0,seq_order_slot_10=30,seq_order_slot_11=30,seq_order_slot_12=30,seq_order_slot_13=30,seq_order_slot_14=30,seq_order_slot_15=30,seq_order_slot_16=30,seq_order_slot_17=30,seq_order_slot_18=30,seq_order_slot_19=30,seq_order_slot_2=17,seq_order_slot_20=30,seq_order_slot_21=30,seq_order_slot_22=30,seq_order_slot_23=30,seq_order_slot_24=30,seq_order_slot_25=30,seq_order_slot_26=30,seq_order_slot_27=30,seq_order_slot_28=30,seq_order_slot_29=30,seq_order_slot_3=17,seq_order_slot_30=30,seq_order_slot_31=30,seq_order_slot_32=30,seq_order_slot_33=30,seq_order_slot_34=30,seq_order_slot_35=30,seq_order_slot_36=30,seq_order_slot_37=30,seq_order_slot_38=30,seq_order_slot_39=30,seq_order_slot_4=30,seq_order_slot_40=30,seq_order_slot_41=30,seq_order_slot_42=30,seq_order_slot_43=30,seq_order_slot_44=30,seq_order_slot_45=30,seq_order_slot_46=30,seq_order_slot_47=30,seq_order_slot_48=30,seq_order_slot_49=30,seq_order_slot_5=30,seq_order_slot_50=30,seq_order_slot_51=30,seq_order_slot_52=30,seq_order_slot_53=30,seq_order_slot_54=30,seq_order_slot_55=30,seq_order_slot_56=30,seq_order_slot_57=30,seq_order_slot_58=30,seq_order_slot_59=30,seq_order_slot_6=30,seq_order_slot_60=30,seq_order_slot_61=30,seq_order_slot_62=30,seq_order_slot_63=30,seq_order_slot_64=30,seq_order_slot_7=30,seq_order_slot_8=30,seq_order_slot_9=30,thmax_ch0=0.0,thmax_ch1=0.0,thmax_ch10=0.0,thmax_ch11=0.0,thmax_ch12=0.0,thmax_ch13=0.0,thmax_ch14=0.0,thmax_ch15=0.0,thmax_ch16=0.0,thmax_ch2=0.0,thmax_ch3=0.0,thmax_ch4=0.0,thmax_ch5=0.0,thmax_ch6=0.0,thmax_ch7=0.0,thmax_ch8=0.0,thmax_ch9=0.0,thmin_ch0=0.0,thmin_ch1=0.0,thmin_ch10=0.0,thmin_ch11=0.0,thmin_ch12=0.0,thmin_ch13=0.0,thmin_ch14=0.0,thmin_ch15=0.0,thmin_ch16=0.0,thmin_ch2=0.0,thmin_ch3=0.0,thmin_ch4=0.0,thmin_ch5=0.0,thmin_ch6=0.0,thmin_ch7=0.0,thmin_ch8=0.0,thmin_ch9=0.0,tsclkdiv=1,tsclksel=1,tsd_max=125,tsd_min=0,use_ch0=true,use_ch1=false,use_ch10=false,use_ch11=false,use_ch12=false,use_ch13=false,use_ch14=false,use_ch15=false,use_ch16=false,use_ch2=false,use_ch3=false,use_ch4=false,use_ch5=false,use_ch6=false,use_ch7=false,use_ch8=false,use_ch9=false,use_tsd=true(altera_clock_bridge:15.0:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=0,NUM_CLOCK_OUTPUTS=1)(altera_reset_bridge:15.0:ACTIVE_LOW_RESET=1,AUTO_CLK_CLOCK_RATE=0,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(altera_modular_adc_control:15.0:analog_input_pin_mask=65536,clkdiv=2,device_partname_fivechar_prefix=10M08,dual_adc_mode=false,hard_pwd=0,is_this_first_or_second_adc=1,prescalar=0,refsel=1,tsclkdiv=1,tsclksel=1)(clock:15.0:)(clock:15.0:)(reset:15.0:))\"\n   instancePathKey=\"myadc\"\n   kind=\"myadc\"\n   version=\"1.0\"\n   name=\"myadc\">\n  <parameter name=\"AUTO_ADC_PLL_CLOCK_CLOCK_DOMAIN\" value=\"-1\" />\n  <parameter name=\"AUTO_CLOCK_CLOCK_RATE\" value=\"-1\" />\n  <parameter name=\"AUTO_CLOCK_CLOCK_DOMAIN\" value=\"-1\" />\n  <parameter name=\"AUTO_CLOCK_RESET_DOMAIN\" value=\"-1\" />\n  <parameter name=\"AUTO_GENERATION_ID\" value=\"1509113052\" />\n  <parameter name=\"AUTO_DEVICE\" value=\"10M08SAE144C8GES\" />\n  <parameter name=\"AUTO_DEVICE_FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"AUTO_ADC_PLL_CLOCK_RESET_DOMAIN\" value=\"-1\" />\n  <parameter name=\"AUTO_ADC_PLL_CLOCK_CLOCK_RATE\" value=\"-1\" />\n  <parameter name=\"AUTO_UNIQUE_ID\" value=\"\" />\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\" value=\"8\" />\n  <generatedFiles>\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/myadc.v\"\n       type=\"VERILOG\" />\n  </generatedFiles>\n  <childGeneratedFiles>\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/myadc_modular_adc_0.v\"\n       type=\"VERILOG\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control.v\"\n       type=\"VERILOG\"\n       attributes=\"TOP_LEVEL_FILE\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control_avrg_fifo.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control_fsm.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/chsel_code_converter_sw_to_hw.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/fiftyfivenm_adcblock_top_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control.sdc\"\n       type=\"SDC\"\n       attributes=\"\" />\n  </childGeneratedFiles>\n  <sourceFiles>\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc.qsys\" />\n  </sourceFiles>\n  <childSourceFiles>\n   <file\n       path=\"C:/altera/15.0/ip/altera/altera_modular_adc/top/altera_modular_adc_hw.tcl\" />\n   <file\n       path=\"C:/altera/15.0/ip/altera/altera_modular_adc/control/altera_modular_adc_control_hw.tcl\" />\n  </childSourceFiles>\n  <messages>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:myadc \"myadc\"</message>\n   <message level=\"Progress\" culprit=\"min\"></message>\n   <message level=\"Progress\" culprit=\"max\"></message>\n   <message level=\"Progress\" culprit=\"current\"></message>\n   <message level=\"Debug\">Transform: CustomInstructionTransform</message>\n   <message level=\"Debug\">No custom instruction connections, skipping transform </message>\n   <message level=\"Debug\" culprit=\"merlin_custom_instruction_transform\"><![CDATA[After transform: <b>1</b> modules, <b>0</b> connections]]></message>\n   <message level=\"Debug\">Transform: MMTransform</message>\n   <message level=\"Debug\">Transform: InterruptMapperTransform</message>\n   <message level=\"Debug\">Transform: InterruptSyncTransform</message>\n   <message level=\"Debug\">Transform: InterruptFanoutTransform</message>\n   <message level=\"Debug\">Transform: AvalonStreamingTransform</message>\n   <message level=\"Debug\">Transform: ResetAdaptation</message>\n   <message level=\"Debug\" culprit=\"myadc\"><![CDATA[\"<b>myadc</b>\" reuses <b>altera_modular_adc</b> \"<b>submodules/myadc_modular_adc_0</b>\"]]></message>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc \"submodules/myadc_modular_adc_0\"</message>\n   <message level=\"Progress\" culprit=\"min\"></message>\n   <message level=\"Progress\" culprit=\"max\"></message>\n   <message level=\"Progress\" culprit=\"current\"></message>\n   <message level=\"Debug\">Transform: CustomInstructionTransform</message>\n   <message level=\"Debug\">No custom instruction connections, skipping transform </message>\n   <message level=\"Debug\" culprit=\"merlin_custom_instruction_transform\"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>\n   <message level=\"Debug\">Transform: MMTransform</message>\n   <message level=\"Debug\">Transform: InterruptMapperTransform</message>\n   <message level=\"Debug\">Transform: InterruptSyncTransform</message>\n   <message level=\"Debug\">Transform: InterruptFanoutTransform</message>\n   <message level=\"Debug\">Transform: AvalonStreamingTransform</message>\n   <message level=\"Debug\">Transform: ResetAdaptation</message>\n   <message level=\"Debug\" culprit=\"modular_adc_0\"><![CDATA[\"<b>modular_adc_0</b>\" reuses <b>altera_modular_adc_control</b> \"<b>submodules/altera_modular_adc_control</b>\"]]></message>\n   <message level=\"Info\" culprit=\"modular_adc_0\"><![CDATA[\"<b>myadc</b>\" instantiated <b>altera_modular_adc</b> \"<b>modular_adc_0</b>\"]]></message>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc_control \"submodules/altera_modular_adc_control\"</message>\n   <message level=\"Info\" culprit=\"control_internal\"><![CDATA[\"<b>modular_adc_0</b>\" instantiated <b>altera_modular_adc_control</b> \"<b>control_internal</b>\"]]></message>\n  </messages>\n </entity>\n <entity\n   path=\"submodules/\"\n   parameterizationKey=\"altera_modular_adc:15.0:AUTO_DEVICE_SPEEDGRADE=8,CLOCK_FREQ=0,CORE_VAR=3,DEVICE_PART=10M08SAE144C8GES,ENABLE_DEBUG=0,FAMILY=MAX 10,MONITOR_COUNT_WIDTH=12,adc_count_on_device=1,analog_input_pin_mask=0,clkdiv=2,device_adc_type=22,device_partname_fivechar_prefix=10M08,device_power_supply_type=1,en_thmax_ch0=false,en_thmax_ch1=false,en_thmax_ch10=false,en_thmax_ch11=false,en_thmax_ch12=false,en_thmax_ch13=false,en_thmax_ch14=false,en_thmax_ch15=false,en_thmax_ch16=false,en_thmax_ch2=false,en_thmax_ch3=false,en_thmax_ch4=false,en_thmax_ch5=false,en_thmax_ch6=false,en_thmax_ch7=false,en_thmax_ch8=false,en_thmax_ch9=false,en_thmin_ch0=false,en_thmin_ch1=false,en_thmin_ch10=false,en_thmin_ch11=false,en_thmin_ch12=false,en_thmin_ch13=false,en_thmin_ch14=false,en_thmin_ch15=false,en_thmin_ch16=false,en_thmin_ch2=false,en_thmin_ch3=false,en_thmin_ch4=false,en_thmin_ch5=false,en_thmin_ch6=false,en_thmin_ch7=false,en_thmin_ch8=false,en_thmin_ch9=false,en_tsd_max=false,en_tsd_min=false,external_vref=2.5,hard_pwd=0,int_vref_nonvr=2.5,int_vref_vr=3.3,ip_is_for_which_adc=1,is_this_first_or_second_adc=1,max_adc_count_on_die=1,prescalar=0,prescaler_ch16=false,prescaler_ch8=false,reference_voltage=3.3,refsel=1,seq_order_length=2,seq_order_slot_1=0,seq_order_slot_10=30,seq_order_slot_11=30,seq_order_slot_12=30,seq_order_slot_13=30,seq_order_slot_14=30,seq_order_slot_15=30,seq_order_slot_16=30,seq_order_slot_17=30,seq_order_slot_18=30,seq_order_slot_19=30,seq_order_slot_2=17,seq_order_slot_20=30,seq_order_slot_21=30,seq_order_slot_22=30,seq_order_slot_23=30,seq_order_slot_24=30,seq_order_slot_25=30,seq_order_slot_26=30,seq_order_slot_27=30,seq_order_slot_28=30,seq_order_slot_29=30,seq_order_slot_3=17,seq_order_slot_30=30,seq_order_slot_31=30,seq_order_slot_32=30,seq_order_slot_33=30,seq_order_slot_34=30,seq_order_slot_35=30,seq_order_slot_36=30,seq_order_slot_37=30,seq_order_slot_38=30,seq_order_slot_39=30,seq_order_slot_4=30,seq_order_slot_40=30,seq_order_slot_41=30,seq_order_slot_42=30,seq_order_slot_43=30,seq_order_slot_44=30,seq_order_slot_45=30,seq_order_slot_46=30,seq_order_slot_47=30,seq_order_slot_48=30,seq_order_slot_49=30,seq_order_slot_5=30,seq_order_slot_50=30,seq_order_slot_51=30,seq_order_slot_52=30,seq_order_slot_53=30,seq_order_slot_54=30,seq_order_slot_55=30,seq_order_slot_56=30,seq_order_slot_57=30,seq_order_slot_58=30,seq_order_slot_59=30,seq_order_slot_6=30,seq_order_slot_60=30,seq_order_slot_61=30,seq_order_slot_62=30,seq_order_slot_63=30,seq_order_slot_64=30,seq_order_slot_7=30,seq_order_slot_8=30,seq_order_slot_9=30,thmax_ch0=0.0,thmax_ch1=0.0,thmax_ch10=0.0,thmax_ch11=0.0,thmax_ch12=0.0,thmax_ch13=0.0,thmax_ch14=0.0,thmax_ch15=0.0,thmax_ch16=0.0,thmax_ch2=0.0,thmax_ch3=0.0,thmax_ch4=0.0,thmax_ch5=0.0,thmax_ch6=0.0,thmax_ch7=0.0,thmax_ch8=0.0,thmax_ch9=0.0,thmin_ch0=0.0,thmin_ch1=0.0,thmin_ch10=0.0,thmin_ch11=0.0,thmin_ch12=0.0,thmin_ch13=0.0,thmin_ch14=0.0,thmin_ch15=0.0,thmin_ch16=0.0,thmin_ch2=0.0,thmin_ch3=0.0,thmin_ch4=0.0,thmin_ch5=0.0,thmin_ch6=0.0,thmin_ch7=0.0,thmin_ch8=0.0,thmin_ch9=0.0,tsclkdiv=1,tsclksel=1,tsd_max=125,tsd_min=0,use_ch0=true,use_ch1=false,use_ch10=false,use_ch11=false,use_ch12=false,use_ch13=false,use_ch14=false,use_ch15=false,use_ch16=false,use_ch2=false,use_ch3=false,use_ch4=false,use_ch5=false,use_ch6=false,use_ch7=false,use_ch8=false,use_ch9=false,use_tsd=true(altera_clock_bridge:15.0:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=0,NUM_CLOCK_OUTPUTS=1)(altera_reset_bridge:15.0:ACTIVE_LOW_RESET=1,AUTO_CLK_CLOCK_RATE=0,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(altera_modular_adc_control:15.0:analog_input_pin_mask=65536,clkdiv=2,device_partname_fivechar_prefix=10M08,dual_adc_mode=false,hard_pwd=0,is_this_first_or_second_adc=1,prescalar=0,refsel=1,tsclkdiv=1,tsclksel=1)(clock:15.0:)(clock:15.0:)(reset:15.0:)\"\n   instancePathKey=\"myadc:.:modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"15.0\"\n   name=\"myadc_modular_adc_0\">\n  <parameter name=\"seq_order_slot_23\" value=\"30\" />\n  <parameter name=\"seq_order_slot_22\" value=\"30\" />\n  <parameter name=\"seq_order_slot_25\" value=\"30\" />\n  <parameter name=\"seq_order_slot_24\" value=\"30\" />\n  <parameter name=\"hard_pwd\" value=\"0\" />\n  <parameter name=\"thmin_ch10\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_27\" value=\"30\" />\n  <parameter name=\"seq_order_slot_26\" value=\"30\" />\n  <parameter name=\"device_power_supply_type\" value=\"1\" />\n  <parameter name=\"thmin_ch12\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_29\" value=\"30\" />\n  <parameter name=\"thmin_ch11\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_28\" value=\"30\" />\n  <parameter name=\"thmin_ch14\" value=\"0.0\" />\n  <parameter name=\"thmin_ch13\" value=\"0.0\" />\n  <parameter name=\"thmin_ch16\" value=\"0.0\" />\n  <parameter name=\"thmin_ch15\" value=\"0.0\" />\n  <parameter name=\"reference_voltage\" value=\"3.3\" />\n  <parameter name=\"use_ch14\" value=\"false\" />\n  <parameter name=\"ip_is_for_which_adc\" value=\"1\" />\n  <parameter name=\"use_ch15\" value=\"false\" />\n  <parameter name=\"use_ch16\" value=\"false\" />\n  <parameter name=\"seq_order_slot_21\" value=\"30\" />\n  <parameter name=\"seq_order_slot_20\" value=\"30\" />\n  <parameter name=\"seq_order_slot_34\" value=\"30\" />\n  <parameter name=\"seq_order_slot_33\" value=\"30\" />\n  <parameter name=\"DEVICE_PART\" value=\"10M08SAE144C8GES\" />\n  <parameter name=\"seq_order_slot_36\" value=\"30\" />\n  <parameter name=\"seq_order_slot_35\" value=\"30\" />\n  <parameter name=\"adc_count_on_device\" value=\"1\" />\n  <parameter name=\"seq_order_slot_38\" value=\"30\" />\n  <parameter name=\"seq_order_slot_37\" value=\"30\" />\n  <parameter name=\"seq_order_slot_39\" value=\"30\" />\n  <parameter name=\"seq_order_length\" value=\"2\" />\n  <parameter name=\"max_adc_count_on_die\" value=\"1\" />\n  <parameter name=\"clkdiv\" value=\"2\" />\n  <parameter name=\"seq_order_slot_30\" value=\"30\" />\n  <parameter name=\"seq_order_slot_32\" value=\"30\" />\n  <parameter name=\"use_tsd\" value=\"true\" />\n  <parameter name=\"seq_order_slot_31\" value=\"30\" />\n  <parameter name=\"en_thmax_ch13\" value=\"false\" />\n  <parameter name=\"en_thmax_ch14\" value=\"false\" />\n  <parameter name=\"en_thmax_ch15\" value=\"false\" />\n  <parameter name=\"en_thmax_ch16\" value=\"false\" />\n  <parameter name=\"en_thmax_ch10\" value=\"false\" />\n  <parameter name=\"en_thmax_ch11\" value=\"false\" />\n  <parameter name=\"FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"en_thmax_ch12\" value=\"false\" />\n  <parameter name=\"en_thmax_ch7\" value=\"false\" />\n  <parameter name=\"seq_order_slot_4\" value=\"30\" />\n  <parameter name=\"seq_order_slot_12\" value=\"30\" />\n  <parameter name=\"en_thmax_ch6\" value=\"false\" />\n  <parameter name=\"seq_order_slot_5\" value=\"30\" />\n  <parameter name=\"seq_order_slot_11\" value=\"30\" />\n  <parameter name=\"en_thmax_ch9\" value=\"false\" />\n  <parameter name=\"seq_order_slot_6\" value=\"30\" />\n  <parameter name=\"seq_order_slot_14\" value=\"30\" />\n  <parameter name=\"en_thmax_ch8\" value=\"false\" />\n  <parameter name=\"seq_order_slot_7\" value=\"30\" />\n  <parameter name=\"seq_order_slot_13\" value=\"30\" />\n  <parameter name=\"en_thmax_ch3\" value=\"false\" />\n  <parameter name=\"seq_order_slot_16\" value=\"30\" />\n  <parameter name=\"en_thmax_ch2\" value=\"false\" />\n  <parameter name=\"seq_order_slot_1\" value=\"0\" />\n  <parameter name=\"seq_order_slot_15\" value=\"30\" />\n  <parameter name=\"en_thmax_ch5\" value=\"false\" />\n  <parameter name=\"seq_order_slot_2\" value=\"17\" />\n  <parameter name=\"seq_order_slot_18\" value=\"30\" />\n  <parameter name=\"en_thmax_ch4\" value=\"false\" />\n  <parameter name=\"seq_order_slot_3\" value=\"17\" />\n  <parameter name=\"seq_order_slot_17\" value=\"30\" />\n  <parameter name=\"seq_order_slot_19\" value=\"30\" />\n  <parameter name=\"en_thmax_ch1\" value=\"false\" />\n  <parameter name=\"en_thmax_ch0\" value=\"false\" />\n  <parameter name=\"seq_order_slot_8\" value=\"30\" />\n  <parameter name=\"en_tsd_min\" value=\"false\" />\n  <parameter name=\"seq_order_slot_9\" value=\"30\" />\n  <parameter name=\"en_thmin_ch3\" value=\"false\" />\n  <parameter name=\"prescaler_ch16\" value=\"false\" />\n  <parameter name=\"en_thmin_ch2\" value=\"false\" />\n  <parameter name=\"en_thmin_ch1\" value=\"false\" />\n  <parameter name=\"en_thmin_ch0\" value=\"false\" />\n  <parameter name=\"en_thmin_ch9\" value=\"false\" />\n  <parameter name=\"en_tsd_max\" value=\"false\" />\n  <parameter name=\"en_thmin_ch8\" value=\"false\" />\n  <parameter name=\"en_thmin_ch7\" value=\"false\" />\n  <parameter name=\"en_thmin_ch6\" value=\"false\" />\n  <parameter name=\"en_thmin_ch5\" value=\"false\" />\n  <parameter name=\"seq_order_slot_10\" value=\"30\" />\n  <parameter name=\"en_thmin_ch4\" value=\"false\" />\n  <parameter name=\"use_ch0\" value=\"true\" />\n  <parameter name=\"device_partname_fivechar_prefix\" value=\"10M08\" />\n  <parameter name=\"use_ch3\" value=\"false\" />\n  <parameter name=\"use_ch4\" value=\"false\" />\n  <parameter name=\"CORE_VAR\" value=\"3\" />\n  <parameter name=\"use_ch1\" value=\"false\" />\n  <parameter name=\"en_thmin_ch15\" value=\"false\" />\n  <parameter name=\"use_ch2\" value=\"false\" />\n  <parameter name=\"en_thmin_ch16\" value=\"false\" />\n  <parameter name=\"use_ch7\" value=\"false\" />\n  <parameter name=\"use_ch8\" value=\"false\" />\n  <parameter name=\"use_ch5\" value=\"false\" />\n  <parameter name=\"use_ch6\" value=\"false\" />\n  <parameter name=\"MONITOR_COUNT_WIDTH\" value=\"12\" />\n  <parameter name=\"use_ch9\" value=\"false\" />\n  <parameter name=\"external_vref\" value=\"2.5\" />\n  <parameter name=\"seq_order_slot_61\" value=\"30\" />\n  <parameter name=\"seq_order_slot_60\" value=\"30\" />\n  <parameter name=\"seq_order_slot_63\" value=\"30\" />\n  <parameter name=\"seq_order_slot_62\" value=\"30\" />\n  <parameter name=\"seq_order_slot_64\" value=\"30\" />\n  <parameter name=\"refsel\" value=\"1\" />\n  <parameter name=\"prescaler_ch8\" value=\"false\" />\n  <parameter name=\"prescalar\" value=\"0\" />\n  <parameter name=\"device_adc_type\" value=\"22\" />\n  <parameter name=\"CLOCK_FREQ\" value=\"0\" />\n  <parameter name=\"en_thmin_ch13\" value=\"false\" />\n  <parameter name=\"en_thmin_ch14\" value=\"false\" />\n  <parameter name=\"en_thmin_ch11\" value=\"false\" />\n  <parameter name=\"en_thmin_ch12\" value=\"false\" />\n  <parameter name=\"en_thmin_ch10\" value=\"false\" />\n  <parameter name=\"tsclksel\" value=\"1\" />\n  <parameter name=\"is_this_first_or_second_adc\" value=\"1\" />\n  <parameter name=\"seq_order_slot_45\" value=\"30\" />\n  <parameter name=\"seq_order_slot_44\" value=\"30\" />\n  <parameter name=\"seq_order_slot_47\" value=\"30\" />\n  <parameter name=\"seq_order_slot_46\" value=\"30\" />\n  <parameter name=\"seq_order_slot_49\" value=\"30\" />\n  <parameter name=\"seq_order_slot_48\" value=\"30\" />\n  <parameter name=\"ENABLE_DEBUG\" value=\"0\" />\n  <parameter name=\"thmax_ch1\" value=\"0.0\" />\n  <parameter name=\"thmax_ch0\" value=\"0.0\" />\n  <parameter name=\"thmax_ch3\" value=\"0.0\" />\n  <parameter name=\"thmax_ch2\" value=\"0.0\" />\n  <parameter name=\"int_vref_nonvr\" value=\"2.5\" />\n  <parameter name=\"tsd_max\" value=\"125\" />\n  <parameter name=\"int_vref_vr\" value=\"3.3\" />\n  <parameter name=\"seq_order_slot_41\" value=\"30\" />\n  <parameter name=\"seq_order_slot_40\" value=\"30\" />\n  <parameter name=\"seq_order_slot_43\" value=\"30\" />\n  <parameter name=\"seq_order_slot_42\" value=\"30\" />\n  <parameter name=\"thmin_ch1\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_56\" value=\"30\" />\n  <parameter name=\"thmin_ch0\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_55\" value=\"30\" />\n  <parameter name=\"seq_order_slot_58\" value=\"30\" />\n  <parameter name=\"seq_order_slot_57\" value=\"30\" />\n  <parameter name=\"thmin_ch5\" value=\"0.0\" />\n  <parameter name=\"use_ch10\" value=\"false\" />\n  <parameter name=\"thmin_ch4\" value=\"0.0\" />\n  <parameter name=\"use_ch11\" value=\"false\" />\n  <parameter name=\"seq_order_slot_59\" value=\"30\" />\n  <parameter name=\"tsclkdiv\" value=\"1\" />\n  <parameter name=\"tsd_min\" value=\"0\" />\n  <parameter name=\"thmin_ch3\" value=\"0.0\" />\n  <parameter name=\"use_ch12\" value=\"false\" />\n  <parameter name=\"thmax_ch16\" value=\"0.0\" />\n  <parameter name=\"thmin_ch2\" value=\"0.0\" />\n  <parameter name=\"use_ch13\" value=\"false\" />\n  <parameter name=\"thmax_ch15\" value=\"0.0\" />\n  <parameter name=\"thmax_ch14\" value=\"0.0\" />\n  <parameter name=\"thmax_ch13\" value=\"0.0\" />\n  <parameter name=\"thmax_ch12\" value=\"0.0\" />\n  <parameter name=\"thmax_ch11\" value=\"0.0\" />\n  <parameter name=\"thmax_ch10\" value=\"0.0\" />\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\" value=\"8\" />\n  <parameter name=\"thmax_ch5\" value=\"0.0\" />\n  <parameter name=\"thmax_ch4\" value=\"0.0\" />\n  <parameter name=\"thmax_ch7\" value=\"0.0\" />\n  <parameter name=\"thmax_ch6\" value=\"0.0\" />\n  <parameter name=\"thmax_ch9\" value=\"0.0\" />\n  <parameter name=\"thmax_ch8\" value=\"0.0\" />\n  <parameter name=\"thmin_ch9\" value=\"0.0\" />\n  <parameter name=\"thmin_ch8\" value=\"0.0\" />\n  <parameter name=\"thmin_ch7\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_50\" value=\"30\" />\n  <parameter name=\"analog_input_pin_mask\" value=\"0\" />\n  <parameter name=\"thmin_ch6\" value=\"0.0\" />\n  <parameter name=\"seq_order_slot_52\" value=\"30\" />\n  <parameter name=\"seq_order_slot_51\" value=\"30\" />\n  <parameter name=\"seq_order_slot_54\" value=\"30\" />\n  <parameter name=\"seq_order_slot_53\" value=\"30\" />\n  <generatedFiles>\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/myadc_modular_adc_0.v\"\n       type=\"VERILOG\" />\n  </generatedFiles>\n  <childGeneratedFiles>\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control.v\"\n       type=\"VERILOG\"\n       attributes=\"TOP_LEVEL_FILE\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control_avrg_fifo.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control_fsm.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/chsel_code_converter_sw_to_hw.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/fiftyfivenm_adcblock_top_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control.sdc\"\n       type=\"SDC\"\n       attributes=\"\" />\n  </childGeneratedFiles>\n  <sourceFiles>\n   <file\n       path=\"C:/altera/15.0/ip/altera/altera_modular_adc/top/altera_modular_adc_hw.tcl\" />\n  </sourceFiles>\n  <childSourceFiles>\n   <file\n       path=\"C:/altera/15.0/ip/altera/altera_modular_adc/control/altera_modular_adc_control_hw.tcl\" />\n  </childSourceFiles>\n  <instantiator instantiator=\"myadc\" as=\"modular_adc_0\" />\n  <messages>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc \"submodules/myadc_modular_adc_0\"</message>\n   <message level=\"Progress\" culprit=\"min\"></message>\n   <message level=\"Progress\" culprit=\"max\"></message>\n   <message level=\"Progress\" culprit=\"current\"></message>\n   <message level=\"Debug\">Transform: CustomInstructionTransform</message>\n   <message level=\"Debug\">No custom instruction connections, skipping transform </message>\n   <message level=\"Debug\" culprit=\"merlin_custom_instruction_transform\"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>\n   <message level=\"Debug\">Transform: MMTransform</message>\n   <message level=\"Debug\">Transform: InterruptMapperTransform</message>\n   <message level=\"Debug\">Transform: InterruptSyncTransform</message>\n   <message level=\"Debug\">Transform: InterruptFanoutTransform</message>\n   <message level=\"Debug\">Transform: AvalonStreamingTransform</message>\n   <message level=\"Debug\">Transform: ResetAdaptation</message>\n   <message level=\"Debug\" culprit=\"modular_adc_0\"><![CDATA[\"<b>modular_adc_0</b>\" reuses <b>altera_modular_adc_control</b> \"<b>submodules/altera_modular_adc_control</b>\"]]></message>\n   <message level=\"Info\" culprit=\"modular_adc_0\"><![CDATA[\"<b>myadc</b>\" instantiated <b>altera_modular_adc</b> \"<b>modular_adc_0</b>\"]]></message>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc_control \"submodules/altera_modular_adc_control\"</message>\n   <message level=\"Info\" culprit=\"control_internal\"><![CDATA[\"<b>modular_adc_0</b>\" instantiated <b>altera_modular_adc_control</b> \"<b>control_internal</b>\"]]></message>\n  </messages>\n </entity>\n <entity\n   path=\"submodules/\"\n   parameterizationKey=\"altera_modular_adc_control:15.0:analog_input_pin_mask=65536,clkdiv=2,device_partname_fivechar_prefix=10M08,dual_adc_mode=false,hard_pwd=0,is_this_first_or_second_adc=1,prescalar=0,refsel=1,tsclkdiv=1,tsclksel=1\"\n   instancePathKey=\"myadc:.:modular_adc_0:.:control_internal\"\n   kind=\"altera_modular_adc_control\"\n   version=\"15.0\"\n   name=\"altera_modular_adc_control\">\n  <parameter name=\"refsel\" value=\"1\" />\n  <parameter name=\"is_this_first_or_second_adc\" value=\"1\" />\n  <parameter name=\"device_partname_fivechar_prefix\" value=\"10M08\" />\n  <parameter name=\"dual_adc_mode\" value=\"false\" />\n  <parameter name=\"hard_pwd\" value=\"0\" />\n  <parameter name=\"prescalar\" value=\"0\" />\n  <parameter name=\"tsclkdiv\" value=\"1\" />\n  <parameter name=\"analog_input_pin_mask\" value=\"65536\" />\n  <parameter name=\"clkdiv\" value=\"2\" />\n  <parameter name=\"tsclksel\" value=\"1\" />\n  <generatedFiles>\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control.v\"\n       type=\"VERILOG\"\n       attributes=\"TOP_LEVEL_FILE\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control_avrg_fifo.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control_fsm.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/chsel_code_converter_sw_to_hw.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/fiftyfivenm_adcblock_top_wrapper.v\"\n       type=\"VERILOG\"\n       attributes=\"\" />\n   <file\n       path=\"C:/Users/ahaas/Dropbox/documents/FPGA/QuartusII/serial_vga_pong_max10_adc_tdc/myadc/synthesis/submodules/altera_modular_adc_control.sdc\"\n       type=\"SDC\"\n       attributes=\"\" />\n  </generatedFiles>\n  <childGeneratedFiles/>\n  <sourceFiles>\n   <file\n       path=\"C:/altera/15.0/ip/altera/altera_modular_adc/control/altera_modular_adc_control_hw.tcl\" />\n  </sourceFiles>\n  <childSourceFiles/>\n  <instantiator instantiator=\"myadc_modular_adc_0\" as=\"control_internal\" />\n  <messages>\n   <message level=\"Debug\" culprit=\"myadc\">queue size: 0 starting:altera_modular_adc_control \"submodules/altera_modular_adc_control\"</message>\n   <message level=\"Info\" culprit=\"control_internal\"><![CDATA[\"<b>modular_adc_0</b>\" instantiated <b>altera_modular_adc_control</b> \"<b>control_internal</b>\"]]></message>\n  </messages>\n </entity>\n</deploy>\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc_bb.v",
    "content": "\nmodule myadc (\n\tadc_pll_clock_clk,\n\tadc_pll_locked_export,\n\tclock_clk,\n\tcommand_valid,\n\tcommand_channel,\n\tcommand_startofpacket,\n\tcommand_endofpacket,\n\tcommand_ready,\n\treset_sink_reset_n,\n\tresponse_valid,\n\tresponse_channel,\n\tresponse_data,\n\tresponse_startofpacket,\n\tresponse_endofpacket);\t\n\n\tinput\t\tadc_pll_clock_clk;\n\tinput\t\tadc_pll_locked_export;\n\tinput\t\tclock_clk;\n\tinput\t\tcommand_valid;\n\tinput\t[4:0]\tcommand_channel;\n\tinput\t\tcommand_startofpacket;\n\tinput\t\tcommand_endofpacket;\n\toutput\t\tcommand_ready;\n\tinput\t\treset_sink_reset_n;\n\toutput\t\tresponse_valid;\n\toutput\t[4:0]\tresponse_channel;\n\toutput\t[11:0]\tresponse_data;\n\toutput\t\tresponse_startofpacket;\n\toutput\t\tresponse_endofpacket;\nendmodule\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc_generation.rpt",
    "content": "Info: Starting: Create block symbol file (.bsf)\nInfo: qsys-generate C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc.qsys --block-symbol-file --output-directory=C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading serial_vga_pong_max10_adc_tdc/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 15.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: ip-generate succeeded.\nInfo: Finished: Create block symbol file (.bsf)\nInfo: \nInfo: Starting: Create HDL design files for synthesis\nInfo: qsys-generate C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc.qsys --synthesis=VERILOG --output-directory=C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc\\synthesis --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading serial_vga_pong_max10_adc_tdc/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 15.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: myadc: Generating myadc \"myadc\" for QUARTUS_SYNTH\nInfo: modular_adc_0: \"myadc\" instantiated altera_modular_adc \"modular_adc_0\"\nInfo: control_internal: \"modular_adc_0\" instantiated altera_modular_adc_control \"control_internal\"\nInfo: myadc: Done \"myadc\" with 3 modules, 9 files\nInfo: ip-generate succeeded.\nInfo: Finished: Create HDL design files for synthesis\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc_generation_previous.rpt",
    "content": "Info: Starting: Create block symbol file (.bsf)\nInfo: qsys-generate C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc.qsys --block-symbol-file --output-directory=C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading serial_vga_pong_max10_adc_tdc/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 15.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: ip-generate succeeded.\nInfo: Finished: Create block symbol file (.bsf)\nInfo: \nInfo: Starting: Create HDL design files for synthesis\nInfo: qsys-generate C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc.qsys --synthesis=VERILOG --output-directory=C:\\Users\\ahaas\\Dropbox\\documents\\FPGA\\QuartusII\\serial_vga_pong_max10_adc_tdc\\myadc\\synthesis --family=\"MAX 10\" --part=10M08SAE144C8GES\nProgress: Loading serial_vga_pong_max10_adc_tdc/myadc.qsys\nProgress: Reading input file\nProgress: Adding modular_adc_0 [altera_modular_adc 15.0]\nProgress: Parameterizing module modular_adc_0\nProgress: Building connections\nProgress: Parameterizing connections\nProgress: Validating\nProgress: Done reading input file\nInfo: myadc: Generating myadc \"myadc\" for QUARTUS_SYNTH\nInfo: modular_adc_0: \"myadc\" instantiated altera_modular_adc \"modular_adc_0\"\nInfo: control_internal: \"modular_adc_0\" instantiated altera_modular_adc_control \"control_internal\"\nInfo: myadc: Done \"myadc\" with 3 modules, 9 files\nInfo: ip-generate succeeded.\nInfo: Finished: Create HDL design files for synthesis\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc_inst.v",
    "content": "\tmyadc u0 (\n\t\t.adc_pll_clock_clk      (<connected-to-adc_pll_clock_clk>),      //  adc_pll_clock.clk\n\t\t.adc_pll_locked_export  (<connected-to-adc_pll_locked_export>),  // adc_pll_locked.export\n\t\t.clock_clk              (<connected-to-clock_clk>),              //          clock.clk\n\t\t.command_valid          (<connected-to-command_valid>),          //        command.valid\n\t\t.command_channel        (<connected-to-command_channel>),        //               .channel\n\t\t.command_startofpacket  (<connected-to-command_startofpacket>),  //               .startofpacket\n\t\t.command_endofpacket    (<connected-to-command_endofpacket>),    //               .endofpacket\n\t\t.command_ready          (<connected-to-command_ready>),          //               .ready\n\t\t.reset_sink_reset_n     (<connected-to-reset_sink_reset_n>),     //     reset_sink.reset_n\n\t\t.response_valid         (<connected-to-response_valid>),         //       response.valid\n\t\t.response_channel       (<connected-to-response_channel>),       //               .channel\n\t\t.response_data          (<connected-to-response_data>),          //               .data\n\t\t.response_startofpacket (<connected-to-response_startofpacket>), //               .startofpacket\n\t\t.response_endofpacket   (<connected-to-response_endofpacket>)    //               .endofpacket\n\t);\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/myadc_inst.vhd",
    "content": "\tcomponent myadc is\r\n\t\tport (\n\t\t\tadc_pll_clock_clk      : in  std_logic                     := 'X';             -- clk\n\t\t\tadc_pll_locked_export  : in  std_logic                     := 'X';             -- export\n\t\t\tclock_clk              : in  std_logic                     := 'X';             -- clk\n\t\t\tcommand_valid          : in  std_logic                     := 'X';             -- valid\n\t\t\tcommand_channel        : in  std_logic_vector(4 downto 0)  := (others => 'X'); -- channel\n\t\t\tcommand_startofpacket  : in  std_logic                     := 'X';             -- startofpacket\n\t\t\tcommand_endofpacket    : in  std_logic                     := 'X';             -- endofpacket\n\t\t\tcommand_ready          : out std_logic;                                        -- ready\n\t\t\treset_sink_reset_n     : in  std_logic                     := 'X';             -- reset_n\n\t\t\tresponse_valid         : out std_logic;                                        -- valid\n\t\t\tresponse_channel       : out std_logic_vector(4 downto 0);                     -- channel\n\t\t\tresponse_data          : out std_logic_vector(11 downto 0);                    -- data\n\t\t\tresponse_startofpacket : out std_logic;                                        -- startofpacket\n\t\t\tresponse_endofpacket   : out std_logic                                         -- endofpacket\n\t\t);\n\tend component myadc;\r\n\r\n\tu0 : component myadc\r\n\t\tport map (\n\t\t\tadc_pll_clock_clk      => CONNECTED_TO_adc_pll_clock_clk,      --  adc_pll_clock.clk\n\t\t\tadc_pll_locked_export  => CONNECTED_TO_adc_pll_locked_export,  -- adc_pll_locked.export\n\t\t\tclock_clk              => CONNECTED_TO_clock_clk,              --          clock.clk\n\t\t\tcommand_valid          => CONNECTED_TO_command_valid,          --        command.valid\n\t\t\tcommand_channel        => CONNECTED_TO_command_channel,        --               .channel\n\t\t\tcommand_startofpacket  => CONNECTED_TO_command_startofpacket,  --               .startofpacket\n\t\t\tcommand_endofpacket    => CONNECTED_TO_command_endofpacket,    --               .endofpacket\n\t\t\tcommand_ready          => CONNECTED_TO_command_ready,          --               .ready\n\t\t\treset_sink_reset_n     => CONNECTED_TO_reset_sink_reset_n,     --     reset_sink.reset_n\n\t\t\tresponse_valid         => CONNECTED_TO_response_valid,         --       response.valid\n\t\t\tresponse_channel       => CONNECTED_TO_response_channel,       --               .channel\n\t\t\tresponse_data          => CONNECTED_TO_response_data,          --               .data\n\t\t\tresponse_startofpacket => CONNECTED_TO_response_startofpacket, --               .startofpacket\n\t\t\tresponse_endofpacket   => CONNECTED_TO_response_endofpacket    --               .endofpacket\n\t\t);\n\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/greybox_tmp/cbx_args.txt",
    "content": "CLOCK_ENABLE_INPUT_A=BYPASS\r\nCLOCK_ENABLE_OUTPUT_A=BYPASS\r\nINTENDED_DEVICE_FAMILY=\"MAX 10\"\r\nNUMWORDS_A=1024\r\nOPERATION_MODE=SINGLE_PORT\r\nOUTDATA_ACLR_A=NONE\r\nOUTDATA_REG_A=UNREGISTERED\r\nPOWER_UP_UNINITIALIZED=FALSE\r\nREAD_DURING_WRITE_MODE_PORT_A=DONT_CARE\r\nWIDTHAD_A=10\r\nWIDTH_A=12\r\nWIDTH_BYTEENA_A=1\r\nDEVICE_FAMILY=\"MAX 10\"\r\naddress_a\r\nclock0\r\nq_a\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/myadc.debuginfo",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<EnsembleReport name=\"myadc\" kind=\"system\" version=\"15.0\" fabric=\"QSYS\">\n <!-- Format version 15.0 145 (Future versions may contain additional information.) -->\n <!-- 2017.10.27.10:04:12 -->\n <!-- A collection of modules and connections -->\n <parameter name=\"clockCrossingAdapter\">\n  <type>com.altera.sopcmodel.ensemble.EClockAdapter</type>\n  <value>HANDSHAKE</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"device\">\n  <type>java.lang.String</type>\n  <value>10M08SAE144C8GES</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"deviceFamily\">\n  <type>java.lang.String</type>\n  <value>MAX10FPGA</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"deviceSpeedGrade\">\n  <type>java.lang.String</type>\n  <value>8</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"fabricMode\">\n  <type>com.altera.sopcmodel.ensemble.Ensemble$EFabricMode</type>\n  <value>QSYS</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"generateLegacySim\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"generationId\">\n  <type>int</type>\n  <value>1509113052</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"globalResetBus\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"hdlLanguage\">\n  <type>com.altera.entityinterfaces.moduleext.IModuleGenerateHDL$HDLLanguage</type>\n  <value>VERILOG</value>\n  <derived>false</derived>\n  <enabled>false</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"hideFromIPCatalog\">\n  <type>boolean</type>\n  <value>true</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"lockedInterfaceDefinition\">\n  <type>com.altera.sopcmodel.definition.BoundaryDefinition</type>\n  <value></value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"maxAdditionalLatency\">\n  <type>int</type>\n  <value>1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"projectName\">\n  <type>java.lang.String</type>\n  <value>serial1.qpf</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"sopcBorderPoints\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"systemHash\">\n  <type>long</type>\n  <value>0</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"testBenchDutName\">\n  <type>java.lang.String</type>\n  <value></value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"timeStamp\">\n  <type>long</type>\n  <value>0</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <parameter name=\"useTestBenchNamingPattern\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n </parameter>\n <module\n   name=\"modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"15.0\"\n   path=\"modular_adc_0\">\n  <!-- Describes a single module. Module parameters are\nthe requested settings for a module instance. -->\n  <assignment>\n   <name>embeddedsw.CMacro.CORE_VARIANT</name>\n   <value>3</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.DUAL_ADC_MODE</name>\n   <value>false</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.PRESCALER_CH16</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.PRESCALER_CH8</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.REFSEL</name>\n   <value>Internal VREF</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH0</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH1</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH10</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH11</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH12</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH13</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH14</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH15</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH16</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH2</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH3</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH4</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH5</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH6</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH7</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH8</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH9</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_TSD</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.VREF</name>\n   <value>3.3</value>\n  </assignment>\n  <parameter name=\"CORE_VAR\">\n   <type>int</type>\n   <value>3</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"ENABLE_DEBUG\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"MONITOR_COUNT_WIDTH\">\n   <type>int</type>\n   <value>12</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQ\">\n   <type>long</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>CLOCK_RATE</sysinfo_type>\n   <sysinfo_arg>clock</sysinfo_arg>\n  </parameter>\n  <parameter name=\"FAMILY\">\n   <type>java.lang.String</type>\n   <value>MAX10FPGA</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n  </parameter>\n  <parameter name=\"DEVICE_PART\">\n   <type>java.lang.String</type>\n   <value>10M08SAE144C8GES</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE</sysinfo_type>\n  </parameter>\n  <parameter name=\"device_partname_fivechar_prefix\">\n   <type>java.lang.String</type>\n   <value>10M08</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"device_adc_type\">\n   <type>int</type>\n   <value>22</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"max_adc_count_on_die\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"adc_count_on_device\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"device_power_supply_type\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"ip_is_for_which_adc\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"is_this_first_or_second_adc\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"analog_input_pin_mask\">\n   <type>java.math.BigInteger</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"hard_pwd\">\n   <type>int</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"clkdiv\">\n   <type>int</type>\n   <value>2</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsclkdiv\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsclksel\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"refsel\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"external_vref\">\n   <type>double</type>\n   <value>2.5</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"int_vref_vr\">\n   <type>double</type>\n   <value>3.3</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"int_vref_nonvr\">\n   <type>double</type>\n   <value>2.5</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"reference_voltage\">\n   <type>double</type>\n   <value>3.3</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescalar\">\n   <type>int</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_tsd\">\n   <type>boolean</type>\n   <value>true</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_tsd_max\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsd_max\">\n   <type>int</type>\n   <value>125</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_tsd_min\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsd_min\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch0\">\n   <type>boolean</type>\n   <value>true</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch0\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch0\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch0\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch0\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch1\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch1\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch2\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch2\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch3\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch3\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch4\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch4\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch5\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch5\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch6\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch6\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch7\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch7\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescaler_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch8\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch8\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch9\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch9\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch10\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch10\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch11\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch11\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch12\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch12\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch13\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch13\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch14\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch14\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch15\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch15\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescaler_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch16\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch16\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_length\">\n   <type>int</type>\n   <value>2</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_1\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_2\">\n   <type>int</type>\n   <value>17</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_3\">\n   <type>int</type>\n   <value>17</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_4\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_5\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_6\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_7\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_8\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_9\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_10\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_11\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_12\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_13\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_14\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_15\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_16\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_17\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_18\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_19\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_20\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_21\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_22\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_23\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_24\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_25\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_26\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_27\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_28\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_29\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_30\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_31\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_32\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_33\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_34\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_35\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_36\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_37\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_38\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_39\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_40\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_41\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_42\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_43\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_44\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_45\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_46\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_47\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_48\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_49\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_50\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_51\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_52\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_53\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_54\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_55\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_56\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_57\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_58\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_59\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_60\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_61\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_62\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_63\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_64\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\">\n   <type>java.lang.String</type>\n   <value>8</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>\n  </parameter>\n  <parameter name=\"deviceFamily\">\n   <type>java.lang.String</type>\n   <value>UNKNOWN</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"generateLegacySim\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <interface name=\"clock\" kind=\"clock_sink\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRateKnown\">\n    <type>java.lang.Boolean</type>\n    <value>false</value>\n    <derived>true</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRate\">\n    <type>java.lang.Long</type>\n    <value>0</value>\n    <derived>true</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>false</isStart>\n   <port>\n    <name>clock_clk</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n  <interface name=\"reset_sink\" kind=\"reset_sink\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"synchronousEdges\">\n    <type>com.altera.sopcmodel.reset.Reset$Edges</type>\n    <value>DEASSERT</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>reset</type>\n   <isStart>false</isStart>\n   <port>\n    <name>reset_sink_reset_n</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>reset_n</role>\n   </port>\n  </interface>\n  <interface name=\"adc_pll_clock\" kind=\"clock_sink\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>false</isStart>\n   <port>\n    <name>adc_pll_clock_clk</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n  <interface name=\"adc_pll_locked\" kind=\"conduit_end\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>conduit</type>\n   <isStart>false</isStart>\n   <port>\n    <name>adc_pll_locked_export</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>export</role>\n   </port>\n  </interface>\n  <interface name=\"command\" kind=\"avalon_streaming_sink\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value>reset_sink</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"beatsPerCycle\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"dataBitsPerSymbol\">\n    <type>int</type>\n    <value>8</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"emptyWithinPacket\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"errorDescriptor\">\n    <type>[Ljava.lang.String;</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"firstSymbolInHighOrderBits\">\n    <type>boolean</type>\n    <value>true</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"highOrderSymbolAtMSB\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"maxChannel\">\n    <type>int</type>\n    <value>31</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"packetDescription\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"readyLatency\">\n    <type>int</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"symbolsPerBeat\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>avalon_streaming</type>\n   <isStart>false</isStart>\n   <port>\n    <name>command_valid</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>valid</role>\n   </port>\n   <port>\n    <name>command_channel</name>\n    <direction>Input</direction>\n    <width>5</width>\n    <role>channel</role>\n   </port>\n   <port>\n    <name>command_startofpacket</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>startofpacket</role>\n   </port>\n   <port>\n    <name>command_endofpacket</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>endofpacket</role>\n   </port>\n   <port>\n    <name>command_ready</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>ready</role>\n   </port>\n  </interface>\n  <interface name=\"response\" kind=\"avalon_streaming_source\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value>reset_sink</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"beatsPerCycle\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"dataBitsPerSymbol\">\n    <type>int</type>\n    <value>12</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"emptyWithinPacket\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"errorDescriptor\">\n    <type>[Ljava.lang.String;</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"firstSymbolInHighOrderBits\">\n    <type>boolean</type>\n    <value>true</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"highOrderSymbolAtMSB\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"maxChannel\">\n    <type>int</type>\n    <value>31</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"packetDescription\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"readyLatency\">\n    <type>int</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"symbolsPerBeat\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>avalon_streaming</type>\n   <isStart>true</isStart>\n   <port>\n    <name>response_valid</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>valid</role>\n   </port>\n   <port>\n    <name>response_channel</name>\n    <direction>Output</direction>\n    <width>5</width>\n    <role>channel</role>\n   </port>\n   <port>\n    <name>response_data</name>\n    <direction>Output</direction>\n    <width>12</width>\n    <role>data</role>\n   </port>\n   <port>\n    <name>response_startofpacket</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>startofpacket</role>\n   </port>\n   <port>\n    <name>response_endofpacket</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>endofpacket</role>\n   </port>\n  </interface>\n </module>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>altera_modular_adc</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IModule</subtype>\n  <displayName>Altera Modular ADC core</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>2</instanceCount>\n  <name>clock_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Clock Input</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>reset_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Reset Input</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>conduit_end</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Conduit</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>avalon_streaming_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Avalon Streaming Sink</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>avalon_streaming_source</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Avalon Streaming Source</displayName>\n  <version>15.0</version>\n </plugin>\n <reportVersion>15.0 145</reportVersion>\n <uniqueIdentifier>00000000000000E00000015F5E25BCDF</uniqueIdentifier>\n</EnsembleReport>\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/myadc.qip",
    "content": "set_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_TOOL_NAME \"Qsys\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_TOOL_VERSION \"15.0\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_TOOL_ENV \"Qsys\"\nset_global_assignment -library \"myadc\" -name SOPCINFO_FILE [file join $::quartus(qip_path) \"../../myadc.sopcinfo\"]\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name SLD_INFO \"QSYS_NAME myadc HAS_SOPCINFO 1 GENERATION_ID 1509113052\"\nset_global_assignment -library \"myadc\" -name MISC_FILE [file join $::quartus(qip_path) \"../myadc.cmp\"]\nset_global_assignment -library \"myadc\" -name SLD_FILE [file join $::quartus(qip_path) \"myadc.debuginfo\"]\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_TARGETED_DEVICE_FAMILY \"MAX 10\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_QSYS_MODE \"STANDALONE\"\nset_global_assignment -name SYNTHESIS_ONLY_QIP ON\nset_global_assignment -library \"myadc\" -name MISC_FILE [file join $::quartus(qip_path) \"../../myadc.qsys\"]\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_NAME \"bXlhZGM=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_DISPLAY_NAME \"bXlhZGM=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_REPORT_HIERARCHY \"On\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_INTERNAL \"Off\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_VERSION \"MS4w\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19HRU5FUkFUSU9OX0lE::MTUwOTExMzA1Mg==::QXV0byBHRU5FUkFUSU9OX0lE\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19ERVZJQ0VfRkFNSUxZ::TUFYIDEw::QXV0byBERVZJQ0VfRkFNSUxZ\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19ERVZJQ0U=::MTBNMDhTQUUxNDRDOEdFUw==::QXV0byBERVZJQ0U=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::OA==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ==\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19BRENfUExMX0NMT0NLX0NMT0NLX1JBVEU=::LTE=::QXV0byBDTE9DS19SQVRF\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19BRENfUExMX0NMT0NLX0NMT0NLX0RPTUFJTg==::LTE=::QXV0byBDTE9DS19ET01BSU4=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19BRENfUExMX0NMT0NLX1JFU0VUX0RPTUFJTg==::LTE=::QXV0byBSRVNFVF9ET01BSU4=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19DTE9DS19DTE9DS19SQVRF::LTE=::QXV0byBDTE9DS19SQVRF\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19DTE9DS19DTE9DS19ET01BSU4=::LTE=::QXV0byBDTE9DS19ET01BSU4=\"\nset_global_assignment -entity \"myadc\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19DTE9DS19SRVNFVF9ET01BSU4=::LTE=::QXV0byBSRVNFVF9ET01BSU4=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_NAME \"bXlhZGNfbW9kdWxhcl9hZGNfMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_DISPLAY_NAME \"QWx0ZXJhIE1vZHVsYXIgQURDIGNvcmU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_REPORT_HIERARCHY \"Off\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_INTERNAL \"Off\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_AUTHOR \"QWx0ZXJhIENvcnBvcmF0aW9u\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_VERSION \"MTUuMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_DESCRIPTION \"QWx0ZXJhIE1vZHVsYXIgQURD\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"Q09SRV9WQVI=::Mw==::Q29yZSBWYXJpYW50\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"RU5BQkxFX0RFQlVH::MA==::RGVidWcgUGF0aA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"TU9OSVRPUl9DT1VOVF9XSURUSA==::MTI=::TU9OSVRPUl9DT1VOVF9XSURUSA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"Q0xPQ0tfRlJFUQ==::MA==::Q0xPQ0tfRlJFUQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"RkFNSUxZ::TUFYIDEw::RGV2aWNlIEZhbWlseQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"REVWSUNFX1BBUlQ=::MTBNMDhTQUUxNDRDOEdFUw==::RGV2aWNlIFBhcnQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGV2aWNlX3BhcnRuYW1lX2ZpdmVjaGFyX3ByZWZpeA==::MTBNMDg=::ZGV2aWNlX3BhcnRuYW1lX2ZpdmVjaGFyX3ByZWZpeA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGV2aWNlX2FkY190eXBl::MjI=::UGxlYXNlIHNlbGVjdCBkZXZpY2UgUGFydCBOdW1iZXIgcHJlZml4\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"bWF4X2FkY19jb3VudF9vbl9kaWU=::MQ==::TWF4IEFEQ3MgY291bnQgb24gc2lsaWNvbiBkaWU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"YWRjX2NvdW50X29uX2RldmljZQ==::MQ==::QURDcyBjb3VudCBvbiBkZXZpY2U=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGV2aWNlX3Bvd2VyX3N1cHBseV90eXBl::MQ==::SXMgdGhpcyBhIHNpbmdsZSBvciBkdWFsIHN1cHBseSB2b2x0YWdlIGRldmljZQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aXBfaXNfZm9yX3doaWNoX2FkYw==::MQ==::R2VuZXJhdGUgSVAgZm9yIHdoaWNoIEFEQ3Mgb2YgdGhpcyBkZXZpY2U/\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aXNfdGhpc19maXJzdF9vcl9zZWNvbmRfYWRj::MQ==::VGhpcyBBREMgYXRvbSBwcmltaXRpdmUgKFdZU0lXWUcpIGlzIGZvciBmaXJzdCBvciBzZWNvbmQgQURDPw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"YW5hbG9nX2lucHV0X3Bpbl9tYXNr::MA==::YW5hbG9nX2lucHV0X3Bpbl9tYXNr\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aGFyZF9wd2Q=::MA==::aGFyZF9wd2Q=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"Y2xrZGl2::Mg==::QURDIElucHV0IENsb2Nr\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNjbGtkaXY=::MQ==::dHNjbGtkaXY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNjbGtzZWw=::MQ==::dHNjbGtzZWw=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cmVmc2Vs::MQ==::UmVmZXJlbmNlIFZvbHRhZ2UgU291cmNl\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZXh0ZXJuYWxfdnJlZg==::Mi41::RXh0ZXJuYWwgUmVmZXJlbmNlIFZvbHRhZ2U=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aW50X3ZyZWZfdnI=::My4z::SW50ZXJuYWwgUmVmZXJlbmNlIFZvbHRhZ2U=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aW50X3ZyZWZfbm9udnI=::Mi41::SW50ZXJuYWwgUmVmZXJlbmNlIFZvbHRhZ2U=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cmVmZXJlbmNlX3ZvbHRhZ2U=::My4z::QURDIFJlZmVyZW5jZSBWb2x0YWdl\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cHJlc2NhbGFy::MA==::cHJlc2NhbGFy\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX3RzZA==::dHJ1ZQ==::VXNlIG9uLWNoaXAgVFNE\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdHNkX21heA==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBvbi1jaGlwIFRTRA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNkX21heA==::MTI1::TWF4aW11bSBUZW1wZXJhdHVyZSBUaHJlc2hvbGQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdHNkX21pbg==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBvbi1jaGlwIFRTRA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNkX21pbg==::MA==::TWluaW11bSBUZW1wZXJhdHVyZSBUaHJlc2hvbGQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMA==::dHJ1ZQ==::VXNlIENoYW5uZWwgMCAoRGVkaWNhdGVkIGFuYWxvZyBpbnB1dCBwaW4gLSBBTkFJTik=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gw::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gw::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gw::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gw::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMQ==::ZmFsc2U=::VXNlIENoYW5uZWwgMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gx::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gx::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gx::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gx::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMg==::ZmFsc2U=::VXNlIENoYW5uZWwgMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gy::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gy::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gy::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gy::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMw==::ZmFsc2U=::VXNlIENoYW5uZWwgMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gz::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gz::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gz::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gz::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoNA==::ZmFsc2U=::VXNlIENoYW5uZWwgNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g0::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g0::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g0::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g0::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoNQ==::ZmFsc2U=::VXNlIENoYW5uZWwgNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g1::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g1::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g1::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g1::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoNg==::ZmFsc2U=::VXNlIENoYW5uZWwgNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g2::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g2::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g2::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g2::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoNw==::ZmFsc2U=::VXNlIENoYW5uZWwgNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g3::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDc=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g3::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g3::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDc=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g3::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoOA==::ZmFsc2U=::VXNlIENoYW5uZWwgOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cHJlc2NhbGVyX2NoOA==::ZmFsc2U=::RW5hYmxlIFByZXNjYWxlciBmb3IgQ2hhbm5lbCA4\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g4::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDg=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g4::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g4::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDg=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g4::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoOQ==::ZmFsc2U=::VXNlIENoYW5uZWwgOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2g5::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDk=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2g5::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2g5::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDk=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2g5::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTA=::ZmFsc2U=::VXNlIENoYW5uZWwgMTA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxMA==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEw\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxMA==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxMA==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEw\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxMA==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTA=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTE=::ZmFsc2U=::VXNlIENoYW5uZWwgMTE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxMQ==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEx\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxMQ==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxMQ==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEx\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxMQ==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTE=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTI=::ZmFsc2U=::VXNlIENoYW5uZWwgMTI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxMg==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEy\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxMg==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxMg==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEy\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxMg==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTI=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTM=::ZmFsc2U=::VXNlIENoYW5uZWwgMTM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxMw==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEz\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxMw==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxMw==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDEz\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxMw==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTM=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTQ=::ZmFsc2U=::VXNlIENoYW5uZWwgMTQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxNA==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE0\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxNA==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxNA==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE0\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxNA==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTQ=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTU=::ZmFsc2U=::VXNlIENoYW5uZWwgMTU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxNQ==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE1\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxNQ==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxNQ==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE1\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxNQ==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTU=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dXNlX2NoMTY=::ZmFsc2U=::VXNlIENoYW5uZWwgMTY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cHJlc2NhbGVyX2NoMTY=::ZmFsc2U=::RW5hYmxlIFByZXNjYWxlciBmb3IgQ2hhbm5lbCAxNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtYXhfY2gxNg==::ZmFsc2U=::RW5hYmxlIE1heGltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE2\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtYXhfY2gxNg==::MC4w::RW50ZXIgTWF4aW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZW5fdGhtaW5fY2gxNg==::ZmFsc2U=::RW5hYmxlIE1pbmltdW0gdGhyZXNob2xkIGZvciBDaGFubmVsIDE2\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dGhtaW5fY2gxNg==::MC4w::RW50ZXIgTWluaW11bSBUaHJlc2hvbGQgZm9yIENoYW5uZWwgMTY=\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX2xlbmd0aA==::Mg==::TnVtYmVyIG9mIHNsb3QgdXNlZA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMQ==::MA==::U2xvdCAx\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMg==::MTc=::U2xvdCAy\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMw==::MTc=::U2xvdCAz\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNA==::MzA=::U2xvdCA0\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNQ==::MzA=::U2xvdCA1\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNg==::MzA=::U2xvdCA2\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNw==::MzA=::U2xvdCA3\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfOA==::MzA=::U2xvdCA4\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfOQ==::MzA=::U2xvdCA5\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTA=::MzA=::U2xvdCAxMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTE=::MzA=::U2xvdCAxMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTI=::MzA=::U2xvdCAxMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTM=::MzA=::U2xvdCAxMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTQ=::MzA=::U2xvdCAxNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTU=::MzA=::U2xvdCAxNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTY=::MzA=::U2xvdCAxNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTc=::MzA=::U2xvdCAxNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTg=::MzA=::U2xvdCAxOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMTk=::MzA=::U2xvdCAxOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjA=::MzA=::U2xvdCAyMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjE=::MzA=::U2xvdCAyMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjI=::MzA=::U2xvdCAyMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjM=::MzA=::U2xvdCAyMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjQ=::MzA=::U2xvdCAyNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjU=::MzA=::U2xvdCAyNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjY=::MzA=::U2xvdCAyNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjc=::MzA=::U2xvdCAyNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjg=::MzA=::U2xvdCAyOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMjk=::MzA=::U2xvdCAyOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzA=::MzA=::U2xvdCAzMA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzE=::MzA=::U2xvdCAzMQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzI=::MzA=::U2xvdCAzMg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzM=::MzA=::U2xvdCAzMw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzQ=::MzA=::U2xvdCAzNA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzU=::MzA=::U2xvdCAzNQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzY=::MzA=::U2xvdCAzNg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzc=::MzA=::U2xvdCAzNw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzg=::MzA=::U2xvdCAzOA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfMzk=::MzA=::U2xvdCAzOQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDA=::MzA=::U2xvdCA0MA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDE=::MzA=::U2xvdCA0MQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDI=::MzA=::U2xvdCA0Mg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDM=::MzA=::U2xvdCA0Mw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDQ=::MzA=::U2xvdCA0NA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDU=::MzA=::U2xvdCA0NQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDY=::MzA=::U2xvdCA0Ng==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDc=::MzA=::U2xvdCA0Nw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDg=::MzA=::U2xvdCA0OA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNDk=::MzA=::U2xvdCA0OQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTA=::MzA=::U2xvdCA1MA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTE=::MzA=::U2xvdCA1MQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTI=::MzA=::U2xvdCA1Mg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTM=::MzA=::U2xvdCA1Mw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTQ=::MzA=::U2xvdCA1NA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTU=::MzA=::U2xvdCA1NQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTY=::MzA=::U2xvdCA1Ng==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTc=::MzA=::U2xvdCA1Nw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTg=::MzA=::U2xvdCA1OA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNTk=::MzA=::U2xvdCA1OQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjA=::MzA=::U2xvdCA2MA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjE=::MzA=::U2xvdCA2MQ==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjI=::MzA=::U2xvdCA2Mg==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjM=::MzA=::U2xvdCA2Mw==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"c2VxX29yZGVyX3Nsb3RfNjQ=::MzA=::U2xvdCA2NA==\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::OA==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ==\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_NAME \"YWx0ZXJhX21vZHVsYXJfYWRjX2NvbnRyb2w=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_DISPLAY_NAME \"QWx0ZXJhIE1vZHVsYXIgQURDIENvbnRyb2wgY29yZQ==\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_REPORT_HIERARCHY \"Off\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_INTERNAL \"On\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_AUTHOR \"QWx0ZXJhIENvcnBvcmF0aW9u\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_VERSION \"MTUuMA==\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_DESCRIPTION \"QWx0ZXJhIE1vZHVsYXIgQURDIC0gQ29udHJvbCBjb3Jl\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"Y2xrZGl2::Mg==::Y2xrZGl2\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNjbGtkaXY=::MQ==::dHNjbGtkaXY=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"dHNjbGtzZWw=::MQ==::dHNjbGtzZWw=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aGFyZF9wd2Q=::MA==::aGFyZF9wd2Q=\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cHJlc2NhbGFy::MA==::cHJlc2NhbGFy\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"cmVmc2Vs::MQ==::cmVmc2Vs\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZGV2aWNlX3BhcnRuYW1lX2ZpdmVjaGFyX3ByZWZpeA==::MTBNMDg=::ZGV2aWNlX3BhcnRuYW1lX2ZpdmVjaGFyX3ByZWZpeA==\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"aXNfdGhpc19maXJzdF9vcl9zZWNvbmRfYWRj::MQ==::aXNfdGhpc19maXJzdF9vcl9zZWNvbmRfYWRj\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"YW5hbG9nX2lucHV0X3Bpbl9tYXNr::NjU1MzY=::YW5hbG9nX2lucHV0X3Bpbl9tYXNr\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_COMPONENT_PARAMETER \"ZHVhbF9hZGNfbW9kZQ==::ZmFsc2U=::RW5hYmxlIER1YWwgQURDIE1vZGU=\"\n\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"myadc.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/myadc_modular_adc_0.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/altera_modular_adc_control.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/altera_modular_adc_control_avrg_fifo.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/altera_modular_adc_control_fsm.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/chsel_code_converter_sw_to_hw.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/fiftyfivenm_adcblock_primitive_wrapper.v\"]\nset_global_assignment -library \"myadc\" -name VERILOG_FILE [file join $::quartus(qip_path) \"submodules/fiftyfivenm_adcblock_top_wrapper.v\"]\nset_global_assignment -library \"myadc\" -name SDC_FILE [file join $::quartus(qip_path) \"submodules/altera_modular_adc_control.sdc\"]\n\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_TOOL_NAME \"altera_modular_adc\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_TOOL_VERSION \"15.0\"\nset_global_assignment -entity \"myadc_modular_adc_0\" -library \"myadc\" -name IP_TOOL_ENV \"Qsys\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_TOOL_NAME \"altera_modular_adc_control\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_TOOL_VERSION \"15.0\"\nset_global_assignment -entity \"altera_modular_adc_control\" -library \"myadc\" -name IP_TOOL_ENV \"Qsys\"\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/myadc.v",
    "content": "// myadc.v\r\n\r\n// Generated using ACDS version 15.0 145\r\n\r\n`timescale 1 ps / 1 ps\nmodule myadc (\r\n\t\tinput  wire        adc_pll_clock_clk,      //  adc_pll_clock.clk\n\t\tinput  wire        adc_pll_locked_export,  // adc_pll_locked.export\n\t\tinput  wire        clock_clk,              //          clock.clk\n\t\tinput  wire        command_valid,          //        command.valid\n\t\tinput  wire [4:0]  command_channel,        //               .channel\n\t\tinput  wire        command_startofpacket,  //               .startofpacket\n\t\tinput  wire        command_endofpacket,    //               .endofpacket\n\t\toutput wire        command_ready,          //               .ready\n\t\tinput  wire        reset_sink_reset_n,     //     reset_sink.reset_n\n\t\toutput wire        response_valid,         //       response.valid\n\t\toutput wire [4:0]  response_channel,       //               .channel\n\t\toutput wire [11:0] response_data,          //               .data\n\t\toutput wire        response_startofpacket, //               .startofpacket\n\t\toutput wire        response_endofpacket    //               .endofpacket\n\t);\r\n\r\n\tmyadc_modular_adc_0 modular_adc_0 (\n\t\t.clock_clk              (clock_clk),              //          clock.clk\n\t\t.reset_sink_reset_n     (reset_sink_reset_n),     //     reset_sink.reset_n\n\t\t.adc_pll_clock_clk      (adc_pll_clock_clk),      //  adc_pll_clock.clk\n\t\t.adc_pll_locked_export  (adc_pll_locked_export),  // adc_pll_locked.export\n\t\t.command_valid          (command_valid),          //        command.valid\n\t\t.command_channel        (command_channel),        //               .channel\n\t\t.command_startofpacket  (command_startofpacket),  //               .startofpacket\n\t\t.command_endofpacket    (command_endofpacket),    //               .endofpacket\n\t\t.command_ready          (command_ready),          //               .ready\n\t\t.response_valid         (response_valid),         //       response.valid\n\t\t.response_channel       (response_channel),       //               .channel\n\t\t.response_data          (response_data),          //               .data\n\t\t.response_startofpacket (response_startofpacket), //               .startofpacket\n\t\t.response_endofpacket   (response_endofpacket)    //               .endofpacket\n\t);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_control.sdc",
    "content": "# (C) 2001-2015 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and other \n# software and tools, and its AMPP partner logic functions, and any output \n# files any of the foregoing (including device programming or simulation \n# files), and any associated documentation or information are expressly subject \n# to the terms and conditions of the Altera Program License Subscription \n# Agreement, Altera MegaCore Function License Agreement, or other applicable \n# license agreement, including, without limitation, that your use is for the \n# sole purpose of programming logic devices manufactured by Altera and sold by \n# Altera or its authorized distributors.  Please refer to the applicable \n# agreement for further details.\n\n\n#**************************************************************\r\n# Set False Path - ADC Hard to/from Soft Logic is asynchronous\r\n#**************************************************************\r\n## EOC - Automatically covered in reset_synchronizer SDC\r\n## CLK_DFT - Automatically covered in reset_synchronizer SDC\r\n\r\n## DOUT\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[0]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[0]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[1]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[1]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[2]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[2]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[3]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[3]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[4]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[4]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[5]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[5]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[6]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[6]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[7]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[7]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[8]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[8]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[9]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[9]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[10]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[10]}]\r\nset_false_path -from [get_keepers {*fiftyfivenm_adcblock_primitive_wrapper:adcblock_instance|wire_from_adc_dout[11]}] -to [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|dout_flp[11]}]\r\n\r\n## CHSEL\r\nset_false_path -from [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|chsel[*]}] -to [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|chsel[*]}]\r\n\r\n## SOC\r\nset_false_path -from [get_registers {*altera_modular_adc_control_fsm:u_control_fsm|soc}] -to [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|soc}]\r\n\r\n\r\n#******************************************************************************************************************\r\n# Set Net Delay - ADC Hard to/from Soft Logic is constrained to be max data delay of 5ns and min data delay of 0ns\r\n#******************************************************************************************************************\r\n\r\n## EOC\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|eoc}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|eoc}] -min 0\r\n\r\n## CLK_DFT\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|clk_dft}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|clk_dft}] -min 0\r\n\r\n## DOUT\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[0]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[1]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[2]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[3]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[4]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[5]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[6]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[7]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[8]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[9]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[10]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[11]}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[0]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[1]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[2]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[3]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[4]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[5]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[6]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[7]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[8]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[9]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[10]}] -min 0\r\nset_net_delay -from [get_pins -compatibility_mode {*|adc_inst|adcblock_instance|primitive_instance|dout[11]}] -min 0\r\n\r\n## CHSEL\r\nset_net_delay -from [get_pins -compatibility_mode {*|u_control_fsm|chsel[*]|q}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|u_control_fsm|chsel[*]|q}] -min 0\r\n\r\n## SOC\r\nset_net_delay -from [get_pins -compatibility_mode {*|u_control_fsm|soc|q}] -max 5\r\nset_net_delay -from [get_pins -compatibility_mode {*|u_control_fsm|soc|q}] -min 0\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_control.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_control #(\r\n    parameter clkdiv        = 1,\r\n    parameter tsclkdiv      = 0,\r\n    parameter tsclksel      = 0,\r\n    parameter prescalar     = 0,\r\n    parameter refsel        = 0,\r\n    parameter device_partname_fivechar_prefix   = \"10M08\",\r\n    parameter is_this_first_or_second_adc = 1,\r\n    parameter analog_input_pin_mask = 17'h0,\r\n    parameter hard_pwd = 0,\r\n    parameter dual_adc_mode = 0\r\n) (\r\n    input           clk,\r\n    input           rst_n,\r\n    input           clk_in_pll_c0,\r\n    input           clk_in_pll_locked,\r\n    input           cmd_valid,\r\n    input [4:0]     cmd_channel,\r\n    input           cmd_sop,\r\n    input           cmd_eop,\r\n    input           sync_ready,\r\n\r\n    output          cmd_ready,\r\n    output          rsp_valid,\r\n    output [4:0]    rsp_channel,\r\n    output [11:0]   rsp_data,\r\n    output          rsp_sop,\r\n    output          rsp_eop,\r\n    output          sync_valid\r\n\r\n);\r\n\r\nwire        clkout_adccore;\r\nwire        eoc;\r\nwire [11:0] dout;\r\nwire [4:0]  chsel;\r\nwire        soc;\r\nwire        tsen;\r\nwire        usr_pwd;\r\n\r\naltera_modular_adc_control_fsm #(\r\n    .is_this_first_or_second_adc    (is_this_first_or_second_adc),\r\n    .dual_adc_mode                  (dual_adc_mode)    \r\n) u_control_fsm (\r\n    // inputs\r\n    .clk                (clk),\r\n    .rst_n              (rst_n),\r\n    .clk_in_pll_locked  (clk_in_pll_locked),\r\n    .cmd_valid          (cmd_valid),\r\n    .cmd_channel        (cmd_channel),\r\n    .cmd_sop            (cmd_sop),\r\n    .cmd_eop            (cmd_eop),\r\n    .clk_dft            (clkout_adccore),\r\n    .eoc                (eoc),\r\n    .dout               (dout),\r\n    .sync_ready         (sync_ready),\r\n    // outputs\r\n    .rsp_valid          (rsp_valid),\r\n    .rsp_channel        (rsp_channel),\r\n    .rsp_data           (rsp_data),\r\n    .rsp_sop            (rsp_sop),\r\n    .rsp_eop            (rsp_eop),\r\n    .cmd_ready          (cmd_ready),\r\n    .chsel              (chsel),\r\n    .soc                (soc),\r\n    .usr_pwd            (usr_pwd),\r\n    .tsen               (tsen),\r\n    .sync_valid         (sync_valid)\r\n\r\n\r\n\r\n);\r\n\r\n\r\n\r\nfiftyfivenm_adcblock_top_wrapper #(\r\n    .device_partname_fivechar_prefix (device_partname_fivechar_prefix),\r\n    .clkdiv                          (clkdiv),\r\n    .tsclkdiv                        (tsclkdiv),\r\n    .tsclksel                        (tsclksel),\r\n    .refsel                          (refsel),\r\n    .prescalar                       (prescalar),\r\n    .is_this_first_or_second_adc     (is_this_first_or_second_adc),\r\n    .analog_input_pin_mask           (analog_input_pin_mask),\r\n    .hard_pwd                        (hard_pwd)\r\n) adc_inst (\r\n    //.reset              (reset),\r\n    .chsel              (chsel),                        // 5-bits channel selection.\r\n    .soc                (soc),                          // signal Start-of-Conversion to ADC\r\n    .eoc                (eoc),                          // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\r\n    .dout               (dout),                         // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    .usr_pwd            (usr_pwd),                      // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    .tsen               (tsen),                         // MUST power down ADC before changing TSEN.  0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    .clkout_adccore     (clkout_adccore),               // Output clock from the clock divider\r\n    .clkin_from_pll_c0  (clk_in_pll_c0)               // Clock source from PLL1/3 c-counter[0]\r\n    //.dout_ch            (dout_ch)                     // Indicate dout is for which chsel\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_control_avrg_fifo.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// megafunction wizard: %FIFO%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: scfifo \r\n\r\n// ============================================================\r\n// File Name: altera_modular_adc_control_avrg_fifo.v\r\n// Megafunction Name(s):\r\n// \t\t\tscfifo\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Internal Build 30 11/13/2014 PN Full Version\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2014 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule altera_modular_adc_control_avrg_fifo (\r\n\tclock,\r\n\tdata,\r\n\trdreq,\r\n\tsclr,\r\n\twrreq,\r\n\tempty,\r\n\tfull,\r\n\tq);\r\n\r\n\tinput\t  clock;\r\n\tinput\t[11:0]  data;\r\n\tinput\t  rdreq;\r\n\tinput\t  sclr;\r\n\tinput\t  wrreq;\r\n\toutput\t  empty;\r\n\toutput\t  full;\r\n\toutput\t[11:0]  q;\r\n\r\n\twire  sub_wire0;\r\n\twire  sub_wire1;\r\n\twire [11:0] sub_wire2;\r\n\twire  empty = sub_wire0;\r\n\twire  full = sub_wire1;\r\n\twire [11:0] q = sub_wire2[11:0];\r\n\r\n\tscfifo\tscfifo_component (\r\n\t\t\t\t.clock (clock),\r\n\t\t\t\t.data (data),\r\n\t\t\t\t.rdreq (rdreq),\r\n\t\t\t\t.sclr (sclr),\r\n\t\t\t\t.wrreq (wrreq),\r\n\t\t\t\t.empty (sub_wire0),\r\n\t\t\t\t.full (sub_wire1),\r\n\t\t\t\t.q (sub_wire2),\r\n\t\t\t\t.aclr (),\r\n\t\t\t\t.almost_empty (),\r\n\t\t\t\t.almost_full (),\r\n\t\t\t\t.usedw ());\r\n\tdefparam\r\n\t\tscfifo_component.add_ram_output_register = \"OFF\",\r\n\t\tscfifo_component.intended_device_family = \"MAX 10\",\r\n\t\tscfifo_component.lpm_hint = \"RAM_BLOCK_TYPE=M9K\",\r\n\t\tscfifo_component.lpm_numwords = 64,\r\n\t\tscfifo_component.lpm_showahead = \"OFF\",\r\n\t\tscfifo_component.lpm_type = \"scfifo\",\r\n\t\tscfifo_component.lpm_width = 12,\r\n\t\tscfifo_component.lpm_widthu = 6,\r\n\t\tscfifo_component.overflow_checking = \"ON\",\r\n\t\tscfifo_component.underflow_checking = \"ON\",\r\n\t\tscfifo_component.use_eab = \"ON\";\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: AlmostEmpty NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AlmostEmptyThr NUMERIC \"-1\"\r\n// Retrieval info: PRIVATE: AlmostFull NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AlmostFullThr NUMERIC \"-1\"\r\n// Retrieval info: PRIVATE: CLOCKS_ARE_SYNCHRONIZED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clock NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Depth NUMERIC \"64\"\r\n// Retrieval info: PRIVATE: Empty NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: Full NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: LE_BasedFIFO NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: LegacyRREQ NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MAX_DEPTH_BY_9 NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: OVERFLOW_CHECKING NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Optimize NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: UNDERFLOW_CHECKING NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: UsedW NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Width NUMERIC \"12\"\r\n// Retrieval info: PRIVATE: dc_aclr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: diff_widths NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: msb_usedw NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: output_width NUMERIC \"12\"\r\n// Retrieval info: PRIVATE: rsEmpty NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: rsFull NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: rsUsedW NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: sc_aclr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: sc_sclr NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: wsEmpty NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: wsFull NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: wsUsedW NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: ADD_RAM_OUTPUT_REGISTER STRING \"OFF\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_HINT STRING \"RAM_BLOCK_TYPE=M9K\"\r\n// Retrieval info: CONSTANT: LPM_NUMWORDS NUMERIC \"64\"\r\n// Retrieval info: CONSTANT: LPM_SHOWAHEAD STRING \"OFF\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"scfifo\"\r\n// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: LPM_WIDTHU NUMERIC \"6\"\r\n// Retrieval info: CONSTANT: OVERFLOW_CHECKING STRING \"ON\"\r\n// Retrieval info: CONSTANT: UNDERFLOW_CHECKING STRING \"ON\"\r\n// Retrieval info: CONSTANT: USE_EAB STRING \"ON\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 12 0 INPUT NODEFVAL \"data[11..0]\"\r\n// Retrieval info: USED_PORT: empty 0 0 0 0 OUTPUT NODEFVAL \"empty\"\r\n// Retrieval info: USED_PORT: full 0 0 0 0 OUTPUT NODEFVAL \"full\"\r\n// Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL \"q[11..0]\"\r\n// Retrieval info: USED_PORT: rdreq 0 0 0 0 INPUT NODEFVAL \"rdreq\"\r\n// Retrieval info: USED_PORT: sclr 0 0 0 0 INPUT NODEFVAL \"sclr\"\r\n// Retrieval info: USED_PORT: wrreq 0 0 0 0 INPUT NODEFVAL \"wrreq\"\r\n// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data 0 0 12 0 data 0 0 12 0\r\n// Retrieval info: CONNECT: @rdreq 0 0 0 0 rdreq 0 0 0 0\r\n// Retrieval info: CONNECT: @sclr 0 0 0 0 sclr 0 0 0 0\r\n// Retrieval info: CONNECT: @wrreq 0 0 0 0 wrreq 0 0 0 0\r\n// Retrieval info: CONNECT: empty 0 0 0 0 @empty 0 0 0 0\r\n// Retrieval info: CONNECT: full 0 0 0 0 @full 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 12 0 @q 0 0 12 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo.bsf FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL altera_modular_adc_control_avrg_fifo_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_control_fsm.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_control_fsm #(\r\n    parameter is_this_first_or_second_adc = 1,\r\n    parameter dual_adc_mode = 0\r\n) (\r\n    input               clk, \r\n    input               rst_n,\r\n    input               clk_in_pll_locked,\r\n    input               cmd_valid,\r\n    input [4:0]         cmd_channel,\r\n    input               cmd_sop,\r\n    input               cmd_eop,\r\n    input               clk_dft,\r\n    input               eoc,\r\n    input [11:0]        dout,\r\n    input               sync_ready,\r\n\r\n    output reg          rsp_valid,\r\n    output reg [4:0]    rsp_channel,\r\n    output reg [11:0]   rsp_data,\r\n    output reg          rsp_sop,\r\n    output reg          rsp_eop,\r\n    output reg          cmd_ready,\r\n    output reg [4:0]    chsel,\r\n    output reg          soc,\r\n    output reg          usr_pwd,\r\n    output reg          tsen,\r\n    output reg          sync_valid\r\n\r\n);\r\n\r\nreg [4:0]   ctrl_state;\r\nreg [4:0]   ctrl_state_nxt;\r\nreg         clk_dft_synch_dly;\r\nreg         eoc_synch_dly;\r\nreg [4:0]   chsel_nxt;\r\nreg         soc_nxt;\r\nreg         usr_pwd_nxt;\r\nreg         tsen_nxt;\r\nreg         prev_cmd_is_ts;\r\nreg         cmd_fetched;\r\nreg         pend;\r\nreg [4:0]   cmd_channel_dly;\r\nreg         cmd_sop_dly;\r\nreg         cmd_eop_dly;\r\nreg [7:0]   int_timer;\r\nreg [17:0]  avrg_sum;\r\nreg         avrg_cnt_done;\r\nreg         frst_64_ptr_done;\r\nreg         conv_dly1_s_flp;\r\nreg [11:0]  dout_flp;\r\nreg [4:0]   prev_ctrl_state;\r\nreg [4:0]   sync_ctrl_state;\r\nreg [4:0]   sync_ctrl_state_nxt;\r\n\r\nwire        clk_dft_synch;\r\nwire        eoc_synch;\r\nwire        clk_dft_lh;\r\nwire        clk_dft_hl;\r\nwire        eoc_hl;\r\nwire        cmd_is_rclb;\r\nwire        cmd_is_ts;\r\nwire        arc_conv_conv_dly1;\r\nwire        arc_sync1_conv_dly1;\r\nwire        arc_wait_pend_wait_pend_dly1;\r\nwire        arc_sync1_wait_pend_dly1;\r\nwire        arc_to_conv;\r\nwire        arc_to_avrg_cnt;\r\nwire        load_rsp;\r\nwire        load_cmd_ready;\r\nwire        arc_getcmd_w_pwrdwn;\r\nwire        arc_getcmd_pwrdwn;\r\nwire        load_cmd_fetched;\r\nwire        load_int_timer;\r\nwire        incr_int_timer;\r\nwire        arc_out_from_pwrup_soc;\r\nwire        clr_cmd_fetched;\r\nwire        adc_change_mode;\r\nwire        add_avrg_sum;\r\nwire        add_avrg_sum_run;\r\nwire        clear_avrg_sum;\r\nwire        clear_avrg_cnt_done;\r\nwire        set_frst_64_ptr_done;\r\nwire        clear_frst_64_ptr_done;\r\nwire [11:0] fifo_q;\r\nwire        fifo_sclr;\r\nwire        fifo_rdreq;\r\nwire        fifo_wrreq;\r\nwire        putresp_s;\r\nwire        putresp_pend_s;\r\nwire        pwrdwn_s;\r\nwire        pwrdwn_tsen_s;\r\nwire        avrg_cnt_s;\r\nwire        wait_pend_dly1_s;\r\nwire        conv_dly1_s;\r\nwire        conv_s;\r\nwire        putresp_dly3_s;\r\nwire        load_dout;\r\nwire        avrg_enable;\r\nwire [11:0] rsp_data_nxt;\r\n\r\nlocalparam [4:0]    IDLE                = 5'b00000;\r\nlocalparam [4:0]    PWRDWN              = 5'b00001;\r\nlocalparam [4:0]    PWRDWN_TSEN         = 5'b00010;\r\nlocalparam [4:0]    PWRDWN_DONE         = 5'b00011;\r\nlocalparam [4:0]    PWRUP_CH            = 5'b00100;\r\nlocalparam [4:0]    PWRUP_SOC           = 5'b00101;\r\nlocalparam [4:0]    WAIT                = 5'b00110;\r\nlocalparam [4:0]    GETCMD              = 5'b00111;\r\nlocalparam [4:0]    GETCMD_W            = 5'b01000;\r\nlocalparam [4:0]    PRE_CONV            = 5'b01001;\r\nlocalparam [4:0]    CONV                = 5'b01010; // Drive chsel. Get out of this state when falling edge of EOC detected (DOUT is ready for sample)\r\n                                                    // Read averaging fifo.\r\n                                                    // Capture DOUT into dout internal buffer register (dout_flp) \r\nlocalparam [4:0]    CONV_DLY1           = 5'b01011; // Additional state for processing when DOUT is ready. Perform averaging calculation (adds and minus operation). \r\nlocalparam [4:0]    PUTRESP             = 5'b01100; // Load response\r\nlocalparam [4:0]    PUTRESP_DLY1        = 5'b01101;\r\nlocalparam [4:0]    PUTRESP_DLY2        = 5'b01110;\r\nlocalparam [4:0]    PUTRESP_DLY3        = 5'b01111;\r\nlocalparam [4:0]    WAIT_PEND           = 5'b10000; // Get out of this state when falling edge of EOC detected (DOUT is ready for sample)\r\n                                                    // Read averaging fifo.\r\n                                                    // Capture DOUT into dout internal buffer register (dout_flp) \r\nlocalparam [4:0]    WAIT_PEND_DLY1      = 5'b10001; // Additional state for processing when DOUT is ready. Perform averaging calculation (adds and minus operation).\r\nlocalparam [4:0]    PUTRESP_PEND        = 5'b10010; // Load response\r\nlocalparam [4:0]    AVRG_CNT            = 5'b10011;\r\nlocalparam [4:0]    SYNC1               = 5'b10100; // Allocates 1 soft ip clock mismatch due to asynchronous between soft ip clock and ADC clock domain\r\n\r\nlocalparam [7:0]    NUM_AVRG_POINTS     = 8'd64;\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Double Synchronize control signal from ADC hardblock\r\n//--------------------------------------------------------------------------------------------//\r\naltera_std_synchronizer #(\r\n    .depth    (2)\r\n) u_clk_dft_synchronizer (\r\n    .clk        (clk),\r\n    .reset_n    (rst_n),\r\n    .din        (clk_dft),\r\n    .dout       (clk_dft_synch)\r\n);\r\n\r\naltera_std_synchronizer #(\r\n    .depth    (2)\r\n) u_eoc_synchronizer (\r\n    .clk        (clk),\r\n    .reset_n    (rst_n),\r\n    .din        (eoc),\r\n    .dout       (eoc_synch)\r\n);\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Edge detection for both synchronized clk_dft and eoc\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        clk_dft_synch_dly   <= 1'b0;\r\n        eoc_synch_dly       <= 1'b0;\r\n    end\r\n    else begin\r\n        clk_dft_synch_dly   <= clk_dft_synch;\r\n        eoc_synch_dly       <= eoc_synch;\r\n    end\r\nend\r\n\r\nassign clk_dft_lh   = clk_dft_synch & ~clk_dft_synch_dly;\r\nassign clk_dft_hl   = ~clk_dft_synch & clk_dft_synch_dly;\r\nassign eoc_hl       = ~eoc_synch & eoc_synch_dly;\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Dual ADC\r\n//--------------------------------------------------------------------------------------------//\r\n\r\ngenerate\r\nif (dual_adc_mode == 1) begin\r\n\r\n    // Buffer up ctrl_state\r\n    // To be used when both ADC is out of sync\r\n    always @(posedge clk or negedge rst_n) begin\r\n        if (!rst_n)\r\n            prev_ctrl_state   <= IDLE;\r\n        else\r\n            prev_ctrl_state   <= ctrl_state;\r\n    end\r\n\r\n    // Buffer up ctrl_state\r\n    // To be used when both ADC mismatches by 1 soft ip clock\r\n    always @(posedge clk or negedge rst_n) begin\r\n        if (!rst_n)\r\n            sync_ctrl_state   <= IDLE;\r\n        else\r\n            sync_ctrl_state   <= sync_ctrl_state_nxt;\r\n    end\r\n\r\nend\r\nelse begin\r\n\r\n    always @* begin\r\n        prev_ctrl_state = 5'h0;\r\n        sync_ctrl_state = 5'h0;\r\n    end\r\n\r\nend\r\nendgenerate\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Main FSM\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        ctrl_state   <= IDLE;\r\n    else\r\n        ctrl_state   <= ctrl_state_nxt;\r\nend\r\n\r\n\r\nalways @* begin\r\n\r\n    // Default assignment, perform assignment only at relevant state\r\n    sync_ctrl_state_nxt = sync_ctrl_state;\r\n    sync_valid          = 1'b0;\r\n\r\n    case (ctrl_state)\r\n        IDLE: begin\r\n            if (clk_in_pll_locked)\r\n                ctrl_state_nxt = PWRDWN;\r\n            else\r\n                ctrl_state_nxt = IDLE;\r\n        end\r\n\r\n        PWRDWN: begin\r\n            if (int_timer[6])\r\n                ctrl_state_nxt = PWRDWN_TSEN;\r\n            else\r\n                ctrl_state_nxt = PWRDWN;\r\n        end\r\n\r\n        PWRDWN_TSEN: begin\r\n            if (int_timer[7])\r\n                ctrl_state_nxt = PWRDWN_DONE;\r\n            else\r\n                ctrl_state_nxt = PWRDWN_TSEN;\r\n        end\r\n\r\n        PWRDWN_DONE: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (clk_dft_lh) begin\r\n                    if (sync_ready)\r\n                        ctrl_state_nxt = PWRUP_CH;\r\n                    else\r\n                        ctrl_state_nxt = SYNC1;\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = PWRDWN_DONE;\r\n                end\r\n\r\n                if (clk_dft_lh) begin\r\n                    sync_ctrl_state_nxt = PWRUP_CH;\r\n                    sync_valid          = 1'b1;\r\n                end\r\n                \r\n            end\r\n            else begin\r\n                if (clk_dft_lh)\r\n                    ctrl_state_nxt = PWRUP_CH;\r\n                else\r\n                    ctrl_state_nxt = PWRDWN_DONE;\r\n            end\r\n        end\r\n\r\n        PWRUP_CH: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (clk_dft_hl) begin\r\n                    if (sync_ready)\r\n                        ctrl_state_nxt = PWRUP_SOC;\r\n                    else\r\n                        ctrl_state_nxt = SYNC1;\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = PWRUP_CH;\r\n                end\r\n\r\n                if (clk_dft_hl) begin\r\n                    sync_ctrl_state_nxt = PWRUP_SOC;\r\n                    sync_valid          = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (clk_dft_hl)\r\n                    ctrl_state_nxt = PWRUP_SOC;\r\n                else\r\n                    ctrl_state_nxt = PWRUP_CH;\r\n            end\r\n        end\r\n\r\n        PWRUP_SOC: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (eoc_hl) begin\r\n                    if (sync_ready) begin\r\n                        if (cmd_fetched & ~cmd_is_rclb)\r\n                            ctrl_state_nxt = CONV;\r\n                        else if (cmd_fetched & cmd_is_rclb)\r\n                            ctrl_state_nxt = PUTRESP;\r\n                        else if (cmd_valid)\r\n                            ctrl_state_nxt = GETCMD;\r\n                        else\r\n                            ctrl_state_nxt = WAIT;\r\n                    end\r\n                    else begin\r\n                        ctrl_state_nxt = SYNC1;\r\n                    end\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = PWRUP_SOC;\r\n                end\r\n\r\n                if (eoc_hl) begin\r\n                    if (cmd_fetched & ~cmd_is_rclb)\r\n                        sync_ctrl_state_nxt = CONV;\r\n                    else if (cmd_fetched & cmd_is_rclb)\r\n                        sync_ctrl_state_nxt = PUTRESP;\r\n                    else if (cmd_valid)\r\n                        sync_ctrl_state_nxt = GETCMD;\r\n                    else\r\n                        sync_ctrl_state_nxt = WAIT;\r\n\r\n                    sync_valid  = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (cmd_fetched & ~cmd_is_rclb & eoc_hl)\r\n                    ctrl_state_nxt = CONV;\r\n                else if (cmd_fetched & cmd_is_rclb & eoc_hl)\r\n                    ctrl_state_nxt = PUTRESP;\r\n                else if (cmd_valid & eoc_hl)\r\n                    ctrl_state_nxt = GETCMD;\r\n                else if (eoc_hl)\r\n                    ctrl_state_nxt = WAIT;\r\n                else\r\n                    ctrl_state_nxt = PWRUP_SOC;\r\n            end\r\n        end\r\n\r\n        SYNC1: begin\r\n            if (sync_ready)\r\n                ctrl_state_nxt = sync_ctrl_state;   // mismatches by 1 soft ip clock, proceed to next state\r\n            else\r\n                ctrl_state_nxt = prev_ctrl_state;   // Both ADC is out of sync, go back to previous state\r\n\r\n            sync_valid  = 1'b1;\r\n\r\n        end\r\n        \r\n        WAIT: begin\r\n            if (cmd_valid)\r\n                ctrl_state_nxt = GETCMD_W;\r\n            else\r\n                ctrl_state_nxt = WAIT;\r\n        end\r\n\r\n        GETCMD_W: begin\r\n            if (cmd_is_rclb | adc_change_mode)\r\n                ctrl_state_nxt = PWRDWN;\r\n            else\r\n                ctrl_state_nxt = PRE_CONV;\r\n        end\r\n\r\n        PRE_CONV: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (eoc_hl) begin\r\n                    if (sync_ready)\r\n                        ctrl_state_nxt = CONV;\r\n                    else\r\n                        ctrl_state_nxt = SYNC1;\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = PRE_CONV;\r\n                end\r\n\r\n                if (eoc_hl) begin\r\n                    sync_ctrl_state_nxt = CONV;\r\n                    sync_valid          = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (eoc_hl)\r\n                    ctrl_state_nxt = CONV;\r\n                else\r\n                    ctrl_state_nxt = PRE_CONV;\r\n            end\r\n        end\r\n\r\n        GETCMD: begin\r\n            if ((cmd_is_rclb | adc_change_mode) & ~pend)\r\n                ctrl_state_nxt = PWRDWN;\r\n            else if ((cmd_is_rclb | adc_change_mode) & pend)\r\n                ctrl_state_nxt = WAIT_PEND;\r\n            else\r\n                ctrl_state_nxt = CONV;\r\n        end\r\n\r\n        CONV: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (eoc_hl) begin\r\n                    if (sync_ready) begin\r\n                        if (avrg_enable & ~avrg_cnt_done)\r\n                            ctrl_state_nxt = AVRG_CNT;\r\n                        else\r\n                            ctrl_state_nxt = CONV_DLY1;\r\n                    end\r\n                    else begin\r\n                        ctrl_state_nxt = SYNC1;\r\n                    end\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = CONV;\r\n                end\r\n\r\n                if (eoc_hl) begin\r\n                    if (avrg_enable & ~avrg_cnt_done)\r\n                        sync_ctrl_state_nxt = AVRG_CNT;\r\n                    else \r\n                        sync_ctrl_state_nxt = CONV_DLY1;\r\n\r\n                    sync_valid  = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (eoc_hl & avrg_enable & ~avrg_cnt_done)\r\n                    ctrl_state_nxt = AVRG_CNT;\r\n                else if (eoc_hl)\r\n                    ctrl_state_nxt = CONV_DLY1;\r\n                else\r\n                    ctrl_state_nxt = CONV;\r\n            end\r\n        end\r\n        \r\n        AVRG_CNT: begin\r\n            ctrl_state_nxt = CONV;\r\n        end\r\n        \r\n        CONV_DLY1: begin\r\n            ctrl_state_nxt = PUTRESP;\r\n        end\r\n\r\n        PUTRESP: begin\r\n            ctrl_state_nxt = PUTRESP_DLY1;\r\n        end\r\n        \r\n        PUTRESP_DLY1: begin\r\n            ctrl_state_nxt = PUTRESP_DLY2;\r\n        end\r\n        \r\n        PUTRESP_DLY2: begin\r\n            ctrl_state_nxt = PUTRESP_DLY3;\r\n        end\r\n\r\n        PUTRESP_DLY3: begin\r\n            if (cmd_valid)\r\n                ctrl_state_nxt = GETCMD;\r\n            else if (pend)\r\n                ctrl_state_nxt = WAIT_PEND;\r\n            else\r\n                ctrl_state_nxt = WAIT;\r\n        end\r\n\r\n        WAIT_PEND: begin\r\n            if (dual_adc_mode == 1) begin\r\n                if (eoc_hl) begin\r\n                    if (sync_ready)\r\n                        ctrl_state_nxt = WAIT_PEND_DLY1;\r\n                    else\r\n                        ctrl_state_nxt = SYNC1;\r\n                end\r\n                else begin\r\n                    ctrl_state_nxt = WAIT_PEND;\r\n                end\r\n\r\n                if (eoc_hl) begin\r\n                    sync_ctrl_state_nxt = WAIT_PEND_DLY1;\r\n                    sync_valid          = 1'b1;\r\n                end\r\n\r\n            end\r\n            else begin\r\n                if (eoc_hl)\r\n                    ctrl_state_nxt = WAIT_PEND_DLY1;\r\n                else\r\n                    ctrl_state_nxt = WAIT_PEND;\r\n            end\r\n        end\r\n        \r\n        WAIT_PEND_DLY1: begin\r\n            ctrl_state_nxt = PUTRESP_PEND;\r\n        end\r\n        \r\n        PUTRESP_PEND: begin\r\n            if (cmd_valid)\r\n                ctrl_state_nxt = GETCMD;\r\n            else\r\n                ctrl_state_nxt = WAIT;\r\n        end\r\n\r\n        default: begin\r\n            ctrl_state_nxt = IDLE;\r\n        end\r\n\r\n    endcase\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// ADC control signal generation from FSM\r\n//--------------------------------------------------------------------------------------------//\r\nalways @* begin\r\n    chsel_nxt       = chsel;\r\n    soc_nxt         = soc;\r\n    usr_pwd_nxt     = usr_pwd;\r\n    tsen_nxt        = tsen;\r\n\r\n    case (ctrl_state_nxt)\r\n        IDLE: begin\r\n            chsel_nxt   = 5'b11110;\r\n            soc_nxt     = 1'b0;\r\n            usr_pwd_nxt = 1'b1;\r\n            tsen_nxt    = 1'b0;\r\n        end\r\n\r\n        PWRDWN: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = 1'b0;\r\n            usr_pwd_nxt = 1'b1;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PWRDWN_TSEN: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = 1'b0;\r\n            usr_pwd_nxt = 1'b1;\r\n            if (cmd_fetched & cmd_is_ts)        // Transition to TS mode\r\n                tsen_nxt    = 1'b1;\r\n            else if (cmd_fetched & cmd_is_rclb) // In recalibration mode, maintain previous TSEN setting\r\n                tsen_nxt    = tsen;\r\n            else\r\n                tsen_nxt    = 1'b0;             // Transition to Normal mode\r\n        end\r\n\r\n        PWRDWN_DONE: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = 1'b0;\r\n            usr_pwd_nxt = 1'b0;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PWRUP_CH: begin\r\n            chsel_nxt   = 5'b11110;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = 1'b0;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PWRUP_SOC: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = 1'b1;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        SYNC1: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        WAIT: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        GETCMD_W: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PRE_CONV: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        GETCMD: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        CONV: begin\r\n            chsel_nxt   = cmd_channel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        AVRG_CNT: begin\r\n            chsel_nxt   = cmd_channel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        CONV_DLY1: begin\r\n            chsel_nxt   = cmd_channel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PUTRESP: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        PUTRESP_DLY1: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PUTRESP_DLY2: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        PUTRESP_DLY3: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        WAIT_PEND: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        WAIT_PEND_DLY1: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n\r\n        PUTRESP_PEND: begin\r\n            chsel_nxt   = chsel;\r\n            soc_nxt     = soc;\r\n            usr_pwd_nxt = usr_pwd;\r\n            tsen_nxt    = tsen;\r\n        end\r\n        \r\n        default: begin\r\n            chsel_nxt   = 5'bx;\r\n            soc_nxt     = 1'bx;\r\n            usr_pwd_nxt = 1'bx;\r\n            tsen_nxt    = 1'bx;\r\n        end\r\n\r\n    endcase\r\nend\r\n\r\n\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        chsel       <= 5'b11110;\r\n        soc         <= 1'b0;\r\n        usr_pwd     <= 1'b1;\r\n        tsen        <= 1'b0;\r\n    end\r\n    else begin\r\n        chsel       <= chsel_nxt;\r\n        soc         <= soc_nxt;\r\n        usr_pwd     <= usr_pwd_nxt;\r\n        tsen        <= tsen_nxt;\r\n\r\n    end\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Control signal from FSM arc transition\r\n//--------------------------------------------------------------------------------------------//\r\n// These 3 events indicate DOUT from ADC hardblock is ready to be consumed.\r\nassign arc_conv_conv_dly1               = (ctrl_state == CONV) & (ctrl_state_nxt == CONV_DLY1);\r\nassign arc_wait_pend_wait_pend_dly1     = (ctrl_state == WAIT_PEND) & (ctrl_state_nxt == WAIT_PEND_DLY1);\r\nassign arc_to_avrg_cnt                  = ((ctrl_state == CONV) & (ctrl_state_nxt == AVRG_CNT)) | ((ctrl_state == SYNC1) & (ctrl_state_nxt == AVRG_CNT));\r\n\r\n// CONV to CONV_DLY1 can also be trasition from SYNC1 in dual adc mode \r\n// WAIT_PEND to WAIT_PEND_DLY1 can also be trasition from SYNC1 in dual adc mode \r\nassign arc_sync1_conv_dly1              = (ctrl_state == SYNC1) & (ctrl_state_nxt == CONV_DLY1);        // prev_ctrl_state is guaranteed by design to be CONV\r\nassign arc_sync1_wait_pend_dly1         = (ctrl_state == SYNC1) & (ctrl_state_nxt == WAIT_PEND_DLY1);   // prev_ctrl_state is guaranteed by design to be WAIT_PEND\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Control signal from FSM current state\r\n//--------------------------------------------------------------------------------------------//\r\nassign putresp_s        = (ctrl_state == PUTRESP);\r\nassign putresp_pend_s   = (ctrl_state == PUTRESP_PEND);\r\nassign pwrdwn_s         = (ctrl_state == PWRDWN);\r\nassign pwrdwn_tsen_s    = (ctrl_state == PWRDWN_TSEN);\r\nassign avrg_cnt_s       = (ctrl_state == AVRG_CNT);\r\nassign wait_pend_dly1_s = (ctrl_state == WAIT_PEND_DLY1);\r\nassign conv_dly1_s      = (ctrl_state == CONV_DLY1);\r\nassign conv_s           = (ctrl_state == CONV);\r\nassign putresp_dly3_s   = (ctrl_state == PUTRESP_DLY3);\r\n\r\n\r\n\r\n// Load Response when\r\n// 1) In putresp state and there is pending response\r\n// 2) In putresp_pend state\r\nassign load_rsp                     = (putresp_s & ~cmd_is_rclb & pend) | putresp_pend_s;\r\nassign load_dout                    = ((arc_conv_conv_dly1 | arc_sync1_conv_dly1) & ~cmd_is_rclb & pend) | arc_wait_pend_wait_pend_dly1 | arc_sync1_wait_pend_dly1 | ((int_timer != 8'h0) & arc_to_avrg_cnt);\r\nassign load_cmd_ready               = putresp_s;\r\nassign arc_to_conv                  = (ctrl_state != CONV) & (ctrl_state != AVRG_CNT) & ~((ctrl_state == SYNC1) & (prev_ctrl_state == CONV)) & (ctrl_state_nxt == CONV);\r\n\r\nassign arc_getcmd_w_pwrdwn          = (ctrl_state == GETCMD_W) & (ctrl_state_nxt == PWRDWN);\r\nassign arc_getcmd_pwrdwn            = (ctrl_state == GETCMD) & (ctrl_state_nxt == PWRDWN);\r\nassign load_cmd_fetched             = arc_getcmd_w_pwrdwn | arc_getcmd_pwrdwn;\r\nassign load_int_timer               = arc_getcmd_w_pwrdwn | arc_getcmd_pwrdwn | arc_to_conv; // arc_to_conv is added for averaging\r\nassign incr_int_timer               = pwrdwn_s | pwrdwn_tsen_s | avrg_cnt_s; \r\n\r\nassign arc_out_from_pwrup_soc       = ((ctrl_state == PWRUP_SOC) & (ctrl_state_nxt != PWRUP_SOC) & (ctrl_state_nxt != SYNC1)) |\r\n                                        ((ctrl_state == SYNC1) & (prev_ctrl_state == PWRUP_SOC) & (ctrl_state_nxt != PWRUP_SOC));\r\nassign clr_cmd_fetched              = arc_out_from_pwrup_soc;\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Control signal required by FSM\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_is_rclb      = (cmd_channel == 5'b11111);\r\nassign cmd_is_ts        = (cmd_channel == 5'b10001);\r\nassign adc_change_mode  = (~prev_cmd_is_ts & cmd_is_ts) | (prev_cmd_is_ts & ~cmd_is_ts);\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        prev_cmd_is_ts  <= 1'b0;\r\n    else if (load_cmd_ready & ~cmd_is_rclb)\r\n        prev_cmd_is_ts  <= cmd_is_ts;\r\nend\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        cmd_fetched  <= 1'b0;\r\n    else if (load_cmd_fetched)\r\n        cmd_fetched  <= 1'b1;\r\n    else if (clr_cmd_fetched)\r\n        cmd_fetched  <= 1'b0;\r\nend\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        conv_dly1_s_flp <= 1'b0;\r\n    else\r\n        conv_dly1_s_flp <= conv_dly1_s;\r\nend\r\n\r\n// Using conv_dly1_s_flp instead of (ctrl_state == PUTRESP) to set the pend flag\r\n// This is to cover cases where during recalibration the state can go from PWRUP_SOC to PUTRESP directly \r\n// In averaging pend is set at pt 63, leaving pt 64 to be captured at WAIT PEND state (consistent with non-averaging)\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        pend <= 1'b0;\r\n    else if (conv_dly1_s_flp)\r\n        pend <= 1'b1;\r\n    else if (wait_pend_dly1_s)\r\n        pend <= 1'b0;\r\n\r\nend\r\n\r\n\r\n//------------------------------------------------------------------------------------------------------------------//\r\n// Register the DOUT bus from ADC hardblock\r\n// This eliminates sampling invalid DOUT bus (validity of DOUT bus is limited by TDAC timing spec of ADC hardblock) \r\n// if latency of load_rsp increases in future\r\n// Example: Previously DOUT is consumed by the design 2 clocks from falling edge of EOC\r\n//          Without this register, to support averaging, DOUT is consumed by the design 4 clocks from falling edge of EOC\r\n//          (additional 2 clocks for RAM accesses) \r\n//------------------------------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        dout_flp <= 12'd0;\r\n    else if (load_dout) \r\n        dout_flp <= dout;\r\nend\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Internal timer to ensure soft power down stays at least for 1us\r\n// Also used as AVRG counter\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        int_timer <= 8'h0;\r\n    else if (load_int_timer)\r\n        int_timer <= 8'h0;\r\n    else if (incr_int_timer)\r\n        int_timer <= int_timer + 8'h1;\r\nend\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        avrg_cnt_done <= 1'b0;\r\n    else if ((int_timer == (NUM_AVRG_POINTS - 8'd1)) & conv_s)\r\n        avrg_cnt_done <= 1'b1;\r\n    else if (clear_avrg_cnt_done)\r\n        avrg_cnt_done <= 1'b0;\r\nend\r\n\r\nassign clear_avrg_cnt_done = putresp_dly3_s & ~cmd_valid; // Restart 64 point sampling if continuous sample is broken  \r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Store up CMD information due to \r\n// Resp is always one clk_dft later from current cmd (ADC hardblock characteristic)\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        cmd_channel_dly <= 5'h0;\r\n        cmd_sop_dly     <= 1'b0;\r\n        cmd_eop_dly     <= 1'b0;\r\n    end\r\n    else if (load_cmd_ready) begin\r\n        cmd_channel_dly <= cmd_channel;\r\n        cmd_sop_dly     <= cmd_sop;\r\n        cmd_eop_dly     <= cmd_eop;\r\n    end\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Averaging logic \r\n// \r\n//--------------------------------------------------------------------------------------------//\r\n// Only temperature sensing mode has averaging feature\r\nassign avrg_enable = cmd_is_ts;\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        avrg_sum    <= 18'h0;\r\n    else if (clear_avrg_sum)\r\n        avrg_sum    <= 18'h0;\r\n    else if (add_avrg_sum_run)\r\n        avrg_sum  <= (avrg_sum - fifo_q) + {6'h0, dout_flp};\r\n    else if (add_avrg_sum)\r\n        avrg_sum  <= avrg_sum + {6'h0, dout_flp};\r\nend\r\n\r\nassign add_avrg_sum     = ((int_timer != 8'h0) & avrg_cnt_s) |  // when int_timer == 0 the DOUT is not yet ready (ADC hard block introduce one ADC clock delay in the ADC output) \r\n                            (conv_dly1_s & avrg_enable & pend) |    // cover averaging pt 64 and beyond (in back 2 back TS scenario)\r\n                            (conv_dly1_s & avrg_enable & ~pend & ~frst_64_ptr_done) | // cover averaging pt 63\r\n                            (wait_pend_dly1_s & prev_cmd_is_ts); // cover averaging pt 64 and beyond (in switching between ts to non-ts scenario)\r\n\r\nassign add_avrg_sum_run = set_frst_64_ptr_done & frst_64_ptr_done;\r\n\r\nassign clear_avrg_sum           = ~avrg_cnt_done & putresp_pend_s;  // Restart 64 point sampling if continuous sample is broken\r\n                                                                    // Not avrg_cnt_done is to ensure put response pending state is caused by broken continuous sampling\r\n\r\nassign set_frst_64_ptr_done     = (wait_pend_dly1_s & prev_cmd_is_ts) | // set at averaging pt 64 and beyond (where next conversion is non-ts)\r\n                                    (conv_dly1_s & avrg_enable & pend); // set at averaging pt 64 and beyond (where next conversion is ts)\r\n                                                                        // No harm to set this signal beyond pt 64\r\n\r\nassign clear_frst_64_ptr_done   = clear_avrg_sum;\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        frst_64_ptr_done <= 1'b0;\r\n    else if (set_frst_64_ptr_done)\r\n        frst_64_ptr_done <= 1'b1;\r\n    else if (clear_frst_64_ptr_done)\r\n        frst_64_ptr_done <= 1'b0;\r\nend\r\n\r\nassign fifo_sclr    = clear_avrg_sum;\r\nassign fifo_rdreq   = (((arc_wait_pend_wait_pend_dly1 | arc_sync1_wait_pend_dly1) & prev_cmd_is_ts) | ((arc_conv_conv_dly1 | arc_sync1_conv_dly1) & avrg_enable & pend)) & frst_64_ptr_done;\r\nassign fifo_wrreq   = ((int_timer != 8'h0) & avrg_cnt_s) |\r\n                        (conv_dly1_s & avrg_enable & pend) |\r\n                        (conv_dly1_s & avrg_enable & ~pend & ~frst_64_ptr_done) |\r\n                        (wait_pend_dly1_s & prev_cmd_is_ts);\r\n\r\naltera_modular_adc_control_avrg_fifo ts_avrg_fifo (\r\n    .clock      (clk),\r\n    .data       (dout_flp),\r\n    .rdreq      (fifo_rdreq),\r\n    .wrreq      (fifo_wrreq),\r\n    .sclr       (fifo_sclr),\r\n    .empty      (),\r\n    .full       (),\r\n    .q          (fifo_q)\r\n);\r\n\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Avalon ST response interface output register\r\n// Avalon ST command interface output register (cmd_ready)\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        rsp_valid   <= 1'b0;\r\n        rsp_channel <= 5'h0;\r\n        rsp_data    <= 12'h0;\r\n        rsp_sop     <= 1'b0;\r\n        rsp_eop     <= 1'b0;\r\n    end\r\n    else if (load_rsp) begin\r\n        rsp_valid   <= 1'b1;\r\n        rsp_channel <= cmd_channel_dly;\r\n        rsp_data    <= rsp_data_nxt;\r\n        rsp_sop     <= cmd_sop_dly;\r\n        rsp_eop     <= cmd_eop_dly;\r\n    end \r\n    else begin\r\n        rsp_valid   <= 1'b0;\r\n        rsp_channel <= 5'h0;\r\n        rsp_data    <= 12'h0;\r\n        rsp_sop     <= 1'b0;\r\n        rsp_eop     <= 1'b0;\r\n    end\r\nend\r\n\r\ngenerate\r\nif (is_this_first_or_second_adc == 2) begin\r\n    assign rsp_data_nxt = prev_cmd_is_ts ? 12'h0 : dout_flp;    // For ADC2, mask out TSD value since TSD is not supported in ADC2\r\nend\r\nelse begin\r\n    assign rsp_data_nxt = prev_cmd_is_ts ? avrg_sum[17:6] : dout_flp;\r\nend\r\nendgenerate\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        cmd_ready   <= 1'b0;\r\n    else if (load_cmd_ready)\r\n        cmd_ready   <= 1'b1;\r\n    else\r\n        cmd_ready   <= 1'b0;\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_sample_store.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_sample_store #(\r\n    parameter DUAL_ADC_MODE     = 0,\r\n    parameter RSP_DATA_WIDTH    = 12\r\n) (\r\n    input                       clk,\r\n    input                       rst_n,\r\n    input [6:0]                 addr,\r\n    input                       read,\r\n    input                       write,\r\n    input [31:0]                writedata,\r\n    input                       rsp_valid,\r\n    input [4:0]                 rsp_channel,\r\n    input [RSP_DATA_WIDTH-1:0]  rsp_data,\r\n    input                       rsp_sop,\r\n    input                       rsp_eop,\r\n    output reg [31:0]           readdata,\r\n    output reg                  irq\r\n\r\n);\r\n\r\nlocalparam RAM_DATA_WIDTH = (DUAL_ADC_MODE == 1) ? 32 : 16;\r\n\r\nreg                         e_eop;\r\nreg                         s_eop;\r\nreg [31:0]                  csr_readdata;\r\nreg                         ram_rd_en_flp;\r\nreg [5:0]                   slot_num;\r\n\r\nwire                        ier_addr;\r\nwire                        isr_addr;\r\nwire                        ram_addr;\r\nwire                        ier_wr_en;\r\nwire                        isr_wr_en;\r\nwire                        ier_rd_en;\r\nwire                        isr_rd_en;\r\nwire                        ram_rd_en;\r\nwire                        set_eop;\r\nwire [31:0]                 csr_readdata_nxt;\r\nwire [31:0]                 ier_internal;\r\nwire [31:0]                 isr_internal;\r\nwire [31:0]                 readdata_nxt;\r\nwire [RAM_DATA_WIDTH-1:0]   q_out;\r\nwire                        irq_nxt;\r\nwire [RAM_DATA_WIDTH-1:0]   ram_datain;\r\nwire [RAM_DATA_WIDTH-1:0]   ram_readdata;\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// address decode\r\n//--------------------------------------------------------------------------------------------//\r\nassign ier_addr = (addr == 7'h40);\r\nassign isr_addr = (addr == 7'h41);\r\nassign ram_addr = (addr < 7'h40);\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// write enable\r\n//--------------------------------------------------------------------------------------------//\r\nassign ier_wr_en = ier_addr & write;\r\nassign isr_wr_en = isr_addr & write;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// read enable\r\n//--------------------------------------------------------------------------------------------//\r\nassign ier_rd_en = ier_addr & read;\r\nassign isr_rd_en = isr_addr & read;\r\nassign ram_rd_en = ram_addr & read;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// interrupt enable register\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        e_eop <= 1'b1;\r\n    else if (ier_wr_en)\r\n        e_eop <= writedata[0];\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// interrupt status register\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        s_eop <= 1'b0;\r\n    else if (set_eop)\r\n        s_eop <= 1'b1;\r\n    else if (isr_wr_en & writedata[0])\r\n        s_eop <= 1'b0;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Avalon slave readdata path - read latency of 2 due to RAM's address and dataout register\r\n//--------------------------------------------------------------------------------------------//\r\nassign ier_internal     = {31'h0, e_eop};\r\nassign isr_internal     = {31'h0, s_eop};\r\nassign csr_readdata_nxt = (ier_internal & {32{ier_rd_en}}) |\r\n                            (isr_internal & {32{isr_rd_en}});\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        csr_readdata <= 32'h0;\r\n    else\r\n        csr_readdata <= csr_readdata_nxt;\r\nend\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        ram_rd_en_flp <= 1'b0;\r\n    else\r\n        ram_rd_en_flp <= ram_rd_en;\r\nend\r\n\r\nassign readdata_nxt = ram_rd_en_flp ? ram_readdata : csr_readdata;\r\nassign ram_readdata = q_out[RAM_DATA_WIDTH-1:0]; \r\n\r\n\r\ngenerate\r\nif (DUAL_ADC_MODE) begin\r\n    assign ram_datain   = {4'h0, rsp_data[23:12], 4'h0, rsp_data[11:0]};\r\nend\r\nelse begin\r\n    assign ram_datain   = {4'h0, rsp_data};\r\nend\r\nendgenerate\r\n\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        readdata <= 32'h0;\r\n    else\r\n        readdata <= readdata_nxt;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// RAM to store ADC sample\r\n//--------------------------------------------------------------------------------------------//\r\naltera_modular_adc_sample_store_ram #(\r\n    .DATA_WIDTH (RAM_DATA_WIDTH)    \r\n) u_ss_ram (\r\n    .clock      (clk),\r\n    .data       (ram_datain),\r\n    .rdaddress  (addr[5:0]),\r\n    .rden       (ram_rd_en),\r\n    .wraddress  (slot_num),\r\n    .wren       (rsp_valid),\r\n    .q          (q_out)\r\n\r\n);\r\n\r\n//assign ram_datain = (DUAL_ADC_MODE == 1) ? ({8'h0, rsp_data}) : ({4'h0, rsp_data});\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Sequential counter to indicate which RAM location to store ADC sample\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        slot_num <= 6'h0;\r\n    else if (set_eop)\r\n        slot_num <= 6'h0;\r\n    else if (rsp_valid)\r\n        slot_num <= slot_num + 6'h1; \r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Set EOP status\r\n//--------------------------------------------------------------------------------------------//\r\nassign set_eop = rsp_valid & rsp_eop;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// IRQ\r\n//--------------------------------------------------------------------------------------------//\r\nassign irq_nxt = e_eop & s_eop;\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        irq <= 1'b0;\r\n    else\r\n        irq <= irq_nxt;\r\nend\r\n\r\n\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_sample_store_ram.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// megafunction wizard: %RAM: 2-PORT%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: altera_modular_adc_sample_store_ram.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 14.1.0 Internal Build 94 06/25/2014 PN Full Version\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2014 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule altera_modular_adc_sample_store_ram #(\r\n    parameter DATA_WIDTH = 16\r\n) (\r\n\tclock,\r\n\tdata,\r\n\trdaddress,\r\n\trden,\r\n\twraddress,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t  clock;\r\n\tinput\t[DATA_WIDTH-1:0]  data;\r\n\tinput\t[5:0]  rdaddress;\r\n\tinput\t  rden;\r\n\tinput\t[5:0]  wraddress;\r\n\tinput\t  wren;\r\n\toutput\t[DATA_WIDTH-1:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n\ttri1\t  rden;\r\n\ttri0\t  wren;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [DATA_WIDTH-1:0] sub_wire0;\r\n\twire [DATA_WIDTH-1:0] q = sub_wire0[DATA_WIDTH-1:0];\r\n\r\n\taltsyncram\taltsyncram_component (\r\n\t\t\t\t.address_a (wraddress),\r\n\t\t\t\t.address_b (rdaddress),\r\n\t\t\t\t.clock0 (clock),\r\n\t\t\t\t.data_a (data),\r\n\t\t\t\t.rden_b (rden),\r\n\t\t\t\t.wren_a (wren),\r\n\t\t\t\t.q_b (sub_wire0),\r\n\t\t\t\t.aclr0 (1'b0),\r\n\t\t\t\t.aclr1 (1'b0),\r\n\t\t\t\t.addressstall_a (1'b0),\r\n\t\t\t\t.addressstall_b (1'b0),\r\n\t\t\t\t.byteena_a (1'b1),\r\n\t\t\t\t.byteena_b (1'b1),\r\n\t\t\t\t.clock1 (1'b1),\r\n\t\t\t\t.clocken0 (1'b1),\r\n\t\t\t\t.clocken1 (1'b1),\r\n\t\t\t\t.clocken2 (1'b1),\r\n\t\t\t\t.clocken3 (1'b1),\r\n\t\t\t\t.data_b ({DATA_WIDTH{1'b1}}),\r\n\t\t\t\t.eccstatus (),\r\n\t\t\t\t.q_a (),\r\n\t\t\t\t.rden_a (1'b1),\r\n\t\t\t\t.wren_b (1'b0));\r\n\tdefparam\r\n\t\taltsyncram_component.address_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.address_reg_b = \"CLOCK0\",\r\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_input_b = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_output_b = \"BYPASS\",\r\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\r\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\r\n\t\taltsyncram_component.numwords_a = 64,\r\n\t\taltsyncram_component.numwords_b = 64,\r\n\t\taltsyncram_component.operation_mode = \"DUAL_PORT\",\r\n\t\taltsyncram_component.outdata_aclr_b = \"NONE\",\r\n\t\taltsyncram_component.outdata_reg_b = \"UNREGISTERED\",\r\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\r\n\t\taltsyncram_component.ram_block_type = \"M9K\",\r\n\t\taltsyncram_component.rdcontrol_reg_b = \"CLOCK0\",\r\n\t\taltsyncram_component.read_during_write_mode_mixed_ports = \"OLD_DATA\",\r\n\t\taltsyncram_component.widthad_a = 6,\r\n\t\taltsyncram_component.widthad_b = 6,\r\n\t\taltsyncram_component.width_a = DATA_WIDTH,\r\n\t\taltsyncram_component.width_b = DATA_WIDTH,\r\n\t\taltsyncram_component.width_byteena_a = 1;\r\n\r\n\r\nendmodule\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_sequencer.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_sequencer #(\r\n    parameter   DUAL_ADC_MODE   = 0,\r\n    parameter   CSD_LENGTH      = 64,\r\n    parameter   CSD_SLOT_0      = 5'h0,\r\n    parameter   CSD_SLOT_1      = 5'h0,\r\n    parameter   CSD_SLOT_2      = 5'h0,\r\n    parameter   CSD_SLOT_3      = 5'h0,\r\n    parameter   CSD_SLOT_4      = 5'h0,\r\n    parameter   CSD_SLOT_5      = 5'h0,\r\n    parameter   CSD_SLOT_6      = 5'h0,\r\n    parameter   CSD_SLOT_7      = 5'h0,\r\n    parameter   CSD_SLOT_8      = 5'h0,\r\n    parameter   CSD_SLOT_9      = 5'h0,\r\n    parameter   CSD_SLOT_10     = 5'h0,\r\n    parameter   CSD_SLOT_11     = 5'h0,\r\n    parameter   CSD_SLOT_12     = 5'h0,\r\n    parameter   CSD_SLOT_13     = 5'h0,\r\n    parameter   CSD_SLOT_14     = 5'h0,\r\n    parameter   CSD_SLOT_15     = 5'h0,\r\n    parameter   CSD_SLOT_16     = 5'h0,\r\n    parameter   CSD_SLOT_17     = 5'h0,\r\n    parameter   CSD_SLOT_18     = 5'h0,\r\n    parameter   CSD_SLOT_19     = 5'h0,\r\n    parameter   CSD_SLOT_20     = 5'h0,\r\n    parameter   CSD_SLOT_21     = 5'h0,\r\n    parameter   CSD_SLOT_22     = 5'h0,\r\n    parameter   CSD_SLOT_23     = 5'h0,\r\n    parameter   CSD_SLOT_24     = 5'h0,\r\n    parameter   CSD_SLOT_25     = 5'h0,\r\n    parameter   CSD_SLOT_26     = 5'h0,\r\n    parameter   CSD_SLOT_27     = 5'h0,\r\n    parameter   CSD_SLOT_28     = 5'h0,\r\n    parameter   CSD_SLOT_29     = 5'h0,\r\n    parameter   CSD_SLOT_30     = 5'h0,\r\n    parameter   CSD_SLOT_31     = 5'h0,\r\n    parameter   CSD_SLOT_32     = 5'h0,\r\n    parameter   CSD_SLOT_33     = 5'h0,\r\n    parameter   CSD_SLOT_34     = 5'h0,\r\n    parameter   CSD_SLOT_35     = 5'h0,\r\n    parameter   CSD_SLOT_36     = 5'h0,\r\n    parameter   CSD_SLOT_37     = 5'h0,\r\n    parameter   CSD_SLOT_38     = 5'h0,\r\n    parameter   CSD_SLOT_39     = 5'h0,\r\n    parameter   CSD_SLOT_40     = 5'h0,\r\n    parameter   CSD_SLOT_41     = 5'h0,\r\n    parameter   CSD_SLOT_42     = 5'h0,\r\n    parameter   CSD_SLOT_43     = 5'h0,\r\n    parameter   CSD_SLOT_44     = 5'h0,\r\n    parameter   CSD_SLOT_45     = 5'h0,\r\n    parameter   CSD_SLOT_46     = 5'h0,\r\n    parameter   CSD_SLOT_47     = 5'h0,\r\n    parameter   CSD_SLOT_48     = 5'h0,\r\n    parameter   CSD_SLOT_49     = 5'h0,\r\n    parameter   CSD_SLOT_50     = 5'h0,\r\n    parameter   CSD_SLOT_51     = 5'h0,\r\n    parameter   CSD_SLOT_52     = 5'h0,\r\n    parameter   CSD_SLOT_53     = 5'h0,\r\n    parameter   CSD_SLOT_54     = 5'h0,\r\n    parameter   CSD_SLOT_55     = 5'h0,\r\n    parameter   CSD_SLOT_56     = 5'h0,\r\n    parameter   CSD_SLOT_57     = 5'h0,\r\n    parameter   CSD_SLOT_58     = 5'h0,\r\n    parameter   CSD_SLOT_59     = 5'h0,\r\n    parameter   CSD_SLOT_60     = 5'h0,\r\n    parameter   CSD_SLOT_61     = 5'h0,\r\n    parameter   CSD_SLOT_62     = 5'h0,\r\n    parameter   CSD_SLOT_63     = 5'h0,\r\n    parameter   CSD_SLOT_0_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_1_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_2_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_3_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_4_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_5_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_6_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_7_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_8_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_9_ADC2     = 5'h0,\r\n    parameter   CSD_SLOT_10_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_11_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_12_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_13_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_14_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_15_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_16_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_17_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_18_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_19_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_20_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_21_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_22_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_23_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_24_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_25_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_26_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_27_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_28_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_29_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_30_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_31_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_32_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_33_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_34_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_35_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_36_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_37_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_38_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_39_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_40_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_41_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_42_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_43_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_44_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_45_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_46_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_47_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_48_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_49_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_50_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_51_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_52_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_53_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_54_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_55_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_56_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_57_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_58_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_59_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_60_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_61_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_62_ADC2    = 5'h0,\r\n    parameter   CSD_SLOT_63_ADC2    = 5'h0\r\n) (\r\n    input           clk,\r\n    input           rst_n,\r\n    input           addr,\r\n    input           read,\r\n    input           write,\r\n    input [31:0]    writedata,\r\n    input           cmd_ready,\r\n    input           cmd_ready_2,\r\n\r\n    output [31:0]   readdata,\r\n    output          cmd_valid,\r\n    output [4:0]    cmd_channel,\r\n    output          cmd_sop,\r\n    output          cmd_eop,\r\n    output          cmd_valid_2,\r\n    output [4:0]    cmd_channel_2,\r\n    output          cmd_sop_2,\r\n    output          cmd_eop_2\r\n\r\n);\r\n\r\nwire        clr_run;\r\nwire        clr_run_2;\r\nwire        run;\r\nwire        sw_clr_run;\r\nwire        con_mode;\r\nwire        single_mode;\r\nwire        recab_mode;\r\n\r\nfunction integer clog2;\r\n    input [31:0] value;  // Input variable\r\n    if (value == 32'h0) begin\r\n       clog2 = 1;\r\n    end\r\n    else begin\r\n        for (clog2=0; value>0; clog2=clog2+1) \r\n            value = value>>'d1;\r\n    end\r\nendfunction\r\n\r\n\r\nlocalparam CSD_ASIZE = clog2(CSD_LENGTH - 1);\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// CSR block instantiation\r\n//--------------------------------------------------------------------------------------------//\r\naltera_modular_adc_sequencer_csr u_seq_csr (\r\n    // inputs\r\n    .clk            (clk),\r\n    .rst_n          (rst_n),\r\n    .addr           (addr),\r\n    .read           (read),\r\n    .write          (write),\r\n    .writedata      (writedata),\r\n    .clr_run        (clr_run),      // clr_run and clr_run_2 shall assert/de-assert at the same cycle (design requirement)\r\n                                    // therefore, only one of them is feed back into csr block\r\n    // outputs        \r\n    .readdata       (readdata),\r\n    .run            (run),\r\n    .sw_clr_run     (sw_clr_run),\r\n    .con_mode       (con_mode),\r\n    .single_mode    (single_mode),\r\n    .recab_mode     (recab_mode)\r\n\r\n);\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Sequencer control block instantiation\r\n//--------------------------------------------------------------------------------------------//\r\naltera_modular_adc_sequencer_ctrl #(\r\n    .CSD_LENGTH    (CSD_LENGTH),\r\n    .CSD_ASIZE     (CSD_ASIZE),\r\n    .CSD_SLOT_0    (CSD_SLOT_0),\r\n    .CSD_SLOT_1    (CSD_SLOT_1),\r\n    .CSD_SLOT_2    (CSD_SLOT_2),\r\n    .CSD_SLOT_3    (CSD_SLOT_3),\r\n    .CSD_SLOT_4    (CSD_SLOT_4),\r\n    .CSD_SLOT_5    (CSD_SLOT_5),\r\n    .CSD_SLOT_6    (CSD_SLOT_6),\r\n    .CSD_SLOT_7    (CSD_SLOT_7),\r\n    .CSD_SLOT_8    (CSD_SLOT_8),\r\n    .CSD_SLOT_9    (CSD_SLOT_9),\r\n    .CSD_SLOT_10   (CSD_SLOT_10),\r\n    .CSD_SLOT_11   (CSD_SLOT_11),\r\n    .CSD_SLOT_12   (CSD_SLOT_12),\r\n    .CSD_SLOT_13   (CSD_SLOT_13),\r\n    .CSD_SLOT_14   (CSD_SLOT_14),\r\n    .CSD_SLOT_15   (CSD_SLOT_15),\r\n    .CSD_SLOT_16   (CSD_SLOT_16),\r\n    .CSD_SLOT_17   (CSD_SLOT_17),\r\n    .CSD_SLOT_18   (CSD_SLOT_18),\r\n    .CSD_SLOT_19   (CSD_SLOT_19),\r\n    .CSD_SLOT_20   (CSD_SLOT_20),\r\n    .CSD_SLOT_21   (CSD_SLOT_21),\r\n    .CSD_SLOT_22   (CSD_SLOT_22),\r\n    .CSD_SLOT_23   (CSD_SLOT_23),\r\n    .CSD_SLOT_24   (CSD_SLOT_24),\r\n    .CSD_SLOT_25   (CSD_SLOT_25),\r\n    .CSD_SLOT_26   (CSD_SLOT_26),\r\n    .CSD_SLOT_27   (CSD_SLOT_27),\r\n    .CSD_SLOT_28   (CSD_SLOT_28),\r\n    .CSD_SLOT_29   (CSD_SLOT_29),\r\n    .CSD_SLOT_30   (CSD_SLOT_30),\r\n    .CSD_SLOT_31   (CSD_SLOT_31),\r\n    .CSD_SLOT_32   (CSD_SLOT_32),\r\n    .CSD_SLOT_33   (CSD_SLOT_33),\r\n    .CSD_SLOT_34   (CSD_SLOT_34),\r\n    .CSD_SLOT_35   (CSD_SLOT_35),\r\n    .CSD_SLOT_36   (CSD_SLOT_36),\r\n    .CSD_SLOT_37   (CSD_SLOT_37),\r\n    .CSD_SLOT_38   (CSD_SLOT_38),\r\n    .CSD_SLOT_39   (CSD_SLOT_39),\r\n    .CSD_SLOT_40   (CSD_SLOT_40),\r\n    .CSD_SLOT_41   (CSD_SLOT_41),\r\n    .CSD_SLOT_42   (CSD_SLOT_42),\r\n    .CSD_SLOT_43   (CSD_SLOT_43),\r\n    .CSD_SLOT_44   (CSD_SLOT_44),\r\n    .CSD_SLOT_45   (CSD_SLOT_45),\r\n    .CSD_SLOT_46   (CSD_SLOT_46),\r\n    .CSD_SLOT_47   (CSD_SLOT_47),\r\n    .CSD_SLOT_48   (CSD_SLOT_48),\r\n    .CSD_SLOT_49   (CSD_SLOT_49),\r\n    .CSD_SLOT_50   (CSD_SLOT_50),\r\n    .CSD_SLOT_51   (CSD_SLOT_51),\r\n    .CSD_SLOT_52   (CSD_SLOT_52),\r\n    .CSD_SLOT_53   (CSD_SLOT_53),\r\n    .CSD_SLOT_54   (CSD_SLOT_54),\r\n    .CSD_SLOT_55   (CSD_SLOT_55),\r\n    .CSD_SLOT_56   (CSD_SLOT_56),\r\n    .CSD_SLOT_57   (CSD_SLOT_57),\r\n    .CSD_SLOT_58   (CSD_SLOT_58),\r\n    .CSD_SLOT_59   (CSD_SLOT_59),\r\n    .CSD_SLOT_60   (CSD_SLOT_60),\r\n    .CSD_SLOT_61   (CSD_SLOT_61),\r\n    .CSD_SLOT_62   (CSD_SLOT_62),\r\n    .CSD_SLOT_63   (CSD_SLOT_63)\r\n) u_seq_ctrl (\r\n    // inputs\r\n    .clk            (clk),\r\n    .rst_n          (rst_n),\r\n    .run            (run),\r\n    .sw_clr_run     (sw_clr_run),\r\n    .con_mode       (con_mode),\r\n    .single_mode    (single_mode),\r\n    .recab_mode     (recab_mode),\r\n    .cmd_ready      (cmd_ready),\r\n    // outputs\r\n    .cmd_valid      (cmd_valid),\r\n    .cmd_channel    (cmd_channel),\r\n    .cmd_sop        (cmd_sop),\r\n    .cmd_eop        (cmd_eop),\r\n    .clr_run        (clr_run)\r\n);\r\n\r\ngenerate\r\nif (DUAL_ADC_MODE == 1) begin\r\n\r\naltera_modular_adc_sequencer_ctrl #(\r\n    .CSD_LENGTH    (CSD_LENGTH),\r\n    .CSD_ASIZE     (CSD_ASIZE),\r\n    .CSD_SLOT_0    (CSD_SLOT_0_ADC2),\r\n    .CSD_SLOT_1    (CSD_SLOT_1_ADC2),\r\n    .CSD_SLOT_2    (CSD_SLOT_2_ADC2),\r\n    .CSD_SLOT_3    (CSD_SLOT_3_ADC2),\r\n    .CSD_SLOT_4    (CSD_SLOT_4_ADC2),\r\n    .CSD_SLOT_5    (CSD_SLOT_5_ADC2),\r\n    .CSD_SLOT_6    (CSD_SLOT_6_ADC2),\r\n    .CSD_SLOT_7    (CSD_SLOT_7_ADC2),\r\n    .CSD_SLOT_8    (CSD_SLOT_8_ADC2),\r\n    .CSD_SLOT_9    (CSD_SLOT_9_ADC2),\r\n    .CSD_SLOT_10   (CSD_SLOT_10_ADC2),\r\n    .CSD_SLOT_11   (CSD_SLOT_11_ADC2),\r\n    .CSD_SLOT_12   (CSD_SLOT_12_ADC2),\r\n    .CSD_SLOT_13   (CSD_SLOT_13_ADC2),\r\n    .CSD_SLOT_14   (CSD_SLOT_14_ADC2),\r\n    .CSD_SLOT_15   (CSD_SLOT_15_ADC2),\r\n    .CSD_SLOT_16   (CSD_SLOT_16_ADC2),\r\n    .CSD_SLOT_17   (CSD_SLOT_17_ADC2),\r\n    .CSD_SLOT_18   (CSD_SLOT_18_ADC2),\r\n    .CSD_SLOT_19   (CSD_SLOT_19_ADC2),\r\n    .CSD_SLOT_20   (CSD_SLOT_20_ADC2),\r\n    .CSD_SLOT_21   (CSD_SLOT_21_ADC2),\r\n    .CSD_SLOT_22   (CSD_SLOT_22_ADC2),\r\n    .CSD_SLOT_23   (CSD_SLOT_23_ADC2),\r\n    .CSD_SLOT_24   (CSD_SLOT_24_ADC2),\r\n    .CSD_SLOT_25   (CSD_SLOT_25_ADC2),\r\n    .CSD_SLOT_26   (CSD_SLOT_26_ADC2),\r\n    .CSD_SLOT_27   (CSD_SLOT_27_ADC2),\r\n    .CSD_SLOT_28   (CSD_SLOT_28_ADC2),\r\n    .CSD_SLOT_29   (CSD_SLOT_29_ADC2),\r\n    .CSD_SLOT_30   (CSD_SLOT_30_ADC2),\r\n    .CSD_SLOT_31   (CSD_SLOT_31_ADC2),\r\n    .CSD_SLOT_32   (CSD_SLOT_32_ADC2),\r\n    .CSD_SLOT_33   (CSD_SLOT_33_ADC2),\r\n    .CSD_SLOT_34   (CSD_SLOT_34_ADC2),\r\n    .CSD_SLOT_35   (CSD_SLOT_35_ADC2),\r\n    .CSD_SLOT_36   (CSD_SLOT_36_ADC2),\r\n    .CSD_SLOT_37   (CSD_SLOT_37_ADC2),\r\n    .CSD_SLOT_38   (CSD_SLOT_38_ADC2),\r\n    .CSD_SLOT_39   (CSD_SLOT_39_ADC2),\r\n    .CSD_SLOT_40   (CSD_SLOT_40_ADC2),\r\n    .CSD_SLOT_41   (CSD_SLOT_41_ADC2),\r\n    .CSD_SLOT_42   (CSD_SLOT_42_ADC2),\r\n    .CSD_SLOT_43   (CSD_SLOT_43_ADC2),\r\n    .CSD_SLOT_44   (CSD_SLOT_44_ADC2),\r\n    .CSD_SLOT_45   (CSD_SLOT_45_ADC2),\r\n    .CSD_SLOT_46   (CSD_SLOT_46_ADC2),\r\n    .CSD_SLOT_47   (CSD_SLOT_47_ADC2),\r\n    .CSD_SLOT_48   (CSD_SLOT_48_ADC2),\r\n    .CSD_SLOT_49   (CSD_SLOT_49_ADC2),\r\n    .CSD_SLOT_50   (CSD_SLOT_50_ADC2),\r\n    .CSD_SLOT_51   (CSD_SLOT_51_ADC2),\r\n    .CSD_SLOT_52   (CSD_SLOT_52_ADC2),\r\n    .CSD_SLOT_53   (CSD_SLOT_53_ADC2),\r\n    .CSD_SLOT_54   (CSD_SLOT_54_ADC2),\r\n    .CSD_SLOT_55   (CSD_SLOT_55_ADC2),\r\n    .CSD_SLOT_56   (CSD_SLOT_56_ADC2),\r\n    .CSD_SLOT_57   (CSD_SLOT_57_ADC2),\r\n    .CSD_SLOT_58   (CSD_SLOT_58_ADC2),\r\n    .CSD_SLOT_59   (CSD_SLOT_59_ADC2),\r\n    .CSD_SLOT_60   (CSD_SLOT_60_ADC2),\r\n    .CSD_SLOT_61   (CSD_SLOT_61_ADC2),\r\n    .CSD_SLOT_62   (CSD_SLOT_62_ADC2),\r\n    .CSD_SLOT_63   (CSD_SLOT_63_ADC2)\r\n) u_seq_ctrl_adc2 (\r\n    // inputs\r\n    .clk            (clk),\r\n    .rst_n          (rst_n),\r\n    .run            (run),\r\n    .sw_clr_run     (sw_clr_run),\r\n    .con_mode       (con_mode),\r\n    .single_mode    (single_mode),\r\n    .recab_mode     (recab_mode),\r\n    .cmd_ready      (cmd_ready_2),\r\n    // outputs\r\n    .cmd_valid      (cmd_valid_2),\r\n    .cmd_channel    (cmd_channel_2),\r\n    .cmd_sop        (cmd_sop_2),\r\n    .cmd_eop        (cmd_eop_2),\r\n    .clr_run        (clr_run_2)         // clr_run_2 shall assert/de-assert at the same cycle as clr_run\r\n);\r\n\r\nend\r\nelse begin\r\n\r\nassign cmd_valid_2      = 1'b0;\r\nassign cmd_channel_2    = 5'h0;\r\nassign cmd_sop_2        = 1'b0;\r\nassign cmd_eop_2        = 1'b0;\r\n\r\nend\r\nendgenerate\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_sequencer_csr.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_sequencer_csr (\r\n    input               clk,\r\n    input               rst_n,\r\n    input               addr,\r\n    input               read,\r\n    input               write,\r\n    input [31:0]        writedata,\r\n    input               clr_run,\r\n\r\n    output reg [31:0]   readdata,\r\n    output reg          run,\r\n    output reg          sw_clr_run,\r\n    output              con_mode,\r\n    output              single_mode,\r\n    output              recab_mode\r\n);\r\n\r\nreg [2:0]   mode;\r\n\r\nwire        cmd_addr;\r\nwire        cmd_wr_en;\r\nwire        cmd_rd_en;\r\nwire [31:0] cmd_internal;\r\nwire [31:0] readdata_nxt;\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// address decode\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_addr = (addr == 1'b0);\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// write enable\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_wr_en = cmd_addr & write;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// read enable\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_rd_en = cmd_addr & read;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// mode register bits\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        mode <= 3'h0;\r\n    else if (cmd_wr_en & ~run)\r\n        mode <= writedata[3:1];\r\nend\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// run register bit\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        run <= 1'b0;\r\n    else if (clr_run)\r\n        run <= 1'b0;\r\n    else if (cmd_wr_en & writedata[0])\r\n        run <= 1'b1;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Logic to detect SW perform a clear on the run bit\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        sw_clr_run <= 1'b0;\r\n    else if (clr_run)\r\n        sw_clr_run <= 1'b0;\r\n    else if (run & con_mode & cmd_wr_en & ~writedata[0])\r\n        sw_clr_run <= 1'b1;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Avalon read data path\r\n//--------------------------------------------------------------------------------------------//\r\nassign cmd_internal = {28'h0, mode, run};\r\nassign readdata_nxt = cmd_internal & {32{cmd_rd_en}};\r\n\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        readdata <= 32'h0;\r\n    else\r\n        readdata <= readdata_nxt;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Mode decoding\r\n//--------------------------------------------------------------------------------------------//\r\nassign con_mode     = (mode == 3'b000);\r\nassign single_mode  = (mode == 3'b001);\r\nassign recab_mode   = (mode == 3'b111);\r\n\r\n\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/altera_modular_adc_sequencer_ctrl.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\nmodule altera_modular_adc_sequencer_ctrl #(\r\n    parameter   CSD_LENGTH      = 64,\r\n    parameter   CSD_ASIZE       = 6,\r\n    parameter   CSD_SLOT_0      = 5'h0,\r\n    parameter   CSD_SLOT_1      = 5'h0,\r\n    parameter   CSD_SLOT_2      = 5'h0,\r\n    parameter   CSD_SLOT_3      = 5'h0,\r\n    parameter   CSD_SLOT_4      = 5'h0,\r\n    parameter   CSD_SLOT_5      = 5'h0,\r\n    parameter   CSD_SLOT_6      = 5'h0,\r\n    parameter   CSD_SLOT_7      = 5'h0,\r\n    parameter   CSD_SLOT_8      = 5'h0,\r\n    parameter   CSD_SLOT_9      = 5'h0,\r\n    parameter   CSD_SLOT_10     = 5'h0,\r\n    parameter   CSD_SLOT_11     = 5'h0,\r\n    parameter   CSD_SLOT_12     = 5'h0,\r\n    parameter   CSD_SLOT_13     = 5'h0,\r\n    parameter   CSD_SLOT_14     = 5'h0,\r\n    parameter   CSD_SLOT_15     = 5'h0,\r\n    parameter   CSD_SLOT_16     = 5'h0,\r\n    parameter   CSD_SLOT_17     = 5'h0,\r\n    parameter   CSD_SLOT_18     = 5'h0,\r\n    parameter   CSD_SLOT_19     = 5'h0,\r\n    parameter   CSD_SLOT_20     = 5'h0,\r\n    parameter   CSD_SLOT_21     = 5'h0,\r\n    parameter   CSD_SLOT_22     = 5'h0,\r\n    parameter   CSD_SLOT_23     = 5'h0,\r\n    parameter   CSD_SLOT_24     = 5'h0,\r\n    parameter   CSD_SLOT_25     = 5'h0,\r\n    parameter   CSD_SLOT_26     = 5'h0,\r\n    parameter   CSD_SLOT_27     = 5'h0,\r\n    parameter   CSD_SLOT_28     = 5'h0,\r\n    parameter   CSD_SLOT_29     = 5'h0,\r\n    parameter   CSD_SLOT_30     = 5'h0,\r\n    parameter   CSD_SLOT_31     = 5'h0,\r\n    parameter   CSD_SLOT_32     = 5'h0,\r\n    parameter   CSD_SLOT_33     = 5'h0,\r\n    parameter   CSD_SLOT_34     = 5'h0,\r\n    parameter   CSD_SLOT_35     = 5'h0,\r\n    parameter   CSD_SLOT_36     = 5'h0,\r\n    parameter   CSD_SLOT_37     = 5'h0,\r\n    parameter   CSD_SLOT_38     = 5'h0,\r\n    parameter   CSD_SLOT_39     = 5'h0,\r\n    parameter   CSD_SLOT_40     = 5'h0,\r\n    parameter   CSD_SLOT_41     = 5'h0,\r\n    parameter   CSD_SLOT_42     = 5'h0,\r\n    parameter   CSD_SLOT_43     = 5'h0,\r\n    parameter   CSD_SLOT_44     = 5'h0,\r\n    parameter   CSD_SLOT_45     = 5'h0,\r\n    parameter   CSD_SLOT_46     = 5'h0,\r\n    parameter   CSD_SLOT_47     = 5'h0,\r\n    parameter   CSD_SLOT_48     = 5'h0,\r\n    parameter   CSD_SLOT_49     = 5'h0,\r\n    parameter   CSD_SLOT_50     = 5'h0,\r\n    parameter   CSD_SLOT_51     = 5'h0,\r\n    parameter   CSD_SLOT_52     = 5'h0,\r\n    parameter   CSD_SLOT_53     = 5'h0,\r\n    parameter   CSD_SLOT_54     = 5'h0,\r\n    parameter   CSD_SLOT_55     = 5'h0,\r\n    parameter   CSD_SLOT_56     = 5'h0,\r\n    parameter   CSD_SLOT_57     = 5'h0,\r\n    parameter   CSD_SLOT_58     = 5'h0,\r\n    parameter   CSD_SLOT_59     = 5'h0,\r\n    parameter   CSD_SLOT_60     = 5'h0,\r\n    parameter   CSD_SLOT_61     = 5'h0,\r\n    parameter   CSD_SLOT_62     = 5'h0,\r\n    parameter   CSD_SLOT_63     = 5'h0\r\n) (\r\n    input               clk,\r\n    input               rst_n,\r\n    input               run,\r\n    input               sw_clr_run,\r\n    input               con_mode,\r\n    input               single_mode,\r\n    input               recab_mode,\r\n    input               cmd_ready,\r\n\r\n    output reg          cmd_valid,\r\n    output reg [4:0]    cmd_channel,\r\n    output reg          cmd_sop,\r\n    output reg          cmd_eop,\r\n    output reg          clr_run\r\n);\r\n\r\nreg                     seq_state;\r\nreg                     seq_state_nxt;\r\nreg [CSD_ASIZE-1:0]     slot_sel;\r\nreg [CSD_ASIZE-1:0]     slot_sel_nxt;\r\nreg                     valid_req;\r\n\r\nwire [4:0]      csd[0:63];\r\nwire [4:0]      csdmem[0:CSD_LENGTH-1];\r\nwire            last_slot;\r\nwire            done;\r\nwire            done_con;\r\nwire            done_single;\r\nwire            valid_mode;\r\nwire [4:0]      cmd_channel_nxt;\r\nwire            cmd_sop_nxt;\r\nwire            cmd_eop_nxt;\r\n\r\nlocalparam          IDLE        = 1'b0;\r\nlocalparam          READY       = 1'b1;\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Assign conversion sequence data parameter into a temporary array\r\n//--------------------------------------------------------------------------------------------//\r\nassign csd[0] = CSD_SLOT_0;\r\nassign csd[1] = CSD_SLOT_1;\r\nassign csd[2] = CSD_SLOT_2;\r\nassign csd[3] = CSD_SLOT_3;\r\nassign csd[4] = CSD_SLOT_4;\r\nassign csd[5] = CSD_SLOT_5;\r\nassign csd[6] = CSD_SLOT_6;\r\nassign csd[7] = CSD_SLOT_7;\r\nassign csd[8] = CSD_SLOT_8;\r\nassign csd[9] = CSD_SLOT_9;\r\nassign csd[10] = CSD_SLOT_10;\r\nassign csd[11] = CSD_SLOT_11;\r\nassign csd[12] = CSD_SLOT_12;\r\nassign csd[13] = CSD_SLOT_13;\r\nassign csd[14] = CSD_SLOT_14;\r\nassign csd[15] = CSD_SLOT_15;\r\nassign csd[16] = CSD_SLOT_16;\r\nassign csd[17] = CSD_SLOT_17;\r\nassign csd[18] = CSD_SLOT_18;\r\nassign csd[19] = CSD_SLOT_19;\r\nassign csd[20] = CSD_SLOT_20;\r\nassign csd[21] = CSD_SLOT_21;\r\nassign csd[22] = CSD_SLOT_22;\r\nassign csd[23] = CSD_SLOT_23;\r\nassign csd[24] = CSD_SLOT_24;\r\nassign csd[25] = CSD_SLOT_25;\r\nassign csd[26] = CSD_SLOT_26;\r\nassign csd[27] = CSD_SLOT_27;\r\nassign csd[28] = CSD_SLOT_28;\r\nassign csd[29] = CSD_SLOT_29;\r\nassign csd[30] = CSD_SLOT_30;\r\nassign csd[31] = CSD_SLOT_31;\r\nassign csd[32] = CSD_SLOT_32;\r\nassign csd[33] = CSD_SLOT_33;\r\nassign csd[34] = CSD_SLOT_34;\r\nassign csd[35] = CSD_SLOT_35;\r\nassign csd[36] = CSD_SLOT_36;\r\nassign csd[37] = CSD_SLOT_37;\r\nassign csd[38] = CSD_SLOT_38;\r\nassign csd[39] = CSD_SLOT_39;\r\nassign csd[40] = CSD_SLOT_40;\r\nassign csd[41] = CSD_SLOT_41;\r\nassign csd[42] = CSD_SLOT_42;\r\nassign csd[43] = CSD_SLOT_43;\r\nassign csd[44] = CSD_SLOT_44;\r\nassign csd[45] = CSD_SLOT_45;\r\nassign csd[46] = CSD_SLOT_46;\r\nassign csd[47] = CSD_SLOT_47;\r\nassign csd[48] = CSD_SLOT_48;\r\nassign csd[49] = CSD_SLOT_49;\r\nassign csd[50] = CSD_SLOT_50;\r\nassign csd[51] = CSD_SLOT_51;\r\nassign csd[52] = CSD_SLOT_52;\r\nassign csd[53] = CSD_SLOT_53;\r\nassign csd[54] = CSD_SLOT_54;\r\nassign csd[55] = CSD_SLOT_55;\r\nassign csd[56] = CSD_SLOT_56;\r\nassign csd[57] = CSD_SLOT_57;\r\nassign csd[58] = CSD_SLOT_58;\r\nassign csd[59] = CSD_SLOT_59;\r\nassign csd[60] = CSD_SLOT_60;\r\nassign csd[61] = CSD_SLOT_61;\r\nassign csd[62] = CSD_SLOT_62;\r\nassign csd[63] = CSD_SLOT_63;\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Assign valid conversion sequence data parameter into an array\r\n//--------------------------------------------------------------------------------------------//\r\ngenvar i;\r\ngenerate\r\n    for (i=0; i<CSD_LENGTH; i=i+1) begin : assign_csdmem\r\n        assign csdmem[i] = csd[i];\r\n    end\r\nendgenerate\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Sequncer FSM\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        seq_state   <= IDLE;\r\n    else\r\n        seq_state   <= seq_state_nxt;\r\nend\r\n\r\nalways @* begin\r\n    case (seq_state)\r\n        IDLE: begin\r\n            clr_run         = 1'b0;\r\n            slot_sel_nxt    = {CSD_ASIZE{1'b0}};\r\n\r\n            if (run & valid_mode) begin\r\n                seq_state_nxt   = READY;\r\n                valid_req       = 1'b1;\r\n            end\r\n            else begin\r\n                seq_state_nxt   = IDLE;\r\n                valid_req       = 1'b0;\r\n            end\r\n        end\r\n\r\n        READY: begin\r\n            if (cmd_ready & (recab_mode | done)) begin\r\n                seq_state_nxt   = IDLE;\r\n                valid_req       = 1'b0;\r\n                slot_sel_nxt    = {CSD_ASIZE{1'b0}};\r\n                clr_run         = 1'b1;\r\n            end\r\n            else if (cmd_ready) begin\r\n                seq_state_nxt   = READY;\r\n                valid_req       = 1'b1;\r\n                clr_run         = 1'b0;\r\n\r\n                if (last_slot)\r\n                    slot_sel_nxt    = {CSD_ASIZE{1'b0}};\r\n                else\r\n                    slot_sel_nxt    = slot_sel + {{(CSD_ASIZE-1){1'b0}}, 1'b1};\r\n\r\n            end\r\n            else begin\r\n                seq_state_nxt   = READY;\r\n                valid_req       = 1'b0;\r\n                slot_sel_nxt    = slot_sel;\r\n                clr_run         = 1'b0;\r\n            end\r\n        end\r\n        \r\n        default: begin\r\n            seq_state_nxt   = IDLE;\r\n            valid_req       = 1'b0;\r\n            slot_sel_nxt    = {CSD_ASIZE{1'b0}};\r\n            clr_run         = 1'b0;\r\n        end\r\n\r\n    endcase\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Counter for slot selector\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n)\r\n        slot_sel <= {CSD_ASIZE{1'b0}};\r\n    else\r\n        slot_sel <= slot_sel_nxt;\r\nend\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Misc logic to detect sequence complete\r\n//--------------------------------------------------------------------------------------------//\r\nassign last_slot        = (slot_sel == (CSD_LENGTH-1));\r\nassign done_single      = single_mode & last_slot;\r\nassign done_con         = last_slot & sw_clr_run;\r\nassign done             = done_con | done_single;\r\nassign valid_mode       = con_mode | single_mode | recab_mode;\r\nassign cmd_channel_nxt  = recab_mode ? 5'h1f : csdmem[slot_sel_nxt];\r\nassign cmd_sop_nxt      = recab_mode ? 1'b1 : (slot_sel_nxt == {CSD_ASIZE{1'b0}});\r\nassign cmd_eop_nxt      = recab_mode ? 1'b1 : (slot_sel_nxt == (CSD_LENGTH-1));\r\n\r\n\r\n\r\n//--------------------------------------------------------------------------------------------//\r\n// Output register for Avalon ST Command Interface\r\n//--------------------------------------------------------------------------------------------//\r\nalways @(posedge clk or negedge rst_n) begin\r\n    if (!rst_n) begin\r\n        cmd_valid       <= 1'b0;\r\n        cmd_channel     <= 5'h0;\r\n        cmd_sop         <= 1'b0;\r\n        cmd_eop         <= 1'b0;\r\n    end\r\n    else if (valid_req) begin\r\n        cmd_valid       <= 1'b1;\r\n        cmd_channel     <= cmd_channel_nxt;\r\n        cmd_sop         <= cmd_sop_nxt;\r\n        cmd_eop         <= cmd_eop_nxt;\r\n    end\r\n    else if (cmd_ready) begin\r\n        cmd_valid       <= 1'b0;\r\n        cmd_channel     <= 5'h0;\r\n        cmd_sop         <= 1'b0;\r\n        cmd_eop         <= 1'b0;\r\n    end\r\nend\r\n\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/chsel_code_converter_sw_to_hw.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\r\n// **   Filename       : chsel_code_converter_sw_to_hw.v\r\n// **\r\n// **   Description    : Translate channel code coming from software to hardware format\r\n// **\r\n// **   Change Log     :\r\n// **   2014/02/07     : Initial design\r\n// **\r\n// *******************************************************************************************************\r\n\r\n// synthesis translate_off\r\n`timescale 1ns / 1ps\r\n// synthesis translate_on\r\n\r\n// *******************************************************************************************************\r\n// **   MODULE\r\n// *******************************************************************************************************\r\n\r\nmodule  chsel_code_converter_sw_to_hw (\r\n    chsel_from_sw,            // 5-bits channel selection.\r\n    chsel_to_hw               // 5-bits channel selection.\r\n);\r\n\r\n// *******************************************************************************************************\r\n// **   PARAMETERS\r\n// *******************************************************************************************************\r\n\r\n    // Ordering Part Number 10MXX... code\r\n    parameter           device_partname_fivechar_prefix = \"10M08\";   // Valid options = 04, 08, 16, 25, 40, 50\r\n\r\n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\r\n    parameter           is_this_first_or_second_adc = 1;             // Valid options = 1 or 2\r\n\r\n// .......................................................................................................\r\n\r\n    // DESCRIBE THE LOCALPARAM CONSTANT:\r\n    // Actual Hardware map CHSEL[4:0] out of sequential order to different channel pad due to route-ability,\r\n    // Soft IP will have S/W mapping to translate it back to sequential order from user perspective (PAD label)\r\n\r\n    // 10M04/08/16 hardware equivalent chsel code for a particular software chsel code\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00100;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch02_code_00010 = 5'b00110;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch03_code_00011 = 5'b01010;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01100;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch05_code_00101 = 5'b10000;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch06_code_00110 = 5'b01110;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01101;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00010;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch09_code_01001 = 5'b00101;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch10_code_01010 = 5'b01001;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch11_code_01011 = 5'b10001;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch12_code_01100 = 5'b01111;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch13_code_01101 = 5'b01000;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch14_code_01110 = 5'b00111;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch15_code_01111 = 5'b01011;\r\n    localparam          variant_08n16_hw_chsel_code_for_sw_ch16_code_10000 = 5'b00001;\r\n\r\n    // First ADC of 10M25/40/50 hardware equivalent chsel code for a particular software chsel code\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00100;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch02_code_00010 = 5'b00110;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch03_code_00011 = 5'b01010;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01100;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch05_code_00101 = 5'b10000;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch06_code_00110 = 5'b01110;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01101;\r\n    localparam          dual_first_adc_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00010;\r\n\r\n    // Second ADC of 10M25/40/50 hardware equivalent chsel code for a particular software chsel code\r\n    // Note that: Second ADC do not support internal temperature sensor.\r\n    // However internal temperature sensor mapping for ADC2 is later included for dual adc mode\r\n    // When in dual adc mode, if ADC1 is operating in TSD mode, ADC2 will perform a dummy TSD mode as well\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_temp_code_10001 = 5'b00000;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch00_code_00000 = 5'b00011;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch01_code_00001 = 5'b00101;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch02_code_00010 = 5'b01001;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch03_code_00011 = 5'b10001;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch04_code_00100 = 5'b01111;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch05_code_00101 = 5'b01000;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch06_code_00110 = 5'b00111;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch07_code_00111 = 5'b01011;\r\n    localparam          dual_second_adc_hw_chsel_code_for_sw_ch08_code_01000 = 5'b00001;\r\n\r\n// *******************************************************************************************************\r\n// **   INPUTS\r\n// *******************************************************************************************************\r\n\r\n    input   [4:0]       chsel_from_sw;  // 5-bits channel selection number from software perspective\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS\r\n// *******************************************************************************************************\r\n\r\n    output  [4:0]       chsel_to_hw;    // 5-bits channel selection code to be send to ADC Hard IP\r\n\r\n// *******************************************************************************************************\r\n// **   EXTERNAL NET AND REGISTER DATA TYPE (with input / output / inout ports)\r\n// *******************************************************************************************************\r\n\r\n    reg     [4:0]       chsel_to_hw;    // 5-bits channel selection code to be send to ADC Hard IP\r\n\r\n// *******************************************************************************************************\r\n// **   MAIN CODE\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      1.00: Channel Mapping\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // DESCRIBE THE ALWAYS BLOCK:\r\n    // This block execute on divided internal clock\r\n    // Its job is mainly to determine what value to be set for the digital_out and eoc_rise\r\n    always @(chsel_from_sw)\r\n    begin\r\n        // DESCRIBE THE CASE STATEMENT:\r\n        // Output the equivalent chsel code for hardware\r\nif  ((device_partname_fivechar_prefix == \"10M04\") || (device_partname_fivechar_prefix == \"10M08\") || (device_partname_fivechar_prefix == \"10M16\"))\r\nbegin\r\n        // COMMENT FOR THIS BRANCH:\r\n        // 10M08/04 channel mapping\r\n        case(chsel_from_sw)\r\n            5'b10001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_temp_code_10001;\r\n            5'b00000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch00_code_00000;\r\n            5'b00001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch01_code_00001;\r\n            5'b00010: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch02_code_00010;\r\n            5'b00011: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch03_code_00011;\r\n            5'b00100: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch04_code_00100;\r\n            5'b00101: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch05_code_00101;\r\n            5'b00110: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch06_code_00110;\r\n            5'b00111: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch07_code_00111;\r\n            5'b01000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch08_code_01000;\r\n            5'b01001: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch09_code_01001;\r\n            5'b01010: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch10_code_01010;\r\n            5'b01011: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch11_code_01011;\r\n            5'b01100: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch12_code_01100;\r\n            5'b01101: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch13_code_01101;\r\n            5'b01110: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch14_code_01110;\r\n            5'b01111: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch15_code_01111;\r\n            5'b10000: chsel_to_hw <= variant_08n16_hw_chsel_code_for_sw_ch16_code_10000;\r\n            default : chsel_to_hw <= 5'b11111;\r\n        endcase\r\nend\r\nelse\r\nif ((is_this_first_or_second_adc == 1) &&\r\n    ((device_partname_fivechar_prefix == \"10M25\") ||\r\n     (device_partname_fivechar_prefix == \"10M40\") ||\r\n     (device_partname_fivechar_prefix == \"10M50\")))\r\nbegin\r\n        // COMMENT FOR THIS BRANCH:\r\n        // First ADC of 10M25/40/50 channel mapping\r\n        case(chsel_from_sw)\r\n            5'b10001: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_temp_code_10001;\r\n            5'b00000: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch00_code_00000;\r\n            5'b00001: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch01_code_00001;\r\n            5'b00010: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch02_code_00010;\r\n            5'b00011: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch03_code_00011;\r\n            5'b00100: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch04_code_00100;\r\n            5'b00101: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch05_code_00101;\r\n            5'b00110: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch06_code_00110;\r\n            5'b00111: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch07_code_00111;\r\n            5'b01000: chsel_to_hw <= dual_first_adc_hw_chsel_code_for_sw_ch08_code_01000;\r\n            default : chsel_to_hw <= 5'b11111;\r\n        endcase\r\nend\r\nelse\r\nif ((is_this_first_or_second_adc == 2) &&\r\n    ((device_partname_fivechar_prefix == \"10M25\") ||\r\n     (device_partname_fivechar_prefix == \"10M40\") ||\r\n     (device_partname_fivechar_prefix == \"10M50\")))\r\nbegin\r\n        // COMMENT FOR THIS BRANCH:\r\n        // Second ADC of 10M25/40/50 channel mapping\r\n        case(chsel_from_sw)\r\n            5'b10001: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_temp_code_10001;\r\n            5'b00000: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch00_code_00000;\r\n            5'b00001: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch01_code_00001;\r\n            5'b00010: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch02_code_00010;\r\n            5'b00011: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch03_code_00011;\r\n            5'b00100: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch04_code_00100;\r\n            5'b00101: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch05_code_00101;\r\n            5'b00110: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch06_code_00110;\r\n            5'b00111: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch07_code_00111;\r\n            5'b01000: chsel_to_hw <= dual_second_adc_hw_chsel_code_for_sw_ch08_code_01000;\r\n            default : chsel_to_hw <= 5'b11111;\r\n        endcase\r\nend\r\n    end // end always\r\n\r\n// *******************************************************************************************************\r\n// **   END OF MODULE\r\n// *******************************************************************************************************\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/fiftyfivenm_adcblock_primitive_wrapper.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\r\n// **   Filename       : fiftyfivenm_adcblock_primitive_wrapper.v\r\n// **\r\n// **   Description    : The lowest layer of the ADC Mega Function code that instantiate the ADC primitive\r\n// **                    The purpose mirror each input/output register from ADC hard block to soft ip\r\n// **                    to be clocked by clf_dft signal to close timing for the path between soft and hard blocks.\r\n// **   Change Log     :\r\n// **   01/17/2014     : Initial design\r\n// **\r\n// *******************************************************************************************************\r\n\r\n// *******************************************************************************************************\r\n// **   DEFINES\r\n// *******************************************************************************************************\r\n// synthesis translate_off\r\n`timescale 1ns / 1ps\r\n// synthesis translate_on\r\n\r\n//`define DEBUG_AND_DEVELOPMENT 1\r\n\r\n// *******************************************************************************************************\r\n// **   TOP MODULE\r\n// *******************************************************************************************************\r\nmodule fiftyfivenm_adcblock_primitive_wrapper(\r\n    //reset,\r\n    chsel,               // 5-bits channel selection.\r\n    soc,                 // signal Start-of-Conversion to ADC\r\n    eoc,                 // signal end of conversion. Data can be latched on the positive edge of clk_dft after this signal becomes high.  EOC becomes low at every positive edge of the clk_dft signal.\r\n    dout,                // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    usr_pwd,             // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    tsen,                // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    clkout_adccore,      // Output clock from the clock divider\r\n    clkin_from_pll_c0    // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n);\r\n\r\n// *******************************************************************************************************\r\n// **   PARAMETERS\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      WRAPPED PARAMETERS USED BY fiftyfivenm_adcblock\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // 3-bits 1st stage clock divider.\r\n    // 0..5 = DIV by 1/2/10/20/40/80;\r\n    // 6..7 = invalid\r\n    parameter           clkdiv    = 1;\r\n    \r\n    // 2nd stage clock divider.\r\n    // 0 = DIV by 10;\r\n    // 1 = DIV by 20\r\n    parameter           tsclkdiv  = 0;\r\n    \r\n    // 0 = Use 1st stage clock divider when TSEN.\r\n    // 1 = Use 2nd stage clock divider when TSEN.\r\n    parameter           tsclksel  = 0;\r\n    \r\n    // 2-bits To enable the R ladder for the prescalar input channels.\r\n    // 00 = disable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // 01 = enable prescalar for CH8 only\r\n    // 10 = enable prescalar for CH16 only (CH8 for device with 2nd ADC)\r\n    // 11 = enable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // please note that this is not supported in VR mode\r\n    parameter           prescalar = 0;\r\n    \r\n    // Reference voltage selection for ADC.\r\n    // 0 = external;\r\n    // 1 = internal VCCADC_2P5\r\n    parameter           refsel    = 0;\r\n       \r\n    // Ordering Part Number 10MXX... code\r\n    parameter           device_partname_fivechar_prefix = \"10M08\";      // Valid options = 04, 08, 16, 25, 40, 50\r\n    \r\n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\r\n    parameter           is_this_first_or_second_adc = 1;    // Valid options = 1 or 2\r\n    \r\n    // is_using_dedicated_analog_input_pin_only? -> removed, replaced with analog_input_pin_mask\r\n    //parameter           is_using_dedicated_analog_input_pin_only = 0;\r\n\r\n    // 16 bits to indicate whether each of the dual purpose analog input pin (ADCIN) is in use or not.\r\n    // 1 bit to indicate whether dedicated analog input pin (ANAIN) is in use or not (bit 16) \r\n    parameter           analog_input_pin_mask = 17'h0;\r\n    \r\n    // Power Down. Use to disable the ADC during compilation time if no ADC is in use.\r\n    parameter           hard_pwd = 0;\r\n\r\n\r\n// *******************************************************************************************************\r\n// **   INPUTS\r\n// *******************************************************************************************************\r\n\r\n    //input               reset;\r\n\r\n    input               clkin_from_pll_c0;  // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n\r\n    input               soc;        // signal Start-of-Conversion to ADC\r\n    input               usr_pwd;    // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    input               tsen;       // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    input   [4:0]       chsel;      // 5-bits channel selection.\r\n\r\n    //reg                 reg_clk_dft_soc;\r\n    //reg     [4:0]       reg_clk_dft_chsel;\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS\r\n// *******************************************************************************************************\r\n\r\n    output              clkout_adccore;\r\n    output              eoc;\r\n\r\n    output  [11:0]      dout;\r\n    wire    [11:0]      wire_from_adc_dout;\r\n    //reg     [11:0]      reg_clk_dft_dout;\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS ASSIGNMENTS\r\n// *******************************************************************************************************\r\n\r\n    //assign       dout = reg_clk_dft_dout;\r\n    assign       dout = wire_from_adc_dout;\r\n\r\n// *******************************************************************************************************\r\n// **   INITIALIZATION\r\n// *******************************************************************************************************\r\n\r\n// *******************************************************************************************************\r\n// **   MAIN CODE\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      1.00: Instantiate ADC Block primitive\r\n// -------------------------------------------------------------------------------------------------------\r\n`ifdef DEBUG_AND_DEVELOPMENT\r\n    fiftyfivenm_adcblock_emulation primitive_instance(\r\n`else\r\n    fiftyfivenm_adcblock primitive_instance(\r\n`endif\r\n        //.chsel            (reg_clk_dft_chsel),\r\n        //.soc              (reg_clk_dft_soc),\r\n        .chsel            (chsel),\r\n        .soc              (soc),\r\n        .eoc              (eoc),\r\n        .dout             (wire_from_adc_dout),\r\n        .usr_pwd          (usr_pwd),\r\n        .tsen             (tsen),\r\n        .clk_dft          (clkout_adccore),\r\n        .clkin_from_pll_c0(clkin_from_pll_c0)\r\n    );\r\n    defparam           primitive_instance.clkdiv                          = clkdiv;\r\n    defparam           primitive_instance.tsclkdiv                        = tsclkdiv;\r\n    defparam           primitive_instance.tsclksel                        = tsclksel;\r\n    defparam           primitive_instance.prescalar                       = prescalar;\r\n    defparam           primitive_instance.refsel                          = refsel;\r\n    defparam           primitive_instance.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\r\n    defparam           primitive_instance.is_this_first_or_second_adc     = is_this_first_or_second_adc;\r\n    defparam           primitive_instance.analog_input_pin_mask           = analog_input_pin_mask;\r\n    defparam           primitive_instance.pwd                             = hard_pwd;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      2.00: Clock the registers with ADC Clock source\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // DESCRIBE THE ALWAYS BLOCK:\r\n    // The purpose is to clock the registers using clk_dft signal for timing closure\r\n    // ADC primitive signals type\r\n    // Type  Sync: chsel, soc, eoc, dout, clk_dft\r\n    // Type Async: usr_pwd, tsen\r\n    // Signals need a register clocked by clk_dft: chsel, dout, soc\r\n    //always @ (posedge clkout_adccore or posedge reset)\r\n    //begin\r\n    //    if (reset)\r\n    //    begin\r\n    //        // Reset signal asserted\r\n    //        reg_clk_dft_soc     <= 0;\r\n    //        reg_clk_dft_chsel   <= 0;\r\n    //        reg_clk_dft_dout    <= 0;\r\n    //    end\r\n    //    else\r\n    //    begin\r\n    //        reg_clk_dft_soc     <= soc;\r\n    //        reg_clk_dft_chsel   <= chsel;\r\n    //        reg_clk_dft_dout    <= wire_from_adc_dout;\r\n    //    end //end-if        \r\n    //end\r\n\r\n// *******************************************************************************************************\r\n// **   END OF MODULE\r\n// *******************************************************************************************************\r\n\r\nendmodule\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/fiftyfivenm_adcblock_top_wrapper.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n// *******************************************************************************************************\r\n// **   Filename       : fiftyfivenm_adcblock_top_wrapper.v\r\n// **\r\n// **   Description    : Represent the ADC BLOCK primitive with channel code mapped for software\r\n// **                    in incremental order.  The hardware chsel code is not in sequence due to routability.\r\n// **   Change Log     :\r\n// **   08/31/2013     : Initial design\r\n// **\r\n// *******************************************************************************************************\r\n\r\n// synthesis translate_off\r\r\n`timescale 1ns / 1ps\r\r\n// synthesis translate_on\r\n\r\n// *******************************************************************************************************\r\n// **   MODULE\r\n// *******************************************************************************************************\r\nmodule fiftyfivenm_adcblock_top_wrapper(\r\n    //reset,               // reset\r\n    chsel,               // 5-bits channel selection.\r\n    soc,                 // signal Start-of-Conversion to ADC\r\n    eoc,                 // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\r\n    dout,                // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    usr_pwd,             // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    tsen,                // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    clkout_adccore,      // Output clock from the clock divider\r\n    clkin_from_pll_c0   // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n    //dout_ch              // Indicator to tell that current dout data is for which channel\r\n);\r\n\r\n// *******************************************************************************************************\r\n// **   PARAMETERS\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      WRAPPED PARAMETERS USED BY fiftyfivenm_adcblock\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // 3-bits 1st stage clock divider.\r\n    // 0..5 = DIV by 1/2/10/20/40/80;\r\n    // 6..7 = invalid\r\n    parameter           clkdiv    = 1;\r\n\r\n    // 2nd stage clock divider.\r\n    // 0 = DIV by 10;\r\n    // 1 = DIV by 20\r\n    parameter           tsclkdiv  = 0;\r\n\r\n    // 0 = Use 1st stage clock divider when TSEN.\r\n    // 1 = Use 2nd stage clock divider when TSEN.\r\n    parameter           tsclksel  = 0;\r\n\r\n    // 2-bits To enable the R ladder for the prescalar input channels.\r\n    // 00 = disable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // 01 = enable prescalar for CH8 only\r\n    // 10 = enable prescalar for CH16 only (CH8 for device with 2nd ADC)\r\n    // 11 = enable prescalar for CH8 and CH16 (CH8 for device with 2nd ADC)\r\n    // please note that this is not supported in VR mode\r\n    parameter           prescalar = 0;\r\n\r\n    // Reference voltage selection for ADC.\r\n    // 0 = external;\r\n    // 1 = internal VCCADC_2P5\r\n    parameter           refsel    = 0;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      WRAPPED PARAMETERS  USED BY both chsel_code_converter_sw_to_hw and fiftyfivenm_adcblock\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // Ordering Part Number 10MXX... code\r\n    parameter           device_partname_fivechar_prefix = \"10M08\";      // Valid options = 04, 08, 16, 25, 40, 50\r\n\r\n    // Some part have two ADC, instantiate which ADC?  1st or 2nd?\r\n    parameter           is_this_first_or_second_adc = 1;    // Valid options = 1 or 2\r\n\r\n    // 16 bits to indicate whether each of the dual purpose analog input pin (ADCIN) is in use or not.\r\n    // 1 bit to indicate whether dedicated analog input pin (ANAIN) is in use or not (bit 16) \r\n    parameter           analog_input_pin_mask = 17'h0;\r\n    \r\n    // Power Down. Use to disable the ADC during compilation time if no ADC is in use.\r\n    parameter           hard_pwd = 0;\r\n\r\n// *******************************************************************************************************\r\n// **   INPUTS\r\n// *******************************************************************************************************\r\n\r\n    //input               reset;      // reset\r\n\r\n    input               clkin_from_pll_c0;  // Clock source from PLL1 c-counter[0] at BL corner or PLL3 c-counter[0] at TL corner\r\n\r\n    input               soc;        // signal Start-of-Conversion to ADC\r\n    input               usr_pwd;    // User Power Down during run time.  0 = Power Up;  1 = Power Down.\r\n    input               tsen;       // 0 = Normal Mode; 1 = Temperature Sensing Mode.\r\n    input   [4:0]       chsel;      // 5-bits channel selection.\r\n\r\n// *******************************************************************************************************\r\n// **   OUTPUTS\r\n// *******************************************************************************************************\r\n\r\n    output              clkout_adccore;  // Output clock from the clock divider\r\n    output              eoc;        // signal end of conversion. Data can be latched on the positive edge of clkout_adccore after this signal becomes high.  EOC becomes low at every positive edge of the clkout_adccore signal.\r\n    output [11:0]       dout;       // 12-bits DOUT valid after EOC rise, still valid at falling edge, but not before the next EOC rising edge\r\n    //output  [4:0]       dout_ch;    // Indicator to tell that current dout data is for which channel (clone of EOC)\r\n\r\n// *******************************************************************************************************\r\n// **   INTERNAL NET AND REGISTER DATA TYPE (internal signals used within this module)\r\n// *******************************************************************************************************\r\n\r\n    //reg     [4:0]       prev1_chsel; // Backup chsel, because the data available at EOC is always for chsel value at previous EOC\r\n    //reg     [4:0]       prev2_chsel; // Data for previous channel is further delay by 1 clkout_adccore due to adcblock_primitive_wrapper have a register clocked by clkout_adccore\r\n    //reg     [4:0]       dout_ch;     // Indicator to tell that current dout data is for which channel\r\n\r\n   // chsel_to_hw is the output after port mapping will be wired into chsel of fiftyfivenm_adcblock\r\n    wire    [4:0]       chsel_to_hw;\r\n\r\n// *******************************************************************************************************\r\n// **   INITIALIZATION\r\n// *******************************************************************************************************\r\n\r\n    //initial begin\r\n        //prev1_chsel = 0;\r\n        //prev2_chsel = 0;\r\n        //dout_ch    = 0;\r\n    //end\r\n\r\n// *******************************************************************************************************\r\n// **   MAIN CODE\r\n// *******************************************************************************************************\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      1.00: Instantiate Software to Hardware Channel Mapping module\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    chsel_code_converter_sw_to_hw decoder(\r\n        // The 5-bits chsel input port are wired to chsel_from_sw for conversion\r\n        .chsel_from_sw(chsel),\r\n        // The chsel_code_converter_sw_to_hw output chsel_to_hw which will be wired into fiftyfivenm_adcblock\r\n        .chsel_to_hw(chsel_to_hw)\r\n    );\r\n    defparam           decoder.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\r\n    defparam           decoder.is_this_first_or_second_adc     = is_this_first_or_second_adc;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      2.00: Instantiate ADC Block primitive\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    fiftyfivenm_adcblock_primitive_wrapper adcblock_instance(\r\n       // .reset            (reset),\r\n        .chsel            (chsel_to_hw),\r\n        .soc              (soc),\r\n        .eoc              (eoc),\r\n        .dout             (dout),\r\n        .usr_pwd          (usr_pwd),\r\n        .tsen             (tsen),\r\n        .clkout_adccore   (clkout_adccore),\r\n        .clkin_from_pll_c0(clkin_from_pll_c0)\r\n    );\r\n    defparam  adcblock_instance.clkdiv                          = clkdiv;\r\n    defparam  adcblock_instance.tsclkdiv                        = tsclkdiv;\r\n    defparam  adcblock_instance.tsclksel                        = tsclksel;\r\n    defparam  adcblock_instance.prescalar                       = prescalar;\r\n    defparam  adcblock_instance.refsel                          = refsel;\r\n    defparam  adcblock_instance.device_partname_fivechar_prefix = device_partname_fivechar_prefix;\r\n    defparam  adcblock_instance.is_this_first_or_second_adc     = is_this_first_or_second_adc;\r\n    defparam  adcblock_instance.analog_input_pin_mask           = analog_input_pin_mask;\r\n    defparam  adcblock_instance.hard_pwd                        = hard_pwd;\r\n\r\n// -------------------------------------------------------------------------------------------------------\r\n//      4.00: Update dout_ch to tell current dout data is for which channel\r\n// -------------------------------------------------------------------------------------------------------\r\n\r\n    // DESCRIBE THE ALWAYS BLOCK:\r\n    // output previously backed-up chsel to dout_ch\r\n    // backup existing chsel to later use\r\n   // always @ (posedge clkout_adccore or posedge reset)\r\n   // begin\r\n   //     if (reset)\r\n   //     begin\r\n   //         dout_ch     <= 0;\r\n   //         prev2_chsel <= 0;\r\n   //         prev1_chsel <= 0;\r\n   //     end\r\n   //     else\r\n   //     begin\r\n   //         dout_ch     <= prev2_chsel;\r\n   //         prev2_chsel <= prev1_chsel;\r\n   //         prev1_chsel <= chsel;\r\n   //     end //end-if\r\n   // end\r\n\r\n// *******************************************************************************************************\r\n// **   END OF MODULE\r\n// *******************************************************************************************************\r\n\r\nendmodule\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/myadc_modular_adc_0.v",
    "content": "// myadc_modular_adc_0.v\r\n\r\n// This file was auto-generated from altera_modular_adc_hw.tcl.  If you edit it your changes\n// will probably be lost.\n// \n// Generated using ACDS version 15.0 145\r\n\r\n`timescale 1 ps / 1 ps\nmodule myadc_modular_adc_0 (\r\n\t\tinput  wire        clock_clk,              //          clock.clk\n\t\tinput  wire        reset_sink_reset_n,     //     reset_sink.reset_n\n\t\tinput  wire        adc_pll_clock_clk,      //  adc_pll_clock.clk\n\t\tinput  wire        adc_pll_locked_export,  // adc_pll_locked.export\n\t\tinput  wire        command_valid,          //        command.valid\n\t\tinput  wire [4:0]  command_channel,        //               .channel\n\t\tinput  wire        command_startofpacket,  //               .startofpacket\n\t\tinput  wire        command_endofpacket,    //               .endofpacket\n\t\toutput wire        command_ready,          //               .ready\n\t\toutput wire        response_valid,         //       response.valid\n\t\toutput wire [4:0]  response_channel,       //               .channel\n\t\toutput wire [11:0] response_data,          //               .data\n\t\toutput wire        response_startofpacket, //               .startofpacket\n\t\toutput wire        response_endofpacket    //               .endofpacket\n\t);\r\n\r\n\taltera_modular_adc_control #(\r\n\t\t.clkdiv                          (2),\r\n\t\t.tsclkdiv                        (1),\r\n\t\t.tsclksel                        (1),\r\n\t\t.hard_pwd                        (0),\r\n\t\t.prescalar                       (0),\r\n\t\t.refsel                          (1),\r\n\t\t.device_partname_fivechar_prefix (\"10M08\"),\r\n\t\t.is_this_first_or_second_adc     (1),\r\n\t\t.analog_input_pin_mask           (65536),\r\n\t\t.dual_adc_mode                   (0)\r\n\t) control_internal (\n\t\t.clk               (clock_clk),              //         clock.clk\n\t\t.cmd_valid         (command_valid),          //       command.valid\n\t\t.cmd_channel       (command_channel),        //              .channel\n\t\t.cmd_sop           (command_startofpacket),  //              .startofpacket\n\t\t.cmd_eop           (command_endofpacket),    //              .endofpacket\n\t\t.cmd_ready         (command_ready),          //              .ready\n\t\t.rst_n             (reset_sink_reset_n),     //    reset_sink.reset_n\n\t\t.rsp_valid         (response_valid),         //      response.valid\n\t\t.rsp_channel       (response_channel),       //              .channel\n\t\t.rsp_data          (response_data),          //              .data\n\t\t.rsp_sop           (response_startofpacket), //              .startofpacket\n\t\t.rsp_eop           (response_endofpacket),   //              .endofpacket\n\t\t.clk_in_pll_c0     (adc_pll_clock_clk),      // adc_pll_clock.clk\n\t\t.clk_in_pll_locked (adc_pll_locked_export),  //   conduit_end.export\n\t\t.sync_valid        (),                       //   (terminated)\n\t\t.sync_ready        (1'b0)                    //   (terminated)\n\t);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc/synthesis/submodules/myadc_modular_adc_0.v.bak",
    "content": "// myadc_modular_adc_0.v\r\n\r\n// This file was auto-generated from altera_modular_adc_hw.tcl.  If you edit it your changes\n// will probably be lost.\n// \n// Generated using ACDS version 15.0 145\r\n\r\n`timescale 1 ps / 1 ps\nmodule myadc_modular_adc_0 (\r\n\t\tinput  wire        clock_clk,              //          clock.clk\n\t\tinput  wire        reset_sink_reset_n,     //     reset_sink.reset_n\n\t\tinput  wire        adc_pll_clock_clk,      //  adc_pll_clock.clk\n\t\tinput  wire        adc_pll_locked_export,  // adc_pll_locked.export\n\t\tinput  wire        command_valid,          //        command.valid\n\t\tinput  wire [4:0]  command_channel,        //               .channel\n\t\tinput  wire        command_startofpacket,  //               .startofpacket\n\t\tinput  wire        command_endofpacket,    //               .endofpacket\n\t\toutput wire        command_ready,          //               .ready\n\t\toutput wire        response_valid,         //       response.valid\n\t\toutput wire [4:0]  response_channel,       //               .channel\n\t\toutput wire [11:0] response_data,          //               .data\n\t\toutput wire        response_startofpacket, //               .startofpacket\n\t\toutput wire        response_endofpacket    //               .endofpacket\n\t);\r\n\r\n\taltera_modular_adc_control #(\r\n\t\t.clkdiv                          (2),\r\n\t\t.tsclkdiv                        (1),\r\n\t\t.tsclksel                        (1),\r\n\t\t.hard_pwd                        (0),\r\n\t\t.prescalar                       (0),\r\n\t\t.refsel                          (1),\r\n\t\t.device_partname_fivechar_prefix (\"10M08\"),\r\n\t\t.is_this_first_or_second_adc     (1),\r\n\t\t.analog_input_pin_mask           (65536),\r\n\t\t.dual_adc_mode                   (0)\r\n\t) control_internal (\n\t\t.clk               (clock_clk),              //         clock.clk\n\t\t.cmd_valid         (command_valid),          //       command.valid\n\t\t.cmd_channel       (command_channel),        //              .channel\n\t\t.cmd_sop           (command_startofpacket),  //              .startofpacket\n\t\t.cmd_eop           (command_endofpacket),    //              .endofpacket\n\t\t.cmd_ready         (command_ready),          //              .ready\n\t\t.rst_n             (reset_sink_reset_n),     //    reset_sink.reset_n\n\t\t.rsp_valid         (response_valid),         //      response.valid\n\t\t.rsp_channel       (response_channel),       //              .channel\n\t\t.rsp_data          (response_data),          //              .data\n\t\t.rsp_sop           (response_startofpacket), //              .startofpacket\n\t\t.rsp_eop           (response_endofpacket),   //              .endofpacket\n\t\t.clk_in_pll_c0     (adc_pll_clock_clk),      // adc_pll_clock.clk\n\t\t.clk_in_pll_locked (adc_pll_locked_export),  //   conduit_end.export\n\t\t.sync_valid        (),                       //   (terminated)\n\t\t.sync_ready        (1'b0)                    //   (terminated)\n\t);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc.qsys",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<system name=\"$${FILENAME}\">\n <component\n   name=\"$${FILENAME}\"\n   displayName=\"$${FILENAME}\"\n   version=\"1.0\"\n   description=\"\"\n   tags=\"INTERNAL_COMPONENT=true\"\n   categories=\"System\" />\n <parameter name=\"bonusData\"><![CDATA[bonusData \r\n{\r\n   element $${FILENAME}\r\n   {\r\n      datum _originalDeviceFamily\r\n      {\r\n         value = \"MAX 10\";\r\n         type = \"String\";\r\n      }\r\n   }\r\n   element modular_adc_0\r\n   {\r\n      datum _sortIndex\r\n      {\r\n         value = \"0\";\r\n         type = \"int\";\r\n      }\r\n   }\r\n}\r\n]]></parameter>\n <parameter name=\"clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <parameter name=\"device\" value=\"10M08SAE144C8GES\" />\n <parameter name=\"deviceFamily\" value=\"MAX 10\" />\n <parameter name=\"deviceSpeedGrade\" value=\"8\" />\n <parameter name=\"fabricMode\" value=\"QSYS\" />\n <parameter name=\"generateLegacySim\" value=\"false\" />\n <parameter name=\"generationId\" value=\"0\" />\n <parameter name=\"globalResetBus\" value=\"false\" />\n <parameter name=\"hdlLanguage\" value=\"VERILOG\" />\n <parameter name=\"hideFromIPCatalog\" value=\"true\" />\n <parameter name=\"lockedInterfaceDefinition\" value=\"\" />\n <parameter name=\"maxAdditionalLatency\" value=\"1\" />\n <parameter name=\"projectName\" value=\"serial1.qpf\" />\n <parameter name=\"sopcBorderPoints\" value=\"false\" />\n <parameter name=\"systemHash\" value=\"0\" />\n <parameter name=\"testBenchDutName\" value=\"\" />\n <parameter name=\"timeStamp\" value=\"0\" />\n <parameter name=\"useTestBenchNamingPattern\" value=\"false\" />\n <instanceScript></instanceScript>\n <interface\n   name=\"adc_pll_clock\"\n   internal=\"modular_adc_0.adc_pll_clock\"\n   type=\"clock\"\n   dir=\"end\">\n  <port name=\"adc_pll_clock_clk\" internal=\"adc_pll_clock_clk\" />\n </interface>\n <interface\n   name=\"adc_pll_locked\"\n   internal=\"modular_adc_0.adc_pll_locked\"\n   type=\"conduit\"\n   dir=\"end\">\n  <port name=\"adc_pll_locked_export\" internal=\"adc_pll_locked_export\" />\n </interface>\n <interface name=\"clock\" internal=\"modular_adc_0.clock\" type=\"clock\" dir=\"end\">\n  <port name=\"clock_clk\" internal=\"clock_clk\" />\n </interface>\n <interface\n   name=\"command\"\n   internal=\"modular_adc_0.command\"\n   type=\"avalon_streaming\"\n   dir=\"end\">\n  <port name=\"command_valid\" internal=\"command_valid\" />\n  <port name=\"command_channel\" internal=\"command_channel\" />\n  <port name=\"command_startofpacket\" internal=\"command_startofpacket\" />\n  <port name=\"command_endofpacket\" internal=\"command_endofpacket\" />\n  <port name=\"command_ready\" internal=\"command_ready\" />\n </interface>\n <interface\n   name=\"reset_sink\"\n   internal=\"modular_adc_0.reset_sink\"\n   type=\"reset\"\n   dir=\"end\">\n  <port name=\"reset_sink_reset_n\" internal=\"reset_sink_reset_n\" />\n </interface>\n <interface\n   name=\"response\"\n   internal=\"modular_adc_0.response\"\n   type=\"avalon_streaming\"\n   dir=\"start\">\n  <port name=\"response_valid\" internal=\"response_valid\" />\n  <port name=\"response_channel\" internal=\"response_channel\" />\n  <port name=\"response_data\" internal=\"response_data\" />\n  <port name=\"response_startofpacket\" internal=\"response_startofpacket\" />\n  <port name=\"response_endofpacket\" internal=\"response_endofpacket\" />\n </interface>\n <interface name=\"sample_store_csr\" internal=\"modular_adc_0.sample_store_csr\" />\n <interface name=\"sample_store_irq\" internal=\"modular_adc_0.sample_store_irq\" />\n <interface name=\"sequencer_csr\" internal=\"modular_adc_0.sequencer_csr\" />\n <interface name=\"threshold\" internal=\"modular_adc_0.threshold\" />\n <module\n   name=\"modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"15.0\"\n   enabled=\"1\"\n   autoexport=\"1\">\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\" value=\"8\" />\n  <parameter name=\"CLOCK_FREQ\" value=\"0\" />\n  <parameter name=\"CORE_VAR\" value=\"3\" />\n  <parameter name=\"DEVICE_PART\" value=\"10M08SAE144C8GES\" />\n  <parameter name=\"ENABLE_DEBUG\" value=\"0\" />\n  <parameter name=\"FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"MONITOR_COUNT_WIDTH\" value=\"12\" />\n  <parameter name=\"clkdiv\" value=\"2\" />\n  <parameter name=\"en_thmax_ch0\" value=\"false\" />\n  <parameter name=\"en_thmax_ch1\" value=\"false\" />\n  <parameter name=\"en_thmax_ch10\" value=\"false\" />\n  <parameter name=\"en_thmax_ch11\" value=\"false\" />\n  <parameter name=\"en_thmax_ch12\" value=\"false\" />\n  <parameter name=\"en_thmax_ch13\" value=\"false\" />\n  <parameter name=\"en_thmax_ch14\" value=\"false\" />\n  <parameter name=\"en_thmax_ch15\" value=\"false\" />\n  <parameter name=\"en_thmax_ch16\" value=\"false\" />\n  <parameter name=\"en_thmax_ch2\" value=\"false\" />\n  <parameter name=\"en_thmax_ch3\" value=\"false\" />\n  <parameter name=\"en_thmax_ch4\" value=\"false\" />\n  <parameter name=\"en_thmax_ch5\" value=\"false\" />\n  <parameter name=\"en_thmax_ch6\" value=\"false\" />\n  <parameter name=\"en_thmax_ch7\" value=\"false\" />\n  <parameter name=\"en_thmax_ch8\" value=\"false\" />\n  <parameter name=\"en_thmax_ch9\" value=\"false\" />\n  <parameter name=\"en_thmin_ch0\" value=\"false\" />\n  <parameter name=\"en_thmin_ch1\" value=\"false\" />\n  <parameter name=\"en_thmin_ch10\" value=\"false\" />\n  <parameter name=\"en_thmin_ch11\" value=\"false\" />\n  <parameter name=\"en_thmin_ch12\" value=\"false\" />\n  <parameter name=\"en_thmin_ch13\" value=\"false\" />\n  <parameter name=\"en_thmin_ch14\" value=\"false\" />\n  <parameter name=\"en_thmin_ch15\" value=\"false\" />\n  <parameter name=\"en_thmin_ch16\" value=\"false\" />\n  <parameter name=\"en_thmin_ch2\" value=\"false\" />\n  <parameter name=\"en_thmin_ch3\" value=\"false\" />\n  <parameter name=\"en_thmin_ch4\" value=\"false\" />\n  <parameter name=\"en_thmin_ch5\" value=\"false\" />\n  <parameter name=\"en_thmin_ch6\" value=\"false\" />\n  <parameter name=\"en_thmin_ch7\" value=\"false\" />\n  <parameter name=\"en_thmin_ch8\" value=\"false\" />\n  <parameter name=\"en_thmin_ch9\" value=\"false\" />\n  <parameter name=\"en_tsd_max\" value=\"false\" />\n  <parameter name=\"en_tsd_min\" value=\"false\" />\n  <parameter name=\"external_vref\" value=\"2.5\" />\n  <parameter name=\"int_vref_vr\" value=\"3.3\" />\n  <parameter name=\"ip_is_for_which_adc\" value=\"1\" />\n  <parameter name=\"prescaler_ch16\" value=\"false\" />\n  <parameter name=\"prescaler_ch8\" value=\"false\" />\n  <parameter name=\"refsel\" value=\"1\" />\n  <parameter name=\"seq_order_length\" value=\"2\" />\n  <parameter name=\"seq_order_slot_1\" value=\"0\" />\n  <parameter name=\"seq_order_slot_10\" value=\"30\" />\n  <parameter name=\"seq_order_slot_11\" value=\"30\" />\n  <parameter name=\"seq_order_slot_12\" value=\"30\" />\n  <parameter name=\"seq_order_slot_13\" value=\"30\" />\n  <parameter name=\"seq_order_slot_14\" value=\"30\" />\n  <parameter name=\"seq_order_slot_15\" value=\"30\" />\n  <parameter name=\"seq_order_slot_16\" value=\"30\" />\n  <parameter name=\"seq_order_slot_17\" value=\"30\" />\n  <parameter name=\"seq_order_slot_18\" value=\"30\" />\n  <parameter name=\"seq_order_slot_19\" value=\"30\" />\n  <parameter name=\"seq_order_slot_2\" value=\"17\" />\n  <parameter name=\"seq_order_slot_20\" value=\"30\" />\n  <parameter name=\"seq_order_slot_21\" value=\"30\" />\n  <parameter name=\"seq_order_slot_22\" value=\"30\" />\n  <parameter name=\"seq_order_slot_23\" value=\"30\" />\n  <parameter name=\"seq_order_slot_24\" value=\"30\" />\n  <parameter name=\"seq_order_slot_25\" value=\"30\" />\n  <parameter name=\"seq_order_slot_26\" value=\"30\" />\n  <parameter name=\"seq_order_slot_27\" value=\"30\" />\n  <parameter name=\"seq_order_slot_28\" value=\"30\" />\n  <parameter name=\"seq_order_slot_29\" value=\"30\" />\n  <parameter name=\"seq_order_slot_3\" value=\"17\" />\n  <parameter name=\"seq_order_slot_30\" value=\"30\" />\n  <parameter name=\"seq_order_slot_31\" value=\"30\" />\n  <parameter name=\"seq_order_slot_32\" value=\"30\" />\n  <parameter name=\"seq_order_slot_33\" value=\"30\" />\n  <parameter name=\"seq_order_slot_34\" value=\"30\" />\n  <parameter name=\"seq_order_slot_35\" value=\"30\" />\n  <parameter name=\"seq_order_slot_36\" value=\"30\" />\n  <parameter name=\"seq_order_slot_37\" value=\"30\" />\n  <parameter name=\"seq_order_slot_38\" value=\"30\" />\n  <parameter name=\"seq_order_slot_39\" value=\"30\" />\n  <parameter name=\"seq_order_slot_4\" value=\"30\" />\n  <parameter name=\"seq_order_slot_40\" value=\"30\" />\n  <parameter name=\"seq_order_slot_41\" value=\"30\" />\n  <parameter name=\"seq_order_slot_42\" value=\"30\" />\n  <parameter name=\"seq_order_slot_43\" value=\"30\" />\n  <parameter name=\"seq_order_slot_44\" value=\"30\" />\n  <parameter name=\"seq_order_slot_45\" value=\"30\" />\n  <parameter name=\"seq_order_slot_46\" value=\"30\" />\n  <parameter name=\"seq_order_slot_47\" value=\"30\" />\n  <parameter name=\"seq_order_slot_48\" value=\"30\" />\n  <parameter name=\"seq_order_slot_49\" value=\"30\" />\n  <parameter name=\"seq_order_slot_5\" value=\"30\" />\n  <parameter name=\"seq_order_slot_50\" value=\"30\" />\n  <parameter name=\"seq_order_slot_51\" value=\"30\" />\n  <parameter name=\"seq_order_slot_52\" value=\"30\" />\n  <parameter name=\"seq_order_slot_53\" value=\"30\" />\n  <parameter name=\"seq_order_slot_54\" value=\"30\" />\n  <parameter name=\"seq_order_slot_55\" value=\"30\" />\n  <parameter name=\"seq_order_slot_56\" value=\"30\" />\n  <parameter name=\"seq_order_slot_57\" value=\"30\" />\n  <parameter name=\"seq_order_slot_58\" value=\"30\" />\n  <parameter name=\"seq_order_slot_59\" value=\"30\" />\n  <parameter name=\"seq_order_slot_6\" value=\"30\" />\n  <parameter name=\"seq_order_slot_60\" value=\"30\" />\n  <parameter name=\"seq_order_slot_61\" value=\"30\" />\n  <parameter name=\"seq_order_slot_62\" value=\"30\" />\n  <parameter name=\"seq_order_slot_63\" value=\"30\" />\n  <parameter name=\"seq_order_slot_64\" value=\"30\" />\n  <parameter name=\"seq_order_slot_7\" value=\"30\" />\n  <parameter name=\"seq_order_slot_8\" value=\"30\" />\n  <parameter name=\"seq_order_slot_9\" value=\"30\" />\n  <parameter name=\"thmax_ch0\" value=\"0.0\" />\n  <parameter name=\"thmax_ch1\" value=\"0.0\" />\n  <parameter name=\"thmax_ch10\" value=\"0.0\" />\n  <parameter name=\"thmax_ch11\" value=\"0.0\" />\n  <parameter name=\"thmax_ch12\" value=\"0.0\" />\n  <parameter name=\"thmax_ch13\" value=\"0.0\" />\n  <parameter name=\"thmax_ch14\" value=\"0.0\" />\n  <parameter name=\"thmax_ch15\" value=\"0.0\" />\n  <parameter name=\"thmax_ch16\" value=\"0.0\" />\n  <parameter name=\"thmax_ch2\" value=\"0.0\" />\n  <parameter name=\"thmax_ch3\" value=\"0.0\" />\n  <parameter name=\"thmax_ch4\" value=\"0.0\" />\n  <parameter name=\"thmax_ch5\" value=\"0.0\" />\n  <parameter name=\"thmax_ch6\" value=\"0.0\" />\n  <parameter name=\"thmax_ch7\" value=\"0.0\" />\n  <parameter name=\"thmax_ch8\" value=\"0.0\" />\n  <parameter name=\"thmax_ch9\" value=\"0.0\" />\n  <parameter name=\"thmin_ch0\" value=\"0.0\" />\n  <parameter name=\"thmin_ch1\" value=\"0.0\" />\n  <parameter name=\"thmin_ch10\" value=\"0.0\" />\n  <parameter name=\"thmin_ch11\" value=\"0.0\" />\n  <parameter name=\"thmin_ch12\" value=\"0.0\" />\n  <parameter name=\"thmin_ch13\" value=\"0.0\" />\n  <parameter name=\"thmin_ch14\" value=\"0.0\" />\n  <parameter name=\"thmin_ch15\" value=\"0.0\" />\n  <parameter name=\"thmin_ch16\" value=\"0.0\" />\n  <parameter name=\"thmin_ch2\" value=\"0.0\" />\n  <parameter name=\"thmin_ch3\" value=\"0.0\" />\n  <parameter name=\"thmin_ch4\" value=\"0.0\" />\n  <parameter name=\"thmin_ch5\" value=\"0.0\" />\n  <parameter name=\"thmin_ch6\" value=\"0.0\" />\n  <parameter name=\"thmin_ch7\" value=\"0.0\" />\n  <parameter name=\"thmin_ch8\" value=\"0.0\" />\n  <parameter name=\"thmin_ch9\" value=\"0.0\" />\n  <parameter name=\"tsclkdiv\" value=\"1\" />\n  <parameter name=\"tsclksel\" value=\"1\" />\n  <parameter name=\"tsd_max\" value=\"125\" />\n  <parameter name=\"tsd_min\" value=\"0\" />\n  <parameter name=\"use_ch0\" value=\"true\" />\n  <parameter name=\"use_ch1\" value=\"false\" />\n  <parameter name=\"use_ch10\" value=\"false\" />\n  <parameter name=\"use_ch11\" value=\"false\" />\n  <parameter name=\"use_ch12\" value=\"false\" />\n  <parameter name=\"use_ch13\" value=\"false\" />\n  <parameter name=\"use_ch14\" value=\"false\" />\n  <parameter name=\"use_ch15\" value=\"false\" />\n  <parameter name=\"use_ch16\" value=\"false\" />\n  <parameter name=\"use_ch2\" value=\"false\" />\n  <parameter name=\"use_ch3\" value=\"false\" />\n  <parameter name=\"use_ch4\" value=\"false\" />\n  <parameter name=\"use_ch5\" value=\"false\" />\n  <parameter name=\"use_ch6\" value=\"false\" />\n  <parameter name=\"use_ch7\" value=\"false\" />\n  <parameter name=\"use_ch8\" value=\"false\" />\n  <parameter name=\"use_ch9\" value=\"false\" />\n  <parameter name=\"use_tsd\" value=\"true\" />\n </module>\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.enableEccProtection\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.insertDefaultSlave\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.maxAdditionalLatency\" value=\"1\" />\n</system>\n"
  },
  {
    "path": "max10_adc_firmware_v8/myadc.sopcinfo",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<EnsembleReport name=\"myadc\" kind=\"myadc\" version=\"1.0\" fabric=\"QSYS\">\n <!-- Format version 15.0 145 (Future versions may contain additional information.) -->\n <!-- 2017.10.27.10:04:12 -->\n <!-- A collection of modules and connections -->\n <parameter name=\"AUTO_GENERATION_ID\">\n  <type>java.lang.Integer</type>\n  <value>1509113052</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>GENERATION_ID</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_UNIQUE_ID\">\n  <type>java.lang.String</type>\n  <value></value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>UNIQUE_ID</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE_FAMILY\">\n  <type>java.lang.String</type>\n  <value>MAX10FPGA</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE\">\n  <type>java.lang.String</type>\n  <value>10M08SAE144C8GES</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE_SPEEDGRADE\">\n  <type>java.lang.String</type>\n  <value>8</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_ADC_PLL_CLOCK_CLOCK_RATE\">\n  <type>java.lang.Long</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>CLOCK_RATE</sysinfo_type>\n  <sysinfo_arg>adc_pll_clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_ADC_PLL_CLOCK_CLOCK_DOMAIN\">\n  <type>java.lang.Integer</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>\n  <sysinfo_arg>adc_pll_clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_ADC_PLL_CLOCK_RESET_DOMAIN\">\n  <type>java.lang.Integer</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>RESET_DOMAIN</sysinfo_type>\n  <sysinfo_arg>adc_pll_clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_CLOCK_CLOCK_RATE\">\n  <type>java.lang.Long</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>CLOCK_RATE</sysinfo_type>\n  <sysinfo_arg>clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_CLOCK_CLOCK_DOMAIN\">\n  <type>java.lang.Integer</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>\n  <sysinfo_arg>clock</sysinfo_arg>\n </parameter>\n <parameter name=\"AUTO_CLOCK_RESET_DOMAIN\">\n  <type>java.lang.Integer</type>\n  <value>-1</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>RESET_DOMAIN</sysinfo_type>\n  <sysinfo_arg>clock</sysinfo_arg>\n </parameter>\n <parameter name=\"deviceFamily\">\n  <type>java.lang.String</type>\n  <value>MAX 10</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n </parameter>\n <parameter name=\"generateLegacySim\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <module\n   name=\"modular_adc_0\"\n   kind=\"altera_modular_adc\"\n   version=\"15.0\"\n   path=\"modular_adc_0\">\n  <!-- Describes a single module. Module parameters are\nthe requested settings for a module instance. -->\n  <assignment>\n   <name>embeddedsw.CMacro.CORE_VARIANT</name>\n   <value>3</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.DUAL_ADC_MODE</name>\n   <value>false</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.PRESCALER_CH16</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.PRESCALER_CH8</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.REFSEL</name>\n   <value>Internal VREF</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH0</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH1</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH10</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH11</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH12</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH13</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH14</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH15</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH16</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH2</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH3</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH4</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH5</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH6</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH7</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH8</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_CH9</name>\n   <value>0</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.USE_TSD</name>\n   <value>1</value>\n  </assignment>\n  <assignment>\n   <name>embeddedsw.CMacro.VREF</name>\n   <value>3.3</value>\n  </assignment>\n  <parameter name=\"CORE_VAR\">\n   <type>int</type>\n   <value>3</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"ENABLE_DEBUG\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"MONITOR_COUNT_WIDTH\">\n   <type>int</type>\n   <value>12</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQ\">\n   <type>long</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>CLOCK_RATE</sysinfo_type>\n   <sysinfo_arg>clock</sysinfo_arg>\n  </parameter>\n  <parameter name=\"FAMILY\">\n   <type>java.lang.String</type>\n   <value>MAX10FPGA</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n  </parameter>\n  <parameter name=\"DEVICE_PART\">\n   <type>java.lang.String</type>\n   <value>10M08SAE144C8GES</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE</sysinfo_type>\n  </parameter>\n  <parameter name=\"device_partname_fivechar_prefix\">\n   <type>java.lang.String</type>\n   <value>10M08</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"device_adc_type\">\n   <type>int</type>\n   <value>22</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"max_adc_count_on_die\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"adc_count_on_device\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"device_power_supply_type\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"ip_is_for_which_adc\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"is_this_first_or_second_adc\">\n   <type>int</type>\n   <value>1</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"analog_input_pin_mask\">\n   <type>java.math.BigInteger</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"hard_pwd\">\n   <type>int</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"clkdiv\">\n   <type>int</type>\n   <value>2</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsclkdiv\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsclksel\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"refsel\">\n   <type>int</type>\n   <value>1</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"external_vref\">\n   <type>double</type>\n   <value>2.5</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"int_vref_vr\">\n   <type>double</type>\n   <value>3.3</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"int_vref_nonvr\">\n   <type>double</type>\n   <value>2.5</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"reference_voltage\">\n   <type>double</type>\n   <value>3.3</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescalar\">\n   <type>int</type>\n   <value>0</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_tsd\">\n   <type>boolean</type>\n   <value>true</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_tsd_max\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsd_max\">\n   <type>int</type>\n   <value>125</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_tsd_min\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"tsd_min\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch0\">\n   <type>boolean</type>\n   <value>true</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch0\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch0\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch0\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch0\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch1\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch1\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch1\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch2\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch2\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch2\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch3\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch3\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch3\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch4\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch4\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch4\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch5\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch5\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch5\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch6\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch6\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch6\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch7\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch7\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch7\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescaler_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch8\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch8\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch8\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch9\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch9\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch9\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch10\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch10\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch10\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch11\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch11\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch11\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch12\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch12\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch12\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch13\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch13\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch13\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch14\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch14\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch14\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch15\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch15\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch15\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"use_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"prescaler_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmax_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmax_ch16\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"en_thmin_ch16\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"thmin_ch16\">\n   <type>double</type>\n   <value>0.0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_length\">\n   <type>int</type>\n   <value>2</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_1\">\n   <type>int</type>\n   <value>0</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_2\">\n   <type>int</type>\n   <value>17</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_3\">\n   <type>int</type>\n   <value>17</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_4\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_5\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_6\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_7\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_8\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_9\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_10\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_11\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_12\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_13\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_14\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_15\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_16\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_17\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_18\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_19\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_20\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_21\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_22\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_23\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_24\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_25\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_26\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_27\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_28\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_29\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_30\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_31\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_32\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_33\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_34\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_35\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_36\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_37\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_38\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_39\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_40\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_41\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_42\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_43\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_44\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_45\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_46\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_47\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_48\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_49\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_50\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_51\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_52\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_53\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_54\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_55\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_56\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_57\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_58\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_59\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_60\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_61\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_62\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_63\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"seq_order_slot_64\">\n   <type>int</type>\n   <value>30</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"AUTO_DEVICE_SPEEDGRADE\">\n   <type>java.lang.String</type>\n   <value>8</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>\n  </parameter>\n  <parameter name=\"deviceFamily\">\n   <type>java.lang.String</type>\n   <value>UNKNOWN</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"generateLegacySim\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <interface name=\"clock\" kind=\"clock_sink\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRateKnown\">\n    <type>java.lang.Boolean</type>\n    <value>false</value>\n    <derived>true</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRate\">\n    <type>java.lang.Long</type>\n    <value>0</value>\n    <derived>true</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>false</isStart>\n   <port>\n    <name>clock_clk</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n  <interface name=\"reset_sink\" kind=\"reset_sink\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"synchronousEdges\">\n    <type>com.altera.sopcmodel.reset.Reset$Edges</type>\n    <value>DEASSERT</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>reset</type>\n   <isStart>false</isStart>\n   <port>\n    <name>reset_sink_reset_n</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>reset_n</role>\n   </port>\n  </interface>\n  <interface name=\"adc_pll_clock\" kind=\"clock_sink\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>false</isStart>\n   <port>\n    <name>adc_pll_clock_clk</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n  <interface name=\"adc_pll_locked\" kind=\"conduit_end\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>conduit</type>\n   <isStart>false</isStart>\n   <port>\n    <name>adc_pll_locked_export</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>export</role>\n   </port>\n  </interface>\n  <interface name=\"command\" kind=\"avalon_streaming_sink\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value>reset_sink</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"beatsPerCycle\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"dataBitsPerSymbol\">\n    <type>int</type>\n    <value>8</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"emptyWithinPacket\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"errorDescriptor\">\n    <type>[Ljava.lang.String;</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"firstSymbolInHighOrderBits\">\n    <type>boolean</type>\n    <value>true</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"highOrderSymbolAtMSB\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"maxChannel\">\n    <type>int</type>\n    <value>31</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"packetDescription\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"readyLatency\">\n    <type>int</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"symbolsPerBeat\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>avalon_streaming</type>\n   <isStart>false</isStart>\n   <port>\n    <name>command_valid</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>valid</role>\n   </port>\n   <port>\n    <name>command_channel</name>\n    <direction>Input</direction>\n    <width>5</width>\n    <role>channel</role>\n   </port>\n   <port>\n    <name>command_startofpacket</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>startofpacket</role>\n   </port>\n   <port>\n    <name>command_endofpacket</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>endofpacket</role>\n   </port>\n   <port>\n    <name>command_ready</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>ready</role>\n   </port>\n  </interface>\n  <interface name=\"response\" kind=\"avalon_streaming_source\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value>clock</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value>reset_sink</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"beatsPerCycle\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"dataBitsPerSymbol\">\n    <type>int</type>\n    <value>12</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"emptyWithinPacket\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"errorDescriptor\">\n    <type>[Ljava.lang.String;</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"firstSymbolInHighOrderBits\">\n    <type>boolean</type>\n    <value>true</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"highOrderSymbolAtMSB\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"maxChannel\">\n    <type>int</type>\n    <value>31</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"packetDescription\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"readyLatency\">\n    <type>int</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"symbolsPerBeat\">\n    <type>int</type>\n    <value>1</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>avalon_streaming</type>\n   <isStart>true</isStart>\n   <port>\n    <name>response_valid</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>valid</role>\n   </port>\n   <port>\n    <name>response_channel</name>\n    <direction>Output</direction>\n    <width>5</width>\n    <role>channel</role>\n   </port>\n   <port>\n    <name>response_data</name>\n    <direction>Output</direction>\n    <width>12</width>\n    <role>data</role>\n   </port>\n   <port>\n    <name>response_startofpacket</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>startofpacket</role>\n   </port>\n   <port>\n    <name>response_endofpacket</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>endofpacket</role>\n   </port>\n  </interface>\n </module>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>altera_modular_adc</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IModule</subtype>\n  <displayName>Altera Modular ADC core</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>2</instanceCount>\n  <name>clock_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Clock Input</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>reset_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Reset Input</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>conduit_end</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Conduit</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>avalon_streaming_sink</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Avalon Streaming Sink</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>avalon_streaming_source</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Avalon Streaming Source</displayName>\n  <version>15.0</version>\n </plugin>\n <reportVersion>15.0 145</reportVersion>\n <uniqueIdentifier></uniqueIdentifier>\n</EnsembleReport>\n"
  },
  {
    "path": "max10_adc_firmware_v8/mypll2.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 0 0 256 208)\r\n\t(text \"mypll2\" (rect 109 0 153 16)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 192 25 204)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"inclk0\" (rect 0 0 31 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"inclk0\" (rect 4 50 29 63)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 40 64))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 64)\r\n\t\t(output)\r\n\t\t(text \"c0\" (rect 0 0 14 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"c0\" (rect 240 50 250 63)(font \"Arial\" (font_size 8)))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 80)\r\n\t\t(output)\r\n\t\t(text \"c1\" (rect 0 0 14 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"c1\" (rect 240 66 248 79)(font \"Arial\" (font_size 8)))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 96)\r\n\t\t(output)\r\n\t\t(text \"c2\" (rect 0 0 14 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"c2\" (rect 240 82 250 95)(font \"Arial\" (font_size 8)))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 112)\r\n\t\t(output)\r\n\t\t(text \"c3\" (rect 0 0 14 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"c3\" (rect 240 98 250 111)(font \"Arial\" (font_size 8)))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 128)\r\n\t\t(output)\r\n\t\t(text \"c4\" (rect 0 0 14 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"c4\" (rect 240 114 250 127)(font \"Arial\" (font_size 8)))\r\n\t)\r\n\t(port\r\n\t\t(pt 256 144)\r\n\t\t(output)\r\n\t\t(text \"locked\" (rect 0 0 36 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"locked\" (rect 221 130 250 143)(font \"Arial\" (font_size 8)))\r\n\t)\r\n\t(drawing\r\n\t\t(text \"MAX 10\" (rect 218 192 465 395)(font \"Arial\" ))\r\n\t\t(text \"inclk0 frequency: 50.000 MHz\" (rect 50 59 223 129)(font \"Arial\" ))\r\n\t\t(text \"Operation Mode: Normal\" (rect 50 72 199 155)(font \"Arial\" ))\r\n\t\t(text \"Clk \" (rect 51 93 116 197)(font \"Arial\" ))\r\n\t\t(text \"Ratio\" (rect 72 93 164 197)(font \"Arial\" ))\r\n\t\t(text \"Ph (dg)\" (rect 98 93 225 197)(font \"Arial\" ))\r\n\t\t(text \"DC (%)\" (rect 132 93 294 197)(font \"Arial\" ))\r\n\t\t(text \"c0\" (rect 54 107 116 225)(font \"Arial\" ))\r\n\t\t(text \"1/5\" (rect 77 107 165 225)(font \"Arial\" ))\r\n\t\t(text \"0.00\" (rect 104 107 224 225)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 136 107 293 225)(font \"Arial\" ))\r\n\t\t(text \"c1\" (rect 54 121 115 253)(font \"Arial\" ))\r\n\t\t(text \"5/2\" (rect 77 121 165 253)(font \"Arial\" ))\r\n\t\t(text \"0.00\" (rect 104 121 224 253)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 136 121 293 253)(font \"Arial\" ))\r\n\t\t(text \"c2\" (rect 54 135 116 281)(font \"Arial\" ))\r\n\t\t(text \"1/1\" (rect 77 135 164 281)(font \"Arial\" ))\r\n\t\t(text \"0.00\" (rect 104 135 224 281)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 136 135 293 281)(font \"Arial\" ))\r\n\t\t(text \"c3\" (rect 54 149 116 309)(font \"Arial\" ))\r\n\t\t(text \"5/1\" (rect 77 149 164 309)(font \"Arial\" ))\r\n\t\t(text \"0.00\" (rect 104 149 224 309)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 136 149 293 309)(font \"Arial\" ))\r\n\t\t(text \"c4\" (rect 54 163 117 337)(font \"Arial\" ))\r\n\t\t(text \"5/2\" (rect 77 163 165 337)(font \"Arial\" ))\r\n\t\t(text \"180.00\" (rect 99 163 224 337)(font \"Arial\" ))\r\n\t\t(text \"50.00\" (rect 136 163 293 337)(font \"Arial\" ))\r\n\t\t(line (pt 0 0)(pt 257 0))\r\n\t\t(line (pt 257 0)(pt 257 209))\r\n\t\t(line (pt 0 209)(pt 257 209))\r\n\t\t(line (pt 0 0)(pt 0 209))\r\n\t\t(line (pt 48 91)(pt 164 91))\r\n\t\t(line (pt 48 104)(pt 164 104))\r\n\t\t(line (pt 48 118)(pt 164 118))\r\n\t\t(line (pt 48 132)(pt 164 132))\r\n\t\t(line (pt 48 146)(pt 164 146))\r\n\t\t(line (pt 48 160)(pt 164 160))\r\n\t\t(line (pt 48 174)(pt 164 174))\r\n\t\t(line (pt 48 91)(pt 48 174))\r\n\t\t(line (pt 69 91)(pt 69 174)(line_width 3))\r\n\t\t(line (pt 95 91)(pt 95 174)(line_width 3))\r\n\t\t(line (pt 129 91)(pt 129 174)(line_width 3))\r\n\t\t(line (pt 163 91)(pt 163 174))\r\n\t\t(line (pt 40 48)(pt 207 48))\r\n\t\t(line (pt 207 48)(pt 207 191))\r\n\t\t(line (pt 40 191)(pt 207 191))\r\n\t\t(line (pt 40 48)(pt 40 191))\r\n\t\t(line (pt 255 64)(pt 207 64))\r\n\t\t(line (pt 255 80)(pt 207 80))\r\n\t\t(line (pt 255 96)(pt 207 96))\r\n\t\t(line (pt 255 112)(pt 207 112))\r\n\t\t(line (pt 255 128)(pt 207 128))\r\n\t\t(line (pt 255 144)(pt 207 144))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/mypll2.ppf",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\" ?>\r\n<!DOCTYPE pinplan>\r\n<pinplan intended_family=\"MAX 10\" variation_name=\"mypll2\" megafunction_name=\"ALTPLL\" specifies=\"all_ports\">\r\n<global>\r\n<pin name=\"inclk0\" direction=\"input\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c0\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c1\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c2\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c3\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"c4\" direction=\"output\" scope=\"external\" source=\"clock\"  />\r\n<pin name=\"locked\" direction=\"output\" scope=\"external\"  />\r\n\r\n</global>\r\n</pinplan>\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/mypll2.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"ALTPLL\"\r\nset_global_assignment -name IP_TOOL_VERSION \"15.0\"\r\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\r\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"mypll2.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"mypll2.bsf\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"mypll2_inst.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"mypll2_bb.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"mypll2.ppf\"]\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/mypll2.v",
    "content": "// megafunction wizard: %ALTPLL%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altpll \r\n\r\n// ============================================================\r\n// File Name: mypll2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltpll\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule mypll2 (\r\n\tinclk0,\r\n\tc0,\r\n\tc1,\r\n\tc2,\r\n\tc3,\r\n\tc4,\r\n\tlocked);\r\n\r\n\tinput\t  inclk0;\r\n\toutput\t  c0;\r\n\toutput\t  c1;\r\n\toutput\t  c2;\r\n\toutput\t  c3;\r\n\toutput\t  c4;\r\n\toutput\t  locked;\r\n\r\n\twire [0:0] sub_wire2 = 1'h0;\r\n\twire [4:0] sub_wire3;\r\n\twire  sub_wire9;\r\n\twire  sub_wire0 = inclk0;\r\n\twire [1:0] sub_wire1 = {sub_wire2, sub_wire0};\r\n\twire [4:4] sub_wire8 = sub_wire3[4:4];\r\n\twire [3:3] sub_wire7 = sub_wire3[3:3];\r\n\twire [2:2] sub_wire6 = sub_wire3[2:2];\r\n\twire [1:1] sub_wire5 = sub_wire3[1:1];\r\n\twire [0:0] sub_wire4 = sub_wire3[0:0];\r\n\twire  c0 = sub_wire4;\r\n\twire  c1 = sub_wire5;\r\n\twire  c2 = sub_wire6;\r\n\twire  c3 = sub_wire7;\r\n\twire  c4 = sub_wire8;\r\n\twire  locked = sub_wire9;\r\n\r\n\taltpll\taltpll_component (\r\n\t\t\t\t.inclk (sub_wire1),\r\n\t\t\t\t.clk (sub_wire3),\r\n\t\t\t\t.locked (sub_wire9),\r\n\t\t\t\t.activeclock (),\r\n\t\t\t\t.areset (1'b0),\r\n\t\t\t\t.clkbad (),\r\n\t\t\t\t.clkena ({6{1'b1}}),\r\n\t\t\t\t.clkloss (),\r\n\t\t\t\t.clkswitch (1'b0),\r\n\t\t\t\t.configupdate (1'b0),\r\n\t\t\t\t.enable0 (),\r\n\t\t\t\t.enable1 (),\r\n\t\t\t\t.extclk (),\r\n\t\t\t\t.extclkena ({4{1'b1}}),\r\n\t\t\t\t.fbin (1'b1),\r\n\t\t\t\t.fbmimicbidir (),\r\n\t\t\t\t.fbout (),\r\n\t\t\t\t.fref (),\r\n\t\t\t\t.icdrclk (),\r\n\t\t\t\t.pfdena (1'b1),\r\n\t\t\t\t.phasecounterselect ({4{1'b1}}),\r\n\t\t\t\t.phasedone (),\r\n\t\t\t\t.phasestep (1'b1),\r\n\t\t\t\t.phaseupdown (1'b1),\r\n\t\t\t\t.pllena (1'b1),\r\n\t\t\t\t.scanaclr (1'b0),\r\n\t\t\t\t.scanclk (1'b0),\r\n\t\t\t\t.scanclkena (1'b1),\r\n\t\t\t\t.scandata (1'b0),\r\n\t\t\t\t.scandataout (),\r\n\t\t\t\t.scandone (),\r\n\t\t\t\t.scanread (1'b0),\r\n\t\t\t\t.scanwrite (1'b0),\r\n\t\t\t\t.sclkout0 (),\r\n\t\t\t\t.sclkout1 (),\r\n\t\t\t\t.vcooverrange (),\r\n\t\t\t\t.vcounderrange ());\r\n\tdefparam\r\n\t\taltpll_component.bandwidth_type = \"LOW\",\r\n\t\taltpll_component.clk0_divide_by = 5,\r\n\t\taltpll_component.clk0_duty_cycle = 50,\r\n\t\taltpll_component.clk0_multiply_by = 1,\r\n\t\taltpll_component.clk0_phase_shift = \"0\",\r\n\t\taltpll_component.clk1_divide_by = 2,\r\n\t\taltpll_component.clk1_duty_cycle = 50,\r\n\t\taltpll_component.clk1_multiply_by = 5,\r\n\t\taltpll_component.clk1_phase_shift = \"0\",\r\n\t\taltpll_component.clk2_divide_by = 1,\r\n\t\taltpll_component.clk2_duty_cycle = 50,\r\n\t\taltpll_component.clk2_multiply_by = 1,\r\n\t\taltpll_component.clk2_phase_shift = \"0\",\r\n\t\taltpll_component.clk3_divide_by = 1,\r\n\t\taltpll_component.clk3_duty_cycle = 50,\r\n\t\taltpll_component.clk3_multiply_by = 5,\r\n\t\taltpll_component.clk3_phase_shift = \"0\",\r\n\t\taltpll_component.clk4_divide_by = 2,\r\n\t\taltpll_component.clk4_duty_cycle = 50,\r\n\t\taltpll_component.clk4_multiply_by = 5,\r\n\t\taltpll_component.clk4_phase_shift = \"4000\",\r\n\t\taltpll_component.compensate_clock = \"CLK0\",\r\n\t\taltpll_component.inclk0_input_frequency = 20000,\r\n\t\taltpll_component.intended_device_family = \"MAX 10\",\r\n\t\taltpll_component.lpm_hint = \"CBX_MODULE_PREFIX=mypll2\",\r\n\t\taltpll_component.lpm_type = \"altpll\",\r\n\t\taltpll_component.operation_mode = \"NORMAL\",\r\n\t\taltpll_component.pll_type = \"AUTO\",\r\n\t\taltpll_component.port_activeclock = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_areset = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkbad0 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkbad1 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkloss = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkswitch = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_configupdate = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_fbin = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_inclk0 = \"PORT_USED\",\r\n\t\taltpll_component.port_inclk1 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_locked = \"PORT_USED\",\r\n\t\taltpll_component.port_pfdena = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_phasecounterselect = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_phasedone = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_phasestep = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_phaseupdown = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_pllena = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanaclr = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanclk = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanclkena = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scandata = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scandataout = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scandone = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanread = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_scanwrite = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clk0 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk1 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk2 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk3 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk4 = \"PORT_USED\",\r\n\t\taltpll_component.port_clk5 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena0 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena1 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena2 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena3 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena4 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_clkena5 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_extclk0 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_extclk1 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_extclk2 = \"PORT_UNUSED\",\r\n\t\taltpll_component.port_extclk3 = \"PORT_UNUSED\",\r\n\t\taltpll_component.self_reset_on_loss_lock = \"ON\",\r\n\t\taltpll_component.width_clock = 5;\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: BANDWIDTH STRING \"1.000\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING \"MHz\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING \"Low\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING \"0\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING \"1\"\r\n// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING \"c0\"\r\n// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING \"c0\"\r\n// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING \"8\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR4 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE3 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE4 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING \"10.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING \"125.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING \"50.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING \"250.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE4 STRING \"125.000000\"\r\n// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING \"0\"\r\n// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC \"1048575\"\r\n// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING \"50.000\"\r\n// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING \"MHz\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING \"100.000\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING \"MHz\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING \"1\"\r\n// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING \"Not Available\"\r\n// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING \"deg\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING \"deg\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING \"ps\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT3 STRING \"ps\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT4 STRING \"ps\"\r\n// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING \"Any\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK0 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK1 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK2 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK3 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK4 STRING \"0\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR4 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING \"10.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING \"125.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING \"250.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ4 STRING \"125.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE4 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT3 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT4 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT3 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT4 STRING \"180.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING \"ps\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT4 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING \"inclk0\"\r\n// Retrieval info: PRIVATE: RECONFIG_FILE STRING \"mypll2.mif\"\r\n// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING \"1\"\r\n// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING \"0\"\r\n// Retrieval info: PRIVATE: SPREAD_FREQ STRING \"50.000\"\r\n// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING \"KHz\"\r\n// Retrieval info: PRIVATE: SPREAD_PERCENT STRING \"0.500\"\r\n// Retrieval info: PRIVATE: SPREAD_USE STRING \"0\"\r\n// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: STICKY_CLK0 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK1 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK2 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK3 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK4 STRING \"1\"\r\n// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLK0 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK1 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK2 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK3 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK4 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLKENA0 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA1 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA2 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA3 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA4 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING \"LOW\"\r\n// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC \"2\"\r\n// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK4_DIVIDE_BY NUMERIC \"2\"\r\n// Retrieval info: CONSTANT: CLK4_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK4_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK4_PHASE_SHIFT STRING \"4000\"\r\n// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING \"CLK0\"\r\n// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC \"20000\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altpll\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"NORMAL\"\r\n// Retrieval info: CONSTANT: PLL_TYPE STRING \"AUTO\"\r\n// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_ARESET STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKLOSS STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_FBIN STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_INCLK0 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_INCLK1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_LOCKED STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PFDENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASEDONE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASESTEP STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PLLENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANACLR STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANCLK STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDATA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDONE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANREAD STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANWRITE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clk0 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk1 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk2 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk3 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk4 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk5 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena2 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena3 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena4 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena5 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk2 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk3 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING \"ON\"\r\n// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC \"5\"\r\n// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC \"@clk[4..0]\"\r\n// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC \"c0\"\r\n// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC \"c1\"\r\n// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC \"c2\"\r\n// Retrieval info: USED_PORT: c3 0 0 0 0 OUTPUT_CLK_EXT VCC \"c3\"\r\n// Retrieval info: USED_PORT: c4 0 0 0 0 OUTPUT_CLK_EXT VCC \"c4\"\r\n// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND \"inclk0\"\r\n// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND \"locked\"\r\n// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0\r\n// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0\r\n// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0\r\n// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1\r\n// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2\r\n// Retrieval info: CONNECT: c3 0 0 0 0 @clk 0 0 1 3\r\n// Retrieval info: CONNECT: c4 0 0 0 0 @clk 0 0 1 4\r\n// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.ppf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2_inst.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n// Retrieval info: CBX_MODULE_PREFIX: ON\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/mypll2_bb.v",
    "content": "// megafunction wizard: %ALTPLL%VBB%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altpll \r\n\r\n// ============================================================\r\n// File Name: mypll2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltpll\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\nmodule mypll2 (\r\n\tinclk0,\r\n\tc0,\r\n\tc1,\r\n\tc2,\r\n\tc3,\r\n\tc4,\r\n\tlocked);\r\n\r\n\tinput\t  inclk0;\r\n\toutput\t  c0;\r\n\toutput\t  c1;\r\n\toutput\t  c2;\r\n\toutput\t  c3;\r\n\toutput\t  c4;\r\n\toutput\t  locked;\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: BANDWIDTH STRING \"1.000\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING \"MHz\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING \"Low\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING \"0\"\r\n// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING \"1\"\r\n// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING \"c0\"\r\n// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING \"c0\"\r\n// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING \"8\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR3 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DIV_FACTOR4 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE3 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: DUTY_CYCLE4 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING \"10.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING \"125.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING \"50.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE3 STRING \"250.000000\"\r\n// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE4 STRING \"125.000000\"\r\n// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING \"0\"\r\n// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC \"1048575\"\r\n// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING \"50.000\"\r\n// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING \"MHz\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING \"100.000\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING \"1\"\r\n// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING \"MHz\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING \"1\"\r\n// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING \"Not Available\"\r\n// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING \"deg\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING \"deg\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING \"ps\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT3 STRING \"ps\"\r\n// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT4 STRING \"ps\"\r\n// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING \"Any\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK0 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK1 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK2 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK3 STRING \"0\"\r\n// Retrieval info: PRIVATE: MIRROR_CLK4 STRING \"0\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR3 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: MULT_FACTOR4 NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING \"10.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING \"125.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING \"50.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ3 STRING \"250.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ4 STRING \"125.00000000\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE3 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE4 STRING \"1\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT3 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT4 STRING \"MHz\"\r\n// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT3 STRING \"0.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT4 STRING \"180.00000000\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING \"ps\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT3 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT4 STRING \"deg\"\r\n// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING \"inclk0\"\r\n// Retrieval info: PRIVATE: RECONFIG_FILE STRING \"mypll2.mif\"\r\n// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING \"0\"\r\n// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING \"1\"\r\n// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING \"0\"\r\n// Retrieval info: PRIVATE: SPREAD_FREQ STRING \"50.000\"\r\n// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING \"KHz\"\r\n// Retrieval info: PRIVATE: SPREAD_PERCENT STRING \"0.500\"\r\n// Retrieval info: PRIVATE: SPREAD_USE STRING \"0\"\r\n// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING \"0\"\r\n// Retrieval info: PRIVATE: STICKY_CLK0 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK1 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK2 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK3 STRING \"1\"\r\n// Retrieval info: PRIVATE: STICKY_CLK4 STRING \"1\"\r\n// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLK0 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK1 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK2 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK3 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLK4 STRING \"1\"\r\n// Retrieval info: PRIVATE: USE_CLKENA0 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA1 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA2 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA3 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_CLKENA4 STRING \"0\"\r\n// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING \"LOW\"\r\n// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC \"2\"\r\n// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK3_DIVIDE_BY NUMERIC \"1\"\r\n// Retrieval info: CONSTANT: CLK3_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK3_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK3_PHASE_SHIFT STRING \"0\"\r\n// Retrieval info: CONSTANT: CLK4_DIVIDE_BY NUMERIC \"2\"\r\n// Retrieval info: CONSTANT: CLK4_DUTY_CYCLE NUMERIC \"50\"\r\n// Retrieval info: CONSTANT: CLK4_MULTIPLY_BY NUMERIC \"5\"\r\n// Retrieval info: CONSTANT: CLK4_PHASE_SHIFT STRING \"4000\"\r\n// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING \"CLK0\"\r\n// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC \"20000\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altpll\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"NORMAL\"\r\n// Retrieval info: CONSTANT: PLL_TYPE STRING \"AUTO\"\r\n// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_ARESET STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKLOSS STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_FBIN STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_INCLK0 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_INCLK1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_LOCKED STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_PFDENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASEDONE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASESTEP STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_PLLENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANACLR STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANCLK STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDATA STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANDONE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANREAD STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_SCANWRITE STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clk0 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk1 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk2 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk3 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk4 STRING \"PORT_USED\"\r\n// Retrieval info: CONSTANT: PORT_clk5 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena2 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena3 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena4 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_clkena5 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk0 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk1 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk2 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: PORT_extclk3 STRING \"PORT_UNUSED\"\r\n// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING \"ON\"\r\n// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC \"5\"\r\n// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC \"@clk[4..0]\"\r\n// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC \"c0\"\r\n// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC \"c1\"\r\n// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC \"c2\"\r\n// Retrieval info: USED_PORT: c3 0 0 0 0 OUTPUT_CLK_EXT VCC \"c3\"\r\n// Retrieval info: USED_PORT: c4 0 0 0 0 OUTPUT_CLK_EXT VCC \"c4\"\r\n// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND \"inclk0\"\r\n// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND \"locked\"\r\n// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0\r\n// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0\r\n// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0\r\n// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1\r\n// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2\r\n// Retrieval info: CONNECT: c3 0 0 0 0 @clk 0 0 1 3\r\n// Retrieval info: CONNECT: c4 0 0 0 0 @clk 0 0 1 4\r\n// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.ppf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2_inst.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL mypll2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n// Retrieval info: CBX_MODULE_PREFIX: ON\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/mypll2_inst.v",
    "content": "mypll2\tmypll2_inst (\r\n\t.inclk0 ( inclk0_sig ),\r\n\t.c0 ( c0_sig ),\r\n\t.c1 ( c1_sig ),\r\n\t.c2 ( c2_sig ),\r\n\t.c3 ( c3_sig ),\r\n\t.c4 ( c4_sig ),\r\n\t.locked ( locked_sig )\r\n\t);\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/osc_1.qsys",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<system name=\"$${FILENAME}\">\n <component\n   name=\"$${FILENAME}\"\n   displayName=\"$${FILENAME}\"\n   version=\"1.0\"\n   description=\"\"\n   tags=\"INTERNAL_COMPONENT=true\"\n   categories=\"\" />\n <parameter name=\"bonusData\"><![CDATA[bonusData \r\n{\r\n   element $${FILENAME}\r\n   {\r\n   }\r\n   element int_osc_0\r\n   {\r\n      datum _sortIndex\r\n      {\r\n         value = \"0\";\r\n         type = \"int\";\r\n      }\r\n   }\r\n}\r\n]]></parameter>\n <parameter name=\"clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <parameter name=\"device\" value=\"10M08SAE144C8GES\" />\n <parameter name=\"deviceFamily\" value=\"MAX 10\" />\n <parameter name=\"deviceSpeedGrade\" value=\"8\" />\n <parameter name=\"fabricMode\" value=\"QSYS\" />\n <parameter name=\"generateLegacySim\" value=\"false\" />\n <parameter name=\"generationId\" value=\"0\" />\n <parameter name=\"globalResetBus\" value=\"false\" />\n <parameter name=\"hdlLanguage\" value=\"VERILOG\" />\n <parameter name=\"hideFromIPCatalog\" value=\"true\" />\n <parameter name=\"lockedInterfaceDefinition\" value=\"\" />\n <parameter name=\"maxAdditionalLatency\" value=\"1\" />\n <parameter name=\"projectName\" value=\"\" />\n <parameter name=\"sopcBorderPoints\" value=\"false\" />\n <parameter name=\"systemHash\" value=\"0\" />\n <parameter name=\"testBenchDutName\" value=\"\" />\n <parameter name=\"timeStamp\" value=\"0\" />\n <parameter name=\"useTestBenchNamingPattern\" value=\"false\" />\n <instanceScript></instanceScript>\n <interface name=\"clkout\" internal=\"int_osc_0.clkout\" type=\"clock\" dir=\"start\">\n  <port name=\"clkout\" internal=\"clkout\" />\n </interface>\n <interface name=\"oscena\" internal=\"int_osc_0.oscena\" type=\"conduit\" dir=\"end\">\n  <port name=\"oscena\" internal=\"oscena\" />\n </interface>\n <module\n   name=\"int_osc_0\"\n   kind=\"altera_int_osc\"\n   version=\"15.0\"\n   enabled=\"1\"\n   autoexport=\"1\">\n  <parameter name=\"CBX_AUTO_BLACKBOX\" value=\"ALL\" />\n  <parameter name=\"CLOCK_FREQUENCY_1\" value=\"55\" />\n  <parameter name=\"CLOCK_FREQUENCY_2\" value=\"77\" />\n  <parameter name=\"DEVICE_FAMILY\" value=\"MAX 10\" />\n  <parameter name=\"PART_NAME\" value=\"10M08SAE144C8GES\" />\n </module>\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.clockCrossingAdapter\" value=\"HANDSHAKE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.enableEccProtection\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.insertDefaultSlave\" value=\"FALSE\" />\n <interconnectRequirement for=\"$system\" name=\"qsys_mm.maxAdditionalLatency\" value=\"1\" />\n</system>\n"
  },
  {
    "path": "max10_adc_firmware_v8/osc_1.sopcinfo",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<EnsembleReport name=\"osc_1\" kind=\"osc_1\" version=\"1.0\" fabric=\"QSYS\">\n <!-- Format version 15.0 145 (Future versions may contain additional information.) -->\n <!-- 2017.05.22.13:20:43 -->\n <!-- A collection of modules and connections -->\n <parameter name=\"AUTO_GENERATION_ID\">\n  <type>java.lang.Integer</type>\n  <value>1495473643</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>GENERATION_ID</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_UNIQUE_ID\">\n  <type>java.lang.String</type>\n  <value></value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>UNIQUE_ID</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE_FAMILY\">\n  <type>java.lang.String</type>\n  <value>MAX10FPGA</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE\">\n  <type>java.lang.String</type>\n  <value>10M08SAE144C8GES</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE</sysinfo_type>\n </parameter>\n <parameter name=\"AUTO_DEVICE_SPEEDGRADE\">\n  <type>java.lang.String</type>\n  <value>8</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>\n </parameter>\n <parameter name=\"deviceFamily\">\n  <type>java.lang.String</type>\n  <value>MAX 10</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>false</visible>\n  <valid>true</valid>\n  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n </parameter>\n <parameter name=\"generateLegacySim\">\n  <type>boolean</type>\n  <value>false</value>\n  <derived>false</derived>\n  <enabled>true</enabled>\n  <visible>true</visible>\n  <valid>true</valid>\n </parameter>\n <module\n   name=\"int_osc_0\"\n   kind=\"altera_int_osc\"\n   version=\"15.0\"\n   path=\"int_osc_0\">\n  <!-- Describes a single module. Module parameters are\nthe requested settings for a module instance. -->\n  <parameter name=\"INFORMATION\">\n   <type>java.lang.String</type>\n   <value><![CDATA[The output frequency for 10M02, 10M04, 10M08, 10M16, and 10M25 devices is 55~116MHz <br>The output frequency for 10M40, and 10M50 devices is 35~77MHz <br>]]></value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"DEVICE_FAMILY\">\n   <type>java.lang.String</type>\n   <value>MAX10FPGA</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE_FAMILY</sysinfo_type>\n  </parameter>\n  <parameter name=\"PART_NAME\">\n   <type>java.lang.String</type>\n   <value>10M08SAE144C8GES</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n   <sysinfo_type>DEVICE</sysinfo_type>\n  </parameter>\n  <parameter name=\"DEVICE_ID\">\n   <type>java.lang.String</type>\n   <value>08</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQUENCY_1\">\n   <type>java.lang.String</type>\n   <value>55</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQUENCY_2\">\n   <type>java.lang.String</type>\n   <value>77</value>\n   <derived>false</derived>\n   <enabled>false</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CLOCK_FREQUENCY\">\n   <type>java.lang.String</type>\n   <value>55</value>\n   <derived>true</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"CBX_AUTO_BLACKBOX\">\n   <type>java.lang.String</type>\n   <value>ALL</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>false</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"deviceFamily\">\n   <type>java.lang.String</type>\n   <value>UNKNOWN</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <parameter name=\"generateLegacySim\">\n   <type>boolean</type>\n   <value>false</value>\n   <derived>false</derived>\n   <enabled>true</enabled>\n   <visible>true</visible>\n   <valid>true</valid>\n  </parameter>\n  <interface name=\"oscena\" kind=\"conduit_end\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <assignment>\n    <name>ui.blockdiagram.direction</name>\n    <value>INPUT</value>\n   </assignment>\n   <parameter name=\"associatedClock\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"associatedReset\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>conduit</type>\n   <isStart>false</isStart>\n   <port>\n    <name>oscena</name>\n    <direction>Input</direction>\n    <width>1</width>\n    <role>oscena</role>\n   </port>\n  </interface>\n  <interface name=\"clkout\" kind=\"clock_source\" version=\"15.0\">\n   <!-- The connection points exposed by a module instance for the\nparticular module parameters. Connection points and their\nparameters are a RESULT of the module parameters. -->\n   <assignment>\n    <name>ui.blockdiagram.direction</name>\n    <value>OUTPUT</value>\n   </assignment>\n   <parameter name=\"associatedDirectClock\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRate\">\n    <type>long</type>\n    <value>0</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"clockRateKnown\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"externallyDriven\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"ptfSchematicName\">\n    <type>java.lang.String</type>\n    <value></value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>false</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"deviceFamily\">\n    <type>java.lang.String</type>\n    <value>UNKNOWN</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <parameter name=\"generateLegacySim\">\n    <type>boolean</type>\n    <value>false</value>\n    <derived>false</derived>\n    <enabled>true</enabled>\n    <visible>true</visible>\n    <valid>true</valid>\n   </parameter>\n   <type>clock</type>\n   <isStart>true</isStart>\n   <port>\n    <name>clkout</name>\n    <direction>Output</direction>\n    <width>1</width>\n    <role>clk</role>\n   </port>\n  </interface>\n </module>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>altera_int_osc</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IModule</subtype>\n  <displayName>Internal Oscillator</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>conduit_end</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Conduit</displayName>\n  <version>15.0</version>\n </plugin>\n <plugin>\n  <instanceCount>1</instanceCount>\n  <name>clock_source</name>\n  <type>com.altera.entityinterfaces.IElementClass</type>\n  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>\n  <displayName>Clock Output</displayName>\n  <version>15.0</version>\n </plugin>\n <reportVersion>15.0 145</reportVersion>\n <uniqueIdentifier></uniqueIdentifier>\n</EnsembleReport>\n"
  },
  {
    "path": "max10_adc_firmware_v8/oscillo.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 376 512)\r\n\t(text \"oscillo\" (rect 5 0 27 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 480 20 492)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"startTrigger\" (rect 0 0 46 12)(font \"Arial\" ))\r\n\t\t(text \"startTrigger\" (rect 21 43 67 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"clk_flash\" (rect 0 0 35 12)(font \"Arial\" ))\r\n\t\t(text \"clk_flash\" (rect 21 59 56 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text 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  {
    "path": "max10_adc_firmware_v8/oscillo.v",
    "content": "module oscillo(clk, startTrigger, clk_flash, data_flash1, data_flash2, data_flash3, data_flash4, pwr1, pwr2, shdn_out, spen_out, trig_in, trig_out, rden, rdaddress, \r\ndata_ready, wraddress_triggerpoint, imthelast, imthefirst,rollingtrigger,trigDebug,triggerpoint,downsample,\r\ntrigthresh,trigchannels,triggertype,triggertot,format_sdin_out,div_sclk_out,outsel_cs_out,clk_spi,SPIsend,SPIsenddata,\r\nwraddress,Acquiring,SPIstate,clk_flash2,trigthresh2,dout1,dout2,dout3,dout4,highres,ext_trig_in,use_ext_trig, nsmp);\r\ninput clk,clk_spi;\r\ninput startTrigger;\r\ninput [1:0] trig_in;\r\noutput reg [1:0] trig_out;\r\noutput reg pwr1=0;//to power up adc, set low\r\noutput reg pwr2=0;//to power up adc, set low\r\noutput reg shdn_out=0;//Active-High Power-Down. If SPEN is high (parallel programming mode), a register reset is initiated on the falling edge of SHDN.\r\noutput reg spen_out=0;//Active-Low SPI Enable. Drive high to enable parallel programming mode.\r\noutput reg format_sdin_out=0;//0=2's complement, 1=offset binary, unconnected=gray code\r\noutput reg div_sclk_out=0;//0=divide clock by 1, 1=divide clock by 2, unconnected=divide clock by 4\r\noutput reg outsel_cs_out=1;//0=CMOS (dual bus), 1=MUX CMOS (channel A data bus), unconnected=MUX CMOS (channel b data bus)\r\ninput clk_flash, clk_flash2;\r\ninput [7:0] data_flash1, data_flash2, data_flash3, data_flash4;\r\noutput reg [7:0] dout1, dout2, dout3, dout4;\r\nparameter ram_width=10;\r\noutput reg[ram_width-1:0] wraddress_triggerpoint;\r\ninput wire [ram_width-1:0] rdaddress;\r\ninput wire rden;//read enable\r\noutput reg data_ready=0;\r\ninput wire imthelast, imthefirst;\r\ninput wire rollingtrigger;\r\noutput reg trigDebug=1;\r\ninput [7:0] trigthresh, trigthresh2;\r\ninput [3:0] trigchannels;\r\ninput [ram_width-1:0] triggerpoint;\r\ninput [7:0] downsample; // only record 1 out of every 2^downsample samples\r\ninput [3:0] triggertype;\r\ninput [ram_width:0] triggertot; // the top bit says whether to do check every sample or only according to downsample\r\ninput highres;\r\nparameter maxhighres=5;\r\nreg [7+maxhighres:0] highres1, highres2, highres3, highres4;\r\ninput ext_trig_in, use_ext_trig;\r\ninput [ram_width-1:0] nsmp;\r\n\r\nreg [31:0] SPIcounter=0;//clock counter for SPI\r\ninput [15:0] SPIsenddata;//the bits to send\r\ninput SPIsend;//start sending\r\nreg [3:0] SPIsendcounter;//which bit to send\r\nlocalparam SPI0=0, SPI1=1, SPI2=2, SPI3=3;\r\noutput reg[3:0] SPIstate=SPI0;\r\nalways @(posedge clk_spi) begin\r\nif (!spen_out) begin // we're in SPI mode\r\nSPIcounter=SPIcounter+1;\r\ncase (SPIstate)\r\n\tSPI0: begin // this is the beginning\r\n\t\tif (SPIsend) begin\r\n\t\t\tSPIcounter=0;\r\n\t\t\toutsel_cs_out=1;//start high\r\n\t\t\tdiv_sclk_out=1;\r\n\t\t\tSPIsendcounter=4'b1111;\r\n\t\t\tSPIstate=SPI1;\r\n\t\tend\r\n\tend\r\n\tSPI1: begin\r\n\t\tif (SPIcounter[2]) begin // start of sending, note that we wait a full tick (was 4)\r\n\t\t\tdiv_sclk_out=0;\r\n\t\t\toutsel_cs_out=0;//start sending\r\n\t\t\tformat_sdin_out=SPIsenddata[SPIsendcounter];//the data\r\n\t\t\tSPIsendcounter=SPIsendcounter-4'b001;//keep track of how many bits we've sent\r\n\t\t\tSPIstate=SPI2;\r\n\t\tend\r\n\tend\r\n\tSPI2: begin\r\n\t\tif (!SPIcounter[2]) begin // sending data on rising edge, note that we wait a full tick\r\n\t\t\tdiv_sclk_out=1;\r\n\t\t\tif (SPIsendcounter==4'b1111) SPIstate=SPI3; //done\r\n\t\t\telse SPIstate=SPI1;//send next bit\r\n\t\tend\r\n\tend\r\n\tSPI3: begin\r\n\t\tif (SPIcounter[2]) begin // done sending, note that we wait a full tick\r\n\t\t\toutsel_cs_out=1;//back to high\r\n\t\t\tdiv_sclk_out=0;\r\n\t\t\tSPIstate=SPI0;\r\n\t\tend\r\n\tend\r\nendcase\r\nend // SPI mode\r\nend // clk_spi posedge\r\n\r\nreg Threshold1[3:0], Threshold2[3:0];\r\nreg [ram_width:0] Threshold3[3:0];//keep track of the counter time it was above/below threshold for \r\nreg selftrigtemp[3:0];\r\nreg Trigger;\r\nreg AcquiringAndTriggered=0;\r\nreg HaveFullData=0;\r\ninteger i;\r\ninitial begin\r\n\tThreshold3[0]=0;\r\n\tThreshold3[1]=0;\r\n\tThreshold3[2]=0;\r\n\tThreshold3[3]=0;\r\nend\r\nreg [ram_width-1:0] samplecount=0;\r\noutput reg [ram_width-1:0] wraddress;\r\noutput reg Acquiring;\r\nreg PreOrPostAcquiring;\r\n\r\nreg [7:0] data_flash1_reg; always @(posedge clk_flash) data_flash1_reg <= data_flash1;\r\nreg [7:0] data_flash2_reg; always @(posedge clk_flash) data_flash2_reg <= data_flash2; // no multiplexing\r\n//reg [7:0] data_flash2_reg; always @(negedge clk_flash) data_flash2_reg <= data_flash1; // for multiplexing\r\n\r\nreg [7:0] data_flash3_reg; always @(posedge clk_flash2) data_flash3_reg <= data_flash3;\r\nreg [7:0] data_flash4_reg; always @(posedge clk_flash2) data_flash4_reg <= data_flash4; // no multiplexing\r\n//reg [7:0] data_flash4_reg; always @(negedge clk_flash2) data_flash4_reg <= data_flash3; // for multiplexing\r\n\r\nalways @(posedge clk_flash) begin\r\n\ti=0;\r\n\twhile (i<4) begin\r\n\t\tif (trigchannels[i]) begin\r\n\t\t\t// above threshold now?\r\n\t\t\tif (i==0) Threshold1[i] <= (data_flash1_reg>=trigthresh && data_flash1_reg<=trigthresh2);\r\n\t\t\tif (i==1) Threshold1[i] <= (data_flash2_reg>=trigthresh && data_flash2_reg<=trigthresh2);\r\n\t\t\tif (i==2) Threshold1[i] <= (data_flash3_reg>=trigthresh && data_flash3_reg<=trigthresh2);\r\n\t\t\tif (i==3) Threshold1[i] <= (data_flash4_reg>=trigthresh && data_flash4_reg<=trigthresh2);\r\n\t\t\tThreshold2[i] <= Threshold1[i]; // was above threshold?\r\n\t\t\t\r\n\t\t\tif (triggertype[0]) begin // if positive edge, trigger! (possibly after demanding a timeout)\r\n\t\t\t\tif (triggertot[ram_width-1:0]) begin\r\n\t\t\t\t\tselftrigtemp[i] = 0;//assume we are not firing\r\n\t\t\t\t\tif (Threshold3[i]) begin\r\n\t\t\t\t\t\tif (triggertot[ram_width]) begin // only check every 2^downsample samples\r\n\t\t\t\t\t\t\tif (downsamplego) begin\r\n\t\t\t\t\t\t\t\tif (Threshold1[i]) Threshold3[i] <= Threshold3[i]+1; // keep track of how long it's been above threshold\r\n\t\t\t\t\t\t\t\telse Threshold3[i] <= 0; // reset once it goes below threshold\r\n\t\t\t\t\t\t\tend\r\n\t\t\t\t\t\tend\r\n\t\t\t\t\t\telse begin // check every sample\r\n\t\t\t\t\t\t\tif (Threshold1[i]) Threshold3[i] <= Threshold3[i]+1; // keep track of how long it's been above threshold\r\n\t\t\t\t\t\t\telse Threshold3[i] <= 0; // reset once it goes below threshold\r\n\t\t\t\t\t\tend\r\n\t\t\t\t\t\tif (Threshold3[i]>triggertot[ram_width-1:0]) begin //fired!\r\n\t\t\t\t\t\t\tselftrigtemp[i] = 1;\r\n\t\t\t\t\t\t\tThreshold3[i] <= 0; // reset once it fires\r\n\t\t\t\t\t\tend\r\n\t\t\t\t\tend\r\n\t\t\t\t\telse if (Threshold1[i] & ~Threshold2[i]) begin // got a positive edge\r\n\t\t\t\t\t\tThreshold3[i] <= 1; // start counting\t\t\t\t\t\t\r\n\t\t\t\t\tend\r\n\t\t\t\tend\r\n\t\t\t\telse selftrigtemp[i] <= (Threshold1[i] & ~Threshold2[i]);// got a positive edge, just trigger\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse begin // if negative edge, trigger! (possibly after demanding a timeout)\t\t\t\t\r\n\t\t\t\tif (triggertot[ram_width-1:0]) begin\r\n\t\t\t\t\tselftrigtemp[i] = 0;//assume we are not firing\r\n\t\t\t\t\tif (Threshold3[i]) begin\t\t\t\t\t\r\n\t\t\t\t\t\tif (triggertot[ram_width]) begin // only check every 2^downsample samples\r\n\t\t\t\t\t\t\tif (downsamplego) begin\r\n\t\t\t\t\t\t\t\tif (~Threshold1[i]) Threshold3[i] <= Threshold3[i]+1; // keep track of how long it's been below threshold\r\n\t\t\t\t\t\t\t\telse Threshold3[i] <= 0; // reset once it goes above threshold\r\n\t\t\t\t\t\t\tend\r\n\t\t\t\t\t\tend\r\n\t\t\t\t\t\telse begin // check every sample\r\n\t\t\t\t\t\t\tif (~Threshold1[i]) Threshold3[i] <= Threshold3[i]+1; // keep track of how long it's been below threshold\r\n\t\t\t\t\t\t\telse Threshold3[i] <= 0; // reset once it goes above threshold\r\n\t\t\t\t\t\tend\t\t\t\t\t\t\r\n\t\t\t\t\t\tif (Threshold3[i]>triggertot[ram_width-1:0]) begin //fired!\r\n\t\t\t\t\t\t\tselftrigtemp[i] = 1;\r\n\t\t\t\t\t\t\tThreshold3[i] <= 0; // reset once it fires\r\n\t\t\t\t\t\tend\r\n\t\t\t\t\tend\r\n\t\t\t\t\telse if (~Threshold1[i] & Threshold2[i]) begin // got a negative edge\r\n\t\t\t\t\t\tThreshold3[i] <= 1; // start counting\t\t\t\t\t\t\r\n\t\t\t\t\tend\r\n\t\t\t\tend\r\n\t\t\t\telse selftrigtemp[i] <= (~Threshold1[i] & Threshold2[i]);// got a negative edge, just trigger\r\n\t\t\tend\r\n\t\t\t\r\n\t\tend\r\n\t\ti=i+1;\r\n\tend\r\nend\r\n\r\nreg[12:0] ext_trig_in_delay_bits=0;\r\nreg ext_trig_in_delayed;\r\nalways @(posedge clk_flash) begin\r\n\text_trig_in_delayed <= ext_trig_in_delay_bits[12];\r\n\text_trig_in_delay_bits <= {ext_trig_in_delay_bits[12-1:0], ext_trig_in};\r\nend\r\n\r\nreg[31:0] thecounter; // counter for the rolling trigger\r\nalways @(posedge clk_flash) if (Trigger) thecounter<=0; else thecounter<=thecounter+1;\r\nwire selftrig; //trigger is an OR of all the channels which are active // also trigger every second or so (rolling)\r\nassign selftrig = (trigchannels[0]&&selftrigtemp[0])||(trigchannels[1]&&selftrigtemp[1])||(trigchannels[2]&&selftrigtemp[2])||(trigchannels[3]&&selftrigtemp[3]) ||(rollingtrigger&thecounter>=25000000) || (use_ext_trig&ext_trig_in_delayed);\r\n\r\nalways @(posedge clk_flash)\r\nif (imthefirst & imthelast) Trigger = selftrig; // we trigger if we triggered ourselves\r\nelse if (imthefirst) Trigger = selftrig||trig_in[1]; // we trigger if we triggered ourselves, or got a trigger in towards the right\r\nelse if (imthelast) Trigger = selftrig||trig_in[0]; // we trigger if we triggered ourselves, or got a trigger in towards the left\r\nelse Trigger = selftrig||trig_in[0]||trig_in[1]; // we trigger if we triggered ourselves, or got a trigger from the left or right\r\n\r\nalways @(posedge clk_flash)\r\nif (imthefirst) trig_out[0] = selftrig; // we trigger out to the left if we triggered ourselves\r\nelse trig_out[0] = trig_in[0]||selftrig; // we trigger out to the left if we got a trig in towards the left, or we triggered ourselves\r\n\r\nalways @(posedge clk_flash)\r\nif (imthelast) trig_out[1] = selftrig; // we trigger out to the right if we triggered ourselves\r\nelse trig_out[1] = trig_in[1]||selftrig; // we trigger out to the right if we got a trig in towards the right, or we triggered ourselves\r\n\r\n\r\n\r\nreg startAcquisition;//ready to trigger?\r\nalways @(posedge clk) begin\r\n\tif(~startAcquisition) startAcquisition <= startTrigger; // an input to the module\r\n\telse if(AcquiringAndTriggered2) startAcquisition <= 0;\r\n\t//assign trigDebug = startAcquisition;\r\nend\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nlocalparam INIT=0, PREACQ=1, WAITING=2, POSTACQ=3;\r\ninteger state=INIT;\r\nreg [31:0] downsamplecounter;//max downsample is ?\r\nreg [maxhighres:0] highrescounter;//for counting highres\r\nwire downsamplego;\r\nassign downsamplego = downsamplecounter[downsample] || downsample==0; // pay attention to sample when downsamplego is true\r\nalways @(posedge clk_flash) begin\r\n\tcase (state)\r\n\tINIT: begin // this is the beginning... wait for the go-ahead to start acquiring the pre-trigger samples\r\n\t\tif (startAcquisition2) begin\r\n\t\t\tsamplecount <= 0;\r\n\t\t\tAcquiring <= 1; // start acquiring?\r\n\t\t\tHaveFullData <= 0;\r\n\t\t\tPreOrPostAcquiring <= 1; // preacquiring\r\n\t\t\tdownsamplecounter=1;\r\n\t\t\thighrescounter=0;\r\n\t\t\thighres1=0;\r\n\t\t\thighres2=0;\r\n\t\t\thighres3=0;\r\n\t\t\thighres4=0;\r\n\t\t\tstate=PREACQ;\r\n\t\tend\r\n\tend\r\n\tPREACQ: begin // pre-trigger bytes acquired already?\r\n\t\tif( (samplecount==triggerpoint) ) begin\r\n\t\t\tPreOrPostAcquiring <= 0;\r\n\t\t\tstate=WAITING;\r\n\t\tend\r\n\tend\r\n\tWAITING: begin\r\n\t\tif(Trigger) begin // now we wait for the trigger, and then record the triggerpoint\r\n\t\t\tAcquiringAndTriggered <= 1; // Trigger? Start getting the rest of the bytes\r\n\t\t\tPreOrPostAcquiring <= 1;\r\n\t\t\twraddress_triggerpoint <= wraddress; // keep track of where the trigger happened\r\n\t\t\tstate=POSTACQ;\r\n\t\tend\r\n\tend\r\n\tPOSTACQ: begin\r\n\t\tif(samplecount==nsmp) begin // got the rest of the bytes? then stop acquiring\r\n\t\t\tAcquiring <= 0;\r\n\t\t\tAcquiringAndTriggered <= 0;\r\n\t\t\tHaveFullData <= 1;\r\n\t\t\tPreOrPostAcquiring <= 0;\r\n\t\t\tstate=INIT;\r\n\t\tend\r\n\tend\r\n\tendcase\r\n\t\r\n\tdownsamplecounter=downsamplecounter+1;\r\n\tif (highres && downsample>0) begin // doing highres mode (averaging over samples within each downsample)\r\n\t\thighrescounter=highrescounter+1;\r\n\t\thighres1=highres1+data_flash1_reg;\r\n\t\thighres2=highres2+data_flash2_reg;\r\n\t\thighres3=highres3+data_flash3_reg;\r\n\t\thighres4=highres4+data_flash4_reg;\r\n\t\tif (downsamplego || highrescounter[maxhighres]) begin\r\n\t\t\thighrescounter=0;\r\n\t\t\tif (downsample>maxhighres) begin\t\t\t\r\n\t\t\t\tdout1=highres1>>maxhighres;\r\n\t\t\t\tdout2=highres2>>maxhighres;\r\n\t\t\t\tdout3=highres3>>maxhighres;\r\n\t\t\t\tdout4=highres4>>maxhighres;\r\n\t\t\tend\r\n\t\t\telse begin\r\n\t\t\t\tdout1=highres1>>downsample;\r\n\t\t\t\tdout2=highres2>>downsample;\r\n\t\t\t\tdout3=highres3>>downsample;\r\n\t\t\t\tdout4=highres4>>downsample;\r\n\t\t\tend\r\n\t\t\thighres1=0;\r\n\t\t\thighres2=0;\r\n\t\t\thighres3=0;\r\n\t\t\thighres4=0;\r\n\t\tend\r\n\tend\r\n\telse begin // not highres mode, just copy in the data\r\n\t\tdout1=data_flash1_reg;\r\n\t\tdout2=data_flash2_reg;\r\n\t\tdout3=data_flash3_reg;\r\n\t\tdout4=data_flash4_reg;\r\n\tend\r\n\tif (downsamplego) begin // increment the write address (store new data) every 1/2^downsample samples\r\n\t\tdownsamplecounter=1;\r\n\t\tif(Acquiring) wraddress <= wraddress + 1;\r\n\t\tif(PreOrPostAcquiring) samplecount <= samplecount + 1;\r\n\tend\r\nend\r\n\r\n// go from flash clock to fpga main clock domain\r\nreg AcquiringAndTriggered1; always @(posedge clk) AcquiringAndTriggered1 <= AcquiringAndTriggered;\r\nreg AcquiringAndTriggered2; always @(posedge clk) AcquiringAndTriggered2 <= AcquiringAndTriggered1;\r\nreg HaveFullData1; always @(posedge clk) HaveFullData1 <= HaveFullData;\r\nreg HaveFullData2; always @(posedge clk) HaveFullData2 <= HaveFullData1;\r\n\r\nalways @(posedge clk) begin\r\n\tif (startAcquisition) data_ready=0; // waiting for trigger\r\n\telse if (HaveFullData2) data_ready=1; // ready to read out\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/oscillo.v.bak",
    "content": "module oscillo(clk, TxD, clk_flash, data_flash);\r\ninput clk;\r\noutput TxD;\r\n\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\n\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nwire [7:0] q_fifo;\r\nfifo myfifo(.data(data_flash_reg), .wrreq(wrreq), .wrclk(clk_flash), .wrfull(wrfull), .wrempty(wrempty), .q(q_fifo), .rdreq(rdreq), .rdclk(clk), .rdempty(rdempty));\r\n\r\n// The flash ADC side starts filling the fifo only when it is completely empty,\r\n// and stops when it is full, and then waits until it is completely empty again\r\nreg fillfifo;\r\nalways @(posedge clk_flash)\r\nif(~fillfifo)\r\n  fillfifo <= wrempty; // start when empty\r\nelse\r\n  fillfifo <= ~wrfull; // stop when full\r\n\r\nassign wrreq = fillfifo;\r\n\r\n// the manager side sends when the fifo is not empty\r\nwire TxD_busy;\r\nwire TxD_start = ~TxD_busy & ~rdempty;\r\nassign rdreq = TxD_start;\r\n\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(q_fifo));\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/oscillo_notrigger.v",
    "content": "module oscillo(clk, RxD, TxD, clk_flash, data_flash);\r\ninput clk;\r\ninput RxD;\r\noutput TxD;\r\n\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\n\r\n///////////////////////////////////////////////////////////////////\r\n\r\n//wire [7:0] RxD_data;\r\n//async_receiver async_rxd(.clk(clk), .RxD(RxD), .RxD_data_ready(RxD_data_ready), .RxD_data(RxD_data));\r\n\r\nreg startAcquisition;\r\nwire AcquisitionStarted;\r\n\r\nalways @(posedge clk)\r\nif(~startAcquisition)\r\n  //startAcquisition <= RxD_data_ready;\r\n  startAcquisition <= RxD;\r\nelse\r\nif(AcquisitionStarted)\r\n  startAcquisition <= 0;\r\n\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition ;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nreg Acquiring;\r\nalways @(posedge clk_flash)\r\nif(~Acquiring)\r\n  Acquiring <= startAcquisition2;\r\nelse\r\nif(&wraddress)\r\n  Acquiring <= 0;\r\n\r\nreg [8:0] wraddress;\r\nalways @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1;\r\n\r\nreg Acquiring1; always @(posedge clk) Acquiring1 <= Acquiring;\r\nreg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1;\r\nassign AcquisitionStarted = Acquiring2;\r\n\r\nreg [8:0] rdaddress;\r\nreg Sending;\r\nwire TxD_busy;\r\n\r\nalways @(posedge clk)\r\nif(~Sending)\r\n  Sending <= AcquisitionStarted;\r\nelse\r\nif(~TxD_busy)\r\nbegin\r\n  rdaddress <= rdaddress + 1;\r\n  if(&rdaddress) Sending <= 0;\r\nend\r\n\r\nwire TxD_start = ~TxD_busy & Sending;\r\nwire rden = TxD_start;\r\n\r\nwire [7:0] ram_output;\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(ram_output));\r\n\r\n///////////////////////////////////////////////////////////////////\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nLPM_RAM_DP #(.LPM_WIDTH(8), .LPM_WIDTHAD(9)) ram_flash (\r\n  .data(data_flash_reg), .wraddress(wraddress), .wren(Acquiring), .wrclock(clk_flash),\r\n  .q(ram_output), .rdaddress(rdaddress), .rden(rden), .rdclock(clk)\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/oscillo_notrigger.v.bak",
    "content": "module oscillo(clk, RxD, TxD, clk_flash, data_flash);\r\ninput clk;\r\ninput RxD;\r\noutput TxD;\r\n\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\n\r\n///////////////////////////////////////////////////////////////////\r\n\r\n//wire [7:0] RxD_data;\r\n//async_receiver async_rxd(.clk(clk), .RxD(RxD), .RxD_data_ready(RxD_data_ready), .RxD_data(RxD_data));\r\n\r\nreg Threshold1, Threshold2;\r\nalways @(posedge clk_flash) Threshold1 <= (data_flash_reg>=8'h80);\r\nalways @(posedge clk_flash) Threshold2 <= Threshold1;\r\nassign Trigger = Threshold1 & ~Threshold2;  // if positive edge, trigger!\r\n\r\nreg startAcquisition;\r\nwire AcquisitionStarted;\r\n\r\nalways @(posedge clk)\r\nif(~startAcquisition)\r\n  //startAcquisition <= RxD_data_ready;\r\n  startAcquisition <= RxD;\r\nelse\r\nif(AcquisitionStarted)\r\n  startAcquisition <= 0;\r\n\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition ;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nreg Acquiring;\r\nalways @(posedge clk_flash)\r\nif(~Acquiring)\r\n  Acquiring <= startAcquisition2;\r\nelse\r\nif(&wraddress)\r\n  Acquiring <= 0;\r\n\r\nreg [8:0] wraddress;\r\nalways @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1;\r\n\r\nreg Acquiring1; always @(posedge clk) Acquiring1 <= Acquiring;\r\nreg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1;\r\nassign AcquisitionStarted = Acquiring2;\r\n\r\nreg [8:0] rdaddress;\r\nreg Sending;\r\nwire TxD_busy;\r\n\r\nalways @(posedge clk)\r\nif(~Sending)\r\n  Sending <= AcquisitionStarted;\r\nelse\r\nif(~TxD_busy)\r\nbegin\r\n  rdaddress <= rdaddress + 1;\r\n  if(&rdaddress) Sending <= 0;\r\nend\r\n\r\nwire TxD_start = ~TxD_busy & Sending;\r\nwire rden = TxD_start;\r\n\r\nwire [7:0] ram_output;\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(ram_output));\r\n\r\n///////////////////////////////////////////////////////////////////\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nLPM_RAM_DP #(.LPM_WIDTH(8), .LPM_WIDTHAD(9)) ram_flash (\r\n  .data(data_flash_reg), .wraddress(wraddress), .wren(Acquiring), .wrclock(clk_flash),\r\n  .q(ram_output), .rdaddress(rdaddress), .rden(rden), .rdclock(clk)\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/oscillo_sometrigger.v",
    "content": "module oscillo(clk, RxD, TxD, clk_flash, data_flash);\r\ninput clk;\r\ninput RxD;\r\noutput TxD;\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\nreg startAcquisition;\r\nwire AcquisitionStarted;\r\n\r\nalways @(posedge clk)\r\nif(~startAcquisition)  startAcquisition <= RxD;\r\nelse if(AcquisitionStarted)  startAcquisition <= 0;\r\n\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition ;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nreg Acquiring;\r\nalways @(posedge clk_flash)\r\nif(~Acquiring)  Acquiring <= startAcquisition2;\r\nelse if(&wraddress)  Acquiring <= 0;\r\n\r\nreg [8:0] wraddress;\r\nalways @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1;\r\n\r\nreg Acquiring1; always @(posedge clk) Acquiring1 <= Acquiring;\r\nreg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1;\r\nassign AcquisitionStarted = Acquiring2;\r\n\r\nreg [8:0] rdaddress;\r\nreg Sending;\r\nwire TxD_busy;\r\n\r\nalways @(posedge clk)\r\nif(~Sending)  Sending <= AcquisitionStarted;\r\nelse if(~TxD_busy) begin\r\n  rdaddress <= rdaddress + 1;\r\n  if(&rdaddress) Sending <= 0;\r\nend\r\n\r\nwire TxD_start = ~TxD_busy & Sending;\r\nwire rden = TxD_start;\r\n\r\nwire [7:0] ram_output;\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(ram_output));\r\n\r\n///////////////////////////////////////////////////////////////////\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nLPM_RAM_DP #(.LPM_WIDTH(8), .LPM_WIDTHAD(9)) ram_flash (\r\n  .data(data_flash_reg), .wraddress(wraddress), .wren(Acquiring), .wrclock(clk_flash),\r\n  .q(ram_output), .rdaddress(rdaddress), .rden(rden), .rdclock(clk)\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/oscillo_sometrigger.v.bak",
    "content": "module oscillo(clk, RxD, TxD, clk_flash, data_flash);\r\ninput clk;\r\ninput RxD;\r\noutput TxD;\r\n\r\ninput clk_flash;\r\ninput [7:0] data_flash;\r\n\r\n///////////////////////////////////////////////////////////////////\r\n\r\n//wire [7:0] RxD_data;\r\n//async_receiver async_rxd(.clk(clk), .RxD(RxD), .RxD_data_ready(RxD_data_ready), .RxD_data(RxD_data));\r\n\r\nreg startAcquisition;\r\nwire AcquisitionStarted;\r\n\r\nalways @(posedge clk)\r\nif(~startAcquisition)\r\n  //startAcquisition <= RxD_data_ready;\r\n  startAcquisition <= RxD;\r\nelse\r\nif(AcquisitionStarted)\r\n  startAcquisition <= 0;\r\n\r\nreg startAcquisition1; always @(posedge clk_flash) startAcquisition1 <= startAcquisition ;\r\nreg startAcquisition2; always @(posedge clk_flash) startAcquisition2 <= startAcquisition1;\r\n\r\nreg Acquiring;\r\nalways @(posedge clk_flash)\r\nif(~Acquiring)\r\n  Acquiring <= startAcquisition2;\r\nelse\r\nif(&wraddress)\r\n  Acquiring <= 0;\r\n\r\nreg [8:0] wraddress;\r\nalways @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1;\r\n\r\nreg Acquiring1; always @(posedge clk) Acquiring1 <= Acquiring;\r\nreg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1;\r\nassign AcquisitionStarted = Acquiring2;\r\n\r\nreg [8:0] rdaddress;\r\nreg Sending;\r\nwire TxD_busy;\r\n\r\nalways @(posedge clk)\r\nif(~Sending)\r\n  Sending <= AcquisitionStarted;\r\nelse\r\nif(~TxD_busy)\r\nbegin\r\n  rdaddress <= rdaddress + 1;\r\n  if(&rdaddress) Sending <= 0;\r\nend\r\n\r\nwire TxD_start = ~TxD_busy & Sending;\r\nwire rden = TxD_start;\r\n\r\nwire [7:0] ram_output;\r\nasync_transmitter async_txd(.clk(clk), .TxD(TxD), .TxD_start(TxD_start), .TxD_busy(TxD_busy), .TxD_data(ram_output));\r\n\r\n///////////////////////////////////////////////////////////////////\r\nreg [7:0] data_flash_reg; always @(posedge clk_flash) data_flash_reg <= data_flash;\r\n\r\nLPM_RAM_DP #(.LPM_WIDTH(8), .LPM_WIDTHAD(9)) ram_flash (\r\n  .data(data_flash_reg), .wraddress(wraddress), .wren(Acquiring), .wrclock(clk_flash),\r\n  .q(ram_output), .rdaddress(rdaddress), .rden(rden), .rdclock(clk)\r\n);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/pong.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2013 Altera Corporation\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, Altera MegaCore Function License \r\nAgreement, or other applicable license agreement, including, \r\nwithout limitation, that your use is for the sole purpose of \r\nprogramming logic devices manufactured by Altera and sold by \r\nAltera or its authorized distributors.  Please refer to the \r\napplicable agreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 248 160)\r\n\t(text \"pong\" (rect 5 0 23 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"PaddlePosition[7..0]\" (rect 0 0 75 12)(font \"Arial\" ))\r\n\t\t(text \"PaddlePosition[7..0]\" (rect 21 43 96 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 32)\r\n\t\t(output)\r\n\t\t(text \"vga_h_sync\" (rect 0 0 51 12)(font \"Arial\" ))\r\n\t\t(text \"vga_h_sync\" (rect 160 27 211 39)(font \"Arial\" ))\r\n\t\t(line (pt 232 32)(pt 216 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 48)\r\n\t\t(output)\r\n\t\t(text \"vga_v_sync\" (rect 0 0 53 12)(font \"Arial\" ))\r\n\t\t(text \"vga_v_sync\" (rect 158 43 211 55)(font \"Arial\" ))\r\n\t\t(line (pt 232 48)(pt 216 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 64)\r\n\t\t(output)\r\n\t\t(text \"vga_R\" (rect 0 0 29 12)(font \"Arial\" ))\r\n\t\t(text \"vga_R\" (rect 182 59 211 71)(font \"Arial\" ))\r\n\t\t(line (pt 232 64)(pt 216 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 80)\r\n\t\t(output)\r\n\t\t(text \"vga_G\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"vga_G\" (rect 183 75 211 87)(font \"Arial\" ))\r\n\t\t(line (pt 232 80)(pt 216 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 232 96)\r\n\t\t(output)\r\n\t\t(text \"vga_B\" (rect 0 0 27 12)(font \"Arial\" ))\r\n\t\t(text \"vga_B\" (rect 184 91 211 103)(font \"Arial\" ))\r\n\t\t(line (pt 232 96)(pt 216 96)(line_width 1))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 216 128)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/pong.v",
    "content": "module pong(clk, vga_h_sync, vga_v_sync, vga_R, vga_G, vga_B, PaddlePosition);\r\ninput clk;\r\ninput [7:0] PaddlePosition;\r\noutput vga_h_sync, vga_v_sync, vga_R, vga_G, vga_B;\r\n\r\nwire inDisplayArea;\r\nwire [9:0] CounterX;\r\nwire [8:0] CounterY;\r\n\r\nhvsync_generator syncgen(.clk(clk), .vga_h_sync(vga_h_sync), .vga_v_sync(vga_v_sync), \r\n  .inDisplayArea(inDisplayArea), .CounterX(CounterX), .CounterY(CounterY));\r\n\r\n/////////////////////////////////////////////////////////////////\r\nwire border = (CounterX[9:3]==0) || (CounterX[9:3]==79) || (CounterY[8:3]==0) || (CounterY[8:3]==59);\r\nwire[10:0] PaddlePosition2 = (PaddlePosition-49)*80;\r\nwire paddle = (CounterX>=PaddlePosition2+8) && (CounterX<=PaddlePosition2+120) && (CounterY[8:4]==27);\r\nwire BouncingObject = border | paddle; // active if the border or paddle is redrawing itself\r\n\r\n/////////////////////////////////////////////////////////////////\r\nparameter Nballs = 15;\r\nwire [Nballs:0] inball;\r\nreg [Nballs:0] inotherball;\r\nwire [9:0] ballX [Nballs:0];\r\nwire [8:0] ballY [Nballs:0];\r\nwire [8:0] ballspeed [Nballs:0];\r\nwire [8:0] ballmass [Nballs:0];\r\n\r\ngenerate\r\n  genvar i;\r\n  for (i=0; i<Nballs; i=i+1) begin : dff\r\n    mball #(.startX(20+((131*i)%600)), .startY(29+((7*i)%440)), .pballmass(1), .pballspeed(1)) ball_i (.clk(clk), \r\n\t    .BouncingObject(BouncingObject), .inotherball(inotherball[i]), \r\n       .CounterX(CounterX), .CounterY(CounterY), .ballX(ballX[i]), .ballY(ballY[i]), \r\n\t\t .inball(inball[i]), .ballspeed(ballspeed[i]), .ballmass(ballmass[i]) );\r\n  end\r\nendgenerate\r\n\r\n/////////////////////////////////////////////////////////////////\r\nwire inaball = (inball!=0);\r\nwire R = BouncingObject | inaball | (CounterX[3] ^ CounterY[3]);\r\nwire G = BouncingObject | inaball;\r\nwire B = BouncingObject | inaball;\r\n\r\nreg [Nballs:0] iball;\r\nreg [Nballs:0] jball;\r\nalways @(posedge clk) begin\r\n   for (iball=0; iball<Nballs; iball=iball+1) begin\r\n\t   inotherball[iball] = 0;\r\n\t   for (jball=0; jball<Nballs; jball=jball+1) begin\r\n\t\t   if (inball[iball] & iball!=jball & inball[jball]) inotherball[iball] = 1;//ballmass[jball]*ballspeed[jball];\r\n\t   end\r\n\tend\r\nend\r\n\r\nreg vga_R, vga_G, vga_B;\r\nalways @(posedge clk) begin\r\n\tvga_R <= R & inDisplayArea;\r\n\tvga_G <= G & inDisplayArea;\r\n\tvga_B <= B & inDisplayArea;\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/processor.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 376 896)\r\n\t(text \"processor\" (rect 5 0 45 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 864 20 876)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"rxReady\" (rect 0 0 36 12)(font \"Arial\" ))\r\n\t\t(text \"rxReady\" (rect 21 43 57 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"rxData[7..0]\" (rect 0 0 47 12)(font \"Arial\" ))\r\n\t\t(text \"rxData[7..0]\" (rect 21 59 68 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"txBusy\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"txBusy\" (rect 21 75 49 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"ext_data_ready\" (rect 0 0 63 12)(font \"Arial\" ))\r\n\t\t(text \"ext_data_ready\" (rect 21 91 84 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"wraddress_triggerpoint[ram_width-1..0]\" (rect 0 0 152 12)(font \"Arial\" ))\r\n\t\t(text \"wraddress_triggerpoint[ram_width-1..0]\" (rect 21 107 173 119)(font \"Arial\" ))\r\n\t\t(line (pt 0 112)(pt 16 112)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 128)\r\n\t\t(input)\r\n\t\t(text \"ram_output1[7..0]\" (rect 0 0 69 12)(font \"Arial\" ))\r\n\t\t(text \"ram_output1[7..0]\" (rect 21 123 90 135)(font \"Arial\" ))\r\n\t\t(line (pt 0 128)(pt 16 128)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 144)\r\n\t\t(input)\r\n\t\t(text \"ram_output2[7..0]\" (rect 0 0 70 12)(font \"Arial\" ))\r\n\t\t(text \"ram_output2[7..0]\" (rect 21 139 91 151)(font \"Arial\" ))\r\n\t\t(line (pt 0 144)(pt 16 144)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 160)\r\n\t\t(input)\r\n\t\t(text \"ram_output3[7..0]\" (rect 0 0 70 12)(font \"Arial\" ))\r\n\t\t(text \"ram_output3[7..0]\" (rect 21 155 91 167)(font \"Arial\" ))\r\n\t\t(line (pt 0 160)(pt 16 160)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 176)\r\n\t\t(input)\r\n\t\t(text \"ram_output4[7..0]\" (rect 0 0 71 12)(font \"Arial\" ))\r\n\t\t(text \"ram_output4[7..0]\" (rect 21 171 92 183)(font \"Arial\" ))\r\n\t\t(line (pt 0 176)(pt 16 176)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 192)\r\n\t\t(input)\r\n\t\t(text \"trigDebug\" (rect 0 0 37 12)(font \"Arial\" ))\r\n\t\t(text \"trigDebug\" (rect 21 187 58 199)(font \"Arial\" ))\r\n\t\t(line (pt 0 192)(pt 16 192)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 208)\r\n\t\t(input)\r\n\t\t(text \"adcdata[11..0]\" (rect 0 0 53 12)(font \"Arial\" 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    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 224 160)\r\n\t(text \"processor_slave\" (rect 5 0 72 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"rxReady\" (rect 0 0 36 12)(font \"Arial\" ))\r\n\t\t(text \"rxReady\" (rect 21 43 57 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"rxData[7..0]\" (rect 0 0 47 12)(font \"Arial\" ))\r\n\t\t(text \"rxData[7..0]\" (rect 21 59 68 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 80)\r\n\t\t(input)\r\n\t\t(text \"txBusy\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"txBusy\" (rect 21 75 49 87)(font \"Arial\" ))\r\n\t\t(line (pt 0 80)(pt 16 80)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 96)\r\n\t\t(input)\r\n\t\t(text \"newgotdata\" (rect 0 0 43 12)(font \"Arial\" ))\r\n\t\t(text \"newgotdata\" (rect 21 91 64 103)(font \"Arial\" ))\r\n\t\t(line (pt 0 96)(pt 16 96)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"gotdata[7..0]\" (rect 0 0 48 12)(font \"Arial\" ))\r\n\t\t(text \"gotdata[7..0]\" (rect 21 107 69 119)(font \"Arial\" ))\r\n\t\t(line (pt 0 112)(pt 16 112)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 32)\r\n\t\t(output)\r\n\t\t(text \"txStart\" (rect 0 0 25 12)(font \"Arial\" ))\r\n\t\t(text \"txStart\" (rect 162 27 187 39)(font \"Arial\" ))\r\n\t\t(line (pt 208 32)(pt 192 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 48)\r\n\t\t(output)\r\n\t\t(text \"txData[7..0]\" (rect 0 0 46 12)(font \"Arial\" ))\r\n\t\t(text \"txData[7..0]\" (rect 141 43 187 55)(font \"Arial\" ))\r\n\t\t(line (pt 208 48)(pt 192 48)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 208 64)\r\n\t\t(output)\r\n\t\t(text \"readdata[7..0]\" (rect 0 0 54 12)(font \"Arial\" ))\r\n\t\t(text \"readdata[7..0]\" (rect 133 59 187 71)(font \"Arial\" ))\r\n\t\t(line (pt 208 64)(pt 192 64)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 192 128)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ram1.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 0 0 216 128)\r\n\t(text \"ram1\" (rect 94 0 128 16)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 112 25 124)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"data[11..0]\" (rect 0 0 59 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"data[11..0]\" (rect 4 18 52 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 32)(pt 88 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wren\" (rect 4 34 28 47)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 48)(pt 88 48))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"address[11..0]\" (rect 0 0 81 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"address[11..0]\" (rect 4 50 71 63)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 88 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"clock\" (rect 0 0 29 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clock\" (rect 4 98 27 111)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 112)(pt 80 112))\r\n\t)\r\n\t(port\r\n\t\t(pt 216 32)\r\n\t\t(output)\r\n\t\t(text \"q[11..0]\" (rect 0 0 41 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"q[11..0]\" (rect 178 18 211 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 216 32)(pt 136 32)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(text \"12 bits\" (rect 109 24 194 159)(font \"Arial\" )(vertical))\r\n\t\t(text \"4096 words\" (rect 120 12 214 177)(font \"Arial\" )(vertical))\r\n\t\t(text \"Block type: AUTO\" (rect 48 114 170 239)(font \"Arial\" ))\r\n\t\t(line (pt 104 24)(pt 136 24))\r\n\t\t(line (pt 136 24)(pt 136 96))\r\n\t\t(line (pt 136 96)(pt 104 96))\r\n\t\t(line (pt 104 96)(pt 104 24))\r\n\t\t(line (pt 118 58)(pt 123 63))\r\n\t\t(line (pt 118 62)(pt 123 57))\r\n\t\t(line (pt 88 27)(pt 96 27))\r\n\t\t(line (pt 96 27)(pt 96 39))\r\n\t\t(line (pt 96 39)(pt 88 39))\r\n\t\t(line (pt 88 39)(pt 88 27))\r\n\t\t(line (pt 88 34)(pt 90 36))\r\n\t\t(line (pt 90 36)(pt 88 38))\r\n\t\t(line (pt 80 36)(pt 88 36))\r\n\t\t(line (pt 96 32)(pt 104 32)(line_width 3))\r\n\t\t(line (pt 88 43)(pt 96 43))\r\n\t\t(line (pt 96 43)(pt 96 55))\r\n\t\t(line (pt 96 55)(pt 88 55))\r\n\t\t(line (pt 88 55)(pt 88 43))\r\n\t\t(line (pt 88 50)(pt 90 52))\r\n\t\t(line (pt 90 52)(pt 88 54))\r\n\t\t(line (pt 80 52)(pt 88 52))\r\n\t\t(line (pt 96 48)(pt 104 48))\r\n\t\t(line (pt 88 59)(pt 96 59))\r\n\t\t(line (pt 96 59)(pt 96 71))\r\n\t\t(line (pt 96 71)(pt 88 71))\r\n\t\t(line (pt 88 71)(pt 88 59))\r\n\t\t(line (pt 88 66)(pt 90 68))\r\n\t\t(line (pt 90 68)(pt 88 70))\r\n\t\t(line (pt 80 68)(pt 88 68))\r\n\t\t(line (pt 96 64)(pt 104 64)(line_width 3))\r\n\t\t(line (pt 80 112)(pt 80 36))\r\n\t\t(line (pt 0 0)(pt 217 0))\r\n\t\t(line (pt 217 0)(pt 217 130))\r\n\t\t(line (pt 0 130)(pt 217 130))\r\n\t\t(line (pt 0 0)(pt 0 130))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ram1.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 1-PORT\"\r\nset_global_assignment -name IP_TOOL_VERSION \"15.0\"\r\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\r\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"ram1.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"ram1.bsf\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"ram1_bb.v\"]\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ram1.v",
    "content": "// megafunction wizard: %RAM: 1-PORT%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: ram1.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule ram1 (\r\n\taddress,\r\n\tclock,\r\n\tdata,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t[11:0]  address;\r\n\tinput\t  clock;\r\n\tinput\t[11:0]  data;\r\n\tinput\t  wren;\r\n\toutput\t[11:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [11:0] sub_wire0;\r\n\twire [11:0] q = sub_wire0[11:0];\r\n\r\n\taltsyncram\taltsyncram_component (\r\n\t\t\t\t.address_a (address),\r\n\t\t\t\t.clock0 (clock),\r\n\t\t\t\t.data_a (data),\r\n\t\t\t\t.wren_a (wren),\r\n\t\t\t\t.q_a (sub_wire0),\r\n\t\t\t\t.aclr0 (1'b0),\r\n\t\t\t\t.aclr1 (1'b0),\r\n\t\t\t\t.address_b (1'b1),\r\n\t\t\t\t.addressstall_a (1'b0),\r\n\t\t\t\t.addressstall_b (1'b0),\r\n\t\t\t\t.byteena_a (1'b1),\r\n\t\t\t\t.byteena_b (1'b1),\r\n\t\t\t\t.clock1 (1'b1),\r\n\t\t\t\t.clocken0 (1'b1),\r\n\t\t\t\t.clocken1 (1'b1),\r\n\t\t\t\t.clocken2 (1'b1),\r\n\t\t\t\t.clocken3 (1'b1),\r\n\t\t\t\t.data_b (1'b1),\r\n\t\t\t\t.eccstatus (),\r\n\t\t\t\t.q_b (),\r\n\t\t\t\t.rden_a (1'b1),\r\n\t\t\t\t.rden_b (1'b1),\r\n\t\t\t\t.wren_b (1'b0));\r\n\tdefparam\r\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_output_a = \"BYPASS\",\r\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\r\n\t\taltsyncram_component.lpm_hint = \"ENABLE_RUNTIME_MOD=NO\",\r\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\r\n\t\taltsyncram_component.numwords_a = 4096,\r\n\t\taltsyncram_component.operation_mode = \"SINGLE_PORT\",\r\n\t\taltsyncram_component.outdata_aclr_a = \"NONE\",\r\n\t\taltsyncram_component.outdata_reg_a = \"UNREGISTERED\",\r\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\r\n\t\taltsyncram_component.read_during_write_mode_port_a = \"DONT_CARE\",\r\n\t\taltsyncram_component.widthad_a = 12,\r\n\t\taltsyncram_component.width_a = 12,\r\n\t\taltsyncram_component.width_byteena_a = 1;\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrAddr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrByte NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrData NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrOutput NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clken NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: DataBusSeparated NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_A\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC \"4096\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: RegAddr NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegData NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegOutput NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: SingleClock NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: UseDQRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WidthAddr NUMERIC \"12\"\r\n// Retrieval info: PRIVATE: WidthData NUMERIC \"12\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_HINT STRING \"ENABLE_RUNTIME_MOD=NO\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"4096\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"SINGLE_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_A STRING \"UNREGISTERED\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: address 0 0 12 0 INPUT NODEFVAL \"address[11..0]\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 12 0 INPUT NODEFVAL \"data[11..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL \"q[11..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 12 0 address 0 0 12 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 12 0 data 0 0 12 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 12 0 @q_a 0 0 12 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ram1_bb.v",
    "content": "// megafunction wizard: %RAM: 1-PORT%VBB%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: ram1.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\nmodule ram1 (\r\n\taddress,\r\n\tclock,\r\n\tdata,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t[11:0]  address;\r\n\tinput\t  clock;\r\n\tinput\t[11:0]  data;\r\n\tinput\t  wren;\r\n\toutput\t[11:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrAddr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrByte NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrData NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrOutput NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clken NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: DataBusSeparated NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_A\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC \"4096\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: RegAddr NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegData NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegOutput NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: SingleClock NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: UseDQRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WidthAddr NUMERIC \"12\"\r\n// Retrieval info: PRIVATE: WidthData NUMERIC \"12\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_HINT STRING \"ENABLE_RUNTIME_MOD=NO\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"4096\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"SINGLE_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_A STRING \"UNREGISTERED\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"12\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: address 0 0 12 0 INPUT NODEFVAL \"address[11..0]\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 12 0 INPUT NODEFVAL \"data[11..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL \"q[11..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 12 0 address 0 0 12 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 12 0 data 0 0 12 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 12 0 @q_a 0 0 12 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram1_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ram2.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 0 0 216 128)\r\n\t(text \"ram2\" (rect 94 0 128 16)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 112 25 124)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"data[7..0]\" (rect 0 0 53 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"data[7..0]\" (rect 4 18 47 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 32)(pt 88 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"wren\" (rect 0 0 30 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"wren\" (rect 4 34 28 47)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 48)(pt 88 48))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"address[9..0]\" (rect 0 0 75 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"address[9..0]\" (rect 4 50 66 63)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 88 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"clock\" (rect 0 0 29 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clock\" (rect 4 98 27 111)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 112)(pt 144 112))\r\n\t)\r\n\t(port\r\n\t\t(pt 216 32)\r\n\t\t(output)\r\n\t\t(text \"q[7..0]\" (rect 0 0 35 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"q[7..0]\" (rect 183 18 211 31)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 216 32)(pt 160 32)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(text \"8 bits\" (rect 109 23 191 153)(font \"Arial\" )(vertical))\r\n\t\t(text \"1024 words\" (rect 120 12 214 177)(font \"Arial\" )(vertical))\r\n\t\t(text \"Block type: AUTO\" (rect 48 114 170 239)(font \"Arial\" ))\r\n\t\t(line (pt 104 24)(pt 136 24))\r\n\t\t(line (pt 136 24)(pt 136 96))\r\n\t\t(line (pt 136 96)(pt 104 96))\r\n\t\t(line (pt 104 96)(pt 104 24))\r\n\t\t(line (pt 118 58)(pt 123 63))\r\n\t\t(line (pt 118 62)(pt 123 57))\r\n\t\t(line (pt 88 27)(pt 96 27))\r\n\t\t(line (pt 96 27)(pt 96 39))\r\n\t\t(line (pt 96 39)(pt 88 39))\r\n\t\t(line (pt 88 39)(pt 88 27))\r\n\t\t(line (pt 88 34)(pt 90 36))\r\n\t\t(line (pt 90 36)(pt 88 38))\r\n\t\t(line (pt 80 36)(pt 88 36))\r\n\t\t(line (pt 96 32)(pt 104 32)(line_width 3))\r\n\t\t(line (pt 152 27)(pt 160 27))\r\n\t\t(line (pt 160 27)(pt 160 39))\r\n\t\t(line (pt 160 39)(pt 152 39))\r\n\t\t(line (pt 152 39)(pt 152 27))\r\n\t\t(line (pt 152 34)(pt 154 36))\r\n\t\t(line (pt 154 36)(pt 152 38))\r\n\t\t(line (pt 144 36)(pt 152 36))\r\n\t\t(line (pt 136 32)(pt 152 32)(line_width 3))\r\n\t\t(line (pt 88 43)(pt 96 43))\r\n\t\t(line (pt 96 43)(pt 96 55))\r\n\t\t(line (pt 96 55)(pt 88 55))\r\n\t\t(line (pt 88 55)(pt 88 43))\r\n\t\t(line (pt 88 50)(pt 90 52))\r\n\t\t(line (pt 90 52)(pt 88 54))\r\n\t\t(line (pt 80 52)(pt 88 52))\r\n\t\t(line (pt 96 48)(pt 104 48))\r\n\t\t(line (pt 88 59)(pt 96 59))\r\n\t\t(line (pt 96 59)(pt 96 71))\r\n\t\t(line (pt 96 71)(pt 88 71))\r\n\t\t(line (pt 88 71)(pt 88 59))\r\n\t\t(line (pt 88 66)(pt 90 68))\r\n\t\t(line (pt 90 68)(pt 88 70))\r\n\t\t(line (pt 80 68)(pt 88 68))\r\n\t\t(line (pt 96 64)(pt 104 64)(line_width 3))\r\n\t\t(line (pt 80 112)(pt 80 36))\r\n\t\t(line (pt 144 112)(pt 144 36))\r\n\t\t(line (pt 0 0)(pt 217 0))\r\n\t\t(line (pt 217 0)(pt 217 130))\r\n\t\t(line (pt 0 130)(pt 217 130))\r\n\t\t(line (pt 0 0)(pt 0 130))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t\t(line (pt 0 0)(pt 0 0))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ram2.qip",
    "content": "set_global_assignment -name IP_TOOL_NAME \"RAM: 1-PORT\"\r\nset_global_assignment -name IP_TOOL_VERSION \"15.0\"\r\nset_global_assignment -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\r\nset_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) \"ram2.v\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"ram2.bsf\"]\r\nset_global_assignment -name MISC_FILE [file join $::quartus(qip_path) \"ram2_bb.v\"]\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ram2.v",
    "content": "// megafunction wizard: %RAM: 1-PORT%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: ram2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\n\r\n// synopsys translate_off\r\n`timescale 1 ps / 1 ps\r\n// synopsys translate_on\r\nmodule ram2 (\r\n\taddress,\r\n\tclock,\r\n\tdata,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t[9:0]  address;\r\n\tinput\t  clock;\r\n\tinput\t[7:0]  data;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\n\twire [7:0] sub_wire0;\r\n\twire [7:0] q = sub_wire0[7:0];\r\n\r\n\taltsyncram\taltsyncram_component (\r\n\t\t\t\t.address_a (address),\r\n\t\t\t\t.clock0 (clock),\r\n\t\t\t\t.data_a (data),\r\n\t\t\t\t.wren_a (wren),\r\n\t\t\t\t.q_a (sub_wire0),\r\n\t\t\t\t.aclr0 (1'b0),\r\n\t\t\t\t.aclr1 (1'b0),\r\n\t\t\t\t.address_b (1'b1),\r\n\t\t\t\t.addressstall_a (1'b0),\r\n\t\t\t\t.addressstall_b (1'b0),\r\n\t\t\t\t.byteena_a (1'b1),\r\n\t\t\t\t.byteena_b (1'b1),\r\n\t\t\t\t.clock1 (1'b1),\r\n\t\t\t\t.clocken0 (1'b1),\r\n\t\t\t\t.clocken1 (1'b1),\r\n\t\t\t\t.clocken2 (1'b1),\r\n\t\t\t\t.clocken3 (1'b1),\r\n\t\t\t\t.data_b (1'b1),\r\n\t\t\t\t.eccstatus (),\r\n\t\t\t\t.q_b (),\r\n\t\t\t\t.rden_a (1'b1),\r\n\t\t\t\t.rden_b (1'b1),\r\n\t\t\t\t.wren_b (1'b0));\r\n\tdefparam\r\n\t\taltsyncram_component.clock_enable_input_a = \"BYPASS\",\r\n\t\taltsyncram_component.clock_enable_output_a = \"BYPASS\",\r\n\t\taltsyncram_component.intended_device_family = \"MAX 10\",\r\n\t\taltsyncram_component.lpm_hint = \"ENABLE_RUNTIME_MOD=NO\",\r\n\t\taltsyncram_component.lpm_type = \"altsyncram\",\r\n\t\taltsyncram_component.numwords_a = 1024,\r\n\t\taltsyncram_component.operation_mode = \"SINGLE_PORT\",\r\n\t\taltsyncram_component.outdata_aclr_a = \"NONE\",\r\n\t\taltsyncram_component.outdata_reg_a = \"CLOCK0\",\r\n\t\taltsyncram_component.power_up_uninitialized = \"FALSE\",\r\n\t\taltsyncram_component.read_during_write_mode_port_a = \"DONT_CARE\",\r\n\t\taltsyncram_component.widthad_a = 10,\r\n\t\taltsyncram_component.width_a = 8,\r\n\t\taltsyncram_component.width_byteena_a = 1;\r\n\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrAddr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrByte NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrData NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrOutput NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clken NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: DataBusSeparated NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_A\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: RegAddr NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegData NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegOutput NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: SingleClock NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: UseDQRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WidthAddr NUMERIC \"10\"\r\n// Retrieval info: PRIVATE: WidthData NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_HINT STRING \"ENABLE_RUNTIME_MOD=NO\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"SINGLE_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_A STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: address 0 0 10 0 INPUT NODEFVAL \"address[9..0]\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 10 0 address 0 0 10 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ram2_bb.v",
    "content": "// megafunction wizard: %RAM: 1-PORT%VBB%\r\n// GENERATION: STANDARD\r\n// VERSION: WM1.0\r\n// MODULE: altsyncram \r\n\r\n// ============================================================\r\n// File Name: ram2.v\r\n// Megafunction Name(s):\r\n// \t\t\taltsyncram\r\n//\r\n// Simulation Library Files(s):\r\n// \t\t\taltera_mf\r\n// ============================================================\r\n// ************************************************************\r\n// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\r\n// 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n// ************************************************************\r\n\r\n//Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n//Your use of Altera Corporation's design tools, logic functions \r\n//and other software and tools, and its AMPP partner logic \r\n//functions, and any output files from any of the foregoing \r\n//(including device programming or simulation files), and any \r\n//associated documentation or information are expressly subject \r\n//to the terms and conditions of the Altera Program License \r\n//Subscription Agreement, the Altera Quartus II License Agreement,\r\n//the Altera MegaCore Function License Agreement, or other \r\n//applicable license agreement, including, without limitation, \r\n//that your use is for the sole purpose of programming logic \r\n//devices manufactured by Altera and sold by Altera or its \r\n//authorized distributors.  Please refer to the applicable \r\n//agreement for further details.\r\n\r\nmodule ram2 (\r\n\taddress,\r\n\tclock,\r\n\tdata,\r\n\twren,\r\n\tq);\r\n\r\n\tinput\t[9:0]  address;\r\n\tinput\t  clock;\r\n\tinput\t[7:0]  data;\r\n\tinput\t  wren;\r\n\toutput\t[7:0]  q;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_off\r\n`endif\r\n\ttri1\t  clock;\r\n`ifndef ALTERA_RESERVED_QIS\r\n// synopsys translate_on\r\n`endif\r\n\r\nendmodule\r\n\r\n// ============================================================\r\n// CNX file retrieval info\r\n// ============================================================\r\n// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrAddr NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrByte NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrData NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: AclrOutput NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: BlankMemory NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: Clken NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: DataBusSeparated NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING \"PORT_A\"\r\n// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: JTAG_ID STRING \"NONE\"\r\n// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: MIFfilename STRING \"\"\r\n// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC \"2\"\r\n// Retrieval info: PRIVATE: RegAddr NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegData NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: RegOutput NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING \"0\"\r\n// Retrieval info: PRIVATE: SingleClock NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: UseDQRAM NUMERIC \"1\"\r\n// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC \"0\"\r\n// Retrieval info: PRIVATE: WidthAddr NUMERIC \"10\"\r\n// Retrieval info: PRIVATE: WidthData NUMERIC \"8\"\r\n// Retrieval info: PRIVATE: rden NUMERIC \"0\"\r\n// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING \"BYPASS\"\r\n// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING \"MAX 10\"\r\n// Retrieval info: CONSTANT: LPM_HINT STRING \"ENABLE_RUNTIME_MOD=NO\"\r\n// Retrieval info: CONSTANT: LPM_TYPE STRING \"altsyncram\"\r\n// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC \"1024\"\r\n// Retrieval info: CONSTANT: OPERATION_MODE STRING \"SINGLE_PORT\"\r\n// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING \"NONE\"\r\n// Retrieval info: CONSTANT: OUTDATA_REG_A STRING \"CLOCK0\"\r\n// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING \"FALSE\"\r\n// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING \"DONT_CARE\"\r\n// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC \"10\"\r\n// Retrieval info: CONSTANT: WIDTH_A NUMERIC \"8\"\r\n// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC \"1\"\r\n// Retrieval info: USED_PORT: address 0 0 10 0 INPUT NODEFVAL \"address[9..0]\"\r\n// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC \"clock\"\r\n// Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL \"data[7..0]\"\r\n// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL \"q[7..0]\"\r\n// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL \"wren\"\r\n// Retrieval info: CONNECT: @address_a 0 0 10 0 address 0 0 10 0\r\n// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0\r\n// Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0\r\n// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0\r\n// Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.v TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.inc FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.cmp FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2.bsf TRUE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2_inst.v FALSE\r\n// Retrieval info: GEN_FILE: TYPE_NORMAL ram2_bb.v TRUE\r\n// Retrieval info: LIB_FILE: altera_mf\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/remove_unused_qprogrammer_stuff.sh",
    "content": "\nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/stratixv_* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/nightfury* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/arriav* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/cyclonev_* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/pfl* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/sfl* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/ep4* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/ep3* \nrm ~/intelFPGA/18.0/qprogrammer/common/devinfo/programmer/ep2* \n\n\n"
  },
  {
    "path": "max10_adc_firmware_v8/ring_counter.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 16 16 264 128)\r\n\t(text \"ring_counter\" (rect 5 0 54 12)(font \"Arial\" ))\r\n\t(text \"inst\" (rect 8 96 20 108)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"clk\" (rect 0 0 10 12)(font \"Arial\" ))\r\n\t\t(text \"clk\" (rect 21 27 31 39)(font \"Arial\" ))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"carryin\" (rect 0 0 28 12)(font \"Arial\" ))\r\n\t\t(text \"carryin\" (rect 21 43 49 55)(font \"Arial\" ))\r\n\t\t(line (pt 0 48)(pt 16 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"delayin[DELAY-1..0]\" (rect 0 0 83 12)(font \"Arial\" ))\r\n\t\t(text \"delayin[DELAY-1..0]\" (rect 21 59 104 71)(font \"Arial\" ))\r\n\t\t(line (pt 0 64)(pt 16 64)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 248 32)\r\n\t\t(output)\r\n\t\t(text \"out_carry[7..0]\" (rect 0 0 60 12)(font \"Arial\" ))\r\n\t\t(text \"out_carry[7..0]\" (rect 167 27 227 39)(font \"Arial\" ))\r\n\t\t(line (pt 248 32)(pt 232 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 248 48)\r\n\t\t(output)\r\n\t\t(text \"carryout\" (rect 0 0 34 12)(font \"Arial\" ))\r\n\t\t(text \"carryout\" (rect 193 43 227 55)(font \"Arial\" ))\r\n\t\t(line (pt 248 48)(pt 232 48)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 248 64)\r\n\t\t(output)\r\n\t\t(text \"start\" (rect 0 0 17 12)(font \"Arial\" ))\r\n\t\t(text \"start\" (rect 210 59 227 71)(font \"Arial\" ))\r\n\t\t(line (pt 248 64)(pt 232 64)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 248 80)\r\n\t\t(output)\r\n\t\t(text \"out_delay[7..0]\" (rect 0 0 59 12)(font \"Arial\" ))\r\n\t\t(text \"out_delay[7..0]\" (rect 168 75 227 87)(font \"Arial\" ))\r\n\t\t(line (pt 248 80)(pt 232 80)(line_width 3))\r\n\t)\r\n\t(parameter\r\n\t\t\"DELAY\"\r\n\t\t\"100\"\r\n\t\t\"\"\r\n\t\t(type \"PARAMETER_SIGNED_DEC\")\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 232 96)(line_width 1))\r\n\t)\r\n\t(annotation_block (parameter)(rect 264 -64 364 16))\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ring_counter.v",
    "content": "module ring_counter (clk,out_carry,carryin,carryout,delayin,start,out_delay);\r\ninput clk;\r\noutput reg [7:0] out_carry;\r\noutput reg [7:0] out_delay;\r\ninput carryin;\r\noutput carryout;\r\ninput wire [DELAY-1:0] delayin;\r\n\r\nparameter DELAY=100; // about 13-14 per tick (10ns) // actually set in serial bdf design file\r\nwire [DELAY-1:0] delay_line /* synthesis keep */;\r\noutput reg start;\r\nreg freeze;\r\nassign carryout = freeze; // set the output high when we freeze\r\n\r\nwire freezeline;\r\n// assign freezeline = freeze; // freeze the chain whenever we say to freeze internally\r\nassign freezeline = carryin; // freeze the chain based on external freeze signal\r\n\r\n//delay line\r\ngenvar i;\r\ngenerate\r\nfor (i=1; i<DELAY; i=i+1)\r\n\tbegin : del\r\n\t\t//assign delay_line [i] = delay_line[i-1+freezeline]; // when freeze is 1, it just is assigned to itself... otherwise it is assigned to it's friend from the left\r\n\t\tassign delay_line [i] = (freezeline) ? delay_line[i] : delay_line[i-1]; // when freeze is 1, it just is assigned to itself... otherwise it is assigned to it's friend from the left\r\n\tend\r\nendgenerate\r\nassign delay_line[0] = start; // we trigger the chain with the \"start\" command\r\n\r\ninitial begin\r\n\tstart<=0;\r\n\tfreeze<=0;\r\nend\r\n\r\n//sync them over to the input clock\r\ninteger delay_counter=0;\r\nalways @(posedge clk) begin\r\n\tif (freeze) begin\r\n\t\t//count until the first 0\r\n\t\tif (delay_line[delay_counter]) delay_counter=delay_counter+1;//keep counting\r\n\t\telse out_delay[7:0] = delay_counter;//found the first 0\r\n\tend\r\n\telse delay_counter=0;//just wait\r\nend\r\n\r\ninteger counter=0;\r\ninteger delayer=0;\r\n//integer cycles=0;\r\nalways @(posedge clk) begin\r\n\tcounter = counter+1;\r\n\tif (counter==200000000) begin // every 2 seconds, reset to 0 and wait for start\r\n\t\tfreeze=0;\r\n\t\tstart=0;\r\n\tend\r\n\tif (counter==200000050) begin // 500 ns later, start\r\n\t\tstart=1;\r\n\tend\r\n\tif (counter==200000050+delayer) begin // then freeze, after some delay possibly\r\n\t\tfreeze=1;\r\n\t\t\r\n//\t\tcycles=cycles+1;\r\n//\t\tif (cycles==10) begin //every 3 seconds, increment the delayer time by a tick\r\n//\t\t\tdelayer=delayer+1;\r\n//\t\t\tcycles=7;//wait 10 seconds before starting up the incrementing\r\n//\t\tend\r\n\t\t\r\n\tend\r\n\tif (counter==200000050+delayer+ 100000) counter=0;//do it again\r\nend\r\n\r\ninteger delay_counter2=1;\r\nalways @(posedge clk) begin\r\n\tif (counter > 200000050+delayer + 10) begin // give it time to stop\r\n\t\t//count until a 1\r\n\t\tif (delayin[delay_counter2]) out_carry[7:0] = delay_counter2 - 150;//found a 1\r\n\t\telse delay_counter2=delay_counter2+1;//keep counting\r\n\tend\r\n\telse delay_counter2=1;//just wait\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/ring_counter.v.bak",
    "content": "\r\n// counter with unstable count enable signal based on ring oscillator.\r\n\r\nmodule ring_counter (clk,out);\r\nparameter DELAY = 100;\r\ninput clk;\r\noutput reg [DELAY-1:0] out;\r\n\r\nwire [DELAY-1:0] delay_line /* synthesis keep */;\r\nreg start;\r\n\r\n// carry chain\r\ngenvar i;\r\ngenerate\r\nfor (i=1; i<DELAY; i=i+1)\r\n\tbegin : del\r\n\t\tassign delay_line [i] = delay_line[i-1];\r\n\tend\r\nendgenerate\r\nassign delay_line[0] = start;\r\n\r\ninitial begin\r\n\tstart=0;\r\nend\r\n\r\n// sync it over to the input clock\r\nalways @(posedge clk) begin\r\n\tout <= delay_line;\r\nend\r\n\r\ninteger counter=0;\r\nalways @(posedge clk) begin\r\n\tcounter = counter+1;\r\n\tif (counter==200000000) begin // every 2 seconds\r\n\t\tcounter=0;\r\n\t\tstart=1;\r\n\tend\r\n\tif (start) start=0;\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/serial1.bdf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"graphic\" (version \"1.4\"))\r\n(pin\r\n\t(input)\r\n\t(rect -160 400 16 416)\r\n\t(text \"INPUT\" (rect 133 0 161 10)(font \"Arial\" (font_size 6)))\r\n\t(text \"232_in\" (rect 9 0 40 12)(font \"Arial\" ))\r\n\t(pt 176 8)\r\n\t(drawing\r\n\t\t(line (pt 92 12)(pt 117 12))\r\n\t\t(line (pt 92 4)(pt 117 4))\r\n\t\t(line (pt 121 8)(pt 176 8))\r\n\t\t(line (pt 92 12)(pt 92 4))\r\n\t\t(line (pt 117 4)(pt 121 8))\r\n\t\t(line (pt 117 12)(pt 121 8))\r\n\t)\r\n\t(text \"VCC\" (rect 136 7 156 17)(font \"Arial\" (font_size 6)))\r\n\t(annotation_block (location)(rect -208 416 -160 432))\r\n)\r\n(pin\r\n\t(input)\r\n\t(rect 192 -216 368 -200)\r\n\t(text \"INPUT\" (rect 133 0 161 10)(font \"Arial\" (font_size 6)))\r\n\t(text \"din1[7..0]\" (rect 9 0 55 12)(font \"Arial\" ))\r\n\t(pt 176 8)\r\n\t(drawing\r\n\t\t(line (pt 92 12)(pt 117 12))\r\n\t\t(line (pt 92 4)(pt 117 4))\r\n\t\t(line (pt 121 8)(pt 176 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  },
  {
    "path": "max10_adc_firmware_v8/serial1.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.2\"))\r\n(symbol\r\n\t(rect 16 16 192 112)\r\n\t(text \"serial1\" (rect 5 0 42 14)(font \"Arial\" (font_size 8)))\r\n\t(text \"inst\" (rect 8 80 25 92)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 32)\r\n\t\t(input)\r\n\t\t(text \"din[7..0]\" (rect 0 0 44 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"din[7..0]\" (rect 21 27 65 41)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 32)(pt 16 32)(line_width 3))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 48)\r\n\t\t(input)\r\n\t\t(text \"clock1\" (rect 0 0 36 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clock1\" (rect 21 43 57 57)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 48)(pt 16 48))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 64)\r\n\t\t(input)\r\n\t\t(text \"232_in\" (rect 0 0 37 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"232_in\" (rect 21 59 58 73)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 64)(pt 16 64))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 32)\r\n\t\t(output)\r\n\t\t(text \"clk_flash_out\" (rect 0 0 75 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clk_flash_out\" (rect 80 27 155 41)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 176 32)(pt 160 32))\r\n\t)\r\n\t(port\r\n\t\t(pt 176 48)\r\n\t\t(output)\r\n\t\t(text \"232_out\" (rect 0 0 46 14)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"232_out\" (rect 109 43 155 57)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 176 48)(pt 160 48))\r\n\t)\r\n\t(drawing\r\n\t\t(rectangle (rect 16 16 160 80))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/serial1.qpf",
    "content": "# -------------------------------------------------------------------------- #\r\n#\r\n# Copyright (C) 1991-2013 Altera Corporation\r\n# Your use of Altera Corporation's design tools, logic functions \r\n# and other software and tools, and its AMPP partner logic \r\n# functions, and any output files from any of the foregoing \r\n# (including device programming or simulation files), and any \r\n# associated documentation or information are expressly subject \r\n# to the terms and conditions of the Altera Program License \r\n# Subscription Agreement, Altera MegaCore Function License \r\n# Agreement, or other applicable license agreement, including, \r\n# without limitation, that your use is for the sole purpose of \r\n# programming logic devices manufactured by Altera and sold by \r\n# Altera or its authorized distributors.  Please refer to the \r\n# applicable agreement for further details.\r\n#\r\n# -------------------------------------------------------------------------- #\r\n#\r\n# Quartus II 32-bit\r\n# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition\r\n# Date created = 17:22:48  September 13, 2016\r\n#\r\n# -------------------------------------------------------------------------- #\r\n\r\nQUARTUS_VERSION = \"13.0\"\r\nDATE = \"17:22:48  September 13, 2016\"\r\n\r\n# Revisions\r\n\r\nPROJECT_REVISION = \"serial1\"\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/serial1.qsf",
    "content": "# -------------------------------------------------------------------------- #\r\n#\r\n# Copyright (C) 1991-2013 Altera Corporation\r\n# Your use of Altera Corporation's design tools, logic functions \r\n# and other software and tools, and its AMPP partner logic \r\n# functions, and any output files from any of the foregoing \r\n# (including device programming or simulation files), and any \r\n# associated documentation or information are expressly subject \r\n# to the terms and conditions of the Altera Program License \r\n# Subscription Agreement, Altera MegaCore Function License \r\n# Agreement, or other applicable license agreement, including, \r\n# without limitation, that your use is for the sole purpose of \r\n# programming logic devices manufactured by Altera and sold by \r\n# Altera or its authorized distributors.  Please refer to the \r\n# applicable agreement for further details.\r\n#\r\n# -------------------------------------------------------------------------- #\r\n#\r\n# Quartus II 32-bit\r\n# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition\r\n# Date created = 17:22:48  September 13, 2016\r\n#\r\n# -------------------------------------------------------------------------- #\r\n#\r\n# Notes:\r\n#\r\n# 1) The default values for assignments are stored in the file:\r\n#\t\tserial1_assignment_defaults.qdf\r\n#    If this file doesn't exist, see file:\r\n#\t\tassignment_defaults.qdf\r\n#\r\n# 2) Altera recommends that you do not modify this file. This\r\n#    file is updated automatically by the Quartus II software\r\n#    and any changes you make may be lost or overwritten.\r\n#\r\n# -------------------------------------------------------------------------- #\r\n\r\n\r\nset_global_assignment -name FAMILY \"MAX 10\"\r\nset_global_assignment -name DEVICE 10M08SAE144C8GES\r\nset_global_assignment -name TOP_LEVEL_ENTITY serial1\r\nset_global_assignment -name ORIGINAL_QUARTUS_VERSION \"13.0 SP1\"\r\nset_global_assignment -name PROJECT_CREATION_TIME_DATE \"17:22:48  SEPTEMBER 13, 2016\"\r\nset_global_assignment -name LAST_QUARTUS_VERSION 15.0.0\r\nset_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files\r\nset_global_assignment -name MIN_CORE_JUNCTION_TEMP 0\r\nset_global_assignment -name MAX_CORE_JUNCTION_TEMP 85\r\nset_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 2\r\nset_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top\r\nset_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top\r\nset_global_assignment -name PARTITION_COLOR 16764057 -section_id Top\r\nset_global_assignment -name STRATIX_DEVICE_IO_STANDARD \"3.3-V LVTTL\"\r\nset_location_assignment PIN_93 -to 232_in\r\nset_location_assignment PIN_92 -to 232_out\r\nset_location_assignment PIN_33 -to clk_flash_out\r\nset_location_assignment PIN_38 -to din1[7]\r\nset_location_assignment PIN_39 -to din1[6]\r\nset_location_assignment PIN_41 -to din1[5]\r\nset_location_assignment PIN_43 -to din1[4]\r\nset_location_assignment PIN_44 -to din1[3]\r\nset_location_assignment PIN_45 -to din1[2]\r\nset_location_assignment PIN_46 -to din1[1]\r\nset_location_assignment PIN_47 -to din1[0]\r\nset_location_assignment PIN_50 -to din2[7]\r\nset_location_assignment PIN_52 -to din2[6]\r\nset_location_assignment PIN_54 -to din2[5]\r\nset_location_assignment PIN_55 -to din2[4]\r\nset_location_assignment PIN_56 -to din2[3]\r\nset_location_assignment PIN_57 -to din2[2]\r\nset_location_assignment PIN_58 -to din2[1]\r\nset_location_assignment PIN_59 -to din2[0]\r\nset_location_assignment PIN_60 -to din3[7]\r\nset_location_assignment PIN_62 -to din3[6]\r\nset_location_assignment PIN_64 -to din3[5]\r\nset_location_assignment PIN_65 -to din3[4]\r\nset_location_assignment PIN_66 -to din3[3]\r\nset_location_assignment PIN_69 -to din3[2]\r\nset_location_assignment PIN_70 -to din3[1]\r\nset_location_assignment PIN_74 -to din3[0]\r\nset_location_assignment PIN_75 -to din4[7]\r\nset_location_assignment PIN_76 -to din4[6]\r\nset_location_assignment PIN_77 -to din4[5]\r\nset_location_assignment PIN_78 -to din4[4]\r\nset_location_assignment PIN_79 -to din4[3]\r\nset_location_assignment PIN_81 -to din4[2]\r\nset_location_assignment PIN_84 -to din4[1]\r\nset_location_assignment PIN_85 -to din4[0]\r\nset_location_assignment PIN_96 -to 232_out2\r\nset_location_assignment PIN_28 -to outclk_pin\r\nset_location_assignment PIN_86 -to trig_in_towards_left\r\nset_location_assignment PIN_87 -to trig_out_to_right\r\nset_location_assignment PIN_106 -to trig_out_to_left\r\nset_location_assignment PIN_105 -to trig_in_towards_right\r\nset_global_assignment -name PROJECT_IP_REGENERATION_POLICY ALWAYS_REGENERATE_IP\r\nset_global_assignment -name POWER_PRESET_COOLING_SOLUTION \"23 MM HEAT SINK WITH 200 LFPM AIRFLOW\"\r\nset_global_assignment -name POWER_BOARD_THERMAL_MODEL \"NONE (CONSERVATIVE)\"\r\nset_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON\r\nset_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE \"12.5 %\"\r\nset_location_assignment PIN_27 -to clock_ext_osc\r\nset_location_assignment PIN_26 -to clock_in\r\nset_parameter -name SERIAL_BAUD_RATE 1500000\r\nset_location_assignment PIN_22 -to outsel_out\r\nset_location_assignment PIN_25 -to format_out\r\nset_location_assignment PIN_24 -to div_out\r\nset_global_assignment -name EDA_SIMULATION_TOOL \"ModelSim-Altera (Verilog)\"\r\nset_global_assignment -name EDA_TIME_SCALE \"1 ps\" -section_id eda_simulation\r\nset_global_assignment -name EDA_OUTPUT_DATA_FORMAT \"VERILOG HDL\" -section_id eda_simulation\r\nset_global_assignment -name EDA_USER_COMPILED_SIMULATION_LIBRARY_DIRECTORY \"C:\\\\haas\\\\Dropbox\\\\documents\\\\FPGA\\\\QuartusII\\\\serial_vga_pong_max10_adc\\\\simulation\\\\modelsim\" -section_id eda_simulation\r\nset_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST ON -section_id eda_simulation\r\nset_location_assignment PIN_98 -to 232_in2\r\nset_parameter -name ADC_RAM_WIDTH 12\r\nset_location_assignment PIN_32 -to clk_flash_out_2\r\nset_location_assignment PIN_21 -to i2c_sda\r\nset_location_assignment PIN_141 -to i2c_scl\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON\r\nset_global_assignment -name OPTIMIZATION_MODE \"HIGH PERFORMANCE EFFORT\"\r\nset_location_assignment PIN_132 -to usb_wr\r\nset_location_assignment PIN_127 -to usb_txe_busy\r\nset_location_assignment PIN_134 -to usb_clk60\r\nset_location_assignment PIN_131 -to usb_siwu\r\nset_location_assignment PIN_100 -to carryin -disable\r\nset_location_assignment PIN_101 -to carryout -disable\r\nset_location_assignment PIN_135 -to debug1\r\nset_global_assignment -name BDF_FILE serial1.bdf\r\nset_global_assignment -name VERILOG_FILE ring_counter.v\r\nset_global_assignment -name VERILOG_FILE tdc2.v\r\nset_global_assignment -name VERILOG_FILE oscillo.v\r\nset_global_assignment -name VERILOG_FILE serialprocessor.v\r\nset_global_assignment -name VERILOG_FILE serialprocessor_slave.v\r\nset_global_assignment -name VHDL_FILE SSD1306.vhd\r\nset_global_assignment -name VHDL_FILE SPI.vhd\r\nset_global_assignment -name VHDL_FILE i2c_master.vhd\r\nset_global_assignment -name VERILOG_FILE async.v\r\nset_global_assignment -name VERILOG_FILE demux1.v\r\nset_global_assignment -name QIP_FILE mypll2.qip\r\nset_global_assignment -name QIP_FILE ram1.qip\r\nset_global_assignment -name QIP_FILE dpram2.qip\r\nset_global_assignment -name QIP_FILE lp_ram_dp.qip\r\nset_global_assignment -name QIP_FILE myadc/synthesis/myadc.qip\r\nset_global_assignment -name QIP_FILE uniqueid.qip\r\nset_global_assignment -name SIP_FILE uniqueid.sip\r\nset_global_assignment -name CDF_FILE Chain1.cdf\r\nset_global_assignment -name CDF_FILE Chain2.cdf\r\nset_location_assignment PIN_29 -to pin_29\r\nset_location_assignment PIN_110 -to pin_110\r\nset_location_assignment PIN_111 -to pin_111\r\nset_location_assignment PIN_113 -to pin_113\r\nset_location_assignment PIN_114 -to pin_114\r\nset_location_assignment PIN_118 -to pin_118\r\nset_location_assignment PIN_119 -to pin_119\r\nset_location_assignment PIN_122 -to pin_122\r\nset_location_assignment PIN_121 -to ext_trig_in\r\nset_location_assignment PIN_88 -to digital_in1\r\nset_location_assignment PIN_89 -to digital_in2\r\nset_location_assignment PIN_90 -to digital_in3\r\nset_location_assignment PIN_91 -to digital_in4\r\nset_location_assignment PIN_100 -to digital_in5\r\nset_location_assignment PIN_101 -to digital_in6\r\nset_location_assignment PIN_124 -to digital_in7\r\nset_location_assignment PIN_130 -to digital_in8\r\nset_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top"
  },
  {
    "path": "max10_adc_firmware_v8/serial1_assignment_defaults.qdf",
    "content": "# -------------------------------------------------------------------------- #\r\n#\r\n# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\n# Your use of Altera Corporation's design tools, logic functions \r\n# and other software and tools, and its AMPP partner logic \r\n# functions, and any output files from any of the foregoing \r\n# (including device programming or simulation files), and any \r\n# associated documentation or information are expressly subject \r\n# to the terms and conditions of the Altera Program License \r\n# Subscription Agreement, the Altera Quartus II License Agreement,\r\n# the Altera MegaCore Function License Agreement, or other \r\n# applicable license agreement, including, without limitation, \r\n# that your use is for the sole purpose of programming logic \r\n# devices manufactured by Altera and sold by Altera or its \r\n# authorized distributors.  Please refer to the applicable \r\n# agreement for further details.\r\n#\r\n# -------------------------------------------------------------------------- #\r\n#\r\n# Quartus II 64-Bit\r\n# Version 15.0.0 Build 145 04/22/2015 SJ Web Edition\r\n# Date created = 10:23:14  April 27, 2017\r\n#\r\n# -------------------------------------------------------------------------- #\r\n#\r\n# Note:\r\n#\r\n# 1) Do not modify this file. This file was generated\r\n#    automatically by the Quartus II software and is used\r\n#    to preserve global assignments across Quartus II versions.\r\n#\r\n# -------------------------------------------------------------------------- #\r\n\r\nset_global_assignment -name IP_COMPONENT_REPORT_HIERARCHY Off\r\nset_global_assignment -name IP_COMPONENT_INTERNAL Off\r\nset_global_assignment -name PROJECT_SHOW_ENTITY_NAME On\r\nset_global_assignment -name PROJECT_USE_SIMPLIFIED_NAMES Off\r\nset_global_assignment -name ENABLE_REDUCED_MEMORY_MODE Off\r\nset_global_assignment -name VER_COMPATIBLE_DB_DIR export_db\r\nset_global_assignment -name AUTO_EXPORT_VER_COMPATIBLE_DB Off\r\nset_global_assignment -name FLOW_DISABLE_ASSEMBLER Off\r\nset_global_assignment -name FLOW_ENABLE_POWER_ANALYZER Off\r\nset_global_assignment -name FLOW_ENABLE_HC_COMPARE Off\r\nset_global_assignment -name HC_OUTPUT_DIR hc_output\r\nset_global_assignment -name SAVE_MIGRATION_INFO_DURING_COMPILATION Off\r\nset_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS Off\r\nset_global_assignment -name RUN_FULL_COMPILE_ON_DEVICE_CHANGE On\r\nset_global_assignment -name FLOW_ENABLE_RTL_VIEWER Off\r\nset_global_assignment -name READ_OR_WRITE_IN_BYTE_ADDRESS \"Use global settings\"\r\nset_global_assignment -name FLOW_HARDCOPY_DESIGN_READINESS_CHECK On\r\nset_global_assignment -name FLOW_ENABLE_PARALLEL_MODULES On\r\nset_global_assignment -name ENABLE_COMPACT_REPORT_TABLE Off\r\nset_global_assignment -name REVISION_TYPE Base\r\nset_global_assignment -name DEFAULT_HOLD_MULTICYCLE \"Same as Multicycle\"\r\nset_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS On\r\nset_global_assignment -name CUT_OFF_READ_DURING_WRITE_PATHS On\r\nset_global_assignment -name CUT_OFF_IO_PIN_FEEDBACK On\r\nset_global_assignment -name DO_COMBINED_ANALYSIS Off\r\nset_global_assignment -name TDC_AGGRESSIVE_HOLD_CLOSURE_EFFORT Off\r\nset_global_assignment -name EMIF_SOC_PHYCLK_ADVANCE_MODELING Off\r\nset_global_assignment -name USE_DLL_FREQUENCY_FOR_DQS_DELAY_CHAIN Off\r\nset_global_assignment -name ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS On\r\nset_global_assignment -name TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS On\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria V\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"MAX 10\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Stratix IV\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Cyclone IV E\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria 10\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family \"MAX V\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Stratix V\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria V GZ\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family \"MAX II\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria II GX\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Arria II GZ\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Cyclone IV GX\"\r\nset_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family \"Cyclone V\"\r\nset_global_assignment -name TIMEQUEST_DO_REPORT_TIMING Off\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria V\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"MAX 10\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Stratix IV\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS On -family \"Cyclone IV E\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria 10\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS On -family \"MAX V\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Stratix V\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria V GZ\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS On -family \"MAX II\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria II GX\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Arria II GZ\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS On -family \"Cyclone IV GX\"\r\nset_global_assignment -name TIMEQUEST_REPORT_WORST_CASE_TIMING_PATHS Off -family \"Cyclone V\"\r\nset_global_assignment -name TIMEQUEST_REPORT_NUM_WORST_CASE_TIMING_PATHS 100\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria V\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"MAX 10\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Cyclone IV E\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Stratix IV\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria 10\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family \"MAX V\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Stratix V\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria V GZ\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL Off -family \"MAX II\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria II GX\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Arria II GZ\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Cyclone IV GX\"\r\nset_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL On -family \"Cyclone V\"\r\nset_global_assignment -name OPTIMIZATION_MODE Balanced\r\nset_global_assignment -name ALLOW_REGISTER_MERGING On\r\nset_global_assignment -name ALLOW_REGISTER_DUPLICATION On\r\nset_global_assignment -name TIMEQUEST2 on -family \"Arria 10\"\r\nset_global_assignment -name TIMEQUEST2 OFF -family \"Stratix V\"\r\nset_global_assignment -name MUX_RESTRUCTURE Auto\r\nset_global_assignment -name MLAB_ADD_TIMING_CONSTRAINTS_FOR_MIXED_PORT_FEED_THROUGH_MODE_SETTING_DONT_CARE Off\r\nset_global_assignment -name ENABLE_IP_DEBUG Off\r\nset_global_assignment -name SAVE_DISK_SPACE On\r\nset_global_assignment -name DISABLE_OCP_HW_EVAL Off\r\nset_global_assignment -name DEVICE_FILTER_PACKAGE Any\r\nset_global_assignment -name DEVICE_FILTER_PIN_COUNT Any\r\nset_global_assignment -name DEVICE_FILTER_SPEED_GRADE Any\r\nset_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL \"<None>\"\r\nset_global_assignment -name VERILOG_INPUT_VERSION Verilog_2001\r\nset_global_assignment -name VHDL_INPUT_VERSION VHDL_1993\r\nset_global_assignment -name FAMILY -value \"Cyclone V\"\r\nset_global_assignment -name TRUE_WYSIWYG_FLOW Off\r\nset_global_assignment -name SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES Off\r\nset_global_assignment -name STATE_MACHINE_PROCESSING Auto\r\nset_global_assignment -name SAFE_STATE_MACHINE Off\r\nset_global_assignment -name EXTRACT_VERILOG_STATE_MACHINES On\r\nset_global_assignment -name EXTRACT_VHDL_STATE_MACHINES On\r\nset_global_assignment -name IGNORE_VERILOG_INITIAL_CONSTRUCTS Off\r\nset_global_assignment -name VERILOG_CONSTANT_LOOP_LIMIT 5000\r\nset_global_assignment -name VERILOG_NON_CONSTANT_LOOP_LIMIT 250\r\nset_global_assignment -name INFER_RAMS_FROM_RAW_LOGIC On\r\nset_global_assignment -name PARALLEL_SYNTHESIS On\r\nset_global_assignment -name DSP_BLOCK_BALANCING Auto\r\nset_global_assignment -name MAX_BALANCING_DSP_BLOCKS \"-1 (Unlimited)\"\r\nset_global_assignment -name NOT_GATE_PUSH_BACK On\r\nset_global_assignment -name ALLOW_POWER_UP_DONT_CARE On\r\nset_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS Off\r\nset_global_assignment -name REMOVE_DUPLICATE_REGISTERS On\r\nset_global_assignment -name IGNORE_CARRY_BUFFERS Off\r\nset_global_assignment -name IGNORE_CASCADE_BUFFERS Off\r\nset_global_assignment -name IGNORE_GLOBAL_BUFFERS Off\r\nset_global_assignment -name IGNORE_ROW_GLOBAL_BUFFERS Off\r\nset_global_assignment -name IGNORE_LCELL_BUFFERS Off\r\nset_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS AUTO\r\nset_global_assignment -name IGNORE_SOFT_BUFFERS On\r\nset_global_assignment -name MAX7000_IGNORE_SOFT_BUFFERS Off\r\nset_global_assignment -name LIMIT_AHDL_INTEGERS_TO_32_BITS Off\r\nset_global_assignment -name AUTO_GLOBAL_CLOCK_MAX On\r\nset_global_assignment -name AUTO_GLOBAL_OE_MAX On\r\nset_global_assignment -name MAX_AUTO_GLOBAL_REGISTER_CONTROLS On\r\nset_global_assignment -name AUTO_IMPLEMENT_IN_ROM Off\r\nset_global_assignment -name APEX20K_TECHNOLOGY_MAPPER Lut\r\nset_global_assignment -name OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE Speed\r\nset_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE Balanced\r\nset_global_assignment -name MERCURY_OPTIMIZATION_TECHNIQUE Area\r\nset_global_assignment -name FLEX6K_OPTIMIZATION_TECHNIQUE Area\r\nset_global_assignment -name FLEX10K_OPTIMIZATION_TECHNIQUE Area\r\nset_global_assignment -name ALLOW_XOR_GATE_USAGE On\r\nset_global_assignment -name AUTO_LCELL_INSERTION On\r\nset_global_assignment -name CARRY_CHAIN_LENGTH 48\r\nset_global_assignment -name FLEX6K_CARRY_CHAIN_LENGTH 32\r\nset_global_assignment -name FLEX10K_CARRY_CHAIN_LENGTH 32\r\nset_global_assignment -name MERCURY_CARRY_CHAIN_LENGTH 48\r\nset_global_assignment -name STRATIX_CARRY_CHAIN_LENGTH 70\r\nset_global_assignment -name STRATIXII_CARRY_CHAIN_LENGTH 70\r\nset_global_assignment -name CASCADE_CHAIN_LENGTH 2\r\nset_global_assignment -name PARALLEL_EXPANDER_CHAIN_LENGTH 16\r\nset_global_assignment -name MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH 4\r\nset_global_assignment -name AUTO_CARRY_CHAINS On\r\nset_global_assignment -name AUTO_CASCADE_CHAINS On\r\nset_global_assignment -name AUTO_PARALLEL_EXPANDERS On\r\nset_global_assignment -name AUTO_OPEN_DRAIN_PINS On\r\nset_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP Off\r\nset_global_assignment -name AUTO_ROM_RECOGNITION On\r\nset_global_assignment -name AUTO_RAM_RECOGNITION On\r\nset_global_assignment -name AUTO_DSP_RECOGNITION On\r\nset_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION Auto\r\nset_global_assignment -name ALLOW_SHIFT_REGISTER_MERGING_ACROSS_HIERARCHIES Auto\r\nset_global_assignment -name AUTO_CLOCK_ENABLE_RECOGNITION On\r\nset_global_assignment -name STRICT_RAM_RECOGNITION Off\r\nset_global_assignment -name ALLOW_SYNCH_CTRL_USAGE On\r\nset_global_assignment -name FORCE_SYNCH_CLEAR Off\r\nset_global_assignment -name AUTO_RAM_BLOCK_BALANCING On\r\nset_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION Off\r\nset_global_assignment -name AUTO_RESOURCE_SHARING Off\r\nset_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION Off\r\nset_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION Off\r\nset_global_assignment -name ALLOW_ANY_SHIFT_REGISTER_SIZE_FOR_RECOGNITION Off\r\nset_global_assignment -name MAX7000_FANIN_PER_CELL 100\r\nset_global_assignment -name USE_LOGICLOCK_CONSTRAINTS_IN_BALANCING On\r\nset_global_assignment -name MAX_RAM_BLOCKS_M512 \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_RAM_BLOCKS_M4K \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_RAM_BLOCKS_MRAM \"-1 (Unlimited)\"\r\nset_global_assignment -name IGNORE_TRANSLATE_OFF_AND_SYNTHESIS_OFF Off\r\nset_global_assignment -name STRATIXGX_BYPASS_REMAPPING_OF_FORCE_SIGNAL_DETECT_SIGNAL_THRESHOLD_SELECT Off\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria II GZ\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria V\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"MAX 10\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Cyclone IV GX\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Stratix IV\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Cyclone IV E\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria 10\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Stratix V\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria V GZ\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Cyclone V\"\r\nset_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS On -family \"Arria II GX\"\r\nset_global_assignment -name REPORT_PARAMETER_SETTINGS On\r\nset_global_assignment -name REPORT_SOURCE_ASSIGNMENTS On\r\nset_global_assignment -name REPORT_CONNECTIVITY_CHECKS On\r\nset_global_assignment -name IGNORE_MAX_FANOUT_ASSIGNMENTS Off\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria V\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"MAX 10\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"Cyclone IV E\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Stratix IV\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria 10\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"MAX V\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Stratix V\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"MAX II\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria V GZ\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria II GX\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Arria II GZ\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 2 -family \"Cyclone IV GX\"\r\nset_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 3 -family \"Cyclone V\"\r\nset_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS \"Normal compilation\"\r\nset_global_assignment -name HDL_MESSAGE_LEVEL Level2\r\nset_global_assignment -name USE_HIGH_SPEED_ADDER Auto\r\nset_global_assignment -name NUMBER_OF_REMOVED_REGISTERS_REPORTED 5000\r\nset_global_assignment -name NUMBER_OF_SYNTHESIS_MIGRATION_ROWS 5000\r\nset_global_assignment -name SYNTHESIS_S10_MIGRATION_CHECKS Off\r\nset_global_assignment -name NUMBER_OF_SWEPT_NODES_REPORTED 5000\r\nset_global_assignment -name NUMBER_OF_INVERTED_REGISTERS_REPORTED 100\r\nset_global_assignment -name SYNTH_CLOCK_MUX_PROTECTION On\r\nset_global_assignment -name SYNTH_GATED_CLOCK_CONVERSION Off\r\nset_global_assignment -name BLOCK_DESIGN_NAMING Auto\r\nset_global_assignment -name SYNTH_PROTECT_SDC_CONSTRAINT Off\r\nset_global_assignment -name SYNTHESIS_EFFORT Auto\r\nset_global_assignment -name SHIFT_REGISTER_RECOGNITION_ACLR_SIGNAL On\r\nset_global_assignment -name PRE_MAPPING_RESYNTHESIS Off\r\nset_global_assignment -name SYNTH_MESSAGE_LEVEL Medium\r\nset_global_assignment -name DISABLE_REGISTER_MERGING_ACROSS_HIERARCHIES Auto\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria II GZ\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria V\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"MAX 10\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Cyclone IV GX\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Stratix IV\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Cyclone IV E\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria 10\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Stratix V\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria V GZ\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Cyclone V\"\r\nset_global_assignment -name SYNTH_RESOURCE_AWARE_INFERENCE_FOR_BLOCK_RAM On -family \"Arria II GX\"\r\nset_global_assignment -name MAX_LABS \"-1 (Unlimited)\"\r\nset_global_assignment -name RBCGEN_CRITICAL_WARNING_TO_ERROR On\r\nset_global_assignment -name MAX_NUMBER_OF_REGISTERS_FROM_UNINFERRED_RAMS \"-1 (Unlimited)\"\r\nset_global_assignment -name AUTO_PARALLEL_SYNTHESIS On\r\nset_global_assignment -name PRPOF_ID Off\r\nset_global_assignment -name DISABLE_DSP_NEGATE_INFERENCING Off\r\nset_global_assignment -name FLEX10K_ENABLE_LOCK_OUTPUT Off\r\nset_global_assignment -name AUTO_MERGE_PLLS On\r\nset_global_assignment -name IGNORE_MODE_FOR_MERGE Off\r\nset_global_assignment -name TXPMA_SLEW_RATE Low\r\nset_global_assignment -name ADCE_ENABLED Auto\r\nset_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL Normal\r\nset_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS Off\r\nset_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.0\r\nset_global_assignment -name ROUTER_EFFORT_MULTIPLIER 1.0\r\nset_global_assignment -name FIT_ATTEMPTS_TO_SKIP 0.0\r\nset_global_assignment -name ECO_ALLOW_ROUTING_CHANGES Off\r\nset_global_assignment -name DEVICE AUTO\r\nset_global_assignment -name BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE Off\r\nset_global_assignment -name ENABLE_JTAG_BST_SUPPORT Off\r\nset_global_assignment -name MAX7000_ENABLE_JTAG_BST_SUPPORT On\r\nset_global_assignment -name ENABLE_NCEO_OUTPUT Off\r\nset_global_assignment -name RESERVE_NCEO_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION \"Use as programming pin\"\r\nset_global_assignment -name STRATIXIII_UPDATE_MODE Standard\r\nset_global_assignment -name STRATIX_UPDATE_MODE Standard\r\nset_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"Single Image\"\r\nset_global_assignment -name CVP_MODE Off\r\nset_global_assignment -name STRATIXV_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name STRATIXIII_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name MAX10FPGA_CONFIGURATION_SCHEME \"Internal Configuration\"\r\nset_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME \"Active Serial\"\r\nset_global_assignment -name STRATIXII_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name CYCLONEII_CONFIGURATION_SCHEME \"Active Serial\"\r\nset_global_assignment -name APEX20K_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name STRATIX_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name CYCLONE_CONFIGURATION_SCHEME \"Active Serial\"\r\nset_global_assignment -name MERCURY_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name FLEX6K_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name FLEX10K_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name APEXII_CONFIGURATION_SCHEME \"Passive Serial\"\r\nset_global_assignment -name USER_START_UP_CLOCK Off\r\nset_global_assignment -name DEVICE_INITIALIZATION_CLOCK INIT_INTOSC\r\nset_global_assignment -name ENABLE_VREFA_PIN Off\r\nset_global_assignment -name ENABLE_VREFB_PIN Off\r\nset_global_assignment -name ALWAYS_ENABLE_INPUT_BUFFERS Off\r\nset_global_assignment -name ENABLE_ASMI_FOR_FLASH_LOADER Off\r\nset_global_assignment -name ENABLE_DEVICE_WIDE_RESET Off\r\nset_global_assignment -name ENABLE_DEVICE_WIDE_OE Off\r\nset_global_assignment -name RESERVE_ALL_UNUSED_PINS \"As output driving ground\"\r\nset_global_assignment -name ENABLE_INIT_DONE_OUTPUT Off\r\nset_global_assignment -name INIT_DONE_OPEN_DRAIN On\r\nset_global_assignment -name RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_RDYNBUSY_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA31_THROUGH_DATA16_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA15_THROUGH_DATA8_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION \"As input tri-stated\"\r\nset_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION \"As input tri-stated\"\r\nset_global_assignment -name RESERVE_DATA7_THROUGH_DATA2_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DATA7_THROUGH_DATA5_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION \"As input tri-stated\"\r\nset_global_assignment -name RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION \"Use as regular IO\"\r\nset_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION \"Use as programming pin\"\r\nset_global_assignment -name ENABLE_CONFIGURATION_PINS On\r\nset_global_assignment -name ENABLE_JTAG_PIN_SHARING Off\r\nset_global_assignment -name ENABLE_NCE_PIN Off\r\nset_global_assignment -name ENABLE_BOOT_SEL_PIN On\r\nset_global_assignment -name CRC_ERROR_CHECKING Off\r\nset_global_assignment -name INTERNAL_SCRUBBING Off\r\nset_global_assignment -name PR_ERROR_OPEN_DRAIN On\r\nset_global_assignment -name PR_READY_OPEN_DRAIN On\r\nset_global_assignment -name ENABLE_CVP_CONFDONE Off\r\nset_global_assignment -name CVP_CONFDONE_OPEN_DRAIN On\r\nset_global_assignment -name ENABLE_NCONFIG_FROM_CORE On\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria II GZ\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria V\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"MAX 10\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Cyclone IV GX\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Stratix IV\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Cyclone IV E\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria 10\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"IO Paths and Minimum TPD Paths\" -family \"MAX V\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Stratix V\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"IO Paths and Minimum TPD Paths\" -family \"MAX II\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria V GZ\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Cyclone V\"\r\nset_global_assignment -name OPTIMIZE_HOLD_TIMING \"All Paths\" -family \"Arria II GX\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria V\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"MAX 10\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Cyclone IV E\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Stratix IV\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria 10\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING Off -family \"MAX V\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Stratix V\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria V GZ\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING Off -family \"MAX II\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria II GX\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Arria II GZ\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Cyclone IV GX\"\r\nset_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING On -family \"Cyclone V\"\r\nset_global_assignment -name BLOCK_RAM_TO_MLAB_CELL_CONVERSION On\r\nset_global_assignment -name BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS Auto\r\nset_global_assignment -name BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES Care\r\nset_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family \"Stratix IV\"\r\nset_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family \"Arria 10\"\r\nset_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family \"Stratix V\"\r\nset_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic -family \"Arria V GZ\"\r\nset_global_assignment -name PROGRAMMABLE_POWER_MAXIMUM_HIGH_SPEED_FRACTION_OF_USED_LAB_TILES 1.0\r\nset_global_assignment -name GUARANTEE_MIN_DELAY_CORNER_IO_ZERO_HOLD_TIME On\r\nset_global_assignment -name OPTIMIZE_POWER_DURING_FITTING \"Normal compilation\"\r\nset_global_assignment -name OPTIMIZE_SSN Off\r\nset_global_assignment -name OPTIMIZE_TIMING \"Normal compilation\"\r\nset_global_assignment -name ECO_OPTIMIZE_TIMING Off\r\nset_global_assignment -name ECO_REGENERATE_REPORT Off\r\nset_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING Normal\r\nset_global_assignment -name FIT_ONLY_ONE_ATTEMPT Off\r\nset_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION Automatically\r\nset_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION Automatically\r\nset_global_assignment -name SEED 1\r\nset_global_assignment -name SLOW_SLEW_RATE Off\r\nset_global_assignment -name PCI_IO Off\r\nset_global_assignment -name TURBO_BIT On\r\nset_global_assignment -name WEAK_PULL_UP_RESISTOR Off\r\nset_global_assignment -name ENABLE_BUS_HOLD_CIRCUITRY Off\r\nset_global_assignment -name AUTO_GLOBAL_MEMORY_CONTROLS Off\r\nset_global_assignment -name MIGRATION_CONSTRAIN_CORE_RESOURCES On\r\nset_global_assignment -name QII_AUTO_PACKED_REGISTERS Auto\r\nset_global_assignment -name AUTO_PACKED_REGISTERS_MAX Auto\r\nset_global_assignment -name NORMAL_LCELL_INSERT On\r\nset_global_assignment -name CARRY_OUT_PINS_LCELL_INSERT On\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Arria V\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"MAX 10\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Stratix IV\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Cyclone IV E\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS Off -family \"Arria 10\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"MAX V\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Stratix V\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"MAX II\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Arria V GZ\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Arria II GX\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Arria II GZ\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Cyclone IV GX\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS On -family \"Cyclone V\"\r\nset_global_assignment -name AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS OFF\r\nset_global_assignment -name XSTL_INPUT_ALLOW_SE_BUFFER Off\r\nset_global_assignment -name TREAT_BIDIR_AS_OUTPUT Off\r\nset_global_assignment -name AUTO_TURBO_BIT ON\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_LOG_FILE Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING Off\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING Off\r\nset_global_assignment -name IO_PLACEMENT_OPTIMIZATION On\r\nset_global_assignment -name ALLOW_LVTTL_LVCMOS_INPUT_LEVELS_TO_OVERDRIVE_INPUT_BUFFER Off\r\nset_global_assignment -name OVERRIDE_DEFAULT_ELECTROMIGRATION_PARAMETERS Off\r\nset_global_assignment -name FITTER_EFFORT \"Auto Fit\"\r\nset_global_assignment -name FITTER_AUTO_EFFORT_DESIRED_SLACK_MARGIN 0ns\r\nset_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT Normal\r\nset_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION Auto\r\nset_global_assignment -name ROUTER_REGISTER_DUPLICATION Auto\r\nset_global_assignment -name STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET Off\r\nset_global_assignment -name AUTO_GLOBAL_CLOCK On\r\nset_global_assignment -name AUTO_GLOBAL_OE On\r\nset_global_assignment -name AUTO_GLOBAL_REGISTER_CONTROLS On\r\nset_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE Realistic\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_UNDER_FULL_DATARATE_RANGE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_RX_CORECLK_FROM_NON_RX_CLKOUT_SOURCE_IN_DOUBLE_DATA_WIDTH_MODE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_IN_DOUBLE_DATA_WIDTH_MODE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_PARALLEL_LOOPBACK_IN_DOUBLE_DATA_WIDTH_MODE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_XAUI_IN_SINGLE_DATA_WIDTH_MODE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off\r\nset_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_WITHOUT_8B10B Off\r\nset_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off\r\nset_global_assignment -name STRATIXGX_ALLOW_POST8B10B_LOOPBACK Off\r\nset_global_assignment -name STRATIXGX_ALLOW_REVERSE_PARALLEL_LOOPBACK Off\r\nset_global_assignment -name STRATIXGX_ALLOW_USE_OF_GXB_COUPLED_IOS Off\r\nset_global_assignment -name GENERATE_GXB_RECONFIG_MIF Off\r\nset_global_assignment -name GENERATE_GXB_RECONFIG_MIF_WITH_PLL Off\r\nset_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP \"As input tri-stated with weak pull-up\"\r\nset_global_assignment -name ENABLE_HOLD_BACK_OFF On\r\nset_global_assignment -name CONFIGURATION_VCCIO_LEVEL Auto\r\nset_global_assignment -name FORCE_CONFIGURATION_VCCIO Off\r\nset_global_assignment -name SYNCHRONIZER_IDENTIFICATION Off\r\nset_global_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION On\r\nset_global_assignment -name OPTIMIZE_FOR_METASTABILITY On\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Arria V\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN Off -family \"MAX 10\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN Off -family \"Cyclone IV E\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Arria 10\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Stratix V\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Arria V GZ\"\r\nset_global_assignment -name CRC_ERROR_OPEN_DRAIN On -family \"Cyclone V\"\r\nset_global_assignment -name MAX_GLOBAL_CLOCKS_ALLOWED \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_REGIONAL_CLOCKS_ALLOWED \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_PERIPHERY_CLOCKS_ALLOWED \"-1 (Unlimited)\"\r\nset_global_assignment -name MAX_CLOCKS_ALLOWED \"-1 (Unlimited)\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Arria 10\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Arria V\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Stratix V\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_40MHz -family \"Cyclone IV GX\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Arria V GZ\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHz -family \"Cyclone V\"\r\nset_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_40MHz -family \"Arria II GX\"\r\nset_global_assignment -name M144K_BLOCK_READ_CLOCK_DUTY_CYCLE_DEPENDENCY Off\r\nset_global_assignment -name STRATIXIII_MRAM_COMPATIBILITY On\r\nset_global_assignment -name FORCE_FITTER_TO_AVOID_PERIPHERY_PLACEMENT_WARNINGS Off\r\nset_global_assignment -name AUTO_C3_M9K_BIT_SKIP Off\r\nset_global_assignment -name PR_DONE_OPEN_DRAIN On\r\nset_global_assignment -name NCEO_OPEN_DRAIN On\r\nset_global_assignment -name ENABLE_CRC_ERROR_PIN Off\r\nset_global_assignment -name ENABLE_PR_PINS Off\r\nset_global_assignment -name PR_PINS_OPEN_DRAIN Off\r\nset_global_assignment -name CLAMPING_DIODE Off\r\nset_global_assignment -name TRI_STATE_SPI_PINS Off\r\nset_global_assignment -name UNUSED_TSD_PINS_GND Off\r\nset_global_assignment -name IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE Off\r\nset_global_assignment -name FORM_DDR_CLUSTERING_CLIQUE Off\r\nset_global_assignment -name ALM_REGISTER_PACKING_EFFORT Medium\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Arria V\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION Off -family \"Stratix IV\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Arria 10\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Stratix V\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Arria V GZ\"\r\nset_global_assignment -name ADVANCED_PHYSICAL_OPTIMIZATION On -family \"Cyclone V\"\r\nset_global_assignment -name EDA_SIMULATION_TOOL \"<None>\"\r\nset_global_assignment -name EDA_TIMING_ANALYSIS_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_TIMING_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_SYMBOL_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_SIGNAL_INTEGRITY_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_BOUNDARY_SCAN_TOOL \"<None>\"\r\nset_global_assignment -name EDA_BOARD_DESIGN_TOOL \"<None>\"\r\nset_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL \"<None>\"\r\nset_global_assignment -name EDA_RESYNTHESIS_TOOL \"<None>\"\r\nset_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION On\r\nset_global_assignment -name COMPRESSION_MODE Off\r\nset_global_assignment -name CLOCK_SOURCE Internal\r\nset_global_assignment -name CONFIGURATION_CLOCK_FREQUENCY \"10 MHz\"\r\nset_global_assignment -name CONFIGURATION_CLOCK_DIVISOR 1\r\nset_global_assignment -name ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On\r\nset_global_assignment -name FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE Off\r\nset_global_assignment -name FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On\r\nset_global_assignment -name MAX7000S_JTAG_USER_CODE FFFF\r\nset_global_assignment -name STRATIX_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name APEX20K_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name MERCURY_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name FLEX10K_JTAG_USER_CODE 7F\r\nset_global_assignment -name MAX7000_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name MAX7000_USE_CHECKSUM_AS_USERCODE Off\r\nset_global_assignment -name USE_CHECKSUM_AS_USERCODE On\r\nset_global_assignment -name SECURITY_BIT Off\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE On -family \"MAX 10\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Cyclone IV E\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Stratix IV\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE On -family \"MAX V\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE On -family \"MAX II\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Arria II GX\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Arria II GZ\"\r\nset_global_assignment -name USE_CONFIGURATION_DEVICE Off -family \"Cyclone IV GX\"\r\nset_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name STRATIXII_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name APEX20K_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name MERCURY_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name FLEX6K_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name FLEX10K_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name CYCLONE_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name STRATIX_CONFIGURATION_DEVICE Auto\r\nset_global_assignment -name APEX20K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name STRATIX_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name MERCURY_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r\nset_global_assignment -name EPROM_USE_CHECKSUM_AS_USERCODE Off\r\nset_global_assignment -name AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE On\r\nset_global_assignment -name DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE Off\r\nset_global_assignment -name GENERATE_TTF_FILE Off\r\nset_global_assignment -name GENERATE_RBF_FILE Off\r\nset_global_assignment -name GENERATE_HEX_FILE Off\r\nset_global_assignment -name HEXOUT_FILE_START_ADDRESS 0\r\nset_global_assignment -name HEXOUT_FILE_COUNT_DIRECTION Up\r\nset_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND \"As output driving an unspecified signal\"\r\nset_global_assignment -name RELEASE_CLEARS_BEFORE_TRI_STATES Off\r\nset_global_assignment -name AUTO_RESTART_CONFIGURATION On\r\nset_global_assignment -name HARDCOPYII_POWER_ON_EXTRA_DELAY Off\r\nset_global_assignment -name STRATIXII_MRAM_COMPATIBILITY Off\r\nset_global_assignment -name CYCLONEII_M4K_COMPATIBILITY On\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Arria V\"\r\nset_global_assignment -name ENABLE_OCT_DONE On -family \"MAX 10\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Cyclone IV E\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Arria 10\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Stratix V\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Arria V GZ\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Arria II GX\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Cyclone IV GX\"\r\nset_global_assignment -name ENABLE_OCT_DONE Off -family \"Cyclone V\"\r\nset_global_assignment -name USE_CHECKERED_PATTERN_AS_UNINITIALIZED_RAM_CONTENT OFF\r\nset_global_assignment -name ARRIAIIGX_RX_CDR_LOCKUP_FIX_OVERRIDE Off\r\nset_global_assignment -name ENABLE_AUTONOMOUS_PCIE_HIP Off\r\nset_global_assignment -name ENABLE_ADV_SEU_DETECTION Off\r\nset_global_assignment -name POR_SCHEME \"Instant ON\"\r\nset_global_assignment -name EN_USER_IO_WEAK_PULLUP On\r\nset_global_assignment -name EN_SPI_IO_WEAK_PULLUP On\r\nset_global_assignment -name POF_VERIFY_PROTECT Off\r\nset_global_assignment -name ENABLE_SPI_MODE_CHECK Off\r\nset_global_assignment -name FORCE_SSMCLK_TO_ISMCLK On\r\nset_global_assignment -name FALLBACK_TO_EXTERNAL_FLASH Off\r\nset_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 0\r\nset_global_assignment -name START_TIME 0ns\r\nset_global_assignment -name SIMULATION_MODE TIMING\r\nset_global_assignment -name AUTO_USE_SIMULATION_PDB_NETLIST Off\r\nset_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS On\r\nset_global_assignment -name SETUP_HOLD_DETECTION Off\r\nset_global_assignment -name SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off\r\nset_global_assignment -name CHECK_OUTPUTS Off\r\nset_global_assignment -name SIMULATION_COVERAGE On\r\nset_global_assignment -name SIMULATION_COMPLETE_COVERAGE_REPORT_PANEL On\r\nset_global_assignment -name SIMULATION_MISSING_1_VALUE_COVERAGE_REPORT_PANEL On\r\nset_global_assignment -name SIMULATION_MISSING_0_VALUE_COVERAGE_REPORT_PANEL On\r\nset_global_assignment -name GLITCH_DETECTION Off\r\nset_global_assignment -name GLITCH_INTERVAL 1ns\r\nset_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE Off\r\nset_global_assignment -name SIMULATION_WITH_GLITCH_FILTERING_WHEN_GENERATING_SAF On\r\nset_global_assignment -name SIMULATION_BUS_CHANNEL_GROUPING Off\r\nset_global_assignment -name SIMULATION_VDB_RESULT_FLUSH On\r\nset_global_assignment -name VECTOR_COMPARE_TRIGGER_MODE INPUT_EDGE\r\nset_global_assignment -name SIMULATION_NETLIST_VIEWER Off\r\nset_global_assignment -name SIMULATION_INTERCONNECT_DELAY_MODEL_TYPE TRANSPORT\r\nset_global_assignment -name SIMULATION_CELL_DELAY_MODEL_TYPE TRANSPORT\r\nset_global_assignment -name SIMULATOR_GENERATE_POWERPLAY_VCD_FILE Off\r\nset_global_assignment -name SIMULATOR_PVT_TIMING_MODEL_TYPE AUTO\r\nset_global_assignment -name SIMULATION_WITH_AUTO_GLITCH_FILTERING AUTO\r\nset_global_assignment -name DRC_TOP_FANOUT 50\r\nset_global_assignment -name DRC_FANOUT_EXCEEDING 30\r\nset_global_assignment -name DRC_GATED_CLOCK_FEED 30\r\nset_global_assignment -name HARDCOPY_FLOW_AUTOMATION MIGRATION_ONLY\r\nset_global_assignment -name ENABLE_DRC_SETTINGS Off\r\nset_global_assignment -name CLK_RULE_CLKNET_CLKSPINES_THRESHOLD 25\r\nset_global_assignment -name DRC_DETAIL_MESSAGE_LIMIT 10\r\nset_global_assignment -name DRC_VIOLATION_MESSAGE_LIMIT 30\r\nset_global_assignment -name DRC_DEADLOCK_STATE_LIMIT 2\r\nset_global_assignment -name MERGE_HEX_FILE Off\r\nset_global_assignment -name GENERATE_SVF_FILE Off\r\nset_global_assignment -name GENERATE_ISC_FILE Off\r\nset_global_assignment -name GENERATE_JAM_FILE Off\r\nset_global_assignment -name GENERATE_JBC_FILE Off\r\nset_global_assignment -name GENERATE_JBC_FILE_COMPRESSED On\r\nset_global_assignment -name GENERATE_CONFIG_SVF_FILE Off\r\nset_global_assignment -name GENERATE_CONFIG_ISC_FILE Off\r\nset_global_assignment -name GENERATE_CONFIG_JAM_FILE Off\r\nset_global_assignment -name GENERATE_CONFIG_JBC_FILE Off\r\nset_global_assignment -name GENERATE_CONFIG_JBC_FILE_COMPRESSED On\r\nset_global_assignment -name GENERATE_CONFIG_HEXOUT_FILE Off\r\nset_global_assignment -name ISP_CLAMP_STATE_DEFAULT \"Tri-state\"\r\nset_global_assignment -name HPS_EARLY_IO_RELEASE Off\r\nset_global_assignment -name SIGNALPROBE_ALLOW_OVERUSE Off\r\nset_global_assignment -name SIGNALPROBE_DURING_NORMAL_COMPILATION Off\r\nset_global_assignment -name POWER_DEFAULT_TOGGLE_RATE 12.5%\r\nset_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE 12.5%\r\nset_global_assignment -name POWER_USE_PVA On\r\nset_global_assignment -name POWER_USE_INPUT_FILE \"No File\"\r\nset_global_assignment -name POWER_USE_INPUT_FILES Off\r\nset_global_assignment -name POWER_VCD_FILTER_GLITCHES On\r\nset_global_assignment -name POWER_REPORT_SIGNAL_ACTIVITY Off\r\nset_global_assignment -name POWER_REPORT_POWER_DISSIPATION Off\r\nset_global_assignment -name POWER_USE_DEVICE_CHARACTERISTICS TYPICAL\r\nset_global_assignment -name POWER_AUTO_COMPUTE_TJ On\r\nset_global_assignment -name POWER_TJ_VALUE 25\r\nset_global_assignment -name POWER_USE_TA_VALUE 25\r\nset_global_assignment -name POWER_USE_CUSTOM_COOLING_SOLUTION Off\r\nset_global_assignment -name POWER_BOARD_TEMPERATURE 25\r\nset_global_assignment -name POWER_HPS_ENABLE Off\r\nset_global_assignment -name POWER_HPS_PROC_FREQ 0.0\r\nset_global_assignment -name ENABLE_SMART_VOLTAGE_ID Off\r\nset_global_assignment -name IGNORE_PARTITIONS Off\r\nset_global_assignment -name AUTO_EXPORT_INCREMENTAL_COMPILATION Off\r\nset_global_assignment -name RAPID_RECOMPILE_ASSIGNMENT_CHECKING On\r\nset_global_assignment -name OUTPUT_IO_TIMING_ENDPOINT \"Near End\"\r\nset_global_assignment -name RTLV_REMOVE_FANOUT_FREE_REGISTERS On\r\nset_global_assignment -name RTLV_SIMPLIFIED_LOGIC On\r\nset_global_assignment -name RTLV_GROUP_RELATED_NODES On\r\nset_global_assignment -name RTLV_GROUP_COMB_LOGIC_IN_CLOUD Off\r\nset_global_assignment -name RTLV_GROUP_COMB_LOGIC_IN_CLOUD_TMV Off\r\nset_global_assignment -name RTLV_GROUP_RELATED_NODES_TMV On\r\nset_global_assignment -name EQC_CONSTANT_DFF_DETECTION On\r\nset_global_assignment -name EQC_DUPLICATE_DFF_DETECTION On\r\nset_global_assignment -name EQC_BBOX_MERGE On\r\nset_global_assignment -name EQC_LVDS_MERGE On\r\nset_global_assignment -name EQC_RAM_UNMERGING On\r\nset_global_assignment -name EQC_DFF_SS_EMULATION On\r\nset_global_assignment -name EQC_RAM_REGISTER_UNPACK On\r\nset_global_assignment -name EQC_MAC_REGISTER_UNPACK On\r\nset_global_assignment -name EQC_SET_PARTITION_BB_TO_VCC_GND On\r\nset_global_assignment -name EQC_STRUCTURE_MATCHING On\r\nset_global_assignment -name EQC_AUTO_BREAK_CONE On\r\nset_global_assignment -name EQC_POWER_UP_COMPARE Off\r\nset_global_assignment -name EQC_AUTO_COMP_LOOP_CUT On\r\nset_global_assignment -name EQC_AUTO_INVERSION On\r\nset_global_assignment -name EQC_AUTO_TERMINATE On\r\nset_global_assignment -name EQC_SUB_CONE_REPORT Off\r\nset_global_assignment -name EQC_RENAMING_RULES On\r\nset_global_assignment -name EQC_PARAMETER_CHECK On\r\nset_global_assignment -name EQC_AUTO_PORTSWAP On\r\nset_global_assignment -name EQC_DETECT_DONT_CARES On\r\nset_global_assignment -name EQC_SHOW_ALL_MAPPED_POINTS Off\r\nset_global_assignment -name EDA_INPUT_GND_NAME GND -section_id ?\r\nset_global_assignment -name EDA_INPUT_VCC_NAME VCC -section_id ?\r\nset_global_assignment -name EDA_INPUT_DATA_FORMAT NONE -section_id ?\r\nset_global_assignment -name EDA_SHOW_LMF_MAPPING_MESSAGES Off -section_id ?\r\nset_global_assignment -name EDA_RUN_TOOL_AUTOMATICALLY Off -section_id ?\r\nset_global_assignment -name RESYNTHESIS_RETIMING FULL -section_id ?\r\nset_global_assignment -name RESYNTHESIS_OPTIMIZATION_EFFORT Normal -section_id ?\r\nset_global_assignment -name RESYNTHESIS_PHYSICAL_SYNTHESIS Normal -section_id ?\r\nset_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS On -section_id ?\r\nset_global_assignment -name VCCPD_VOLTAGE 3.3V -section_id ?\r\nset_global_assignment -name EDA_USER_COMPILED_SIMULATION_LIBRARY_DIRECTORY \"<None>\" -section_id ?\r\nset_global_assignment -name EDA_LAUNCH_CMD_LINE_TOOL Off -section_id ?\r\nset_global_assignment -name EDA_ENABLE_IPUTF_MODE On -section_id ?\r\nset_global_assignment -name EDA_NATIVELINK_PORTABLE_FILE_PATHS Off -section_id ?\r\nset_global_assignment -name EDA_NATIVELINK_GENERATE_SCRIPT_ONLY Off -section_id ?\r\nset_global_assignment -name EDA_WAIT_FOR_GUI_TOOL_COMPLETION Off -section_id ?\r\nset_global_assignment -name EDA_TRUNCATE_LONG_HIERARCHY_PATHS Off -section_id ?\r\nset_global_assignment -name EDA_FLATTEN_BUSES Off -section_id ?\r\nset_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS Off -section_id ?\r\nset_global_assignment -name EDA_GENERATE_TIMING_CLOSURE_DATA Off -section_id ?\r\nset_global_assignment -name EDA_GENERATE_POWER_INPUT_FILE Off -section_id ?\r\nset_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS NOT_USED -section_id ?\r\nset_global_assignment -name EDA_RTL_SIM_MODE NOT_USED -section_id ?\r\nset_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY OFF -section_id ?\r\nset_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST Off -section_id ?\r\nset_global_assignment -name EDA_WRITE_DEVICE_CONTROL_PORTS Off -section_id ?\r\nset_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_TCL_FILE Off -section_id ?\r\nset_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE \"All Except Combinational Logic Element Outputs\" -section_id ?\r\nset_global_assignment -name EDA_ENABLE_GLITCH_FILTERING Off -section_id ?\r\nset_global_assignment -name EDA_WRITE_NODES_FOR_POWER_ESTIMATION OFF -section_id ?\r\nset_global_assignment -name EDA_SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off -section_id ?\r\nset_global_assignment -name EDA_WRITER_DONT_WRITE_TOP_ENTITY Off -section_id ?\r\nset_global_assignment -name EDA_VHDL_ARCH_NAME structure -section_id ?\r\nset_global_assignment -name EDA_IBIS_MODEL_SELECTOR Off -section_id ?\r\nset_global_assignment -name EDA_IBIS_MUTUAL_COUPLING Off -section_id ?\r\nset_global_assignment -name EDA_FORMAL_VERIFICATION_ALLOW_RETIMING Off -section_id ?\r\nset_global_assignment -name EDA_BOARD_BOUNDARY_SCAN_OPERATION PRE_CONFIG -section_id ?\r\nset_global_assignment -name EDA_GENERATE_RTL_SIMULATION_COMMAND_SCRIPT Off -section_id ?\r\nset_global_assignment -name EDA_GENERATE_GATE_LEVEL_SIMULATION_COMMAND_SCRIPT Off -section_id ?\r\nset_global_assignment -name EDA_IBIS_SPECIFICATION_VERSION 4p1 -section_id ?\r\nset_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_OFFSET 0ns -section_id ?\r\nset_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_DUTY_CYCLE 50 -section_id ?\r\nset_global_assignment -name APEX20K_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name MAX7K_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name MERCURY_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name FLEX6K_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name FLEX10K_CLIQUE_TYPE LAB -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_PRESERVE_HIGH_SPEED_TILES On -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IGNORE_SOURCE_FILE_CHANGES Off -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_ALWAYS_USE_QXP_NETLIST Off -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IMPORT_ASSIGNMENTS On -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IMPORT_EXISTING_ASSIGNMENTS REPLACE_CONFLICTING -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IMPORT_EXISTING_LOGICLOCK_REGIONS UPDATE_CONFLICTING -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_IMPORT_PROMOTE_ASSIGNMENTS On -section_id ? -entity ?\r\nset_global_assignment -name ALLOW_MULTIPLE_PERSONAS Off -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_ASD_REGION_ID 1 -section_id ? -entity ?\r\nset_global_assignment -name CROSS_BOUNDARY_OPTIMIZATIONS Off -section_id ? -entity ?\r\nset_global_assignment -name PROPAGATE_CONSTANTS_ON_INPUTS On -section_id ? -entity ?\r\nset_global_assignment -name PROPAGATE_INVERSIONS_ON_INPUTS On -section_id ? -entity ?\r\nset_global_assignment -name REMOVE_LOGIC_ON_UNCONNECTED_OUTPUTS On -section_id ? -entity ?\r\nset_global_assignment -name MERGE_EQUIVALENT_INPUTS On -section_id ? -entity ?\r\nset_global_assignment -name MERGE_EQUIVALENT_BIDIRS On -section_id ? -entity ?\r\nset_global_assignment -name ABSORB_PATHS_FROM_OUTPUTS_TO_INPUTS On -section_id ? -entity ?\r\nset_global_assignment -name PARTITION_ENABLE_STRICT_PRESERVATION Off -section_id ? -entity ?\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/serial1_nativelink_simulation.rpt",
    "content": "Info: Start Nativelink Simulation process\r\n\r\n========= EDA Simulation Settings =====================\r\n\r\nSim Mode              :  RTL\r\nFamily                :  max10\r\nQuartus root          :  c:/altera/15.0/quartus/bin64/\r\nQuartus sim root      :  c:/altera/15.0/quartus/eda/sim_lib\r\nSimulation Tool       :  modelsim-altera\r\nSimulation Language   :  verilog\r\nSimulation Mode       :  GUI\r\nSim Output File       :  \r\nSim SDF file          :  \r\nSim dir               :  simulation\\modelsim\r\n\r\n=======================================================\r\n\r\nInfo: Starting NativeLink simulation with ModelSim-Altera software\r\nSourced NativeLink script c:/altera/15.0/quartus/common/tcl/internal/nativelink/modelsim.tcl\r\nWarning: File serial1_run_msim_rtl_verilog.do already exists - backing up current file as serial1_run_msim_rtl_verilog.do.bak10\r\nInfo: Spawning ModelSim-Altera Simulation software \r\n"
  },
  {
    "path": "max10_adc_firmware_v8/serialprocessor.v",
    "content": "// from http://www.sparxeng.com/blog/software/communicating-with-your-cyclone-ii-fpga-over-serial-port-part-3-number-crunching\r\n\r\nmodule processor(clk, rxReady, rxData, txBusy, txStart, txData, readdata, get_ext_data, ext_data_ready, wraddress_triggerpoint, rden, rdaddress, ram_output1, ram_output2, ram_output3, ram_output4,\r\nnewcomdata,comdata,spare1,spare2,spare3,serial_passthrough,master_clock, imthelast,imthefirst,rollingtrigger,trigDebug, \r\nadcdata,adcready,getadcdata,getadcadr,adcvalid,adcreset,adcramdata,writesamp,writeadc,adctestout,\r\ntriggerpoint,downsample, screendata,screenwren,screenaddr,screenreset,trigthresh,trigchannels,triggertype,triggertot,\r\nSPIsend,SPIsenddata,delaycounter,carrycounter,usb_siwu,SPIstate,offset,gainsw,do_usb,\r\ni2c_ena,i2c_addr,i2c_rw,i2c_datawr,i2c_datard,i2c_busy,i2c_ackerror,   usb_clk60,usb_dataio,usb_txe_busy,usb_wr,\r\nrdaddress2,trigthresh2, debug1,debug2,chip_id, highres,  use_ext_trig,  digital_buffer1, nsmp);\r\n   input clk;\r\n\tinput[7:0] rxData;\r\n   input rxReady;\r\n   input txBusy;\r\n   output reg txStart;\r\n   output reg[7:0] txData;\r\n   output reg[7:0] readdata;//first byte we got\r\n   output reg spare1,spare2,spare3;\r\n\treg led1,led2,led3,led4,led5,led6,led7,led8;\r\n  \toutput reg get_ext_data;\r\n\tinput ext_data_ready;\r\n\tparameter ram_width=12;//9 is 512 samples\r\n\tinput wire[ram_width-1:0] wraddress_triggerpoint;\r\n\toutput reg [ram_width-1:0] rdaddress;\r\n\toutput reg [ram_width-1:0] rdaddress2;\r\n\toutput reg [ram_width-1:0] triggerpoint;\r\n\toutput reg rden;\r\n\tinput wire [7:0] ram_output1;\r\n\tinput wire [7:0] ram_output2;\r\n\tinput wire [7:0] ram_output3;\r\n\tinput wire [7:0] ram_output4;\r\n\tinput wire [7:0] digital_buffer1;\r\n\toutput reg serial_passthrough;\r\n\toutput reg [1:0] master_clock;\r\n\toutput reg[7:0] comdata;\r\n\toutput reg newcomdata;\r\n\toutput reg imthelast; // to remember if we're the last one in the chain\r\n\toutput wire imthefirst; // to remember if we're the last one in the chain\r\n\toutput reg rollingtrigger;\r\n\tinput trigDebug;\r\n\tinput [11:0] adcdata;\r\n\tinput adcready;\r\n\tinput adcvalid;\r\n\toutput reg getadcdata;\r\n\toutput reg [4:0] getadcadr;\r\n\toutput reg adcreset;\r\n\toutput reg [11:0] writesamp;//max of 4096 samples\r\n\toutput reg writeadc;\r\n\toutput reg [11:0] adctestout;\r\n\toutput reg [7:0] downsample;\r\n\toutput reg [7:0] screendata;\r\n\toutput reg screenwren=0;\r\n\toutput reg [9:0] screenaddr = 10'd0;\r\n\toutput reg screenreset=0;\r\n\toutput reg [7:0] trigthresh = 8'h80, trigthresh2=8'hff; // the normal and high trigger thresholds\r\n\toutput reg [3:0] trigchannels = 4'b1111;\r\n\toutput reg [3:0] triggertype = 4'b0001;//rising edge on, falling edge off, other off\r\n   output reg [ram_width:0] triggertot;\r\n\toutput reg [15:0] SPIsenddata;//the bits to send\r\n\toutput reg SPIsend;//start sending\r\n\tinput [7:0] delaycounter;\r\n\tinput [7:0] carrycounter;\r\n\tinput [3:0] SPIstate;\r\n\toutput wire[3:0] offset;\r\n\toutput reg[3:0] gainsw;\r\n\treg[3:0] oversamp;\r\n\toutput reg debug1,debug2;\r\n\tinput [63:0] chip_id;\r\n\toutput reg highres=0;\r\n\toutput reg use_ext_trig=0;\r\n\t\r\n\toutput reg i2c_ena;\r\n\toutput reg [6:0] i2c_addr;\r\n\toutput reg i2c_rw;\r\n\toutput reg [7:0] i2c_datawr;\r\n\tinput [7:0] i2c_datard;\r\n\tinput i2c_busy;\r\n\tinput i2c_ackerror;\r\n\treg [7:0] i2cdata[8];//up to 8 bytes of data to send\r\n\treg [3:0] i2c_datacounttosend,i2c_datacount;\r\n\treg i2cgo=0;\r\n\treg i2cdoread=0;\r\n\r\n  localparam READ=0, SOLVING=1, WAITING=2, WRITE_EXT1=3, WRITE_EXT2=4, WAIT_ADC1=5, WAIT_ADC2=6, WRITE_BYTE1=7, WRITE_BYTE2=8, READMORE=9, \r\n\tWRITE1=10, WRITE2=11,SPIWAIT=12,I2CWAIT=13,I2CSEND1=14,I2CSEND2=15, //WRITEUSB1=16,WRITEUSB2=17, \r\n\tLOCKIN1=18,LOCKIN2=19,LOCKIN3=20,LOCKINWRITE1=21,LOCKINWRITE2=22,\r\n\tWRITE_USB_EXT1=33, WRITE_USB_EXT2=34, WRITE_USB_EXT3=35, WRITE_USB_EXT4=36, WRITE_USB_EXT5=37;\r\n  integer state,i2cstate;\r\n\r\n  reg [7:0] myid;\r\n  assign imthefirst = (myid==0);\r\n  reg [7:0] extradata[10];//to store command extra data, like arguemnts (up to 10 bytes)\r\n  reg [ram_width+2:0] SendCount=0;\r\n  reg [2:0] blockstosend=4; // will be 4 for normal, but 5 (or more) for sending logic analyzer stuff etc.\r\n  integer nsamp = 6;\r\n  input [11:0] adcramdata;\r\n  reg writebyte;//whether we're sending the first or second byte (since it's 12 bits from the Max10 ADC)\r\n  integer bytesread, byteswanted;\r\n  reg thecounterbit, thecounterbitlockin;\r\n  integer clockbitstowait=5, clockbitstowaitlockin=3; //wait 2^clockbitstowait (8?) ticks before sending each data byte\r\n  reg [3:0] sendincrement = 0; //skip 2**sendincrement bytes each time\r\n  output reg [ram_width-1:0] nsmp = 0; // samplestosend\r\n  reg [7:0] chanforscreen=0;\r\n  reg autorearm=0;\r\n  integer thecounter=0, timeoutcounter=0, serialdelaytimer=0,serialdelaytimerwait=0;\r\n  \r\n  reg [7:0] usb2counter;\r\n  output reg do_usb=0;\r\n  input usb_clk60;\r\n  output reg [7:0] usb_dataio;\r\n  input usb_txe_busy;\r\n  output reg usb_wr, usb_siwu;\r\n  reg usb_txe_not_busy;\r\n  \r\n  //TODO: use memory bits for this, not register space??\r\n  reg [5:0] screencolumndata [128]; //all the screen data, 128 columns of (8 rows of 8 dots)\r\n  \r\n  //For writing out data in WRITE1,2\r\n  integer ioCount, ioCountToSend;\r\n  reg[7:0] data[0:15];\r\n  \r\n  //For lockin calculations\r\n  reg [7:0] numlockinbytes=16;//number of bytes of info to send for lockin info\r\n  integer lockinresult1;\r\n  integer lockinresult2;\r\n  reg [15:0] lockinnumtoshift = 0;\r\n  integer chan2mean, chan3mean;\r\n  reg calcmeans;\r\n  \r\n  initial begin\r\n    state<=READ;\r\n\t i2cstate<=READ;\r\n\t myid<=200;\r\n\t master_clock<=2'b00;//start as my own master\r\n\t imthelast<=0;//probably not last\r\n\t rollingtrigger<=1;\r\n\t triggerpoint<=(2**(ram_width-2));// 1/4 of the screen\r\n\t downsample<=1;\r\n\t serial_passthrough<=0;\r\n\t usb_siwu<=1;\r\n\t gainsw<=4'b0000;//1 is for 1k resistor (gain 2), 0 is for 100 Ohm resistor (gain .2)\r\n\t oversamp<=4'b0011;//1 is for _no_ oversampling (and only matters for bits 0 and 1)\r\n  \t debug1<=0; debug2<=0;\r\n\t spare1<=0;\r\n\t spare2<=0;\r\n\t spare3<=0;\r\n\t led4<=1; //on\r\n\t led5<=0; //off\r\n\t led6<=0; //off\r\n\t led7<=0; //off\r\n\t led8<=0; //off\r\n  end\r\n  \r\n  //set the LEDs to indicate my ID\r\n  always @(posedge clk) begin\r\n\tthecounter<=thecounter+1;\r\n\tusb_txe_not_busy <= ~usb_txe_busy;\r\n\tdebug1 <= usb_txe_not_busy;\r\n   if ( imthelast & thecounter[26]==1'b1 ) begin //flash every few seconds\r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=0;//all off\r\n\tend\r\n\t//else if (txStart) begin\r\n\t//else if (trigDebug) begin\t\t\r\n\t\t//led1<=0;\t\tled2<=0;\t\tled3<=0;//all off\r\n\t//end\r\n\telse if (myid==0) begin\t   \r\n\t\tled1<=1;\t\tled2<=1;\t\tled3<=1;//all on\r\n\tend\r\n\telse if (myid==1) begin\t   \r\n\t\tled1<=0;\t\tled2<=1;\t\tled3<=1;//binary 1\r\n\tend\r\n\telse if (myid==2) begin\t   \r\n\t\tled1<=1;\t\tled2<=0;\t\tled3<=1;//binary 2\r\n\tend\r\n\telse if (myid==3) begin\t   \r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=1;//binary 3\r\n\tend\r\n\telse if (myid==4) begin\t   \r\n\t\tled1<=1;\t\tled2<=1;\t\tled3<=0;//binary 4\r\n\tend\r\n\telse begin\t\t\r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=0;//all off\r\n\tend\r\n  end\r\n  reg oldled1,oldled2,oldled3,oldled4,oldled5,oldled6,oldled7,oldled8;\r\n  \r\n//\treg [7:0] PWMoffset0 = 58; //22.7% *256;\r\n//\treg [7:0] PWMoffset1 = 58; //22.7% *256;\r\n//\treg [7:0] PWMoffset2 = 58; //22.7% *256;\r\n//\treg [7:0] PWMoffset3 = 58; //22.7% *256;\r\n//\treg [7:0] pwmcounter;\r\n//\t//For 1k and 0.1uF, freq=1.6kHz\r\n//\t//For 1k and 1uF, freq=160Hz\r\n//\tinteger PWMratecounter=0;\r\n//\tinteger PWMrate=2;//how fast we count the pwm clock\r\n//   always @(posedge clk) begin\r\n//\t\tif (PWMratecounter>=PWMrate) begin\r\n//\t\t\tpwmcounter <= pwmcounter + 1'b1;  // free-running counter\r\n//\t\t\tPWMratecounter=0;\r\n//\t\tend\r\n//\t\telse PWMratecounter=PWMratecounter+1;\r\n//\tend\r\n//\tassign offset[0] = (PWMoffset0 > pwmcounter);  // comparators\r\n//\tassign offset[1] = (PWMoffset1 > pwmcounter);  // comparators\r\n//\tassign offset[2] = (PWMoffset2 > pwmcounter);  // comparators\r\n//\tassign offset[3] = (PWMoffset3 > pwmcounter);  // comparators\r\n  \r\n  always @(posedge clk) begin\r\n    case (state)\r\n\t \r\n      READ: begin\r\n\t\t  get_ext_data<=0;\r\n\t\t  adcreset<=1;\r\n\t\t  txStart<=0;\r\n\t\t  getadcdata<=0;\r\n\t\t  bytesread<=0;\r\n\t\t  byteswanted<=0;\r\n\t\t  newcomdata<=0;\r\n\t\t  SPIsend<=0;\r\n\t\t  i2cgo=0;\r\n\t\t  usb_wr<=1;\r\n        ioCount = 0;\r\n        if (rxReady) begin\r\n\t\t\t readdata = rxData;\r\n          state = SOLVING;\r\n        end\r\n\t\t  if (oldled1!=led1 || oldled2!=led2 || oldled3!=led3 || oldled4!=led4 || oldled5!=led5 || oldled6!=led6 || oldled7!=led7 || oldled8!=led8) begin\r\n\t\t\t oldled1=led1; oldled2=led2; oldled3=led3; oldled4=led4;\r\n\t\t\t oldled5=led5; oldled6=led6; oldled7=led7; oldled8=led8;\r\n\t\t\t //now send to i2c\r\n\t\t\t i2c_datacounttosend=2;//how many bytes of info to send (not counting address)\r\n\t\t\t i2c_addr=8'h21; // the second mcp io expander\r\n\t\t\t i2cdata[0]=8'h12; // port a\r\n\t\t\t i2cdata[1][0]=led1; i2cdata[1][1]=led2; i2cdata[1][2]=led3; i2cdata[1][3]=led4; // set the low 4 bits to be correct for the leds\r\n\t\t\t i2cdata[1][4]=led5; i2cdata[1][5]=led6; i2cdata[1][6]=led7; i2cdata[1][7]=led8; // set the high 4 bits to be correct for the leds\r\n\t\t\t i2cdata[2]=0; // not used for mcp io expanders\r\n\t\t\t if (i2cstate==READ) begin // if it's busy, we'll do nothing, oh well\r\n\t\t\t   i2cdoread = 0;\r\n\t\t\t\ti2cgo=1;\r\n\t\t\t end\r\n\t\t  end\r\n      end\r\n\t\t\r\n\t\tREADMORE: begin\r\n\t\t\tnewcomdata=0;\r\n\t\t\tif (rxReady) begin\r\n\t\t\t\textradata[bytesread] = rxData;\r\n\t\t\t\tcomdata=rxData;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tbytesread = bytesread+1;\r\n\t\t\t\tif (bytesread>=byteswanted) state=SOLVING;\r\n\t\t\tend\r\n\t\tend\r\n\r\n      SOLVING: begin\r\n\t\t\tif (readdata < 10) begin // got character \"0-9\"\r\n\t\t\t\tmyid=readdata;//remember my ID\r\n\t\t\t\tif (readdata==0) begin\r\n\t\t\t\t\tmaster_clock=2'b00; //remain my own master\r\n\t\t\t\tend\r\n\t\t\t\telse master_clock=2'b01; //now a slave!\r\n\t\t\t\tcomdata=(readdata+1); // give the next one an ID one larger\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (readdata > 9 && readdata < 20) begin // got character \"10-19\"\r\n\t\t\t\tif (myid==(readdata-10)) begin\r\n\t\t\t\t\t//read me out\r\n\t\t\t\t\tserial_passthrough=0;\r\n\t\t\t\t\ttimeoutcounter=0;//start the clock\r\n\t\t\t\t\tstate=WAITING;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\t//pass it on, and set serial to \"passthrough mode\"\r\n\t\t\t\t\tserial_passthrough=1;\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata > 19 && readdata < 30) begin // got character \"20-29\"\r\n\t\t\t\tif (myid==(readdata-20)) imthelast=1; // I'm the last one\r\n\t\t\t\telse imthelast=0;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (readdata > 29 && readdata < 40) begin // got character \"30-39\"\r\n\t\t\t\tif (myid==(readdata-30)) begin\r\n\t\t\t\t\t//make me active\r\n\t\t\t\t\tserial_passthrough=0;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\t//pass it on, and set serial to \"passthrough mode\"\r\n\t\t\t\t\tserial_passthrough=1;\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tend\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (100==readdata) begin\r\n\t\t\t\t//tell them all to prime the trigger\r\n\t\t\t\tget_ext_data=1;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (101==readdata) begin\r\n\t\t\t\t//tell them all to roll the trigger\r\n\t\t\t\tled5=1;\r\n\t\t\t\trollingtrigger=1;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (102==readdata) begin\r\n\t\t\t\t//tell them all to not roll the trigger\r\n\t\t\t\tled5=0;\r\n\t\t\t\trollingtrigger=0;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (readdata>109 && readdata<120) begin // 110 to 119\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (readdata==119) getadcadr<=17;//send the data from the temp sensor\r\n\t\t\t\t\telse getadcadr<=(readdata-110);//send the data from adc, so 110->0 (pin AIN1), 111->1 (pin 6), up to 118->8 (pin 14)\r\n\t\t\t\t\twritesamp<=0;\r\n\t\t\t\t\tstate=WAIT_ADC1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==120) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the number of samples to read from max10 adc\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tnsamp=256*extradata[0]+extradata[1];\r\n\t\t\t\t\tif (nsamp>4095) nsamp=4095; //max of 4096 samples stored in the ram (12 bit writesamp address), and one less is needed (not sure why...)\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==121) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the trigger point\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggerpoint=256*extradata[0]+extradata[1];\r\n\t\t\t\t\tif (triggerpoint>(2**ram_width)-16) triggerpoint=(2**ram_width)-16;\r\n\t\t\t\t\telse if (triggerpoint<4) triggerpoint=4;\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==122) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the number of samples to send\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tnsmp=256*extradata[0]+extradata[1];\r\n\t\t\t\t\tif (triggerpoint>(nsmp-5)) triggerpoint=nsmp/2;\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==123) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of bytes to skip after each send, log2\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tsendincrement=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==124) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of samples to skip in the ADC, log2\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]>30) extradata[0]=30;\r\n\t\t\t\t\tdownsample=extradata[0];\r\n\t\t\t\t\tclockbitstowaitlockin = extradata[0]-2; // TODO - seems to work OK\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==125) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of clock ticks to wait between sending bytes, log2\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]>30) extradata[0]=30;\r\n\t\t\t\t\tclockbitstowait=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==126) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel to draw on the mini-display\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tchanforscreen=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (readdata==127) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the trigger threshold\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttrigthresh=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==128) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the trigger type: rising, falling, either, ...\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggertype=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==129) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the trigger time over/under threshold required\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggertot=256*extradata[0]+extradata[1];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==130) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is whether to trigger or not trigger on a given channel\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]/4 ==myid) begin //I have this channel\r\n\t\t\t\t\t\ttrigchannels[extradata[0]%4]=~trigchannels[extradata[0]%4];//invert previous value\r\n\t\t\t\t\tend\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==131) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the data to send to SPI on the ADCs\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tSPIsenddata[15:8]=extradata[0];//0 (write) and the 7 bit address\r\n\t\t\t\t\tSPIsenddata[7:0]=extradata[1];//the bits to write to that address\r\n\t\t\t\t\tSPIsenddata[15]=1'b0;//write is 0\r\n\t\t\t\t\tSPIsend=1;\r\n\t\t\t\t\tstate=SPIWAIT;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==132) begin // send the delaycounter TDC data, if I'm the board being read out\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tioCountToSend = 1;\r\n\t\t\t\t\tdata[0]=delaycounter;\r\n\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==133) begin // send the carrycounter TDC data, if I'm the board being read out\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tioCountToSend = 1;\r\n\t\t\t\t\tdata[0]=carrycounter;\r\n\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==134) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]/4 ==myid) begin //I have this channel\r\n\t\t\t\t\t\tgainsw[extradata[0]%4]=~gainsw[extradata[0]%4];//switch the gain of the channel\r\n\t\t\t\t\tend\r\n\t\t\t\t\t//now send to i2c\r\n\t\t\t\t\ti2c_datacounttosend=2;//how many bytes of info to send (not counting address)\r\n\t\t\t\t\ti2c_addr=8'h20; // the first mcp io expander\r\n\t\t\t\t\ti2cdata[0]=8'h12; // port a\r\n\t\t\t\t\ti2cdata[1][3:0]=gainsw; // set the low 4 bits to be correct for the gain\r\n\t\t\t\t\ti2cdata[1][7:4]=oversamp; // set the high 4 bits to be correct for the oversampling\r\n\t\t\t\t\ti2cdata[2]=0; // not used for mcp io expanders\r\n\t\t\t\t\tif (i2cstate==READ) begin\r\n\t\t\t\t\t\ti2cdoread = 0;\r\n\t\t\t\t\t\ti2cgo=1;\r\n\t\t\t\t\tend\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==135) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the serialdelaytimerwait\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tserialdelaytimerwait=50*(256*extradata[0]+extradata[1]); // 50 * amount given, so amount given in microseconds (20ns*50=1us) (except for the flipping clockbitstowait, so actually 2 us steps!)\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==136) begin\r\n\t\t\t\tbyteswanted=6;//wait for next bytes which are the stuff to send over i2c\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\t//i2c_addr = 7'b0100000;// 0x20 // for all 3 pins of (last 3 digits) to GND of MCP23017\r\n\t\t\t\t\t//i2c_addr = 7'b0100001;// 0x21 // for all a pin to VCC of MCP23017\r\n\t\t\t\t\t//i2c_addr = 7'b1100000;// 0x60 // for MCP4728\r\n\t\t\t\t\ti2c_datacounttosend=extradata[0];//how many bytes of info to send (not counting address)\r\n\t\t\t\t\ti2c_addr=extradata[1]; // get address to write to\r\n\t\t\t\t\ti2cdata[0]=extradata[2];\r\n\t\t\t\t\ti2cdata[1]=extradata[3];\r\n\t\t\t\t\ti2cdata[2]=extradata[4];\r\n\t\t\t\t\tif ((extradata[5]==myid || extradata[5]==200) && i2cstate==READ) begin // only pay attention if the board is broadcast (id 200) or for my id!\r\n\t\t\t\t\t\ti2cdoread = 0;\r\n\t\t\t\t\t\ti2cgo=1;\r\n\t\t\t\t\tend\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (137==readdata) begin\r\n\t\t\t\t//tell them to send over FT232H USB\r\n\t\t\t\tdo_usb=~do_usb;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (readdata==138) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the lockinnumtoshift\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tlockinnumtoshift = 256*extradata[0]+extradata[1];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (139==readdata) begin\r\n\t\t\t\t//tell them to toggle automatic rearm of the trigger\r\n\t\t\t\tautorearm=~autorearm;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (readdata==140) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the high trigger threshold (must be below this to trigger)\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttrigthresh2 = extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==141) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel to toggle oversampling for\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]/4 ==myid) begin //I have this channel\r\n\t\t\t\t\t\toversamp[extradata[0]%4]=~oversamp[extradata[0]%4];//switch the oversampling of the channel\r\n\t\t\t\t\tend\r\n\t\t\t\t\t//now send to i2c\r\n\t\t\t\t\ti2c_datacounttosend=2;//how many bytes of info to send (not counting address)\r\n\t\t\t\t\ti2c_addr=8'h20; // the first mcp io expander\r\n\t\t\t\t\ti2cdata[0]=8'h12; // port a\r\n\t\t\t\t\ti2cdata[1][3:0]=gainsw; // set the low 4 bits to be correct for the gain\r\n\t\t\t\t\ti2cdata[1][7:4]=oversamp; // set the high 4 bits to be correct for the oversampling\r\n\t\t\t\t\ti2cdata[2]=0; // not used for mcp io expanders\r\n\t\t\t\t\tif (i2cstate==READ) begin\r\n\t\t\t\t\t\ti2cdoread = 0;\r\n\t\t\t\t\t\ti2cgo=1;\r\n\t\t\t\t\tend\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\t\t\t\r\n\t\t\telse if (readdata==142) begin // send the uniqueID\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tdata[0]=chip_id[7+8*0:8*0];\r\n\t\t\t\t\tdata[1]=chip_id[7+8*1:8*1];\r\n\t\t\t\t\tdata[2]=chip_id[7+8*2:8*2];\r\n\t\t\t\t\tdata[3]=chip_id[7+8*3:8*3];\r\n\t\t\t\t\tdata[4]=chip_id[7+8*4:8*4];\r\n\t\t\t\t\tdata[5]=chip_id[7+8*5:8*5];\r\n\t\t\t\t\tdata[6]=chip_id[7+8*6:8*6];\r\n\t\t\t\t\tdata[7]=chip_id[7+8*7:8*7];\r\n\t\t\t\t\tioCountToSend = 8; // send 8 bytes\r\n\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (143==readdata) begin\r\n\t\t\t\t//tell them to toggle highres mode\r\n\t\t\t\thighres=~highres;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (144==readdata) begin\r\n\t\t\t\t//tell them to toggle using ext_trig_in\r\n\t\t\t\tuse_ext_trig=~use_ext_trig;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (readdata==145) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of blocks to send out (for fast adc data, digitial logic analyzer data, etc.)\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tblockstosend = extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==146) begin // send out a byte read from i2c\r\n\t\t\t\tbyteswanted=3;//wait for next bytes which are the chip/address to read from and the board id (or all)\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ti2c_addr=extradata[0]; // get chip to read from\r\n\t\t\t\t\ti2c_datacounttosend=2;\r\n\t\t\t\t\ti2cdata[0]=extradata[1]; // get address to read from\r\n\t\t\t\t\ti2cdata[1]=0; // dummy\r\n\t\t\t\t\tif ((extradata[2]==myid || extradata[2]==200) && i2cstate==READ) begin // only pay attention if the board is broadcast (id 200) or for my id!\r\n\t\t\t\t\t\ti2cdoread = 1;\r\n\t\t\t\t\t\ti2cgo=1;\r\n\t\t\t\t\t\t//send message with read info (note - it won't be correct yet, since it takes time to read, so check back a little later!)\r\n\t\t\t\t\t\tioCountToSend = 1;\r\n\t\t\t\t\t\tdata[0] = i2c_datard;\r\n\t\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\t\tend\r\n\t\t\t\t\telse state=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==147) begin // send the firmware version\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tioCountToSend = 1;\r\n\t\t\t\t\tdata[0]=5; // this is the firmware version\r\n\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse state=READ; // if we got some other command, just ignore it\r\n      end\r\n\t\t\r\n\t\tSPIWAIT: begin\r\n\t\t\tnewcomdata<=0; //set this back, to just send out data once\r\n\t\t\t//wait for SPIstate from oscillo to be nearly done\r\n\t\t\tif (SPIstate==3) begin \r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\tend\r\n\t\t\r\n\t\tWAITING: begin\r\n\t\t\ttimeoutcounter=timeoutcounter+1;\r\n\t\t\tif (ext_data_ready) begin // can read out\r\n\t\t\t\tSendCount= 0;\r\n\t\t\t\trdaddress = wraddress_triggerpoint - triggerpoint;// - 1;\r\n\t\t\t\trdaddress2 = rdaddress;\r\n\t\t\t\tthecounterbit=thecounter[clockbitstowait];\r\n\t\t\t\tthecounterbitlockin=thecounter[clockbitstowaitlockin];\r\n\t\t\t\tif (lockinnumtoshift>0) begin\r\n\t\t\t\t\tlockinresult1=0;\r\n\t\t\t\t\tlockinresult2=0;\r\n\t\t\t\t\tchan2mean=0;\r\n\t\t\t\t\tchan3mean=0;\r\n\t\t\t\t\tcalcmeans=1;\r\n\t\t\t\t\tstate=LOCKIN1;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (do_usb) state=WRITE_USB_EXT1;\r\n\t\t\t\t\telse state=WRITE_EXT1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\tif ( timeoutcounter > 100000000 ) begin\r\n\t\t\t\tstate=READ;//timeout!\r\n\t\t\t\t//ioCountToSend = 1;\r\n\t\t\t\t//data[0] = 8'hfb;//send message indicating timeout\r\n\t\t\t\t//state=WRITE1;\r\n\t\t\tend\r\n\t\tend\r\n\t\tLOCKIN1: begin\r\n\t\t\trden = 1;\r\n\t\t\tif ( (thecounter[clockbitstowaitlockin]!=thecounterbitlockin) ) begin\r\n\t\t\tcase(SendCount[ram_width+1:ram_width]) // we go through the samples 4 times\r\n\t\t\t\t0: begin\r\n\t\t\t\t\t// first time through we calculate the means\r\n\t\t\t\t\tchan2mean = chan2mean + ram_output3;\r\n\t\t\t\t\tchan3mean = chan3mean + ram_output4;\r\n\t\t\t\tend\r\n\t\t\t\t1: begin\r\n\t\t\t\t\tif (calcmeans) begin // do this just once - divide by the number of samples to get the average\r\n\t\t\t\t\t\tcalcmeans=0;\r\n\t\t\t\t\t\tchan2mean = chan2mean/4096;\r\n\t\t\t\t\t\tchan3mean = chan3mean/4096;\r\n\t\t\t\t\tend\r\n\t\t\t\t\t// next time through we calculate c2 * offset c3\r\n\t\t\t\t\t// shift rdaddress2 and then accumulate\r\n\t\t\t\t\tif (SendCount[ram_width-1:0]>lockinnumtoshift && SendCount[ram_width-1:0]<(4096-lockinnumtoshift)) begin\r\n\t\t\t\t\t\tlockinresult2 = lockinresult2 + (ram_output3-chan2mean)*(ram_output4-chan3mean);\t// accumulate the vector of chanel 2 * shifted channel 3\r\n\t\t\t\t\tend\r\n\t\t\t\tend\r\n\t\t\t\t2: begin\r\n\t\t\t\t\t// next time through we calculate c2*c3\r\n\t\t\t\t\tif (SendCount[ram_width-1:0]>lockinnumtoshift && SendCount[ram_width-1:0]<(4096-lockinnumtoshift)) begin\r\n\t\t\t\t\t\tlockinresult1 = lockinresult1 + (ram_output3-chan2mean)*(ram_output4-chan3mean);\t// accumulate the vector of chanel 2 * channel 3\t\r\n\t\t\t\t\tend\r\n\t\t\t\tend\r\n\t\t\t\t3: begin\r\n\t\t\t\t\t\t\r\n\t\t\t\tend\r\n\t\t\tendcase\t\t\t\r\n\t\t\tSendCount = SendCount + 1;\r\n\t\t\trdaddress = rdaddress + 1;\r\n\t\t\tif (SendCount[ram_width+1:ram_width]==1) rdaddress2=rdaddress-lockinnumtoshift;\r\n\t\t\telse rdaddress2=rdaddress;\r\n\t\t\tstate=LOCKIN2;\r\n\t\t\tend // the counter\r\n\t\tend\r\n\t\tLOCKIN2: begin\t\r\n\t\t\tstate=LOCKIN3;\r\n\t\tend\r\n\t\tLOCKIN3: begin\r\n\t\t\tif ( (thecounter[clockbitstowaitlockin]==thecounterbitlockin) ) begin\r\n\t\t\tif(SendCount[ram_width+1:0]==0) begin // we're done\r\n\t\t\t\tioCount = 0;\r\n\t\t\t\tSendCount = 0; // have to reset that top bit\r\n\t\t\t\tstate=LOCKINWRITE1;\r\n\t\t\tend\r\n\t\t\telse begin\r\n\t\t\t\tstate=LOCKIN1;\r\n\t\t\tend\r\n\t\t\tend // the counter\r\n\t\tend\r\n\t\tLOCKINWRITE1: begin\r\n       if (!txBusy) begin\r\n          if (ioCount==0) txData = lockinresult1[7+8*0:0+8*0];\r\n          else if (ioCount==1) txData = lockinresult1[7+8*1:0+8*1];\r\n          else if (ioCount==2) txData = lockinresult1[7+8*2:0+8*2];\r\n          else if (ioCount==3) txData = lockinresult1[7+8*3:0+8*3];\r\n          else if (ioCount==4) txData = lockinresult2[7+8*0:0+8*0];\r\n          else if (ioCount==5) txData = lockinresult2[7+8*1:0+8*1];\r\n          else if (ioCount==6) txData = lockinresult2[7+8*2:0+8*2];\r\n          else if (ioCount==7) txData = lockinresult2[7+8*3:0+8*3];\t\t\t \r\n\t\t\t else if (ioCount==8) txData = chan2mean[7+8*0:0+8*0];\r\n          else if (ioCount==9) txData = chan2mean[7+8*1:0+8*1];\r\n          else if (ioCount==10) txData = chan2mean[7+8*2:0+8*2];\r\n          else if (ioCount==11) txData = chan2mean[7+8*3:0+8*3];\r\n\t\t\t else if (ioCount==12) txData = chan3mean[7+8*0:0+8*0];\r\n          else if (ioCount==13) txData = chan3mean[7+8*1:0+8*1];\r\n          else if (ioCount==14) txData = chan3mean[7+8*2:0+8*2];\r\n          else if (ioCount==15) txData = chan3mean[7+8*3:0+8*3];\r\n\t\t\t else txData = 0;\r\n          txStart = 1;\r\n          state = LOCKINWRITE2;\r\n        end\r\n      end\r\n      LOCKINWRITE2: begin\r\n        txStart = 0;\r\n        if (ioCount < numlockinbytes-1) begin\r\n          ioCount = ioCount + 1;\r\n          state = LOCKINWRITE1;\r\n        end\r\n\t\t  else begin\r\n\t\t\t\trdaddress = wraddress_triggerpoint - triggerpoint;// - 1;\r\n\t\t\t\trdaddress2 = rdaddress;\r\n\t\t\t\tthecounterbit=thecounter[clockbitstowait];\r\n\t\t\t\tif (do_usb) state=WRITE_USB_EXT1;\r\n\t\t\t\telse state=WRITE_EXT1;\r\n        end\r\n      end\r\n\t\tWRITE_EXT1: begin\r\n\t\t\ttimeoutcounter=timeoutcounter+1;\r\n\t\t\trden = 1;\r\n\t\t\t//rotate through the outputs\r\n\t\t\tcase(SendCount[ram_width+2:ram_width])\r\n\t\t\t0: txData<=ram_output1;\r\n\t\t\t1: txData<=ram_output2;\r\n\t\t\t2: txData<=ram_output3;\r\n\t\t\t3: txData<=ram_output4;\r\n\t\t\t4: txData<=digital_buffer1; // the digital logic analyzer buffer\r\n\t\t\tendcase\r\n\t\t\tif( (!txBusy) && (thecounter[clockbitstowait]!=thecounterbit)) begin // wait a few clock cycles\t\t\t\t\r\n\t\t\t\ttxStart<= 1;\t\t\t\t\r\n\t\t\t\tSendCount = SendCount + (2**sendincrement);\r\n\t\t\t\trdaddress = rdaddress + (2**sendincrement);\r\n\t\t\t\trdaddress2 = rdaddress;\r\n\t\t\t\tif (nsmp>0 && SendCount[ram_width-1:0]>=nsmp) begin\r\n\t\t\t\t\tSendCount[ram_width-1:0]=0;\r\n\t\t\t\t\tSendCount[ram_width+2:ram_width] = (SendCount[ram_width+2:ram_width] + 1);\r\n\t\t\t\t\trdaddress = wraddress_triggerpoint - triggerpoint;// - 1;\r\n\t\t\t\t\trdaddress2 = rdaddress;\r\n\t\t\t\tend\r\n\t\t\t\tstate=WRITE_EXT2;\r\n\t\t\tend\r\n\t\t\tif ( timeoutcounter > 100000000 ) begin\r\n\t\t\t\trden = 0;\r\n\t\t\t\tstate=READ;//timeout!\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_EXT2: begin\r\n\t\t\tif( thecounter[clockbitstowait]==thecounterbit ) begin\r\n\t\t\t\ttxStart<= 0;\t\t\t\r\n\t\t\t\tif(SendCount[ram_width+2:ram_width]==blockstosend) begin // it's 5 (or more) blocks including the logic analyzer info\r\n\t\t\t\t\trden = 0;\r\n\t\t\t\t\tif (autorearm) begin\r\n\t\t\t\t\t\t//tell them all to prime the trigger\r\n\t\t\t\t\t\tget_ext_data=1;\r\n\t\t\t\t\tend\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\t\t\t\t\t\r\n\t\t\t\t\tif(SendCount[4:0]==0 && serialdelaytimer<serialdelaytimerwait) begin // every 32 bytes, 50000 is 1 ms\r\n\t\t\t\t\t\tserialdelaytimer=serialdelaytimer+1;\r\n\t\t\t\t\tend\r\n\t\t\t\t\telse begin\r\n\t\t\t\t\t\tif ( (rdaddress- wraddress_triggerpoint-64)>=0 && (rdaddress-wraddress_triggerpoint+64)<128 && (!SendCount[ram_width+2]) ) begin //update display // ignore logic analyzer info\r\n\t\t\t\t\t\t\tif (SendCount[ram_width+1:ram_width]==chanforscreen) screencolumndata[rdaddress - wraddress_triggerpoint - 64]=(63-txData[7:2]);//store most significant 6 bits\r\n\t\t\t\t\t\t\tscreenwren = 1;\r\n\t\t\t\t\t\tend\r\n\t\t\t\t\t\tserialdelaytimer=0;\r\n\t\t\t\t\t\tstate=WRITE_EXT1;\r\n\t\t\t\t\tend\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\tend\r\n\t\t\r\n\t\tWRITE_USB_EXT1: begin\r\n\t\t\tif (usb_txe_not_busy) begin\r\n\t\t\t\tthecounterbit=thecounter[clockbitstowait];\r\n\t\t\t\tusb2counter<=0;\r\n\t\t\t\tstate=WRITE_USB_EXT2;\r\n\t\t\tend\r\n\t\t\tdebug2<=1;\r\n\t\t\trden = 1;\r\n\t\tend\r\n\t\tWRITE_USB_EXT2: begin\r\n\t\t\tdebug2<=0;\r\n\t\t\tusb2counter<=usb2counter+1;\r\n\t\t\t//rotate through the outputs\r\n\t\t\tcase(SendCount[ram_width+2:ram_width])\r\n\t\t\t\t0: usb_dataio<=ram_output1;\r\n\t\t\t\t1: usb_dataio<=ram_output2;\r\n\t\t\t\t2: usb_dataio<=ram_output3;\r\n\t\t\t\t3: usb_dataio<=ram_output4;\r\n\t\t\t\t4: usb_dataio<=digital_buffer1; // the digital logic analyzer buffer\r\n\t\t\tendcase\r\n\t\t\tif( (usb2counter>clockbitstowait) && (thecounter[clockbitstowait]!=thecounterbit)) begin // wait a few clock cycles (usb2counter was set to 0 in last state)\r\n\t\t\t\tSendCount = SendCount + (2**sendincrement);\r\n\t\t\t\trdaddress = rdaddress + (2**sendincrement);\r\n\t\t\t\trdaddress2 = rdaddress;\r\n\t\t\t\tif (nsmp>0 && SendCount[ram_width-1:0]>=nsmp) begin\r\n\t\t\t\t\tSendCount[ram_width-1:0]=0;\r\n\t\t\t\t\tSendCount[ram_width+2:ram_width] = (SendCount[ram_width+2:ram_width] + 1);\r\n\t\t\t\t\trdaddress = wraddress_triggerpoint - triggerpoint;// - 1;\r\n\t\t\t\t\trdaddress2 = rdaddress;\r\n\t\t\t\tend\r\n\t\t\t\tstate=WRITE_USB_EXT3;\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_USB_EXT3: begin\r\n\t\t\tusb_wr<= 0;\r\n\t\t\tusb2counter<=0;\r\n\t\t\tstate=WRITE_USB_EXT4;\r\n\t\tend\r\n\t\tWRITE_USB_EXT4: begin\r\n\t\t\tusb2counter=usb2counter+1;\r\n\t\t\tif( (usb2counter>clockbitstowait) && (thecounter[clockbitstowait]==thecounterbit) ) begin // wait a few clock cycles (usb2counter was set to 0 in last state)\r\n\t\t\t\tusb_wr<= 1;\t\r\n\t\t\t\tif(SendCount[ram_width+2:ram_width]==blockstosend) begin // it's 5 (or more) blocks including the logic analyzer info\r\n\t\t\t\t\trden = 0;\r\n\t\t\t\t\tif (autorearm) begin\r\n\t\t\t\t\t\t//tell them all to prime the trigger\r\n\t\t\t\t\t\tget_ext_data=1;\r\n\t\t\t\t\tend\r\n\t\t\t\t\tstate=WRITE_USB_EXT5;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tusb2counter=0;\r\n\t\t\t\t\tstate=WRITE_USB_EXT1;\r\n\t\t\t\t\tif ( (rdaddress- wraddress_triggerpoint-64)>=0 && (rdaddress-wraddress_triggerpoint+64)<128 && (!SendCount[ram_width+2]) ) begin //update display // ignore logic analyzer info\r\n\t\t\t\t\t\tif (SendCount[ram_width+1:ram_width]==chanforscreen) screencolumndata[rdaddress - wraddress_triggerpoint - 64]=(63-txData[7:2]);//store most significant 6 bits\r\n\t\t\t\t\t\tscreenwren = 1;\r\n\t\t\t\t\tend\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_USB_EXT5: begin\r\n\t\t\tusb_siwu=0;//this sends out the data to the PC immediately, without waiting for the latency timer (16 ms by default!)\r\n\t\t\tusb2counter<=usb2counter+1;\r\n\t\t\tif( (usb2counter>8) ) begin // wait a few clock cycles (usb2counter was set to 0 in last state)\r\n\t\t\t\tstate=READ;\r\n\t\t\t\tusb_siwu=1;\r\n\t\t\tend\r\n\t\tend\r\n\r\n\t\tWAIT_ADC1: begin\r\n\t\t\tnewcomdata<=0; //set this back, to just send out data once\r\n\t\t\twriteadc<=0;\r\n\t\t\tgetadcdata<=1;\r\n\t\t\t//if (adcready) begin\r\n\t\t\t\tstate=WAIT_ADC2;\r\n\t\t\t//end\r\n\t\tend\r\n\t\tWAIT_ADC2: begin\r\n\t\t\tif (adcvalid) begin\r\n\t\t\t\tadctestout<=adcdata;\r\n\t\t\t\twriteadc<=1;\r\n\t\t\t\tgetadcdata<=0;\r\n\t\t\t\tif (writesamp>=(nsamp-1)) begin\r\n\t\t\t\t\twritesamp<=0;\r\n\t\t\t\t\twritebyte<=0;\r\n\t\t\t\t\tthecounterbit=thecounter[clockbitstowait];\r\n\t\t\t\t\tstate<=WRITE_BYTE1;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\twritesamp=writesamp+1;\r\n\t\t\t\t\tstate=WAIT_ADC1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_BYTE1: begin\r\n\t\t\tnewcomdata<=0; //set this back, to just send out data once\r\n\t\t\twriteadc<=0;\r\n\t\t\tif(!txBusy && (thecounter[clockbitstowait]!=thecounterbit)) begin\r\n\t\t\t\tif (writebyte) txData=adcramdata[11:8];\r\n\t\t\t\telse txData=adcramdata[7:0];\r\n\t\t\t\ttxStart=1;\r\n\t\t\t\tstate=WRITE_BYTE2;\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_BYTE2: begin\r\n\t\t\ttxStart=0;\r\n\t\t\tif (writebyte) writesamp=writesamp+1;\r\n\t\t\twritebyte = ~writebyte;\r\n\t\t\tif (writesamp>(nsamp-1)) state=READ;\r\n\t\t\telse state=WRITE_BYTE1;\r\n\t\tend\r\n\t\t\r\n\t\t//just writng out some data bytes over serial\r\n\t\tWRITE1: begin\r\n       newcomdata<=0; //set this back, to just send out data once\r\n       if (!txBusy) begin\r\n          txData = data[ioCount];\r\n          txStart = 1;\r\n          state = WRITE2;\r\n        end\r\n      end\r\n      WRITE2: begin\r\n        txStart = 0;\r\n        if (ioCount < ioCountToSend-1) begin\r\n          ioCount = ioCount + 1;\r\n          state = WRITE1;\r\n        end else begin\r\n          state = READ;\r\n        end\r\n      end\r\n\t\t\r\n//\t\t//just writng out some data bytes over USB\r\n//\t\tWRITEUSB1: begin\r\n//\t\t  newcomdata<=0; //set this back, to just send out data once\r\n//        if (usb_txe_not_busy) begin\r\n//          usb_dataio = data[ioCount];\r\n//\t\t\t usb_wr = 1;\r\n//          state = WRITEUSB2;\r\n//        end\r\n//      end\r\n//      WRITEUSB2: begin\r\n//        usb_wr = 0;\r\n//        if (ioCount != LENMAX) begin\r\n//          ioCount = ioCount + 1;\r\n//          state = WRITEUSB1;\r\n//        end else begin\r\n//          ioCount = 0;\r\n//          state = READ;\r\n//        end\r\n//      end\r\n\t\t\r\n    endcase\r\n\t \r\n  end  \r\n  \r\n  //I2C, from https://eewiki.net/pages/viewpage.action?pageId=10125324\r\n  always @(posedge clk) begin\r\n   case (i2cstate)\r\n\t\tREAD: begin\r\n\t\t\ti2c_ena<=0;\r\n\t\t\tif (i2cgo) begin\r\n\t\t\t\ti2cstate=I2CWAIT;\r\n\t\t\tend\r\n\t\tend\r\n\t\tI2CWAIT: begin\r\n\t\t\tif (~i2c_busy) begin\r\n\t\t\t\t//i2c_addr set elsewhere first\r\n\t\t\t\ti2c_rw=0;\r\n\t\t\t\t//i2c_datacounttosend set elsewhere first\r\n\t\t\t\ti2c_datawr = i2cdata[0];\r\n\t\t\t\ti2c_datacount=1;\r\n\t\t\t\ti2cstate=I2CSEND1;\r\n\t\t\tend\r\n\t\tend\r\n\t\tI2CSEND1: begin\r\n\t\t\ti2c_ena = 1;\r\n\t\t\tif (i2c_datacount >= i2c_datacounttosend) begin\r\n\t\t\t\ti2cstate=READ; //sets i2c_ena back to 0\r\n\t\t\tend\r\n\t\t\telse if (i2c_busy) begin\r\n\t\t\t\ti2c_datawr = i2cdata[i2c_datacount];\r\n\t\t\t\tif (i2cdoread) begin\r\n\t\t\t\t\ti2c_rw=1; // set to read for second byte \r\n\t\t\t\tend\r\n\t\t\t\ti2cstate=I2CSEND2;\r\n\t\t\tend\r\n\t\tend\r\n\t\tI2CSEND2: begin\r\n\t\t\tif (~i2c_busy) begin\r\n\t\t\t\t//i2c_ackerror\r\n\t\t\t\ti2c_datacount = i2c_datacount+1;\r\n\t\t\t\ti2cstate=I2CSEND1;\r\n\t\t\tend\r\n\t\tend\r\n\tendcase\r\n\tend\r\n  \r\n  \t//update display\r\n\treg [5:0] columndata;\r\n\treg [2:0] row;\r\n\treg [6:0] column;\r\n\treg [3:0] b;\r\n\talways @(posedge clk) begin\r\n\t\tif (screenaddr>1000) screenreset<=1;\r\n\t\tscreenaddr = screenaddr + 1; // reset the screen at the beginning of the day - just once\r\n\t\trow=7-screenaddr[9:7];\r\n\t\tcolumn=screenaddr[6:0];\r\n\t\t\r\n\t\t//if (column>44) screencolumndata[column] = 64'h0000ff;//test hack\r\n\t\t//else screencolumndata[column] = 64'h000022;//test hack\t\t\r\n\t\t\r\n\t\tcolumndata = screencolumndata[column];//the current column, 64 bits, of screen data\r\n\t\t\r\n\t\t//now draw this row of this column\r\n\t\tif (columndata>=8*(row+1)) screendata = 8'hff; // e.g. if row=1, then if data is 16 and up, all on\r\n\t\telse if (columndata>=8*row) begin // e.g. if row=1, then if data is 8-15, set the appropriate bits, e.g. 5 -> 00011111\r\n\t\t\tscreendata=8'h00; b=0;\r\n\t\t\twhile (b<8) begin\r\n\t\t\t\tif (columndata[2:0]>b) screendata[b]=1;//7-b?\r\n\t\t\t\tb=b+1;\r\n\t\t\tend\r\n\t\tend\r\n\t\telse screendata = 8'h00; // e.g. if d=1, then if data is also not >7 (7 and down), all off\r\n\t\t\r\n\t\t//screendata = 8'h00;//temporarily turn off histo\r\n\t\t//if (column>44) screendata = 8'hff;//test hack\r\n\t\t\r\n\t\t//draws the board ID\r\n\t\tif (row==7 & trigDebug) begin\r\n\t\t\tif (myid>=screenaddr[6:1] && !screenaddr[0]) screendata = 8'hfa;\r\n\t\tend\r\n\t\tif (row==6 & !trigDebug) begin\r\n\t\t\tif (myid>=screenaddr[6:1] && !screenaddr[0]) screendata = 8'hfa;\r\n\t\tend\t\r\n\tend\r\n\t\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/serialprocessor.v.bak",
    "content": "// from http://www.sparxeng.com/blog/software/communicating-with-your-cyclone-ii-fpga-over-serial-port-part-3-number-crunching\r\n\r\nmodule processor(clk, rxReady, rxData, txBusy, txStart, txData, readdata, get_ext_data, ext_data_ready, wraddress_triggerpoint, rden, rdaddress, ram_output1, ram_output2, ram_output3, ram_output4,\r\nnewcomdata,comdata,led1,led2,led3,serial_passthrough,master_clock, imthelast,imthefirst,rollingtrigger,trigDebug, \r\nadcdata,adcready,getadcdata,getadcadr,adcvalid,adcreset,adcramdata,writesamp,writeadc,adctestout,\r\ntriggerpoint,downsample, screendata,screenwren,screenaddr,screenreset,trigthresh,trigchannels,triggertype,triggertot,\r\nSPIsend,SPIsenddata,delaycounter,carrycounter,ledbase,SPIstate,offset,gainsw,led4,\r\ni2c_ena,i2c_addr,i2c_rw,i2c_datawr,i2c_datard,i2c_busy,i2c_ackerror);\r\n   input clk;\r\n\tinput[7:0] rxData;\r\n   input rxReady;\r\n   input txBusy;\r\n   output reg txStart;\r\n   output reg[7:0] txData;\r\n   output reg[7:0] readdata;//first byte we got\r\n   output reg led1,led2,led3,led4,ledbase;\r\n  \toutput reg get_ext_data;\r\n\tinput ext_data_ready;\r\n\tparameter ram_width=12;//9 is 512 samples\r\n\tinput wire[ram_width-1:0] wraddress_triggerpoint;\r\n\toutput reg [ram_width-1:0] rdaddress;\r\n\toutput reg [ram_width-1:0] triggerpoint;\r\n\toutput reg rden;\r\n\tinput wire [7:0] ram_output1;\r\n\tinput wire [7:0] ram_output2;\r\n\tinput wire [7:0] ram_output3;\r\n\tinput wire [7:0] ram_output4;\r\n\toutput reg serial_passthrough;\r\n\toutput reg [1:0] master_clock;\r\n\toutput reg[7:0] comdata;\r\n\toutput reg newcomdata;\r\n\toutput reg imthelast; // to remember if we're the last one in the chain\r\n\toutput wire imthefirst; // to remember if we're the last one in the chain\r\n\toutput reg rollingtrigger;\r\n\tinput trigDebug;\r\n\tinput [11:0] adcdata;\r\n\tinput adcready;\r\n\tinput adcvalid;\r\n\toutput reg getadcdata;\r\n\toutput reg [4:0] getadcadr;\r\n\toutput reg adcreset;\r\n\toutput reg [11:0] writesamp;//max of 4096 samples\r\n\toutput reg writeadc;\r\n\toutput reg [11:0] adctestout;\r\n\toutput reg [4:0] downsample;\r\n\toutput reg [7:0] screendata;\r\n\toutput reg screenwren=0;\r\n\toutput reg [9:0] screenaddr = 10'd0;\r\n\toutput reg screenreset=0;\r\n\toutput reg [7:0] trigthresh = 8'h80;\r\n\toutput reg [3:0] trigchannels = 4'b1111;\r\n\toutput reg [3:0] triggertype = 4'b0001;//rising edge on, falling edge off, other off\r\n   output reg [ram_width:0] triggertot;\r\n\toutput reg [15:0] SPIsenddata;//the bits to send\r\n\toutput reg SPIsend;//start sending\r\n\tinput [7:0] delaycounter;\r\n\tinput [7:0] carrycounter;\r\n\tinput [3:0] SPIstate;\r\n\toutput wire[3:0] offset;\r\n\toutput reg[3:0] gainsw;\r\n\t\r\n\toutput reg i2c_ena;\r\n\toutput reg [6:0] i2c_addr;\r\n\toutput reg i2c_rw;\r\n\toutput reg [7:0] i2c_datawr;\r\n\tinput [7:0] i2c_datard;\r\n\tinput i2c_busy;\r\n\tinput i2c_ackerror;\r\n\treg [7:0] i2cdata1;\r\n\treg [7:0] i2cdata2;\r\n\r\n  localparam READ=0, SOLVING=1, WAITING=2, WRITE_EXT1=3, WRITE_EXT2=4, WAIT_ADC1=5, WAIT_ADC2=6, WRITE_BYTE1=7, WRITE_BYTE2=8, READMORE=9, WRITE1=10, WRITE2=11,SPIWAIT=12,I2CWAIT=13,I2CSEND1=14,I2CSEND2=15;\r\n  integer state;\r\n\r\n  reg [7:0] myid;\r\n  reg [7:0] extradata[3:0];//to store command extra data, like arguemnts\r\n  reg [ram_width+1:0] SendCount;\r\n  integer nsamp = 6;\r\n  input [11:0] adcramdata;\r\n  reg writebyte;//whether we're sending the first or second byte (since it's 12 bits from the Max10 ADC)\r\n  integer bytesread, byteswanted;\r\n  reg thecounterbit;\r\n  integer clockbitstowait = 5; //wait 2^clockbitstowait (8?) ticks before sending each data byte\r\n  reg [3:0] sendincrement = 0; //skip 2**sendincrement bytes each time\r\n  reg [ram_width-1:0] samplestosend = 0;\r\n  reg [7:0] chanforscreen=0;\r\n  reg canreadout;\r\n  \r\n  //TODO: use memory bits for this, not register space??\r\n  reg [5:0] screencolumndata [128]; //all the screen data, 128 columns of (8 rows of 8 dots)\r\n  \r\n  //For writing out data in WRITE1,2\r\n  localparam LEN = 1;//number of bytes to write out\r\n  localparam LENMAX = LEN - 1;\r\n  integer ioCount;\r\n  reg[7:0] data[0:LENMAX];\r\n  \r\n  initial begin\r\n    state<=READ;\r\n\t myid<=200;\r\n\t canreadout<=0;\r\n\t master_clock<=2'b00;//start as my own master\r\n\t imthelast<=0;//probably not last\r\n\t rollingtrigger<=1;\r\n\t triggerpoint<=(2**(ram_width-2));// 1/4 of the screen\r\n\t downsample<=1;\r\n\t serial_passthrough<=0;\r\n\t ledbase<=1;\r\n\t gainsw[0]<=0;//1 is for 1k resistor (gain 2), 0 is for 100 Ohm resistor (gain .2)\r\n\t gainsw[1]<=0;\r\n\t gainsw[2]<=0;\r\n\t gainsw[3]<=0;\r\n  end\r\n  \r\n  assign imthefirst = (myid==0);\r\n  \r\n  integer thecounter;\r\n  integer theoldcounter;\r\n  //set the LEDs to indicate my ID\r\n  always @(posedge clk) begin\r\n\tthecounter<=thecounter+1;\r\n\t\r\n\tif (state==READ) led4<=1;\r\n\telse led4<=0;\r\n  \r\n   if ( imthelast & thecounter[26]==1'b1 ) begin //flash every few seconds\r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=0;//all on\r\n\tend\r\n\telse if (txStart) begin\r\n\t//if (trigDebug) begin\t\t\r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=0;//all on\r\n\tend\r\n\telse if (myid==0) begin\t   \r\n\t\tled1<=1;\t\tled2<=1;\t\tled3<=1;//all off\r\n\tend\r\n\telse if (myid==1) begin\t   \r\n\t\tled1<=0;\t\tled2<=1;\t\tled3<=1;//binary 1\r\n\tend\r\n\telse if (myid==2) begin\t   \r\n\t\tled1<=1;\t\tled2<=0;\t\tled3<=1;//binary 2\r\n\tend\r\n\telse if (myid==3) begin\t   \r\n\t\tled1<=0;\t\tled2<=0;\t\tled3<=1;//binary 3\r\n\tend\r\n\telse if (myid==4) begin\t   \r\n\t\tled1<=1;\t\tled2<=1;\t\tled3<=0;//binary 4\r\n\tend\r\n\telse begin\t\t\r\n\t\tled1<=1;\t\tled2<=1;\t\tled3<=1;\r\n\tend\r\n  end\r\n  \r\n   //reg [7:0] PWMoffset = 23; //9.1%  *256;\r\n\treg [7:0] PWMoffset0 = 58; //22.7% *256;\r\n\treg [7:0] PWMoffset1 = 58; //22.7% *256;\r\n\treg [7:0] PWMoffset2 = 58; //22.7% *256;\r\n\treg [7:0] PWMoffset3 = 58; //22.7% *256;\r\n\treg [7:0] pwmcounter;\r\n   always @(posedge clk) begin\r\n\t\tpwmcounter <= pwmcounter + 1'b1;  // free-running counter\r\n\tend\r\n\tassign offset[0] = (PWMoffset0 > pwmcounter);  // comparators\r\n\tassign offset[1] = (PWMoffset1 > pwmcounter);  // comparators\r\n\tassign offset[2] = (PWMoffset2 > pwmcounter);  // comparators\r\n\tassign offset[3] = (PWMoffset3 > pwmcounter);  // comparators\r\n\r\n   always @(posedge clk) begin\r\n\t\tif (get_ext_data) canreadout=0;\r\n\t\tif (ext_data_ready) canreadout=1;\r\n\tend\r\n  \r\n  always @(posedge clk) begin\r\n    case (state)\r\n\t \r\n      READ: begin\r\n\t\t  get_ext_data<=0;\r\n\t\t  adcreset<=1;\r\n\t\t  txStart<=0;\r\n\t\t  getadcdata<=0;\r\n\t\t  bytesread<=0;\r\n\t\t  byteswanted<=0;\r\n\t\t  newcomdata<=0;\r\n\t\t  SPIsend<=0;\r\n\t\t  i2c_ena<=0;\r\n        if (rxReady) begin\r\n\t\t\t readdata = rxData;\r\n          state = SOLVING;\r\n        end\r\n      end\r\n\t\t\r\n\t\tREADMORE: begin\r\n\t\t\tnewcomdata=0;\r\n\t\t\tif (rxReady) begin\r\n\t\t\t\textradata[bytesread] = rxData;\r\n\t\t\t\tcomdata=rxData;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tbytesread = bytesread+1;\r\n\t\t\t\tif (bytesread>=byteswanted) state=SOLVING;\r\n\t\t\tend\r\n\t\tend\r\n\r\n      SOLVING: begin\r\n\t\t\tif (readdata < 10) begin // got character \"0-9\"\r\n\t\t\t\tmyid=readdata;//remember my ID\r\n\t\t\t\tif (readdata==0) begin\r\n\t\t\t\t\tmaster_clock=2'b00; //remain my own master\r\n\t\t\t\tend\r\n\t\t\t\telse master_clock=2'b01; //now a slave!\r\n\t\t\t\tcomdata=(readdata+1); // give the next one an ID one larger\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\t\t\t\r\n\t\t\t\r\n\t\t\telse if (readdata > 9 && readdata < 20) begin // got character \"10-19\"\r\n\t\t\t\tif (myid==(readdata-10)) begin\r\n\t\t\t\t\t//read me out\r\n\t\t\t\t\tserial_passthrough=0;\r\n\t\t\t\t\ttheoldcounter=thecounter;//start the clock\r\n\t\t\t\t\tstate=WAITING;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\t//pass it on, and set serial to \"passthrough mode\"\r\n\t\t\t\t\tserial_passthrough=1;\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (readdata > 19 && readdata < 30) begin // got character \"20-29\"\r\n\t\t\t\tif (myid==(readdata-20)) imthelast=1; // I'm the last one\r\n\t\t\t\telse imthelast=0;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (100==readdata) begin\r\n\t\t\t\t//tell them all to prime the trigger\r\n\t\t\t\tget_ext_data=1;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (101==readdata) begin\r\n\t\t\t\t//tell them all to roll the trigger\r\n\t\t\t\trollingtrigger=1;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse if (102==readdata) begin\r\n\t\t\t\t//tell them all to not roll the trigger\r\n\t\t\t\trollingtrigger=0;\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (readdata>109 && readdata<120) begin // 110 to 119\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (readdata==119) getadcadr<=17;//send the data from the temp sensor\r\n\t\t\t\t\telse getadcadr<=(readdata-110);//send the data from adc, so 110->0 (pin AIN1), 111->1 (pin 6), up to 118->8 (pin 14)\r\n\t\t\t\t\twritesamp<=0;\r\n\t\t\t\t\tstate=WAIT_ADC1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==120) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the number of samples to read from max10 adc\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tnsamp=256*extradata[0]+1*extradata[1];\r\n\t\t\t\t\tif (nsamp>4095) nsamp=4095; //max of 4096 samples stored in the ram (12 bit writesamp address), and one less is needed (not sure why...)\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==121) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the trigger point\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggerpoint=256*extradata[0]+1*extradata[1];\r\n\t\t\t\t\tif (triggerpoint>(2**ram_width)-16) triggerpoint=(2**ram_width)-16;\r\n\t\t\t\t\telse if (triggerpoint<4) triggerpoint=4;\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==122) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the number of samples to send\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tsamplestosend=256*extradata[0]+1*extradata[1];\r\n\t\t\t\t\tif (triggerpoint>(samplestosend-5)) triggerpoint=samplestosend/2;\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==123) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of bytes to skip after each send, log2\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tsendincrement=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==124) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of samples to skip in the ADC, log2\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]>30) extradata[0]=30;\r\n\t\t\t\t\tdownsample=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==125) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the number of clock ticks to wait between sending bytes, log2\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]>30) extradata[0]=30;\r\n\t\t\t\t\tclockbitstowait=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==126) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel to draw on the mini-display\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tchanforscreen=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\t\r\n\t\t\telse if (readdata==127) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the trigger threshold\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttrigthresh=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==128) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the trigger type: rising, falling, either, ...\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggertype=extradata[0];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==129) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the trigger time over/under threshold required\r\n\t\t\t\tcomdata=readdata;\t\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\ttriggertot=256*extradata[0]+1*extradata[1];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==130) begin\r\n\t\t\t\tcomdata=readdata;\tnewcomdata=1; //pass it on\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is whether to trigger or not trigger on a given channel\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]<4) trigchannels[extradata[0]]=~trigchannels[extradata[0]];//invert previous value\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==131) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the data to send to SPI on the ADCs\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tSPIsenddata[15:8]=extradata[0];//0 (write) and the 7 bit address\r\n\t\t\t\t\tSPIsenddata[7:0]=extradata[1];//the bits to write to that address\r\n\t\t\t\t\tSPIsenddata[15]=1'b0;//write is 0\r\n\t\t\t\t\tSPIsend=1;\r\n\t\t\t\t\tstate=SPIWAIT;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==132) begin // send the delaycounter TDC data, if I'm the board being read out\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tioCount = 0;\r\n\t\t\t\t\tdata[0]=delaycounter;\r\n\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==133) begin // send the carrycounter TDC data, if I'm the board being read out\r\n\t\t\t\tif (serial_passthrough) begin\r\n\t\t\t\t\tcomdata=readdata;\r\n\t\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\tioCount = 0;\r\n\t\t\t\t\tdata[0]=carrycounter;\r\n\t\t\t\t\tstate=WRITE1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==134) begin\r\n\t\t\t\tbyteswanted=1;//wait for next byte which is the channel\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tgainsw[extradata[0]]=~gainsw[extradata[0]];//switch the gain of the channel\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==135) begin\r\n\t\t\t\tbyteswanted=2;//wait for next bytes which are the channel and PWM\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\tif (extradata[0]==0) PWMoffset0 = extradata[1];//set the PWM value for the channel (fraction of 256 of which to be on for, *3.3V)\r\n\t\t\t\t\tif (extradata[0]==1) PWMoffset1 = extradata[1];\r\n\t\t\t\t\tif (extradata[0]==2) PWMoffset2 = extradata[1];\r\n\t\t\t\t\tif (extradata[0]==3) PWMoffset3 = extradata[1];\r\n\t\t\t\t\tstate=READ;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse if (readdata==136) begin\r\n\t\t\t\tbyteswanted=2;//wait for next byte which is the stuff to send over i2c\r\n\t\t\t\tcomdata=readdata;\r\n\t\t\t\tnewcomdata=1; //pass it on\r\n\t\t\t\tif (bytesread<byteswanted) state=READMORE;\r\n\t\t\t\telse begin\r\n\t\t\t\t\t//send over i2c!\t\t\t\t\t\r\n\t\t\t\t\ti2cdata1=extradata[0];\r\n\t\t\t\t\ti2cdata2=extradata[1];\r\n\t\t\t\t\tstate=I2CWAIT;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\t\telse state=READ; // if we got some other command, just ignore it\r\n      end\r\n\t\t\r\n\t\tSPIWAIT: begin\r\n\t\t\t//wait for SPIstate from oscillo to be nearly done\r\n\t\t\tif (SPIstate==3) begin \r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\tend\r\n\t\t\r\n\t\tWAITING: begin\r\n\t\t\tif (canreadout) begin\r\n\t\t\t\tSendCount = 0;\r\n\t\t\t\trdaddress = wraddress_triggerpoint - triggerpoint;// - 1;\r\n\t\t\t\tthecounterbit=thecounter[clockbitstowait];\r\n\t\t\t\tstate=WRITE_EXT1;\r\n\t\t\tend\r\n\t\t\tif ( (thecounter-theoldcounter) > 100000000 ) begin\r\n\t\t\t\tstate=READ;//timeout!\r\n\t\t\tend\r\n\t\tend\t\t\r\n\t\tWRITE_EXT1: begin\r\n\t\t\trden = 1;\r\n\t\t\tif(!txBusy && (thecounter[clockbitstowait]!=thecounterbit)) begin // wait a few clock cycles??\r\n\t\t\t\t//rotate through the 4 outputs\r\n\t\t\t\tif (SendCount[ram_width+1:ram_width]==0) txData=ram_output1;\r\n\t\t\t\tif (SendCount[ram_width+1:ram_width]==1) txData=ram_output2;\r\n\t\t\t\tif (SendCount[ram_width+1:ram_width]==2) txData=ram_output3;\r\n\t\t\t\tif (SendCount[ram_width+1:ram_width]==3) txData=ram_output4;\r\n\t\t\t\ttxStart = 1;\t\t\t\t\r\n\t\t\t\tSendCount = SendCount + (2**sendincrement);\r\n\t\t\t\trdaddress = rdaddress + (2**sendincrement);\r\n\t\t\t\tif (samplestosend>0 && SendCount[ram_width-1:0]>=samplestosend) begin\r\n\t\t\t\t\tSendCount[ram_width-1:0]=0;\r\n\t\t\t\t\tSendCount[ram_width+1:ram_width] = SendCount[ram_width+1:ram_width] + 1;\r\n\t\t\t\t\trdaddress = wraddress_triggerpoint - triggerpoint;// - 1;\r\n\t\t\t\tend\r\n\t\t\t\tstate=WRITE_EXT2;\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_EXT2: begin\r\n         txStart = 0;\r\n\t\t\tif(SendCount==0) begin \r\n\t\t\t\trden = 0;\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\t\telse begin\r\n\t\t\t\tif ( (rdaddress- wraddress_triggerpoint-64)>=0 && (rdaddress-wraddress_triggerpoint+64)<128 ) begin //update display // - triggerpoint ??\r\n\t\t\t\t\tif (SendCount[ram_width+1:ram_width]==chanforscreen) screencolumndata[rdaddress - wraddress_triggerpoint - 64]=63-txData[7:2];//store most significant 6 bits\r\n\t\t\t\t\tscreenwren <= 1;\r\n\t\t\t\tend\r\n\t\t\t\tstate=WRITE_EXT1;\r\n\t\t\tend\r\n\t\tend\t\t\r\n\t\t\r\n\t\tWAIT_ADC1: begin\r\n\t\t\twriteadc<=0;\r\n\t\t\tgetadcdata<=1;\r\n\t\t\t//if (adcready) begin\r\n\t\t\t\tstate=WAIT_ADC2;\r\n\t\t\t//end\r\n\t\tend\r\n\t\tWAIT_ADC2: begin\r\n\t\t\tif (adcvalid) begin\r\n\t\t\t\tadctestout<=adcdata;\r\n\t\t\t\twriteadc<=1;\r\n\t\t\t\tgetadcdata<=0;\r\n\t\t\t\tif (writesamp>=(nsamp-1)) begin\r\n\t\t\t\t\twritesamp<=0;\r\n\t\t\t\t\twritebyte<=0;\r\n\t\t\t\t\tthecounterbit=thecounter[clockbitstowait];\r\n\t\t\t\t\tstate<=WRITE_BYTE1;\r\n\t\t\t\tend\r\n\t\t\t\telse begin\r\n\t\t\t\t\twritesamp=writesamp+1;\r\n\t\t\t\t\tstate=WAIT_ADC1;\r\n\t\t\t\tend\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_BYTE1: begin\r\n\t\t\twriteadc<=0;\r\n\t\t\tif(!txBusy && (thecounter[clockbitstowait]!=thecounterbit)) begin\r\n\t\t\t\tif (writebyte) txData=adcramdata[11:8];\r\n\t\t\t\telse txData=adcramdata[7:0];\r\n\t\t\t\ttxStart=1;\r\n\t\t\t\tstate=WRITE_BYTE2;\r\n\t\t\tend\r\n\t\tend\r\n\t\tWRITE_BYTE2: begin\r\n\t\t\ttxStart=0;\r\n\t\t\tif (writebyte) writesamp=writesamp+1;\r\n\t\t\twritebyte = ~writebyte;\r\n\t\t\tif (writesamp>(nsamp-1)) state=READ;\r\n\t\t\telse state=WRITE_BYTE1;\r\n\t\tend\r\n\t\t\r\n\t\t//just writng out some data bytes\r\n\t\tWRITE1: begin\r\n        if (!txBusy) begin\r\n          txData = data[ioCount];\r\n          txStart = 1;\r\n          state = WRITE2;\r\n        end\r\n      end\r\n      WRITE2: begin\r\n        txStart = 0;\r\n        if (ioCount != LENMAX) begin\r\n          ioCount = ioCount + 1;\r\n          state = WRITE1;\r\n        end else begin\r\n          ioCount = 0;\r\n          state = READ;\r\n        end\r\n      end\r\n\t\t\r\n\t\t//I2C\r\n\t\tI2CWAIT: begin\r\n\t\t\tif (~i2c_busy) begin\r\n\t\t\t\ti2c_addr = 7'b0100000;// for all 3 pins (last 3 digits) to GND\r\n\t\t\t\t//i2c_addr = 7'b0100111;// for all 3 pins (last 3 digits) to VCC\r\n\t\t\t\ti2c_rw = 0;\r\n\t\t\t\ti2c_datawr = i2cdata1;\r\n\t\t\t\t//i2c_datard = \r\n\t\t\t\tstate=I2CSEND1;\r\n\t\t\tend\r\n\t\tend\r\n\t\tI2CSEND1: begin\r\n\t\t\ti2c_ena = 1;\r\n\t\t\tif (i2c_busy) begin\r\n\t\t\t\ti2c_datawr = i2cdata2;\r\n\t\t\t\tstate=I2CSEND2;\r\n\t\t\tend\t\t\t\t\r\n\t\tend\r\n\t\tI2CSEND2: begin\r\n\t\t\tif (~i2c_busy) begin\r\n\t\t\t\t//i2c_ackerror\r\n\t\t\t\tstate=READ;\r\n\t\t\tend\r\n\t\tend\r\n\t\t\r\n    endcase\r\n\t \r\n  end\r\n  \r\n  \t//update display\r\n\treg [5:0] columndata;\r\n\treg [2:0] row;\r\n\treg [6:0] column;\r\n\treg [3:0] b;\r\n\talways @(posedge clk) begin\r\n\t\tif (screenaddr>1000) screenreset<=1;\r\n\t\tscreenaddr = screenaddr + 1; // reset the screen at the beginning of the day - just once\r\n\t\trow=7-screenaddr[9:7];\r\n\t\tcolumn=screenaddr[6:0];\r\n\t\t\r\n\t\t//if (column>44) screencolumndata[column] = 64'h0000ff;//test hack\r\n\t\t//else screencolumndata[column] = 64'h000022;//test hack\t\t\r\n\t\t\r\n\t\tcolumndata = screencolumndata[column];//the current column, 64 bits, of screen data\r\n\t\t\r\n\t\t//now draw this row of this column\r\n\t\tif (columndata>=8*(row+1)) screendata = 8'hff; // e.g. if row=1, then if data is 16 and up, all on\r\n\t\telse if (columndata>=8*row) begin // e.g. if row=1, then if data is 8-15, set the appropriate bits, e.g. 5 -> 00011111\r\n\t\t\tscreendata=8'h00; b=0;\r\n\t\t\twhile (b<8) begin\r\n\t\t\t\tif (columndata[2:0]>b) screendata[b]=1;//7-b?\r\n\t\t\t\tb=b+1;\r\n\t\t\tend\r\n\t\tend\r\n\t\telse screendata = 8'h00; // e.g. if d=1, then if data is also not >7 (7 and down), all off\r\n\t\t\r\n\t\t//screendata = 8'h00;//temporarily turn off histo\r\n\t\t//if (column>44) screendata = 8'hff;//test hack\r\n\t\t\r\n\t\t//draws the board ID\r\n\t\tif (row==7 & trigDebug) begin\r\n\t\t\tif (myid>=screenaddr[6:1] && !screenaddr[0]) screendata = 8'hfa;\r\n\t\tend\r\n\t\tif (row==6 & !trigDebug) begin\r\n\t\t\tif (myid>=screenaddr[6:1] && !screenaddr[0]) screendata = 8'hfa;\r\n\t\tend\r\n\t\r\n\tend\r\n  \r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/serialprocessor_slave.v",
    "content": "// from http://www.sparxeng.com/blog/software/communicating-with-your-cyclone-ii-fpga-over-serial-port-part-3-number-crunching\r\n\r\nmodule processor_slave(clk, rxReady, rxData, txBusy, txStart, txData, readdata, newgotdata, gotdata);\r\n  input clk;\r\n  input[7:0] rxData;\r\n  input rxReady;\r\n  input txBusy;\r\n  output reg txStart;\r\n  output reg[7:0] txData;\r\n  output reg[7:0] readdata;//first byte we got\r\n  input newgotdata;//from other processor\r\n  input[7:0] gotdata;\r\n  \r\n  localparam READ=0, SOLVING=1, WRITE1=2, WRITE2=3;\r\n  localparam LEN = 1;\r\n  localparam LENMAX = LEN - 1;\r\n\r\n  integer ioCount;\r\n  reg[7:0] data[0:LENMAX];\r\n  integer state;\r\n\r\n  initial begin\r\n    state = READ;\r\n  end\r\n\r\n  always @(posedge clk) begin\r\n    case (state)\r\n\t \r\n      READ: begin\r\n\t\t  txStart = 0;\r\n        if (rxReady) begin\r\n          data[ioCount] = rxData;\r\n\t\t\t if (ioCount == 0) readdata = rxData;\r\n          if (ioCount == LENMAX) begin\r\n            ioCount = 0;\r\n            state = SOLVING;\r\n          end else begin\r\n            ioCount = ioCount + 1;\r\n          end\r\n        end\r\n\t\t  \tif (newgotdata) begin\r\n\t\t\t\tioCount = 0;\r\n\t\t\t\tdata[0]=gotdata;\r\n\t\t\t\tstate=WRITE1;\r\n\t\t\tend\r\n      end\r\n\r\n      SOLVING: begin\r\n\t\t  begin\r\n          //if (readdata == 49) get_ext_data=1;\r\n        end\r\n\t\t  state=READ;\r\n        //state = WRITE1;\r\n      end\r\n\r\n      WRITE1: begin\r\n        if (!txBusy) begin\r\n          txData = data[ioCount];\r\n          txStart = 1;\r\n          state = WRITE2;\r\n        end\r\n      end\r\n\r\n      WRITE2: begin\r\n        txStart = 0;\r\n        if (ioCount != LENMAX) begin\r\n          ioCount = ioCount + 1;\r\n          state = WRITE1;\r\n        end else begin\r\n          ioCount = 0;\r\n          state = READ;\r\n        end\r\n      end\r\n\t\t\r\n    endcase\r\n\t \r\n  end\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/serialprocessor_slave.v.bak",
    "content": "// from http://www.sparxeng.com/blog/software/communicating-with-your-cyclone-ii-fpga-over-serial-port-part-3-number-crunching\r\n\r\nmodule processor(clk, rxReady, rxData, txBusy, txStart, txData, readdata, get_ext_data);\r\n  input clk;\r\n  input[7:0] rxData;\r\n  input rxReady;\r\n  input txBusy;\r\n  output reg txStart;\r\n  output reg get_ext_data;\r\n  output reg[7:0] txData;\r\n  output reg[7:0] readdata;//first byte we got\r\n\r\n  localparam READ=0, SOLVING=1, WRITE1=2, WRITE2=3;\r\n  localparam LEN = 1;\r\n  localparam LENMAX = LEN - 1;\r\n\r\n  integer ioCount;\r\n  reg[7:0] data[0:LENMAX];\r\n  integer state;\r\n\r\n  initial begin\r\n    txStart = 0;\r\n    state = READ;\r\n  end\r\n\r\n  always @(posedge clk) begin\r\n    case (state)\r\n\t \r\n      READ: begin\r\n\t\t  get_ext_data=0;\r\n        if (rxReady) begin\r\n          data[ioCount] = rxData;\r\n\t\t\t if (ioCount == 0) readdata = rxData;\r\n          if (ioCount == LENMAX) begin\r\n            ioCount = 0;\r\n            state = SOLVING;\r\n          end else begin\r\n            ioCount = ioCount + 1;\r\n          end\r\n        end\r\n      end\r\n\r\n      SOLVING: begin\r\n\t\t  begin\r\n          if (readdata == 49) get_ext_data=1;\r\n        end\r\n\t\t  state=READ;\r\n        //state = WRITE1;\r\n      end\r\n\r\n      WRITE1: begin\r\n        if (!txBusy) begin\r\n          txData = data[ioCount];\r\n          txStart = 1;\r\n          state = WRITE2;\r\n        end\r\n      end\r\n\r\n      WRITE2: begin\r\n        txStart = 0;\r\n        if (ioCount != LENMAX) begin\r\n          ioCount = ioCount + 1;\r\n          state = WRITE1;\r\n        end else begin\r\n          ioCount = 0;\r\n          state = READ;\r\n        end\r\n      end\r\n    endcase\r\n  end\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/tdc1.vhd",
    "content": "library ieee;\r\nuse ieee.std_logic_1164.all;\r\nuse ieee.numeric_std.all;\r\n\r\nentity DelayLine is\r\ngeneric (\r\nDATA_WIDTH : natural := 20\r\n);\r\n\r\nport (\r\noutput: out signed ((DATA_WIDTH-1) downto 0);\r\na: in signed ((DATA_WIDTH-1) downto 0); \r\nb: in signed ((DATA_WIDTH-1) downto 0); \r\nSTART: in std_logic;\r\nSTOP: in std_logic\r\n);\r\nend DelayLine;\r\n\r\narchitecture rtl of DelayLine is\r\n--SIGNAL reg: signed ((DATA_WIDTH-1) downto 0);\r\nSIGNAL buf: signed ((DATA_WIDTH-1) downto 0);\r\n\r\nbegin\r\nprocess (START,STOP,a,b)\r\nvariable s : signed ((DATA_WIDTH) downto 0);\r\nbegin\r\ns := ('0' & a) + ('0' & b) + ('0' & START); -- if a and b are 0 and 1, start will start filling buf with 0's, I think\r\nbuf<=s((DATA_WIDTH-1) downto 0);\r\n\r\nif (rising_edge(STOP)) then\r\noutput<=buf((DATA_WIDTH-1) downto 0); -- stop should freeze the output\r\nend if;\r\nend process;\r\n\r\nend rtl;\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/tdc1.vhd.bak",
    "content": "library ieee;\r\nuse ieee.std_logic_1164.all;\r\nuse ieee.numeric_std.all;\r\nentity signed_adder is \r\n\tgeneric ( DATA_WIDTH : natural := 127);\t\r\n\tport (\ta : in signed ((DATA_WIDTH-1) downto 0);\r\n\t\t\t\t\tb\t: in signed ((DATA_WIDTH-1) downto 0); \r\n\t\t\t\t\tcin : in std_logic; \r\n\t\t\t\t\tcout : out std_logic; \r\n\t\t\t\t\tresult : out signed ((DATA_WIDTH-1) downto 0) ); \r\nend entity; \r\narchitecture rtl of signed_adder is \r\nbegin \r\nPROCESS (cin, a, b) \r\n\tVARIABLE s : signed ((DATA_WIDTH) downto 0); \r\n\tBEGIN \r\n\t\ts := ('0' & a) + ('0' & b) + ('0' & cin); \r\n\t\tresult<=s((DATA_WIDTH-1) downto 0); \r\n\t\tcout <= s(DATA_WIDTH); \r\n\tEND process;\r\nend rtl; \r\n"
  },
  {
    "path": "max10_adc_firmware_v8/tdc2.v",
    "content": "module chain_delay(clk,start,stop,result);\r\ninput clk, start, stop;\r\nparameter CHAIN_LEN = 200;\r\nwire [CHAIN_LEN-2:0] input1 = {{CHAIN_LEN-2{1'b0}},start} /* synthesis keep */; // that's ...0000000 or ...00000001\r\nwire [CHAIN_LEN-1:0] chain = {CHAIN_LEN-1{1'b1}} + input1 /* synthesis keep */; // that's 1111...1111, added to 1 or 0\r\n\r\n// I think it works like this... \r\n// when start is 0:  011111111 + 0000 = 011111111\r\n// when start goes to 1:  011111111 + 0001 = 100000000  i.e. 255+1=256\r\n// before the operation completes: 011110000, so the more 0's, the longer it ran\r\n// if it got to the end, the last bit should be a 1\r\n\r\noutput reg [CHAIN_LEN-1:0] result /* synthesis keep */;\r\nalways @(posedge stop) result<=chain;\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/tdc2.v.bak",
    "content": "\r\nmodule chain_delay_race\r\n(\r\n\tclk,rst,\r\n\tcalibrate_a,\r\n\tcalibrate_b,\r\n\ta_wins,\r\n\tb_wins,\r\n\tvalid\t\t\r\n);\r\n\r\nparameter CHAIN_LEN = 32;\r\nparameter CALIBRATE_BITS = 4;\r\nlocalparam CALIBRATE_DEC = (1<<CALIBRATE_BITS);\r\n\r\ninput clk,rst;\r\ninput [CALIBRATE_BITS-1:0] calibrate_a;\r\ninput [CALIBRATE_BITS-1:0] calibrate_b;\r\noutput a_wins,b_wins,valid;\r\n\r\nreg flush, valid;\r\n\r\n///////////////////////\r\n// input regs\r\n///////////////////////\r\nreg [CALIBRATE_BITS-1:0] calibrate_a_r /* synthesis preserve */;\r\nreg [CALIBRATE_BITS-1:0] calibrate_b_r /* synthesis preserve */;\r\n\r\nalways @(posedge clk) begin\r\n\tif (rst) begin\r\n\t\tcalibrate_a_r <= 0;\r\n\t\tcalibrate_b_r <= 0;\r\n\tend\r\n\telse begin\r\n\t\tcalibrate_a_r <= calibrate_a;\r\n\t\tcalibrate_b_r <= calibrate_b;\r\n\tend\r\nend\r\n\r\n///////////////////////\r\n// path A\r\n///////////////////////\r\nreg [CALIBRATE_DEC-1:0] calibrate_a_dec;\r\nalways @(posedge clk) begin\r\n\tcalibrate_a_dec <= 0;\r\n\tcalibrate_a_dec[calibrate_a_r] <= !flush;\r\nend\r\n\r\nwire [CHAIN_LEN:0] chain_a = {CHAIN_LEN{1'b1}} + calibrate_a_dec;\r\nwire a_out = chain_a[CHAIN_LEN];\r\n\r\n///////////////////////\r\n// path B\r\n///////////////////////\r\nreg [CALIBRATE_DEC-1:0] calibrate_b_dec;\r\nalways @(posedge clk) begin\r\n\tcalibrate_b_dec <= 0;\r\n\tcalibrate_b_dec[calibrate_b_r] <= !flush;\r\nend\r\n\r\nwire [CHAIN_LEN:0] chain_b = {CHAIN_LEN{1'b1}} + calibrate_b_dec;\r\nwire b_out = chain_b[CHAIN_LEN];\r\n\r\n///////////////////////\r\n// finish line latches\r\n///////////////////////\r\nwire a_wins_latch, b_wins_latch /* synthesis keep */;\r\nwire trial_complete = a_out & b_out;\r\nassign a_wins_latch = !flush & (a_wins_latch | (a_out & !b_out));\r\nassign b_wins_latch = !flush & (b_wins_latch | (b_out & !a_out));\r\n\r\n///////////////////////\r\n// resynchronize\r\n///////////////////////\r\nreg a_wins, b_wins, stable /* synthesis preserve */;\r\nalways @(posedge clk) begin\r\n\ta_wins <= a_wins_latch;\r\n\tb_wins <= b_wins_latch;\r\n\tstable <= trial_complete;\t\r\nend\r\n\r\n////////////////////////////////////\r\n// control - continuous retrigger\r\n////////////////////////////////////\r\nreg [1:0] state /* synthesis preserve */;\r\n\r\nalways @(posedge clk) begin\r\n\tif (rst) begin\r\n\t\tflush <= 1'b1;\r\n\t\tstate <= 2'b00;\r\n\t\tvalid <= 1'b0;\r\n\tend\r\n\telse begin\r\n\t\tcase (state)\r\n\t\t\t2'b00 : begin\r\n\t\t\t\tflush <= 1'b1;\r\n\t\t\t\tvalid <= 1'b0;\r\n\t\t\t\tif (!a_wins & !b_wins & !stable) state <= 2'b01;\r\n\t\t\tend\r\n\t\t\t2'b01 : begin\r\n\t\t\t\tflush <= 1'b0;\r\n\t\t\t\tif (stable) state <= 2'b10;\r\n\t\t\tend\r\n\t\t\t2'b10 : begin\r\n\t\t\t\tvalid <= 1'b1;\r\n\t\t\t\tstate <= 2'b00;\r\n\t\t\tend\r\n\t\t\t2'b11 : begin\r\n\t\t\t\t// unreachable\r\n\t\t\t\tstate <= 2'b00;\r\n\t\t\tend\r\n\t\tendcase\r\n\tend\r\nend\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid/altchip_id.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n////////////////////////////////////////////////////////////////////\r\n//\r\n//   ALTCHIP_ID\r\n//\r\n//  Copyright (C) 1991-2013 Altera Corporation\r\n//  Your use of Altera Corporation's design tools, logic functions \r\n//  and other software and tools, and its AMPP partner logic \r\n//  functions, and any output files from any of the foregoing \r\n//  (including device programming or simulation files), and any \r\n//  associated documentation or information are expressly subject \r\n//  to the terms and conditions of the Altera Program License \r\n//  Subscription Agreement, Altera MegaCore Function License \r\n//  Agreement, or other applicable license agreement, including, \r\n//  without limitation, that your use is for the sole purpose of \r\n//  programming logic devices manufactured by Altera and sold by \r\n//  Altera or its authorized distributors.  Please refer to the \r\n//  applicable agreement for further details.\r\n//\r\n////////////////////////////////////////////////////////////////////\r\n\r\n// synthesis VERILOG_INPUT_VERSION VERILOG_2001\r\n\r\nmodule  altchip_id\r\n\t( \r\n\tclkin,\r\n\tchip_id,\r\n\tdata_valid,\r\n\treset);\r\n\t\r\n\tinput\tclkin;\r\n\toutput\t[63:0]\tchip_id;\r\n\toutput\tdata_valid;\r\n\tinput\treset;\r\n\t\r\n\tparameter\tDEVICE_FAMILY\t= \"Stratix V\";\t\r\n\tparameter\tID_VALUE\t= 64'hffffffffffffffff;\r\n\tparameter\tID_VALUE_STR\t= \"ffffffffffffffff\";\r\n\t\r\n\t// clock cycle for shiftnld\r\n\tlocalparam\tLOAD_WIDTH\t= 'h01;\t\r\n\tlocalparam\tDATA_WIDTH\t= 'h60;\t// gray of binary 0100 0000, for 64 clock cycles\r\n\t\r\n\twire  \tclkin_wire;\r\n\twire\tcurrent_state_wire;\r\n\twire\tregout_wire;\r\n\twire\t[6:0]   wire_gen_cntr_q;\r\n\twire\t[63:0]\twire_shift_reg_q;\r\n\twire \treset_wire;\r\n\treg\t\tcurrent_state_reg;\r\n\treg\t\tdata_valid_reg;\r\n\treg\t\tend_op_reg;\r\n\treg\t\tend_stage_pos_reg;\r\n\treg\t\t[63:0]\toutput_reg;\r\n\treg\t\tbusy_reg;\r\n\t\r\n\tinitial begin\r\n\t\tcurrent_state_reg = 1'b0;\r\n\t\tdata_valid_reg = 1'b0;\r\n\t\tend_op_reg = 1'b0;\r\n\t\tend_stage_pos_reg = 1'b0;\r\n\t\toutput_reg = 64'h0000000000000000;\r\n\t\tbusy_reg = 1'b0;\r\n\tend\r\n\t\r\n\t// clkin and reset input\r\n\tassign clkin_wire = clkin;\r\n\tassign reset_wire = reset; \r\n\t\r\n\t// busy_reg to indicate read id operation is in progress\r\n\talways @ (posedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) busy_reg <= 1'b0;\r\n\t\telse if (data_valid_reg) busy_reg <= 1'b0;\r\n\t\telse busy_reg <= 1'b1;\r\n\t\t\r\n\t// general counter to count the number of clock cycles in each stage\r\n\ta_graycounter   gen_cntr\r\n\t( \r\n\t\t.aclr(reset_wire),\r\n\t\t.clk_en(busy_reg),\r\n\t\t.clock(~ clkin_wire),\r\n\t\t.q(wire_gen_cntr_q),\r\n\t\t.qbin(),\r\n\t\t.sclr(end_stage_pos_reg | end_op_reg),\r\n\t\t.cnt_en(1'b1),\r\n\t\t.updown(1'b1)\r\n\t);\r\n\tdefparam\r\n\t\tgen_cntr.width = 7,\r\n\t\tgen_cntr.lpm_type = \"a_graycounter\";\r\n\t\r\n\t// state machine to control the shiftnld of chipidblock\r\n\t// state 0 - loading the unique chip id from fuse to shift register, 1 clock cycle\r\n\t// state 1 - shifting shift register to read out the value of unique chip id, 64 clock cycles\r\n\talways @ (posedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1)  current_state_reg <= 1'b0;\r\n\t\telse if (busy_reg == 1'b0) current_state_reg <= 1'b0;\r\n\t\telse if (data_valid_reg == 1'b1) current_state_reg <= 1'b0;\r\n\t\telse if (end_stage_pos_reg == 1'b1) current_state_reg <= (~ current_state_wire);\r\n\t\telse current_state_reg <= current_state_reg;\r\n\tassign current_state_wire = current_state_reg;\r\n\t\r\n\t// end stage signal\r\n\talways @ (posedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) end_stage_pos_reg <= 1'b0;\r\n\t\telse if (data_valid_reg == 1'b1) end_stage_pos_reg <= 1'b0;\r\n\t\telse end_stage_pos_reg <= (((~ current_state_wire) & (wire_gen_cntr_q == LOAD_WIDTH)) | \r\n\t\t\t\t\t\t\t\t\t\t(current_state_wire & (wire_gen_cntr_q == DATA_WIDTH)));\r\n\t\r\n\talways @ (negedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) end_op_reg <= 1'b0;\r\n\t\telse end_op_reg <= (current_state_wire & end_stage_pos_reg);\r\n\t\t\r\n\t// -------------------------------------------------------------------\r\n\t// Instantiate wysiwyg for chipidblock according to device family\r\n\t// -------------------------------------------------------------------\t\r\n\tgenerate\r\n\t\tif (DEVICE_FAMILY == \"MAX 10\") begin\r\n\t\t\tfiftyfivenm_chipidblock   chipidblock_dut\t//MAX 10 FPGA\r\n\t\t\t( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tdefparam\r\n\t\t\t\tchipidblock_dut.id_value = ID_VALUE_STR;\r\n\t\t\tend\r\n\t\telse if (DEVICE_FAMILY == \"Stratix V\") begin\r\n\t\t\tstratixv_chipidblock   chipidblock_dut\t\t//Stratix V\r\n\t\t\t( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\r\n\t\telse if (DEVICE_FAMILY == \"Arria V GZ\") begin\r\n\t\t\tarriavgz_chipidblock   chipidblock_dut\t\t//Arria V GZ\r\n\t\t\t( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\r\n\t\telse if (DEVICE_FAMILY == \"Arria V\") begin\r\n\t\t\tarriav_chipidblock   chipidblock_dut\t\t//Arria V\r\n\t\t\t( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\r\n\t\telse begin\r\n\t\t\tcyclonev_chipidblock   chipidblock_dut\t\t//Cyclone V\r\n\t\t\t( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\r\n\tendgenerate\r\n\t\r\n\t// -------------------------------------------------------------------\r\n\t// Output signals\r\n\t// -------------------------------------------------------------------\r\n\t// data_valid output - operation is completed\r\n\talways @ (posedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) data_valid_reg <= 1'b0;\r\n\t\telse if (end_op_reg == 1'b1) data_valid_reg <= 1'b1;\r\n\t\telse data_valid_reg <= data_valid_reg;\r\n\tassign data_valid = data_valid_reg;\r\n\t\r\n\t// shift register to convert serial output to parallel\r\n\tlpm_shiftreg\tshift_reg (\r\n\t\t.aclr (reset_wire),\r\n\t\t.clock (clkin_wire),\r\n\t\t.shiftin (regout_wire),\r\n\t\t.q (wire_shift_reg_q),\r\n\t\t.enable(((~ end_op_reg) & (~ data_valid_reg)) | (~ busy_reg)),\r\n\t\t.aset (1'b0),\r\n\t\t.data (64'b0),\r\n\t\t.load (1'b0),\r\n\t\t.sclr (~ busy_reg),\r\n\t\t.shiftout (),\r\n\t\t.sset (1'b0)\r\n\t);\r\n\tdefparam\r\n\t\tshift_reg.lpm_direction = \"RIGHT\",\r\n\t\tshift_reg.lpm_type = \"LPM_SHIFTREG\",\r\n\t\tshift_reg.lpm_width = 64;\r\n\t\r\n\talways @ (negedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) output_reg <= 64'h0000000000000000;\r\n\t\telse if (data_valid_reg == 1'b0) begin\r\n\t\t\tif  (end_stage_pos_reg == 1'b1)   output_reg <= {wire_shift_reg_q[63:0]};\r\n\t\t\telse output_reg <= output_reg;\r\n\t\tend\r\n\t\telse output_reg <= output_reg;\r\n\t\r\n\t//output\r\n\tassign chip_id = output_reg;\r\n\t\t\r\nendmodule //altchip_id\r\n//VALID FILE\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid.bsf",
    "content": "/*\r\nWARNING: Do NOT edit the input and output ports in this file in a text\r\neditor if you plan to continue editing the block that represents it in\r\nthe Block Editor! File corruption is VERY likely to occur.\r\n*/\r\n/*\r\nCopyright (C) 1991-2015 Altera Corporation. All rights reserved.\r\nYour use of Altera Corporation's design tools, logic functions \r\nand other software and tools, and its AMPP partner logic \r\nfunctions, and any output files from any of the foregoing \r\n(including device programming or simulation files), and any \r\nassociated documentation or information are expressly subject \r\nto the terms and conditions of the Altera Program License \r\nSubscription Agreement, the Altera Quartus II License Agreement,\r\nthe Altera MegaCore Function License Agreement, or other \r\napplicable license agreement, including, without limitation, \r\nthat your use is for the sole purpose of programming logic \r\ndevices manufactured by Altera and sold by Altera or its \r\nauthorized distributors.  Please refer to the applicable \r\nagreement for further details.\r\n*/\r\n(header \"symbol\" (version \"1.1\"))\r\n(symbol\r\n\t(rect 0 0 192 144)\r\n\t(text \"uniqueid\" (rect 73 -1 103 11)(font \"Arial\" (font_size 10)))\r\n\t(text \"inst\" (rect 8 128 20 140)(font \"Arial\" ))\r\n\t(port\r\n\t\t(pt 0 72)\r\n\t\t(input)\r\n\t\t(text \"clkin\" (rect 0 0 16 12)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"clkin\" (rect 4 61 34 72)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 72)(pt 48 72)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 0 112)\r\n\t\t(input)\r\n\t\t(text \"reset\" (rect 0 0 20 12)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"reset\" (rect 4 101 34 112)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 0 112)(pt 48 112)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 192 72)\r\n\t\t(output)\r\n\t\t(text \"data_valid\" (rect 0 0 40 12)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"data_valid\" (rect 140 61 200 72)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 192 72)(pt 112 72)(line_width 1))\r\n\t)\r\n\t(port\r\n\t\t(pt 192 88)\r\n\t\t(output)\r\n\t\t(text \"chip_id[63..0]\" (rect 0 0 51 12)(font \"Arial\" (font_size 8)))\r\n\t\t(text \"chip_id[63..0]\" (rect 125 77 209 88)(font \"Arial\" (font_size 8)))\r\n\t\t(line (pt 192 88)(pt 112 88)(line_width 3))\r\n\t)\r\n\t(drawing\r\n\t\t(text \"clkin\" (rect 23 43 76 99)(font \"Arial\" (color 128 0 0)(font_size 9)))\r\n\t\t(text \"clk\" (rect 53 67 124 144)(font \"Arial\" (color 0 0 0)))\r\n\t\t(text \"reset\" (rect 19 83 68 179)(font \"Arial\" (color 128 0 0)(font_size 9)))\r\n\t\t(text \"reset\" (rect 53 107 136 224)(font \"Arial\" (color 0 0 0)))\r\n\t\t(text \"output\" (rect 113 43 262 99)(font \"Arial\" (color 128 0 0)(font_size 9)))\r\n\t\t(text \"valid\" (rect 89 67 208 144)(font \"Arial\" (color 0 0 0)))\r\n\t\t(text \"data\" (rect 91 83 206 176)(font \"Arial\" (color 0 0 0)))\r\n\t\t(text \" altchip_id \" (rect 149 128 370 266)(font \"Arial\" ))\r\n\t\t(line (pt 48 32)(pt 112 32)(line_width 1))\r\n\t\t(line (pt 112 32)(pt 112 128)(line_width 1))\r\n\t\t(line (pt 48 128)(pt 112 128)(line_width 1))\r\n\t\t(line (pt 48 32)(pt 48 128)(line_width 1))\r\n\t\t(line (pt 49 52)(pt 49 76)(line_width 1))\r\n\t\t(line (pt 50 52)(pt 50 76)(line_width 1))\r\n\t\t(line (pt 49 92)(pt 49 116)(line_width 1))\r\n\t\t(line (pt 50 92)(pt 50 116)(line_width 1))\r\n\t\t(line (pt 111 52)(pt 111 92)(line_width 1))\r\n\t\t(line (pt 110 52)(pt 110 92)(line_width 1))\r\n\t\t(line (pt 0 0)(pt 192 0)(line_width 1))\r\n\t\t(line (pt 192 0)(pt 192 144)(line_width 1))\r\n\t\t(line (pt 0 144)(pt 192 144)(line_width 1))\r\n\t\t(line (pt 0 0)(pt 0 144)(line_width 1))\r\n\t)\r\n)\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid.cmp",
    "content": "\tcomponent uniqueid is\r\n\t\tport (\n\t\t\tclkin      : in  std_logic                     := 'X'; -- clk\n\t\t\treset      : in  std_logic                     := 'X'; -- reset\n\t\t\tdata_valid : out std_logic;                            -- valid\n\t\t\tchip_id    : out std_logic_vector(63 downto 0)         -- data\n\t\t);\n\tend component uniqueid;\r\n\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid.ppf",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<pinplan\n variation_name=\"uniqueid\"\n megafunction_name=\"ALTCHIP_ID\"\n intended_family=\"MAX 10\"\n specifies=\"all_ports\">\n <global>\n  <pin name=\"clkin\" direction=\"input\" scope=\"external\" />\n  <pin name=\"reset\" direction=\"input\" scope=\"external\" />\n  <pin name=\"data_valid\" direction=\"output\" scope=\"external\" />\n  <pin name=\"chip_id[63..0]\" direction=\"output\" scope=\"external\" />\n </global>\n</pinplan>\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid.qip",
    "content": "set_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_TOOL_NAME \"altchip_id\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_TOOL_VERSION \"15.0\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_TOOL_ENV \"mwpim\"\nset_global_assignment -library \"uniqueid\" -name MISC_FILE [file join $::quartus(qip_path) \"uniqueid.cmp\"]\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_TARGETED_DEVICE_FAMILY \"MAX 10\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_GENERATED_DEVICE_FAMILY \"{MAX 10}\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_QSYS_MODE \"UNKNOWN\"\nset_global_assignment -name SYNTHESIS_ONLY_QIP ON\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_COMPONENT_NAME \"dW5pcXVlaWQ=\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_COMPONENT_DISPLAY_NAME \"QWx0ZXJhIFVuaXF1ZSBDaGlwIElE\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_COMPONENT_REPORT_HIERARCHY \"Off\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_COMPONENT_INTERNAL \"Off\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_COMPONENT_AUTHOR \"QWx0ZXJhIENvcnBvcmF0aW9u\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_COMPONENT_VERSION \"MTUuMA==\"\nset_global_assignment -entity \"uniqueid\" -library \"uniqueid\" -name IP_COMPONENT_DESCRIPTION \"VGhlIEFsdGVyYSBVbmlxdWUgQ2hpcCBJRCBtZWdhZnVuY3Rpb24gcHJvdmlkZXMgZmVhdHVyZSB0byBhY3F1aXJlIHRoZSB1bmlxdWUgY2hpcCBJRCBvZiBGUEdBLg==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_NAME \"YWx0Y2hpcF9pZA==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_DISPLAY_NAME \"QWx0ZXJhIFVuaXF1ZSBDaGlwIElE\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_REPORT_HIERARCHY \"Off\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_INTERNAL \"Off\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_AUTHOR \"QWx0ZXJhIENvcnBvcmF0aW9u\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_VERSION \"MTUuMA==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_DESCRIPTION \"VGhlIEFsdGVyYSBVbmlxdWUgQ2hpcCBJRCBtZWdhZnVuY3Rpb24gcHJvdmlkZXMgZmVhdHVyZSB0byBhY3F1aXJlIHRoZSB1bmlxdWUgY2hpcCBJRCBvZiBGUEdBLg==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_PARAMETER \"REVWSUNFX0ZBTUlMWQ==::TUFYIDEw::REVWSUNFX0ZBTUlMWQ==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_PARAMETER \"SURfVkFMVUU=::MTg0NDY3NDQwNzM3MDk1NTE2MTU=::UGxlYXNlIGVudGVyIHRoZSBkZXNpcmVkIFVuaXF1ZSBDaGlwIElEIGluIEhleGFkZWNpbWFsIGZvciBzaW11bGF0aW9uOg==\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_COMPONENT_PARAMETER \"SURfVkFMVUVfU1RS::MDAwMDAwMDBmZmZmZmZmZg==::SURfVkFMVUVfU1RS\"\n\nset_global_assignment -library \"uniqueid\" -name VERILOG_FILE [file join $::quartus(qip_path) \"uniqueid.v\"]\nset_global_assignment -library \"uniqueid\" -name VERILOG_FILE [file join $::quartus(qip_path) \"uniqueid/altchip_id.v\"]\n\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_TOOL_NAME \"altchip_id\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_TOOL_VERSION \"15.0\"\nset_global_assignment -entity \"altchip_id\" -library \"uniqueid\" -name IP_TOOL_ENV \"mwpim\"\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid.sip",
    "content": "set_global_assignment -entity \"uniqueid\" -library \"lib_uniqueid\" -name IP_TOOL_NAME \"altchip_id\"\nset_global_assignment -entity \"uniqueid\" -library \"lib_uniqueid\" -name IP_TOOL_VERSION \"15.0\"\nset_global_assignment -entity \"uniqueid\" -library \"lib_uniqueid\" -name IP_TOOL_ENV \"mwpim\"\nset_global_assignment -library \"lib_uniqueid\" -name SPD_FILE [file join $::quartus(sip_path) \"uniqueid.spd\"]\n\nset_global_assignment -library \"lib_uniqueid\" -name MISC_FILE [file join $::quartus(sip_path) \"uniqueid_sim/uniqueid.v\"]\nset_global_assignment -library \"lib_uniqueid\" -name MISC_FILE [file join $::quartus(sip_path) \"uniqueid_sim/altchip_id/altchip_id.v\"]\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid.spd",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<simPackage>\n <file\n   path=\"uniqueid_sim/altchip_id/altchip_id.v\"\n   type=\"VERILOG\"\n   library=\"uniqueid\" />\n <file path=\"uniqueid_sim/uniqueid.v\" type=\"VERILOG\" />\n <topLevel name=\"uniqueid\" />\n <deviceFamily name=\"max10\" />\n</simPackage>\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid.v",
    "content": "// megafunction wizard: %Altera Unique Chip ID v15.0%\r\n// GENERATION: XML\r\n// uniqueid.v\r\n\r\n// Generated using ACDS version 15.0 145\r\n\r\n`timescale 1 ps / 1 ps\r\nmodule uniqueid (\r\n\t\tinput  wire        clkin,      //  clkin.clk\r\n\t\tinput  wire        reset,      //  reset.reset\r\n\t\toutput wire        data_valid, // output.valid\r\n\t\toutput wire [63:0] chip_id     //       .data\r\n\t);\r\n\r\n\taltchip_id #(\r\n\t\t.DEVICE_FAMILY (\"MAX 10\"),\r\n\t\t.ID_VALUE      (64'b1111111111111111111111111111111111111111111111111111111111111111),\r\n\t\t.ID_VALUE_STR  (\"00000000ffffffff\")\r\n\t) uniqueid_inst (\r\n\t\t.clkin      (clkin),      //  clkin.clk\r\n\t\t.reset      (reset),      //  reset.reset\r\n\t\t.data_valid (data_valid), // output.valid\r\n\t\t.chip_id    (chip_id)     //       .data\r\n\t);\r\n\r\nendmodule\r\n// Retrieval info: <?xml version=\"1.0\"?>\r\n//<!--\r\n//\tGenerated by Altera MegaWizard Launcher Utility version 1.0\r\n//\t************************************************************\r\n//\tTHIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!\r\n//\t************************************************************\r\n//\tCopyright (C) 1991-2018 Altera Corporation\r\n//\tAny megafunction design, and related net list (encrypted or decrypted),\r\n//\tsupport information, device programming or simulation file, and any other\r\n//\tassociated documentation or information provided by Altera or a partner\r\n//\tunder Altera's Megafunction Partnership Program may be used only to\r\n//\tprogram PLD devices (but not masked PLD devices) from Altera.  Any other\r\n//\tuse of such megafunction design, net list, support information, device\r\n//\tprogramming or simulation file, or any other related documentation or\r\n//\tinformation is prohibited for any other purpose, including, but not\r\n//\tlimited to modification, reverse engineering, de-compiling, or use with\r\n//\tany other silicon devices, unless such use is explicitly licensed under\r\n//\ta separate agreement with Altera or a megafunction partner.  Title to\r\n//\tthe intellectual property, including patents, copyrights, trademarks,\r\n//\ttrade secrets, or maskworks, embodied in any such megafunction design,\r\n//\tnet list, support information, device programming or simulation file, or\r\n//\tany other related documentation or information provided by Altera or a\r\n//\tmegafunction partner, remains with Altera, the megafunction partner, or\r\n//\ttheir respective licensors.  No other licenses, including any licenses\r\n//\tneeded under any third party's intellectual property, are provided herein.\r\n//-->\r\n// Retrieval info: <instance entity-name=\"altchip_id\" version=\"15.0\" >\r\n// Retrieval info: \t<generic name=\"DEVICE_FAMILY\" value=\"MAX 10\" />\r\n// Retrieval info: \t<generic name=\"ID_VALUE\" value=\"18446744073709551615\" />\r\n// Retrieval info: </instance>\r\n// IPFS_FILES : uniqueid.vo\r\n// RELATED_FILES: uniqueid.v, altchip_id.v\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/aldec/rivierapro_setup.tcl",
    "content": "\n# (C) 2001-2018 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 15.0 145 win32 2018.01.13.13:59:31\n\n# ----------------------------------------\n# Auto-generated simulation script\n\n# ----------------------------------------\n# Initialize variables\nif ![info exists SYSTEM_INSTANCE_NAME] { \n  set SYSTEM_INSTANCE_NAME \"\"\n} elseif { ![ string match \"\" $SYSTEM_INSTANCE_NAME ] } { \n  set SYSTEM_INSTANCE_NAME \"/$SYSTEM_INSTANCE_NAME\"\n}\n\nif ![info exists TOP_LEVEL_NAME] { \n  set TOP_LEVEL_NAME \"uniqueid\"\n}\n\nif ![info exists QSYS_SIMDIR] { \n  set QSYS_SIMDIR \"./../\"\n}\n\nif ![info exists QUARTUS_INSTALL_DIR] { \n  set QUARTUS_INSTALL_DIR \"C:/altera/15.0/quartus/\"\n}\n\n# ----------------------------------------\n# Initialize simulation properties - DO NOT MODIFY!\nset ELAB_OPTIONS \"\"\nset SIM_OPTIONS \"\"\nif ![ string match \"*-64 vsim*\" [ vsim -version ] ] {\n} else {\n}\n\nset Aldec \"Riviera\"\nif { [ string match \"*Active-HDL*\" [ vsim -version ] ] } {\n  set Aldec \"Active\"\n}\n\nif { [ string match \"Active\" $Aldec ] } {\n  scripterconf -tcl\n  createdesign \"$TOP_LEVEL_NAME\"  \".\"\n  opendesign \"$TOP_LEVEL_NAME\"\n}\n\n# ----------------------------------------\n# Copy ROM/RAM files to simulation directory\nalias file_copy {\n  echo \"\\[exec\\] file_copy\"\n}\n\n# ----------------------------------------\n# Create compilation libraries\nproc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }\nensure_lib      ./libraries     \nensure_lib      ./libraries/work\nvmap       work ./libraries/work\nensure_lib                  ./libraries/altera_ver      \nvmap       altera_ver       ./libraries/altera_ver      \nensure_lib                  ./libraries/lpm_ver         \nvmap       lpm_ver          ./libraries/lpm_ver         \nensure_lib                  ./libraries/sgate_ver       \nvmap       sgate_ver        ./libraries/sgate_ver       \nensure_lib                  ./libraries/altera_mf_ver   \nvmap       altera_mf_ver    ./libraries/altera_mf_ver   \nensure_lib                  ./libraries/altera_lnsim_ver\nvmap       altera_lnsim_ver ./libraries/altera_lnsim_ver\nensure_lib                  ./libraries/fiftyfivenm_ver \nvmap       fiftyfivenm_ver  ./libraries/fiftyfivenm_ver \nensure_lib          ./libraries/uniqueid\nvmap       uniqueid ./libraries/uniqueid\n\n# ----------------------------------------\n# Compile device library files\nalias dev_com {\n  echo \"\\[exec\\] dev_com\"\n  vlog -v2k5 \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"              -work altera_ver      \n  vlog -v2k5 \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                       -work lpm_ver         \n  vlog -v2k5 \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                          -work sgate_ver       \n  vlog -v2k5 \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                      -work altera_mf_ver   \n  vlog       \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                  -work altera_lnsim_ver\n  vlog -v2k5 \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"              -work fiftyfivenm_ver \n  vlog -v2k5 \"$QUARTUS_INSTALL_DIR/eda/sim_lib/aldec/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \n}\n\n# ----------------------------------------\n# Compile the design files in correct order\nalias com {\n  echo \"\\[exec\\] com\"\n  vlog -v2k5 \"$QSYS_SIMDIR/altchip_id/altchip_id.v\" -work uniqueid\n  vlog -v2k5 \"$QSYS_SIMDIR/uniqueid.v\"                            \n}\n\n# ----------------------------------------\n# Elaborate top level design\nalias elab {\n  echo \"\\[exec\\] elab\"\n  eval vsim +access +r -t ps $ELAB_OPTIONS -L work -L uniqueid -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Elaborate the top level design with -dbg -O2 option\nalias elab_debug {\n  echo \"\\[exec\\] elab_debug\"\n  eval vsim -dbg -O2 +access +r -t ps $ELAB_OPTIONS -L work -L uniqueid -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design\nalias ld \"\n  dev_com\n  com\n  elab\n\"\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design with -dbg -O2\nalias ld_debug \"\n  dev_com\n  com\n  elab_debug\n\"\n\n# ----------------------------------------\n# Print out user commmand line aliases\nalias h {\n  echo \"List Of Command Line Aliases\"\n  echo\n  echo \"file_copy                     -- Copy ROM/RAM files to simulation directory\"\n  echo\n  echo \"dev_com                       -- Compile device library files\"\n  echo\n  echo \"com                           -- Compile the design files in correct order\"\n  echo\n  echo \"elab                          -- Elaborate top level design\"\n  echo\n  echo \"elab_debug                    -- Elaborate the top level design with -dbg -O2 option\"\n  echo\n  echo \"ld                            -- Compile all the design files and elaborate the top level design\"\n  echo\n  echo \"ld_debug                      -- Compile all the design files and elaborate the top level design with -dbg -O2\"\n  echo\n  echo \n  echo\n  echo \"List Of Variables\"\n  echo\n  echo \"TOP_LEVEL_NAME                -- Top level module name.\"\n  echo\n  echo \"SYSTEM_INSTANCE_NAME          -- Instantiated system module name inside top level module.\"\n  echo\n  echo \"QSYS_SIMDIR                   -- Qsys base simulation directory.\"\n  echo\n  echo \"QUARTUS_INSTALL_DIR           -- Quartus installation directory.\"\n}\nfile_copy\nh\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/altchip_id/altchip_id.v",
    "content": "// (C) 2001-2015 Altera Corporation. All rights reserved.\n// Your use of Altera Corporation's design tools, logic functions and other \n// software and tools, and its AMPP partner logic functions, and any output \n// files any of the foregoing (including device programming or simulation \n// files), and any associated documentation or information are expressly subject \n// to the terms and conditions of the Altera Program License Subscription \n// Agreement, Altera MegaCore Function License Agreement, or other applicable \n// license agreement, including, without limitation, that your use is for the \n// sole purpose of programming logic devices manufactured by Altera and sold by \n// Altera or its authorized distributors.  Please refer to the applicable \n// agreement for further details.\n\n\n////////////////////////////////////////////////////////////////////\r\n//\r\n//   ALTCHIP_ID\r\n//\r\n//  Copyright (C) 1991-2013 Altera Corporation\r\n//  Your use of Altera Corporation's design tools, logic functions \r\n//  and other software and tools, and its AMPP partner logic \r\n//  functions, and any output files from any of the foregoing \r\n//  (including device programming or simulation files), and any \r\n//  associated documentation or information are expressly subject \r\n//  to the terms and conditions of the Altera Program License \r\n//  Subscription Agreement, Altera MegaCore Function License \r\n//  Agreement, or other applicable license agreement, including, \r\n//  without limitation, that your use is for the sole purpose of \r\n//  programming logic devices manufactured by Altera and sold by \r\n//  Altera or its authorized distributors.  Please refer to the \r\n//  applicable agreement for further details.\r\n//\r\n////////////////////////////////////////////////////////////////////\r\n\r\n// synthesis VERILOG_INPUT_VERSION VERILOG_2001\r\n\r\nmodule  altchip_id\r\n\t( \r\n\tclkin,\r\n\tchip_id,\r\n\tdata_valid,\r\n\treset);\r\n\t\r\n\tinput\tclkin;\r\n\toutput\t[63:0]\tchip_id;\r\n\toutput\tdata_valid;\r\n\tinput\treset;\r\n\t\r\n\tparameter\tDEVICE_FAMILY = \"Stratix V\";\t\r\n\tparameter\tID_VALUE = 64'hffffffffffffffff;\r\n\tparameter\tID_VALUE_STR = \"ffffffffffffffff\";\r\n\t\r\n\t// clock cycle for shiftnld\r\n\tlocalparam\tLOAD_WIDTH\t= 'h01;\t\r\n\tlocalparam\tDATA_WIDTH\t= 'h60;\t// gray of binary 0100 0000, for 64 clock cycles\r\n\t\r\n\twire  \tclkin_wire;\r\n\twire\tcurrent_state_wire;\r\n\twire\tregout_wire;\r\n\twire\t[6:0]   wire_gen_cntr_q;\r\n\twire\t[63:0]\twire_shift_reg_q;\r\n\twire \treset_wire;\r\n\treg\t\tcurrent_state_reg;\r\n\treg\t\tdata_valid_reg;\r\n\treg\t\tend_op_reg;\r\n\treg\t\tend_stage_pos_reg;\r\n\treg\t\t[63:0]\toutput_reg;\r\n\treg\t\tbusy_reg;\r\n\t\r\n\tinitial begin\r\n\t\tcurrent_state_reg = 1'b0;\r\n\t\tdata_valid_reg = 1'b0;\r\n\t\tend_op_reg = 1'b0;\r\n\t\tend_stage_pos_reg = 1'b0;\r\n\t\toutput_reg = 64'h0000000000000000;\r\n\t\tbusy_reg = 1'b0;\r\n\tend\r\n\t\r\n\t// clkin and reset input\r\n\tassign clkin_wire = clkin;\r\n\tassign reset_wire = reset; \r\n\t\r\n\t// busy_reg to indicate read id operation is in progress\r\n\talways @ (posedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) busy_reg <= 1'b0;\r\n\t\telse if (data_valid_reg) busy_reg <= 1'b0;\r\n\t\telse busy_reg <= 1'b1;\r\n\t\t\r\n\t// general counter to count the number of clock cycles in each stage\r\n\ta_graycounter #(\r\n\t\t.width (7),\r\n\t\t.lpm_type (\"a_graycounter\"),\r\n\t\t.pvalue (0)\r\n\t) gen_cntr ( \r\n\t\t.aclr(reset_wire),\r\n\t\t.clk_en(busy_reg),\r\n\t\t.clock(~ clkin_wire),\r\n\t\t.q(wire_gen_cntr_q),\r\n\t\t.qbin(),\r\n\t\t.sclr(end_stage_pos_reg | end_op_reg),\r\n\t\t.cnt_en(1'b1),\r\n\t\t.updown(1'b1)\r\n\t);\r\n\t\r\n\t// state machine to control the shiftnld of chipidblock\r\n\t// state 0 - loading the unique chip id from fuse to shift register, 1 clock cycle\r\n\t// state 1 - shifting shift register to read out the value of unique chip id, 64 clock cycles\r\n\talways @ (posedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1)  current_state_reg <= 1'b0;\r\n\t\telse if (busy_reg == 1'b0) current_state_reg <= 1'b0;\r\n\t\telse if (data_valid_reg == 1'b1) current_state_reg <= 1'b0;\r\n\t\telse if (end_stage_pos_reg == 1'b1) current_state_reg <= (~ current_state_wire);\r\n\t\telse current_state_reg <= current_state_reg;\r\n\tassign current_state_wire = current_state_reg;\r\n\t\r\n\t// end stage signal\r\n\talways @ (posedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) end_stage_pos_reg <= 1'b0;\r\n\t\telse if (data_valid_reg == 1'b1) end_stage_pos_reg <= 1'b0;\r\n\t\telse end_stage_pos_reg <= (((~ current_state_wire) & (wire_gen_cntr_q == LOAD_WIDTH)) | \r\n\t\t\t\t\t\t\t\t\t\t(current_state_wire & (wire_gen_cntr_q == DATA_WIDTH)));\r\n\t\r\n\talways @ (negedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) end_op_reg <= 1'b0;\r\n\t\telse end_op_reg <= (current_state_wire & end_stage_pos_reg);\r\n\t\t\r\n\t// -------------------------------------------------------------------\r\n\t// Instantiate wysiwyg for chipidblock according to device family\r\n\t// -------------------------------------------------------------------\t\r\n\tgenerate\r\n\t\tif (DEVICE_FAMILY == \"MAX 10\") begin\t\t//MAX 10 FPGA\r\n\t\t\tfiftyfivenm_chipidblock #(\r\n\t\t\t\t.id_value(ID_VALUE_STR)\r\n\t\t\t) chipidblock_dut ( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\r\n\t\telse if (DEVICE_FAMILY == \"Stratix V\") begin\t\t//Stratix V\r\n\t\t\tstratixv_chipidblock #(\r\n\t\t\t\t.ID_VALUE(ID_VALUE)\r\n\t\t\t) chipidblock_dut ( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\r\n\t\telse if (DEVICE_FAMILY == \"Arria V GZ\") begin\t\t//Arria V GZ\r\n\t\t\tarriavgz_chipidblock #(\r\n\t\t\t\t.ID_VALUE(ID_VALUE)\r\n\t\t\t) chipidblock_dut ( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\t\t\r\n\t\telse if (DEVICE_FAMILY == \"Arria V\") begin\t\t//Arria V\r\n\t\t\tarriav_chipidblock #(\r\n\t\t\t\t.ID_VALUE(ID_VALUE)\r\n\t\t\t) chipidblock_dut ( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\r\n\t\telse begin\t\t\t\t\t\t//Cyclone V\r\n\t\t\tcyclonev_chipidblock #(\r\n\t\t\t\t.ID_VALUE(ID_VALUE)\r\n\t\t\t) chipidblock_dut ( \r\n\t\t\t\t.clk(clkin_wire),\r\n\t\t\t\t.regout(regout_wire),\r\n\t\t\t\t.shiftnld(current_state_wire));\r\n\t\t\tend\r\n\tendgenerate\r\n\t\r\n\t// -------------------------------------------------------------------\r\n\t// Output signals\r\n\t// -------------------------------------------------------------------\r\n\t// data_valid output - operation is completed\r\n\talways @ (posedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) data_valid_reg <= 1'b0;\r\n\t\telse if (end_op_reg == 1'b1) data_valid_reg <= 1'b1;\r\n\t\telse data_valid_reg <= data_valid_reg;\r\n\tassign data_valid = data_valid_reg;\r\n\t\r\n\t// shift register to convert serial output to parallel\r\n\tlpm_shiftreg #(\r\n\t\t.lpm_direction (\"RIGHT\"),\r\n\t\t.lpm_type (\"LPM_SHIFTREG\"),\r\n\t\t.lpm_width (64)\r\n\t) shift_reg ( \r\n\t\t.aclr (reset_wire),\r\n\t\t.clock (clkin_wire),\r\n\t\t.shiftin (regout_wire),\r\n\t\t.q (wire_shift_reg_q),\r\n\t\t.enable(((~ end_op_reg) & (~ data_valid_reg)) | (~ busy_reg)),\r\n\t\t.aset (1'b0),\r\n\t\t.data (64'b0),\r\n\t\t.load (1'b0),\r\n\t\t.sclr (~ busy_reg),\r\n\t\t.shiftout (),\r\n\t\t.sset (1'b0)\r\n\t);\r\n\t\r\n\talways @ (negedge clkin_wire or posedge reset_wire)\r\n\t\tif (reset_wire == 1'b1) output_reg <= 64'h0000000000000000;\r\n\t\telse if (data_valid_reg == 1'b0) begin\r\n\t\t\tif  (end_stage_pos_reg == 1'b1)   output_reg <= {wire_shift_reg_q[63:0]};\r\n\t\t\telse output_reg <= output_reg;\r\n\t\tend\r\n\t\telse output_reg <= output_reg;\r\n\t\r\n\t//output\r\n\tassign chip_id = output_reg;\r\n\t\t\r\nendmodule //altchip_id"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/cadence/cds.lib",
    "content": "\nDEFINE std              $CDS_ROOT/tools/inca/files/STD/           \nDEFINE synopsys         $CDS_ROOT/tools/inca/files/SYNOPSYS/      \nDEFINE ieee             $CDS_ROOT/tools/inca/files/IEEE/          \nDEFINE ambit            $CDS_ROOT/tools/inca/files/AMBIT/         \nDEFINE vital_memory     $CDS_ROOT/tools/inca/files/VITAL_MEMORY/  \nDEFINE ncutils          $CDS_ROOT/tools/inca/files/NCUTILS/       \nDEFINE ncinternal       $CDS_ROOT/tools/inca/files/NCINTERNAL/    \nDEFINE ncmodels         $CDS_ROOT/tools/inca/files/NCMODELS/      \nDEFINE cds_assertions   $CDS_ROOT/tools/inca/files/CDS_ASSERTIONS/\nDEFINE work             ./libraries/work/                         \nDEFINE uniqueid         ./libraries/uniqueid/                     \nDEFINE altera_ver       ./libraries/altera_ver/                   \nDEFINE lpm_ver          ./libraries/lpm_ver/                      \nDEFINE sgate_ver        ./libraries/sgate_ver/                    \nDEFINE altera_mf_ver    ./libraries/altera_mf_ver/                \nDEFINE altera_lnsim_ver ./libraries/altera_lnsim_ver/             \nDEFINE fiftyfivenm_ver  ./libraries/fiftyfivenm_ver/              \n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/cadence/cds_libs/uniqueid.cds.lib",
    "content": "\nDEFINE std              $CDS_ROOT/tools/inca/files/STD/           \nDEFINE synopsys         $CDS_ROOT/tools/inca/files/SYNOPSYS/      \nDEFINE ieee             $CDS_ROOT/tools/inca/files/IEEE/          \nDEFINE ambit            $CDS_ROOT/tools/inca/files/AMBIT/         \nDEFINE vital_memory     $CDS_ROOT/tools/inca/files/VITAL_MEMORY/  \nDEFINE ncutils          $CDS_ROOT/tools/inca/files/NCUTILS/       \nDEFINE ncinternal       $CDS_ROOT/tools/inca/files/NCINTERNAL/    \nDEFINE ncmodels         $CDS_ROOT/tools/inca/files/NCMODELS/      \nDEFINE cds_assertions   $CDS_ROOT/tools/inca/files/CDS_ASSERTIONS/\nDEFINE work             ./../libraries/work/                      \nDEFINE altera_ver       ./../libraries/altera_ver/                \nDEFINE lpm_ver          ./../libraries/lpm_ver/                   \nDEFINE sgate_ver        ./../libraries/sgate_ver/                 \nDEFINE altera_mf_ver    ./../libraries/altera_mf_ver/             \nDEFINE altera_lnsim_ver ./../libraries/altera_lnsim_ver/          \nDEFINE fiftyfivenm_ver  ./../libraries/fiftyfivenm_ver/           \nDEFINE uniqueid         ./../libraries/uniqueid/                  \n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/cadence/hdl.var",
    "content": "\nDEFINE WORK work\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/cadence/ncsim_setup.sh",
    "content": "\n# (C) 2001-2018 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 15.0 145 win32 2018.01.13.13:59:31\n\n# ----------------------------------------\n# ncsim - auto-generated simulation script\n\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"uniqueid\"\nQSYS_SIMDIR=\"./../\"\nQUARTUS_INSTALL_DIR=\"C:/altera/15.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_DEV_COM=0\nSKIP_COM=0\nSKIP_ELAB=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"-input \\\"@run 100; exit\\\"\"\n\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_ELAB=1 SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `ncsim -version` != *\"ncsim(64)\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# create compilation libraries\nmkdir -p ./libraries/work/\nmkdir -p ./libraries/uniqueid/\nmkdir -p ./libraries/altera_ver/\nmkdir -p ./libraries/lpm_ver/\nmkdir -p ./libraries/sgate_ver/\nmkdir -p ./libraries/altera_mf_ver/\nmkdir -p ./libraries/altera_lnsim_ver/\nmkdir -p ./libraries/fiftyfivenm_ver/\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\n# ----------------------------------------\n# compile device library files\nif [ $SKIP_DEV_COM -eq 0 ]; then\n  ncvlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"                -work altera_ver      \n  ncvlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                         -work lpm_ver         \n  ncvlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                            -work sgate_ver       \n  ncvlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                        -work altera_mf_ver   \n  ncvlog -sv \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                    -work altera_lnsim_ver\n  ncvlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"                -work fiftyfivenm_ver \n  ncvlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/cadence/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \nfi\n\n# ----------------------------------------\n# compile design files in correct order\nif [ $SKIP_COM -eq 0 ]; then\n  ncvlog \"$QSYS_SIMDIR/altchip_id/altchip_id.v\" -work uniqueid -cdslib ./cds_libs/uniqueid.cds.lib\n  ncvlog \"$QSYS_SIMDIR/uniqueid.v\"                                                                \nfi\n\n# ----------------------------------------\n# elaborate top level design\nif [ $SKIP_ELAB -eq 0 ]; then\n  ncelab -access +w+r+c -namemap_mixgen $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME\nfi\n\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  eval ncsim -licqueue $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS $TOP_LEVEL_NAME\nfi\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/mentor/msim_setup.tcl",
    "content": "\n# (C) 2001-2018 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 15.0 145 win32 2018.01.13.13:59:31\n\n# ----------------------------------------\n# Auto-generated simulation script\n\n# ----------------------------------------\n# Initialize variables\nif ![info exists SYSTEM_INSTANCE_NAME] { \n  set SYSTEM_INSTANCE_NAME \"\"\n} elseif { ![ string match \"\" $SYSTEM_INSTANCE_NAME ] } { \n  set SYSTEM_INSTANCE_NAME \"/$SYSTEM_INSTANCE_NAME\"\n}\n\nif ![info exists TOP_LEVEL_NAME] { \n  set TOP_LEVEL_NAME \"uniqueid\"\n}\n\nif ![info exists QSYS_SIMDIR] { \n  set QSYS_SIMDIR \"./../\"\n}\n\nif ![info exists QUARTUS_INSTALL_DIR] { \n  set QUARTUS_INSTALL_DIR \"C:/altera/15.0/quartus/\"\n}\n\n# ----------------------------------------\n# Initialize simulation properties - DO NOT MODIFY!\nset ELAB_OPTIONS \"\"\nset SIM_OPTIONS \"\"\nif ![ string match \"*-64 vsim*\" [ vsim -version ] ] {\n} else {\n}\n\n# ----------------------------------------\n# Copy ROM/RAM files to simulation directory\nalias file_copy {\n  echo \"\\[exec\\] file_copy\"\n}\n\n# ----------------------------------------\n# Create compilation libraries\nproc ensure_lib { lib } { if ![file isdirectory $lib] { vlib $lib } }\nensure_lib          ./libraries/     \nensure_lib          ./libraries/work/\nvmap       work     ./libraries/work/\nvmap       work_lib ./libraries/work/\nif ![ string match \"*ModelSim ALTERA*\" [ vsim -version ] ] {\n  ensure_lib                  ./libraries/altera_ver/      \n  vmap       altera_ver       ./libraries/altera_ver/      \n  ensure_lib                  ./libraries/lpm_ver/         \n  vmap       lpm_ver          ./libraries/lpm_ver/         \n  ensure_lib                  ./libraries/sgate_ver/       \n  vmap       sgate_ver        ./libraries/sgate_ver/       \n  ensure_lib                  ./libraries/altera_mf_ver/   \n  vmap       altera_mf_ver    ./libraries/altera_mf_ver/   \n  ensure_lib                  ./libraries/altera_lnsim_ver/\n  vmap       altera_lnsim_ver ./libraries/altera_lnsim_ver/\n  ensure_lib                  ./libraries/fiftyfivenm_ver/ \n  vmap       fiftyfivenm_ver  ./libraries/fiftyfivenm_ver/ \n}\nensure_lib          ./libraries/uniqueid/\nvmap       uniqueid ./libraries/uniqueid/\n\n# ----------------------------------------\n# Compile device library files\nalias dev_com {\n  echo \"\\[exec\\] dev_com\"\n  if ![ string match \"*ModelSim ALTERA*\" [ vsim -version ] ] {\n    vlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"               -work altera_ver      \n    vlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                        -work lpm_ver         \n    vlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                           -work sgate_ver       \n    vlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                       -work altera_mf_ver   \n    vlog -sv \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                   -work altera_lnsim_ver\n    vlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"               -work fiftyfivenm_ver \n    vlog     \"$QUARTUS_INSTALL_DIR/eda/sim_lib/mentor/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \n  }\n}\n\n# ----------------------------------------\n# Compile the design files in correct order\nalias com {\n  echo \"\\[exec\\] com\"\n  vlog \"$QSYS_SIMDIR/altchip_id/altchip_id.v\" -work uniqueid\n  vlog \"$QSYS_SIMDIR/uniqueid.v\"                            \n}\n\n# ----------------------------------------\n# Elaborate top level design\nalias elab {\n  echo \"\\[exec\\] elab\"\n  eval vsim -t ps $ELAB_OPTIONS -L work -L work_lib -L uniqueid -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Elaborate the top level design with novopt option\nalias elab_debug {\n  echo \"\\[exec\\] elab_debug\"\n  eval vsim -novopt -t ps $ELAB_OPTIONS -L work -L work_lib -L uniqueid -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L fiftyfivenm_ver $TOP_LEVEL_NAME\n}\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design\nalias ld \"\n  dev_com\n  com\n  elab\n\"\n\n# ----------------------------------------\n# Compile all the design files and elaborate the top level design with -novopt\nalias ld_debug \"\n  dev_com\n  com\n  elab_debug\n\"\n\n# ----------------------------------------\n# Print out user commmand line aliases\nalias h {\n  echo \"List Of Command Line Aliases\"\n  echo\n  echo \"file_copy                     -- Copy ROM/RAM files to simulation directory\"\n  echo\n  echo \"dev_com                       -- Compile device library files\"\n  echo\n  echo \"com                           -- Compile the design files in correct order\"\n  echo\n  echo \"elab                          -- Elaborate top level design\"\n  echo\n  echo \"elab_debug                    -- Elaborate the top level design with novopt option\"\n  echo\n  echo \"ld                            -- Compile all the design files and elaborate the top level design\"\n  echo\n  echo \"ld_debug                      -- Compile all the design files and elaborate the top level design with -novopt\"\n  echo\n  echo \n  echo\n  echo \"List Of Variables\"\n  echo\n  echo \"TOP_LEVEL_NAME                -- Top level module name.\"\n  echo\n  echo \"SYSTEM_INSTANCE_NAME          -- Instantiated system module name inside top level module.\"\n  echo\n  echo \"QSYS_SIMDIR                   -- Qsys base simulation directory.\"\n  echo\n  echo \"QUARTUS_INSTALL_DIR           -- Quartus installation directory.\"\n}\nfile_copy\nh\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/synopsys/vcs/vcs_setup.sh",
    "content": "\n# (C) 2001-2018 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 15.0 145 win32 2018.01.13.13:59:31\n\n# ----------------------------------------\n# vcs - auto-generated simulation script\n\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"uniqueid\"\nQSYS_SIMDIR=\"./../../\"\nQUARTUS_INSTALL_DIR=\"C:/altera/15.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_ELAB=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"+vcs+finish+100\"\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_ELAB=1 SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `vcs -platform` != *\"amd64\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\nvcs -lca -timescale=1ps/1ps -sverilog +verilog2001ext+.v -ntb_opts dtm $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v \\\n  $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v \\\n  -v $QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/fiftyfivenm_atoms_ncrypt.v \\\n  $QSYS_SIMDIR/altchip_id/altchip_id.v \\\n  $QSYS_SIMDIR/uniqueid.v \\\n  -top $TOP_LEVEL_NAME\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  ./simv $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS\nfi\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/synopsys/vcsmx/synopsys_sim.setup",
    "content": "\nWORK > DEFAULT\nDEFAULT:          ./libraries/work/            \nwork:             ./libraries/work/            \nuniqueid:         ./libraries/uniqueid/        \naltera_ver:       ./libraries/altera_ver/      \nlpm_ver:          ./libraries/lpm_ver/         \nsgate_ver:        ./libraries/sgate_ver/       \naltera_mf_ver:    ./libraries/altera_mf_ver/   \naltera_lnsim_ver: ./libraries/altera_lnsim_ver/\nfiftyfivenm_ver:  ./libraries/fiftyfivenm_ver/ \n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/synopsys/vcsmx/vcsmx_setup.sh",
    "content": "\n# (C) 2001-2018 Altera Corporation. All rights reserved.\n# Your use of Altera Corporation's design tools, logic functions and \n# other software and tools, and its AMPP partner logic functions, and \n# any output files any of the foregoing (including device programming \n# or simulation files), and any associated documentation or information \n# are expressly subject to the terms and conditions of the Altera \n# Program License Subscription Agreement, Altera MegaCore Function \n# License Agreement, or other applicable license agreement, including, \n# without limitation, that your use is for the sole purpose of \n# programming logic devices manufactured by Altera and sold by Altera \n# or its authorized distributors. Please refer to the applicable \n# agreement for further details.\n\n# ACDS 15.0 145 win32 2018.01.13.13:59:31\n\n# ----------------------------------------\n# vcsmx - auto-generated simulation script\n\n# ----------------------------------------\n# initialize variables\nTOP_LEVEL_NAME=\"uniqueid\"\nQSYS_SIMDIR=\"./../../\"\nQUARTUS_INSTALL_DIR=\"C:/altera/15.0/quartus/\"\nSKIP_FILE_COPY=0\nSKIP_DEV_COM=0\nSKIP_COM=0\nSKIP_ELAB=0\nSKIP_SIM=0\nUSER_DEFINED_ELAB_OPTIONS=\"\"\nUSER_DEFINED_SIM_OPTIONS=\"+vcs+finish+100\"\n\n# ----------------------------------------\n# overwrite variables - DO NOT MODIFY!\n# This block evaluates each command line argument, typically used for \n# overwriting variables. An example usage:\n#   sh <simulator>_setup.sh SKIP_ELAB=1 SKIP_SIM=1\nfor expression in \"$@\"; do\n  eval $expression\n  if [ $? -ne 0 ]; then\n    echo \"Error: This command line argument, \\\"$expression\\\", is/has an invalid expression.\" >&2\n    exit $?\n  fi\ndone\n\n# ----------------------------------------\n# initialize simulation properties - DO NOT MODIFY!\nELAB_OPTIONS=\"\"\nSIM_OPTIONS=\"\"\nif [[ `vcs -platform` != *\"amd64\"* ]]; then\n  :\nelse\n  :\nfi\n\n# ----------------------------------------\n# create compilation libraries\nmkdir -p ./libraries/work/\nmkdir -p ./libraries/uniqueid/\nmkdir -p ./libraries/altera_ver/\nmkdir -p ./libraries/lpm_ver/\nmkdir -p ./libraries/sgate_ver/\nmkdir -p ./libraries/altera_mf_ver/\nmkdir -p ./libraries/altera_lnsim_ver/\nmkdir -p ./libraries/fiftyfivenm_ver/\n\n# ----------------------------------------\n# copy RAM/ROM files to simulation directory\n\n# ----------------------------------------\n# compile device library files\nif [ $SKIP_DEV_COM -eq 0 ]; then\n  vlogan +v2k           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_primitives.v\"                 -work altera_ver      \n  vlogan +v2k           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/220model.v\"                          -work lpm_ver         \n  vlogan +v2k           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/sgate.v\"                             -work sgate_ver       \n  vlogan +v2k           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_mf.v\"                         -work altera_mf_ver   \n  vlogan +v2k -sverilog \"$QUARTUS_INSTALL_DIR/eda/sim_lib/altera_lnsim.sv\"                     -work altera_lnsim_ver\n  vlogan +v2k           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/fiftyfivenm_atoms.v\"                 -work fiftyfivenm_ver \n  vlogan +v2k           \"$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/fiftyfivenm_atoms_ncrypt.v\" -work fiftyfivenm_ver \nfi\n\n# ----------------------------------------\n# compile design files in correct order\nif [ $SKIP_COM -eq 0 ]; then\n  vlogan +v2k \"$QSYS_SIMDIR/altchip_id/altchip_id.v\" -work uniqueid\n  vlogan +v2k \"$QSYS_SIMDIR/uniqueid.v\"                            \nfi\n\n# ----------------------------------------\n# elaborate top level design\nif [ $SKIP_ELAB -eq 0 ]; then\n  vcs -lca -t ps $ELAB_OPTIONS $USER_DEFINED_ELAB_OPTIONS $TOP_LEVEL_NAME\nfi\n\n# ----------------------------------------\n# simulate\nif [ $SKIP_SIM -eq 0 ]; then\n  ./simv $SIM_OPTIONS $USER_DEFINED_SIM_OPTIONS\nfi\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim/uniqueid.v",
    "content": "// uniqueid.v\r\n\r\n// Generated using ACDS version 15.0 145\r\n\r\n`timescale 1 ps / 1 ps\nmodule uniqueid (\r\n\t\tinput  wire        clkin,      //  clkin.clk\n\t\tinput  wire        reset,      //  reset.reset\n\t\toutput wire        data_valid, // output.valid\n\t\toutput wire [63:0] chip_id     //       .data\n\t);\r\n\r\n\taltchip_id #(\r\n\t\t.DEVICE_FAMILY (\"MAX 10\"),\r\n\t\t.ID_VALUE      (64'b1111111111111111111111111111111111111111111111111111111111111111),\r\n\t\t.ID_VALUE_STR  (\"00000000ffffffff\")\r\n\t) uniqueid_inst (\n\t\t.clkin      (clkin),      //  clkin.clk\n\t\t.reset      (reset),      //  reset.reset\n\t\t.data_valid (data_valid), // output.valid\n\t\t.chip_id    (chip_id)     //       .data\n\t);\r\n\r\nendmodule\r\n"
  },
  {
    "path": "max10_adc_firmware_v8/uniqueid_sim.f",
    "content": "uniqueid_sim/uniqueid.v\nuniqueid_sim/altchip_id/altchip_id.v\n"
  },
  {
    "path": "max10_adc_firmware_v8/upload_latest_flash.sh",
    "content": "~/intelFPGA/18.0/qprogrammer/bin/quartus_pgm -bgp -m jtag -o \"p;output_files/serial1.pof\"\n\n"
  },
  {
    "path": "max10_adc_firmware_v8/upload_latest_temp.sh",
    "content": "~/intelFPGA/18.0/qprogrammer/bin/quartus_pgm -m jtag -o \"p;output_files/serial1.sof\"\n\n"
  },
  {
    "path": "software/.gitignore",
    "content": "venv*\n__pycache__\n*.pyc\n"
  },
  {
    "path": "software/51-usbblaster.rules",
    "content": "#The USB Blaster udev rules on the Altera website\n#( http://www.altera.com/download/drivers/dri-usb_b-lnx.html )\n#did not work for me on Debian Jessie/Sid. A modified version of the file, listed below, works for me \n#(this is the contents of /etc/udev/rules.d/51-usbblaster.rules ). After restarting udev \n#(`sudo service udev restart`) I was able to program the DE0-Nano.\n\n# USB-Blaster\nSUBSYSTEM==\"usb\", ATTR{idVendor}==\"09fb\", ATTR{idProduct}==\"6001\", MODE=\"0666\", GROUP=\"plugdev\"\nSUBSYSTEM==\"usb\", ATTR{idVendor}==\"09fb\", ATTR{idProduct}==\"6002\", MODE=\"0666\", GROUP=\"plugdev\"\nSUBSYSTEM==\"usb\", ATTR{idVendor}==\"09fb\", ATTR{idProduct}==\"6003\", MODE=\"0666\", GROUP=\"plugdev\"\n\n# USB-Blaster II\nSUBSYSTEM==\"usb\", ATTR{idVendor}==\"09fb\", ATTR{idProduct}==\"6010\", MODE=\"0666\", GROUP=\"plugdev\"\nSUBSYSTEM==\"usb\", ATTR{idVendor}==\"09fb\", ATTR{idProduct}==\"6810\", MODE=\"0666\", GROUP=\"plugdev\"\n\n"
  },
  {
    "path": "software/CH341SER_LINUX/Makefile",
    "content": "ifeq ($(KERNELRELEASE), )\nKERNELDIR := /lib/modules/$(shell uname -r)/build\nPWD :=$(shell pwd)\ndefault:\n\t$(MAKE) -C $(KERNELDIR)  M=$(PWD)  \nclean:\n\trm -rf .tmp_versions Module.symvers *.mod.c *.o *.ko .*.cmd Module.markers modules.order\nload:\n\tmodprobe usbserial\n\tinsmod ch34x.ko\nunload:\n\trmmod ch34x\nelse\n\tobj-m := ch34x.o\nendif\n"
  },
  {
    "path": "software/CH341SER_LINUX/ch34x.c",
    "content": "// 2013.7\n//********************************************\n//**  Copyright  (C)  WCH  2002-2013    ******\n//**  Web:  http://www.winchiphead.com  ******\n//********************************************\n//**  Driver for USB to serial adaptor CH34X**\n//**  GCC                                   **\n//********************************************\n\n// Support linux kernel version 2.6.25 and later\n//\n\n#include <linux/version.h>\n#ifndef KERNEL_VERSION\n#define\tKERNEL_VERSION(ver, rel, seq)\t((ver << 16) | (rel << 8) | (seq))\n#endif\n\n#include <linux/kernel.h>\n#include <linux/errno.h>\n#include <linux/init.h>\n#include <linux/slab.h>\n#include <linux/tty.h>\n#include <linux/tty_driver.h>\n#include <linux/tty_flip.h>\n#include <linux/serial.h>\n#include <linux/module.h>\n#include <linux/moduleparam.h>\n#include <linux/spinlock.h>\n#include <asm/uaccess.h>\n//#include <linux/uaccess.h>\n#include <linux/usb.h>\n#include <linux/usb/serial.h>\n\n#define DRIVER_DESC\t\t\"WCH CH34x USB to serial adaptor driver\"\n#define DRIVER_AUTHOR\t\"<tech@wch.cn>\"\n\n#define CH34x_VENDOR_ID\t\t0x1A86\n#define CH340_PRODUCT_ID\t0x7523\n#define CH341_PRODUCT_ID\t0x5523\n\n#define CH34x_CLOSING_WAIT\t(30 * HZ)\n\n#define CH34x_BUF_SIZE\t\t1024\n#define CH34x_TMP_BUF_SIZE\t1024\n\n//Vendor define\n#define VENDOR_WRITE_TYPE\t\t0x40\n#define VENDOR_READ_TYPE\t\t0xC0\n\n#define VENDOR_READ\t\t\t\t0x95\n#define VENDOR_WRITE\t\t\t0x9A\n#define VENDOR_SERIAL_INIT\t\t0xA1\n#define VENDOR_MODEM_OUT\t\t0xA4\n#define VENDOR_VERSION\t\t\t0x5F\n\n//For CMD 0xA4\n#define UART_CTS\t\t0x01\n#define UART_DSR\t\t0x02\n#define UART_RING\t\t0x04\n#define UART_DCD\t\t0x08\n#define CONTROL_OUT\t\t0x10\n#define CONTROL_DTR\t\t0x20\n#define\tCONTROL_RTS\t\t0x40\n\n//Uart state\n#define UART_STATE\t\t\t0x00\n#define UART_OVERRUN_ERROR\t0x01\n#define UART_BREAK_ERROR\t//no define\n#define UART_PARITY_ERROR\t0x02\n#define UART_FRAME_ERROR\t0x06\n#define UART_RECV_ERROR\t\t0x02\n#define UART_STATE_TRANSIENT_MASK\t0x07\n\n//Port state\n#define PORTA_STATE\t\t0x01\n#define PORTB_STATE\t\t0x02\n#define PORTC_STATE\t\t0x03\n\n//CH34x Baud Rate\n#define CH34x_BAUDRATE_FACTOR\t1532620800\n#define CH34x_BAUDRATE_DIVMAX\t3\n\n#define DEBUG_CH34x\n#undef  DEBUG_CH34x\n\n#ifdef DEBUG_CH34x\n#define dbg_ch34x( format, arg... )\t\t\\\n\tprintk( KERN_DEBUG \"%d: \" format \"\\n\", __LINE__, ##arg )\n#else\n#define dbg_ch34x( format, arg... )\t\t\\\ndo{\t\t\t\t\t\t\t\t\t\\\n\tif(0)\t\t\t\t\t\t\t\\\n\t\tprintk(KERN_DEBUG \"%d: \" format \"\\n\", __LINE__, ##arg);\t\\\n} while (0)\n#endif\n\n#ifdef DEBUG_CH34x\n#define err_ch34x( format, arg... )\t\t\\\n\tprintk(KERN_ERR KBUILD_MODNAME \": \" format \"\\n\", ##arg)\n#else\n#define err_ch34x( format, arg... )   \\\ndo{\t\t\t\t\t\t\t\t\\\n\tif(0)\t\t\t\t\t\t\\\n\tprintk( KERN_ERR KBUILD_MODNAME \": \" format \"\\n\", ##arg)\\\n}while(0)\t\t\t\t\t\t\n#endif\n\n// For debug\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,1))\nstatic int debug = 1;\n#endif\n\nstruct ch34x_buf {\n\tunsigned int buf_size;\n\tchar *buf_buf;\n\tchar *buf_get;\n\tchar *buf_put;\n};\n\nstruct ch34x_private {\n\tspinlock_t\tlock;\t//access lock\n\tstruct ch34x_buf\t*buf;\n\tint\twrite_urb_in_use;\n\tunsigned baud_rate;\n\twait_queue_head_t\tdelta_msr_wait;\n\tu8\tline_control;\n\tu8\tline_status;\n\tu8\ttermios_initialized;\n};\n\nstatic struct usb_device_id\tid_table [] = {\n\t{ USB_DEVICE(CH34x_VENDOR_ID, CH340_PRODUCT_ID) },\n\t{ USB_DEVICE(CH34x_VENDOR_ID, CH341_PRODUCT_ID) },\n\t{ } //End\n};\nMODULE_DEVICE_TABLE( usb, id_table );\n\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,5,2))\nstatic struct usb_driver ch34x_driver = {\n\t.name\t\t   = \"ch34x\",\n\t.probe\t\t   = usb_serial_probe,\n\t.disconnect\t   = usb_serial_disconnect,\n\t.id_table\t   = id_table,\n\t.suspend\t   = usb_serial_suspend,\n\t.resume\t\t   = usb_serial_resume,\n\t.no_dynamic_id = 1,\n\t.supports_autosuspend = 1,\n};\n#endif\n\n// ch34x_buf_alloc\n// Allocate a circular buffer and all associated memory\nstatic struct ch34x_buf *ch34x_buf_alloc( unsigned int size )\n{\n\tstruct ch34x_buf *pb;\n\n\tif( size == 0 )\n\t\treturn NULL;\n\n\tpb = kmalloc( sizeof(struct ch34x_buf), GFP_KERNEL );\n\tif( pb == NULL )\n\t\treturn NULL;\n\n\tpb->buf_buf = kmalloc( size, GFP_KERNEL );\n\tif( pb->buf_buf == NULL ) {\n\t\tkfree(pb);\n\t\treturn NULL;\n\t}\n\n\tpb->buf_size = size;\n\tpb->buf_get = pb->buf_put = pb->buf_buf;\n\n\treturn pb;\n}\n\n// ch34x_buf_free\n// Free the buffer and all associated memory\nstatic void ch34x_buf_free( struct ch34x_buf *pb )\n{\n\tif( pb ) {\n\t\tkfree( pb->buf_buf );\n\t\tkfree( pb );\n\t}\n}\n\n// ch34x_buf_clear\n// Clear out all data in the circular buffer\nstatic void ch34x_buf_clear( struct ch34x_buf *pb )\n{\n\tif( pb != NULL ) \n\t\tpb->buf_get = pb->buf_put;\n\t// equivalent to a get of all data available\n}\n\n// ch34x_buf_data_avail\n// Return the number of bytes of data available in he circular buffer\nstatic unsigned int ch34x_buf_data_avail( struct ch34x_buf *pb )\n{\n\tif( pb == NULL )\n\t\treturn 0;\n\n\treturn ((pb->buf_size + pb->buf_put - pb->buf_get) % pb->buf_size );\n}\n\n// ch34x_buf_space_avail\n// Return the number of bytes of space available in the circular\nstatic unsigned int ch34x_buf_space_avail( struct ch34x_buf *pb )\n{\n\tif( pb == NULL )\n\t\treturn 0;\n\n\treturn ((pb->buf_size + pb->buf_get - pb->buf_put - 1) % pb->buf_size );\n}\n\n// ch34x_buf_put\n// Copy data from a user buffer and put it into the circular buffer.\n// Restrict to the amount of space available\n// Return the number of bytes copied\nstatic unsigned int ch34x_buf_put( struct ch34x_buf *pb,\n\t\tconst char *buf, unsigned int count )\n{\n\tunsigned int len;\n\n\tif( pb == NULL )\n\t\treturn 0;\n\n\tlen = ch34x_buf_space_avail(pb);\n\tif( count > len )\n\t\tcount = len;\n\telse if( count == 0 )\n\t\treturn 0;\n\n\tlen = pb->buf_buf + pb->buf_size - pb->buf_put;\n\tif( count > len ) {\n\t\tmemcpy( pb->buf_put, buf, len );\n\t\tmemcpy( pb->buf_buf, buf+len, count - len );\n\t\tpb->buf_put = pb->buf_buf + count - len;\n\t}\n\telse {\n\t\tmemcpy( pb->buf_put, buf, count );\n\t\tif( count < len )\n\t\t\tpb->buf_put += count;\n\t\telse if( count == len )\n\t\t\tpb->buf_put = pb->buf_buf;\n\t}\n\n\treturn count;\n}\n\nstatic unsigned int ch34x_buf_get( struct ch34x_buf *pb,\n\t\tchar *buf, unsigned int count )\n{\n\tunsigned int len;\n\n\tif( pb == NULL )\n\t\treturn 0;\n\n\tlen = ch34x_buf_data_avail(pb);\n\tif( count > len )\n\t\tcount = len;\n\telse if( count == 0 )\n\t\treturn 0;\n\n\tlen = pb->buf_buf + pb->buf_size - pb->buf_get;\n\tif( count > len ) {\n\t\tmemcpy( buf, pb->buf_get, len );\n\t\tmemcpy( buf+len, pb->buf_buf, count - len );\n\t\tpb->buf_get = pb->buf_buf + count - len;\n\t}\n\telse {\n\t\tmemcpy( buf, pb->buf_get, count );\n\t\tif( count < len )\n\t\t\tpb->buf_get += count;\n\t\telse if( count == len )\n\t\t\tpb->buf_get = pb->buf_buf;\n\t}\n\n\treturn count;\n}\n\nstatic int ch34x_vendor_read( __u8 request,\n\t\t__u16 value,\n\t\t__u16 index,\n\t\tstruct usb_serial *serial,\n\t\tunsigned char *buf,\n\t\t__u16 len )\n{\n\tint retval;\n\n\tretval = usb_control_msg( serial->dev, usb_rcvctrlpipe(serial->dev, 0), \n\t\t\trequest, VENDOR_READ_TYPE, value, index, buf, len, 1000 );\n\tdbg_ch34x(\"0x%x:0x%x:0x%x:0x%x %d - %d\", \n\t\t\tVENDOR_READ_TYPE, request, value, index, retval, len );\n\n\treturn retval;\n}\n\nstatic int ch34x_vendor_write( __u8 request,\n\t\t__u16 value,\n\t\t__u16 index,\n\t\tstruct usb_serial *serial,\n\t\tunsigned char *buf,\n\t\t__u16 len )\n{\n\tint retval;\n\n\tretval = usb_control_msg( serial->dev, \n\t\t\tusb_sndctrlpipe(serial->dev, 0),\n\t\t\trequest,\n\t\t\tVENDOR_WRITE_TYPE,\n\t\t\tvalue, index, buf, len, 1000 );\n\n\treturn retval;\n}\n\nstatic int set_control_lines( struct usb_serial *serial,\n\t\tu8 value )\n{\n\tint retval;\n\n\tretval = ch34x_vendor_write( VENDOR_MODEM_OUT, (unsigned short)value, \n\t\t\t0x0000, serial, NULL, 0x00 );\n\tdbg_ch34x(\"%s - value=%d, retval=%d\", __func__, value, retval );\n\n\treturn retval;\n}\n\nstatic int ch34x_get_baud_rate( unsigned int baud_rate,\n\t\tunsigned char *a, unsigned char *b )\n{\n\tunsigned long factor = 0;\n\tshort divisor = 0;\n\n\tif( !baud_rate )\n\t\treturn -EINVAL;\n\n\tfactor = (CH34x_BAUDRATE_FACTOR / baud_rate);\n\tdivisor = CH34x_BAUDRATE_DIVMAX;\n\n\twhile( (factor > 0xfff0) && divisor ) {\n\t\tfactor >>= 3;\n\t\tdivisor --;\n\t}\n\n\tif( factor > 0xfff0 )\n\t\treturn -EINVAL;\n\n\tfactor = 0x10000 - factor;\n\t*a = (factor & 0xff00) >> 8;\n\t*b = divisor;\n\n\treturn 0;\n}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\nstatic void ch34x_set_termios( struct tty_struct *tty,\n\t\tstruct usb_serial_port *port, struct ktermios *old_termios )\n{\n#else\nstatic void ch34x_set_termios( struct usb_serial_port *port,\n\t\tstruct ktermios *old_termios )\n{\n\tstruct tty_struct *tty = port->tty;\n#endif\n\tstruct usb_serial *serial = port->serial;\t\n\tstruct ch34x_private *priv = usb_get_serial_port_data(port);\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,1)) //sure\n\tstruct ktermios *termios = &tty->termios;\n#else\n\tstruct ktermios *termios = tty->termios;\n#endif\n\tunsigned int baud_rate;\n\tunsigned int cflag;\n\tunsigned long flags;\n\tu8 control;\n\n\tunsigned char divisor = 0;\n\tunsigned char reg_count = 0;\n\tunsigned char factor = 0;\n\tunsigned char reg_value = 0;\n\tunsigned short value = 0;\n\tunsigned short index = 0;\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number);\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number);\n#endif\n\t\n\tspin_lock_irqsave( &priv->lock, flags );\n\tif( !priv->termios_initialized ) {\n\t\t*(termios) = tty_std_termios;\n\t\ttermios->c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;\n\t\ttermios->c_ispeed = 9600;\n\t\ttermios->c_ospeed = 9600;\n\t\tpriv->termios_initialized = 1;\n\t}\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\t/*\n\t * The ch34x is reported to lose bytes if you change serial setting\n\t * even to the same vaules as before. Thus we actually need to filter \n\t * in this specific case.\n\t */\n\tif( !tty_termios_hw_change(termios, old_termios) )\n\t\treturn;\n\n\tcflag = termios->c_cflag;\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s (%d) cflag=0x%x\\n\", __func__, port->number, cflag);\n#else\n\tdbg_ch34x(\"%s (%d) cflag=0x%x\\n\", __func__, port->port_number, cflag);\n#endif\n\t// Get the byte size\n\tswitch( cflag & CSIZE )\n\t{\n\t\tcase CS5:\n\t\t\treg_value |= 0x00;\n\t\t\tbreak;\n\t\tcase CS6:\n\t\t\treg_value |= 0x01;\n\t\t\tbreak;\n\t\tcase CS7:\n\t\t\treg_value |= 0x02;\n\t\t\tbreak;\n\t\tcase CS8:\n\t\t\treg_value |= 0x03;\n\t\t\tbreak;\n\t\tdefault:\n\t\t\treg_value |= 0x03;\n\t\t\tbreak;\n\t}\n\tdbg_ch34x(\"%s - data bits = %d\", __func__, reg_value + 0x05 );\n\n\t// Figure out the stop bits \n\tif( cflag & CSTOPB ) {\n\t\treg_value |= 0x04;\n\t\tdbg_ch34x(\"%s - stop bits = 2\", __func__);\n\t}\n\telse \n\t\tdbg_ch34x(\"%s - stop bits = 1\", __func__);\n\n\t// Determine the parity\n\tif( cflag & PARENB )\n\t\tif( cflag & PARODD ) {\n\t\t\treg_value |= (0x08 | 0x00);\n\t\t\tdbg_ch34x(\"%s - parity = odd\", __func__);\n\t\t}\n\t\telse {\n\t\t\treg_value |= (0x08 | 0x10);\n\t\t\tdbg_ch34x(\"%s - parity = even\", __func__);\n\t\t}\n\telse\n\t\tdbg_ch34x(\"%s - parity = none\", __func__);\n\n\t// Determine the baud rate\n\tbaud_rate = tty_get_baud_rate( tty );\n\tdbg_ch34x(\"%s = baud_rate = %d\", __func__, baud_rate);\t\n\tch34x_get_baud_rate( baud_rate, &factor, &divisor );\t\n\tdbg_ch34x(\"----->>>> baud_rate = %d, factor:0x%x, divisor:0x%x\",\n\t\t\t\tbaud_rate, factor, divisor );\t\n\n\t//enable SFR_UART RX and TX\n\treg_value |= 0xc0;\n\t//enable SFR_UART Control register and timer\n\treg_count |= 0x9c;\n\n\tvalue |= reg_count;\n\tvalue |= (unsigned short)reg_value << 8;\n\tindex |= 0x80 | divisor;\n\tindex |= (unsigned short)factor << 8;\n\tch34x_vendor_write( VENDOR_SERIAL_INIT, value, index, serial, NULL, 0 );\n\n\t// change control lines if we are switching to or from B0\n\tspin_lock_irqsave( &priv->lock, flags ); \n\tcontrol = priv->line_control;\n\tif( (cflag & CBAUD) == B0 )\n\t\tpriv->line_control &= ~(CONTROL_DTR | CONTROL_RTS);\n\telse\n\t\tpriv->line_control |= (CONTROL_DTR | CONTROL_RTS);\n\n\tif( control != priv->line_control ) {\n\t\tcontrol = priv->line_control;\n\t\tspin_unlock_irqrestore( &priv->lock, flags );\n\t\tset_control_lines( serial, control );\n\t}\n\telse\n\t\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\tif( cflag & CRTSCTS )\n\t\tch34x_vendor_write( VENDOR_WRITE, 0x2727, 0x0101, serial, NULL, 0);\n\n\t// FIXME: Need to read back resulting baud rate\n\tif( baud_rate )\n\t\ttty_encode_baud_rate(tty, baud_rate, baud_rate);\n\n}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,3)) \nstatic int ch34x_tiocmget( struct tty_struct *tty )\n{\n\tstruct usb_serial_port *port = tty->driver_data;\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\nstatic int ch34x_tiocmget( struct tty_struct *tty,\n\t\tstruct file *filp )\n{\n\tstruct usb_serial_port *port = tty->driver_data;\n#else\nstatic int ch34x_tiocmget( struct usb_serial_port *port,\n\t\tstruct file *filp )\n{\n#endif\n\tstruct ch34x_private *priv = usb_get_serial_port_data(port);\n\tunsigned long flags;\n\tunsigned int mcr;\n\t/*unsigned int msr;*/\n\tunsigned int retval;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number);\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number);\n#endif\n\tif( !usb_get_intfdata( port->serial->interface) ) \n\t\treturn -ENODEV;\n\n\tspin_lock_irqsave( &priv->lock, flags );\n\tmcr = priv->line_control;\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\tretval = ((mcr & CONTROL_DTR) ? TIOCM_DTR : 0) |\n\t\t\t ((mcr & CONTROL_RTS) ? TIOCM_RTS : 0) |\n\t\t\t ((mcr & UART_CTS) ? TIOCM_CTS : 0) |\n\t\t\t ((mcr & UART_DSR) ? TIOCM_DSR : 0) |\n\t\t\t ((mcr & UART_RING) ? TIOCM_RI : 0) |\n\t\t\t ((mcr & UART_DCD) ? TIOCM_CD : 0);\n\n\tdbg_ch34x(\"%s - retval=0x%x\", __func__, retval);\n\n\treturn retval;\n}\n\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) && \\\n\t\tLINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) )\nstatic void ch34x_close( struct tty_struct *tty,\n\t\tstruct usb_serial_port *port, struct file *filp )\n{\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32) )\nstatic void ch34x_close( struct usb_serial_port *port )\n{\n\tstruct tty_struct *tty = port->port.tty;\n#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))\nstatic void ch34x_close( struct usb_serial_port *port, \n\t\tstruct file *filp )\n{\n\tstruct tty_struct *tty = port->tty;\n#endif\n\tstruct ch34x_private *priv = usb_get_serial_port_data(port);\n\tunsigned long flags;\n\tunsigned int c_cflag;\n\tint bps;\n\tlong timeout;\n\twait_queue_t wait;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number);\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number);\n#endif\n\t\n\t// wait for data do drain from the buffer\n\tspin_lock_irqsave( &priv->lock, flags );\n\ttimeout = CH34x_CLOSING_WAIT;\n\tinit_waitqueue_entry( &wait, current );\n\tadd_wait_queue( &tty->write_wait, &wait );\n\tfor(;;) {\n\t\tset_current_state( TASK_INTERRUPTIBLE );\n\t\tif( ch34x_buf_data_avail(priv->buf) == 0 || timeout == 0 || \n\t\t\t\tsignal_pending(current) || port->serial->disconnected )\n\t\t\tbreak;\n\t\tspin_unlock_irqrestore( &priv->lock, flags );\n\t\ttimeout = schedule_timeout( timeout );\n\t\tspin_lock_irqsave( &priv->lock, flags );\n\t}\n\tset_current_state( TASK_RUNNING );\n\tremove_wait_queue( &tty->write_wait, &wait );\n\t// clear out any remaining data in the buffer\n\tch34x_buf_clear( priv->buf );\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\tbps = tty_get_baud_rate( tty );\n\tif( bps > 1200 ) \n\t\ttimeout = max( (HZ * 2560) / bps, HZ / 10 );\n\telse\n\t\ttimeout = 2 * HZ;\n\tschedule_timeout_interruptible(timeout);\n\n\t// shutdown our urbs\n\tusb_kill_urb(port->interrupt_in_urb);\n\tusb_kill_urb(port->read_urb);\n\tusb_kill_urb(port->write_urb);\n\t/*usb_serial_generic_close(port, filp);*/\n\n\tif( tty ) {\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,1)) //sure\n\t\tc_cflag = tty->termios.c_cflag;\n#else\n\t\tc_cflag = tty->termios->c_cflag;\n#endif\n\t\tif( c_cflag & HUPCL ) {\n\t\t\t// drop DTR and RTS\n\t\t\tspin_lock_irqsave( &priv->lock, flags );\n\t\t\tpriv->line_control = 0;\n\t\t\tspin_unlock_irqrestore( &priv->lock, flags );\n\t\t\tset_control_lines( port->serial, 0 );\n\t\t}\n\t}\n}\n\n// kernel version \n#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) \\\n\t\t&& LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\nstatic int ch34x_open( struct tty_struct *tty,\n\t\tstruct usb_serial_port *port, struct file *filp )\n{\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))\nstatic int ch34x_open( struct tty_struct *tty,\n\t\tstruct usb_serial_port *port )\n{\n#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))\nstatic int ch34x_open( struct usb_serial_port *port,\n\t\tstruct file *filp )\n{\n\tstruct tty_struct *tty = port->tty;\n#endif\n\tstruct ktermios tmp_termios;\n\tstruct usb_serial *serial = port->serial;\n\tint retval;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number );\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number );\n#endif\n\tusb_clear_halt( serial->dev, port->write_urb->pipe );\n\tusb_clear_halt( serial->dev, port->read_urb->pipe );\n\n\tif( tty ) {\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\n\t\tch34x_set_termios( tty, port, &tmp_termios );\n#else\n\t\tch34x_set_termios( port, &tmp_termios );\n#endif\n\t}\n\n\tdbg_ch34x(\"%s - submit read urb\", __func__); \n\tport->read_urb->dev = serial->dev; \n\tretval = usb_submit_urb( port->read_urb, GFP_KERNEL );\n\tif(retval) {\n\t\tdev_err( &port->dev, \"%s - failed submit read urb,error %d\\n\", \n\t\t\t\t__func__, retval );\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) && \\\n\t\tLINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) )\n\t\tch34x_close(tty, port, NULL);\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))\n\t\tch34x_close(port);\n#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))\n\t\tch34x_close(port, filp);\n#endif\n\t\tgoto err_out;\n\t}\n\n\tdbg_ch34x(\"%s - submit interrupt urb\", __func__ );\n\tport->interrupt_in_urb->dev = serial->dev; \n\tretval = usb_submit_urb( port->interrupt_in_urb, GFP_KERNEL );\n\tif(retval) {\n\t\tdev_err( &port->dev, \"%s - failed submit interrupt urb,error %d\\n\", \n\t\t\t\t__func__, retval );\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) && \\\n\t\tLINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) )\n\t\tch34x_close(tty, port, NULL);\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))\n\t\tch34x_close(port);\n#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))\n\t\tch34x_close(port, filp);\n#endif\n\t\tgoto err_out;\n\t}\n\nerr_out:\n\treturn retval;\n}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,3))\nstatic int ch34x_tiocmset( struct tty_struct *tty,\n\t\tunsigned int set, unsigned int clear )\n{\n\tstruct usb_serial_port *port = tty->driver_data;\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\nstatic int ch34x_tiocmset( struct tty_struct *tty,\n\t\tstruct file *filp, unsigned int set, unsigned int clear )\n{\n\tstruct usb_serial_port *port = tty->driver_data;\n#else\nstatic int ch34x_tiocmset( struct usb_serial_port *port,\n\t\tstruct file *filp, unsigned int set, unsigned int clear )\n{\n#endif\n\tstruct ch34x_private *priv = usb_get_serial_port_data(port);\n\tunsigned long flags;\n\t/*unsigned int mcr = priv->line_control;*/\n\tu8 control;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number);\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number);\n#endif\n\n\tif( !usb_get_intfdata(port->serial->interface) ) \n\t\treturn -ENODEV;\n\n\tspin_lock_irqsave( &priv->lock, flags );\n\tif( set & TIOCM_RTS )\n\t\tpriv->line_control |= CONTROL_RTS;\n\tif( set & TIOCM_DTR )\n\t\tpriv->line_control |= CONTROL_DTR;\n\tif( clear & TIOCM_RTS )\n\t\tpriv->line_control &= ~CONTROL_RTS;\n\tif( clear & TIOCM_DTR )\n\t\tpriv->line_control &= ~CONTROL_DTR;\n\tcontrol = priv->line_control;\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\treturn set_control_lines( port->serial, control );\n}\n\nstatic int wait_modem_info( struct usb_serial_port *port,\n\t\tunsigned int arg )\n{\n\tstruct ch34x_private *priv = usb_get_serial_port_data(port);\n\tunsigned long flags;\n\tunsigned int prevstatus;\n\tunsigned int status;\n\tunsigned int changed;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s -port:%d\", __func__, port->number);\n#else\n\tdbg_ch34x(\"%s -port:%d\", __func__, port->port_number);\n#endif\n\tspin_lock_irqsave( &priv->lock, flags );\n\tprevstatus = priv->line_status;\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\twhile(1) {\n\t\t//ACH interruptible_sleep_on( &priv->delta_msr_wait );\n\t\t// see if a signal did it\n\t\tif( signal_pending(current) ) \n\t\t\treturn -ERESTARTSYS;\n\n\t\tspin_lock_irqsave( &priv->lock, flags );\n\t\tstatus = priv->line_status;\n\t\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\t\tchanged = prevstatus ^ status;\n\n\t\tif( ((arg & TIOCM_RNG) && (changed & UART_RING)) ||\n\t\t\t((arg & TIOCM_DSR) && (changed & UART_DSR))  ||\n\t\t\t((arg & TIOCM_CD)  && (changed & UART_DCD))  ||\n\t\t\t((arg & TIOCM_CTS) && (changed & UART_CTS)) )\n\t\t\treturn 0;\n\n\t\tprevstatus = status;\n\t}\n\n\t// Not reatched\n\treturn 0;\n}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,3)) \nstatic int ch34x_ioctl( struct tty_struct *tty,\n\t\tunsigned int cmd, unsigned long arg )\n{\n\tstruct usb_serial_port *port = tty->driver_data;\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\nstatic int ch34x_ioctl( struct tty_struct *tty, \n\t\tstruct file *filp, unsigned int cmd, unsigned long arg )\n{\n\tstruct usb_serial_port *port = tty->driver_data;\n#else\nstatic int ch34x_ioctl( struct usb_serial_port *port,\n\t\tstruct file *filp, unsigned int cmd, unsigned long arg )\n{\n\t//struct usb_serial_port *port = tty->driver_data;\n#endif\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d, cmd=0x%04x\", __func__, port->number, cmd);\n#else\n\tdbg_ch34x(\"%s - port:%d, cmd=0x%04x\", __func__, port->port_number, cmd);\n#endif\n\tswitch(cmd)\n\t{\n\t\t// Note here \n\t\tcase TIOCMIWAIT:\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\t\t\tdbg_ch34x(\"%s - port:%d TIOCMIWAIT\", __func__, port->number);\n#else\n\t\t\tdbg_ch34x(\"%s - port:%d TIOCMIWAIT\", __func__, port->port_number);\n#endif\n\n\t\t\treturn wait_modem_info(port, arg);\n\t\tdefault:\n\t\t\tdbg_ch34x(\"%s not supported=0x%04x\", __func__, cmd);\n\t\t\tbreak;\n\t}\n\n\treturn -ENOIOCTLCMD;\n}\n\nstatic void ch34x_send( struct usb_serial_port *port )\n{\n\tint count;\n\tint retval;\n\tstruct ch34x_private *priv = usb_get_serial_port_data( port );\n\tunsigned long flags;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number);\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number);\n#endif\n\tspin_lock_irqsave( &priv->lock, flags );\n\tif( priv->write_urb_in_use ) {\n\t\tspin_unlock_irqrestore( &priv->lock, flags );\n\t\treturn;\n\t}\n\n\tcount = ch34x_buf_get( priv->buf, port->write_urb->transfer_buffer,\n\t\t\tport->bulk_out_size );\n\tif( count == 0 ) {\n\t\tspin_unlock_irqrestore( &priv->lock, flags );\n\t\treturn;\n\t}\n\n\tpriv->write_urb_in_use = 1;\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,1))\n\tusb_serial_debug_data( &port->dev, __func__, count,\n\t\t\tport->write_urb->transfer_buffer );\n#else\n\tusb_serial_debug_data( debug, &port->dev, __func__, count,\n\t\t\tport->write_urb->transfer_buffer );\n#endif\n\n\tport->write_urb->transfer_buffer_length = count;\n\tport->write_urb->dev = port->serial->dev;\n\tretval = usb_submit_urb( port->write_urb, GFP_ATOMIC );\n\tif( retval ) {\n\t\tdev_err( &port->dev, \"%s - failed submitting write urb,error %d\\n\"\n\t\t\t\t, __func__, retval );\n\t\tpriv->write_urb_in_use = 0;\n\t\t// reschedule ch34x_send\n\t}\n\n\tusb_serial_port_softint( port ); \n}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\nstatic int ch34x_write( struct tty_struct *tty, \n\t\tstruct usb_serial_port *port, const unsigned char *buf, int count )\n#else\nstatic int ch34x_write( struct usb_serial_port *port,\n\t\tconst unsigned char *buf, int count )\n#endif\n{\n\tstruct ch34x_private *priv = usb_get_serial_port_data(port);\n\tunsigned long flags;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d, %d bytes\", __func__, port->number, count);\n#else\n\tdbg_ch34x(\"%s - port:%d, %d bytes\", __func__, port->port_number, count);\n#endif\n\n\tif( !count )\n\t\treturn count;\n\n\tspin_lock_irqsave( &priv->lock, flags );\n\tcount = ch34x_buf_put( priv->buf, buf, count ); \n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\tch34x_send(port);\n\n\treturn count;\n}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\nstatic int ch34x_write_room( struct tty_struct *tty )\n{\n\tstruct usb_serial_port *port = tty->driver_data;\n#else\nstatic int ch34x_write_room( struct usb_serial_port *port )\n{\n#endif\n\tstruct ch34x_private *priv = usb_get_serial_port_data( port );\n\tint room = 0;\n\tunsigned long flags;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number);\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number);\n#endif\n\n\tspin_lock_irqsave( &priv->lock, flags );\n\troom = ch34x_buf_space_avail( priv->buf );\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\tdbg_ch34x(\"%s - room:%d\", __func__, room );\n\treturn room;\n}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\nstatic int ch34x_chars_in_buffer( struct tty_struct *tty )\n{\n\tstruct usb_serial_port *port = tty->driver_data;\n#else\nstatic int ch34x_chars_in_buffer( struct usb_serial_port *port )\n{\n#endif\n\tstruct ch34x_private *priv = usb_get_serial_port_data(port);\n\tint chars = 0;\n\tunsigned long flags;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number);\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number);\n#endif\n\n\tspin_lock_irqsave( &priv->lock, flags );\n\tchars = ch34x_buf_data_avail( priv->buf );\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\n\tdbg_ch34x(\"%s - chars:%d\", __func__, chars );\n\n\treturn chars;\n}\n\nstatic int ch34x_attach( struct usb_serial *serial )\n{\n\tstruct ch34x_private *priv; \n\tint i;\n\tchar buf[8];\n\n\tdbg_ch34x(\"%s\", __func__);\n\n\tfor( i = 0; i < serial->num_ports; ++i ) {\n\t\tpriv = kzalloc( sizeof(struct ch34x_private), GFP_KERNEL );\n\t\tif( !priv )\n\t\t\tgoto cleanup;\n\t\tspin_lock_init( &priv->lock );\n\t\tpriv->buf = ch34x_buf_alloc( CH34x_BUF_SIZE );\n\t\tif( priv->buf == NULL ) {\n\t\t\tkfree( priv );\n\t\t\tgoto cleanup;\n\t\t}\n\t\tinit_waitqueue_head( &priv->delta_msr_wait );\n\t\tusb_set_serial_port_data( serial->port[i], priv );\n\t}\n\n\tch34x_vendor_read( VENDOR_VERSION, 0x0000, 0x0000,\n\t\t\tserial, buf, 0x02 );\n\tch34x_vendor_write( VENDOR_SERIAL_INIT, 0x0000, 0x0000,\n\t\t\tserial, NULL, 0x00 );\n\tch34x_vendor_write( VENDOR_WRITE, 0x1312, 0xD982, \n\t\t\tserial, NULL, 0x00 );\n\tch34x_vendor_write( VENDOR_WRITE, 0x0F2C, 0x0004,\n\t\t\tserial, NULL, 0x00 );\n\tch34x_vendor_read( VENDOR_READ, 0x2518, 0x0000,\n\t\t\tserial, buf, 0x02 );\n\tch34x_vendor_write( VENDOR_WRITE, 0x2727, 0x0000,\n\t\t\tserial, NULL, 0x00 );\n\tch34x_vendor_write( VENDOR_MODEM_OUT, 0x009F, 0x0000,\n\t\t\tserial, NULL, 0x00 );\n\n\treturn 0;\n\ncleanup:\n\tfor( --i; i >= 0; --i ) {\n\t\tpriv = usb_get_serial_port_data( serial->port[i] );\n\t\tch34x_buf_free( priv->buf );\n\t\tkfree( priv );\n\t\tusb_set_serial_port_data( serial->port[i], NULL );\n\t}\n\n\treturn -ENOMEM;\n}\n\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))\nstatic void ch34x_shutdown( struct usb_serial *serial )\n{\n\tstruct ch34x_private *priv;\n\tint i;\n\n\tdbg_ch34x(\"%s\", __func__);\n\n\tfor( i = 0; i < serial->num_ports; ++i ) {\n\t\tpriv = usb_get_serial_port_data( serial->port[i] );\n\t\tif( priv ) {\n\t\t\tch34x_buf_free( priv->buf );\n\t\t\tkfree( priv );\n\t\t\tusb_set_serial_port_data( serial->port[i], NULL );\n\t\t}\n\t}\n}\n#endif\n\nstatic void ch34x_update_line_status( struct usb_serial_port *port,\n\t\tunsigned char *data, unsigned int actual_length )\n{\n\tstruct ch34x_private *priv = usb_get_serial_port_data( port );\n\tunsigned long flags;\n\tu8 length = UART_STATE + 0x04;\n\n\tif( actual_length < length )\n\t\treturn;\n\n\t// Save off the uart status for others to look at\n\tspin_lock_irqsave( &priv->lock, flags );\n\tpriv->line_status = data[UART_STATE];\n\tpriv->line_control = data[PORTB_STATE];\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\twake_up_interruptible( &priv->delta_msr_wait );\n}\n\nstatic void ch34x_read_int_callback( struct urb *urb )\n{\n\tstruct usb_serial_port *port = (struct usb_serial_port *)urb->context; \n\tunsigned char *data = urb->transfer_buffer;\n\tunsigned int actual_length = urb->actual_length;\n\tint status = urb->status;\n\tint retval;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s port:%d\", __func__, port->number );\n#else\n\tdbg_ch34x(\"%s port:%d\", __func__, port->port_number );\n#endif\n\tswitch( status ) {\n\t\tcase 0: //success\n\t\t\tbreak;\n\t\tcase -ECONNRESET:\n\t\tcase -ENOENT:\n\t\tcase -ESHUTDOWN: //this urb is terminated, clean up\n\t\t\tdbg_ch34x(\"%s - urb shutting down with status:%d\", __func__, status );\n\t\t\treturn;\n\t\tdefault:\n\t\t\tdbg_ch34x(\"%s - nonzero urb status received:%d\", __func__, status );\n\t\t\tgoto exit;\n\t}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,1))\n\tusb_serial_debug_data( &port->dev, __func__,\n\t\t\turb->actual_length, urb->transfer_buffer );\n#else\n\tusb_serial_debug_data( debug, &port->dev, \n\t\t\t__func__, urb->actual_length, urb->transfer_buffer );\n#endif\n\n\tch34x_update_line_status( port, data, actual_length );\n\nexit:\n\tretval = usb_submit_urb( urb, GFP_ATOMIC ); \n\tif( retval ) \n\t\tdev_err( &urb->dev->dev, \"%s - usb_submit_urb failed with result %d\\n\", \n\t\t\t\t__func__, retval );\n}\n\nstatic void ch34x_read_bulk_callback( struct urb *urb )\n{\n\tstruct usb_serial_port *port = (struct usb_serial_port *)urb->context;\n\tstruct ch34x_private *priv = usb_get_serial_port_data( port );\n\tstruct tty_struct *tty;\n\tunsigned char *data = urb->transfer_buffer;\n\tunsigned long flags;\n\tint i;\n\tint retval;\n\tint status = urb->status;\n\tu8 line_status;\n\tchar tty_flag;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number );\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number);\n#endif\n\tif( status ) {\n\t\tdbg_ch34x(\"%s - urb status=%d\", __func__, status );\n\t\tif( status == -EPROTO ) {\n\t\t\t// CH34x mysteriously fails with -EPROTO reschedule the read\n\t\t\tdbg_ch34x(\"%s - caught -EPROTO, resubmitting the urb\", __func__);\n\t\t\turb->dev = port->serial->dev;\n\t\t\tretval = usb_submit_urb( urb, GFP_ATOMIC );\n\t\t\tif( retval ) {\n\t\t\t\tdev_err( &urb->dev->dev, \n\t\t\t\t\t\t\"%s - failed resubmitting read urb, error %d\\n\",\n\t\t\t\t\t\t__func__, retval );\n\t\t\t\treturn;\n\t\t\t}\n\t\t}\n\n\t\tdbg_ch34x(\"%s - unable to handle the error, exiting.\", __func__);\n\t\treturn;\n\t}\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,1))\n\tusb_serial_debug_data( &port->dev, __func__,\n\t\t\turb->actual_length, data );\n#else\n\tusb_serial_debug_data( debug, &port->dev, \n\t\t\t__func__, urb->actual_length, data );\n#endif\n\n\t// get tty_flag from status\n\ttty_flag = TTY_NORMAL;\n\n\tspin_lock_irqsave( &priv->lock, flags );\n\tline_status = priv->line_status;\n\tpriv->line_status &= ~UART_STATE_TRANSIENT_MASK;\n\tspin_unlock_irqrestore( &priv->lock, flags );\n\twake_up_interruptible( &priv->delta_msr_wait );\n\n\t// break takes precedence over parity, \n\t// which takes precedence over framing errors\n\tif( line_status & UART_PARITY_ERROR )\n\t\ttty_flag = TTY_PARITY;\n\telse if( line_status & UART_OVERRUN_ERROR )\n\t\ttty_flag = TTY_OVERRUN;\n\telse if( line_status & UART_FRAME_ERROR )\n\t\ttty_flag = TTY_FRAME;\n\tdbg_ch34x(\"%s - tty_flag=%d\", __func__, tty_flag);\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))\n\ttty = port->port.tty; \n#else\n\ttty = port->tty;\n#endif\n\tif( tty && urb->actual_length ) {\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,1))\n\t\ttty_buffer_request_room( tty->port, urb->actual_length + 1);\n#else\n\t\ttty_buffer_request_room( tty, urb->actual_length + 1 );\n#endif\n\t\t// overrun is special, not associated with a char\n\t\tif( line_status & UART_OVERRUN_ERROR )\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,1))\n\t\t\ttty_insert_flip_char( tty->port, 0, TTY_OVERRUN );\n#else \n\t\t\ttty_insert_flip_char( tty, 0, TTY_OVERRUN ); \n#endif\n\t\tfor( i = 0; i < urb->actual_length; ++i )\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,1))\n\t\t\ttty_insert_flip_char( tty->port, data[i], tty_flag );\n#else\n\t\t\ttty_insert_flip_char( tty, data[i], tty_flag );\n#endif\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,1))\n\t\ttty_flip_buffer_push( tty->port );\n#else\n\t\ttty_flip_buffer_push( tty );\n#endif\n\t}\n\n\t//Schedule the next read _if_ we are still open\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))\n\tif( port->open_count ) \n#endif\n\t{\n\t\turb->dev = port->serial->dev;\n\t\tretval = usb_submit_urb( urb, GFP_ATOMIC );\n\t\tif( retval ) \n\t\t\tdev_err( &urb->dev->dev, \n\t\t\t\t\t\"%s - fialed resubmitting read urb, error %d\\n\", \n\t\t\t\t\t__func__, retval );\n\t}\n\n\treturn;\n}\n\nstatic void ch34x_write_bulk_callback( struct urb *urb )\n{\n\tstruct usb_serial_port *port = (struct usb_serial_port *)urb->context;\n\tstruct ch34x_private *priv = usb_get_serial_port_data(port);\n\tint retval;\n\tint status = urb->status;\n\n#if(LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->number );\n#else\n\tdbg_ch34x(\"%s - port:%d\", __func__, port->port_number );\n#endif\n\tswitch( status ) {\n\t\tcase 0: //success\n\t\t\tbreak;\n\t\tcase -ECONNRESET:\n\t\tcase -ENOENT:\n\t\tcase -ESHUTDOWN:\n\t\t\t// this urb is terminated, clean up\n\t\t\tdbg_ch34x(\"%s - urb shutting down with status:%d\", __func__, status);\n\t\t\tpriv->write_urb_in_use = 0;\n\t\t\treturn;\n\t\tdefault:\n\t\t\t// error in the urb, so we have to resubmit it\n\t\t\tdbg_ch34x(\"%s - Overflow in write\", __func__);\n\t\t\tdbg_ch34x(\"%s - nonzero write bulk status received:%d\", __func__, status);\n\t\t\tport->write_urb->transfer_buffer_length = 1;\n\t\t\tport->write_urb->dev = port->serial->dev;\n\t\t\tretval = usb_submit_urb(port->write_urb, GFP_ATOMIC);\n\t\t\tif( retval )\n\t\t\t\tdev_err( &urb->dev->dev, \n\t\t\t\t\t\t\"%s - failed resubmitting write urv, error:%d\\n\",\n\t\t\t\t\t\t__func__, retval );\n\t\t\telse \n\t\t\t\treturn;\n\t}\n\n\tpriv->write_urb_in_use = 0;\n\n\t// send any buffered data\n\tch34x_send(port);\n}\n\nstatic struct usb_serial_driver\tch34x_device = {\n\t.driver = {\n\t\t.owner\t= THIS_MODULE,\n\t\t.name\t= \"ch34x\",\n\t},\n\t.id_table\t= id_table,\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,5,1))\n\t.usb_driver\t= &ch34x_driver,\n#endif\n\t.num_ports\t\t= 1,\n\t.open\t\t\t= ch34x_open,\n\t.close\t\t\t= ch34x_close,\n\t.write\t\t\t= ch34x_write,\n\t.ioctl\t\t\t= ch34x_ioctl,\n\t.set_termios\t= ch34x_set_termios,\n\t.tiocmget\t\t= ch34x_tiocmget,\n\t.tiocmset\t\t= ch34x_tiocmset,\n\t.read_bulk_callback  = ch34x_read_bulk_callback,\n\t.read_int_callback   = ch34x_read_int_callback,\n\t.write_bulk_callback = ch34x_write_bulk_callback,\n\t.write_room     = ch34x_write_room,\n\t.chars_in_buffer = ch34x_chars_in_buffer,\n\t.attach\t\t\t= ch34x_attach,\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) )\n\t.shutdown\t\t= ch34x_shutdown,\n#endif\n};\n\n#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,5)) \nstatic struct usb_serial_driver *const serial_driver [] = {\n\t&ch34x_device, NULL\n};\n#endif\n\n\nstatic int __init ch34x_init(void)\n{\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,5)) \n\tint retval = 0;\n\n\tretval = usb_serial_register( &ch34x_device );\n\tif( retval ) {\n\t\tgoto err_usb_serial_register;\n\t}\n\tretval = usb_register( &ch34x_driver );\n\tif( retval ) {\n\t\tgoto err_usb_register;\n\t}\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))\n\tinfo( DRIVER_DESC );\n#endif\n\treturn 0;\n\nerr_usb_register:\n\tusb_deregister( &ch34x_driver );\nerr_usb_serial_register:\n\tusb_serial_deregister( &ch34x_device );\n\treturn retval;\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,1))\n\treturn usb_serial_register_drivers( serial_driver, \n\t\t\tKBUILD_MODNAME, id_table );\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,5) && \\\n\t\tLINUX_VERSION_CODE < KERNEL_VERSION(3,5,1))\n\treturn usb_serial_register_drivers(&ch34x_driver, serial_driver);\n#endif\n}\n\nstatic void __exit ch34x_exit(void)\n{\n#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,5))\n\tusb_deregister( &ch34x_driver );\n\tusb_serial_deregister( &ch34x_device );\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,1))\n\tusb_serial_deregister_drivers( serial_driver );\n#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,5) && \\\n\t\tLINUX_VERSION_CODE < KERNEL_VERSION(3,5,1))\n\tusb_serial_deregister_drivers(&ch34x_driver, serial_driver);\n#endif\n}\n\nmodule_init( ch34x_init );\nmodule_exit( ch34x_exit );\n\n\nMODULE_DESCRIPTION(DRIVER_DESC);\nMODULE_AUTHOR(DRIVER_AUTHOR);\nMODULE_LICENSE(\"GPL\");\n"
  },
  {
    "path": "software/CH341SER_LINUX/opcodes.h",
    "content": "/*\n *  arch/arm/include/asm/opcodes.h\n *\n * This program is free software; you can redistribute it and/or modify\n * it under the terms of the GNU General Public License version 2 as\n * published by the Free Software Foundation.\n */\n\n#ifndef __ASM_ARM_OPCODES_H\n#define __ASM_ARM_OPCODES_H\n\n#ifndef __ASSEMBLY__\n#include <linux/linkage.h>\nextern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);\n#endif\n\n#define ARM_OPCODE_CONDTEST_FAIL   0\n#define ARM_OPCODE_CONDTEST_PASS   1\n#define ARM_OPCODE_CONDTEST_UNCOND 2\n\n\n/*\n * Assembler opcode byteswap helpers.\n * These are only intended for use by this header: don't use them directly,\n * because they will be suboptimal in most cases.\n */\n#define ___asm_opcode_swab32(x) (\t\\\n\t  (((x) << 24) & 0xFF000000)\t\\\n\t| (((x) <<  8) & 0x00FF0000)\t\\\n\t| (((x) >>  8) & 0x0000FF00)\t\\\n\t| (((x) >> 24) & 0x000000FF)\t\\\n)\n#define ___asm_opcode_swab16(x) (\t\\\n\t  (((x) << 8) & 0xFF00)\t\t\\\n\t| (((x) >> 8) & 0x00FF)\t\t\\\n)\n#define ___asm_opcode_swahb32(x) (\t\\\n\t  (((x) << 8) & 0xFF00FF00)\t\\\n\t| (((x) >> 8) & 0x00FF00FF)\t\\\n)\n#define ___asm_opcode_swahw32(x) (\t\\\n\t  (((x) << 16) & 0xFFFF0000)\t\\\n\t| (((x) >> 16) & 0x0000FFFF)\t\\\n)\n#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)\n#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)\n\n\n/*\n * Opcode byteswap helpers\n *\n * These macros help with converting instructions between a canonical integer\n * format and in-memory representation, in an endianness-agnostic manner.\n *\n * __mem_to_opcode_*() convert from in-memory representation to canonical form.\n * __opcode_to_mem_*() convert from canonical form to in-memory representation.\n *\n *\n * Canonical instruction representation:\n *\n *\tARM:\t\t0xKKLLMMNN\n *\tThumb 16-bit:\t0x0000KKLL, where KK < 0xE8\n *\tThumb 32-bit:\t0xKKLLMMNN, where KK >= 0xE8\n *\n * There is no way to distinguish an ARM instruction in canonical representation\n * from a Thumb instruction (just as these cannot be distinguished in memory).\n * Where this distinction is important, it needs to be tracked separately.\n *\n * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not\n * represent any valid Thumb-2 instruction.  For this range,\n * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.\n *\n * The ___asm variants are intended only for use by this header, in situations\n * involving inline assembler.  For .S files, the normal __opcode_*() macros\n * should do the right thing.\n */\n#ifdef __ASSEMBLY__\n\n#define ___opcode_swab32(x) ___asm_opcode_swab32(x)\n#define ___opcode_swab16(x) ___asm_opcode_swab16(x)\n#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)\n#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)\n#define ___opcode_identity32(x) ___asm_opcode_identity32(x)\n#define ___opcode_identity16(x) ___asm_opcode_identity16(x)\n\n#else /* ! __ASSEMBLY__ */\n\n#include <linux/types.h>\n#include <linux/swab.h>\n\n#define ___opcode_swab32(x) swab32(x)\n#define ___opcode_swab16(x) swab16(x)\n#define ___opcode_swahb32(x) swahb32(x)\n#define ___opcode_swahw32(x) swahw32(x)\n#define ___opcode_identity32(x) ((u32)(x))\n#define ___opcode_identity16(x) ((u16)(x))\n\n#endif /* ! __ASSEMBLY__ */\n\n\n#ifdef CONFIG_CPU_ENDIAN_BE8\n\n#define __opcode_to_mem_arm(x) ___opcode_swab32(x)\n#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)\n#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)\n#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)\n#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)\n#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)\n\n#else /* ! CONFIG_CPU_ENDIAN_BE8 */\n\n#define __opcode_to_mem_arm(x) ___opcode_identity32(x)\n#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)\n#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)\n#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)\n#ifndef CONFIG_CPU_ENDIAN_BE32\n/*\n * On BE32 systems, using 32-bit accesses to store Thumb instructions will not\n * work in all cases, due to alignment constraints.  For now, a correct\n * version is not provided for BE32.\n */\n#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)\n#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)\n#endif\n\n#endif /* ! CONFIG_CPU_ENDIAN_BE8 */\n\n#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)\n#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)\n#ifndef CONFIG_CPU_ENDIAN_BE32\n#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)\n#endif\n\n/* Operations specific to Thumb opcodes */\n\n/* Instruction size checks: */\n#define __opcode_is_thumb32(x) (\t\t\\\n\t   ((x) & 0xF8000000) == 0xE8000000\t\\\n\t|| ((x) & 0xF0000000) == 0xF0000000\t\\\n)\n#define __opcode_is_thumb16(x) (\t\t\t\t\t\\\n\t   ((x) & 0xFFFF0000) == 0\t\t\t\t\t\\\n\t&& !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000)\t\\\n)\n\n/* Operations to construct or split 32-bit Thumb instructions: */\n#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))\n#define __opcode_thumb32_second(x) (___opcode_identity16(x))\n#define __opcode_thumb32_compose(first, second) (\t\t\t\\\n\t  (___opcode_identity32(___opcode_identity16(first)) << 16)\t\\\n\t| ___opcode_identity32(___opcode_identity16(second))\t\t\\\n)\n#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))\n#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))\n#define ___asm_opcode_thumb32_compose(first, second) (\t\t\t    \\\n\t  (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \\\n\t| ___asm_opcode_identity32(___asm_opcode_identity16(second))\t    \\\n)\n\n/*\n * Opcode injection helpers\n *\n * In rare cases it is necessary to assemble an opcode which the\n * assembler does not support directly, or which would normally be\n * rejected because of the CFLAGS or AFLAGS used to build the affected\n * file.\n *\n * Before using these macros, consider carefully whether it is feasible\n * instead to change the build flags for your file, or whether it really\n * makes sense to support old assembler versions when building that\n * particular kernel feature.\n *\n * The macros defined here should only be used where there is no viable\n * alternative.\n *\n *\n * __inst_arm(x): emit the specified ARM opcode\n * __inst_thumb16(x): emit the specified 16-bit Thumb opcode\n * __inst_thumb32(x): emit the specified 32-bit Thumb opcode\n *\n * __inst_arm_thumb16(arm, thumb): emit either the specified arm or\n *\t16-bit Thumb opcode, depending on whether an ARM or Thumb-2\n *\tkernel is being built\n *\n * __inst_arm_thumb32(arm, thumb): emit either the specified arm or\n *\t32-bit Thumb opcode, depending on whether an ARM or Thumb-2\n *\tkernel is being built\n *\n *\n * Note that using these macros directly is poor practice.  Instead, you\n * should use them to define human-readable wrapper macros to encode the\n * instructions that you care about.  In code which might run on ARMv7 or\n * above, you can usually use the __inst_arm_thumb{16,32} macros to\n * specify the ARM and Thumb alternatives at the same time.  This ensures\n * that the correct opcode gets emitted depending on the instruction set\n * used for the kernel build.\n *\n * Look at opcodes-virt.h for an example of how to use these macros.\n */\n#include <linux/stringify.h>\n\n#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))\n#define __inst_thumb32(x) ___inst_thumb32(\t\t\t\t\\\n\t___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)),\t\\\n\t___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x))\t\\\n)\n#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))\n\n#ifdef CONFIG_THUMB2_KERNEL\n#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \\\n\t__inst_thumb16(thumb_opcode)\n#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \\\n\t__inst_thumb32(thumb_opcode)\n#else\n#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)\n#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)\n#endif\n\n/* Helpers for the helpers.  Don't use these directly. */\n#ifdef __ASSEMBLY__\n#define ___inst_arm(x) .long x\n#define ___inst_thumb16(x) .short x\n#define ___inst_thumb32(first, second) .short first, second\n#else\n#define ___inst_arm(x) \".long \" __stringify(x) \"\\n\\t\"\n#define ___inst_thumb16(x) \".short \" __stringify(x) \"\\n\\t\"\n#define ___inst_thumb32(first, second) \\\n\t\".short \" __stringify(first) \", \" __stringify(second) \"\\n\\t\"\n#endif\n\n#endif /* __ASM_ARM_OPCODES_H */\n"
  },
  {
    "path": "software/CH341SER_LINUX/readme.txt",
    "content": "// ChangeLog \n// 1.0 - 1.1   modified to solve transmition between ch341 and ch341\n// 1.1 - 1.2   Support high Linux kernel\nInstructions\n\nNote: 1.Please run followed executable programs as root privilege\n      2.Current Driver support versions of linux kernel range from 2.6.25 to 3.13.x\n      3.Current Driver support 32bits and 64bits linux systems\n\nUsage:\n\t(load or unload linux driver of CH34x)\n\t//compile \n\t#make\n\t//load ch34x chips driver\n\t#make load\n\t//unload ch34x chips driver\n\t#make unload\n\t\t\t\n\n"
  },
  {
    "path": "software/Haasoscope.ui",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\r\n<ui version=\"4.0\">\r\n <class>MainWindow</class>\r\n <widget class=\"QMainWindow\" name=\"MainWindow\">\r\n  <property name=\"geometry\">\r\n   <rect>\r\n    <x>0</x>\r\n    <y>0</y>\r\n    <width>1321</width>\r\n    <height>843</height>\r\n   </rect>\r\n  </property>\r\n  <property name=\"windowTitle\">\r\n   <string>HaasoscopeQt</string>\r\n  </property>\r\n  <widget class=\"QWidget\" name=\"centralwidget\">\r\n   <layout class=\"QGridLayout\" name=\"gridLayout\">\r\n    <item row=\"0\" column=\"0\">\r\n     <widget class=\"PlotWidget\" name=\"plot\">\r\n      <property name=\"font\">\r\n       <font>\r\n        <family>Arial</family>\r\n       </font>\r\n      </property>\r\n     </widget>\r\n    </item>\r\n    <item row=\"0\" column=\"2\">\r\n     <widget class=\"QFrame\" name=\"frame\">\r\n      <property name=\"minimumSize\">\r\n       <size>\r\n        <width>400</width>\r\n        <height>300</height>\r\n       </size>\r\n      </property>\r\n      <property name=\"font\">\r\n       <font>\r\n        <family>Arial</family>\r\n       </font>\r\n      </property>\r\n      <property name=\"frameShape\">\r\n       <enum>QFrame::StyledPanel</enum>\r\n      </property>\r\n      <property name=\"frameShadow\">\r\n       <enum>QFrame::Raised</enum>\r\n      </property>\r\n      <widget class=\"QTextBrowser\" name=\"textBrowser\">\r\n       <property name=\"geometry\">\r\n        <rect>\r\n         <x>0</x>\r\n         <y>520</y>\r\n         <width>401</width>\r\n         <height>261</height>\r\n        </rect>\r\n       </property>\r\n       <property name=\"font\">\r\n        <font>\r\n         <family>Arial</family>\r\n        </font>\r\n       </property>\r\n      </widget>\r\n      <widget class=\"QFrame\" name=\"frame_2\">\r\n       <property name=\"geometry\">\r\n        <rect>\r\n         <x>170</x>\r\n         <y>0</y>\r\n         <width>231</width>\r\n         <height>371</height>\r\n        </rect>\r\n       </property>\r\n       <property name=\"font\">\r\n        <font>\r\n         <family>Arial</family>\r\n        </font>\r\n       </property>\r\n       <property name=\"frameShape\">\r\n        <enum>QFrame::Panel</enum>\r\n       </property>\r\n       <property name=\"frameShadow\">\r\n        <enum>QFrame::Raised</enum>\r\n       </property>\r\n       <property name=\"lineWidth\">\r\n        <number>1</number>\r\n       </property>\r\n       <property name=\"midLineWidth\">\r\n        <number>0</number>\r\n       </property>\r\n       <widget class=\"QSlider\" name=\"verticalSlider\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>180</x>\r\n          <y>30</y>\r\n          <width>10</width>\r\n          <height>241</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"minimumSize\">\r\n         <size>\r\n          <width>10</width>\r\n          <height>0</height>\r\n         </size>\r\n        </property>\r\n        <property name=\"maximumSize\">\r\n         <size>\r\n          <width>10</width>\r\n          <height>16777215</height>\r\n         </size>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"maximum\">\r\n         <number>255</number>\r\n        </property>\r\n        <property name=\"value\">\r\n         <number>128</number>\r\n        </property>\r\n        <property name=\"orientation\">\r\n         <enum>Qt::Vertical</enum>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QSlider\" name=\"horizontalSlider\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>290</y>\r\n          <width>191</width>\r\n          <height>10</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"minimumSize\">\r\n         <size>\r\n          <width>0</width>\r\n          <height>10</height>\r\n         </size>\r\n        </property>\r\n        <property name=\"maximumSize\">\r\n         <size>\r\n          <width>16777215</width>\r\n          <height>10</height>\r\n         </size>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"maximum\">\r\n         <number>255</number>\r\n        </property>\r\n        <property name=\"value\">\r\n         <number>128</number>\r\n        </property>\r\n        <property name=\"orientation\">\r\n         <enum>Qt::Horizontal</enum>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLabel\" name=\"label_2\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>310</y>\r\n          <width>51</width>\r\n          <height>16</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Time base</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLabel\" name=\"label_3\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>80</x>\r\n          <y>270</y>\r\n          <width>47</width>\r\n          <height>13</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Trig time</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLabel\" name=\"label_4\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>170</x>\r\n          <y>10</y>\r\n          <width>51</width>\r\n          <height>20</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Threshold</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QPushButton\" name=\"rollingButton\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>40</y>\r\n          <width>71</width>\r\n          <height>23</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Rolling</string>\r\n        </property>\r\n        <property name=\"checkable\">\r\n         <bool>true</bool>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QPushButton\" name=\"runButton\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>10</y>\r\n          <width>71</width>\r\n          <height>23</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Run / Stop</string>\r\n        </property>\r\n        <property name=\"checkable\">\r\n         <bool>true</bool>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QPushButton\" name=\"singleButton\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>90</x>\r\n          <y>10</y>\r\n          <width>71</width>\r\n          <height>23</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Single</string>\r\n        </property>\r\n        <property name=\"checkable\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QPushButton\" name=\"timeslowButton\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>110</x>\r\n          <y>330</y>\r\n          <width>51</width>\r\n          <height>21</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Slower</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QPushButton\" name=\"timefastButton\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>160</x>\r\n          <y>330</y>\r\n          <width>51</width>\r\n          <height>21</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Faster</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QGroupBox\" name=\"channelgroupBox_3\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>80</y>\r\n          <width>101</width>\r\n          <height>181</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"title\">\r\n         <string>Trigger options</string>\r\n        </property>\r\n        <widget class=\"QCheckBox\" name=\"risingedgeCheck\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>10</x>\r\n           <y>20</y>\r\n           <width>81</width>\r\n           <height>17</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>Rising edge</string>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QCheckBox\" name=\"exttrigCheck\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>10</x>\r\n           <y>40</y>\r\n           <width>70</width>\r\n           <height>17</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>Ext trig</string>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QCheckBox\" name=\"autorearmCheck\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>10</x>\r\n           <y>60</y>\r\n           <width>81</width>\r\n           <height>17</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>Auto rearm</string>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QSpinBox\" name=\"totBox\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>10</x>\r\n           <y>150</y>\r\n           <width>51</width>\r\n           <height>22</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"maximum\">\r\n          <number>9999</number>\r\n         </property>\r\n         <property name=\"value\">\r\n          <number>1</number>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QLabel\" name=\"label_6\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>70</x>\r\n           <y>160</y>\r\n           <width>31</width>\r\n           <height>16</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>ToT</string>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QCheckBox\" name=\"noselftrigCheck\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>10</x>\r\n           <y>80</y>\r\n           <width>81</width>\r\n           <height>17</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>No self trig</string>\r\n         </property>\r\n        </widget>\r\n       </widget>\r\n       <widget class=\"QSlider\" name=\"verticalSlider2\">\r\n        <property name=\"enabled\">\r\n         <bool>false</bool>\r\n        </property>\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>200</x>\r\n          <y>30</y>\r\n          <width>10</width>\r\n          <height>241</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"minimumSize\">\r\n         <size>\r\n          <width>10</width>\r\n          <height>0</height>\r\n         </size>\r\n        </property>\r\n        <property name=\"maximumSize\">\r\n         <size>\r\n          <width>10</width>\r\n          <height>16777215</height>\r\n         </size>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"maximum\">\r\n         <number>255</number>\r\n        </property>\r\n        <property name=\"value\">\r\n         <number>0</number>\r\n        </property>\r\n        <property name=\"sliderPosition\">\r\n         <number>0</number>\r\n        </property>\r\n        <property name=\"orientation\">\r\n         <enum>Qt::Vertical</enum>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"thresh2Check\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>120</x>\r\n          <y>240</y>\r\n          <width>70</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Thresh2</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLineEdit\" name=\"timebaseBox\">\r\n        <property name=\"enabled\">\r\n         <bool>false</bool>\r\n        </property>\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>330</y>\r\n          <width>91</width>\r\n          <height>20</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QSpinBox\" name=\"coinBox\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>120</x>\r\n          <y>170</y>\r\n          <width>51</width>\r\n          <height>22</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"minimum\">\r\n         <number>0</number>\r\n        </property>\r\n        <property name=\"maximum\">\r\n         <number>3</number>\r\n        </property>\r\n        <property name=\"value\">\r\n         <number>0</number>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLabel\" name=\"label_10\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>120</x>\r\n          <y>150</y>\r\n          <width>51</width>\r\n          <height>20</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>N coin.</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLabel\" name=\"label_11\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>120</x>\r\n          <y>190</y>\r\n          <width>51</width>\r\n          <height>20</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Coin. time</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QSpinBox\" name=\"cointimeBox\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>120</x>\r\n          <y>210</y>\r\n          <width>51</width>\r\n          <height>22</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"minimum\">\r\n         <number>1</number>\r\n        </property>\r\n        <property name=\"maximum\">\r\n         <number>255</number>\r\n        </property>\r\n        <property name=\"value\">\r\n         <number>10</number>\r\n        </property>\r\n       </widget>\r\n      </widget>\r\n      <widget class=\"QGroupBox\" name=\"channelgroupBox\">\r\n       <property name=\"geometry\">\r\n        <rect>\r\n         <x>170</x>\r\n         <y>380</y>\r\n         <width>111</width>\r\n         <height>131</height>\r\n        </rect>\r\n       </property>\r\n       <property name=\"font\">\r\n        <font>\r\n         <family>Arial</family>\r\n        </font>\r\n       </property>\r\n       <property name=\"title\">\r\n        <string>Readout options</string>\r\n       </property>\r\n       <widget class=\"QCheckBox\" name=\"avgCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>20</y>\r\n          <width>70</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Average</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"highresCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>40</y>\r\n          <width>70</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Highres</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"usb2Check\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>60</y>\r\n          <width>70</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>USB2</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"logicCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>80</y>\r\n          <width>91</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Logic analyzer</string>\r\n        </property>\r\n       </widget>\r\n      </widget>\r\n      <widget class=\"QGroupBox\" name=\"channelgroupBox_2\">\r\n       <property name=\"geometry\">\r\n        <rect>\r\n         <x>290</x>\r\n         <y>380</y>\r\n         <width>111</width>\r\n         <height>131</height>\r\n        </rect>\r\n       </property>\r\n       <property name=\"font\">\r\n        <font>\r\n         <family>Arial</family>\r\n        </font>\r\n       </property>\r\n       <property name=\"title\">\r\n        <string>View options</string>\r\n       </property>\r\n       <widget class=\"QCheckBox\" name=\"gridCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>20</y>\r\n          <width>70</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Grid</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"markerCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>40</y>\r\n          <width>70</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Markers</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QSpinBox\" name=\"resampBox\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>100</y>\r\n          <width>42</width>\r\n          <height>22</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLabel\" name=\"label_7\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>60</x>\r\n          <y>110</y>\r\n          <width>41</width>\r\n          <height>16</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Resamp</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"drawingCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>60</y>\r\n          <width>70</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"sizePolicy\">\r\n         <sizepolicy hsizetype=\"Minimum\" vsizetype=\"Fixed\">\r\n          <horstretch>0</horstretch>\r\n          <verstretch>0</verstretch>\r\n         </sizepolicy>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Drawing</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n      </widget>\r\n      <widget class=\"QGroupBox\" name=\"channelgroupBox_4\">\r\n       <property name=\"geometry\">\r\n        <rect>\r\n         <x>0</x>\r\n         <y>0</y>\r\n         <width>161</width>\r\n         <height>421</height>\r\n        </rect>\r\n       </property>\r\n       <property name=\"font\">\r\n        <font>\r\n         <family>Arial</family>\r\n        </font>\r\n       </property>\r\n       <property name=\"title\">\r\n        <string>Fast ADC channel options</string>\r\n       </property>\r\n       <widget class=\"QCheckBox\" name=\"decodeCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>340</y>\r\n          <width>91</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Serial decode</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QSpinBox\" name=\"chanBox\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>60</x>\r\n          <y>20</y>\r\n          <width>51</width>\r\n          <height>21</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"maximum\">\r\n         <number>255</number>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"allchanCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>120</x>\r\n          <y>20</y>\r\n          <width>41</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>All</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLabel\" name=\"label\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>20</y>\r\n          <width>47</width>\r\n          <height>13</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Channel</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"minidisplayCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>320</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Show on mini-screen</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"acdcCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>230</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>AC coupled</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>false</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"supergainCheck\">\r\n        <property name=\"enabled\">\r\n         <bool>true</bool>\r\n        </property>\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>210</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Supergain x100</string>\r\n        </property>\r\n        <property name=\"checkable\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"ohmCheck\">\r\n        <property name=\"enabled\">\r\n         <bool>false</bool>\r\n        </property>\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>250</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>50 Ohm</string>\r\n        </property>\r\n        <property name=\"checkable\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"gainCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>190</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Gain x10</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"chanonCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>150</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Displayed</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"trigchanonCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>170</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Triggering on</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"oversampCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>270</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Oversampling</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>false</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QFrame\" name=\"frame_3\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>50</y>\r\n          <width>141</width>\r\n          <height>91</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"frameShape\">\r\n         <enum>QFrame::Panel</enum>\r\n        </property>\r\n        <property name=\"frameShadow\">\r\n         <enum>QFrame::Raised</enum>\r\n        </property>\r\n        <widget class=\"QLabel\" name=\"label_8\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>60</x>\r\n           <y>30</y>\r\n           <width>71</width>\r\n           <height>20</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>DAC value</string>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QToolButton\" name=\"downposButton\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>10</x>\r\n           <y>50</y>\r\n           <width>31</width>\r\n           <height>31</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>...</string>\r\n         </property>\r\n         <property name=\"arrowType\">\r\n          <enum>Qt::DownArrow</enum>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QSpinBox\" name=\"dacBox\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>60</x>\r\n           <y>50</y>\r\n           <width>71</width>\r\n           <height>21</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"maximum\">\r\n          <number>8191</number>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QToolButton\" name=\"upposButton\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>10</x>\r\n           <y>20</y>\r\n           <width>31</width>\r\n           <height>31</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>...</string>\r\n         </property>\r\n         <property name=\"arrowType\">\r\n          <enum>Qt::UpArrow</enum>\r\n         </property>\r\n        </widget>\r\n        <widget class=\"QLabel\" name=\"label_5\">\r\n         <property name=\"geometry\">\r\n          <rect>\r\n           <x>10</x>\r\n           <y>0</y>\r\n           <width>47</width>\r\n           <height>13</height>\r\n          </rect>\r\n         </property>\r\n         <property name=\"font\">\r\n          <font>\r\n           <family>Arial</family>\r\n          </font>\r\n         </property>\r\n         <property name=\"text\">\r\n          <string>Position</string>\r\n         </property>\r\n        </widget>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"overoversampCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>290</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Over-oversampling</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>false</bool>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"fftCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>360</y>\r\n          <width>91</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Show FFT</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"persistCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>380</y>\r\n          <width>91</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Show persist</string>\r\n        </property>\r\n       </widget>\r\n      </widget>\r\n      <widget class=\"QGroupBox\" name=\"channelgroupBox_5\">\r\n       <property name=\"geometry\">\r\n        <rect>\r\n         <x>0</x>\r\n         <y>430</y>\r\n         <width>161</width>\r\n         <height>81</height>\r\n        </rect>\r\n       </property>\r\n       <property name=\"font\">\r\n        <font>\r\n         <family>Arial</family>\r\n        </font>\r\n       </property>\r\n       <property name=\"title\">\r\n        <string>Slow ADC channel options</string>\r\n       </property>\r\n       <widget class=\"QSpinBox\" name=\"slowchanBox\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>60</x>\r\n          <y>20</y>\r\n          <width>51</width>\r\n          <height>21</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"minimum\">\r\n         <number>-1</number>\r\n        </property>\r\n        <property name=\"maximum\">\r\n         <number>255</number>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"allslowchanCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>120</x>\r\n          <y>20</y>\r\n          <width>41</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>All</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QLabel\" name=\"label_9\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>20</y>\r\n          <width>47</width>\r\n          <height>13</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Channel</string>\r\n        </property>\r\n       </widget>\r\n       <widget class=\"QCheckBox\" name=\"slowchanonCheck\">\r\n        <property name=\"geometry\">\r\n         <rect>\r\n          <x>10</x>\r\n          <y>50</y>\r\n          <width>121</width>\r\n          <height>17</height>\r\n         </rect>\r\n        </property>\r\n        <property name=\"font\">\r\n         <font>\r\n          <family>Arial</family>\r\n         </font>\r\n        </property>\r\n        <property name=\"text\">\r\n         <string>Displayed</string>\r\n        </property>\r\n        <property name=\"checked\">\r\n         <bool>true</bool>\r\n        </property>\r\n       </widget>\r\n      </widget>\r\n     </widget>\r\n    </item>\r\n   </layout>\r\n  </widget>\r\n  <widget class=\"QMenuBar\" name=\"menubar\">\r\n   <property name=\"geometry\">\r\n    <rect>\r\n     <x>0</x>\r\n     <y>0</y>\r\n     <width>1321</width>\r\n     <height>21</height>\r\n    </rect>\r\n   </property>\r\n   <widget class=\"QMenu\" name=\"menuFile\">\r\n    <property name=\"title\">\r\n     <string>File</string>\r\n    </property>\r\n    <addaction name=\"actionRecord\"/>\r\n   </widget>\r\n   <widget class=\"QMenu\" name=\"menuCalibration\">\r\n    <property name=\"title\">\r\n     <string>Calibration</string>\r\n    </property>\r\n    <addaction name=\"actionRead_from_file\"/>\r\n    <addaction name=\"actionStore_to_file\"/>\r\n    <addaction name=\"actionDo_autocalibration\"/>\r\n   </widget>\r\n   <widget class=\"QMenu\" name=\"menuOther\">\r\n    <property name=\"title\">\r\n     <string>Other</string>\r\n    </property>\r\n    <addaction name=\"actionOutput_clk_left\"/>\r\n    <addaction name=\"separator\"/>\r\n    <addaction name=\"actionAllow_same_chan_coin\"/>\r\n   </widget>\r\n   <addaction name=\"menuFile\"/>\r\n   <addaction name=\"menuCalibration\"/>\r\n   <addaction name=\"menuOther\"/>\r\n  </widget>\r\n  <widget class=\"QStatusBar\" name=\"statusBar\">\r\n   <property name=\"autoFillBackground\">\r\n    <bool>false</bool>\r\n   </property>\r\n  </widget>\r\n  <action name=\"actionRecord\">\r\n   <property name=\"text\">\r\n    <string>Record to file</string>\r\n   </property>\r\n  </action>\r\n  <action name=\"actionRead_from_file\">\r\n   <property name=\"text\">\r\n    <string>Read from file</string>\r\n   </property>\r\n  </action>\r\n  <action name=\"actionStore_to_file\">\r\n   <property name=\"text\">\r\n    <string>Store to file</string>\r\n   </property>\r\n  </action>\r\n  <action name=\"actionDo_autocalibration\">\r\n   <property name=\"text\">\r\n    <string>Do autocalibration</string>\r\n   </property>\r\n  </action>\r\n  <action name=\"actionOutput_clk_left\">\r\n   <property name=\"checkable\">\r\n    <bool>true</bool>\r\n   </property>\r\n   <property name=\"text\">\r\n    <string>Output clk left</string>\r\n   </property>\r\n  </action>\r\n  <action name=\"actionAllow_same_chan_coin\">\r\n   <property name=\"checkable\">\r\n    <bool>true</bool>\r\n   </property>\r\n   <property name=\"text\">\r\n    <string>Allow same chan coin</string>\r\n   </property>\r\n  </action>\r\n </widget>\r\n <customwidgets>\r\n  <customwidget>\r\n   <class>PlotWidget</class>\r\n   <extends>QGraphicsView</extends>\r\n   <header>pyqtgraph</header>\r\n  </customwidget>\r\n </customwidgets>\r\n <resources/>\r\n <connections/>\r\n</ui>\r\n"
  },
  {
    "path": "software/HaasoscopeDraw.py",
    "content": "import libs.HaasoscopeLib as HaasoscopeLib\r\nreload(HaasoscopeLib) # in case you changed it, and to always load some defaults\r\nimport time, sys\r\nimport matplotlib.pyplot as plt\r\n#import numpy as np\r\nfrom serial import SerialException\r\n\r\n#Some options\r\n#HaasoscopeLib.num_board = 2 # Number of Haasoscope boards to read out (default is 1)\r\n#HaasoscopeLib.ram_width = 12 # width in bits of sample ram to use (e.g. 9==512 samples (default), 12(max)==4096 samples) (min is 2)\r\n#HaasoscopeLib.max10adcchans = [(0,110),(0,118),(1,110),(1,118)] #max10adc channels to draw (board, channel on board), channels: 110=ain1, 111=pin6, ..., 118=pin14, 119=temp # default is none, []\r\n\r\nd = HaasoscopeLib.Haasoscope()\r\n\r\n#Some other options\r\n#d.serport=\"COM7\" # the name of the serial port on your computer, connected to Haasoscope, like /dev/ttyUSB0 or COM8, leave blank to detect automatically!\r\n#d.domaindrawing=False # whether to keep updating the main plot (on by default)\r\n#d.serialdelaytimerwait=0 #50 #100 #150 #300 # 600 # delay (in 2 us steps) between each 32 bytes of serial output (set to 600 for some slow USB serial setups, but 0 normally)\r\n#d.dolockin=True; d.dolockinplot=d.domaindrawing # whether to calculate the lockin info on the FPGA and read it out (off by default)\r\n\r\ntry:\r\n\r\n    savetofile=False # save scope data to file\r\n    if savetofile: outf = open(\"Haasoscope_out_\"+time.strftime(\"%Y%m%d-%H%M%S\")+\".csv\",\"wt\")\r\n    \r\n    if not d.setup_connections(): sys.exit()\r\n    if not d.init(): sys.exit()\r\n    d.on_launch()\r\n    \r\n    #can change some things\r\n    #d.selectedchannel=0\r\n    #d.tellswitchgain(d.selectedchannel)\r\n    #d.togglesupergainchan(d.selectedchannel)\r\n    #d.toggletriggerchan(d.selectedchannel)\r\n    #d.togglelogicanalyzer() # run the logic analyzer\r\n    #d.sendi2c(\"21 13 f0\") # set extra pins E24 B0,1,2,3 off and B4,5,6,7 on (works for v8 only)\r\n    \r\n    nevents=0; oldnevents=0; tinterval=100.; oldtime=time.time()\r\n    while 1:\r\n        if d.paused: time.sleep(.1)\r\n        else:\r\n            if not d.getchannels(): break\r\n            \r\n            #print d.xydata[0][0][12], d.xydata[0][1][12] # print the x and y data, respectively, for the 13th sample on fast adc channel 0\r\n            \r\n            if savetofile:\r\n                outf.write(str(nevents)); outf.write(\",\") # start of each line is the event number\r\n                outf.write(str(time.time())); outf.write(\",\") # next column is the time in seconds of the current event\r\n                d.xydata[0][1].tofile(outf,\",\",format=\"%.3f\") # save y data (1) from fast adc channel 0\r\n                outf.write(\"\\n\") # newline\r\n            \r\n            #if len(HaasoscopeLib.max10adcchans)>0: print \"slow\", d.xydataslow[0][0][99], d.xydataslow[0][1][99] # print the x and y data, respectively, for the 100th sample on slow max10 adc channel 0\r\n            \r\n            #if d.dolockin: print d.lockinamp, d.lockinphase # print the lockin info\r\n            \r\n            #if d.fftdrawn: # print some fft info (the freq with the biggest amplitude)\r\n            #    fftxdata = d.fftfreqplot.get_xdata(); fftydata = d.fftfreqplot.get_ydata()\r\n            #    maxfftydata=np.max(fftydata); maxfftfrq=fftxdata[fftydata.argmax()]\r\n            #    print \"max amp=\",maxfftydata, \"at freq=\",maxfftfrq, d.fftax.get_xlabel().replace('Freq ','')\r\n            \r\n            if d.db: print time.time()-d.oldtime,\"done with evt\",nevents\r\n            nevents+=1\r\n            if nevents-oldnevents >= tinterval:\r\n                elapsedtime=time.time()-oldtime\r\n                lastrate = round(tinterval/elapsedtime,2)\r\n                print nevents,\"events,\",lastrate,\"Hz\"\r\n                oldtime=time.time()\r\n                if lastrate>40: tinterval=500.\r\n                else: tinterval=100.\r\n                oldnevents=nevents\r\n            if d.getone and not d.timedout: d.paused=True\r\n        d.redraw()\r\n        if len(plt.get_fignums())==0:\r\n            if d.domaindrawing: break # quit when all the plots have been closed\r\n            elif nevents>50: break\r\nexcept SerialException:\r\n    print \"serial com failed!\"\r\nfinally:\r\n    d.cleanup()\r\n    if savetofile: outf.close()\r\n"
  },
  {
    "path": "software/HaasoscopeFFT.ui",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<ui version=\"4.0\">\n <class>FFTWindow</class>\n <widget class=\"QMainWindow\" name=\"FFTWindow\">\n  <property name=\"geometry\">\n   <rect>\n    <x>0</x>\n    <y>0</y>\n    <width>800</width>\n    <height>600</height>\n   </rect>\n  </property>\n  <property name=\"windowTitle\">\n   <string>HaasoscopeQt FFT</string>\n  </property>\n  <widget class=\"QWidget\" name=\"centralwidget\">\n   <layout class=\"QGridLayout\" name=\"gridLayout\">\n    <item row=\"0\" column=\"0\" colspan=\"2\">\n     <widget class=\"PlotWidget\" name=\"plot\">\n      <property name=\"font\">\n       <font>\n        <family>Arial</family>\n       </font>\n      </property>\n     </widget>\n    </item>\n   </layout>\n  </widget>\n  <widget class=\"QMenuBar\" name=\"menubar\">\n   <property name=\"geometry\">\n    <rect>\n     <x>0</x>\n     <y>0</y>\n     <width>800</width>\n     <height>21</height>\n    </rect>\n   </property>\n  </widget>\n  <widget class=\"QStatusBar\" name=\"statusBar\">\n   <property name=\"autoFillBackground\">\n    <bool>false</bool>\n   </property>\n  </widget>\n </widget>\n <customwidgets>\n  <customwidget>\n   <class>PlotWidget</class>\n   <extends>QGraphicsView</extends>\n   <header>pyqtgraph</header>\n  </customwidget>\n </customwidgets>\n <resources/>\n <connections/>\n</ui>\n"
  },
  {
    "path": "software/HaasoscopePersist.ui",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<ui version=\"4.0\">\n <class>PersistWindow</class>\n <widget class=\"QMainWindow\" name=\"PersistWindow\">\n  <property name=\"geometry\">\n   <rect>\n    <x>0</x>\n    <y>0</y>\n    <width>800</width>\n    <height>600</height>\n   </rect>\n  </property>\n  <property name=\"windowTitle\">\n   <string>HaasoscopeQt Persist</string>\n  </property>\n  <widget class=\"QWidget\" name=\"centralwidget\">\n   <layout class=\"QGridLayout\" name=\"gridLayout\">\n    <item row=\"0\" column=\"0\" colspan=\"2\">\n     <widget class=\"PlotWidget\" name=\"plot\">\n      <property name=\"font\">\n       <font>\n        <family>Arial</family>\n       </font>\n      </property>\n     </widget>\n    </item>\n   </layout>\n  </widget>\n  <widget class=\"QMenuBar\" name=\"menubar\">\n   <property name=\"geometry\">\n    <rect>\n     <x>0</x>\n     <y>0</y>\n     <width>800</width>\n     <height>21</height>\n    </rect>\n   </property>\n  </widget>\n  <widget class=\"QStatusBar\" name=\"statusBar\">\n   <property name=\"autoFillBackground\">\n    <bool>false</bool>\n   </property>\n  </widget>\n </widget>\n <customwidgets>\n  <customwidget>\n   <class>PlotWidget</class>\n   <extends>QGraphicsView</extends>\n   <header>pyqtgraph</header>\n  </customwidget>\n </customwidgets>\n <resources/>\n <connections/>\n</ui>\n"
  },
  {
    "path": "software/HaasoscopeQt.py",
    "content": "# -*- coding: utf-8 -*-\n\"\"\"\npyqtgraph widget with UI template created with Qt Designer\n\"\"\"\n\nimport numpy as np\nimport sys, time\nfrom serial import SerialException\nimport pyqtgraph as pg\nfrom pyqtgraph.Qt import QtCore, QtWidgets, QtGui, loadUiType\nimport h5py\n\n# Define fft window class from template\nFFTWindowTemplate, FFTTemplateBaseClass = loadUiType(\"HaasoscopeFFT.ui\")\nclass FFTWindow(FFTTemplateBaseClass):\n    def __init__(self):\n        FFTTemplateBaseClass.__init__(self)\n        self.ui = FFTWindowTemplate()\n        self.ui.setupUi(self)\n        self.ui.plot.setLabel('bottom', 'Freq (MHz)')\n        self.ui.plot.setLabel('left', '|Y(freq)|')\n        self.ui.plot.showGrid(x=True, y=True, alpha=1.0)\n        self.ui.plot.setRange(xRange=(0.0, 65.0))\n        self.ui.plot.setBackground('w')\n        c = (10, 10, 10)\n        self.fftpen = pg.mkPen(color=c)  # add linewidth=0.5, alpha=.5\n        self.fftline = self.ui.plot.plot(pen=self.fftpen, name=\"fft_plot\")\n        self.fftlastTime = time.time() - 10\n        self.fftyrange = 1\n\n# Define persist window class from template\nPersistWindowTemplate, PersistTemplateBaseClass = loadUiType(\"HaasoscopePersist.ui\")\nclass PersistWindow(PersistTemplateBaseClass):\n    def __init__(self):\n        PersistTemplateBaseClass.__init__(self)\n        self.ui = PersistWindowTemplate()\n        self.ui.setupUi(self)\n        self.ui.plot.setLabel('bottom', 'Time')\n        self.ui.plot.setLabel('left', 'Volts')\n        self.ui.plot.showGrid(x=True, y=True, alpha=1.0)\n        self.ui.plot.setBackground('w')\n\n# Define main window class from template\nWindowTemplate, TemplateBaseClass = loadUiType(\"Haasoscope.ui\")\nclass MainWindow(TemplateBaseClass):\n    def __init__(self):\n        TemplateBaseClass.__init__(self)\n        \n        # Create the main window\n        self.ui = WindowTemplate()\n        self.ui.setupUi(self)\n        self.ui.runButton.clicked.connect(self.dostartstop)\n        self.ui.actionRecord.triggered.connect(self.record)\n        self.ui.verticalSlider.valueChanged.connect(self.triggerlevelchanged)\n        self.ui.verticalSlider2.valueChanged.connect(self.triggerlevel2changed)\n        self.ui.thresh2Check.clicked.connect(self.thresh2)\n        self.ui.horizontalSlider.valueChanged.connect(self.triggerposchanged)\n        self.ui.rollingButton.clicked.connect(self.rolling)\n        self.ui.singleButton.clicked.connect(self.single)\n        self.ui.timeslowButton.clicked.connect(self.timeslow)\n        self.ui.timefastButton.clicked.connect(self.timefast)\n        self.ui.risingedgeCheck.stateChanged.connect(self.risingfalling)\n        self.ui.exttrigCheck.stateChanged.connect(self.exttrig)\n        self.ui.totBox.valueChanged.connect(self.tot)\n        self.ui.coinBox.valueChanged.connect(self.coin)\n        self.ui.cointimeBox.valueChanged.connect(self.cointime)\n        self.ui.autorearmCheck.stateChanged.connect(self.autorearm)\n        self.ui.noselftrigCheck.stateChanged.connect(self.noselftrig)\n        self.ui.avgCheck.stateChanged.connect(self.avg)\n        self.ui.logicCheck.stateChanged.connect(self.logic)\n        self.ui.highresCheck.stateChanged.connect(self.highres)\n        self.ui.usb2Check.stateChanged.connect(self.usb2)\n        self.ui.gridCheck.stateChanged.connect(self.grid)\n        self.ui.markerCheck.stateChanged.connect(self.marker)\n        self.ui.resampBox.valueChanged.connect(self.resamp)\n        self.ui.upposButton.clicked.connect(self.uppos)\n        self.ui.downposButton.clicked.connect(self.downpos)\n        self.ui.chanBox.valueChanged.connect(self.selectchannel)\n        self.ui.dacBox.valueChanged.connect(self.setlevel)\n        self.ui.minidisplayCheck.stateChanged.connect(self.minidisplay)\n        self.ui.acdcCheck.stateChanged.connect(self.acdc)\n        self.ui.gainCheck.stateChanged.connect(self.gain)\n        self.ui.supergainCheck.stateChanged.connect(self.supergain)\n        self.ui.actionRead_from_file.triggered.connect(self.actionRead_from_file)\n        self.ui.actionStore_to_file.triggered.connect(self.actionStore_to_file)\n        self.ui.actionOutput_clk_left.triggered.connect(self.actionOutput_clk_left)\n        self.ui.actionAllow_same_chan_coin.triggered.connect(self.actionAllow_same_chan_coin)\n        self.ui.actionDo_autocalibration.triggered.connect(self.actionDo_autocalibration)\n        self.ui.chanonCheck.stateChanged.connect(self.chanon)\n        self.ui.slowchanonCheck.stateChanged.connect(self.slowchanon)\n        self.ui.trigchanonCheck.stateChanged.connect(self.trigchanon)\n        self.ui.oversampCheck.clicked.connect(self.oversamp)\n        self.ui.overoversampCheck.clicked.connect(self.overoversamp)\n        self.ui.decodeCheck.clicked.connect(self.decode)\n        self.ui.fftCheck.clicked.connect(self.fft)\n        self.ui.persistCheck.clicked.connect(self.persist)\n        self.ui.drawingCheck.clicked.connect(self.drawing)\n        self.db=False\n        self.lastTime = time.time()\n        self.fps = None\n        self.lines = []\n        self.otherlines = []\n        self.savetofile=False # save scope data to file\n        self.doh5=False # use the h5 binary file format\n        self.numrecordeventsperfile=1000 # number of events in each file to record before opening new file\n        self.timer = QtCore.QTimer()\n        self.timer.timeout.connect(self.updateplot)\n        self.timer2 = QtCore.QTimer()\n        self.timer2.timeout.connect(self.drawtext)\n        self.selectchannel()\n        self.ui.statusBar.showMessage(\"Hello!\")\n        self.ui.plot.setBackground('w')\n        self.show()\n\n    def selectchannel(self):\n        d.selectedchannel=self.ui.chanBox.value()\n        self.ui.dacBox.setValue(d.chanlevel[d.selectedchannel].astype(int))\n        \n        if d.chanforscreen == d.selectedchannel:   self.ui.minidisplayCheck.setCheckState(QtCore.Qt.Checked)\n        else:   self.ui.minidisplayCheck.setCheckState(QtCore.Qt.Unchecked)\n        if d.acdc[d.selectedchannel]:   self.ui.acdcCheck.setCheckState(QtCore.Qt.Unchecked)\n        else:   self.ui.acdcCheck.setCheckState(QtCore.Qt.Checked)\n        if d.gain[d.selectedchannel]:   self.ui.gainCheck.setCheckState(QtCore.Qt.Unchecked)\n        else:   self.ui.gainCheck.setCheckState(QtCore.Qt.Checked)\n        if d.supergain[d.selectedchannel]:   self.ui.supergainCheck.setCheckState(QtCore.Qt.Unchecked)\n        else:   self.ui.supergainCheck.setCheckState(QtCore.Qt.Checked)\n        if d.havereadswitchdata: self.ui.supergainCheck.setEnabled(False)\n        \n        chanonboard = d.selectedchannel%HaasoscopeLibQt.num_chan_per_board\n        theboard = HaasoscopeLibQt.num_board-1-int(d.selectedchannel/HaasoscopeLibQt.num_chan_per_board)\n        if trigboardport!=\"\" and trigboardport!=\"auto\" and trigboard.extclock:\n            if trigboard.histostosend != theboard: trigboard.set_histostosend(theboard)\n\n        if d.havereadswitchdata:\n            if d.testBit(d.switchpos[theboard],chanonboard):   self.ui.ohmCheck.setCheckState(QtCore.Qt.Unchecked)\n            else:   self.ui.ohmCheck.setCheckState(QtCore.Qt.Checked)\n            \n        if d.dousb:   self.ui.usb2Check.setCheckState(QtCore.Qt.Checked)\n        else:   self.ui.usb2Check.setCheckState(QtCore.Qt.Unchecked)\n        \n        if len(self.lines)>0:\n            if self.lines[d.selectedchannel].isVisible():   self.ui.chanonCheck.setCheckState(QtCore.Qt.Checked)\n            else:   self.ui.chanonCheck.setCheckState(QtCore.Qt.Unchecked)\n        if d.trigsactive[d.selectedchannel]:   self.ui.trigchanonCheck.setCheckState(QtCore.Qt.Checked)\n        else:   self.ui.trigchanonCheck.setCheckState(QtCore.Qt.Unchecked)\n        \n        if d.dooversample[d.selectedchannel]>0:   self.ui.oversampCheck.setCheckState(QtCore.Qt.Checked)\n        else:   self.ui.oversampCheck.setCheckState(QtCore.Qt.Unchecked)\n        if d.selectedchannel%HaasoscopeLibQt.num_chan_per_board>1:   self.ui.oversampCheck.setEnabled(False)\n        else:  self.ui.oversampCheck.setEnabled(True)\n        \n        if d.dooversample[d.selectedchannel]>=9:   self.ui.overoversampCheck.setCheckState(QtCore.Qt.Checked)\n        else:   self.ui.overoversampCheck.setCheckState(QtCore.Qt.Unchecked)\n        if d.selectedchannel%HaasoscopeLibQt.num_chan_per_board>0:  self.ui.overoversampCheck.setEnabled(False)\n        else:   self.ui.overoversampCheck.setEnabled(True)\n    \n    def oversamp(self):\n        if d.oversamp(d.selectedchannel)>=0:\n            self.prepareforsamplechange()\n            self.timechanged()\n            if d.dooversample[d.selectedchannel] > 0:\n                #turn off chan+2\n                self.lines[d.selectedchannel+2].setVisible(False)\n                if d.trigsactive[d.selectedchannel+2]: d.toggletriggerchan(d.selectedchannel+2)\n            else:\n                # turn on chan+2\n                self.lines[d.selectedchannel + 2].setVisible(True)\n                if not d.trigsactive[d.selectedchannel + 2]: d.toggletriggerchan(d.selectedchannel + 2)\n    \n    def overoversamp(self):\n        if d.overoversamp()>=0:\n            self.prepareforsamplechange()\n            self.timechanged()\n            #turn off chan+1\n            self.lines[d.selectedchannel+1].setVisible(False)\n            if d.trigsactive[d.selectedchannel+1]: d.toggletriggerchan(d.selectedchannel+2)\n    \n    def chanon(self):\n        if self.ui.chanonCheck.checkState() == QtCore.Qt.Checked:\n            self.lines[d.selectedchannel].setVisible(True)\n            self.ui.trigchanonCheck.setCheckState(QtCore.Qt.Checked)\n        else:\n            self.lines[d.selectedchannel].setVisible(False)\n            self.ui.trigchanonCheck.setCheckState(QtCore.Qt.Unchecked)\n        \n    def trigchanon(self):\n        if self.ui.trigchanonCheck.checkState() == QtCore.Qt.Checked:\n            if not d.trigsactive[d.selectedchannel]: d.toggletriggerchan(d.selectedchannel)\n        else:\n            if d.trigsactive[d.selectedchannel]: d.toggletriggerchan(d.selectedchannel)\n    \n    def slowchanon(self):\n        maxchan=self.ui.slowchanBox.value()+HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board\n        if self.ui.slowchanonCheck.checkState() == QtCore.Qt.Checked:\n            self.lines[maxchan].setVisible(True)\n        else:\n            self.lines[maxchan].setVisible(False)\n    \n    def acdc(self):\n        if self.ui.acdcCheck.checkState() == QtCore.Qt.Checked: #ac coupled\n            if d.acdc[d.selectedchannel]:\n                d.setacdc()\n        if self.ui.acdcCheck.checkState() == QtCore.Qt.Unchecked: #dc coupled\n            if not d.acdc[d.selectedchannel]:\n                d.setacdc()\n    \n    def gain(self):\n        if self.ui.gainCheck.checkState() == QtCore.Qt.Checked: #x10\n            if d.gain[d.selectedchannel]:\n                d.tellswitchgain(d.selectedchannel)\n        if self.ui.gainCheck.checkState() == QtCore.Qt.Unchecked: #x1\n            if not d.gain[d.selectedchannel]:\n                d.tellswitchgain(d.selectedchannel)\n \n    def supergain(self):\n        if self.ui.supergainCheck.checkState() == QtCore.Qt.Checked: #x100\n            if d.supergain[d.selectedchannel]:\n                d.togglesupergainchan(d.selectedchannel)\n        if self.ui.supergainCheck.checkState() == QtCore.Qt.Unchecked: #x1\n            if not d.supergain[d.selectedchannel]:\n                d.togglesupergainchan(d.selectedchannel)\n                   \n    def minidisplay(self):\n        if self.ui.minidisplayCheck.checkState()==QtCore.Qt.Checked:\n            if d.chanforscreen != d.selectedchannel:\n                d.tellminidisplaychan(d.selectedchannel)\n\n    def posamount(self):\n        amount=10\n        modifiers = app.keyboardModifiers()\n        if modifiers == QtCore.Qt.ShiftModifier:\n            amount*=5\n        elif modifiers == QtCore.Qt.ControlModifier:\n            amount/=10\n        return amount\n    def uppos(self):\n        d.adjustvertical(True,self.posamount())\n        self.ui.dacBox.setValue(d.chanlevel[d.selectedchannel].astype(int))\n    def downpos(self):\n        d.adjustvertical(False,self.posamount())\n        self.ui.dacBox.setValue(d.chanlevel[d.selectedchannel].astype(int))\n    def setlevel(self):\n        if d.chanlevel[d.selectedchannel] != self.ui.dacBox.value():\n            d.chanlevel[d.selectedchannel] = self.ui.dacBox.value()\n            d.rememberdacvalue()\n            d.setdacvalue()\n    \n    def wheelEvent(self, event): #QWheelEvent\n        if hasattr(event,\"delta\"):\n            if event.delta()>0: self.uppos()\n            else: self.downpos()\n        elif hasattr(event,\"angleDelta\"):\n            if event.angleDelta()>0: self.uppos()\n            else: self.downpos()\n    \n    def keyPressEvent(self, event):\n        if event.key()==QtCore.Qt.Key_Up: self.uppos()\n        if event.key()==QtCore.Qt.Key_Down: self.downpos()\n        if event.key()==QtCore.Qt.Key_Left: self.timefast()\n        if event.key()==QtCore.Qt.Key_Right: self.timeslow()\n        modifiers = QtWidgets.QApplication.keyboardModifiers()\n        if event.key()==QtCore.Qt.Key_I:\n            if not modifiers == QtCore.Qt.ShiftModifier:\n                theboard = HaasoscopeLibQt.num_board - 1 - int(d.selectedchannel / HaasoscopeLibQt.num_chan_per_board)\n                d.increment_clk_phase(theboard)\n            else:\n                if trigboardport!=\"\": trigboard.increment_trig_board_clock_phase()\n        if event.key()==QtCore.Qt.Key_1: trigboard.set_prescale(0.1)\n        if event.key()==QtCore.Qt.Key_2: trigboard.set_prescale(0.2)\n        if event.key()==QtCore.Qt.Key_C: d.toggle_checkfastusbwriting()\n\n    def actionRead_from_file(self):\n        d.readcalib()\n        \n    def actionStore_to_file(self):\n        d.storecalib()\n\n    def actionDo_autocalibration(self):\n        print(\"starting autocalibration\")\n        d.autocalibchannel=0\n\n    def actionOutput_clk_left(self):\n        d.toggle_clk_last()\n        if trigboardport!=\"\": trigboard.setclock(True)\n\n    def actionAllow_same_chan_coin(self):\n        d.toggle_allow_same_chan_coin()\n\n    def exttrig(self):\n        d.toggleuseexttrig()\n         \n    def tot(self):\n        d.triggertimethresh = self.ui.totBox.value()\n        d.settriggertime(d.triggertimethresh)\n\n    def coin(self):\n        d.settrigcoin(self.ui.coinBox.value())\n    def cointime(self):\n        d.settrigcointime(self.ui.cointimeBox.value())\n        \n    def autorearm(self):\n        d.toggleautorearm()\n\n    def noselftrig(self):\n        d.donoselftrig()\n\n    def avg(self):\n        d.average = not d.average\n        print(\"average\",d.average)\n        \n    def logic(self):\n        d.togglelogicanalyzer()\n        if d.dologicanalyzer:\n            for li in np.arange(d.num_logic_inputs):\n                c=(0,0,0)\n                pen = pg.mkPen(color=c) # add linewidth=1.7, alpha=.65\n                self.lines[d.logicline1+li].setPen(pen)\n        else:\n            for li in np.arange(d.num_logic_inputs):\n                self.lines[d.logicline1+li].setPen(None)\n        \n    def highres(self):\n        d.togglehighres()\n        \n    def usb2(self):\n        if self.ui.usb2Check.checkState() == QtCore.Qt.Checked:\n            if not d.dousb:\n                d.toggledousb()\n        else:\n            if d.dousb:\n                d.toggledousb()\n        \n    def grid(self):\n        if self.ui.gridCheck.isChecked():\n            self.ui.plot.showGrid(x=True, y=True)\n        else:\n            self.ui.plot.showGrid(x=False, y=False)\n            \n    def marker(self):\n        if self.ui.markerCheck.isChecked():\n            for li in range(self.nlines):\n                self.lines[li].setSymbol(\"o\")\n                self.lines[li].setSymbolSize(3)\n                #self.lines[li].setSymbolPen(\"black\")\n                self.lines[li].setSymbolPen(self.linepens[li].color())\n                self.lines[li].setSymbolBrush(self.linepens[li].color())\n        else:\n            for li in range(self.nlines):\n                self.lines[li].setSymbol(None)\n                \n    def resamp(self):\n        d.sincresample = self.ui.resampBox.value()\n        if d.sincresample>0: d.xydata=np.empty([HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board,2,d.sincresample*(d.num_samples-1)],dtype=float)\n        else: d.xydata=np.empty([HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board,2,1*(d.num_samples-1)],dtype=float)\n        self.prepareforsamplechange()\n    \n    def dostartstop(self):        \n        if d.paused:\n            self.timer.start(0)\n            self.timer2.start(1000)\n            d.paused=False\n            self.ui.runButton.setChecked(True)            \n        else:\n            self.timer.stop()\n            self.timer2.stop()\n            d.paused=True\n            self.ui.runButton.setChecked(False)\n    \n    def prepareforsamplechange(self): #called when sampling is changed, to reset some things\n        d.recordedchannel=[]\n        #if d.doxyplot: plt.close(self.figxy)\n        #if d.recorddata: plt.close(self.fig2d)\n        \n    def triggerlevelchanged(self,value):\n        d.settriggerthresh(value)\n        self.hline = (float(  value-128  )*d.yscale/256.)\n        self.otherlines[1].setData( [d.min_x, d.max_x], [self.hline, self.hline] ) # horizontal line showing trigger threshold\n\n    def triggerlevel2changed(self,value):\n        d.settriggerthresh2(value)                \n        self.hline2 =(float(  value-128  )*d.yscale/256.)\n        self.otherlines[2].setVisible(True) # starts off being hidden, so now show it!\n        self.otherlines[2].setData( [d.min_x, d.max_x], [self.hline2, self.hline2] )\n        \n    def thresh2(self):\n        if self.ui.thresh2Check.checkState() == QtCore.Qt.Checked:\n            self.ui.verticalSlider2.setEnabled(True)\n            self.otherlines[2].setVisible(True)\n        else:\n            self.ui.verticalSlider2.setValue(0)\n            self.ui.verticalSlider2.setEnabled(False)\n            self.otherlines[2].setVisible(False)\n    \n    def triggerposchanged(self,value):\n        if value>253 or value<3: return\n        offset=5.0 # trig to readout delay\n        scal = d.num_samples/256.\n        point = value*scal + offset/pow(2,d.downsample)\n        if d.downsample<0: point = 128*scal + (point-128*scal)*pow(2,d.downsample)\n        d.settriggerpoint(int(point))\n        self.vline = float(  2*(value-128)/256. *d.xscale /d.xscaling)\n        self.otherlines[0].setData( [self.vline, self.vline], [d.min_y, d.max_y] ) # vertical line showing trigger time\n    \n    def rolling(self):\n        d.rolltrigger = not d.rolltrigger\n        d.tellrolltrig(d.rolltrigger)\n        if trigboardport!=\"\":\n            trigboard.togglerolling()\n        self.ui.rollingButton.setChecked(d.rolltrigger)\n        if d.rolltrigger: self.ui.rollingButton.setText(\"Rolling/Auto\")\n        else: self.ui.rollingButton.setText(\"Normal\")\n\n    def single(self):\n        d.getone = not d.getone\n        self.ui.singleButton.setChecked(d.getone)\n        \n    def timefast(self):\n        amount=1\n        modifiers = app.keyboardModifiers()\n        if modifiers == QtCore.Qt.ShiftModifier:\n            amount*=5\n        d.telldownsample(d.downsample-amount)\n        self.timechanged()\n    \n    def timeslow(self):\n        amount=1\n        modifiers = app.keyboardModifiers()\n        if modifiers == QtCore.Qt.ShiftModifier:\n            amount*=5\n        d.telldownsample(d.downsample+amount)\n        self.timechanged()\n    \n    def timechanged(self):\n        self.ui.plot.setRange(xRange=(d.min_x, d.max_x), yRange=(d.min_y, d.max_y)) \n        self.ui.plot.setMouseEnabled(x=False,y=False)\n        self.ui.plot.setLabel('bottom', d.xlabel)\n        self.ui.plot.setLabel('left', d.ylabel)\n        self.triggerposchanged(self.ui.horizontalSlider.value())\n        self.ui.timebaseBox.setText(\"downsample \"+str(d.downsample))\n        \n    def risingfalling(self):\n        d.fallingedge=not self.ui.risingedgeCheck.checkState()\n        d.settriggertype(d.fallingedge)\n\n    def decode(self):\n        if self.ui.decodeCheck.checkState() != QtCore.Qt.Checked:\n            # delete all previous labels\n            for label in self.decodelabels:\n                self.ui.plot.removeItem(label)\n\n    def fft(self):\n        if self.ui.fftCheck.checkState() == QtCore.Qt.Checked:\n            d.fftchan = d.selectedchannel\n            self.fftui = FFTWindow()\n            self.fftui.setWindowTitle('HaasoscopeQt FFT of channel ' + str(d.fftchan))\n            self.fftui.show()\n            d.dofft = True\n        else:\n            self.fftui.close()\n            d.dofft = False\n\n    def persist(self):\n        if self.ui.persistCheck.checkState() == QtCore.Qt.Checked:\n            self.persistui = PersistWindow()\n            self.persistui.setWindowTitle('HaasoscopeQt persist of channel ' + str(d.selectedchannel))\n            self.persistui.show()\n            d.recorddata=True; d.recorddatachan=d.selectedchannel; d.recordedchannel=[]\n            self.firstpersist=True\n            print(\"recorddata now\",d.recorddata,\"for channel\",d.recorddatachan)\n        else:\n            d.recorddata=False; d.recorddatachan=d.selectedchannel; d.recordedchannel=[]\n            print(\"recorddata now\",d.recorddata)\n            self.persistui.close()\n\n    def drawing(self):\n        if self.ui.drawingCheck.checkState() == QtCore.Qt.Checked:\n            d.dodrawing=True\n            print(\"drawing now\",d.dodrawing)\n        else:\n            d.dodrawing=False\n            print(\"drawing now\",d.dodrawing)\n\n    def record(self):\n        self.savetofile = not self.savetofile\n        if self.savetofile:\n            fname=\"xxx\"\n            if self.doh5:\n                fname=\"Haasoscope_out_\" + time.strftime(\"%Y%m%d-%H%M%S\") + \".h5\"\n                self.outf = h5py.File(fname,\"w\")\n            else:\n                fname=\"Haasoscope_out_\" + time.strftime(\"%Y%m%d-%H%M%S\") + \".csv\"\n                self.outf = open(fname,\"wt\")\n            self.ui.statusBar.showMessage(\"now recording to file: \"+fname)\n            self.ui.actionRecord.setText(\"Stop recording\")\n        else:\n            self.outf.close()\n            self.ui.statusBar.showMessage(\"stopped recording to file\")\n            self.ui.actionRecord.setText(\"Record to file\")\n    \n    def fastadclineclick(self, curve):\n        for li in range(self.nlines):\n            if curve is self.lines[li].curve:\n                maxchan=li-HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board\n                if maxchan>=0: # these are the slow ADC channels\n                    self.ui.slowchanBox.setValue(maxchan)\n                    #print \"selected slow curve\", maxchan\n                else:\n                    self.ui.chanBox.setValue(li)\n                    #print \"selected curve\", li\n                    modifiers = app.keyboardModifiers()\n                    if modifiers == QtCore.Qt.ShiftModifier:\n                        self.ui.trigchanonCheck.toggle()\n                    elif modifiers == QtCore.Qt.ControlModifier:\n                        self.ui.chanonCheck.toggle()\n    \n    \"\"\" TODO:       \n            elif event.key==\"ctrl+r\": \n                if self.ydatarefchan<0: self.ydatarefchan=self.selectedchannel\n                else: self.ydatarefchan=-1\n            elif event.key==\">\": self.refsinchan=self.selectedchannel; self.oldchanphase=-1.; self.reffreq=0;\n            elif event.key==\"Y\": \n                if self.selectedchannel+1>=len(self.dooversample): print \"can't do XY plot on last channel\"\n                else:\n                    if self.dooversample[self.selectedchannel]==self.dooversample[self.selectedchannel+1]:\n                        self.doxyplot=True; self.xychan=self.selectedchannel; print \"doxyplot now\",self.doxyplot,\"for channel\",self.xychan; return;\n                    else: print \"oversampling settings must match between channels for XY plotting\"\n    \"\"\"\n    \n    linepens=[]\n    def launch(self):        \n        self.nlines = HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board+len(HaasoscopeLibQt.max10adcchans)\n        if self.db: print(\"nlines=\",self.nlines)\n        for li in np.arange(self.nlines):\n            maxchan=li-HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board\n            c=(0,0,0)\n            if maxchan>=0: # these are the slow ADC channels\n                if HaasoscopeLibQt.num_board>1:\n                    board = int(HaasoscopeLibQt.num_board-1-HaasoscopeLibQt.max10adcchans[maxchan][0])\n                    if board % 4 == 0: c = (255 - 0.2 * 255 * maxchan, 0, 0)\n                    if board % 4 == 1: c = (0, 255 - 0.2 * 255 * maxchan, 0)\n                    if board % 4 == 2: c = (0, 0, 255 - 0.2 * 255 * maxchan)\n                    if board % 4 == 3: c = (255 - 0.2 * 255 * maxchan, 0, 255 - 0.2 * 255 * maxchan)\n                else:\n                    c=(0.1*(maxchan+1),0.1*(maxchan+1),0.1*(maxchan+1))\n                pen = pg.mkPen(color=c) # add linewidth=0.5, alpha=.5\n                line = self.ui.plot.plot(pen=pen,name=\"slowadc_\"+str(HaasoscopeLibQt.max10adcchans[maxchan]))\n            else: # these are the fast ADC channels\n                chan=li%4\n                board=int(li/4)\n                if self.db: print(\"chan =\",chan,\"and board =\",board)\n                if HaasoscopeLibQt.num_board>1:                    \n                    if board%4==0: c=(255-0.2*255*chan,0,0)\n                    if board%4==1: c=(0,255-0.2*255*chan,0)\n                    if board%4==2: c=(0,0,255-0.2*255*chan)\n                    if board%4==3: c=(255-0.2*255*chan,0,255-0.2*255*chan)\n                else:\n                    if chan==0: c=\"r\"\n                    if chan==1: c=\"g\"\n                    if chan==2: c=\"b\"\n                    if chan==3: c=\"m\"\n                pen = pg.mkPen(color=c) # add linewidth=1.0, alpha=.9\n                line = self.ui.plot.plot(pen=pen,name=d.chtext+str(li))\n            line.curve.setClickable(True)\n            line.curve.sigClicked.connect(self.fastadclineclick)\n            self.lines.append(line)\n            self.linepens.append(pen)\n        self.ui.chanBox.setMaximum(HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board-1)\n        self.ui.slowchanBox.setMinimum(0)\n        self.ui.slowchanBox.setMaximum(max(len(HaasoscopeLibQt.max10adcchans)-1,0))\n        #for the logic analyzer\n        for li in np.arange(d.num_logic_inputs):\n            line = self.ui.plot.plot(pen=None,name=\"logic_\"+str(li)) # not drawn by default\n            self.lines.append(line)\n            if li==0: d.logicline1=len(self.lines)-1 # remember index where this first logic line is\n        #other data to draw\n        if d.fitline1>-1:\n            pen = pg.mkPen(color=\"purple\") # add linewidth=0.5, alpha=.5\n            line = self.ui.plot.plot(pen=pen,name=\"fitline1\") # not drawn by default\n            line.setVisible(False)\n            self.lines.append(line)\n            d.fitline1=len(self.lines)-1 # remember index where this line is\n        #trigger lines\n        self.vline=0.0\n        pen = pg.mkPen(color=\"k\",width=1.0,style=QtCore.Qt.DashLine)\n        line = self.ui.plot.plot([self.vline, self.vline], [-2.0, 2.0], pen=pen,name=\"trigger time vert\")\n        self.otherlines.append(line)\n        self.hline = 0.0\n        pen = pg.mkPen(color=\"k\",width=1.0,style=QtCore.Qt.DashLine)\n        line = self.ui.plot.plot( [-2.0, 2.0], [self.hline, self.hline], pen=pen,name=\"trigger thresh horiz\")\n        self.otherlines.append(line)\n        self.hline2 = 0.0\n        pen = pg.mkPen(color=\"b\",width=1.0,style=QtCore.Qt.DashLine)\n        line = self.ui.plot.plot( [-2.0, 2.0], [self.hline2, self.hline2], pen=pen,name=\"trigger thresh2 horiz\") # not drawn by default\n        line.setVisible(False)\n        self.otherlines.append(line)\n        #other stuff\n        d.setxaxis()\n        d.setyaxis()\n        self.timechanged()\n        self.ui.totBox.setMaximum(d.num_samples)\n        self.ui.plot.showGrid(x=True, y=True)\n    \n    def closeEvent(self, event):\n        print(\"Handling closeEvent\")\n        self.timer.stop()\n        self.timer2.stop()\n        if trigboardport!=\"\": trigboard.cleanup()\n        d.cleanup()\n        if self.savetofile: self.outf.close()\n        if hasattr(self,\"fftui\"):\n            self.fftui.close()\n        if hasattr(self,\"persistui\"):\n            self.persistui.close()\n\n    decodelabels = []\n    def updateplot(self):\n        self.mainloop()\n        if d.timedout: return # don't draw old junk if there was a timeout getting data (as often the case with no rolling trigger)\n        if self.savetofile: self.dosavetofile()\n        if not self.ui.drawingCheck.checkState() == QtCore.Qt.Checked: return\n        for li in range(self.nlines):\n            maxchan=li-HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board\n            if maxchan>=0: # these are the slow ADC channels\n                self.lines[li].setData(d.xydataslow[maxchan][0],d.xydataslow[maxchan][1])\n            else:\n                self.lines[li].setData(d.xydata[li][0],d.xydata[li][1])\n        if d.dologicanalyzer:\n            for li in np.arange(d.num_logic_inputs):\n                self.lines[d.logicline1+li].setData(d.xydatalogic[li][0],d.xydatalogic[li][1])\n        if d.dofft:\n            self.fftui.fftline.setPen(self.linepens[d.fftchan])\n            self.fftui.fftline.setData(d.fftfreqplot_xdata,d.fftfreqplot_ydata)\n            self.fftui.ui.plot.setTitle(\"FFT plot of channel \"+str(d.fftchan))\n            self.fftui.ui.plot.setLabel('bottom', d.fftax_xlabel)\n            self.fftui.ui.plot.setRange(xRange=(0.0, d.fftax_xlim))\n            now = time.time()\n            dt = now - self.fftui.fftlastTime\n            if dt>3.0 or self.fftyrange<d.fftfreqplot_ydatamax*1.1:\n                self.fftui.fftlastTime = now\n                self.fftui.ui.plot.setRange(yRange=(0.0, d.fftfreqplot_ydatamax*1.1))\n                self.fftyrange = d.fftfreqplot_ydatamax * 1.1\n            if not self.fftui.isVisible(): # closed the fft window\n                d.dofft = False\n                self.ui.fftCheck.setCheckState(QtCore.Qt.Unchecked)\n        if d.recorddata:\n            if self.firstpersist:\n                self.image1 = pg.ImageItem(image=d.recorded2d,opacity=0.5)\n                self.persistui.ui.plot.addItem(self.image1)\n                self.persistui.ui.plot.setTitle(\"Persist plot of channel \"+str(d.recorddatachan))\n                self.cmap = pg.colormap.get('CET-D8')\n                self.firstpersist=False\n            else:\n                self.image1.setImage(image=d.recorded2d,opacity=0.5)\n            self.image1.setRect(QtCore.QRectF(d.min_x,d.min_y,d.max_x-d.min_x,d.max_y-d.min_y))\n            self.persistui.ui.plot.setLabel('bottom', d.xlabel)\n            self.bar = pg.ColorBarItem(interactive=False, values= (0, np.max(d.recorded2d)), cmap=self.cmap)\n            self.bar.setImageItem(self.image1)\n            if not self.persistui.isVisible(): # closed the fft window\n                d.recorddata = False\n                self.ui.persistCheck.setCheckState(QtCore.Qt.Unchecked)\n        if self.ui.decodeCheck.checkState() == QtCore.Qt.Checked:\n            # delete all previous labels\n            for label in self.decodelabels:\n                self.ui.plot.removeItem(label)\n            if d.downsample>=0:\n                resulttext,resultstart,resultend = d.decode()\n                #print(resulttext,resultstart, d.min_x, d.max_x, d.xscale, d.xscaling)\n                item=0\n                while item<len(resulttext):\n                    label = pg.TextItem(resulttext[item])\n                    label.setColor(self.linepens[d.selectedchannel].color())\n                    x=d.min_x+resultstart[item]*1e9/d.xscaling\n                    label.setPos( QtCore.QPointF(x, -1) )\n                    #print(x)\n                    self.ui.plot.addItem(label)\n                    self.decodelabels.append(label)\n                    item=item+1\n            else:\n                print(\"can't decode when downsample is <0... go slower!\")\n        now = time.time()\n        dt = now - self.lastTime + 0.00001\n        self.lastTime = now\n        if self.fps is None:\n            self.fps = 1.0/dt\n        else:\n            s = np.clip(dt*3., 0, 1)\n            self.fps = self.fps * (1-s) + (1.0/dt) * s\n        self.ui.plot.setTitle('%0.2f fps' % self.fps)\n        app.processEvents()\n\n    oldxscale=0\n    def dosavetofile(self):\n        time_s=str(time.time())\n        if self.doh5:\n            datatosave=d.xydata[:,1,:] # save all y data by default\n            if d.xscale != self.oldxscale:\n                datatosave=d.xydata # since the x scale changed (or is the first event), save all data for this event\n                self.oldxscale=d.xscale\n            h5ds = self.outf.create_dataset(str(self.nevents), data=datatosave, dtype='float32', compression=\"lzf\") #compression=\"gzip\", compression_opts=5)\n            #about 3kB per event per board (4 channels) for 512 samples\n            h5ds.attrs['time']=time_s\n            h5ds.attrs['trigger_position']=str(self.vline*d.xscaling)\n            h5ds.attrs['sample_period'] =str(2.*d.xscale/d.num_samples)\n            h5ds.attrs['num_samples'] =str(d.num_samples)\n            if d.dologicanalyzer: h5ds = self.outf.create_dataset(str(self.nevents)+\"_logic\", data=d.xydatalogicraw, dtype='uint8', compression=\"lzf\")\n            # see h5py_analyze_example.py for how to read in python\n        else:\n            for c in range(HaasoscopeLibQt.num_chan_per_board*HaasoscopeLibQt.num_board):\n                if self.lines[c].isVisible(): # only save the data for visible channels\n                    self.outf.write(str(self.nevents)+\",\") # start of each line is the event number\n                    self.outf.write(time_s+\",\") # next column is the time in seconds of the current event\n                    self.outf.write(str(c)+\",\") # next column is the channel number\n                    self.outf.write(str(self.vline*d.xscaling)+\",\") # next column is the trigger time\n                    self.outf.write(str(2.*d.xscale/d.num_samples)+\",\") # next column is the time between samples, in ns\n                    self.outf.write(str(d.num_samples)+\",\") # next column is the number of samples\n                    d.xydata[c][1].tofile(self.outf,\",\",format=\"%.3f\") # save y data (1) from fast adc channel c\n                    self.outf.write(\"\\n\") # newline\n            if d.dologicanalyzer:\n                for b in range(HaasoscopeLibQt.num_board):\n                    d.xydatalogicraw[b].tofile(self.outf,\",\")\n                    self.outf.write(\"\\n\")  # newline\n        # should also write out the 8 digital bits per board (if logic analyzer on)\n        # stored in d.xydatalogicraw[board]\n    \n    nevents=0\n    oldnevents=0\n    tinterval=100.\n    oldtime=time.time()\n    def mainloop(self):\n        if d.paused: time.sleep(.1)\n        else:\n            try: status=d.getchannels()\n            except SerialException:\n                print(\"Serial exception getting channels!!\")\n                sys.exit(1)\n            except DeviceError:\n                print(\"Device error\")\n                sys.exit(1)\n            if status==2: self.selectchannel() #we updated the switch data\n            if d.db: print(time.time()-d.oldtime,\"done with evt\",self.nevents)\n            self.nevents += 1\n            if self.nevents-self.oldnevents >= self.tinterval:\n                now=time.time()\n                elapsedtime=now-self.oldtime\n                self.oldtime=now\n                lastrate = round(self.tinterval/elapsedtime,2)\n                if d.dologicanalyzer: nchan = HaasoscopeLibQt.num_chan_per_board + 1\n                else: nchan = HaasoscopeLibQt.num_chan_per_board\n                print(self.nevents,\"events,\",lastrate,\"Hz\",round(lastrate*HaasoscopeLibQt.num_board*d.num_samples*nchan/1e6,3),\"MB/s\")\n                if lastrate>40: self.tinterval=500.\n                else: self.tinterval=100.\n                self.oldnevents=self.nevents\n                newrecordedchannellength=int(max(10,5*lastrate)) #the number of events to show on the persist plot\n                if newrecordedchannellength<len(d.recordedchannel):\n                    del d.recordedchannel[0:len(d.recordedchannel)-newrecordedchannellength]\n                d.recordedchannellength=newrecordedchannellength\n            if self.nevents%self.numrecordeventsperfile==0:\n                if self.savetofile: # if writing, close and open new file\n                    self.record()\n                    if self.doh5: self.oldxscale=0 #to force writing the time header info in h5\n                    self.record()\n            if d.getone and not d.timedout: self.dostartstop()\n\n    def drawtext(self): # happens once per second\n        d.tellrolltrig(d.rolltrigger) #because sometimes the message had been lost\n        self.ui.textBrowser.setText(d.chantext())\n        self.ui.textBrowser.append(\"trigger threshold: \" + str(round(self.hline,3)))\n        if trigboardport!=\"\" and trigboard.extclock:\n            delaycounters = trigboard.get_delaycounters()\n            self.ui.textBrowser.append(\"delay counters: \"+str(delaycounters))\n            self.ui.textBrowser.append(trigboard.get_histos())\n            for b in range(HaasoscopeLibQt.num_board):\n                if not delaycounters[b]:\n                    d.increment_clk_phase(b,30) # increment clk of that board by 30*100ps=3ns\n\nif __name__ == '__main__':\n    import libs.HaasoscopeLibQt as HaasoscopeLibQt\n    import libs.HaasoscopeTrigLibQt as HaasoscopeTrigLibQt\n\n    print('Argument List:', str(sys.argv))\n    for a in sys.argv:\n        if a[0] == \"-\":\n            #print(a)\n            if a[1:3] == \"sr\": #eg: -sr4\n                slowadc_ram_width = int(a[3:])\n                if slowadc_ram_width > HaasoscopeLibQt.max_slowadc_ram_width:\n                    print(\"slowadc_ram_width\", slowadc_ram_width, \"too large\")\n                elif slowadc_ram_width < 1:\n                    print(\"slowadc_ram_width\", slowadc_ram_width, \"too small\")\n                else:\n                    HaasoscopeLibQt.slowadc_ram_width = slowadc_ram_width\n                    print(\"slowadc_ram_width set to\", HaasoscopeLibQt.slowadc_ram_width)\n            elif a[1:4] == \"adc\": #eg: -adc[(0,110),(0,118)]\n                exec(\"HaasoscopeLibQt.max10adcchans=\" + a[4:])\n                print(\"max10adcchans set to\", HaasoscopeLibQt.max10adcchans)\n            elif a[1] == \"r\": #eg: -r12\n                ram_width = int(a[2:])\n                if ram_width > HaasoscopeLibQt.max_ram_width:\n                    print(\"ram_width\", ram_width, \"is bigger than the max allowed\", HaasoscopeLibQt.max_ram_width)\n                    HaasoscopeLibQt.ram_width = HaasoscopeLibQt.max_ram_width\n                elif ram_width < 1:\n                    print(\"ram_width\", ram_width, \"is less than 1\")\n                    HaasoscopeLibQt.ram_width = 1\n                else:\n                    HaasoscopeLibQt.ram_width = ram_width\n                print(\"ram_width set to\", HaasoscopeLibQt.ram_width)\n            elif a[1] == \"b\": #eg: -b2\n                HaasoscopeLibQt.num_board = int(a[2:])\n                print(\"num_board set to\", HaasoscopeLibQt.num_board)\n\n    d = HaasoscopeLibQt.Haasoscope()\n\n    script=\"\"\n    trigboardport = \"\"\n    for a in sys.argv:\n        if a[0] == \"-\":\n            #print(a)\n            if a[1:3] == \"mt\":\n                d.domt=True\n                print(\"domt set to\",d.domt)\n            elif a[1:8] == \"fastusb\":\n                d.dofastusb = True\n                d.dousbparallel = True\n                print(\"dofastusb\", d.dofastusb, \"and dousbparallel\", d.dousbparallel)\n            elif a[1:7] == \"script\": #eg: -scriptmysetup.py will run those commands after setup\n                script = str(a[7:])\n                print(\"script set to\", script)\n            elif a[1] == \"s\" and a[2]!=\"r\":\n                d.serialdelaytimerwait = int(a[2:])\n                print(\"serialdelaytimerwait set to\", d.serialdelaytimerwait)\n            elif a[1] == \"p\":\n                d.serport = a[2:]\n                print(\"serial port manually set to\", d.serport)\n            elif a[1] == \"t\":\n                trigboardport = a[2:]\n                print(\"trigboardport set to\", trigboardport)            \n\n    if d.domt and not d.dofastusb:\n        print(\"mt option is only for fastusb - exiting!\")\n        sys.exit()\n\n    print(\"Python version\", sys.version)\n    app = QtWidgets.QApplication.instance()\n    standalone = app is None\n    if standalone:\n        #print('INSIDE STANDALONE')\n        app = QtWidgets.QApplication(sys.argv)\n\n    try:\n        font = app.font();\n        font.setPixelSize(11);\n        app.setFont(font);\n        win = MainWindow()\n        win.setWindowTitle('Haasoscope Qt')\n        if not d.setup_connections():\n            print(\"Exiting now - failed setup_connections!\")\n            sys.exit(1)\n        if trigboardport!=\"\":\n            if trigboardport==\"auto\": trigboardport=d.trigserport\n            trigboard = HaasoscopeTrigLibQt.HaasoscopeTrig(trigboardport)\n            if not trigboard.get_firmware_version():\n                print(\"couldn't get trigboard firmware version - exiting!\")\n                sys.exit()\n            trigboard.setrngseed()\n            trigboard.set_prescale(1.0)\n        if not d.init():\n            print(\"Exiting now - failed init!\")\n            d.cleanup()\n            sys.exit()\n        win.launch()\n        win.triggerposchanged(128)  # center the trigger\n\n        if script != \"\":\n            print(\"Excecuting file\", script)\n            exec(open(script).read())\n\n        win.dostartstop()\n    except SerialException:\n        print(\"serial com failed!\")\n\n    if standalone:\n        rv=app.exec_()\n        sys.exit(rv)\n    else:\n        print(\"Done, but Qt window still active\")\n"
  },
  {
    "path": "software/INSTALL.txt",
    "content": "pip install pyserial numpy scipy pyqtgraph pyqt5 h5py pyftdi ftd2xx\npython HaasoscopeQt.py\n"
  },
  {
    "path": "software/calib/calib_80982231109ecf88.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2708.0, \r\n        2677.0, \r\n        2926.0, \r\n        2894.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        130.0, \r\n        117.0, \r\n        121.0, \r\n        143.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        4682.0, \r\n        4648.0, \r\n        4673.0, \r\n        4686.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2360.0, \r\n        2350.0, \r\n        2410.0, \r\n        2430.0\r\n    ], \r\n    \"boardID\": \"80982231109ecf88\", \r\n    \"highdaclevelssuper\": [\r\n        47.0, \r\n        34.0, \r\n        37.0, \r\n        57.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2030.0, \r\n        2020.0, \r\n        2080.0, \r\n        2110.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4685.0, \r\n        4652.0, \r\n        4671.0, \r\n        4688.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2360.0, \r\n        2340.0, \r\n        2420.0, \r\n        2440.0\r\n    ], \r\n    \"firmwareversion\": 15\r\n}"
  },
  {
    "path": "software/calib/calib_80982271106e0030.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2960.0, \r\n        2783.0, \r\n        2981.0, \r\n        2879.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        132.0, \r\n        134.0, \r\n        132.0, \r\n        129.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        4727.0, \r\n        4738.0, \r\n        4680.0, \r\n        4670.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2420.0, \r\n        2410.0, \r\n        2420.0, \r\n        2380.0\r\n    ], \r\n    \"boardID\": \"80982271106e0030\", \r\n    \"highdaclevelssuper\": [\r\n        49.0, \r\n        50.0, \r\n        49.0, \r\n        47.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2120.0, \r\n        2080.0, \r\n        2100.0, \r\n        2060.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4739.0, \r\n        4747.0, \r\n        4690.0, \r\n        4680.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2450.0, \r\n        2410.0, \r\n        2430.0, \r\n        2390.0\r\n    ], \r\n    \"firmwareversion\": 15\r\n}"
  },
  {
    "path": "software/calib/calib_80982271106e00b0.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        3097.0, \r\n        3075.0, \r\n        2881.0, \r\n        3132.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        130.0, \r\n        129.0, \r\n        127.0, \r\n        124.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        4761.0, \r\n        4764.0, \r\n        4763.0, \r\n        4738.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2460.0, \r\n        2500.0, \r\n        2390.0, \r\n        2460.0\r\n    ], \r\n    \"boardID\": \"80982271106e00b0\", \r\n    \"highdaclevelssuper\": [\r\n        47.0, \r\n        43.0, \r\n        44.0, \r\n        44.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2140.0, \r\n        2160.0, \r\n        2080.0, \r\n        2130.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4772.0, \r\n        4772.0, \r\n        4770.0, \r\n        4749.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2480.0, \r\n        2500.0, \r\n        2400.0, \r\n        2460.0\r\n    ], \r\n    \"firmwareversion\": 15\r\n}"
  },
  {
    "path": "software/calib/calib_80982271106e0430.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2918.0, \r\n        2901.0, \r\n        2824.0, \r\n        2997.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        124.0, \r\n        127.0, \r\n        121.0, \r\n        127.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        4688.0, \r\n        4704.0, \r\n        4670.0, \r\n        4670.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2400.0, \r\n        2420.0, \r\n        2390.0, \r\n        2430.0\r\n    ], \r\n    \"boardID\": \"80982271106e0430\", \r\n    \"highdaclevelssuper\": [\r\n        42.0, \r\n        44.0, \r\n        39.0, \r\n        46.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2080.0, \r\n        2090.0, \r\n        2060.0, \r\n        2110.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4696.0, \r\n        4712.0, \r\n        4677.0, \r\n        4678.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2420.0, \r\n        2420.0, \r\n        2390.0, \r\n        2440.0\r\n    ], \r\n    \"firmwareversion\": 15\r\n}"
  },
  {
    "path": "software/calib/calib_80982271106e0f74.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2865.0, \r\n        2838.0, \r\n        3197.0, \r\n        3111.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        122.0, \r\n        125.0, \r\n        136.0, \r\n        137.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        4731.0, \r\n        4738.0, \r\n        4764.0, \r\n        4733.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2370.0, \r\n        2420.0, \r\n        2490.0, \r\n        2440.0\r\n    ], \r\n    \"boardID\": \"80982271106e0f74\", \r\n    \"highdaclevelssuper\": [\r\n        40.0, \r\n        42.0, \r\n        53.0, \r\n        55.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2070.0, \r\n        2090.0, \r\n        2150.0, \r\n        2120.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4739.0, \r\n        4742.0, \r\n        4769.0, \r\n        4740.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2400.0, \r\n        2420.0, \r\n        2490.0, \r\n        2460.0\r\n    ], \r\n    \"firmwareversion\": 15\r\n}"
  },
  {
    "path": "software/calib/calib_80982271106e1030.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2858.0, \r\n        3037.0, \r\n        2842.0, \r\n        2828.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        131.0, \r\n        135.0, \r\n        141.0, \r\n        132.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        4712.0, \r\n        4685.0, \r\n        4690.0, \r\n        4664.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2390.0, \r\n        2460.0, \r\n        2380.0, \r\n        2390.0\r\n    ], \r\n    \"boardID\": \"80982271106e1030\", \r\n    \"highdaclevelssuper\": [\r\n        48.0, \r\n        49.0, \r\n        58.0, \r\n        47.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2090.0, \r\n        2130.0, \r\n        2070.0, \r\n        2070.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4723.0, \r\n        4694.0, \r\n        4701.0, \r\n        4676.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2420.0, \r\n        2460.0, \r\n        2400.0, \r\n        2390.0\r\n    ], \r\n    \"firmwareversion\": 15\r\n}"
  },
  {
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    "content": "{\r\n    \"highdaclevels\": [\r\n        2754.0, \r\n        2524.0, \r\n        2783.0, \r\n        2699.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        117.0, \r\n        116.0, \r\n        122.0, \r\n        120.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2798.0, \r\n        2611.0, \r\n        2800.0, \r\n        2786.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2070.0, \r\n        1980.0, \r\n        2070.0, \r\n        2050.0\r\n    ], \r\n    \"boardID\": \"80988211106ef00c\", \r\n    \"highdaclevelssuper\": [\r\n        44.0, \r\n        41.0, \r\n        49.0, \r\n        45.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2050.0, \r\n        1980.0, \r\n        2040.0, \r\n        2030.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2230.0, \r\n        2160.0, \r\n        2230.0, \r\n        2210.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4014.0, \r\n        3689.0, \r\n        4036.0, \r\n        3923.0\r\n    ]\r\n}"
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    "content": "{\r\n    \"highdaclevels\": [\r\n        2658.0, \r\n        2741.0, \r\n        2651.0, \r\n        2739.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        105.0, \r\n        117.0, \r\n        123.0, \r\n        119.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2734.0, \r\n        2800.0, \r\n        2741.0, \r\n        2800.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2010.0, \r\n        2070.0, \r\n        2030.0, \r\n        2050.0\r\n    ], \r\n    \"boardID\": \"80988211106ef06c\", \r\n    \"highdaclevelssuper\": [\r\n        34.0, \r\n        42.0, \r\n        48.0, \r\n        41.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2000.0, \r\n        2070.0, \r\n        2000.0, \r\n        2030.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2180.0, \r\n        2250.0, \r\n        2170.0, \r\n        2210.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3873.0, \r\n        3991.0, \r\n        3855.0, \r\n        3985.0\r\n    ]\r\n}"
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    "content": "{\r\n    \"highdaclevels\": [\r\n        2925.0, \r\n        2851.0, \r\n        3099.0, \r\n        2987.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        122.0, \r\n        110.0, \r\n        117.0, \r\n        114.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2888.0, \r\n        2800.0, \r\n        3055.0, \r\n        2943.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2100.0, \r\n        2080.0, \r\n        2100.0, \r\n        2100.0\r\n    ], \r\n    \"boardID\": \"80988211106ef070\", \r\n    \"highdaclevelssuper\": [\r\n        48.0, \r\n        36.0, \r\n        44.0, \r\n        42.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2090.0, \r\n        2060.0, \r\n        2110.0, \r\n        2110.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2270.0, \r\n        2250.0, \r\n        2300.0, \r\n        2290.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4255.0, \r\n        4127.0, \r\n        4427.0, \r\n        4329.0\r\n    ]\r\n}"
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    "content": "{\r\n    \"highdaclevels\": [\r\n        2685.0, \r\n        2657.0, \r\n        2740.0, \r\n        2727.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        114.0, \r\n        122.0, \r\n        113.0, \r\n        120.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2763.0, \r\n        2734.0, \r\n        2800.0, \r\n        2800.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2020.0, \r\n        2050.0, \r\n        2030.0, \r\n        2060.0\r\n    ], \r\n    \"boardID\": \"80988211106ef088\", \r\n    \"highdaclevelssuper\": [\r\n        38.0, \r\n        46.0, \r\n        39.0, \r\n        45.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2020.0, \r\n        2040.0, \r\n        2010.0, \r\n        2040.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2200.0, \r\n        2220.0, \r\n        2190.0, \r\n        2220.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3906.0, \r\n        3870.0, \r\n        3988.0, \r\n        3966.0\r\n    ]\r\n}"
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    "content": "{\r\n    \"highdaclevels\": [\r\n        2689.0, \r\n        2545.0, \r\n        2558.0, \r\n        2528.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        116.0, \r\n        110.0, \r\n        110.0, \r\n        109.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2769.0, \r\n        2616.0, \r\n        2632.0, \r\n        2611.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2030.0, \r\n        2000.0, \r\n        1980.0, \r\n        1980.0\r\n    ], \r\n    \"boardID\": \"80988211106ef0ec\", \r\n    \"highdaclevelssuper\": [\r\n        42.0, \r\n        39.0, \r\n        38.0, \r\n        34.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2040.0, \r\n        2000.0, \r\n        1960.0, \r\n        1960.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2210.0, \r\n        2180.0, \r\n        2140.0, \r\n        2140.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3912.0, \r\n        3705.0, \r\n        3715.0, \r\n        3683.0\r\n    ]\r\n}"
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    "content": "{\r\n    \"highdaclevels\": [\r\n        3137.0, \r\n        3126.0, \r\n        2766.0, \r\n        2822.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        133.0, \r\n        121.0, \r\n        125.0, \r\n        116.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        3136.0, \r\n        3126.0, \r\n        2800.0, \r\n        2826.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2160.0, \r\n        2150.0, \r\n        2050.0, \r\n        2050.0\r\n    ], \r\n    \"boardID\": \"80988211106ef0f0\", \r\n    \"highdaclevelssuper\": [\r\n        58.0, \r\n        49.0, \r\n        52.0, \r\n        42.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2170.0, \r\n        2160.0, \r\n        2040.0, \r\n        2040.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2350.0, \r\n        2340.0, \r\n        2230.0, \r\n        2230.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4508.0, \r\n        4500.0, \r\n        4016.0, \r\n        4099.0\r\n    ]\r\n}"
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    "path": "software/calib/calib_80988211106ef748.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2574.0, \r\n        2783.0, \r\n        2675.0, \r\n        2651.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        120.0, \r\n        110.0, \r\n        118.0, \r\n        116.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2631.0, \r\n        2800.0, \r\n        2745.0, \r\n        2706.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2010.0, \r\n        2050.0, \r\n        2030.0, \r\n        2000.0\r\n    ], \r\n    \"boardID\": \"80988211106ef748\", \r\n    \"highdaclevelssuper\": [\r\n        46.0, \r\n        34.0, \r\n        44.0, \r\n        43.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2000.0, \r\n        2050.0, \r\n        2020.0, \r\n        2010.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2180.0, \r\n        2240.0, \r\n        2210.0, \r\n        2190.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3753.0, \r\n        4053.0, \r\n        3901.0, \r\n        3863.0\r\n    ]\r\n}"
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    "path": "software/calib/calib_80988211106ef788.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2808.0, \r\n        2679.0, \r\n        2861.0, \r\n        2852.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        120.0, \r\n        125.0, \r\n        118.0, \r\n        115.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2802.0, \r\n        2778.0, \r\n        2836.0, \r\n        2825.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2070.0, \r\n        2050.0, \r\n        2090.0, \r\n        2080.0\r\n    ], \r\n    \"boardID\": \"80988211106ef788\", \r\n    \"highdaclevelssuper\": [\r\n        44.0, \r\n        51.0, \r\n        44.0, \r\n        43.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2070.0, \r\n        2040.0, \r\n        2050.0, \r\n        2070.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2250.0, \r\n        2220.0, \r\n        2240.0, \r\n        2250.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        4122.0, \r\n        3905.0, \r\n        4143.0, \r\n        4164.0\r\n    ]\r\n}"
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    "path": "software/calib/calib_80988211106ef7d4.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2640.0, \r\n        2658.0, \r\n        2770.0, \r\n        2719.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        120.0, \r\n        120.0, \r\n        121.0, \r\n        108.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2703.0, \r\n        2719.0, \r\n        2800.0, \r\n        2787.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2040.0, \r\n        2050.0, \r\n        2060.0, \r\n        2040.0\r\n    ], \r\n    \"boardID\": \"80988211106ef7d4\", \r\n    \"highdaclevelssuper\": [\r\n        45.0, \r\n        42.0, \r\n        45.0, \r\n        34.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2030.0, \r\n        2040.0, \r\n        2040.0, \r\n        2020.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2210.0, \r\n        2220.0, \r\n        2220.0, \r\n        2210.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3849.0, \r\n        3877.0, \r\n        4024.0, \r\n        3957.0\r\n    ]\r\n}"
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    "path": "software/calib/calib_80988211106eff28.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2708.0, \r\n        2673.0, \r\n        3046.0, \r\n        2936.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        118.0, \r\n        111.0, \r\n        122.0, \r\n        112.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2798.0, \r\n        2758.0, \r\n        3001.0, \r\n        2893.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2040.0, \r\n        2060.0, \r\n        2110.0, \r\n        2080.0\r\n    ], \r\n    \"boardID\": \"80988211106eff28\", \r\n    \"highdaclevelssuper\": [\r\n        43.0, \r\n        38.0, \r\n        47.0, \r\n        42.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2030.0, \r\n        2040.0, \r\n        2100.0, \r\n        2070.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2220.0, \r\n        2230.0, \r\n        2280.0, \r\n        2260.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3946.0, \r\n        3904.0, \r\n        4404.0, \r\n        4246.0\r\n    ]\r\n}"
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    "path": "software/calib/calib_80988211106eff84.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2602.0, \r\n        2671.0, \r\n        2728.0, \r\n        2576.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        106.0, \r\n        113.0, \r\n        110.0, \r\n        123.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2684.0, \r\n        2752.0, \r\n        2800.0, \r\n        2646.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2000.0, \r\n        2060.0, \r\n        2030.0, \r\n        2000.0\r\n    ], \r\n    \"boardID\": \"80988211106eff84\", \r\n    \"highdaclevelssuper\": [\r\n        34.0, \r\n        39.0, \r\n        35.0, \r\n        47.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2000.0, \r\n        2040.0, \r\n        2020.0, \r\n        2000.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2180.0, \r\n        2230.0, \r\n        2200.0, \r\n        2180.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3795.0, \r\n        3903.0, \r\n        3973.0, \r\n        3743.0\r\n    ]\r\n}"
  },
  {
    "path": "software/calib/calib_80988211106effb4.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2600.0, \r\n        2606.0, \r\n        2623.0, \r\n        2632.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        116.0, \r\n        101.0, \r\n        122.0, \r\n        115.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2694.0, \r\n        2681.0, \r\n        2712.0, \r\n        2721.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2020.0, \r\n        2030.0, \r\n        2040.0, \r\n        2050.0\r\n    ], \r\n    \"boardID\": \"80988211106effb4\", \r\n    \"highdaclevelssuper\": [\r\n        42.0, \r\n        30.0, \r\n        48.0, \r\n        43.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2010.0, \r\n        2020.0, \r\n        2010.0, \r\n        2030.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2190.0, \r\n        2200.0, \r\n        2180.0, \r\n        2210.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3788.0, \r\n        3794.0, \r\n        3813.0, \r\n        3823.0\r\n    ]\r\n}"
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    "path": "software/calib/calib_80988211106efff0.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2714.0, \r\n        2669.0, \r\n        2800.0, \r\n        2604.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        113.0, \r\n        112.0, \r\n        123.0, \r\n        117.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        2800.0, \r\n        2741.0, \r\n        2806.0, \r\n        2686.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        2010.0, \r\n        2000.0, \r\n        2060.0, \r\n        2030.0\r\n    ], \r\n    \"boardID\": \"80988211106efff0\", \r\n    \"highdaclevelssuper\": [\r\n        41.0, \r\n        38.0, \r\n        50.0, \r\n        43.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2020.0, \r\n        2010.0, \r\n        2050.0, \r\n        2020.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        2210.0, \r\n        2190.0, \r\n        2240.0, \r\n        2200.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        3952.0, \r\n        3885.0, \r\n        4077.0, \r\n        3802.0\r\n    ]\r\n}"
  },
  {
    "path": "software/calib/calib_8098824800eebf0c.json.txt",
    "content": "{\r\n    \"highdaclevels\": [\r\n        2300.0, \r\n        2300.0, \r\n        2210.0, \r\n        2303.0\r\n    ], \r\n    \"lowdaclevelssuper\": [\r\n        110.0, \r\n        110.0, \r\n        103.0, \r\n        110.0\r\n    ], \r\n    \"highdaclevelssuperac\": [\r\n        35.0, \r\n        35.0, \r\n        2220.0, \r\n        2305.0\r\n    ], \r\n    \"lowdaclevelssuperac\": [\r\n        105.0, \r\n        105.0, \r\n        1865.0, \r\n        1925.0\r\n    ], \r\n    \"boardID\": \"8098824800eebf0c\", \r\n    \"highdaclevelssuper\": [\r\n        40.0, \r\n        40.0, \r\n        29.0, \r\n        37.0\r\n    ], \r\n    \"lowdaclevels\": [\r\n        2300.0, \r\n        1900.0, \r\n        1870.0, \r\n        1940.0\r\n    ], \r\n    \"lowdaclevelsac\": [\r\n        1900.0, \r\n        1900.0, \r\n        2050.0, \r\n        2120.0\r\n    ], \r\n    \"highdaclevelsac\": [\r\n        2300.0, \r\n        2300.0, \r\n        3237.0, \r\n        3350.0\r\n    ]\r\n}"
  },
  {
    "path": "software/cern.py",
    "content": "d.doswitchdata = False\nwin.triggerlevelchanged(80+128)# 128 is middle\n\n#turns off drawing\n#win.ui.drawingCheck.setCheckState(QtCore.Qt.Unchecked)\n#win.drawing()\n\nd.settriggertime(100)  # Time over Threshold -> 100, target 1Hz for all boards\n\n# time sample timebase -> 0 (horizontal scaling, represent the actual sampling rate of the ADC)\n#d.telldownsample(0)\nwin.timefast()\nwin.timefast()\n\nwin.triggerposchanged(40) # 1-256 trigger time aligned closer to the left (1x to the left, ~5x to the right) slider needs resetting\n\n#win.rolling() # no rolling trigger [button] (record only on trigger) dont have channel 0 on board 0 error\nd.rolltrigger = not d.rolltrigger\n#d.tellrolltrig(d.rolltrigger)\n\nwin.risingfalling() # rising edge [checkbox] (as opposed to falling)\n#win.ui.risingedgeCheck.blockSignals(True)\n#win.ui.risingedgeCheck.setChecked(d.fallingedge)\n#win.ui.risingedgeCheck.blockSignals(False)\n\nwin.doh5=True\n#win.numrecordeventsperfile=100\nwin.record() # record to file (truncating and starting new files)\n# and auto transfer\n\n# think about 8 kB per event. compression"
  },
  {
    "path": "software/commands.md",
    "content": "Commands are received in [serialprocessor.v](../max10_adc_firmware/serialprocessor.v) and handled [in the SOLVING case](../max10_adc_firmware/serialprocessor.v#L253). Each command has a starting `id` number. Some commands take additional arguments. Commands are passed along a multiboard chain so they are seen by all boards.\r\n\r\n`0-9` tells the board its `ID`. The first board will get usually be sent a `0`, and then it sends a `1` to the next board, which then sends a `2` to the next, and so on. Board `0` is special since it creates the clock for all boards.\r\n\r\n`10-19` tells the board with ID 10 less to send its event data. For instance, `10` will tell board `0` to send its data. The data will be 4 channels of fast ADC data, plus additional info if other options are enabled. Each channel is sent in order, starting with channel `0`. N samples are sent for each channel, from earliest to latest in time. Each sample is one byte (8 bits), where `0` is the highest voltage for the input (e.g. 3.75V), and `255` is the lowest (e.g. -3.75V). (It's an inverting op-amp configuration.)\r\n\r\n`20-29` tells the board with ID 20 less that it's the last one (the highest ID). For instance, sending 21 tells board with `ID 1` that it's the last board. It needs to know this in order to ignore signals on its unconnected trigger inputs on its left-side male connector.\r\n\r\n`30-39` tells the board with ID 30 less to be the \"active\" board. For instance, `31` would tell the board with `ID 1` to be active, and all other boards to the right of it to be in \"passthrough\". Then sending another request for some data with come from the active board, and be passed through the boards to its right. If one wanted to get the board unique max10 string from board `2`, they would send `32` followed by the command to send the unique string (142).\r\n\r\n`100` tells all boards to \"arm\" their triggers, and then record a new event. Note that there is also an auto-rearm mode which will always get a new event after sending the last one (see below). If the board does not record a new event, it will continue to send the same event each time it is asked to send an event.\r\n\r\n`101`/`102` tells boards to roll / not roll the trigger. Rolling the trigger means automatically generating a trigger every 0.2 seconds (like auto mode on a scope).\r\n\r\n`110-119` tells boards to send the \"slow ADC\" data from a given pin. For instance, 110 sends the data from all boards from slow ADC input 1 (pin 6), 118 would send slow ADC data from input 8 (pin 14), etc. The data is sent as N samples (set below), and each sample is 2 bytes. The first byte is the lowest 8 bits (0-255), and the second holds the higher 4 bits (0-15). It's a 12-bit ADC. So the 12-bit value is 256 times the second byte plus the first byte.\r\n\r\n`120` (+ 2 more bytes) is how many slow ADC samples to send. It is `256*a+b` samples, where `a` is the first byte and `b` is the second byte. For instance, `120 1 10` would send `256*1+10=266` samples.\r\n\r\n`121` (+ 2 more bytes) is the trigger point in time (how many samples to record before the trigger). It is `256*a+b` samples, where `a` is the first byte and `b` is the second byte. Add pow(2,12) to the number (i.e. 16 to a) in order to use the current timebase in the calculation (recommended!).\r\n\r\n`122` (+ 2 more bytes) is how many fast ADC samples to send. It is `256*a+b` samples, where `a` is the first byte and `b` is the second byte. For instance, `122 1 100` would send `256*1+100=356` samples.\r\n\r\n`123` (+ 1 more byte) is how many fast ADC samples to skip sending after each sample sent. The byte is `2^n`, e.g. if the byte is `3`, then `2^3=8` samples are skipped.\r\n\r\n`124` (+ 1 more byte) is the \"timebase\", i.e. what fraction of fast ADC samples to actually record. It is `1/2^n`, so if the byte is `3`, then `1/2^3=1/8` fast ADC samples are recorded.\r\n\r\n`125` (+ 1 more byte) is the number of clock ticks (20ns) to wait between sending serial bytes. It is `2^n`, so if the byte is `4`, then `2^4=16` ticks are waited.\r\n\r\n`126` (+ 1 more byte) is the channel to draw on the miniscreen, e.g. `126 3` would draw channel 3 on each board's mini-screen.\r\n\r\n`127` (+ 1 more byte) sets the trigger threshold for the fast ADC channels.\r\n\r\n`128` (+ 1 more byte) is the type. If the byte is `1` it's a rising edge, if it's `0` it's falling.\r\n\r\n`129` (+ 2 more bytes) is how long a channel must be above/below the trigger threshold to fire it. It is `256*a+b samples`, where a is the first byte and b is the second byte.\r\n\r\n`130` (+ 1 more byte) toggles whether the trigger is active for a given channel, e.g. `130 6` would toggle the trigger activity for channel 6.\r\n\r\n`131` (+ 2 more bytes) is for talking to the SPI interface on the fast ADCs on all boards. The first byte is the 7 bit address to send to on the ADC, and the second is the byte sent to that address. See the [max19506 datasheet](https://datasheets.maximintegrated.com/en/ds/MAX19506.pdf) for info, and/or see [example commands in the python programs](https://github.com/drandyhaas/Haasoscope/blob/master/software/HaasoscopeLib.py#L250).\r\n\r\n`132/133` will send the delaycounter / carrycounter extra data (1 byte) from the active board.\r\n\r\n`134` (+ 1 more byte) toggles the x10 gain for a given channel, e.g. `134 6` would toggle the x10 gain for channel 6.\r\n\r\n`135` (+ 2 more bytes) says how many 2us ticks to wait after sending each 32 bytes of serial data (serialdelaytimerwait). It is `256*a+b` ticks, where a is the first byte and b is the second byte.\r\n\r\n`136` (+ 6 more bytes!) talks over i2c to the IO expanders and DAC on the boards. The first bytes is how many bytes of info to send (not counting address). The second byte is the i2c address to send to. The 3rd-5th bytes are the data to send. And the 6th byte is which board ID to talk to (or 200 to talk to all boards). [See the python programs for examples of commands](https://github.com/drandyhaas/Haasoscope/blob/master/software/HaasoscopeLib.py#L299).\r\n\r\n`137` toggles whether data is sent back over the serial interface or the USB2 hat.\r\n\r\n`138` is how many ADC samples to shift the reference wave by in order to be 90deg out of phase, for lockin calculations in the FPGA.\r\n\r\n`139` toggles auto-rearming of the trigger. Without it, you need to send `100` to record a new event each time.\r\n\r\n`140` (+ 1 more byte) sets the \"runt\" trigger threshold for the fast ADC channels.\r\n\r\n`141` (+ 1 more byte) toggles the oversampling for a given channel, e.g. `130 4` would toggle oversampling for channel 4.\r\n\r\n`142` tells the active board to send its unique 8-byte ID back over serial.\r\n\r\n`143` toggles \"high-res\" mode for all channels.\r\n\r\n`144` toggles whether the external trigger pin is active, for all boards.\r\n\r\n-- Following commands require the [new firmware](../max10_adc_firmware/output_files)!\r\n\r\n`145` (+ 1 more byte) is how many channels to send data for, from each board. For instance, `145 4` would send all 4 channels from all boards. Note that the logic analyzer data is the \"5th channel\" on each board, so `145 5` sends all 4 channels plus the logic analyzer data. The logic analyzer data is the same number of samples as and synchronous with the fast ADC data. It is 1 byte per sample, and each bit is 0/1 for each of the 8 logic analyzer pins being low/high.\r\n\r\n`146` (+ 3 more bytes) requests a byte to be read from i2c (e.g. ioexpander inputs) from a given i2c address, chip address, and board.\r\n\r\n`147` requests the firmware version byte to be sent back over serial from the currently active board.\r\n\r\n"
  },
  {
    "path": "software/ft232h_ftd2xx_template.xml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<FT_EEPROM>\n  <Chip_Details>\n    <Type>FT232H</Type>\n  </Chip_Details>\n  <USB_Device_Descriptor>\n    <VID_PID>0</VID_PID>\n    <idVendor>0403</idVendor>\n    <idProduct>6014</idProduct>\n    <bcdUSB>USB 2.0</bcdUSB>\n  </USB_Device_Descriptor>\n  <USB_Config_Descriptor>\n    <bmAttributes>\n      <RemoteWakeupEnabled>false</RemoteWakeupEnabled>\n      <SelfPowered>false</SelfPowered>\n      <BusPowered>true</BusPowered>\n    </bmAttributes>\n    <IOpullDown>false</IOpullDown>\n    <MaxPower>500</MaxPower>\n  </USB_Config_Descriptor>\n  <USB_String_Descriptors>\n    <Manufacturer>FTDI</Manufacturer>\n    <Product_Description>Haasoscope USB2 FTD2XX</Product_Description>\n    <SerialNumber_Enabled>true</SerialNumber_Enabled>\n    <SerialNumber>\n    </SerialNumber>\n    <SerialNumberPrefix>FT</SerialNumberPrefix>\n  </USB_String_Descriptors>\n  <Hardware_Specific>\n    <Suspend_ACBus7>false</Suspend_ACBus7>\n    <Port_A>\n      <Hardware>\n        <UART>false</UART>\n        <_245FIFO>true</_245FIFO>\n        <CPUFIFO>false</CPUFIFO>\n        <OPTO>false</OPTO>\n        <FT1248>false</FT1248>\n      </Hardware>\n      <Driver>\n        <D2XX>true</D2XX>\n        <VCP>false</VCP>\n      </Driver>\n    </Port_A>\n    <FT1248_Settings>\n      <Clock_Polarity>false</Clock_Polarity>\n      <Bit_Order>false</Bit_Order>\n      <Flow_Control>false</Flow_Control>\n    </FT1248_Settings>\n    <IO_Controls>\n      <C0>Tristate</C0>\n      <C1>Tristate</C1>\n      <C2>Tristate</C2>\n      <C3>Tristate</C3>\n      <C4>Tristate</C4>\n      <C5>Tristate</C5>\n      <C6>Tristate</C6>\n      <C7>Tristate</C7>\n      <C8>Tristate</C8>\n      <C9>Tristate</C9>\n    </IO_Controls>\n    <IO_Pins>\n      <GroupAD>\n        <SlowSlew>false</SlowSlew>\n        <Schmitt>false</Schmitt>\n        <Drive>4mA</Drive>\n      </GroupAD>\n      <GroupAC>\n        <SlowSlew>false</SlowSlew>\n        <Schmitt>false</Schmitt>\n        <Drive>4mA</Drive>\n      </GroupAC>\n    </IO_Pins>\n  </Hardware_Specific>\n</FT_EEPROM>"
  },
  {
    "path": "software/ft232h_template.xml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\r\n<FT_EEPROM>\r\n  <Chip_Details>\r\n    <Type>FT232H</Type>\r\n  </Chip_Details>\r\n  <USB_Device_Descriptor>\r\n    <VID_PID>0</VID_PID>\r\n    <idVendor>0403</idVendor>\r\n    <idProduct>6014</idProduct>\r\n    <bcdUSB>USB 2.0</bcdUSB>\r\n  </USB_Device_Descriptor>\r\n  <USB_Config_Descriptor>\r\n    <bmAttributes>\r\n      <RemoteWakeupEnabled>false</RemoteWakeupEnabled>\r\n      <SelfPowered>false</SelfPowered>\r\n      <BusPowered>true</BusPowered>\r\n    </bmAttributes>\r\n    <IOpullDown>false</IOpullDown>\r\n    <MaxPower>500</MaxPower>\r\n  </USB_Config_Descriptor>\r\n  <USB_String_Descriptors>\r\n    <Manufacturer>FTDI</Manufacturer>\r\n    <Product_Description>Haasoscope USB2</Product_Description>\r\n    <SerialNumber_Enabled>true</SerialNumber_Enabled>\r\n    <SerialNumber>\r\n    </SerialNumber>\r\n    <SerialNumberPrefix>FT</SerialNumberPrefix>\r\n  </USB_String_Descriptors>\r\n  <Hardware_Specific>\r\n    <Suspend_ACBus7>false</Suspend_ACBus7>\r\n    <Port_A>\r\n      <Hardware>\r\n        <UART>false</UART>\r\n        <_245FIFO>true</_245FIFO>\r\n        <CPUFIFO>false</CPUFIFO>\r\n        <OPTO>false</OPTO>\r\n        <FT1248>false</FT1248>\r\n      </Hardware>\r\n      <Driver>\r\n        <D2XX>false</D2XX>\r\n        <VCP>true</VCP>\r\n      </Driver>\r\n    </Port_A>\r\n    <FT1248_Settings>\r\n      <Clock_Polarity>false</Clock_Polarity>\r\n      <Bit_Order>false</Bit_Order>\r\n      <Flow_Control>false</Flow_Control>\r\n    </FT1248_Settings>\r\n    <IO_Controls>\r\n      <C0>Tristate</C0>\r\n      <C1>Tristate</C1>\r\n      <C2>Tristate</C2>\r\n      <C3>Tristate</C3>\r\n      <C4>Tristate</C4>\r\n      <C5>Tristate</C5>\r\n      <C6>Tristate</C6>\r\n      <C7>Tristate</C7>\r\n      <C8>Tristate</C8>\r\n      <C9>Tristate</C9>\r\n    </IO_Controls>\r\n    <IO_Pins>\r\n      <GroupAD>\r\n        <SlowSlew>false</SlowSlew>\r\n        <Schmitt>false</Schmitt>\r\n        <Drive>4mA</Drive>\r\n      </GroupAD>\r\n      <GroupAC>\r\n        <SlowSlew>false</SlowSlew>\r\n        <Schmitt>false</Schmitt>\r\n        <Drive>4mA</Drive>\r\n      </GroupAC>\r\n    </IO_Pins>\r\n  </Hardware_Specific>\r\n</FT_EEPROM>"
  },
  {
    "path": "software/ftdi_config.sh",
    "content": "#!/bin/sh\n\necho \"This script is for modern debian systems, and does everything that should\"\necho \"be necessary to use ftdi usb devices as a regular user with libftdi,\"\necho \"instead of the built-in dumb kernel driver.\"\necho\nif [ $(id -u) != 0 ]; then\n  echo \"This script must be run as root.\"\n  exit 1\nelse\n  read -p \"Press enter to continue, or ctrl-c to bail...\" x\nfi\necho\necho \"** Adding usb group\"\ngroupadd usb\necho\necho \"** Setting udev permissions on usb devices\"\necho 'SUBSYSTEMS==\"usb\", ACTION==\"add\", MODE=\"0664\", GROUP=\"usb\"' >> /etc/udev/rules.d/99-usbftdi.rules\necho\necho \"** Reloading udev rules\"\n/etc/init.d/udev reload\necho\necho \"** Blacklisting ftdi_sio driver\"\necho 'blacklist ftdi_sio' > /etc/modprobe.d/ftdi.conf\necho\necho \"** Removing old ftdi_sio driver (it's ok if it fails)\"\nrmmod ftdi_sio\necho\necho \"!! Run the following command as root, to add your user to the usb group:\"\necho \"useradd -G usb yourusernamehere\"\necho\necho \"or\"\necho\necho \"Adding to a existing user:\"\necho \"usermod -a -G usb yourusernamehere\"\necho\necho \"as then you must reboot the system:\"\necho \"reboot\""
  },
  {
    "path": "software/h5py_analyze_example.py",
    "content": "import h5py\nimport time\nimport matplotlib.pyplot as plt\n\nf=h5py.File('Haasoscope_out_20210930-135106.h5',\"r\") # can get from https://www.dropbox.com/s/uzmqxn81o9c74e2/Haasoscope_out_20210930-135106.h5?dl=1\nnevents=len(f.keys()) #number of events stored\nprint(nevents,\"events\")\nevents=list(f.items())\ndef mysort(val): return int(val[0])\nevents.sort(key=mysort)\n\nxdata=[]\nydata=[]\nstarttime=time.time()\nnevents=4 # limit to running over first N events\nfor evtindex in range(0,nevents):\n    e=events[evtindex] #get the event\n    if evtindex == 0: print(\"first event:\", e)\n    evtnum=int(e[0])\n    data=e[1]\n    nsamples=data.shape[-1]\n    lendatashape=len(data.shape)\n    etime=data.attrs.get(\"time\")\n    for chan in range(0,4):\n        if lendatashape == 3:\n            xdata = data[chan][0]\n            ydata = data[chan][1]\n            print(evtindex,\"event\",evtnum,\"time\",etime,\"nsamp\",nsamples,\"chan\",chan,xdata,ydata)\n        elif lendatashape == 2:\n            ydata = data[chan]\n            #print(evtindex,\"event\",evtnum,\"time\",etime,\"nsamp\",nsamples,\"chan\",chan,xdata,ydata)\n        else: print(\"unknown data shape length\",lendatashape,\"!\")\n        if evtindex == 1:\n            if chan == 0: plt.plot(xdata, ydata, label=\"chan 0\")\n            if chan == 1: plt.plot(xdata, ydata, label=\"chan 1\")\n\nf.close()\ntotaltime = time.time() - starttime\nprint(\"file closed... read\",nevents,\"events in\",totaltime,\"seconds\")\n\nplt.show()\n"
  },
  {
    "path": "software/haasoscope_handler.py",
    "content": "import sys\nimport signal\nimport subprocess\nimport serial\nfrom time import sleep\n\n\n# Define a signal handler function\ndef signal_handler(sig, frame):\n    print(\"SIGINT received. Exiting...\")\n    ser.close()\n    sys.exit(0)\n\n\nsignal.signal(signal.SIGINT, signal_handler)\n\nser = serial.Serial('COM5')\nprint(f'connected to {ser.name}')\n\n\ndef power_cycle():\n    print('sending haasoscope off')\n    ser.write(b'haasoscope off')\n    sleep(5)\n    print('sending haasoscope on')\n    ser.write(b'haasoscope on')\n    sleep(10)\n\n\ndef run():\n    # Command to run\n    cmd = 'python HaasoscopeQt.py -r13 -b6 -fastusb -scriptcern.py'.split(' ')\n\n    while True:\n        sleep(5)\n        power_cycle()\n\n        p = subprocess.Popen(cmd)\n        # completed_process = subprocess.run(cmd, capture_output=False, subprocess.HIGH_PRIORITY_CLASS)\n        p.wait()\n        sleep(3)\n        if p.returncode == 0:\n            print(\"HaasoscopeQt.py has exited successfully.\")\n            ser.close()\n            exit()\n        else:\n            print(\"HaasoscopeQt.py has exited with an error.\")\n\n\nif __name__ == '__main__':\n    run()\n"
  },
  {
    "path": "software/libs/HaasoscopeLib.py",
    "content": "# -*- coding: utf-8 -*-\nprint \"Loading HaasoscopeLib.py\"\n\n# You might adjust these, just override them before instantianting a class\nnum_board = 1 # Number of Haasoscope boards to read out\nram_width = 9 # width in bits of sample ram to use (e.g. 9==512 samples, 12(max)==4096 samples)\nmax10adcchans = []#[(0,110),(0,118),(1,110),(1,118)] #max10adc channels to draw (board, channel on board), channels: 110=ain1, 111=pin6, ..., 118=pin14, 119=temp\nsendincrement=0 # 0 would skip 2**0=1 byte each time, i.e. send all bytes, 10 is good for lockin mode (sends just 4 samples)\nnum_chan_per_board = 4 # number of high-speed ADC channels on a Haasoscope board\n\nfrom serial import Serial, SerialException\nfrom struct import unpack\nimport numpy as np\nimport time, json, os\nimport matplotlib\n\nmearm=False\nmewin=False\ntry:\n    print os.uname()\n    if os.uname()[4].startswith(\"arm\") or os.uname()[4].startswith(\"aarch\"):\n        print \"On a raspberry pi?\"\n        mearm=True\nexcept AttributeError:\n    mewin=True\n    print \"Not on Linux?\"\n\ndofast=False #do the fast way of redrawing, just the specific things that could have likely changed, only works well on Windows?\nif mewin:\n    dofast=True\n    matplotlib.use('Qt4Agg')\n#to print possible backends\n#import matplotlib.rcsetup as rcsetup\n#print rcsetup.interactive_bk\nimport matplotlib.pyplot as plt\nprint \"matplotlib backend is\",plt.get_backend()\n\n#disable some default key mappings\n#keymap.fullscreen : f, ctrl+f       # toggling\n#keymap.home : h, r, home            # home or reset mnemonic\n#keymap.back : left, c, backspace    # forward / backward keys to enable\n#keymap.forward : right, v           #   left handed quick navigation\n#keymap.pan : p                      # pan mnemonic\n#keymap.zoom : o                     # zoom mnemonic\n#keymap.save : s                     # saving current figure\n#keymap.quit : ctrl+w, cmd+w         # close the current figure\n#keymap.grid : g                     # switching on/off a grid in current axes\n#keymap.yscale : l                   # toggle scaling of y-axes ('log'/'linear')\n#keymap.xscale : L, k                # toggle scaling of x-axes ('log'/'linear')\n#keymap.all_axes : a                 # enable all axes\nplt.rcParams['keymap.fullscreen'] = ''\nplt.rcParams['keymap.home'] = ''\nplt.rcParams['keymap.back'] = ''\nplt.rcParams['keymap.forward'] = ''\nplt.rcParams['keymap.pan'] = ''\nplt.rcParams['keymap.zoom'] = ''\n#plt.rcParams['keymap.save'] = ''\n#plt.rcParams['keymap.quit'] = ''\nplt.rcParams['keymap.grid'] = ''\n#plt.rcParams['keymap.yscale'] = ''\nplt.rcParams['keymap.xscale'] = ''\nplt.rcParams['keymap.all_axes'] = ''\n\nfrom scipy.signal import resample\nimport serial.tools.list_ports\nimport scipy.optimize\n\nenable_ripyl=False # set to True to use ripyl serial decoding... have to get it from https://github.com/kevinpt/ripyl and then install it first!\nif enable_ripyl:\n    import ripyl.util.plot as rplot\n    from collections import OrderedDict\n    import ripyl.streaming as stream\n    import ripyl.protocol.uart as uart\n\nclass Haasoscope():\n    \n    def __init__(self):\n        self.num_samples = pow(2,ram_width)/pow(2,sendincrement) # num samples per channel, max is pow(2,ram_width)/pow(2,0)=4096\n        self.num_bytes = self.num_samples*num_chan_per_board #num bytes per board\n        self.nsamp=pow(2,ram_width)-1 #samples for each max10 adc channel (4095 max (not sure why it's 1 less...))\n        print \"num main ADC and max10adc bytes for all boards = \",self.num_bytes*num_board,\"and\",len(max10adcchans)*self.nsamp\n        self.serialdelaytimerwait=100 #150 # 600 # delay (in 2 us steps) between each 32 bytes of serial output (set to 600 for some slow USB serial setups, but 0 normally)\n        if mearm: self.serialdelaytimerwait=600\n        self.brate = 1500000 #serial baud rate #1500000 #115200 #921600\n        self.sertimeout = 3.0 #time to wait for serial response #3.0, num_bytes*8*10.0/brate, or None\n        self.clkrate=125.0 # ADC sample rate in MHz\n        self.serport=\"\" # the name of the serial port on your computer, connected to Haasoscope, like /dev/ttyUSB0 or COM8, leave blank to detect automatically!\n        self.usbport=[] # the names of the USB2 ports on your computer, connected to Haasoscope, leave blank to detect automatically!\n        self.usbser=[]\n        self.lines = []\n        self.otherlines = []\n        self.texts = []\n        self.xdata=np.arange(self.num_samples)\n        self.xdata2=np.arange(self.num_samples*2) # for oversampling\n        self.xdata4=np.arange(self.num_samples*4) # for over-oversampling\n        self.ydata = []\n        ysampdatat=np.zeros(self.nsamp*len(max10adcchans)); self.ysampdata=np.reshape(ysampdatat,(len(max10adcchans),self.nsamp))\n        self.xsampdata=np.arange(self.nsamp)\n        self.paused=False\n        self.getone=False\n        self.rolltrigger=True #roll the trigger\n        self.average=False #will average every 2 samples\n        self.fallingedge=True #trigger on falling edge\n        self.dogrid=True #redraw the grid\n        self.chanforscreen=0 #channel to draw on the mini-display\n        self.triggertimethresh=1 #samples for which the trigger must be over/under threshold\n        self.downsample=2 #adc speed reduction, log 2... so 0 (none), 1(factor 2), 2(factor 4), etc.\n        self.dofft=False #drawing the FFT plot\n        self.dousb=False #whether to use USB2 output\n        self.sincresample=0 # amount of resampling to do (sinx/x)\n        self.dogetotherdata=False # whether to read other calculated data like TDC\n        self.tdcdata=0 # TDC data\n        self.domaindrawing=True # whether to update the main window data and redraw it\n        self.selectedchannel=0 #what channel some actions apply to\n        self.selectedmax10channel=0 #what max10 channel is selected\n        self.autorearm=False #whether to automatically rearm the trigger after each event, or wait for a signal from software\n        self.dohighres=False #whether to do averaging during downsampling or not (turned on by default during startup, and off again during shutdown)\n        self.useexttrig=False #whether to use the external trigger input\n        self.autocalibchannel=-1 #which channel we are auto-calibrating\n        self.autocalibgainac=0 #which stage of gain and acdc we are auto-calibrating\n        self.recordedchannellength=250 #number of events to overlay in the 2d persist plot\n        self.ydatarefchan=-1 #the reference channel for each board, whose ydata will be subtracted from other channels' ydata on the board\n        self.chtext = \"Ch.\" #the text in the legend for each channel\n        self.db = False #debugging #True #False\n    \n        self.dolockin=False # read lockin info\n        self.dolockinplot=True # plot the lockin info\n        self.lockinanalyzedataboard=0 # the board to analyze lockin info from\n        self.debuglockin=False #debugging of lockin calculations #True #False\n        self.reffreq = 0.008 #MHz of reference signal on chan 3 for lockin calculations\n        self.refsinchan = 3 #the channel number of the ref input signal (for auto reffreq calculation via sin fit)\n        \n        self.xscaling=1.e0 # for the x-axis scale\n        self.lowdaclevel=np.ones(num_board*num_chan_per_board)*2050 # these hold the user set levels for each gain combination\n        self.highdaclevel=np.ones(num_board*num_chan_per_board)*2800\n        self.lowdaclevelsuper=np.ones(num_board*num_chan_per_board)*120\n        self.highdaclevelsuper=np.ones(num_board*num_chan_per_board)*50\n        self.lowdaclevelac=np.ones(num_board*num_chan_per_board)*2250 # these hold the user set levels for each gain combination in ac coupling mode\n        self.highdaclevelac=np.ones(num_board*num_chan_per_board)*4600\n        self.lowdaclevelsuperac=np.ones(num_board*num_chan_per_board)*2300\n        self.highdaclevelsuperac=np.ones(num_board*num_chan_per_board)*4600\n        self.chanlevel=np.ones(num_board*num_chan_per_board)*self.lowdaclevel # the current level for each channel, initially set to lowdaclevel (x1)\n        self.gain=np.ones(num_board*num_chan_per_board, dtype=int) # 1 is low gain, 0 is high gain (x10)\n        self.supergain=np.ones(num_board*num_chan_per_board, dtype=int) # 1 is normal gain, 0 is super gain (x100)\n        self.acdc=np.ones(num_board*num_chan_per_board, dtype=int) # 1 is dc, 0 is ac\n        self.trigsactive=np.ones(num_board*num_chan_per_board, dtype=int) # 1 is triggering on that channel, 0 is not triggering on it\n        self.dooversample=np.zeros(num_board*num_chan_per_board, dtype=int) # 1 is oversampling, 0 is no oversampling, 9 is over-oversampling\n        self.rollingtrigger=True #rolling auto trigger at 5 Hz \n        self.dologicanalyzer=False #whether to send logic analyzer data\n        \n        self.Vrms=np.zeros(num_board*num_chan_per_board, dtype=float) # the Vrms for each channel\n        self.Vmean=np.zeros(num_board*num_chan_per_board, dtype=float) # the Vmean for each channel\n        \n        #These hold the state of the IO expanders\n        self.a20= int('f0',16) # oversamp (set bits 0,1 to 0 to send 0->2 and 1->3) / gain (set second char to 0 for low gain)\n        self.b20= int('0f',16)  # shdn (set first char to 0 to turn on) / ac coupling (set second char to f for DC, 0 for AC)\n        self.a21= int('00',16) # leds (on is 1)\n        self.b21= int('00',16)# free pins\n    \n    def tellrolltrig(self,rt):\n        #tell them to roll the trigger (a self-trigger each ~second), or not\n        if rt: self.ser.write(chr(101)); self.rollingtrigger=True; print \"rolling trigger\"\n        else:  self.ser.write(chr(102)); self.rollingtrigger=False; print \"not rolling trigger\"\n\n    def tellsamplesmax10adc(self):\n        #tell it the number of samples to use for the 1MHz internal Max10 ADC\n        self.ser.write(chr(120))\n        myb=bytearray.fromhex('{:04x}'.format(self.nsamp))\n        self.ser.write(chr(myb[0]))\n        self.ser.write(chr(myb[1]))\n        if self.db: print \"Nsamp for max10 ADC is\",256*myb[0]+1*myb[1]\n    \n    def settriggerpoint(self,tp):\n        #tell it the trigger point\n        self.ser.write(chr(121))\n        offset=5 #small offset due to drawing and delay\n        myb=bytearray.fromhex('{:04x}'.format(tp+offset))\n        self.ser.write(chr(myb[0]))\n        self.ser.write(chr(myb[1]))\n        print \"Trigger point is\",256*myb[0]+1*myb[1]-offset\n\n    def tellsamplessend(self):\n        #tell it the number of samples to send\n        self.ser.write(chr(122))\n        myb=bytearray.fromhex('{:04x}'.format(self.num_samples*pow(2,sendincrement))) # or 0 for all, or num_samples*pow(2,sendincrement)\n        self.ser.write(chr(myb[0]))\n        self.ser.write(chr(myb[1]))\n        print \"num samples is\",256*myb[0]+1*myb[1]\n    \n    def telllockinnumtoshift(self,numtoshift):\n        #tell it the number of samples to shift when calculating 90deg outofphase sum for lockin\n        self.ser.write(chr(138))\n        myb=bytearray.fromhex('{:04x}'.format(numtoshift))\n        self.ser.write(chr(myb[0]))\n        self.ser.write(chr(myb[1]))\n        if self.db: print \"lockinnumtoshift is\",256*myb[0]+1*myb[1]\n        \n    def tellserialdelaytimerwait(self):\n        #tell it the number of microseconds to wait between every 32 (64?) bytes of serial output (for some slow USB serial setups)\n        self.ser.write(chr(135))\n        myb=bytearray.fromhex('{:04x}'.format(self.serialdelaytimerwait))\n        self.ser.write(chr(myb[0]))\n        self.ser.write(chr(myb[1]))\n        print \"serialdelaytimerwait is\",256*myb[0]+1*myb[1]\n    \n    def tellbytesskip(self):\n        #tell it the number of bytes to skip after each send, log2\n        self.ser.write(chr(123))\n        self.ser.write(chr(sendincrement))\n        print \"send increment is\",sendincrement\n    \n    def togglelogicanalyzer(self):\n        #tell it start/stop doing logic analyzer\n        self.dologicanalyzer = not self.dologicanalyzer\n        self.ser.write(chr(145))\n        if self.dologicanalyzer: \n            self.ser.write(chr(5))\n            if len(self.lines)>=8+self.logicline1: # check that we're drawing\n                for l in np.arange(8): self.lines[l+self.logicline1].set_visible(True)\n        else:\n            self.ser.write(chr(4))\n            if len(self.lines)>=8+self.logicline1: # check that we're drawing\n                for l in np.arange(8): self.lines[l+self.logicline1].set_visible(False)\n        print \"dologicanalyzer is now\",self.dologicanalyzer\n    \n    minfirmwareversion=255\n    def getfirmwareversion(self, board):\n        #get the firmware version of a board\n        oldtime=time.time()\n        self.ser.write(chr(30+board)) #make the next board active (serial_passthrough 0)\n        self.ser.write(chr(147)) #request the firmware version byte\n        self.ser.timeout=0.1; rslt = self.ser.read(1); self.ser.timeout=self.sertimeout # reduce the serial timeout temporarily, since the old firmware versions will return nothing for command 147\n        byte_array = unpack('%dB'%len(rslt),rslt)\n        firmwareversion=0\n        if len(byte_array)>0: firmwareversion=byte_array[0]\n        print \"got firmwareversion\",firmwareversion,\"for board\",board,\"in\",round((time.time()-oldtime)*1000.,2),\"ms\"\n        return firmwareversion # is 0 if not found (firmware version <5)\n    \n    def telltickstowait(self):\n        #tell it the number of clock ticks to wait, log2, between sending bytes\n        if self.dousb: ds=self.downsample-2\n        else: ds=self.downsample-3\n        if ds<1: ds=1\n        if self.minfirmwareversion>=5:\n            ds=1\n        else:\n            if ds>8:\n                ds=8 # otherwise we timeout upon readout\n                if self.num_samples>10: self.settriggerpoint(self.num_samples-10) # set trigger way to the right, so we can capture full event - NOTE - screws up mini-screen!\n                self.otherlines[0].set_visible(False) # don't draw trigger time position line, to indicate it's not really set anymore\n        self.ser.write(chr(125))\n        self.ser.write(chr(ds))\n        if self.db: print \"clockbitstowait is\",ds\n    \n    def tellminidisplaychan(self,ch):\n        #tell it the channel to show on the mini-display\n        self.ser.write(chr(126))\n        self.ser.write(chr(ch))\n        print \"chanforscreen is\",ch\n    \n    def settriggerthresh(self,tp):\n        #tell it the trigger threshold\n        self.ser.write(chr(127))\n        tp=255-tp # need to flip it due to op amp\n        self.ser.write(chr(tp))\n        print \"Trigger threshold is\",tp\n        \n    def settriggerthresh2(self,tp):\n        #tell it the high trigger threshold (must be below this to trigger)\n        self.ser.write(chr(140))\n        tp=255-tp # need to flip it due to op amp\n        self.ser.write(chr(tp))\n        print \"Trigger high threshold is\",tp\n    \n    def settriggertype(self,tp):\n        #tell it the trigger type: rising edge, falling edge, either, ...\n        self.ser.write(chr(128))\n        self.ser.write(chr(tp))\n        if self.db: print \"Trigger type is\",tp\n        \n    def settriggertime(self,ttt):\n        #tell it the trigger time over/under threshold required\n        if ttt>self.num_samples and ttt>10:\n            print \"trigger time over/under thresh can't be bigger than num samples\",self.num_samples; return\n        usedownsamplefortriggertot=True\n        if usedownsamplefortriggertot: ttt+=pow(2,12) #set bit [ram_width] (max) = 1\n        self.ser.write(chr(129))\n        myb=bytearray.fromhex('{:04x}'.format(ttt))\n        self.ser.write(chr(myb[0]))\n        self.ser.write(chr(myb[1]))\n        print \"trigger time over/under thresh now\",256*myb[0]+1*myb[1]-pow(2,12),\"and usedownsamplefortriggertot is\",usedownsamplefortriggertot\n    \n    def writefirmchan(self,chan):\n        theboard = num_board-1-chan/num_chan_per_board\n        chanonboard = chan%num_chan_per_board\n        self.ser.write(chr(theboard*num_chan_per_board+chanonboard)) # the channels are numbered differently in the firmware\n    \n    def setdaclevelforchan(self,chan,level):\n        if level>4096*2-1: \n            print \"level can't be bigger than 2**13-1=4096*2-1\"\n            level=4096*2-1\n        if level<0: \n            print \"level can't be less than 0\"\n            level=0\n        theboard = num_board-1-chan/num_chan_per_board\n        chanonboard = chan%num_chan_per_board\n        self.setdac(chanonboard,level,theboard)\n        self.chanlevel[chan]=level\n        if not self.firstdrawtext: self.drawtext()\n        if self.db: print \"DAC level set for channel\",chan,\"to\",level,\"which is chan\",chanonboard,\"on board\",theboard\n    \n    def tellSPIsetup(self,what):\n        time.sleep(.01) #pause to make sure other SPI writng is done\n        self.ser.write(chr(131))\n        myb=bytearray.fromhex('06 10') #default    \n        #SPIsenddata[14:8]=7'h08;//Common mode bias voltages\n        #SPIsenddata[7:0]=8'b00000000;//off //0x00\n        #SPIsenddata[7:0]=8'b11111111;//on 0.45V //0xff\n        #SPIsenddata[7:0]=8'b11001100;//on 0.9V //0xcc\n        #SPIsenddata[7:0]=8'b10111011;//on 1.35V //0xbb\n        if what==0: myb=bytearray.fromhex('08 00') #not connected, 0.9V\n        if what==1: myb=bytearray.fromhex('08 ff') #0.45V\n        if what==2: myb=bytearray.fromhex('08 dd') #0.75V\n        if what==3: myb=bytearray.fromhex('08 cc') #0.9V\n        if what==4: myb=bytearray.fromhex('08 99') #1.05V\n        if what==5: myb=bytearray.fromhex('08 aa') #1.2V\n        if what==6: myb=bytearray.fromhex('08 bb') #1.35V    \n        #SPIsenddata[14:8]=7'h06; //Clock Divide/Data Format/Test Pattern\n        #SPIsenddata[7:0]=8'b01010000;//do test pattern in offset binary // 0x50\n        #SPIsenddata[7:0]=8'b00010000;//do offset binary //0x10\n        if what==10: myb=bytearray.fromhex('06 50') #test pattern output\n        if what==11: myb=bytearray.fromhex('06 10') #offset binary output + no clock divide\n        if what==12: myb=bytearray.fromhex('06 11') #offset binary output + divide clock by 2\n        if what==13: myb=bytearray.fromhex('06 12') #offset binary output + divide clock by 4            \n        if what==20: myb=bytearray.fromhex('04 00') #50 Ohm termination chA (default)\n        if what==21: myb=bytearray.fromhex('05 00') #50 Ohm termination chB (default)        \n        if what==22: myb=bytearray.fromhex('04 1b') #150 Ohm termination chA\n        if what==23: myb=bytearray.fromhex('05 1b') #150 Ohm termination chB\n        if what==24: myb=bytearray.fromhex('04 24') #300 Ohm termination chA\n        if what==25: myb=bytearray.fromhex('05 24') #300 Ohm termination chB\n        if what==30: myb=bytearray.fromhex('01 02') #multiplexed, with chA first\n        if what==31: myb=bytearray.fromhex('01 06') #multiplexed, with chB first\n        if what==32: myb=bytearray.fromhex('01 00') # not multiplexed output        \n        self.ser.write(chr(myb[0]));\tself.ser.write(chr(myb[1])); #write it!\n        print \"tell SPI setup: 131 \",myb[0],myb[1]\n        time.sleep(.01) #pause to make sure other SPI writng is done\n    \n    # testBit() returns a nonzero result, 2**offset, if the bit at 'offset' is one.\n    def testBit(self,int_type, offset):\n        mask = 1 << offset\n        return(int_type & mask)\n    # setBit() returns an integer with the bit at 'offset' set to 1.\n    def setBit(self,int_type, offset):\n        mask = 1 << offset\n        return(int_type | mask)\n    # clearBit() returns an integer with the bit at 'offset' cleared.\n    def clearBit(self,int_type, offset):\n        mask = ~(1 << offset)\n        return(int_type & mask)\n    # toggleBit() returns an integer with the bit at 'offset' inverted, 0 -> 1 and 1 -> 0.\n    def toggleBit(self,int_type, offset):\n        mask = 1 << offset\n        return(int_type ^ mask)\n  \n    def sendi2c(self,whattosend,board=200):\n        db2=False\n\ttime.sleep(.02)\n        myb=bytearray.fromhex(whattosend)\n        self.ser.write(chr(136))\n        if db2: print \" sendi2c: 136\"\n        datacounttosend=len(myb)-1 #number of bytes of info to send, not counting the address\n        self.ser.write(chr(datacounttosend))\n        if db2: print datacounttosend\n        for b in np.arange(len(myb)): \n            self.ser.write(chr(myb[b]))\n            if db2: print myb[b]\n        for b in np.arange(4-len(myb)): \n            self.ser.write(chr(255)) # pad with extra bytes since the command expects a total of 5 bytes (numtosend, addr, and 3 more bytes)\n            if db2: print \"255\"\n        self.ser.write(chr(board)) #200 (default) will address message to all boards, otherwise only the given board ID will listen\n        if db2: print board,\"\\n\"\n        if self.db or db2: print \"Tell i2c:\",\"bytestosend:\",datacounttosend,\" and address/data:\",whattosend,\"for board\",board\n        time.sleep(.02)\n    \n    def setupi2c(self):\n        self.sendi2c(\"20 00 00\") #port A on IOexp 1 are outputs\n        self.sendi2c(\"20 01 00\") #port B on IOexp 1 are outputs\n        self.sendi2c(\"21 00 00\") #port A on IOexp 2 are outputs\n        self.sendi2c(\"20 12 \"+ ('%0*x' % (2,self.a20)) ) #port A of IOexp 1\n        self.sendi2c(\"20 13 \"+ ('%0*x' % (2,self.b20)) ) #port B of IOexp 1\n        self.sendi2c(\"21 12 \"+ ('%0*x' % (2,self.a21)) ) #port A of IOexp 2\n        if self.minfirmwareversion<15:\n            self.sendi2c(\"21 01 00\") #port B on IOexp 2 are outputs\n            self.sendi2c(\"21 13 \"+ ('%0*x' % (2,self.b21)) ) #port B of IOexp 2\n        else:\n            self.sendi2c(\"21 01 ff\") #port B on IOexp 2 are inputs!\n            self.sendi2c(\"21 0d ff\") #port B on IOexp 2 enable pull-up resistors!\n            #print \"portB on IOexp2 are inputs now\"\n        #print \"initialized all i2c ports and set to starting values\"\n            \n    def setdac(self,chan,val,board):        \n        if chan==0: c=\"50\"\n        elif chan==1: c=\"52\"\n        elif chan==2: c=\"54\"\n        elif chan==3: c=\"56\"\n        else:\n            print \"channel\",chan,\"out of range 0-3\"\n            return        \n        if val>4096*2-1 or val<0:\n            print \"value\",val,\"out of range 0-(4096*2-1)\"\n            return\n        #d=\"0\" # Vdd ref (0-3.3V, but noisy?)\n        d=\"8\" #internal ref, gain=1 (0-2V)\n        if val>4095:\n            d=\"9\" #internal ref, gain=2 (0-4V)\n            val/=2\n        self.sendi2c(\"60 \"+c+d+('%0*x' % (3,val)),  board) #DAC, can go from 000 to 0fff in last 12 bits, and only send to the selected board\n        \n        # example:\n        # channel 0 , board 0 calib\n        # 136, 3, // header for i2c command with 3 bytes of data\n        # 96, // i2c address of dac\n        # 80, // channel 80,82,84,86 for chan 0,1,2,3\n        # 136, 22, // high 4 bits can be 8 or 9 (internal ref 2V or 4V, respectively), next 12 bits are the 0-4095 level\n        # 0 // send to board 0 (200 for all boards)\n    \n    def shutdownadcs(self):\n        self.b20= int('ff',16)  # shdn (set first char to f to turn off) / ac coupling (?)\n        self.sendi2c(\"20 13 \"+ ('%0*x' % (2,self.b20)) ) #port B of IOexp 1\n        print \"shut down adcs\"\n        \n    def testi2c(self):\n        print \"test i2c\"\n        dotest=3 # what to test\n        if dotest==0:\n            # IO expander 1            \n            self.sendi2c(\"20 12 ff\") #turn on all port A of IOexp 1 (12 means A, ff is which of the 8 bits to turn on)\n            self.sendi2c(\"20 13 ff\") #turn on all port B of IOexp 1 (13 means B, ff is which of the 8 bits to turn on)\n            time.sleep(3)\n            self.sendi2c(\"20 12 00\") #turn off all port A of IOexp 1\n            self.sendi2c(\"20 13 00\") #turn off all port B of IOexp 1\n        elif dotest==1:\n            #Test the DAC\n            self.setdac(0,0)\n            time.sleep(3)\n            self.setdac(0,1200)\n        elif dotest==2:\n            #toggle led 3, at 0x21 a0\n            self.a21=self.toggleBit(self.a21,3); self.sendi2c(\"21 12 \"+ ('%0*x' % (2,self.a21)) )\n        elif dotest==3:\n            #toggle pin E24 B7, at 0x21 b7\n            self.b21=self.toggleBit(self.b21,7); self.sendi2c(\"21 13 \"+ ('%0*x' % (2,self.b21)) )\n    \n    def toggledousb(self):#toggle whether to read over FT232H USB or not\n        if len(self.usbser)==0:\n            self.dousb=False\n            print \"usb2 connection not available\"\n        else:\n            self.dousb = not self.dousb\n            self.ser.write(chr(137))\n            print \"dousb toggled to\",self.dousb\n            if self.dousb: print \"rate theoretically\",round(4000000./(self.num_bytes*num_board+len(max10adcchans)*self.nsamp),2),\"Hz over USB2\"\n            self.telltickstowait()\n    \n    def togglehighres(self):#toggle whether to do highres averaging during downsampling or not\n            self.ser.write(chr(143))\n            self.dohighres = not self.dohighres\n            print \"do highres is\",self.dohighres\n    \n    def toggleuseexttrig(self):#toggle whether to use the external trigger input or not\n            self.ser.write(chr(144))\n            self.useexttrig = not self.useexttrig\n            print \"useexttrig is\",self.useexttrig\n    \n    def toggletriggerchan(self,tp):\n        #tell it to trigger or not trigger on a given channel\n        self.ser.write(chr(130))\n        self.writefirmchan(tp)\n        self.trigsactive[tp] = not self.trigsactive[tp]\n        if len(plt.get_fignums())>0:\n            origline,legline,channum = self.lined[tp]\n            if self.trigsactive[tp]: self.leg.get_texts()[tp].set_color('#000000')\n            else: self.leg.get_texts()[tp].set_color('#aFaFaF')\n            self.figure.canvas.draw()\n        if self.db: print \"Trigger toggled for channel\",tp\n\n    def toggleautorearm(self):\n        #tell it to toggle the auto rearm of the tirgger after readout\n        self.ser.write(chr(139))\n        self.autorearm = not self.autorearm\n        print \"Trigger auto rearm now\",self.autorearm\n        if self.db: print time.time()-self.oldtime,\"priming trigger\"\n        self.ser.write(chr(100)) # prime the trigger one last time\n    \n    def getIDs(self):\n        debug3=True\n        self.uniqueID=[]\n        for n in range(num_board):\n            self.ser.write(chr(30+n)) #make the next board active (serial_passthrough 0) \n            self.ser.write(chr(142)) #request the unique ID\n            num_other_bytes = 8\n            rslt = self.ser.read(num_other_bytes)\n            if len(rslt)==num_other_bytes:\n                byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n                self.uniqueID.append( ''.join(format(x, '02x') for x in byte_array) )\n                if debug3: print \"got uniqueID\",self.uniqueID[n],\"for board\",n,\", len is now\",len(self.uniqueID)\n            else: print \"getID asked for\",num_other_bytes,\"bytes and got\",len(rslt),\"from board\",n\n    \n    def togglesupergainchan(self,chan):\n        if len(plt.get_fignums())>0: origline,legline,channum = self.lined[chan]\n        if self.supergain[chan]==1:\n            self.supergain[chan]=0 #x100 super gain on!\n            if len(plt.get_fignums())>0:\n                if self.gain[chan]==1:\n                    origline.set_label(self.chtext+str(chan)+\" x100\")\n                    self.leg.get_texts()[chan].set_text(self.chtext+str(chan)+\" x100\")\n                else:\n                    origline.set_label(self.chtext+str(chan)+\" x1000\")\n                    self.leg.get_texts()[chan].set_text(self.chtext+str(chan)+\" x1000\")\n        else:\n            self.supergain[chan]=1 #normal gain\n            if len(plt.get_fignums())>0:\n                if self.gain[chan]==1:\n                    origline.set_label(self.chtext+str(chan))\n                    self.leg.get_texts()[chan].set_text(self.chtext+str(chan))\n                else:\n                    origline.set_label(self.chtext+str(chan)+\" x10\")\n                    self.leg.get_texts()[chan].set_text(self.chtext+str(chan)+\" x10\")\n        self.selectedchannel=chan\n        self.setdacvalue()\n        if len(plt.get_fignums())>0: self.figure.canvas.draw()\n        print \"Supergain switched for channel\",chan,\"to\",self.supergain[chan]\n    \n    def tellswitchgain(self,chan):\n        #tell it to switch the gain of a channel\n        self.ser.write(chr(134))\n        self.writefirmchan(chan)\n        if len(plt.get_fignums())>0: origline,legline,channum = self.lined[chan]\n        if self.gain[chan]==1:\n            self.gain[chan]=0 # x10 gain on!\n            if len(plt.get_fignums())>0:\n                if self.supergain[chan]==1:\n                    origline.set_label(self.chtext+str(chan)+\" x10\")\n                    self.leg.get_texts()[chan].set_text(self.chtext+str(chan)+\" x10\")\n                else:\n                    origline.set_label(self.chtext+str(chan)+\" x1000\")\n                    self.leg.get_texts()[chan].set_text(self.chtext+str(chan)+\" x1000\")\n        else:\n            self.gain[chan]=1 #low gain\n            if len(plt.get_fignums())>0:\n                if self.supergain[chan]==1:\n                    origline.set_label(self.chtext+str(chan))\n                    self.leg.get_texts()[chan].set_text(self.chtext+str(chan))\n                else:\n                    origline.set_label(self.chtext+str(chan)+\" x100\")\n                    self.leg.get_texts()[chan].set_text(self.chtext+str(chan)+\" x100\")\n        self.selectedchannel=chan # needed for setdacvalue\n        self.setdacvalue()\n        if len(plt.get_fignums())>0: self.figure.canvas.draw()\n        print \"Gain switched for channel\",chan,\"to\",self.gain[chan]\n\n    def oversamp(self,chan):\n        #tell it to toggle oversampling for this channel\n        chanonboard = chan%num_chan_per_board\n        if chanonboard>1: return\n        if chanonboard==1 and self.dooversample[chan] and self.dooversample[chan-1]==9: print \"first disable over-oversampling on channel\",chan-1; return\n        self.togglechannel(chan+2,True)\n        self.dooversample[chan] = not self.dooversample[chan];\n        print \"oversampling is now\",self.dooversample[chan],\"for channel\",chan\n        if self.dooversample[chan] and self.downsample>0: self.telldownsample(0) # must be in max sampling mode for oversampling to make sense\n        self.ser.write(chr(141))\n        self.writefirmchan(chan)\n        self.drawtext()\n        self.figure.canvas.draw()\n    \n    def overoversamp(self):\n    \tif self.selectedchannel%4: print \"over-oversampling only for channel 0 of a board!\"\n        elif self.dooversample[self.selectedchannel]==0 or self.dooversample[self.selectedchannel+1]==0: print \"for over-oversampling, first do oversampling on channels 0 and 1 of the board\"\n        elif self.dooversample[self.selectedchannel]==1: self.dooversample[self.selectedchannel]=9; self.togglechannel(self.selectedchannel+1,True); print \"over-oversampling\"\n        elif self.dooversample[self.selectedchannel]==9: self.dooversample[self.selectedchannel]=1; print \"no more over-oversampling\"\n\n    def resetchans(self):\n        for chan in np.arange(num_board*num_chan_per_board):\n            if self.gain[chan]==0:\n                self.tellswitchgain(chan) # set all gains back to low gain\n            if  self.trigsactive[chan]==0:\n                self.toggletriggerchan(chan) # set all trigger channels back to active\n            if self.dooversample[chan]: \n                self.oversamp(chan) # set all channels back to no oversampling\n    \n    def setbacktoserialreadout(self):\n        if self.dousb:    \n            self.ser.write(chr(137))\n            self.dousb=False\n            print \"dousb set back to\",self.dousb\n    \n    def telldownsample(self,ds):\n        #tell it the amount to downsample, log2... so 0 (none), 1(factor 2), 2(factor 4), etc.\n        if self.dolockin and ds<2: print \"downsample can't be <2 in lockin mode !\"; return False\n        if ds<-8: print \"downsample can't be <-8... that's too fast !\"; return False\n        if ds<0: # negative downsample means just scale/zoom the data, don't actually change the sampling done on the board\n            self.downsample=ds\n        else:\n            if max(self.dooversample)>0 and ds>0: print \"can't change sampling rate while oversampling - must be fastest!\"; return False\n            if ds>self.maxdownsample: print \"downsample >\",self.maxdownsample,\"doesn't work well... I get bored running that slow!\"; return False        \n            self.ser.write(chr(124))\n            self.ser.write(chr(ds))\n            self.downsample=ds\n            if self.db: print \"downsample is\",self.downsample        \n            if self.dolockin:\n                twoforoversampling=1\n                uspersample=(1.0/self.clkrate)*pow(2,self.downsample)/twoforoversampling # us per sample = 10 ns * 2^downsample\n                numtoshiftf= 1.0/self.reffreq/4.0 / uspersample\n                print \"would like to shift by\",round(numtoshiftf,4),\"samples, and uspersample is\",uspersample\n                self.numtoshift = int(round(numtoshiftf,0))+0 # shift by 90 deg\n                self.telllockinnumtoshift(self.numtoshift)\n            else:\n                self.telllockinnumtoshift(0) # tells the FPGA to not send lockin info    \n            self.telltickstowait()\n        if hasattr(self,'ax'): self.setxaxis(self.ax,self.figure)\n        return True # successful (parameter within OK range)\n\n    def setxaxis(self,ax,fig):\n        xscale =  self.num_samples/2.0*(1000.0*pow(2,self.downsample)/self.clkrate)\n        if xscale<1e3: \n            ax.set_xlabel(\"Time (ns)\")\n            self.min_x = -xscale\n            self.max_x = xscale\n            self.xscaling=1.e0\n        elif xscale<1e6: \n            ax.set_xlabel(\"Time (us)\")\n            self.min_x = -xscale/1e3\n            self.max_x = xscale/1e3\n            self.xscaling=1.e3\n        else:\n            ax.set_xlabel(\"Time (ms)\")\n            self.min_x = -xscale/1e6\n            self.max_x = xscale/1e6\n            self.xscaling=1.e6\n        ax.set_xlim(self.min_x, self.max_x)\n        ax.xaxis.set_major_locator(plt.MultipleLocator( (self.max_x*1000/1024-self.min_x*1000/1024)/8. ))\n        fig.canvas.draw()\n    \n    def setyaxis(self):\n        self.ax.set_ylim(self.min_y, self.max_y)\n        self.ax.set_ylabel(\"Volts\") #(\"ADC value\")\n        self.ax.yaxis.set_major_locator(plt.MultipleLocator(1.0))\n        self.ax.spines['top'].set_visible(False)\n        self.ax.spines['right'].set_visible(False)\n        self.ax.spines['left'].set_visible(False)\n        self.ax.spines['bottom'].set_visible(False)\n        plt.setp(self.ax.get_xticklines(),visible=False)\n        plt.setp(self.ax.get_yticklines(),visible=False)\n        #self.ax.set_autoscaley_on(True)\n        self.figure.canvas.draw()\n    \n    def chantext(self):\n        text =\"Channel: \"+str(self.selectedchannel)\n        if self.ydatarefchan>=0: text += \" - ref \"+str(int(self.ydatarefchan))\n        text +=\"\\nLevel=\"+str(int(self.chanlevel[self.selectedchannel]))\n        if self.acdc[self.selectedchannel]:\n            text +=\"\\nDC coupled\"\n        else:\n            text +=\"\\nAC coupled\"\n        chanonboard = self.selectedchannel%num_chan_per_board\n        theboard = num_board-1-self.selectedchannel/num_chan_per_board\n        if self.havereadswitchdata:\n            if self.testBit(self.switchpos[theboard],chanonboard):\n                text += \", 1M\"\n            else:\n                text += \", 50\"\n        text +=\"\\nTriggering=\"+str(self.trigsactive[self.selectedchannel])\n        if self.domeasure:\n            if abs(self.Vmean[self.selectedchannel])>.9: text +=\"\\nMean={0:1.3g} V\".format(self.Vmean[self.selectedchannel])\n            else: text +=\"\\nMean={0:1.3g} mV\".format(1000.*self.Vmean[self.selectedchannel])\n            if abs(self.Vrms[self.selectedchannel])>.9: text +=\"\\nRMS={0:1.3g} V\".format(self.Vrms[self.selectedchannel])\n            else: text +=\"\\nRMS={0:1.3g} mV\".format(1000.*self.Vrms[self.selectedchannel])        \n        if chanonboard<2:\n            if self.dooversample[self.selectedchannel]==1: text+= \"\\nOversampled x2\"\n            if self.dooversample[self.selectedchannel]==9: text+= \"\\nOversampled x4\"\n        else:\n            if self.selectedchannel>1 and self.dooversample[self.selectedchannel-2]: text+= \"\\nOff (oversamp)\"\n        if len(max10adcchans)>0:\n            text+=\"\\n\"\n            text+=\"\\nSlow chan: \"+str(self.selectedmax10channel)\n        if self.dogetotherdata:\n            text+=\"\\nTDC: \"+str(self.tdcdata)\n        return text\n    \n    firstdrawtext=True\n    needtoredrawtext=False\n    def drawtext(self):\n        height = 0.25 # height up from bottom to start drawing text\n        xpos = 1.02 # how far over to the right to draw\n        if self.firstdrawtext:\n            self.texts.append(self.ax.text(xpos, height, self.chantext(),horizontalalignment='left', verticalalignment='top',transform=self.ax.transAxes))\n            self.firstdrawtext=False\n        else:\n            self.texts[0].remove()\n            self.texts[0]=(self.ax.text(xpos, height, self.chantext(),horizontalalignment='left', verticalalignment='top',transform=self.ax.transAxes))\n            #for txt in self.ax.texts: print txt # debugging\n        self.needtoredrawtext=True\n        plt.draw()\n    \n    def togglechannel(self,theline,leaveoff=False):\n        # on the pick event, find the orig line corresponding to the\n        # legend proxy line, and toggle the visibility\n        origline,legline,channum = self.lined[theline]\n        if leaveoff and not origline.get_visible(): return\n        print \"toggle\",theline,\"for channum\",channum                \n        vis = not origline.get_visible()\n        origline.set_visible(vis)\n        if channum < num_board*num_chan_per_board: # it's an ADC channel (not a max10adc channel or other thing)\n            # If the channel was not actively triggering, and we now turned it on, or vice versa, toggle the trigger activity for this channel\n            if self.trigsactive[channum] != vis: self.toggletriggerchan(channum)\n        # Change the alpha on the line in the legend so we can see what lines have been toggled\n        if vis: legline.set_alpha(1.0); legline.set_linewidth(2.0)\n        else: legline.set_alpha(0.2); legline.set_linewidth(1.0)\n    \n    def pickline(self,theline):\n        # on the pick event, find the orig line corresponding to the\n        # legend proxy line, and toggle the visibility\n        origline,legline,channum = self.lined[theline]\n        if self.db: print \"picked\",theline,\"for channum\",channum\n        if hasattr(self,'selectedlegline'): \n            if self.selectedorigline.get_visible(): self.selectedlegline.set_linewidth(2.0)\n            else: self.selectedlegline.set_linewidth(1.0)\n        legline.set_linewidth(4.0)\n        self.selectedlegline=legline; self.selectedorigline=origline # remember them so we can set it back to normal later when we pick something else\n        if channum < num_board*num_chan_per_board: # it's an ADC channel (not a max10adc channel or other thing)\n            if self.db: print \"picked a real ADC channel\"\n            self.selectedchannel=channum\n            if self.keyShift: self.toggletriggerchan(channum)\n        else:\n            if self.db: print \"picked a max10 ADC channel\"\n            self.selectedmax10channel=channum - num_board*num_chan_per_board\n        self.drawtext()\n\n    def onpick(self,event):\n        if event.mouseevent.button==1: #left click\n            if self.keyControl: self.togglechannel(event.artist)\n            else:self.pickline(event.artist)\n            plt.draw()\n    \n    def onclick(self,event):\n        try:\n            if event.button==1: #left click                \n                pass\n            if event.button==2: #middle click\n                if self.keyShift:# if shift is held, turn off threshold2\n                    self.settriggerthresh2(0)\n                    self.otherlines[2].set_visible(False)\n                else:\n                    self.hline2 = event.ydata\n                    self.settriggerthresh2(int(  self.hline2/(self.yscale/256.) + 128  ))                \n                    self.otherlines[2].set_visible(True) # starts off being hidden, so now show it!\n                    self.otherlines[2].set_data( [self.min_x, self.max_x], [self.hline2, self.hline2] )\n            if event.button==3: #right click\n                self.settriggerpoint(int(  (event.xdata / (1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling)) +self.num_samples/2  )) # downsample\n                self.settriggerthresh(int(  event.ydata/(self.yscale/256.) + 128  ))\n                self.vline = event.xdata\n                self.otherlines[0].set_visible(True)\n                self.otherlines[0].set_data( [self.vline, self.vline], [self.min_y, self.max_y] ) # vertical line showing trigger time\n                self.hline = event.ydata\n                self.otherlines[1].set_data( [self.min_x, self.max_x], [self.hline, self.hline] ) # horizontal line showing trigger threshold\n            print('%s click: button=%d, x=%d, y=%d, xdata=%f, ydata=%f' % ('double' if event.dblclick else 'single', event.button, event.x, event.y, event.xdata, event.ydata))\n            return\n        except TypeError: pass\n    \n    def adjustvertical(self,up,amount=10):\n        if self.keyShift: amount*=5\n        if self.keyControl: amount/=10\n        #print \"amount is\",amount\n        if self.gain[self.selectedchannel]: amount*=10 #low gain\n        if self.supergain[self.selectedchannel]==0 and self.acdc[self.selectedchannel]: amount=max(1,amount/10) #super gain\n        #print \"now amount is\",amount\n        if up:\n             self.chanlevel[self.selectedchannel] = self.chanlevel[self.selectedchannel] - amount\n        else:\n             self.chanlevel[self.selectedchannel] = self.chanlevel[self.selectedchannel] + amount\n        self.rememberdacvalue()\n        self.setdacvalue()\n        \n    def rememberdacvalue(self):\n        #remember current dac level for the future to the right daclevel, depending on other settings\n        if self.gain[self.selectedchannel]: # low gain\n            if self.supergain[self.selectedchannel]: \n                if self.acdc[self.selectedchannel]: self.lowdaclevel[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n                else: self.lowdaclevelac[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n            else: #supergain\n                if self.acdc[self.selectedchannel]: self.lowdaclevelsuper[self.selectedchannel]=self.chanlevel[self.selectedchannel] #dc super gain\n                else: self.lowdaclevelsuperac[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n        else: # high gain\n            if self.supergain[self.selectedchannel]: \n                if self.acdc[self.selectedchannel]: self.highdaclevel[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n                else: self.highdaclevelac[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n            else: #supergain\n                if self.acdc[self.selectedchannel]: self.highdaclevelsuper[self.selectedchannel]=self.chanlevel[self.selectedchannel] #dc super gain\n                else: self.highdaclevelsuperac[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n                \n    def setdacvalue(self):\n        #set current dac level to the remembered value, depending on other settings\n        if self.gain[self.selectedchannel]: # low gain\n            if self.supergain[self.selectedchannel]: \n                if self.acdc[self.selectedchannel]: self.setdaclevelforchan(self.selectedchannel,self.lowdaclevel[self.selectedchannel])\n                else: self.setdaclevelforchan(self.selectedchannel,self.lowdaclevelac[self.selectedchannel])\n            else: #supergain\n                if self.acdc[self.selectedchannel]: self.setdaclevelforchan(self.selectedchannel,self.lowdaclevelsuper[self.selectedchannel]) #dc super gain\n                else: self.setdaclevelforchan(self.selectedchannel,self.lowdaclevelsuperac[self.selectedchannel])\n        else: # high gain\n            if self.supergain[self.selectedchannel]: \n                if self.acdc[self.selectedchannel]: self.setdaclevelforchan(self.selectedchannel,self.highdaclevel[self.selectedchannel])\n                else: self.setdaclevelforchan(self.selectedchannel,self.highdaclevelac[self.selectedchannel])\n            else: #supergain\n                if self.acdc[self.selectedchannel]: self.setdaclevelforchan(self.selectedchannel,self.highdaclevelsuper[self.selectedchannel]) #dc super gain\n                else: self.setdaclevelforchan(self.selectedchannel,self.highdaclevelsuperac[self.selectedchannel])\n        \n    def setacdc(self):\n        chan=self.selectedchannel\n        theboard = num_board-1-chan/num_chan_per_board\n        chanonboard = chan%num_chan_per_board\n        print \"toggling acdc for chan\",chan,\"which is chan\",chanonboard,\"on board\",theboard\n        self.acdc[int(chan)] = not self.acdc[int(chan)]\n        self.b20= int('00',16)  # shdn (set first char to 0 to turn on) / ac coupling (set second char to f for DC, 0 for AC)\n        for c in range(0,4):\n            realchan = (num_board-1-theboard)*num_chan_per_board+c\n            if self.acdc[int(realchan)]: \n                self.b20 = self.toggleBit(self.b20,int(c)) # 1 is dc, 0 is ac\n                if self.db: print \"toggling bit\",c,\"for chan\",realchan\n        self.sendi2c(\"20 13 \"+ ('%0*x' % (2,self.b20)),  theboard) #port B of IOexp 1, only for the selected board\n        self.setdacvalue()\n        self.drawtext()\n    \n    def setdacvalues(self,sc):\n        oldchan=self.selectedchannel\n        for chan in range(sc,sc+4):\n            self.selectedchannel=chan\n            self.setdacvalue()\n        self.selectedchannel=oldchan\n    \n    def storecalib(self):\n        cwd = os.getcwd()\n        print \"current directory is\",cwd\n        for board in range(0,num_board):\n            self.storecalibforboard(board)\n    def storecalibforboard(self,board):\n        sc = board*num_chan_per_board\n        print \"storing calibrations for board\",board,\", channels\",sc,\"-\",sc+4\n        c = dict(\n            boardID=self.uniqueID[board],\n            lowdaclevels=self.lowdaclevel[sc : sc+4].tolist(),\n            highdaclevels=self.highdaclevel[sc : sc+4].tolist(),\n            lowdaclevelssuper=self.lowdaclevelsuper[sc : sc+4].tolist(),\n            highdaclevelssuper=self.highdaclevelsuper[sc : sc+4].tolist(),\n            lowdaclevelsac=self.lowdaclevelac[sc : sc+4].tolist(),\n            highdaclevelsac=self.highdaclevelac[sc : sc+4].tolist(),\n            lowdaclevelssuperac=self.lowdaclevelsuperac[sc : sc+4].tolist(),\n            highdaclevelssuperac=self.highdaclevelsuperac[sc : sc+4].tolist(),\n            firmwareversion=self.minfirmwareversion\n            )\n        #print json.dumps(c,indent=4)\n        fname = \"calib/calib_\"+self.uniqueID[board]+\".json.txt\"\n        json.dump(c,open(fname,'w'),indent=4)\n        print \"wrote\",fname\n    \n    def readcalib(self):\n        cwd = os.getcwd()\n        print \"current directory is\",cwd\n        for board in range(0,num_board):\n            self.readcalibforboard(board)\n    def readcalibforboard(self,board):\n        sc = board*num_chan_per_board\n        if len(self.uniqueID)<=board:\n            print \"failed to get board ID for board\",board\n            self.setdacvalues(sc) #will load in defaults\n            return\n        print \"reading calibrations for board\",board,\", channels\",sc,\"-\",sc+4\n        fname = \"calib/calib_\"+self.uniqueID[board]+\".json.txt\"\n        try:\n            c = json.load(open(fname))\n            print \"read\",fname\n            assert c['boardID']==self.uniqueID[board]\n            self.lowdaclevel[sc : sc+4] = c['lowdaclevels']\n            self.highdaclevel[sc : sc+4] = c['highdaclevels']\n            self.lowdaclevelsuper[sc : sc+4] = c['lowdaclevelssuper']\n            self.highdaclevelsuper[sc : sc+4] = c['highdaclevelssuper']\n            self.lowdaclevelac[sc : sc+4] = c['lowdaclevelsac']\n            self.highdaclevelac[sc : sc+4] = c['highdaclevelsac']\n            self.lowdaclevelsuperac[sc : sc+4] = c['lowdaclevelssuperac']\n            self.highdaclevelsuperac[sc : sc+4] = c['highdaclevelssuperac']\n            if \"firmwareversion\" in c:\n                print \"calib was written using firmware version\",c[\"firmwareversion\"]\n            else:\n                print \"calib was written using unknown firmware version\"\n            self.setdacvalues(sc) #and use the new levels right away\n            if not self.firstdrawtext: self.drawtext()\n        except IOError:\n            print \"No calib file found for board\",board,\"at file\",fname\n            self.setdacvalues(sc) #will load in defaults      \n    \n    def onscroll(self,event):\n         #print event\n         if event.button=='up': self.adjustvertical(True)\n         else: self.adjustvertical(False)\n        \n    def onrelease(self,event): # a key was released\n        #print event.key, \"released\"\n        if event.key.find(\"shift\")>-1: self.keyShift=False;return\n        if event.key.find(\"alt\")>-1: self.keyAlt=False;return\n        if event.key==\"control\": self.keyControl=False; return\n        if event.key.find(\"ctrl\")>-1: self.keyControl=False; return    \n        if event.key.find(\"control\")>-1: self.keyControl=False; return    \n    \n    drawmarkers=False\n    def domarkers(self): # toggle drawing of markers, for fast ADC channels\n        self.drawmarkers = not self.drawmarkers\n        c=0\n        for line in self.lines:\n            c=c+1\n            if c>num_chan_per_board*num_board: break\n            if self.drawmarkers:\n                line.set_marker(\"o\")\n                line.set_markeredgewidth(0.5)\n                line.set_markersize(2.5)\n            else:\n                line.set_marker(\".\")\n                line.set_markersize(0)\n    \n    #called when sampling is changed, to reset some things\n    def prepareforsamplechange(self):\n        self.recordedchannel=[]\n        if self.doxyplot:\n            plt.close(self.figxy)\n        if self.recorddata:\n            plt.close(self.fig2d)\n    \n    #will grab the next keys as input\n    keyResample=False\n    keysettriggertime=False\n    keySPI=False\n    keyi2c=False\n    keyLevel=False\n    keyShift=False\n    keyAlt=False\n    keyControl=False    \n    \n    def onpress(self,event): # a key was pressed\n            if self.keyResample:\n                try:\n                    self.sincresample=int(event.key)\n                    print \"resample now\",self.sincresample\n                    if self.sincresample>0: self.xydata=np.empty([num_chan_per_board*num_board,2,self.sincresample*(self.num_samples-1)],dtype=float)\n                    else: self.xydata=np.empty([num_chan_per_board*num_board,2,1*(self.num_samples-1)],dtype=float)\n                    self.prepareforsamplechange();\n                    self.keyResample=False; return\n                except ValueError: pass\n            elif self.keysettriggertime:\n                if event.key==\"enter\":                    \n                    self.settriggertime(self.triggertimethresh)\n                    self.keysettriggertime=False; return\n                else:\n                    self.triggertimethresh=10*self.triggertimethresh+int(event.key)\n                    print \"triggertimethresh\",self.triggertimethresh; return            \n            elif self.keySPI:\n                if event.key==\"enter\":                    \n                    self.tellSPIsetup(self.SPIval)\n                    self.keySPI=False; return\n                else:\n                    self.SPIval=10*self.SPIval+int(event.key)\n                    print \"SPIval\",self.SPIval; return            \n            elif self.keyi2c:\n                if event.key==\"enter\":                    \n                    self.sendi2c(self.i2ctemp)\n                    self.keyi2c=False; return\n                else:\n                    self.i2ctemp=self.i2ctemp+event.key\n                    print \"i2ctemp\",self.i2ctemp; return\n            elif self.keyLevel:\n                if event.key==\"enter\":\n                    self.keyLevel=False\n                    s=self.leveltemp.split(\",\")\n                    #print \"Got\",int(s[0]),int(s[1])\n                    self.selectedchannel=int(s[0])\n                    self.chanlevel[self.selectedchannel] = int(s[1])\n                    self.rememberdacvalue()\n                    self.setdacvalue()\n                    return\n                else:\n                    self.leveltemp=self.leveltemp+event.key\n                    print \"leveltemp\",self.leveltemp; return\n            elif event.key==\"r\": self.rolltrigger=not self.rolltrigger; self.tellrolltrig(self.rolltrigger);return\n            elif event.key==\"p\": self.paused = not self.paused;print \"paused\",self.paused; return\n            elif event.key==\"P\": self.getone = not self.getone;print \"get one\",self.getone; return\n            elif event.key==\"a\": self.average = not self.average;print \"average\",self.average; return\n            elif event.key==\"h\": self.togglehighres(); return\n            elif event.key==\"e\": self.toggleuseexttrig(); return\n            elif event.key==\"A\": self.toggleautorearm(); return\n            elif event.key==\"U\": self.toggledousb(); return\n            elif event.key==\"O\": self.oversamp(self.selectedchannel); self.prepareforsamplechange(); return\n            elif event.key==\"ctrl+o\": self.overoversamp(); self.prepareforsamplechange(); return\n            elif event.key==\">\": self.refsinchan=self.selectedchannel; self.oldchanphase=-1.; self.reffreq=0;\n            elif event.key==\"t\": self.fallingedge=not self.fallingedge;self.settriggertype(self.fallingedge);print \"trigger falling edge toggled to\",self.fallingedge; return\n            elif event.key==\"g\": self.dogrid=not self.dogrid;print \"dogrid toggled\",self.dogrid; self.ax.grid(self.dogrid); return\n            elif event.key==\"ctrl+g\": self.ax.xaxis.set_major_locator(plt.MultipleLocator( (self.max_x*1000/1024-self.min_x*1000/1024)/8./5. )); return\n            elif event.key==\"G\": self.ax.yaxis.set_major_locator(plt.MultipleLocator(0.2)); return\n            elif event.key==\"x\": self.tellswitchgain(self.selectedchannel)\n            elif event.key==\"ctrl+x\": \n                for chan in range(num_chan_per_board*num_board): self.tellswitchgain(chan)\n            elif event.key==\"X\": self.togglesupergainchan(self.selectedchannel)\n            elif event.key==\"ctrl+X\": \n                for chan in range(num_chan_per_board*num_board): self.selectedchannel=chan; self.togglesupergainchan(chan)\n            elif event.key==\"F\": self.fftchan=self.selectedchannel; self.dofft=True; self.keyShift=False; return\n            elif event.key==\"/\": self.setacdc();return\n            elif event.key==\"I\": self.testi2c(); return\n            elif event.key==\"c\": self.readcalib(); return\n            elif event.key==\"C\": self.storecalib(); return\n            elif event.key==\"D\": self.decode(); return\n            elif event.key==\"ctrl+r\": \n                if self.ydatarefchan<0: self.ydatarefchan=self.selectedchannel\n                else: self.ydatarefchan=-1\n            elif event.key==\"|\": print \"starting autocalibration\";self.autocalibchannel=0;\n            elif event.key==\"W\": self.domaindrawing=not self.domaindrawing; self.domeasure=self.domaindrawing; print \"domaindrawing now\",self.domaindrawing; return\n            elif event.key==\"M\": self.domeasure=not self.domeasure; print \"domeasure now\",self.domeasure; self.drawtext(); return\n            elif event.key==\"m\": self.domarkers(); return\n            elif event.key==\"Y\": \n                if self.selectedchannel+1>=len(self.dooversample): print \"can't do XY plot on last channel\"\n                else:\n                    if self.dooversample[self.selectedchannel]==self.dooversample[self.selectedchannel+1]:\n                        self.doxyplot=True; self.xychan=self.selectedchannel; print \"doxyplot now\",self.doxyplot,\"for channel\",self.xychan; return;\n                    else: print \"oversampling settings must match between channels for XY plotting\"\n                self.keyShift=False\n            elif event.key==\"Z\": self.recorddata=True; self.recorddatachan=self.selectedchannel; self.recordedchannel=[]; print \"recorddata now\",self.recorddata,\"for channel\",self.recorddatachan; self.keyShift=False; return;\n            elif event.key==\"right\": self.telldownsample(self.downsample+1); return\n            elif event.key==\"left\": self.telldownsample(self.downsample-1); return\n            elif event.key==\"shift+right\": self.telldownsample(self.downsample+5); return\n            elif event.key==\"shift+left\": self.telldownsample(self.downsample-5); return\n            elif event.key==\"up\": self.adjustvertical(True); return\n            elif event.key==\"down\": self.adjustvertical(False); return\n            elif event.key==\"shift+up\": self.adjustvertical(True); return\n            elif event.key==\"shift+down\": self.adjustvertical(False); return\n            elif event.key==\"ctrl+up\": self.adjustvertical(True); return\n            elif event.key==\"ctrl+down\": self.adjustvertical(False); return\n            elif event.key==\"?\": self.togglelogicanalyzer(); return \n            elif event.key==\"d\": self.tellminidisplaychan(self.selectedchannel);return\n            elif event.key==\"R\": self.keyResample=True;print \"now enter amount to sinc resample (0-9)\";return\n            elif event.key==\"T\": self.keysettriggertime=True;self.triggertimethresh=0;print \"now enter time over/under thresh, then enter\";return\n            elif event.key==\"S\": self.keySPI=True;self.SPIval=0;print \"now enter SPI code, then enter\";return\n            elif event.key==\"i\": self.keyi2c=True;self.i2ctemp=\"\";print \"now enter byte in hex for i2c, then enter:\";return\n            elif event.key==\"L\": self.keyLevel=True;self.leveltemp=\"\";print \"now enter [channel to set level for, level] then enter:\";return\n            elif event.key==\"shift\": self.keyShift=True;return\n            elif event.key==\"alt\": self.keyAlt=True;return\n            elif event.key==\"control\": self.keyControl=True;return\n            elif event.key==\"tab\":\n                for l in self.lines:\n                    self.togglechannel(l)\n                self.figure.canvas.draw()\n                return;\n            try:\n                print 'key=%s' % (event.key)\n                print 'x=%d, y=%d, xdata=%f, ydata=%f' % (event.x, event.y, event.xdata, event.ydata)\n            except TypeError: pass\n    \n    def decode(self):\n        if not enable_ripyl:\n            print \"ripyl not enabled - install it and then set enable_ripyl to True at the top of HaasoscopeLib.py\"\n            return\n        raw_samples = self.xydata[self.selectedchannel][1] #ydata\n        sample_period = (1e-6/self.clkrate)*pow(2,self.downsample)\n        txd = stream.samples_to_sample_stream(raw_samples, sample_period)\n        bits = 8 # Anything, not just restricted to the standard 5,6,7,8,9\n        parity = None # or 'odd' or None\n        stop_bits = 1 # Can be 1, 1.5, 2 or any non-standard value greater than 0.5\n        polarity = uart.UARTConfig.IdleHigh # logic level when there's no data\n        baud=1500000 # baud rate -- can set to None if you want to try to determine it automatically!\n        levels=(1.0,1.5) # the low and high logic levels\n        format=stream.AnnotationFormat.Int # can be Hex, Int, or Bin\n        try:\n            records_it = uart.uart_decode(txd, bits, parity, stop_bits, polarity, baud_rate=baud, use_std_baud=False, logic_levels=levels)\n            records = list(records_it) # This consumes the iterator and completes the decode\n            #for rec in records: print \"rec: \",rec.nested_status()\n            txd2 = stream.samples_to_sample_stream(raw_samples, sample_period) # for some weird reason, we have to make this again!\n            channels = OrderedDict([('TX', txd2)]) # Define the channels ordered from top to bottom with the y-axis labels\n            title = 'Decoded UART plot'\n            if not hasattr(self,'plotter'):\n                self.plotter = rplot.Plotter()\n            self.plotter.plot(channels, records, title,label_format=format)\n        except stream.StreamError:\n            print \"No UART data found for channel\",self.selectedchannel\n    \n    def on_launch(self):        \n        self.xydata=np.empty([num_chan_per_board*num_board,2,self.num_samples-1],dtype=float)\n        self.xydataslow=np.empty([len(max10adcchans),2,self.nsamp],dtype=float)\n        if self.domaindrawing: self.on_launch_draw()\n    \n    fitline1=-1 # set to >-1 to draw a risetime fit\n    logicline1=-1 # to remember which is the first logic analyzer line\n    def on_launch_draw(self):\n        plt.ion() #turn on interactive mode\n        self.nlines = num_chan_per_board*num_board+len(max10adcchans)\n        if self.db: print \"nlines=\",self.nlines\n        self.figure, self.ax = plt.subplots(1)\n        for l in np.arange(self.nlines):\n            maxchan=l-num_chan_per_board*num_board\n            c=(0,0,0)\n            if maxchan>=0: # these are the slow ADC channels\n                if num_board>1:\n                    board = int(num_board-1-max10adcchans[maxchan][0])\n                    if board%4==0: c=(1-0.1*maxchan,0,0)\n                    if board%4==1: c=(0,1-0.1*maxchan,0)\n                    if board%4==2: c=(0,0,1-0.1*maxchan)\n                    if board%4==3: c=(1-0.1*maxchan,0,1-0.1*maxchan)\n                else:\n                    c=(0.1*(maxchan+1),0.1*(maxchan+1),0.1*(maxchan+1))\n                line, = self.ax.plot([],[], '-', label=str(max10adcchans[maxchan]), color=c, linewidth=0.5, alpha=.5)\n            else: # these are the fast ADC channels\n                chan=l%4\n                if num_board>1:\n                    board=l/4\n                    if board%4==0: c=(1-0.2*chan,0,0)\n                    if board%4==1: c=(0,1-0.2*chan,0)\n                    if board%4==2: c=(0,0,1-0.2*chan)\n                    if board%4==3: c=(1-0.2*chan,0,1-0.2*chan)\n                else:\n                    if chan==0: c=\"red\"\n                    if chan==1: c=\"green\"\n                    if chan==2: c=\"blue\"\n                    if chan==3: c=\"magenta\"\n                line, = self.ax.plot([],[], '-', label=self.chtext+str(l), color=c, linewidth=1.0, alpha=.9)\n            self.lines.append(line)\n        #for the logic analyzer\n        for l in np.arange(8):\n            c=(0,0,0)\n            line, = self.ax.plot([],[], '-', label=\"_logic\"+str(l)+\"_\", color=c, linewidth=1.7, alpha=.65) # the leading and trailing \"_\"'s mean don't show in the legend\n            line.set_visible(False)\n            self.lines.append(line)\n            if l==0: self.logicline1=len(self.lines)-1 # remember index where this first logic line is\n        #other data to draw\n        if self.fitline1>-1:\n            line, = self.ax.plot([],[], '-', label=\"fit data\", color=\"purple\", linewidth=0.5, alpha=.5)\n            self.lines.append(line)\n            self.fitline1=len(self.lines)-1 # remember index where this line is\n        #other stuff\n        if hasattr(self,'ax'): self.setxaxis(self.ax,self.figure)\n        self.setyaxis();\n        self.ax.grid(True)\n        self.vline=0\n        otherline , = self.ax.plot([self.vline, self.vline], [-2, 2], 'k--', lw=1)#,label='trigger time vert')\n        self.otherlines.append(otherline)\n        self.hline = 0\n        otherline , = self.ax.plot( [-2, 2], [self.hline, self.hline], 'k--', lw=1)#,label='trigger thresh horiz')\n        self.otherlines.append(otherline)\n        self.hline2 = 0\n        otherline , = self.ax.plot( [-2, 2], [self.hline2, self.hline2], 'k--', lw=1, color='blue')#, label='trigger2 thresh horiz')\n        otherline.set_visible(False)\n        self.otherlines.append(otherline)\n        if self.db: print \"drew lines in launch\",len(self.otherlines)\n        self.figure.canvas.mpl_connect('button_press_event', self.onclick)\n        self.figure.canvas.mpl_connect('key_press_event', self.onpress)\n        self.figure.canvas.mpl_connect('key_release_event', self.onrelease)\n        self.figure.canvas.mpl_connect('pick_event', self.onpick)\n        self.figure.canvas.mpl_connect('scroll_event', self.onscroll)\n        self.leg = self.ax.legend(loc='upper left', bbox_to_anchor=(1.02, 1),\n              ncol=1, borderaxespad=0, fancybox=False, shadow=False, fontsize=10)\n        self.leg.get_frame().set_alpha(0.4)\n        self.figure.subplots_adjust(right=0.76)\n        self.figure.subplots_adjust(left=.10)\n        self.figure.subplots_adjust(top=.95)\n        self.figure.subplots_adjust(bottom=.10)\n        self.figure.canvas.set_window_title('Haasoscope')        \n        self.lined = dict()\n        channum=0\n        for legline, origline in zip(self.leg.get_lines(), self.lines):\n            legline.set_picker(5)  # 5 pts tolerance\n            legline.set_linewidth(2.0)\n            origline.set_picker(5)\n            #save a reference to the plot line and legend line and channel number, accessible from either line or the channel number\n            self.lined[legline] = (origline,legline,channum)\n            self.lined[origline] = (origline,legline,channum)\n            self.lined[channum] = (origline,legline,channum)\n            channum+=1        \n        self.drawtext()\n        self.figure.canvas.mpl_connect('close_event', self.handle_main_close)\n        self.figure.canvas.draw()\n        #plt.show(block=False)\n    \n    def on_running(self, theydata, board): #update data for main plot for a board\n        if board<0: #hack to tell it the max10adc channel\n            chantodraw=-board-1 #draw chan 0 first (when board=-1)\n            posi=chantodraw+num_board*num_chan_per_board\n            if self.db: print time.time()-self.oldtime,\"drawing line\",posi\n            #if self.db: print \"ydata[0]=\",theydata[0]\n            xdatanew=(self.xsampdata-self.num_samples/2.)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling) #downsample isn't less than 0 for xscaling\n            ydatanew=theydata*(3.3/256)#full scale is 3.3V\n            if len(self.lines)>posi: # we may not be drawing, so check!\n                self.lines[posi].set_xdata(xdatanew)\n                self.lines[posi].set_ydata(ydatanew)\n            self.xydataslow[chantodraw][0]=xdatanew\n            self.xydataslow[chantodraw][1]=ydatanew\n        else:\n            if self.dologicanalyzer and self.logicline1>=0 and hasattr(self,\"ydatalogic\"): #this draws logic analyzer info\n                xlogicshift=12.0/pow(2,max(self.downsample,0)) # shift the logic analyzer data to the right by this number of samples (to account for the ADC delay) #downsample isn't less than 0 for xscaling\n                xdatanew = (self.xdata+xlogicshift-self.num_samples/2.)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling) #downsample isn't less than 0 for xscaling\n                for l in np.arange(8):\n                    a=np.array(self.ydatalogic,dtype=np.uint8)\n                    b=np.unpackbits(a)\n                    bl=b[7-l::8] # every 8th bit, starting at 7-l\n                    ydatanew = bl*.3 + (l+1)*3.2/8. # scale it and shift it\n                    self.lines[l+self.logicline1].set_xdata(xdatanew)\n                    self.lines[l+self.logicline1].set_ydata(ydatanew)\n            for l in np.arange(num_chan_per_board): #this draws the 4 fast ADC data channels for each board\n                thechan=l+(num_board-board-1)*num_chan_per_board\n                #if self.db: print time.time()-self.oldtime,\"drawing adc line\",thechan\n                if len(theydata)<=l: print \"don't have channel\",l,\"on board\",board; return\n                if self.dooversample[thechan]==1: # account for oversampling\n                    xdatanew = (self.xdata2-self.num_samples)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling/2.) #downsample isn't less than 0 for xscaling\n                    theydata2=np.concatenate([theydata[l],theydata[l+2]]) # concatenate the 2 lists\n                    ydatanew=(127-theydata2)*(self.yscale/256.) # got to flip it, since it's a negative feedback op amp\n                elif self.dooversample[thechan]==9: # account for over-oversampling\n                    xdatanew = (self.xdata4-self.num_samples*2)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling/4.) #downsample isn't less than 0 for xscaling\n                    theydata4=np.concatenate([theydata[l],theydata[l+1],theydata[l+2],theydata[l+3]]) # concatenate the 4 lists\n                    ydatanew=(127-theydata4)*(self.yscale/256.) # got to flip it, since it's a negative feedback op amp\n                else:\n                    xdatanew = (self.xdata-self.num_samples/2.)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling) #downsample isn't less than 0 for xscaling\n                    ydatanew=(127-theydata[l])*(self.yscale/256.) # got to flip it, since it's a negative feedback op amp\n                    if self.ydatarefchan>=0: ydatanew -= (127-theydata[self.ydatarefchan])*(self.yscale/256.) # subtract the board's reference channel ydata from this channel's ydata\n                if self.sincresample>0:\n                    (ydatanew,xdatanew) = resample(ydatanew, len(xdatanew)*self.sincresample, t = xdatanew)\n                    xdatanew = xdatanew[1*self.sincresample:len(xdatanew)*self.sincresample]\n                    ydatanew = ydatanew[1*self.sincresample:len(ydatanew)*self.sincresample]\n                else:\n                    xdatanew = xdatanew[1:len(xdatanew)]\n                    ydatanew = ydatanew[1:len(ydatanew)]\n                if self.dooversample[thechan]==1: # account for oversampling, take the middle-most section\n                    if self.sincresample>0:\n                        self.xydata[thechan][0]=xdatanew[self.sincresample+self.num_samples*self.sincresample/2:3*self.num_samples*self.sincresample/2:1] # for printing out or other analysis\n                        self.xydata[thechan][1]=ydatanew[self.sincresample+self.num_samples*self.sincresample/2:3*self.num_samples*self.sincresample/2:1]\n                    else:\n                        self.xydata[thechan][0]=xdatanew[1+self.num_samples/2:3*self.num_samples/2:1] # for printing out or other analysis\n                        self.xydata[thechan][1]=ydatanew[1+self.num_samples/2:3*self.num_samples/2:1]\n                elif self.dooversample[thechan]==9: # account for over-oversampling, take the middle-most section\n                     if self.sincresample>0:\n                         self.xydata[thechan][0]=xdatanew[self.sincresample+3*self.num_samples*self.sincresample/2:5*self.num_samples*self.sincresample/2:1] # for printing out or other analysis\n                         self.xydata[thechan][1]=ydatanew[self.sincresample+3*self.num_samples*self.sincresample/2:5*self.num_samples*self.sincresample/2:1]\n                     else:\n                        self.xydata[thechan][0]=xdatanew[1+3*self.num_samples/2:5*self.num_samples/2:1] # for printing out or other analysis\n                        self.xydata[thechan][1]=ydatanew[1+3*self.num_samples/2:5*self.num_samples/2:1]\n                else: # the full data is stored\n                    self.xydata[thechan][0]=xdatanew # for printing out or other analysis\n                    self.xydata[thechan][1]=ydatanew\n                if len(self.lines)>thechan and self.domaindrawing: # we may not be drawing, so check!\n                    self.lines[thechan].set_xdata(xdatanew)\n                    self.lines[thechan].set_ydata(ydatanew)\n                if self.domeasure:\n                    self.Vmean[thechan] = np.mean(ydatanew)\n                    self.Vrms[thechan] = np.sqrt(np.mean((ydatanew-self.Vmean[thechan])**2))\n                    gain=1\n                    if self.gain[thechan]==0: gain*=10\n                    if self.supergain[thechan]==0: gain*=100\n                    if gain>1:\n                        self.Vmean[thechan]/=gain\n                        self.Vrms[thechan]/=gain                    \n                    if self.fitline1>-1 and thechan==0: # optional risetime fit for channel 0\n    \t                def fit_rise(x,a,bottom,b,top): # a function for fitting to find risetime\n    \t                    val=bottom+(x-a)*(top-bottom)/(b-a)\n    \t                    inbottom=(x<=a)\n    \t                    val[inbottom]=bottom\n    \t                    intop=(x>=b)\n    \t                    val[intop]=top\n    \t                    return val\n    \t                try:\n    \t                    x2=xdatanew[(xdatanew>-.1) & (xdatanew<.1)] # only fit in range -.1 to .1 (us)\n    \t                    y2=ydatanew[(xdatanew>-.1) & (xdatanew<.1)]\n                            popt, pcov = scipy.optimize.curve_fit(fit_rise,x2,y2,bounds=([-.1,-4,-0.05,0],[0.05,0,.1,4])) #and note these bounds - top must be>0 and bottom<0 !\n                            self.lines[self.fitline1].set_xdata(x2)\n                            self.lines[self.fitline1].set_ydata( fit_rise(x2, *popt) )\n                            print \"risetime = \",1000*0.8*(popt[2]-popt[0]),\"ns\" # from 10-90% is 0.8 on the line - don't forget to correct for x2 or x4 oversampling!\n                        except:\n                            print \"fit exception!\"\n                if self.doxyplot and (thechan==self.xychan or thechan==(self.xychan+1)): self.drawxyplot(xdatanew,ydatanew,thechan)# the xy plot\n                if self.recorddata and thechan==self.recorddatachan: self.dopersistplot(xdatanew,ydatanew)# the persist shaded plot\n                \n                if thechan==self.refsinchan-1 and self.reffreq==0: self.oldchanphase=-1.; self.fittosin(xdatanew, ydatanew, thechan) # first fit the previous channel, for comparison\n                elif thechan==self.refsinchan and self.reffreq==0: self.reffreq = self.fittosin(xdatanew, ydatanew, thechan) # then fit for the ref freq and store the result\n                \n                if self.autocalibchannel>=0 and thechan==self.autocalibchannel: self.autocalibrate(thechan,ydatanew)\n    \n    def fittosin(self,xdatanew, ydatanew, chan):\n        res = self.fit_sin(xdatanew, ydatanew)\n        phase=res['phase']*180./np.pi\n        if res['amp']<0.: phase+=180.\n        print \"Chan:\",chan, \"cov=\",res['maxcov'], \"amp=\",abs(res['amp']), \"phase=\",phase, \"offset=\", res['offset'], res['freq']*1000000./self.xscaling,'kHz'\n        if res['maxcov']<1e-4:\n            if self.oldchanphase>=0.: \n                diff=phase-self.oldchanphase\n                if diff<0: diff+=360\n                print \"phase diff=\",diff\n            self.oldchanphase=phase\n            return res['freq']\n        else: print \"sin fit failed!\"; return 0;\n        \n    #For finding the frequency of a reference sin wave signal, for lockin calculations\n    def fit_sin(self,tt, yy):\n        '''Fit sin to the input time sequence, and return fitting parameters \"amp\", \"omega\", \"phase\", \"offset\", \"freq\", \"period\" and \"fitfunc\"'''\n        tt = np.array(tt)\n        yy = np.array(yy)\n        ff = np.fft.fftfreq(len(tt), (tt[1]-tt[0]))   # assume uniform spacing\n        Fyy = abs(np.fft.fft(yy))\n        guess_freq = abs(ff[np.argmax(Fyy[1:])+1])   # excluding the zero frequency \"peak\", which is related to offset\n        guess_amp = np.std(yy) * 2.**0.5\n        guess_offset = np.mean(yy)\n        guess = np.array([guess_amp, 2.*np.pi*guess_freq, 0., guess_offset])\n    \n        def sinfunc(t, A, w, p, c):  return A * np.sin(w*t + p) + c\n        popt, pcov = scipy.optimize.curve_fit(sinfunc, tt, yy, p0=guess)\n        A, w, p, c = popt\n        f = w/(2.*np.pi)\n        fitfunc = lambda t: A * np.sin(w*t + p) + c\n        return {\"amp\": A, \"omega\": w, \"phase\": p, \"offset\": c, \"freq\": f, \"period\": 1./f, \"fitfunc\": fitfunc, \"maxcov\": np.max(pcov), \"rawres\": (guess,popt,pcov)}\n    \n    def autocalibrate(self,thechan,ydatanew):\n        self.selectedchannel=thechan\n        avg = np.average(ydatanew)\n        #print avg\n        gotonext=False\n        tol = 1.0\n        tol2 = 0.25\n        if self.supergain[self.selectedchannel] or self.gain[self.selectedchannel]: # normal gain or low gain\n            tol = 0.3\n            tol2 = 0.02\n        if avg>0+tol:                        \n            self.adjustvertical(False,10)\n        elif avg<0-tol:\n            self.adjustvertical(True,10)\n        elif avg>0+tol2:\n            self.adjustvertical(False,1)\n        elif avg<0-tol2:\n            self.adjustvertical(True,1)\n        else: gotonext=True\n        if self.chanlevel[self.selectedchannel]==0: gotonext=True\n        if gotonext:\n            #go to the next channel, unless we're at the end of all channels\n            self.autocalibchannel=self.autocalibchannel+1\n            if self.autocalibchannel==num_chan_per_board*num_board:\n                self.autocalibgainac=self.autocalibgainac+1\n                if self.autocalibgainac==1:\n                    self.autocalibchannel=0\n                    for chan in range(num_chan_per_board*num_board):\n                        self.selectedchannel=chan\n                        self.setacdc()\n                elif self.autocalibgainac==2:\n                    self.autocalibchannel=0\n                    for chan in range(num_chan_per_board*num_board):\n                        self.selectedchannel=chan\n                        self.tellswitchgain(chan)\n                elif self.autocalibgainac==3:\n                    self.autocalibchannel=0\n                    for chan in range(num_chan_per_board*num_board):\n                        self.selectedchannel=chan\n                        self.setacdc()\n                else:\n                    self.autocalibchannel=-1 #all done\n                    self.autocalibgainac=0\n                    for chan in range(num_chan_per_board*num_board):\n                        self.selectedchannel=chan\n                        self.tellswitchgain(chan)\n                        if self.minfirmwareversion<15: self.togglesupergainchan(chan)\n                    print \"done with autocalibration \\a\" # beep!\n    \n    doxyplot=False\n    drawnxy=False\n    xychan=0\n    def drawxyplot(self,xdatanew,ydatanew,thechan):\n        if thechan==self.xychan: self.xydataforxaxis=ydatanew #the first channel will define the info on the x-axis\n        if thechan==(self.xychan+1):\n            if not self.drawnxy: # got to make the plot window the first time\n                self.figxy, self.axxy = plt.subplots(1,1)\n                self.figxy.canvas.mpl_connect('close_event', self.handle_xy_close)\n                self.drawnxy=True\n                self.figxy.set_size_inches(6, 6, forward=True)\n                self.xyplot, = self.axxy.plot(self.xydataforxaxis,ydatanew) #scatter\n                self.figxy.canvas.set_window_title('XY display of channels '+str(self.xychan)+' and '+str(self.xychan+1))\n                self.axxy.set_xlabel('Channel '+str(self.xychan)+' Volts')\n                self.axxy.set_ylabel('Channel '+str(self.xychan+1)+' Volts')\n                self.axxy.set_xlim(self.min_y, self.max_y)\n                self.axxy.set_ylim(self.min_y, self.max_y)\n                self.axxy.grid()\n            #redraw the plot\n            self.figxy.canvas.set_window_title('XY display of channels '+str(self.xychan)+' and '+str(self.xychan+1))\n            self.axxy.set_xlabel('Channel '+str(self.xychan)+' Volts')\n            self.axxy.set_ylabel('Channel '+str(self.xychan+1)+' Volts')\n            self.xyplot.set_data(self.xydataforxaxis, ydatanew)\n            self.figxy.canvas.draw()\n    \n    recorddata=False\n    recordindex=0 # for recording data, the last N events, for the shaded persist display window\n    recordedchannel=[]\n    drawn2d=False\n    def dopersistplot(self,xdatanew,ydatanew):\n        if len(self.recordedchannel)<self.recordedchannellength: self.recordedchannel.append(ydatanew)\n        else: self.recordedchannel[self.recordindex]=ydatanew\n        self.recordindex+=1\n        if self.recordindex>=self.recordedchannellength: self.recordindex=0;\n        if len(self.recordedchannel)==self.recordedchannellength:\n            if not self.drawn2d: # got to make the plot window the first time\n                self.fig2d, self.ax2d = plt.subplots(1,1)\n                self.fig2d.canvas.mpl_connect('close_event', self.handle_persist_close)\n                self.drawn2d=True\n            if self.recordindex==0:\n                self.ax2d.clear()\n                self.ax2d.hist2d(\n                    np.tile(xdatanew,self.recordedchannellength), np.concatenate(tuple(self.recordedchannel)), \n                    bins=[min(self.num_samples,1024),256], range=[[xdatanew[0],xdatanew[len(xdatanew)-1]],[self.min_y,self.max_y]],\n                    cmin=1, cmap='rainbow') #, Blues, Reds, coolwarm, seismic\n                self.fig2d.canvas.set_window_title('Persist display of channel '+str(self.recorddatachan))\n                self.ax2d.set_ylabel('Volts')\n                self.ax2d.grid()\n                self.setxaxis(self.ax2d,self.fig2d)\n    \n    def redraw(self):\n        if self.domaindrawing: # don't draw if we're going for speed!\n            if dofast:\n                self.ax.draw_artist(self.ax.patch)\n                if self.dogrid:\n                    [self.ax.draw_artist(gl) for gl in self.ax.xaxis.get_gridlines()]\n                    [self.ax.draw_artist(gl) for gl in self.ax.yaxis.get_gridlines()]\n                if self.needtoredrawtext: [self.ax.draw_artist(l) for l in self.texts]\n                self.needtoredrawtext=False\n                [self.ax.draw_artist(l) for l in self.lines]\n                [self.ax.draw_artist(l) for l in self.otherlines]\n                self.figure.canvas.update() #needs Qt4Agg backend\n            else:\n                self.ax.relim()\n                self.ax.autoscale_view()\n                self.figure.canvas.draw()\n        if len(plt.get_fignums())>0:\n            self.figure.canvas.flush_events()\n    \n    def handle_main_close(self,evt):\n        plt.close('all')\n    def handle_xy_close(self,evt):\n        self.drawnxy=False\n        self.doxyplot=False\n    def handle_persist_close(self,evt):\n        self.drawn2d=False\n        self.recorddata=False\n    def handle_fft_close(self,evt):\n        self.dofft=False\n        self.fftdrawn=False\n    def handle_lockin_close(self,evt):\n        self.dolockinplot=False\n        self.lockindrawn=False\n    \n    fftdrawn=False\n    def plot_fft(self,bn): # pass in the board number\n        channumonboard = self.fftchan%num_chan_per_board # this is what channel (0--3) we want to draw fft from for the board\n        chanonboardnum = num_board - self.fftchan/num_chan_per_board - 1 # this is what board (0 -- (num_board-1)) we want to draw that fft channel from\n        if bn==chanonboardnum and len(self.ydata)>channumonboard: # select the right board check that the channel data is really there\n            twoforoversampling=1\n            if self.dooversample[self.fftchan]==1: twoforoversampling=2\n            if self.dooversample[self.fftchan]==9: twoforoversampling=4\n            y = self.ydata[channumonboard] # channel signal to take fft of\n            n = len(y) # length of the signal\n            k = np.arange(n)\n            uspersample=(1.0/self.clkrate)*pow(2,max(self.downsample,0))/twoforoversampling # us per sample = 10 ns * 2^downsample, #downsample isn't less than 0 for xscaling\n            #t = np.arange(0,1,1.0/n) * (n*uspersample) # time vector in us\n            frq = (k/uspersample)[range(n/2)]/n # one side frequency range up to Nyquist\n            Y = np.fft.fft(y)[range(n/2)]/n # fft computing and normalization\n            Y[0]=0 # to suppress DC\n            if not self.fftdrawn: # just the first time, do some setup\n                self.fftdrawn=True\n                self.fftfig, self.fftax = plt.subplots(1,1)\n                self.fftfig.canvas.set_window_title('FFT of channel '+str(self.fftchan))\n                self.fftfig.canvas.mpl_connect('close_event', self.handle_fft_close)\n                self.fftfreqplot, = self.fftax.plot(frq,abs(Y)) # plotting the spectrum\n                self.fftax.set_xlabel('Freq (MHz)')\n                self.fftax.set_ylabel('|Y(freq)|')\n                self.fftax.set_xlim(0,frq[n/2-1])\n                self.oldmaxt = 0 # n*uspersample\n                self.oldmaxfreq = 0 # frq[n/2-1]\n                self.fftfig.tight_layout()\n                self.fftax.grid(True)\n            if self.fftdrawn: # redrawing\n                if np.max(frq)<.001:\n                    self.fftfreqplot.set_xdata(frq*1000000.0)\n                    self.fftax.set_xlabel('Freq (Hz)')\n                    if frq[n/2-1] != self.oldmaxfreq: self.fftax.set_xlim(0,1000000.0*frq[n/2-1])\n                elif np.max(frq)<1.0:\n                    self.fftfreqplot.set_xdata(frq*1000.0)\n                    self.fftax.set_xlabel('Freq (kHz)')\n                    if frq[n/2-1] != self.oldmaxfreq: self.fftax.set_xlim(0,1000.0*frq[n/2-1])\n                else:\n                    self.fftfreqplot.set_xdata(frq)\n                    self.fftax.set_xlabel('Freq (MHz)')\n                    if frq[n/2-1] != self.oldmaxfreq: self.fftax.set_xlim(0,frq[n/2-1])\n                self.fftfreqplot.set_ydata(abs(Y))\n                self.oldmaxfreq = frq[n/2-1]\n                self.oldmaxt = n*uspersample\n                self.fftax.relim()\n                self.fftax.autoscale_view()\n                self.fftfig.canvas.draw()\n                self.fftfig.canvas.set_window_title('FFT of channel '+str(self.fftchan))\n                self.fftfig.canvas.flush_events()\n    \n    lockindrawn=False\n    def plot_lockin(self):\n        trange=100\n        t=np.arange(trange)\n        if not self.lockindrawn: # just the first time, do some setup\n            self.lockiny1=np.zeros(trange)\n            self.lockiny2=np.zeros(trange)\n            if self.debuglockin: self.lockiny1o=np.zeros(trange) # offline float calculation\n            if self.debuglockin: self.lockiny2o=np.zeros(trange) # offline float calculation\n            self.lockindrawn=True\n            self.lockinfig, self.lockinax = plt.subplots(2,1)\n            self.lockinfig.canvas.set_window_title('Lockin of channel '+str(2)+\" wrt \"+str(3))\n            self.lockinfig.canvas.mpl_connect('close_event', self.handle_lockin_close)\n\n            self.lockinamplplot, = self.lockinax[0].plot(t,self.lockiny1) # plotting the amplitude\n            self.lockinax[0].set_xlabel(' ')\n            self.lockinax[0].set_ylabel('Amplitude')\n            self.lockinphaseplot, = self.lockinax[1].plot(t,self.lockiny2) # plotting the phase\n            self.lockinax[1].set_xlabel(' ')\n            self.lockinax[1].set_ylabel('Phase')\n            if self.debuglockin:\n                self.lockinamplploto, = self.lockinax[0].plot(t,self.lockiny1o)# offline float calculation\n                self.lockinphaseploto, = self.lockinax[1].plot(t,self.lockiny2o)# offline float calculation\n            self.lockinfig.tight_layout()\n        else: # redrawing\n            self.lockiny1=np.roll(self.lockiny1,-1)\n            self.lockiny2=np.roll(self.lockiny2,-1)\n            if hasattr(self,'lockinamp'):\n                self.lockiny1[trange-1]=self.lockinamp\n                self.lockiny2[trange-1]=self.lockinphase\n            if self.debuglockin:\n                self.lockiny1o=np.roll(self.lockiny1o,-1)\n                self.lockiny2o=np.roll(self.lockiny2o,-1)\n                self.lockiny1o[trange-1]=self.lockinampo\n                self.lockiny2o[trange-1]=self.lockinphaseo\n                self.lockinamplploto.set_ydata(self.lockiny1o)\n                self.lockinphaseploto.set_ydata(self.lockiny2o)\n            self.lockinamplplot.set_xdata(t)\n            self.lockinphaseplot.set_xdata(t)\n            self.lockinamplplot.set_ydata(self.lockiny1)\n            self.lockinphaseplot.set_ydata(self.lockiny2)\n            self.lockinax[0].relim()\n            self.lockinax[1].relim()\n            self.lockinax[0].autoscale_view()\n            self.lockinax[1].autoscale_view()\n            self.lockinfig.canvas.draw()\n            self.lockinfig.canvas.set_window_title('Lockin of channel '+str(2)+\" wrt \"+str(3))\n            self.lockinfig.canvas.flush_events()\n\n    def getotherdata(self,board):\n        debug3=False\n        self.ser.write(chr(132)) #delay counter\n        num_other_bytes = 1\n        rslt = self.ser.read(num_other_bytes)\n        if len(rslt)==num_other_bytes:\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            if debug3: print \"\\n delay counter data\",byte_array[0],\"from board\",board\n            self.tdcdata=byte_array[0]\n            #if debug3: print \"other data\",bin(byte_array[0])\n        else: print \"getotherdata asked for\",num_other_bytes,\"delay counter bytes and got\",len(rslt)\n        self.ser.write(chr(133)) #carry counter\n        num_other_bytes = 1\n        rslt = self.ser.read(num_other_bytes)\n        if len(rslt)==num_other_bytes:\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            if debug3: print \" carry counter data\",byte_array[0],\"from board\",board\n            #if debug3: print \"other data\",bin(byte_array[0])\n        else: print \"getotherdata asked for\",num_other_bytes,\"carry counter bytes and got\",len(rslt)\n    \n    def to_int(self,n): # takes a 32 bit decimal number in two's complement and converts to a binary and then to a signed integer\n        bin = '{0:32b}'.format(n)\n        x = int(bin, 2)\n        if bin[0] == '1': # \"sign bit\", big-endian\n            x -= 2**len(bin)\n        return x\n    \n    def lockinanalyzedata(self,board):\n        if self.lockinanalyzedataboard!=board: return False\n        y2 = self.ydata[2] # channel 2 signal\n        y3 = self.ydata[3] # channel 3 signal        \n        meany2=np.sum(y2)/self.num_samples\n        meany3=np.sum(y3)/self.num_samples\n        y2 = y2-meany2\n        y3 = y3-meany3\n        y3shifted = np.roll(y3,self.numtoshift)        \n        res1=y2*y3\n        res2=y2*y3shifted\n        r1m=np.sum(res1)\n        r2m=np.sum(res2)\n        #print r1m,r2m\n        r1m/=4096.\n        r2m/=4096.\n        ampl = np.sqrt(r1m*r1m+r2m*r2m)\n        phase = 180.*np.arctan2(r2m,r1m)/np.pi\n        if self.debuglockin:\n            print \"no window:  \",r1m.round(2), r2m.round(2), self.numtoshift, meany2.round(1),meany3.round(1)\n            print ampl.round(2), phase.round(2), \"<------ offline no window\"        \n        lowerwindowedge = self.numtoshift+1\n        upperwindowedge = self.num_samples-self.numtoshift        \n        if self.debuglockin:\n            self.ydata[0]= y3shifted+127 # to see on screen, alter self.ydata here\n            self.ydata[0][0:lowerwindowedge] = np.zeros((lowerwindowedge,), dtype=np.int)+127\n            self.ydata[0][upperwindowedge:self.num_samples] = np.zeros((self.num_samples-upperwindowedge,), dtype=np.int)+127        \n        y2window = y2[lowerwindowedge:upperwindowedge]\n        y3window = y3[lowerwindowedge:upperwindowedge]\n        y3shiftedwindow = y3shifted[lowerwindowedge:upperwindowedge]\n        res1window=y2window*y3window\n        res2window=y2window*y3shiftedwindow\n        r1mwindow=np.sum(res1window)\n        r2mwindow=np.sum(res2window)\n        if self.debuglockin: print \"window:\",r1mwindow,r2mwindow\n        r1mwindow/=4096.\n        r2mwindow/=4096.\n        amplwindow = np.sqrt(r1mwindow*r1mwindow+r2mwindow*r2mwindow)\n        phasewindow = 180.*np.arctan2(r2mwindow,r1mwindow)/np.pi\n        if self.debuglockin:\n            print \"with window:\",r1mwindow.round(2), r2mwindow.round(2), self.numtoshift, meany2.round(1),meany3.round(1)\n            print amplwindow.round(2), phasewindow.round(2), \"<------ offline with window\"        \n        meany2float=np.mean(self.ydata[2])\n        meany3float=np.mean(self.ydata[3])\n        y3shiftedfloat = np.roll(self.ydata[3]-meany3float,self.numtoshift)        \n        y2windowfloat = self.ydata[2][lowerwindowedge:upperwindowedge]-meany2float\n        y3windowfloat = self.ydata[3][lowerwindowedge:upperwindowedge]-meany3float\n        y3shiftedwindowfloat = y3shiftedfloat[lowerwindowedge:upperwindowedge]\n        res1windowfloat=y2windowfloat*y3windowfloat\n        res2windowfloat=y2windowfloat*y3shiftedwindowfloat\n        r1mwindowfloat=np.sum(res1windowfloat)\n        r2mwindowfloat=np.sum(res2windowfloat)\n        #print \"windowfloat:\",r1mwindowfloat,r2mwindowfloat\n        r1mwindowfloat/=4096.\n        r2mwindowfloat/=4096.\n        amplwindowfloat = np.sqrt(r1mwindowfloat*r1mwindowfloat+r2mwindowfloat*r2mwindowfloat)\n        phasewindowfloat = 180.*np.arctan2(r2mwindowfloat,r1mwindowfloat)/np.pi\n        if self.debuglockin:\n            print \"float with window:\",r1mwindowfloat.round(2), r2mwindowfloat.round(2), self.numtoshift, meany2.round(1),meany3.round(1)\n            print amplwindowfloat.round(2), phasewindowfloat.round(2), \"<------ offline with window float\\n\"\n        self.lockinampo = amplwindowfloat\n        self.lockinphaseo = phasewindowfloat\n    \n    def getlockindata(self,board):\n            rslt = self.ser.read(16)\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            if len(rslt)==16:\n                r1_fpga = (256*256*256*byte_array[3]+256*256*byte_array[2]+256*byte_array[1]+byte_array[0])\n                r2_fpga =  (256*256*256*byte_array[7]+256*256*byte_array[6]+256*byte_array[5]+byte_array[4])\n                r1_fpga = self.to_int(r1_fpga)\n                r2_fpga = self.to_int(r2_fpga)\n                mean_c2 = (256*256*256*byte_array[11]+256*256*byte_array[10]+256*byte_array[9]+byte_array[8])\n                mean_c3 = (256*256*256*byte_array[15]+256*256*byte_array[14]+256*byte_array[13]+byte_array[12])\n                if self.debuglockin:\n                    print byte_array[0:4], r1_fpga\n                    print byte_array[4:8], r2_fpga\n                    print byte_array[8:12], mean_c2\n                    print byte_array[12:16], mean_c3\n                r1_fpga/=4096.\n                r2_fpga/=4096.\n                ampl_fpga = np.sqrt(r1_fpga*r1_fpga+r2_fpga*r2_fpga)\n                phase_fpga = 180.*np.arctan2(r2_fpga,r1_fpga)/np.pi\n                if self.lockinanalyzedataboard==board:\n                    self.lockinamp = ampl_fpga\n                    self.lockinphase = phase_fpga\n                if False:\n                    print ampl_fpga.round(2), phase_fpga.round(2), \"<------ fpga \"\n            else: print \"getdata asked for\",16,\"lockin bytes and got\",len(rslt),\"from board\",board        \n    \n    usbsermap=[]\n    def makeusbsermap(self): # figure out which board is connected to which USB 2 connection\n        self.usbsermap=np.zeros(num_board, dtype=int)\n        if len(self.usbser)<num_board:\n            print \"Not a USB2 connection for each board!\"\n            return False\n        if len(self.usbser)>1:\n            for usb in np.arange(num_board): self.usbser[usb].timeout=.5 # lower the timeout on the connections, temporarily\n            foundusbs=[]\n            for bn in np.arange(num_board):\n                self.ser.write(chr(100)) # prime the trigger\n                self.ser.write(chr(10+bn))\n                for usb in np.arange(len(self.usbser)):\n                    if not usb in foundusbs: # it's not already known that this usb connection is assigned to a board\n                        rslt = self.usbser[usb].read(self.num_bytes) # try to get data from the board\n                        if len(rslt)==self.num_bytes:\n                            #print \"   got the right nbytes for board\",bn,\"from usb\",usb\n                            self.usbsermap[bn]=usb\n                            foundusbs.append(usb) # remember that we already have figured out which board this usb connection is for, so we don't bother trying again for another board\n                            break # already found which board this usb connection is used for, so bail out\n                        #else: print \"   got the wrong nbytes for board\",bn,\"from usb\",usb\n                    #else: print \"   already know what usb\",usb,\"is for\"\n            for usb in np.arange(num_board): self.usbser[usb].timeout=self.sertimeout # put back the timeout on the connections\n        print \"usbsermap is\",self.usbsermap\n        return True\n    \n    timedout = False\n    def getdata(self,board):\n        self.ser.write(chr(10+board))\n        if self.db: print time.time()-self.oldtime,\"asked for data from board\",board   \n        if self.dolockin: self.getlockindata(board)\n        if self.dousb:\n            #try:\n\t\trslt = self.usbser[self.usbsermap[board]].read(self.num_bytes)\n            \t#usbser.flushInput() #just in case\n\t    #except serial.SerialException: pass\n        else:\n            rslt = self.ser.read(self.num_bytes)\n            #ser.flushInput() #just in case\n        if self.db: print time.time()-self.oldtime,\"getdata wanted\",self.num_bytes,\"bytes and got\",len(rslt),\"from board\",board\n        byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n        if len(rslt)==self.num_bytes:\n            self.timedout = False\n            db2=False #True\n            if db2: print byte_array[1:11]\n            self.ydata=np.reshape(byte_array,(num_chan_per_board,self.num_samples))\n            if self.dooversample[num_chan_per_board*(num_board-board-1)]: self.oversample(0,2)\n            if self.dooversample[num_chan_per_board*(num_board-board-1)+1]: self.oversample(1,3)\n            if self.dooversample[num_chan_per_board*(num_board-board-1)]==9: self.overoversample(0,1)\n            if self.average:\n                for c in np.arange(num_chan_per_board):\n                    for i in np.arange(self.num_samples/2):\n                        val=(self.ydata[c][2*i]+self.ydata[c][2*i+1])/2\n                        self.ydata[c][2*i]=val; self.ydata[c][2*i+1]=val;            \n        else:\n            self.timedout = True\n            if not self.db and self.rollingtrigger: print \"getdata asked for\",self.num_bytes,\"bytes and got\",len(rslt),\"from board\",board\n            if len(rslt)>0 and self.rollingtrigger: print byte_array[0:10]\n        if self.dologicanalyzer:\n            #get extra logic analyzer data, if needed\n            logicbytes=self.num_bytes/4\n            if self.dousb:\n                #try:\n\t\t    rslt = self.usbser[self.usbsermap[board]].read(logicbytes)\n                \t#usbser.flushInput() #just in case\n\t        #except serial.SerialException: pass\n            else:\n                rslt = self.ser.read(logicbytes)\n                #ser.flushInput() #just in case\n            if self.db: print time.time()-self.oldtime,\"getdata wanted\",logicbytes,\"logic bytes and got\",len(rslt),\"from board\",board\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            if len(rslt)==logicbytes:\n                db2=False #True\n                if db2: print byte_array[1:11]\n                self.ydatalogic=np.reshape(byte_array,(1,self.num_samples))\n            else:\n                if not self.db and self.rollingtrigger: print \"getdata asked for\",self.num_bytes,\"logic bytes and got\",len(rslt),\"from board\",board\n                if len(rslt)>0 and self.rollingtrigger: print byte_array[0:10]\n    \n    def oversample(self,c1,c2):\n        tempc1=self.ydata[c1]\n        tempc2=self.ydata[c2]\n        adjustmeanandrms=True\n        if adjustmeanandrms:\n            mean_c1 = np.mean(tempc1)\n            rms_c1 = np.sqrt(np.mean((tempc1-mean_c1)**2))\n            mean_c2 = np.mean(tempc2)\n            rms_c2 = np.sqrt(np.mean((tempc2-mean_c2)**2))\n            meanmean=(mean_c1+mean_c2)/2.\n            meanrms=(rms_c1+rms_c2)/2.\n            tempc1=meanrms*(tempc1-mean_c1)/rms_c1 + meanmean\n            tempc2=meanrms*(tempc2-mean_c2)/rms_c2 + meanmean\n            #print mean_c1, mean_c2, rms_c1, rms_c2\n        ns=self.num_samples\n        mergedsamps=np.empty(ns*2)\n        mergedsamps[0:ns*2:2]=tempc1 # a little tricky which is 0 and which is 1 (i.e. which is sampled first!)\n        mergedsamps[1:ns*2:2]=tempc2\n        self.ydata[c1]=mergedsamps[0:ns]\n        self.ydata[c2]=mergedsamps[ns:ns*2]\n    \n    def overoversample(self,c1,c2):\n        tempc1=np.concatenate([self.ydata[c1],self.ydata[c1+2]])\n        tempc2=np.concatenate([self.ydata[c2],self.ydata[c2+2]])\n        adjustmeanandrms=True\n        if adjustmeanandrms:\n            mean_c1 = np.mean(tempc1)\n            rms_c1 = np.sqrt(np.mean((tempc1-mean_c1)**2))\n            mean_c2 = np.mean(tempc2)\n            rms_c2 = np.sqrt(np.mean((tempc2-mean_c2)**2))\n            meanmean=(mean_c1+mean_c2)/2.\n            meanrms=(rms_c1+rms_c2)/2.\n            tempc1=meanrms*(tempc1-mean_c1)/rms_c1 + meanmean\n            tempc2=meanrms*(tempc2-mean_c2)/rms_c2 + meanmean\n            #print mean_c1, mean_c2, rms_c1, rms_c2\n        ns=2*self.num_samples\n        mergedsamps=np.empty(ns*2)\n        mergedsamps[0:ns*2:2]=tempc1 # a little tricky which is 0 and which is 1 (i.e. which is sampled first!)\n        mergedsamps[1:ns*2:2]=tempc2\n        self.ydata[c1]=mergedsamps[0:ns/2]\n        self.ydata[c2]=mergedsamps[ns/2:ns]\n        self.ydata[c1+2]=mergedsamps[ns:3*ns/2]\n        self.ydata[c2+2]=mergedsamps[3*ns/2:ns*2]\n    \n    def getmax10adc(self,bn):\n        chansthisboard = [(x,y) for (x,y) in max10adcchans if x==bn]\n        if self.db: print time.time()-self.oldtime,\"getting\",chansthisboard\n        for chans in chansthisboard:\n            chan=chans[1]\n            #chan: 110=ain1, 111=pin6, ..., 118=pin14, 119=temp\n            self.ser.write(chr(chan))\n            if self.db: print time.time()-self.oldtime,\"getting max10adc chan\",chan,\"for bn\",bn\n            rslt = self.ser.read(self.nsamp*2) #read N bytes (2 per sample)\n            if self.db: print time.time()-self.oldtime,\"getmax10adc got bytes:\",len(rslt)\n            if len(rslt)!=(self.nsamp*2): \n                print time.time()-self.oldtime,\"getmax10adc got bytes:\",len(rslt),\"for board\",bn,\"and chan\",chan\n                return\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            db2=False #True #False\n            self.ysampdata[self.max10adcchan-1]=np.add(np.multiply(256,byte_array[1:2*self.nsamp:2]),byte_array[0:2*self.nsamp:2])\n            self.ysampdata[self.max10adcchan-1]/=16\n            if db2:\n                for samp in np.arange(10):\n                    code=256*byte_array[1+2*samp]+byte_array[2*samp]\n                    self.ysampdata[self.max10adcchan-1][samp]=code/16\n                    if chan==119:\n                        temp=-3.056e-4*code*code+1.763*code-2325.049\n                        print samp,chan,code,round(temp,1),\"C\",round(temp*1.8+32,1),\"F\"\n                    else: print samp,chan,code,round( (3.3*code)/pow(2,12) ,4),\"V\"\n            self.on_running(self.ysampdata[self.max10adcchan-1], -self.max10adcchan)\n            self.max10adcchan+=1\n\n    oldtime=time.time()\n    oldtime2=time.time()\n    def getchannels(self):\n        if not self.autorearm:\n            if self.db: print time.time()-self.oldtime,\"priming trigger\"\n            self.ser.write(chr(100))\n        self.max10adcchan=1\n        for bn in np.arange(num_board):\n            if self.db: print time.time()-self.oldtime,\"getting board\",bn\n            self.getdata(bn) #this sets all boards before this board into serial passthrough mode, so this and following calls for data will go to this board and then travel back over serial\n            self.getmax10adc(bn) # get data from 1 MHz Max10 ADC channels\n            if self.dogetotherdata: self.getotherdata(bn) # get other data, like TDC info, or other bytes\n            if self.dofft: self.plot_fft(bn) #do the FFT plot\n            if self.dolockin and self.debuglockin: \n                if sendincrement==0: self.lockinanalyzedata(bn)\n                else: print \"you need to set sendincrement = 0 first before debugging lockin info\"; return False\n            if self.dolockin and self.dolockinplot: self.plot_lockin()\n            self.on_running(self.ydata, bn) #update data in main window\n            if self.db: print time.time()-self.oldtime,\"done with board\",bn\n        if self.domaindrawing and self.domeasure:\n            thetime=time.time()\n            elapsedtime=thetime-self.oldtime\n            if elapsedtime>1.0:\n                self.drawtext() #redraws the measurements\n                self.oldtime=thetime\n        if self.minfirmwareversion>=15: #v9.0 and up\n            thetime2=time.time()\n            elapsedtime=thetime2-self.oldtime2\n            if elapsedtime>1.0:\n                if not self.havereadswitchdata: self.switchpos = [0] * num_board\n                for b in range(num_board): self.getswitchdata(b) #gets the dpdt switch positions\n                self.havereadswitchdata=True\n                self.oldtime2=thetime2\n        return True\n\n    #get the positions of the dpdt switches from IO expander 2B, and then take action (v9.0 and up!)\n    havereadswitchdata=False\n    def getswitchdata(self,board):\n        #for i in range(2): #twice because the first time just reads it into the board's fpga\n            self.ser.write(chr(30+board)) #make the next board active (serial_passthrough 0)\n            self.ser.write(chr(146)) #request the IO expander data - takes about 2ms to send the command and read the i2c data\n            self.ser.write(chr(33)); self.ser.write(chr(19)) # from 2B\n            self.ser.write(chr(board)) # for board number...\n            rslt = self.ser.read(1)\n            if len(rslt)>0:# and i==1:\n                byte_array = unpack('%dB'%len(rslt),rslt)\n                #print \"i2c data from board\",board,\"IO 2B\",byte_array[0]\n                newswitchpos=byte_array[0]\n                if newswitchpos!=self.switchpos[board] or not self.havereadswitchdata:\n                    for b in range(8):\n                        if self.testBit(newswitchpos,b) != self.testBit(self.switchpos[board],b) or not self.havereadswitchdata:\n                            #print \"switch\",b,\"is now\",self.testBit(newswitchpos,b)\n                            #switch 0-3 is 50/1M Ohm termination on channels 0-3, on is 1M, off is 50\n                            #switch 4-7 is super/normal gain on channels 0-3, on is super, off is normal\n                            if b>=4:\n                                thechan=b-4+(num_board-board-1)*num_chan_per_board\n                                if self.supergain[thechan] and self.testBit(newswitchpos,b)>0:\n                                    self.togglesupergainchan(thechan)\n                                if not self.supergain[thechan] and not self.testBit(newswitchpos,b)>0:\n                                    self.togglesupergainchan(thechan)\n                    self.switchpos[board] = newswitchpos\n    \n    #initialization\n    def init(self):\n            self.ser.write(chr(0))#tell them their IDs... first one gets 0, next gets 1, ...\n            self.ser.write(chr(20+(num_board-1)))#tell them which is the last board\n            for b in range(num_board):\n                firmwareversion = self.getfirmwareversion(b)\n                if firmwareversion<self.minfirmwareversion: self.minfirmwareversion=firmwareversion\n            print \"minimum firmwareversion of all boards is\",self.minfirmwareversion\n            self.maxdownsample=15 # slowest I can run\n            if self.minfirmwareversion>=5: #updated firmware\n                self.maxdownsample=15 +(12-ram_width) # slowest I can run (can add 12-ram_width when using newer firmware)\n            self.yscale = 7.5 # Vpp for full scale\n            if self.minfirmwareversion>=15: #v9.0 boards\n                self.yscale*=1.1 # if we used 10M / 1.1M / 11k input resistors\n            self.min_y = -self.yscale/2. #-4.0 #0 ADC\n            self.max_y = self.yscale/2. #4.0 #256 ADC\n            self.tellrolltrig(self.rolltrigger)\n            self.tellsamplesmax10adc()\n            self.tellsamplessend()\n            self.tellbytesskip()\n            self.telldownsample(self.downsample)\n            self.togglehighres()\n            self.settriggertime(self.triggertimethresh)\n            self.tellserialdelaytimerwait()\n            self.tellSPIsetup(0) #0.9V CM but not connected\n            self.tellSPIsetup(11) #offset binary output\n            self.tellSPIsetup(22) #20:50 #22:150 #24:300 Ohm termination ChA\n            self.tellSPIsetup(23) #21:50 #23:150 #25:300 Ohm termination ChB\n            #self.tellSPIsetup(30) # multiplexed output\n            self.tellSPIsetup(32) # non-multiplexed output (less noise)\n            self.setupi2c() # sets all ports to be outputs\n            self.toggledousb() # switch to USB2 connection for readout of events, if available\n            if self.dousb:\n                if not self.makeusbsermap(): return False # figure out which usb connection has which board's data\n            self.getIDs() # get the unique ID of each board, for calibration etc.\n            self.readcalib() # get the calibrated DAC values for each board; if it fails then use defaults\n            self.domeasure=self.domaindrawing #by default we will calculate measurements if we are drawing\n            return True\n    \n    #cleanup\n    def cleanup(self):\n        try:\n            self.setbacktoserialreadout()\n            self.resetchans()\n            if self.autorearm: self.toggleautorearm()\n            if self.dohighres: self.togglehighres()\n            if self.useexttrig: self.toggleuseexttrig()\n            if self.dologicanalyzer: self.togglelogicanalyzer()\n            if self.serport!=\"\" and hasattr(self,'ser'):\n                self.shutdownadcs()\n                for p in self.usbser: p.close()\n                self.ser.close()\n        except SerialException:\n            print \"failed to talk to board when cleaning up!\"\n        plt.close()\n        print \"bye bye!\"\n    \n    #For setting up serial and USB connections\n    def setup_connections(self):\n        adjustedbrate=1./(1./self.brate+2.*self.serialdelaytimerwait*1.e-6/(32.*11.)) # delay of 2*serialdelaytimerwait microseconds every 32*11 bits\n        serialrate=adjustedbrate/11./(self.num_bytes*num_board+len(max10adcchans)*self.nsamp) #including start+2stop bits\n        print \"rate theoretically\",round(serialrate,2),\"Hz over serial\"\n        ports = list(serial.tools.list_ports.comports()); ports.sort(reverse=True)\n        autofindusbports = len(self.usbport)==0\n        if self.serport==\"\" or True:\n            for port_no, description, address in ports: print port_no,\":\",description,\":\",address\n        for port_no, description, address in ports:\n            if self.serport==\"\":\n                if '1A86:7523' in address or '1a86:7523' in address: self.serport = port_no\n            if autofindusbports:\n                if \"USB Serial\" in description or \"Haasoscope\" in description: self.usbport.append(port_no)\n        if self.serport!=\"\":\n            try:\n                self.ser = Serial(self.serport,self.brate,timeout=self.sertimeout,stopbits=2)\n            except SerialException:\n                print \"Could not open\",self.serport,\"!\"; return False\n            print \"connected serial to\",self.serport,\", timeout\",self.sertimeout,\"seconds\"\n        else: self.ser=\"\"\n        for p in self.usbport:\n            self.usbser.append(Serial(p,timeout=self.sertimeout))\n            print \"connected USBserial to\",p,\", timeout\",self.sertimeout,\"seconds\"\n        if self.serport==\"\": print \"No serial COM port opened!\"; return False\n        return True\n    \n\n"
  },
  {
    "path": "software/libs/HaasoscopeLibQt.py",
    "content": "# -*- coding: utf-8 -*-\nimport sys\nimport traceback\n#print(\"Loading HaasoscopeLibQt.py\")\n\n# You might adjust these, just override them before instantianting a class\nnum_board = 1 # Number of Haasoscope boards to read out\nmax_ram_width = 13 # max size of the buffer rams (2*13=8096 bytes)\nram_width = 9 # width in bits of sample ram to use (e.g. 9==512 samples)\nmax10adcchans = []#[(0,110),(0,118),(1,110),(1,118)] #max10adc channels to draw (board, channel on board), channels: 110=ain1, 111=pin6, ..., 118=pin14, 119=temp\nmax_slowadc_ram_width = 11 # max size of the slow adc ram (2*11=2048 bytes)\nslowadc_ram_width = 4 # width in bits of slow adc sample ram to use (e.g. 4==16 samples)\nsendincrement=0 # 0 would skip 2**0=1 byte each time, i.e. send all bytes\nnum_chan_per_board = 4 # number of high-speed ADC channels on a Haasoscope board\n\nfrom serial import Serial, SerialException\nfrom struct import unpack\nimport numpy as np\nimport time, json, os\n\nfrom scipy.signal import resample\nimport serial.tools.list_ports\nimport scipy.optimize\nimport multiprocessing\n\nmearm = False\nmewin = False\ntry:\n    #print(os.uname())\n    if os.uname()[4].startswith(\"arm\") or os.uname()[4].startswith(\"aarch\"):\n        print(\"On a raspberry pi?\")\n        mearm = True\nexcept AttributeError:\n    mewin = True\n    #print(\"Not on Linux?\")\n\nenable_ripyl=False # set to True to use ripyl serial decoding... have to get it from https://github.com/kevinpt/ripyl and then install it first!\nif enable_ripyl:\n    import ripyl.util.plot as rplot\n    from collections import OrderedDict\n    import ripyl.streaming as stream\n    import ripyl.protocol.uart as uart\n\nenable_fastusb=True # set to True to be able to use the fastusb2 writing\nif enable_fastusb:\n    try:\n        if mewin:\n            useftd2xx = True\n            print(\"Using ftd2xx driver on Windows\")\n        else:\n            useftd2xx = False\n            print(\"Using pyftdi on Linux\")\n        useftdi = not useftd2xx\n        if useftd2xx:\n            import ftd2xx as ftd\n            from ftd2xx.ftd2xx import DeviceError\n        if useftdi:\n            from pyftdi.ftdi import Ftdi\n            ftdiattempts=300 # number of times to try reading - basically a timeout\n    except:\n        print(\"Warning... fastusb drivers not installed?\")\n        enable_fastusb=False\n\nclass Haasoscope():\n    \n    def __init__(self):\n        self.num_samples = int(pow(2,ram_width)/pow(2,sendincrement)) # num samples per channel, max is pow(2,ram_width)/pow(2,0)=4096\n        self.num_bytes = int(self.num_samples*num_chan_per_board) #num bytes per board\n        self.nsamp=int(pow(2,min(ram_width,slowadc_ram_width))-1) #samples for each max10 adc channel (4095 max (not sure why it's 1 less...))\n        print(\"num main ADC and max10adc bytes for all boards = \",self.num_bytes*num_board,\"and\",len(max10adcchans)*2*self.nsamp)\n        self.serialdelaytimerwait=100 #150 # 600 # delay (in 2 us steps) between each 32 bytes of serial output (set to 600 for some slow USB serial setups, but 0 normally)\n        if mearm: self.serialdelaytimerwait+=600\n        self.brate = 1500000 #serial baud rate #1500000 #115200 #921600\n        self.sertimeout = 0.25+self.num_bytes*8*11.0/self.brate #time to wait for serial response #3.0, 0.25+self.num_bytes*8*11.0/self.brate, or None\n        self.clkrate=125.0 # ADC sample rate in MHz\n        self.serport=\"\" # the name of the serial port on your computer, connected to Haasoscope, like /dev/ttyUSB0 or COM8, leave blank to detect automatically!\n        self.trigserport=''\n        self.usbport=[] # the names of the USB2 ports on your computer, connected to Haasoscope, leave blank to detect automatically!\n        self.usbser=[]\n        self.usbsern=[]\n        self.texts = []\n        self.xdata=np.arange(self.num_samples)\n        self.xdata2=np.arange(self.num_samples*2) # for oversampling\n        self.xdata4=np.arange(self.num_samples*4) # for over-oversampling\n        self.ydata = []\n        ysampdatat=np.zeros(self.nsamp*len(max10adcchans)); self.ysampdata=np.reshape(ysampdatat,(len(max10adcchans),self.nsamp))\n        self.xsampdata=np.arange(self.nsamp)\n        self.paused=True\n        self.getone=False\n        self.rolltrigger=True #roll the trigger\n        self.average=False #will average every 2 samples\n        self.fallingedge=True #trigger on falling edge\n        self.dogrid=True #redraw the grid\n        self.chanforscreen=0 #channel to draw on the mini-display\n        self.triggertimethresh=1 #samples for which the trigger must be over/under threshold\n        self.downsample=2 #adc speed reduction, log 2... so 0 (none), 1(factor 2), 2(factor 4), etc.\n        self.dofft=False #drawing the FFT plot\n        self.dousb=False #whether to use USB2 output\n        self.dofastusb=False #whether to do sync 245 fifo mode on usb2 (need to reprogram ft232h hat) (experimental)\n        self.fastusbpadding=4 #number of bytes added total (start and end) to each channel in fastusb mode\n        self.fastusbendpadding=2 #number of bytes added to the end of each channel in fastusb mode\n        self.dousbparallel=False #whether to tell all board to read out over USB2 in parallel (experimental)\n        self.checkfastusbwriting=False #whether to cross-check the writing of fastusb data\n        self.sincresample=0 # amount of resampling to do (sinx/x)\n        self.dogetotherdata=False # whether to read other calculated data like TDC\n        self.tdcdata=0 # TDC data\n        self.selectedchannel=0 #what channel some actions apply to\n        self.selectedmax10channel=0 #what max10 channel is selected\n        self.autorearm=False #whether to automatically rearm the trigger after each event, or wait for a signal from software\n        self.dohighres=False #whether to do averaging during downsampling or not (turned on by default during startup, and off again during shutdown)\n        self.useexttrig=False #whether to use the external trigger input\n        self.autocalibchannel=-1 #which channel we are auto-calibrating\n        self.autocalibgainac=0 #which stage of gain and acdc we are auto-calibrating\n        self.recordedchannellength=25 #number of events to overlay in the 2d persist plot\n        self.ydatarefchan=-1 #the reference channel for each board, whose ydata will be subtracted from other channels' ydata on the board\n        self.chtext = \"Ch.\" #the text in the legend for each channel\n        self.noselftrig=False\n        self.num_logic_inputs=5 #number of active logic analyzer bits on each board\n        self.flyingfast = False # to just read as fast as possible\n        self.domt=False #whether to have separate threads per board\n        self.dotriggercounter = 2 # how ofter to update trigger counter (in seconds) (set to 0 to turn off)\n        self.doswitchdata = True # whether to read the switch data\n        self.db = False #debugging #True #False\n    \n        self.dolockin=False # read lockin info\n        self.dolockinplot=True # plot the lockin info\n        self.lockinanalyzedataboard=0 # the board to analyze lockin info from\n        self.debuglockin=False #debugging of lockin calculations #True #False\n        self.reffreq = 0.008 #MHz of reference signal on chan 3 for lockin calculations\n        self.refsinchan = 3 #the channel number of the ref input signal (for auto reffreq calculation via sin fit)\n\n        self.xscaling=1.e0 # for the x-axis scale\n        self.lowdaclevel=np.ones(num_board*num_chan_per_board)*2050 # these hold the user set levels for each gain combination\n        self.highdaclevel=np.ones(num_board*num_chan_per_board)*2800\n        self.lowdaclevelsuper=np.ones(num_board*num_chan_per_board)*120\n        self.highdaclevelsuper=np.ones(num_board*num_chan_per_board)*50\n        self.lowdaclevelac=np.ones(num_board*num_chan_per_board)*2250 # these hold the user set levels for each gain combination in ac coupling mode\n        self.highdaclevelac=np.ones(num_board*num_chan_per_board)*4600\n        self.lowdaclevelsuperac=np.ones(num_board*num_chan_per_board)*2300\n        self.highdaclevelsuperac=np.ones(num_board*num_chan_per_board)*4600\n        self.chanlevel=np.ones(num_board*num_chan_per_board)*self.lowdaclevel # the current level for each channel, initially set to lowdaclevel (x1)\n        self.gain=np.ones(num_board*num_chan_per_board, dtype=int) # 1 is low gain, 0 is high gain (x10)\n        self.supergain=np.ones(num_board*num_chan_per_board, dtype=int) # 1 is normal gain, 0 is super gain (x100)\n        self.acdc=np.ones(num_board*num_chan_per_board, dtype=int) # 1 is dc, 0 is ac\n        self.trigsactive=np.ones(num_board*num_chan_per_board, dtype=int) # 1 is triggering on that channel, 0 is not triggering on it\n        self.dooversample=np.zeros(num_board*num_chan_per_board, dtype=int) # 1 is oversampling, 0 is no oversampling, 9 is over-oversampling\n        self.rollingtrigger=True #rolling auto trigger at 5 Hz \n        self.dologicanalyzer=False #whether to send logic analyzer data\n        self.fitline1=-1 # set to >-1 to draw a risetime fit\n        self.logicline1=-1 # to remember which is the first logic analyzer line\n        self.domeasure=True # whether to calculate measurements\n        self.dodrawing=True # assume we're drawing\n        self.Vrms=np.zeros(num_board*num_chan_per_board, dtype=float) # the Vrms for each channel\n        self.Vmean=np.zeros(num_board*num_chan_per_board, dtype=float) # the Vmean for each channel\n        \n        #These hold the state of the IO expanders\n        self.a20= int('f0',16) # oversamp (set bits 0,1 to 0 to send 0->2 and 1->3) / gain (set second char to 0 for low gain)\n        self.b20= int('0f',16)  # shdn (set first char to 0 to turn on) / ac coupling (set second char to f for DC, 0 for AC)\n        self.a21= int('00',16) # leds (on is 1)\n        self.b21= int('00',16)# free pins\n        \n        print(\"Construction done\")\n    \n    def tellrolltrig(self,rt):\n        #tell them to roll the trigger (a self-trigger each ~second), or not\n        if rt: self.ser.write(bytearray([101])); self.rollingtrigger=True; #print(\"rolling trigger\")\n        else:  self.ser.write(bytearray([102])); self.rollingtrigger=False; #print(\"not rolling trigger\")\n\n    def tellsamplesmax10adc(self):\n        #tell it the number of samples to use for the 1MHz internal Max10 ADC\n        self.ser.write(bytearray([120]))\n        myb=bytearray.fromhex('{:04x}'.format(self.nsamp))\n        self.ser.write(bytearray([myb[0]]))\n        self.ser.write(bytearray([myb[1]]))\n        if self.db: print(\"Nsamp for max10 ADC is\",256*myb[0]+1*myb[1])\n    \n    def settriggerpoint(self,tp):\n        #tell it the trigger point\n        self.ser.write(bytearray([121]))\n        myb=bytearray.fromhex('{:04x}'.format(tp))\n        self.ser.write(bytearray([myb[0]]))\n        self.ser.write(bytearray([myb[1]]))\n        #print \"Trigger point is\",256*myb[0]+1*myb[1]\n\n    def tellsamplessend(self):\n        #tell it the number of samples to send\n        self.ser.write(bytearray([122]))\n        myb=bytearray.fromhex('{:04x}'.format(int(self.num_samples*pow(2,sendincrement)))) # or 0 for all, or num_samples*pow(2,sendincrement)\n        self.ser.write(bytearray([myb[0]]))\n        self.ser.write(bytearray([myb[1]]))\n        print(\"num samples is\",256*myb[0]+1*myb[1])\n    \n    def telllockinnumtoshift(self,numtoshift):\n        #tell it the number of samples to shift when calculating 90deg outofphase sum for lockin\n        self.ser.write(bytearray([138]))\n        myb=bytearray.fromhex('{:04x}'.format(numtoshift))\n        self.ser.write(bytearray([myb[0]]))\n        self.ser.write(bytearray([myb[1]]))\n        if self.db: print(\"lockinnumtoshift is\",256*myb[0]+1*myb[1])\n        \n    def tellserialdelaytimerwait(self):\n        #tell it the number of microseconds to wait between every 32 (64?) bytes of serial output (for some slow USB serial setups)\n        self.ser.write(bytearray([135]))\n        myb=bytearray.fromhex('{:04x}'.format(self.serialdelaytimerwait))\n        self.ser.write(bytearray([myb[0]]))\n        self.ser.write(bytearray([myb[1]]))\n        print(\"serialdelaytimerwait is\",256*myb[0]+1*myb[1])\n    \n    def tellbytesskip(self):\n        #tell it the number of bytes to skip after each send, log2\n        self.ser.write(bytearray([123]))\n        self.ser.write(bytearray([sendincrement]))\n        print(\"send increment is\",sendincrement)\n    \n    def togglelogicanalyzer(self):\n        #tell it start/stop doing logic analyzer\n        self.dologicanalyzer = not self.dologicanalyzer\n        self.ser.write(bytearray([145]))\n        if self.dologicanalyzer: \n            self.ser.write(bytearray([5]))\n            #if len(self.lines)>=8+self.logicline1: # check that we're drawing\n            #    for l in np.arange(8): self.lines[l+self.logicline1].set_visible(True)\n            if useftdi and self.dofastusb and not self.domt:\n                for usb in range(len(self.usbser)):\n                    self.usbser[usb].read_data_set_chunksize( int((self.num_bytes + self.fastusbpadding*num_chan_per_board) * 514/512 * 5/4 + 100) )\n        else:\n            self.ser.write(bytearray([4]))\n            #if len(self.lines)>=8+self.logicline1: # check that we're drawing\n            #    for l in np.arange(8): self.lines[l+self.logicline1].set_visible(False)\n            if useftdi and self.dofastusb and not self.domt:\n                for usb in range(len(self.usbser)):\n                    self.usbser[usb].read_data_set_chunksize( int((self.num_bytes + self.fastusbpadding*num_chan_per_board) * 514/512 + 100) )\n        print(\"dologicanalyzer is now\",self.dologicanalyzer)\n\n    def toggle_fastusb(self):\n        self.ser.write(bytearray([58]))\n        print(\"toggled fast usb writing\")\n\n    def toggle_checkfastusbwriting(self):\n        self.ser.write(bytearray([59]))\n        self.checkfastusbwriting = not self.checkfastusbwriting\n        print(\"toggled checkfastusbwriting to\",self.checkfastusbwriting)\n\n    minfirmwareversion=255\n    def getfirmwareversion(self, board):\n        #get the firmware version of a board\n        oldtime=time.time()\n        if board<10:\n            self.ser.write(bytearray([30 + board])) #can't do bytearray([53, board]) because it might be firmware<17 # make the next board active (serial_passthrough 0)\n        else:\n            if self.minfirmwareversion>=17: # first 10 boards were firmware >=17\n                self.ser.write(bytearray([53, board]))\n            else:\n                print(\"boards with firmware <17 detected, but you're trying to do a board with id 10!\")\n                return 0\n        self.ser.write(bytearray([147])) #request the firmware version byte\n        self.ser.timeout=0.1; rslt = self.ser.read(1); self.ser.timeout=self.sertimeout # reduce the serial timeout temporarily, since the old firmware versions will return nothing for command 147\n        byte_array = unpack('%dB'%len(rslt),rslt)\n        firmwareversion=0\n        if len(byte_array)>0: firmwareversion=byte_array[0]\n        tookms = (time.time()-oldtime)*1000.\n        print(\"got firmwareversion\",firmwareversion,\"for board\",board,\"in\",round(tookms,2),\"ms\")\n        if firmwareversion==0 and tookms>50:\n            print(\"Could not read firmware version - Exiting!\")\n            sys.exit(-7)\n        return firmwareversion # is 0 if not found (firmware version <5)\n    \n    def telltickstowait(self):\n        #tell it the number of clock ticks to wait, log2, between sending bytes\n        if self.dousb: ds=self.downsample-2\n        else: ds=self.downsample-3\n        if ds<1: ds=1\n        if self.minfirmwareversion>=5:\n            ds=1\n        else:\n            if ds>8:\n                ds=8 # otherwise we timeout upon readout\n                if self.num_samples>10: self.settriggerpoint(self.num_samples-10) # set trigger way to the right, so we can capture full event - NOTE - screws up mini-screen!\n                #self.otherlines[0].set_visible(False) # don't draw trigger time position line, to indicate it's not really set anymore\n        self.ser.write(bytearray([125]))\n        self.ser.write(bytearray([ds]))\n        if self.db: print(\"clockbitstowait is\",ds)\n    \n    def tellminidisplaychan(self,ch):\n        #tell it the channel to show on the mini-display\n        self.ser.write(bytearray([126]))\n        self.ser.write(bytearray([ch]))\n        self.chanforscreen=ch\n        print(\"chanforscreen is\",ch)\n    \n    def settriggerthresh(self,tp):\n        #tell it the trigger threshold\n        self.ser.write(bytearray([127]))\n        tp=255-tp # need to flip it due to op amp\n        self.ser.write(bytearray([tp]))\n        #print(\"Trigger threshold is\",tp)\n        \n    def settriggerthresh2(self,tp):\n        #tell it the high trigger threshold (must be below this to trigger)\n        self.ser.write(bytearray([140]))\n        tp=255-tp # need to flip it due to op amp\n        self.ser.write(bytearray([tp]))\n        print(\"Trigger high threshold is\",tp)\n    \n    def settriggertype(self,tp):\n        #tell it the trigger type: rising edge, falling edge, either, ...\n        self.ser.write(bytearray([128]))\n        self.ser.write(bytearray([tp]))\n        if self.db: print(\"Trigger type is\",tp)\n        \n    def settriggertime(self,ttt):\n        #tell it the trigger time over/under threshold required\n        if ttt>self.num_samples and ttt>10:\n            print(\"trigger time over/under thresh can't be bigger than num samples\",self.num_samples); return\n        usedownsamplefortriggertot=True\n        if usedownsamplefortriggertot: ttt+=pow(2,max_ram_width) #set bit [ram_width] (max) = 1\n        self.ser.write(bytearray([129]))\n        myb=bytearray.fromhex('{:04x}'.format(ttt))\n        self.ser.write(bytearray([myb[0]]))\n        self.ser.write(bytearray([myb[1]]))\n        print(\"trigger time over/under thresh now\",256*myb[0]+1*myb[1]-pow(2,max_ram_width),\"and usedownsamplefortriggertot is\",usedownsamplefortriggertot)\n\n    def settrigcoin(self,coin):\n        #set the number of coincidence trigger channels required\n        if coin<0 or coin>3:\n            print(\"must require 0-3 coincident additional channels\")\n            return\n        if self.minfirmwareversion<20:\n            print(\"must have firmware 20 or above to set N coincident channels\")\n            return\n        self.ser.write(bytearray([148]))\n        self.ser.write(bytearray([coin]))\n        print(\"Requiring\", coin, \"coincident additional channels to trigger\")\n    def settrigcointime(self,cointime):\n        #set the time self triggers are fired for (for coincidence purposes)\n        if cointime<1 or cointime>255:\n            print(\"must fire for 1-255 samples\")\n            return\n        if self.minfirmwareversion<20:\n            print(\"must have firmware 20 or above to set coincidence time\")\n            return\n        self.ser.write(bytearray([149]))\n        self.ser.write(bytearray([cointime]))\n        print(\"Setting\", cointime, \"samples for coincident channels to fire in\")\n\n    def writefirmchan(self,chan):\n        theboard = num_board-1-int(chan/num_chan_per_board)\n        chanonboard = chan%num_chan_per_board\n        self.ser.write(bytearray([theboard*num_chan_per_board+chanonboard])) # the channels are numbered differently in the firmware\n\n    def set_ext_trig_delay(self,delay):\n        self.ser.write(bytearray([56,delay]))\n        print(\"Set ext trig delay to\",delay)\n\n    def donoselftrig(self):\n        self.ser.write(bytearray([57]))\n        self.noselftrig = not self.noselftrig\n        print(\"Toggled no self trig for boards to\",self.noselftrig)\n\n    def setdaclevelforchan(self,chan,level):\n        if level>4096*2-1: \n            print(\"level can't be bigger than 2**13-1=4096*2-1\")\n            level=4096*2-1\n        if level<0: \n            print(\"level can't be less than 0\")\n            level=0\n        theboard = num_board-1-int(chan/num_chan_per_board)\n        chanonboard = chan%num_chan_per_board\n        self.setdac(chanonboard,level,theboard)\n        self.chanlevel[chan]=level\n        if self.db: print(\"DAC level set for channel\",chan,\"to\",level,\"which is chan\",chanonboard,\"on board\",theboard)\n    \n    def tellSPIsetup(self,what):\n        time.sleep(.01) #pause to make sure other SPI writng is done\n        self.ser.write(bytearray([131]))\n        myb=bytearray.fromhex('06 10') #default    \n        #SPIsenddata[14:8]=7'h08;//Common mode bias voltages\n        #SPIsenddata[7:0]=8'b00000000;//off //0x00\n        #SPIsenddata[7:0]=8'b11111111;//on 0.45V //0xff\n        #SPIsenddata[7:0]=8'b11001100;//on 0.9V //0xcc\n        #SPIsenddata[7:0]=8'b10111011;//on 1.35V //0xbb\n        if what==0: myb=bytearray.fromhex('08 00') #not connected, 0.9V\n        if what==1: myb=bytearray.fromhex('08 ff') #0.45V\n        if what==2: myb=bytearray.fromhex('08 dd') #0.75V\n        if what==3: myb=bytearray.fromhex('08 cc') #0.9V\n        if what==4: myb=bytearray.fromhex('08 99') #1.05V\n        if what==5: myb=bytearray.fromhex('08 aa') #1.2V\n        if what==6: myb=bytearray.fromhex('08 bb') #1.35V    \n        #SPIsenddata[14:8]=7'h06; //Clock Divide/Data Format/Test Pattern\n        #SPIsenddata[7:0]=8'b01010000;//do test pattern in offset binary // 0x50\n        #SPIsenddata[7:0]=8'b00010000;//do offset binary //0x10\n        if what==10: myb=bytearray.fromhex('06 50') #test pattern output\n        if what==11: myb=bytearray.fromhex('06 10') #offset binary output + no clock divide\n        if what==12: myb=bytearray.fromhex('06 11') #offset binary output + divide clock by 2\n        if what==13: myb=bytearray.fromhex('06 12') #offset binary output + divide clock by 4            \n        if what==20: myb=bytearray.fromhex('04 00') #50 Ohm termination chA (default)\n        if what==21: myb=bytearray.fromhex('05 00') #50 Ohm termination chB (default)        \n        if what==22: myb=bytearray.fromhex('04 1b') #150 Ohm termination chA\n        if what==23: myb=bytearray.fromhex('05 1b') #150 Ohm termination chB\n        if what==24: myb=bytearray.fromhex('04 24') #300 Ohm termination chA\n        if what==25: myb=bytearray.fromhex('05 24') #300 Ohm termination chB\n        if what==30: myb=bytearray.fromhex('01 02') #multiplexed, with chA first\n        if what==31: myb=bytearray.fromhex('01 06') #multiplexed, with chB first\n        if what==32: myb=bytearray.fromhex('01 00') # not multiplexed output        \n        self.ser.write(bytearray([myb[0]])) #write it!\n        self.ser.write(bytearray([myb[1]])) #write it!\n        print(\"tell SPI setup: 131 \",myb[0],myb[1])\n        time.sleep(.01) #pause to make sure other SPI writng is done\n    \n    # testBit() returns a nonzero result, 2**offset, if the bit at 'offset' is one.\n    def testBit(self,int_type, offset):\n        mask = 1 << offset\n        return(int_type & mask)\n    # setBit() returns an integer with the bit at 'offset' set to 1.\n    def setBit(self,int_type, offset):\n        mask = 1 << offset\n        return(int_type | mask)\n    # clearBit() returns an integer with the bit at 'offset' cleared.\n    def clearBit(self,int_type, offset):\n        mask = ~(1 << offset)\n        return(int_type & mask)\n    # toggleBit() returns an integer with the bit at 'offset' inverted, 0 -> 1 and 1 -> 0.\n    def toggleBit(self,int_type, offset):\n        mask = 1 << offset\n        return(int_type ^ mask)\n  \n    def sendi2c(self,whattosend,board=200):\n        db2=False\n        time.sleep(.02)\n        myb=bytearray.fromhex(whattosend)\n        self.ser.write(bytearray([136]))\n        if db2: print(\" sendi2c: 136\")\n        datacounttosend=len(myb)-1 #number of bytes of info to send, not counting the address\n        self.ser.write(bytearray([datacounttosend]))\n        if db2: print(datacounttosend)\n        for b in np.arange(len(myb)): \n            self.ser.write(bytearray([myb[b]]))\n            if db2: print(myb[b])\n        for b in np.arange(4-len(myb)): \n            self.ser.write(bytearray([255])) # pad with extra bytes since the command expects a total of 5 bytes (numtosend, addr, and 3 more bytes)\n            if db2: print(\"255\")\n        self.ser.write(bytearray([int(board)])) #200 (default) will address message to all boards, otherwise only the given board ID will listen\n        if db2: print(board,\"\\n\")\n        if self.db or db2: print(\"Tell i2c:\",\"bytestosend:\",datacounttosend,\" and address/data:\",whattosend,\"for board\",board)\n        time.sleep(.02)\n    \n    def setupi2c(self):\n        self.sendi2c(\"20 00 00\") #port A on IOexp 1 are outputs\n        self.sendi2c(\"20 01 00\") #port B on IOexp 1 are outputs\n        self.sendi2c(\"21 00 00\") #port A on IOexp 2 are outputs\n        self.sendi2c(\"20 12 \"+ ('%0*x' % (2,self.a20)) ) #port A of IOexp 1\n        self.sendi2c(\"20 13 \"+ ('%0*x' % (2,self.b20)) ) #port B of IOexp 1\n        self.sendi2c(\"21 12 \"+ ('%0*x' % (2,self.a21)) ) #port A of IOexp 2\n        if self.minfirmwareversion<15:\n            self.sendi2c(\"21 01 00\") #port B on IOexp 2 are outputs\n            self.sendi2c(\"21 13 \"+ ('%0*x' % (2,self.b21)) ) #port B of IOexp 2\n        else:\n            self.sendi2c(\"21 01 ff\") #port B on IOexp 2 are inputs!\n            self.sendi2c(\"21 0d ff\") #port B on IOexp 2 enable pull-up resistors!\n            #print \"portB on IOexp2 are inputs now\"\n        #print \"initialized all i2c ports and set to starting values\"\n            \n    def setdac(self,chan,val,board):        \n        if chan==0: c=\"50\"\n        elif chan==1: c=\"52\"\n        elif chan==2: c=\"54\"\n        elif chan==3: c=\"56\"\n        else:\n            print(\"channel\",chan,\"out of range 0-3\")\n            return        \n        if val>4096*2-1 or val<0:\n            print(\"value\",val,\"out of range 0-(4096*2-1)\")\n            return\n        #d=\"0\" # Vdd ref (0-3.3V, but noisy?)\n        d=\"8\" #internal ref, gain=1 (0-2V)\n        if val>4095:\n            d=\"9\" #internal ref, gain=2 (0-4V)\n            val=int(val/2)\n        self.sendi2c(\"60 \"+c+d+('%0*x' % (3,int(val))),  int(board)) #DAC, can go from 000 to 0fff in last 12 bits, and only send to the selected board\n        \n        # example:\n        # channel 0 , board 0 calib\n        # 136, 3, // header for i2c command with 3 bytes of data\n        # 96, // i2c address of dac\n        # 80, // channel 80,82,84,86 for chan 0,1,2,3\n        # 136, 22, // high 4 bits can be 8 or 9 (internal ref 2V or 4V, respectively), next 12 bits are the 0-4095 level\n        # 0 // send to board 0 (200 for all boards)\n    \n    def shutdownadcs(self):\n        self.b20= int('ff',16)  # shdn (set first char to f to turn off) / ac coupling (?)\n        self.sendi2c(\"20 13 \"+ ('%0*x' % (2,self.b20)) ) #port B of IOexp 1\n        print(\"shut down adcs\")\n        \n    def testi2c(self):\n        print(\"test i2c\")\n        dotest=3 # what to test\n        if dotest==0:\n            # IO expander 1            \n            self.sendi2c(\"20 12 ff\") #turn on all port A of IOexp 1 (12 means A, ff is which of the 8 bits to turn on)\n            self.sendi2c(\"20 13 ff\") #turn on all port B of IOexp 1 (13 means B, ff is which of the 8 bits to turn on)\n            time.sleep(3)\n            self.sendi2c(\"20 12 00\") #turn off all port A of IOexp 1\n            self.sendi2c(\"20 13 00\") #turn off all port B of IOexp 1\n        elif dotest==1:\n            #Test the DAC\n            self.setdac(0,0,0)\n            time.sleep(3)\n            self.setdac(0,1200,0)\n        elif dotest==2:\n            #toggle led 3, at 0x21 a0\n            self.a21=self.toggleBit(self.a21,3); self.sendi2c(\"21 12 \"+ ('%0*x' % (2,self.a21)) )\n        elif dotest==3:\n            #toggle pin E24 B7, at 0x21 b7\n            self.b21=self.toggleBit(self.b21,7); self.sendi2c(\"21 13 \"+ ('%0*x' % (2,self.b21)) )\n    \n    def toggledousb(self):#toggle whether to read over FT232H USB or not\n        if len(self.usbser)==0:\n            self.dousb=False\n            print(\"usb2 connection not available\")\n        else:\n            if self.dofastusb and self.minfirmwareversion<=17:\n                print(\"Need firmware >17 for fastusb! Exiting!\")\n                sys.exit(-17)\n            self.dousb = not self.dousb\n            self.ser.write(bytearray([137]))\n            print(\"dousb toggled to\",self.dousb,\"and dofastusb is\",self.dofastusb,\"and dousbparallel is\",self.dousbparallel)\n            self.telltickstowait()\n    \n    def togglehighres(self):#toggle whether to do highres averaging during downsampling or not\n            self.ser.write(bytearray([143]))\n            self.dohighres = not self.dohighres\n            print(\"do highres is\",self.dohighres)\n    \n    def toggleuseexttrig(self):#toggle whether to use the external trigger input or not\n            self.ser.write(bytearray([144]))\n            self.useexttrig = not self.useexttrig\n            print(\"useexttrig is\",self.useexttrig)\n    \n    def toggletriggerchan(self,tp):\n        #tell it to trigger or not trigger on a given channel\n        self.ser.write(bytearray([130]))\n        self.writefirmchan(tp)\n        self.trigsactive[tp] = not self.trigsactive[tp]\n        if self.db: print(\"Trigger toggled for channel\",tp)\n\n    def toggleautorearm(self):\n        #tell it to toggle the auto rearm of the tirgger after readout\n        self.ser.write(bytearray([139]))\n        self.autorearm = not self.autorearm\n        print(\"Trigger auto rearm now\",self.autorearm)\n        if self.db: print(time.time()-self.oldtime,\"priming trigger\")\n        self.ser.write(bytearray([100])) # prime the trigger one last time\n\n    def toggle_clk_last(self):\n        self.ser.write(bytearray([54]))\n        print(\"Toggled clock output from the last board\")\n\n    def toggle_allow_same_chan_coin(self):\n        if self.minfirmwareversion<21:\n            print(\"Need firmware 21 or greater to toggle allowance of same channel coincidence!\")\n        self.ser.write(bytearray([150]))\n        print(\"Toggled allow same channel coincidence\")\n\n    def increment_clk_phase(self, board, times=1):\n        if self.minfirmwareversion<17:\n            print(\"incrementing clock phase requires firmware >=17\")\n            return\n        self.ser.write(bytearray([53,board]))\n        for t in range(times): self.ser.write(bytearray([55]))\n        print(\"Incremented clock phase on board\",board,times,\"time(s)\")\n\n    def getIDs(self):\n        debug3=True\n        self.uniqueID=[]\n        for board in range(num_board):\n            if self.minfirmwareversion>=17:\n                self.ser.write(bytearray([53, board]))  # make the next board active (serial_passthrough 0)\n            else:\n                self.ser.write(bytearray([30 + board]))  # make the next board active (serial_passthrough 0)\n            self.ser.write(bytearray([142])) #request the unique ID\n            num_other_bytes = 8\n            rslt = self.ser.read(num_other_bytes)\n            if len(rslt)==num_other_bytes:\n                byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n                self.uniqueID.append( ''.join(format(x, '02x') for x in byte_array) )\n                if debug3: print(\"got uniqueID\",self.uniqueID[board],\"for board\",board,\", len is now\",len(self.uniqueID))\n            else:\n                print(\"getID asked for\",num_other_bytes,\"bytes and got\",len(rslt),\"from board\",board,\" - Exiting!\")\n                sys.exit(-4)\n\n    trigratecounter = []\n    def gettrigratecounter(self):\n        self.trigratecounter=[]\n        for board in range(num_board):\n            if self.minfirmwareversion>=17:\n                self.ser.write(bytearray([53, board]))  # make the next board active (serial_passthrough 0)\n            else:\n                self.ser.write(bytearray([30 + board]))  # make the next board active (serial_passthrough 0)\n            self.ser.write(bytearray([151])) #request the trigratecounter from the board\n            num_other_bytes = 4\n            rslt = self.ser.read(num_other_bytes)\n            if len(rslt)==num_other_bytes:\n                byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n                self.trigratecounter.append( byte_array[0] + 256*byte_array[1] + 256*256*byte_array[2] + 256*256*256*byte_array[3] )\n                #print(\"got trigratecounter\",self.trigratecounter[board],\"for board\",board,\", len is now\",len(self.trigratecounter))\n            else:\n                print(\"gettrigratecounter asked for\",num_other_bytes,\"bytes and got\",len(rslt),\"from board\",board)\n\n    def togglesupergainchan(self,chan):\n        if self.supergain[chan]==1:\n            self.supergain[chan]=0 #x100 super gain on!\n        else:\n            self.supergain[chan]=1 #normal gain\n        self.selectedchannel=chan\n        self.setdacvalue()\n        print(\"Supergain switched for channel\",chan,\"to\",self.supergain[chan])\n    \n    def tellswitchgain(self,chan):\n        #tell it to switch the gain of a channel\n        self.ser.write(bytearray([134]))\n        self.writefirmchan(chan)\n        if self.gain[chan]==1:\n            self.gain[chan]=0 # x10 gain on!\n        else:\n            self.gain[chan]=1 #low gain\n        self.selectedchannel=chan # needed for setdacvalue\n        self.setdacvalue()\n        print(\"Gain switched for channel\",chan,\"to\",self.gain[chan])\n\n    def oversamp(self,chan):\n        #tell it to toggle oversampling for this channel\n        chanonboard = chan%num_chan_per_board\n        if chanonboard>1: \n            print(\"oversampling only allowed on channels 0 and 1 of a board\")\n            return -1\n        if chanonboard==1 and self.dooversample[chan] and self.dooversample[chan-1]==9:\n            print(\"first disable over-oversampling on channel\",chan-1)\n            return -2\n        self.dooversample[chan] = not self.dooversample[chan]\n        print(\"oversampling is now\",self.dooversample[chan],\"for channel\",chan)\n        if self.dooversample[chan] and self.downsample>0: self.telldownsample(0) # must be in max sampling mode for oversampling to make sense\n        self.ser.write(bytearray([141]))\n        self.writefirmchan(chan)\n        return 1\n    \n    def overoversamp(self):\n        if self.selectedchannel%4: \n            print(\"over-oversampling only for channel 0 of a board!\")\n            return -1\n        elif self.dooversample[self.selectedchannel]==0 or self.dooversample[self.selectedchannel+1]==0:\n            print(\"for over-oversampling, first do oversampling on channels 0 and 1 of the board\")\n            return -2\n        elif self.dooversample[self.selectedchannel]==1:\n            self.dooversample[self.selectedchannel]=9\n            print(\"over-oversampling\")\n            return 0\n        elif self.dooversample[self.selectedchannel]==9:\n            self.dooversample[self.selectedchannel]=1\n            print(\"no more over-oversampling\")\n            return 0\n\n    def resetchans(self):\n        for chan in np.arange(num_board*num_chan_per_board):\n            if self.gain[chan]==0:\n                self.tellswitchgain(chan) # set all gains back to low gain\n            if self.trigsactive[chan]==0:\n                self.toggletriggerchan(chan) # set all trigger channels back to active\n            if self.dooversample[chan]: \n                self.oversamp(chan) # set all channels back to no oversampling\n    \n    def setbacktoserialreadout(self):\n        if self.dousb:    \n            self.ser.write(bytearray([137]))\n            self.dousb=False\n            print(\"dousb set back to\",self.dousb)\n    \n    def telldownsample(self,ds):\n        #tell it the amount to downsample, log2... so 0 (none), 1(factor 2), 2(factor 4), etc.\n        if self.dolockin and ds<2: print(\"downsample can't be <2 in lockin mode !\"); return False\n        if ds<-8: print(\"downsample can't be <-8... that's too fast !\"); return False\n        if ds<0: # negative downsample means just scale/zoom the data, don't actually change the sampling done on the board\n            self.downsample=ds\n        else:\n            if max(self.dooversample)>0 and ds>0: print(\"can't change sampling rate while oversampling - must be fastest!\"); return False\n            if ds>self.maxdownsample: print(\"downsample >\",self.maxdownsample,\"doesn't work well... I get bored running that slow!\"); return False        \n            self.ser.write(bytearray([124]))\n            self.ser.write(bytearray([ds]))\n            self.downsample=ds\n            if self.db: print(\"downsample is\",self.downsample)        \n            if self.dolockin:\n                twoforoversampling=1\n                uspersample=(1.0/self.clkrate)*pow(2,self.downsample)/twoforoversampling # us per sample = 10 ns * 2^downsample\n                numtoshiftf= 1.0/self.reffreq/4.0 / uspersample\n                print(\"would like to shift by\",round(numtoshiftf,4),\"samples, and uspersample is\",uspersample)\n                self.numtoshift = int(round(numtoshiftf,0))+0 # shift by 90 deg\n                self.telllockinnumtoshift(self.numtoshift)\n            else:\n                self.telllockinnumtoshift(0) # tells the FPGA to not send lockin info    \n            self.telltickstowait()\n        self.setxaxis()\n        return True # successful (parameter within OK range)\n\n    def setxaxis(self):\n        self.xscale = self.num_samples/2.0*(1000.0*pow(2,self.downsample)/self.clkrate)\n        if self.xscale<1e3: \n            self.xlabel=\"Time (ns)\"\n            self.min_x = -self.xscale\n            self.max_x = self.xscale\n            self.xscaling=1.e0\n        elif self.xscale<1e6: \n            self.xlabel=\"Time (us)\"\n            self.min_x = -self.xscale/1.e3\n            self.max_x = self.xscale/1.e3\n            self.xscaling=1.e3\n        else:\n            self.xlabel=\"Time (ms)\"\n            self.min_x = -self.xscale/1.e6\n            self.max_x = self.xscale/1.e6\n            self.xscaling=1.e6\n        #print \"xscaling\",self.xscaling\n    \n    def setyaxis(self):\n        #self.ax.set_ylim(self.min_y, self.max_y)\n        self.ylabel=\"Volts\" #(\"ADC value\")\n\n    def chantext(self):\n        text =\"Channel: \"+str(self.selectedchannel)\n        if self.ydatarefchan>=0: text += \" - ref \"+str(int(self.ydatarefchan))\n        if self.domeasure and self.dodrawing:\n            if abs(self.Vmean[self.selectedchannel])>.9: text +=\"\\nMean={0:1.3g} V\".format(self.Vmean[self.selectedchannel])\n            else: text +=\"\\nMean={0:1.3g} mV\".format(1000.*self.Vmean[self.selectedchannel])\n            if abs(self.Vrms[self.selectedchannel])>.9: text +=\"\\nRMS={0:1.3g} V\".format(self.Vrms[self.selectedchannel])\n            else: text +=\"\\nRMS={0:1.3g} mV\".format(1000.*self.Vrms[self.selectedchannel])        \n        if self.dogetotherdata:\n            text+=\"\\nTDC: \"+str(self.tdcdata)\n        if self.dotriggercounter>0 and self.minfirmwareversion>=22:\n            self.mymod = self.mymod + 1\n            #print(\"mymod is\",self.mymod)\n            if self.rollingtrigger and self.mymod>=self.dotriggercounter: # every dotriggercounter seconds\n                self.mymod = 0\n                self.gettrigratecounter()\n            text+=\"\\n\\nTrigger rates per board over last \"+str(self.dotriggercounter)+\"s (Hz):\\n\"\n            for board in range(len(self.trigratecounter)):\n                text += \" \"+ str('{:,}'.format(self.trigratecounter[board]/float(self.dotriggercounter)))\n        return text\n    \n    def pickline(self,theline):\n        # on the pick event, find the orig line corresponding to the\n        # legend proxy line, and toggle the visibility\n        origline,legline,channum = self.lined[theline]\n        if self.db: print(\"picked\",theline,\"for channum\",channum)\n        if hasattr(self,'selectedlegline'): \n            if self.selectedorigline.get_visible(): self.selectedlegline.set_linewidth(2.0)\n            else: self.selectedlegline.set_linewidth(1.0)\n        legline.set_linewidth(4.0)\n        self.selectedlegline=legline; self.selectedorigline=origline # remember them so we can set it back to normal later when we pick something else\n        if channum < num_board*num_chan_per_board: # it's an ADC channel (not a max10adc channel or other thing)\n            if self.db: print(\"picked a real ADC channel\")\n            self.selectedchannel=channum\n            if self.keyShift: self.toggletriggerchan(channum)\n        else:\n            if self.db: print(\"picked a max10 ADC channel\")\n            self.selectedmax10channel=channum - num_board*num_chan_per_board\n    \n    def adjustvertical(self,up,amount=10):        \n        #print \"amount is\",amount\n        if self.gain[self.selectedchannel]: amount*=10 #low gain\n        if self.supergain[self.selectedchannel]==0 and self.acdc[self.selectedchannel]: amount=max(1,int(amount/10)) #super gain\n        #print \"now amount is\",amount\n        if up:\n             self.chanlevel[self.selectedchannel] = self.chanlevel[self.selectedchannel] - amount\n        else:\n             self.chanlevel[self.selectedchannel] = self.chanlevel[self.selectedchannel] + amount\n        self.rememberdacvalue()\n        self.setdacvalue()\n        \n    def rememberdacvalue(self):\n        #remember current dac level for the future to the right daclevel, depending on other settings\n        if self.gain[self.selectedchannel]: # low gain\n            if self.supergain[self.selectedchannel]: \n                if self.acdc[self.selectedchannel]: self.lowdaclevel[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n                else: self.lowdaclevelac[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n            else: #supergain\n                if self.acdc[self.selectedchannel]: self.lowdaclevelsuper[self.selectedchannel]=self.chanlevel[self.selectedchannel] #dc super gain\n                else: self.lowdaclevelsuperac[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n        else: # high gain\n            if self.supergain[self.selectedchannel]: \n                if self.acdc[self.selectedchannel]: self.highdaclevel[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n                else: self.highdaclevelac[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n            else: #supergain\n                if self.acdc[self.selectedchannel]: self.highdaclevelsuper[self.selectedchannel]=self.chanlevel[self.selectedchannel] #dc super gain\n                else: self.highdaclevelsuperac[self.selectedchannel]=self.chanlevel[self.selectedchannel]\n                \n    def setdacvalue(self):\n        #set current dac level to the remembered value, depending on other settings\n        if self.gain[self.selectedchannel]: # low gain\n            if self.supergain[self.selectedchannel]: \n                if self.acdc[self.selectedchannel]: self.setdaclevelforchan(self.selectedchannel,self.lowdaclevel[self.selectedchannel])\n                else: self.setdaclevelforchan(self.selectedchannel,self.lowdaclevelac[self.selectedchannel])\n            else: #supergain\n                if self.acdc[self.selectedchannel]: self.setdaclevelforchan(self.selectedchannel,self.lowdaclevelsuper[self.selectedchannel]) #dc super gain\n                else: self.setdaclevelforchan(self.selectedchannel,self.lowdaclevelsuperac[self.selectedchannel])\n        else: # high gain\n            if self.supergain[self.selectedchannel]: \n                if self.acdc[self.selectedchannel]: self.setdaclevelforchan(self.selectedchannel,self.highdaclevel[self.selectedchannel])\n                else: self.setdaclevelforchan(self.selectedchannel,self.highdaclevelac[self.selectedchannel])\n            else: #supergain\n                if self.acdc[self.selectedchannel]: self.setdaclevelforchan(self.selectedchannel,self.highdaclevelsuper[self.selectedchannel]) #dc super gain\n                else: self.setdaclevelforchan(self.selectedchannel,self.highdaclevelsuperac[self.selectedchannel])\n        \n    def setacdc(self):\n        chan=self.selectedchannel\n        theboard = num_board-1-int(chan/num_chan_per_board)\n        chanonboard = chan%num_chan_per_board\n        print(\"toggling acdc for chan\",chan,\"which is chan\",chanonboard,\"on board\",theboard)\n        self.acdc[int(chan)] = not self.acdc[int(chan)]\n        self.b20= int('00',16)  # shdn (set first char to 0 to turn on) / ac coupling (set second char to f for DC, 0 for AC)\n        for c in range(0,3):\n            realchan = (num_board-1-theboard)*num_chan_per_board+c\n            if self.acdc[int(realchan)]: \n                self.b20 = self.toggleBit(self.b20,int(c)) # 1 is dc, 0 is ac\n                if self.db: print(\"toggling bit\",c,\"for chan\",realchan)\n        self.sendi2c(\"20 13 \"+ ('%0*x' % (2,self.b20)),  theboard) #port B of IOexp 1, only for the selected board\n        self.setdacvalue()\n    \n    def setdacvalues(self,sc):\n        oldchan=self.selectedchannel\n        for chan in range(sc,sc+4):\n            self.selectedchannel=chan\n            self.setdacvalue()\n        self.selectedchannel=oldchan\n    \n    def storecalib(self):\n        cwd = os.getcwd()\n        print(\"current directory is\",cwd)\n        for board in range(0,num_board):\n            self.storecalibforboard(board)\n    def storecalibforboard(self,board):\n        sc = board*num_chan_per_board\n        print(\"storing calibrations for board\",board,\", channels\",sc,\"-\",sc+4)\n        c = dict(\n            boardID=self.uniqueID[board],\n            lowdaclevels=self.lowdaclevel[sc : sc+4].tolist(),\n            highdaclevels=self.highdaclevel[sc : sc+4].tolist(),\n            lowdaclevelssuper=self.lowdaclevelsuper[sc : sc+4].tolist(),\n            highdaclevelssuper=self.highdaclevelsuper[sc : sc+4].tolist(),\n            lowdaclevelsac=self.lowdaclevelac[sc : sc+4].tolist(),\n            highdaclevelsac=self.highdaclevelac[sc : sc+4].tolist(),\n            lowdaclevelssuperac=self.lowdaclevelsuperac[sc : sc+4].tolist(),\n            highdaclevelssuperac=self.highdaclevelsuperac[sc : sc+4].tolist(),\n            firmwareversion=self.minfirmwareversion\n            )\n        #print json.dumps(c,indent=4)\n        fname = \"calib/calib_\"+self.uniqueID[board]+\".json.txt\"\n        json.dump(c,open(fname,'w'),indent=4)\n        print(\"wrote\",fname)\n    \n    def readcalib(self):\n        cwd = os.getcwd()\n        print(\"current directory is\",cwd)\n        for board in range(0,num_board):\n            self.readcalibforboard(board)\n    def readcalibforboard(self,board):\n        sc = board*num_chan_per_board\n        if len(self.uniqueID)<=board:\n            print(\"failed to get board ID for board\",board)\n            self.setdacvalues(sc) #will load in defaults\n            return\n        print(\"reading calibrations for board\",board,\", channels\",sc,\"-\",sc+4)\n        fname = \"calib/calib_\"+self.uniqueID[board]+\".json.txt\"\n        try:\n            c = json.load(open(fname))\n            print(\"read\",fname)\n            assert c['boardID']==self.uniqueID[board]\n            self.lowdaclevel[sc : sc+4] = c['lowdaclevels']\n            self.highdaclevel[sc : sc+4] = c['highdaclevels']\n            self.lowdaclevelsuper[sc : sc+4] = c['lowdaclevelssuper']\n            self.highdaclevelsuper[sc : sc+4] = c['highdaclevelssuper']\n            self.lowdaclevelac[sc : sc+4] = c['lowdaclevelsac']\n            self.highdaclevelac[sc : sc+4] = c['highdaclevelsac']\n            self.lowdaclevelsuperac[sc : sc+4] = c['lowdaclevelssuperac']\n            self.highdaclevelsuperac[sc : sc+4] = c['highdaclevelssuperac']\n            if \"firmwareversion\" in c:\n                print(\"calib was written using firmware version\",c[\"firmwareversion\"])\n            else:\n                print(\"calib was written using unknown firmware version\")\n            self.setdacvalues(sc) #and use the new levels right away\n        except IOError:\n            print(\"No calib file found for board\",board,\"at file\",fname)\n            self.setdacvalues(sc) #will load in defaults\n    \n    def decode(self):\n        if not enable_ripyl:\n            print(\"ripyl not enabled - install it and then set enable_ripyl to True at the top of HaasoscopeLibQt.py\")\n            return\n        raw_samples = self.xydata[self.selectedchannel][1] #ydata\n        sample_period = (1e-6/self.clkrate)*pow(2,self.downsample)\n        txd = stream.samples_to_sample_stream(raw_samples, sample_period)\n        bits = 8 # anything, not just restricted to the standard 5,6,7,8,9\n        parity = None # or 'odd' or None\n        stop_bits = 1 # can be 1, 1.5, 2 or any non-standard value greater than 0.5\n        polarity = uart.UARTConfig.IdleHigh # logic level when there's no data\n        baud=1500000 # 115200 # baud rate -- can set to None if you want to try to determine it automatically!\n        levels=(1.0,1.5) # the low and high logic levels\n        dohex = False # print as hex (otherwise print as decimal)\n        resulttext = []\n        resultstart = []\n        resultend = []\n        try:\n            records_it = uart.uart_decode(txd, bits, parity, stop_bits, polarity, baud_rate=baud, use_std_baud=False, logic_levels=levels)\n            records = list(records_it) # This consumes the iterator and completes the decode\n            for rec in records:\n                if rec.nested_status() == stream.StreamStatus.Ok:\n                    #print(\"good chan\", self.selectedchannel, \"serial data found: \", rec.data)\n                    #print(rec.start_time, rec.end_time)\n                    if dohex: resulttext.append(hex(rec.data))\n                    else: resulttext.append(str(rec.data))\n                    resultstart.append(rec.start_time)\n                    resultend.append(rec.end_time)\n        except stream.StreamError:\n            print(\"No UART data found for channel\",self.selectedchannel)\n        return resulttext,resultstart,resultend\n\n    def on_running(self, theydata, board): #update data for main plot for a board\n        if board<0: #hack to tell it the max10adc channel\n            chantodraw=-board-1 #draw chan 0 first (when board=-1)\n            posi=chantodraw+num_board*num_chan_per_board\n            if self.db: print(time.time()-self.oldtime,\"drawing line\",posi)\n            #if self.db: print \"ydata[0]=\",theydata[0]\n            xdatanew=(self.xsampdata*((self.num_samples-1)/self.nsamp)-self.num_samples/2.+1)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling) #downsample isn't less than 0 for xscaling\n            ydatanew=theydata*(3.3/256)#full scale is 3.3V\n            self.xydataslow[chantodraw][0]=xdatanew\n            self.xydataslow[chantodraw][1]=ydatanew\n        else:\n            if self.dologicanalyzer and self.logicline1>=0 and hasattr(self,\"ydatalogic\"): #this draws logic analyzer info\n                xlogicshift=12.0/pow(2,max(self.downsample,0)) # shift the logic analyzer data to the right by this number of samples (to account for the ADC delay) #downsample isn't less than 0 for xscaling\n                xdatanew = (self.xdata+xlogicshift-self.num_samples/2.)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling) #downsample isn't less than 0 for xscaling\n                theboard = num_board - 1 - int(self.selectedchannel / num_chan_per_board)\n                self.xydatalogicraw[theboard] = self.ydatalogic\n                if board==theboard and self.dodrawing:\n                    b = np.unpackbits(self.ydatalogic)\n                    for l in np.arange(self.num_logic_inputs):\n                        bl=b[7-l::8] # every 8th bit, starting at 7-l\n                        ydatanew = bl*.3 + (l+1)*3.2/8. # scale it and shift it\n                        self.xydatalogic[l][0]=xdatanew\n                        self.xydatalogic[l][1]=ydatanew\n            for l in np.arange(num_chan_per_board): #this draws the 4 fast ADC data channels for each board\n                thechan=l+(num_board-board-1)*num_chan_per_board\n                #if self.db: print time.time()-self.oldtime,\"drawing adc line\",thechan\n                if len(theydata)<=l: print(\"don't have channel\",l,\"on board\",board); return\n                showoversampled=True\n                if self.dooversample[thechan]==1 and showoversampled: # account for oversampling\n                    xdatanew = (self.xdata2-self.num_samples)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling/2.) #downsample isn't less than 0 for xscaling\n                    theydata2=np.concatenate([theydata[l],theydata[l+2]]) # concatenate the 2 lists\n                    ydatanew=(127-theydata2)*(self.yscale/256.) # got to flip it, since it's a negative feedback op amp\n                elif self.dooversample[thechan]==9 and showoversampled: # account for over-oversampling\n                    xdatanew = (self.xdata4-self.num_samples*2)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling/4.) #downsample isn't less than 0 for xscaling\n                    theydata4=np.concatenate([theydata[l],theydata[l+1],theydata[l+2],theydata[l+3]]) # concatenate the 4 lists\n                    ydatanew=(127-theydata4)*(self.yscale/256.) # got to flip it, since it's a negative feedback op amp\n                else: # no oversampling\n                    xboardshift=(11.0*board/8.0)/pow(2,max(self.downsample,0)) # shift the board data to the right by this number of samples (to account for the readout delay) #downsample isn't less than 0 for xscaling\n                    xdatanew = (self.xdata-xboardshift-self.num_samples/2.)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling) #downsample isn't less than 0 for xscaling\n                    ydatanew=(127-theydata[l])*(self.yscale/256.) # got to flip it, since it's a negative feedback op amp\n                    if self.ydatarefchan>=0: ydatanew -= (127-theydata[self.ydatarefchan])*(self.yscale/256.) # subtract the board's reference channel ydata from this channel's ydata\n                if self.average:\n                    numsamplestoaverage = 2\n                    ydatanew = np.repeat(\n                            np.mean(ydatanew.reshape(-1, numsamplestoaverage), axis=1),\n                            numsamplestoaverage)\n                if self.sincresample>0:\n                    (ydatanew,xdatanew) = resample(ydatanew, len(xdatanew)*self.sincresample, t = xdatanew)\n                    xdatanew = xdatanew[1*self.sincresample:len(xdatanew)*self.sincresample]\n                    ydatanew = ydatanew[1*self.sincresample:len(ydatanew)*self.sincresample]\n                else:\n                    xdatanew = xdatanew[1:len(xdatanew)]\n                    ydatanew = ydatanew[1:len(ydatanew)]\n                if self.dooversample[thechan]==1 and showoversampled: # account for oversampling, take the middle-most section\n                    if self.sincresample>0:\n                        self.xydata[thechan][0]=xdatanew[self.sincresample+int(self.num_samples*self.sincresample/2):int(3*self.num_samples*self.sincresample/2):1] # for printing out or other analysis\n                        self.xydata[thechan][1]=ydatanew[self.sincresample+int(self.num_samples*self.sincresample/2):int(3*self.num_samples*self.sincresample/2):1]\n                    else:\n                        self.xydata[thechan][0]=xdatanew[int(1+self.num_samples/2):int(3*self.num_samples/2):1] # for printing out or other analysis\n                        self.xydata[thechan][1]=ydatanew[int(1+self.num_samples/2):int(3*self.num_samples/2):1]\n                elif self.dooversample[thechan]==9 and showoversampled: # account for over-oversampling, take the middle-most section\n                     if self.sincresample>0:\n                         self.xydata[thechan][0]=xdatanew[self.sincresample+int(3*self.num_samples*self.sincresample/2):int(5*self.num_samples*self.sincresample/2):1] # for printing out or other analysis\n                         self.xydata[thechan][1]=ydatanew[self.sincresample+int(3*self.num_samples*self.sincresample/2):int(5*self.num_samples*self.sincresample/2):1]\n                     else:\n                        self.xydata[thechan][0]=xdatanew[int(1+3*self.num_samples/2):int(5*self.num_samples/2):1] # for printing out or other analysis\n                        self.xydata[thechan][1]=ydatanew[int(1+3*self.num_samples/2):int(5*self.num_samples/2):1]\n                else: # the full data is stored\n                    self.xydata[thechan][0]=xdatanew # for printing out or other analysis\n                    self.xydata[thechan][1]=ydatanew\n                if self.domeasure and self.dodrawing:\n                    self.Vmean[thechan] = np.mean(ydatanew)\n                    self.Vrms[thechan] = np.sqrt(np.mean((ydatanew-self.Vmean[thechan])**2))\n                    gain=1\n                    if self.gain[thechan]==0: gain*=10\n                    if self.supergain[thechan]==0: gain*=100\n                    if gain>1:\n                        self.Vmean[thechan]/=gain\n                        self.Vrms[thechan]/=gain                    \n                    if self.fitline1>-1 and thechan==0: # optional risetime fit for channel 0\n                        def fit_rise(x,a,bottom,b,top): # a function for fitting to find risetime\n                            val=bottom+(x-a)*(top-bottom)/(b-a)\n                            inbottom=(x<=a)\n                            val[inbottom]=bottom\n                            intop=(x>=b)\n                            val[intop]=top\n                            return val\n                        try:\n                            x2=xdatanew[(xdatanew>-.1) & (xdatanew<.1)] # only fit in range -.1 to .1 (us)\n                            y2=ydatanew[(xdatanew>-.1) & (xdatanew<.1)]\n                            popt, pcov = scipy.optimize.curve_fit(fit_rise,x2,y2,bounds=([-.1,-4,-0.05,0],[0.05,0,.1,4])) #and note these bounds - top must be>0 and bottom<0 !\n                            self.lines[self.fitline1].set_xdata(x2)\n                            self.lines[self.fitline1].set_ydata( fit_rise(x2, *popt) )\n                            print(\"risetime = \",1000*0.8*(popt[2]-popt[0]),\"ns\") # from 10-90% is 0.8 on the line - don't forget to correct for x2 or x4 oversampling!\n                        except:\n                            print(\"fit exception!\")\n                if self.doxyplot and (thechan==self.xychan or thechan==(self.xychan+1)): self.drawxyplot(xdatanew,ydatanew,thechan)# the xy plot\n                if self.recorddata and thechan==self.recorddatachan: self.dopersistplot(xdatanew,ydatanew)# the persist shaded plot\n                if thechan==self.refsinchan-1 and self.reffreq==0: self.oldchanphase=-1.; self.fittosin(xdatanew, ydatanew, thechan) # first fit the previous channel, for comparison\n                elif thechan==self.refsinchan and self.reffreq==0: self.reffreq = self.fittosin(xdatanew, ydatanew, thechan) # then fit for the ref freq and store the result\n                if self.autocalibchannel>=0 and thechan==self.autocalibchannel: self.autocalibrate(thechan,ydatanew)\n    \n    def fittosin(self,xdatanew, ydatanew, chan):\n        res = self.fit_sin(xdatanew, ydatanew)\n        phase=res['phase']*180./np.pi\n        if res['amp']<0.: phase+=180.\n        print(\"Chan:\",chan, \"cov=\",res['maxcov'], \"amp=\",abs(res['amp']), \"phase=\",phase, \"offset=\", res['offset'], res['freq']*1000000./self.xscaling,'kHz')\n        if res['maxcov']<1e-4:\n            if self.oldchanphase>=0.: \n                diff=phase-self.oldchanphase\n                if diff<0: diff+=360\n                print(\"phase diff=\",diff)\n            self.oldchanphase=phase\n            return res['freq']\n        else: print(\"sin fit failed!\"); return 0;\n        \n    #For finding the frequency of a reference sin wave signal, for lockin calculations\n    def fit_sin(self,tt, yy):\n        '''Fit sin to the input time sequence, and return fitting parameters \"amp\", \"omega\", \"phase\", \"offset\", \"freq\", \"period\" and \"fitfunc\"'''\n        tt = np.array(tt)\n        yy = np.array(yy)\n        ff = np.fft.fftfreq(len(tt), (tt[1]-tt[0]))   # assume uniform spacing\n        Fyy = abs(np.fft.fft(yy))\n        guess_freq = abs(ff[np.argmax(Fyy[1:])+1])   # excluding the zero frequency \"peak\", which is related to offset\n        guess_amp = np.std(yy) * 2.**0.5\n        guess_offset = np.mean(yy)\n        guess = np.array([guess_amp, 2.*np.pi*guess_freq, 0., guess_offset])\n    \n        def sinfunc(t, A, w, p, c):  return A * np.sin(w*t + p) + c\n        popt, pcov = scipy.optimize.curve_fit(sinfunc, tt, yy, p0=guess)\n        A, w, p, c = popt\n        f = w/(2.*np.pi)\n        fitfunc = lambda t: A * np.sin(w*t + p) + c\n        return {\"amp\": A, \"omega\": w, \"phase\": p, \"offset\": c, \"freq\": f, \"period\": 1./f, \"fitfunc\": fitfunc, \"maxcov\": np.max(pcov), \"rawres\": (guess,popt,pcov)}\n    \n    def autocalibrate(self,thechan,ydatanew):\n        self.selectedchannel=thechan\n        avg = np.average(ydatanew)\n        #print avg\n        gotonext=False\n        tol = 1.0\n        tol2 = 0.25\n        if self.supergain[self.selectedchannel] or self.gain[self.selectedchannel]: # normal gain or low gain\n            tol = 0.3\n            tol2 = 0.02\n        if avg>0+tol:                        \n            self.adjustvertical(False,10)\n        elif avg<0-tol:\n            self.adjustvertical(True,10)\n        elif avg>0+tol2:\n            self.adjustvertical(False,1)\n        elif avg<0-tol2:\n            self.adjustvertical(True,1)\n        else: gotonext=True\n        if self.chanlevel[self.selectedchannel]==0: gotonext=True\n        if gotonext:\n            #go to the next channel, unless we're at the end of all channels\n            self.autocalibchannel=self.autocalibchannel+1\n            if self.autocalibchannel==num_chan_per_board*num_board:\n                self.autocalibgainac=self.autocalibgainac+1\n                if self.autocalibgainac==1:\n                    self.autocalibchannel=0\n                    for chan in range(num_chan_per_board*num_board):\n                        self.selectedchannel=chan\n                        self.setacdc()\n                elif self.autocalibgainac==2:\n                    self.autocalibchannel=0\n                    for chan in range(num_chan_per_board*num_board):\n                        self.selectedchannel=chan\n                        self.tellswitchgain(chan)\n                elif self.autocalibgainac==3:\n                    self.autocalibchannel=0\n                    for chan in range(num_chan_per_board*num_board):\n                        self.selectedchannel=chan\n                        self.setacdc()\n                else:\n                    self.autocalibchannel=-1 #all done\n                    self.autocalibgainac=0\n                    for chan in range(num_chan_per_board*num_board):\n                        self.selectedchannel=chan\n                        self.tellswitchgain(chan)\n                        if self.minfirmwareversion<15: self.togglesupergainchan(chan)\n                    print(\"done with autocalibration \\a\") # beep!\n    \n    doxyplot=False\n    drawnxy=False\n    xychan=0\n    def drawxyplot(self,xdatanew,ydatanew,thechan):\n        if thechan==self.xychan: self.xydataforxaxis=ydatanew #the first channel will define the info on the x-axis\n        if thechan==(self.xychan+1):\n            if not self.drawnxy: # got to make the plot window the first time\n                #self.figxy, self.axxy = plt.subplots(1,1)\n                self.figxy.canvas.mpl_connect('close_event', self.handle_xy_close)\n                self.drawnxy=True\n                self.figxy.set_size_inches(6, 6, forward=True)\n                self.xyplot, = self.axxy.plot(self.xydataforxaxis,ydatanew) #scatter\n                self.figxy.canvas.set_window_title('XY display of channels '+str(self.xychan)+' and '+str(self.xychan+1))\n                self.axxy.set_xlabel('Channel '+str(self.xychan)+' Volts')\n                self.axxy.set_ylabel('Channel '+str(self.xychan+1)+' Volts')\n                self.axxy.set_xlim(self.min_y, self.max_y)\n                self.axxy.set_ylim(self.min_y, self.max_y)\n                self.axxy.grid()\n            #redraw the plot\n            self.figxy.canvas.set_window_title('XY display of channels '+str(self.xychan)+' and '+str(self.xychan+1))\n            self.axxy.set_xlabel('Channel '+str(self.xychan)+' Volts')\n            self.axxy.set_ylabel('Channel '+str(self.xychan+1)+' Volts')\n            self.xyplot.set_data(self.xydataforxaxis, ydatanew)\n            self.figxy.canvas.draw()\n    \n    recorddata=False\n    recordindex=0 # for recording data, the last N events, for the shaded persist display window\n    recordedchannel=[]\n    def dopersistplot(self,xdatanew,ydatanew):\n        self.min_x=xdatanew[0]; self.max_x=xdatanew[-1]\n        if len(self.recordedchannel)<=self.recordindex: self.recordedchannel.append(ydatanew)\n        else: self.recordedchannel[self.recordindex]=ydatanew\n        self.recordindex+=1\n        self.recorded2d,xaxes,yaxes = np.histogram2d( np.tile(xdatanew,len(self.recordedchannel)), np.concatenate(tuple(self.recordedchannel)), bins=[int(self.num_samples-1),int(256)], range=[[self.min_x,self.max_x],[self.min_y,self.max_y]] )\n        if self.recordindex>=self.recordedchannellength:\n            self.recordindex=0\n    \n    def plot_fft(self,bn): # pass in the board number\n        channumonboard = self.fftchan%num_chan_per_board # this is what channel (0--3) we want to draw fft from for the board\n        chanonboardnum = num_board - int(self.fftchan/num_chan_per_board) - 1 # this is what board (0 -- (num_board-1)) we want to draw that fft channel from\n        if bn==chanonboardnum: # select the right board check that the channel data is really there\n            twoforoversampling=1\n            if self.dooversample[self.fftchan]==1: twoforoversampling=2\n            if self.dooversample[self.fftchan]==9: twoforoversampling=4\n            y = self.xydata[self.fftchan][1] # channel signal to take fft of\n            n = len(y) # length of the signal\n            k = np.arange(n)\n            uspersample=(1.0/self.clkrate)*pow(2,max(self.downsample,0))/twoforoversampling # us per sample = 10 ns * 2^downsample, #downsample isn't less than 0 for xscaling\n            #t = np.arange(0,1,1.0/n) * (n*uspersample) # time vector in us\n            frq = (k/uspersample)[list(range(int(n/2)))]/n # one side frequency range up to Nyquist\n            Y = np.fft.fft(y)[list(range(int(n/2)))]/n # fft computing and normalization\n            Y[0]=0 # to suppress DC\n            if np.max(frq)<.001:\n                self.fftfreqplot_xdata = frq*1000000.0\n                self.fftax_xlabel = 'Freq (Hz)'\n                self.fftax_xlim = 1000000.0*frq[int(n/2)-1]\n            elif np.max(frq)<1.0:\n                self.fftfreqplot_xdata = frq*1000.0\n                self.fftax_xlabel = 'Freq (kHz)'\n                self.fftax_xlim = 1000.0*frq[int(n/2)-1]\n            else:\n                self.fftfreqplot_xdata = frq\n                self.fftax_xlabel = 'Freq (MHz)'\n                self.fftax_xlim = frq[int(n/2)-1]\n            self.fftfreqplot_ydata = abs(Y)\n            self.fftfreqplot_ydatamax = np.max(abs(Y))\n\n    lockindrawn=False\n    def plot_lockin(self):\n        trange=100\n        t=np.arange(trange)\n        if not self.lockindrawn: # just the first time, do some setup\n            self.lockiny1=np.zeros(trange)\n            self.lockiny2=np.zeros(trange)\n            if self.debuglockin: self.lockiny1o=np.zeros(trange) # offline float calculation\n            if self.debuglockin: self.lockiny2o=np.zeros(trange) # offline float calculation\n            self.lockindrawn=True\n            #self.lockinfig, self.lockinax = plt.subplots(2,1)\n            self.lockinfig.canvas.set_window_title('Lockin of channel '+str(2)+\" wrt \"+str(3))\n            self.lockinfig.canvas.mpl_connect('close_event', self.handle_lockin_close)\n\n            self.lockinamplplot, = self.lockinax[0].plot(t,self.lockiny1) # plotting the amplitude\n            self.lockinax[0].set_xlabel(' ')\n            self.lockinax[0].set_ylabel('Amplitude')\n            self.lockinphaseplot, = self.lockinax[1].plot(t,self.lockiny2) # plotting the phase\n            self.lockinax[1].set_xlabel(' ')\n            self.lockinax[1].set_ylabel('Phase')\n            if self.debuglockin:\n                self.lockinamplploto, = self.lockinax[0].plot(t,self.lockiny1o)# offline float calculation\n                self.lockinphaseploto, = self.lockinax[1].plot(t,self.lockiny2o)# offline float calculation\n            self.lockinfig.tight_layout()\n        else: # redrawing\n            self.lockiny1=np.roll(self.lockiny1,-1)\n            self.lockiny2=np.roll(self.lockiny2,-1)\n            if hasattr(self,'lockinamp'):\n                self.lockiny1[trange-1]=self.lockinamp\n                self.lockiny2[trange-1]=self.lockinphase\n            if self.debuglockin:\n                self.lockiny1o=np.roll(self.lockiny1o,-1)\n                self.lockiny2o=np.roll(self.lockiny2o,-1)\n                self.lockiny1o[trange-1]=self.lockinampo\n                self.lockiny2o[trange-1]=self.lockinphaseo\n                self.lockinamplploto.set_ydata(self.lockiny1o)\n                self.lockinphaseploto.set_ydata(self.lockiny2o)\n            self.lockinamplplot.set_xdata(t)\n            self.lockinphaseplot.set_xdata(t)\n            self.lockinamplplot.set_ydata(self.lockiny1)\n            self.lockinphaseplot.set_ydata(self.lockiny2)\n            self.lockinfig.canvas.set_window_title('Lockin of channel '+str(2)+\" wrt \"+str(3))\n\n    def getotherdata(self,board):\n        debug3=False\n        self.ser.write(bytearray([132])) #delay counter\n        num_other_bytes = 1\n        rslt = self.ser.read(num_other_bytes)\n        if len(rslt)==num_other_bytes:\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            if debug3: print(\"\\n delay counter data\",byte_array[0],\"from board\",board)\n            self.tdcdata=byte_array[0]\n            #if debug3: print \"other data\",bin(byte_array[0])\n        else: print(\"getotherdata asked for\",num_other_bytes,\"delay counter bytes and got\",len(rslt))\n        self.ser.write(bytearray([133])) #carry counter\n        num_other_bytes = 1\n        rslt = self.ser.read(num_other_bytes)\n        if len(rslt)==num_other_bytes:\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            if debug3: print(\" carry counter data\",byte_array[0],\"from board\",board)\n            #if debug3: print \"other data\",bin(byte_array[0])\n        else: print(\"getotherdata asked for\",num_other_bytes,\"carry counter bytes and got\",len(rslt))\n    \n    def to_int(self,n): # takes a 32 bit decimal number in two's complement and converts to a binary and then to a signed integer\n        bin = '{0:32b}'.format(n)\n        x = int(bin, 2)\n        if bin[0] == '1': # \"sign bit\", big-endian\n            x -= 2**len(bin)\n        return x\n    \n    def lockinanalyzedata(self,board):\n        if self.lockinanalyzedataboard!=board: return False\n        y2 = self.ydata[2] # channel 2 signal\n        y3 = self.ydata[3] # channel 3 signal\n        meany2=np.sum(y2)/self.num_samples\n        meany3=np.sum(y3)/self.num_samples\n        y2 = y2-meany2\n        y3 = y3-meany3\n        y3shifted = np.roll(y3,self.numtoshift)\n        res1=y2*y3\n        res2=y2*y3shifted\n        r1m=np.sum(res1)\n        r2m=np.sum(res2)\n        #print r1m,r2m\n        r1m/=4096.\n        r2m/=4096.\n        ampl = np.sqrt(r1m*r1m+r2m*r2m)\n        phase = 180.*np.arctan2(r2m,r1m)/np.pi\n        if self.debuglockin:\n            print(\"no window:  \",r1m.round(2), r2m.round(2), self.numtoshift, meany2.round(1),meany3.round(1))\n            print(ampl.round(2), phase.round(2), \"<------ offline no window\")\n        lowerwindowedge = self.numtoshift+1\n        upperwindowedge = self.num_samples-self.numtoshift\n        if self.debuglockin:\n            self.ydata[0]= y3shifted+127 # to see on screen, alter self.ydata here\n            self.ydata[0][0:lowerwindowedge] = np.zeros((lowerwindowedge,), dtype=np.int)+127\n            self.ydata[0][upperwindowedge:self.num_samples] = np.zeros((self.num_samples-upperwindowedge,), dtype=np.int)+127\n        y2window = y2[lowerwindowedge:upperwindowedge]\n        y3window = y3[lowerwindowedge:upperwindowedge]\n        y3shiftedwindow = y3shifted[lowerwindowedge:upperwindowedge]\n        res1window=y2window*y3window\n        res2window=y2window*y3shiftedwindow\n        r1mwindow=np.sum(res1window)\n        r2mwindow=np.sum(res2window)\n        if self.debuglockin: print(\"window:\",r1mwindow,r2mwindow)\n        r1mwindow/=4096.\n        r2mwindow/=4096.\n        amplwindow = np.sqrt(r1mwindow*r1mwindow+r2mwindow*r2mwindow)\n        phasewindow = 180.*np.arctan2(r2mwindow,r1mwindow)/np.pi\n        if self.debuglockin:\n            print(\"with window:\",r1mwindow.round(2), r2mwindow.round(2), self.numtoshift, meany2.round(1),meany3.round(1))\n            print(amplwindow.round(2), phasewindow.round(2), \"<------ offline with window\")\n        meany2float=np.mean(self.ydata[2])\n        meany3float=np.mean(self.ydata[3])\n        y3shiftedfloat = np.roll(self.ydata[3]-meany3float,self.numtoshift)\n        y2windowfloat = self.ydata[2][lowerwindowedge:upperwindowedge]-meany2float\n        y3windowfloat = self.ydata[3][lowerwindowedge:upperwindowedge]-meany3float\n        y3shiftedwindowfloat = y3shiftedfloat[lowerwindowedge:upperwindowedge]\n        res1windowfloat=y2windowfloat*y3windowfloat\n        res2windowfloat=y2windowfloat*y3shiftedwindowfloat\n        r1mwindowfloat=np.sum(res1windowfloat)\n        r2mwindowfloat=np.sum(res2windowfloat)\n        #print \"windowfloat:\",r1mwindowfloat,r2mwindowfloat\n        r1mwindowfloat/=4096.\n        r2mwindowfloat/=4096.\n        amplwindowfloat = np.sqrt(r1mwindowfloat*r1mwindowfloat+r2mwindowfloat*r2mwindowfloat)\n        phasewindowfloat = 180.*np.arctan2(r2mwindowfloat,r1mwindowfloat)/np.pi\n        if self.debuglockin:\n            print(\"float with window:\",r1mwindowfloat.round(2), r2mwindowfloat.round(2), self.numtoshift, meany2.round(1),meany3.round(1))\n            print(amplwindowfloat.round(2), phasewindowfloat.round(2), \"<------ offline with window float\\n\")\n        self.lockinampo = amplwindowfloat\n        self.lockinphaseo = phasewindowfloat\n\n    def getlockindata(self,board):\n            rslt = self.ser.read(16)\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            if len(rslt)==16:\n                r1_fpga = (256*256*256*byte_array[3]+256*256*byte_array[2]+256*byte_array[1]+byte_array[0])\n                r2_fpga =  (256*256*256*byte_array[7]+256*256*byte_array[6]+256*byte_array[5]+byte_array[4])\n                r1_fpga = self.to_int(r1_fpga)\n                r2_fpga = self.to_int(r2_fpga)\n                mean_c2 = (256*256*256*byte_array[11]+256*256*byte_array[10]+256*byte_array[9]+byte_array[8])\n                mean_c3 = (256*256*256*byte_array[15]+256*256*byte_array[14]+256*byte_array[13]+byte_array[12])\n                if self.debuglockin:\n                    print(byte_array[0:4], r1_fpga)\n                    print(byte_array[4:8], r2_fpga)\n                    print(byte_array[8:12], mean_c2)\n                    print(byte_array[12:16], mean_c3)\n                r1_fpga/=4096.\n                r2_fpga/=4096.\n                ampl_fpga = np.sqrt(r1_fpga*r1_fpga+r2_fpga*r2_fpga)\n                phase_fpga = 180.*np.arctan2(r2_fpga,r1_fpga)/np.pi\n                if self.lockinanalyzedataboard==board:\n                    self.lockinamp = ampl_fpga\n                    self.lockinphase = phase_fpga\n                if False:\n                    print(ampl_fpga.round(2), phase_fpga.round(2), \"<------ fpga \")\n            else: print(\"getlockindata asked for\",16,\"lockin bytes and got\",len(rslt),\"from board\",board)\n\n    usbsermap=[]\n    def makeusbsermap(self): # figure out which board is connected to which USB 2 connection\n        self.usbsermap= -1 * np.ones(num_board, dtype=int)\n        if len(self.usbser)<num_board:\n            print(\"There are only\",len(self.usbser),\"USB2 connections but\",num_board,\"boards requested!\")\n            return False\n        if self.dofastusb: padding = self.fastusbpadding\n        else: padding = 0\n        if len(self.usbser)>0:\n            for usb in np.arange(len(self.usbser)):\n                if self.dofastusb and useftd2xx: self.usbser[usb].setTimeouts(50,1000)\n                else: self.usbser[usb].timeout=.25 # lower the timeout on the connections, temporarily\n            foundusbs=[]\n            self.ser.write(bytearray([100])) # prime the trigger (for all boards)\n            for bn in range(num_board):\n                if self.minfirmwareversion>=17:\n                    self.ser.write(bytearray([51,bn]))\n                else:\n                    self.ser.write(bytearray([10+bn]))\n                foundit=False\n                time.sleep(0.25) #wait for an event to happen, which should be 0.2s (5 Hz rolling trigger)\n                for usb in range(len(self.usbser)):\n                    if not usb in foundusbs: # it's not already known that this usb connection is assigned to a board\n                        try:\n                            #print(time.time() - self.oldtime, \"trying usb\", usb)\n                            bwant = self.num_bytes+padding*num_chan_per_board\n                            if useftd2xx or not self.dofastusb: rslt = self.usbser[usb].read(bwant) # try to get data from the board\n                            elif useftdi: rslt = self.usbser[usb].read_data_bytes(bwant, ftdiattempts)\n                        except DeviceError as e:\n                            print(\"Exception Message:\", str(e))\n                            traceback.print_exc()\n                        except Exception as e:\n                            print(type(e).__name__, \"Error reading from USB2\", usb)\n                            return\n                        if len(rslt)==self.num_bytes+padding*num_chan_per_board:\n                            print(time.time() - self.oldtime,\"   got the right nbytes for board\",bn,\"from usb\",usb)\n                            self.usbsermap[bn]=usb\n                            foundusbs.append(usb) # remember that we already have figured out which board this usb connection is for, so we don't bother trying again for another board\n                            foundit=True\n                            if self.domt:\n                                self.usbser[usb].close()\n                                #print(\"sending usb number to process\")\n                                self.parent_conn[bn].send(self.usbsern[usb])\n                                #print(\"waiting for response from process\")\n                                msg = self.parent_conn[bn].recv()\n                                if msg != \"OK\": print(\"pro_\", bn, \"said\", msg)\n                            if self.checkfastusbwriting:\n                                rsltslow = self.ser.read(int(self.num_bytes))  # to cross-check the readout\n                                print(\"got\", len(rsltslow), \"bytes from slow serial readout\")\n                            break # already found which board this usb connection is used for, so bail out\n                        #else: print(time.time() - self.oldtime,\"   got the wrong nbytes\",len(rslt),\"for board\",bn,\"from usb\",usb)\n                    #else: print(\"   already know what usb\",usb,\"is for\")\n                if not foundit:\n                    print(\"could not find usb2 connection for board\",bn)\n                    return False\n            if not self.domt:\n                for usb in range(len(self.usbser)):\n                    if self.dofastusb and useftd2xx: self.usbser[usb].setTimeouts(1000, 1000)\n                    else: self.usbser[usb].timeout=self.sertimeout # put back the timeout on the connections\n        print(\"usbsermap is\",self.usbsermap)\n        return True\n\n    timedout = False\n    def getdata(self,board):\n        if not self.dousb or not self.dousbparallel:\n            if self.minfirmwareversion>=17:\n                self.ser.write(bytearray([51,board]))\n            else:\n                self.ser.write(bytearray([10 + board]))\n            if self.db: print(time.time()-self.oldtime,\"asked for data from board\",board)\n            if self.dolockin: self.getlockindata(board)\n        padding = 0\n        endpadding = 0\n        if self.dousb:\n            try:\n                #self.ser.write(bytearray([40+board])) # for debugging timing, does nuttin\n                if self.dofastusb:\n                    padding = self.fastusbpadding\n                    endpadding = self.fastusbendpadding\n                    nb=int((self.num_bytes+padding*num_chan_per_board))\n                    #for n in range(0,4):\n                    if self.db: print(time.time() - self.oldtime, \"read data from board\",board,\"nb\",nb)\n                    if useftd2xx: rslt = self.usbser[self.usbsermap[board]].read(nb)#,cache=True)\n                    elif useftdi: rslt = self.usbser[self.usbsermap[board]].read_data_bytes(nb,ftdiattempts)\n                    if self.db: print(time.time() - self.oldtime, \"read data from board\",board,\"done\")\n                    if not self.dologicanalyzer and useftd2xx and not self.flyingfast:\n                        nq =  self.usbser[self.usbsermap[board]].getQueueStatus()\n                        if nq > 0:\n                            print(nq, \"bytes still available for usb on board\", board, \"...purging\")\n                            if useftd2xx: self.usbser[self.usbsermap[board]].purge(ftd.defines.PURGE_RX)\n                            elif useftdi: self.usbser[self.usbsermap[board]].purge_rx_buffer()\n                    if self.checkfastusbwriting:\n                        rsltslow = self.ser.read(int(self.num_bytes)) # to cross-check the readout\n                        #print(\"got\",len(rsltslow),\"bytes from slow serial readout\")\n                else:\n                    rslt = self.usbser[self.usbsermap[board]].read(self.num_bytes)\n                # self.ser.write(bytearray([40+board])) # for debugging timing, does nuttin\n            except DeviceError as e:\n                print(\"Exception occurred in getdata()\")\n                traceback.print_exc()\n                raise DeviceError(str(e))\n            except Exception as e:\n                print(type(e).__name__, \"Error reading from USB2\", self.usbsermap[board])\n                return\n        else:\n            rslt = self.ser.read(int(self.num_bytes))\n        if self.flyingfast: return\n        if self.db: print(time.time()-self.oldtime,\"getdata wanted\",self.num_bytes+padding*num_chan_per_board,\"bytes and got\",len(rslt),\"from board\",board)\n        if len(rslt)==self.num_bytes+padding*num_chan_per_board:\n            #self.timedout = False # we assume it is False already\n            #byte_arrayold = unpack('%dB' % len(rslt), rslt)  # Convert serial data to array of numbers\n            #self.ydataold=np.reshape(byte_arrayold,(num_chan_per_board,self.num_samples)) #slow!\n            self.ydata=[ np.frombuffer(rslt,dtype=np.int8,count=self.num_samples,offset=0*self.num_samples+1*padding-endpadding), #need the int8 type because we'll later subtract it from 127 to flip it over\n                         np.frombuffer(rslt,dtype=np.int8,count=self.num_samples,offset=1*self.num_samples+2*padding-endpadding),\n                         np.frombuffer(rslt,dtype=np.int8,count=self.num_samples,offset=2*self.num_samples+3*padding-endpadding),\n                         np.frombuffer(rslt,dtype=np.int8,count=self.num_samples,offset=3*self.num_samples+4*padding-endpadding) ]\n            if self.checkfastusbwriting:\n                self.yrsltslow = [np.frombuffer(rsltslow, dtype=np.int8, count=self.num_samples,offset=0 * self.num_samples),\n                              np.frombuffer(rsltslow, dtype=np.int8, count=self.num_samples,offset=1 * self.num_samples),\n                              np.frombuffer(rsltslow, dtype=np.int8, count=self.num_samples,offset=2 * self.num_samples),\n                              np.frombuffer(rsltslow, dtype=np.int8, count=self.num_samples,offset=3 * self.num_samples)]\n                for c in range(num_chan_per_board):\n                    if (self.ydata[c][1:len(self.ydata[c])] == self.yrsltslow[c][1:len(self.yrsltslow[c])]).all():\n                        pass\n                        #print(\"yrsltslow crosscheck for channel\",c,\"passed\")\n                    else:\n                        print(\"yrsltslow crosscheck for channel\",c,\"failed!\")\n                        print(self.ydata[c])\n                        print(self.yrsltslow[c])\n            #print(127-self.ydataold[0])\n            #print(127-self.ydata[0])\n            #self.ser.write(bytearray([40 + board]))  # for debugging timing, does nuttin\n            if self.dooversample[num_chan_per_board*(num_board-board-1)]: self.oversample(0,2)\n            if self.dooversample[num_chan_per_board*(num_board-board-1)+1]: self.oversample(1,3)\n            if self.dooversample[num_chan_per_board*(num_board-board-1)]==9: self.overoversample(0,1)\n        else:\n            self.timedout = True\n            if not self.db and self.rollingtrigger: print(\"getdata asked for\",self.num_bytes,\"bytes and got\",len(rslt),\"from board\",board)\n        if self.dologicanalyzer:\n            #get extra logic analyzer data, if needed\n            logicbytes=int(self.num_bytes/num_chan_per_board)\n            if self.dousb:\n                try:\n                    if self.dofastusb:\n                        padding = self.fastusbpadding\n                        endpadding = self.fastusbendpadding\n                        nb = logicbytes + padding\n                        if useftd2xx: rslt = self.usbser[self.usbsermap[board]].read(nb)#,cache=True)\n                        elif useftdi: rslt = self.usbser[self.usbsermap[board]].read_data_bytes(nb,ftdiattempts)\n                        if useftd2xx:\n                            nq = self.usbser[self.usbsermap[board]].getQueueStatus()\n                            if nq > 0:\n                                print(nq, \"bytes still available for usb on board\", board, \"...purging\")\n                                self.usbser[self.usbsermap[board]].purge(ftd.defines.PURGE_RX)\n                    else:\n                        rslt = self.usbser[self.usbsermap[board]].read(logicbytes)\n                except DeviceError as e:\n                    print(\"Exception Message:\", str(e))\n                    traceback.print_exc()\n                except Exception as e:\n                    print(type(e).__name__, \"Error reading from USB2\", self.usbsermap[board])\n                    return\n            else:\n                rslt = self.ser.read(logicbytes)\n            if self.db: print(time.time()-self.oldtime,\"getdata wanted\",logicbytes,\"logic bytes and got\",len(rslt),\"from board\",board)\n            if len(rslt)==logicbytes+padding:\n                self.ydatalogic=np.frombuffer(rslt,dtype=np.uint8,count=self.num_samples,offset=padding-endpadding)\n            else:\n                if not self.db and self.rollingtrigger: print(\"getdata asked for\",logicbytes,\"logic bytes and got\",len(rslt),\"from board\",board)\n\n    def oversample(self,c1,c2):\n        tempc1=127-self.ydata[c1]\n        tempc2=127-self.ydata[c2]\n        adjustmeanandrms=True\n        if adjustmeanandrms:\n            mean_c1 = np.mean(tempc1)\n            rms_c1 = np.sqrt(np.mean((tempc1-mean_c1)**2))\n            mean_c2 = np.mean(tempc2)\n            rms_c2 = np.sqrt(np.mean((tempc2-mean_c2)**2))\n            meanmean=(mean_c1+mean_c2)/2.\n            if rms_c1>0. and rms_c2>0.:\n                meanrms=(rms_c1+rms_c2)/2.\n                tempc1=meanrms*(tempc1-mean_c1)/rms_c1 + meanmean\n                tempc2=meanrms*(tempc2-mean_c2)/rms_c2 + meanmean\n            else:\n                tempc1 = (tempc1 - mean_c1) + meanmean\n                tempc2 = (tempc2 - mean_c2) + meanmean\n            #print(mean_c1, mean_c2, rms_c1, rms_c2)\n        tempc1 = -(tempc1 - 127)  #flip back over\n        tempc2 = -(tempc2 - 127)  #flip back over\n        ns=self.num_samples\n        mergedsamps=np.empty(ns*2,dtype=np.int8)\n        mergedsamps[0:ns*2:2]=tempc2 # a little tricky which is 0 and which is 1 (i.e. which is sampled first!)\n        mergedsamps[1:ns*2:2]=tempc1\n        self.ydata[c1]=mergedsamps[0:ns]\n        self.ydata[c2]=mergedsamps[ns:ns*2]\n    \n    def overoversample(self,c1,c2): # TODO: probably needs similar flipping of data as in oversample()\n        tempc1=np.concatenate([self.ydata[c1],self.ydata[c1+2]])\n        tempc2=np.concatenate([self.ydata[c2],self.ydata[c2+2]])\n        adjustmeanandrms=True\n        if adjustmeanandrms:\n            mean_c1 = np.mean(tempc1)\n            rms_c1 = np.sqrt(np.mean((tempc1-mean_c1)**2))\n            mean_c2 = np.mean(tempc2)\n            rms_c2 = np.sqrt(np.mean((tempc2-mean_c2)**2))\n            meanmean=(mean_c1+mean_c2)/2.\n            meanrms=(rms_c1+rms_c2)/2.\n            tempc1=meanrms*(tempc1-mean_c1)/rms_c1 + meanmean\n            tempc2=meanrms*(tempc2-mean_c2)/rms_c2 + meanmean\n            #print(mean_c1, mean_c2, rms_c1, rms_c2)\n        ns=int(2*self.num_samples)\n        mergedsamps=np.empty(ns*2,dtype=np.int8)\n        mergedsamps[0:ns*2:2]=tempc2 # a little tricky which is 0 and which is 1 (i.e. which is sampled first!)\n        mergedsamps[1:ns*2:2]=tempc1\n        self.ydata[c1]=mergedsamps[0:int(ns/2)]\n        self.ydata[c2]=mergedsamps[int(ns/2):ns]\n        self.ydata[c1+2]=mergedsamps[ns:int(3*ns/2)]\n        self.ydata[c2+2]=mergedsamps[int(3*ns/2):(ns*2)]\n    \n    def getmax10adc(self,bn):\n        chansthisboard = [(x,y) for (x,y) in max10adcchans if x==bn]\n        if self.db: print(time.time()-self.oldtime,\"getting\",chansthisboard)\n        for chans in chansthisboard:\n            chan=chans[1]\n            #chan: 110=ain1, 111=pin6, ..., 118=pin14, 119=temp\n            self.ser.write(bytearray([chan]))\n            if self.db: print(time.time()-self.oldtime,\"getting max10adc chan\",chan,\"for bn\",bn)\n            rslt = self.ser.read(self.nsamp*2) #read N bytes (2 per sample)\n            if self.db: print(time.time()-self.oldtime,\"getmax10adc got bytes:\",len(rslt))\n            if len(rslt)!=(self.nsamp*2):\n                if self.rollingtrigger: print(time.time()-self.oldtime,\"getmax10adc got bytes:\",len(rslt),\"for board\",bn,\"and chan\",chan)\n                return\n            byte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\n            db2=False #True #False\n            self.ysampdata[self.max10adcchan-1]=np.add(np.multiply(256,byte_array[1:2*self.nsamp:2]),byte_array[0:2*self.nsamp:2])\n            self.ysampdata[self.max10adcchan-1]/=16\n            if db2:\n                for samp in np.arange(10):\n                    code=256*byte_array[1+2*samp]+byte_array[2*samp]\n                    self.ysampdata[self.max10adcchan-1][samp]=code/16\n                    if chan==119:\n                        temp=-3.056e-4*code*code+1.763*code-2325.049\n                        print(samp,chan,code,round(temp,1),\"C\",round(temp*1.8+32,1),\"F\")\n                    else: print(samp,chan,code,round( (3.3*code)/pow(2,12) ,4),\"V\")\n            self.on_running(self.ysampdata[self.max10adcchan-1], -self.max10adcchan)\n            self.max10adcchan+=1\n\n    oldtime=time.time()\n    oldtime2=time.time()\n    def getchannels(self):\n        if self.db: print(time.time() - self.oldtime, \"getchannels\")\n        if self.dousb and self.dousbparallel:\n            if self.minfirmwareversion>=17:\n                self.ser.write(bytearray([100,51,255])) # prime, then get data... 255 gets data from ALL boards\n            else:\n                print(\"You need firmware >17 for USBparallel reading!\")\n            if self.db: print(time.time()-self.oldtime,\"asked for data from all boards\")\n        elif not self.autorearm:\n            if self.db: print(time.time()-self.oldtime,\"priming trigger\")\n            self.ser.write(bytearray([100]))\n        status = 0\n        self.timedout=False\n        self.max10adcchan=1\n        if self.domt:\n            for bn in range(num_board):\n                if self.db: print(time.time()-self.oldtime,\"getting board\",bn)\n                try:\n                    self.parent_conn[bn].send([self.num_samples, self.fastusbpadding, self.fastusbendpadding, self.yscale, self.dologicanalyzer, self.rollingtrigger])\n                except:\n                    print(\"could not send message to receiver\",bn,\"- Exiting!\")\n                    sys.exit(-3)\n                xboardshift=(11.0*bn/8.0)/pow(2,max(self.downsample,0)) # shift the board data to the right by this number of samples (to account for the readout delay) #downsample isn't less than 0 for xscaling\n                xdatanew = (self.xdata-xboardshift-self.num_samples/2.)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling) #downsample isn't less than 0 for xscaling\n                xdatanew = xdatanew[1:len(xdatanew)]\n                for l in range(num_chan_per_board): self.xydata[bn*num_chan_per_board+l][0]=xdatanew # for printing out or other analysis\n                if self.db: print(time.time()-self.oldtime,\"done with board\",bn)\n            for bn in range(num_board):\n                msg = self.parent_conn[bn].recv()\n                if msg != \"OK\": print(\"pro_\", bn, \"said\", msg)\n                self.getmax10adc(bn)  # get data from 1 MHz Max10 ADC channels\n                if self.dogetotherdata: self.getotherdata(bn)  # get other data, like TDC info, or other bytes\n                if self.dofft: self.plot_fft(bn)  # do the FFT plot\n                if self.dologicanalyzer:\n                    xlogicshift=12.0/pow(2,max(self.downsample,0)) # shift the logic analyzer data to the right by this number of samples (to account for the ADC delay) #downsample isn't less than 0 for xscaling\n                    xdatanew = (self.xdata+xlogicshift-self.num_samples/2.)*(1000.0*pow(2,max(self.downsample,0))/self.clkrate/self.xscaling) #downsample isn't less than 0 for xscaling\n                    theboard = num_board - 1 - int(self.selectedchannel / num_chan_per_board)\n                    if bn==theboard and self.dodrawing:\n                        b = np.unpackbits(self.xydatalogicraw)\n                        for l in np.arange(self.num_logic_inputs):\n                            bl=b[7-l::8] # every 8th bit, starting at 7-l\n                            ydatanew = bl*.3 + (l+1)*3.2/8. # scale it and shift it\n                            self.xydatalogic[l][0]=xdatanew\n                            self.xydatalogic[l][1]=ydatanew\n        else: # not mt\n            for bn in np.arange(num_board):\n                if self.db: print(time.time()-self.oldtime,\"getting board\",bn)\n                self.getdata(bn) #this sets all boards before this board into serial passthrough mode, so this and following calls for data will go to this board and then travel back over serial\n                if self.db: print(time.time() - self.oldtime, \"got data from board\",bn)\n                if self.flyingfast: continue # to test flying fast\n                self.getmax10adc(bn) # get data from 1 MHz Max10 ADC channels\n                if self.dogetotherdata: self.getotherdata(bn) # get other data, like TDC info, or other bytes\n                if self.dofft: self.plot_fft(bn) #do the FFT plot\n                if self.dolockin and self.debuglockin:\n                    if sendincrement==0: self.lockinanalyzedata(bn)\n                    else: print(\"you need to set sendincrement = 0 first before debugging lockin info\"); return False\n                if self.dolockin and self.dolockinplot: self.plot_lockin()\n                self.on_running(self.ydata, bn) #update data in main window\n                if self.db: print(time.time()-self.oldtime,\"done with board\",bn)\n        status=1\n        if self.minfirmwareversion>=15 and self.dodrawing and self.rollingtrigger and self.doswitchdata: #v9.0 and up\n            thetime2=time.time()\n            elapsedtime=thetime2-self.oldtime2\n            if elapsedtime>1.0:\n                if not self.havereadswitchdata: self.switchpos = [0] * num_board\n                for b in range(num_board): self.getswitchdata(b) #gets the dpdt switch positions\n                self.havereadswitchdata=True\n                self.oldtime2=thetime2\n                status=2\n        return status\n\n    #get the positions of the dpdt switches from IO expander 2B, and then take action (v9.0 and up!)\n    havereadswitchdata=False\n    switchdebug = False\n    def getswitchdata(self,board):\n        if self.minfirmwareversion>=17:\n            self.ser.write(bytearray([53,board]))  # make the next board active (serial_passthrough 0)\n        else:\n            self.ser.write(bytearray([30+board])) #make the next board active (serial_passthrough 0)\n        self.ser.write(bytearray([146])) #request the IO expander data - takes about 2ms to send the command and read the i2c data\n        self.ser.write(bytearray([33])) # from 2B\n        self.ser.write(bytearray([19])) # from 2B\n        self.ser.write(bytearray([board])) # for board number...\n        rslt = self.ser.read(1)\n        if len(rslt)>0:# and i==1:\n            byte_array = unpack('%dB'%len(rslt),rslt)\n            if self.switchdebug: print(\"i2c data from board\",board,\"IO 2B\",bin(byte_array[0]))\n            newswitchpos=byte_array[0]\n            if newswitchpos!=self.switchpos[board] or not self.havereadswitchdata:\n                for b in range(8):\n                    if self.testBit(newswitchpos,b) != self.testBit(self.switchpos[board],b) or not self.havereadswitchdata:\n                        if self.switchdebug: print(\"switch\",b,\"is now\",self.testBit(newswitchpos,b))\n                        #switch 0-3 is 50/1M Ohm termination on channels 0-3, on is 1M, off is 50\n                        #switch 4-7 is super/normal gain on channels 0-3, on is super, off is normal\n                        if b>=4:\n                            thechan=b-4+(num_board-board-1)*num_chan_per_board\n                            if self.supergain[thechan] and self.testBit(newswitchpos,b)>0:\n                                self.togglesupergainchan(thechan)\n                            if not self.supergain[thechan] and not self.testBit(newswitchpos,b)>0:\n                                self.togglesupergainchan(thechan)\n                self.switchpos[board] = newswitchpos\n    \n    #initialization\n    def init(self):\n            if num_board>10: # you'd better have firmware >=17 for this!\n                self.ser.write(bytearray([50, 0]))  # tell them their IDs... first one gets 0, next gets 1, ...\n                self.ser.write(bytearray([52, (num_board - 1)]))  # tell them which is the last board\n            else:\n                self.ser.write(bytearray([0]))  # tell them their IDs... first one gets 0, next gets 1, ...\n                self.ser.write(bytearray([20 + (num_board - 1)]))  # tell them which is the last board\n            for b in range(num_board):\n                firmwareversion = self.getfirmwareversion(b)\n                if firmwareversion<self.minfirmwareversion: self.minfirmwareversion=firmwareversion\n            print(\"minimum firmwareversion of all boards is\",self.minfirmwareversion)\n            self.maxdownsample=15 # slowest I can run\n            if self.minfirmwareversion>=5: #updated firmware\n                self.maxdownsample=min(15 +(max_ram_width-ram_width), 18) # can add max_ram_width-ram_width when using newer firmware, but not more than 22\n            self.yscale = 7.5 # Vpp for full scale\n            if self.minfirmwareversion>=15: #v9.0 boards\n                self.yscale*=1.1 # if we used 10M / 1.1M / 11k input resistors\n            self.min_y = -self.yscale/2. #-4.0 #0 ADC\n            self.max_y = self.yscale/2. #4.0 #256 ADC\n            self.tellrolltrig(self.rolltrigger)\n            #self.donoselftrig()\n            #self.toggle_checkfastusbwriting()\n            self.tellsamplesmax10adc()\n            self.tellsamplessend()\n            self.tellbytesskip()\n            self.telldownsample(self.downsample)\n            self.togglehighres()\n            self.settriggertime(self.triggertimethresh)\n            self.tellserialdelaytimerwait()\n            self.tellSPIsetup(0) #0.9V CM but not connected\n            self.tellSPIsetup(11) #offset binary output\n            self.tellSPIsetup(22) #20:50 #22:150 #24:300 Ohm termination ChA\n            self.tellSPIsetup(23) #21:50 #23:150 #25:300 Ohm termination ChB\n            #self.tellSPIsetup(30) # multiplexed output\n            self.tellSPIsetup(32) # non-multiplexed output (less noise)\n            self.setupi2c() # sets all ports to be outputs\n            if self.dofastusb: self.toggle_fastusb()\n            self.toggledousb() # switch to USB2 connection for readout of events, if available\n            self.xydata=np.empty([int(num_chan_per_board*num_board),2,int(self.num_samples-1)],dtype=float)\n            self.xydataslow=np.empty([len(max10adcchans),2,int(self.nsamp)],dtype=float)\n            self.xydatalogic=np.empty([8,2,int(self.num_samples)],dtype=float)\n            self.xydatalogicraw=np.empty([num_board,int(self.num_samples)],dtype=np.uint8) # the raw 8 digital input bits from each board for each sample - the x time values are in self.xydatalogic[0][0]\n            if self.domt:\n                self.xydata_array = multiprocessing.RawArray(\"f\", self.xydata.size * 2)  # a float is 2 bytes\n                self.xydata = np.frombuffer(self.xydata_array, dtype=float).reshape(self.xydata.shape)\n                self.xydatalogicraw_array = multiprocessing.RawArray(\"B\", self.xydatalogicraw.size)  # a byte is 1 byte\n                self.xydatalogicraw = np.frombuffer(self.xydatalogicraw_array, dtype=np.uint8).reshape(self.xydatalogicraw.shape)\n                self.parent_conn=[]\n                multiprocessing.set_start_method('spawn')\n                for bn in range(num_board):\n                    parent_conn, child_conn = multiprocessing.Pipe()\n                    self.parent_conn.append(parent_conn)\n                    pro = multiprocessing.Process(target=receiver, args=(bn, child_conn,\n                                                                         self.fastusbpadding,self.num_samples,\n                                                                         self.xydata.shape,self.xydata_array,\n                                                                         self.xydatalogicraw.shape,self.xydatalogicraw_array))\n                    print(\"   starting process\",bn)\n                    pro.start()\n            if self.dousb:\n                if not self.makeusbsermap(): return False # figure out which usb connection has which board's data\n            self.getIDs() # get the unique ID of each board, for calibration etc.\n            self.readcalib() # get the calibrated DAC values for each board; if it fails then use defaults\n            if self.dotriggercounter > 0 and self.minfirmwareversion >= 22: # initialize the trigger rate counter to 0\n                self.mymod = 0\n                if self.rollingtrigger: self.gettrigratecounter()\n                self.trigratecounter = []\n            return True\n    \n    #cleanup\n    def cleanup(self):\n        try:\n            self.setbacktoserialreadout()\n            self.resetchans()\n            if self.noselftrig: self.donoselftrig()\n            if self.autorearm: self.toggleautorearm()\n            if self.dohighres: self.togglehighres()\n            if self.useexttrig: self.toggleuseexttrig()\n            if self.dologicanalyzer: self.togglelogicanalyzer()\n            if self.dofastusb: self.toggle_fastusb()\n            if self.checkfastusbwriting: self.toggle_checkfastusbwriting()\n            if self.serport!=\"\" and hasattr(self,'ser'):\n                self.shutdownadcs()\n                if not self.domt:\n                    for p in self.usbser: p.close()\n                self.ser.close()\n        except SerialException:\n            print(\"failed to talk to board when cleaning up!\")\n        if self.domt:\n            for bn in range(num_board): self.parent_conn[bn].send(\"END\")\n        print(\"bye bye!\")\n    \n    #For setting up serial and USB connections\n    def setup_connections(self):\n        adjustedbrate=1./(1./self.brate+2.*self.serialdelaytimerwait*1.e-6/(32.*11.)) # delay of 2*serialdelaytimerwait microseconds every 32*11 bits\n        serialrate=adjustedbrate/11./(self.num_bytes*num_board+len(max10adcchans)*2*self.nsamp) #including start+2stop bits\n        print(\"rate theoretically\",round(serialrate,2),\"Hz over serial\")\n        ports = list(serial.tools.list_ports.comports()); ports.sort(reverse=True)\n        autofindusbports = len(self.usbport)==0 and not self.dofastusb\n        if self.serport==\"\" or True:\n            for port_no, description, address in ports:\n                print(port_no,\":\",description,\":\",address)\n                if self.serport==\"\":\n                    if '1A86:7523' in address or '1a86:7523' in address: self.serport = port_no\n                if self.trigserport==\"\":\n                    if '10C4:EA60' in address or '10c4:ea60' in address or 'CP2102 USB to UART Bridge Controller' in description: self.trigserport = port_no\n                if autofindusbports:\n                    if \"Haasoscope\" in description or \"0403:6014\" in address: self.usbport.append(port_no)\n        if self.serport!=\"\":\n            try:\n                self.ser = Serial(self.serport,self.brate,timeout=self.sertimeout,stopbits=2)\n            except SerialException:\n                print(\"Could not open\",self.serport,\"!\"); return False\n            print(\"connected serial to\",self.serport,\", timeout\",self.sertimeout,\"seconds\")\n        else: self.ser=\"\"\n        for p in self.usbport:\n            try:\n                self.usbser.append(Serial(p,8*4000000,timeout=self.sertimeout))\n            except SerialException:\n                print(\"Could not open\",p,\"!\"); return False\n            print(\"connected USBserial to\",p,\", 32Mb/s, timeout\",self.sertimeout,\"seconds\")\n        if enable_fastusb and self.dofastusb and useftd2xx and ftd.listDevices():\n            for ftd_n in range(len(ftd.listDevices())):\n                if str(ftd.getDeviceInfoDetail(ftd_n)[\"description\"]).find(\"Haasoscope\")>=0:\n                    ftd_d = ftd.open(ftd_n)\n                    print(\"Adding ftd usb2 device:\",ftd_d.getDeviceInfo())\n                    ftd_d.setTimeouts(1000, 1000)\n                    ftd_d.setBitMode(0xff, 0x40)\n                    ftd_d.setUSBParameters(0x10000, 0x10000)\n                    ftd_d.setLatencyTimer(1)\n                    ftd_d.purge(ftd.defines.PURGE_RX)\n                    ftd_d.purge(ftd.defines.PURGE_TX)\n                    self.usbser.append(ftd_d)\n                    self.usbsern.append(ftd_n)\n        elif self.dofastusb and useftdi:\n            for devi in Ftdi.list_devices():\n                if str(devi[0].description).find(\"Haasoscope\") >= 0:\n                    ftd_n = devi[0].sn\n                    ftd_d = Ftdi.create_from_url(\"ftdi://::\"+ftd_n+\"/1\")\n                    print(\"Adding ftdi usb2 device:\", ftd_n)\n                    ftd_d.reset()\n                    # ftd_d.ftdi_fn.setTimeouts(1000, 1000)\n                    ftd_d.set_bitmode(0xff,Ftdi.BitMode.SYNCFF)\n                    ftd_d.read_data_set_chunksize( int((self.num_bytes + self.fastusbpadding*num_chan_per_board) * 514/512 + 100) )\n                    ftd_d.set_latency_timer(1)\n                    ftd_d.purge_buffers()\n                    self.usbser.append(ftd_d)\n                    self.usbsern.append(ftd_n)\n        if self.serport==\"\": print(\"No serial COM port opened!\"); return False\n        return True\n\ndef receiver(name, conn, padding,num_samples,xydata_shape,xydata_array,xydatalogicraw_shape,xydatalogicraw_array):\n    usb = None\n    board=name\n    num_chan_per_board=4\n    xydata=np.frombuffer(xydata_array, dtype=float).reshape(xydata_shape)\n    xydatalogicraw = np.frombuffer(xydatalogicraw_array, dtype=np.dtype('b')).reshape(xydatalogicraw_shape)\n    olddologic=False\n    num_bytes = num_samples*num_chan_per_board\n    fastusbpadding=padding\n    print(\"   receiver for board\", name)\n    while True:\n        msg = conn.recv()\n        #print(\"   received message:\", msg)\n        if msg == \"END\":\n            if usb!=None:\n                usb.close()\n            break\n\n        returnmsg = \"OK\"\n        if usb == None:\n            if useftd2xx:\n                ftd_d = ftd.open(msg)\n                print(\"   adding ftd usb2 device:\", ftd_d.getDeviceInfo())\n                ftd_d.setTimeouts(1000, 1000)\n                ftd_d.setBitMode(0xff, 0x40)\n                ftd_d.setUSBParameters(0x10000, 0x10000)\n                ftd_d.setLatencyTimer(1)\n                ftd_d.purge(ftd.defines.PURGE_RX)\n                ftd_d.purge(ftd.defines.PURGE_TX)\n                usb=ftd_d\n            elif useftdi:\n                ftd_n = str(msg)\n                print(\"Adding ftdi usb2 device:\", ftd_n)\n                ftd_d = Ftdi.create_from_url(\"ftdi://::\" + ftd_n + \"/1\")\n                ftd_d.reset()\n                # ftd_d.ftdi_fn.setTimeouts(1000, 1000)\n                ftd_d.set_bitmode(0xff, Ftdi.BitMode.SYNCFF)\n                ftd_d.read_data_set_chunksize( int((num_bytes + fastusbpadding*num_chan_per_board) * 514/512 + 100) )\n                ftd_d.set_latency_timer(1)\n                ftd_d.purge_buffers()\n                usb=ftd_d\n        else:\n            num_samples = int(msg[0])\n            padding = int(msg[1])\n            endpadding = int(msg[2])\n            yscale = float(msg[3])\n            dologicanalyzer = int(msg[4])\n            rollingtrigger = int(msg[5])\n            num_bytes = num_samples * num_chan_per_board\n            timedout = False\n            if useftdi:\n                if dologicanalyzer and dologicanalyzer!=olddologic:\n                    olddologic=dologicanalyzer\n                    usb.read_data_set_chunksize( int((num_bytes + fastusbpadding*num_chan_per_board) * 514/512 * 5/4 + 100) )\n                elif not dologicanalyzer and dologicanalyzer!=olddologic:\n                    olddologic=dologicanalyzer\n                    usb.read_data_set_chunksize( int((num_bytes + fastusbpadding*num_chan_per_board) * 514/512 + 100) )\n            try:\n                nb = num_bytes+padding*num_chan_per_board\n                if useftd2xx: rslt = usb.read(nb)#,cache=True)\n                elif useftdi: rslt = usb.read_data_bytes(nb, ftdiattempts)\n                if not dologicanalyzer and useftd2xx:\n                    nq = usb.getQueueStatus()\n                    if nq > 0:\n                        print(nq, \"bytes still available for usb on board\", board, \"...purging\")\n                        if useftd2xx: usb.purge(ftd.defines.PURGE_RX)\n                        elif useftdi: usb.purge_rx_buffer()\n            except ftd.DeviceError as msgnum:\n                print(\"Error reading from USB2 on board\", board, msgnum)\n                returnmsg = \"read err\"\n            if len(rslt)==num_bytes+padding*num_chan_per_board:\n                timedout = False\n                ydata=[ np.frombuffer(rslt,dtype=np.int8,count=num_samples,offset=0*num_samples+1*padding-endpadding), #need the int8 type because we'll later subtract it from 127 to flip it over\n                             np.frombuffer(rslt,dtype=np.int8,count=num_samples,offset=1*num_samples+2*padding-endpadding),\n                             np.frombuffer(rslt,dtype=np.int8,count=num_samples,offset=2*num_samples+3*padding-endpadding),\n                             np.frombuffer(rslt,dtype=np.int8,count=num_samples,offset=3*num_samples+4*padding-endpadding) ]\n                #if dooversample[num_chan_per_board*(num_board-board-1)]: oversample(0,2)\n                #if dooversample[num_chan_per_board*(num_board-board-1)+1]: oversample(1,3)\n                #if dooversample[num_chan_per_board*(num_board-board-1)]==9: overoversample(0,1)\n            else:\n                timedout = True\n                if rollingtrigger:\n                    print(\"getdata asked for\",num_bytes+padding*num_chan_per_board,\"bytes and got\",len(rslt),\"from board\",board)\n                    returnmsg = \"read timeout\"\n            if dologicanalyzer and not timedout:\n                #get extra logic analyzer data, if needed\n                logicbytes=int(num_bytes/num_chan_per_board)\n                try:\n                    nb= logicbytes + padding\n                    if useftd2xx: rslt = usb.read(nb)  # ,cache=True)\n                    elif useftdi: rslt = usb.read_data_bytes(nb, ftdiattempts)\n                    if useftd2xx:\n                        nq = usb.getQueueStatus()\n                        if nq > 0:\n                            print(nq, \"bytes still available for usb on board\", board, \"...purging\")\n                            usb.purge(ftd.defines.PURGE_RX)\n                except ftd.DeviceError as msgnum:\n                    print(\"Error reading from USB2 on board\", board, msgnum)\n                    returnmsg = \"read err\"\n                if len(rslt)==logicbytes+padding:\n                    ydatalogic=np.frombuffer(rslt,dtype=np.uint8,count=num_samples,offset=padding-endpadding)\n                else:\n                    if rollingtrigger:\n                        print(\"getdata asked for\",logicbytes+padding,\"logic bytes and got\",len(rslt),\"from board\",board)\n                        returnmsg = \"read timeout\"\n\n            for l in range(4): #this draws the 4 fast ADC data channels for each board\n                ydatanew=(127-ydata[l])*(yscale/256.) # got to flip it, since it's a negative feedback op amp\n                ydatanew = ydatanew[1:len(ydatanew)]\n                xydata[l + board*num_chan_per_board][1]=ydatanew\n\n            if dologicanalyzer:\n                xydatalogicraw[board] = ydatalogic\n\n        #print(\"   sending\",returnmsg)\n        conn.send(returnmsg)\n"
  },
  {
    "path": "software/libs/HaasoscopeTrigLibQt.py",
    "content": "from serial import Serial\nfrom struct import unpack\nimport random\n\nprint(\"Loading HaasoscopeTrigLibQt.py\")\n\nclass HaasoscopeTrig:\n\n    def __init__(self,port):\n        self.ser=Serial(port,921600,timeout=0.2)\n        self.extclock=0\n        self.histostosend=-1\n        self.dorolling=1\n        print(\"connected trigboard serial to\", port)\n    \n    def togglerolling(self):\n        self.dorolling = not self.dorolling\n        self.ser.write(bytearray([13]))  # toggle rolling\n        print(\"trigboard rolling is now\",self.dorolling)\n\n    def setclock(self, wantactiveclock): # True for wanting sync with external clock\n        self.extclock = 0\n        self.ser.write(bytearray([8]))  # active clock info\n        res = self.ser.read(1)\n        if len(res)==0: return\n        b = unpack('%dB' % len(res), res)\n        print(\"trig board was using clock\", b[0])\n        self.extclock = b[0]\n        if wantactiveclock and not self.extclock:\n            self.ser.write(bytearray([4]))  # toggle use other clk input\n        if not wantactiveclock and self.extclock:\n            self.ser.write(bytearray([4]))  # toggle use other clk input\n        self.ser.write(bytearray([8]))  # active clock info\n        res = self.ser.read(1)\n        b = unpack('%dB' % len(res), res)\n        print(\"trig board now using clock\", b[0])\n        self.extclock = b[0]\n\n    def setrngseed(self):\n        random.seed()\n        b1=random.randint(0,255)\n        b2=random.randint(0,255)\n        b3=random.randint(0,255)\n        b4=random.randint(0,255)\n        self.ser.write(bytearray([6,b1,b2,b3,b4]))\n        print(\"set trigboard random seed to\",b1,b2,b3,b4)\n\n    def set_prescale(self,prescale): # takes a float from 0-1 that is the fraction of events to pass\n        if prescale>1.0 or prescale<0.0:\n            print(\"bad prescale value,\",prescale)\n            return\n        prescaleint = int((pow(2, 32) - 1) * prescale)\n        b4=int(prescaleint/256/256/256)%256\n        b3=int(prescaleint/256/256)%256\n        b2=int(prescaleint/256)%256\n        b1=int(prescaleint)%256\n        self.ser.write(bytearray([7,b1,b2,b3,b4]))\n        print(\"set trigboard prescale to\",prescale,\" - will pass\",prescaleint,\"out of every 4294967295\",\", bytes:\",b1,b2,b3,b4)\n\n    def get_firmware_version(self):\n        self.ser.write(bytearray([0])) # firmware version\n        res = self.ser.read(1)\n        if len(res)==0:\n            print(\"could not get trigboard firmware version!\")\n            return 0\n        b = unpack('%dB' % len(res), res)\n        self.firmwarev=b[0]\n        print(\"trig board firmware v\",self.firmwarev)\n        return self.firmwarev\n\n    def increment_trig_board_clock_phase(self, times=1):\n        for t in range(times): self.ser.write(bytearray([5])) #increment phase\n        print(\"incremented phase of trig board\",times,\"time(s)\")\n\n    def get_delaycounters(self):\n        self.ser.write(bytearray([11]))  # delaycounter trigger info\n        res = self.ser.read(16)\n        self.delaycounters = unpack('%dB' % len(res), res)\n        #print(\"all delaycounters:\",self.delaycounters)\n        return self.delaycounters\n\n    def set_histostosend(self,h):\n        self.ser.write(bytearray([2, h]))  # set histos to be from channel h\n        self.histostosend=h\n        print(\"will send histos from board\",self.histostosend)\n\n    def get_histos(self):\n        self.ser.write(bytearray([10])) # get histos\n        res = self.ser.read(32)\n        b = unpack('%dB' % len(res), res)\n        mystr=\"histos for board\"+str(self.histostosend)+\": \"\n        myint=[]\n        for i in range(8):\n            myint.append( b[4*i+0]+256*b[4*i+1]+256*256*b[4*i+2]+0*256*256*256*b[4*i+3] )\n            mystr+=str(myint[i])+\" \"\n            if i==3: mystr+=\", \"\n        return mystr\n\n    def cleanup(self):\n        self.setclock(False)\n        if not self.dorolling: self.togglerolling()\n        self.ser.close()\n    \n"
  },
  {
    "path": "software/libs/__init__.py",
    "content": ""
  },
  {
    "path": "software/scripts/requirements.txt",
    "content": "pyserial\nnumpy\nscipy\npyqtgraph\npyqt5\nh5py\npyftdi\nftd2xx"
  },
  {
    "path": "software/scripts/windows/init_virtual_env.bat",
    "content": "python.exe -m pip install virtualenv\ncd \"%~dp0..\\..\"\npython -m venv venv\ncall \".\\venv\\Scripts\\activate.bat\"\npython -m pip --no-input install -r \"%~dp0..\\requirements.txt\"\n"
  },
  {
    "path": "software/scripts/windows/python2/init_virtual_env.bat",
    "content": "SET Python2=C:\\Python27\\python.exe\n@echo off\nif not exist %Python2% (\n    echo \"Python2 path not correct, check\"\n    EXIT /b\n)\n\n@echo on\n%Python2% -m pip install virtualenv\n%Python2% -m virtualenv \"%~dp0..\\..\\..\\venv2\"\ncall \"%~dp0..\\..\\..\\venv2\\Scripts\\activate.bat\"\npython -m pip --no-input install -r \"%~dp0requirements.txt\"\n"
  },
  {
    "path": "software/scripts/windows/python2/requirements.txt",
    "content": "pyserial\nnumpy\nmatplotlib\nPySide\nscipy"
  },
  {
    "path": "software/scripts/windows/python2/run.bat",
    "content": "@echo off\ncd \"%~dp0..\\..\\..\"\nSET venv=venv2\\Scripts\\activate.bat\nif not exist %venv% (\n    echo Virtual Python environment is probably not set.\n    echo Run init_virtual_env.bat\n    EXIT /b\n)\n\n@echo on\ncall .\\%venv%\npython HaasoscopeDraw.py\n"
  },
  {
    "path": "software/scripts/windows/run.bat",
    "content": "@echo off\ncd \"%~dp0..\\..\"\nSET venv=venv\\Scripts\\activate.bat\nif not exist %venv% (\n    echo Virtual Python environment is probably not set.\n    echo Run init_virtual_env.bat\n    EXIT /b\n)\n\n@echo on\ncall .\\%venv%\npython HaasoscopeQt.py\n"
  },
  {
    "path": "software/serial_read.py",
    "content": "from serial import Serial\r\nfrom struct import unpack\r\nimport time\r\n\r\nser=Serial(\"COM16\",1500000,timeout=1.0)\r\nwaitlittle = .1 #seconds\r\n\r\n#This is a _minimal_ set of example commands needed to send to a board to initialize it properly\r\ncommands = [\r\n    [0, 20], #Set board id to 0\r\n    [135, 0, 100], #serialdelaytimerwait of 100\r\n    [122, 0, 10],  #number of samples 10\r\n    [123, 0], #send increment\r\n    [124, 3], #downsample 3\r\n    [125, 1], #tickstowait 1\r\n    [136, 2, 32,  0,   0, 255, 200], # io expanders on (!)\r\n    [136, 2, 32,  1,   0, 255, 200], # io expanders on (!)\r\n    [136, 2, 33,  0,   0, 255, 200], #, io expanders on (!)\r\n    [136, 2, 33,  1,   0, 255, 200], # io expanders on (!)\r\n    [136, 2, 32, 18, 240, 255, 200], # init\r\n    [136, 2, 32, 19, 15, 255, 200], # init (and turn on ADCs!)\r\n    [136, 2, 33, 18,  0, 255, 200], # init\r\n    [136, 2, 33, 19,  0, 255, 200], # init\r\n    [131, 8,  0], # adc offset\r\n    [131, 6, 16], #offset binary output\r\n    # [131, 6, 80], #test pattern output\r\n    [131, 4, 36], #300 Ohm termination A\r\n    [131, 5, 36], #300 Ohm termination B\r\n    [131, 1,  0], #not multiplexed\r\n    [136, 3, 96, 80, 136, 22, 0], # channel 0 , board 0 calib \r\n    [136, 3, 96, 82, 136, 22, 0], # channel 1 , board 0 calib \r\n    [136, 3, 96, 84, 136, 22, 0], # channel 2 , board 0 calib \r\n    [136, 3, 96, 86, 136, 22, 0], # channel 3 , board 0 calib \r\n]\r\n\r\nfor command in commands:\r\n    ser.write(bytearray(command))\r\n    time.sleep(waitlittle)\r\n\r\n# OK, we're set up! Now we can read events and get good data out.\r\nser.write(bytearray([100, 10])) # arm trigger and get an event\r\nresult = ser.read(40)\r\nbyte_array = unpack('%dB' % len(result), result)\r\n\r\nfor i in range(0,4):\r\n    print byte_array[ 10*i : 10*i + 10 ] # print out the 4 channels\r\n\r\nser.close()\r\n"
  },
  {
    "path": "software/serial_read_readioexpanderandboardid.py",
    "content": "from serial import Serial\r\nfrom struct import unpack\r\nimport time\r\n\r\nserialtimeout=10.0\r\nser=Serial(\"COM5\",1500000,timeout=serialtimeout)\r\nwaitlittle = .1 #seconds\r\n\r\n#This is a _minimal_ set of example commands needed to send to a board to initialize it properly\r\ncommands = [\r\n    [0, 20], #Set board id to 0\r\n    [135, 0, 100], #serialdelaytimerwait of 100\r\n    [122, 0, 10],  #number of samples 10\r\n    [123, 0], #send increment\r\n    [124, 3], #downsample 3\r\n    [125, 1], #tickstowait 1\r\n    [136, 2, 32,  0,   0, 255, 200], # io expander 1A on - use as outputs\r\n    [136, 2, 32,  1,   0, 255, 200], # io expander 1B on - use as outputs\r\n    [136, 2, 33,  0,   0, 255, 200], # io expander 2A on - use as outputs\r\n    [136, 2, 33,  1, 255, 255, 200], # io expander 2B on - use as inputs !\r\n    [136, 2, 33, 13, 255, 255, 200], # io expander 2B enable pull-up resistors!\r\n    [136, 2, 32, 18, 240, 255, 200], # init\r\n    [136, 2, 32, 19, 15, 255, 200], # init (and turn on ADCs!)\r\n    [136, 2, 33, 18,  0, 255, 200], # init\r\n    # [136, 2, 33, 19,  0, 255, 200], # init\r\n    [131, 8,  0], # adc offset\r\n    [131, 6, 16], #offset binary output\r\n    # [131, 6, 80], #test pattern output\r\n    [131, 4, 36], #300 Ohm termination A\r\n    [131, 5, 36], #300 Ohm termination B\r\n    [131, 1,  0], #not multiplexed\r\n    [136, 3, 96, 80, 136, 22, 0], # channel 0 , board 0 calib \r\n    [136, 3, 96, 82, 136, 22, 0], # channel 1 , board 0 calib \r\n    [136, 3, 96, 84, 136, 22, 0], # channel 2 , board 0 calib \r\n    [136, 3, 96, 86, 136, 22, 0], # channel 3 , board 0 calib \r\n]\r\n\r\nfor command in commands:\r\n    ser.write(bytearray(command))\r\n    time.sleep(waitlittle)\r\n\r\n# OK, we're set up! Now we can read events and get good data out.\r\n\r\noldtime=time.time()\r\nboa=0 # board to get ID from\r\nser.write(bytearray([30+boa, 142])) #request the unique ID\r\nrslt = ser.read(8)\r\nbyte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\r\nuniqueID = ''.join(format(x, '02x') for x in byte_array) \r\nprint \"got uniqueID\",uniqueID,\"for board\",boa,\" in\",round((time.time()-oldtime)*1000.,2),\"ms\"\r\n\r\noldtime=time.time()\r\nboa=0 # board to get firmware version from\r\nser.write(bytearray([30+boa, 147])) #request the firmware version\r\nser.timeout=0.1; rslt = ser.read(1); ser.timeout=serialtimeout # reduce the serial timeout temporarily, since the old firmware versions will return nothing for command 147\r\nbyte_array = unpack('%dB'%len(rslt),rslt)\r\nfirmwareversion=0\r\nif len(byte_array)>0: firmwareversion=byte_array[0]\r\nprint \"got firmwareversion\",firmwareversion,\"for board\",boa,\"in\",round((time.time()-oldtime)*1000.,2),\"ms\"\r\n\r\noldtime=time.time()\r\nfor i in range(2):\r\n    ser.write(bytearray([146, 33, 19, 0]))# #request the IO expander data from 2B for board 0\r\n    rslt = ser.read(1)\r\n    #print \"result is length\",len(rslt)\r\n    if len(rslt)>0: \r\n        byte_array = unpack('%dB'%len(rslt),rslt)\r\n        print i,byte_array[0]\r\nprint \"got i2c data in\",round((time.time()-oldtime)*1000./2.,2),\"ms\"\r\n\r\nser.write(bytearray([100, 10])) # arm trigger and get an event\r\nrslt = ser.read(40)#[0:10]\r\nbyte_array = unpack('%dB'%len(rslt),rslt)\r\n\r\nfor i in range(4):\r\n    print byte_array[10*i : 10*i+10] # print out the 4 channels\r\n\r\nser.close()\r\n"
  },
  {
    "path": "software/serial_read_test_py3.py",
    "content": "from serial import Serial\r\nfrom struct import unpack\r\nimport time\r\n\r\nserialtimeout=1.0\r\nser=Serial(\"/dev/ttyUSB0\",1500000,timeout=serialtimeout)\r\n\r\n#This is a _minimal_ test of sending a python command\r\n\r\ni=0\r\nwhile i<2000:\r\n    ser.write(bytearray([201]));\r\n    time.sleep(1)\r\n    i=i+1\r\n\r\nser.close()\r\n"
  },
  {
    "path": "software/serial_read_versions.py",
    "content": "from serial import Serial\r\nfrom struct import unpack\r\nimport time\r\n\r\nserialtimeout=1.0\r\nser=Serial(\"COM5\",1500000,timeout=serialtimeout)\r\nwaitlittle = .1 #seconds\r\n\r\n#This is a _minimal_ set of example commands needed to send to a board to initialize it properly\r\n\r\nser.write(chr(0)); ser.write(chr(20)) #set board id to 0\r\ntime.sleep(waitlittle)\r\nser.write(chr(135)); ser.write(chr(0)); ser.write(chr(100)); #serialdelaytimerwait of 100\r\ntime.sleep(waitlittle)\r\n\r\noldtime=time.time()\r\nboa=0 # board to get ID from\r\nser.write(chr(30+boa)) #make the next board active (serial_passthrough 0)\r\nser.write(chr(142)) #request the unique ID\r\nrslt = ser.read(8)\r\nbyte_array = unpack('%dB'%len(rslt),rslt) #Convert serial data to array of numbers\r\nuniqueID = ''.join(format(x, '02x') for x in byte_array) \r\nprint \"got uniqueID\",uniqueID,\"for board\",boa,\" in\",round((time.time()-oldtime)*1000.,2),\"ms\"\r\n\r\noldtime=time.time()\r\nboa=0 # board to get firmware version from\r\nser.write(chr(30+boa)) #make the next board active (serial_passthrough 0)\r\nser.write(chr(147)) #request the firmware version byte\r\nser.timeout=0.1; rslt = ser.read(1); ser.timeout=serialtimeout # reduce the serial timeout temporarily, since the old firmware versions will return nothing for command 147\r\nbyte_array = unpack('%dB'%len(rslt),rslt)\r\nfirmwareversion=0\r\nif len(byte_array)>0: firmwareversion=byte_array[0]\r\nprint \"got firmwareversion\",firmwareversion,\"for board\",boa,\"in\",round((time.time()-oldtime)*1000.,2),\"ms\"\r\n\r\nser.close()\r\n"
  },
  {
    "path": "software/serial_rebooter/serial_rebooter.ino",
    "content": "/*\nSerial UART control of Haasoscope rebooter\nBoard: Arduino Nano\nProcessor: ATmega168\n*/\n\nvoid setup() {\n  pinMode(LED_BUILTIN, OUTPUT);  // pin 13\n  digitalWrite(LED_BUILTIN,HIGH);\n\n  pinMode(12, OUTPUT);  // pin 12\n  digitalWrite(12,HIGH);\n\n  Serial.begin(9600);\n  Serial.println(\"Arduino Connected\");\n}\n\nString input;\nvoid loop() {\n    //USAGE: haasoscope on/off\n    if(Serial.available()){\n        input = Serial.readStringUntil('\\n');\n        Serial.println(\"Read: \" + input);\n\n        if(input.substring(0, 10) == \"haasoscope\") {\n          if (input.substring(11,13) == \"on\") {\n            Serial.println(\"on\");\n            digitalWrite(LED_BUILTIN,HIGH);\n          }\n          else if (input.substring(11,14) == \"off\"){\n            Serial.println(\"off\");\n            digitalWrite(LED_BUILTIN,LOW);\n          }\n        }\n\n        if(input.substring(0, 10) == \"arduino_13\") {\n          if (input.substring(11,13) == \"on\") {\n            Serial.println(\"on\");\n            digitalWrite(13,HIGH);\n          }\n          else if (input.substring(11,14) == \"off\"){\n            Serial.println(\"off\");\n            digitalWrite(13,LOW);\n          }\n        }\n\n        if(input.substring(0, 10) == \"arduino_12\") {\n          if (input.substring(11,13) == \"on\") {\n            Serial.println(\"on\");\n            digitalWrite(12,HIGH);\n          }\n          else if (input.substring(11,14) == \"off\"){\n            Serial.println(\"off\");\n            digitalWrite(12,LOW);\n          }\n        }\n    }\n}\n"
  },
  {
    "path": "software/serial_relay/serial_relay.ino",
    "content": "/*\n  Software serial multple serial test\n  \n  Receives from the hardware serial, sends to software serial.\n  Receives from software serial, sends to hardware serial.\n */\n#include <SoftwareSerial.h>\n\nSoftwareSerial mySerial(10, 11); // RX, TX\n\nvoid setup() {\n  // Open serial communications and wait for port to open:\n  Serial.begin(115200);\n  while (!Serial) { ; }// wait for serial port to connect. Needed for native USB port only\n  Serial.println(\"Goodnight moon!\");\n\n  // set the data rate for the SoftwareSerial port\n  mySerial.begin(57600); //9600 //57600 //115200 //1500000\n  delay(1000);\n  \n  //board id 0 and last board\n  mySerial.write(uint8_t(0));\n  delay(100);\n  mySerial.write(uint8_t(20));\n  delay(100);\n  \n  //samplestosend=256\n  mySerial.write(uint8_t(122));\n  delay(100);\n  mySerial.write(uint8_t(1));\n  delay(100);\n  mySerial.write(uint8_t(0));\n  delay(100);\n  \n  //downsample=0\n  mySerial.write(uint8_t(124));\n  delay(100);\n  mySerial.write(uint8_t(0));\n  delay(100);\n  \n}\n\nint nbytes=0;\nunsigned long previousMillis = 0;\nconst long interval = 3000;\nbool paused = false;\n\nvoid loop() { // run over and over\n\n  //to get new event, send 100 (prime boards), then 10 (readout board 0)\n  unsigned long currentMillis = millis();\n  if (currentMillis - previousMillis >= interval && !paused) {\n    previousMillis = currentMillis;\n    mySerial.write(uint8_t(100));\n    delay(10);\n    mySerial.write(uint8_t(10));\n    Serial.println(String(currentMillis)+\": asked for board 0 data\");\n  }\n\n  while (mySerial.available()) {\n    int b = mySerial.read();\n    nbytes++;\n    if (nbytes<5) Serial.println(String(b,HEX)+\" \");\n  }\n  if (nbytes>=4*256) \n    {\n      Serial.println(String(currentMillis)+\": got \"+String(nbytes)+\" bytes in \"+String(currentMillis - previousMillis)+\" ms\");\n      nbytes=0;\n    }\n\n  // read string from the terminal, echo out over serial as a byte\n  while(Serial.available()) {\n    String a= Serial.readString();\n    Serial.println(String(a.toInt()));\n    if (a==\"p\") paused=!paused;\n    else mySerial.write(a.toInt());\n  }\n}\r\n"
  },
  {
    "path": "software/serial_write_test_py3.py",
    "content": "from serial import Serial\nfrom struct import unpack\nimport time\n\nserialtimeout=1.0\nser=Serial(\"COM6\",1500000,timeout=serialtimeout) #115200\n\n#This sends out some data over serial - good for testing serial decoding\n\ni=0\nwhile i<200000:\n    ser.write(bytearray([139,159]))\n    time.sleep(0.1)\n    i=i+1\n    print(i)\n\nser.close()\n"
  }
]