[
  {
    "path": ".gitattributes",
    "content": "# Auto detect text files and perform LF normalization\n* text=auto\n\n# Custom for Visual Studio\n*.cs     diff=csharp\n*.sln    merge=union\n*.csproj merge=union\n*.vbproj merge=union\n*.fsproj merge=union\n*.dbproj merge=union\n\n# Standard to msysgit\n*.doc\t diff=astextplain\n*.DOC\t diff=astextplain\n*.docx diff=astextplain\n*.DOCX diff=astextplain\n*.dot  diff=astextplain\n*.DOT  diff=astextplain\n*.pdf  diff=astextplain\n*.PDF\t diff=astextplain\n*.rtf\t diff=astextplain\n*.RTF\t diff=astextplain\n"
  },
  {
    "path": ".gitignore",
    "content": "# Windows image file caches\r\nThumbs.db\r\nehthumbs.db\r\n\r\n# Folder config file\r\nDesktop.ini\r\n\r\n# Recycle Bin used on file shares\r\n$RECYCLE.BIN/\r\n\r\n# Windows Installer files\r\n*.cab\r\n*.msi\r\n*.msm\r\n*.msp\r\n\r\n# =========================\r\n# Operating System Files\r\n# =========================\r\n\r\n# OSX\r\n# =========================\r\n\r\n.DS_Store\n.AppleDouble\n.LSOverride\n\n# Icon must ends with two \\r.\nIcon\r\r\n\n# Thumbnails\n._*\n\n# Files that might appear on external disk\n.Spotlight-V100\n.Trashes\n"
  },
  {
    "path": ".gitmodules",
    "content": "[submodule \"Tick\"]\n\tpath = Tick\n\turl = https://github.com/geekfactory/Tick.git\n[submodule \"SPI\"]\n\tpath = SPI\n\turl = https://github.com/geekfactory/SPI.git\n"
  },
  {
    "path": "PID.c",
    "content": "/*\tFloating point PID control loop for Microcontrollers\n\tCopyright (C) 2015 Jesus Ruben Santa Anna Zamudio.\n\n\tThis program is free software: you can redistribute it and/or modify\n\tit under the terms of the GNU General Public License as published by\n\tthe Free Software Foundation, either version 3 of the License, or\n\t(at your option) any later version.\n\n\tThis program is distributed in the hope that it will be useful,\n\tbut WITHOUT ANY WARRANTY; without even the implied warranty of\n\tMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n\tGNU General Public License for more details.\n\n\tYou should have received a copy of the GNU General Public License\n\talong with this program.  If not, see <http://www.gnu.org/licenses/>.\n\n\tAuthor website: http://www.geekfactory.mx\n\tAuthor e-mail: ruben at geekfactory dot mx\n */\n#include \"PID.h\"\n\npid_t pid_create(pid_t pid, float* in, float* out, float* set, float kp, float ki, float kd)\n{\n\tpid->input = in;\n\tpid->output = out;\n\tpid->setpoint = set;\n\tpid->automode = false;\n\n\tpid_limits(pid, 0, 255);\n\n\t// Set default sample time to 100 ms\n\tpid->sampletime = 100 * (TICK_SECOND / 1000);\n\n\tpid_direction(pid, E_PID_DIRECT);\n\tpid_tune(pid, kp, ki, kd);\n\n\tpid->lasttime = tick_get() - pid->sampletime;\n\n\treturn pid;\n}\n\nbool pid_need_compute(pid_t pid)\n{\n\t// Check if the PID period has elapsed\n\treturn(tick_get() - pid->lasttime >= pid->sampletime) ? true : false;\n}\n\nvoid pid_compute(pid_t pid)\n{\n\t// Check if control is enabled\n\tif (!pid->automode)\n\t\treturn false;\n\t\n\tfloat in = *(pid->input);\n\t// Compute error\n\tfloat error = (*(pid->setpoint)) - in;\n\t// Compute integral\n\tpid->iterm += (pid->Ki * error);\n\tif (pid->iterm > pid->omax)\n\t\tpid->iterm = pid->omax;\n\telse if (pid->iterm < pid->omin)\n\t\tpid->iterm = pid->omin;\n\t// Compute differential on input\n\tfloat dinput = in - pid->lastin;\n\t// Compute PID output\n\tfloat out = pid->Kp * error + pid->iterm - pid->Kd * dinput;\n\t// Apply limit to output value\n\tif (out > pid->omax)\n\t\tout = pid->omax;\n\telse if (out < pid->omin)\n\t\tout = pid->omin;\n\t// Output to pointed variable\n\t(*pid->output) = out;\n\t// Keep track of some variables for next execution\n\tpid->lastin = in;\n\tpid->lasttime = tick_get();;\n}\n\nvoid pid_tune(pid_t pid, float kp, float ki, float kd)\n{\n\t// Check for validity\n\tif (kp < 0 || ki < 0 || kd < 0)\n\t\treturn;\n\t\n\t//Compute sample time in seconds\n\tfloat ssec = ((float) pid->sampletime) / ((float) TICK_SECOND);\n\n\tpid->Kp = kp;\n\tpid->Ki = ki * ssec;\n\tpid->Kd = kd / ssec;\n\n\tif (pid->direction == E_PID_REVERSE) {\n\t\tpid->Kp = 0 - pid->Kp;\n\t\tpid->Ki = 0 - pid->Ki;\n\t\tpid->Kd = 0 - pid->Kd;\n\t}\n}\n\nvoid pid_sample(pid_t pid, uint32_t time)\n{\n\tif (time > 0) {\n\t\tfloat ratio = (float) (time * (TICK_SECOND / 1000)) / (float) pid->sampletime;\n\t\tpid->Ki *= ratio;\n\t\tpid->Kd /= ratio;\n\t\tpid->sampletime = time * (TICK_SECOND / 1000);\n\t}\n}\n\nvoid pid_limits(pid_t pid, float min, float max)\n{\n\tif (min >= max) return;\n\tpid->omin = min;\n\tpid->omax = max;\n\t//Adjust output to new limits\n\tif (pid->automode) {\n\t\tif (*(pid->output) > pid->omax)\n\t\t\t*(pid->output) = pid->omax;\n\t\telse if (*(pid->output) < pid->omin)\n\t\t\t*(pid->output) = pid->omin;\n\n\t\tif (pid->iterm > pid->omax)\n\t\t\tpid->iterm = pid->omax;\n\t\telse if (pid->iterm < pid->omin)\n\t\t\tpid->iterm = pid->omin;\n\t}\n}\n\nvoid pid_auto(pid_t pid)\n{\n\t// If going from manual to auto\n\tif (!pid->automode) {\n\t\tpid->iterm = *(pid->output);\n\t\tpid->lastin = *(pid->input);\n\t\tif (pid->iterm > pid->omax)\n\t\t\tpid->iterm = pid->omax;\n\t\telse if (pid->iterm < pid->omin)\n\t\t\tpid->iterm = pid->omin;\n\t\tpid->automode = true;\n\t}\n}\n\nvoid pid_manual(pid_t pid)\n{\n\tpid->automode = false;\n}\n\nvoid pid_direction(pid_t pid, enum pid_control_directions dir)\n{\n\tif (pid->automode && pid->direction != dir) {\n\t\tpid->Kp = (0 - pid->Kp);\n\t\tpid->Ki = (0 - pid->Ki);\n\t\tpid->Kd = (0 - pid->Kd);\n\t}\n\tpid->direction = dir;\n}\n"
  },
  {
    "path": "PID.h",
    "content": "/*\tFloating point PID control loop for Microcontrollers\n\tCopyright (C) 2014 Jesus Ruben Santa Anna Zamudio.\n\n\tThis program is free software: you can redistribute it and/or modify\n\tit under the terms of the GNU General Public License as published by\n\tthe Free Software Foundation, either version 3 of the License, or\n\t(at your option) any later version.\n\n\tThis program is distributed in the hope that it will be useful,\n\tbut WITHOUT ANY WARRANTY; without even the implied warranty of\n\tMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n\tGNU General Public License for more details.\n\n\tYou should have received a copy of the GNU General Public License\n\talong with this program.  If not, see <http://www.gnu.org/licenses/>.\n\n\tAuthor website: http://www.geekfactory.mx\n\tAuthor e-mail: ruben at geekfactory dot mx\n */\n#ifndef PID_H\n#define PID_H\n/*-------------------------------------------------------------*/\n/*\t\tIncludes and dependencies\t\t\t*/\n/*-------------------------------------------------------------*/\n#include \"Tick/Tick.h\"\n#include <stdbool.h>\n#include <stdint.h>\n\n/*-------------------------------------------------------------*/\n/*\t\tMacros and definitions\t\t\t\t*/\n/*-------------------------------------------------------------*/\n\n/*-------------------------------------------------------------*/\n/*\t\tTypedefs enums & structs\t\t\t*/\n/*-------------------------------------------------------------*/\n\n/**\n * Defines if the controler is direct or reverse\n */\nenum pid_control_directions {\n\tE_PID_DIRECT,\n\tE_PID_REVERSE,\n};\n\n/**\n * Structure that holds PID all the PID controller data, multiple instances are\n * posible using different structures for each controller\n */\nstruct pid_controller {\n\t// Input, output and setpoint\n\tfloat * input; //!< Current Process Value\n\tfloat * output; //!< Corrective Output from PID Controller\n\tfloat * setpoint; //!< Controller Setpoint\n\t// Tuning parameters\n\tfloat Kp; //!< Stores the gain for the Proportional term\n\tfloat Ki; //!< Stores the gain for the Integral term\n\tfloat Kd; //!< Stores the gain for the Derivative term\n\t// Output minimum and maximum values\n\tfloat omin; //!< Maximum value allowed at the output\n\tfloat omax; //!< Minimum value allowed at the output\n\t// Variables for PID algorithm\n\tfloat iterm; //!< Accumulator for integral term\n\tfloat lastin; //!< Last input value for differential term\n\t// Time related\n\tuint32_t lasttime; //!< Stores the time when the control loop ran last time\n\tuint32_t sampletime; //!< Defines the PID sample time\n\t// Operation mode\n\tuint8_t automode; //!< Defines if the PID controller is enabled or disabled\n\tenum pid_control_directions direction;\n};\n\ntypedef struct pid_controller * pid_t;\n\n/*-------------------------------------------------------------*/\n/*\t\tFunction prototypes\t\t\t\t*/\n/*-------------------------------------------------------------*/\n#ifdef\t__cplusplus\nextern \"C\" {\n#endif\n\t/**\n\t * @brief Creates a new PID controller\n\t *\n\t * Creates a new pid controller and initializes it�s input, output and internal\n\t * variables. Also we set the tuning parameters\n\t *\n\t * @param pid A pointer to a pid_controller structure\n\t * @param in Pointer to float value for the process input\n\t * @param out Poiter to put the controller output value\n\t * @param set Pointer float with the process setpoint value\n\t * @param kp Proportional gain\n\t * @param ki Integral gain\n\t * @param kd Diferential gain\n\t *\n\t * @return returns a pid_t controller handle\n\t */\n\tpid_t pid_create(pid_t pid, float* in, float* out, float* set, float kp, float ki, float kd);\n\n\t/**\n\t * @brief Check if PID loop needs to run\n\t *\n\t * Determines if the PID control algorithm should compute a new output value,\n\t * if this returs true, the user should read process feedback (sensors) and\n\t * place the reading in the input variable, then call the pid_compute() function.\n\t *\n\t * @return return Return true if PID control algorithm is required to run\n\t */\n\tbool pid_need_compute(pid_t pid);\n\n\t/**\n\t * @brief Computes the output of the PID control\n\t *\n\t * This function computes the PID output based on the parameters, setpoint and\n\t * current system input.\n\t *\n\t * @param pid The PID controller instance which will be used for computation\n\t */\n\tvoid pid_compute(pid_t pid);\n\n\t/**\n\t * @brief Sets new PID tuning parameters\n\t *\n\t * Sets the gain for the Proportional (Kp), Integral (Ki) and Derivative (Kd)\n\t * terms.\n\t *\n\t * @param pid The PID controller instance to modify\n\t * @param kp Proportional gain\n\t * @param ki Integral gain\n\t * @param kd Derivative gain\n\t */\n\tvoid pid_tune(pid_t pid, float kp, float ki, float kd);\n\n\t/**\n\t * @brief Sets the pid algorithm period\n\t *\n\t * Changes the between PID control loop computations.\n\t *\n\t * @param pid The PID controller instance to modify\n\t * @param time The time in milliseconds between computations\n\t */\n\tvoid pid_sample(pid_t pid, uint32_t time);\n\n\t/**\n\t * @brief Sets the limits for the PID controller output\n\t *\n\t * @param pid The PID controller instance to modify\n\t * @param min The minimum output value for the PID controller\n\t * @param max The maximum output value for the PID controller\n\t */\n\tvoid pid_limits(pid_t pid, float min, float max);\n\n\t/**\n\t * @brief Enables automatic control using PID\n\t *\n\t * Enables the PID control loop. If manual output adjustment is needed you can\n\t * disable the PID control loop using pid_manual(). This function enables PID\n\t * automatic control at program start or after calling pid_manual()\n\t *\n\t * @param pid The PID controller instance to enable\n\t */\n\tvoid pid_auto(pid_t pid);\n\n\t/**\n\t * @brief Disables automatic process control\n\t *\n\t * Disables the PID control loop. User can modify the value of the output\n\t * variable and the controller will not overwrite it.\n\t *\n\t * @param pid The PID controller instance to disable\n\t */\n\tvoid pid_manual(pid_t pid);\n\n\t/**\n\t * @brief Configures the PID controller direction\n\t *\n\t * Sets the direction of the PID controller. The direction is \"DIRECT\" when a\n\t * increase of the output will cause a increase on the measured value and\n\t * \"REVERSE\" when a increase on the controller output will cause a decrease on\n\t * the measured value.\n\t *\n\t * @param pid The PID controller instance to modify\n\t * @param direction The new direction of the PID controller\n\t */\n\tvoid pid_direction(pid_t pid, enum pid_control_directions dir);\n\n#ifdef\t__cplusplus\n}\n#endif\n\n#endif\n// End of Header file\n"
  },
  {
    "path": "README.md",
    "content": "PID Control Library\n====\nPID control library implemented in floating point arithmetic, it is designed to run in almost any microcontroller that can accept C language code and implement floating point routines. It is based on the Arduino project PID library that can be found in the following address:\n\n* http://playground.arduino.cc/Code/PIDLibrary\n* https://github.com/br3ttb/Arduino-PID-Library\n\nThe main advantage of this PID library is that it can be compiled on a wide range of devices, due to the fact that this library does not require a C++ compiler and can be linked with our other libraries for maximum portability to other platforms.\n\nLibrary Usage\n====\n\nThe following code depicts the library basic usage, input and output functions should be provided by end user.\n\n```\n#include \"PID.h\"\n\n// Structure to strore PID data and pointer to PID structure\nstruct pid_controller ctrldata;\npid_t pid;\n\n// Control loop input,output and setpoint variables\nfloat input = 0, output = 0;\nfloat setpoint = 15;\n\n// Control loop gains\nfloat kp = 2.5, ki = 1.0, kd = 1.0;\n\nvoid main()\n{\n\t// Prepare PID controller for operation\n\tpid = pid_create(&ctrldata, &input, &output, &setpoint, kp, ki, kd);\n\t// Set controler output limits from 0 to 200\n\tpid_limits(pid, 0, 200);\n\t// Allow PID to compute and change output\n\tpid_auto(pid);\n\n\t// MAIN CONTROL LOOP\n\tfor (;;) {\n\t\t// Check if need to compute PID\n\t\tif (pid_need_compute(pid)) {\n\t\t\t// Read process feedback\n\t\t\tinput = process_input();\n\t\t\t// Compute new PID output value\n\t\t\tpid_compute(pid);\n\t\t\t//Change actuator value\n\t\t\tprocess_output(output);\n\t\t}\n\t}\n}\n```\n\nLibrería de control PID\n====\n\nLibrería de control PID en punto flotante diseñada para correr en prácticamente cualquier microcontrolador que pueda aceptar código en lenguaje C y aritmética de punto flotante. Esta basada en la librería PID de arduino que puede encontrarse en la siguiente dirección:\n\n* http://playground.arduino.cc/Code/PIDLibrary\n* https://github.com/br3ttb/Arduino-PID-Library\n\nLa ventaja de esta librería es que puede compilarse para una mayor cantidad de dispositivos pues no requiere un compilador de C++ y puede enlazarse con otras de nuestras librerías para maxima portabilidad a otras plataformas.\n\nUso de la librería\n====\n\nEl codigo siguiente muestra el uso básico de la librería, las funciones de entrada y salida deben ser provistas por el usuario.\n\n```\n#include \"PID.h\"\n\n// Structure to strore PID data and pointer to PID structure\nstruct pid_controller ctrldata;\npid_t pid;\n\n// Control loop input,output and setpoint variables\nfloat input = 0, output = 0;\nfloat setpoint = 15;\n\n// Control loop gains\nfloat kp = 2.5, ki = 1.0, kd = 1.0;\n\nvoid main()\n{\n\t// Prepare PID controller for operation\n\tpid = pid_create(&ctrldata, &input, &output, &setpoint, kp, ki, kd);\n\t// Set controler output limits from 0 to 200\n\tpid_limits(pid, 0, 200);\n\t// Allow PID to compute and change output\n\tpid_auto(pid);\n\n\t// MAIN CONTROL LOOP\n\tfor (;;) {\n\t\t// Check if need to compute PID\n\t\tif (pid_need_compute(pid)) {\n\t\t\t// Read process feedback\n\t\t\tinput = process_input();\n\t\t\t// Compute new PID output value\n\t\t\tpid_compute(pid);\n\t\t\t//Change actuator value\n\t\t\tprocess_output(output);\n\t\t}\n\t}\n}\n```\n\n\n"
  },
  {
    "path": "pid-demo-pic18.X/Makefile",
    "content": "#\n#  There exist several targets which are by default empty and which can be \n#  used for execution of your targets. These targets are usually executed \n#  before and after some main targets. They are: \n#\n#     .build-pre:              called before 'build' target\n#     .build-post:             called after 'build' target\n#     .clean-pre:              called before 'clean' target\n#     .clean-post:             called after 'clean' target\n#     .clobber-pre:            called before 'clobber' target\n#     .clobber-post:           called after 'clobber' target\n#     .all-pre:                called before 'all' target\n#     .all-post:               called after 'all' target\n#     .help-pre:               called before 'help' target\n#     .help-post:              called after 'help' target\n#\n#  Targets beginning with '.' are not intended to be called on their own.\n#\n#  Main targets can be executed directly, and they are:\n#  \n#     build                    build a specific configuration\n#     clean                    remove built files from a configuration\n#     clobber                  remove all built files\n#     all                      build all configurations\n#     help                     print help mesage\n#  \n#  Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and\n#  .help-impl are implemented in nbproject/makefile-impl.mk.\n#\n#  Available make variables:\n#\n#     CND_BASEDIR                base directory for relative paths\n#     CND_DISTDIR                default top distribution directory (build artifacts)\n#     CND_BUILDDIR               default top build directory (object files, ...)\n#     CONF                       name of current configuration\n#     CND_ARTIFACT_DIR_${CONF}   directory of build artifact (current configuration)\n#     CND_ARTIFACT_NAME_${CONF}  name of build artifact (current configuration)\n#     CND_ARTIFACT_PATH_${CONF}  path to build artifact (current configuration)\n#     CND_PACKAGE_DIR_${CONF}    directory of package (current configuration)\n#     CND_PACKAGE_NAME_${CONF}   name of package (current configuration)\n#     CND_PACKAGE_PATH_${CONF}   path to package (current configuration)\n#\n# NOCDDL\n\n\n# Environment \nMKDIR=mkdir\nCP=cp\nCCADMIN=CCadmin\nRANLIB=ranlib\n\n\n# build\nbuild: .build-post\n\n.build-pre:\n# Add your pre 'build' code here...\n\n.build-post: .build-impl\n# Add your post 'build' code here...\n\n\n# clean\nclean: .clean-post\n\n.clean-pre:\n# Add your pre 'clean' code here...\n\n.clean-post: .clean-impl\n# Add your post 'clean' code here...\n\n\n# clobber\nclobber: .clobber-post\n\n.clobber-pre:\n# Add your pre 'clobber' code here...\n\n.clobber-post: .clobber-impl\n# Add your post 'clobber' code here...\n\n\n# all\nall: .all-post\n\n.all-pre:\n# Add your pre 'all' code here...\n\n.all-post: .all-impl\n# Add your post 'all' code here...\n\n\n# help\nhelp: .help-post\n\n.help-pre:\n# Add your pre 'help' code here...\n\n.help-post: .help-impl\n# Add your post 'help' code here...\n\n\n\n# include project implementation makefile\ninclude nbproject/Makefile-impl.mk\n\n# include project make variables\ninclude nbproject/Makefile-variables.mk\n"
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  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/1376266981/Tick-PIC18.p1",
    "content": "Version 3.2 HI-TECH Software Intermediate Code\n\"7397 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[v _TMR0L `Vuc ~T0 @X0 0 e@4054 ]\n\"7403\n[v _TMR0H `Vuc ~T0 @X0 0 e@4055 ]\n[s S469 :7 `uc 1 :1 `uc 1 ]\n[n S469 . . NOT_RBPU ]\n[s S470 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S470 . RBIP . TMR0IP . INTEDG2 INTEDG1 INTEDG0 nRBPU ]\n[s S471 :2 `uc 1 :1 `uc 1 :4 `uc 1 :1 `uc 1 ]\n[n S471 . . T0IP . RBPU ]\n[u S468 `S469 1 `S470 1 `S471 1 ]\n[n S468 . . . . ]\n\"7761\n[v _INTCON2bits `VS468 ~T0 @X0 0 e@4081 ]\n[s S473 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S473 . RBIF INT0IF TMR0IF RBIE INT0IE TMR0IE PEIE_GIEL GIE_GIEH ]\n[s S474 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S474 . RBIF INT0IF TMR0IF RBIE INT0IE TMR0IE PEIE GIE ]\n[s S475 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S475 . RBIF INT0IF TMR0IF RBIE INT0IE TMR0IE GIEL GIEH ]\n[s S476 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S476 . . INT0F T0IF . INT0E T0IE PEIE GIE ]\n[s S477 :6 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S477 . . GIEL GIEH ]\n[u S472 `S473 1 `S474 1 `S475 1 `S476 1 `S477 1 ]\n[n S472 . . . . . . ]\n\"7862\n[v _INTCONbits `VS472 ~T0 @X0 0 e@4082 ]\n\"7322\n[v _T0CON `Vuc ~T0 @X0 0 e@4053 ]\n\"25 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c\n[v _tick_read_internal `(v ~T0 @X0 0 sf ]\n[; ;pic18f2550.h: 44: extern volatile unsigned short UFRM @ 0xF66;\n\"46 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[; ;pic18f2550.h: 46: asm(\"UFRM equ 0F66h\");\n[; <\" UFRM equ 0F66h ;# \">\n[; ;pic18f2550.h: 50: extern volatile unsigned char UFRML @ 0xF66;\n\"52\n[; ;pic18f2550.h: 52: asm(\"UFRML equ 0F66h\");\n[; <\" UFRML equ 0F66h ;# \">\n[; ;pic18f2550.h: 55: typedef union {\n[; ;pic18f2550.h: 56: struct {\n[; ;pic18f2550.h: 57: unsigned FRM :8;\n[; ;pic18f2550.h: 58: };\n[; ;pic18f2550.h: 59: struct {\n[; ;pic18f2550.h: 60: unsigned FRM0 :1;\n[; ;pic18f2550.h: 61: unsigned FRM1 :1;\n[; ;pic18f2550.h: 62: unsigned FRM2 :1;\n[; ;pic18f2550.h: 63: unsigned FRM3 :1;\n[; ;pic18f2550.h: 64: unsigned FRM4 :1;\n[; ;pic18f2550.h: 65: unsigned FRM5 :1;\n[; ;pic18f2550.h: 66: unsigned FRM6 :1;\n[; ;pic18f2550.h: 67: unsigned FRM7 :1;\n[; ;pic18f2550.h: 68: };\n[; ;pic18f2550.h: 69: struct {\n[; ;pic18f2550.h: 70: unsigned FRML :8;\n[; ;pic18f2550.h: 71: };\n[; ;pic18f2550.h: 72: } UFRMLbits_t;\n[; ;pic18f2550.h: 73: extern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n[; ;pic18f2550.h: 127: extern volatile unsigned char UFRMH @ 0xF67;\n\"129\n[; ;pic18f2550.h: 129: asm(\"UFRMH equ 0F67h\");\n[; <\" UFRMH equ 0F67h ;# \">\n[; ;pic18f2550.h: 132: typedef union {\n[; ;pic18f2550.h: 133: struct {\n[; ;pic18f2550.h: 134: unsigned FRM :3;\n[; ;pic18f2550.h: 135: };\n[; ;pic18f2550.h: 136: struct {\n[; ;pic18f2550.h: 137: unsigned FRM8 :1;\n[; ;pic18f2550.h: 138: unsigned FRM9 :1;\n[; ;pic18f2550.h: 139: unsigned FRM10 :1;\n[; ;pic18f2550.h: 140: };\n[; ;pic18f2550.h: 141: } UFRMHbits_t;\n[; ;pic18f2550.h: 142: extern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n[; ;pic18f2550.h: 166: extern volatile unsigned char UIR @ 0xF68;\n\"168\n[; ;pic18f2550.h: 168: asm(\"UIR equ 0F68h\");\n[; <\" UIR equ 0F68h ;# \">\n[; ;pic18f2550.h: 171: typedef union {\n[; ;pic18f2550.h: 172: struct {\n[; ;pic18f2550.h: 173: unsigned URSTIF :1;\n[; ;pic18f2550.h: 174: unsigned UERRIF :1;\n[; ;pic18f2550.h: 175: unsigned ACTVIF :1;\n[; ;pic18f2550.h: 176: unsigned TRNIF :1;\n[; ;pic18f2550.h: 177: unsigned IDLEIF :1;\n[; ;pic18f2550.h: 178: unsigned STALLIF :1;\n[; ;pic18f2550.h: 179: unsigned SOFIF :1;\n[; ;pic18f2550.h: 180: };\n[; ;pic18f2550.h: 181: } UIRbits_t;\n[; ;pic18f2550.h: 182: extern volatile UIRbits_t UIRbits @ 0xF68;\n[; ;pic18f2550.h: 221: extern volatile unsigned char UIE @ 0xF69;\n\"223\n[; ;pic18f2550.h: 223: asm(\"UIE equ 0F69h\");\n[; <\" UIE equ 0F69h ;# \">\n[; ;pic18f2550.h: 226: typedef union {\n[; ;pic18f2550.h: 227: struct {\n[; ;pic18f2550.h: 228: unsigned URSTIE :1;\n[; ;pic18f2550.h: 229: unsigned UERRIE :1;\n[; ;pic18f2550.h: 230: unsigned ACTVIE :1;\n[; ;pic18f2550.h: 231: unsigned TRNIE :1;\n[; ;pic18f2550.h: 232: unsigned IDLEIE :1;\n[; ;pic18f2550.h: 233: unsigned STALLIE :1;\n[; ;pic18f2550.h: 234: unsigned SOFIE :1;\n[; ;pic18f2550.h: 235: };\n[; ;pic18f2550.h: 236: } UIEbits_t;\n[; ;pic18f2550.h: 237: extern volatile UIEbits_t UIEbits @ 0xF69;\n[; ;pic18f2550.h: 276: extern volatile unsigned char UEIR @ 0xF6A;\n\"278\n[; ;pic18f2550.h: 278: asm(\"UEIR equ 0F6Ah\");\n[; <\" UEIR equ 0F6Ah ;# \">\n[; ;pic18f2550.h: 281: typedef union {\n[; ;pic18f2550.h: 282: struct {\n[; ;pic18f2550.h: 283: unsigned PIDEF :1;\n[; ;pic18f2550.h: 284: unsigned CRC5EF :1;\n[; ;pic18f2550.h: 285: unsigned CRC16EF :1;\n[; ;pic18f2550.h: 286: unsigned DFN8EF :1;\n[; ;pic18f2550.h: 287: unsigned BTOEF :1;\n[; ;pic18f2550.h: 288: unsigned :2;\n[; ;pic18f2550.h: 289: unsigned BTSEF :1;\n[; ;pic18f2550.h: 290: };\n[; ;pic18f2550.h: 291: } UEIRbits_t;\n[; ;pic18f2550.h: 292: extern volatile UEIRbits_t UEIRbits @ 0xF6A;\n[; ;pic18f2550.h: 326: extern volatile unsigned char UEIE @ 0xF6B;\n\"328\n[; ;pic18f2550.h: 328: asm(\"UEIE equ 0F6Bh\");\n[; <\" UEIE equ 0F6Bh ;# \">\n[; ;pic18f2550.h: 331: typedef union {\n[; ;pic18f2550.h: 332: struct {\n[; ;pic18f2550.h: 333: unsigned PIDEE :1;\n[; ;pic18f2550.h: 334: unsigned CRC5EE :1;\n[; ;pic18f2550.h: 335: unsigned CRC16EE :1;\n[; ;pic18f2550.h: 336: unsigned DFN8EE :1;\n[; ;pic18f2550.h: 337: unsigned BTOEE :1;\n[; ;pic18f2550.h: 338: unsigned :2;\n[; ;pic18f2550.h: 339: unsigned BTSEE :1;\n[; ;pic18f2550.h: 340: };\n[; ;pic18f2550.h: 341: } UEIEbits_t;\n[; ;pic18f2550.h: 342: extern volatile UEIEbits_t UEIEbits @ 0xF6B;\n[; ;pic18f2550.h: 376: extern volatile unsigned char USTAT @ 0xF6C;\n\"378\n[; ;pic18f2550.h: 378: asm(\"USTAT equ 0F6Ch\");\n[; <\" USTAT equ 0F6Ch ;# \">\n[; ;pic18f2550.h: 381: typedef union {\n[; ;pic18f2550.h: 382: struct {\n[; ;pic18f2550.h: 383: unsigned :1;\n[; ;pic18f2550.h: 384: unsigned PPBI :1;\n[; ;pic18f2550.h: 385: unsigned DIR :1;\n[; ;pic18f2550.h: 386: unsigned ENDP :4;\n[; ;pic18f2550.h: 387: };\n[; ;pic18f2550.h: 388: struct {\n[; ;pic18f2550.h: 389: unsigned :3;\n[; ;pic18f2550.h: 390: unsigned ENDP0 :1;\n[; ;pic18f2550.h: 391: unsigned ENDP1 :1;\n[; ;pic18f2550.h: 392: unsigned ENDP2 :1;\n[; ;pic18f2550.h: 393: unsigned ENDP3 :1;\n[; ;pic18f2550.h: 394: };\n[; ;pic18f2550.h: 395: } USTATbits_t;\n[; ;pic18f2550.h: 396: extern volatile USTATbits_t USTATbits @ 0xF6C;\n[; ;pic18f2550.h: 435: extern volatile unsigned char UCON @ 0xF6D;\n\"437\n[; ;pic18f2550.h: 437: asm(\"UCON equ 0F6Dh\");\n[; <\" UCON equ 0F6Dh ;# \">\n[; ;pic18f2550.h: 440: typedef union {\n[; ;pic18f2550.h: 441: struct {\n[; ;pic18f2550.h: 442: unsigned :1;\n[; ;pic18f2550.h: 443: unsigned SUSPND :1;\n[; ;pic18f2550.h: 444: unsigned RESUME :1;\n[; ;pic18f2550.h: 445: unsigned USBEN :1;\n[; ;pic18f2550.h: 446: unsigned PKTDIS :1;\n[; ;pic18f2550.h: 447: unsigned SE0 :1;\n[; ;pic18f2550.h: 448: unsigned PPBRST :1;\n[; ;pic18f2550.h: 449: };\n[; ;pic18f2550.h: 450: } UCONbits_t;\n[; ;pic18f2550.h: 451: extern volatile UCONbits_t UCONbits @ 0xF6D;\n[; ;pic18f2550.h: 485: extern volatile unsigned char UADDR @ 0xF6E;\n\"487\n[; ;pic18f2550.h: 487: asm(\"UADDR equ 0F6Eh\");\n[; <\" UADDR equ 0F6Eh ;# \">\n[; ;pic18f2550.h: 490: typedef union {\n[; ;pic18f2550.h: 491: struct {\n[; ;pic18f2550.h: 492: unsigned ADDR :7;\n[; ;pic18f2550.h: 493: };\n[; ;pic18f2550.h: 494: struct {\n[; ;pic18f2550.h: 495: unsigned ADDR0 :1;\n[; ;pic18f2550.h: 496: unsigned ADDR1 :1;\n[; ;pic18f2550.h: 497: unsigned ADDR2 :1;\n[; ;pic18f2550.h: 498: unsigned ADDR3 :1;\n[; ;pic18f2550.h: 499: unsigned ADDR4 :1;\n[; ;pic18f2550.h: 500: unsigned ADDR5 :1;\n[; ;pic18f2550.h: 501: unsigned ADDR6 :1;\n[; ;pic18f2550.h: 502: };\n[; ;pic18f2550.h: 503: } UADDRbits_t;\n[; ;pic18f2550.h: 504: extern volatile UADDRbits_t UADDRbits @ 0xF6E;\n[; ;pic18f2550.h: 548: extern volatile unsigned char UCFG @ 0xF6F;\n\"550\n[; ;pic18f2550.h: 550: asm(\"UCFG equ 0F6Fh\");\n[; <\" UCFG equ 0F6Fh ;# \">\n[; ;pic18f2550.h: 553: typedef union {\n[; ;pic18f2550.h: 554: struct {\n[; ;pic18f2550.h: 555: unsigned PPB :2;\n[; ;pic18f2550.h: 556: unsigned FSEN :1;\n[; ;pic18f2550.h: 557: unsigned UTRDIS :1;\n[; ;pic18f2550.h: 558: unsigned UPUEN :1;\n[; ;pic18f2550.h: 559: unsigned :1;\n[; ;pic18f2550.h: 560: unsigned UOEMON :1;\n[; ;pic18f2550.h: 561: unsigned UTEYE :1;\n[; ;pic18f2550.h: 562: };\n[; ;pic18f2550.h: 563: struct {\n[; ;pic18f2550.h: 564: unsigned PPB0 :1;\n[; ;pic18f2550.h: 565: unsigned PPB1 :1;\n[; ;pic18f2550.h: 566: };\n[; ;pic18f2550.h: 567: struct {\n[; ;pic18f2550.h: 568: unsigned UPP0 :1;\n[; ;pic18f2550.h: 569: };\n[; ;pic18f2550.h: 570: struct {\n[; ;pic18f2550.h: 571: unsigned :1;\n[; ;pic18f2550.h: 572: unsigned UPP1 :1;\n[; ;pic18f2550.h: 573: };\n[; ;pic18f2550.h: 574: } UCFGbits_t;\n[; ;pic18f2550.h: 575: extern volatile UCFGbits_t UCFGbits @ 0xF6F;\n[; ;pic18f2550.h: 629: extern volatile unsigned char UEP0 @ 0xF70;\n\"631\n[; ;pic18f2550.h: 631: asm(\"UEP0 equ 0F70h\");\n[; <\" UEP0 equ 0F70h ;# \">\n[; ;pic18f2550.h: 634: typedef union {\n[; ;pic18f2550.h: 635: struct {\n[; ;pic18f2550.h: 636: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 637: unsigned EPINEN :1;\n[; ;pic18f2550.h: 638: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 639: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 640: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 641: };\n[; ;pic18f2550.h: 642: struct {\n[; ;pic18f2550.h: 643: unsigned :3;\n[; ;pic18f2550.h: 644: unsigned EP0CONDIS :1;\n[; ;pic18f2550.h: 645: };\n[; ;pic18f2550.h: 646: struct {\n[; ;pic18f2550.h: 647: unsigned :4;\n[; ;pic18f2550.h: 648: unsigned EP0HSHK :1;\n[; ;pic18f2550.h: 649: };\n[; ;pic18f2550.h: 650: struct {\n[; ;pic18f2550.h: 651: unsigned :1;\n[; ;pic18f2550.h: 652: unsigned EP0INEN :1;\n[; ;pic18f2550.h: 653: };\n[; ;pic18f2550.h: 654: struct {\n[; ;pic18f2550.h: 655: unsigned :2;\n[; ;pic18f2550.h: 656: unsigned EP0OUTEN :1;\n[; ;pic18f2550.h: 657: };\n[; ;pic18f2550.h: 658: struct {\n[; ;pic18f2550.h: 659: unsigned EP0STALL :1;\n[; ;pic18f2550.h: 660: };\n[; ;pic18f2550.h: 661: struct {\n[; ;pic18f2550.h: 662: unsigned :3;\n[; ;pic18f2550.h: 663: unsigned EPCONDIS0 :1;\n[; ;pic18f2550.h: 664: };\n[; ;pic18f2550.h: 665: struct {\n[; ;pic18f2550.h: 666: unsigned :4;\n[; ;pic18f2550.h: 667: unsigned EPHSHK0 :1;\n[; ;pic18f2550.h: 668: };\n[; ;pic18f2550.h: 669: struct {\n[; ;pic18f2550.h: 670: unsigned :1;\n[; ;pic18f2550.h: 671: unsigned EPINEN0 :1;\n[; ;pic18f2550.h: 672: };\n[; ;pic18f2550.h: 673: struct {\n[; ;pic18f2550.h: 674: unsigned :2;\n[; ;pic18f2550.h: 675: unsigned EPOUTEN0 :1;\n[; ;pic18f2550.h: 676: };\n[; ;pic18f2550.h: 677: struct {\n[; ;pic18f2550.h: 678: unsigned EPSTALL0 :1;\n[; ;pic18f2550.h: 679: };\n[; ;pic18f2550.h: 680: } UEP0bits_t;\n[; ;pic18f2550.h: 681: extern volatile UEP0bits_t UEP0bits @ 0xF70;\n[; ;pic18f2550.h: 760: extern volatile unsigned char UEP1 @ 0xF71;\n\"762\n[; ;pic18f2550.h: 762: asm(\"UEP1 equ 0F71h\");\n[; <\" UEP1 equ 0F71h ;# \">\n[; ;pic18f2550.h: 765: typedef union {\n[; ;pic18f2550.h: 766: struct {\n[; ;pic18f2550.h: 767: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 768: unsigned EPINEN :1;\n[; ;pic18f2550.h: 769: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 770: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 771: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 772: };\n[; ;pic18f2550.h: 773: struct {\n[; ;pic18f2550.h: 774: unsigned :3;\n[; ;pic18f2550.h: 775: unsigned EP1CONDIS :1;\n[; ;pic18f2550.h: 776: };\n[; ;pic18f2550.h: 777: struct {\n[; ;pic18f2550.h: 778: unsigned :4;\n[; ;pic18f2550.h: 779: unsigned EP1HSHK :1;\n[; ;pic18f2550.h: 780: };\n[; ;pic18f2550.h: 781: struct {\n[; ;pic18f2550.h: 782: unsigned :1;\n[; ;pic18f2550.h: 783: unsigned EP1INEN :1;\n[; ;pic18f2550.h: 784: };\n[; ;pic18f2550.h: 785: struct {\n[; ;pic18f2550.h: 786: unsigned :2;\n[; ;pic18f2550.h: 787: unsigned EP1OUTEN :1;\n[; ;pic18f2550.h: 788: };\n[; ;pic18f2550.h: 789: struct {\n[; ;pic18f2550.h: 790: unsigned EP1STALL :1;\n[; ;pic18f2550.h: 791: };\n[; ;pic18f2550.h: 792: struct {\n[; ;pic18f2550.h: 793: unsigned :3;\n[; ;pic18f2550.h: 794: unsigned EPCONDIS1 :1;\n[; ;pic18f2550.h: 795: };\n[; ;pic18f2550.h: 796: struct {\n[; ;pic18f2550.h: 797: unsigned :4;\n[; ;pic18f2550.h: 798: unsigned EPHSHK1 :1;\n[; ;pic18f2550.h: 799: };\n[; ;pic18f2550.h: 800: struct {\n[; ;pic18f2550.h: 801: unsigned :1;\n[; ;pic18f2550.h: 802: unsigned EPINEN1 :1;\n[; ;pic18f2550.h: 803: };\n[; ;pic18f2550.h: 804: struct {\n[; ;pic18f2550.h: 805: unsigned :2;\n[; ;pic18f2550.h: 806: unsigned EPOUTEN1 :1;\n[; ;pic18f2550.h: 807: };\n[; ;pic18f2550.h: 808: struct {\n[; ;pic18f2550.h: 809: unsigned EPSTALL1 :1;\n[; ;pic18f2550.h: 810: };\n[; ;pic18f2550.h: 811: } UEP1bits_t;\n[; ;pic18f2550.h: 812: extern volatile UEP1bits_t UEP1bits @ 0xF71;\n[; ;pic18f2550.h: 891: extern volatile unsigned char UEP2 @ 0xF72;\n\"893\n[; ;pic18f2550.h: 893: asm(\"UEP2 equ 0F72h\");\n[; <\" UEP2 equ 0F72h ;# \">\n[; ;pic18f2550.h: 896: typedef union {\n[; ;pic18f2550.h: 897: struct {\n[; ;pic18f2550.h: 898: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 899: unsigned EPINEN :1;\n[; ;pic18f2550.h: 900: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 901: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 902: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 903: };\n[; ;pic18f2550.h: 904: struct {\n[; ;pic18f2550.h: 905: unsigned :3;\n[; ;pic18f2550.h: 906: unsigned EP2CONDIS :1;\n[; ;pic18f2550.h: 907: };\n[; ;pic18f2550.h: 908: struct {\n[; ;pic18f2550.h: 909: unsigned :4;\n[; ;pic18f2550.h: 910: unsigned EP2HSHK :1;\n[; ;pic18f2550.h: 911: };\n[; ;pic18f2550.h: 912: struct {\n[; ;pic18f2550.h: 913: unsigned :1;\n[; ;pic18f2550.h: 914: unsigned EP2INEN :1;\n[; ;pic18f2550.h: 915: };\n[; ;pic18f2550.h: 916: struct {\n[; ;pic18f2550.h: 917: unsigned :2;\n[; ;pic18f2550.h: 918: unsigned EP2OUTEN :1;\n[; ;pic18f2550.h: 919: };\n[; ;pic18f2550.h: 920: struct {\n[; ;pic18f2550.h: 921: unsigned EP2STALL :1;\n[; ;pic18f2550.h: 922: };\n[; ;pic18f2550.h: 923: struct {\n[; ;pic18f2550.h: 924: unsigned :3;\n[; ;pic18f2550.h: 925: unsigned EPCONDIS2 :1;\n[; ;pic18f2550.h: 926: };\n[; ;pic18f2550.h: 927: struct {\n[; ;pic18f2550.h: 928: unsigned :4;\n[; ;pic18f2550.h: 929: unsigned EPHSHK2 :1;\n[; ;pic18f2550.h: 930: };\n[; ;pic18f2550.h: 931: struct {\n[; ;pic18f2550.h: 932: unsigned :1;\n[; ;pic18f2550.h: 933: unsigned EPINEN2 :1;\n[; ;pic18f2550.h: 934: };\n[; ;pic18f2550.h: 935: struct {\n[; ;pic18f2550.h: 936: unsigned :2;\n[; ;pic18f2550.h: 937: unsigned EPOUTEN2 :1;\n[; ;pic18f2550.h: 938: };\n[; ;pic18f2550.h: 939: struct {\n[; ;pic18f2550.h: 940: unsigned EPSTALL2 :1;\n[; ;pic18f2550.h: 941: };\n[; ;pic18f2550.h: 942: } UEP2bits_t;\n[; ;pic18f2550.h: 943: extern volatile UEP2bits_t UEP2bits @ 0xF72;\n[; ;pic18f2550.h: 1022: extern volatile unsigned char UEP3 @ 0xF73;\n\"1024\n[; ;pic18f2550.h: 1024: asm(\"UEP3 equ 0F73h\");\n[; <\" UEP3 equ 0F73h ;# \">\n[; ;pic18f2550.h: 1027: typedef union {\n[; ;pic18f2550.h: 1028: struct {\n[; ;pic18f2550.h: 1029: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1030: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1031: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1032: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1033: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1034: };\n[; ;pic18f2550.h: 1035: struct {\n[; ;pic18f2550.h: 1036: unsigned :3;\n[; ;pic18f2550.h: 1037: unsigned EP3CONDIS :1;\n[; ;pic18f2550.h: 1038: };\n[; ;pic18f2550.h: 1039: struct {\n[; ;pic18f2550.h: 1040: unsigned :4;\n[; ;pic18f2550.h: 1041: unsigned EP3HSHK :1;\n[; ;pic18f2550.h: 1042: };\n[; ;pic18f2550.h: 1043: struct {\n[; ;pic18f2550.h: 1044: unsigned :1;\n[; ;pic18f2550.h: 1045: unsigned EP3INEN :1;\n[; ;pic18f2550.h: 1046: };\n[; ;pic18f2550.h: 1047: struct {\n[; ;pic18f2550.h: 1048: unsigned :2;\n[; ;pic18f2550.h: 1049: unsigned EP3OUTEN :1;\n[; ;pic18f2550.h: 1050: };\n[; ;pic18f2550.h: 1051: struct {\n[; ;pic18f2550.h: 1052: unsigned EP3STALL :1;\n[; ;pic18f2550.h: 1053: };\n[; ;pic18f2550.h: 1054: struct {\n[; ;pic18f2550.h: 1055: unsigned :3;\n[; ;pic18f2550.h: 1056: unsigned EPCONDIS3 :1;\n[; ;pic18f2550.h: 1057: };\n[; ;pic18f2550.h: 1058: struct {\n[; ;pic18f2550.h: 1059: unsigned :4;\n[; ;pic18f2550.h: 1060: unsigned EPHSHK3 :1;\n[; ;pic18f2550.h: 1061: };\n[; ;pic18f2550.h: 1062: struct {\n[; ;pic18f2550.h: 1063: unsigned :1;\n[; ;pic18f2550.h: 1064: unsigned EPINEN3 :1;\n[; ;pic18f2550.h: 1065: };\n[; ;pic18f2550.h: 1066: struct {\n[; ;pic18f2550.h: 1067: unsigned :2;\n[; ;pic18f2550.h: 1068: unsigned EPOUTEN3 :1;\n[; ;pic18f2550.h: 1069: };\n[; ;pic18f2550.h: 1070: struct {\n[; ;pic18f2550.h: 1071: unsigned EPSTALL3 :1;\n[; ;pic18f2550.h: 1072: };\n[; ;pic18f2550.h: 1073: } UEP3bits_t;\n[; ;pic18f2550.h: 1074: extern volatile UEP3bits_t UEP3bits @ 0xF73;\n[; ;pic18f2550.h: 1153: extern volatile unsigned char UEP4 @ 0xF74;\n\"1155\n[; ;pic18f2550.h: 1155: asm(\"UEP4 equ 0F74h\");\n[; <\" UEP4 equ 0F74h ;# \">\n[; ;pic18f2550.h: 1158: typedef union {\n[; ;pic18f2550.h: 1159: struct {\n[; ;pic18f2550.h: 1160: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1161: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1162: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1163: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1164: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1165: };\n[; ;pic18f2550.h: 1166: struct {\n[; ;pic18f2550.h: 1167: unsigned :3;\n[; ;pic18f2550.h: 1168: unsigned EP4CONDIS :1;\n[; ;pic18f2550.h: 1169: };\n[; ;pic18f2550.h: 1170: struct {\n[; ;pic18f2550.h: 1171: unsigned :4;\n[; ;pic18f2550.h: 1172: unsigned EP4HSHK :1;\n[; ;pic18f2550.h: 1173: };\n[; ;pic18f2550.h: 1174: struct {\n[; ;pic18f2550.h: 1175: unsigned :1;\n[; ;pic18f2550.h: 1176: unsigned EP4INEN :1;\n[; ;pic18f2550.h: 1177: };\n[; ;pic18f2550.h: 1178: struct {\n[; ;pic18f2550.h: 1179: unsigned :2;\n[; ;pic18f2550.h: 1180: unsigned EP4OUTEN :1;\n[; ;pic18f2550.h: 1181: };\n[; ;pic18f2550.h: 1182: struct {\n[; ;pic18f2550.h: 1183: unsigned EP4STALL :1;\n[; ;pic18f2550.h: 1184: };\n[; ;pic18f2550.h: 1185: struct {\n[; ;pic18f2550.h: 1186: unsigned :3;\n[; ;pic18f2550.h: 1187: unsigned EPCONDIS4 :1;\n[; ;pic18f2550.h: 1188: };\n[; ;pic18f2550.h: 1189: struct {\n[; ;pic18f2550.h: 1190: unsigned :4;\n[; ;pic18f2550.h: 1191: unsigned EPHSHK4 :1;\n[; ;pic18f2550.h: 1192: };\n[; ;pic18f2550.h: 1193: struct {\n[; ;pic18f2550.h: 1194: unsigned :1;\n[; ;pic18f2550.h: 1195: unsigned EPINEN4 :1;\n[; ;pic18f2550.h: 1196: };\n[; ;pic18f2550.h: 1197: struct {\n[; ;pic18f2550.h: 1198: unsigned :2;\n[; ;pic18f2550.h: 1199: unsigned EPOUTEN4 :1;\n[; ;pic18f2550.h: 1200: };\n[; ;pic18f2550.h: 1201: struct {\n[; ;pic18f2550.h: 1202: unsigned EPSTALL4 :1;\n[; ;pic18f2550.h: 1203: };\n[; ;pic18f2550.h: 1204: } UEP4bits_t;\n[; ;pic18f2550.h: 1205: extern volatile UEP4bits_t UEP4bits @ 0xF74;\n[; ;pic18f2550.h: 1284: extern volatile unsigned char UEP5 @ 0xF75;\n\"1286\n[; ;pic18f2550.h: 1286: asm(\"UEP5 equ 0F75h\");\n[; <\" UEP5 equ 0F75h ;# \">\n[; ;pic18f2550.h: 1289: typedef union {\n[; ;pic18f2550.h: 1290: struct {\n[; ;pic18f2550.h: 1291: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1292: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1293: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1294: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1295: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1296: };\n[; ;pic18f2550.h: 1297: struct {\n[; ;pic18f2550.h: 1298: unsigned :3;\n[; ;pic18f2550.h: 1299: unsigned EP5CONDIS :1;\n[; ;pic18f2550.h: 1300: };\n[; ;pic18f2550.h: 1301: struct {\n[; ;pic18f2550.h: 1302: unsigned :4;\n[; ;pic18f2550.h: 1303: unsigned EP5HSHK :1;\n[; ;pic18f2550.h: 1304: };\n[; ;pic18f2550.h: 1305: struct {\n[; ;pic18f2550.h: 1306: unsigned :1;\n[; ;pic18f2550.h: 1307: unsigned EP5INEN :1;\n[; ;pic18f2550.h: 1308: };\n[; ;pic18f2550.h: 1309: struct {\n[; ;pic18f2550.h: 1310: unsigned :2;\n[; ;pic18f2550.h: 1311: unsigned EP5OUTEN :1;\n[; ;pic18f2550.h: 1312: };\n[; ;pic18f2550.h: 1313: struct {\n[; ;pic18f2550.h: 1314: unsigned EP5STALL :1;\n[; ;pic18f2550.h: 1315: };\n[; ;pic18f2550.h: 1316: struct {\n[; ;pic18f2550.h: 1317: unsigned :3;\n[; ;pic18f2550.h: 1318: unsigned EPCONDIS5 :1;\n[; ;pic18f2550.h: 1319: };\n[; ;pic18f2550.h: 1320: struct {\n[; ;pic18f2550.h: 1321: unsigned :4;\n[; ;pic18f2550.h: 1322: unsigned EPHSHK5 :1;\n[; ;pic18f2550.h: 1323: };\n[; ;pic18f2550.h: 1324: struct {\n[; ;pic18f2550.h: 1325: unsigned :1;\n[; ;pic18f2550.h: 1326: unsigned EPINEN5 :1;\n[; ;pic18f2550.h: 1327: };\n[; ;pic18f2550.h: 1328: struct {\n[; ;pic18f2550.h: 1329: unsigned :2;\n[; ;pic18f2550.h: 1330: unsigned EPOUTEN5 :1;\n[; ;pic18f2550.h: 1331: };\n[; ;pic18f2550.h: 1332: struct {\n[; ;pic18f2550.h: 1333: unsigned EPSTALL5 :1;\n[; ;pic18f2550.h: 1334: };\n[; ;pic18f2550.h: 1335: } UEP5bits_t;\n[; ;pic18f2550.h: 1336: extern volatile UEP5bits_t UEP5bits @ 0xF75;\n[; ;pic18f2550.h: 1415: extern volatile unsigned char UEP6 @ 0xF76;\n\"1417\n[; ;pic18f2550.h: 1417: asm(\"UEP6 equ 0F76h\");\n[; <\" UEP6 equ 0F76h ;# \">\n[; ;pic18f2550.h: 1420: typedef union {\n[; ;pic18f2550.h: 1421: struct {\n[; ;pic18f2550.h: 1422: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1423: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1424: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1425: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1426: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1427: };\n[; ;pic18f2550.h: 1428: struct {\n[; ;pic18f2550.h: 1429: unsigned :3;\n[; ;pic18f2550.h: 1430: unsigned EP6CONDIS :1;\n[; ;pic18f2550.h: 1431: };\n[; ;pic18f2550.h: 1432: struct {\n[; ;pic18f2550.h: 1433: unsigned :4;\n[; ;pic18f2550.h: 1434: unsigned EP6HSHK :1;\n[; ;pic18f2550.h: 1435: };\n[; ;pic18f2550.h: 1436: struct {\n[; ;pic18f2550.h: 1437: unsigned :1;\n[; ;pic18f2550.h: 1438: unsigned EP6INEN :1;\n[; ;pic18f2550.h: 1439: };\n[; ;pic18f2550.h: 1440: struct {\n[; ;pic18f2550.h: 1441: unsigned :2;\n[; ;pic18f2550.h: 1442: unsigned EP6OUTEN :1;\n[; ;pic18f2550.h: 1443: };\n[; ;pic18f2550.h: 1444: struct {\n[; ;pic18f2550.h: 1445: unsigned EP6STALL :1;\n[; ;pic18f2550.h: 1446: };\n[; ;pic18f2550.h: 1447: struct {\n[; ;pic18f2550.h: 1448: unsigned :3;\n[; ;pic18f2550.h: 1449: unsigned EPCONDIS6 :1;\n[; ;pic18f2550.h: 1450: };\n[; ;pic18f2550.h: 1451: struct {\n[; ;pic18f2550.h: 1452: unsigned :4;\n[; ;pic18f2550.h: 1453: unsigned EPHSHK6 :1;\n[; ;pic18f2550.h: 1454: };\n[; ;pic18f2550.h: 1455: struct {\n[; ;pic18f2550.h: 1456: unsigned :1;\n[; ;pic18f2550.h: 1457: unsigned EPINEN6 :1;\n[; ;pic18f2550.h: 1458: };\n[; ;pic18f2550.h: 1459: struct {\n[; ;pic18f2550.h: 1460: unsigned :2;\n[; ;pic18f2550.h: 1461: unsigned EPOUTEN6 :1;\n[; ;pic18f2550.h: 1462: };\n[; ;pic18f2550.h: 1463: struct {\n[; ;pic18f2550.h: 1464: unsigned EPSTALL6 :1;\n[; ;pic18f2550.h: 1465: };\n[; ;pic18f2550.h: 1466: } UEP6bits_t;\n[; ;pic18f2550.h: 1467: extern volatile UEP6bits_t UEP6bits @ 0xF76;\n[; ;pic18f2550.h: 1546: extern volatile unsigned char UEP7 @ 0xF77;\n\"1548\n[; ;pic18f2550.h: 1548: asm(\"UEP7 equ 0F77h\");\n[; <\" UEP7 equ 0F77h ;# \">\n[; ;pic18f2550.h: 1551: typedef union {\n[; ;pic18f2550.h: 1552: struct {\n[; ;pic18f2550.h: 1553: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1554: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1555: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1556: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1557: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1558: };\n[; ;pic18f2550.h: 1559: struct {\n[; ;pic18f2550.h: 1560: unsigned :3;\n[; ;pic18f2550.h: 1561: unsigned EP7CONDIS :1;\n[; ;pic18f2550.h: 1562: };\n[; ;pic18f2550.h: 1563: struct {\n[; ;pic18f2550.h: 1564: unsigned :4;\n[; ;pic18f2550.h: 1565: unsigned EP7HSHK :1;\n[; ;pic18f2550.h: 1566: };\n[; ;pic18f2550.h: 1567: struct {\n[; ;pic18f2550.h: 1568: unsigned :1;\n[; ;pic18f2550.h: 1569: unsigned EP7INEN :1;\n[; ;pic18f2550.h: 1570: };\n[; ;pic18f2550.h: 1571: struct {\n[; ;pic18f2550.h: 1572: unsigned :2;\n[; ;pic18f2550.h: 1573: unsigned EP7OUTEN :1;\n[; ;pic18f2550.h: 1574: };\n[; ;pic18f2550.h: 1575: struct {\n[; ;pic18f2550.h: 1576: unsigned EP7STALL :1;\n[; ;pic18f2550.h: 1577: };\n[; ;pic18f2550.h: 1578: struct {\n[; ;pic18f2550.h: 1579: unsigned :3;\n[; ;pic18f2550.h: 1580: unsigned EPCONDIS7 :1;\n[; ;pic18f2550.h: 1581: };\n[; ;pic18f2550.h: 1582: struct {\n[; ;pic18f2550.h: 1583: unsigned :4;\n[; ;pic18f2550.h: 1584: unsigned EPHSHK7 :1;\n[; ;pic18f2550.h: 1585: };\n[; ;pic18f2550.h: 1586: struct {\n[; ;pic18f2550.h: 1587: unsigned :1;\n[; ;pic18f2550.h: 1588: unsigned EPINEN7 :1;\n[; ;pic18f2550.h: 1589: };\n[; ;pic18f2550.h: 1590: struct {\n[; ;pic18f2550.h: 1591: unsigned :2;\n[; ;pic18f2550.h: 1592: unsigned EPOUTEN7 :1;\n[; ;pic18f2550.h: 1593: };\n[; ;pic18f2550.h: 1594: struct {\n[; ;pic18f2550.h: 1595: unsigned EPSTALL7 :1;\n[; ;pic18f2550.h: 1596: };\n[; ;pic18f2550.h: 1597: } UEP7bits_t;\n[; ;pic18f2550.h: 1598: extern volatile UEP7bits_t UEP7bits @ 0xF77;\n[; ;pic18f2550.h: 1677: extern volatile unsigned char UEP8 @ 0xF78;\n\"1679\n[; ;pic18f2550.h: 1679: asm(\"UEP8 equ 0F78h\");\n[; <\" UEP8 equ 0F78h ;# \">\n[; ;pic18f2550.h: 1682: typedef union {\n[; ;pic18f2550.h: 1683: struct {\n[; ;pic18f2550.h: 1684: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1685: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1686: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1687: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1688: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1689: };\n[; ;pic18f2550.h: 1690: struct {\n[; ;pic18f2550.h: 1691: unsigned :3;\n[; ;pic18f2550.h: 1692: unsigned EPCONDIS8 :1;\n[; ;pic18f2550.h: 1693: };\n[; ;pic18f2550.h: 1694: struct {\n[; ;pic18f2550.h: 1695: unsigned :4;\n[; ;pic18f2550.h: 1696: unsigned EPHSHK8 :1;\n[; ;pic18f2550.h: 1697: };\n[; ;pic18f2550.h: 1698: struct {\n[; ;pic18f2550.h: 1699: unsigned :1;\n[; ;pic18f2550.h: 1700: unsigned EPINEN8 :1;\n[; ;pic18f2550.h: 1701: };\n[; ;pic18f2550.h: 1702: struct {\n[; ;pic18f2550.h: 1703: unsigned :2;\n[; ;pic18f2550.h: 1704: unsigned EPOUTEN8 :1;\n[; ;pic18f2550.h: 1705: };\n[; ;pic18f2550.h: 1706: struct {\n[; ;pic18f2550.h: 1707: unsigned EPSTALL8 :1;\n[; ;pic18f2550.h: 1708: };\n[; ;pic18f2550.h: 1709: } UEP8bits_t;\n[; ;pic18f2550.h: 1710: extern volatile UEP8bits_t UEP8bits @ 0xF78;\n[; ;pic18f2550.h: 1764: extern volatile unsigned char UEP9 @ 0xF79;\n\"1766\n[; ;pic18f2550.h: 1766: asm(\"UEP9 equ 0F79h\");\n[; <\" UEP9 equ 0F79h ;# \">\n[; ;pic18f2550.h: 1769: typedef union {\n[; ;pic18f2550.h: 1770: struct {\n[; ;pic18f2550.h: 1771: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1772: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1773: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1774: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1775: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1776: };\n[; ;pic18f2550.h: 1777: struct {\n[; ;pic18f2550.h: 1778: unsigned :3;\n[; ;pic18f2550.h: 1779: unsigned EPCONDIS9 :1;\n[; ;pic18f2550.h: 1780: };\n[; ;pic18f2550.h: 1781: struct {\n[; ;pic18f2550.h: 1782: unsigned :4;\n[; ;pic18f2550.h: 1783: unsigned EPHSHK9 :1;\n[; ;pic18f2550.h: 1784: };\n[; ;pic18f2550.h: 1785: struct {\n[; ;pic18f2550.h: 1786: unsigned :1;\n[; ;pic18f2550.h: 1787: unsigned EPINEN9 :1;\n[; ;pic18f2550.h: 1788: };\n[; ;pic18f2550.h: 1789: struct {\n[; ;pic18f2550.h: 1790: unsigned :2;\n[; ;pic18f2550.h: 1791: unsigned EPOUTEN9 :1;\n[; ;pic18f2550.h: 1792: };\n[; ;pic18f2550.h: 1793: struct {\n[; ;pic18f2550.h: 1794: unsigned EPSTALL9 :1;\n[; ;pic18f2550.h: 1795: };\n[; ;pic18f2550.h: 1796: } UEP9bits_t;\n[; ;pic18f2550.h: 1797: extern volatile UEP9bits_t UEP9bits @ 0xF79;\n[; ;pic18f2550.h: 1851: extern volatile unsigned char UEP10 @ 0xF7A;\n\"1853\n[; ;pic18f2550.h: 1853: asm(\"UEP10 equ 0F7Ah\");\n[; <\" UEP10 equ 0F7Ah ;# \">\n[; ;pic18f2550.h: 1856: typedef union {\n[; ;pic18f2550.h: 1857: struct {\n[; ;pic18f2550.h: 1858: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1859: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1860: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1861: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1862: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1863: };\n[; ;pic18f2550.h: 1864: struct {\n[; ;pic18f2550.h: 1865: unsigned :3;\n[; ;pic18f2550.h: 1866: unsigned EPCONDIS10 :1;\n[; ;pic18f2550.h: 1867: };\n[; ;pic18f2550.h: 1868: struct {\n[; ;pic18f2550.h: 1869: unsigned :4;\n[; ;pic18f2550.h: 1870: unsigned EPHSHK10 :1;\n[; ;pic18f2550.h: 1871: };\n[; ;pic18f2550.h: 1872: struct {\n[; ;pic18f2550.h: 1873: unsigned :1;\n[; ;pic18f2550.h: 1874: unsigned EPINEN10 :1;\n[; ;pic18f2550.h: 1875: };\n[; ;pic18f2550.h: 1876: struct {\n[; ;pic18f2550.h: 1877: unsigned :2;\n[; ;pic18f2550.h: 1878: unsigned EPOUTEN10 :1;\n[; ;pic18f2550.h: 1879: };\n[; ;pic18f2550.h: 1880: struct {\n[; ;pic18f2550.h: 1881: unsigned EPSTALL10 :1;\n[; ;pic18f2550.h: 1882: };\n[; ;pic18f2550.h: 1883: } UEP10bits_t;\n[; ;pic18f2550.h: 1884: extern volatile UEP10bits_t UEP10bits @ 0xF7A;\n[; ;pic18f2550.h: 1938: extern volatile unsigned char UEP11 @ 0xF7B;\n\"1940\n[; ;pic18f2550.h: 1940: asm(\"UEP11 equ 0F7Bh\");\n[; <\" UEP11 equ 0F7Bh ;# \">\n[; ;pic18f2550.h: 1943: typedef union {\n[; ;pic18f2550.h: 1944: struct {\n[; ;pic18f2550.h: 1945: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1946: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1947: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1948: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1949: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1950: };\n[; ;pic18f2550.h: 1951: struct {\n[; ;pic18f2550.h: 1952: unsigned :3;\n[; ;pic18f2550.h: 1953: unsigned EPCONDIS11 :1;\n[; ;pic18f2550.h: 1954: };\n[; ;pic18f2550.h: 1955: struct {\n[; ;pic18f2550.h: 1956: unsigned :4;\n[; ;pic18f2550.h: 1957: unsigned EPHSHK11 :1;\n[; ;pic18f2550.h: 1958: };\n[; ;pic18f2550.h: 1959: struct {\n[; ;pic18f2550.h: 1960: unsigned :1;\n[; ;pic18f2550.h: 1961: unsigned EPINEN11 :1;\n[; ;pic18f2550.h: 1962: };\n[; ;pic18f2550.h: 1963: struct {\n[; ;pic18f2550.h: 1964: unsigned :2;\n[; ;pic18f2550.h: 1965: unsigned EPOUTEN11 :1;\n[; ;pic18f2550.h: 1966: };\n[; ;pic18f2550.h: 1967: struct {\n[; ;pic18f2550.h: 1968: unsigned EPSTALL11 :1;\n[; ;pic18f2550.h: 1969: };\n[; ;pic18f2550.h: 1970: } UEP11bits_t;\n[; ;pic18f2550.h: 1971: extern volatile UEP11bits_t UEP11bits @ 0xF7B;\n[; ;pic18f2550.h: 2025: extern volatile unsigned char UEP12 @ 0xF7C;\n\"2027\n[; ;pic18f2550.h: 2027: asm(\"UEP12 equ 0F7Ch\");\n[; <\" UEP12 equ 0F7Ch ;# \">\n[; ;pic18f2550.h: 2030: typedef union {\n[; ;pic18f2550.h: 2031: struct {\n[; ;pic18f2550.h: 2032: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2033: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2034: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2035: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2036: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2037: };\n[; ;pic18f2550.h: 2038: struct {\n[; ;pic18f2550.h: 2039: unsigned :3;\n[; ;pic18f2550.h: 2040: unsigned EPCONDIS12 :1;\n[; ;pic18f2550.h: 2041: };\n[; ;pic18f2550.h: 2042: struct {\n[; ;pic18f2550.h: 2043: unsigned :4;\n[; ;pic18f2550.h: 2044: unsigned EPHSHK12 :1;\n[; ;pic18f2550.h: 2045: };\n[; ;pic18f2550.h: 2046: struct {\n[; ;pic18f2550.h: 2047: unsigned :1;\n[; ;pic18f2550.h: 2048: unsigned EPINEN12 :1;\n[; ;pic18f2550.h: 2049: };\n[; ;pic18f2550.h: 2050: struct {\n[; ;pic18f2550.h: 2051: unsigned :2;\n[; ;pic18f2550.h: 2052: unsigned EPOUTEN12 :1;\n[; ;pic18f2550.h: 2053: };\n[; ;pic18f2550.h: 2054: struct {\n[; ;pic18f2550.h: 2055: unsigned EPSTALL12 :1;\n[; ;pic18f2550.h: 2056: };\n[; ;pic18f2550.h: 2057: } UEP12bits_t;\n[; ;pic18f2550.h: 2058: extern volatile UEP12bits_t UEP12bits @ 0xF7C;\n[; ;pic18f2550.h: 2112: extern volatile unsigned char UEP13 @ 0xF7D;\n\"2114\n[; ;pic18f2550.h: 2114: asm(\"UEP13 equ 0F7Dh\");\n[; <\" UEP13 equ 0F7Dh ;# \">\n[; ;pic18f2550.h: 2117: typedef union {\n[; ;pic18f2550.h: 2118: struct {\n[; ;pic18f2550.h: 2119: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2120: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2121: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2122: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2123: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2124: };\n[; ;pic18f2550.h: 2125: struct {\n[; ;pic18f2550.h: 2126: unsigned :3;\n[; ;pic18f2550.h: 2127: unsigned EPCONDIS13 :1;\n[; ;pic18f2550.h: 2128: };\n[; ;pic18f2550.h: 2129: struct {\n[; ;pic18f2550.h: 2130: unsigned :4;\n[; ;pic18f2550.h: 2131: unsigned EPHSHK13 :1;\n[; ;pic18f2550.h: 2132: };\n[; ;pic18f2550.h: 2133: struct {\n[; ;pic18f2550.h: 2134: unsigned :1;\n[; ;pic18f2550.h: 2135: unsigned EPINEN13 :1;\n[; ;pic18f2550.h: 2136: };\n[; ;pic18f2550.h: 2137: struct {\n[; ;pic18f2550.h: 2138: unsigned :2;\n[; ;pic18f2550.h: 2139: unsigned EPOUTEN13 :1;\n[; ;pic18f2550.h: 2140: };\n[; ;pic18f2550.h: 2141: struct {\n[; ;pic18f2550.h: 2142: unsigned EPSTALL13 :1;\n[; ;pic18f2550.h: 2143: };\n[; ;pic18f2550.h: 2144: } UEP13bits_t;\n[; ;pic18f2550.h: 2145: extern volatile UEP13bits_t UEP13bits @ 0xF7D;\n[; ;pic18f2550.h: 2199: extern volatile unsigned char UEP14 @ 0xF7E;\n\"2201\n[; ;pic18f2550.h: 2201: asm(\"UEP14 equ 0F7Eh\");\n[; <\" UEP14 equ 0F7Eh ;# \">\n[; ;pic18f2550.h: 2204: typedef union {\n[; ;pic18f2550.h: 2205: struct {\n[; ;pic18f2550.h: 2206: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2207: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2208: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2209: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2210: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2211: };\n[; ;pic18f2550.h: 2212: struct {\n[; ;pic18f2550.h: 2213: unsigned :3;\n[; ;pic18f2550.h: 2214: unsigned EPCONDIS14 :1;\n[; ;pic18f2550.h: 2215: };\n[; ;pic18f2550.h: 2216: struct {\n[; ;pic18f2550.h: 2217: unsigned :4;\n[; ;pic18f2550.h: 2218: unsigned EPHSHK14 :1;\n[; ;pic18f2550.h: 2219: };\n[; ;pic18f2550.h: 2220: struct {\n[; ;pic18f2550.h: 2221: unsigned :1;\n[; ;pic18f2550.h: 2222: unsigned EPINEN14 :1;\n[; ;pic18f2550.h: 2223: };\n[; ;pic18f2550.h: 2224: struct {\n[; ;pic18f2550.h: 2225: unsigned :2;\n[; ;pic18f2550.h: 2226: unsigned EPOUTEN14 :1;\n[; ;pic18f2550.h: 2227: };\n[; ;pic18f2550.h: 2228: struct {\n[; ;pic18f2550.h: 2229: unsigned EPSTALL14 :1;\n[; ;pic18f2550.h: 2230: };\n[; ;pic18f2550.h: 2231: } UEP14bits_t;\n[; ;pic18f2550.h: 2232: extern volatile UEP14bits_t UEP14bits @ 0xF7E;\n[; ;pic18f2550.h: 2286: extern volatile unsigned char UEP15 @ 0xF7F;\n\"2288\n[; ;pic18f2550.h: 2288: asm(\"UEP15 equ 0F7Fh\");\n[; <\" UEP15 equ 0F7Fh ;# \">\n[; ;pic18f2550.h: 2291: typedef union {\n[; ;pic18f2550.h: 2292: struct {\n[; ;pic18f2550.h: 2293: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2294: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2295: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2296: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2297: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2298: };\n[; ;pic18f2550.h: 2299: struct {\n[; ;pic18f2550.h: 2300: unsigned :3;\n[; ;pic18f2550.h: 2301: unsigned EPCONDIS15 :1;\n[; ;pic18f2550.h: 2302: };\n[; ;pic18f2550.h: 2303: struct {\n[; ;pic18f2550.h: 2304: unsigned :4;\n[; ;pic18f2550.h: 2305: unsigned EPHSHK15 :1;\n[; ;pic18f2550.h: 2306: };\n[; ;pic18f2550.h: 2307: struct {\n[; ;pic18f2550.h: 2308: unsigned :1;\n[; ;pic18f2550.h: 2309: unsigned EPINEN15 :1;\n[; ;pic18f2550.h: 2310: };\n[; ;pic18f2550.h: 2311: struct {\n[; ;pic18f2550.h: 2312: unsigned :2;\n[; ;pic18f2550.h: 2313: unsigned EPOUTEN15 :1;\n[; ;pic18f2550.h: 2314: };\n[; ;pic18f2550.h: 2315: struct {\n[; ;pic18f2550.h: 2316: unsigned EPSTALL15 :1;\n[; ;pic18f2550.h: 2317: };\n[; ;pic18f2550.h: 2318: } UEP15bits_t;\n[; ;pic18f2550.h: 2319: extern volatile UEP15bits_t UEP15bits @ 0xF7F;\n[; ;pic18f2550.h: 2373: extern volatile unsigned char PORTA @ 0xF80;\n\"2375\n[; ;pic18f2550.h: 2375: asm(\"PORTA equ 0F80h\");\n[; <\" PORTA equ 0F80h ;# \">\n[; ;pic18f2550.h: 2378: typedef union {\n[; ;pic18f2550.h: 2379: struct {\n[; ;pic18f2550.h: 2380: unsigned RA0 :1;\n[; ;pic18f2550.h: 2381: unsigned RA1 :1;\n[; ;pic18f2550.h: 2382: unsigned RA2 :1;\n[; ;pic18f2550.h: 2383: unsigned RA3 :1;\n[; ;pic18f2550.h: 2384: unsigned RA4 :1;\n[; ;pic18f2550.h: 2385: unsigned RA5 :1;\n[; ;pic18f2550.h: 2386: unsigned RA6 :1;\n[; ;pic18f2550.h: 2387: };\n[; ;pic18f2550.h: 2388: struct {\n[; ;pic18f2550.h: 2389: unsigned AN0 :1;\n[; ;pic18f2550.h: 2390: unsigned AN1 :1;\n[; ;pic18f2550.h: 2391: unsigned AN2 :1;\n[; ;pic18f2550.h: 2392: unsigned AN3 :1;\n[; ;pic18f2550.h: 2393: unsigned T0CKI :1;\n[; ;pic18f2550.h: 2394: unsigned AN4 :1;\n[; ;pic18f2550.h: 2395: unsigned OSC2 :1;\n[; ;pic18f2550.h: 2396: };\n[; ;pic18f2550.h: 2397: struct {\n[; ;pic18f2550.h: 2398: unsigned :2;\n[; ;pic18f2550.h: 2399: unsigned VREFM :1;\n[; ;pic18f2550.h: 2400: unsigned VREFP :1;\n[; ;pic18f2550.h: 2401: unsigned :1;\n[; ;pic18f2550.h: 2402: unsigned LVDIN :1;\n[; ;pic18f2550.h: 2403: };\n[; ;pic18f2550.h: 2404: struct {\n[; ;pic18f2550.h: 2405: unsigned :5;\n[; ;pic18f2550.h: 2406: unsigned HLVDIN :1;\n[; ;pic18f2550.h: 2407: };\n[; ;pic18f2550.h: 2408: struct {\n[; ;pic18f2550.h: 2409: unsigned :7;\n[; ;pic18f2550.h: 2410: unsigned RA7 :1;\n[; ;pic18f2550.h: 2411: };\n[; ;pic18f2550.h: 2412: struct {\n[; ;pic18f2550.h: 2413: unsigned :7;\n[; ;pic18f2550.h: 2414: unsigned RJPU :1;\n[; ;pic18f2550.h: 2415: };\n[; ;pic18f2550.h: 2416: struct {\n[; ;pic18f2550.h: 2417: unsigned ULPWUIN :1;\n[; ;pic18f2550.h: 2418: };\n[; ;pic18f2550.h: 2419: } PORTAbits_t;\n[; ;pic18f2550.h: 2420: extern volatile PORTAbits_t PORTAbits @ 0xF80;\n[; ;pic18f2550.h: 2529: extern volatile unsigned char PORTB @ 0xF81;\n\"2531\n[; ;pic18f2550.h: 2531: asm(\"PORTB equ 0F81h\");\n[; <\" PORTB equ 0F81h ;# \">\n[; ;pic18f2550.h: 2534: typedef union {\n[; ;pic18f2550.h: 2535: struct {\n[; ;pic18f2550.h: 2536: unsigned RB0 :1;\n[; ;pic18f2550.h: 2537: unsigned RB1 :1;\n[; ;pic18f2550.h: 2538: unsigned RB2 :1;\n[; ;pic18f2550.h: 2539: unsigned RB3 :1;\n[; ;pic18f2550.h: 2540: unsigned RB4 :1;\n[; ;pic18f2550.h: 2541: unsigned RB5 :1;\n[; ;pic18f2550.h: 2542: unsigned RB6 :1;\n[; ;pic18f2550.h: 2543: unsigned RB7 :1;\n[; ;pic18f2550.h: 2544: };\n[; ;pic18f2550.h: 2545: struct {\n[; ;pic18f2550.h: 2546: unsigned INT0 :1;\n[; ;pic18f2550.h: 2547: unsigned INT1 :1;\n[; ;pic18f2550.h: 2548: unsigned INT2 :1;\n[; ;pic18f2550.h: 2549: unsigned :2;\n[; ;pic18f2550.h: 2550: unsigned PGM :1;\n[; ;pic18f2550.h: 2551: unsigned PGC :1;\n[; ;pic18f2550.h: 2552: unsigned PGD :1;\n[; ;pic18f2550.h: 2553: };\n[; ;pic18f2550.h: 2554: struct {\n[; ;pic18f2550.h: 2555: unsigned :3;\n[; ;pic18f2550.h: 2556: unsigned CCP2_PA2 :1;\n[; ;pic18f2550.h: 2557: };\n[; ;pic18f2550.h: 2558: } PORTBbits_t;\n[; ;pic18f2550.h: 2559: extern volatile PORTBbits_t PORTBbits @ 0xF81;\n[; ;pic18f2550.h: 2638: extern volatile unsigned char PORTC @ 0xF82;\n\"2640\n[; ;pic18f2550.h: 2640: asm(\"PORTC equ 0F82h\");\n[; <\" PORTC equ 0F82h ;# \">\n[; ;pic18f2550.h: 2643: typedef union {\n[; ;pic18f2550.h: 2644: struct {\n[; ;pic18f2550.h: 2645: unsigned RC0 :1;\n[; ;pic18f2550.h: 2646: unsigned RC1 :1;\n[; ;pic18f2550.h: 2647: unsigned RC2 :1;\n[; ;pic18f2550.h: 2648: unsigned :1;\n[; ;pic18f2550.h: 2649: unsigned RC4 :1;\n[; ;pic18f2550.h: 2650: unsigned RC5 :1;\n[; ;pic18f2550.h: 2651: unsigned RC6 :1;\n[; ;pic18f2550.h: 2652: unsigned RC7 :1;\n[; ;pic18f2550.h: 2653: };\n[; ;pic18f2550.h: 2654: struct {\n[; ;pic18f2550.h: 2655: unsigned T1OSO :1;\n[; ;pic18f2550.h: 2656: unsigned T1OSI :1;\n[; ;pic18f2550.h: 2657: unsigned CCP1 :1;\n[; ;pic18f2550.h: 2658: unsigned :3;\n[; ;pic18f2550.h: 2659: unsigned TX :1;\n[; ;pic18f2550.h: 2660: unsigned RX :1;\n[; ;pic18f2550.h: 2661: };\n[; ;pic18f2550.h: 2662: struct {\n[; ;pic18f2550.h: 2663: unsigned T13CKI :1;\n[; ;pic18f2550.h: 2664: unsigned :1;\n[; ;pic18f2550.h: 2665: unsigned P1A :1;\n[; ;pic18f2550.h: 2666: unsigned :3;\n[; ;pic18f2550.h: 2667: unsigned CK :1;\n[; ;pic18f2550.h: 2668: unsigned DT :1;\n[; ;pic18f2550.h: 2669: };\n[; ;pic18f2550.h: 2670: struct {\n[; ;pic18f2550.h: 2671: unsigned :1;\n[; ;pic18f2550.h: 2672: unsigned CCP2 :1;\n[; ;pic18f2550.h: 2673: };\n[; ;pic18f2550.h: 2674: struct {\n[; ;pic18f2550.h: 2675: unsigned :2;\n[; ;pic18f2550.h: 2676: unsigned PA1 :1;\n[; ;pic18f2550.h: 2677: };\n[; ;pic18f2550.h: 2678: struct {\n[; ;pic18f2550.h: 2679: unsigned :1;\n[; ;pic18f2550.h: 2680: unsigned PA2 :1;\n[; ;pic18f2550.h: 2681: };\n[; ;pic18f2550.h: 2682: struct {\n[; ;pic18f2550.h: 2683: unsigned :3;\n[; ;pic18f2550.h: 2684: unsigned RC3 :1;\n[; ;pic18f2550.h: 2685: };\n[; ;pic18f2550.h: 2686: } PORTCbits_t;\n[; ;pic18f2550.h: 2687: extern volatile PORTCbits_t PORTCbits @ 0xF82;\n[; ;pic18f2550.h: 2791: extern volatile unsigned char PORTE @ 0xF84;\n\"2793\n[; ;pic18f2550.h: 2793: asm(\"PORTE equ 0F84h\");\n[; <\" PORTE equ 0F84h ;# \">\n[; ;pic18f2550.h: 2796: typedef union {\n[; ;pic18f2550.h: 2797: struct {\n[; ;pic18f2550.h: 2798: unsigned :3;\n[; ;pic18f2550.h: 2799: unsigned RE3 :1;\n[; ;pic18f2550.h: 2800: };\n[; ;pic18f2550.h: 2801: struct {\n[; ;pic18f2550.h: 2802: unsigned :2;\n[; ;pic18f2550.h: 2803: unsigned CCP10 :1;\n[; ;pic18f2550.h: 2804: };\n[; ;pic18f2550.h: 2805: struct {\n[; ;pic18f2550.h: 2806: unsigned :7;\n[; ;pic18f2550.h: 2807: unsigned CCP2E :1;\n[; ;pic18f2550.h: 2808: };\n[; ;pic18f2550.h: 2809: struct {\n[; ;pic18f2550.h: 2810: unsigned :6;\n[; ;pic18f2550.h: 2811: unsigned CCP6E :1;\n[; ;pic18f2550.h: 2812: };\n[; ;pic18f2550.h: 2813: struct {\n[; ;pic18f2550.h: 2814: unsigned :5;\n[; ;pic18f2550.h: 2815: unsigned CCP7E :1;\n[; ;pic18f2550.h: 2816: };\n[; ;pic18f2550.h: 2817: struct {\n[; ;pic18f2550.h: 2818: unsigned :4;\n[; ;pic18f2550.h: 2819: unsigned CCP8E :1;\n[; ;pic18f2550.h: 2820: };\n[; ;pic18f2550.h: 2821: struct {\n[; ;pic18f2550.h: 2822: unsigned :3;\n[; ;pic18f2550.h: 2823: unsigned CCP9E :1;\n[; ;pic18f2550.h: 2824: };\n[; ;pic18f2550.h: 2825: struct {\n[; ;pic18f2550.h: 2826: unsigned :2;\n[; ;pic18f2550.h: 2827: unsigned CS :1;\n[; ;pic18f2550.h: 2828: };\n[; ;pic18f2550.h: 2829: struct {\n[; ;pic18f2550.h: 2830: unsigned :7;\n[; ;pic18f2550.h: 2831: unsigned PA2E :1;\n[; ;pic18f2550.h: 2832: };\n[; ;pic18f2550.h: 2833: struct {\n[; ;pic18f2550.h: 2834: unsigned :6;\n[; ;pic18f2550.h: 2835: unsigned PB1E :1;\n[; ;pic18f2550.h: 2836: };\n[; ;pic18f2550.h: 2837: struct {\n[; ;pic18f2550.h: 2838: unsigned :2;\n[; ;pic18f2550.h: 2839: unsigned PB2 :1;\n[; ;pic18f2550.h: 2840: };\n[; ;pic18f2550.h: 2841: struct {\n[; ;pic18f2550.h: 2842: unsigned :4;\n[; ;pic18f2550.h: 2843: unsigned PB3E :1;\n[; ;pic18f2550.h: 2844: };\n[; ;pic18f2550.h: 2845: struct {\n[; ;pic18f2550.h: 2846: unsigned :5;\n[; ;pic18f2550.h: 2847: unsigned PC1E :1;\n[; ;pic18f2550.h: 2848: };\n[; ;pic18f2550.h: 2849: struct {\n[; ;pic18f2550.h: 2850: unsigned :1;\n[; ;pic18f2550.h: 2851: unsigned PC2 :1;\n[; ;pic18f2550.h: 2852: };\n[; ;pic18f2550.h: 2853: struct {\n[; ;pic18f2550.h: 2854: unsigned :3;\n[; ;pic18f2550.h: 2855: unsigned PC3E :1;\n[; ;pic18f2550.h: 2856: };\n[; ;pic18f2550.h: 2857: struct {\n[; ;pic18f2550.h: 2858: unsigned PD2 :1;\n[; ;pic18f2550.h: 2859: };\n[; ;pic18f2550.h: 2860: struct {\n[; ;pic18f2550.h: 2861: unsigned RDE :1;\n[; ;pic18f2550.h: 2862: };\n[; ;pic18f2550.h: 2863: struct {\n[; ;pic18f2550.h: 2864: unsigned RE0 :1;\n[; ;pic18f2550.h: 2865: };\n[; ;pic18f2550.h: 2866: struct {\n[; ;pic18f2550.h: 2867: unsigned :1;\n[; ;pic18f2550.h: 2868: unsigned RE1 :1;\n[; ;pic18f2550.h: 2869: };\n[; ;pic18f2550.h: 2870: struct {\n[; ;pic18f2550.h: 2871: unsigned :2;\n[; ;pic18f2550.h: 2872: unsigned RE2 :1;\n[; ;pic18f2550.h: 2873: };\n[; ;pic18f2550.h: 2874: struct {\n[; ;pic18f2550.h: 2875: unsigned :4;\n[; ;pic18f2550.h: 2876: unsigned RE4 :1;\n[; ;pic18f2550.h: 2877: };\n[; ;pic18f2550.h: 2878: struct {\n[; ;pic18f2550.h: 2879: unsigned :5;\n[; ;pic18f2550.h: 2880: unsigned RE5 :1;\n[; ;pic18f2550.h: 2881: };\n[; ;pic18f2550.h: 2882: struct {\n[; ;pic18f2550.h: 2883: unsigned :6;\n[; ;pic18f2550.h: 2884: unsigned RE6 :1;\n[; ;pic18f2550.h: 2885: };\n[; ;pic18f2550.h: 2886: struct {\n[; ;pic18f2550.h: 2887: unsigned :7;\n[; ;pic18f2550.h: 2888: unsigned RE7 :1;\n[; ;pic18f2550.h: 2889: };\n[; ;pic18f2550.h: 2890: struct {\n[; ;pic18f2550.h: 2891: unsigned :1;\n[; ;pic18f2550.h: 2892: unsigned WRE :1;\n[; ;pic18f2550.h: 2893: };\n[; ;pic18f2550.h: 2894: } PORTEbits_t;\n[; ;pic18f2550.h: 2895: extern volatile PORTEbits_t PORTEbits @ 0xF84;\n[; ;pic18f2550.h: 3024: extern volatile unsigned char LATA @ 0xF89;\n\"3026\n[; ;pic18f2550.h: 3026: asm(\"LATA equ 0F89h\");\n[; <\" LATA equ 0F89h ;# \">\n[; ;pic18f2550.h: 3029: typedef union {\n[; ;pic18f2550.h: 3030: struct {\n[; ;pic18f2550.h: 3031: unsigned LATA0 :1;\n[; ;pic18f2550.h: 3032: unsigned LATA1 :1;\n[; ;pic18f2550.h: 3033: unsigned LATA2 :1;\n[; ;pic18f2550.h: 3034: unsigned LATA3 :1;\n[; ;pic18f2550.h: 3035: unsigned LATA4 :1;\n[; ;pic18f2550.h: 3036: unsigned LATA5 :1;\n[; ;pic18f2550.h: 3037: unsigned LATA6 :1;\n[; ;pic18f2550.h: 3038: };\n[; ;pic18f2550.h: 3039: struct {\n[; ;pic18f2550.h: 3040: unsigned LA0 :1;\n[; ;pic18f2550.h: 3041: };\n[; ;pic18f2550.h: 3042: struct {\n[; ;pic18f2550.h: 3043: unsigned :1;\n[; ;pic18f2550.h: 3044: unsigned LA1 :1;\n[; ;pic18f2550.h: 3045: };\n[; ;pic18f2550.h: 3046: struct {\n[; ;pic18f2550.h: 3047: unsigned :2;\n[; ;pic18f2550.h: 3048: unsigned LA2 :1;\n[; ;pic18f2550.h: 3049: };\n[; ;pic18f2550.h: 3050: struct {\n[; ;pic18f2550.h: 3051: unsigned :3;\n[; ;pic18f2550.h: 3052: unsigned LA3 :1;\n[; ;pic18f2550.h: 3053: };\n[; ;pic18f2550.h: 3054: struct {\n[; ;pic18f2550.h: 3055: unsigned :4;\n[; ;pic18f2550.h: 3056: unsigned LA4 :1;\n[; ;pic18f2550.h: 3057: };\n[; ;pic18f2550.h: 3058: struct {\n[; ;pic18f2550.h: 3059: unsigned :5;\n[; ;pic18f2550.h: 3060: unsigned LA5 :1;\n[; ;pic18f2550.h: 3061: };\n[; ;pic18f2550.h: 3062: struct {\n[; ;pic18f2550.h: 3063: unsigned :6;\n[; ;pic18f2550.h: 3064: unsigned LA6 :1;\n[; ;pic18f2550.h: 3065: };\n[; ;pic18f2550.h: 3066: struct {\n[; ;pic18f2550.h: 3067: unsigned :7;\n[; ;pic18f2550.h: 3068: unsigned LA7 :1;\n[; ;pic18f2550.h: 3069: };\n[; ;pic18f2550.h: 3070: struct {\n[; ;pic18f2550.h: 3071: unsigned :7;\n[; ;pic18f2550.h: 3072: unsigned LATA7 :1;\n[; ;pic18f2550.h: 3073: };\n[; ;pic18f2550.h: 3074: } LATAbits_t;\n[; ;pic18f2550.h: 3075: extern volatile LATAbits_t LATAbits @ 0xF89;\n[; ;pic18f2550.h: 3159: extern volatile unsigned char LATB @ 0xF8A;\n\"3161\n[; ;pic18f2550.h: 3161: asm(\"LATB equ 0F8Ah\");\n[; <\" LATB equ 0F8Ah ;# \">\n[; ;pic18f2550.h: 3164: typedef union {\n[; ;pic18f2550.h: 3165: struct {\n[; ;pic18f2550.h: 3166: unsigned LATB0 :1;\n[; ;pic18f2550.h: 3167: unsigned LATB1 :1;\n[; ;pic18f2550.h: 3168: unsigned LATB2 :1;\n[; ;pic18f2550.h: 3169: unsigned LATB3 :1;\n[; ;pic18f2550.h: 3170: unsigned LATB4 :1;\n[; ;pic18f2550.h: 3171: unsigned LATB5 :1;\n[; ;pic18f2550.h: 3172: unsigned LATB6 :1;\n[; ;pic18f2550.h: 3173: unsigned LATB7 :1;\n[; ;pic18f2550.h: 3174: };\n[; ;pic18f2550.h: 3175: struct {\n[; ;pic18f2550.h: 3176: unsigned LB0 :1;\n[; ;pic18f2550.h: 3177: };\n[; ;pic18f2550.h: 3178: struct {\n[; ;pic18f2550.h: 3179: unsigned :1;\n[; ;pic18f2550.h: 3180: unsigned LB1 :1;\n[; ;pic18f2550.h: 3181: };\n[; ;pic18f2550.h: 3182: struct {\n[; ;pic18f2550.h: 3183: unsigned :2;\n[; ;pic18f2550.h: 3184: unsigned LB2 :1;\n[; ;pic18f2550.h: 3185: };\n[; ;pic18f2550.h: 3186: struct {\n[; ;pic18f2550.h: 3187: unsigned :3;\n[; ;pic18f2550.h: 3188: unsigned LB3 :1;\n[; ;pic18f2550.h: 3189: };\n[; ;pic18f2550.h: 3190: struct {\n[; ;pic18f2550.h: 3191: unsigned :4;\n[; ;pic18f2550.h: 3192: unsigned LB4 :1;\n[; ;pic18f2550.h: 3193: };\n[; ;pic18f2550.h: 3194: struct {\n[; ;pic18f2550.h: 3195: unsigned :5;\n[; ;pic18f2550.h: 3196: unsigned LB5 :1;\n[; ;pic18f2550.h: 3197: };\n[; ;pic18f2550.h: 3198: struct {\n[; ;pic18f2550.h: 3199: unsigned :6;\n[; ;pic18f2550.h: 3200: unsigned LB6 :1;\n[; ;pic18f2550.h: 3201: };\n[; ;pic18f2550.h: 3202: struct {\n[; ;pic18f2550.h: 3203: unsigned :7;\n[; ;pic18f2550.h: 3204: unsigned LB7 :1;\n[; ;pic18f2550.h: 3205: };\n[; ;pic18f2550.h: 3206: } LATBbits_t;\n[; ;pic18f2550.h: 3207: extern volatile LATBbits_t LATBbits @ 0xF8A;\n[; ;pic18f2550.h: 3291: extern volatile unsigned char LATC @ 0xF8B;\n\"3293\n[; ;pic18f2550.h: 3293: asm(\"LATC equ 0F8Bh\");\n[; <\" LATC equ 0F8Bh ;# \">\n[; ;pic18f2550.h: 3296: typedef union {\n[; ;pic18f2550.h: 3297: struct {\n[; ;pic18f2550.h: 3298: unsigned LATC0 :1;\n[; ;pic18f2550.h: 3299: unsigned LATC1 :1;\n[; ;pic18f2550.h: 3300: unsigned LATC2 :1;\n[; ;pic18f2550.h: 3301: unsigned :3;\n[; ;pic18f2550.h: 3302: unsigned LATC6 :1;\n[; ;pic18f2550.h: 3303: unsigned LATC7 :1;\n[; ;pic18f2550.h: 3304: };\n[; ;pic18f2550.h: 3305: struct {\n[; ;pic18f2550.h: 3306: unsigned LC0 :1;\n[; ;pic18f2550.h: 3307: };\n[; ;pic18f2550.h: 3308: struct {\n[; ;pic18f2550.h: 3309: unsigned :1;\n[; ;pic18f2550.h: 3310: unsigned LC1 :1;\n[; ;pic18f2550.h: 3311: };\n[; ;pic18f2550.h: 3312: struct {\n[; ;pic18f2550.h: 3313: unsigned :2;\n[; ;pic18f2550.h: 3314: unsigned LC2 :1;\n[; ;pic18f2550.h: 3315: };\n[; ;pic18f2550.h: 3316: struct {\n[; ;pic18f2550.h: 3317: unsigned :3;\n[; ;pic18f2550.h: 3318: unsigned LC3 :1;\n[; ;pic18f2550.h: 3319: };\n[; ;pic18f2550.h: 3320: struct {\n[; ;pic18f2550.h: 3321: unsigned :4;\n[; ;pic18f2550.h: 3322: unsigned LC4 :1;\n[; ;pic18f2550.h: 3323: };\n[; ;pic18f2550.h: 3324: struct {\n[; ;pic18f2550.h: 3325: unsigned :5;\n[; ;pic18f2550.h: 3326: unsigned LC5 :1;\n[; ;pic18f2550.h: 3327: };\n[; ;pic18f2550.h: 3328: struct {\n[; ;pic18f2550.h: 3329: unsigned :6;\n[; ;pic18f2550.h: 3330: unsigned LC6 :1;\n[; ;pic18f2550.h: 3331: };\n[; ;pic18f2550.h: 3332: struct {\n[; ;pic18f2550.h: 3333: unsigned :7;\n[; ;pic18f2550.h: 3334: unsigned LC7 :1;\n[; ;pic18f2550.h: 3335: };\n[; ;pic18f2550.h: 3336: } LATCbits_t;\n[; ;pic18f2550.h: 3337: extern volatile LATCbits_t LATCbits @ 0xF8B;\n[; ;pic18f2550.h: 3406: extern volatile unsigned char TRISA @ 0xF92;\n\"3408\n[; ;pic18f2550.h: 3408: asm(\"TRISA equ 0F92h\");\n[; <\" TRISA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3411: extern volatile unsigned char DDRA @ 0xF92;\n\"3413\n[; ;pic18f2550.h: 3413: asm(\"DDRA equ 0F92h\");\n[; <\" DDRA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3416: typedef union {\n[; ;pic18f2550.h: 3417: struct {\n[; ;pic18f2550.h: 3418: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3419: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3420: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3421: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3422: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3423: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3424: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3425: };\n[; ;pic18f2550.h: 3426: struct {\n[; ;pic18f2550.h: 3427: unsigned RA0 :1;\n[; ;pic18f2550.h: 3428: unsigned RA1 :1;\n[; ;pic18f2550.h: 3429: unsigned RA2 :1;\n[; ;pic18f2550.h: 3430: unsigned RA3 :1;\n[; ;pic18f2550.h: 3431: unsigned RA4 :1;\n[; ;pic18f2550.h: 3432: unsigned RA5 :1;\n[; ;pic18f2550.h: 3433: unsigned RA6 :1;\n[; ;pic18f2550.h: 3434: };\n[; ;pic18f2550.h: 3435: } TRISAbits_t;\n[; ;pic18f2550.h: 3436: extern volatile TRISAbits_t TRISAbits @ 0xF92;\n[; ;pic18f2550.h: 3509: typedef union {\n[; ;pic18f2550.h: 3510: struct {\n[; ;pic18f2550.h: 3511: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3512: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3513: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3514: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3515: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3516: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3517: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3518: };\n[; ;pic18f2550.h: 3519: struct {\n[; ;pic18f2550.h: 3520: unsigned RA0 :1;\n[; ;pic18f2550.h: 3521: unsigned RA1 :1;\n[; ;pic18f2550.h: 3522: unsigned RA2 :1;\n[; ;pic18f2550.h: 3523: unsigned RA3 :1;\n[; ;pic18f2550.h: 3524: unsigned RA4 :1;\n[; ;pic18f2550.h: 3525: unsigned RA5 :1;\n[; ;pic18f2550.h: 3526: unsigned RA6 :1;\n[; ;pic18f2550.h: 3527: };\n[; ;pic18f2550.h: 3528: } DDRAbits_t;\n[; ;pic18f2550.h: 3529: extern volatile DDRAbits_t DDRAbits @ 0xF92;\n[; ;pic18f2550.h: 3603: extern volatile unsigned char TRISB @ 0xF93;\n\"3605\n[; ;pic18f2550.h: 3605: asm(\"TRISB equ 0F93h\");\n[; <\" TRISB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3608: extern volatile unsigned char DDRB @ 0xF93;\n\"3610\n[; ;pic18f2550.h: 3610: asm(\"DDRB equ 0F93h\");\n[; <\" DDRB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3613: typedef union {\n[; ;pic18f2550.h: 3614: struct {\n[; ;pic18f2550.h: 3615: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3616: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3617: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3618: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3619: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3620: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3621: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3622: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3623: };\n[; ;pic18f2550.h: 3624: struct {\n[; ;pic18f2550.h: 3625: unsigned RB0 :1;\n[; ;pic18f2550.h: 3626: unsigned RB1 :1;\n[; ;pic18f2550.h: 3627: unsigned RB2 :1;\n[; ;pic18f2550.h: 3628: unsigned RB3 :1;\n[; ;pic18f2550.h: 3629: unsigned RB4 :1;\n[; ;pic18f2550.h: 3630: unsigned RB5 :1;\n[; ;pic18f2550.h: 3631: unsigned RB6 :1;\n[; ;pic18f2550.h: 3632: unsigned RB7 :1;\n[; ;pic18f2550.h: 3633: };\n[; ;pic18f2550.h: 3634: } TRISBbits_t;\n[; ;pic18f2550.h: 3635: extern volatile TRISBbits_t TRISBbits @ 0xF93;\n[; ;pic18f2550.h: 3718: typedef union {\n[; ;pic18f2550.h: 3719: struct {\n[; ;pic18f2550.h: 3720: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3721: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3722: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3723: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3724: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3725: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3726: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3727: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3728: };\n[; ;pic18f2550.h: 3729: struct {\n[; ;pic18f2550.h: 3730: unsigned RB0 :1;\n[; ;pic18f2550.h: 3731: unsigned RB1 :1;\n[; ;pic18f2550.h: 3732: unsigned RB2 :1;\n[; ;pic18f2550.h: 3733: unsigned RB3 :1;\n[; ;pic18f2550.h: 3734: unsigned RB4 :1;\n[; ;pic18f2550.h: 3735: unsigned RB5 :1;\n[; ;pic18f2550.h: 3736: unsigned RB6 :1;\n[; ;pic18f2550.h: 3737: unsigned RB7 :1;\n[; ;pic18f2550.h: 3738: };\n[; ;pic18f2550.h: 3739: } DDRBbits_t;\n[; ;pic18f2550.h: 3740: extern volatile DDRBbits_t DDRBbits @ 0xF93;\n[; ;pic18f2550.h: 3824: extern volatile unsigned char TRISC @ 0xF94;\n\"3826\n[; ;pic18f2550.h: 3826: asm(\"TRISC equ 0F94h\");\n[; <\" TRISC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3829: extern volatile unsigned char DDRC @ 0xF94;\n\"3831\n[; ;pic18f2550.h: 3831: asm(\"DDRC equ 0F94h\");\n[; <\" DDRC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3834: typedef union {\n[; ;pic18f2550.h: 3835: struct {\n[; ;pic18f2550.h: 3836: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3837: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3838: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3839: unsigned :3;\n[; ;pic18f2550.h: 3840: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3841: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3842: };\n[; ;pic18f2550.h: 3843: struct {\n[; ;pic18f2550.h: 3844: unsigned RC0 :1;\n[; ;pic18f2550.h: 3845: unsigned RC1 :1;\n[; ;pic18f2550.h: 3846: unsigned RC2 :1;\n[; ;pic18f2550.h: 3847: unsigned :3;\n[; ;pic18f2550.h: 3848: unsigned RC6 :1;\n[; ;pic18f2550.h: 3849: unsigned RC7 :1;\n[; ;pic18f2550.h: 3850: };\n[; ;pic18f2550.h: 3851: struct {\n[; ;pic18f2550.h: 3852: unsigned :3;\n[; ;pic18f2550.h: 3853: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3854: };\n[; ;pic18f2550.h: 3855: } TRISCbits_t;\n[; ;pic18f2550.h: 3856: extern volatile TRISCbits_t TRISCbits @ 0xF94;\n[; ;pic18f2550.h: 3914: typedef union {\n[; ;pic18f2550.h: 3915: struct {\n[; ;pic18f2550.h: 3916: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3917: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3918: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3919: unsigned :3;\n[; ;pic18f2550.h: 3920: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3921: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3922: };\n[; ;pic18f2550.h: 3923: struct {\n[; ;pic18f2550.h: 3924: unsigned RC0 :1;\n[; ;pic18f2550.h: 3925: unsigned RC1 :1;\n[; ;pic18f2550.h: 3926: unsigned RC2 :1;\n[; ;pic18f2550.h: 3927: unsigned :3;\n[; ;pic18f2550.h: 3928: unsigned RC6 :1;\n[; ;pic18f2550.h: 3929: unsigned RC7 :1;\n[; ;pic18f2550.h: 3930: };\n[; ;pic18f2550.h: 3931: struct {\n[; ;pic18f2550.h: 3932: unsigned :3;\n[; ;pic18f2550.h: 3933: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3934: };\n[; ;pic18f2550.h: 3935: } DDRCbits_t;\n[; ;pic18f2550.h: 3936: extern volatile DDRCbits_t DDRCbits @ 0xF94;\n[; ;pic18f2550.h: 3995: extern volatile unsigned char OSCTUNE @ 0xF9B;\n\"3997\n[; ;pic18f2550.h: 3997: asm(\"OSCTUNE equ 0F9Bh\");\n[; <\" OSCTUNE equ 0F9Bh ;# \">\n[; ;pic18f2550.h: 4000: typedef union {\n[; ;pic18f2550.h: 4001: struct {\n[; ;pic18f2550.h: 4002: unsigned TUN :5;\n[; ;pic18f2550.h: 4003: unsigned :2;\n[; ;pic18f2550.h: 4004: unsigned INTSRC :1;\n[; ;pic18f2550.h: 4005: };\n[; ;pic18f2550.h: 4006: struct {\n[; ;pic18f2550.h: 4007: unsigned TUN0 :1;\n[; ;pic18f2550.h: 4008: unsigned TUN1 :1;\n[; ;pic18f2550.h: 4009: unsigned TUN2 :1;\n[; ;pic18f2550.h: 4010: unsigned TUN3 :1;\n[; ;pic18f2550.h: 4011: unsigned TUN4 :1;\n[; ;pic18f2550.h: 4012: };\n[; ;pic18f2550.h: 4013: } OSCTUNEbits_t;\n[; ;pic18f2550.h: 4014: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n[; ;pic18f2550.h: 4053: extern volatile unsigned char PIE1 @ 0xF9D;\n\"4055\n[; ;pic18f2550.h: 4055: asm(\"PIE1 equ 0F9Dh\");\n[; <\" PIE1 equ 0F9Dh ;# \">\n[; ;pic18f2550.h: 4058: typedef union {\n[; ;pic18f2550.h: 4059: struct {\n[; ;pic18f2550.h: 4060: unsigned TMR1IE :1;\n[; ;pic18f2550.h: 4061: unsigned TMR2IE :1;\n[; ;pic18f2550.h: 4062: unsigned CCP1IE :1;\n[; ;pic18f2550.h: 4063: unsigned SSPIE :1;\n[; ;pic18f2550.h: 4064: unsigned TXIE :1;\n[; ;pic18f2550.h: 4065: unsigned RCIE :1;\n[; ;pic18f2550.h: 4066: unsigned ADIE :1;\n[; ;pic18f2550.h: 4067: };\n[; ;pic18f2550.h: 4068: struct {\n[; ;pic18f2550.h: 4069: unsigned :5;\n[; ;pic18f2550.h: 4070: unsigned RC1IE :1;\n[; ;pic18f2550.h: 4071: };\n[; ;pic18f2550.h: 4072: struct {\n[; ;pic18f2550.h: 4073: unsigned :4;\n[; ;pic18f2550.h: 4074: unsigned TX1IE :1;\n[; ;pic18f2550.h: 4075: };\n[; ;pic18f2550.h: 4076: } PIE1bits_t;\n[; ;pic18f2550.h: 4077: extern volatile PIE1bits_t PIE1bits @ 0xF9D;\n[; ;pic18f2550.h: 4126: extern volatile unsigned char PIR1 @ 0xF9E;\n\"4128\n[; ;pic18f2550.h: 4128: asm(\"PIR1 equ 0F9Eh\");\n[; <\" PIR1 equ 0F9Eh ;# \">\n[; ;pic18f2550.h: 4131: typedef union {\n[; ;pic18f2550.h: 4132: struct {\n[; ;pic18f2550.h: 4133: unsigned TMR1IF :1;\n[; ;pic18f2550.h: 4134: unsigned TMR2IF :1;\n[; ;pic18f2550.h: 4135: unsigned CCP1IF :1;\n[; ;pic18f2550.h: 4136: unsigned SSPIF :1;\n[; ;pic18f2550.h: 4137: unsigned TXIF :1;\n[; ;pic18f2550.h: 4138: unsigned RCIF :1;\n[; ;pic18f2550.h: 4139: unsigned ADIF :1;\n[; ;pic18f2550.h: 4140: };\n[; ;pic18f2550.h: 4141: struct {\n[; ;pic18f2550.h: 4142: unsigned :5;\n[; ;pic18f2550.h: 4143: unsigned RC1IF :1;\n[; ;pic18f2550.h: 4144: };\n[; ;pic18f2550.h: 4145: struct {\n[; ;pic18f2550.h: 4146: unsigned :4;\n[; ;pic18f2550.h: 4147: unsigned TX1IF :1;\n[; ;pic18f2550.h: 4148: };\n[; ;pic18f2550.h: 4149: } PIR1bits_t;\n[; ;pic18f2550.h: 4150: extern volatile PIR1bits_t PIR1bits @ 0xF9E;\n[; ;pic18f2550.h: 4199: extern volatile unsigned char IPR1 @ 0xF9F;\n\"4201\n[; ;pic18f2550.h: 4201: asm(\"IPR1 equ 0F9Fh\");\n[; <\" IPR1 equ 0F9Fh ;# \">\n[; ;pic18f2550.h: 4204: typedef union {\n[; ;pic18f2550.h: 4205: struct {\n[; ;pic18f2550.h: 4206: unsigned TMR1IP :1;\n[; ;pic18f2550.h: 4207: unsigned TMR2IP :1;\n[; ;pic18f2550.h: 4208: unsigned CCP1IP :1;\n[; ;pic18f2550.h: 4209: unsigned SSPIP :1;\n[; ;pic18f2550.h: 4210: unsigned TXIP :1;\n[; ;pic18f2550.h: 4211: unsigned RCIP :1;\n[; ;pic18f2550.h: 4212: unsigned ADIP :1;\n[; ;pic18f2550.h: 4213: };\n[; ;pic18f2550.h: 4214: struct {\n[; ;pic18f2550.h: 4215: unsigned :5;\n[; ;pic18f2550.h: 4216: unsigned RC1IP :1;\n[; ;pic18f2550.h: 4217: };\n[; ;pic18f2550.h: 4218: struct {\n[; ;pic18f2550.h: 4219: unsigned :4;\n[; ;pic18f2550.h: 4220: unsigned TX1IP :1;\n[; ;pic18f2550.h: 4221: };\n[; ;pic18f2550.h: 4222: } IPR1bits_t;\n[; ;pic18f2550.h: 4223: extern volatile IPR1bits_t IPR1bits @ 0xF9F;\n[; ;pic18f2550.h: 4272: extern volatile unsigned char PIE2 @ 0xFA0;\n\"4274\n[; ;pic18f2550.h: 4274: asm(\"PIE2 equ 0FA0h\");\n[; <\" PIE2 equ 0FA0h ;# \">\n[; ;pic18f2550.h: 4277: typedef union {\n[; ;pic18f2550.h: 4278: struct {\n[; ;pic18f2550.h: 4279: unsigned CCP2IE :1;\n[; ;pic18f2550.h: 4280: unsigned TMR3IE :1;\n[; ;pic18f2550.h: 4281: unsigned HLVDIE :1;\n[; ;pic18f2550.h: 4282: unsigned BCLIE :1;\n[; ;pic18f2550.h: 4283: unsigned EEIE :1;\n[; ;pic18f2550.h: 4284: unsigned USBIE :1;\n[; ;pic18f2550.h: 4285: unsigned CMIE :1;\n[; ;pic18f2550.h: 4286: unsigned OSCFIE :1;\n[; ;pic18f2550.h: 4287: };\n[; ;pic18f2550.h: 4288: struct {\n[; ;pic18f2550.h: 4289: unsigned :2;\n[; ;pic18f2550.h: 4290: unsigned LVDIE :1;\n[; ;pic18f2550.h: 4291: };\n[; ;pic18f2550.h: 4292: } PIE2bits_t;\n[; ;pic18f2550.h: 4293: extern volatile PIE2bits_t PIE2bits @ 0xFA0;\n[; ;pic18f2550.h: 4342: extern volatile unsigned char PIR2 @ 0xFA1;\n\"4344\n[; ;pic18f2550.h: 4344: asm(\"PIR2 equ 0FA1h\");\n[; <\" PIR2 equ 0FA1h ;# \">\n[; ;pic18f2550.h: 4347: typedef union {\n[; ;pic18f2550.h: 4348: struct {\n[; ;pic18f2550.h: 4349: unsigned CCP2IF :1;\n[; ;pic18f2550.h: 4350: unsigned TMR3IF :1;\n[; ;pic18f2550.h: 4351: unsigned HLVDIF :1;\n[; ;pic18f2550.h: 4352: unsigned BCLIF :1;\n[; ;pic18f2550.h: 4353: unsigned EEIF :1;\n[; ;pic18f2550.h: 4354: unsigned USBIF :1;\n[; ;pic18f2550.h: 4355: unsigned CMIF :1;\n[; ;pic18f2550.h: 4356: unsigned OSCFIF :1;\n[; ;pic18f2550.h: 4357: };\n[; ;pic18f2550.h: 4358: struct {\n[; ;pic18f2550.h: 4359: unsigned :2;\n[; ;pic18f2550.h: 4360: unsigned LVDIF :1;\n[; ;pic18f2550.h: 4361: };\n[; ;pic18f2550.h: 4362: } PIR2bits_t;\n[; ;pic18f2550.h: 4363: extern volatile PIR2bits_t PIR2bits @ 0xFA1;\n[; ;pic18f2550.h: 4412: extern volatile unsigned char IPR2 @ 0xFA2;\n\"4414\n[; ;pic18f2550.h: 4414: asm(\"IPR2 equ 0FA2h\");\n[; <\" IPR2 equ 0FA2h ;# \">\n[; ;pic18f2550.h: 4417: typedef union {\n[; ;pic18f2550.h: 4418: struct {\n[; ;pic18f2550.h: 4419: unsigned CCP2IP :1;\n[; ;pic18f2550.h: 4420: unsigned TMR3IP :1;\n[; ;pic18f2550.h: 4421: unsigned HLVDIP :1;\n[; ;pic18f2550.h: 4422: unsigned BCLIP :1;\n[; ;pic18f2550.h: 4423: unsigned EEIP :1;\n[; ;pic18f2550.h: 4424: unsigned USBIP :1;\n[; ;pic18f2550.h: 4425: unsigned CMIP :1;\n[; ;pic18f2550.h: 4426: unsigned OSCFIP :1;\n[; ;pic18f2550.h: 4427: };\n[; ;pic18f2550.h: 4428: struct {\n[; ;pic18f2550.h: 4429: unsigned :2;\n[; ;pic18f2550.h: 4430: unsigned LVDIP :1;\n[; ;pic18f2550.h: 4431: };\n[; ;pic18f2550.h: 4432: } IPR2bits_t;\n[; ;pic18f2550.h: 4433: extern volatile IPR2bits_t IPR2bits @ 0xFA2;\n[; ;pic18f2550.h: 4482: extern volatile unsigned char EECON1 @ 0xFA6;\n\"4484\n[; ;pic18f2550.h: 4484: asm(\"EECON1 equ 0FA6h\");\n[; <\" EECON1 equ 0FA6h ;# \">\n[; ;pic18f2550.h: 4487: typedef union {\n[; ;pic18f2550.h: 4488: struct {\n[; ;pic18f2550.h: 4489: unsigned RD :1;\n[; ;pic18f2550.h: 4490: unsigned WR :1;\n[; ;pic18f2550.h: 4491: unsigned WREN :1;\n[; ;pic18f2550.h: 4492: unsigned WRERR :1;\n[; ;pic18f2550.h: 4493: unsigned FREE :1;\n[; ;pic18f2550.h: 4494: unsigned :1;\n[; ;pic18f2550.h: 4495: unsigned CFGS :1;\n[; ;pic18f2550.h: 4496: unsigned EEPGD :1;\n[; ;pic18f2550.h: 4497: };\n[; ;pic18f2550.h: 4498: struct {\n[; ;pic18f2550.h: 4499: unsigned :6;\n[; ;pic18f2550.h: 4500: unsigned EEFS :1;\n[; ;pic18f2550.h: 4501: };\n[; ;pic18f2550.h: 4502: } EECON1bits_t;\n[; ;pic18f2550.h: 4503: extern volatile EECON1bits_t EECON1bits @ 0xFA6;\n[; ;pic18f2550.h: 4547: extern volatile unsigned char EECON2 @ 0xFA7;\n\"4549\n[; ;pic18f2550.h: 4549: asm(\"EECON2 equ 0FA7h\");\n[; <\" EECON2 equ 0FA7h ;# \">\n[; ;pic18f2550.h: 4553: extern volatile unsigned char EEDATA @ 0xFA8;\n\"4555\n[; ;pic18f2550.h: 4555: asm(\"EEDATA equ 0FA8h\");\n[; <\" EEDATA equ 0FA8h ;# \">\n[; ;pic18f2550.h: 4559: extern volatile unsigned char EEADR @ 0xFA9;\n\"4561\n[; ;pic18f2550.h: 4561: asm(\"EEADR equ 0FA9h\");\n[; <\" EEADR equ 0FA9h ;# \">\n[; ;pic18f2550.h: 4565: extern volatile unsigned char RCSTA @ 0xFAB;\n\"4567\n[; ;pic18f2550.h: 4567: asm(\"RCSTA equ 0FABh\");\n[; <\" RCSTA equ 0FABh ;# \">\n[; ;pic18f2550.h: 4570: extern volatile unsigned char RCSTA1 @ 0xFAB;\n\"4572\n[; ;pic18f2550.h: 4572: asm(\"RCSTA1 equ 0FABh\");\n[; <\" RCSTA1 equ 0FABh ;# \">\n[; ;pic18f2550.h: 4575: typedef union {\n[; ;pic18f2550.h: 4576: struct {\n[; ;pic18f2550.h: 4577: unsigned RX9D :1;\n[; ;pic18f2550.h: 4578: unsigned OERR :1;\n[; ;pic18f2550.h: 4579: unsigned FERR :1;\n[; ;pic18f2550.h: 4580: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4581: unsigned CREN :1;\n[; ;pic18f2550.h: 4582: unsigned SREN :1;\n[; ;pic18f2550.h: 4583: unsigned RX9 :1;\n[; ;pic18f2550.h: 4584: unsigned SPEN :1;\n[; ;pic18f2550.h: 4585: };\n[; ;pic18f2550.h: 4586: struct {\n[; ;pic18f2550.h: 4587: unsigned :3;\n[; ;pic18f2550.h: 4588: unsigned ADEN :1;\n[; ;pic18f2550.h: 4589: };\n[; ;pic18f2550.h: 4590: struct {\n[; ;pic18f2550.h: 4591: unsigned :5;\n[; ;pic18f2550.h: 4592: unsigned SRENA :1;\n[; ;pic18f2550.h: 4593: };\n[; ;pic18f2550.h: 4594: } RCSTAbits_t;\n[; ;pic18f2550.h: 4595: extern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n[; ;pic18f2550.h: 4648: typedef union {\n[; ;pic18f2550.h: 4649: struct {\n[; ;pic18f2550.h: 4650: unsigned RX9D :1;\n[; ;pic18f2550.h: 4651: unsigned OERR :1;\n[; ;pic18f2550.h: 4652: unsigned FERR :1;\n[; ;pic18f2550.h: 4653: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4654: unsigned CREN :1;\n[; ;pic18f2550.h: 4655: unsigned SREN :1;\n[; ;pic18f2550.h: 4656: unsigned RX9 :1;\n[; ;pic18f2550.h: 4657: unsigned SPEN :1;\n[; ;pic18f2550.h: 4658: };\n[; ;pic18f2550.h: 4659: struct {\n[; ;pic18f2550.h: 4660: unsigned :3;\n[; ;pic18f2550.h: 4661: unsigned ADEN :1;\n[; ;pic18f2550.h: 4662: };\n[; ;pic18f2550.h: 4663: struct {\n[; ;pic18f2550.h: 4664: unsigned :5;\n[; ;pic18f2550.h: 4665: unsigned SRENA :1;\n[; ;pic18f2550.h: 4666: };\n[; ;pic18f2550.h: 4667: } RCSTA1bits_t;\n[; ;pic18f2550.h: 4668: extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n[; ;pic18f2550.h: 4722: extern volatile unsigned char TXSTA @ 0xFAC;\n\"4724\n[; ;pic18f2550.h: 4724: asm(\"TXSTA equ 0FACh\");\n[; <\" TXSTA equ 0FACh ;# \">\n[; ;pic18f2550.h: 4727: extern volatile unsigned char TXSTA1 @ 0xFAC;\n\"4729\n[; ;pic18f2550.h: 4729: asm(\"TXSTA1 equ 0FACh\");\n[; <\" TXSTA1 equ 0FACh ;# \">\n[; ;pic18f2550.h: 4732: typedef union {\n[; ;pic18f2550.h: 4733: struct {\n[; ;pic18f2550.h: 4734: unsigned TX9D :1;\n[; ;pic18f2550.h: 4735: unsigned TRMT :1;\n[; ;pic18f2550.h: 4736: unsigned BRGH :1;\n[; ;pic18f2550.h: 4737: unsigned SENDB :1;\n[; ;pic18f2550.h: 4738: unsigned SYNC :1;\n[; ;pic18f2550.h: 4739: unsigned TXEN :1;\n[; ;pic18f2550.h: 4740: unsigned TX9 :1;\n[; ;pic18f2550.h: 4741: unsigned CSRC :1;\n[; ;pic18f2550.h: 4742: };\n[; ;pic18f2550.h: 4743: struct {\n[; ;pic18f2550.h: 4744: unsigned :2;\n[; ;pic18f2550.h: 4745: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4746: };\n[; ;pic18f2550.h: 4747: struct {\n[; ;pic18f2550.h: 4748: unsigned :7;\n[; ;pic18f2550.h: 4749: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4750: };\n[; ;pic18f2550.h: 4751: struct {\n[; ;pic18f2550.h: 4752: unsigned :3;\n[; ;pic18f2550.h: 4753: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4754: };\n[; ;pic18f2550.h: 4755: struct {\n[; ;pic18f2550.h: 4756: unsigned :4;\n[; ;pic18f2550.h: 4757: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4758: };\n[; ;pic18f2550.h: 4759: struct {\n[; ;pic18f2550.h: 4760: unsigned :1;\n[; ;pic18f2550.h: 4761: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4762: };\n[; ;pic18f2550.h: 4763: struct {\n[; ;pic18f2550.h: 4764: unsigned :6;\n[; ;pic18f2550.h: 4765: unsigned TX91 :1;\n[; ;pic18f2550.h: 4766: };\n[; ;pic18f2550.h: 4767: struct {\n[; ;pic18f2550.h: 4768: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4769: };\n[; ;pic18f2550.h: 4770: struct {\n[; ;pic18f2550.h: 4771: unsigned :5;\n[; ;pic18f2550.h: 4772: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4773: };\n[; ;pic18f2550.h: 4774: } TXSTAbits_t;\n[; ;pic18f2550.h: 4775: extern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n[; ;pic18f2550.h: 4858: typedef union {\n[; ;pic18f2550.h: 4859: struct {\n[; ;pic18f2550.h: 4860: unsigned TX9D :1;\n[; ;pic18f2550.h: 4861: unsigned TRMT :1;\n[; ;pic18f2550.h: 4862: unsigned BRGH :1;\n[; ;pic18f2550.h: 4863: unsigned SENDB :1;\n[; ;pic18f2550.h: 4864: unsigned SYNC :1;\n[; ;pic18f2550.h: 4865: unsigned TXEN :1;\n[; ;pic18f2550.h: 4866: unsigned TX9 :1;\n[; ;pic18f2550.h: 4867: unsigned CSRC :1;\n[; ;pic18f2550.h: 4868: };\n[; ;pic18f2550.h: 4869: struct {\n[; ;pic18f2550.h: 4870: unsigned :2;\n[; ;pic18f2550.h: 4871: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4872: };\n[; ;pic18f2550.h: 4873: struct {\n[; ;pic18f2550.h: 4874: unsigned :7;\n[; ;pic18f2550.h: 4875: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4876: };\n[; ;pic18f2550.h: 4877: struct {\n[; ;pic18f2550.h: 4878: unsigned :3;\n[; ;pic18f2550.h: 4879: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4880: };\n[; ;pic18f2550.h: 4881: struct {\n[; ;pic18f2550.h: 4882: unsigned :4;\n[; ;pic18f2550.h: 4883: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4884: };\n[; ;pic18f2550.h: 4885: struct {\n[; ;pic18f2550.h: 4886: unsigned :1;\n[; ;pic18f2550.h: 4887: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4888: };\n[; ;pic18f2550.h: 4889: struct {\n[; ;pic18f2550.h: 4890: unsigned :6;\n[; ;pic18f2550.h: 4891: unsigned TX91 :1;\n[; ;pic18f2550.h: 4892: };\n[; ;pic18f2550.h: 4893: struct {\n[; ;pic18f2550.h: 4894: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4895: };\n[; ;pic18f2550.h: 4896: struct {\n[; ;pic18f2550.h: 4897: unsigned :5;\n[; ;pic18f2550.h: 4898: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4899: };\n[; ;pic18f2550.h: 4900: } TXSTA1bits_t;\n[; ;pic18f2550.h: 4901: extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n[; ;pic18f2550.h: 4985: extern volatile unsigned char TXREG @ 0xFAD;\n\"4987\n[; ;pic18f2550.h: 4987: asm(\"TXREG equ 0FADh\");\n[; <\" TXREG equ 0FADh ;# \">\n[; ;pic18f2550.h: 4990: extern volatile unsigned char TXREG1 @ 0xFAD;\n\"4992\n[; ;pic18f2550.h: 4992: asm(\"TXREG1 equ 0FADh\");\n[; <\" TXREG1 equ 0FADh ;# \">\n[; ;pic18f2550.h: 4996: extern volatile unsigned char RCREG @ 0xFAE;\n\"4998\n[; ;pic18f2550.h: 4998: asm(\"RCREG equ 0FAEh\");\n[; <\" RCREG equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5001: extern volatile unsigned char RCREG1 @ 0xFAE;\n\"5003\n[; ;pic18f2550.h: 5003: asm(\"RCREG1 equ 0FAEh\");\n[; <\" RCREG1 equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5007: extern volatile unsigned char SPBRG @ 0xFAF;\n\"5009\n[; ;pic18f2550.h: 5009: asm(\"SPBRG equ 0FAFh\");\n[; <\" SPBRG equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5012: extern volatile unsigned char SPBRG1 @ 0xFAF;\n\"5014\n[; ;pic18f2550.h: 5014: asm(\"SPBRG1 equ 0FAFh\");\n[; <\" SPBRG1 equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5018: extern volatile unsigned char SPBRGH @ 0xFB0;\n\"5020\n[; ;pic18f2550.h: 5020: asm(\"SPBRGH equ 0FB0h\");\n[; <\" SPBRGH equ 0FB0h ;# \">\n[; ;pic18f2550.h: 5024: extern volatile unsigned char T3CON @ 0xFB1;\n\"5026\n[; ;pic18f2550.h: 5026: asm(\"T3CON equ 0FB1h\");\n[; <\" T3CON equ 0FB1h ;# \">\n[; ;pic18f2550.h: 5029: typedef union {\n[; ;pic18f2550.h: 5030: struct {\n[; ;pic18f2550.h: 5031: unsigned :2;\n[; ;pic18f2550.h: 5032: unsigned NOT_T3SYNC :1;\n[; ;pic18f2550.h: 5033: };\n[; ;pic18f2550.h: 5034: struct {\n[; ;pic18f2550.h: 5035: unsigned TMR3ON :1;\n[; ;pic18f2550.h: 5036: unsigned TMR3CS :1;\n[; ;pic18f2550.h: 5037: unsigned nT3SYNC :1;\n[; ;pic18f2550.h: 5038: unsigned T3CCP1 :1;\n[; ;pic18f2550.h: 5039: unsigned T3CKPS :2;\n[; ;pic18f2550.h: 5040: unsigned T3CCP2 :1;\n[; ;pic18f2550.h: 5041: unsigned RD16 :1;\n[; ;pic18f2550.h: 5042: };\n[; ;pic18f2550.h: 5043: struct {\n[; ;pic18f2550.h: 5044: unsigned :2;\n[; ;pic18f2550.h: 5045: unsigned T3SYNC :1;\n[; ;pic18f2550.h: 5046: unsigned :1;\n[; ;pic18f2550.h: 5047: unsigned T3CKPS0 :1;\n[; ;pic18f2550.h: 5048: unsigned T3CKPS1 :1;\n[; ;pic18f2550.h: 5049: };\n[; ;pic18f2550.h: 5050: struct {\n[; ;pic18f2550.h: 5051: unsigned :2;\n[; ;pic18f2550.h: 5052: unsigned T3NSYNC :1;\n[; ;pic18f2550.h: 5053: };\n[; ;pic18f2550.h: 5054: struct {\n[; ;pic18f2550.h: 5055: unsigned :7;\n[; ;pic18f2550.h: 5056: unsigned RD163 :1;\n[; ;pic18f2550.h: 5057: };\n[; ;pic18f2550.h: 5058: struct {\n[; ;pic18f2550.h: 5059: unsigned :3;\n[; ;pic18f2550.h: 5060: unsigned SOSCEN3 :1;\n[; ;pic18f2550.h: 5061: };\n[; ;pic18f2550.h: 5062: struct {\n[; ;pic18f2550.h: 5063: unsigned :7;\n[; ;pic18f2550.h: 5064: unsigned T3RD16 :1;\n[; ;pic18f2550.h: 5065: };\n[; ;pic18f2550.h: 5066: } T3CONbits_t;\n[; ;pic18f2550.h: 5067: extern volatile T3CONbits_t T3CONbits @ 0xFB1;\n[; ;pic18f2550.h: 5146: extern volatile unsigned short TMR3 @ 0xFB2;\n\"5148\n[; ;pic18f2550.h: 5148: asm(\"TMR3 equ 0FB2h\");\n[; <\" TMR3 equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5152: extern volatile unsigned char TMR3L @ 0xFB2;\n\"5154\n[; ;pic18f2550.h: 5154: asm(\"TMR3L equ 0FB2h\");\n[; <\" TMR3L equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5158: extern volatile unsigned char TMR3H @ 0xFB3;\n\"5160\n[; ;pic18f2550.h: 5160: asm(\"TMR3H equ 0FB3h\");\n[; <\" TMR3H equ 0FB3h ;# \">\n[; ;pic18f2550.h: 5164: extern volatile unsigned char CMCON @ 0xFB4;\n\"5166\n[; ;pic18f2550.h: 5166: asm(\"CMCON equ 0FB4h\");\n[; <\" CMCON equ 0FB4h ;# \">\n[; ;pic18f2550.h: 5169: typedef union {\n[; ;pic18f2550.h: 5170: struct {\n[; ;pic18f2550.h: 5171: unsigned CM :3;\n[; ;pic18f2550.h: 5172: unsigned CIS :1;\n[; ;pic18f2550.h: 5173: unsigned C1INV :1;\n[; ;pic18f2550.h: 5174: unsigned C2INV :1;\n[; ;pic18f2550.h: 5175: unsigned C1OUT :1;\n[; ;pic18f2550.h: 5176: unsigned C2OUT :1;\n[; ;pic18f2550.h: 5177: };\n[; ;pic18f2550.h: 5178: struct {\n[; ;pic18f2550.h: 5179: unsigned CM0 :1;\n[; ;pic18f2550.h: 5180: unsigned CM1 :1;\n[; ;pic18f2550.h: 5181: unsigned CM2 :1;\n[; ;pic18f2550.h: 5182: };\n[; ;pic18f2550.h: 5183: struct {\n[; ;pic18f2550.h: 5184: unsigned CMEN0 :1;\n[; ;pic18f2550.h: 5185: };\n[; ;pic18f2550.h: 5186: struct {\n[; ;pic18f2550.h: 5187: unsigned :1;\n[; ;pic18f2550.h: 5188: unsigned CMEN1 :1;\n[; ;pic18f2550.h: 5189: };\n[; ;pic18f2550.h: 5190: struct {\n[; ;pic18f2550.h: 5191: unsigned :2;\n[; ;pic18f2550.h: 5192: unsigned CMEN2 :1;\n[; ;pic18f2550.h: 5193: };\n[; ;pic18f2550.h: 5194: } CMCONbits_t;\n[; ;pic18f2550.h: 5195: extern volatile CMCONbits_t CMCONbits @ 0xFB4;\n[; ;pic18f2550.h: 5259: extern volatile unsigned char CVRCON @ 0xFB5;\n\"5261\n[; ;pic18f2550.h: 5261: asm(\"CVRCON equ 0FB5h\");\n[; <\" CVRCON equ 0FB5h ;# \">\n[; ;pic18f2550.h: 5264: typedef union {\n[; ;pic18f2550.h: 5265: struct {\n[; ;pic18f2550.h: 5266: unsigned CVR :4;\n[; ;pic18f2550.h: 5267: unsigned CVRSS :1;\n[; ;pic18f2550.h: 5268: unsigned CVRR :1;\n[; ;pic18f2550.h: 5269: unsigned CVROE :1;\n[; ;pic18f2550.h: 5270: unsigned CVREN :1;\n[; ;pic18f2550.h: 5271: };\n[; ;pic18f2550.h: 5272: struct {\n[; ;pic18f2550.h: 5273: unsigned CVR0 :1;\n[; ;pic18f2550.h: 5274: unsigned CVR1 :1;\n[; ;pic18f2550.h: 5275: unsigned CVR2 :1;\n[; ;pic18f2550.h: 5276: unsigned CVR3 :1;\n[; ;pic18f2550.h: 5277: unsigned CVREF :1;\n[; ;pic18f2550.h: 5278: };\n[; ;pic18f2550.h: 5279: struct {\n[; ;pic18f2550.h: 5280: unsigned :6;\n[; ;pic18f2550.h: 5281: unsigned CVROEN :1;\n[; ;pic18f2550.h: 5282: };\n[; ;pic18f2550.h: 5283: } CVRCONbits_t;\n[; ;pic18f2550.h: 5284: extern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n[; ;pic18f2550.h: 5343: extern volatile unsigned char ECCP1AS @ 0xFB6;\n\"5345\n[; ;pic18f2550.h: 5345: asm(\"ECCP1AS equ 0FB6h\");\n[; <\" ECCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5348: extern volatile unsigned char CCP1AS @ 0xFB6;\n\"5350\n[; ;pic18f2550.h: 5350: asm(\"CCP1AS equ 0FB6h\");\n[; <\" CCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5353: typedef union {\n[; ;pic18f2550.h: 5354: struct {\n[; ;pic18f2550.h: 5355: unsigned :2;\n[; ;pic18f2550.h: 5356: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5357: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5358: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5359: };\n[; ;pic18f2550.h: 5360: struct {\n[; ;pic18f2550.h: 5361: unsigned :2;\n[; ;pic18f2550.h: 5362: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5363: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5364: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5365: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5366: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5367: };\n[; ;pic18f2550.h: 5368: } ECCP1ASbits_t;\n[; ;pic18f2550.h: 5369: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5412: typedef union {\n[; ;pic18f2550.h: 5413: struct {\n[; ;pic18f2550.h: 5414: unsigned :2;\n[; ;pic18f2550.h: 5415: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5416: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5417: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5418: };\n[; ;pic18f2550.h: 5419: struct {\n[; ;pic18f2550.h: 5420: unsigned :2;\n[; ;pic18f2550.h: 5421: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5422: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5423: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5424: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5425: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5426: };\n[; ;pic18f2550.h: 5427: } CCP1ASbits_t;\n[; ;pic18f2550.h: 5428: extern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5472: extern volatile unsigned char ECCP1DEL @ 0xFB7;\n\"5474\n[; ;pic18f2550.h: 5474: asm(\"ECCP1DEL equ 0FB7h\");\n[; <\" ECCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5477: extern volatile unsigned char CCP1DEL @ 0xFB7;\n\"5479\n[; ;pic18f2550.h: 5479: asm(\"CCP1DEL equ 0FB7h\");\n[; <\" CCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5482: typedef union {\n[; ;pic18f2550.h: 5483: struct {\n[; ;pic18f2550.h: 5484: unsigned :7;\n[; ;pic18f2550.h: 5485: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5486: };\n[; ;pic18f2550.h: 5487: } ECCP1DELbits_t;\n[; ;pic18f2550.h: 5488: extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5496: typedef union {\n[; ;pic18f2550.h: 5497: struct {\n[; ;pic18f2550.h: 5498: unsigned :7;\n[; ;pic18f2550.h: 5499: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5500: };\n[; ;pic18f2550.h: 5501: } CCP1DELbits_t;\n[; ;pic18f2550.h: 5502: extern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5511: extern volatile unsigned char BAUDCON @ 0xFB8;\n\"5513\n[; ;pic18f2550.h: 5513: asm(\"BAUDCON equ 0FB8h\");\n[; <\" BAUDCON equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5516: extern volatile unsigned char BAUDCTL @ 0xFB8;\n\"5518\n[; ;pic18f2550.h: 5518: asm(\"BAUDCTL equ 0FB8h\");\n[; <\" BAUDCTL equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5521: typedef union {\n[; ;pic18f2550.h: 5522: struct {\n[; ;pic18f2550.h: 5523: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5524: unsigned WUE :1;\n[; ;pic18f2550.h: 5525: unsigned :1;\n[; ;pic18f2550.h: 5526: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5527: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5528: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5529: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5530: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5531: };\n[; ;pic18f2550.h: 5532: struct {\n[; ;pic18f2550.h: 5533: unsigned :4;\n[; ;pic18f2550.h: 5534: unsigned SCKP :1;\n[; ;pic18f2550.h: 5535: unsigned :1;\n[; ;pic18f2550.h: 5536: unsigned RCMT :1;\n[; ;pic18f2550.h: 5537: };\n[; ;pic18f2550.h: 5538: struct {\n[; ;pic18f2550.h: 5539: unsigned :5;\n[; ;pic18f2550.h: 5540: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5541: };\n[; ;pic18f2550.h: 5542: struct {\n[; ;pic18f2550.h: 5543: unsigned :1;\n[; ;pic18f2550.h: 5544: unsigned W4E :1;\n[; ;pic18f2550.h: 5545: };\n[; ;pic18f2550.h: 5546: } BAUDCONbits_t;\n[; ;pic18f2550.h: 5547: extern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n[; ;pic18f2550.h: 5605: typedef union {\n[; ;pic18f2550.h: 5606: struct {\n[; ;pic18f2550.h: 5607: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5608: unsigned WUE :1;\n[; ;pic18f2550.h: 5609: unsigned :1;\n[; ;pic18f2550.h: 5610: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5611: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5612: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5613: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5614: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5615: };\n[; ;pic18f2550.h: 5616: struct {\n[; ;pic18f2550.h: 5617: unsigned :4;\n[; ;pic18f2550.h: 5618: unsigned SCKP :1;\n[; ;pic18f2550.h: 5619: unsigned :1;\n[; ;pic18f2550.h: 5620: unsigned RCMT :1;\n[; ;pic18f2550.h: 5621: };\n[; ;pic18f2550.h: 5622: struct {\n[; ;pic18f2550.h: 5623: unsigned :5;\n[; ;pic18f2550.h: 5624: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5625: };\n[; ;pic18f2550.h: 5626: struct {\n[; ;pic18f2550.h: 5627: unsigned :1;\n[; ;pic18f2550.h: 5628: unsigned W4E :1;\n[; ;pic18f2550.h: 5629: };\n[; ;pic18f2550.h: 5630: } BAUDCTLbits_t;\n[; ;pic18f2550.h: 5631: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n[; ;pic18f2550.h: 5690: extern volatile unsigned char CCP2CON @ 0xFBA;\n\"5692\n[; ;pic18f2550.h: 5692: asm(\"CCP2CON equ 0FBAh\");\n[; <\" CCP2CON equ 0FBAh ;# \">\n[; ;pic18f2550.h: 5695: typedef union {\n[; ;pic18f2550.h: 5696: struct {\n[; ;pic18f2550.h: 5697: unsigned CCP2M :4;\n[; ;pic18f2550.h: 5698: unsigned DC2B :2;\n[; ;pic18f2550.h: 5699: };\n[; ;pic18f2550.h: 5700: struct {\n[; ;pic18f2550.h: 5701: unsigned CCP2M0 :1;\n[; ;pic18f2550.h: 5702: unsigned CCP2M1 :1;\n[; ;pic18f2550.h: 5703: unsigned CCP2M2 :1;\n[; ;pic18f2550.h: 5704: unsigned CCP2M3 :1;\n[; ;pic18f2550.h: 5705: unsigned DC2B0 :1;\n[; ;pic18f2550.h: 5706: unsigned DC2B1 :1;\n[; ;pic18f2550.h: 5707: };\n[; ;pic18f2550.h: 5708: } CCP2CONbits_t;\n[; ;pic18f2550.h: 5709: extern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n[; ;pic18f2550.h: 5753: extern volatile unsigned short CCPR2 @ 0xFBB;\n\"5755\n[; ;pic18f2550.h: 5755: asm(\"CCPR2 equ 0FBBh\");\n[; <\" CCPR2 equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5759: extern volatile unsigned char CCPR2L @ 0xFBB;\n\"5761\n[; ;pic18f2550.h: 5761: asm(\"CCPR2L equ 0FBBh\");\n[; <\" CCPR2L equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5765: extern volatile unsigned char CCPR2H @ 0xFBC;\n\"5767\n[; ;pic18f2550.h: 5767: asm(\"CCPR2H equ 0FBCh\");\n[; <\" CCPR2H equ 0FBCh ;# \">\n[; ;pic18f2550.h: 5771: extern volatile unsigned char CCP1CON @ 0xFBD;\n\"5773\n[; ;pic18f2550.h: 5773: asm(\"CCP1CON equ 0FBDh\");\n[; <\" CCP1CON equ 0FBDh ;# \">\n[; ;pic18f2550.h: 5776: typedef union {\n[; ;pic18f2550.h: 5777: struct {\n[; ;pic18f2550.h: 5778: unsigned CCP1M :4;\n[; ;pic18f2550.h: 5779: unsigned DC1B :2;\n[; ;pic18f2550.h: 5780: };\n[; ;pic18f2550.h: 5781: struct {\n[; ;pic18f2550.h: 5782: unsigned CCP1M0 :1;\n[; ;pic18f2550.h: 5783: unsigned CCP1M1 :1;\n[; ;pic18f2550.h: 5784: unsigned CCP1M2 :1;\n[; ;pic18f2550.h: 5785: unsigned CCP1M3 :1;\n[; ;pic18f2550.h: 5786: unsigned DC1B0 :1;\n[; ;pic18f2550.h: 5787: unsigned DC1B1 :1;\n[; ;pic18f2550.h: 5788: };\n[; ;pic18f2550.h: 5789: } CCP1CONbits_t;\n[; ;pic18f2550.h: 5790: extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n[; ;pic18f2550.h: 5834: extern volatile unsigned short CCPR1 @ 0xFBE;\n\"5836\n[; ;pic18f2550.h: 5836: asm(\"CCPR1 equ 0FBEh\");\n[; <\" CCPR1 equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5840: extern volatile unsigned char CCPR1L @ 0xFBE;\n\"5842\n[; ;pic18f2550.h: 5842: asm(\"CCPR1L equ 0FBEh\");\n[; <\" CCPR1L equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5846: extern volatile unsigned char CCPR1H @ 0xFBF;\n\"5848\n[; ;pic18f2550.h: 5848: asm(\"CCPR1H equ 0FBFh\");\n[; <\" CCPR1H equ 0FBFh ;# \">\n[; ;pic18f2550.h: 5852: extern volatile unsigned char ADCON2 @ 0xFC0;\n\"5854\n[; ;pic18f2550.h: 5854: asm(\"ADCON2 equ 0FC0h\");\n[; <\" ADCON2 equ 0FC0h ;# \">\n[; ;pic18f2550.h: 5857: typedef union {\n[; ;pic18f2550.h: 5858: struct {\n[; ;pic18f2550.h: 5859: unsigned ADCS :3;\n[; ;pic18f2550.h: 5860: unsigned ACQT :3;\n[; ;pic18f2550.h: 5861: unsigned :1;\n[; ;pic18f2550.h: 5862: unsigned ADFM :1;\n[; ;pic18f2550.h: 5863: };\n[; ;pic18f2550.h: 5864: struct {\n[; ;pic18f2550.h: 5865: unsigned ADCS0 :1;\n[; ;pic18f2550.h: 5866: unsigned ADCS1 :1;\n[; ;pic18f2550.h: 5867: unsigned ADCS2 :1;\n[; ;pic18f2550.h: 5868: unsigned ACQT0 :1;\n[; ;pic18f2550.h: 5869: unsigned ACQT1 :1;\n[; ;pic18f2550.h: 5870: unsigned ACQT2 :1;\n[; ;pic18f2550.h: 5871: };\n[; ;pic18f2550.h: 5872: } ADCON2bits_t;\n[; ;pic18f2550.h: 5873: extern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n[; ;pic18f2550.h: 5922: extern volatile unsigned char ADCON1 @ 0xFC1;\n\"5924\n[; ;pic18f2550.h: 5924: asm(\"ADCON1 equ 0FC1h\");\n[; <\" ADCON1 equ 0FC1h ;# \">\n[; ;pic18f2550.h: 5927: typedef union {\n[; ;pic18f2550.h: 5928: struct {\n[; ;pic18f2550.h: 5929: unsigned PCFG :4;\n[; ;pic18f2550.h: 5930: unsigned VCFG :2;\n[; ;pic18f2550.h: 5931: };\n[; ;pic18f2550.h: 5932: struct {\n[; ;pic18f2550.h: 5933: unsigned PCFG0 :1;\n[; ;pic18f2550.h: 5934: unsigned PCFG1 :1;\n[; ;pic18f2550.h: 5935: unsigned PCFG2 :1;\n[; ;pic18f2550.h: 5936: unsigned PCFG3 :1;\n[; ;pic18f2550.h: 5937: unsigned VCFG0 :1;\n[; ;pic18f2550.h: 5938: unsigned VCFG1 :1;\n[; ;pic18f2550.h: 5939: };\n[; ;pic18f2550.h: 5940: struct {\n[; ;pic18f2550.h: 5941: unsigned :3;\n[; ;pic18f2550.h: 5942: unsigned CHSN3 :1;\n[; ;pic18f2550.h: 5943: };\n[; ;pic18f2550.h: 5944: struct {\n[; ;pic18f2550.h: 5945: unsigned :4;\n[; ;pic18f2550.h: 5946: unsigned VCFG01 :1;\n[; ;pic18f2550.h: 5947: };\n[; ;pic18f2550.h: 5948: struct {\n[; ;pic18f2550.h: 5949: unsigned :5;\n[; ;pic18f2550.h: 5950: unsigned VCFG11 :1;\n[; ;pic18f2550.h: 5951: };\n[; ;pic18f2550.h: 5952: } ADCON1bits_t;\n[; ;pic18f2550.h: 5953: extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n[; ;pic18f2550.h: 6012: extern volatile unsigned char ADCON0 @ 0xFC2;\n\"6014\n[; ;pic18f2550.h: 6014: asm(\"ADCON0 equ 0FC2h\");\n[; <\" ADCON0 equ 0FC2h ;# \">\n[; ;pic18f2550.h: 6017: typedef union {\n[; ;pic18f2550.h: 6018: struct {\n[; ;pic18f2550.h: 6019: unsigned :1;\n[; ;pic18f2550.h: 6020: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6021: };\n[; ;pic18f2550.h: 6022: struct {\n[; ;pic18f2550.h: 6023: unsigned ADON :1;\n[; ;pic18f2550.h: 6024: unsigned GO_nDONE :1;\n[; ;pic18f2550.h: 6025: unsigned CHS :4;\n[; ;pic18f2550.h: 6026: };\n[; ;pic18f2550.h: 6027: struct {\n[; ;pic18f2550.h: 6028: unsigned :1;\n[; ;pic18f2550.h: 6029: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6030: };\n[; ;pic18f2550.h: 6031: struct {\n[; ;pic18f2550.h: 6032: unsigned :1;\n[; ;pic18f2550.h: 6033: unsigned GO_DONE :1;\n[; ;pic18f2550.h: 6034: unsigned CHS0 :1;\n[; ;pic18f2550.h: 6035: unsigned CHS1 :1;\n[; ;pic18f2550.h: 6036: unsigned CHS2 :1;\n[; ;pic18f2550.h: 6037: unsigned CHS3 :1;\n[; ;pic18f2550.h: 6038: };\n[; ;pic18f2550.h: 6039: struct {\n[; ;pic18f2550.h: 6040: unsigned :1;\n[; ;pic18f2550.h: 6041: unsigned DONE :1;\n[; ;pic18f2550.h: 6042: };\n[; ;pic18f2550.h: 6043: struct {\n[; ;pic18f2550.h: 6044: unsigned :1;\n[; ;pic18f2550.h: 6045: unsigned GO :1;\n[; ;pic18f2550.h: 6046: };\n[; ;pic18f2550.h: 6047: struct {\n[; ;pic18f2550.h: 6048: unsigned :1;\n[; ;pic18f2550.h: 6049: unsigned NOT_DONE :1;\n[; ;pic18f2550.h: 6050: };\n[; ;pic18f2550.h: 6051: struct {\n[; ;pic18f2550.h: 6052: unsigned :1;\n[; ;pic18f2550.h: 6053: unsigned nDONE :1;\n[; ;pic18f2550.h: 6054: };\n[; ;pic18f2550.h: 6055: struct {\n[; ;pic18f2550.h: 6056: unsigned :1;\n[; ;pic18f2550.h: 6057: unsigned GODONE :1;\n[; ;pic18f2550.h: 6058: };\n[; ;pic18f2550.h: 6059: } ADCON0bits_t;\n[; ;pic18f2550.h: 6060: extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n[; ;pic18f2550.h: 6134: extern volatile unsigned short ADRES @ 0xFC3;\n\"6136\n[; ;pic18f2550.h: 6136: asm(\"ADRES equ 0FC3h\");\n[; <\" ADRES equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6140: extern volatile unsigned char ADRESL @ 0xFC3;\n\"6142\n[; ;pic18f2550.h: 6142: asm(\"ADRESL equ 0FC3h\");\n[; <\" ADRESL equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6146: extern volatile unsigned char ADRESH @ 0xFC4;\n\"6148\n[; ;pic18f2550.h: 6148: asm(\"ADRESH equ 0FC4h\");\n[; <\" ADRESH equ 0FC4h ;# \">\n[; ;pic18f2550.h: 6152: extern volatile unsigned char SSPCON2 @ 0xFC5;\n\"6154\n[; ;pic18f2550.h: 6154: asm(\"SSPCON2 equ 0FC5h\");\n[; <\" SSPCON2 equ 0FC5h ;# \">\n[; ;pic18f2550.h: 6157: typedef union {\n[; ;pic18f2550.h: 6158: struct {\n[; ;pic18f2550.h: 6159: unsigned SEN :1;\n[; ;pic18f2550.h: 6160: unsigned RSEN :1;\n[; ;pic18f2550.h: 6161: unsigned PEN :1;\n[; ;pic18f2550.h: 6162: unsigned RCEN :1;\n[; ;pic18f2550.h: 6163: unsigned ACKEN :1;\n[; ;pic18f2550.h: 6164: unsigned ACKDT :1;\n[; ;pic18f2550.h: 6165: unsigned ACKSTAT :1;\n[; ;pic18f2550.h: 6166: unsigned GCEN :1;\n[; ;pic18f2550.h: 6167: };\n[; ;pic18f2550.h: 6168: } SSPCON2bits_t;\n[; ;pic18f2550.h: 6169: extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n[; ;pic18f2550.h: 6213: extern volatile unsigned char SSPCON1 @ 0xFC6;\n\"6215\n[; ;pic18f2550.h: 6215: asm(\"SSPCON1 equ 0FC6h\");\n[; <\" SSPCON1 equ 0FC6h ;# \">\n[; ;pic18f2550.h: 6218: typedef union {\n[; ;pic18f2550.h: 6219: struct {\n[; ;pic18f2550.h: 6220: unsigned SSPM :4;\n[; ;pic18f2550.h: 6221: unsigned CKP :1;\n[; ;pic18f2550.h: 6222: unsigned SSPEN :1;\n[; ;pic18f2550.h: 6223: unsigned SSPOV :1;\n[; ;pic18f2550.h: 6224: unsigned WCOL :1;\n[; ;pic18f2550.h: 6225: };\n[; ;pic18f2550.h: 6226: struct {\n[; ;pic18f2550.h: 6227: unsigned SSPM0 :1;\n[; ;pic18f2550.h: 6228: unsigned SSPM1 :1;\n[; ;pic18f2550.h: 6229: unsigned SSPM2 :1;\n[; ;pic18f2550.h: 6230: unsigned SSPM3 :1;\n[; ;pic18f2550.h: 6231: };\n[; ;pic18f2550.h: 6232: } SSPCON1bits_t;\n[; ;pic18f2550.h: 6233: extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n[; ;pic18f2550.h: 6282: extern volatile unsigned char SSPSTAT @ 0xFC7;\n\"6284\n[; ;pic18f2550.h: 6284: asm(\"SSPSTAT equ 0FC7h\");\n[; <\" SSPSTAT equ 0FC7h ;# \">\n[; ;pic18f2550.h: 6287: typedef union {\n[; ;pic18f2550.h: 6288: struct {\n[; ;pic18f2550.h: 6289: unsigned :2;\n[; ;pic18f2550.h: 6290: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6291: };\n[; ;pic18f2550.h: 6292: struct {\n[; ;pic18f2550.h: 6293: unsigned :5;\n[; ;pic18f2550.h: 6294: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6295: };\n[; ;pic18f2550.h: 6296: struct {\n[; ;pic18f2550.h: 6297: unsigned BF :1;\n[; ;pic18f2550.h: 6298: unsigned UA :1;\n[; ;pic18f2550.h: 6299: unsigned R_nW :1;\n[; ;pic18f2550.h: 6300: unsigned S :1;\n[; ;pic18f2550.h: 6301: unsigned P :1;\n[; ;pic18f2550.h: 6302: unsigned D_nA :1;\n[; ;pic18f2550.h: 6303: unsigned CKE :1;\n[; ;pic18f2550.h: 6304: unsigned SMP :1;\n[; ;pic18f2550.h: 6305: };\n[; ;pic18f2550.h: 6306: struct {\n[; ;pic18f2550.h: 6307: unsigned :2;\n[; ;pic18f2550.h: 6308: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6309: };\n[; ;pic18f2550.h: 6310: struct {\n[; ;pic18f2550.h: 6311: unsigned :5;\n[; ;pic18f2550.h: 6312: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6313: };\n[; ;pic18f2550.h: 6314: struct {\n[; ;pic18f2550.h: 6315: unsigned :2;\n[; ;pic18f2550.h: 6316: unsigned R_W :1;\n[; ;pic18f2550.h: 6317: unsigned :2;\n[; ;pic18f2550.h: 6318: unsigned D_A :1;\n[; ;pic18f2550.h: 6319: };\n[; ;pic18f2550.h: 6320: struct {\n[; ;pic18f2550.h: 6321: unsigned :2;\n[; ;pic18f2550.h: 6322: unsigned I2C_READ :1;\n[; ;pic18f2550.h: 6323: unsigned I2C_START :1;\n[; ;pic18f2550.h: 6324: unsigned I2C_STOP :1;\n[; ;pic18f2550.h: 6325: unsigned I2C_DAT :1;\n[; ;pic18f2550.h: 6326: };\n[; ;pic18f2550.h: 6327: struct {\n[; ;pic18f2550.h: 6328: unsigned :2;\n[; ;pic18f2550.h: 6329: unsigned nW :1;\n[; ;pic18f2550.h: 6330: unsigned :2;\n[; ;pic18f2550.h: 6331: unsigned nA :1;\n[; ;pic18f2550.h: 6332: };\n[; ;pic18f2550.h: 6333: struct {\n[; ;pic18f2550.h: 6334: unsigned :2;\n[; ;pic18f2550.h: 6335: unsigned NOT_WRITE :1;\n[; ;pic18f2550.h: 6336: };\n[; ;pic18f2550.h: 6337: struct {\n[; ;pic18f2550.h: 6338: unsigned :5;\n[; ;pic18f2550.h: 6339: unsigned NOT_ADDRESS :1;\n[; ;pic18f2550.h: 6340: };\n[; ;pic18f2550.h: 6341: struct {\n[; ;pic18f2550.h: 6342: unsigned :2;\n[; ;pic18f2550.h: 6343: unsigned nWRITE :1;\n[; ;pic18f2550.h: 6344: unsigned :2;\n[; ;pic18f2550.h: 6345: unsigned nADDRESS :1;\n[; ;pic18f2550.h: 6346: };\n[; ;pic18f2550.h: 6347: struct {\n[; ;pic18f2550.h: 6348: unsigned :2;\n[; ;pic18f2550.h: 6349: unsigned READ_WRITE :1;\n[; ;pic18f2550.h: 6350: unsigned :2;\n[; ;pic18f2550.h: 6351: unsigned DATA_ADDRESS :1;\n[; ;pic18f2550.h: 6352: };\n[; ;pic18f2550.h: 6353: struct {\n[; ;pic18f2550.h: 6354: unsigned :2;\n[; ;pic18f2550.h: 6355: unsigned R :1;\n[; ;pic18f2550.h: 6356: unsigned :2;\n[; ;pic18f2550.h: 6357: unsigned D :1;\n[; ;pic18f2550.h: 6358: };\n[; ;pic18f2550.h: 6359: struct {\n[; ;pic18f2550.h: 6360: unsigned :5;\n[; ;pic18f2550.h: 6361: unsigned DA :1;\n[; ;pic18f2550.h: 6362: };\n[; ;pic18f2550.h: 6363: struct {\n[; ;pic18f2550.h: 6364: unsigned :2;\n[; ;pic18f2550.h: 6365: unsigned RW :1;\n[; ;pic18f2550.h: 6366: };\n[; ;pic18f2550.h: 6367: struct {\n[; ;pic18f2550.h: 6368: unsigned :3;\n[; ;pic18f2550.h: 6369: unsigned START :1;\n[; ;pic18f2550.h: 6370: };\n[; ;pic18f2550.h: 6371: struct {\n[; ;pic18f2550.h: 6372: unsigned :4;\n[; ;pic18f2550.h: 6373: unsigned STOP :1;\n[; ;pic18f2550.h: 6374: };\n[; ;pic18f2550.h: 6375: struct {\n[; ;pic18f2550.h: 6376: unsigned :2;\n[; ;pic18f2550.h: 6377: unsigned NOT_W :1;\n[; ;pic18f2550.h: 6378: };\n[; ;pic18f2550.h: 6379: struct {\n[; ;pic18f2550.h: 6380: unsigned :5;\n[; ;pic18f2550.h: 6381: unsigned NOT_A :1;\n[; ;pic18f2550.h: 6382: };\n[; ;pic18f2550.h: 6383: } SSPSTATbits_t;\n[; ;pic18f2550.h: 6384: extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n[; ;pic18f2550.h: 6548: extern volatile unsigned char SSPADD @ 0xFC8;\n\"6550\n[; ;pic18f2550.h: 6550: asm(\"SSPADD equ 0FC8h\");\n[; <\" SSPADD equ 0FC8h ;# \">\n[; ;pic18f2550.h: 6554: extern volatile unsigned char SSPBUF @ 0xFC9;\n\"6556\n[; ;pic18f2550.h: 6556: asm(\"SSPBUF equ 0FC9h\");\n[; <\" SSPBUF equ 0FC9h ;# \">\n[; ;pic18f2550.h: 6560: extern volatile unsigned char T2CON @ 0xFCA;\n\"6562\n[; ;pic18f2550.h: 6562: asm(\"T2CON equ 0FCAh\");\n[; <\" T2CON equ 0FCAh ;# \">\n[; ;pic18f2550.h: 6565: typedef union {\n[; ;pic18f2550.h: 6566: struct {\n[; ;pic18f2550.h: 6567: unsigned T2CKPS :2;\n[; ;pic18f2550.h: 6568: unsigned TMR2ON :1;\n[; ;pic18f2550.h: 6569: unsigned TOUTPS :4;\n[; ;pic18f2550.h: 6570: };\n[; ;pic18f2550.h: 6571: struct {\n[; ;pic18f2550.h: 6572: unsigned T2CKPS0 :1;\n[; ;pic18f2550.h: 6573: unsigned T2CKPS1 :1;\n[; ;pic18f2550.h: 6574: unsigned :1;\n[; ;pic18f2550.h: 6575: unsigned T2OUTPS0 :1;\n[; ;pic18f2550.h: 6576: unsigned T2OUTPS1 :1;\n[; ;pic18f2550.h: 6577: unsigned T2OUTPS2 :1;\n[; ;pic18f2550.h: 6578: unsigned T2OUTPS3 :1;\n[; ;pic18f2550.h: 6579: };\n[; ;pic18f2550.h: 6580: struct {\n[; ;pic18f2550.h: 6581: unsigned :3;\n[; ;pic18f2550.h: 6582: unsigned TOUTPS0 :1;\n[; ;pic18f2550.h: 6583: unsigned TOUTPS1 :1;\n[; ;pic18f2550.h: 6584: unsigned TOUTPS2 :1;\n[; ;pic18f2550.h: 6585: unsigned TOUTPS3 :1;\n[; ;pic18f2550.h: 6586: };\n[; ;pic18f2550.h: 6587: } T2CONbits_t;\n[; ;pic18f2550.h: 6588: extern volatile T2CONbits_t T2CONbits @ 0xFCA;\n[; ;pic18f2550.h: 6657: extern volatile unsigned char PR2 @ 0xFCB;\n\"6659\n[; ;pic18f2550.h: 6659: asm(\"PR2 equ 0FCBh\");\n[; <\" PR2 equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6662: extern volatile unsigned char MEMCON @ 0xFCB;\n\"6664\n[; ;pic18f2550.h: 6664: asm(\"MEMCON equ 0FCBh\");\n[; <\" MEMCON equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6668: extern volatile unsigned char TMR2 @ 0xFCC;\n\"6670\n[; ;pic18f2550.h: 6670: asm(\"TMR2 equ 0FCCh\");\n[; <\" TMR2 equ 0FCCh ;# \">\n[; ;pic18f2550.h: 6674: extern volatile unsigned char T1CON @ 0xFCD;\n\"6676\n[; ;pic18f2550.h: 6676: asm(\"T1CON equ 0FCDh\");\n[; <\" T1CON equ 0FCDh ;# \">\n[; ;pic18f2550.h: 6679: typedef union {\n[; ;pic18f2550.h: 6680: struct {\n[; ;pic18f2550.h: 6681: unsigned :2;\n[; ;pic18f2550.h: 6682: unsigned NOT_T1SYNC :1;\n[; ;pic18f2550.h: 6683: };\n[; ;pic18f2550.h: 6684: struct {\n[; ;pic18f2550.h: 6685: unsigned TMR1ON :1;\n[; ;pic18f2550.h: 6686: unsigned TMR1CS :1;\n[; ;pic18f2550.h: 6687: unsigned nT1SYNC :1;\n[; ;pic18f2550.h: 6688: unsigned T1OSCEN :1;\n[; ;pic18f2550.h: 6689: unsigned T1CKPS :2;\n[; ;pic18f2550.h: 6690: unsigned T1RUN :1;\n[; ;pic18f2550.h: 6691: unsigned RD16 :1;\n[; ;pic18f2550.h: 6692: };\n[; ;pic18f2550.h: 6693: struct {\n[; ;pic18f2550.h: 6694: unsigned :2;\n[; ;pic18f2550.h: 6695: unsigned T1SYNC :1;\n[; ;pic18f2550.h: 6696: unsigned :1;\n[; ;pic18f2550.h: 6697: unsigned T1CKPS0 :1;\n[; ;pic18f2550.h: 6698: unsigned T1CKPS1 :1;\n[; ;pic18f2550.h: 6699: };\n[; ;pic18f2550.h: 6700: struct {\n[; ;pic18f2550.h: 6701: unsigned :3;\n[; ;pic18f2550.h: 6702: unsigned SOSCEN :1;\n[; ;pic18f2550.h: 6703: };\n[; ;pic18f2550.h: 6704: struct {\n[; ;pic18f2550.h: 6705: unsigned :7;\n[; ;pic18f2550.h: 6706: unsigned T1RD16 :1;\n[; ;pic18f2550.h: 6707: };\n[; ;pic18f2550.h: 6708: } T1CONbits_t;\n[; ;pic18f2550.h: 6709: extern volatile T1CONbits_t T1CONbits @ 0xFCD;\n[; ;pic18f2550.h: 6778: extern volatile unsigned short TMR1 @ 0xFCE;\n\"6780\n[; ;pic18f2550.h: 6780: asm(\"TMR1 equ 0FCEh\");\n[; <\" TMR1 equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6784: extern volatile unsigned char TMR1L @ 0xFCE;\n\"6786\n[; ;pic18f2550.h: 6786: asm(\"TMR1L equ 0FCEh\");\n[; <\" TMR1L equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6790: extern volatile unsigned char TMR1H @ 0xFCF;\n\"6792\n[; ;pic18f2550.h: 6792: asm(\"TMR1H equ 0FCFh\");\n[; <\" TMR1H equ 0FCFh ;# \">\n[; ;pic18f2550.h: 6796: extern volatile unsigned char RCON @ 0xFD0;\n\"6798\n[; ;pic18f2550.h: 6798: asm(\"RCON equ 0FD0h\");\n[; <\" RCON equ 0FD0h ;# \">\n[; ;pic18f2550.h: 6801: typedef union {\n[; ;pic18f2550.h: 6802: struct {\n[; ;pic18f2550.h: 6803: unsigned NOT_BOR :1;\n[; ;pic18f2550.h: 6804: };\n[; ;pic18f2550.h: 6805: struct {\n[; ;pic18f2550.h: 6806: unsigned :1;\n[; ;pic18f2550.h: 6807: unsigned NOT_POR :1;\n[; ;pic18f2550.h: 6808: };\n[; ;pic18f2550.h: 6809: struct {\n[; ;pic18f2550.h: 6810: unsigned :2;\n[; ;pic18f2550.h: 6811: unsigned NOT_PD :1;\n[; ;pic18f2550.h: 6812: };\n[; ;pic18f2550.h: 6813: struct {\n[; ;pic18f2550.h: 6814: unsigned :3;\n[; ;pic18f2550.h: 6815: unsigned NOT_TO :1;\n[; ;pic18f2550.h: 6816: };\n[; ;pic18f2550.h: 6817: struct {\n[; ;pic18f2550.h: 6818: unsigned :4;\n[; ;pic18f2550.h: 6819: unsigned NOT_RI :1;\n[; ;pic18f2550.h: 6820: };\n[; ;pic18f2550.h: 6821: struct {\n[; ;pic18f2550.h: 6822: unsigned nBOR :1;\n[; ;pic18f2550.h: 6823: unsigned nPOR :1;\n[; ;pic18f2550.h: 6824: unsigned nPD :1;\n[; ;pic18f2550.h: 6825: unsigned nTO :1;\n[; ;pic18f2550.h: 6826: unsigned nRI :1;\n[; ;pic18f2550.h: 6827: unsigned :1;\n[; ;pic18f2550.h: 6828: unsigned SBOREN :1;\n[; ;pic18f2550.h: 6829: unsigned IPEN :1;\n[; ;pic18f2550.h: 6830: };\n[; ;pic18f2550.h: 6831: struct {\n[; ;pic18f2550.h: 6832: unsigned :7;\n[; ;pic18f2550.h: 6833: unsigned NOT_IPEN :1;\n[; ;pic18f2550.h: 6834: };\n[; ;pic18f2550.h: 6835: struct {\n[; ;pic18f2550.h: 6836: unsigned BOR :1;\n[; ;pic18f2550.h: 6837: unsigned POR :1;\n[; ;pic18f2550.h: 6838: unsigned PD :1;\n[; ;pic18f2550.h: 6839: unsigned TO :1;\n[; ;pic18f2550.h: 6840: unsigned RI :1;\n[; ;pic18f2550.h: 6841: unsigned :2;\n[; ;pic18f2550.h: 6842: unsigned nIPEN :1;\n[; ;pic18f2550.h: 6843: };\n[; ;pic18f2550.h: 6844: } RCONbits_t;\n[; ;pic18f2550.h: 6845: extern volatile RCONbits_t RCONbits @ 0xFD0;\n[; ;pic18f2550.h: 6944: extern volatile unsigned char WDTCON @ 0xFD1;\n\"6946\n[; ;pic18f2550.h: 6946: asm(\"WDTCON equ 0FD1h\");\n[; <\" WDTCON equ 0FD1h ;# \">\n[; ;pic18f2550.h: 6949: typedef union {\n[; ;pic18f2550.h: 6950: struct {\n[; ;pic18f2550.h: 6951: unsigned SWDTEN :1;\n[; ;pic18f2550.h: 6952: };\n[; ;pic18f2550.h: 6953: struct {\n[; ;pic18f2550.h: 6954: unsigned SWDTE :1;\n[; ;pic18f2550.h: 6955: };\n[; ;pic18f2550.h: 6956: } WDTCONbits_t;\n[; ;pic18f2550.h: 6957: extern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n[; ;pic18f2550.h: 6971: extern volatile unsigned char HLVDCON @ 0xFD2;\n\"6973\n[; ;pic18f2550.h: 6973: asm(\"HLVDCON equ 0FD2h\");\n[; <\" HLVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6976: extern volatile unsigned char LVDCON @ 0xFD2;\n\"6978\n[; ;pic18f2550.h: 6978: asm(\"LVDCON equ 0FD2h\");\n[; <\" LVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6981: typedef union {\n[; ;pic18f2550.h: 6982: struct {\n[; ;pic18f2550.h: 6983: unsigned HLVDL :4;\n[; ;pic18f2550.h: 6984: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 6985: unsigned IRVST :1;\n[; ;pic18f2550.h: 6986: unsigned :1;\n[; ;pic18f2550.h: 6987: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 6988: };\n[; ;pic18f2550.h: 6989: struct {\n[; ;pic18f2550.h: 6990: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 6991: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 6992: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 6993: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 6994: };\n[; ;pic18f2550.h: 6995: struct {\n[; ;pic18f2550.h: 6996: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 6997: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 6998: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 6999: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7000: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7001: unsigned IVRST :1;\n[; ;pic18f2550.h: 7002: };\n[; ;pic18f2550.h: 7003: struct {\n[; ;pic18f2550.h: 7004: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7005: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7006: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7007: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7008: unsigned :1;\n[; ;pic18f2550.h: 7009: unsigned BGST :1;\n[; ;pic18f2550.h: 7010: };\n[; ;pic18f2550.h: 7011: } HLVDCONbits_t;\n[; ;pic18f2550.h: 7012: extern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7110: typedef union {\n[; ;pic18f2550.h: 7111: struct {\n[; ;pic18f2550.h: 7112: unsigned HLVDL :4;\n[; ;pic18f2550.h: 7113: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 7114: unsigned IRVST :1;\n[; ;pic18f2550.h: 7115: unsigned :1;\n[; ;pic18f2550.h: 7116: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 7117: };\n[; ;pic18f2550.h: 7118: struct {\n[; ;pic18f2550.h: 7119: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 7120: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 7121: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 7122: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 7123: };\n[; ;pic18f2550.h: 7124: struct {\n[; ;pic18f2550.h: 7125: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 7126: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 7127: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 7128: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7129: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7130: unsigned IVRST :1;\n[; ;pic18f2550.h: 7131: };\n[; ;pic18f2550.h: 7132: struct {\n[; ;pic18f2550.h: 7133: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7134: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7135: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7136: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7137: unsigned :1;\n[; ;pic18f2550.h: 7138: unsigned BGST :1;\n[; ;pic18f2550.h: 7139: };\n[; ;pic18f2550.h: 7140: } LVDCONbits_t;\n[; ;pic18f2550.h: 7141: extern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7240: extern volatile unsigned char OSCCON @ 0xFD3;\n\"7242\n[; ;pic18f2550.h: 7242: asm(\"OSCCON equ 0FD3h\");\n[; <\" OSCCON equ 0FD3h ;# \">\n[; ;pic18f2550.h: 7245: typedef union {\n[; ;pic18f2550.h: 7246: struct {\n[; ;pic18f2550.h: 7247: unsigned SCS :2;\n[; ;pic18f2550.h: 7248: unsigned IOFS :1;\n[; ;pic18f2550.h: 7249: unsigned OSTS :1;\n[; ;pic18f2550.h: 7250: unsigned IRCF :3;\n[; ;pic18f2550.h: 7251: unsigned IDLEN :1;\n[; ;pic18f2550.h: 7252: };\n[; ;pic18f2550.h: 7253: struct {\n[; ;pic18f2550.h: 7254: unsigned SCS0 :1;\n[; ;pic18f2550.h: 7255: unsigned SCS1 :1;\n[; ;pic18f2550.h: 7256: unsigned FLTS :1;\n[; ;pic18f2550.h: 7257: unsigned :1;\n[; ;pic18f2550.h: 7258: unsigned IRCF0 :1;\n[; ;pic18f2550.h: 7259: unsigned IRCF1 :1;\n[; ;pic18f2550.h: 7260: unsigned IRCF2 :1;\n[; ;pic18f2550.h: 7261: };\n[; ;pic18f2550.h: 7262: } OSCCONbits_t;\n[; ;pic18f2550.h: 7263: extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n[; ;pic18f2550.h: 7322: extern volatile unsigned char T0CON @ 0xFD5;\n\"7324\n[; ;pic18f2550.h: 7324: asm(\"T0CON equ 0FD5h\");\n[; <\" T0CON equ 0FD5h ;# \">\n[; ;pic18f2550.h: 7327: typedef union {\n[; ;pic18f2550.h: 7328: struct {\n[; ;pic18f2550.h: 7329: unsigned T0PS :3;\n[; ;pic18f2550.h: 7330: unsigned PSA :1;\n[; ;pic18f2550.h: 7331: unsigned T0SE :1;\n[; ;pic18f2550.h: 7332: unsigned T0CS :1;\n[; ;pic18f2550.h: 7333: unsigned T08BIT :1;\n[; ;pic18f2550.h: 7334: unsigned TMR0ON :1;\n[; ;pic18f2550.h: 7335: };\n[; ;pic18f2550.h: 7336: struct {\n[; ;pic18f2550.h: 7337: unsigned T0PS0 :1;\n[; ;pic18f2550.h: 7338: unsigned T0PS1 :1;\n[; ;pic18f2550.h: 7339: unsigned T0PS2 :1;\n[; ;pic18f2550.h: 7340: };\n[; ;pic18f2550.h: 7341: } T0CONbits_t;\n[; ;pic18f2550.h: 7342: extern volatile T0CONbits_t T0CONbits @ 0xFD5;\n[; ;pic18f2550.h: 7391: extern volatile unsigned short TMR0 @ 0xFD6;\n\"7393\n[; ;pic18f2550.h: 7393: asm(\"TMR0 equ 0FD6h\");\n[; <\" TMR0 equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7397: extern volatile unsigned char TMR0L @ 0xFD6;\n\"7399\n[; ;pic18f2550.h: 7399: asm(\"TMR0L equ 0FD6h\");\n[; <\" TMR0L equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7403: extern volatile unsigned char TMR0H @ 0xFD7;\n\"7405\n[; ;pic18f2550.h: 7405: asm(\"TMR0H equ 0FD7h\");\n[; <\" TMR0H equ 0FD7h ;# \">\n[; ;pic18f2550.h: 7409: extern volatile unsigned char STATUS @ 0xFD8;\n\"7411\n[; ;pic18f2550.h: 7411: asm(\"STATUS equ 0FD8h\");\n[; <\" STATUS equ 0FD8h ;# \">\n[; ;pic18f2550.h: 7414: typedef union {\n[; ;pic18f2550.h: 7415: struct {\n[; ;pic18f2550.h: 7416: unsigned C :1;\n[; ;pic18f2550.h: 7417: unsigned DC :1;\n[; ;pic18f2550.h: 7418: unsigned Z :1;\n[; ;pic18f2550.h: 7419: unsigned OV :1;\n[; ;pic18f2550.h: 7420: unsigned N :1;\n[; ;pic18f2550.h: 7421: };\n[; ;pic18f2550.h: 7422: struct {\n[; ;pic18f2550.h: 7423: unsigned CARRY :1;\n[; ;pic18f2550.h: 7424: };\n[; ;pic18f2550.h: 7425: struct {\n[; ;pic18f2550.h: 7426: unsigned :4;\n[; ;pic18f2550.h: 7427: unsigned NEGATIVE :1;\n[; ;pic18f2550.h: 7428: };\n[; ;pic18f2550.h: 7429: struct {\n[; ;pic18f2550.h: 7430: unsigned :3;\n[; ;pic18f2550.h: 7431: unsigned OVERFLOW :1;\n[; ;pic18f2550.h: 7432: };\n[; ;pic18f2550.h: 7433: struct {\n[; ;pic18f2550.h: 7434: unsigned :2;\n[; ;pic18f2550.h: 7435: unsigned ZERO :1;\n[; ;pic18f2550.h: 7436: };\n[; ;pic18f2550.h: 7437: } STATUSbits_t;\n[; ;pic18f2550.h: 7438: extern volatile STATUSbits_t STATUSbits @ 0xFD8;\n[; ;pic18f2550.h: 7487: extern volatile unsigned short FSR2 @ 0xFD9;\n\"7489\n[; ;pic18f2550.h: 7489: asm(\"FSR2 equ 0FD9h\");\n[; <\" FSR2 equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7493: extern volatile unsigned char FSR2L @ 0xFD9;\n\"7495\n[; ;pic18f2550.h: 7495: asm(\"FSR2L equ 0FD9h\");\n[; <\" FSR2L equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7499: extern volatile unsigned char FSR2H @ 0xFDA;\n\"7501\n[; ;pic18f2550.h: 7501: asm(\"FSR2H equ 0FDAh\");\n[; <\" FSR2H equ 0FDAh ;# \">\n[; ;pic18f2550.h: 7505: extern volatile unsigned char PLUSW2 @ 0xFDB;\n\"7507\n[; ;pic18f2550.h: 7507: asm(\"PLUSW2 equ 0FDBh\");\n[; <\" PLUSW2 equ 0FDBh ;# \">\n[; ;pic18f2550.h: 7511: extern volatile unsigned char PREINC2 @ 0xFDC;\n\"7513\n[; ;pic18f2550.h: 7513: asm(\"PREINC2 equ 0FDCh\");\n[; <\" PREINC2 equ 0FDCh ;# \">\n[; ;pic18f2550.h: 7517: extern volatile unsigned char POSTDEC2 @ 0xFDD;\n\"7519\n[; ;pic18f2550.h: 7519: asm(\"POSTDEC2 equ 0FDDh\");\n[; <\" POSTDEC2 equ 0FDDh ;# \">\n[; ;pic18f2550.h: 7523: extern volatile unsigned char POSTINC2 @ 0xFDE;\n\"7525\n[; ;pic18f2550.h: 7525: asm(\"POSTINC2 equ 0FDEh\");\n[; <\" POSTINC2 equ 0FDEh ;# \">\n[; ;pic18f2550.h: 7529: extern volatile unsigned char INDF2 @ 0xFDF;\n\"7531\n[; ;pic18f2550.h: 7531: asm(\"INDF2 equ 0FDFh\");\n[; <\" INDF2 equ 0FDFh ;# \">\n[; ;pic18f2550.h: 7535: extern volatile unsigned char BSR @ 0xFE0;\n\"7537\n[; ;pic18f2550.h: 7537: asm(\"BSR equ 0FE0h\");\n[; <\" BSR equ 0FE0h ;# \">\n[; ;pic18f2550.h: 7541: extern volatile unsigned short FSR1 @ 0xFE1;\n\"7543\n[; ;pic18f2550.h: 7543: asm(\"FSR1 equ 0FE1h\");\n[; <\" FSR1 equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7547: extern volatile unsigned char FSR1L @ 0xFE1;\n\"7549\n[; ;pic18f2550.h: 7549: asm(\"FSR1L equ 0FE1h\");\n[; <\" FSR1L equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7553: extern volatile unsigned char FSR1H @ 0xFE2;\n\"7555\n[; ;pic18f2550.h: 7555: asm(\"FSR1H equ 0FE2h\");\n[; <\" FSR1H equ 0FE2h ;# \">\n[; ;pic18f2550.h: 7559: extern volatile unsigned char PLUSW1 @ 0xFE3;\n\"7561\n[; ;pic18f2550.h: 7561: asm(\"PLUSW1 equ 0FE3h\");\n[; <\" PLUSW1 equ 0FE3h ;# \">\n[; ;pic18f2550.h: 7565: extern volatile unsigned char PREINC1 @ 0xFE4;\n\"7567\n[; ;pic18f2550.h: 7567: asm(\"PREINC1 equ 0FE4h\");\n[; <\" PREINC1 equ 0FE4h ;# \">\n[; ;pic18f2550.h: 7571: extern volatile unsigned char POSTDEC1 @ 0xFE5;\n\"7573\n[; ;pic18f2550.h: 7573: asm(\"POSTDEC1 equ 0FE5h\");\n[; <\" POSTDEC1 equ 0FE5h ;# \">\n[; ;pic18f2550.h: 7577: extern volatile unsigned char POSTINC1 @ 0xFE6;\n\"7579\n[; ;pic18f2550.h: 7579: asm(\"POSTINC1 equ 0FE6h\");\n[; <\" POSTINC1 equ 0FE6h ;# \">\n[; ;pic18f2550.h: 7583: extern volatile unsigned char INDF1 @ 0xFE7;\n\"7585\n[; ;pic18f2550.h: 7585: asm(\"INDF1 equ 0FE7h\");\n[; <\" INDF1 equ 0FE7h ;# \">\n[; ;pic18f2550.h: 7589: extern volatile unsigned char WREG @ 0xFE8;\n\"7591\n[; ;pic18f2550.h: 7591: asm(\"WREG equ 0FE8h\");\n[; <\" WREG equ 0FE8h ;# \">\n[; ;pic18f2550.h: 7595: extern volatile unsigned short FSR0 @ 0xFE9;\n\"7597\n[; ;pic18f2550.h: 7597: asm(\"FSR0 equ 0FE9h\");\n[; <\" FSR0 equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7601: extern volatile unsigned char FSR0L @ 0xFE9;\n\"7603\n[; ;pic18f2550.h: 7603: asm(\"FSR0L equ 0FE9h\");\n[; <\" FSR0L equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7607: extern volatile unsigned char FSR0H @ 0xFEA;\n\"7609\n[; ;pic18f2550.h: 7609: asm(\"FSR0H equ 0FEAh\");\n[; <\" FSR0H equ 0FEAh ;# \">\n[; ;pic18f2550.h: 7613: extern volatile unsigned char PLUSW0 @ 0xFEB;\n\"7615\n[; ;pic18f2550.h: 7615: asm(\"PLUSW0 equ 0FEBh\");\n[; <\" PLUSW0 equ 0FEBh ;# \">\n[; ;pic18f2550.h: 7619: extern volatile unsigned char PREINC0 @ 0xFEC;\n\"7621\n[; ;pic18f2550.h: 7621: asm(\"PREINC0 equ 0FECh\");\n[; <\" PREINC0 equ 0FECh ;# \">\n[; ;pic18f2550.h: 7625: extern volatile unsigned char POSTDEC0 @ 0xFED;\n\"7627\n[; ;pic18f2550.h: 7627: asm(\"POSTDEC0 equ 0FEDh\");\n[; <\" POSTDEC0 equ 0FEDh ;# \">\n[; ;pic18f2550.h: 7631: extern volatile unsigned char POSTINC0 @ 0xFEE;\n\"7633\n[; ;pic18f2550.h: 7633: asm(\"POSTINC0 equ 0FEEh\");\n[; <\" POSTINC0 equ 0FEEh ;# \">\n[; ;pic18f2550.h: 7637: extern volatile unsigned char INDF0 @ 0xFEF;\n\"7639\n[; ;pic18f2550.h: 7639: asm(\"INDF0 equ 0FEFh\");\n[; <\" INDF0 equ 0FEFh ;# \">\n[; ;pic18f2550.h: 7643: extern volatile unsigned char INTCON3 @ 0xFF0;\n\"7645\n[; ;pic18f2550.h: 7645: asm(\"INTCON3 equ 0FF0h\");\n[; <\" INTCON3 equ 0FF0h ;# \">\n[; ;pic18f2550.h: 7648: typedef union {\n[; ;pic18f2550.h: 7649: struct {\n[; ;pic18f2550.h: 7650: unsigned INT1IF :1;\n[; ;pic18f2550.h: 7651: unsigned INT2IF :1;\n[; ;pic18f2550.h: 7652: unsigned :1;\n[; ;pic18f2550.h: 7653: unsigned INT1IE :1;\n[; ;pic18f2550.h: 7654: unsigned INT2IE :1;\n[; ;pic18f2550.h: 7655: unsigned :1;\n[; ;pic18f2550.h: 7656: unsigned INT1IP :1;\n[; ;pic18f2550.h: 7657: unsigned INT2IP :1;\n[; ;pic18f2550.h: 7658: };\n[; ;pic18f2550.h: 7659: struct {\n[; ;pic18f2550.h: 7660: unsigned INT1F :1;\n[; ;pic18f2550.h: 7661: unsigned INT2F :1;\n[; ;pic18f2550.h: 7662: unsigned :1;\n[; ;pic18f2550.h: 7663: unsigned INT1E :1;\n[; ;pic18f2550.h: 7664: unsigned INT2E :1;\n[; ;pic18f2550.h: 7665: unsigned :1;\n[; ;pic18f2550.h: 7666: unsigned INT1P :1;\n[; ;pic18f2550.h: 7667: unsigned INT2P :1;\n[; ;pic18f2550.h: 7668: };\n[; ;pic18f2550.h: 7669: } INTCON3bits_t;\n[; ;pic18f2550.h: 7670: extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n[; ;pic18f2550.h: 7734: extern volatile unsigned char INTCON2 @ 0xFF1;\n\"7736\n[; ;pic18f2550.h: 7736: asm(\"INTCON2 equ 0FF1h\");\n[; <\" INTCON2 equ 0FF1h ;# \">\n[; ;pic18f2550.h: 7739: typedef union {\n[; ;pic18f2550.h: 7740: struct {\n[; ;pic18f2550.h: 7741: unsigned :7;\n[; ;pic18f2550.h: 7742: unsigned NOT_RBPU :1;\n[; ;pic18f2550.h: 7743: };\n[; ;pic18f2550.h: 7744: struct {\n[; ;pic18f2550.h: 7745: unsigned RBIP :1;\n[; ;pic18f2550.h: 7746: unsigned :1;\n[; ;pic18f2550.h: 7747: unsigned TMR0IP :1;\n[; ;pic18f2550.h: 7748: unsigned :1;\n[; ;pic18f2550.h: 7749: unsigned INTEDG2 :1;\n[; ;pic18f2550.h: 7750: unsigned INTEDG1 :1;\n[; ;pic18f2550.h: 7751: unsigned INTEDG0 :1;\n[; ;pic18f2550.h: 7752: unsigned nRBPU :1;\n[; ;pic18f2550.h: 7753: };\n[; ;pic18f2550.h: 7754: struct {\n[; ;pic18f2550.h: 7755: unsigned :2;\n[; ;pic18f2550.h: 7756: unsigned T0IP :1;\n[; ;pic18f2550.h: 7757: unsigned :4;\n[; ;pic18f2550.h: 7758: unsigned RBPU :1;\n[; ;pic18f2550.h: 7759: };\n[; ;pic18f2550.h: 7760: } INTCON2bits_t;\n[; ;pic18f2550.h: 7761: extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n[; ;pic18f2550.h: 7810: extern volatile unsigned char INTCON @ 0xFF2;\n\"7812\n[; ;pic18f2550.h: 7812: asm(\"INTCON equ 0FF2h\");\n[; <\" INTCON equ 0FF2h ;# \">\n[; ;pic18f2550.h: 7815: typedef union {\n[; ;pic18f2550.h: 7816: struct {\n[; ;pic18f2550.h: 7817: unsigned RBIF :1;\n[; ;pic18f2550.h: 7818: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7819: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7820: unsigned RBIE :1;\n[; ;pic18f2550.h: 7821: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7822: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7823: unsigned PEIE_GIEL :1;\n[; ;pic18f2550.h: 7824: unsigned GIE_GIEH :1;\n[; ;pic18f2550.h: 7825: };\n[; ;pic18f2550.h: 7826: struct {\n[; ;pic18f2550.h: 7827: unsigned RBIF :1;\n[; ;pic18f2550.h: 7828: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7829: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7830: unsigned RBIE :1;\n[; ;pic18f2550.h: 7831: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7832: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7833: unsigned PEIE :1;\n[; ;pic18f2550.h: 7834: unsigned GIE :1;\n[; ;pic18f2550.h: 7835: };\n[; ;pic18f2550.h: 7836: struct {\n[; ;pic18f2550.h: 7837: unsigned RBIF :1;\n[; ;pic18f2550.h: 7838: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7839: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7840: unsigned RBIE :1;\n[; ;pic18f2550.h: 7841: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7842: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7843: unsigned GIEL :1;\n[; ;pic18f2550.h: 7844: unsigned GIEH :1;\n[; ;pic18f2550.h: 7845: };\n[; ;pic18f2550.h: 7846: struct {\n[; ;pic18f2550.h: 7847: unsigned :1;\n[; ;pic18f2550.h: 7848: unsigned INT0F :1;\n[; ;pic18f2550.h: 7849: unsigned T0IF :1;\n[; ;pic18f2550.h: 7850: unsigned :1;\n[; ;pic18f2550.h: 7851: unsigned INT0E :1;\n[; ;pic18f2550.h: 7852: unsigned T0IE :1;\n[; ;pic18f2550.h: 7853: unsigned PEIE :1;\n[; ;pic18f2550.h: 7854: unsigned GIE :1;\n[; ;pic18f2550.h: 7855: };\n[; ;pic18f2550.h: 7856: struct {\n[; ;pic18f2550.h: 7857: unsigned :6;\n[; ;pic18f2550.h: 7858: unsigned GIEL :1;\n[; ;pic18f2550.h: 7859: unsigned GIEH :1;\n[; ;pic18f2550.h: 7860: };\n[; ;pic18f2550.h: 7861: } INTCONbits_t;\n[; ;pic18f2550.h: 7862: extern volatile INTCONbits_t INTCONbits @ 0xFF2;\n[; ;pic18f2550.h: 7946: extern volatile unsigned short PROD @ 0xFF3;\n\"7948\n[; ;pic18f2550.h: 7948: asm(\"PROD equ 0FF3h\");\n[; <\" PROD equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7952: extern volatile unsigned char PRODL @ 0xFF3;\n\"7954\n[; ;pic18f2550.h: 7954: asm(\"PRODL equ 0FF3h\");\n[; <\" PRODL equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7958: extern volatile unsigned char PRODH @ 0xFF4;\n\"7960\n[; ;pic18f2550.h: 7960: asm(\"PRODH equ 0FF4h\");\n[; <\" PRODH equ 0FF4h ;# \">\n[; ;pic18f2550.h: 7964: extern volatile unsigned char TABLAT @ 0xFF5;\n\"7966\n[; ;pic18f2550.h: 7966: asm(\"TABLAT equ 0FF5h\");\n[; <\" TABLAT equ 0FF5h ;# \">\n[; ;pic18f2550.h: 7971: extern volatile unsigned short long TBLPTR @ 0xFF6;\n\"7974\n[; ;pic18f2550.h: 7974: asm(\"TBLPTR equ 0FF6h\");\n[; <\" TBLPTR equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7978: extern volatile unsigned char TBLPTRL @ 0xFF6;\n\"7980\n[; ;pic18f2550.h: 7980: asm(\"TBLPTRL equ 0FF6h\");\n[; <\" TBLPTRL equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7984: extern volatile unsigned char TBLPTRH @ 0xFF7;\n\"7986\n[; ;pic18f2550.h: 7986: asm(\"TBLPTRH equ 0FF7h\");\n[; <\" TBLPTRH equ 0FF7h ;# \">\n[; ;pic18f2550.h: 7990: extern volatile unsigned char TBLPTRU @ 0xFF8;\n\"7992\n[; ;pic18f2550.h: 7992: asm(\"TBLPTRU equ 0FF8h\");\n[; <\" TBLPTRU equ 0FF8h ;# \">\n[; ;pic18f2550.h: 7997: extern volatile unsigned short long PCLAT @ 0xFF9;\n\"8000\n[; ;pic18f2550.h: 8000: asm(\"PCLAT equ 0FF9h\");\n[; <\" PCLAT equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8004: extern volatile unsigned short long PC @ 0xFF9;\n\"8007\n[; ;pic18f2550.h: 8007: asm(\"PC equ 0FF9h\");\n[; <\" PC equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8011: extern volatile unsigned char PCL @ 0xFF9;\n\"8013\n[; ;pic18f2550.h: 8013: asm(\"PCL equ 0FF9h\");\n[; <\" PCL equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8017: extern volatile unsigned char PCLATH @ 0xFFA;\n\"8019\n[; ;pic18f2550.h: 8019: asm(\"PCLATH equ 0FFAh\");\n[; <\" PCLATH equ 0FFAh ;# \">\n[; ;pic18f2550.h: 8023: extern volatile unsigned char PCLATU @ 0xFFB;\n\"8025\n[; ;pic18f2550.h: 8025: asm(\"PCLATU equ 0FFBh\");\n[; <\" PCLATU equ 0FFBh ;# \">\n[; ;pic18f2550.h: 8029: extern volatile unsigned char STKPTR @ 0xFFC;\n\"8031\n[; ;pic18f2550.h: 8031: asm(\"STKPTR equ 0FFCh\");\n[; <\" STKPTR equ 0FFCh ;# \">\n[; ;pic18f2550.h: 8034: typedef union {\n[; ;pic18f2550.h: 8035: struct {\n[; ;pic18f2550.h: 8036: unsigned STKPTR :5;\n[; ;pic18f2550.h: 8037: unsigned :1;\n[; ;pic18f2550.h: 8038: unsigned STKUNF :1;\n[; ;pic18f2550.h: 8039: unsigned STKFUL :1;\n[; ;pic18f2550.h: 8040: };\n[; ;pic18f2550.h: 8041: struct {\n[; ;pic18f2550.h: 8042: unsigned STKPTR0 :1;\n[; ;pic18f2550.h: 8043: unsigned STKPTR1 :1;\n[; ;pic18f2550.h: 8044: unsigned STKPTR2 :1;\n[; ;pic18f2550.h: 8045: unsigned STKPTR3 :1;\n[; ;pic18f2550.h: 8046: unsigned STKPTR4 :1;\n[; ;pic18f2550.h: 8047: };\n[; ;pic18f2550.h: 8048: struct {\n[; ;pic18f2550.h: 8049: unsigned :7;\n[; ;pic18f2550.h: 8050: unsigned STKOVF :1;\n[; ;pic18f2550.h: 8051: };\n[; ;pic18f2550.h: 8052: } STKPTRbits_t;\n[; ;pic18f2550.h: 8053: extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n[; ;pic18f2550.h: 8103: extern volatile unsigned short long TOS @ 0xFFD;\n\"8106\n[; ;pic18f2550.h: 8106: asm(\"TOS equ 0FFDh\");\n[; <\" TOS equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8110: extern volatile unsigned char TOSL @ 0xFFD;\n\"8112\n[; ;pic18f2550.h: 8112: asm(\"TOSL equ 0FFDh\");\n[; <\" TOSL equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8116: extern volatile unsigned char TOSH @ 0xFFE;\n\"8118\n[; ;pic18f2550.h: 8118: asm(\"TOSH equ 0FFEh\");\n[; <\" TOSH equ 0FFEh ;# \">\n[; ;pic18f2550.h: 8122: extern volatile unsigned char TOSU @ 0xFFF;\n\"8124\n[; ;pic18f2550.h: 8124: asm(\"TOSU equ 0FFFh\");\n[; <\" TOSU equ 0FFFh ;# \">\n[; ;pic18f2550.h: 8134: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n[; ;pic18f2550.h: 8136: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n[; ;pic18f2550.h: 8138: extern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n[; ;pic18f2550.h: 8140: extern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n[; ;pic18f2550.h: 8142: extern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n[; ;pic18f2550.h: 8144: extern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n[; ;pic18f2550.h: 8146: extern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n[; ;pic18f2550.h: 8148: extern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n[; ;pic18f2550.h: 8150: extern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n[; ;pic18f2550.h: 8152: extern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n[; ;pic18f2550.h: 8154: extern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n[; ;pic18f2550.h: 8156: extern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n[; ;pic18f2550.h: 8158: extern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n[; ;pic18f2550.h: 8160: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8162: extern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n[; ;pic18f2550.h: 8164: extern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n[; ;pic18f2550.h: 8166: extern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n[; ;pic18f2550.h: 8168: extern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n[; ;pic18f2550.h: 8170: extern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n[; ;pic18f2550.h: 8172: extern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n[; ;pic18f2550.h: 8174: extern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n[; ;pic18f2550.h: 8176: extern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8178: extern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n[; ;pic18f2550.h: 8180: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n[; ;pic18f2550.h: 8182: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n[; ;pic18f2550.h: 8184: extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n[; ;pic18f2550.h: 8186: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n[; ;pic18f2550.h: 8188: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 8190: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 8192: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 8194: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 8196: extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8198: extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n[; ;pic18f2550.h: 8200: extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n[; ;pic18f2550.h: 8202: extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n[; ;pic18f2550.h: 8204: extern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n[; ;pic18f2550.h: 8206: extern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8208: extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8210: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n[; ;pic18f2550.h: 8212: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8214: extern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8216: extern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n[; ;pic18f2550.h: 8218: extern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n[; ;pic18f2550.h: 8220: extern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n[; ;pic18f2550.h: 8222: extern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n[; ;pic18f2550.h: 8224: extern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n[; ;pic18f2550.h: 8226: extern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n[; ;pic18f2550.h: 8228: extern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n[; ;pic18f2550.h: 8230: extern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n[; ;pic18f2550.h: 8232: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n[; ;pic18f2550.h: 8234: extern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8236: extern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8238: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n[; ;pic18f2550.h: 8240: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n[; ;pic18f2550.h: 8242: extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n[; ;pic18f2550.h: 8244: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n[; ;pic18f2550.h: 8246: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n[; ;pic18f2550.h: 8248: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n[; ;pic18f2550.h: 8250: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n[; ;pic18f2550.h: 8252: extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8254: extern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8256: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n[; ;pic18f2550.h: 8258: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n[; ;pic18f2550.h: 8260: extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n[; ;pic18f2550.h: 8262: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n[; ;pic18f2550.h: 8264: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n[; ;pic18f2550.h: 8266: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n[; ;pic18f2550.h: 8268: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n[; ;pic18f2550.h: 8270: extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 8272: extern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8274: extern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8276: extern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8278: extern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8280: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8282: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n[; ;pic18f2550.h: 8284: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n[; ;pic18f2550.h: 8286: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n[; ;pic18f2550.h: 8288: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n[; ;pic18f2550.h: 8290: extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8292: extern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n[; ;pic18f2550.h: 8294: extern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 8296: extern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n[; ;pic18f2550.h: 8298: extern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n[; ;pic18f2550.h: 8300: extern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8302: extern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8304: extern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8306: extern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8308: extern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8310: extern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8312: extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n[; ;pic18f2550.h: 8314: extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n[; ;pic18f2550.h: 8316: extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n[; ;pic18f2550.h: 8318: extern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n[; ;pic18f2550.h: 8320: extern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n[; ;pic18f2550.h: 8322: extern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n[; ;pic18f2550.h: 8324: extern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n[; ;pic18f2550.h: 8326: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n[; ;pic18f2550.h: 8328: extern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8330: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8332: extern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8334: extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n[; ;pic18f2550.h: 8336: extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n[; ;pic18f2550.h: 8338: extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n[; ;pic18f2550.h: 8340: extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n[; ;pic18f2550.h: 8342: extern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8344: extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n[; ;pic18f2550.h: 8346: extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8348: extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8350: extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n[; ;pic18f2550.h: 8352: extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8354: extern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8356: extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8358: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n[; ;pic18f2550.h: 8360: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n[; ;pic18f2550.h: 8362: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n[; ;pic18f2550.h: 8364: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n[; ;pic18f2550.h: 8366: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n[; ;pic18f2550.h: 8368: extern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n[; ;pic18f2550.h: 8370: extern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n[; ;pic18f2550.h: 8372: extern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n[; ;pic18f2550.h: 8374: extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8376: extern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 8378: extern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8380: extern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8382: extern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8384: extern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n[; ;pic18f2550.h: 8386: extern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n[; ;pic18f2550.h: 8388: extern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n[; ;pic18f2550.h: 8390: extern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n[; ;pic18f2550.h: 8392: extern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8394: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n[; ;pic18f2550.h: 8396: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n[; ;pic18f2550.h: 8398: extern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n[; ;pic18f2550.h: 8400: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n[; ;pic18f2550.h: 8402: extern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n[; ;pic18f2550.h: 8404: extern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n[; ;pic18f2550.h: 8406: extern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n[; ;pic18f2550.h: 8408: extern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n[; ;pic18f2550.h: 8410: extern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8412: extern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8414: extern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8416: extern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8418: extern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8420: extern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8422: extern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8424: extern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8426: extern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8428: extern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8430: extern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8432: extern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8434: extern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8436: extern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8438: extern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8440: extern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8442: extern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8444: extern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8446: extern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8448: extern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8450: extern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8452: extern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8454: extern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8456: extern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8458: extern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8460: extern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8462: extern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8464: extern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8466: extern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8468: extern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8470: extern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8472: extern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8474: extern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8476: extern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8478: extern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8480: extern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8482: extern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8484: extern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8486: extern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8488: extern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8490: extern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8492: extern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8494: extern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n[; ;pic18f2550.h: 8496: extern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n[; ;pic18f2550.h: 8498: extern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n[; ;pic18f2550.h: 8500: extern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n[; ;pic18f2550.h: 8502: extern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n[; ;pic18f2550.h: 8504: extern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n[; ;pic18f2550.h: 8506: extern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8508: extern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8510: extern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8512: extern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8514: extern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8516: extern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8518: extern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n[; ;pic18f2550.h: 8520: extern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n[; ;pic18f2550.h: 8522: extern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8524: extern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8526: extern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n[; ;pic18f2550.h: 8528: extern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n[; ;pic18f2550.h: 8530: extern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n[; ;pic18f2550.h: 8532: extern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n[; ;pic18f2550.h: 8534: extern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n[; ;pic18f2550.h: 8536: extern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n[; ;pic18f2550.h: 8538: extern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8540: extern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8542: extern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8544: extern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8546: extern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8548: extern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8550: extern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n[; ;pic18f2550.h: 8552: extern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n[; ;pic18f2550.h: 8554: extern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8556: extern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8558: extern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n[; ;pic18f2550.h: 8560: extern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n[; ;pic18f2550.h: 8562: extern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n[; ;pic18f2550.h: 8564: extern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n[; ;pic18f2550.h: 8566: extern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n[; ;pic18f2550.h: 8568: extern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n[; ;pic18f2550.h: 8570: extern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8572: extern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8574: extern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8576: extern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8578: extern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8580: extern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8582: extern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n[; ;pic18f2550.h: 8584: extern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n[; ;pic18f2550.h: 8586: extern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8588: extern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8590: extern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n[; ;pic18f2550.h: 8592: extern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n[; ;pic18f2550.h: 8594: extern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n[; ;pic18f2550.h: 8596: extern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n[; ;pic18f2550.h: 8598: extern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n[; ;pic18f2550.h: 8600: extern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n[; ;pic18f2550.h: 8602: extern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8604: extern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8606: extern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8608: extern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8610: extern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8612: extern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8614: extern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n[; ;pic18f2550.h: 8616: extern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n[; ;pic18f2550.h: 8618: extern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8620: extern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8622: extern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n[; ;pic18f2550.h: 8624: extern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n[; ;pic18f2550.h: 8626: extern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n[; ;pic18f2550.h: 8628: extern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n[; ;pic18f2550.h: 8630: extern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n[; ;pic18f2550.h: 8632: extern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n[; ;pic18f2550.h: 8634: extern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8636: extern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8638: extern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8640: extern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8642: extern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8644: extern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8646: extern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n[; ;pic18f2550.h: 8648: extern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n[; ;pic18f2550.h: 8650: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n[; ;pic18f2550.h: 8652: extern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8654: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n[; ;pic18f2550.h: 8656: extern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n[; ;pic18f2550.h: 8658: extern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n[; ;pic18f2550.h: 8660: extern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n[; ;pic18f2550.h: 8662: extern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n[; ;pic18f2550.h: 8664: extern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n[; ;pic18f2550.h: 8666: extern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n[; ;pic18f2550.h: 8668: extern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n[; ;pic18f2550.h: 8670: extern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n[; ;pic18f2550.h: 8672: extern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n[; ;pic18f2550.h: 8674: extern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n[; ;pic18f2550.h: 8676: extern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n[; ;pic18f2550.h: 8678: extern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n[; ;pic18f2550.h: 8680: extern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n[; ;pic18f2550.h: 8682: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8684: extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8686: extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8688: extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8690: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8692: extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8694: extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8696: extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8698: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8700: extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8702: extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8704: extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8706: extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8708: extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8710: extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8712: extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8714: extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8716: extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8718: extern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8720: extern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8722: extern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 8724: extern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 8726: extern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n[; ;pic18f2550.h: 8728: extern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n[; ;pic18f2550.h: 8730: extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n[; ;pic18f2550.h: 8732: extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 8734: extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8736: extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8738: extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8740: extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8742: extern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 8744: extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8746: extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8748: extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8750: extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8752: extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8754: extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8756: extern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 8758: extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8760: extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8762: extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8764: extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8766: extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8768: extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8770: extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n[; ;pic18f2550.h: 8772: extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n[; ;pic18f2550.h: 8774: extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n[; ;pic18f2550.h: 8776: extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n[; ;pic18f2550.h: 8778: extern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8780: extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8782: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n[; ;pic18f2550.h: 8784: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n[; ;pic18f2550.h: 8786: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n[; ;pic18f2550.h: 8788: extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8790: extern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8792: extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8794: extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8796: extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8798: extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8800: extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8802: extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8804: extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8806: extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8808: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8810: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8812: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8814: extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8816: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8818: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8820: extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8822: extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8824: extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8826: extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8828: extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8830: extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8832: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8834: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8836: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8838: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8840: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8842: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8844: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8846: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8848: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8850: extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8852: extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8854: extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8856: extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8858: extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8860: extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8862: extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8864: extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8866: extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8868: extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8870: extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8872: extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n[; ;pic18f2550.h: 8874: extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n[; ;pic18f2550.h: 8876: extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n[; ;pic18f2550.h: 8878: extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8880: extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8882: extern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8884: extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8886: extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8888: extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8890: extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8892: extern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8894: extern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8896: extern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8898: extern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8900: extern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8902: extern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8904: extern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8906: extern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8908: extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n[; ;pic18f2550.h: 8910: extern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8912: extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8914: extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8916: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8918: extern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8920: extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8922: extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 8924: extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 8926: extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 8928: extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 8930: extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 8932: extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 8934: extern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8936: extern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8938: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n[; ;pic18f2550.h: 8940: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 8942: extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n[; ;pic18f2550.h: 8944: extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n[; ;pic18f2550.h: 8946: extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n[; ;pic18f2550.h: 8948: extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n[; ;pic18f2550.h: 8950: extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8952: extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8954: extern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8956: extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8958: extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8960: extern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8962: extern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8964: extern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8966: extern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8968: extern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8970: extern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 8972: extern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8974: extern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n[; ;pic18f2550.h: 8976: extern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n[; ;pic18f2550.h: 8978: extern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n[; ;pic18f2550.h: 8980: extern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8982: extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8984: extern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 8986: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8988: extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8990: extern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n[; ;pic18f2550.h: 8992: extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 8994: extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 8996: extern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 8998: extern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n[; ;pic18f2550.h: 9000: extern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n[; ;pic18f2550.h: 9002: extern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n[; ;pic18f2550.h: 9004: extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9006: extern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9008: extern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9010: extern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n[; ;pic18f2550.h: 9012: extern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n[; ;pic18f2550.h: 9014: extern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n[; ;pic18f2550.h: 9016: extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n[; ;pic18f2550.h: 9018: extern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n[; ;pic18f2550.h: 9020: extern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n[; ;pic18f2550.h: 9022: extern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9024: extern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 9026: extern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9028: extern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9030: extern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9032: extern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 9034: extern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 9036: extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9038: extern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 9040: extern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 9042: extern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 9044: extern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 9046: extern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n[; ;pic18f2550.h: 9048: extern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 9050: extern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 9052: extern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 9054: extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n[; ;pic18f2550.h: 9056: extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n[; ;pic18f2550.h: 9058: extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n[; ;pic18f2550.h: 9060: extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9062: extern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9064: extern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9066: extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9068: extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9070: extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9072: extern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 9074: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n[; ;pic18f2550.h: 9076: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n[; ;pic18f2550.h: 9078: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n[; ;pic18f2550.h: 9080: extern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9082: extern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9084: extern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n[; ;pic18f2550.h: 9086: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9088: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9090: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9092: extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9094: extern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9096: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n[; ;pic18f2550.h: 9098: extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9100: extern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9102: extern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9104: extern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9106: extern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 9108: extern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 9110: extern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 9112: extern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 9114: extern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 9116: extern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 9118: extern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9120: extern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n[; ;pic18f2550.h: 9122: extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9124: extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9126: extern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n[; ;pic18f2550.h: 9128: extern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9130: extern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9132: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n[; ;pic18f2550.h: 9134: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n[; ;pic18f2550.h: 9136: extern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9138: extern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9140: extern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9142: extern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9144: extern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9146: extern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n[; ;pic18f2550.h: 9148: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9150: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n[; ;pic18f2550.h: 9152: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n[; ;pic18f2550.h: 9154: extern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n[; ;pic18f2550.h: 9156: extern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n[; ;pic18f2550.h: 9158: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9160: extern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9162: extern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n[; ;pic18f2550.h: 9164: extern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n[; ;pic18f2550.h: 9166: extern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n[; ;pic18f2550.h: 9168: extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9170: extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9172: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n[; ;pic18f2550.h: 9174: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9176: extern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9178: extern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n[; ;pic18f2550.h: 9180: extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n[; ;pic18f2550.h: 9182: extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n[; ;pic18f2550.h: 9184: extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n[; ;pic18f2550.h: 9186: extern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n[; ;pic18f2550.h: 9188: extern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n[; ;pic18f2550.h: 9190: extern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n[; ;pic18f2550.h: 9192: extern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n[; ;pic18f2550.h: 9194: extern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n[; ;pic18f2550.h: 9196: extern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n[; ;pic18f2550.h: 9198: extern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n[; ;pic18f2550.h: 9200: extern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 9202: extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9204: extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9206: extern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n[; ;pic18f2550.h: 9208: extern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n[; ;pic18f2550.h: 9210: extern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n[; ;pic18f2550.h: 9212: extern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n[; ;pic18f2550.h: 9214: extern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n[; ;pic18f2550.h: 9216: extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n[; ;pic18f2550.h: 9218: extern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 9220: extern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n[; ;pic18f2550.h: 9222: extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9224: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9226: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9228: extern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9230: extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n[; ;pic18f2550.h: 9232: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9234: extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n[; ;pic18f2550.h: 9236: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9238: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9240: extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9242: extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n[; ;pic18f2550.h: 9244: extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n[; ;pic18f2550.h: 9246: extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n[; ;pic18f2550.h: 9248: extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n[; ;pic18f2550.h: 9250: extern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9252: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n[; ;pic18f2550.h: 9254: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n[; ;pic18f2550.h: 9256: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9258: extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9260: extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9262: extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n[; ;pic18f2550.h: 9264: extern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n[; ;pic18f2550.h: 9266: extern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9268: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n[; ;pic18f2550.h: 9270: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n[; ;pic18f2550.h: 9272: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9274: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9276: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9278: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9280: extern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9282: extern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n[; ;pic18f2550.h: 9284: extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n[; ;pic18f2550.h: 9286: extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n[; ;pic18f2550.h: 9288: extern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9290: extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9292: extern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9294: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9296: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9298: extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9300: extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n[; ;pic18f2550.h: 9302: extern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n[; ;pic18f2550.h: 9304: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n[; ;pic18f2550.h: 9306: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n[; ;pic18f2550.h: 9308: extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n[; ;pic18f2550.h: 9310: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n[; ;pic18f2550.h: 9312: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n[; ;pic18f2550.h: 9314: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n[; ;pic18f2550.h: 9316: extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n[; ;pic18f2550.h: 9318: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n[; ;pic18f2550.h: 9320: extern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n[; ;pic18f2550.h: 9322: extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n[; ;pic18f2550.h: 9324: extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n[; ;pic18f2550.h: 9326: extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n[; ;pic18f2550.h: 9328: extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n[; ;pic18f2550.h: 9330: extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9332: extern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9334: extern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9336: extern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9338: extern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9340: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n[; ;pic18f2550.h: 9342: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n[; ;pic18f2550.h: 9344: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n[; ;pic18f2550.h: 9346: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n[; ;pic18f2550.h: 9348: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n[; ;pic18f2550.h: 9350: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n[; ;pic18f2550.h: 9352: extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n[; ;pic18f2550.h: 9354: extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n[; ;pic18f2550.h: 9356: extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n[; ;pic18f2550.h: 9358: extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n[; ;pic18f2550.h: 9360: extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n[; ;pic18f2550.h: 9362: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n[; ;pic18f2550.h: 9364: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n[; ;pic18f2550.h: 9366: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n[; ;pic18f2550.h: 9368: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n[; ;pic18f2550.h: 9370: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n[; ;pic18f2550.h: 9372: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n[; ;pic18f2550.h: 9374: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n[; ;pic18f2550.h: 9376: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n[; ;pic18f2550.h: 9378: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n[; ;pic18f2550.h: 9380: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n[; ;pic18f2550.h: 9382: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9384: extern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9386: extern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n[; ;pic18f2550.h: 9388: extern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n[; ;pic18f2550.h: 9390: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n[; ;pic18f2550.h: 9392: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n[; ;pic18f2550.h: 9394: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n[; ;pic18f2550.h: 9396: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n[; ;pic18f2550.h: 9398: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n[; ;pic18f2550.h: 9400: extern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9402: extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9404: extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9406: extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9408: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9410: extern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9412: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9414: extern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9416: extern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9418: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9420: extern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9422: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9424: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9426: extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9428: extern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n[; ;pic18f2550.h: 9430: extern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n[; ;pic18f2550.h: 9432: extern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n[; ;pic18f2550.h: 9434: extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9436: extern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n[; ;pic18f2550.h: 9438: extern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9440: extern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9442: extern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n[; ;pic18f2550.h: 9444: extern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n[; ;pic18f2550.h: 9446: extern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n[; ;pic18f2550.h: 9448: extern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n[; ;pic18f2550.h: 9450: extern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n[; ;pic18f2550.h: 9452: extern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n[; ;pic18f2550.h: 9454: extern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n[; ;pic18f2550.h: 9456: extern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n[; ;pic18f2550.h: 9458: extern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n[; ;pic18f2550.h: 9460: extern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9462: extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9464: extern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9466: extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9468: extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n[; ;pic18f2550.h: 9470: extern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9472: extern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9474: extern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9476: extern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n[; ;pic18f2550.h: 9478: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n[; ;pic18f2550.h: 9480: extern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9482: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n[; ;pic18f2550.h: 9484: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n[; ;pic18f2550.h: 9486: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9488: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n[; ;pic18f2550.h: 9490: extern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9492: extern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9494: extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 9496: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 9498: extern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 9500: extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 9502: extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9504: extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9506: extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9508: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9510: extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9512: extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9514: extern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9516: extern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;adc.h: 2008: union ADCResult\n[; ;adc.h: 2009: {\n[; ;adc.h: 2010: int lr;\n[; ;adc.h: 2011: char br[2];\n[; ;adc.h: 2012: };\n[; ;adc.h: 2014: char BusyADC (void);\n[; ;adc.h: 2016: void ConvertADC (void);\n[; ;adc.h: 2018: void CloseADC(void);\n[; ;adc.h: 2026: int ReadADC(void);\n[; ;adc.h: 2040: void OpenADC ( unsigned char ,\n[; ;adc.h: 2041: unsigned char ,\n[; ;adc.h: 2042: unsigned char );\n[; ;adc.h: 2084: void SetChanADC(unsigned char );\n[; ;adc.h: 2100: void SelChanConvADC( unsigned char );\n[; ;ancomp.h: 38: void Close_ancomp( void );\n[; ;ancomp.h: 39: void Open_ancomp(unsigned char config);\n[; ;spi.h: 584: void OpenSPI( unsigned char sync_mode,\n[; ;spi.h: 585: unsigned char bus_mode,\n[; ;spi.h: 586: unsigned char smp_phase );\n[; ;spi.h: 588: signed char WriteSPI( unsigned char data_out );\n[; ;spi.h: 590: void getsSPI( unsigned char *rdptr, unsigned char length );\n[; ;spi.h: 592: void putsSPI( unsigned char *wrptr );\n[; ;spi.h: 594: unsigned char ReadSPI( void );\n[; ;can2510.h: 414: void CAN2510Initialize(  unsigned int configuration,\n[; ;can2510.h: 415: unsigned char brp,\n[; ;can2510.h: 416: unsigned char interruptFlags,\n[; ;can2510.h: 417: unsigned char SPI_syncMode,\n[; ;can2510.h: 418: unsigned char SPI_busMode,\n[; ;can2510.h: 419: unsigned char SPI_smpPhase );\n[; ;can2510.h: 421: signed char CAN2510Init(  unsigned long BufferConfig,\n[; ;can2510.h: 422: unsigned long BitTimeConfig,\n[; ;can2510.h: 423: unsigned char interruptEnables,\n[; ;can2510.h: 424: unsigned char SPI_syncMode,\n[; ;can2510.h: 425: unsigned char SPI_busMode,\n[; ;can2510.h: 426: unsigned char SPI_smpPhase );\n[; ;can2510.h: 428: void CAN2510Enable( void );\n[; ;can2510.h: 430: void CAN2510Disable( void );\n[; ;can2510.h: 432: void CAN2510Reset( void );\n[; ;can2510.h: 434: void CAN2510SetMode(  unsigned char mode );\n[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );\n[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );\n[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );\n[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );\n[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );\n[; ;can2510.h: 446: unsigned char CAN2510ByteRead(  unsigned char addr );\n[; ;can2510.h: 448: void CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n[; ;can2510.h: 450: void CAN2510SequentialRead(  unsigned char *DataArray,\n[; ;can2510.h: 451: unsigned char CAN2510addr,\n[; ;can2510.h: 452: unsigned char numbytes );\n[; ;can2510.h: 454: void CAN2510SequentialWrite(  unsigned char *DataArray,\n[; ;can2510.h: 455: unsigned char CAN2510addr,\n[; ;can2510.h: 456: unsigned char numbytes );\n[; ;can2510.h: 458: void CAN2510BitModify(  unsigned char address,\n[; ;can2510.h: 459: unsigned char mask,\n[; ;can2510.h: 460: unsigned char data );\n[; ;can2510.h: 462: void CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n[; ;can2510.h: 466: void CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n[; ;can2510.h: 470: signed char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n[; ;can2510.h: 471: unsigned int mask,\n[; ;can2510.h: 472: unsigned int *filters );\n[; ;can2510.h: 474: signed char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n[; ;can2510.h: 475: unsigned long mask,\n[; ;can2510.h: 476: unsigned long *filters );\n[; ;can2510.h: 478: signed char CAN2510WriteStd(  unsigned int msgId,\n[; ;can2510.h: 479: unsigned char msgPriority,\n[; ;can2510.h: 480: unsigned char numBytes,\n[; ;can2510.h: 481: unsigned char *data );\n[; ;can2510.h: 483: signed char CAN2510WriteXtd(  unsigned long msgId,\n[; ;can2510.h: 484: unsigned char msgPriority,\n[; ;can2510.h: 485: unsigned char numBytes,\n[; ;can2510.h: 486: unsigned char *data );\n[; ;can2510.h: 488: void CAN2510LoadBufferStd(  unsigned char bufferNum,\n[; ;can2510.h: 489: unsigned int msgId,\n[; ;can2510.h: 490: unsigned char numBytes,\n[; ;can2510.h: 491: unsigned char *data );\n[; ;can2510.h: 493: void CAN2510LoadBufferXtd(  unsigned char bufferNum,\n[; ;can2510.h: 494: unsigned long msgId,\n[; ;can2510.h: 495: unsigned char numBytes,\n[; ;can2510.h: 496: unsigned char *data );\n[; ;can2510.h: 498: void CAN2510LoadRTRStd(  unsigned char bufferNum,\n[; ;can2510.h: 499: unsigned int msgId,\n[; ;can2510.h: 500: unsigned char numBytes );\n[; ;can2510.h: 502: void CAN2510LoadRTRXtd(  unsigned char bufferNum,\n[; ;can2510.h: 503: unsigned long msgId,\n[; ;can2510.h: 504: unsigned char numBytes );\n[; ;can2510.h: 506: void CAN2510SetBufferPriority(  unsigned char bufferNum,\n[; ;can2510.h: 507: unsigned char bufferPriority );\n[; ;can2510.h: 509: void CAN2510SendBuffer(  unsigned char bufferNumber );\n[; ;can2510.h: 511: signed char CAN2510WriteBuffer(  unsigned char bufferNum );\n[; ;can2510.h: 513: unsigned char CAN2510DataReady(  unsigned char bufferNum );\n[; ;can2510.h: 515: unsigned char CAN2510DataRead(  unsigned char bufferNum,\n[; ;can2510.h: 516: unsigned long *msgId,\n[; ;can2510.h: 517: unsigned char *numBytes,\n[; ;can2510.h: 518: unsigned char *data );\n[; ;capture.h: 64: union capstatus\n[; ;capture.h: 65: {\n[; ;capture.h: 73: struct\n[; ;capture.h: 74: {\n[; ;capture.h: 77: unsigned Cap1OVF:1;\n[; ;capture.h: 82: unsigned Cap2OVF:1;\n[; ;capture.h: 115: };\n[; ;capture.h: 117: unsigned :8;\n[; ;capture.h: 119: };\n[; ;capture.h: 121: extern union capstatus CapStatus;\n[; ;capture.h: 123: union CapResult\n[; ;capture.h: 124: {\n[; ;capture.h: 125: unsigned int lc;\n[; ;capture.h: 126: char bc[2];\n[; ;capture.h: 127: };\n[; ;capture.h: 474: void OpenCapture1 ( unsigned char config);\n[; ;capture.h: 475: unsigned int ReadCapture1 (void);\n[; ;capture.h: 476: void CloseCapture1 (void);\n[; ;capture.h: 484: void OpenCapture2 ( unsigned char config);\n[; ;capture.h: 485: unsigned int ReadCapture2 (void);\n[; ;capture.h: 486: void CloseCapture2 (void);\n[; ;compare.h: 385: void OpenCompare1(unsigned char config,unsigned int period);\n[; ;compare.h: 386: void CloseCompare1(void);\n[; ;compare.h: 392: void OpenCompare2(unsigned char config, unsigned int period);\n[; ;compare.h: 393: void CloseCompare2(void);\n[; ;EEP.h: 36: void Busy_eep ( void );\n[; ;EEP.h: 37: unsigned char Read_b_eep( unsigned int badd );\n[; ;EEP.h: 38: void Write_b_eep( unsigned int badd, unsigned char bdata );\n[; ;stddef.h: 2: typedef int ptrdiff_t;\n[; ;stddef.h: 3: typedef unsigned size_t;\n[; ;stddef.h: 4: typedef unsigned short wchar_t;\n[; ;stddef.h: 13: extern int errno;\n[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;\n[; ;GenericTypeDefs.h: 75: typedef signed int INT;\n[; ;GenericTypeDefs.h: 76: typedef signed char INT8;\n[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;\n[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;\n[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;\n[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;\n[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;\n[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;\n[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;\n[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;\n[; ;GenericTypeDefs.h: 99: typedef union\n[; ;GenericTypeDefs.h: 100: {\n[; ;GenericTypeDefs.h: 101: UINT8 Val;\n[; ;GenericTypeDefs.h: 102: struct\n[; ;GenericTypeDefs.h: 103: {\n[; ;GenericTypeDefs.h: 104: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 105: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 106: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 107: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 108: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 109: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 110: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 111: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 112: } bits;\n[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;\n[; ;GenericTypeDefs.h: 115: typedef union\n[; ;GenericTypeDefs.h: 116: {\n[; ;GenericTypeDefs.h: 117: UINT16 Val;\n[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;\n[; ;GenericTypeDefs.h: 119: struct \n[; ;GenericTypeDefs.h: 120: {\n[; ;GenericTypeDefs.h: 121: UINT8 LB;\n[; ;GenericTypeDefs.h: 122: UINT8 HB;\n[; ;GenericTypeDefs.h: 123: } byte;\n[; ;GenericTypeDefs.h: 124: struct \n[; ;GenericTypeDefs.h: 125: {\n[; ;GenericTypeDefs.h: 126: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 127: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 128: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 129: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 130: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 131: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 132: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 133: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 134: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 135: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 136: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 137: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 138: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 139: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 140: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 141: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 142: } bits;\n[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;\n[; ;GenericTypeDefs.h: 187: typedef union\n[; ;GenericTypeDefs.h: 188: {\n[; ;GenericTypeDefs.h: 189: UINT32 Val;\n[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;\n[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;\n[; ;GenericTypeDefs.h: 192: struct \n[; ;GenericTypeDefs.h: 193: {\n[; ;GenericTypeDefs.h: 194: UINT16 LW;\n[; ;GenericTypeDefs.h: 195: UINT16 HW;\n[; ;GenericTypeDefs.h: 196: } word;\n[; ;GenericTypeDefs.h: 197: struct \n[; ;GenericTypeDefs.h: 198: {\n[; ;GenericTypeDefs.h: 199: UINT8 LB;\n[; ;GenericTypeDefs.h: 200: UINT8 HB;\n[; ;GenericTypeDefs.h: 201: UINT8 UB;\n[; ;GenericTypeDefs.h: 202: UINT8 MB;\n[; ;GenericTypeDefs.h: 203: } byte;\n[; ;GenericTypeDefs.h: 204: struct \n[; ;GenericTypeDefs.h: 205: {\n[; ;GenericTypeDefs.h: 206: UINT16_VAL low;\n[; ;GenericTypeDefs.h: 207: UINT16_VAL high;\n[; ;GenericTypeDefs.h: 208: }wordUnion;\n[; ;GenericTypeDefs.h: 209: struct \n[; ;GenericTypeDefs.h: 210: {\n[; ;GenericTypeDefs.h: 211: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 212: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 213: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 214: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 215: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 216: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 217: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 218: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 219: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 220: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 221: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 222: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 223: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 224: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 225: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 226: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 227: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 228: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 229: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 230: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 231: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 232: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 233: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 234: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 235: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 236: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 237: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 238: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 239: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 240: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 241: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 242: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 243: } bits;\n[; ;GenericTypeDefs.h: 244: } UINT32_VAL;\n[; ;GenericTypeDefs.h: 248: typedef union\n[; ;GenericTypeDefs.h: 249: {\n[; ;GenericTypeDefs.h: 250: UINT64 Val;\n[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;\n[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;\n[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;\n[; ;GenericTypeDefs.h: 254: struct \n[; ;GenericTypeDefs.h: 255: {\n[; ;GenericTypeDefs.h: 256: UINT32 LD;\n[; ;GenericTypeDefs.h: 257: UINT32 HD;\n[; ;GenericTypeDefs.h: 258: } dword;\n[; ;GenericTypeDefs.h: 259: struct \n[; ;GenericTypeDefs.h: 260: {\n[; ;GenericTypeDefs.h: 261: UINT16 LW;\n[; ;GenericTypeDefs.h: 262: UINT16 HW;\n[; ;GenericTypeDefs.h: 263: UINT16 UW;\n[; ;GenericTypeDefs.h: 264: UINT16 MW;\n[; ;GenericTypeDefs.h: 265: } word;\n[; ;GenericTypeDefs.h: 266: struct \n[; ;GenericTypeDefs.h: 267: {\n[; ;GenericTypeDefs.h: 268: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 269: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 270: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 271: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 272: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 273: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 274: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 275: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 276: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 277: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 278: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 279: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 280: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 281: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 282: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 283: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 284: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 285: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 286: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 287: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 288: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 289: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 290: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 291: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 292: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 293: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 294: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 295: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 296: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 297: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 298: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 299: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 300: UINT8 b32:1;\n[; ;GenericTypeDefs.h: 301: UINT8 b33:1;\n[; ;GenericTypeDefs.h: 302: UINT8 b34:1;\n[; ;GenericTypeDefs.h: 303: UINT8 b35:1;\n[; ;GenericTypeDefs.h: 304: UINT8 b36:1;\n[; ;GenericTypeDefs.h: 305: UINT8 b37:1;\n[; ;GenericTypeDefs.h: 306: UINT8 b38:1;\n[; ;GenericTypeDefs.h: 307: UINT8 b39:1;\n[; ;GenericTypeDefs.h: 308: UINT8 b40:1;\n[; ;GenericTypeDefs.h: 309: UINT8 b41:1;\n[; ;GenericTypeDefs.h: 310: UINT8 b42:1;\n[; ;GenericTypeDefs.h: 311: UINT8 b43:1;\n[; ;GenericTypeDefs.h: 312: UINT8 b44:1;\n[; ;GenericTypeDefs.h: 313: UINT8 b45:1;\n[; ;GenericTypeDefs.h: 314: UINT8 b46:1;\n[; ;GenericTypeDefs.h: 315: UINT8 b47:1;\n[; ;GenericTypeDefs.h: 316: UINT8 b48:1;\n[; ;GenericTypeDefs.h: 317: UINT8 b49:1;\n[; ;GenericTypeDefs.h: 318: UINT8 b50:1;\n[; ;GenericTypeDefs.h: 319: UINT8 b51:1;\n[; ;GenericTypeDefs.h: 320: UINT8 b52:1;\n[; ;GenericTypeDefs.h: 321: UINT8 b53:1;\n[; ;GenericTypeDefs.h: 322: UINT8 b54:1;\n[; ;GenericTypeDefs.h: 323: UINT8 b55:1;\n[; ;GenericTypeDefs.h: 324: UINT8 b56:1;\n[; ;GenericTypeDefs.h: 325: UINT8 b57:1;\n[; ;GenericTypeDefs.h: 326: UINT8 b58:1;\n[; ;GenericTypeDefs.h: 327: UINT8 b59:1;\n[; ;GenericTypeDefs.h: 328: UINT8 b60:1;\n[; ;GenericTypeDefs.h: 329: UINT8 b61:1;\n[; ;GenericTypeDefs.h: 330: UINT8 b62:1;\n[; ;GenericTypeDefs.h: 331: UINT8 b63:1;\n[; ;GenericTypeDefs.h: 332: } bits;\n[; ;GenericTypeDefs.h: 333: } UINT64_VAL;\n[; ;GenericTypeDefs.h: 339: typedef void VOID;\n[; ;GenericTypeDefs.h: 341: typedef char CHAR8;\n[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;\n[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;\n[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;\n[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;\n[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;\n[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;\n[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;\n[; ;GenericTypeDefs.h: 352: typedef signed long LONG;\n[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;\n[; ;GenericTypeDefs.h: 356: typedef union\n[; ;GenericTypeDefs.h: 357: {\n[; ;GenericTypeDefs.h: 358: BYTE Val;\n[; ;GenericTypeDefs.h: 359: struct \n[; ;GenericTypeDefs.h: 360: {\n[; ;GenericTypeDefs.h: 361: BYTE b0:1;\n[; ;GenericTypeDefs.h: 362: BYTE b1:1;\n[; ;GenericTypeDefs.h: 363: BYTE b2:1;\n[; ;GenericTypeDefs.h: 364: BYTE b3:1;\n[; ;GenericTypeDefs.h: 365: BYTE b4:1;\n[; ;GenericTypeDefs.h: 366: BYTE b5:1;\n[; ;GenericTypeDefs.h: 367: BYTE b6:1;\n[; ;GenericTypeDefs.h: 368: BYTE b7:1;\n[; ;GenericTypeDefs.h: 369: } bits;\n[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;\n[; ;GenericTypeDefs.h: 372: typedef union\n[; ;GenericTypeDefs.h: 373: {\n[; ;GenericTypeDefs.h: 374: WORD Val;\n[; ;GenericTypeDefs.h: 375: BYTE v[2] ;\n[; ;GenericTypeDefs.h: 376: struct \n[; ;GenericTypeDefs.h: 377: {\n[; ;GenericTypeDefs.h: 378: BYTE LB;\n[; ;GenericTypeDefs.h: 379: BYTE HB;\n[; ;GenericTypeDefs.h: 380: } byte;\n[; ;GenericTypeDefs.h: 381: struct \n[; ;GenericTypeDefs.h: 382: {\n[; ;GenericTypeDefs.h: 383: BYTE b0:1;\n[; ;GenericTypeDefs.h: 384: BYTE b1:1;\n[; ;GenericTypeDefs.h: 385: BYTE b2:1;\n[; ;GenericTypeDefs.h: 386: BYTE b3:1;\n[; ;GenericTypeDefs.h: 387: BYTE b4:1;\n[; ;GenericTypeDefs.h: 388: BYTE b5:1;\n[; ;GenericTypeDefs.h: 389: BYTE b6:1;\n[; ;GenericTypeDefs.h: 390: BYTE b7:1;\n[; ;GenericTypeDefs.h: 391: BYTE b8:1;\n[; ;GenericTypeDefs.h: 392: BYTE b9:1;\n[; ;GenericTypeDefs.h: 393: BYTE b10:1;\n[; ;GenericTypeDefs.h: 394: BYTE b11:1;\n[; ;GenericTypeDefs.h: 395: BYTE b12:1;\n[; ;GenericTypeDefs.h: 396: BYTE b13:1;\n[; ;GenericTypeDefs.h: 397: BYTE b14:1;\n[; ;GenericTypeDefs.h: 398: BYTE b15:1;\n[; ;GenericTypeDefs.h: 399: } bits;\n[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;\n[; ;GenericTypeDefs.h: 402: typedef union\n[; ;GenericTypeDefs.h: 403: {\n[; ;GenericTypeDefs.h: 404: DWORD Val;\n[; ;GenericTypeDefs.h: 405: WORD w[2] ;\n[; ;GenericTypeDefs.h: 406: BYTE v[4] ;\n[; ;GenericTypeDefs.h: 407: struct \n[; ;GenericTypeDefs.h: 408: {\n[; ;GenericTypeDefs.h: 409: WORD LW;\n[; ;GenericTypeDefs.h: 410: WORD HW;\n[; ;GenericTypeDefs.h: 411: } word;\n[; ;GenericTypeDefs.h: 412: struct \n[; ;GenericTypeDefs.h: 413: {\n[; ;GenericTypeDefs.h: 414: BYTE LB;\n[; ;GenericTypeDefs.h: 415: BYTE HB;\n[; ;GenericTypeDefs.h: 416: BYTE UB;\n[; ;GenericTypeDefs.h: 417: BYTE MB;\n[; ;GenericTypeDefs.h: 418: } byte;\n[; ;GenericTypeDefs.h: 419: struct \n[; ;GenericTypeDefs.h: 420: {\n[; ;GenericTypeDefs.h: 421: WORD_VAL low;\n[; ;GenericTypeDefs.h: 422: WORD_VAL high;\n[; ;GenericTypeDefs.h: 423: }wordUnion;\n[; ;GenericTypeDefs.h: 424: struct \n[; ;GenericTypeDefs.h: 425: {\n[; ;GenericTypeDefs.h: 426: BYTE b0:1;\n[; ;GenericTypeDefs.h: 427: BYTE b1:1;\n[; ;GenericTypeDefs.h: 428: BYTE b2:1;\n[; ;GenericTypeDefs.h: 429: BYTE b3:1;\n[; ;GenericTypeDefs.h: 430: BYTE b4:1;\n[; ;GenericTypeDefs.h: 431: BYTE b5:1;\n[; ;GenericTypeDefs.h: 432: BYTE b6:1;\n[; ;GenericTypeDefs.h: 433: BYTE b7:1;\n[; ;GenericTypeDefs.h: 434: BYTE b8:1;\n[; ;GenericTypeDefs.h: 435: BYTE b9:1;\n[; ;GenericTypeDefs.h: 436: BYTE b10:1;\n[; ;GenericTypeDefs.h: 437: BYTE b11:1;\n[; ;GenericTypeDefs.h: 438: BYTE b12:1;\n[; ;GenericTypeDefs.h: 439: BYTE b13:1;\n[; ;GenericTypeDefs.h: 440: BYTE b14:1;\n[; ;GenericTypeDefs.h: 441: BYTE b15:1;\n[; ;GenericTypeDefs.h: 442: BYTE b16:1;\n[; ;GenericTypeDefs.h: 443: BYTE b17:1;\n[; ;GenericTypeDefs.h: 444: BYTE b18:1;\n[; ;GenericTypeDefs.h: 445: BYTE b19:1;\n[; ;GenericTypeDefs.h: 446: BYTE b20:1;\n[; ;GenericTypeDefs.h: 447: BYTE b21:1;\n[; ;GenericTypeDefs.h: 448: BYTE b22:1;\n[; ;GenericTypeDefs.h: 449: BYTE b23:1;\n[; ;GenericTypeDefs.h: 450: BYTE b24:1;\n[; ;GenericTypeDefs.h: 451: BYTE b25:1;\n[; ;GenericTypeDefs.h: 452: BYTE b26:1;\n[; ;GenericTypeDefs.h: 453: BYTE b27:1;\n[; ;GenericTypeDefs.h: 454: BYTE b28:1;\n[; ;GenericTypeDefs.h: 455: BYTE b29:1;\n[; ;GenericTypeDefs.h: 456: BYTE b30:1;\n[; ;GenericTypeDefs.h: 457: BYTE b31:1;\n[; ;GenericTypeDefs.h: 458: } bits;\n[; ;GenericTypeDefs.h: 459: } DWORD_VAL;\n[; ;GenericTypeDefs.h: 462: typedef union\n[; ;GenericTypeDefs.h: 463: {\n[; ;GenericTypeDefs.h: 464: QWORD Val;\n[; ;GenericTypeDefs.h: 465: DWORD d[2] ;\n[; ;GenericTypeDefs.h: 466: WORD w[4] ;\n[; ;GenericTypeDefs.h: 467: BYTE v[8] ;\n[; ;GenericTypeDefs.h: 468: struct \n[; ;GenericTypeDefs.h: 469: {\n[; ;GenericTypeDefs.h: 470: DWORD LD;\n[; ;GenericTypeDefs.h: 471: DWORD HD;\n[; ;GenericTypeDefs.h: 472: } dword;\n[; ;GenericTypeDefs.h: 473: struct \n[; ;GenericTypeDefs.h: 474: {\n[; ;GenericTypeDefs.h: 475: WORD LW;\n[; ;GenericTypeDefs.h: 476: WORD HW;\n[; ;GenericTypeDefs.h: 477: WORD UW;\n[; ;GenericTypeDefs.h: 478: WORD MW;\n[; ;GenericTypeDefs.h: 479: } word;\n[; ;GenericTypeDefs.h: 480: struct \n[; ;GenericTypeDefs.h: 481: {\n[; ;GenericTypeDefs.h: 482: BYTE b0:1;\n[; ;GenericTypeDefs.h: 483: BYTE b1:1;\n[; ;GenericTypeDefs.h: 484: BYTE b2:1;\n[; ;GenericTypeDefs.h: 485: BYTE b3:1;\n[; ;GenericTypeDefs.h: 486: BYTE b4:1;\n[; ;GenericTypeDefs.h: 487: BYTE b5:1;\n[; ;GenericTypeDefs.h: 488: BYTE b6:1;\n[; ;GenericTypeDefs.h: 489: BYTE b7:1;\n[; ;GenericTypeDefs.h: 490: BYTE b8:1;\n[; ;GenericTypeDefs.h: 491: BYTE b9:1;\n[; ;GenericTypeDefs.h: 492: BYTE b10:1;\n[; ;GenericTypeDefs.h: 493: BYTE b11:1;\n[; ;GenericTypeDefs.h: 494: BYTE b12:1;\n[; ;GenericTypeDefs.h: 495: BYTE b13:1;\n[; ;GenericTypeDefs.h: 496: BYTE b14:1;\n[; ;GenericTypeDefs.h: 497: BYTE b15:1;\n[; ;GenericTypeDefs.h: 498: BYTE b16:1;\n[; ;GenericTypeDefs.h: 499: BYTE b17:1;\n[; ;GenericTypeDefs.h: 500: BYTE b18:1;\n[; ;GenericTypeDefs.h: 501: BYTE b19:1;\n[; ;GenericTypeDefs.h: 502: BYTE b20:1;\n[; ;GenericTypeDefs.h: 503: BYTE b21:1;\n[; ;GenericTypeDefs.h: 504: BYTE b22:1;\n[; ;GenericTypeDefs.h: 505: BYTE b23:1;\n[; ;GenericTypeDefs.h: 506: BYTE b24:1;\n[; ;GenericTypeDefs.h: 507: BYTE b25:1;\n[; ;GenericTypeDefs.h: 508: BYTE b26:1;\n[; ;GenericTypeDefs.h: 509: BYTE b27:1;\n[; ;GenericTypeDefs.h: 510: BYTE b28:1;\n[; ;GenericTypeDefs.h: 511: BYTE b29:1;\n[; ;GenericTypeDefs.h: 512: BYTE b30:1;\n[; ;GenericTypeDefs.h: 513: BYTE b31:1;\n[; ;GenericTypeDefs.h: 514: BYTE b32:1;\n[; ;GenericTypeDefs.h: 515: BYTE b33:1;\n[; ;GenericTypeDefs.h: 516: BYTE b34:1;\n[; ;GenericTypeDefs.h: 517: BYTE b35:1;\n[; ;GenericTypeDefs.h: 518: BYTE b36:1;\n[; ;GenericTypeDefs.h: 519: BYTE b37:1;\n[; ;GenericTypeDefs.h: 520: BYTE b38:1;\n[; ;GenericTypeDefs.h: 521: BYTE b39:1;\n[; ;GenericTypeDefs.h: 522: BYTE b40:1;\n[; ;GenericTypeDefs.h: 523: BYTE b41:1;\n[; ;GenericTypeDefs.h: 524: BYTE b42:1;\n[; ;GenericTypeDefs.h: 525: BYTE b43:1;\n[; ;GenericTypeDefs.h: 526: BYTE b44:1;\n[; ;GenericTypeDefs.h: 527: BYTE b45:1;\n[; ;GenericTypeDefs.h: 528: BYTE b46:1;\n[; ;GenericTypeDefs.h: 529: BYTE b47:1;\n[; ;GenericTypeDefs.h: 530: BYTE b48:1;\n[; ;GenericTypeDefs.h: 531: BYTE b49:1;\n[; ;GenericTypeDefs.h: 532: BYTE b50:1;\n[; ;GenericTypeDefs.h: 533: BYTE b51:1;\n[; ;GenericTypeDefs.h: 534: BYTE b52:1;\n[; ;GenericTypeDefs.h: 535: BYTE b53:1;\n[; ;GenericTypeDefs.h: 536: BYTE b54:1;\n[; ;GenericTypeDefs.h: 537: BYTE b55:1;\n[; ;GenericTypeDefs.h: 538: BYTE b56:1;\n[; ;GenericTypeDefs.h: 539: BYTE b57:1;\n[; ;GenericTypeDefs.h: 540: BYTE b58:1;\n[; ;GenericTypeDefs.h: 541: BYTE b59:1;\n[; ;GenericTypeDefs.h: 542: BYTE b60:1;\n[; ;GenericTypeDefs.h: 543: BYTE b61:1;\n[; ;GenericTypeDefs.h: 544: BYTE b62:1;\n[; ;GenericTypeDefs.h: 545: BYTE b63:1;\n[; ;GenericTypeDefs.h: 546: } bits;\n[; ;GenericTypeDefs.h: 547: } QWORD_VAL;\n[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;i2c.h: 775: void IdleI2C( void );\n[; ;i2c.h: 777: void OpenI2C( unsigned char sync_mode, unsigned char slew );\n[; ;i2c.h: 779: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 781: signed char putsI2C( unsigned char *wrptr );\n[; ;i2c.h: 783: unsigned char ReadI2C( void );\n[; ;i2c.h: 785: void CloseI2C( void );\n[; ;i2c.h: 899: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 901: signed char getsI2C( unsigned char *rdptr, unsigned char length );\n[; ;i2c.h: 908: signed char EEAckPolling( unsigned char control );\n[; ;i2c.h: 910: signed char EEByteWrite( unsigned char control,\n[; ;i2c.h: 911: unsigned char address,\n[; ;i2c.h: 912: unsigned char data );\n[; ;i2c.h: 914: signed int EECurrentAddRead( unsigned char control );\n[; ;i2c.h: 916: signed char EEPageWrite( unsigned char control,\n[; ;i2c.h: 917: unsigned char address,\n[; ;i2c.h: 918: unsigned char *wrptr );\n[; ;i2c.h: 920: signed int EERandomRead( unsigned char control, unsigned char address );\n[; ;i2c.h: 922: signed char EESequentialRead( unsigned char control,\n[; ;i2c.h: 923: unsigned char address,\n[; ;i2c.h: 924: unsigned char *rdptr,\n[; ;i2c.h: 925: unsigned char length );\n[; ;mwire.h: 325: void OpenMwire( unsigned char sync_mode );\n[; ;mwire.h: 327: unsigned char ReadMwire( unsigned char high_byte,\n[; ;mwire.h: 328: unsigned char low_byte );\n[; ;mwire.h: 341: signed char WriteMwire( unsigned char data_out );\n[; ;mwire.h: 354: void getsMwire( unsigned char *rdptr, unsigned char length );\n[; ;portb.h: 126: void OpenPORTB( unsigned char config);\n[; ;portb.h: 176: void OpenRB0INT( unsigned char config);\n[; ;portb.h: 194: void OpenRB1INT( unsigned char config);\n[; ;portb.h: 211: void OpenRB2INT( unsigned char config);\n[; ;pwm.h: 85: union PWMDC\n[; ;pwm.h: 86: {\n[; ;pwm.h: 87: unsigned int lpwm;\n[; ;pwm.h: 88: char bpwm[2];\n[; ;pwm.h: 89: };\n[; ;pwm.h: 467: void OpenPWM1 ( char period);\n[; ;pwm.h: 468: void SetDCPWM1 ( unsigned int duty_cycle);\n[; ;pwm.h: 477: void ClosePWM1 (void);\n[; ;pwm.h: 485: void OpenPWM2 ( char period);\n[; ;pwm.h: 486: void SetDCPWM2( unsigned int duty_cycle);\n[; ;pwm.h: 492: void ClosePWM2 (void);\n[; ;reset.h: 16: char isMCLR(void);\n[; ;reset.h: 17: void StatusReset(void);\n[; ;reset.h: 18: char isPOR(void);\n[; ;reset.h: 19: char isWU(void);\n[; ;reset.h: 22: char isBOR(void);\n[; ;reset.h: 26: char isWDTTO(void);\n[; ;reset.h: 27: char isWDTWU(void);\n[; ;reset.h: 31: char isLVD(void);\n[; ;rtcc.h: 687: void Open_RTCC(void);\n[; ;rtcc.h: 688: void Close_RTCC(void);\n[; ;rtcc.h: 689: unsigned char update_RTCC(void);\n[; ;sw_i2c.h: 97: void SWStopI2C ( void );\n[; ;sw_i2c.h: 98: void SWStartI2C ( void );\n[; ;sw_i2c.h: 99: void SWRestartI2C ( void );\n[; ;sw_i2c.h: 100: void SWStopI2C ( void );\n[; ;sw_i2c.h: 102: signed char SWAckI2C( void );\n[; ;sw_i2c.h: 103: signed char Clock_test( void );\n[; ;sw_i2c.h: 104: signed int SWReadI2C( void );\n[; ;sw_i2c.h: 105: signed char SWWriteI2C(  unsigned char data_out );\n[; ;sw_i2c.h: 106: signed char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\n[; ;sw_i2c.h: 107: signed char SWPutsI2C(  unsigned char *wrptr );\n[; ;sw_spi.h: 84: void OpenSWSPI(void);\n[; ;sw_spi.h: 87: char WriteSWSPI( char output);\n[; ;sw_spi.h: 90: void SetCSSWSPI(void);\n[; ;sw_spi.h: 93: void ClearCSSWSPI(void);\n[; ;sw_uart.h: 47: void OpenUART(void);\n[; ;sw_uart.h: 49: unsigned char ReadUART(void);\n[; ;sw_uart.h: 51: void WriteUART( unsigned char);\n[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);\n[; ;sw_uart.h: 55: void putsUART( char *);\n[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);\n[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);\n[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);\n[; ;timers.h: 36: union Timers\n[; ;timers.h: 37: {\n[; ;timers.h: 38: unsigned int lt;\n[; ;timers.h: 39: char bt[2];\n[; ;timers.h: 40: };\n[; ;timers.h: 118: void OpenTimer0 ( unsigned char config);\n[; ;timers.h: 119: void CloseTimer0 (void);\n[; ;timers.h: 120: unsigned int ReadTimer0 (void);\n[; ;timers.h: 121: void WriteTimer0 ( unsigned int timer0);\n[; ;timers.h: 236: void OpenTimer1 ( unsigned char config);\n[; ;timers.h: 237: void CloseTimer1 (void);\n[; ;timers.h: 238: unsigned int ReadTimer1 (void);\n[; ;timers.h: 239: void WriteTimer1 ( unsigned int timer1);\n[; ;timers.h: 325: void OpenTimer2 ( unsigned char config);\n[; ;timers.h: 326: void CloseTimer2 (void);\n[; ;timers.h: 391: void OpenTimer3 ( unsigned char config);\n[; ;timers.h: 392: void CloseTimer3 (void);\n[; ;timers.h: 393: unsigned int ReadTimer3 (void);\n[; ;timers.h: 394: void WriteTimer3 ( unsigned int timer3);\n[; ;timers.h: 1179: void SetTmrCCPSrc( unsigned char );\n[; ;usart.h: 568: union USART\n[; ;usart.h: 569: {\n[; ;usart.h: 570: unsigned char val;\n[; ;usart.h: 571: struct\n[; ;usart.h: 572: {\n[; ;usart.h: 573: unsigned RX_NINE:1;\n[; ;usart.h: 574: unsigned TX_NINE:1;\n[; ;usart.h: 575: unsigned FRAME_ERROR:1;\n[; ;usart.h: 576: unsigned OVERRUN_ERROR:1;\n[; ;usart.h: 577: unsigned fill:4;\n[; ;usart.h: 578: };\n[; ;usart.h: 579: };\n[; ;usart.h: 580: extern union USART USART_Status;\n[; ;usart.h: 581: void OpenUSART ( unsigned char config, unsigned spbrg);\n[; ;usart.h: 596: char ReadUSART (void);\n[; ;usart.h: 597: void WriteUSART ( char data);\n[; ;usart.h: 598: void getsUSART ( char *buffer, unsigned char len);\n[; ;usart.h: 599: void putsUSART ( char *data);\n[; ;usart.h: 600: void putrsUSART ( const  char *data);\n[; ;usart.h: 654: void baudUSART ( unsigned char baudconfig);\n[; ;xlcd.h: 87: void OpenXLCD( unsigned char);\n[; ;xlcd.h: 92: void SetCGRamAddr( unsigned char);\n[; ;xlcd.h: 97: void SetDDRamAddr( unsigned char);\n[; ;xlcd.h: 102: unsigned char BusyXLCD(void);\n[; ;xlcd.h: 107: unsigned char ReadAddrXLCD(void);\n[; ;xlcd.h: 112: char ReadDataXLCD(void);\n[; ;xlcd.h: 117: void WriteCmdXLCD( unsigned char);\n[; ;xlcd.h: 122: void WriteDataXLCD( char);\n[; ;xlcd.h: 132: void putsXLCD( char *);\n[; ;xlcd.h: 137: void putrsXLCD(const char *);\n[; ;xlcd.h: 140: extern void DelayFor18TCY(void);\n[; ;xlcd.h: 141: extern void DelayPORXLCD(void);\n[; ;xlcd.h: 142: extern void DelayXLCD(void);\n[; ;pic18.h: 18: __attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned c\n[; ;pic18.h: 144: extern void _delay(unsigned long);\n[; ;pic18.h: 146: extern void _delaywdt(unsigned long);\n[; ;pic18.h: 148: extern void _delay3(unsigned char);\n[; ;stdint.h: 13: typedef signed char int8_t;\n[; ;stdint.h: 20: typedef signed int int16_t;\n[; ;stdint.h: 28: typedef signed short long int int24_t;\n[; ;stdint.h: 36: typedef signed long int int32_t;\n[; ;stdint.h: 43: typedef unsigned char uint8_t;\n[; ;stdint.h: 49: typedef unsigned int uint16_t;\n[; ;stdint.h: 56: typedef unsigned short long int uint24_t;\n[; ;stdint.h: 63: typedef unsigned long int uint32_t;\n[; ;stdint.h: 71: typedef signed char int_least8_t;\n[; ;stdint.h: 78: typedef signed int int_least16_t;\n[; ;stdint.h: 90: typedef signed short long int int_least24_t;\n[; ;stdint.h: 98: typedef signed long int int_least32_t;\n[; ;stdint.h: 105: typedef unsigned char uint_least8_t;\n[; ;stdint.h: 111: typedef unsigned int uint_least16_t;\n[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;\n[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;\n[; ;stdint.h: 137: typedef signed char int_fast8_t;\n[; ;stdint.h: 144: typedef signed int int_fast16_t;\n[; ;stdint.h: 156: typedef signed short long int int_fast24_t;\n[; ;stdint.h: 164: typedef signed long int int_fast32_t;\n[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;\n[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;\n[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;\n[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;\n[; ;stdint.h: 200: typedef int32_t intmax_t;\n[; ;stdint.h: 205: typedef uint32_t uintmax_t;\n[; ;stdint.h: 210: typedef int16_t intptr_t;\n[; ;stdint.h: 215: typedef uint16_t uintptr_t;\n[; ;Tick.h: 50: void tick_init();\n[; ;Tick.h: 62: uint32_t tick_get();\n[; ;Tick.h: 71: void tick_update();\n\"21 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c\n[v _tickcnt `Vul ~T0 @X0 1 s ]\n[i _tickcnt\n-> -> -> 0 `i `l `ul\n]\n[; ;Tick-PIC18.c: 21: static volatile unsigned long tickcnt = 0;\n\"23\n[v _tickbuffer `uc ~T0 @X0 -> 6 `i s ]\n[; ;Tick-PIC18.c: 23: static unsigned char tickbuffer[6];\n[; ;Tick-PIC18.c: 25: static void tick_read_internal();\n\"28\n[v _tick_init `(v ~T0 @X0 1 ef ]\n{\n[; ;Tick-PIC18.c: 27: void tick_init()\n[; ;Tick-PIC18.c: 28: {\n[e :U _tick_init ]\n[f ]\n[; ;Tick-PIC18.c: 30: TMR0L = 0;\n\"30\n[e = _TMR0L -> -> 0 `i `uc ]\n[; ;Tick-PIC18.c: 31: TMR0H = 0;\n\"31\n[e = _TMR0H -> -> 0 `i `uc ]\n[; ;Tick-PIC18.c: 33: INTCON2bits.TMR0IP = 0;\n\"33\n[e = . . _INTCON2bits 1 2 -> -> 0 `i `uc ]\n[; ;Tick-PIC18.c: 34: INTCONbits.TMR0IF = 0;\n\"34\n[e = . . _INTCONbits 0 2 -> -> 0 `i `uc ]\n[; ;Tick-PIC18.c: 35: INTCONbits.TMR0IE = 1;\n\"35\n[e = . . _INTCONbits 0 5 -> -> 1 `i `uc ]\n[; ;Tick-PIC18.c: 39: T0CON = 0x87;\n\"39\n[e = _T0CON -> -> 135 `i `uc ]\n[; ;Tick-PIC18.c: 40: }\n\"40\n[e :UE 518 ]\n}\n\"43\n[v _tick_get `(ul ~T0 @X0 1 ef ]\n{\n[; ;Tick-PIC18.c: 42: uint32_t tick_get()\n[; ;Tick-PIC18.c: 43: {\n[e :U _tick_get ]\n[f ]\n[; ;Tick-PIC18.c: 44: tick_read_internal();\n\"44\n[e ( _tick_read_internal ..  ]\n[; ;Tick-PIC18.c: 45: return *((uint32_t *) & tickbuffer[0]);\n\"45\n[e ) *U -> &U *U + &U _tickbuffer * -> -> -> 0 `i `ui `ux -> -> # *U &U _tickbuffer `ui `ux `*ul ]\n[e $UE 519  ]\n[; ;Tick-PIC18.c: 46: }\n\"46\n[e :UE 519 ]\n}\n\"49\n[v _tick_update `(v ~T0 @X0 1 ef ]\n{\n[; ;Tick-PIC18.c: 48: void tick_update()\n[; ;Tick-PIC18.c: 49: {\n[e :U _tick_update ]\n[f ]\n[; ;Tick-PIC18.c: 50: if (INTCONbits.TMR0IF) {\n\"50\n[e $ ! != -> . . _INTCONbits 0 2 `i -> -> -> 0 `i `Vuc `i 521  ]\n{\n[; ;Tick-PIC18.c: 51: tickcnt++;\n\"51\n[e ++ _tickcnt -> -> -> 1 `i `l `ul ]\n[; ;Tick-PIC18.c: 52: INTCONbits.TMR0IF = 0;\n\"52\n[e = . . _INTCONbits 0 2 -> -> 0 `i `uc ]\n\"53\n}\n[e :U 521 ]\n[; ;Tick-PIC18.c: 53: }\n[; ;Tick-PIC18.c: 54: }\n\"54\n[e :UE 520 ]\n}\n\"57\n[v _tick_read_internal `(v ~T0 @X0 1 sf ]\n{\n[; ;Tick-PIC18.c: 56: static void tick_read_internal()\n[; ;Tick-PIC18.c: 57: {\n[e :U _tick_read_internal ]\n[f ]\n[; ;Tick-PIC18.c: 58: do {\n\"58\n[e :U 525 ]\n{\n[; ;Tick-PIC18.c: 59: INTCONbits.TMR0IE = 1;\n\"59\n[e = . . _INTCONbits 0 5 -> -> 1 `i `uc ]\n[; ;Tick-PIC18.c: 60: asm(\"nop\");\n\"60\n[; <\" nop ;# \">\n[; ;Tick-PIC18.c: 61: INTCONbits.TMR0IE = 0;\n\"61\n[e = . . _INTCONbits 0 5 -> -> 0 `i `uc ]\n[; ;Tick-PIC18.c: 63: tickbuffer[0] = TMR0L;\n\"63\n[e = *U + &U _tickbuffer * -> -> -> 0 `i `ui `ux -> -> # *U &U _tickbuffer `ui `ux _TMR0L ]\n[; ;Tick-PIC18.c: 64: tickbuffer[1] = TMR0H;\n\"64\n[e = *U + &U _tickbuffer * -> -> -> 1 `i `ui `ux -> -> # *U &U _tickbuffer `ui `ux _TMR0H ]\n[; ;Tick-PIC18.c: 66: *((uint32_t*) & tickbuffer[2]) = tickcnt;\n\"66\n[e = *U -> &U *U + &U _tickbuffer * -> -> -> 2 `i `ui `ux -> -> # *U &U _tickbuffer `ui `ux `*ul _tickcnt ]\n\"67\n}\n[; ;Tick-PIC18.c: 67: } while (INTCONbits.TMR0IF);\n[e $ != -> . . _INTCONbits 0 2 `i -> -> -> 0 `i `Vuc `i 525  ]\n[e :U 524 ]\n[; ;Tick-PIC18.c: 68: INTCONbits.TMR0IE = 1;\n\"68\n[e = . . _INTCONbits 0 5 -> -> 1 `i `uc ]\n[; ;Tick-PIC18.c: 69: }\n\"69\n[e :UE 522 ]\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/1376266981/Tick-PIC18.p1.d",
    "content": " build/default/production/_ext/1376266981/Tick-PIC18.d  \\\n build/default/production/_ext/1376266981/Tick-PIC18.p1:  \\\n C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c  \\\nC:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/TickPort.h  \\\nC:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick.h "
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/1376266981/Tick-PIC18.pre",
    "content": "\n# 1 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c\"\n\n# 44 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\nextern volatile unsigned short UFRM @ 0xF66;\n\nasm(\"UFRM equ 0F66h\");\n\n\n\nextern volatile unsigned char UFRML @ 0xF66;\n\nasm(\"UFRML equ 0F66h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :8;\n};\nstruct {\nunsigned FRM0 :1;\nunsigned FRM1 :1;\nunsigned FRM2 :1;\nunsigned FRM3 :1;\nunsigned FRM4 :1;\nunsigned FRM5 :1;\nunsigned FRM6 :1;\nunsigned FRM7 :1;\n};\nstruct {\nunsigned FRML :8;\n};\n} UFRMLbits_t;\nextern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n\n# 127\nextern volatile unsigned char UFRMH @ 0xF67;\n\nasm(\"UFRMH equ 0F67h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :3;\n};\nstruct {\nunsigned FRM8 :1;\nunsigned FRM9 :1;\nunsigned FRM10 :1;\n};\n} UFRMHbits_t;\nextern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n\n# 166\nextern volatile unsigned char UIR @ 0xF68;\n\nasm(\"UIR equ 0F68h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIF :1;\nunsigned UERRIF :1;\nunsigned ACTVIF :1;\nunsigned TRNIF :1;\nunsigned IDLEIF :1;\nunsigned STALLIF :1;\nunsigned SOFIF :1;\n};\n} UIRbits_t;\nextern volatile UIRbits_t UIRbits @ 0xF68;\n\n# 221\nextern volatile unsigned char UIE @ 0xF69;\n\nasm(\"UIE equ 0F69h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIE :1;\nunsigned UERRIE :1;\nunsigned ACTVIE :1;\nunsigned TRNIE :1;\nunsigned IDLEIE :1;\nunsigned STALLIE :1;\nunsigned SOFIE :1;\n};\n} UIEbits_t;\nextern volatile UIEbits_t UIEbits @ 0xF69;\n\n# 276\nextern volatile unsigned char UEIR @ 0xF6A;\n\nasm(\"UEIR equ 0F6Ah\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEF :1;\nunsigned CRC5EF :1;\nunsigned CRC16EF :1;\nunsigned DFN8EF :1;\nunsigned BTOEF :1;\nunsigned :2;\nunsigned BTSEF :1;\n};\n} UEIRbits_t;\nextern volatile UEIRbits_t UEIRbits @ 0xF6A;\n\n# 326\nextern volatile unsigned char UEIE @ 0xF6B;\n\nasm(\"UEIE equ 0F6Bh\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEE :1;\nunsigned CRC5EE :1;\nunsigned CRC16EE :1;\nunsigned DFN8EE :1;\nunsigned BTOEE :1;\nunsigned :2;\nunsigned BTSEE :1;\n};\n} UEIEbits_t;\nextern volatile UEIEbits_t UEIEbits @ 0xF6B;\n\n# 376\nextern volatile unsigned char USTAT @ 0xF6C;\n\nasm(\"USTAT equ 0F6Ch\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned PPBI :1;\nunsigned DIR :1;\nunsigned ENDP :4;\n};\nstruct {\nunsigned :3;\nunsigned ENDP0 :1;\nunsigned ENDP1 :1;\nunsigned ENDP2 :1;\nunsigned ENDP3 :1;\n};\n} USTATbits_t;\nextern volatile USTATbits_t USTATbits @ 0xF6C;\n\n# 435\nextern volatile unsigned char UCON @ 0xF6D;\n\nasm(\"UCON equ 0F6Dh\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned SUSPND :1;\nunsigned RESUME :1;\nunsigned USBEN :1;\nunsigned PKTDIS :1;\nunsigned SE0 :1;\nunsigned PPBRST :1;\n};\n} UCONbits_t;\nextern volatile UCONbits_t UCONbits @ 0xF6D;\n\n# 485\nextern volatile unsigned char UADDR @ 0xF6E;\n\nasm(\"UADDR equ 0F6Eh\");\n\n\ntypedef union {\nstruct {\nunsigned ADDR :7;\n};\nstruct {\nunsigned ADDR0 :1;\nunsigned ADDR1 :1;\nunsigned ADDR2 :1;\nunsigned ADDR3 :1;\nunsigned ADDR4 :1;\nunsigned ADDR5 :1;\nunsigned ADDR6 :1;\n};\n} UADDRbits_t;\nextern volatile UADDRbits_t UADDRbits @ 0xF6E;\n\n# 548\nextern volatile unsigned char UCFG @ 0xF6F;\n\nasm(\"UCFG equ 0F6Fh\");\n\n\ntypedef union {\nstruct {\nunsigned PPB :2;\nunsigned FSEN :1;\nunsigned UTRDIS :1;\nunsigned UPUEN :1;\nunsigned :1;\nunsigned UOEMON :1;\nunsigned UTEYE :1;\n};\nstruct {\nunsigned PPB0 :1;\nunsigned PPB1 :1;\n};\nstruct {\nunsigned UPP0 :1;\n};\nstruct {\nunsigned :1;\nunsigned UPP1 :1;\n};\n} UCFGbits_t;\nextern volatile UCFGbits_t UCFGbits @ 0xF6F;\n\n# 629\nextern volatile unsigned char UEP0 @ 0xF70;\n\nasm(\"UEP0 equ 0F70h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP0CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP0HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP0INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP0OUTEN :1;\n};\nstruct {\nunsigned EP0STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS0 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK0 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN0 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN0 :1;\n};\nstruct {\nunsigned EPSTALL0 :1;\n};\n} UEP0bits_t;\nextern volatile UEP0bits_t UEP0bits @ 0xF70;\n\n# 760\nextern volatile unsigned char UEP1 @ 0xF71;\n\nasm(\"UEP1 equ 0F71h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP1CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP1HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP1INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP1OUTEN :1;\n};\nstruct {\nunsigned EP1STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS1 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK1 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN1 :1;\n};\nstruct {\nunsigned EPSTALL1 :1;\n};\n} UEP1bits_t;\nextern volatile UEP1bits_t UEP1bits @ 0xF71;\n\n# 891\nextern volatile unsigned char UEP2 @ 0xF72;\n\nasm(\"UEP2 equ 0F72h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP2CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP2HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP2INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP2OUTEN :1;\n};\nstruct {\nunsigned EP2STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS2 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK2 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN2 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN2 :1;\n};\nstruct {\nunsigned EPSTALL2 :1;\n};\n} UEP2bits_t;\nextern volatile UEP2bits_t UEP2bits @ 0xF72;\n\n# 1022\nextern volatile unsigned char UEP3 @ 0xF73;\n\nasm(\"UEP3 equ 0F73h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP3CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP3HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP3INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP3OUTEN :1;\n};\nstruct {\nunsigned EP3STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS3 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK3 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN3 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN3 :1;\n};\nstruct {\nunsigned EPSTALL3 :1;\n};\n} UEP3bits_t;\nextern volatile UEP3bits_t UEP3bits @ 0xF73;\n\n# 1153\nextern volatile unsigned char UEP4 @ 0xF74;\n\nasm(\"UEP4 equ 0F74h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP4CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP4HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP4INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP4OUTEN :1;\n};\nstruct {\nunsigned EP4STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS4 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK4 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN4 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN4 :1;\n};\nstruct {\nunsigned EPSTALL4 :1;\n};\n} UEP4bits_t;\nextern volatile UEP4bits_t UEP4bits @ 0xF74;\n\n# 1284\nextern volatile unsigned char UEP5 @ 0xF75;\n\nasm(\"UEP5 equ 0F75h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP5CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP5HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP5INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP5OUTEN :1;\n};\nstruct {\nunsigned EP5STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS5 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK5 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN5 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN5 :1;\n};\nstruct {\nunsigned EPSTALL5 :1;\n};\n} UEP5bits_t;\nextern volatile UEP5bits_t UEP5bits @ 0xF75;\n\n# 1415\nextern volatile unsigned char UEP6 @ 0xF76;\n\nasm(\"UEP6 equ 0F76h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP6CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP6HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP6INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP6OUTEN :1;\n};\nstruct {\nunsigned EP6STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS6 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK6 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN6 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN6 :1;\n};\nstruct {\nunsigned EPSTALL6 :1;\n};\n} UEP6bits_t;\nextern volatile UEP6bits_t UEP6bits @ 0xF76;\n\n# 1546\nextern volatile unsigned char UEP7 @ 0xF77;\n\nasm(\"UEP7 equ 0F77h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP7CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP7HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP7INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP7OUTEN :1;\n};\nstruct {\nunsigned EP7STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS7 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK7 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN7 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN7 :1;\n};\nstruct {\nunsigned EPSTALL7 :1;\n};\n} UEP7bits_t;\nextern volatile UEP7bits_t UEP7bits @ 0xF77;\n\n# 1677\nextern volatile unsigned char UEP8 @ 0xF78;\n\nasm(\"UEP8 equ 0F78h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS8 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK8 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN8 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN8 :1;\n};\nstruct {\nunsigned EPSTALL8 :1;\n};\n} UEP8bits_t;\nextern volatile UEP8bits_t UEP8bits @ 0xF78;\n\n# 1764\nextern volatile unsigned char UEP9 @ 0xF79;\n\nasm(\"UEP9 equ 0F79h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS9 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK9 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN9 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN9 :1;\n};\nstruct {\nunsigned EPSTALL9 :1;\n};\n} UEP9bits_t;\nextern volatile UEP9bits_t UEP9bits @ 0xF79;\n\n# 1851\nextern volatile unsigned char UEP10 @ 0xF7A;\n\nasm(\"UEP10 equ 0F7Ah\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS10 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK10 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN10 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN10 :1;\n};\nstruct {\nunsigned EPSTALL10 :1;\n};\n} UEP10bits_t;\nextern volatile UEP10bits_t UEP10bits @ 0xF7A;\n\n# 1938\nextern volatile unsigned char UEP11 @ 0xF7B;\n\nasm(\"UEP11 equ 0F7Bh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS11 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK11 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN11 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN11 :1;\n};\nstruct {\nunsigned EPSTALL11 :1;\n};\n} UEP11bits_t;\nextern volatile UEP11bits_t UEP11bits @ 0xF7B;\n\n# 2025\nextern volatile unsigned char UEP12 @ 0xF7C;\n\nasm(\"UEP12 equ 0F7Ch\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS12 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK12 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN12 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN12 :1;\n};\nstruct {\nunsigned EPSTALL12 :1;\n};\n} UEP12bits_t;\nextern volatile UEP12bits_t UEP12bits @ 0xF7C;\n\n# 2112\nextern volatile unsigned char UEP13 @ 0xF7D;\n\nasm(\"UEP13 equ 0F7Dh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS13 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK13 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN13 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN13 :1;\n};\nstruct {\nunsigned EPSTALL13 :1;\n};\n} UEP13bits_t;\nextern volatile UEP13bits_t UEP13bits @ 0xF7D;\n\n# 2199\nextern volatile unsigned char UEP14 @ 0xF7E;\n\nasm(\"UEP14 equ 0F7Eh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS14 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK14 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN14 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN14 :1;\n};\nstruct {\nunsigned EPSTALL14 :1;\n};\n} UEP14bits_t;\nextern volatile UEP14bits_t UEP14bits @ 0xF7E;\n\n# 2286\nextern volatile unsigned char UEP15 @ 0xF7F;\n\nasm(\"UEP15 equ 0F7Fh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS15 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK15 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN15 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN15 :1;\n};\nstruct {\nunsigned EPSTALL15 :1;\n};\n} UEP15bits_t;\nextern volatile UEP15bits_t UEP15bits @ 0xF7F;\n\n# 2373\nextern volatile unsigned char PORTA @ 0xF80;\n\nasm(\"PORTA equ 0F80h\");\n\n\ntypedef union {\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\nstruct {\nunsigned AN0 :1;\nunsigned AN1 :1;\nunsigned AN2 :1;\nunsigned AN3 :1;\nunsigned T0CKI :1;\nunsigned AN4 :1;\nunsigned OSC2 :1;\n};\nstruct {\nunsigned :2;\nunsigned VREFM :1;\nunsigned VREFP :1;\nunsigned :1;\nunsigned LVDIN :1;\n};\nstruct {\nunsigned :5;\nunsigned HLVDIN :1;\n};\nstruct {\nunsigned :7;\nunsigned RA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned RJPU :1;\n};\nstruct {\nunsigned ULPWUIN :1;\n};\n} PORTAbits_t;\nextern volatile PORTAbits_t PORTAbits @ 0xF80;\n\n# 2529\nextern volatile unsigned char PORTB @ 0xF81;\n\nasm(\"PORTB equ 0F81h\");\n\n\ntypedef union {\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\nstruct {\nunsigned INT0 :1;\nunsigned INT1 :1;\nunsigned INT2 :1;\nunsigned :2;\nunsigned PGM :1;\nunsigned PGC :1;\nunsigned PGD :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP2_PA2 :1;\n};\n} PORTBbits_t;\nextern volatile PORTBbits_t PORTBbits @ 0xF81;\n\n# 2638\nextern volatile unsigned char PORTC @ 0xF82;\n\nasm(\"PORTC equ 0F82h\");\n\n\ntypedef union {\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :1;\nunsigned RC4 :1;\nunsigned RC5 :1;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned T1OSO :1;\nunsigned T1OSI :1;\nunsigned CCP1 :1;\nunsigned :3;\nunsigned TX :1;\nunsigned RX :1;\n};\nstruct {\nunsigned T13CKI :1;\nunsigned :1;\nunsigned P1A :1;\nunsigned :3;\nunsigned CK :1;\nunsigned DT :1;\n};\nstruct {\nunsigned :1;\nunsigned CCP2 :1;\n};\nstruct {\nunsigned :2;\nunsigned PA1 :1;\n};\nstruct {\nunsigned :1;\nunsigned PA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned RC3 :1;\n};\n} PORTCbits_t;\nextern volatile PORTCbits_t PORTCbits @ 0xF82;\n\n# 2791\nextern volatile unsigned char PORTE @ 0xF84;\n\nasm(\"PORTE equ 0F84h\");\n\n\ntypedef union {\nstruct {\nunsigned :3;\nunsigned RE3 :1;\n};\nstruct {\nunsigned :2;\nunsigned CCP10 :1;\n};\nstruct {\nunsigned :7;\nunsigned CCP2E :1;\n};\nstruct {\nunsigned :6;\nunsigned CCP6E :1;\n};\nstruct {\nunsigned :5;\nunsigned CCP7E :1;\n};\nstruct {\nunsigned :4;\nunsigned CCP8E :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP9E :1;\n};\nstruct {\nunsigned :2;\nunsigned CS :1;\n};\nstruct {\nunsigned :7;\nunsigned PA2E :1;\n};\nstruct {\nunsigned :6;\nunsigned PB1E :1;\n};\nstruct {\nunsigned :2;\nunsigned PB2 :1;\n};\nstruct {\nunsigned :4;\nunsigned PB3E :1;\n};\nstruct {\nunsigned :5;\nunsigned PC1E :1;\n};\nstruct {\nunsigned :1;\nunsigned PC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned PC3E :1;\n};\nstruct {\nunsigned PD2 :1;\n};\nstruct {\nunsigned RDE :1;\n};\nstruct {\nunsigned RE0 :1;\n};\nstruct {\nunsigned :1;\nunsigned RE1 :1;\n};\nstruct {\nunsigned :2;\nunsigned RE2 :1;\n};\nstruct {\nunsigned :4;\nunsigned RE4 :1;\n};\nstruct {\nunsigned :5;\nunsigned RE5 :1;\n};\nstruct {\nunsigned :6;\nunsigned RE6 :1;\n};\nstruct {\nunsigned :7;\nunsigned RE7 :1;\n};\nstruct {\nunsigned :1;\nunsigned WRE :1;\n};\n} PORTEbits_t;\nextern volatile PORTEbits_t PORTEbits @ 0xF84;\n\n# 3024\nextern volatile unsigned char LATA @ 0xF89;\n\nasm(\"LATA equ 0F89h\");\n\n\ntypedef union {\nstruct {\nunsigned LATA0 :1;\nunsigned LATA1 :1;\nunsigned LATA2 :1;\nunsigned LATA3 :1;\nunsigned LATA4 :1;\nunsigned LATA5 :1;\nunsigned LATA6 :1;\n};\nstruct {\nunsigned LA0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LA1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LA3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LA4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LA5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LA6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned LATA7 :1;\n};\n} LATAbits_t;\nextern volatile LATAbits_t LATAbits @ 0xF89;\n\n# 3159\nextern volatile unsigned char LATB @ 0xF8A;\n\nasm(\"LATB equ 0F8Ah\");\n\n\ntypedef union {\nstruct {\nunsigned LATB0 :1;\nunsigned LATB1 :1;\nunsigned LATB2 :1;\nunsigned LATB3 :1;\nunsigned LATB4 :1;\nunsigned LATB5 :1;\nunsigned LATB6 :1;\nunsigned LATB7 :1;\n};\nstruct {\nunsigned LB0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LB1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LB2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LB3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LB4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LB5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LB6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LB7 :1;\n};\n} LATBbits_t;\nextern volatile LATBbits_t LATBbits @ 0xF8A;\n\n# 3291\nextern volatile unsigned char LATC @ 0xF8B;\n\nasm(\"LATC equ 0F8Bh\");\n\n\ntypedef union {\nstruct {\nunsigned LATC0 :1;\nunsigned LATC1 :1;\nunsigned LATC2 :1;\nunsigned :3;\nunsigned LATC6 :1;\nunsigned LATC7 :1;\n};\nstruct {\nunsigned LC0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LC1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LC3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LC4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LC5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LC6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LC7 :1;\n};\n} LATCbits_t;\nextern volatile LATCbits_t LATCbits @ 0xF8B;\n\n# 3406\nextern volatile unsigned char TRISA @ 0xF92;\n\nasm(\"TRISA equ 0F92h\");\n\n\nextern volatile unsigned char DDRA @ 0xF92;\n\nasm(\"DDRA equ 0F92h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} TRISAbits_t;\nextern volatile TRISAbits_t TRISAbits @ 0xF92;\n\n# 3509\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} DDRAbits_t;\nextern volatile DDRAbits_t DDRAbits @ 0xF92;\n\n# 3603\nextern volatile unsigned char TRISB @ 0xF93;\n\nasm(\"TRISB equ 0F93h\");\n\n\nextern volatile unsigned char DDRB @ 0xF93;\n\nasm(\"DDRB equ 0F93h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} TRISBbits_t;\nextern volatile TRISBbits_t TRISBbits @ 0xF93;\n\n# 3718\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} DDRBbits_t;\nextern volatile DDRBbits_t DDRBbits @ 0xF93;\n\n# 3824\nextern volatile unsigned char TRISC @ 0xF94;\n\nasm(\"TRISC equ 0F94h\");\n\n\nextern volatile unsigned char DDRC @ 0xF94;\n\nasm(\"DDRC equ 0F94h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} TRISCbits_t;\nextern volatile TRISCbits_t TRISCbits @ 0xF94;\n\n# 3914\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} DDRCbits_t;\nextern volatile DDRCbits_t DDRCbits @ 0xF94;\n\n# 3995\nextern volatile unsigned char OSCTUNE @ 0xF9B;\n\nasm(\"OSCTUNE equ 0F9Bh\");\n\n\ntypedef union {\nstruct {\nunsigned TUN :5;\nunsigned :2;\nunsigned INTSRC :1;\n};\nstruct {\nunsigned TUN0 :1;\nunsigned TUN1 :1;\nunsigned TUN2 :1;\nunsigned TUN3 :1;\nunsigned TUN4 :1;\n};\n} OSCTUNEbits_t;\nextern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n\n# 4053\nextern volatile unsigned char PIE1 @ 0xF9D;\n\nasm(\"PIE1 equ 0F9Dh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IE :1;\nunsigned TMR2IE :1;\nunsigned CCP1IE :1;\nunsigned SSPIE :1;\nunsigned TXIE :1;\nunsigned RCIE :1;\nunsigned ADIE :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IE :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IE :1;\n};\n} PIE1bits_t;\nextern volatile PIE1bits_t PIE1bits @ 0xF9D;\n\n# 4126\nextern volatile unsigned char PIR1 @ 0xF9E;\n\nasm(\"PIR1 equ 0F9Eh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IF :1;\nunsigned TMR2IF :1;\nunsigned CCP1IF :1;\nunsigned SSPIF :1;\nunsigned TXIF :1;\nunsigned RCIF :1;\nunsigned ADIF :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IF :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IF :1;\n};\n} PIR1bits_t;\nextern volatile PIR1bits_t PIR1bits @ 0xF9E;\n\n# 4199\nextern volatile unsigned char IPR1 @ 0xF9F;\n\nasm(\"IPR1 equ 0F9Fh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IP :1;\nunsigned TMR2IP :1;\nunsigned CCP1IP :1;\nunsigned SSPIP :1;\nunsigned TXIP :1;\nunsigned RCIP :1;\nunsigned ADIP :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IP :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IP :1;\n};\n} IPR1bits_t;\nextern volatile IPR1bits_t IPR1bits @ 0xF9F;\n\n# 4272\nextern volatile unsigned char PIE2 @ 0xFA0;\n\nasm(\"PIE2 equ 0FA0h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IE :1;\nunsigned TMR3IE :1;\nunsigned HLVDIE :1;\nunsigned BCLIE :1;\nunsigned EEIE :1;\nunsigned USBIE :1;\nunsigned CMIE :1;\nunsigned OSCFIE :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIE :1;\n};\n} PIE2bits_t;\nextern volatile PIE2bits_t PIE2bits @ 0xFA0;\n\n# 4342\nextern volatile unsigned char PIR2 @ 0xFA1;\n\nasm(\"PIR2 equ 0FA1h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IF :1;\nunsigned TMR3IF :1;\nunsigned HLVDIF :1;\nunsigned BCLIF :1;\nunsigned EEIF :1;\nunsigned USBIF :1;\nunsigned CMIF :1;\nunsigned OSCFIF :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIF :1;\n};\n} PIR2bits_t;\nextern volatile PIR2bits_t PIR2bits @ 0xFA1;\n\n# 4412\nextern volatile unsigned char IPR2 @ 0xFA2;\n\nasm(\"IPR2 equ 0FA2h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IP :1;\nunsigned TMR3IP :1;\nunsigned HLVDIP :1;\nunsigned BCLIP :1;\nunsigned EEIP :1;\nunsigned USBIP :1;\nunsigned CMIP :1;\nunsigned OSCFIP :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIP :1;\n};\n} IPR2bits_t;\nextern volatile IPR2bits_t IPR2bits @ 0xFA2;\n\n# 4482\nextern volatile unsigned char EECON1 @ 0xFA6;\n\nasm(\"EECON1 equ 0FA6h\");\n\n\ntypedef union {\nstruct {\nunsigned RD :1;\nunsigned WR :1;\nunsigned WREN :1;\nunsigned WRERR :1;\nunsigned FREE :1;\nunsigned :1;\nunsigned CFGS :1;\nunsigned EEPGD :1;\n};\nstruct {\nunsigned :6;\nunsigned EEFS :1;\n};\n} EECON1bits_t;\nextern volatile EECON1bits_t EECON1bits @ 0xFA6;\n\n# 4547\nextern volatile unsigned char EECON2 @ 0xFA7;\n\nasm(\"EECON2 equ 0FA7h\");\n\n\n\nextern volatile unsigned char EEDATA @ 0xFA8;\n\nasm(\"EEDATA equ 0FA8h\");\n\n\n\nextern volatile unsigned char EEADR @ 0xFA9;\n\nasm(\"EEADR equ 0FA9h\");\n\n\n\nextern volatile unsigned char RCSTA @ 0xFAB;\n\nasm(\"RCSTA equ 0FABh\");\n\n\nextern volatile unsigned char RCSTA1 @ 0xFAB;\n\nasm(\"RCSTA1 equ 0FABh\");\n\n\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTAbits_t;\nextern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n\n# 4648\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTA1bits_t;\nextern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n\n# 4722\nextern volatile unsigned char TXSTA @ 0xFAC;\n\nasm(\"TXSTA equ 0FACh\");\n\n\nextern volatile unsigned char TXSTA1 @ 0xFAC;\n\nasm(\"TXSTA1 equ 0FACh\");\n\n\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTAbits_t;\nextern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n\n# 4858\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTA1bits_t;\nextern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n\n# 4985\nextern volatile unsigned char TXREG @ 0xFAD;\n\nasm(\"TXREG equ 0FADh\");\n\n\nextern volatile unsigned char TXREG1 @ 0xFAD;\n\nasm(\"TXREG1 equ 0FADh\");\n\n\n\nextern volatile unsigned char RCREG @ 0xFAE;\n\nasm(\"RCREG equ 0FAEh\");\n\n\nextern volatile unsigned char RCREG1 @ 0xFAE;\n\nasm(\"RCREG1 equ 0FAEh\");\n\n\n\nextern volatile unsigned char SPBRG @ 0xFAF;\n\nasm(\"SPBRG equ 0FAFh\");\n\n\nextern volatile unsigned char SPBRG1 @ 0xFAF;\n\nasm(\"SPBRG1 equ 0FAFh\");\n\n\n\nextern volatile unsigned char SPBRGH @ 0xFB0;\n\nasm(\"SPBRGH equ 0FB0h\");\n\n\n\nextern volatile unsigned char T3CON @ 0xFB1;\n\nasm(\"T3CON equ 0FB1h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T3SYNC :1;\n};\nstruct {\nunsigned TMR3ON :1;\nunsigned TMR3CS :1;\nunsigned nT3SYNC :1;\nunsigned T3CCP1 :1;\nunsigned T3CKPS :2;\nunsigned T3CCP2 :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3SYNC :1;\nunsigned :1;\nunsigned T3CKPS0 :1;\nunsigned T3CKPS1 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3NSYNC :1;\n};\nstruct {\nunsigned :7;\nunsigned RD163 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN3 :1;\n};\nstruct {\nunsigned :7;\nunsigned T3RD16 :1;\n};\n} T3CONbits_t;\nextern volatile T3CONbits_t T3CONbits @ 0xFB1;\n\n# 5146\nextern volatile unsigned short TMR3 @ 0xFB2;\n\nasm(\"TMR3 equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3L @ 0xFB2;\n\nasm(\"TMR3L equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3H @ 0xFB3;\n\nasm(\"TMR3H equ 0FB3h\");\n\n\n\nextern volatile unsigned char CMCON @ 0xFB4;\n\nasm(\"CMCON equ 0FB4h\");\n\n\ntypedef union {\nstruct {\nunsigned CM :3;\nunsigned CIS :1;\nunsigned C1INV :1;\nunsigned C2INV :1;\nunsigned C1OUT :1;\nunsigned C2OUT :1;\n};\nstruct {\nunsigned CM0 :1;\nunsigned CM1 :1;\nunsigned CM2 :1;\n};\nstruct {\nunsigned CMEN0 :1;\n};\nstruct {\nunsigned :1;\nunsigned CMEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned CMEN2 :1;\n};\n} CMCONbits_t;\nextern volatile CMCONbits_t CMCONbits @ 0xFB4;\n\n# 5259\nextern volatile unsigned char CVRCON @ 0xFB5;\n\nasm(\"CVRCON equ 0FB5h\");\n\n\ntypedef union {\nstruct {\nunsigned CVR :4;\nunsigned CVRSS :1;\nunsigned CVRR :1;\nunsigned CVROE :1;\nunsigned CVREN :1;\n};\nstruct {\nunsigned CVR0 :1;\nunsigned CVR1 :1;\nunsigned CVR2 :1;\nunsigned CVR3 :1;\nunsigned CVREF :1;\n};\nstruct {\nunsigned :6;\nunsigned CVROEN :1;\n};\n} CVRCONbits_t;\nextern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n\n# 5343\nextern volatile unsigned char ECCP1AS @ 0xFB6;\n\nasm(\"ECCP1AS equ 0FB6h\");\n\n\nextern volatile unsigned char CCP1AS @ 0xFB6;\n\nasm(\"CCP1AS equ 0FB6h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} ECCP1ASbits_t;\nextern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n\n# 5412\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} CCP1ASbits_t;\nextern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n\n# 5472\nextern volatile unsigned char ECCP1DEL @ 0xFB7;\n\nasm(\"ECCP1DEL equ 0FB7h\");\n\n\nextern volatile unsigned char CCP1DEL @ 0xFB7;\n\nasm(\"CCP1DEL equ 0FB7h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} ECCP1DELbits_t;\nextern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n\n# 5496\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} CCP1DELbits_t;\nextern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n\n# 5511\nextern volatile unsigned char BAUDCON @ 0xFB8;\n\nasm(\"BAUDCON equ 0FB8h\");\n\n\nextern volatile unsigned char BAUDCTL @ 0xFB8;\n\nasm(\"BAUDCTL equ 0FB8h\");\n\n\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCONbits_t;\nextern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n\n# 5605\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCTLbits_t;\nextern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n\n# 5690\nextern volatile unsigned char CCP2CON @ 0xFBA;\n\nasm(\"CCP2CON equ 0FBAh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2M :4;\nunsigned DC2B :2;\n};\nstruct {\nunsigned CCP2M0 :1;\nunsigned CCP2M1 :1;\nunsigned CCP2M2 :1;\nunsigned CCP2M3 :1;\nunsigned DC2B0 :1;\nunsigned DC2B1 :1;\n};\n} CCP2CONbits_t;\nextern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n\n# 5753\nextern volatile unsigned short CCPR2 @ 0xFBB;\n\nasm(\"CCPR2 equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2L @ 0xFBB;\n\nasm(\"CCPR2L equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2H @ 0xFBC;\n\nasm(\"CCPR2H equ 0FBCh\");\n\n\n\nextern volatile unsigned char CCP1CON @ 0xFBD;\n\nasm(\"CCP1CON equ 0FBDh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP1M :4;\nunsigned DC1B :2;\n};\nstruct {\nunsigned CCP1M0 :1;\nunsigned CCP1M1 :1;\nunsigned CCP1M2 :1;\nunsigned CCP1M3 :1;\nunsigned DC1B0 :1;\nunsigned DC1B1 :1;\n};\n} CCP1CONbits_t;\nextern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n\n# 5834\nextern volatile unsigned short CCPR1 @ 0xFBE;\n\nasm(\"CCPR1 equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1L @ 0xFBE;\n\nasm(\"CCPR1L equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1H @ 0xFBF;\n\nasm(\"CCPR1H equ 0FBFh\");\n\n\n\nextern volatile unsigned char ADCON2 @ 0xFC0;\n\nasm(\"ADCON2 equ 0FC0h\");\n\n\ntypedef union {\nstruct {\nunsigned ADCS :3;\nunsigned ACQT :3;\nunsigned :1;\nunsigned ADFM :1;\n};\nstruct {\nunsigned ADCS0 :1;\nunsigned ADCS1 :1;\nunsigned ADCS2 :1;\nunsigned ACQT0 :1;\nunsigned ACQT1 :1;\nunsigned ACQT2 :1;\n};\n} ADCON2bits_t;\nextern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n\n# 5922\nextern volatile unsigned char ADCON1 @ 0xFC1;\n\nasm(\"ADCON1 equ 0FC1h\");\n\n\ntypedef union {\nstruct {\nunsigned PCFG :4;\nunsigned VCFG :2;\n};\nstruct {\nunsigned PCFG0 :1;\nunsigned PCFG1 :1;\nunsigned PCFG2 :1;\nunsigned PCFG3 :1;\nunsigned VCFG0 :1;\nunsigned VCFG1 :1;\n};\nstruct {\nunsigned :3;\nunsigned CHSN3 :1;\n};\nstruct {\nunsigned :4;\nunsigned VCFG01 :1;\n};\nstruct {\nunsigned :5;\nunsigned VCFG11 :1;\n};\n} ADCON1bits_t;\nextern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n\n# 6012\nextern volatile unsigned char ADCON0 @ 0xFC2;\n\nasm(\"ADCON0 equ 0FC2h\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned ADON :1;\nunsigned GO_nDONE :1;\nunsigned CHS :4;\n};\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO_DONE :1;\nunsigned CHS0 :1;\nunsigned CHS1 :1;\nunsigned CHS2 :1;\nunsigned CHS3 :1;\n};\nstruct {\nunsigned :1;\nunsigned DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned nDONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GODONE :1;\n};\n} ADCON0bits_t;\nextern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n\n# 6134\nextern volatile unsigned short ADRES @ 0xFC3;\n\nasm(\"ADRES equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESL @ 0xFC3;\n\nasm(\"ADRESL equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESH @ 0xFC4;\n\nasm(\"ADRESH equ 0FC4h\");\n\n\n\nextern volatile unsigned char SSPCON2 @ 0xFC5;\n\nasm(\"SSPCON2 equ 0FC5h\");\n\n\ntypedef union {\nstruct {\nunsigned SEN :1;\nunsigned RSEN :1;\nunsigned PEN :1;\nunsigned RCEN :1;\nunsigned ACKEN :1;\nunsigned ACKDT :1;\nunsigned ACKSTAT :1;\nunsigned GCEN :1;\n};\n} SSPCON2bits_t;\nextern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n\n# 6213\nextern volatile unsigned char SSPCON1 @ 0xFC6;\n\nasm(\"SSPCON1 equ 0FC6h\");\n\n\ntypedef union {\nstruct {\nunsigned SSPM :4;\nunsigned CKP :1;\nunsigned SSPEN :1;\nunsigned SSPOV :1;\nunsigned WCOL :1;\n};\nstruct {\nunsigned SSPM0 :1;\nunsigned SSPM1 :1;\nunsigned SSPM2 :1;\nunsigned SSPM3 :1;\n};\n} SSPCON1bits_t;\nextern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n\n# 6282\nextern volatile unsigned char SSPSTAT @ 0xFC7;\n\nasm(\"SSPSTAT equ 0FC7h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned BF :1;\nunsigned UA :1;\nunsigned R_nW :1;\nunsigned S :1;\nunsigned P :1;\nunsigned D_nA :1;\nunsigned CKE :1;\nunsigned SMP :1;\n};\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned :2;\nunsigned R_W :1;\nunsigned :2;\nunsigned D_A :1;\n};\nstruct {\nunsigned :2;\nunsigned I2C_READ :1;\nunsigned I2C_START :1;\nunsigned I2C_STOP :1;\nunsigned I2C_DAT :1;\n};\nstruct {\nunsigned :2;\nunsigned nW :1;\nunsigned :2;\nunsigned nA :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_WRITE :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned nWRITE :1;\nunsigned :2;\nunsigned nADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned READ_WRITE :1;\nunsigned :2;\nunsigned DATA_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned R :1;\nunsigned :2;\nunsigned D :1;\n};\nstruct {\nunsigned :5;\nunsigned DA :1;\n};\nstruct {\nunsigned :2;\nunsigned RW :1;\n};\nstruct {\nunsigned :3;\nunsigned START :1;\n};\nstruct {\nunsigned :4;\nunsigned STOP :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_A :1;\n};\n} SSPSTATbits_t;\nextern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n\n# 6548\nextern volatile unsigned char SSPADD @ 0xFC8;\n\nasm(\"SSPADD equ 0FC8h\");\n\n\n\nextern volatile unsigned char SSPBUF @ 0xFC9;\n\nasm(\"SSPBUF equ 0FC9h\");\n\n\n\nextern volatile unsigned char T2CON @ 0xFCA;\n\nasm(\"T2CON equ 0FCAh\");\n\n\ntypedef union {\nstruct {\nunsigned T2CKPS :2;\nunsigned TMR2ON :1;\nunsigned TOUTPS :4;\n};\nstruct {\nunsigned T2CKPS0 :1;\nunsigned T2CKPS1 :1;\nunsigned :1;\nunsigned T2OUTPS0 :1;\nunsigned T2OUTPS1 :1;\nunsigned T2OUTPS2 :1;\nunsigned T2OUTPS3 :1;\n};\nstruct {\nunsigned :3;\nunsigned TOUTPS0 :1;\nunsigned TOUTPS1 :1;\nunsigned TOUTPS2 :1;\nunsigned TOUTPS3 :1;\n};\n} T2CONbits_t;\nextern volatile T2CONbits_t T2CONbits @ 0xFCA;\n\n# 6657\nextern volatile unsigned char PR2 @ 0xFCB;\n\nasm(\"PR2 equ 0FCBh\");\n\n\nextern volatile unsigned char MEMCON @ 0xFCB;\n\nasm(\"MEMCON equ 0FCBh\");\n\n\n\nextern volatile unsigned char TMR2 @ 0xFCC;\n\nasm(\"TMR2 equ 0FCCh\");\n\n\n\nextern volatile unsigned char T1CON @ 0xFCD;\n\nasm(\"T1CON equ 0FCDh\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T1SYNC :1;\n};\nstruct {\nunsigned TMR1ON :1;\nunsigned TMR1CS :1;\nunsigned nT1SYNC :1;\nunsigned T1OSCEN :1;\nunsigned T1CKPS :2;\nunsigned T1RUN :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T1SYNC :1;\nunsigned :1;\nunsigned T1CKPS0 :1;\nunsigned T1CKPS1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN :1;\n};\nstruct {\nunsigned :7;\nunsigned T1RD16 :1;\n};\n} T1CONbits_t;\nextern volatile T1CONbits_t T1CONbits @ 0xFCD;\n\n# 6778\nextern volatile unsigned short TMR1 @ 0xFCE;\n\nasm(\"TMR1 equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1L @ 0xFCE;\n\nasm(\"TMR1L equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1H @ 0xFCF;\n\nasm(\"TMR1H equ 0FCFh\");\n\n\n\nextern volatile unsigned char RCON @ 0xFD0;\n\nasm(\"RCON equ 0FD0h\");\n\n\ntypedef union {\nstruct {\nunsigned NOT_BOR :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_POR :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_PD :1;\n};\nstruct {\nunsigned :3;\nunsigned NOT_TO :1;\n};\nstruct {\nunsigned :4;\nunsigned NOT_RI :1;\n};\nstruct {\nunsigned nBOR :1;\nunsigned nPOR :1;\nunsigned nPD :1;\nunsigned nTO :1;\nunsigned nRI :1;\nunsigned :1;\nunsigned SBOREN :1;\nunsigned IPEN :1;\n};\nstruct {\nunsigned :7;\nunsigned NOT_IPEN :1;\n};\nstruct {\nunsigned BOR :1;\nunsigned POR :1;\nunsigned PD :1;\nunsigned TO :1;\nunsigned RI :1;\nunsigned :2;\nunsigned nIPEN :1;\n};\n} RCONbits_t;\nextern volatile RCONbits_t RCONbits @ 0xFD0;\n\n# 6944\nextern volatile unsigned char WDTCON @ 0xFD1;\n\nasm(\"WDTCON equ 0FD1h\");\n\n\ntypedef union {\nstruct {\nunsigned SWDTEN :1;\n};\nstruct {\nunsigned SWDTE :1;\n};\n} WDTCONbits_t;\nextern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n\n# 6971\nextern volatile unsigned char HLVDCON @ 0xFD2;\n\nasm(\"HLVDCON equ 0FD2h\");\n\n\nextern volatile unsigned char LVDCON @ 0xFD2;\n\nasm(\"LVDCON equ 0FD2h\");\n\n\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} HLVDCONbits_t;\nextern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n\n# 7110\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} LVDCONbits_t;\nextern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n\n# 7240\nextern volatile unsigned char OSCCON @ 0xFD3;\n\nasm(\"OSCCON equ 0FD3h\");\n\n\ntypedef union {\nstruct {\nunsigned SCS :2;\nunsigned IOFS :1;\nunsigned OSTS :1;\nunsigned IRCF :3;\nunsigned IDLEN :1;\n};\nstruct {\nunsigned SCS0 :1;\nunsigned SCS1 :1;\nunsigned FLTS :1;\nunsigned :1;\nunsigned IRCF0 :1;\nunsigned IRCF1 :1;\nunsigned IRCF2 :1;\n};\n} OSCCONbits_t;\nextern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n\n# 7322\nextern volatile unsigned char T0CON @ 0xFD5;\n\nasm(\"T0CON equ 0FD5h\");\n\n\ntypedef union {\nstruct {\nunsigned T0PS :3;\nunsigned PSA :1;\nunsigned T0SE :1;\nunsigned T0CS :1;\nunsigned T08BIT :1;\nunsigned TMR0ON :1;\n};\nstruct {\nunsigned T0PS0 :1;\nunsigned T0PS1 :1;\nunsigned T0PS2 :1;\n};\n} T0CONbits_t;\nextern volatile T0CONbits_t T0CONbits @ 0xFD5;\n\n# 7391\nextern volatile unsigned short TMR0 @ 0xFD6;\n\nasm(\"TMR0 equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0L @ 0xFD6;\n\nasm(\"TMR0L equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0H @ 0xFD7;\n\nasm(\"TMR0H equ 0FD7h\");\n\n\n\nextern volatile unsigned char STATUS @ 0xFD8;\n\nasm(\"STATUS equ 0FD8h\");\n\n\ntypedef union {\nstruct {\nunsigned C :1;\nunsigned DC :1;\nunsigned Z :1;\nunsigned OV :1;\nunsigned N :1;\n};\nstruct {\nunsigned CARRY :1;\n};\nstruct {\nunsigned :4;\nunsigned NEGATIVE :1;\n};\nstruct {\nunsigned :3;\nunsigned OVERFLOW :1;\n};\nstruct {\nunsigned :2;\nunsigned ZERO :1;\n};\n} STATUSbits_t;\nextern volatile STATUSbits_t STATUSbits @ 0xFD8;\n\n# 7487\nextern volatile unsigned short FSR2 @ 0xFD9;\n\nasm(\"FSR2 equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2L @ 0xFD9;\n\nasm(\"FSR2L equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2H @ 0xFDA;\n\nasm(\"FSR2H equ 0FDAh\");\n\n\n\nextern volatile unsigned char PLUSW2 @ 0xFDB;\n\nasm(\"PLUSW2 equ 0FDBh\");\n\n\n\nextern volatile unsigned char PREINC2 @ 0xFDC;\n\nasm(\"PREINC2 equ 0FDCh\");\n\n\n\nextern volatile unsigned char POSTDEC2 @ 0xFDD;\n\nasm(\"POSTDEC2 equ 0FDDh\");\n\n\n\nextern volatile unsigned char POSTINC2 @ 0xFDE;\n\nasm(\"POSTINC2 equ 0FDEh\");\n\n\n\nextern volatile unsigned char INDF2 @ 0xFDF;\n\nasm(\"INDF2 equ 0FDFh\");\n\n\n\nextern volatile unsigned char BSR @ 0xFE0;\n\nasm(\"BSR equ 0FE0h\");\n\n\n\nextern volatile unsigned short FSR1 @ 0xFE1;\n\nasm(\"FSR1 equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1L @ 0xFE1;\n\nasm(\"FSR1L equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1H @ 0xFE2;\n\nasm(\"FSR1H equ 0FE2h\");\n\n\n\nextern volatile unsigned char PLUSW1 @ 0xFE3;\n\nasm(\"PLUSW1 equ 0FE3h\");\n\n\n\nextern volatile unsigned char PREINC1 @ 0xFE4;\n\nasm(\"PREINC1 equ 0FE4h\");\n\n\n\nextern volatile unsigned char POSTDEC1 @ 0xFE5;\n\nasm(\"POSTDEC1 equ 0FE5h\");\n\n\n\nextern volatile unsigned char POSTINC1 @ 0xFE6;\n\nasm(\"POSTINC1 equ 0FE6h\");\n\n\n\nextern volatile unsigned char INDF1 @ 0xFE7;\n\nasm(\"INDF1 equ 0FE7h\");\n\n\n\nextern volatile unsigned char WREG @ 0xFE8;\n\nasm(\"WREG equ 0FE8h\");\n\n\n\nextern volatile unsigned short FSR0 @ 0xFE9;\n\nasm(\"FSR0 equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0L @ 0xFE9;\n\nasm(\"FSR0L equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0H @ 0xFEA;\n\nasm(\"FSR0H equ 0FEAh\");\n\n\n\nextern volatile unsigned char PLUSW0 @ 0xFEB;\n\nasm(\"PLUSW0 equ 0FEBh\");\n\n\n\nextern volatile unsigned char PREINC0 @ 0xFEC;\n\nasm(\"PREINC0 equ 0FECh\");\n\n\n\nextern volatile unsigned char POSTDEC0 @ 0xFED;\n\nasm(\"POSTDEC0 equ 0FEDh\");\n\n\n\nextern volatile unsigned char POSTINC0 @ 0xFEE;\n\nasm(\"POSTINC0 equ 0FEEh\");\n\n\n\nextern volatile unsigned char INDF0 @ 0xFEF;\n\nasm(\"INDF0 equ 0FEFh\");\n\n\n\nextern volatile unsigned char INTCON3 @ 0xFF0;\n\nasm(\"INTCON3 equ 0FF0h\");\n\n\ntypedef union {\nstruct {\nunsigned INT1IF :1;\nunsigned INT2IF :1;\nunsigned :1;\nunsigned INT1IE :1;\nunsigned INT2IE :1;\nunsigned :1;\nunsigned INT1IP :1;\nunsigned INT2IP :1;\n};\nstruct {\nunsigned INT1F :1;\nunsigned INT2F :1;\nunsigned :1;\nunsigned INT1E :1;\nunsigned INT2E :1;\nunsigned :1;\nunsigned INT1P :1;\nunsigned INT2P :1;\n};\n} INTCON3bits_t;\nextern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n\n# 7734\nextern volatile unsigned char INTCON2 @ 0xFF1;\n\nasm(\"INTCON2 equ 0FF1h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned NOT_RBPU :1;\n};\nstruct {\nunsigned RBIP :1;\nunsigned :1;\nunsigned TMR0IP :1;\nunsigned :1;\nunsigned INTEDG2 :1;\nunsigned INTEDG1 :1;\nunsigned INTEDG0 :1;\nunsigned nRBPU :1;\n};\nstruct {\nunsigned :2;\nunsigned T0IP :1;\nunsigned :4;\nunsigned RBPU :1;\n};\n} INTCON2bits_t;\nextern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n\n# 7810\nextern volatile unsigned char INTCON @ 0xFF2;\n\nasm(\"INTCON equ 0FF2h\");\n\n\ntypedef union {\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE_GIEL :1;\nunsigned GIE_GIEH :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\nstruct {\nunsigned :1;\nunsigned INT0F :1;\nunsigned T0IF :1;\nunsigned :1;\nunsigned INT0E :1;\nunsigned T0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned :6;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\n} INTCONbits_t;\nextern volatile INTCONbits_t INTCONbits @ 0xFF2;\n\n# 7946\nextern volatile unsigned short PROD @ 0xFF3;\n\nasm(\"PROD equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODL @ 0xFF3;\n\nasm(\"PRODL equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODH @ 0xFF4;\n\nasm(\"PRODH equ 0FF4h\");\n\n\n\nextern volatile unsigned char TABLAT @ 0xFF5;\n\nasm(\"TABLAT equ 0FF5h\");\n\n\n\n\nextern volatile unsigned short long TBLPTR @ 0xFF6;\n\n\nasm(\"TBLPTR equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRL @ 0xFF6;\n\nasm(\"TBLPTRL equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRH @ 0xFF7;\n\nasm(\"TBLPTRH equ 0FF7h\");\n\n\n\nextern volatile unsigned char TBLPTRU @ 0xFF8;\n\nasm(\"TBLPTRU equ 0FF8h\");\n\n\n\n\nextern volatile unsigned short long PCLAT @ 0xFF9;\n\n\nasm(\"PCLAT equ 0FF9h\");\n\n\n\nextern volatile unsigned short long PC @ 0xFF9;\n\n\nasm(\"PC equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCL @ 0xFF9;\n\nasm(\"PCL equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCLATH @ 0xFFA;\n\nasm(\"PCLATH equ 0FFAh\");\n\n\n\nextern volatile unsigned char PCLATU @ 0xFFB;\n\nasm(\"PCLATU equ 0FFBh\");\n\n\n\nextern volatile unsigned char STKPTR @ 0xFFC;\n\nasm(\"STKPTR equ 0FFCh\");\n\n\ntypedef union {\nstruct {\nunsigned STKPTR :5;\nunsigned :1;\nunsigned STKUNF :1;\nunsigned STKFUL :1;\n};\nstruct {\nunsigned STKPTR0 :1;\nunsigned STKPTR1 :1;\nunsigned STKPTR2 :1;\nunsigned STKPTR3 :1;\nunsigned STKPTR4 :1;\n};\nstruct {\nunsigned :7;\nunsigned STKOVF :1;\n};\n} STKPTRbits_t;\nextern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n\n# 8103\nextern volatile unsigned short long TOS @ 0xFFD;\n\n\nasm(\"TOS equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSL @ 0xFFD;\n\nasm(\"TOSL equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSH @ 0xFFE;\n\nasm(\"TOSH equ 0FFEh\");\n\n\n\nextern volatile unsigned char TOSU @ 0xFFF;\n\nasm(\"TOSU equ 0FFFh\");\n\n# 8134\nextern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n\nextern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n\nextern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n\nextern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n\nextern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n\nextern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n\nextern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n\nextern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n\nextern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n\nextern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n\nextern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n\nextern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n\nextern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n\nextern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n\nextern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n\nextern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n\nextern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n\nextern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n\nextern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n\nextern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n\nextern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n\nextern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n\nextern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n\nextern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n\nextern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n\nextern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n\nextern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n\nextern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n\nextern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n\nextern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n\nextern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n\nextern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n\nextern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n\nextern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n\nextern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n\nextern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n\nextern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n\nextern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n\nextern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n\nextern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n\nextern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n\nextern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n\nextern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n\nextern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n\nextern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n\nextern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n\nextern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n\nextern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n\nextern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n\nextern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n\nextern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n\nextern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n\nextern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n\nextern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n\nextern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n\nextern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n\nextern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n\nextern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n\nextern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n\nextern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n\nextern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n\nextern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n\nextern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n\nextern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n\nextern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n\nextern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n\nextern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n\nextern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n\nextern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n\nextern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n\nextern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n\nextern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n\nextern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n\nextern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n\nextern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n\nextern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n\nextern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n\nextern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n\nextern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n\nextern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n\nextern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n\nextern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n\nextern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n\nextern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n\nextern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n\nextern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n\nextern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n\nextern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n\nextern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n\nextern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n\nextern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n\nextern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n\nextern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n\nextern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n\nextern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n\nextern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n\nextern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n\nextern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n\nextern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n\nextern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n\nextern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n\nextern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n\nextern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n\nextern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n\nextern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n\nextern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n\nextern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n\nextern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n\nextern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n\nextern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n\nextern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n\nextern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n\nextern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n\nextern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n\nextern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n\nextern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n\nextern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n\nextern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n\nextern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n\nextern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n\nextern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n\nextern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n\nextern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n\nextern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n\nextern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n\nextern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n\nextern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n\nextern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n\nextern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n\nextern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n\nextern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n\nextern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n\nextern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n\nextern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n\nextern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n\nextern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n\nextern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n\nextern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n\nextern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n\nextern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n\nextern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n\nextern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n\nextern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n\nextern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n\nextern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n\nextern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n\nextern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n\nextern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n\nextern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n\nextern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n\nextern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n\nextern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n\nextern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n\nextern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n\nextern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n\nextern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n\nextern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n\nextern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n\nextern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n\nextern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n\nextern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n\nextern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n\nextern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n\nextern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n\nextern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n\nextern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n\nextern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n\nextern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n\nextern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n\nextern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n\nextern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n\nextern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n\nextern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n\nextern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n\nextern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n\nextern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n\nextern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n\nextern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n\nextern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n\nextern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n\nextern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n\nextern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n\nextern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n\nextern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n\nextern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n\nextern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n\nextern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n\nextern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n\nextern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n\nextern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n\nextern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n\nextern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n\nextern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n\nextern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n\nextern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n\nextern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n\nextern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n\nextern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n\nextern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n\nextern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n\nextern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n\nextern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n\nextern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n\nextern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n\nextern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n\nextern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n\nextern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n\nextern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n\nextern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n\nextern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n\nextern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n\nextern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n\nextern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n\nextern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n\nextern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n\nextern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n\nextern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n\nextern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n\nextern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n\nextern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n\nextern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n\nextern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n\nextern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n\nextern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n\nextern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n\nextern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n\nextern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n\nextern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n\nextern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n\nextern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n\nextern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n\nextern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n\nextern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n\nextern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n\nextern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n\nextern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n\nextern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n\nextern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n\nextern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n\nextern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n\nextern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n\nextern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n\nextern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n\nextern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n\nextern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n\nextern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n\nextern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n\nextern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n\nextern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n\nextern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n\nextern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n\nextern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n\nextern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n\nextern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n\nextern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n\nextern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n\nextern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n\nextern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n\nextern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n\nextern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n\nextern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n\nextern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n\nextern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n\nextern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n\nextern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n\nextern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n\nextern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n\nextern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n\nextern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n\nextern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n\nextern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n\nextern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n\nextern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n\nextern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n\nextern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n\nextern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n\nextern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n\nextern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n\nextern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n\nextern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n\nextern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n\nextern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n\nextern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n\nextern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n\nextern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n\nextern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n\nextern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n\nextern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n\nextern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n\nextern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n\nextern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n\nextern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n\nextern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n\nextern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n\nextern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n\nextern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\n# 2008 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\adc.h\"\nunion ADCResult\n{\nint lr;\nchar br[2];\n};\n\nchar BusyADC (void);\n\nvoid ConvertADC (void);\n\nvoid CloseADC(void);\n\n# 2026\nint ReadADC(void);\n\n# 2040\nvoid OpenADC ( unsigned char ,\nunsigned char ,\nunsigned char );\n\n# 2084\nvoid SetChanADC(unsigned char );\n\n# 2100\nvoid SelChanConvADC( unsigned char );\n\n# 38 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\ancomp.h\"\nvoid Close_ancomp( void );\nvoid Open_ancomp(unsigned char config);\n\n# 584 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\spi.h\"\nvoid OpenSPI( unsigned char sync_mode,\nunsigned char bus_mode,\nunsigned char smp_phase );\n\nsigned char WriteSPI( unsigned char data_out );\n\nvoid getsSPI( unsigned char *rdptr, unsigned char length );\n\nvoid putsSPI( unsigned char *wrptr );\n\nunsigned char ReadSPI( void );\n\n# 414 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\can2510.h\"\nvoid CAN2510Initialize(  unsigned int configuration,\n unsigned char brp,\n unsigned char interruptFlags,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nsigned char CAN2510Init(  unsigned long BufferConfig,\n unsigned long BitTimeConfig,\n unsigned char interruptEnables,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nvoid CAN2510Enable( void );\n\nvoid CAN2510Disable( void );\n\nvoid CAN2510Reset( void );\n\nvoid CAN2510SetMode(  unsigned char mode );\n\nunsigned char CAN2510ReadMode( void );\n\nunsigned char CAN2510ReadStatus( void );\n\nunsigned char CAN2510ErrorState( void );\n\nunsigned char CAN2510InterruptStatus( void );\n\nvoid CAN2510InterruptEnable( unsigned char interruptFlags );\n\nunsigned char CAN2510ByteRead(  unsigned char addr );\n\nvoid CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n\nvoid CAN2510SequentialRead(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510SequentialWrite(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510BitModify(  unsigned char address,\n unsigned char mask,\n unsigned char data );\n\nvoid CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n\nvoid CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n\nvoid CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n\nvoid CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n\nsigned char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n unsigned int mask,\n unsigned int *filters );\n\nsigned char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n unsigned long mask,\n unsigned long *filters );\n\nsigned char CAN2510WriteStd(  unsigned int msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nsigned char CAN2510WriteXtd(  unsigned long msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadRTRStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes );\n\nvoid CAN2510LoadRTRXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes );\n\nvoid CAN2510SetBufferPriority(  unsigned char bufferNum,\n unsigned char bufferPriority );\n\nvoid CAN2510SendBuffer(  unsigned char bufferNumber );\n\nsigned char CAN2510WriteBuffer(  unsigned char bufferNum );\n\nunsigned char CAN2510DataReady(  unsigned char bufferNum );\n\nunsigned char CAN2510DataRead(  unsigned char bufferNum,\n unsigned long *msgId,\n unsigned char *numBytes,\n unsigned char *data );\n\n# 64 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\capture.h\"\nunion capstatus\n{\n\n# 73\nstruct\n{\n\n# 77\nunsigned Cap1OVF:1;\n\n# 82\nunsigned Cap2OVF:1;\n\n# 115\n};\n\nunsigned :8;\n\n};\n\nextern union capstatus CapStatus;\n\nunion CapResult\n{\nunsigned int lc;\nchar bc[2];\n};\n\n# 474\nvoid OpenCapture1 ( unsigned char config);\nunsigned int ReadCapture1 (void);\nvoid CloseCapture1 (void);\n\n# 484\nvoid OpenCapture2 ( unsigned char config);\nunsigned int ReadCapture2 (void);\nvoid CloseCapture2 (void);\n\n# 385 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\compare.h\"\nvoid OpenCompare1(unsigned char config,unsigned int period);\nvoid CloseCompare1(void);\n\n# 392\nvoid OpenCompare2(unsigned char config, unsigned int period);\nvoid CloseCompare2(void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\EEP.h\"\nvoid Busy_eep ( void );\nunsigned char Read_b_eep( unsigned int badd );\nvoid Write_b_eep( unsigned int badd, unsigned char bdata );\n\n# 2 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stddef.h\"\ntypedef int ptrdiff_t;\ntypedef unsigned size_t;\ntypedef unsigned short wchar_t;\n\n# 13\nextern int errno;\n\n# 65 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\GenericTypeDefs.h\"\ntypedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n\n\ntypedef enum _BIT { CLEAR = 0, SET } BIT;\n\n# 75\ntypedef signed int INT;\ntypedef signed char INT8;\ntypedef signed short int INT16;\ntypedef signed long int INT32;\n\n\n\n typedef signed long long INT64;\n\n\n\ntypedef unsigned int UINT;\ntypedef unsigned char UINT8;\ntypedef unsigned short int UINT16;\n\n# 93\ntypedef unsigned long int UINT32;\n\n\n typedef unsigned long long UINT64;\n\n\ntypedef union\n{\nUINT8 Val;\nstruct\n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n} bits;\n} UINT8_VAL, UINT8_BITS;\n\ntypedef union\n{\nUINT16 Val;\nUINT8 v[2] ;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\n} byte;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n} bits;\n} UINT16_VAL, UINT16_BITS;\n\n# 187\ntypedef union\n{\nUINT32 Val;\nUINT16 w[2] ;\nUINT8 v[4] ;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\n} word;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\nUINT8 UB;\nUINT8 MB;\n} byte;\nstruct \n{\nUINT16_VAL low;\nUINT16_VAL high;\n}wordUnion;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n} bits;\n} UINT32_VAL;\n\n\n\ntypedef union\n{\nUINT64 Val;\nUINT32 d[2] ;\nUINT16 w[4] ;\nUINT8 v[8] ;\nstruct \n{\nUINT32 LD;\nUINT32 HD;\n} dword;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\nUINT16 UW;\nUINT16 MW;\n} word;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n UINT8 b32:1;\n UINT8 b33:1;\n UINT8 b34:1;\n UINT8 b35:1;\n UINT8 b36:1;\n UINT8 b37:1;\n UINT8 b38:1;\n UINT8 b39:1;\n UINT8 b40:1;\n UINT8 b41:1;\n UINT8 b42:1;\n UINT8 b43:1;\n UINT8 b44:1;\n UINT8 b45:1;\n UINT8 b46:1;\n UINT8 b47:1;\n UINT8 b48:1;\n UINT8 b49:1;\n UINT8 b50:1;\n UINT8 b51:1;\n UINT8 b52:1;\n UINT8 b53:1;\n UINT8 b54:1;\n UINT8 b55:1;\n UINT8 b56:1;\n UINT8 b57:1;\n UINT8 b58:1;\n UINT8 b59:1;\n UINT8 b60:1;\n UINT8 b61:1;\n UINT8 b62:1;\n UINT8 b63:1;\n} bits;\n} UINT64_VAL;\n\n# 339\ntypedef void VOID;\n\ntypedef char CHAR8;\ntypedef unsigned char UCHAR8;\n\ntypedef unsigned char BYTE;\ntypedef unsigned short int WORD;\ntypedef unsigned long DWORD;\n\n\ntypedef unsigned long long QWORD;\ntypedef signed char CHAR;\ntypedef signed short int SHORT;\ntypedef signed long LONG;\n\n\ntypedef signed long long LONGLONG;\ntypedef union\n{\nBYTE Val;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n} bits;\n} BYTE_VAL, BYTE_BITS;\n\ntypedef union\n{\nWORD Val;\nBYTE v[2] ;\nstruct \n{\nBYTE LB;\nBYTE HB;\n} byte;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n} bits;\n} WORD_VAL, WORD_BITS;\n\ntypedef union\n{\nDWORD Val;\nWORD w[2] ;\nBYTE v[4] ;\nstruct \n{\nWORD LW;\nWORD HW;\n} word;\nstruct \n{\nBYTE LB;\nBYTE HB;\nBYTE UB;\nBYTE MB;\n} byte;\nstruct \n{\nWORD_VAL low;\nWORD_VAL high;\n}wordUnion;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n} bits;\n} DWORD_VAL;\n\n\ntypedef union\n{\nQWORD Val;\nDWORD d[2] ;\nWORD w[4] ;\nBYTE v[8] ;\nstruct \n{\nDWORD LD;\nDWORD HD;\n} dword;\nstruct \n{\nWORD LW;\nWORD HW;\nWORD UW;\nWORD MW;\n} word;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n BYTE b32:1;\n BYTE b33:1;\n BYTE b34:1;\n BYTE b35:1;\n BYTE b36:1;\n BYTE b37:1;\n BYTE b38:1;\n BYTE b39:1;\n BYTE b40:1;\n BYTE b41:1;\n BYTE b42:1;\n BYTE b43:1;\n BYTE b44:1;\n BYTE b45:1;\n BYTE b46:1;\n BYTE b47:1;\n BYTE b48:1;\n BYTE b49:1;\n BYTE b50:1;\n BYTE b51:1;\n BYTE b52:1;\n BYTE b53:1;\n BYTE b54:1;\n BYTE b55:1;\n BYTE b56:1;\n BYTE b57:1;\n BYTE b58:1;\n BYTE b59:1;\n BYTE b60:1;\n BYTE b61:1;\n BYTE b62:1;\n BYTE b63:1;\n} bits;\n} QWORD_VAL;\n\n# 113 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\flash.h\"\nextern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 120\nextern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n\nextern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n\nextern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 775 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\i2c.h\"\nvoid IdleI2C( void );\n\nvoid OpenI2C( unsigned char sync_mode, unsigned char slew );\n\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char putsI2C( unsigned char *wrptr );\n\nunsigned char ReadI2C( void );\n\nvoid CloseI2C( void );\n\n# 899\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char getsI2C( unsigned char *rdptr, unsigned char length );\n\n# 908\nsigned char EEAckPolling( unsigned char control );\n\nsigned char EEByteWrite( unsigned char control,\nunsigned char address,\nunsigned char data );\n\nsigned int EECurrentAddRead( unsigned char control );\n\nsigned char EEPageWrite( unsigned char control,\nunsigned char address,\nunsigned char *wrptr );\n\nsigned int EERandomRead( unsigned char control, unsigned char address );\n\nsigned char EESequentialRead( unsigned char control,\nunsigned char address,\nunsigned char *rdptr,\nunsigned char length );\n\n# 325 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\mwire.h\"\nvoid OpenMwire( unsigned char sync_mode );\n\nunsigned char ReadMwire( unsigned char high_byte,\nunsigned char low_byte );\n\n# 341\nsigned char WriteMwire( unsigned char data_out );\n\n# 354\nvoid getsMwire( unsigned char *rdptr, unsigned char length );\n\n# 126 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\portb.h\"\nvoid OpenPORTB( unsigned char config);\n\n# 176\nvoid OpenRB0INT( unsigned char config);\n\n# 194\nvoid OpenRB1INT( unsigned char config);\n\n# 211\nvoid OpenRB2INT( unsigned char config);\n\n# 85 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\pwm.h\"\nunion PWMDC\n{\nunsigned int lpwm;\nchar bpwm[2];\n};\n\n# 467\nvoid OpenPWM1 ( char period);\nvoid SetDCPWM1 ( unsigned int duty_cycle);\n\n# 477\nvoid ClosePWM1 (void);\n\n# 485\nvoid OpenPWM2 ( char period);\nvoid SetDCPWM2( unsigned int duty_cycle);\n\n# 492\nvoid ClosePWM2 (void);\n\n# 16 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\reset.h\"\nchar isMCLR(void);\nvoid StatusReset(void);\nchar isPOR(void);\nchar isWU(void);\n\n\nchar isBOR(void);\n\n\n\nchar isWDTTO(void);\nchar isWDTWU(void);\n\n\n\nchar isLVD(void);\n\n# 687 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\rtcc.h\"\nvoid Open_RTCC(void);\nvoid Close_RTCC(void);\nunsigned char update_RTCC(void);\n\n# 97 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_i2c.h\"\nvoid SWStopI2C ( void );\nvoid SWStartI2C ( void );\nvoid SWRestartI2C ( void );\nvoid SWStopI2C ( void );\n\nsigned char SWAckI2C( void );\nsigned char Clock_test( void );\nsigned int SWReadI2C( void );\nsigned char SWWriteI2C(  unsigned char data_out );\nsigned char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\nsigned char SWPutsI2C(  unsigned char *wrptr );\n\n# 84 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_spi.h\"\nvoid OpenSWSPI(void);\n\n\nchar WriteSWSPI( char output);\n\n\nvoid SetCSSWSPI(void);\n\n\nvoid ClearCSSWSPI(void);\n\n# 47 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_uart.h\"\nvoid OpenUART(void);\n\nunsigned char ReadUART(void);\n\nvoid WriteUART( unsigned char);\n\nvoid getsUART( char *, unsigned char);\n\nvoid putsUART( char *);\n\n# 79\nextern void DelayRXBitUART (void);\nextern void DelayRXHalfBitUART(void);\nextern void DelayTXBitUART (void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\timers.h\"\nunion Timers\n{\nunsigned int lt;\nchar bt[2];\n};\n\n# 118\nvoid OpenTimer0 ( unsigned char config);\nvoid CloseTimer0 (void);\nunsigned int ReadTimer0 (void);\nvoid WriteTimer0 ( unsigned int timer0);\n\n# 236\nvoid OpenTimer1 ( unsigned char config);\nvoid CloseTimer1 (void);\nunsigned int ReadTimer1 (void);\nvoid WriteTimer1 ( unsigned int timer1);\n\n# 325\nvoid OpenTimer2 ( unsigned char config);\nvoid CloseTimer2 (void);\n\n# 391\nvoid OpenTimer3 ( unsigned char config);\nvoid CloseTimer3 (void);\nunsigned int ReadTimer3 (void);\nvoid WriteTimer3 ( unsigned int timer3);\n\n# 1179\nvoid SetTmrCCPSrc( unsigned char );\n\n# 568 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\usart.h\"\nunion USART\n{\nunsigned char val;\nstruct\n{\nunsigned RX_NINE:1;\nunsigned TX_NINE:1;\nunsigned FRAME_ERROR:1;\nunsigned OVERRUN_ERROR:1;\nunsigned fill:4;\n};\n};\nextern union USART USART_Status;\nvoid OpenUSART ( unsigned char config, unsigned spbrg);\n\n# 596\nchar ReadUSART (void);\nvoid WriteUSART ( char data);\nvoid getsUSART ( char *buffer, unsigned char len);\nvoid putsUSART ( char *data);\nvoid putrsUSART ( const  char *data);\n\n# 654\nvoid baudUSART ( unsigned char baudconfig);\n\n# 87 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\xlcd.h\"\nvoid OpenXLCD( unsigned char);\n\n# 92\nvoid SetCGRamAddr( unsigned char);\n\n# 97\nvoid SetDDRamAddr( unsigned char);\n\n# 102\nunsigned char BusyXLCD(void);\n\n# 107\nunsigned char ReadAddrXLCD(void);\n\n# 112\nchar ReadDataXLCD(void);\n\n# 117\nvoid WriteCmdXLCD( unsigned char);\n\n# 122\nvoid WriteDataXLCD( char);\n\n# 132\nvoid putsXLCD( char *);\n\n# 137\nvoid putrsXLCD(const char *);\n\n\nextern void DelayFor18TCY(void);\nextern void DelayPORXLCD(void);\nextern void DelayXLCD(void);\n\n# 18 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18.h\"\n__attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *);\n\n\n# 143\n#pragma intrinsic(_delay)\nextern void _delay(unsigned long);\n#pragma intrinsic(_delaywdt)\nextern void _delaywdt(unsigned long);\n#pragma intrinsic(_delay3)\nextern void _delay3(unsigned char);\n\n# 13 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stdint.h\"\ntypedef signed char int8_t;\n\n# 20\ntypedef signed int int16_t;\n\n# 28\ntypedef signed short long int int24_t;\n\n# 36\ntypedef signed long int int32_t;\n\n# 43\ntypedef unsigned char uint8_t;\n\n# 49\ntypedef unsigned int uint16_t;\n\n# 56\ntypedef unsigned short long int uint24_t;\n\n# 63\ntypedef unsigned long int uint32_t;\n\n# 71\ntypedef signed char int_least8_t;\n\n# 78\ntypedef signed int int_least16_t;\n\n# 90\ntypedef signed short long int int_least24_t;\n\n# 98\ntypedef signed long int int_least32_t;\n\n# 105\ntypedef unsigned char uint_least8_t;\n\n# 111\ntypedef unsigned int uint_least16_t;\n\n# 121\ntypedef unsigned short long int uint_least24_t;\n\n# 128\ntypedef unsigned long int uint_least32_t;\n\n# 137\ntypedef signed char int_fast8_t;\n\n# 144\ntypedef signed int int_fast16_t;\n\n# 156\ntypedef signed short long int int_fast24_t;\n\n# 164\ntypedef signed long int int_fast32_t;\n\n# 171\ntypedef unsigned char uint_fast8_t;\n\n# 177\ntypedef unsigned int uint_fast16_t;\n\n# 187\ntypedef unsigned short long int uint_fast24_t;\n\n# 194\ntypedef unsigned long int uint_fast32_t;\n\n# 200\ntypedef int32_t intmax_t;\n\n\n\n\ntypedef uint32_t uintmax_t;\n\n\n\n\ntypedef int16_t intptr_t;\n\n\n\n\ntypedef uint16_t uintptr_t;\n\n# 50 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick.h\"\nvoid tick_init();\n\n# 62\nuint32_t tick_get();\n\n# 71\nvoid tick_update();\n\n# 21 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c\"\nstatic volatile unsigned long tickcnt = 0;\n\nstatic unsigned char tickbuffer[6];\n\nstatic void tick_read_internal();\n\nvoid tick_init()\n{\n\nTMR0L = 0;\nTMR0H = 0;\n\nINTCON2bits.TMR0IP = 0;\nINTCONbits.TMR0IF = 0;\nINTCONbits.TMR0IE = 1;\n\n\n\nT0CON = 0x87;\n}\n\nuint32_t tick_get()\n{\ntick_read_internal();\nreturn *((uint32_t *) & tickbuffer[0]);\n}\n\nvoid tick_update()\n{\nif (INTCONbits.TMR0IF) {\ntickcnt++;\nINTCONbits.TMR0IF = 0;\n}\n}\n\nstatic void tick_read_internal()\n{\ndo {\nINTCONbits.TMR0IE = 1;\nasm(\"nop\");\nINTCONbits.TMR0IE = 0;\n\ntickbuffer[0] = TMR0L;\ntickbuffer[1] = TMR0H;\n\n*((uint32_t*) & tickbuffer[2]) = tickcnt;\n} while (INTCONbits.TMR0IF);\nINTCONbits.TMR0IE = 1;\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/460035940/SPI-PIC16.p1",
    "content": "Version 3.2 HI-TECH Software Intermediate Code\n[c E4685 1 2 3 4 .. ]\n[n E4685 enSPIModules E_SPI_1 E_SPI_2 E_SPI_3 E_SPI_4  ]\n\"6282 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[v _SSPSTAT `Vuc ~T0 @X0 0 e@4039 ]\n\"6213\n[v _SSPCON1 `Vuc ~T0 @X0 0 e@4038 ]\n\"99 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI.h\n[v _spi_control `(uc ~T0 @X0 0 ef3`uc`ul`ul ]\n[s S399 :4 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S399 . SSPM CKP SSPEN SSPOV WCOL ]\n[s S400 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S400 . SSPM0 SSPM1 SSPM2 SSPM3 ]\n[u S398 `S399 1 `S400 1 ]\n[n S398 . . . ]\n\"6233 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[v _SSPCON1bits `VS398 ~T0 @X0 0 e@4038 ]\n[s S402 :2 `uc 1 :1 `uc 1 ]\n[n S402 . . R_NOT_W ]\n[s S403 :5 `uc 1 :1 `uc 1 ]\n[n S403 . . D_NOT_A ]\n[s S404 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S404 . BF UA R_nW S P D_nA CKE SMP ]\n[s S405 :2 `uc 1 :1 `uc 1 ]\n[n S405 . . R_NOT_W ]\n[s S406 :5 `uc 1 :1 `uc 1 ]\n[n S406 . . D_NOT_A ]\n[s S407 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]\n[n S407 . . R_W . D_A ]\n[s S408 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]\n[n S408 . . I2C_READ I2C_START I2C_STOP I2C_DAT ]\n[s S409 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]\n[n S409 . . nW . nA ]\n[s S410 :2 `uc 1 :1 `uc 1 ]\n[n S410 . . NOT_WRITE ]\n[s S411 :5 `uc 1 :1 `uc 1 ]\n[n S411 . . NOT_ADDRESS ]\n[s S412 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]\n[n S412 . . nWRITE . nADDRESS ]\n[s S413 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]\n[n S413 . . READ_WRITE . DATA_ADDRESS ]\n[s S414 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]\n[n S414 . . R . D ]\n[s S415 :5 `uc 1 :1 `uc 1 ]\n[n S415 . . DA ]\n[s S416 :2 `uc 1 :1 `uc 1 ]\n[n S416 . . RW ]\n[s S417 :3 `uc 1 :1 `uc 1 ]\n[n S417 . . START ]\n[s S418 :4 `uc 1 :1 `uc 1 ]\n[n S418 . . STOP ]\n[s S419 :2 `uc 1 :1 `uc 1 ]\n[n S419 . . NOT_W ]\n[s S420 :5 `uc 1 :1 `uc 1 ]\n[n S420 . . NOT_A ]\n[u S401 `S402 1 `S403 1 `S404 1 `S405 1 `S406 1 `S407 1 `S408 1 `S409 1 `S410 1 `S411 1 `S412 1 `S413 1 `S414 1 `S415 1 `S416 1 `S417 1 `S418 1 `S419 1 `S420 1 ]\n[n S401 . . . . . . . . . . . . . . . . . . . . ]\n\"6384\n[v _SSPSTATbits `VS401 ~T0 @X0 0 e@4039 ]\n\"6554\n[v _SSPBUF `Vuc ~T0 @X0 0 e@4041 ]\n\"24 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\n[v _spi_available `(uc ~T0 @X0 0 sf1`uc ]\n[; ;pic18f2550.h: 44: extern volatile unsigned short UFRM @ 0xF66;\n\"46 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[; ;pic18f2550.h: 46: asm(\"UFRM equ 0F66h\");\n[; <\" UFRM equ 0F66h ;# \">\n[; ;pic18f2550.h: 50: extern volatile unsigned char UFRML @ 0xF66;\n\"52\n[; ;pic18f2550.h: 52: asm(\"UFRML equ 0F66h\");\n[; <\" UFRML equ 0F66h ;# \">\n[; ;pic18f2550.h: 55: typedef union {\n[; ;pic18f2550.h: 56: struct {\n[; ;pic18f2550.h: 57: unsigned FRM :8;\n[; ;pic18f2550.h: 58: };\n[; ;pic18f2550.h: 59: struct {\n[; ;pic18f2550.h: 60: unsigned FRM0 :1;\n[; ;pic18f2550.h: 61: unsigned FRM1 :1;\n[; ;pic18f2550.h: 62: unsigned FRM2 :1;\n[; ;pic18f2550.h: 63: unsigned FRM3 :1;\n[; ;pic18f2550.h: 64: unsigned FRM4 :1;\n[; ;pic18f2550.h: 65: unsigned FRM5 :1;\n[; ;pic18f2550.h: 66: unsigned FRM6 :1;\n[; ;pic18f2550.h: 67: unsigned FRM7 :1;\n[; ;pic18f2550.h: 68: };\n[; ;pic18f2550.h: 69: struct {\n[; ;pic18f2550.h: 70: unsigned FRML :8;\n[; ;pic18f2550.h: 71: };\n[; ;pic18f2550.h: 72: } UFRMLbits_t;\n[; ;pic18f2550.h: 73: extern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n[; ;pic18f2550.h: 127: extern volatile unsigned char UFRMH @ 0xF67;\n\"129\n[; ;pic18f2550.h: 129: asm(\"UFRMH equ 0F67h\");\n[; <\" UFRMH equ 0F67h ;# \">\n[; ;pic18f2550.h: 132: typedef union {\n[; ;pic18f2550.h: 133: struct {\n[; ;pic18f2550.h: 134: unsigned FRM :3;\n[; ;pic18f2550.h: 135: };\n[; ;pic18f2550.h: 136: struct {\n[; ;pic18f2550.h: 137: unsigned FRM8 :1;\n[; ;pic18f2550.h: 138: unsigned FRM9 :1;\n[; ;pic18f2550.h: 139: unsigned FRM10 :1;\n[; ;pic18f2550.h: 140: };\n[; ;pic18f2550.h: 141: } UFRMHbits_t;\n[; ;pic18f2550.h: 142: extern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n[; ;pic18f2550.h: 166: extern volatile unsigned char UIR @ 0xF68;\n\"168\n[; ;pic18f2550.h: 168: asm(\"UIR equ 0F68h\");\n[; <\" UIR equ 0F68h ;# \">\n[; ;pic18f2550.h: 171: typedef union {\n[; ;pic18f2550.h: 172: struct {\n[; ;pic18f2550.h: 173: unsigned URSTIF :1;\n[; ;pic18f2550.h: 174: unsigned UERRIF :1;\n[; ;pic18f2550.h: 175: unsigned ACTVIF :1;\n[; ;pic18f2550.h: 176: unsigned TRNIF :1;\n[; ;pic18f2550.h: 177: unsigned IDLEIF :1;\n[; ;pic18f2550.h: 178: unsigned STALLIF :1;\n[; ;pic18f2550.h: 179: unsigned SOFIF :1;\n[; ;pic18f2550.h: 180: };\n[; ;pic18f2550.h: 181: } UIRbits_t;\n[; ;pic18f2550.h: 182: extern volatile UIRbits_t UIRbits @ 0xF68;\n[; ;pic18f2550.h: 221: extern volatile unsigned char UIE @ 0xF69;\n\"223\n[; ;pic18f2550.h: 223: asm(\"UIE equ 0F69h\");\n[; <\" UIE equ 0F69h ;# \">\n[; ;pic18f2550.h: 226: typedef union {\n[; ;pic18f2550.h: 227: struct {\n[; ;pic18f2550.h: 228: unsigned URSTIE :1;\n[; ;pic18f2550.h: 229: unsigned UERRIE :1;\n[; ;pic18f2550.h: 230: unsigned ACTVIE :1;\n[; ;pic18f2550.h: 231: unsigned TRNIE :1;\n[; ;pic18f2550.h: 232: unsigned IDLEIE :1;\n[; ;pic18f2550.h: 233: unsigned STALLIE :1;\n[; ;pic18f2550.h: 234: unsigned SOFIE :1;\n[; ;pic18f2550.h: 235: };\n[; ;pic18f2550.h: 236: } UIEbits_t;\n[; ;pic18f2550.h: 237: extern volatile UIEbits_t UIEbits @ 0xF69;\n[; ;pic18f2550.h: 276: extern volatile unsigned char UEIR @ 0xF6A;\n\"278\n[; ;pic18f2550.h: 278: asm(\"UEIR equ 0F6Ah\");\n[; <\" UEIR equ 0F6Ah ;# \">\n[; ;pic18f2550.h: 281: typedef union {\n[; ;pic18f2550.h: 282: struct {\n[; ;pic18f2550.h: 283: unsigned PIDEF :1;\n[; ;pic18f2550.h: 284: unsigned CRC5EF :1;\n[; ;pic18f2550.h: 285: unsigned CRC16EF :1;\n[; ;pic18f2550.h: 286: unsigned DFN8EF :1;\n[; ;pic18f2550.h: 287: unsigned BTOEF :1;\n[; ;pic18f2550.h: 288: unsigned :2;\n[; ;pic18f2550.h: 289: unsigned BTSEF :1;\n[; ;pic18f2550.h: 290: };\n[; ;pic18f2550.h: 291: } UEIRbits_t;\n[; ;pic18f2550.h: 292: extern volatile UEIRbits_t UEIRbits @ 0xF6A;\n[; ;pic18f2550.h: 326: extern volatile unsigned char UEIE @ 0xF6B;\n\"328\n[; ;pic18f2550.h: 328: asm(\"UEIE equ 0F6Bh\");\n[; <\" UEIE equ 0F6Bh ;# \">\n[; ;pic18f2550.h: 331: typedef union {\n[; ;pic18f2550.h: 332: struct {\n[; ;pic18f2550.h: 333: unsigned PIDEE :1;\n[; ;pic18f2550.h: 334: unsigned CRC5EE :1;\n[; ;pic18f2550.h: 335: unsigned CRC16EE :1;\n[; ;pic18f2550.h: 336: unsigned DFN8EE :1;\n[; ;pic18f2550.h: 337: unsigned BTOEE :1;\n[; ;pic18f2550.h: 338: unsigned :2;\n[; ;pic18f2550.h: 339: unsigned BTSEE :1;\n[; ;pic18f2550.h: 340: };\n[; ;pic18f2550.h: 341: } UEIEbits_t;\n[; ;pic18f2550.h: 342: extern volatile UEIEbits_t UEIEbits @ 0xF6B;\n[; ;pic18f2550.h: 376: extern volatile unsigned char USTAT @ 0xF6C;\n\"378\n[; ;pic18f2550.h: 378: asm(\"USTAT equ 0F6Ch\");\n[; <\" USTAT equ 0F6Ch ;# \">\n[; ;pic18f2550.h: 381: typedef union {\n[; ;pic18f2550.h: 382: struct {\n[; ;pic18f2550.h: 383: unsigned :1;\n[; ;pic18f2550.h: 384: unsigned PPBI :1;\n[; ;pic18f2550.h: 385: unsigned DIR :1;\n[; ;pic18f2550.h: 386: unsigned ENDP :4;\n[; ;pic18f2550.h: 387: };\n[; ;pic18f2550.h: 388: struct {\n[; ;pic18f2550.h: 389: unsigned :3;\n[; ;pic18f2550.h: 390: unsigned ENDP0 :1;\n[; ;pic18f2550.h: 391: unsigned ENDP1 :1;\n[; ;pic18f2550.h: 392: unsigned ENDP2 :1;\n[; ;pic18f2550.h: 393: unsigned ENDP3 :1;\n[; ;pic18f2550.h: 394: };\n[; ;pic18f2550.h: 395: } USTATbits_t;\n[; ;pic18f2550.h: 396: extern volatile USTATbits_t USTATbits @ 0xF6C;\n[; ;pic18f2550.h: 435: extern volatile unsigned char UCON @ 0xF6D;\n\"437\n[; ;pic18f2550.h: 437: asm(\"UCON equ 0F6Dh\");\n[; <\" UCON equ 0F6Dh ;# \">\n[; ;pic18f2550.h: 440: typedef union {\n[; ;pic18f2550.h: 441: struct {\n[; ;pic18f2550.h: 442: unsigned :1;\n[; ;pic18f2550.h: 443: unsigned SUSPND :1;\n[; ;pic18f2550.h: 444: unsigned RESUME :1;\n[; ;pic18f2550.h: 445: unsigned USBEN :1;\n[; ;pic18f2550.h: 446: unsigned PKTDIS :1;\n[; ;pic18f2550.h: 447: unsigned SE0 :1;\n[; ;pic18f2550.h: 448: unsigned PPBRST :1;\n[; ;pic18f2550.h: 449: };\n[; ;pic18f2550.h: 450: } UCONbits_t;\n[; ;pic18f2550.h: 451: extern volatile UCONbits_t UCONbits @ 0xF6D;\n[; ;pic18f2550.h: 485: extern volatile unsigned char UADDR @ 0xF6E;\n\"487\n[; ;pic18f2550.h: 487: asm(\"UADDR equ 0F6Eh\");\n[; <\" UADDR equ 0F6Eh ;# \">\n[; ;pic18f2550.h: 490: typedef union {\n[; ;pic18f2550.h: 491: struct {\n[; ;pic18f2550.h: 492: unsigned ADDR :7;\n[; ;pic18f2550.h: 493: };\n[; ;pic18f2550.h: 494: struct {\n[; ;pic18f2550.h: 495: unsigned ADDR0 :1;\n[; ;pic18f2550.h: 496: unsigned ADDR1 :1;\n[; ;pic18f2550.h: 497: unsigned ADDR2 :1;\n[; ;pic18f2550.h: 498: unsigned ADDR3 :1;\n[; ;pic18f2550.h: 499: unsigned ADDR4 :1;\n[; ;pic18f2550.h: 500: unsigned ADDR5 :1;\n[; ;pic18f2550.h: 501: unsigned ADDR6 :1;\n[; ;pic18f2550.h: 502: };\n[; ;pic18f2550.h: 503: } UADDRbits_t;\n[; ;pic18f2550.h: 504: extern volatile UADDRbits_t UADDRbits @ 0xF6E;\n[; ;pic18f2550.h: 548: extern volatile unsigned char UCFG @ 0xF6F;\n\"550\n[; ;pic18f2550.h: 550: asm(\"UCFG equ 0F6Fh\");\n[; <\" UCFG equ 0F6Fh ;# \">\n[; ;pic18f2550.h: 553: typedef union {\n[; ;pic18f2550.h: 554: struct {\n[; ;pic18f2550.h: 555: unsigned PPB :2;\n[; ;pic18f2550.h: 556: unsigned FSEN :1;\n[; ;pic18f2550.h: 557: unsigned UTRDIS :1;\n[; ;pic18f2550.h: 558: unsigned UPUEN :1;\n[; ;pic18f2550.h: 559: unsigned :1;\n[; ;pic18f2550.h: 560: unsigned UOEMON :1;\n[; ;pic18f2550.h: 561: unsigned UTEYE :1;\n[; ;pic18f2550.h: 562: };\n[; ;pic18f2550.h: 563: struct {\n[; ;pic18f2550.h: 564: unsigned PPB0 :1;\n[; ;pic18f2550.h: 565: unsigned PPB1 :1;\n[; ;pic18f2550.h: 566: };\n[; ;pic18f2550.h: 567: struct {\n[; ;pic18f2550.h: 568: unsigned UPP0 :1;\n[; ;pic18f2550.h: 569: };\n[; ;pic18f2550.h: 570: struct {\n[; ;pic18f2550.h: 571: unsigned :1;\n[; ;pic18f2550.h: 572: unsigned UPP1 :1;\n[; ;pic18f2550.h: 573: };\n[; ;pic18f2550.h: 574: } UCFGbits_t;\n[; ;pic18f2550.h: 575: extern volatile UCFGbits_t UCFGbits @ 0xF6F;\n[; ;pic18f2550.h: 629: extern volatile unsigned char UEP0 @ 0xF70;\n\"631\n[; ;pic18f2550.h: 631: asm(\"UEP0 equ 0F70h\");\n[; <\" UEP0 equ 0F70h ;# \">\n[; ;pic18f2550.h: 634: typedef union {\n[; ;pic18f2550.h: 635: struct {\n[; ;pic18f2550.h: 636: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 637: unsigned EPINEN :1;\n[; ;pic18f2550.h: 638: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 639: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 640: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 641: };\n[; ;pic18f2550.h: 642: struct {\n[; ;pic18f2550.h: 643: unsigned :3;\n[; ;pic18f2550.h: 644: unsigned EP0CONDIS :1;\n[; ;pic18f2550.h: 645: };\n[; ;pic18f2550.h: 646: struct {\n[; ;pic18f2550.h: 647: unsigned :4;\n[; ;pic18f2550.h: 648: unsigned EP0HSHK :1;\n[; ;pic18f2550.h: 649: };\n[; ;pic18f2550.h: 650: struct {\n[; ;pic18f2550.h: 651: unsigned :1;\n[; ;pic18f2550.h: 652: unsigned EP0INEN :1;\n[; ;pic18f2550.h: 653: };\n[; ;pic18f2550.h: 654: struct {\n[; ;pic18f2550.h: 655: unsigned :2;\n[; ;pic18f2550.h: 656: unsigned EP0OUTEN :1;\n[; ;pic18f2550.h: 657: };\n[; ;pic18f2550.h: 658: struct {\n[; ;pic18f2550.h: 659: unsigned EP0STALL :1;\n[; ;pic18f2550.h: 660: };\n[; ;pic18f2550.h: 661: struct {\n[; ;pic18f2550.h: 662: unsigned :3;\n[; ;pic18f2550.h: 663: unsigned EPCONDIS0 :1;\n[; ;pic18f2550.h: 664: };\n[; ;pic18f2550.h: 665: struct {\n[; ;pic18f2550.h: 666: unsigned :4;\n[; ;pic18f2550.h: 667: unsigned EPHSHK0 :1;\n[; ;pic18f2550.h: 668: };\n[; ;pic18f2550.h: 669: struct {\n[; ;pic18f2550.h: 670: unsigned :1;\n[; ;pic18f2550.h: 671: unsigned EPINEN0 :1;\n[; ;pic18f2550.h: 672: };\n[; ;pic18f2550.h: 673: struct {\n[; ;pic18f2550.h: 674: unsigned :2;\n[; ;pic18f2550.h: 675: unsigned EPOUTEN0 :1;\n[; ;pic18f2550.h: 676: };\n[; ;pic18f2550.h: 677: struct {\n[; ;pic18f2550.h: 678: unsigned EPSTALL0 :1;\n[; ;pic18f2550.h: 679: };\n[; ;pic18f2550.h: 680: } UEP0bits_t;\n[; ;pic18f2550.h: 681: extern volatile UEP0bits_t UEP0bits @ 0xF70;\n[; ;pic18f2550.h: 760: extern volatile unsigned char UEP1 @ 0xF71;\n\"762\n[; ;pic18f2550.h: 762: asm(\"UEP1 equ 0F71h\");\n[; <\" UEP1 equ 0F71h ;# \">\n[; ;pic18f2550.h: 765: typedef union {\n[; ;pic18f2550.h: 766: struct {\n[; ;pic18f2550.h: 767: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 768: unsigned EPINEN :1;\n[; ;pic18f2550.h: 769: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 770: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 771: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 772: };\n[; ;pic18f2550.h: 773: struct {\n[; ;pic18f2550.h: 774: unsigned :3;\n[; ;pic18f2550.h: 775: unsigned EP1CONDIS :1;\n[; ;pic18f2550.h: 776: };\n[; ;pic18f2550.h: 777: struct {\n[; ;pic18f2550.h: 778: unsigned :4;\n[; ;pic18f2550.h: 779: unsigned EP1HSHK :1;\n[; ;pic18f2550.h: 780: };\n[; ;pic18f2550.h: 781: struct {\n[; ;pic18f2550.h: 782: unsigned :1;\n[; ;pic18f2550.h: 783: unsigned EP1INEN :1;\n[; ;pic18f2550.h: 784: };\n[; ;pic18f2550.h: 785: struct {\n[; ;pic18f2550.h: 786: unsigned :2;\n[; ;pic18f2550.h: 787: unsigned EP1OUTEN :1;\n[; ;pic18f2550.h: 788: };\n[; ;pic18f2550.h: 789: struct {\n[; ;pic18f2550.h: 790: unsigned EP1STALL :1;\n[; ;pic18f2550.h: 791: };\n[; ;pic18f2550.h: 792: struct {\n[; ;pic18f2550.h: 793: unsigned :3;\n[; ;pic18f2550.h: 794: unsigned EPCONDIS1 :1;\n[; ;pic18f2550.h: 795: };\n[; ;pic18f2550.h: 796: struct {\n[; ;pic18f2550.h: 797: unsigned :4;\n[; ;pic18f2550.h: 798: unsigned EPHSHK1 :1;\n[; ;pic18f2550.h: 799: };\n[; ;pic18f2550.h: 800: struct {\n[; ;pic18f2550.h: 801: unsigned :1;\n[; ;pic18f2550.h: 802: unsigned EPINEN1 :1;\n[; ;pic18f2550.h: 803: };\n[; ;pic18f2550.h: 804: struct {\n[; ;pic18f2550.h: 805: unsigned :2;\n[; ;pic18f2550.h: 806: unsigned EPOUTEN1 :1;\n[; ;pic18f2550.h: 807: };\n[; ;pic18f2550.h: 808: struct {\n[; ;pic18f2550.h: 809: unsigned EPSTALL1 :1;\n[; ;pic18f2550.h: 810: };\n[; ;pic18f2550.h: 811: } UEP1bits_t;\n[; ;pic18f2550.h: 812: extern volatile UEP1bits_t UEP1bits @ 0xF71;\n[; ;pic18f2550.h: 891: extern volatile unsigned char UEP2 @ 0xF72;\n\"893\n[; ;pic18f2550.h: 893: asm(\"UEP2 equ 0F72h\");\n[; <\" UEP2 equ 0F72h ;# \">\n[; ;pic18f2550.h: 896: typedef union {\n[; ;pic18f2550.h: 897: struct {\n[; ;pic18f2550.h: 898: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 899: unsigned EPINEN :1;\n[; ;pic18f2550.h: 900: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 901: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 902: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 903: };\n[; ;pic18f2550.h: 904: struct {\n[; ;pic18f2550.h: 905: unsigned :3;\n[; ;pic18f2550.h: 906: unsigned EP2CONDIS :1;\n[; ;pic18f2550.h: 907: };\n[; ;pic18f2550.h: 908: struct {\n[; ;pic18f2550.h: 909: unsigned :4;\n[; ;pic18f2550.h: 910: unsigned EP2HSHK :1;\n[; ;pic18f2550.h: 911: };\n[; ;pic18f2550.h: 912: struct {\n[; ;pic18f2550.h: 913: unsigned :1;\n[; ;pic18f2550.h: 914: unsigned EP2INEN :1;\n[; ;pic18f2550.h: 915: };\n[; ;pic18f2550.h: 916: struct {\n[; ;pic18f2550.h: 917: unsigned :2;\n[; ;pic18f2550.h: 918: unsigned EP2OUTEN :1;\n[; ;pic18f2550.h: 919: };\n[; ;pic18f2550.h: 920: struct {\n[; ;pic18f2550.h: 921: unsigned EP2STALL :1;\n[; ;pic18f2550.h: 922: };\n[; ;pic18f2550.h: 923: struct {\n[; ;pic18f2550.h: 924: unsigned :3;\n[; ;pic18f2550.h: 925: unsigned EPCONDIS2 :1;\n[; ;pic18f2550.h: 926: };\n[; ;pic18f2550.h: 927: struct {\n[; ;pic18f2550.h: 928: unsigned :4;\n[; ;pic18f2550.h: 929: unsigned EPHSHK2 :1;\n[; ;pic18f2550.h: 930: };\n[; ;pic18f2550.h: 931: struct {\n[; ;pic18f2550.h: 932: unsigned :1;\n[; ;pic18f2550.h: 933: unsigned EPINEN2 :1;\n[; ;pic18f2550.h: 934: };\n[; ;pic18f2550.h: 935: struct {\n[; ;pic18f2550.h: 936: unsigned :2;\n[; ;pic18f2550.h: 937: unsigned EPOUTEN2 :1;\n[; ;pic18f2550.h: 938: };\n[; ;pic18f2550.h: 939: struct {\n[; ;pic18f2550.h: 940: unsigned EPSTALL2 :1;\n[; ;pic18f2550.h: 941: };\n[; ;pic18f2550.h: 942: } UEP2bits_t;\n[; ;pic18f2550.h: 943: extern volatile UEP2bits_t UEP2bits @ 0xF72;\n[; ;pic18f2550.h: 1022: extern volatile unsigned char UEP3 @ 0xF73;\n\"1024\n[; ;pic18f2550.h: 1024: asm(\"UEP3 equ 0F73h\");\n[; <\" UEP3 equ 0F73h ;# \">\n[; ;pic18f2550.h: 1027: typedef union {\n[; ;pic18f2550.h: 1028: struct {\n[; ;pic18f2550.h: 1029: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1030: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1031: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1032: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1033: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1034: };\n[; ;pic18f2550.h: 1035: struct {\n[; ;pic18f2550.h: 1036: unsigned :3;\n[; ;pic18f2550.h: 1037: unsigned EP3CONDIS :1;\n[; ;pic18f2550.h: 1038: };\n[; ;pic18f2550.h: 1039: struct {\n[; ;pic18f2550.h: 1040: unsigned :4;\n[; ;pic18f2550.h: 1041: unsigned EP3HSHK :1;\n[; ;pic18f2550.h: 1042: };\n[; ;pic18f2550.h: 1043: struct {\n[; ;pic18f2550.h: 1044: unsigned :1;\n[; ;pic18f2550.h: 1045: unsigned EP3INEN :1;\n[; ;pic18f2550.h: 1046: };\n[; ;pic18f2550.h: 1047: struct {\n[; ;pic18f2550.h: 1048: unsigned :2;\n[; ;pic18f2550.h: 1049: unsigned EP3OUTEN :1;\n[; ;pic18f2550.h: 1050: };\n[; ;pic18f2550.h: 1051: struct {\n[; ;pic18f2550.h: 1052: unsigned EP3STALL :1;\n[; ;pic18f2550.h: 1053: };\n[; ;pic18f2550.h: 1054: struct {\n[; ;pic18f2550.h: 1055: unsigned :3;\n[; ;pic18f2550.h: 1056: unsigned EPCONDIS3 :1;\n[; ;pic18f2550.h: 1057: };\n[; ;pic18f2550.h: 1058: struct {\n[; ;pic18f2550.h: 1059: unsigned :4;\n[; ;pic18f2550.h: 1060: unsigned EPHSHK3 :1;\n[; ;pic18f2550.h: 1061: };\n[; ;pic18f2550.h: 1062: struct {\n[; ;pic18f2550.h: 1063: unsigned :1;\n[; ;pic18f2550.h: 1064: unsigned EPINEN3 :1;\n[; ;pic18f2550.h: 1065: };\n[; ;pic18f2550.h: 1066: struct {\n[; ;pic18f2550.h: 1067: unsigned :2;\n[; ;pic18f2550.h: 1068: unsigned EPOUTEN3 :1;\n[; ;pic18f2550.h: 1069: };\n[; ;pic18f2550.h: 1070: struct {\n[; ;pic18f2550.h: 1071: unsigned EPSTALL3 :1;\n[; ;pic18f2550.h: 1072: };\n[; ;pic18f2550.h: 1073: } UEP3bits_t;\n[; ;pic18f2550.h: 1074: extern volatile UEP3bits_t UEP3bits @ 0xF73;\n[; ;pic18f2550.h: 1153: extern volatile unsigned char UEP4 @ 0xF74;\n\"1155\n[; ;pic18f2550.h: 1155: asm(\"UEP4 equ 0F74h\");\n[; <\" UEP4 equ 0F74h ;# \">\n[; ;pic18f2550.h: 1158: typedef union {\n[; ;pic18f2550.h: 1159: struct {\n[; ;pic18f2550.h: 1160: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1161: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1162: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1163: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1164: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1165: };\n[; ;pic18f2550.h: 1166: struct {\n[; ;pic18f2550.h: 1167: unsigned :3;\n[; ;pic18f2550.h: 1168: unsigned EP4CONDIS :1;\n[; ;pic18f2550.h: 1169: };\n[; ;pic18f2550.h: 1170: struct {\n[; ;pic18f2550.h: 1171: unsigned :4;\n[; ;pic18f2550.h: 1172: unsigned EP4HSHK :1;\n[; ;pic18f2550.h: 1173: };\n[; ;pic18f2550.h: 1174: struct {\n[; ;pic18f2550.h: 1175: unsigned :1;\n[; ;pic18f2550.h: 1176: unsigned EP4INEN :1;\n[; ;pic18f2550.h: 1177: };\n[; ;pic18f2550.h: 1178: struct {\n[; ;pic18f2550.h: 1179: unsigned :2;\n[; ;pic18f2550.h: 1180: unsigned EP4OUTEN :1;\n[; ;pic18f2550.h: 1181: };\n[; ;pic18f2550.h: 1182: struct {\n[; ;pic18f2550.h: 1183: unsigned EP4STALL :1;\n[; ;pic18f2550.h: 1184: };\n[; ;pic18f2550.h: 1185: struct {\n[; ;pic18f2550.h: 1186: unsigned :3;\n[; ;pic18f2550.h: 1187: unsigned EPCONDIS4 :1;\n[; ;pic18f2550.h: 1188: };\n[; ;pic18f2550.h: 1189: struct {\n[; ;pic18f2550.h: 1190: unsigned :4;\n[; ;pic18f2550.h: 1191: unsigned EPHSHK4 :1;\n[; ;pic18f2550.h: 1192: };\n[; ;pic18f2550.h: 1193: struct {\n[; ;pic18f2550.h: 1194: unsigned :1;\n[; ;pic18f2550.h: 1195: unsigned EPINEN4 :1;\n[; ;pic18f2550.h: 1196: };\n[; ;pic18f2550.h: 1197: struct {\n[; ;pic18f2550.h: 1198: unsigned :2;\n[; ;pic18f2550.h: 1199: unsigned EPOUTEN4 :1;\n[; ;pic18f2550.h: 1200: };\n[; ;pic18f2550.h: 1201: struct {\n[; ;pic18f2550.h: 1202: unsigned EPSTALL4 :1;\n[; ;pic18f2550.h: 1203: };\n[; ;pic18f2550.h: 1204: } UEP4bits_t;\n[; ;pic18f2550.h: 1205: extern volatile UEP4bits_t UEP4bits @ 0xF74;\n[; ;pic18f2550.h: 1284: extern volatile unsigned char UEP5 @ 0xF75;\n\"1286\n[; ;pic18f2550.h: 1286: asm(\"UEP5 equ 0F75h\");\n[; <\" UEP5 equ 0F75h ;# \">\n[; ;pic18f2550.h: 1289: typedef union {\n[; ;pic18f2550.h: 1290: struct {\n[; ;pic18f2550.h: 1291: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1292: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1293: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1294: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1295: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1296: };\n[; ;pic18f2550.h: 1297: struct {\n[; ;pic18f2550.h: 1298: unsigned :3;\n[; ;pic18f2550.h: 1299: unsigned EP5CONDIS :1;\n[; ;pic18f2550.h: 1300: };\n[; ;pic18f2550.h: 1301: struct {\n[; ;pic18f2550.h: 1302: unsigned :4;\n[; ;pic18f2550.h: 1303: unsigned EP5HSHK :1;\n[; ;pic18f2550.h: 1304: };\n[; ;pic18f2550.h: 1305: struct {\n[; ;pic18f2550.h: 1306: unsigned :1;\n[; ;pic18f2550.h: 1307: unsigned EP5INEN :1;\n[; ;pic18f2550.h: 1308: };\n[; ;pic18f2550.h: 1309: struct {\n[; ;pic18f2550.h: 1310: unsigned :2;\n[; ;pic18f2550.h: 1311: unsigned EP5OUTEN :1;\n[; ;pic18f2550.h: 1312: };\n[; ;pic18f2550.h: 1313: struct {\n[; ;pic18f2550.h: 1314: unsigned EP5STALL :1;\n[; ;pic18f2550.h: 1315: };\n[; ;pic18f2550.h: 1316: struct {\n[; ;pic18f2550.h: 1317: unsigned :3;\n[; ;pic18f2550.h: 1318: unsigned EPCONDIS5 :1;\n[; ;pic18f2550.h: 1319: };\n[; ;pic18f2550.h: 1320: struct {\n[; ;pic18f2550.h: 1321: unsigned :4;\n[; ;pic18f2550.h: 1322: unsigned EPHSHK5 :1;\n[; ;pic18f2550.h: 1323: };\n[; ;pic18f2550.h: 1324: struct {\n[; ;pic18f2550.h: 1325: unsigned :1;\n[; ;pic18f2550.h: 1326: unsigned EPINEN5 :1;\n[; ;pic18f2550.h: 1327: };\n[; ;pic18f2550.h: 1328: struct {\n[; ;pic18f2550.h: 1329: unsigned :2;\n[; ;pic18f2550.h: 1330: unsigned EPOUTEN5 :1;\n[; ;pic18f2550.h: 1331: };\n[; ;pic18f2550.h: 1332: struct {\n[; ;pic18f2550.h: 1333: unsigned EPSTALL5 :1;\n[; ;pic18f2550.h: 1334: };\n[; ;pic18f2550.h: 1335: } UEP5bits_t;\n[; ;pic18f2550.h: 1336: extern volatile UEP5bits_t UEP5bits @ 0xF75;\n[; ;pic18f2550.h: 1415: extern volatile unsigned char UEP6 @ 0xF76;\n\"1417\n[; ;pic18f2550.h: 1417: asm(\"UEP6 equ 0F76h\");\n[; <\" UEP6 equ 0F76h ;# \">\n[; ;pic18f2550.h: 1420: typedef union {\n[; ;pic18f2550.h: 1421: struct {\n[; ;pic18f2550.h: 1422: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1423: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1424: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1425: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1426: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1427: };\n[; ;pic18f2550.h: 1428: struct {\n[; ;pic18f2550.h: 1429: unsigned :3;\n[; ;pic18f2550.h: 1430: unsigned EP6CONDIS :1;\n[; ;pic18f2550.h: 1431: };\n[; ;pic18f2550.h: 1432: struct {\n[; ;pic18f2550.h: 1433: unsigned :4;\n[; ;pic18f2550.h: 1434: unsigned EP6HSHK :1;\n[; ;pic18f2550.h: 1435: };\n[; ;pic18f2550.h: 1436: struct {\n[; ;pic18f2550.h: 1437: unsigned :1;\n[; ;pic18f2550.h: 1438: unsigned EP6INEN :1;\n[; ;pic18f2550.h: 1439: };\n[; ;pic18f2550.h: 1440: struct {\n[; ;pic18f2550.h: 1441: unsigned :2;\n[; ;pic18f2550.h: 1442: unsigned EP6OUTEN :1;\n[; ;pic18f2550.h: 1443: };\n[; ;pic18f2550.h: 1444: struct {\n[; ;pic18f2550.h: 1445: unsigned EP6STALL :1;\n[; ;pic18f2550.h: 1446: };\n[; ;pic18f2550.h: 1447: struct {\n[; ;pic18f2550.h: 1448: unsigned :3;\n[; ;pic18f2550.h: 1449: unsigned EPCONDIS6 :1;\n[; ;pic18f2550.h: 1450: };\n[; ;pic18f2550.h: 1451: struct {\n[; ;pic18f2550.h: 1452: unsigned :4;\n[; ;pic18f2550.h: 1453: unsigned EPHSHK6 :1;\n[; ;pic18f2550.h: 1454: };\n[; ;pic18f2550.h: 1455: struct {\n[; ;pic18f2550.h: 1456: unsigned :1;\n[; ;pic18f2550.h: 1457: unsigned EPINEN6 :1;\n[; ;pic18f2550.h: 1458: };\n[; ;pic18f2550.h: 1459: struct {\n[; ;pic18f2550.h: 1460: unsigned :2;\n[; ;pic18f2550.h: 1461: unsigned EPOUTEN6 :1;\n[; ;pic18f2550.h: 1462: };\n[; ;pic18f2550.h: 1463: struct {\n[; ;pic18f2550.h: 1464: unsigned EPSTALL6 :1;\n[; ;pic18f2550.h: 1465: };\n[; ;pic18f2550.h: 1466: } UEP6bits_t;\n[; ;pic18f2550.h: 1467: extern volatile UEP6bits_t UEP6bits @ 0xF76;\n[; ;pic18f2550.h: 1546: extern volatile unsigned char UEP7 @ 0xF77;\n\"1548\n[; ;pic18f2550.h: 1548: asm(\"UEP7 equ 0F77h\");\n[; <\" UEP7 equ 0F77h ;# \">\n[; ;pic18f2550.h: 1551: typedef union {\n[; ;pic18f2550.h: 1552: struct {\n[; ;pic18f2550.h: 1553: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1554: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1555: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1556: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1557: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1558: };\n[; ;pic18f2550.h: 1559: struct {\n[; ;pic18f2550.h: 1560: unsigned :3;\n[; ;pic18f2550.h: 1561: unsigned EP7CONDIS :1;\n[; ;pic18f2550.h: 1562: };\n[; ;pic18f2550.h: 1563: struct {\n[; ;pic18f2550.h: 1564: unsigned :4;\n[; ;pic18f2550.h: 1565: unsigned EP7HSHK :1;\n[; ;pic18f2550.h: 1566: };\n[; ;pic18f2550.h: 1567: struct {\n[; ;pic18f2550.h: 1568: unsigned :1;\n[; ;pic18f2550.h: 1569: unsigned EP7INEN :1;\n[; ;pic18f2550.h: 1570: };\n[; ;pic18f2550.h: 1571: struct {\n[; ;pic18f2550.h: 1572: unsigned :2;\n[; ;pic18f2550.h: 1573: unsigned EP7OUTEN :1;\n[; ;pic18f2550.h: 1574: };\n[; ;pic18f2550.h: 1575: struct {\n[; ;pic18f2550.h: 1576: unsigned EP7STALL :1;\n[; ;pic18f2550.h: 1577: };\n[; ;pic18f2550.h: 1578: struct {\n[; ;pic18f2550.h: 1579: unsigned :3;\n[; ;pic18f2550.h: 1580: unsigned EPCONDIS7 :1;\n[; ;pic18f2550.h: 1581: };\n[; ;pic18f2550.h: 1582: struct {\n[; ;pic18f2550.h: 1583: unsigned :4;\n[; ;pic18f2550.h: 1584: unsigned EPHSHK7 :1;\n[; ;pic18f2550.h: 1585: };\n[; ;pic18f2550.h: 1586: struct {\n[; ;pic18f2550.h: 1587: unsigned :1;\n[; ;pic18f2550.h: 1588: unsigned EPINEN7 :1;\n[; ;pic18f2550.h: 1589: };\n[; ;pic18f2550.h: 1590: struct {\n[; ;pic18f2550.h: 1591: unsigned :2;\n[; ;pic18f2550.h: 1592: unsigned EPOUTEN7 :1;\n[; ;pic18f2550.h: 1593: };\n[; ;pic18f2550.h: 1594: struct {\n[; ;pic18f2550.h: 1595: unsigned EPSTALL7 :1;\n[; ;pic18f2550.h: 1596: };\n[; ;pic18f2550.h: 1597: } UEP7bits_t;\n[; ;pic18f2550.h: 1598: extern volatile UEP7bits_t UEP7bits @ 0xF77;\n[; ;pic18f2550.h: 1677: extern volatile unsigned char UEP8 @ 0xF78;\n\"1679\n[; ;pic18f2550.h: 1679: asm(\"UEP8 equ 0F78h\");\n[; <\" UEP8 equ 0F78h ;# \">\n[; ;pic18f2550.h: 1682: typedef union {\n[; ;pic18f2550.h: 1683: struct {\n[; ;pic18f2550.h: 1684: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1685: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1686: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1687: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1688: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1689: };\n[; ;pic18f2550.h: 1690: struct {\n[; ;pic18f2550.h: 1691: unsigned :3;\n[; ;pic18f2550.h: 1692: unsigned EPCONDIS8 :1;\n[; ;pic18f2550.h: 1693: };\n[; ;pic18f2550.h: 1694: struct {\n[; ;pic18f2550.h: 1695: unsigned :4;\n[; ;pic18f2550.h: 1696: unsigned EPHSHK8 :1;\n[; ;pic18f2550.h: 1697: };\n[; ;pic18f2550.h: 1698: struct {\n[; ;pic18f2550.h: 1699: unsigned :1;\n[; ;pic18f2550.h: 1700: unsigned EPINEN8 :1;\n[; ;pic18f2550.h: 1701: };\n[; ;pic18f2550.h: 1702: struct {\n[; ;pic18f2550.h: 1703: unsigned :2;\n[; ;pic18f2550.h: 1704: unsigned EPOUTEN8 :1;\n[; ;pic18f2550.h: 1705: };\n[; ;pic18f2550.h: 1706: struct {\n[; ;pic18f2550.h: 1707: unsigned EPSTALL8 :1;\n[; ;pic18f2550.h: 1708: };\n[; ;pic18f2550.h: 1709: } UEP8bits_t;\n[; ;pic18f2550.h: 1710: extern volatile UEP8bits_t UEP8bits @ 0xF78;\n[; ;pic18f2550.h: 1764: extern volatile unsigned char UEP9 @ 0xF79;\n\"1766\n[; ;pic18f2550.h: 1766: asm(\"UEP9 equ 0F79h\");\n[; <\" UEP9 equ 0F79h ;# \">\n[; ;pic18f2550.h: 1769: typedef union {\n[; ;pic18f2550.h: 1770: struct {\n[; ;pic18f2550.h: 1771: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1772: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1773: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1774: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1775: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1776: };\n[; ;pic18f2550.h: 1777: struct {\n[; ;pic18f2550.h: 1778: unsigned :3;\n[; ;pic18f2550.h: 1779: unsigned EPCONDIS9 :1;\n[; ;pic18f2550.h: 1780: };\n[; ;pic18f2550.h: 1781: struct {\n[; ;pic18f2550.h: 1782: unsigned :4;\n[; ;pic18f2550.h: 1783: unsigned EPHSHK9 :1;\n[; ;pic18f2550.h: 1784: };\n[; ;pic18f2550.h: 1785: struct {\n[; ;pic18f2550.h: 1786: unsigned :1;\n[; ;pic18f2550.h: 1787: unsigned EPINEN9 :1;\n[; ;pic18f2550.h: 1788: };\n[; ;pic18f2550.h: 1789: struct {\n[; ;pic18f2550.h: 1790: unsigned :2;\n[; ;pic18f2550.h: 1791: unsigned EPOUTEN9 :1;\n[; ;pic18f2550.h: 1792: };\n[; ;pic18f2550.h: 1793: struct {\n[; ;pic18f2550.h: 1794: unsigned EPSTALL9 :1;\n[; ;pic18f2550.h: 1795: };\n[; ;pic18f2550.h: 1796: } UEP9bits_t;\n[; ;pic18f2550.h: 1797: extern volatile UEP9bits_t UEP9bits @ 0xF79;\n[; ;pic18f2550.h: 1851: extern volatile unsigned char UEP10 @ 0xF7A;\n\"1853\n[; ;pic18f2550.h: 1853: asm(\"UEP10 equ 0F7Ah\");\n[; <\" UEP10 equ 0F7Ah ;# \">\n[; ;pic18f2550.h: 1856: typedef union {\n[; ;pic18f2550.h: 1857: struct {\n[; ;pic18f2550.h: 1858: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1859: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1860: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1861: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1862: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1863: };\n[; ;pic18f2550.h: 1864: struct {\n[; ;pic18f2550.h: 1865: unsigned :3;\n[; ;pic18f2550.h: 1866: unsigned EPCONDIS10 :1;\n[; ;pic18f2550.h: 1867: };\n[; ;pic18f2550.h: 1868: struct {\n[; ;pic18f2550.h: 1869: unsigned :4;\n[; ;pic18f2550.h: 1870: unsigned EPHSHK10 :1;\n[; ;pic18f2550.h: 1871: };\n[; ;pic18f2550.h: 1872: struct {\n[; ;pic18f2550.h: 1873: unsigned :1;\n[; ;pic18f2550.h: 1874: unsigned EPINEN10 :1;\n[; ;pic18f2550.h: 1875: };\n[; ;pic18f2550.h: 1876: struct {\n[; ;pic18f2550.h: 1877: unsigned :2;\n[; ;pic18f2550.h: 1878: unsigned EPOUTEN10 :1;\n[; ;pic18f2550.h: 1879: };\n[; ;pic18f2550.h: 1880: struct {\n[; ;pic18f2550.h: 1881: unsigned EPSTALL10 :1;\n[; ;pic18f2550.h: 1882: };\n[; ;pic18f2550.h: 1883: } UEP10bits_t;\n[; ;pic18f2550.h: 1884: extern volatile UEP10bits_t UEP10bits @ 0xF7A;\n[; ;pic18f2550.h: 1938: extern volatile unsigned char UEP11 @ 0xF7B;\n\"1940\n[; ;pic18f2550.h: 1940: asm(\"UEP11 equ 0F7Bh\");\n[; <\" UEP11 equ 0F7Bh ;# \">\n[; ;pic18f2550.h: 1943: typedef union {\n[; ;pic18f2550.h: 1944: struct {\n[; ;pic18f2550.h: 1945: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1946: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1947: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1948: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1949: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1950: };\n[; ;pic18f2550.h: 1951: struct {\n[; ;pic18f2550.h: 1952: unsigned :3;\n[; ;pic18f2550.h: 1953: unsigned EPCONDIS11 :1;\n[; ;pic18f2550.h: 1954: };\n[; ;pic18f2550.h: 1955: struct {\n[; ;pic18f2550.h: 1956: unsigned :4;\n[; ;pic18f2550.h: 1957: unsigned EPHSHK11 :1;\n[; ;pic18f2550.h: 1958: };\n[; ;pic18f2550.h: 1959: struct {\n[; ;pic18f2550.h: 1960: unsigned :1;\n[; ;pic18f2550.h: 1961: unsigned EPINEN11 :1;\n[; ;pic18f2550.h: 1962: };\n[; ;pic18f2550.h: 1963: struct {\n[; ;pic18f2550.h: 1964: unsigned :2;\n[; ;pic18f2550.h: 1965: unsigned EPOUTEN11 :1;\n[; ;pic18f2550.h: 1966: };\n[; ;pic18f2550.h: 1967: struct {\n[; ;pic18f2550.h: 1968: unsigned EPSTALL11 :1;\n[; ;pic18f2550.h: 1969: };\n[; ;pic18f2550.h: 1970: } UEP11bits_t;\n[; ;pic18f2550.h: 1971: extern volatile UEP11bits_t UEP11bits @ 0xF7B;\n[; ;pic18f2550.h: 2025: extern volatile unsigned char UEP12 @ 0xF7C;\n\"2027\n[; ;pic18f2550.h: 2027: asm(\"UEP12 equ 0F7Ch\");\n[; <\" UEP12 equ 0F7Ch ;# \">\n[; ;pic18f2550.h: 2030: typedef union {\n[; ;pic18f2550.h: 2031: struct {\n[; ;pic18f2550.h: 2032: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2033: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2034: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2035: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2036: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2037: };\n[; ;pic18f2550.h: 2038: struct {\n[; ;pic18f2550.h: 2039: unsigned :3;\n[; ;pic18f2550.h: 2040: unsigned EPCONDIS12 :1;\n[; ;pic18f2550.h: 2041: };\n[; ;pic18f2550.h: 2042: struct {\n[; ;pic18f2550.h: 2043: unsigned :4;\n[; ;pic18f2550.h: 2044: unsigned EPHSHK12 :1;\n[; ;pic18f2550.h: 2045: };\n[; ;pic18f2550.h: 2046: struct {\n[; ;pic18f2550.h: 2047: unsigned :1;\n[; ;pic18f2550.h: 2048: unsigned EPINEN12 :1;\n[; ;pic18f2550.h: 2049: };\n[; ;pic18f2550.h: 2050: struct {\n[; ;pic18f2550.h: 2051: unsigned :2;\n[; ;pic18f2550.h: 2052: unsigned EPOUTEN12 :1;\n[; ;pic18f2550.h: 2053: };\n[; ;pic18f2550.h: 2054: struct {\n[; ;pic18f2550.h: 2055: unsigned EPSTALL12 :1;\n[; ;pic18f2550.h: 2056: };\n[; ;pic18f2550.h: 2057: } UEP12bits_t;\n[; ;pic18f2550.h: 2058: extern volatile UEP12bits_t UEP12bits @ 0xF7C;\n[; ;pic18f2550.h: 2112: extern volatile unsigned char UEP13 @ 0xF7D;\n\"2114\n[; ;pic18f2550.h: 2114: asm(\"UEP13 equ 0F7Dh\");\n[; <\" UEP13 equ 0F7Dh ;# \">\n[; ;pic18f2550.h: 2117: typedef union {\n[; ;pic18f2550.h: 2118: struct {\n[; ;pic18f2550.h: 2119: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2120: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2121: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2122: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2123: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2124: };\n[; ;pic18f2550.h: 2125: struct {\n[; ;pic18f2550.h: 2126: unsigned :3;\n[; ;pic18f2550.h: 2127: unsigned EPCONDIS13 :1;\n[; ;pic18f2550.h: 2128: };\n[; ;pic18f2550.h: 2129: struct {\n[; ;pic18f2550.h: 2130: unsigned :4;\n[; ;pic18f2550.h: 2131: unsigned EPHSHK13 :1;\n[; ;pic18f2550.h: 2132: };\n[; ;pic18f2550.h: 2133: struct {\n[; ;pic18f2550.h: 2134: unsigned :1;\n[; ;pic18f2550.h: 2135: unsigned EPINEN13 :1;\n[; ;pic18f2550.h: 2136: };\n[; ;pic18f2550.h: 2137: struct {\n[; ;pic18f2550.h: 2138: unsigned :2;\n[; ;pic18f2550.h: 2139: unsigned EPOUTEN13 :1;\n[; ;pic18f2550.h: 2140: };\n[; ;pic18f2550.h: 2141: struct {\n[; ;pic18f2550.h: 2142: unsigned EPSTALL13 :1;\n[; ;pic18f2550.h: 2143: };\n[; ;pic18f2550.h: 2144: } UEP13bits_t;\n[; ;pic18f2550.h: 2145: extern volatile UEP13bits_t UEP13bits @ 0xF7D;\n[; ;pic18f2550.h: 2199: extern volatile unsigned char UEP14 @ 0xF7E;\n\"2201\n[; ;pic18f2550.h: 2201: asm(\"UEP14 equ 0F7Eh\");\n[; <\" UEP14 equ 0F7Eh ;# \">\n[; ;pic18f2550.h: 2204: typedef union {\n[; ;pic18f2550.h: 2205: struct {\n[; ;pic18f2550.h: 2206: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2207: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2208: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2209: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2210: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2211: };\n[; ;pic18f2550.h: 2212: struct {\n[; ;pic18f2550.h: 2213: unsigned :3;\n[; ;pic18f2550.h: 2214: unsigned EPCONDIS14 :1;\n[; ;pic18f2550.h: 2215: };\n[; ;pic18f2550.h: 2216: struct {\n[; ;pic18f2550.h: 2217: unsigned :4;\n[; ;pic18f2550.h: 2218: unsigned EPHSHK14 :1;\n[; ;pic18f2550.h: 2219: };\n[; ;pic18f2550.h: 2220: struct {\n[; ;pic18f2550.h: 2221: unsigned :1;\n[; ;pic18f2550.h: 2222: unsigned EPINEN14 :1;\n[; ;pic18f2550.h: 2223: };\n[; ;pic18f2550.h: 2224: struct {\n[; ;pic18f2550.h: 2225: unsigned :2;\n[; ;pic18f2550.h: 2226: unsigned EPOUTEN14 :1;\n[; ;pic18f2550.h: 2227: };\n[; ;pic18f2550.h: 2228: struct {\n[; ;pic18f2550.h: 2229: unsigned EPSTALL14 :1;\n[; ;pic18f2550.h: 2230: };\n[; ;pic18f2550.h: 2231: } UEP14bits_t;\n[; ;pic18f2550.h: 2232: extern volatile UEP14bits_t UEP14bits @ 0xF7E;\n[; ;pic18f2550.h: 2286: extern volatile unsigned char UEP15 @ 0xF7F;\n\"2288\n[; ;pic18f2550.h: 2288: asm(\"UEP15 equ 0F7Fh\");\n[; <\" UEP15 equ 0F7Fh ;# \">\n[; ;pic18f2550.h: 2291: typedef union {\n[; ;pic18f2550.h: 2292: struct {\n[; ;pic18f2550.h: 2293: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2294: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2295: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2296: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2297: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2298: };\n[; ;pic18f2550.h: 2299: struct {\n[; ;pic18f2550.h: 2300: unsigned :3;\n[; ;pic18f2550.h: 2301: unsigned EPCONDIS15 :1;\n[; ;pic18f2550.h: 2302: };\n[; ;pic18f2550.h: 2303: struct {\n[; ;pic18f2550.h: 2304: unsigned :4;\n[; ;pic18f2550.h: 2305: unsigned EPHSHK15 :1;\n[; ;pic18f2550.h: 2306: };\n[; ;pic18f2550.h: 2307: struct {\n[; ;pic18f2550.h: 2308: unsigned :1;\n[; ;pic18f2550.h: 2309: unsigned EPINEN15 :1;\n[; ;pic18f2550.h: 2310: };\n[; ;pic18f2550.h: 2311: struct {\n[; ;pic18f2550.h: 2312: unsigned :2;\n[; ;pic18f2550.h: 2313: unsigned EPOUTEN15 :1;\n[; ;pic18f2550.h: 2314: };\n[; ;pic18f2550.h: 2315: struct {\n[; ;pic18f2550.h: 2316: unsigned EPSTALL15 :1;\n[; ;pic18f2550.h: 2317: };\n[; ;pic18f2550.h: 2318: } UEP15bits_t;\n[; ;pic18f2550.h: 2319: extern volatile UEP15bits_t UEP15bits @ 0xF7F;\n[; ;pic18f2550.h: 2373: extern volatile unsigned char PORTA @ 0xF80;\n\"2375\n[; ;pic18f2550.h: 2375: asm(\"PORTA equ 0F80h\");\n[; <\" PORTA equ 0F80h ;# \">\n[; ;pic18f2550.h: 2378: typedef union {\n[; ;pic18f2550.h: 2379: struct {\n[; ;pic18f2550.h: 2380: unsigned RA0 :1;\n[; ;pic18f2550.h: 2381: unsigned RA1 :1;\n[; ;pic18f2550.h: 2382: unsigned RA2 :1;\n[; ;pic18f2550.h: 2383: unsigned RA3 :1;\n[; ;pic18f2550.h: 2384: unsigned RA4 :1;\n[; ;pic18f2550.h: 2385: unsigned RA5 :1;\n[; ;pic18f2550.h: 2386: unsigned RA6 :1;\n[; ;pic18f2550.h: 2387: };\n[; ;pic18f2550.h: 2388: struct {\n[; ;pic18f2550.h: 2389: unsigned AN0 :1;\n[; ;pic18f2550.h: 2390: unsigned AN1 :1;\n[; ;pic18f2550.h: 2391: unsigned AN2 :1;\n[; ;pic18f2550.h: 2392: unsigned AN3 :1;\n[; ;pic18f2550.h: 2393: unsigned T0CKI :1;\n[; ;pic18f2550.h: 2394: unsigned AN4 :1;\n[; ;pic18f2550.h: 2395: unsigned OSC2 :1;\n[; ;pic18f2550.h: 2396: };\n[; ;pic18f2550.h: 2397: struct {\n[; ;pic18f2550.h: 2398: unsigned :2;\n[; ;pic18f2550.h: 2399: unsigned VREFM :1;\n[; ;pic18f2550.h: 2400: unsigned VREFP :1;\n[; ;pic18f2550.h: 2401: unsigned :1;\n[; ;pic18f2550.h: 2402: unsigned LVDIN :1;\n[; ;pic18f2550.h: 2403: };\n[; ;pic18f2550.h: 2404: struct {\n[; ;pic18f2550.h: 2405: unsigned :5;\n[; ;pic18f2550.h: 2406: unsigned HLVDIN :1;\n[; ;pic18f2550.h: 2407: };\n[; ;pic18f2550.h: 2408: struct {\n[; ;pic18f2550.h: 2409: unsigned :7;\n[; ;pic18f2550.h: 2410: unsigned RA7 :1;\n[; ;pic18f2550.h: 2411: };\n[; ;pic18f2550.h: 2412: struct {\n[; ;pic18f2550.h: 2413: unsigned :7;\n[; ;pic18f2550.h: 2414: unsigned RJPU :1;\n[; ;pic18f2550.h: 2415: };\n[; ;pic18f2550.h: 2416: struct {\n[; ;pic18f2550.h: 2417: unsigned ULPWUIN :1;\n[; ;pic18f2550.h: 2418: };\n[; ;pic18f2550.h: 2419: } PORTAbits_t;\n[; ;pic18f2550.h: 2420: extern volatile PORTAbits_t PORTAbits @ 0xF80;\n[; ;pic18f2550.h: 2529: extern volatile unsigned char PORTB @ 0xF81;\n\"2531\n[; ;pic18f2550.h: 2531: asm(\"PORTB equ 0F81h\");\n[; <\" PORTB equ 0F81h ;# \">\n[; ;pic18f2550.h: 2534: typedef union {\n[; ;pic18f2550.h: 2535: struct {\n[; ;pic18f2550.h: 2536: unsigned RB0 :1;\n[; ;pic18f2550.h: 2537: unsigned RB1 :1;\n[; ;pic18f2550.h: 2538: unsigned RB2 :1;\n[; ;pic18f2550.h: 2539: unsigned RB3 :1;\n[; ;pic18f2550.h: 2540: unsigned RB4 :1;\n[; ;pic18f2550.h: 2541: unsigned RB5 :1;\n[; ;pic18f2550.h: 2542: unsigned RB6 :1;\n[; ;pic18f2550.h: 2543: unsigned RB7 :1;\n[; ;pic18f2550.h: 2544: };\n[; ;pic18f2550.h: 2545: struct {\n[; ;pic18f2550.h: 2546: unsigned INT0 :1;\n[; ;pic18f2550.h: 2547: unsigned INT1 :1;\n[; ;pic18f2550.h: 2548: unsigned INT2 :1;\n[; ;pic18f2550.h: 2549: unsigned :2;\n[; ;pic18f2550.h: 2550: unsigned PGM :1;\n[; ;pic18f2550.h: 2551: unsigned PGC :1;\n[; ;pic18f2550.h: 2552: unsigned PGD :1;\n[; ;pic18f2550.h: 2553: };\n[; ;pic18f2550.h: 2554: struct {\n[; ;pic18f2550.h: 2555: unsigned :3;\n[; ;pic18f2550.h: 2556: unsigned CCP2_PA2 :1;\n[; ;pic18f2550.h: 2557: };\n[; ;pic18f2550.h: 2558: } PORTBbits_t;\n[; ;pic18f2550.h: 2559: extern volatile PORTBbits_t PORTBbits @ 0xF81;\n[; ;pic18f2550.h: 2638: extern volatile unsigned char PORTC @ 0xF82;\n\"2640\n[; ;pic18f2550.h: 2640: asm(\"PORTC equ 0F82h\");\n[; <\" PORTC equ 0F82h ;# \">\n[; ;pic18f2550.h: 2643: typedef union {\n[; ;pic18f2550.h: 2644: struct {\n[; ;pic18f2550.h: 2645: unsigned RC0 :1;\n[; ;pic18f2550.h: 2646: unsigned RC1 :1;\n[; ;pic18f2550.h: 2647: unsigned RC2 :1;\n[; ;pic18f2550.h: 2648: unsigned :1;\n[; ;pic18f2550.h: 2649: unsigned RC4 :1;\n[; ;pic18f2550.h: 2650: unsigned RC5 :1;\n[; ;pic18f2550.h: 2651: unsigned RC6 :1;\n[; ;pic18f2550.h: 2652: unsigned RC7 :1;\n[; ;pic18f2550.h: 2653: };\n[; ;pic18f2550.h: 2654: struct {\n[; ;pic18f2550.h: 2655: unsigned T1OSO :1;\n[; ;pic18f2550.h: 2656: unsigned T1OSI :1;\n[; ;pic18f2550.h: 2657: unsigned CCP1 :1;\n[; ;pic18f2550.h: 2658: unsigned :3;\n[; ;pic18f2550.h: 2659: unsigned TX :1;\n[; ;pic18f2550.h: 2660: unsigned RX :1;\n[; ;pic18f2550.h: 2661: };\n[; ;pic18f2550.h: 2662: struct {\n[; ;pic18f2550.h: 2663: unsigned T13CKI :1;\n[; ;pic18f2550.h: 2664: unsigned :1;\n[; ;pic18f2550.h: 2665: unsigned P1A :1;\n[; ;pic18f2550.h: 2666: unsigned :3;\n[; ;pic18f2550.h: 2667: unsigned CK :1;\n[; ;pic18f2550.h: 2668: unsigned DT :1;\n[; ;pic18f2550.h: 2669: };\n[; ;pic18f2550.h: 2670: struct {\n[; ;pic18f2550.h: 2671: unsigned :1;\n[; ;pic18f2550.h: 2672: unsigned CCP2 :1;\n[; ;pic18f2550.h: 2673: };\n[; ;pic18f2550.h: 2674: struct {\n[; ;pic18f2550.h: 2675: unsigned :2;\n[; ;pic18f2550.h: 2676: unsigned PA1 :1;\n[; ;pic18f2550.h: 2677: };\n[; ;pic18f2550.h: 2678: struct {\n[; ;pic18f2550.h: 2679: unsigned :1;\n[; ;pic18f2550.h: 2680: unsigned PA2 :1;\n[; ;pic18f2550.h: 2681: };\n[; ;pic18f2550.h: 2682: struct {\n[; ;pic18f2550.h: 2683: unsigned :3;\n[; ;pic18f2550.h: 2684: unsigned RC3 :1;\n[; ;pic18f2550.h: 2685: };\n[; ;pic18f2550.h: 2686: } PORTCbits_t;\n[; ;pic18f2550.h: 2687: extern volatile PORTCbits_t PORTCbits @ 0xF82;\n[; ;pic18f2550.h: 2791: extern volatile unsigned char PORTE @ 0xF84;\n\"2793\n[; ;pic18f2550.h: 2793: asm(\"PORTE equ 0F84h\");\n[; <\" PORTE equ 0F84h ;# \">\n[; ;pic18f2550.h: 2796: typedef union {\n[; ;pic18f2550.h: 2797: struct {\n[; ;pic18f2550.h: 2798: unsigned :3;\n[; ;pic18f2550.h: 2799: unsigned RE3 :1;\n[; ;pic18f2550.h: 2800: };\n[; ;pic18f2550.h: 2801: struct {\n[; ;pic18f2550.h: 2802: unsigned :2;\n[; ;pic18f2550.h: 2803: unsigned CCP10 :1;\n[; ;pic18f2550.h: 2804: };\n[; ;pic18f2550.h: 2805: struct {\n[; ;pic18f2550.h: 2806: unsigned :7;\n[; ;pic18f2550.h: 2807: unsigned CCP2E :1;\n[; ;pic18f2550.h: 2808: };\n[; ;pic18f2550.h: 2809: struct {\n[; ;pic18f2550.h: 2810: unsigned :6;\n[; ;pic18f2550.h: 2811: unsigned CCP6E :1;\n[; ;pic18f2550.h: 2812: };\n[; ;pic18f2550.h: 2813: struct {\n[; ;pic18f2550.h: 2814: unsigned :5;\n[; ;pic18f2550.h: 2815: unsigned CCP7E :1;\n[; ;pic18f2550.h: 2816: };\n[; ;pic18f2550.h: 2817: struct {\n[; ;pic18f2550.h: 2818: unsigned :4;\n[; ;pic18f2550.h: 2819: unsigned CCP8E :1;\n[; ;pic18f2550.h: 2820: };\n[; ;pic18f2550.h: 2821: struct {\n[; ;pic18f2550.h: 2822: unsigned :3;\n[; ;pic18f2550.h: 2823: unsigned CCP9E :1;\n[; ;pic18f2550.h: 2824: };\n[; ;pic18f2550.h: 2825: struct {\n[; ;pic18f2550.h: 2826: unsigned :2;\n[; ;pic18f2550.h: 2827: unsigned CS :1;\n[; ;pic18f2550.h: 2828: };\n[; ;pic18f2550.h: 2829: struct {\n[; ;pic18f2550.h: 2830: unsigned :7;\n[; ;pic18f2550.h: 2831: unsigned PA2E :1;\n[; ;pic18f2550.h: 2832: };\n[; ;pic18f2550.h: 2833: struct {\n[; ;pic18f2550.h: 2834: unsigned :6;\n[; ;pic18f2550.h: 2835: unsigned PB1E :1;\n[; ;pic18f2550.h: 2836: };\n[; ;pic18f2550.h: 2837: struct {\n[; ;pic18f2550.h: 2838: unsigned :2;\n[; ;pic18f2550.h: 2839: unsigned PB2 :1;\n[; ;pic18f2550.h: 2840: };\n[; ;pic18f2550.h: 2841: struct {\n[; ;pic18f2550.h: 2842: unsigned :4;\n[; ;pic18f2550.h: 2843: unsigned PB3E :1;\n[; ;pic18f2550.h: 2844: };\n[; ;pic18f2550.h: 2845: struct {\n[; ;pic18f2550.h: 2846: unsigned :5;\n[; ;pic18f2550.h: 2847: unsigned PC1E :1;\n[; ;pic18f2550.h: 2848: };\n[; ;pic18f2550.h: 2849: struct {\n[; ;pic18f2550.h: 2850: unsigned :1;\n[; ;pic18f2550.h: 2851: unsigned PC2 :1;\n[; ;pic18f2550.h: 2852: };\n[; ;pic18f2550.h: 2853: struct {\n[; ;pic18f2550.h: 2854: unsigned :3;\n[; ;pic18f2550.h: 2855: unsigned PC3E :1;\n[; ;pic18f2550.h: 2856: };\n[; ;pic18f2550.h: 2857: struct {\n[; ;pic18f2550.h: 2858: unsigned PD2 :1;\n[; ;pic18f2550.h: 2859: };\n[; ;pic18f2550.h: 2860: struct {\n[; ;pic18f2550.h: 2861: unsigned RDE :1;\n[; ;pic18f2550.h: 2862: };\n[; ;pic18f2550.h: 2863: struct {\n[; ;pic18f2550.h: 2864: unsigned RE0 :1;\n[; ;pic18f2550.h: 2865: };\n[; ;pic18f2550.h: 2866: struct {\n[; ;pic18f2550.h: 2867: unsigned :1;\n[; ;pic18f2550.h: 2868: unsigned RE1 :1;\n[; ;pic18f2550.h: 2869: };\n[; ;pic18f2550.h: 2870: struct {\n[; ;pic18f2550.h: 2871: unsigned :2;\n[; ;pic18f2550.h: 2872: unsigned RE2 :1;\n[; ;pic18f2550.h: 2873: };\n[; ;pic18f2550.h: 2874: struct {\n[; ;pic18f2550.h: 2875: unsigned :4;\n[; ;pic18f2550.h: 2876: unsigned RE4 :1;\n[; ;pic18f2550.h: 2877: };\n[; ;pic18f2550.h: 2878: struct {\n[; ;pic18f2550.h: 2879: unsigned :5;\n[; ;pic18f2550.h: 2880: unsigned RE5 :1;\n[; ;pic18f2550.h: 2881: };\n[; ;pic18f2550.h: 2882: struct {\n[; ;pic18f2550.h: 2883: unsigned :6;\n[; ;pic18f2550.h: 2884: unsigned RE6 :1;\n[; ;pic18f2550.h: 2885: };\n[; ;pic18f2550.h: 2886: struct {\n[; ;pic18f2550.h: 2887: unsigned :7;\n[; ;pic18f2550.h: 2888: unsigned RE7 :1;\n[; ;pic18f2550.h: 2889: };\n[; ;pic18f2550.h: 2890: struct {\n[; ;pic18f2550.h: 2891: unsigned :1;\n[; ;pic18f2550.h: 2892: unsigned WRE :1;\n[; ;pic18f2550.h: 2893: };\n[; ;pic18f2550.h: 2894: } PORTEbits_t;\n[; ;pic18f2550.h: 2895: extern volatile PORTEbits_t PORTEbits @ 0xF84;\n[; ;pic18f2550.h: 3024: extern volatile unsigned char LATA @ 0xF89;\n\"3026\n[; ;pic18f2550.h: 3026: asm(\"LATA equ 0F89h\");\n[; <\" LATA equ 0F89h ;# \">\n[; ;pic18f2550.h: 3029: typedef union {\n[; ;pic18f2550.h: 3030: struct {\n[; ;pic18f2550.h: 3031: unsigned LATA0 :1;\n[; ;pic18f2550.h: 3032: unsigned LATA1 :1;\n[; ;pic18f2550.h: 3033: unsigned LATA2 :1;\n[; ;pic18f2550.h: 3034: unsigned LATA3 :1;\n[; ;pic18f2550.h: 3035: unsigned LATA4 :1;\n[; ;pic18f2550.h: 3036: unsigned LATA5 :1;\n[; ;pic18f2550.h: 3037: unsigned LATA6 :1;\n[; ;pic18f2550.h: 3038: };\n[; ;pic18f2550.h: 3039: struct {\n[; ;pic18f2550.h: 3040: unsigned LA0 :1;\n[; ;pic18f2550.h: 3041: };\n[; ;pic18f2550.h: 3042: struct {\n[; ;pic18f2550.h: 3043: unsigned :1;\n[; ;pic18f2550.h: 3044: unsigned LA1 :1;\n[; ;pic18f2550.h: 3045: };\n[; ;pic18f2550.h: 3046: struct {\n[; ;pic18f2550.h: 3047: unsigned :2;\n[; ;pic18f2550.h: 3048: unsigned LA2 :1;\n[; ;pic18f2550.h: 3049: };\n[; ;pic18f2550.h: 3050: struct {\n[; ;pic18f2550.h: 3051: unsigned :3;\n[; ;pic18f2550.h: 3052: unsigned LA3 :1;\n[; ;pic18f2550.h: 3053: };\n[; ;pic18f2550.h: 3054: struct {\n[; ;pic18f2550.h: 3055: unsigned :4;\n[; ;pic18f2550.h: 3056: unsigned LA4 :1;\n[; ;pic18f2550.h: 3057: };\n[; ;pic18f2550.h: 3058: struct {\n[; ;pic18f2550.h: 3059: unsigned :5;\n[; ;pic18f2550.h: 3060: unsigned LA5 :1;\n[; ;pic18f2550.h: 3061: };\n[; ;pic18f2550.h: 3062: struct {\n[; ;pic18f2550.h: 3063: unsigned :6;\n[; ;pic18f2550.h: 3064: unsigned LA6 :1;\n[; ;pic18f2550.h: 3065: };\n[; ;pic18f2550.h: 3066: struct {\n[; ;pic18f2550.h: 3067: unsigned :7;\n[; ;pic18f2550.h: 3068: unsigned LA7 :1;\n[; ;pic18f2550.h: 3069: };\n[; ;pic18f2550.h: 3070: struct {\n[; ;pic18f2550.h: 3071: unsigned :7;\n[; ;pic18f2550.h: 3072: unsigned LATA7 :1;\n[; ;pic18f2550.h: 3073: };\n[; ;pic18f2550.h: 3074: } LATAbits_t;\n[; ;pic18f2550.h: 3075: extern volatile LATAbits_t LATAbits @ 0xF89;\n[; ;pic18f2550.h: 3159: extern volatile unsigned char LATB @ 0xF8A;\n\"3161\n[; ;pic18f2550.h: 3161: asm(\"LATB equ 0F8Ah\");\n[; <\" LATB equ 0F8Ah ;# \">\n[; ;pic18f2550.h: 3164: typedef union {\n[; ;pic18f2550.h: 3165: struct {\n[; ;pic18f2550.h: 3166: unsigned LATB0 :1;\n[; ;pic18f2550.h: 3167: unsigned LATB1 :1;\n[; ;pic18f2550.h: 3168: unsigned LATB2 :1;\n[; ;pic18f2550.h: 3169: unsigned LATB3 :1;\n[; ;pic18f2550.h: 3170: unsigned LATB4 :1;\n[; ;pic18f2550.h: 3171: unsigned LATB5 :1;\n[; ;pic18f2550.h: 3172: unsigned LATB6 :1;\n[; ;pic18f2550.h: 3173: unsigned LATB7 :1;\n[; ;pic18f2550.h: 3174: };\n[; ;pic18f2550.h: 3175: struct {\n[; ;pic18f2550.h: 3176: unsigned LB0 :1;\n[; ;pic18f2550.h: 3177: };\n[; ;pic18f2550.h: 3178: struct {\n[; ;pic18f2550.h: 3179: unsigned :1;\n[; ;pic18f2550.h: 3180: unsigned LB1 :1;\n[; ;pic18f2550.h: 3181: };\n[; ;pic18f2550.h: 3182: struct {\n[; ;pic18f2550.h: 3183: unsigned :2;\n[; ;pic18f2550.h: 3184: unsigned LB2 :1;\n[; ;pic18f2550.h: 3185: };\n[; ;pic18f2550.h: 3186: struct {\n[; ;pic18f2550.h: 3187: unsigned :3;\n[; ;pic18f2550.h: 3188: unsigned LB3 :1;\n[; ;pic18f2550.h: 3189: };\n[; ;pic18f2550.h: 3190: struct {\n[; ;pic18f2550.h: 3191: unsigned :4;\n[; ;pic18f2550.h: 3192: unsigned LB4 :1;\n[; ;pic18f2550.h: 3193: };\n[; ;pic18f2550.h: 3194: struct {\n[; ;pic18f2550.h: 3195: unsigned :5;\n[; ;pic18f2550.h: 3196: unsigned LB5 :1;\n[; ;pic18f2550.h: 3197: };\n[; ;pic18f2550.h: 3198: struct {\n[; ;pic18f2550.h: 3199: unsigned :6;\n[; ;pic18f2550.h: 3200: unsigned LB6 :1;\n[; ;pic18f2550.h: 3201: };\n[; ;pic18f2550.h: 3202: struct {\n[; ;pic18f2550.h: 3203: unsigned :7;\n[; ;pic18f2550.h: 3204: unsigned LB7 :1;\n[; ;pic18f2550.h: 3205: };\n[; ;pic18f2550.h: 3206: } LATBbits_t;\n[; ;pic18f2550.h: 3207: extern volatile LATBbits_t LATBbits @ 0xF8A;\n[; ;pic18f2550.h: 3291: extern volatile unsigned char LATC @ 0xF8B;\n\"3293\n[; ;pic18f2550.h: 3293: asm(\"LATC equ 0F8Bh\");\n[; <\" LATC equ 0F8Bh ;# \">\n[; ;pic18f2550.h: 3296: typedef union {\n[; ;pic18f2550.h: 3297: struct {\n[; ;pic18f2550.h: 3298: unsigned LATC0 :1;\n[; ;pic18f2550.h: 3299: unsigned LATC1 :1;\n[; ;pic18f2550.h: 3300: unsigned LATC2 :1;\n[; ;pic18f2550.h: 3301: unsigned :3;\n[; ;pic18f2550.h: 3302: unsigned LATC6 :1;\n[; ;pic18f2550.h: 3303: unsigned LATC7 :1;\n[; ;pic18f2550.h: 3304: };\n[; ;pic18f2550.h: 3305: struct {\n[; ;pic18f2550.h: 3306: unsigned LC0 :1;\n[; ;pic18f2550.h: 3307: };\n[; ;pic18f2550.h: 3308: struct {\n[; ;pic18f2550.h: 3309: unsigned :1;\n[; ;pic18f2550.h: 3310: unsigned LC1 :1;\n[; ;pic18f2550.h: 3311: };\n[; ;pic18f2550.h: 3312: struct {\n[; ;pic18f2550.h: 3313: unsigned :2;\n[; ;pic18f2550.h: 3314: unsigned LC2 :1;\n[; ;pic18f2550.h: 3315: };\n[; ;pic18f2550.h: 3316: struct {\n[; ;pic18f2550.h: 3317: unsigned :3;\n[; ;pic18f2550.h: 3318: unsigned LC3 :1;\n[; ;pic18f2550.h: 3319: };\n[; ;pic18f2550.h: 3320: struct {\n[; ;pic18f2550.h: 3321: unsigned :4;\n[; ;pic18f2550.h: 3322: unsigned LC4 :1;\n[; ;pic18f2550.h: 3323: };\n[; ;pic18f2550.h: 3324: struct {\n[; ;pic18f2550.h: 3325: unsigned :5;\n[; ;pic18f2550.h: 3326: unsigned LC5 :1;\n[; ;pic18f2550.h: 3327: };\n[; ;pic18f2550.h: 3328: struct {\n[; ;pic18f2550.h: 3329: unsigned :6;\n[; ;pic18f2550.h: 3330: unsigned LC6 :1;\n[; ;pic18f2550.h: 3331: };\n[; ;pic18f2550.h: 3332: struct {\n[; ;pic18f2550.h: 3333: unsigned :7;\n[; ;pic18f2550.h: 3334: unsigned LC7 :1;\n[; ;pic18f2550.h: 3335: };\n[; ;pic18f2550.h: 3336: } LATCbits_t;\n[; ;pic18f2550.h: 3337: extern volatile LATCbits_t LATCbits @ 0xF8B;\n[; ;pic18f2550.h: 3406: extern volatile unsigned char TRISA @ 0xF92;\n\"3408\n[; ;pic18f2550.h: 3408: asm(\"TRISA equ 0F92h\");\n[; <\" TRISA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3411: extern volatile unsigned char DDRA @ 0xF92;\n\"3413\n[; ;pic18f2550.h: 3413: asm(\"DDRA equ 0F92h\");\n[; <\" DDRA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3416: typedef union {\n[; ;pic18f2550.h: 3417: struct {\n[; ;pic18f2550.h: 3418: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3419: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3420: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3421: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3422: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3423: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3424: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3425: };\n[; ;pic18f2550.h: 3426: struct {\n[; ;pic18f2550.h: 3427: unsigned RA0 :1;\n[; ;pic18f2550.h: 3428: unsigned RA1 :1;\n[; ;pic18f2550.h: 3429: unsigned RA2 :1;\n[; ;pic18f2550.h: 3430: unsigned RA3 :1;\n[; ;pic18f2550.h: 3431: unsigned RA4 :1;\n[; ;pic18f2550.h: 3432: unsigned RA5 :1;\n[; ;pic18f2550.h: 3433: unsigned RA6 :1;\n[; ;pic18f2550.h: 3434: };\n[; ;pic18f2550.h: 3435: } TRISAbits_t;\n[; ;pic18f2550.h: 3436: extern volatile TRISAbits_t TRISAbits @ 0xF92;\n[; ;pic18f2550.h: 3509: typedef union {\n[; ;pic18f2550.h: 3510: struct {\n[; ;pic18f2550.h: 3511: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3512: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3513: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3514: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3515: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3516: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3517: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3518: };\n[; ;pic18f2550.h: 3519: struct {\n[; ;pic18f2550.h: 3520: unsigned RA0 :1;\n[; ;pic18f2550.h: 3521: unsigned RA1 :1;\n[; ;pic18f2550.h: 3522: unsigned RA2 :1;\n[; ;pic18f2550.h: 3523: unsigned RA3 :1;\n[; ;pic18f2550.h: 3524: unsigned RA4 :1;\n[; ;pic18f2550.h: 3525: unsigned RA5 :1;\n[; ;pic18f2550.h: 3526: unsigned RA6 :1;\n[; ;pic18f2550.h: 3527: };\n[; ;pic18f2550.h: 3528: } DDRAbits_t;\n[; ;pic18f2550.h: 3529: extern volatile DDRAbits_t DDRAbits @ 0xF92;\n[; ;pic18f2550.h: 3603: extern volatile unsigned char TRISB @ 0xF93;\n\"3605\n[; ;pic18f2550.h: 3605: asm(\"TRISB equ 0F93h\");\n[; <\" TRISB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3608: extern volatile unsigned char DDRB @ 0xF93;\n\"3610\n[; ;pic18f2550.h: 3610: asm(\"DDRB equ 0F93h\");\n[; <\" DDRB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3613: typedef union {\n[; ;pic18f2550.h: 3614: struct {\n[; ;pic18f2550.h: 3615: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3616: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3617: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3618: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3619: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3620: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3621: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3622: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3623: };\n[; ;pic18f2550.h: 3624: struct {\n[; ;pic18f2550.h: 3625: unsigned RB0 :1;\n[; ;pic18f2550.h: 3626: unsigned RB1 :1;\n[; ;pic18f2550.h: 3627: unsigned RB2 :1;\n[; ;pic18f2550.h: 3628: unsigned RB3 :1;\n[; ;pic18f2550.h: 3629: unsigned RB4 :1;\n[; ;pic18f2550.h: 3630: unsigned RB5 :1;\n[; ;pic18f2550.h: 3631: unsigned RB6 :1;\n[; ;pic18f2550.h: 3632: unsigned RB7 :1;\n[; ;pic18f2550.h: 3633: };\n[; ;pic18f2550.h: 3634: } TRISBbits_t;\n[; ;pic18f2550.h: 3635: extern volatile TRISBbits_t TRISBbits @ 0xF93;\n[; ;pic18f2550.h: 3718: typedef union {\n[; ;pic18f2550.h: 3719: struct {\n[; ;pic18f2550.h: 3720: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3721: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3722: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3723: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3724: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3725: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3726: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3727: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3728: };\n[; ;pic18f2550.h: 3729: struct {\n[; ;pic18f2550.h: 3730: unsigned RB0 :1;\n[; ;pic18f2550.h: 3731: unsigned RB1 :1;\n[; ;pic18f2550.h: 3732: unsigned RB2 :1;\n[; ;pic18f2550.h: 3733: unsigned RB3 :1;\n[; ;pic18f2550.h: 3734: unsigned RB4 :1;\n[; ;pic18f2550.h: 3735: unsigned RB5 :1;\n[; ;pic18f2550.h: 3736: unsigned RB6 :1;\n[; ;pic18f2550.h: 3737: unsigned RB7 :1;\n[; ;pic18f2550.h: 3738: };\n[; ;pic18f2550.h: 3739: } DDRBbits_t;\n[; ;pic18f2550.h: 3740: extern volatile DDRBbits_t DDRBbits @ 0xF93;\n[; ;pic18f2550.h: 3824: extern volatile unsigned char TRISC @ 0xF94;\n\"3826\n[; ;pic18f2550.h: 3826: asm(\"TRISC equ 0F94h\");\n[; <\" TRISC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3829: extern volatile unsigned char DDRC @ 0xF94;\n\"3831\n[; ;pic18f2550.h: 3831: asm(\"DDRC equ 0F94h\");\n[; <\" DDRC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3834: typedef union {\n[; ;pic18f2550.h: 3835: struct {\n[; ;pic18f2550.h: 3836: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3837: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3838: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3839: unsigned :3;\n[; ;pic18f2550.h: 3840: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3841: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3842: };\n[; ;pic18f2550.h: 3843: struct {\n[; ;pic18f2550.h: 3844: unsigned RC0 :1;\n[; ;pic18f2550.h: 3845: unsigned RC1 :1;\n[; ;pic18f2550.h: 3846: unsigned RC2 :1;\n[; ;pic18f2550.h: 3847: unsigned :3;\n[; ;pic18f2550.h: 3848: unsigned RC6 :1;\n[; ;pic18f2550.h: 3849: unsigned RC7 :1;\n[; ;pic18f2550.h: 3850: };\n[; ;pic18f2550.h: 3851: struct {\n[; ;pic18f2550.h: 3852: unsigned :3;\n[; ;pic18f2550.h: 3853: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3854: };\n[; ;pic18f2550.h: 3855: } TRISCbits_t;\n[; ;pic18f2550.h: 3856: extern volatile TRISCbits_t TRISCbits @ 0xF94;\n[; ;pic18f2550.h: 3914: typedef union {\n[; ;pic18f2550.h: 3915: struct {\n[; ;pic18f2550.h: 3916: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3917: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3918: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3919: unsigned :3;\n[; ;pic18f2550.h: 3920: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3921: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3922: };\n[; ;pic18f2550.h: 3923: struct {\n[; ;pic18f2550.h: 3924: unsigned RC0 :1;\n[; ;pic18f2550.h: 3925: unsigned RC1 :1;\n[; ;pic18f2550.h: 3926: unsigned RC2 :1;\n[; ;pic18f2550.h: 3927: unsigned :3;\n[; ;pic18f2550.h: 3928: unsigned RC6 :1;\n[; ;pic18f2550.h: 3929: unsigned RC7 :1;\n[; ;pic18f2550.h: 3930: };\n[; ;pic18f2550.h: 3931: struct {\n[; ;pic18f2550.h: 3932: unsigned :3;\n[; ;pic18f2550.h: 3933: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3934: };\n[; ;pic18f2550.h: 3935: } DDRCbits_t;\n[; ;pic18f2550.h: 3936: extern volatile DDRCbits_t DDRCbits @ 0xF94;\n[; ;pic18f2550.h: 3995: extern volatile unsigned char OSCTUNE @ 0xF9B;\n\"3997\n[; ;pic18f2550.h: 3997: asm(\"OSCTUNE equ 0F9Bh\");\n[; <\" OSCTUNE equ 0F9Bh ;# \">\n[; ;pic18f2550.h: 4000: typedef union {\n[; ;pic18f2550.h: 4001: struct {\n[; ;pic18f2550.h: 4002: unsigned TUN :5;\n[; ;pic18f2550.h: 4003: unsigned :2;\n[; ;pic18f2550.h: 4004: unsigned INTSRC :1;\n[; ;pic18f2550.h: 4005: };\n[; ;pic18f2550.h: 4006: struct {\n[; ;pic18f2550.h: 4007: unsigned TUN0 :1;\n[; ;pic18f2550.h: 4008: unsigned TUN1 :1;\n[; ;pic18f2550.h: 4009: unsigned TUN2 :1;\n[; ;pic18f2550.h: 4010: unsigned TUN3 :1;\n[; ;pic18f2550.h: 4011: unsigned TUN4 :1;\n[; ;pic18f2550.h: 4012: };\n[; ;pic18f2550.h: 4013: } OSCTUNEbits_t;\n[; ;pic18f2550.h: 4014: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n[; ;pic18f2550.h: 4053: extern volatile unsigned char PIE1 @ 0xF9D;\n\"4055\n[; ;pic18f2550.h: 4055: asm(\"PIE1 equ 0F9Dh\");\n[; <\" PIE1 equ 0F9Dh ;# \">\n[; ;pic18f2550.h: 4058: typedef union {\n[; ;pic18f2550.h: 4059: struct {\n[; ;pic18f2550.h: 4060: unsigned TMR1IE :1;\n[; ;pic18f2550.h: 4061: unsigned TMR2IE :1;\n[; ;pic18f2550.h: 4062: unsigned CCP1IE :1;\n[; ;pic18f2550.h: 4063: unsigned SSPIE :1;\n[; ;pic18f2550.h: 4064: unsigned TXIE :1;\n[; ;pic18f2550.h: 4065: unsigned RCIE :1;\n[; ;pic18f2550.h: 4066: unsigned ADIE :1;\n[; ;pic18f2550.h: 4067: };\n[; ;pic18f2550.h: 4068: struct {\n[; ;pic18f2550.h: 4069: unsigned :5;\n[; ;pic18f2550.h: 4070: unsigned RC1IE :1;\n[; ;pic18f2550.h: 4071: };\n[; ;pic18f2550.h: 4072: struct {\n[; ;pic18f2550.h: 4073: unsigned :4;\n[; ;pic18f2550.h: 4074: unsigned TX1IE :1;\n[; ;pic18f2550.h: 4075: };\n[; ;pic18f2550.h: 4076: } PIE1bits_t;\n[; ;pic18f2550.h: 4077: extern volatile PIE1bits_t PIE1bits @ 0xF9D;\n[; ;pic18f2550.h: 4126: extern volatile unsigned char PIR1 @ 0xF9E;\n\"4128\n[; ;pic18f2550.h: 4128: asm(\"PIR1 equ 0F9Eh\");\n[; <\" PIR1 equ 0F9Eh ;# \">\n[; ;pic18f2550.h: 4131: typedef union {\n[; ;pic18f2550.h: 4132: struct {\n[; ;pic18f2550.h: 4133: unsigned TMR1IF :1;\n[; ;pic18f2550.h: 4134: unsigned TMR2IF :1;\n[; ;pic18f2550.h: 4135: unsigned CCP1IF :1;\n[; ;pic18f2550.h: 4136: unsigned SSPIF :1;\n[; ;pic18f2550.h: 4137: unsigned TXIF :1;\n[; ;pic18f2550.h: 4138: unsigned RCIF :1;\n[; ;pic18f2550.h: 4139: unsigned ADIF :1;\n[; ;pic18f2550.h: 4140: };\n[; ;pic18f2550.h: 4141: struct {\n[; ;pic18f2550.h: 4142: unsigned :5;\n[; ;pic18f2550.h: 4143: unsigned RC1IF :1;\n[; ;pic18f2550.h: 4144: };\n[; ;pic18f2550.h: 4145: struct {\n[; ;pic18f2550.h: 4146: unsigned :4;\n[; ;pic18f2550.h: 4147: unsigned TX1IF :1;\n[; ;pic18f2550.h: 4148: };\n[; ;pic18f2550.h: 4149: } PIR1bits_t;\n[; ;pic18f2550.h: 4150: extern volatile PIR1bits_t PIR1bits @ 0xF9E;\n[; ;pic18f2550.h: 4199: extern volatile unsigned char IPR1 @ 0xF9F;\n\"4201\n[; ;pic18f2550.h: 4201: asm(\"IPR1 equ 0F9Fh\");\n[; <\" IPR1 equ 0F9Fh ;# \">\n[; ;pic18f2550.h: 4204: typedef union {\n[; ;pic18f2550.h: 4205: struct {\n[; ;pic18f2550.h: 4206: unsigned TMR1IP :1;\n[; ;pic18f2550.h: 4207: unsigned TMR2IP :1;\n[; ;pic18f2550.h: 4208: unsigned CCP1IP :1;\n[; ;pic18f2550.h: 4209: unsigned SSPIP :1;\n[; ;pic18f2550.h: 4210: unsigned TXIP :1;\n[; ;pic18f2550.h: 4211: unsigned RCIP :1;\n[; ;pic18f2550.h: 4212: unsigned ADIP :1;\n[; ;pic18f2550.h: 4213: };\n[; ;pic18f2550.h: 4214: struct {\n[; ;pic18f2550.h: 4215: unsigned :5;\n[; ;pic18f2550.h: 4216: unsigned RC1IP :1;\n[; ;pic18f2550.h: 4217: };\n[; ;pic18f2550.h: 4218: struct {\n[; ;pic18f2550.h: 4219: unsigned :4;\n[; ;pic18f2550.h: 4220: unsigned TX1IP :1;\n[; ;pic18f2550.h: 4221: };\n[; ;pic18f2550.h: 4222: } IPR1bits_t;\n[; ;pic18f2550.h: 4223: extern volatile IPR1bits_t IPR1bits @ 0xF9F;\n[; ;pic18f2550.h: 4272: extern volatile unsigned char PIE2 @ 0xFA0;\n\"4274\n[; ;pic18f2550.h: 4274: asm(\"PIE2 equ 0FA0h\");\n[; <\" PIE2 equ 0FA0h ;# \">\n[; ;pic18f2550.h: 4277: typedef union {\n[; ;pic18f2550.h: 4278: struct {\n[; ;pic18f2550.h: 4279: unsigned CCP2IE :1;\n[; ;pic18f2550.h: 4280: unsigned TMR3IE :1;\n[; ;pic18f2550.h: 4281: unsigned HLVDIE :1;\n[; ;pic18f2550.h: 4282: unsigned BCLIE :1;\n[; ;pic18f2550.h: 4283: unsigned EEIE :1;\n[; ;pic18f2550.h: 4284: unsigned USBIE :1;\n[; ;pic18f2550.h: 4285: unsigned CMIE :1;\n[; ;pic18f2550.h: 4286: unsigned OSCFIE :1;\n[; ;pic18f2550.h: 4287: };\n[; ;pic18f2550.h: 4288: struct {\n[; ;pic18f2550.h: 4289: unsigned :2;\n[; ;pic18f2550.h: 4290: unsigned LVDIE :1;\n[; ;pic18f2550.h: 4291: };\n[; ;pic18f2550.h: 4292: } PIE2bits_t;\n[; ;pic18f2550.h: 4293: extern volatile PIE2bits_t PIE2bits @ 0xFA0;\n[; ;pic18f2550.h: 4342: extern volatile unsigned char PIR2 @ 0xFA1;\n\"4344\n[; ;pic18f2550.h: 4344: asm(\"PIR2 equ 0FA1h\");\n[; <\" PIR2 equ 0FA1h ;# \">\n[; ;pic18f2550.h: 4347: typedef union {\n[; ;pic18f2550.h: 4348: struct {\n[; ;pic18f2550.h: 4349: unsigned CCP2IF :1;\n[; ;pic18f2550.h: 4350: unsigned TMR3IF :1;\n[; ;pic18f2550.h: 4351: unsigned HLVDIF :1;\n[; ;pic18f2550.h: 4352: unsigned BCLIF :1;\n[; ;pic18f2550.h: 4353: unsigned EEIF :1;\n[; ;pic18f2550.h: 4354: unsigned USBIF :1;\n[; ;pic18f2550.h: 4355: unsigned CMIF :1;\n[; ;pic18f2550.h: 4356: unsigned OSCFIF :1;\n[; ;pic18f2550.h: 4357: };\n[; ;pic18f2550.h: 4358: struct {\n[; ;pic18f2550.h: 4359: unsigned :2;\n[; ;pic18f2550.h: 4360: unsigned LVDIF :1;\n[; ;pic18f2550.h: 4361: };\n[; ;pic18f2550.h: 4362: } PIR2bits_t;\n[; ;pic18f2550.h: 4363: extern volatile PIR2bits_t PIR2bits @ 0xFA1;\n[; ;pic18f2550.h: 4412: extern volatile unsigned char IPR2 @ 0xFA2;\n\"4414\n[; ;pic18f2550.h: 4414: asm(\"IPR2 equ 0FA2h\");\n[; <\" IPR2 equ 0FA2h ;# \">\n[; ;pic18f2550.h: 4417: typedef union {\n[; ;pic18f2550.h: 4418: struct {\n[; ;pic18f2550.h: 4419: unsigned CCP2IP :1;\n[; ;pic18f2550.h: 4420: unsigned TMR3IP :1;\n[; ;pic18f2550.h: 4421: unsigned HLVDIP :1;\n[; ;pic18f2550.h: 4422: unsigned BCLIP :1;\n[; ;pic18f2550.h: 4423: unsigned EEIP :1;\n[; ;pic18f2550.h: 4424: unsigned USBIP :1;\n[; ;pic18f2550.h: 4425: unsigned CMIP :1;\n[; ;pic18f2550.h: 4426: unsigned OSCFIP :1;\n[; ;pic18f2550.h: 4427: };\n[; ;pic18f2550.h: 4428: struct {\n[; ;pic18f2550.h: 4429: unsigned :2;\n[; ;pic18f2550.h: 4430: unsigned LVDIP :1;\n[; ;pic18f2550.h: 4431: };\n[; ;pic18f2550.h: 4432: } IPR2bits_t;\n[; ;pic18f2550.h: 4433: extern volatile IPR2bits_t IPR2bits @ 0xFA2;\n[; ;pic18f2550.h: 4482: extern volatile unsigned char EECON1 @ 0xFA6;\n\"4484\n[; ;pic18f2550.h: 4484: asm(\"EECON1 equ 0FA6h\");\n[; <\" EECON1 equ 0FA6h ;# \">\n[; ;pic18f2550.h: 4487: typedef union {\n[; ;pic18f2550.h: 4488: struct {\n[; ;pic18f2550.h: 4489: unsigned RD :1;\n[; ;pic18f2550.h: 4490: unsigned WR :1;\n[; ;pic18f2550.h: 4491: unsigned WREN :1;\n[; ;pic18f2550.h: 4492: unsigned WRERR :1;\n[; ;pic18f2550.h: 4493: unsigned FREE :1;\n[; ;pic18f2550.h: 4494: unsigned :1;\n[; ;pic18f2550.h: 4495: unsigned CFGS :1;\n[; ;pic18f2550.h: 4496: unsigned EEPGD :1;\n[; ;pic18f2550.h: 4497: };\n[; ;pic18f2550.h: 4498: struct {\n[; ;pic18f2550.h: 4499: unsigned :6;\n[; ;pic18f2550.h: 4500: unsigned EEFS :1;\n[; ;pic18f2550.h: 4501: };\n[; ;pic18f2550.h: 4502: } EECON1bits_t;\n[; ;pic18f2550.h: 4503: extern volatile EECON1bits_t EECON1bits @ 0xFA6;\n[; ;pic18f2550.h: 4547: extern volatile unsigned char EECON2 @ 0xFA7;\n\"4549\n[; ;pic18f2550.h: 4549: asm(\"EECON2 equ 0FA7h\");\n[; <\" EECON2 equ 0FA7h ;# \">\n[; ;pic18f2550.h: 4553: extern volatile unsigned char EEDATA @ 0xFA8;\n\"4555\n[; ;pic18f2550.h: 4555: asm(\"EEDATA equ 0FA8h\");\n[; <\" EEDATA equ 0FA8h ;# \">\n[; ;pic18f2550.h: 4559: extern volatile unsigned char EEADR @ 0xFA9;\n\"4561\n[; ;pic18f2550.h: 4561: asm(\"EEADR equ 0FA9h\");\n[; <\" EEADR equ 0FA9h ;# \">\n[; ;pic18f2550.h: 4565: extern volatile unsigned char RCSTA @ 0xFAB;\n\"4567\n[; ;pic18f2550.h: 4567: asm(\"RCSTA equ 0FABh\");\n[; <\" RCSTA equ 0FABh ;# \">\n[; ;pic18f2550.h: 4570: extern volatile unsigned char RCSTA1 @ 0xFAB;\n\"4572\n[; ;pic18f2550.h: 4572: asm(\"RCSTA1 equ 0FABh\");\n[; <\" RCSTA1 equ 0FABh ;# \">\n[; ;pic18f2550.h: 4575: typedef union {\n[; ;pic18f2550.h: 4576: struct {\n[; ;pic18f2550.h: 4577: unsigned RX9D :1;\n[; ;pic18f2550.h: 4578: unsigned OERR :1;\n[; ;pic18f2550.h: 4579: unsigned FERR :1;\n[; ;pic18f2550.h: 4580: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4581: unsigned CREN :1;\n[; ;pic18f2550.h: 4582: unsigned SREN :1;\n[; ;pic18f2550.h: 4583: unsigned RX9 :1;\n[; ;pic18f2550.h: 4584: unsigned SPEN :1;\n[; ;pic18f2550.h: 4585: };\n[; ;pic18f2550.h: 4586: struct {\n[; ;pic18f2550.h: 4587: unsigned :3;\n[; ;pic18f2550.h: 4588: unsigned ADEN :1;\n[; ;pic18f2550.h: 4589: };\n[; ;pic18f2550.h: 4590: struct {\n[; ;pic18f2550.h: 4591: unsigned :5;\n[; ;pic18f2550.h: 4592: unsigned SRENA :1;\n[; ;pic18f2550.h: 4593: };\n[; ;pic18f2550.h: 4594: } RCSTAbits_t;\n[; ;pic18f2550.h: 4595: extern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n[; ;pic18f2550.h: 4648: typedef union {\n[; ;pic18f2550.h: 4649: struct {\n[; ;pic18f2550.h: 4650: unsigned RX9D :1;\n[; ;pic18f2550.h: 4651: unsigned OERR :1;\n[; ;pic18f2550.h: 4652: unsigned FERR :1;\n[; ;pic18f2550.h: 4653: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4654: unsigned CREN :1;\n[; ;pic18f2550.h: 4655: unsigned SREN :1;\n[; ;pic18f2550.h: 4656: unsigned RX9 :1;\n[; ;pic18f2550.h: 4657: unsigned SPEN :1;\n[; ;pic18f2550.h: 4658: };\n[; ;pic18f2550.h: 4659: struct {\n[; ;pic18f2550.h: 4660: unsigned :3;\n[; ;pic18f2550.h: 4661: unsigned ADEN :1;\n[; ;pic18f2550.h: 4662: };\n[; ;pic18f2550.h: 4663: struct {\n[; ;pic18f2550.h: 4664: unsigned :5;\n[; ;pic18f2550.h: 4665: unsigned SRENA :1;\n[; ;pic18f2550.h: 4666: };\n[; ;pic18f2550.h: 4667: } RCSTA1bits_t;\n[; ;pic18f2550.h: 4668: extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n[; ;pic18f2550.h: 4722: extern volatile unsigned char TXSTA @ 0xFAC;\n\"4724\n[; ;pic18f2550.h: 4724: asm(\"TXSTA equ 0FACh\");\n[; <\" TXSTA equ 0FACh ;# \">\n[; ;pic18f2550.h: 4727: extern volatile unsigned char TXSTA1 @ 0xFAC;\n\"4729\n[; ;pic18f2550.h: 4729: asm(\"TXSTA1 equ 0FACh\");\n[; <\" TXSTA1 equ 0FACh ;# \">\n[; ;pic18f2550.h: 4732: typedef union {\n[; ;pic18f2550.h: 4733: struct {\n[; ;pic18f2550.h: 4734: unsigned TX9D :1;\n[; ;pic18f2550.h: 4735: unsigned TRMT :1;\n[; ;pic18f2550.h: 4736: unsigned BRGH :1;\n[; ;pic18f2550.h: 4737: unsigned SENDB :1;\n[; ;pic18f2550.h: 4738: unsigned SYNC :1;\n[; ;pic18f2550.h: 4739: unsigned TXEN :1;\n[; ;pic18f2550.h: 4740: unsigned TX9 :1;\n[; ;pic18f2550.h: 4741: unsigned CSRC :1;\n[; ;pic18f2550.h: 4742: };\n[; ;pic18f2550.h: 4743: struct {\n[; ;pic18f2550.h: 4744: unsigned :2;\n[; ;pic18f2550.h: 4745: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4746: };\n[; ;pic18f2550.h: 4747: struct {\n[; ;pic18f2550.h: 4748: unsigned :7;\n[; ;pic18f2550.h: 4749: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4750: };\n[; ;pic18f2550.h: 4751: struct {\n[; ;pic18f2550.h: 4752: unsigned :3;\n[; ;pic18f2550.h: 4753: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4754: };\n[; ;pic18f2550.h: 4755: struct {\n[; ;pic18f2550.h: 4756: unsigned :4;\n[; ;pic18f2550.h: 4757: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4758: };\n[; ;pic18f2550.h: 4759: struct {\n[; ;pic18f2550.h: 4760: unsigned :1;\n[; ;pic18f2550.h: 4761: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4762: };\n[; ;pic18f2550.h: 4763: struct {\n[; ;pic18f2550.h: 4764: unsigned :6;\n[; ;pic18f2550.h: 4765: unsigned TX91 :1;\n[; ;pic18f2550.h: 4766: };\n[; ;pic18f2550.h: 4767: struct {\n[; ;pic18f2550.h: 4768: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4769: };\n[; ;pic18f2550.h: 4770: struct {\n[; ;pic18f2550.h: 4771: unsigned :5;\n[; ;pic18f2550.h: 4772: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4773: };\n[; ;pic18f2550.h: 4774: } TXSTAbits_t;\n[; ;pic18f2550.h: 4775: extern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n[; ;pic18f2550.h: 4858: typedef union {\n[; ;pic18f2550.h: 4859: struct {\n[; ;pic18f2550.h: 4860: unsigned TX9D :1;\n[; ;pic18f2550.h: 4861: unsigned TRMT :1;\n[; ;pic18f2550.h: 4862: unsigned BRGH :1;\n[; ;pic18f2550.h: 4863: unsigned SENDB :1;\n[; ;pic18f2550.h: 4864: unsigned SYNC :1;\n[; ;pic18f2550.h: 4865: unsigned TXEN :1;\n[; ;pic18f2550.h: 4866: unsigned TX9 :1;\n[; ;pic18f2550.h: 4867: unsigned CSRC :1;\n[; ;pic18f2550.h: 4868: };\n[; ;pic18f2550.h: 4869: struct {\n[; ;pic18f2550.h: 4870: unsigned :2;\n[; ;pic18f2550.h: 4871: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4872: };\n[; ;pic18f2550.h: 4873: struct {\n[; ;pic18f2550.h: 4874: unsigned :7;\n[; ;pic18f2550.h: 4875: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4876: };\n[; ;pic18f2550.h: 4877: struct {\n[; ;pic18f2550.h: 4878: unsigned :3;\n[; ;pic18f2550.h: 4879: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4880: };\n[; ;pic18f2550.h: 4881: struct {\n[; ;pic18f2550.h: 4882: unsigned :4;\n[; ;pic18f2550.h: 4883: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4884: };\n[; ;pic18f2550.h: 4885: struct {\n[; ;pic18f2550.h: 4886: unsigned :1;\n[; ;pic18f2550.h: 4887: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4888: };\n[; ;pic18f2550.h: 4889: struct {\n[; ;pic18f2550.h: 4890: unsigned :6;\n[; ;pic18f2550.h: 4891: unsigned TX91 :1;\n[; ;pic18f2550.h: 4892: };\n[; ;pic18f2550.h: 4893: struct {\n[; ;pic18f2550.h: 4894: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4895: };\n[; ;pic18f2550.h: 4896: struct {\n[; ;pic18f2550.h: 4897: unsigned :5;\n[; ;pic18f2550.h: 4898: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4899: };\n[; ;pic18f2550.h: 4900: } TXSTA1bits_t;\n[; ;pic18f2550.h: 4901: extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n[; ;pic18f2550.h: 4985: extern volatile unsigned char TXREG @ 0xFAD;\n\"4987\n[; ;pic18f2550.h: 4987: asm(\"TXREG equ 0FADh\");\n[; <\" TXREG equ 0FADh ;# \">\n[; ;pic18f2550.h: 4990: extern volatile unsigned char TXREG1 @ 0xFAD;\n\"4992\n[; ;pic18f2550.h: 4992: asm(\"TXREG1 equ 0FADh\");\n[; <\" TXREG1 equ 0FADh ;# \">\n[; ;pic18f2550.h: 4996: extern volatile unsigned char RCREG @ 0xFAE;\n\"4998\n[; ;pic18f2550.h: 4998: asm(\"RCREG equ 0FAEh\");\n[; <\" RCREG equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5001: extern volatile unsigned char RCREG1 @ 0xFAE;\n\"5003\n[; ;pic18f2550.h: 5003: asm(\"RCREG1 equ 0FAEh\");\n[; <\" RCREG1 equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5007: extern volatile unsigned char SPBRG @ 0xFAF;\n\"5009\n[; ;pic18f2550.h: 5009: asm(\"SPBRG equ 0FAFh\");\n[; <\" SPBRG equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5012: extern volatile unsigned char SPBRG1 @ 0xFAF;\n\"5014\n[; ;pic18f2550.h: 5014: asm(\"SPBRG1 equ 0FAFh\");\n[; <\" SPBRG1 equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5018: extern volatile unsigned char SPBRGH @ 0xFB0;\n\"5020\n[; ;pic18f2550.h: 5020: asm(\"SPBRGH equ 0FB0h\");\n[; <\" SPBRGH equ 0FB0h ;# \">\n[; ;pic18f2550.h: 5024: extern volatile unsigned char T3CON @ 0xFB1;\n\"5026\n[; ;pic18f2550.h: 5026: asm(\"T3CON equ 0FB1h\");\n[; <\" T3CON equ 0FB1h ;# \">\n[; ;pic18f2550.h: 5029: typedef union {\n[; ;pic18f2550.h: 5030: struct {\n[; ;pic18f2550.h: 5031: unsigned :2;\n[; ;pic18f2550.h: 5032: unsigned NOT_T3SYNC :1;\n[; ;pic18f2550.h: 5033: };\n[; ;pic18f2550.h: 5034: struct {\n[; ;pic18f2550.h: 5035: unsigned TMR3ON :1;\n[; ;pic18f2550.h: 5036: unsigned TMR3CS :1;\n[; ;pic18f2550.h: 5037: unsigned nT3SYNC :1;\n[; ;pic18f2550.h: 5038: unsigned T3CCP1 :1;\n[; ;pic18f2550.h: 5039: unsigned T3CKPS :2;\n[; ;pic18f2550.h: 5040: unsigned T3CCP2 :1;\n[; ;pic18f2550.h: 5041: unsigned RD16 :1;\n[; ;pic18f2550.h: 5042: };\n[; ;pic18f2550.h: 5043: struct {\n[; ;pic18f2550.h: 5044: unsigned :2;\n[; ;pic18f2550.h: 5045: unsigned T3SYNC :1;\n[; ;pic18f2550.h: 5046: unsigned :1;\n[; ;pic18f2550.h: 5047: unsigned T3CKPS0 :1;\n[; ;pic18f2550.h: 5048: unsigned T3CKPS1 :1;\n[; ;pic18f2550.h: 5049: };\n[; ;pic18f2550.h: 5050: struct {\n[; ;pic18f2550.h: 5051: unsigned :2;\n[; ;pic18f2550.h: 5052: unsigned T3NSYNC :1;\n[; ;pic18f2550.h: 5053: };\n[; ;pic18f2550.h: 5054: struct {\n[; ;pic18f2550.h: 5055: unsigned :7;\n[; ;pic18f2550.h: 5056: unsigned RD163 :1;\n[; ;pic18f2550.h: 5057: };\n[; ;pic18f2550.h: 5058: struct {\n[; ;pic18f2550.h: 5059: unsigned :3;\n[; ;pic18f2550.h: 5060: unsigned SOSCEN3 :1;\n[; ;pic18f2550.h: 5061: };\n[; ;pic18f2550.h: 5062: struct {\n[; ;pic18f2550.h: 5063: unsigned :7;\n[; ;pic18f2550.h: 5064: unsigned T3RD16 :1;\n[; ;pic18f2550.h: 5065: };\n[; ;pic18f2550.h: 5066: } T3CONbits_t;\n[; ;pic18f2550.h: 5067: extern volatile T3CONbits_t T3CONbits @ 0xFB1;\n[; ;pic18f2550.h: 5146: extern volatile unsigned short TMR3 @ 0xFB2;\n\"5148\n[; ;pic18f2550.h: 5148: asm(\"TMR3 equ 0FB2h\");\n[; <\" TMR3 equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5152: extern volatile unsigned char TMR3L @ 0xFB2;\n\"5154\n[; ;pic18f2550.h: 5154: asm(\"TMR3L equ 0FB2h\");\n[; <\" TMR3L equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5158: extern volatile unsigned char TMR3H @ 0xFB3;\n\"5160\n[; ;pic18f2550.h: 5160: asm(\"TMR3H equ 0FB3h\");\n[; <\" TMR3H equ 0FB3h ;# \">\n[; ;pic18f2550.h: 5164: extern volatile unsigned char CMCON @ 0xFB4;\n\"5166\n[; ;pic18f2550.h: 5166: asm(\"CMCON equ 0FB4h\");\n[; <\" CMCON equ 0FB4h ;# \">\n[; ;pic18f2550.h: 5169: typedef union {\n[; ;pic18f2550.h: 5170: struct {\n[; ;pic18f2550.h: 5171: unsigned CM :3;\n[; ;pic18f2550.h: 5172: unsigned CIS :1;\n[; ;pic18f2550.h: 5173: unsigned C1INV :1;\n[; ;pic18f2550.h: 5174: unsigned C2INV :1;\n[; ;pic18f2550.h: 5175: unsigned C1OUT :1;\n[; ;pic18f2550.h: 5176: unsigned C2OUT :1;\n[; ;pic18f2550.h: 5177: };\n[; ;pic18f2550.h: 5178: struct {\n[; ;pic18f2550.h: 5179: unsigned CM0 :1;\n[; ;pic18f2550.h: 5180: unsigned CM1 :1;\n[; ;pic18f2550.h: 5181: unsigned CM2 :1;\n[; ;pic18f2550.h: 5182: };\n[; ;pic18f2550.h: 5183: struct {\n[; ;pic18f2550.h: 5184: unsigned CMEN0 :1;\n[; ;pic18f2550.h: 5185: };\n[; ;pic18f2550.h: 5186: struct {\n[; ;pic18f2550.h: 5187: unsigned :1;\n[; ;pic18f2550.h: 5188: unsigned CMEN1 :1;\n[; ;pic18f2550.h: 5189: };\n[; ;pic18f2550.h: 5190: struct {\n[; ;pic18f2550.h: 5191: unsigned :2;\n[; ;pic18f2550.h: 5192: unsigned CMEN2 :1;\n[; ;pic18f2550.h: 5193: };\n[; ;pic18f2550.h: 5194: } CMCONbits_t;\n[; ;pic18f2550.h: 5195: extern volatile CMCONbits_t CMCONbits @ 0xFB4;\n[; ;pic18f2550.h: 5259: extern volatile unsigned char CVRCON @ 0xFB5;\n\"5261\n[; ;pic18f2550.h: 5261: asm(\"CVRCON equ 0FB5h\");\n[; <\" CVRCON equ 0FB5h ;# \">\n[; ;pic18f2550.h: 5264: typedef union {\n[; ;pic18f2550.h: 5265: struct {\n[; ;pic18f2550.h: 5266: unsigned CVR :4;\n[; ;pic18f2550.h: 5267: unsigned CVRSS :1;\n[; ;pic18f2550.h: 5268: unsigned CVRR :1;\n[; ;pic18f2550.h: 5269: unsigned CVROE :1;\n[; ;pic18f2550.h: 5270: unsigned CVREN :1;\n[; ;pic18f2550.h: 5271: };\n[; ;pic18f2550.h: 5272: struct {\n[; ;pic18f2550.h: 5273: unsigned CVR0 :1;\n[; ;pic18f2550.h: 5274: unsigned CVR1 :1;\n[; ;pic18f2550.h: 5275: unsigned CVR2 :1;\n[; ;pic18f2550.h: 5276: unsigned CVR3 :1;\n[; ;pic18f2550.h: 5277: unsigned CVREF :1;\n[; ;pic18f2550.h: 5278: };\n[; ;pic18f2550.h: 5279: struct {\n[; ;pic18f2550.h: 5280: unsigned :6;\n[; ;pic18f2550.h: 5281: unsigned CVROEN :1;\n[; ;pic18f2550.h: 5282: };\n[; ;pic18f2550.h: 5283: } CVRCONbits_t;\n[; ;pic18f2550.h: 5284: extern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n[; ;pic18f2550.h: 5343: extern volatile unsigned char ECCP1AS @ 0xFB6;\n\"5345\n[; ;pic18f2550.h: 5345: asm(\"ECCP1AS equ 0FB6h\");\n[; <\" ECCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5348: extern volatile unsigned char CCP1AS @ 0xFB6;\n\"5350\n[; ;pic18f2550.h: 5350: asm(\"CCP1AS equ 0FB6h\");\n[; <\" CCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5353: typedef union {\n[; ;pic18f2550.h: 5354: struct {\n[; ;pic18f2550.h: 5355: unsigned :2;\n[; ;pic18f2550.h: 5356: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5357: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5358: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5359: };\n[; ;pic18f2550.h: 5360: struct {\n[; ;pic18f2550.h: 5361: unsigned :2;\n[; ;pic18f2550.h: 5362: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5363: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5364: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5365: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5366: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5367: };\n[; ;pic18f2550.h: 5368: } ECCP1ASbits_t;\n[; ;pic18f2550.h: 5369: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5412: typedef union {\n[; ;pic18f2550.h: 5413: struct {\n[; ;pic18f2550.h: 5414: unsigned :2;\n[; ;pic18f2550.h: 5415: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5416: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5417: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5418: };\n[; ;pic18f2550.h: 5419: struct {\n[; ;pic18f2550.h: 5420: unsigned :2;\n[; ;pic18f2550.h: 5421: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5422: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5423: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5424: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5425: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5426: };\n[; ;pic18f2550.h: 5427: } CCP1ASbits_t;\n[; ;pic18f2550.h: 5428: extern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5472: extern volatile unsigned char ECCP1DEL @ 0xFB7;\n\"5474\n[; ;pic18f2550.h: 5474: asm(\"ECCP1DEL equ 0FB7h\");\n[; <\" ECCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5477: extern volatile unsigned char CCP1DEL @ 0xFB7;\n\"5479\n[; ;pic18f2550.h: 5479: asm(\"CCP1DEL equ 0FB7h\");\n[; <\" CCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5482: typedef union {\n[; ;pic18f2550.h: 5483: struct {\n[; ;pic18f2550.h: 5484: unsigned :7;\n[; ;pic18f2550.h: 5485: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5486: };\n[; ;pic18f2550.h: 5487: } ECCP1DELbits_t;\n[; ;pic18f2550.h: 5488: extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5496: typedef union {\n[; ;pic18f2550.h: 5497: struct {\n[; ;pic18f2550.h: 5498: unsigned :7;\n[; ;pic18f2550.h: 5499: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5500: };\n[; ;pic18f2550.h: 5501: } CCP1DELbits_t;\n[; ;pic18f2550.h: 5502: extern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5511: extern volatile unsigned char BAUDCON @ 0xFB8;\n\"5513\n[; ;pic18f2550.h: 5513: asm(\"BAUDCON equ 0FB8h\");\n[; <\" BAUDCON equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5516: extern volatile unsigned char BAUDCTL @ 0xFB8;\n\"5518\n[; ;pic18f2550.h: 5518: asm(\"BAUDCTL equ 0FB8h\");\n[; <\" BAUDCTL equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5521: typedef union {\n[; ;pic18f2550.h: 5522: struct {\n[; ;pic18f2550.h: 5523: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5524: unsigned WUE :1;\n[; ;pic18f2550.h: 5525: unsigned :1;\n[; ;pic18f2550.h: 5526: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5527: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5528: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5529: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5530: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5531: };\n[; ;pic18f2550.h: 5532: struct {\n[; ;pic18f2550.h: 5533: unsigned :4;\n[; ;pic18f2550.h: 5534: unsigned SCKP :1;\n[; ;pic18f2550.h: 5535: unsigned :1;\n[; ;pic18f2550.h: 5536: unsigned RCMT :1;\n[; ;pic18f2550.h: 5537: };\n[; ;pic18f2550.h: 5538: struct {\n[; ;pic18f2550.h: 5539: unsigned :5;\n[; ;pic18f2550.h: 5540: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5541: };\n[; ;pic18f2550.h: 5542: struct {\n[; ;pic18f2550.h: 5543: unsigned :1;\n[; ;pic18f2550.h: 5544: unsigned W4E :1;\n[; ;pic18f2550.h: 5545: };\n[; ;pic18f2550.h: 5546: } BAUDCONbits_t;\n[; ;pic18f2550.h: 5547: extern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n[; ;pic18f2550.h: 5605: typedef union {\n[; ;pic18f2550.h: 5606: struct {\n[; ;pic18f2550.h: 5607: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5608: unsigned WUE :1;\n[; ;pic18f2550.h: 5609: unsigned :1;\n[; ;pic18f2550.h: 5610: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5611: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5612: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5613: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5614: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5615: };\n[; ;pic18f2550.h: 5616: struct {\n[; ;pic18f2550.h: 5617: unsigned :4;\n[; ;pic18f2550.h: 5618: unsigned SCKP :1;\n[; ;pic18f2550.h: 5619: unsigned :1;\n[; ;pic18f2550.h: 5620: unsigned RCMT :1;\n[; ;pic18f2550.h: 5621: };\n[; ;pic18f2550.h: 5622: struct {\n[; ;pic18f2550.h: 5623: unsigned :5;\n[; ;pic18f2550.h: 5624: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5625: };\n[; ;pic18f2550.h: 5626: struct {\n[; ;pic18f2550.h: 5627: unsigned :1;\n[; ;pic18f2550.h: 5628: unsigned W4E :1;\n[; ;pic18f2550.h: 5629: };\n[; ;pic18f2550.h: 5630: } BAUDCTLbits_t;\n[; ;pic18f2550.h: 5631: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n[; ;pic18f2550.h: 5690: extern volatile unsigned char CCP2CON @ 0xFBA;\n\"5692\n[; ;pic18f2550.h: 5692: asm(\"CCP2CON equ 0FBAh\");\n[; <\" CCP2CON equ 0FBAh ;# \">\n[; ;pic18f2550.h: 5695: typedef union {\n[; ;pic18f2550.h: 5696: struct {\n[; ;pic18f2550.h: 5697: unsigned CCP2M :4;\n[; ;pic18f2550.h: 5698: unsigned DC2B :2;\n[; ;pic18f2550.h: 5699: };\n[; ;pic18f2550.h: 5700: struct {\n[; ;pic18f2550.h: 5701: unsigned CCP2M0 :1;\n[; ;pic18f2550.h: 5702: unsigned CCP2M1 :1;\n[; ;pic18f2550.h: 5703: unsigned CCP2M2 :1;\n[; ;pic18f2550.h: 5704: unsigned CCP2M3 :1;\n[; ;pic18f2550.h: 5705: unsigned DC2B0 :1;\n[; ;pic18f2550.h: 5706: unsigned DC2B1 :1;\n[; ;pic18f2550.h: 5707: };\n[; ;pic18f2550.h: 5708: } CCP2CONbits_t;\n[; ;pic18f2550.h: 5709: extern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n[; ;pic18f2550.h: 5753: extern volatile unsigned short CCPR2 @ 0xFBB;\n\"5755\n[; ;pic18f2550.h: 5755: asm(\"CCPR2 equ 0FBBh\");\n[; <\" CCPR2 equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5759: extern volatile unsigned char CCPR2L @ 0xFBB;\n\"5761\n[; ;pic18f2550.h: 5761: asm(\"CCPR2L equ 0FBBh\");\n[; <\" CCPR2L equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5765: extern volatile unsigned char CCPR2H @ 0xFBC;\n\"5767\n[; ;pic18f2550.h: 5767: asm(\"CCPR2H equ 0FBCh\");\n[; <\" CCPR2H equ 0FBCh ;# \">\n[; ;pic18f2550.h: 5771: extern volatile unsigned char CCP1CON @ 0xFBD;\n\"5773\n[; ;pic18f2550.h: 5773: asm(\"CCP1CON equ 0FBDh\");\n[; <\" CCP1CON equ 0FBDh ;# \">\n[; ;pic18f2550.h: 5776: typedef union {\n[; ;pic18f2550.h: 5777: struct {\n[; ;pic18f2550.h: 5778: unsigned CCP1M :4;\n[; ;pic18f2550.h: 5779: unsigned DC1B :2;\n[; ;pic18f2550.h: 5780: };\n[; ;pic18f2550.h: 5781: struct {\n[; ;pic18f2550.h: 5782: unsigned CCP1M0 :1;\n[; ;pic18f2550.h: 5783: unsigned CCP1M1 :1;\n[; ;pic18f2550.h: 5784: unsigned CCP1M2 :1;\n[; ;pic18f2550.h: 5785: unsigned CCP1M3 :1;\n[; ;pic18f2550.h: 5786: unsigned DC1B0 :1;\n[; ;pic18f2550.h: 5787: unsigned DC1B1 :1;\n[; ;pic18f2550.h: 5788: };\n[; ;pic18f2550.h: 5789: } CCP1CONbits_t;\n[; ;pic18f2550.h: 5790: extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n[; ;pic18f2550.h: 5834: extern volatile unsigned short CCPR1 @ 0xFBE;\n\"5836\n[; ;pic18f2550.h: 5836: asm(\"CCPR1 equ 0FBEh\");\n[; <\" CCPR1 equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5840: extern volatile unsigned char CCPR1L @ 0xFBE;\n\"5842\n[; ;pic18f2550.h: 5842: asm(\"CCPR1L equ 0FBEh\");\n[; <\" CCPR1L equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5846: extern volatile unsigned char CCPR1H @ 0xFBF;\n\"5848\n[; ;pic18f2550.h: 5848: asm(\"CCPR1H equ 0FBFh\");\n[; <\" CCPR1H equ 0FBFh ;# \">\n[; ;pic18f2550.h: 5852: extern volatile unsigned char ADCON2 @ 0xFC0;\n\"5854\n[; ;pic18f2550.h: 5854: asm(\"ADCON2 equ 0FC0h\");\n[; <\" ADCON2 equ 0FC0h ;# \">\n[; ;pic18f2550.h: 5857: typedef union {\n[; ;pic18f2550.h: 5858: struct {\n[; ;pic18f2550.h: 5859: unsigned ADCS :3;\n[; ;pic18f2550.h: 5860: unsigned ACQT :3;\n[; ;pic18f2550.h: 5861: unsigned :1;\n[; ;pic18f2550.h: 5862: unsigned ADFM :1;\n[; ;pic18f2550.h: 5863: };\n[; ;pic18f2550.h: 5864: struct {\n[; ;pic18f2550.h: 5865: unsigned ADCS0 :1;\n[; ;pic18f2550.h: 5866: unsigned ADCS1 :1;\n[; ;pic18f2550.h: 5867: unsigned ADCS2 :1;\n[; ;pic18f2550.h: 5868: unsigned ACQT0 :1;\n[; ;pic18f2550.h: 5869: unsigned ACQT1 :1;\n[; ;pic18f2550.h: 5870: unsigned ACQT2 :1;\n[; ;pic18f2550.h: 5871: };\n[; ;pic18f2550.h: 5872: } ADCON2bits_t;\n[; ;pic18f2550.h: 5873: extern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n[; ;pic18f2550.h: 5922: extern volatile unsigned char ADCON1 @ 0xFC1;\n\"5924\n[; ;pic18f2550.h: 5924: asm(\"ADCON1 equ 0FC1h\");\n[; <\" ADCON1 equ 0FC1h ;# \">\n[; ;pic18f2550.h: 5927: typedef union {\n[; ;pic18f2550.h: 5928: struct {\n[; ;pic18f2550.h: 5929: unsigned PCFG :4;\n[; ;pic18f2550.h: 5930: unsigned VCFG :2;\n[; ;pic18f2550.h: 5931: };\n[; ;pic18f2550.h: 5932: struct {\n[; ;pic18f2550.h: 5933: unsigned PCFG0 :1;\n[; ;pic18f2550.h: 5934: unsigned PCFG1 :1;\n[; ;pic18f2550.h: 5935: unsigned PCFG2 :1;\n[; ;pic18f2550.h: 5936: unsigned PCFG3 :1;\n[; ;pic18f2550.h: 5937: unsigned VCFG0 :1;\n[; ;pic18f2550.h: 5938: unsigned VCFG1 :1;\n[; ;pic18f2550.h: 5939: };\n[; ;pic18f2550.h: 5940: struct {\n[; ;pic18f2550.h: 5941: unsigned :3;\n[; ;pic18f2550.h: 5942: unsigned CHSN3 :1;\n[; ;pic18f2550.h: 5943: };\n[; ;pic18f2550.h: 5944: struct {\n[; ;pic18f2550.h: 5945: unsigned :4;\n[; ;pic18f2550.h: 5946: unsigned VCFG01 :1;\n[; ;pic18f2550.h: 5947: };\n[; ;pic18f2550.h: 5948: struct {\n[; ;pic18f2550.h: 5949: unsigned :5;\n[; ;pic18f2550.h: 5950: unsigned VCFG11 :1;\n[; ;pic18f2550.h: 5951: };\n[; ;pic18f2550.h: 5952: } ADCON1bits_t;\n[; ;pic18f2550.h: 5953: extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n[; ;pic18f2550.h: 6012: extern volatile unsigned char ADCON0 @ 0xFC2;\n\"6014\n[; ;pic18f2550.h: 6014: asm(\"ADCON0 equ 0FC2h\");\n[; <\" ADCON0 equ 0FC2h ;# \">\n[; ;pic18f2550.h: 6017: typedef union {\n[; ;pic18f2550.h: 6018: struct {\n[; ;pic18f2550.h: 6019: unsigned :1;\n[; ;pic18f2550.h: 6020: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6021: };\n[; ;pic18f2550.h: 6022: struct {\n[; ;pic18f2550.h: 6023: unsigned ADON :1;\n[; ;pic18f2550.h: 6024: unsigned GO_nDONE :1;\n[; ;pic18f2550.h: 6025: unsigned CHS :4;\n[; ;pic18f2550.h: 6026: };\n[; ;pic18f2550.h: 6027: struct {\n[; ;pic18f2550.h: 6028: unsigned :1;\n[; ;pic18f2550.h: 6029: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6030: };\n[; ;pic18f2550.h: 6031: struct {\n[; ;pic18f2550.h: 6032: unsigned :1;\n[; ;pic18f2550.h: 6033: unsigned GO_DONE :1;\n[; ;pic18f2550.h: 6034: unsigned CHS0 :1;\n[; ;pic18f2550.h: 6035: unsigned CHS1 :1;\n[; ;pic18f2550.h: 6036: unsigned CHS2 :1;\n[; ;pic18f2550.h: 6037: unsigned CHS3 :1;\n[; ;pic18f2550.h: 6038: };\n[; ;pic18f2550.h: 6039: struct {\n[; ;pic18f2550.h: 6040: unsigned :1;\n[; ;pic18f2550.h: 6041: unsigned DONE :1;\n[; ;pic18f2550.h: 6042: };\n[; ;pic18f2550.h: 6043: struct {\n[; ;pic18f2550.h: 6044: unsigned :1;\n[; ;pic18f2550.h: 6045: unsigned GO :1;\n[; ;pic18f2550.h: 6046: };\n[; ;pic18f2550.h: 6047: struct {\n[; ;pic18f2550.h: 6048: unsigned :1;\n[; ;pic18f2550.h: 6049: unsigned NOT_DONE :1;\n[; ;pic18f2550.h: 6050: };\n[; ;pic18f2550.h: 6051: struct {\n[; ;pic18f2550.h: 6052: unsigned :1;\n[; ;pic18f2550.h: 6053: unsigned nDONE :1;\n[; ;pic18f2550.h: 6054: };\n[; ;pic18f2550.h: 6055: struct {\n[; ;pic18f2550.h: 6056: unsigned :1;\n[; ;pic18f2550.h: 6057: unsigned GODONE :1;\n[; ;pic18f2550.h: 6058: };\n[; ;pic18f2550.h: 6059: } ADCON0bits_t;\n[; ;pic18f2550.h: 6060: extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n[; ;pic18f2550.h: 6134: extern volatile unsigned short ADRES @ 0xFC3;\n\"6136\n[; ;pic18f2550.h: 6136: asm(\"ADRES equ 0FC3h\");\n[; <\" ADRES equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6140: extern volatile unsigned char ADRESL @ 0xFC3;\n\"6142\n[; ;pic18f2550.h: 6142: asm(\"ADRESL equ 0FC3h\");\n[; <\" ADRESL equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6146: extern volatile unsigned char ADRESH @ 0xFC4;\n\"6148\n[; ;pic18f2550.h: 6148: asm(\"ADRESH equ 0FC4h\");\n[; <\" ADRESH equ 0FC4h ;# \">\n[; ;pic18f2550.h: 6152: extern volatile unsigned char SSPCON2 @ 0xFC5;\n\"6154\n[; ;pic18f2550.h: 6154: asm(\"SSPCON2 equ 0FC5h\");\n[; <\" SSPCON2 equ 0FC5h ;# \">\n[; ;pic18f2550.h: 6157: typedef union {\n[; ;pic18f2550.h: 6158: struct {\n[; ;pic18f2550.h: 6159: unsigned SEN :1;\n[; ;pic18f2550.h: 6160: unsigned RSEN :1;\n[; ;pic18f2550.h: 6161: unsigned PEN :1;\n[; ;pic18f2550.h: 6162: unsigned RCEN :1;\n[; ;pic18f2550.h: 6163: unsigned ACKEN :1;\n[; ;pic18f2550.h: 6164: unsigned ACKDT :1;\n[; ;pic18f2550.h: 6165: unsigned ACKSTAT :1;\n[; ;pic18f2550.h: 6166: unsigned GCEN :1;\n[; ;pic18f2550.h: 6167: };\n[; ;pic18f2550.h: 6168: } SSPCON2bits_t;\n[; ;pic18f2550.h: 6169: extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n[; ;pic18f2550.h: 6213: extern volatile unsigned char SSPCON1 @ 0xFC6;\n\"6215\n[; ;pic18f2550.h: 6215: asm(\"SSPCON1 equ 0FC6h\");\n[; <\" SSPCON1 equ 0FC6h ;# \">\n[; ;pic18f2550.h: 6218: typedef union {\n[; ;pic18f2550.h: 6219: struct {\n[; ;pic18f2550.h: 6220: unsigned SSPM :4;\n[; ;pic18f2550.h: 6221: unsigned CKP :1;\n[; ;pic18f2550.h: 6222: unsigned SSPEN :1;\n[; ;pic18f2550.h: 6223: unsigned SSPOV :1;\n[; ;pic18f2550.h: 6224: unsigned WCOL :1;\n[; ;pic18f2550.h: 6225: };\n[; ;pic18f2550.h: 6226: struct {\n[; ;pic18f2550.h: 6227: unsigned SSPM0 :1;\n[; ;pic18f2550.h: 6228: unsigned SSPM1 :1;\n[; ;pic18f2550.h: 6229: unsigned SSPM2 :1;\n[; ;pic18f2550.h: 6230: unsigned SSPM3 :1;\n[; ;pic18f2550.h: 6231: };\n[; ;pic18f2550.h: 6232: } SSPCON1bits_t;\n[; ;pic18f2550.h: 6233: extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n[; ;pic18f2550.h: 6282: extern volatile unsigned char SSPSTAT @ 0xFC7;\n\"6284\n[; ;pic18f2550.h: 6284: asm(\"SSPSTAT equ 0FC7h\");\n[; <\" SSPSTAT equ 0FC7h ;# \">\n[; ;pic18f2550.h: 6287: typedef union {\n[; ;pic18f2550.h: 6288: struct {\n[; ;pic18f2550.h: 6289: unsigned :2;\n[; ;pic18f2550.h: 6290: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6291: };\n[; ;pic18f2550.h: 6292: struct {\n[; ;pic18f2550.h: 6293: unsigned :5;\n[; ;pic18f2550.h: 6294: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6295: };\n[; ;pic18f2550.h: 6296: struct {\n[; ;pic18f2550.h: 6297: unsigned BF :1;\n[; ;pic18f2550.h: 6298: unsigned UA :1;\n[; ;pic18f2550.h: 6299: unsigned R_nW :1;\n[; ;pic18f2550.h: 6300: unsigned S :1;\n[; ;pic18f2550.h: 6301: unsigned P :1;\n[; ;pic18f2550.h: 6302: unsigned D_nA :1;\n[; ;pic18f2550.h: 6303: unsigned CKE :1;\n[; ;pic18f2550.h: 6304: unsigned SMP :1;\n[; ;pic18f2550.h: 6305: };\n[; ;pic18f2550.h: 6306: struct {\n[; ;pic18f2550.h: 6307: unsigned :2;\n[; ;pic18f2550.h: 6308: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6309: };\n[; ;pic18f2550.h: 6310: struct {\n[; ;pic18f2550.h: 6311: unsigned :5;\n[; ;pic18f2550.h: 6312: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6313: };\n[; ;pic18f2550.h: 6314: struct {\n[; ;pic18f2550.h: 6315: unsigned :2;\n[; ;pic18f2550.h: 6316: unsigned R_W :1;\n[; ;pic18f2550.h: 6317: unsigned :2;\n[; ;pic18f2550.h: 6318: unsigned D_A :1;\n[; ;pic18f2550.h: 6319: };\n[; ;pic18f2550.h: 6320: struct {\n[; ;pic18f2550.h: 6321: unsigned :2;\n[; ;pic18f2550.h: 6322: unsigned I2C_READ :1;\n[; ;pic18f2550.h: 6323: unsigned I2C_START :1;\n[; ;pic18f2550.h: 6324: unsigned I2C_STOP :1;\n[; ;pic18f2550.h: 6325: unsigned I2C_DAT :1;\n[; ;pic18f2550.h: 6326: };\n[; ;pic18f2550.h: 6327: struct {\n[; ;pic18f2550.h: 6328: unsigned :2;\n[; ;pic18f2550.h: 6329: unsigned nW :1;\n[; ;pic18f2550.h: 6330: unsigned :2;\n[; ;pic18f2550.h: 6331: unsigned nA :1;\n[; ;pic18f2550.h: 6332: };\n[; ;pic18f2550.h: 6333: struct {\n[; ;pic18f2550.h: 6334: unsigned :2;\n[; ;pic18f2550.h: 6335: unsigned NOT_WRITE :1;\n[; ;pic18f2550.h: 6336: };\n[; ;pic18f2550.h: 6337: struct {\n[; ;pic18f2550.h: 6338: unsigned :5;\n[; ;pic18f2550.h: 6339: unsigned NOT_ADDRESS :1;\n[; ;pic18f2550.h: 6340: };\n[; ;pic18f2550.h: 6341: struct {\n[; ;pic18f2550.h: 6342: unsigned :2;\n[; ;pic18f2550.h: 6343: unsigned nWRITE :1;\n[; ;pic18f2550.h: 6344: unsigned :2;\n[; ;pic18f2550.h: 6345: unsigned nADDRESS :1;\n[; ;pic18f2550.h: 6346: };\n[; ;pic18f2550.h: 6347: struct {\n[; ;pic18f2550.h: 6348: unsigned :2;\n[; ;pic18f2550.h: 6349: unsigned READ_WRITE :1;\n[; ;pic18f2550.h: 6350: unsigned :2;\n[; ;pic18f2550.h: 6351: unsigned DATA_ADDRESS :1;\n[; ;pic18f2550.h: 6352: };\n[; ;pic18f2550.h: 6353: struct {\n[; ;pic18f2550.h: 6354: unsigned :2;\n[; ;pic18f2550.h: 6355: unsigned R :1;\n[; ;pic18f2550.h: 6356: unsigned :2;\n[; ;pic18f2550.h: 6357: unsigned D :1;\n[; ;pic18f2550.h: 6358: };\n[; ;pic18f2550.h: 6359: struct {\n[; ;pic18f2550.h: 6360: unsigned :5;\n[; ;pic18f2550.h: 6361: unsigned DA :1;\n[; ;pic18f2550.h: 6362: };\n[; ;pic18f2550.h: 6363: struct {\n[; ;pic18f2550.h: 6364: unsigned :2;\n[; ;pic18f2550.h: 6365: unsigned RW :1;\n[; ;pic18f2550.h: 6366: };\n[; ;pic18f2550.h: 6367: struct {\n[; ;pic18f2550.h: 6368: unsigned :3;\n[; ;pic18f2550.h: 6369: unsigned START :1;\n[; ;pic18f2550.h: 6370: };\n[; ;pic18f2550.h: 6371: struct {\n[; ;pic18f2550.h: 6372: unsigned :4;\n[; ;pic18f2550.h: 6373: unsigned STOP :1;\n[; ;pic18f2550.h: 6374: };\n[; ;pic18f2550.h: 6375: struct {\n[; ;pic18f2550.h: 6376: unsigned :2;\n[; ;pic18f2550.h: 6377: unsigned NOT_W :1;\n[; ;pic18f2550.h: 6378: };\n[; ;pic18f2550.h: 6379: struct {\n[; ;pic18f2550.h: 6380: unsigned :5;\n[; ;pic18f2550.h: 6381: unsigned NOT_A :1;\n[; ;pic18f2550.h: 6382: };\n[; ;pic18f2550.h: 6383: } SSPSTATbits_t;\n[; ;pic18f2550.h: 6384: extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n[; ;pic18f2550.h: 6548: extern volatile unsigned char SSPADD @ 0xFC8;\n\"6550\n[; ;pic18f2550.h: 6550: asm(\"SSPADD equ 0FC8h\");\n[; <\" SSPADD equ 0FC8h ;# \">\n[; ;pic18f2550.h: 6554: extern volatile unsigned char SSPBUF @ 0xFC9;\n\"6556\n[; ;pic18f2550.h: 6556: asm(\"SSPBUF equ 0FC9h\");\n[; <\" SSPBUF equ 0FC9h ;# \">\n[; ;pic18f2550.h: 6560: extern volatile unsigned char T2CON @ 0xFCA;\n\"6562\n[; ;pic18f2550.h: 6562: asm(\"T2CON equ 0FCAh\");\n[; <\" T2CON equ 0FCAh ;# \">\n[; ;pic18f2550.h: 6565: typedef union {\n[; ;pic18f2550.h: 6566: struct {\n[; ;pic18f2550.h: 6567: unsigned T2CKPS :2;\n[; ;pic18f2550.h: 6568: unsigned TMR2ON :1;\n[; ;pic18f2550.h: 6569: unsigned TOUTPS :4;\n[; ;pic18f2550.h: 6570: };\n[; ;pic18f2550.h: 6571: struct {\n[; ;pic18f2550.h: 6572: unsigned T2CKPS0 :1;\n[; ;pic18f2550.h: 6573: unsigned T2CKPS1 :1;\n[; ;pic18f2550.h: 6574: unsigned :1;\n[; ;pic18f2550.h: 6575: unsigned T2OUTPS0 :1;\n[; ;pic18f2550.h: 6576: unsigned T2OUTPS1 :1;\n[; ;pic18f2550.h: 6577: unsigned T2OUTPS2 :1;\n[; ;pic18f2550.h: 6578: unsigned T2OUTPS3 :1;\n[; ;pic18f2550.h: 6579: };\n[; ;pic18f2550.h: 6580: struct {\n[; ;pic18f2550.h: 6581: unsigned :3;\n[; ;pic18f2550.h: 6582: unsigned TOUTPS0 :1;\n[; ;pic18f2550.h: 6583: unsigned TOUTPS1 :1;\n[; ;pic18f2550.h: 6584: unsigned TOUTPS2 :1;\n[; ;pic18f2550.h: 6585: unsigned TOUTPS3 :1;\n[; ;pic18f2550.h: 6586: };\n[; ;pic18f2550.h: 6587: } T2CONbits_t;\n[; ;pic18f2550.h: 6588: extern volatile T2CONbits_t T2CONbits @ 0xFCA;\n[; ;pic18f2550.h: 6657: extern volatile unsigned char PR2 @ 0xFCB;\n\"6659\n[; ;pic18f2550.h: 6659: asm(\"PR2 equ 0FCBh\");\n[; <\" PR2 equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6662: extern volatile unsigned char MEMCON @ 0xFCB;\n\"6664\n[; ;pic18f2550.h: 6664: asm(\"MEMCON equ 0FCBh\");\n[; <\" MEMCON equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6668: extern volatile unsigned char TMR2 @ 0xFCC;\n\"6670\n[; ;pic18f2550.h: 6670: asm(\"TMR2 equ 0FCCh\");\n[; <\" TMR2 equ 0FCCh ;# \">\n[; ;pic18f2550.h: 6674: extern volatile unsigned char T1CON @ 0xFCD;\n\"6676\n[; ;pic18f2550.h: 6676: asm(\"T1CON equ 0FCDh\");\n[; <\" T1CON equ 0FCDh ;# \">\n[; ;pic18f2550.h: 6679: typedef union {\n[; ;pic18f2550.h: 6680: struct {\n[; ;pic18f2550.h: 6681: unsigned :2;\n[; ;pic18f2550.h: 6682: unsigned NOT_T1SYNC :1;\n[; ;pic18f2550.h: 6683: };\n[; ;pic18f2550.h: 6684: struct {\n[; ;pic18f2550.h: 6685: unsigned TMR1ON :1;\n[; ;pic18f2550.h: 6686: unsigned TMR1CS :1;\n[; ;pic18f2550.h: 6687: unsigned nT1SYNC :1;\n[; ;pic18f2550.h: 6688: unsigned T1OSCEN :1;\n[; ;pic18f2550.h: 6689: unsigned T1CKPS :2;\n[; ;pic18f2550.h: 6690: unsigned T1RUN :1;\n[; ;pic18f2550.h: 6691: unsigned RD16 :1;\n[; ;pic18f2550.h: 6692: };\n[; ;pic18f2550.h: 6693: struct {\n[; ;pic18f2550.h: 6694: unsigned :2;\n[; ;pic18f2550.h: 6695: unsigned T1SYNC :1;\n[; ;pic18f2550.h: 6696: unsigned :1;\n[; ;pic18f2550.h: 6697: unsigned T1CKPS0 :1;\n[; ;pic18f2550.h: 6698: unsigned T1CKPS1 :1;\n[; ;pic18f2550.h: 6699: };\n[; ;pic18f2550.h: 6700: struct {\n[; ;pic18f2550.h: 6701: unsigned :3;\n[; ;pic18f2550.h: 6702: unsigned SOSCEN :1;\n[; ;pic18f2550.h: 6703: };\n[; ;pic18f2550.h: 6704: struct {\n[; ;pic18f2550.h: 6705: unsigned :7;\n[; ;pic18f2550.h: 6706: unsigned T1RD16 :1;\n[; ;pic18f2550.h: 6707: };\n[; ;pic18f2550.h: 6708: } T1CONbits_t;\n[; ;pic18f2550.h: 6709: extern volatile T1CONbits_t T1CONbits @ 0xFCD;\n[; ;pic18f2550.h: 6778: extern volatile unsigned short TMR1 @ 0xFCE;\n\"6780\n[; ;pic18f2550.h: 6780: asm(\"TMR1 equ 0FCEh\");\n[; <\" TMR1 equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6784: extern volatile unsigned char TMR1L @ 0xFCE;\n\"6786\n[; ;pic18f2550.h: 6786: asm(\"TMR1L equ 0FCEh\");\n[; <\" TMR1L equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6790: extern volatile unsigned char TMR1H @ 0xFCF;\n\"6792\n[; ;pic18f2550.h: 6792: asm(\"TMR1H equ 0FCFh\");\n[; <\" TMR1H equ 0FCFh ;# \">\n[; ;pic18f2550.h: 6796: extern volatile unsigned char RCON @ 0xFD0;\n\"6798\n[; ;pic18f2550.h: 6798: asm(\"RCON equ 0FD0h\");\n[; <\" RCON equ 0FD0h ;# \">\n[; ;pic18f2550.h: 6801: typedef union {\n[; ;pic18f2550.h: 6802: struct {\n[; ;pic18f2550.h: 6803: unsigned NOT_BOR :1;\n[; ;pic18f2550.h: 6804: };\n[; ;pic18f2550.h: 6805: struct {\n[; ;pic18f2550.h: 6806: unsigned :1;\n[; ;pic18f2550.h: 6807: unsigned NOT_POR :1;\n[; ;pic18f2550.h: 6808: };\n[; ;pic18f2550.h: 6809: struct {\n[; ;pic18f2550.h: 6810: unsigned :2;\n[; ;pic18f2550.h: 6811: unsigned NOT_PD :1;\n[; ;pic18f2550.h: 6812: };\n[; ;pic18f2550.h: 6813: struct {\n[; ;pic18f2550.h: 6814: unsigned :3;\n[; ;pic18f2550.h: 6815: unsigned NOT_TO :1;\n[; ;pic18f2550.h: 6816: };\n[; ;pic18f2550.h: 6817: struct {\n[; ;pic18f2550.h: 6818: unsigned :4;\n[; ;pic18f2550.h: 6819: unsigned NOT_RI :1;\n[; ;pic18f2550.h: 6820: };\n[; ;pic18f2550.h: 6821: struct {\n[; ;pic18f2550.h: 6822: unsigned nBOR :1;\n[; ;pic18f2550.h: 6823: unsigned nPOR :1;\n[; ;pic18f2550.h: 6824: unsigned nPD :1;\n[; ;pic18f2550.h: 6825: unsigned nTO :1;\n[; ;pic18f2550.h: 6826: unsigned nRI :1;\n[; ;pic18f2550.h: 6827: unsigned :1;\n[; ;pic18f2550.h: 6828: unsigned SBOREN :1;\n[; ;pic18f2550.h: 6829: unsigned IPEN :1;\n[; ;pic18f2550.h: 6830: };\n[; ;pic18f2550.h: 6831: struct {\n[; ;pic18f2550.h: 6832: unsigned :7;\n[; ;pic18f2550.h: 6833: unsigned NOT_IPEN :1;\n[; ;pic18f2550.h: 6834: };\n[; ;pic18f2550.h: 6835: struct {\n[; ;pic18f2550.h: 6836: unsigned BOR :1;\n[; ;pic18f2550.h: 6837: unsigned POR :1;\n[; ;pic18f2550.h: 6838: unsigned PD :1;\n[; ;pic18f2550.h: 6839: unsigned TO :1;\n[; ;pic18f2550.h: 6840: unsigned RI :1;\n[; ;pic18f2550.h: 6841: unsigned :2;\n[; ;pic18f2550.h: 6842: unsigned nIPEN :1;\n[; ;pic18f2550.h: 6843: };\n[; ;pic18f2550.h: 6844: } RCONbits_t;\n[; ;pic18f2550.h: 6845: extern volatile RCONbits_t RCONbits @ 0xFD0;\n[; ;pic18f2550.h: 6944: extern volatile unsigned char WDTCON @ 0xFD1;\n\"6946\n[; ;pic18f2550.h: 6946: asm(\"WDTCON equ 0FD1h\");\n[; <\" WDTCON equ 0FD1h ;# \">\n[; ;pic18f2550.h: 6949: typedef union {\n[; ;pic18f2550.h: 6950: struct {\n[; ;pic18f2550.h: 6951: unsigned SWDTEN :1;\n[; ;pic18f2550.h: 6952: };\n[; ;pic18f2550.h: 6953: struct {\n[; ;pic18f2550.h: 6954: unsigned SWDTE :1;\n[; ;pic18f2550.h: 6955: };\n[; ;pic18f2550.h: 6956: } WDTCONbits_t;\n[; ;pic18f2550.h: 6957: extern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n[; ;pic18f2550.h: 6971: extern volatile unsigned char HLVDCON @ 0xFD2;\n\"6973\n[; ;pic18f2550.h: 6973: asm(\"HLVDCON equ 0FD2h\");\n[; <\" HLVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6976: extern volatile unsigned char LVDCON @ 0xFD2;\n\"6978\n[; ;pic18f2550.h: 6978: asm(\"LVDCON equ 0FD2h\");\n[; <\" LVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6981: typedef union {\n[; ;pic18f2550.h: 6982: struct {\n[; ;pic18f2550.h: 6983: unsigned HLVDL :4;\n[; ;pic18f2550.h: 6984: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 6985: unsigned IRVST :1;\n[; ;pic18f2550.h: 6986: unsigned :1;\n[; ;pic18f2550.h: 6987: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 6988: };\n[; ;pic18f2550.h: 6989: struct {\n[; ;pic18f2550.h: 6990: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 6991: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 6992: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 6993: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 6994: };\n[; ;pic18f2550.h: 6995: struct {\n[; ;pic18f2550.h: 6996: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 6997: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 6998: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 6999: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7000: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7001: unsigned IVRST :1;\n[; ;pic18f2550.h: 7002: };\n[; ;pic18f2550.h: 7003: struct {\n[; ;pic18f2550.h: 7004: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7005: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7006: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7007: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7008: unsigned :1;\n[; ;pic18f2550.h: 7009: unsigned BGST :1;\n[; ;pic18f2550.h: 7010: };\n[; ;pic18f2550.h: 7011: } HLVDCONbits_t;\n[; ;pic18f2550.h: 7012: extern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7110: typedef union {\n[; ;pic18f2550.h: 7111: struct {\n[; ;pic18f2550.h: 7112: unsigned HLVDL :4;\n[; ;pic18f2550.h: 7113: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 7114: unsigned IRVST :1;\n[; ;pic18f2550.h: 7115: unsigned :1;\n[; ;pic18f2550.h: 7116: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 7117: };\n[; ;pic18f2550.h: 7118: struct {\n[; ;pic18f2550.h: 7119: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 7120: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 7121: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 7122: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 7123: };\n[; ;pic18f2550.h: 7124: struct {\n[; ;pic18f2550.h: 7125: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 7126: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 7127: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 7128: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7129: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7130: unsigned IVRST :1;\n[; ;pic18f2550.h: 7131: };\n[; ;pic18f2550.h: 7132: struct {\n[; ;pic18f2550.h: 7133: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7134: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7135: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7136: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7137: unsigned :1;\n[; ;pic18f2550.h: 7138: unsigned BGST :1;\n[; ;pic18f2550.h: 7139: };\n[; ;pic18f2550.h: 7140: } LVDCONbits_t;\n[; ;pic18f2550.h: 7141: extern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7240: extern volatile unsigned char OSCCON @ 0xFD3;\n\"7242\n[; ;pic18f2550.h: 7242: asm(\"OSCCON equ 0FD3h\");\n[; <\" OSCCON equ 0FD3h ;# \">\n[; ;pic18f2550.h: 7245: typedef union {\n[; ;pic18f2550.h: 7246: struct {\n[; ;pic18f2550.h: 7247: unsigned SCS :2;\n[; ;pic18f2550.h: 7248: unsigned IOFS :1;\n[; ;pic18f2550.h: 7249: unsigned OSTS :1;\n[; ;pic18f2550.h: 7250: unsigned IRCF :3;\n[; ;pic18f2550.h: 7251: unsigned IDLEN :1;\n[; ;pic18f2550.h: 7252: };\n[; ;pic18f2550.h: 7253: struct {\n[; ;pic18f2550.h: 7254: unsigned SCS0 :1;\n[; ;pic18f2550.h: 7255: unsigned SCS1 :1;\n[; ;pic18f2550.h: 7256: unsigned FLTS :1;\n[; ;pic18f2550.h: 7257: unsigned :1;\n[; ;pic18f2550.h: 7258: unsigned IRCF0 :1;\n[; ;pic18f2550.h: 7259: unsigned IRCF1 :1;\n[; ;pic18f2550.h: 7260: unsigned IRCF2 :1;\n[; ;pic18f2550.h: 7261: };\n[; ;pic18f2550.h: 7262: } OSCCONbits_t;\n[; ;pic18f2550.h: 7263: extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n[; ;pic18f2550.h: 7322: extern volatile unsigned char T0CON @ 0xFD5;\n\"7324\n[; ;pic18f2550.h: 7324: asm(\"T0CON equ 0FD5h\");\n[; <\" T0CON equ 0FD5h ;# \">\n[; ;pic18f2550.h: 7327: typedef union {\n[; ;pic18f2550.h: 7328: struct {\n[; ;pic18f2550.h: 7329: unsigned T0PS :3;\n[; ;pic18f2550.h: 7330: unsigned PSA :1;\n[; ;pic18f2550.h: 7331: unsigned T0SE :1;\n[; ;pic18f2550.h: 7332: unsigned T0CS :1;\n[; ;pic18f2550.h: 7333: unsigned T08BIT :1;\n[; ;pic18f2550.h: 7334: unsigned TMR0ON :1;\n[; ;pic18f2550.h: 7335: };\n[; ;pic18f2550.h: 7336: struct {\n[; ;pic18f2550.h: 7337: unsigned T0PS0 :1;\n[; ;pic18f2550.h: 7338: unsigned T0PS1 :1;\n[; ;pic18f2550.h: 7339: unsigned T0PS2 :1;\n[; ;pic18f2550.h: 7340: };\n[; ;pic18f2550.h: 7341: } T0CONbits_t;\n[; ;pic18f2550.h: 7342: extern volatile T0CONbits_t T0CONbits @ 0xFD5;\n[; ;pic18f2550.h: 7391: extern volatile unsigned short TMR0 @ 0xFD6;\n\"7393\n[; ;pic18f2550.h: 7393: asm(\"TMR0 equ 0FD6h\");\n[; <\" TMR0 equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7397: extern volatile unsigned char TMR0L @ 0xFD6;\n\"7399\n[; ;pic18f2550.h: 7399: asm(\"TMR0L equ 0FD6h\");\n[; <\" TMR0L equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7403: extern volatile unsigned char TMR0H @ 0xFD7;\n\"7405\n[; ;pic18f2550.h: 7405: asm(\"TMR0H equ 0FD7h\");\n[; <\" TMR0H equ 0FD7h ;# \">\n[; ;pic18f2550.h: 7409: extern volatile unsigned char STATUS @ 0xFD8;\n\"7411\n[; ;pic18f2550.h: 7411: asm(\"STATUS equ 0FD8h\");\n[; <\" STATUS equ 0FD8h ;# \">\n[; ;pic18f2550.h: 7414: typedef union {\n[; ;pic18f2550.h: 7415: struct {\n[; ;pic18f2550.h: 7416: unsigned C :1;\n[; ;pic18f2550.h: 7417: unsigned DC :1;\n[; ;pic18f2550.h: 7418: unsigned Z :1;\n[; ;pic18f2550.h: 7419: unsigned OV :1;\n[; ;pic18f2550.h: 7420: unsigned N :1;\n[; ;pic18f2550.h: 7421: };\n[; ;pic18f2550.h: 7422: struct {\n[; ;pic18f2550.h: 7423: unsigned CARRY :1;\n[; ;pic18f2550.h: 7424: };\n[; ;pic18f2550.h: 7425: struct {\n[; ;pic18f2550.h: 7426: unsigned :4;\n[; ;pic18f2550.h: 7427: unsigned NEGATIVE :1;\n[; ;pic18f2550.h: 7428: };\n[; ;pic18f2550.h: 7429: struct {\n[; ;pic18f2550.h: 7430: unsigned :3;\n[; ;pic18f2550.h: 7431: unsigned OVERFLOW :1;\n[; ;pic18f2550.h: 7432: };\n[; ;pic18f2550.h: 7433: struct {\n[; ;pic18f2550.h: 7434: unsigned :2;\n[; ;pic18f2550.h: 7435: unsigned ZERO :1;\n[; ;pic18f2550.h: 7436: };\n[; ;pic18f2550.h: 7437: } STATUSbits_t;\n[; ;pic18f2550.h: 7438: extern volatile STATUSbits_t STATUSbits @ 0xFD8;\n[; ;pic18f2550.h: 7487: extern volatile unsigned short FSR2 @ 0xFD9;\n\"7489\n[; ;pic18f2550.h: 7489: asm(\"FSR2 equ 0FD9h\");\n[; <\" FSR2 equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7493: extern volatile unsigned char FSR2L @ 0xFD9;\n\"7495\n[; ;pic18f2550.h: 7495: asm(\"FSR2L equ 0FD9h\");\n[; <\" FSR2L equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7499: extern volatile unsigned char FSR2H @ 0xFDA;\n\"7501\n[; ;pic18f2550.h: 7501: asm(\"FSR2H equ 0FDAh\");\n[; <\" FSR2H equ 0FDAh ;# \">\n[; ;pic18f2550.h: 7505: extern volatile unsigned char PLUSW2 @ 0xFDB;\n\"7507\n[; ;pic18f2550.h: 7507: asm(\"PLUSW2 equ 0FDBh\");\n[; <\" PLUSW2 equ 0FDBh ;# \">\n[; ;pic18f2550.h: 7511: extern volatile unsigned char PREINC2 @ 0xFDC;\n\"7513\n[; ;pic18f2550.h: 7513: asm(\"PREINC2 equ 0FDCh\");\n[; <\" PREINC2 equ 0FDCh ;# \">\n[; ;pic18f2550.h: 7517: extern volatile unsigned char POSTDEC2 @ 0xFDD;\n\"7519\n[; ;pic18f2550.h: 7519: asm(\"POSTDEC2 equ 0FDDh\");\n[; <\" POSTDEC2 equ 0FDDh ;# \">\n[; ;pic18f2550.h: 7523: extern volatile unsigned char POSTINC2 @ 0xFDE;\n\"7525\n[; ;pic18f2550.h: 7525: asm(\"POSTINC2 equ 0FDEh\");\n[; <\" POSTINC2 equ 0FDEh ;# \">\n[; ;pic18f2550.h: 7529: extern volatile unsigned char INDF2 @ 0xFDF;\n\"7531\n[; ;pic18f2550.h: 7531: asm(\"INDF2 equ 0FDFh\");\n[; <\" INDF2 equ 0FDFh ;# \">\n[; ;pic18f2550.h: 7535: extern volatile unsigned char BSR @ 0xFE0;\n\"7537\n[; ;pic18f2550.h: 7537: asm(\"BSR equ 0FE0h\");\n[; <\" BSR equ 0FE0h ;# \">\n[; ;pic18f2550.h: 7541: extern volatile unsigned short FSR1 @ 0xFE1;\n\"7543\n[; ;pic18f2550.h: 7543: asm(\"FSR1 equ 0FE1h\");\n[; <\" FSR1 equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7547: extern volatile unsigned char FSR1L @ 0xFE1;\n\"7549\n[; ;pic18f2550.h: 7549: asm(\"FSR1L equ 0FE1h\");\n[; <\" FSR1L equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7553: extern volatile unsigned char FSR1H @ 0xFE2;\n\"7555\n[; ;pic18f2550.h: 7555: asm(\"FSR1H equ 0FE2h\");\n[; <\" FSR1H equ 0FE2h ;# \">\n[; ;pic18f2550.h: 7559: extern volatile unsigned char PLUSW1 @ 0xFE3;\n\"7561\n[; ;pic18f2550.h: 7561: asm(\"PLUSW1 equ 0FE3h\");\n[; <\" PLUSW1 equ 0FE3h ;# \">\n[; ;pic18f2550.h: 7565: extern volatile unsigned char PREINC1 @ 0xFE4;\n\"7567\n[; ;pic18f2550.h: 7567: asm(\"PREINC1 equ 0FE4h\");\n[; <\" PREINC1 equ 0FE4h ;# \">\n[; ;pic18f2550.h: 7571: extern volatile unsigned char POSTDEC1 @ 0xFE5;\n\"7573\n[; ;pic18f2550.h: 7573: asm(\"POSTDEC1 equ 0FE5h\");\n[; <\" POSTDEC1 equ 0FE5h ;# \">\n[; ;pic18f2550.h: 7577: extern volatile unsigned char POSTINC1 @ 0xFE6;\n\"7579\n[; ;pic18f2550.h: 7579: asm(\"POSTINC1 equ 0FE6h\");\n[; <\" POSTINC1 equ 0FE6h ;# \">\n[; ;pic18f2550.h: 7583: extern volatile unsigned char INDF1 @ 0xFE7;\n\"7585\n[; ;pic18f2550.h: 7585: asm(\"INDF1 equ 0FE7h\");\n[; <\" INDF1 equ 0FE7h ;# \">\n[; ;pic18f2550.h: 7589: extern volatile unsigned char WREG @ 0xFE8;\n\"7591\n[; ;pic18f2550.h: 7591: asm(\"WREG equ 0FE8h\");\n[; <\" WREG equ 0FE8h ;# \">\n[; ;pic18f2550.h: 7595: extern volatile unsigned short FSR0 @ 0xFE9;\n\"7597\n[; ;pic18f2550.h: 7597: asm(\"FSR0 equ 0FE9h\");\n[; <\" FSR0 equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7601: extern volatile unsigned char FSR0L @ 0xFE9;\n\"7603\n[; ;pic18f2550.h: 7603: asm(\"FSR0L equ 0FE9h\");\n[; <\" FSR0L equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7607: extern volatile unsigned char FSR0H @ 0xFEA;\n\"7609\n[; ;pic18f2550.h: 7609: asm(\"FSR0H equ 0FEAh\");\n[; <\" FSR0H equ 0FEAh ;# \">\n[; ;pic18f2550.h: 7613: extern volatile unsigned char PLUSW0 @ 0xFEB;\n\"7615\n[; ;pic18f2550.h: 7615: asm(\"PLUSW0 equ 0FEBh\");\n[; <\" PLUSW0 equ 0FEBh ;# \">\n[; ;pic18f2550.h: 7619: extern volatile unsigned char PREINC0 @ 0xFEC;\n\"7621\n[; ;pic18f2550.h: 7621: asm(\"PREINC0 equ 0FECh\");\n[; <\" PREINC0 equ 0FECh ;# \">\n[; ;pic18f2550.h: 7625: extern volatile unsigned char POSTDEC0 @ 0xFED;\n\"7627\n[; ;pic18f2550.h: 7627: asm(\"POSTDEC0 equ 0FEDh\");\n[; <\" POSTDEC0 equ 0FEDh ;# \">\n[; ;pic18f2550.h: 7631: extern volatile unsigned char POSTINC0 @ 0xFEE;\n\"7633\n[; ;pic18f2550.h: 7633: asm(\"POSTINC0 equ 0FEEh\");\n[; <\" POSTINC0 equ 0FEEh ;# \">\n[; ;pic18f2550.h: 7637: extern volatile unsigned char INDF0 @ 0xFEF;\n\"7639\n[; ;pic18f2550.h: 7639: asm(\"INDF0 equ 0FEFh\");\n[; <\" INDF0 equ 0FEFh ;# \">\n[; ;pic18f2550.h: 7643: extern volatile unsigned char INTCON3 @ 0xFF0;\n\"7645\n[; ;pic18f2550.h: 7645: asm(\"INTCON3 equ 0FF0h\");\n[; <\" INTCON3 equ 0FF0h ;# \">\n[; ;pic18f2550.h: 7648: typedef union {\n[; ;pic18f2550.h: 7649: struct {\n[; ;pic18f2550.h: 7650: unsigned INT1IF :1;\n[; ;pic18f2550.h: 7651: unsigned INT2IF :1;\n[; ;pic18f2550.h: 7652: unsigned :1;\n[; ;pic18f2550.h: 7653: unsigned INT1IE :1;\n[; ;pic18f2550.h: 7654: unsigned INT2IE :1;\n[; ;pic18f2550.h: 7655: unsigned :1;\n[; ;pic18f2550.h: 7656: unsigned INT1IP :1;\n[; ;pic18f2550.h: 7657: unsigned INT2IP :1;\n[; ;pic18f2550.h: 7658: };\n[; ;pic18f2550.h: 7659: struct {\n[; ;pic18f2550.h: 7660: unsigned INT1F :1;\n[; ;pic18f2550.h: 7661: unsigned INT2F :1;\n[; ;pic18f2550.h: 7662: unsigned :1;\n[; ;pic18f2550.h: 7663: unsigned INT1E :1;\n[; ;pic18f2550.h: 7664: unsigned INT2E :1;\n[; ;pic18f2550.h: 7665: unsigned :1;\n[; ;pic18f2550.h: 7666: unsigned INT1P :1;\n[; ;pic18f2550.h: 7667: unsigned INT2P :1;\n[; ;pic18f2550.h: 7668: };\n[; ;pic18f2550.h: 7669: } INTCON3bits_t;\n[; ;pic18f2550.h: 7670: extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n[; ;pic18f2550.h: 7734: extern volatile unsigned char INTCON2 @ 0xFF1;\n\"7736\n[; ;pic18f2550.h: 7736: asm(\"INTCON2 equ 0FF1h\");\n[; <\" INTCON2 equ 0FF1h ;# \">\n[; ;pic18f2550.h: 7739: typedef union {\n[; ;pic18f2550.h: 7740: struct {\n[; ;pic18f2550.h: 7741: unsigned :7;\n[; ;pic18f2550.h: 7742: unsigned NOT_RBPU :1;\n[; ;pic18f2550.h: 7743: };\n[; ;pic18f2550.h: 7744: struct {\n[; ;pic18f2550.h: 7745: unsigned RBIP :1;\n[; ;pic18f2550.h: 7746: unsigned :1;\n[; ;pic18f2550.h: 7747: unsigned TMR0IP :1;\n[; ;pic18f2550.h: 7748: unsigned :1;\n[; ;pic18f2550.h: 7749: unsigned INTEDG2 :1;\n[; ;pic18f2550.h: 7750: unsigned INTEDG1 :1;\n[; ;pic18f2550.h: 7751: unsigned INTEDG0 :1;\n[; ;pic18f2550.h: 7752: unsigned nRBPU :1;\n[; ;pic18f2550.h: 7753: };\n[; ;pic18f2550.h: 7754: struct {\n[; ;pic18f2550.h: 7755: unsigned :2;\n[; ;pic18f2550.h: 7756: unsigned T0IP :1;\n[; ;pic18f2550.h: 7757: unsigned :4;\n[; ;pic18f2550.h: 7758: unsigned RBPU :1;\n[; ;pic18f2550.h: 7759: };\n[; ;pic18f2550.h: 7760: } INTCON2bits_t;\n[; ;pic18f2550.h: 7761: extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n[; ;pic18f2550.h: 7810: extern volatile unsigned char INTCON @ 0xFF2;\n\"7812\n[; ;pic18f2550.h: 7812: asm(\"INTCON equ 0FF2h\");\n[; <\" INTCON equ 0FF2h ;# \">\n[; ;pic18f2550.h: 7815: typedef union {\n[; ;pic18f2550.h: 7816: struct {\n[; ;pic18f2550.h: 7817: unsigned RBIF :1;\n[; ;pic18f2550.h: 7818: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7819: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7820: unsigned RBIE :1;\n[; ;pic18f2550.h: 7821: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7822: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7823: unsigned PEIE_GIEL :1;\n[; ;pic18f2550.h: 7824: unsigned GIE_GIEH :1;\n[; ;pic18f2550.h: 7825: };\n[; ;pic18f2550.h: 7826: struct {\n[; ;pic18f2550.h: 7827: unsigned RBIF :1;\n[; ;pic18f2550.h: 7828: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7829: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7830: unsigned RBIE :1;\n[; ;pic18f2550.h: 7831: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7832: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7833: unsigned PEIE :1;\n[; ;pic18f2550.h: 7834: unsigned GIE :1;\n[; ;pic18f2550.h: 7835: };\n[; ;pic18f2550.h: 7836: struct {\n[; ;pic18f2550.h: 7837: unsigned RBIF :1;\n[; ;pic18f2550.h: 7838: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7839: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7840: unsigned RBIE :1;\n[; ;pic18f2550.h: 7841: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7842: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7843: unsigned GIEL :1;\n[; ;pic18f2550.h: 7844: unsigned GIEH :1;\n[; ;pic18f2550.h: 7845: };\n[; ;pic18f2550.h: 7846: struct {\n[; ;pic18f2550.h: 7847: unsigned :1;\n[; ;pic18f2550.h: 7848: unsigned INT0F :1;\n[; ;pic18f2550.h: 7849: unsigned T0IF :1;\n[; ;pic18f2550.h: 7850: unsigned :1;\n[; ;pic18f2550.h: 7851: unsigned INT0E :1;\n[; ;pic18f2550.h: 7852: unsigned T0IE :1;\n[; ;pic18f2550.h: 7853: unsigned PEIE :1;\n[; ;pic18f2550.h: 7854: unsigned GIE :1;\n[; ;pic18f2550.h: 7855: };\n[; ;pic18f2550.h: 7856: struct {\n[; ;pic18f2550.h: 7857: unsigned :6;\n[; ;pic18f2550.h: 7858: unsigned GIEL :1;\n[; ;pic18f2550.h: 7859: unsigned GIEH :1;\n[; ;pic18f2550.h: 7860: };\n[; ;pic18f2550.h: 7861: } INTCONbits_t;\n[; ;pic18f2550.h: 7862: extern volatile INTCONbits_t INTCONbits @ 0xFF2;\n[; ;pic18f2550.h: 7946: extern volatile unsigned short PROD @ 0xFF3;\n\"7948\n[; ;pic18f2550.h: 7948: asm(\"PROD equ 0FF3h\");\n[; <\" PROD equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7952: extern volatile unsigned char PRODL @ 0xFF3;\n\"7954\n[; ;pic18f2550.h: 7954: asm(\"PRODL equ 0FF3h\");\n[; <\" PRODL equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7958: extern volatile unsigned char PRODH @ 0xFF4;\n\"7960\n[; ;pic18f2550.h: 7960: asm(\"PRODH equ 0FF4h\");\n[; <\" PRODH equ 0FF4h ;# \">\n[; ;pic18f2550.h: 7964: extern volatile unsigned char TABLAT @ 0xFF5;\n\"7966\n[; ;pic18f2550.h: 7966: asm(\"TABLAT equ 0FF5h\");\n[; <\" TABLAT equ 0FF5h ;# \">\n[; ;pic18f2550.h: 7971: extern volatile unsigned short long TBLPTR @ 0xFF6;\n\"7974\n[; ;pic18f2550.h: 7974: asm(\"TBLPTR equ 0FF6h\");\n[; <\" TBLPTR equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7978: extern volatile unsigned char TBLPTRL @ 0xFF6;\n\"7980\n[; ;pic18f2550.h: 7980: asm(\"TBLPTRL equ 0FF6h\");\n[; <\" TBLPTRL equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7984: extern volatile unsigned char TBLPTRH @ 0xFF7;\n\"7986\n[; ;pic18f2550.h: 7986: asm(\"TBLPTRH equ 0FF7h\");\n[; <\" TBLPTRH equ 0FF7h ;# \">\n[; ;pic18f2550.h: 7990: extern volatile unsigned char TBLPTRU @ 0xFF8;\n\"7992\n[; ;pic18f2550.h: 7992: asm(\"TBLPTRU equ 0FF8h\");\n[; <\" TBLPTRU equ 0FF8h ;# \">\n[; ;pic18f2550.h: 7997: extern volatile unsigned short long PCLAT @ 0xFF9;\n\"8000\n[; ;pic18f2550.h: 8000: asm(\"PCLAT equ 0FF9h\");\n[; <\" PCLAT equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8004: extern volatile unsigned short long PC @ 0xFF9;\n\"8007\n[; ;pic18f2550.h: 8007: asm(\"PC equ 0FF9h\");\n[; <\" PC equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8011: extern volatile unsigned char PCL @ 0xFF9;\n\"8013\n[; ;pic18f2550.h: 8013: asm(\"PCL equ 0FF9h\");\n[; <\" PCL equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8017: extern volatile unsigned char PCLATH @ 0xFFA;\n\"8019\n[; ;pic18f2550.h: 8019: asm(\"PCLATH equ 0FFAh\");\n[; <\" PCLATH equ 0FFAh ;# \">\n[; ;pic18f2550.h: 8023: extern volatile unsigned char PCLATU @ 0xFFB;\n\"8025\n[; ;pic18f2550.h: 8025: asm(\"PCLATU equ 0FFBh\");\n[; <\" PCLATU equ 0FFBh ;# \">\n[; ;pic18f2550.h: 8029: extern volatile unsigned char STKPTR @ 0xFFC;\n\"8031\n[; ;pic18f2550.h: 8031: asm(\"STKPTR equ 0FFCh\");\n[; <\" STKPTR equ 0FFCh ;# \">\n[; ;pic18f2550.h: 8034: typedef union {\n[; ;pic18f2550.h: 8035: struct {\n[; ;pic18f2550.h: 8036: unsigned STKPTR :5;\n[; ;pic18f2550.h: 8037: unsigned :1;\n[; ;pic18f2550.h: 8038: unsigned STKUNF :1;\n[; ;pic18f2550.h: 8039: unsigned STKFUL :1;\n[; ;pic18f2550.h: 8040: };\n[; ;pic18f2550.h: 8041: struct {\n[; ;pic18f2550.h: 8042: unsigned STKPTR0 :1;\n[; ;pic18f2550.h: 8043: unsigned STKPTR1 :1;\n[; ;pic18f2550.h: 8044: unsigned STKPTR2 :1;\n[; ;pic18f2550.h: 8045: unsigned STKPTR3 :1;\n[; ;pic18f2550.h: 8046: unsigned STKPTR4 :1;\n[; ;pic18f2550.h: 8047: };\n[; ;pic18f2550.h: 8048: struct {\n[; ;pic18f2550.h: 8049: unsigned :7;\n[; ;pic18f2550.h: 8050: unsigned STKOVF :1;\n[; ;pic18f2550.h: 8051: };\n[; ;pic18f2550.h: 8052: } STKPTRbits_t;\n[; ;pic18f2550.h: 8053: extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n[; ;pic18f2550.h: 8103: extern volatile unsigned short long TOS @ 0xFFD;\n\"8106\n[; ;pic18f2550.h: 8106: asm(\"TOS equ 0FFDh\");\n[; <\" TOS equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8110: extern volatile unsigned char TOSL @ 0xFFD;\n\"8112\n[; ;pic18f2550.h: 8112: asm(\"TOSL equ 0FFDh\");\n[; <\" TOSL equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8116: extern volatile unsigned char TOSH @ 0xFFE;\n\"8118\n[; ;pic18f2550.h: 8118: asm(\"TOSH equ 0FFEh\");\n[; <\" TOSH equ 0FFEh ;# \">\n[; ;pic18f2550.h: 8122: extern volatile unsigned char TOSU @ 0xFFF;\n\"8124\n[; ;pic18f2550.h: 8124: asm(\"TOSU equ 0FFFh\");\n[; <\" TOSU equ 0FFFh ;# \">\n[; ;pic18f2550.h: 8134: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n[; ;pic18f2550.h: 8136: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n[; ;pic18f2550.h: 8138: extern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n[; ;pic18f2550.h: 8140: extern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n[; ;pic18f2550.h: 8142: extern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n[; ;pic18f2550.h: 8144: extern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n[; ;pic18f2550.h: 8146: extern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n[; ;pic18f2550.h: 8148: extern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n[; ;pic18f2550.h: 8150: extern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n[; ;pic18f2550.h: 8152: extern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n[; ;pic18f2550.h: 8154: extern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n[; ;pic18f2550.h: 8156: extern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n[; ;pic18f2550.h: 8158: extern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n[; ;pic18f2550.h: 8160: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8162: extern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n[; ;pic18f2550.h: 8164: extern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n[; ;pic18f2550.h: 8166: extern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n[; ;pic18f2550.h: 8168: extern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n[; ;pic18f2550.h: 8170: extern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n[; ;pic18f2550.h: 8172: extern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n[; ;pic18f2550.h: 8174: extern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n[; ;pic18f2550.h: 8176: extern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8178: extern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n[; ;pic18f2550.h: 8180: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n[; ;pic18f2550.h: 8182: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n[; ;pic18f2550.h: 8184: extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n[; ;pic18f2550.h: 8186: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n[; ;pic18f2550.h: 8188: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 8190: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 8192: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 8194: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 8196: extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8198: extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n[; ;pic18f2550.h: 8200: extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n[; ;pic18f2550.h: 8202: extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n[; ;pic18f2550.h: 8204: extern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n[; ;pic18f2550.h: 8206: extern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8208: extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8210: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n[; ;pic18f2550.h: 8212: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8214: extern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8216: extern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n[; ;pic18f2550.h: 8218: extern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n[; ;pic18f2550.h: 8220: extern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n[; ;pic18f2550.h: 8222: extern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n[; ;pic18f2550.h: 8224: extern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n[; ;pic18f2550.h: 8226: extern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n[; ;pic18f2550.h: 8228: extern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n[; ;pic18f2550.h: 8230: extern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n[; ;pic18f2550.h: 8232: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n[; ;pic18f2550.h: 8234: extern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8236: extern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8238: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n[; ;pic18f2550.h: 8240: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n[; ;pic18f2550.h: 8242: extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n[; ;pic18f2550.h: 8244: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n[; ;pic18f2550.h: 8246: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n[; ;pic18f2550.h: 8248: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n[; ;pic18f2550.h: 8250: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n[; ;pic18f2550.h: 8252: extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8254: extern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8256: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n[; ;pic18f2550.h: 8258: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n[; ;pic18f2550.h: 8260: extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n[; ;pic18f2550.h: 8262: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n[; ;pic18f2550.h: 8264: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n[; ;pic18f2550.h: 8266: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n[; ;pic18f2550.h: 8268: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n[; ;pic18f2550.h: 8270: extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 8272: extern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8274: extern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8276: extern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8278: extern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8280: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8282: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n[; ;pic18f2550.h: 8284: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n[; ;pic18f2550.h: 8286: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n[; ;pic18f2550.h: 8288: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n[; ;pic18f2550.h: 8290: extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8292: extern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n[; ;pic18f2550.h: 8294: extern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 8296: extern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n[; ;pic18f2550.h: 8298: extern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n[; ;pic18f2550.h: 8300: extern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8302: extern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8304: extern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8306: extern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8308: extern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8310: extern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8312: extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n[; ;pic18f2550.h: 8314: extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n[; ;pic18f2550.h: 8316: extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n[; ;pic18f2550.h: 8318: extern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n[; ;pic18f2550.h: 8320: extern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n[; ;pic18f2550.h: 8322: extern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n[; ;pic18f2550.h: 8324: extern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n[; ;pic18f2550.h: 8326: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n[; ;pic18f2550.h: 8328: extern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8330: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8332: extern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8334: extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n[; ;pic18f2550.h: 8336: extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n[; ;pic18f2550.h: 8338: extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n[; ;pic18f2550.h: 8340: extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n[; ;pic18f2550.h: 8342: extern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8344: extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n[; ;pic18f2550.h: 8346: extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8348: extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8350: extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n[; ;pic18f2550.h: 8352: extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8354: extern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8356: extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8358: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n[; ;pic18f2550.h: 8360: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n[; ;pic18f2550.h: 8362: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n[; ;pic18f2550.h: 8364: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n[; ;pic18f2550.h: 8366: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n[; ;pic18f2550.h: 8368: extern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n[; ;pic18f2550.h: 8370: extern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n[; ;pic18f2550.h: 8372: extern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n[; ;pic18f2550.h: 8374: extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8376: extern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 8378: extern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8380: extern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8382: extern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8384: extern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n[; ;pic18f2550.h: 8386: extern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n[; ;pic18f2550.h: 8388: extern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n[; ;pic18f2550.h: 8390: extern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n[; ;pic18f2550.h: 8392: extern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8394: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n[; ;pic18f2550.h: 8396: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n[; ;pic18f2550.h: 8398: extern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n[; ;pic18f2550.h: 8400: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n[; ;pic18f2550.h: 8402: extern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n[; ;pic18f2550.h: 8404: extern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n[; ;pic18f2550.h: 8406: extern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n[; ;pic18f2550.h: 8408: extern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n[; ;pic18f2550.h: 8410: extern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8412: extern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8414: extern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8416: extern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8418: extern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8420: extern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8422: extern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8424: extern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8426: extern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8428: extern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8430: extern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8432: extern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8434: extern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8436: extern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8438: extern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8440: extern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8442: extern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8444: extern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8446: extern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8448: extern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8450: extern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8452: extern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8454: extern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8456: extern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8458: extern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8460: extern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8462: extern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8464: extern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8466: extern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8468: extern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8470: extern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8472: extern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8474: extern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8476: extern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8478: extern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8480: extern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8482: extern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8484: extern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8486: extern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8488: extern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8490: extern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8492: extern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8494: extern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n[; ;pic18f2550.h: 8496: extern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n[; ;pic18f2550.h: 8498: extern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n[; ;pic18f2550.h: 8500: extern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n[; ;pic18f2550.h: 8502: extern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n[; ;pic18f2550.h: 8504: extern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n[; ;pic18f2550.h: 8506: extern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8508: extern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8510: extern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8512: extern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8514: extern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8516: extern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8518: extern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n[; ;pic18f2550.h: 8520: extern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n[; ;pic18f2550.h: 8522: extern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8524: extern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8526: extern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n[; ;pic18f2550.h: 8528: extern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n[; ;pic18f2550.h: 8530: extern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n[; ;pic18f2550.h: 8532: extern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n[; ;pic18f2550.h: 8534: extern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n[; ;pic18f2550.h: 8536: extern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n[; ;pic18f2550.h: 8538: extern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8540: extern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8542: extern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8544: extern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8546: extern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8548: extern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8550: extern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n[; ;pic18f2550.h: 8552: extern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n[; ;pic18f2550.h: 8554: extern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8556: extern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8558: extern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n[; ;pic18f2550.h: 8560: extern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n[; ;pic18f2550.h: 8562: extern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n[; ;pic18f2550.h: 8564: extern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n[; ;pic18f2550.h: 8566: extern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n[; ;pic18f2550.h: 8568: extern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n[; ;pic18f2550.h: 8570: extern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8572: extern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8574: extern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8576: extern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8578: extern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8580: extern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8582: extern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n[; ;pic18f2550.h: 8584: extern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n[; ;pic18f2550.h: 8586: extern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8588: extern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8590: extern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n[; ;pic18f2550.h: 8592: extern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n[; ;pic18f2550.h: 8594: extern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n[; ;pic18f2550.h: 8596: extern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n[; ;pic18f2550.h: 8598: extern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n[; ;pic18f2550.h: 8600: extern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n[; ;pic18f2550.h: 8602: extern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8604: extern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8606: extern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8608: extern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8610: extern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8612: extern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8614: extern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n[; ;pic18f2550.h: 8616: extern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n[; ;pic18f2550.h: 8618: extern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8620: extern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8622: extern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n[; ;pic18f2550.h: 8624: extern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n[; ;pic18f2550.h: 8626: extern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n[; ;pic18f2550.h: 8628: extern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n[; ;pic18f2550.h: 8630: extern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n[; ;pic18f2550.h: 8632: extern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n[; ;pic18f2550.h: 8634: extern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8636: extern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8638: extern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8640: extern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8642: extern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8644: extern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8646: extern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n[; ;pic18f2550.h: 8648: extern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n[; ;pic18f2550.h: 8650: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n[; ;pic18f2550.h: 8652: extern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8654: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n[; ;pic18f2550.h: 8656: extern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n[; ;pic18f2550.h: 8658: extern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n[; ;pic18f2550.h: 8660: extern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n[; ;pic18f2550.h: 8662: extern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n[; ;pic18f2550.h: 8664: extern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n[; ;pic18f2550.h: 8666: extern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n[; ;pic18f2550.h: 8668: extern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n[; ;pic18f2550.h: 8670: extern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n[; ;pic18f2550.h: 8672: extern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n[; ;pic18f2550.h: 8674: extern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n[; ;pic18f2550.h: 8676: extern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n[; ;pic18f2550.h: 8678: extern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n[; ;pic18f2550.h: 8680: extern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n[; ;pic18f2550.h: 8682: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8684: extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8686: extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8688: extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8690: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8692: extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8694: extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8696: extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8698: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8700: extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8702: extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8704: extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8706: extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8708: extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8710: extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8712: extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8714: extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8716: extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8718: extern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8720: extern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8722: extern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 8724: extern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 8726: extern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n[; ;pic18f2550.h: 8728: extern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n[; ;pic18f2550.h: 8730: extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n[; ;pic18f2550.h: 8732: extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 8734: extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8736: extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8738: extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8740: extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8742: extern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 8744: extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8746: extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8748: extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8750: extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8752: extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8754: extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8756: extern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 8758: extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8760: extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8762: extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8764: extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8766: extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8768: extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8770: extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n[; ;pic18f2550.h: 8772: extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n[; ;pic18f2550.h: 8774: extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n[; ;pic18f2550.h: 8776: extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n[; ;pic18f2550.h: 8778: extern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8780: extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8782: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n[; ;pic18f2550.h: 8784: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n[; ;pic18f2550.h: 8786: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n[; ;pic18f2550.h: 8788: extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8790: extern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8792: extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8794: extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8796: extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8798: extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8800: extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8802: extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8804: extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8806: extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8808: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8810: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8812: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8814: extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8816: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8818: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8820: extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8822: extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8824: extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8826: extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8828: extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8830: extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8832: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8834: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8836: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8838: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8840: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8842: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8844: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8846: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8848: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8850: extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8852: extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8854: extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8856: extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8858: extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8860: extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8862: extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8864: extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8866: extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8868: extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8870: extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8872: extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n[; ;pic18f2550.h: 8874: extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n[; ;pic18f2550.h: 8876: extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n[; ;pic18f2550.h: 8878: extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8880: extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8882: extern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8884: extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8886: extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8888: extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8890: extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8892: extern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8894: extern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8896: extern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8898: extern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8900: extern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8902: extern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8904: extern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8906: extern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8908: extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n[; ;pic18f2550.h: 8910: extern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8912: extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8914: extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8916: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8918: extern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8920: extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8922: extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 8924: extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 8926: extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 8928: extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 8930: extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 8932: extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 8934: extern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8936: extern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8938: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n[; ;pic18f2550.h: 8940: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 8942: extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n[; ;pic18f2550.h: 8944: extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n[; ;pic18f2550.h: 8946: extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n[; ;pic18f2550.h: 8948: extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n[; ;pic18f2550.h: 8950: extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8952: extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8954: extern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8956: extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8958: extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8960: extern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8962: extern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8964: extern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8966: extern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8968: extern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8970: extern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 8972: extern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8974: extern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n[; ;pic18f2550.h: 8976: extern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n[; ;pic18f2550.h: 8978: extern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n[; ;pic18f2550.h: 8980: extern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8982: extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8984: extern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 8986: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8988: extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8990: extern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n[; ;pic18f2550.h: 8992: extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 8994: extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 8996: extern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 8998: extern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n[; ;pic18f2550.h: 9000: extern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n[; ;pic18f2550.h: 9002: extern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n[; ;pic18f2550.h: 9004: extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9006: extern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9008: extern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9010: extern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n[; ;pic18f2550.h: 9012: extern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n[; ;pic18f2550.h: 9014: extern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n[; ;pic18f2550.h: 9016: extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n[; ;pic18f2550.h: 9018: extern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n[; ;pic18f2550.h: 9020: extern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n[; ;pic18f2550.h: 9022: extern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9024: extern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 9026: extern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9028: extern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9030: extern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9032: extern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 9034: extern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 9036: extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9038: extern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 9040: extern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 9042: extern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 9044: extern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 9046: extern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n[; ;pic18f2550.h: 9048: extern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 9050: extern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 9052: extern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 9054: extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n[; ;pic18f2550.h: 9056: extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n[; ;pic18f2550.h: 9058: extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n[; ;pic18f2550.h: 9060: extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9062: extern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9064: extern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9066: extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9068: extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9070: extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9072: extern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 9074: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n[; ;pic18f2550.h: 9076: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n[; ;pic18f2550.h: 9078: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n[; ;pic18f2550.h: 9080: extern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9082: extern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9084: extern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n[; ;pic18f2550.h: 9086: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9088: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9090: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9092: extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9094: extern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9096: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n[; ;pic18f2550.h: 9098: extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9100: extern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9102: extern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9104: extern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9106: extern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 9108: extern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 9110: extern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 9112: extern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 9114: extern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 9116: extern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 9118: extern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9120: extern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n[; ;pic18f2550.h: 9122: extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9124: extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9126: extern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n[; ;pic18f2550.h: 9128: extern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9130: extern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9132: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n[; ;pic18f2550.h: 9134: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n[; ;pic18f2550.h: 9136: extern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9138: extern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9140: extern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9142: extern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9144: extern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9146: extern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n[; ;pic18f2550.h: 9148: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9150: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n[; ;pic18f2550.h: 9152: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n[; ;pic18f2550.h: 9154: extern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n[; ;pic18f2550.h: 9156: extern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n[; ;pic18f2550.h: 9158: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9160: extern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9162: extern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n[; ;pic18f2550.h: 9164: extern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n[; ;pic18f2550.h: 9166: extern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n[; ;pic18f2550.h: 9168: extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9170: extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9172: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n[; ;pic18f2550.h: 9174: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9176: extern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9178: extern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n[; ;pic18f2550.h: 9180: extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n[; ;pic18f2550.h: 9182: extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n[; ;pic18f2550.h: 9184: extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n[; ;pic18f2550.h: 9186: extern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n[; ;pic18f2550.h: 9188: extern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n[; ;pic18f2550.h: 9190: extern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n[; ;pic18f2550.h: 9192: extern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n[; ;pic18f2550.h: 9194: extern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n[; ;pic18f2550.h: 9196: extern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n[; ;pic18f2550.h: 9198: extern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n[; ;pic18f2550.h: 9200: extern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 9202: extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9204: extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9206: extern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n[; ;pic18f2550.h: 9208: extern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n[; ;pic18f2550.h: 9210: extern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n[; ;pic18f2550.h: 9212: extern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n[; ;pic18f2550.h: 9214: extern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n[; ;pic18f2550.h: 9216: extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n[; ;pic18f2550.h: 9218: extern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 9220: extern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n[; ;pic18f2550.h: 9222: extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9224: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9226: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9228: extern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9230: extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n[; ;pic18f2550.h: 9232: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9234: extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n[; ;pic18f2550.h: 9236: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9238: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9240: extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9242: extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n[; ;pic18f2550.h: 9244: extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n[; ;pic18f2550.h: 9246: extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n[; ;pic18f2550.h: 9248: extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n[; ;pic18f2550.h: 9250: extern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9252: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n[; ;pic18f2550.h: 9254: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n[; ;pic18f2550.h: 9256: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9258: extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9260: extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9262: extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n[; ;pic18f2550.h: 9264: extern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n[; ;pic18f2550.h: 9266: extern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9268: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n[; ;pic18f2550.h: 9270: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n[; ;pic18f2550.h: 9272: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9274: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9276: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9278: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9280: extern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9282: extern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n[; ;pic18f2550.h: 9284: extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n[; ;pic18f2550.h: 9286: extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n[; ;pic18f2550.h: 9288: extern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9290: extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9292: extern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9294: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9296: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9298: extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9300: extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n[; ;pic18f2550.h: 9302: extern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n[; ;pic18f2550.h: 9304: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n[; ;pic18f2550.h: 9306: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n[; ;pic18f2550.h: 9308: extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n[; ;pic18f2550.h: 9310: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n[; ;pic18f2550.h: 9312: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n[; ;pic18f2550.h: 9314: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n[; ;pic18f2550.h: 9316: extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n[; ;pic18f2550.h: 9318: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n[; ;pic18f2550.h: 9320: extern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n[; ;pic18f2550.h: 9322: extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n[; ;pic18f2550.h: 9324: extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n[; ;pic18f2550.h: 9326: extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n[; ;pic18f2550.h: 9328: extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n[; ;pic18f2550.h: 9330: extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9332: extern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9334: extern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9336: extern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9338: extern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9340: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n[; ;pic18f2550.h: 9342: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n[; ;pic18f2550.h: 9344: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n[; ;pic18f2550.h: 9346: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n[; ;pic18f2550.h: 9348: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n[; ;pic18f2550.h: 9350: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n[; ;pic18f2550.h: 9352: extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n[; ;pic18f2550.h: 9354: extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n[; ;pic18f2550.h: 9356: extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n[; ;pic18f2550.h: 9358: extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n[; ;pic18f2550.h: 9360: extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n[; ;pic18f2550.h: 9362: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n[; ;pic18f2550.h: 9364: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n[; ;pic18f2550.h: 9366: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n[; ;pic18f2550.h: 9368: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n[; ;pic18f2550.h: 9370: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n[; ;pic18f2550.h: 9372: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n[; ;pic18f2550.h: 9374: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n[; ;pic18f2550.h: 9376: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n[; ;pic18f2550.h: 9378: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n[; ;pic18f2550.h: 9380: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n[; ;pic18f2550.h: 9382: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9384: extern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9386: extern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n[; ;pic18f2550.h: 9388: extern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n[; ;pic18f2550.h: 9390: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n[; ;pic18f2550.h: 9392: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n[; ;pic18f2550.h: 9394: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n[; ;pic18f2550.h: 9396: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n[; ;pic18f2550.h: 9398: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n[; ;pic18f2550.h: 9400: extern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9402: extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9404: extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9406: extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9408: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9410: extern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9412: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9414: extern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9416: extern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9418: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9420: extern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9422: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9424: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9426: extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9428: extern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n[; ;pic18f2550.h: 9430: extern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n[; ;pic18f2550.h: 9432: extern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n[; ;pic18f2550.h: 9434: extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9436: extern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n[; ;pic18f2550.h: 9438: extern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9440: extern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9442: extern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n[; ;pic18f2550.h: 9444: extern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n[; ;pic18f2550.h: 9446: extern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n[; ;pic18f2550.h: 9448: extern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n[; ;pic18f2550.h: 9450: extern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n[; ;pic18f2550.h: 9452: extern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n[; ;pic18f2550.h: 9454: extern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n[; ;pic18f2550.h: 9456: extern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n[; ;pic18f2550.h: 9458: extern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n[; ;pic18f2550.h: 9460: extern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9462: extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9464: extern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9466: extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9468: extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n[; ;pic18f2550.h: 9470: extern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9472: extern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9474: extern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9476: extern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n[; ;pic18f2550.h: 9478: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n[; ;pic18f2550.h: 9480: extern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9482: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n[; ;pic18f2550.h: 9484: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n[; ;pic18f2550.h: 9486: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9488: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n[; ;pic18f2550.h: 9490: extern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9492: extern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9494: extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 9496: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 9498: extern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 9500: extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 9502: extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9504: extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9506: extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9508: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9510: extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9512: extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9514: extern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9516: extern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;adc.h: 2008: union ADCResult\n[; ;adc.h: 2009: {\n[; ;adc.h: 2010: int lr;\n[; ;adc.h: 2011: char br[2];\n[; ;adc.h: 2012: };\n[; ;adc.h: 2014: char BusyADC (void);\n[; ;adc.h: 2016: void ConvertADC (void);\n[; ;adc.h: 2018: void CloseADC(void);\n[; ;adc.h: 2026: int ReadADC(void);\n[; ;adc.h: 2040: void OpenADC ( unsigned char ,\n[; ;adc.h: 2041: unsigned char ,\n[; ;adc.h: 2042: unsigned char );\n[; ;adc.h: 2084: void SetChanADC(unsigned char );\n[; ;adc.h: 2100: void SelChanConvADC( unsigned char );\n[; ;ancomp.h: 38: void Close_ancomp( void );\n[; ;ancomp.h: 39: void Open_ancomp(unsigned char config);\n[; ;spi.h: 584: void OpenSPI( unsigned char sync_mode,\n[; ;spi.h: 585: unsigned char bus_mode,\n[; ;spi.h: 586: unsigned char smp_phase );\n[; ;spi.h: 588: signed char WriteSPI( unsigned char data_out );\n[; ;spi.h: 590: void getsSPI( unsigned char *rdptr, unsigned char length );\n[; ;spi.h: 592: void putsSPI( unsigned char *wrptr );\n[; ;spi.h: 594: unsigned char ReadSPI( void );\n[; ;can2510.h: 414: void CAN2510Initialize(  unsigned int configuration,\n[; ;can2510.h: 415: unsigned char brp,\n[; ;can2510.h: 416: unsigned char interruptFlags,\n[; ;can2510.h: 417: unsigned char SPI_syncMode,\n[; ;can2510.h: 418: unsigned char SPI_busMode,\n[; ;can2510.h: 419: unsigned char SPI_smpPhase );\n[; ;can2510.h: 421: signed char CAN2510Init(  unsigned long BufferConfig,\n[; ;can2510.h: 422: unsigned long BitTimeConfig,\n[; ;can2510.h: 423: unsigned char interruptEnables,\n[; ;can2510.h: 424: unsigned char SPI_syncMode,\n[; ;can2510.h: 425: unsigned char SPI_busMode,\n[; ;can2510.h: 426: unsigned char SPI_smpPhase );\n[; ;can2510.h: 428: void CAN2510Enable( void );\n[; ;can2510.h: 430: void CAN2510Disable( void );\n[; ;can2510.h: 432: void CAN2510Reset( void );\n[; ;can2510.h: 434: void CAN2510SetMode(  unsigned char mode );\n[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );\n[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );\n[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );\n[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );\n[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );\n[; ;can2510.h: 446: unsigned char CAN2510ByteRead(  unsigned char addr );\n[; ;can2510.h: 448: void CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n[; ;can2510.h: 450: void CAN2510SequentialRead(  unsigned char *DataArray,\n[; ;can2510.h: 451: unsigned char CAN2510addr,\n[; ;can2510.h: 452: unsigned char numbytes );\n[; ;can2510.h: 454: void CAN2510SequentialWrite(  unsigned char *DataArray,\n[; ;can2510.h: 455: unsigned char CAN2510addr,\n[; ;can2510.h: 456: unsigned char numbytes );\n[; ;can2510.h: 458: void CAN2510BitModify(  unsigned char address,\n[; ;can2510.h: 459: unsigned char mask,\n[; ;can2510.h: 460: unsigned char data );\n[; ;can2510.h: 462: void CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n[; ;can2510.h: 466: void CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n[; ;can2510.h: 470: signed char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n[; ;can2510.h: 471: unsigned int mask,\n[; ;can2510.h: 472: unsigned int *filters );\n[; ;can2510.h: 474: signed char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n[; ;can2510.h: 475: unsigned long mask,\n[; ;can2510.h: 476: unsigned long *filters );\n[; ;can2510.h: 478: signed char CAN2510WriteStd(  unsigned int msgId,\n[; ;can2510.h: 479: unsigned char msgPriority,\n[; ;can2510.h: 480: unsigned char numBytes,\n[; ;can2510.h: 481: unsigned char *data );\n[; ;can2510.h: 483: signed char CAN2510WriteXtd(  unsigned long msgId,\n[; ;can2510.h: 484: unsigned char msgPriority,\n[; ;can2510.h: 485: unsigned char numBytes,\n[; ;can2510.h: 486: unsigned char *data );\n[; ;can2510.h: 488: void CAN2510LoadBufferStd(  unsigned char bufferNum,\n[; ;can2510.h: 489: unsigned int msgId,\n[; ;can2510.h: 490: unsigned char numBytes,\n[; ;can2510.h: 491: unsigned char *data );\n[; ;can2510.h: 493: void CAN2510LoadBufferXtd(  unsigned char bufferNum,\n[; ;can2510.h: 494: unsigned long msgId,\n[; ;can2510.h: 495: unsigned char numBytes,\n[; ;can2510.h: 496: unsigned char *data );\n[; ;can2510.h: 498: void CAN2510LoadRTRStd(  unsigned char bufferNum,\n[; ;can2510.h: 499: unsigned int msgId,\n[; ;can2510.h: 500: unsigned char numBytes );\n[; ;can2510.h: 502: void CAN2510LoadRTRXtd(  unsigned char bufferNum,\n[; ;can2510.h: 503: unsigned long msgId,\n[; ;can2510.h: 504: unsigned char numBytes );\n[; ;can2510.h: 506: void CAN2510SetBufferPriority(  unsigned char bufferNum,\n[; ;can2510.h: 507: unsigned char bufferPriority );\n[; ;can2510.h: 509: void CAN2510SendBuffer(  unsigned char bufferNumber );\n[; ;can2510.h: 511: signed char CAN2510WriteBuffer(  unsigned char bufferNum );\n[; ;can2510.h: 513: unsigned char CAN2510DataReady(  unsigned char bufferNum );\n[; ;can2510.h: 515: unsigned char CAN2510DataRead(  unsigned char bufferNum,\n[; ;can2510.h: 516: unsigned long *msgId,\n[; ;can2510.h: 517: unsigned char *numBytes,\n[; ;can2510.h: 518: unsigned char *data );\n[; ;capture.h: 64: union capstatus\n[; ;capture.h: 65: {\n[; ;capture.h: 73: struct\n[; ;capture.h: 74: {\n[; ;capture.h: 77: unsigned Cap1OVF:1;\n[; ;capture.h: 82: unsigned Cap2OVF:1;\n[; ;capture.h: 115: };\n[; ;capture.h: 117: unsigned :8;\n[; ;capture.h: 119: };\n[; ;capture.h: 121: extern union capstatus CapStatus;\n[; ;capture.h: 123: union CapResult\n[; ;capture.h: 124: {\n[; ;capture.h: 125: unsigned int lc;\n[; ;capture.h: 126: char bc[2];\n[; ;capture.h: 127: };\n[; ;capture.h: 474: void OpenCapture1 ( unsigned char config);\n[; ;capture.h: 475: unsigned int ReadCapture1 (void);\n[; ;capture.h: 476: void CloseCapture1 (void);\n[; ;capture.h: 484: void OpenCapture2 ( unsigned char config);\n[; ;capture.h: 485: unsigned int ReadCapture2 (void);\n[; ;capture.h: 486: void CloseCapture2 (void);\n[; ;compare.h: 385: void OpenCompare1(unsigned char config,unsigned int period);\n[; ;compare.h: 386: void CloseCompare1(void);\n[; ;compare.h: 392: void OpenCompare2(unsigned char config, unsigned int period);\n[; ;compare.h: 393: void CloseCompare2(void);\n[; ;EEP.h: 36: void Busy_eep ( void );\n[; ;EEP.h: 37: unsigned char Read_b_eep( unsigned int badd );\n[; ;EEP.h: 38: void Write_b_eep( unsigned int badd, unsigned char bdata );\n[; ;stddef.h: 2: typedef int ptrdiff_t;\n[; ;stddef.h: 3: typedef unsigned size_t;\n[; ;stddef.h: 4: typedef unsigned short wchar_t;\n[; ;stddef.h: 13: extern int errno;\n[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;\n[; ;GenericTypeDefs.h: 75: typedef signed int INT;\n[; ;GenericTypeDefs.h: 76: typedef signed char INT8;\n[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;\n[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;\n[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;\n[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;\n[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;\n[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;\n[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;\n[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;\n[; ;GenericTypeDefs.h: 99: typedef union\n[; ;GenericTypeDefs.h: 100: {\n[; ;GenericTypeDefs.h: 101: UINT8 Val;\n[; ;GenericTypeDefs.h: 102: struct\n[; ;GenericTypeDefs.h: 103: {\n[; ;GenericTypeDefs.h: 104: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 105: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 106: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 107: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 108: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 109: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 110: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 111: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 112: } bits;\n[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;\n[; ;GenericTypeDefs.h: 115: typedef union\n[; ;GenericTypeDefs.h: 116: {\n[; ;GenericTypeDefs.h: 117: UINT16 Val;\n[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;\n[; ;GenericTypeDefs.h: 119: struct \n[; ;GenericTypeDefs.h: 120: {\n[; ;GenericTypeDefs.h: 121: UINT8 LB;\n[; ;GenericTypeDefs.h: 122: UINT8 HB;\n[; ;GenericTypeDefs.h: 123: } byte;\n[; ;GenericTypeDefs.h: 124: struct \n[; ;GenericTypeDefs.h: 125: {\n[; ;GenericTypeDefs.h: 126: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 127: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 128: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 129: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 130: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 131: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 132: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 133: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 134: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 135: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 136: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 137: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 138: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 139: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 140: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 141: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 142: } bits;\n[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;\n[; ;GenericTypeDefs.h: 187: typedef union\n[; ;GenericTypeDefs.h: 188: {\n[; ;GenericTypeDefs.h: 189: UINT32 Val;\n[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;\n[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;\n[; ;GenericTypeDefs.h: 192: struct \n[; ;GenericTypeDefs.h: 193: {\n[; ;GenericTypeDefs.h: 194: UINT16 LW;\n[; ;GenericTypeDefs.h: 195: UINT16 HW;\n[; ;GenericTypeDefs.h: 196: } word;\n[; ;GenericTypeDefs.h: 197: struct \n[; ;GenericTypeDefs.h: 198: {\n[; ;GenericTypeDefs.h: 199: UINT8 LB;\n[; ;GenericTypeDefs.h: 200: UINT8 HB;\n[; ;GenericTypeDefs.h: 201: UINT8 UB;\n[; ;GenericTypeDefs.h: 202: UINT8 MB;\n[; ;GenericTypeDefs.h: 203: } byte;\n[; ;GenericTypeDefs.h: 204: struct \n[; ;GenericTypeDefs.h: 205: {\n[; ;GenericTypeDefs.h: 206: UINT16_VAL low;\n[; ;GenericTypeDefs.h: 207: UINT16_VAL high;\n[; ;GenericTypeDefs.h: 208: }wordUnion;\n[; ;GenericTypeDefs.h: 209: struct \n[; ;GenericTypeDefs.h: 210: {\n[; ;GenericTypeDefs.h: 211: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 212: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 213: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 214: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 215: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 216: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 217: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 218: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 219: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 220: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 221: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 222: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 223: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 224: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 225: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 226: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 227: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 228: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 229: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 230: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 231: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 232: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 233: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 234: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 235: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 236: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 237: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 238: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 239: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 240: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 241: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 242: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 243: } bits;\n[; ;GenericTypeDefs.h: 244: } UINT32_VAL;\n[; ;GenericTypeDefs.h: 248: typedef union\n[; ;GenericTypeDefs.h: 249: {\n[; ;GenericTypeDefs.h: 250: UINT64 Val;\n[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;\n[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;\n[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;\n[; ;GenericTypeDefs.h: 254: struct \n[; ;GenericTypeDefs.h: 255: {\n[; ;GenericTypeDefs.h: 256: UINT32 LD;\n[; ;GenericTypeDefs.h: 257: UINT32 HD;\n[; ;GenericTypeDefs.h: 258: } dword;\n[; ;GenericTypeDefs.h: 259: struct \n[; ;GenericTypeDefs.h: 260: {\n[; ;GenericTypeDefs.h: 261: UINT16 LW;\n[; ;GenericTypeDefs.h: 262: UINT16 HW;\n[; ;GenericTypeDefs.h: 263: UINT16 UW;\n[; ;GenericTypeDefs.h: 264: UINT16 MW;\n[; ;GenericTypeDefs.h: 265: } word;\n[; ;GenericTypeDefs.h: 266: struct \n[; ;GenericTypeDefs.h: 267: {\n[; ;GenericTypeDefs.h: 268: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 269: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 270: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 271: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 272: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 273: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 274: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 275: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 276: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 277: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 278: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 279: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 280: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 281: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 282: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 283: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 284: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 285: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 286: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 287: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 288: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 289: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 290: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 291: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 292: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 293: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 294: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 295: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 296: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 297: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 298: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 299: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 300: UINT8 b32:1;\n[; ;GenericTypeDefs.h: 301: UINT8 b33:1;\n[; ;GenericTypeDefs.h: 302: UINT8 b34:1;\n[; ;GenericTypeDefs.h: 303: UINT8 b35:1;\n[; ;GenericTypeDefs.h: 304: UINT8 b36:1;\n[; ;GenericTypeDefs.h: 305: UINT8 b37:1;\n[; ;GenericTypeDefs.h: 306: UINT8 b38:1;\n[; ;GenericTypeDefs.h: 307: UINT8 b39:1;\n[; ;GenericTypeDefs.h: 308: UINT8 b40:1;\n[; ;GenericTypeDefs.h: 309: UINT8 b41:1;\n[; ;GenericTypeDefs.h: 310: UINT8 b42:1;\n[; ;GenericTypeDefs.h: 311: UINT8 b43:1;\n[; ;GenericTypeDefs.h: 312: UINT8 b44:1;\n[; ;GenericTypeDefs.h: 313: UINT8 b45:1;\n[; ;GenericTypeDefs.h: 314: UINT8 b46:1;\n[; ;GenericTypeDefs.h: 315: UINT8 b47:1;\n[; ;GenericTypeDefs.h: 316: UINT8 b48:1;\n[; ;GenericTypeDefs.h: 317: UINT8 b49:1;\n[; ;GenericTypeDefs.h: 318: UINT8 b50:1;\n[; ;GenericTypeDefs.h: 319: UINT8 b51:1;\n[; ;GenericTypeDefs.h: 320: UINT8 b52:1;\n[; ;GenericTypeDefs.h: 321: UINT8 b53:1;\n[; ;GenericTypeDefs.h: 322: UINT8 b54:1;\n[; ;GenericTypeDefs.h: 323: UINT8 b55:1;\n[; ;GenericTypeDefs.h: 324: UINT8 b56:1;\n[; ;GenericTypeDefs.h: 325: UINT8 b57:1;\n[; ;GenericTypeDefs.h: 326: UINT8 b58:1;\n[; ;GenericTypeDefs.h: 327: UINT8 b59:1;\n[; ;GenericTypeDefs.h: 328: UINT8 b60:1;\n[; ;GenericTypeDefs.h: 329: UINT8 b61:1;\n[; ;GenericTypeDefs.h: 330: UINT8 b62:1;\n[; ;GenericTypeDefs.h: 331: UINT8 b63:1;\n[; ;GenericTypeDefs.h: 332: } bits;\n[; ;GenericTypeDefs.h: 333: } UINT64_VAL;\n[; ;GenericTypeDefs.h: 339: typedef void VOID;\n[; ;GenericTypeDefs.h: 341: typedef char CHAR8;\n[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;\n[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;\n[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;\n[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;\n[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;\n[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;\n[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;\n[; ;GenericTypeDefs.h: 352: typedef signed long LONG;\n[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;\n[; ;GenericTypeDefs.h: 356: typedef union\n[; ;GenericTypeDefs.h: 357: {\n[; ;GenericTypeDefs.h: 358: BYTE Val;\n[; ;GenericTypeDefs.h: 359: struct \n[; ;GenericTypeDefs.h: 360: {\n[; ;GenericTypeDefs.h: 361: BYTE b0:1;\n[; ;GenericTypeDefs.h: 362: BYTE b1:1;\n[; ;GenericTypeDefs.h: 363: BYTE b2:1;\n[; ;GenericTypeDefs.h: 364: BYTE b3:1;\n[; ;GenericTypeDefs.h: 365: BYTE b4:1;\n[; ;GenericTypeDefs.h: 366: BYTE b5:1;\n[; ;GenericTypeDefs.h: 367: BYTE b6:1;\n[; ;GenericTypeDefs.h: 368: BYTE b7:1;\n[; ;GenericTypeDefs.h: 369: } bits;\n[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;\n[; ;GenericTypeDefs.h: 372: typedef union\n[; ;GenericTypeDefs.h: 373: {\n[; ;GenericTypeDefs.h: 374: WORD Val;\n[; ;GenericTypeDefs.h: 375: BYTE v[2] ;\n[; ;GenericTypeDefs.h: 376: struct \n[; ;GenericTypeDefs.h: 377: {\n[; ;GenericTypeDefs.h: 378: BYTE LB;\n[; ;GenericTypeDefs.h: 379: BYTE HB;\n[; ;GenericTypeDefs.h: 380: } byte;\n[; ;GenericTypeDefs.h: 381: struct \n[; ;GenericTypeDefs.h: 382: {\n[; ;GenericTypeDefs.h: 383: BYTE b0:1;\n[; ;GenericTypeDefs.h: 384: BYTE b1:1;\n[; ;GenericTypeDefs.h: 385: BYTE b2:1;\n[; ;GenericTypeDefs.h: 386: BYTE b3:1;\n[; ;GenericTypeDefs.h: 387: BYTE b4:1;\n[; ;GenericTypeDefs.h: 388: BYTE b5:1;\n[; ;GenericTypeDefs.h: 389: BYTE b6:1;\n[; ;GenericTypeDefs.h: 390: BYTE b7:1;\n[; ;GenericTypeDefs.h: 391: BYTE b8:1;\n[; ;GenericTypeDefs.h: 392: BYTE b9:1;\n[; ;GenericTypeDefs.h: 393: BYTE b10:1;\n[; ;GenericTypeDefs.h: 394: BYTE b11:1;\n[; ;GenericTypeDefs.h: 395: BYTE b12:1;\n[; ;GenericTypeDefs.h: 396: BYTE b13:1;\n[; ;GenericTypeDefs.h: 397: BYTE b14:1;\n[; ;GenericTypeDefs.h: 398: BYTE b15:1;\n[; ;GenericTypeDefs.h: 399: } bits;\n[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;\n[; ;GenericTypeDefs.h: 402: typedef union\n[; ;GenericTypeDefs.h: 403: {\n[; ;GenericTypeDefs.h: 404: DWORD Val;\n[; ;GenericTypeDefs.h: 405: WORD w[2] ;\n[; ;GenericTypeDefs.h: 406: BYTE v[4] ;\n[; ;GenericTypeDefs.h: 407: struct \n[; ;GenericTypeDefs.h: 408: {\n[; ;GenericTypeDefs.h: 409: WORD LW;\n[; ;GenericTypeDefs.h: 410: WORD HW;\n[; ;GenericTypeDefs.h: 411: } word;\n[; ;GenericTypeDefs.h: 412: struct \n[; ;GenericTypeDefs.h: 413: {\n[; ;GenericTypeDefs.h: 414: BYTE LB;\n[; ;GenericTypeDefs.h: 415: BYTE HB;\n[; ;GenericTypeDefs.h: 416: BYTE UB;\n[; ;GenericTypeDefs.h: 417: BYTE MB;\n[; ;GenericTypeDefs.h: 418: } byte;\n[; ;GenericTypeDefs.h: 419: struct \n[; ;GenericTypeDefs.h: 420: {\n[; ;GenericTypeDefs.h: 421: WORD_VAL low;\n[; ;GenericTypeDefs.h: 422: WORD_VAL high;\n[; ;GenericTypeDefs.h: 423: }wordUnion;\n[; ;GenericTypeDefs.h: 424: struct \n[; ;GenericTypeDefs.h: 425: {\n[; ;GenericTypeDefs.h: 426: BYTE b0:1;\n[; ;GenericTypeDefs.h: 427: BYTE b1:1;\n[; ;GenericTypeDefs.h: 428: BYTE b2:1;\n[; ;GenericTypeDefs.h: 429: BYTE b3:1;\n[; ;GenericTypeDefs.h: 430: BYTE b4:1;\n[; ;GenericTypeDefs.h: 431: BYTE b5:1;\n[; ;GenericTypeDefs.h: 432: BYTE b6:1;\n[; ;GenericTypeDefs.h: 433: BYTE b7:1;\n[; ;GenericTypeDefs.h: 434: BYTE b8:1;\n[; ;GenericTypeDefs.h: 435: BYTE b9:1;\n[; ;GenericTypeDefs.h: 436: BYTE b10:1;\n[; ;GenericTypeDefs.h: 437: BYTE b11:1;\n[; ;GenericTypeDefs.h: 438: BYTE b12:1;\n[; ;GenericTypeDefs.h: 439: BYTE b13:1;\n[; ;GenericTypeDefs.h: 440: BYTE b14:1;\n[; ;GenericTypeDefs.h: 441: BYTE b15:1;\n[; ;GenericTypeDefs.h: 442: BYTE b16:1;\n[; ;GenericTypeDefs.h: 443: BYTE b17:1;\n[; ;GenericTypeDefs.h: 444: BYTE b18:1;\n[; ;GenericTypeDefs.h: 445: BYTE b19:1;\n[; ;GenericTypeDefs.h: 446: BYTE b20:1;\n[; ;GenericTypeDefs.h: 447: BYTE b21:1;\n[; ;GenericTypeDefs.h: 448: BYTE b22:1;\n[; ;GenericTypeDefs.h: 449: BYTE b23:1;\n[; ;GenericTypeDefs.h: 450: BYTE b24:1;\n[; ;GenericTypeDefs.h: 451: BYTE b25:1;\n[; ;GenericTypeDefs.h: 452: BYTE b26:1;\n[; ;GenericTypeDefs.h: 453: BYTE b27:1;\n[; ;GenericTypeDefs.h: 454: BYTE b28:1;\n[; ;GenericTypeDefs.h: 455: BYTE b29:1;\n[; ;GenericTypeDefs.h: 456: BYTE b30:1;\n[; ;GenericTypeDefs.h: 457: BYTE b31:1;\n[; ;GenericTypeDefs.h: 458: } bits;\n[; ;GenericTypeDefs.h: 459: } DWORD_VAL;\n[; ;GenericTypeDefs.h: 462: typedef union\n[; ;GenericTypeDefs.h: 463: {\n[; ;GenericTypeDefs.h: 464: QWORD Val;\n[; ;GenericTypeDefs.h: 465: DWORD d[2] ;\n[; ;GenericTypeDefs.h: 466: WORD w[4] ;\n[; ;GenericTypeDefs.h: 467: BYTE v[8] ;\n[; ;GenericTypeDefs.h: 468: struct \n[; ;GenericTypeDefs.h: 469: {\n[; ;GenericTypeDefs.h: 470: DWORD LD;\n[; ;GenericTypeDefs.h: 471: DWORD HD;\n[; ;GenericTypeDefs.h: 472: } dword;\n[; ;GenericTypeDefs.h: 473: struct \n[; ;GenericTypeDefs.h: 474: {\n[; ;GenericTypeDefs.h: 475: WORD LW;\n[; ;GenericTypeDefs.h: 476: WORD HW;\n[; ;GenericTypeDefs.h: 477: WORD UW;\n[; ;GenericTypeDefs.h: 478: WORD MW;\n[; ;GenericTypeDefs.h: 479: } word;\n[; ;GenericTypeDefs.h: 480: struct \n[; ;GenericTypeDefs.h: 481: {\n[; ;GenericTypeDefs.h: 482: BYTE b0:1;\n[; ;GenericTypeDefs.h: 483: BYTE b1:1;\n[; ;GenericTypeDefs.h: 484: BYTE b2:1;\n[; ;GenericTypeDefs.h: 485: BYTE b3:1;\n[; ;GenericTypeDefs.h: 486: BYTE b4:1;\n[; ;GenericTypeDefs.h: 487: BYTE b5:1;\n[; ;GenericTypeDefs.h: 488: BYTE b6:1;\n[; ;GenericTypeDefs.h: 489: BYTE b7:1;\n[; ;GenericTypeDefs.h: 490: BYTE b8:1;\n[; ;GenericTypeDefs.h: 491: BYTE b9:1;\n[; ;GenericTypeDefs.h: 492: BYTE b10:1;\n[; ;GenericTypeDefs.h: 493: BYTE b11:1;\n[; ;GenericTypeDefs.h: 494: BYTE b12:1;\n[; ;GenericTypeDefs.h: 495: BYTE b13:1;\n[; ;GenericTypeDefs.h: 496: BYTE b14:1;\n[; ;GenericTypeDefs.h: 497: BYTE b15:1;\n[; ;GenericTypeDefs.h: 498: BYTE b16:1;\n[; ;GenericTypeDefs.h: 499: BYTE b17:1;\n[; ;GenericTypeDefs.h: 500: BYTE b18:1;\n[; ;GenericTypeDefs.h: 501: BYTE b19:1;\n[; ;GenericTypeDefs.h: 502: BYTE b20:1;\n[; ;GenericTypeDefs.h: 503: BYTE b21:1;\n[; ;GenericTypeDefs.h: 504: BYTE b22:1;\n[; ;GenericTypeDefs.h: 505: BYTE b23:1;\n[; ;GenericTypeDefs.h: 506: BYTE b24:1;\n[; ;GenericTypeDefs.h: 507: BYTE b25:1;\n[; ;GenericTypeDefs.h: 508: BYTE b26:1;\n[; ;GenericTypeDefs.h: 509: BYTE b27:1;\n[; ;GenericTypeDefs.h: 510: BYTE b28:1;\n[; ;GenericTypeDefs.h: 511: BYTE b29:1;\n[; ;GenericTypeDefs.h: 512: BYTE b30:1;\n[; ;GenericTypeDefs.h: 513: BYTE b31:1;\n[; ;GenericTypeDefs.h: 514: BYTE b32:1;\n[; ;GenericTypeDefs.h: 515: BYTE b33:1;\n[; ;GenericTypeDefs.h: 516: BYTE b34:1;\n[; ;GenericTypeDefs.h: 517: BYTE b35:1;\n[; ;GenericTypeDefs.h: 518: BYTE b36:1;\n[; ;GenericTypeDefs.h: 519: BYTE b37:1;\n[; ;GenericTypeDefs.h: 520: BYTE b38:1;\n[; ;GenericTypeDefs.h: 521: BYTE b39:1;\n[; ;GenericTypeDefs.h: 522: BYTE b40:1;\n[; ;GenericTypeDefs.h: 523: BYTE b41:1;\n[; ;GenericTypeDefs.h: 524: BYTE b42:1;\n[; ;GenericTypeDefs.h: 525: BYTE b43:1;\n[; ;GenericTypeDefs.h: 526: BYTE b44:1;\n[; ;GenericTypeDefs.h: 527: BYTE b45:1;\n[; ;GenericTypeDefs.h: 528: BYTE b46:1;\n[; ;GenericTypeDefs.h: 529: BYTE b47:1;\n[; ;GenericTypeDefs.h: 530: BYTE b48:1;\n[; ;GenericTypeDefs.h: 531: BYTE b49:1;\n[; ;GenericTypeDefs.h: 532: BYTE b50:1;\n[; ;GenericTypeDefs.h: 533: BYTE b51:1;\n[; ;GenericTypeDefs.h: 534: BYTE b52:1;\n[; ;GenericTypeDefs.h: 535: BYTE b53:1;\n[; ;GenericTypeDefs.h: 536: BYTE b54:1;\n[; ;GenericTypeDefs.h: 537: BYTE b55:1;\n[; ;GenericTypeDefs.h: 538: BYTE b56:1;\n[; ;GenericTypeDefs.h: 539: BYTE b57:1;\n[; ;GenericTypeDefs.h: 540: BYTE b58:1;\n[; ;GenericTypeDefs.h: 541: BYTE b59:1;\n[; ;GenericTypeDefs.h: 542: BYTE b60:1;\n[; ;GenericTypeDefs.h: 543: BYTE b61:1;\n[; ;GenericTypeDefs.h: 544: BYTE b62:1;\n[; ;GenericTypeDefs.h: 545: BYTE b63:1;\n[; ;GenericTypeDefs.h: 546: } bits;\n[; ;GenericTypeDefs.h: 547: } QWORD_VAL;\n[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;i2c.h: 775: void IdleI2C( void );\n[; ;i2c.h: 777: void OpenI2C( unsigned char sync_mode, unsigned char slew );\n[; ;i2c.h: 779: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 781: signed char putsI2C( unsigned char *wrptr );\n[; ;i2c.h: 783: unsigned char ReadI2C( void );\n[; ;i2c.h: 785: void CloseI2C( void );\n[; ;i2c.h: 899: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 901: signed char getsI2C( unsigned char *rdptr, unsigned char length );\n[; ;i2c.h: 908: signed char EEAckPolling( unsigned char control );\n[; ;i2c.h: 910: signed char EEByteWrite( unsigned char control,\n[; ;i2c.h: 911: unsigned char address,\n[; ;i2c.h: 912: unsigned char data );\n[; ;i2c.h: 914: signed int EECurrentAddRead( unsigned char control );\n[; ;i2c.h: 916: signed char EEPageWrite( unsigned char control,\n[; ;i2c.h: 917: unsigned char address,\n[; ;i2c.h: 918: unsigned char *wrptr );\n[; ;i2c.h: 920: signed int EERandomRead( unsigned char control, unsigned char address );\n[; ;i2c.h: 922: signed char EESequentialRead( unsigned char control,\n[; ;i2c.h: 923: unsigned char address,\n[; ;i2c.h: 924: unsigned char *rdptr,\n[; ;i2c.h: 925: unsigned char length );\n[; ;mwire.h: 325: void OpenMwire( unsigned char sync_mode );\n[; ;mwire.h: 327: unsigned char ReadMwire( unsigned char high_byte,\n[; ;mwire.h: 328: unsigned char low_byte );\n[; ;mwire.h: 341: signed char WriteMwire( unsigned char data_out );\n[; ;mwire.h: 354: void getsMwire( unsigned char *rdptr, unsigned char length );\n[; ;portb.h: 126: void OpenPORTB( unsigned char config);\n[; ;portb.h: 176: void OpenRB0INT( unsigned char config);\n[; ;portb.h: 194: void OpenRB1INT( unsigned char config);\n[; ;portb.h: 211: void OpenRB2INT( unsigned char config);\n[; ;pwm.h: 85: union PWMDC\n[; ;pwm.h: 86: {\n[; ;pwm.h: 87: unsigned int lpwm;\n[; ;pwm.h: 88: char bpwm[2];\n[; ;pwm.h: 89: };\n[; ;pwm.h: 467: void OpenPWM1 ( char period);\n[; ;pwm.h: 468: void SetDCPWM1 ( unsigned int duty_cycle);\n[; ;pwm.h: 477: void ClosePWM1 (void);\n[; ;pwm.h: 485: void OpenPWM2 ( char period);\n[; ;pwm.h: 486: void SetDCPWM2( unsigned int duty_cycle);\n[; ;pwm.h: 492: void ClosePWM2 (void);\n[; ;reset.h: 16: char isMCLR(void);\n[; ;reset.h: 17: void StatusReset(void);\n[; ;reset.h: 18: char isPOR(void);\n[; ;reset.h: 19: char isWU(void);\n[; ;reset.h: 22: char isBOR(void);\n[; ;reset.h: 26: char isWDTTO(void);\n[; ;reset.h: 27: char isWDTWU(void);\n[; ;reset.h: 31: char isLVD(void);\n[; ;rtcc.h: 687: void Open_RTCC(void);\n[; ;rtcc.h: 688: void Close_RTCC(void);\n[; ;rtcc.h: 689: unsigned char update_RTCC(void);\n[; ;sw_i2c.h: 97: void SWStopI2C ( void );\n[; ;sw_i2c.h: 98: void SWStartI2C ( void );\n[; ;sw_i2c.h: 99: void SWRestartI2C ( void );\n[; ;sw_i2c.h: 100: void SWStopI2C ( void );\n[; ;sw_i2c.h: 102: signed char SWAckI2C( void );\n[; ;sw_i2c.h: 103: signed char Clock_test( void );\n[; ;sw_i2c.h: 104: signed int SWReadI2C( void );\n[; ;sw_i2c.h: 105: signed char SWWriteI2C(  unsigned char data_out );\n[; ;sw_i2c.h: 106: signed char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\n[; ;sw_i2c.h: 107: signed char SWPutsI2C(  unsigned char *wrptr );\n[; ;sw_spi.h: 84: void OpenSWSPI(void);\n[; ;sw_spi.h: 87: char WriteSWSPI( char output);\n[; ;sw_spi.h: 90: void SetCSSWSPI(void);\n[; ;sw_spi.h: 93: void ClearCSSWSPI(void);\n[; ;sw_uart.h: 47: void OpenUART(void);\n[; ;sw_uart.h: 49: unsigned char ReadUART(void);\n[; ;sw_uart.h: 51: void WriteUART( unsigned char);\n[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);\n[; ;sw_uart.h: 55: void putsUART( char *);\n[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);\n[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);\n[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);\n[; ;timers.h: 36: union Timers\n[; ;timers.h: 37: {\n[; ;timers.h: 38: unsigned int lt;\n[; ;timers.h: 39: char bt[2];\n[; ;timers.h: 40: };\n[; ;timers.h: 118: void OpenTimer0 ( unsigned char config);\n[; ;timers.h: 119: void CloseTimer0 (void);\n[; ;timers.h: 120: unsigned int ReadTimer0 (void);\n[; ;timers.h: 121: void WriteTimer0 ( unsigned int timer0);\n[; ;timers.h: 236: void OpenTimer1 ( unsigned char config);\n[; ;timers.h: 237: void CloseTimer1 (void);\n[; ;timers.h: 238: unsigned int ReadTimer1 (void);\n[; ;timers.h: 239: void WriteTimer1 ( unsigned int timer1);\n[; ;timers.h: 325: void OpenTimer2 ( unsigned char config);\n[; ;timers.h: 326: void CloseTimer2 (void);\n[; ;timers.h: 391: void OpenTimer3 ( unsigned char config);\n[; ;timers.h: 392: void CloseTimer3 (void);\n[; ;timers.h: 393: unsigned int ReadTimer3 (void);\n[; ;timers.h: 394: void WriteTimer3 ( unsigned int timer3);\n[; ;timers.h: 1179: void SetTmrCCPSrc( unsigned char );\n[; ;usart.h: 568: union USART\n[; ;usart.h: 569: {\n[; ;usart.h: 570: unsigned char val;\n[; ;usart.h: 571: struct\n[; ;usart.h: 572: {\n[; ;usart.h: 573: unsigned RX_NINE:1;\n[; ;usart.h: 574: unsigned TX_NINE:1;\n[; ;usart.h: 575: unsigned FRAME_ERROR:1;\n[; ;usart.h: 576: unsigned OVERRUN_ERROR:1;\n[; ;usart.h: 577: unsigned fill:4;\n[; ;usart.h: 578: };\n[; ;usart.h: 579: };\n[; ;usart.h: 580: extern union USART USART_Status;\n[; ;usart.h: 581: void OpenUSART ( unsigned char config, unsigned spbrg);\n[; ;usart.h: 596: char ReadUSART (void);\n[; ;usart.h: 597: void WriteUSART ( char data);\n[; ;usart.h: 598: void getsUSART ( char *buffer, unsigned char len);\n[; ;usart.h: 599: void putsUSART ( char *data);\n[; ;usart.h: 600: void putrsUSART ( const  char *data);\n[; ;usart.h: 654: void baudUSART ( unsigned char baudconfig);\n[; ;xlcd.h: 87: void OpenXLCD( unsigned char);\n[; ;xlcd.h: 92: void SetCGRamAddr( unsigned char);\n[; ;xlcd.h: 97: void SetDDRamAddr( unsigned char);\n[; ;xlcd.h: 102: unsigned char BusyXLCD(void);\n[; ;xlcd.h: 107: unsigned char ReadAddrXLCD(void);\n[; ;xlcd.h: 112: char ReadDataXLCD(void);\n[; ;xlcd.h: 117: void WriteCmdXLCD( unsigned char);\n[; ;xlcd.h: 122: void WriteDataXLCD( char);\n[; ;xlcd.h: 132: void putsXLCD( char *);\n[; ;xlcd.h: 137: void putrsXLCD(const char *);\n[; ;xlcd.h: 140: extern void DelayFor18TCY(void);\n[; ;xlcd.h: 141: extern void DelayPORXLCD(void);\n[; ;xlcd.h: 142: extern void DelayXLCD(void);\n[; ;pic18.h: 18: __attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned c\n[; ;pic18.h: 144: extern void _delay(unsigned long);\n[; ;pic18.h: 146: extern void _delaywdt(unsigned long);\n[; ;pic18.h: 148: extern void _delay3(unsigned char);\n[; ;stdint.h: 13: typedef signed char int8_t;\n[; ;stdint.h: 20: typedef signed int int16_t;\n[; ;stdint.h: 28: typedef signed short long int int24_t;\n[; ;stdint.h: 36: typedef signed long int int32_t;\n[; ;stdint.h: 43: typedef unsigned char uint8_t;\n[; ;stdint.h: 49: typedef unsigned int uint16_t;\n[; ;stdint.h: 56: typedef unsigned short long int uint24_t;\n[; ;stdint.h: 63: typedef unsigned long int uint32_t;\n[; ;stdint.h: 71: typedef signed char int_least8_t;\n[; ;stdint.h: 78: typedef signed int int_least16_t;\n[; ;stdint.h: 90: typedef signed short long int int_least24_t;\n[; ;stdint.h: 98: typedef signed long int int_least32_t;\n[; ;stdint.h: 105: typedef unsigned char uint_least8_t;\n[; ;stdint.h: 111: typedef unsigned int uint_least16_t;\n[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;\n[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;\n[; ;stdint.h: 137: typedef signed char int_fast8_t;\n[; ;stdint.h: 144: typedef signed int int_fast16_t;\n[; ;stdint.h: 156: typedef signed short long int int_fast24_t;\n[; ;stdint.h: 164: typedef signed long int int_fast32_t;\n[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;\n[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;\n[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;\n[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;\n[; ;stdint.h: 200: typedef int32_t intmax_t;\n[; ;stdint.h: 205: typedef uint32_t uintmax_t;\n[; ;stdint.h: 210: typedef int16_t intptr_t;\n[; ;stdint.h: 215: typedef uint16_t uintptr_t;\n[; ;SPIPort.h: 18: typedef char xSPIHandle;\n[; ;SPI.h: 58: enum enSPIModules {\n[; ;SPI.h: 59: E_SPI_1 = 1,\n[; ;SPI.h: 60: E_SPI_2 = 2,\n[; ;SPI.h: 61: E_SPI_3 = 3,\n[; ;SPI.h: 62: E_SPI_4 = 4,\n[; ;SPI.h: 63: };\n[; ;SPI.h: 86: xSPIHandle spi_init(enum enSPIModules eModule);\n[; ;SPI.h: 99: uint8_t spi_control(xSPIHandle spid, uint32_t ctrl, uint32_t arg);\n[; ;SPI.h: 111: uint8_t spi_open(xSPIHandle spid);\n[; ;SPI.h: 122: uint8_t spi_close(xSPIHandle spid);\n[; ;SPI.h: 131: void spi_write(xSPIHandle spid, uint8_t data);\n[; ;SPI.h: 140: uint8_t spi_read(xSPIHandle spid);\n[; ;SPI.h: 149: void spi_write_array(xSPIHandle spid, const uint8_t * txbuf, uint16_t len);\n[; ;SPI.h: 158: void spi_read_array(xSPIHandle spid, uint8_t * rxbuf, uint16_t len);\n[; ;SPI.h: 168: uint8_t spi_trans(xSPIHandle spid, uint8_t data);\n[; ;SPI.h: 178: void spi_trans_array(xSPIHandle spid, uint8_t * txbuf, uint8_t * rxbuf, uint16_t len);\n\"22 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\n[v _inuse `uc ~T0 @X0 1 s ]\n[i _inuse\n-> -> 0 `i `uc\n]\n[; ;SPI-PIC16.c: 22: static uint8_t inuse = 0;\n[; ;SPI-PIC16.c: 24: static uint8_t spi_available( xSPIHandle spid );\n\"27\n[v _spi_init `(uc ~T0 @X0 1 ef1`E4685 ]\n{\n[; ;SPI-PIC16.c: 26: xSPIHandle spi_init( enum enSPIModules eModule )\n[; ;SPI-PIC16.c: 27: {\n[e :U _spi_init ]\n[v _eModule `E4685 ~T0 @X0 1 r1 ]\n[f ]\n[; ;SPI-PIC16.c: 28: if( eModule != 1 )\n\"28\n[e $ ! != -> _eModule `i -> 1 `i 519  ]\n[; ;SPI-PIC16.c: 29: return 0;\n\"29\n[e ) -> -> 0 `i `uc ]\n[e $UE 518  ]\n[e :U 519 ]\n[; ;SPI-PIC16.c: 31: SSPSTAT = 0x00;\n\"31\n[e = _SSPSTAT -> -> 0 `i `uc ]\n[; ;SPI-PIC16.c: 32: SSPCON1 = 0x00;\n\"32\n[e = _SSPCON1 -> -> 0 `i `uc ]\n[; ;SPI-PIC16.c: 35: spi_control( eModule, 0x00000001 | 0x00000010, 3 );\n\"35\n[e ( _spi_control (3 , , -> _eModule `uc -> -> | -> 1 `i -> 16 `i `l `ul -> -> -> 3 `i `l `ul ]\n[; ;SPI-PIC16.c: 38: return eModule;\n\"38\n[e ) -> _eModule `uc ]\n[e $UE 518  ]\n[; ;SPI-PIC16.c: 39: }\n\"39\n[e :UE 518 ]\n}\n\"42\n[v _spi_control `(uc ~T0 @X0 1 ef3`uc`ul`ul ]\n{\n[; ;SPI-PIC16.c: 41: uint8_t spi_control( xSPIHandle spid, uint32_t ctrl, uint32_t arg )\n[; ;SPI-PIC16.c: 42: {\n[e :U _spi_control ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[v _ctrl `ul ~T0 @X0 1 r2 ]\n[v _arg `ul ~T0 @X0 1 r3 ]\n[f ]\n[; ;SPI-PIC16.c: 44: if( spid != 1 )\n\"44\n[e $ ! != -> _spid `i -> 1 `i 521  ]\n[; ;SPI-PIC16.c: 45: return -1;\n\"45\n[e ) -> -U -> 1 `i `uc ]\n[e $UE 520  ]\n[e :U 521 ]\n\"47\n[v _speed `uc ~T0 @X0 1 a ]\n[; ;SPI-PIC16.c: 47: uint8_t speed = (uint8_t) arg & 0x0000000F;\n[e = _speed -> & -> -> _arg `uc `i -> 15 `i `uc ]\n[; ;SPI-PIC16.c: 50: switch( ctrl & 0x0000000F ) {\n\"50\n[e $U 523  ]\n{\n[; ;SPI-PIC16.c: 52: case 0x00000001:\n\"52\n[e :U 524 ]\n[; ;SPI-PIC16.c: 53: if( speed == 3 )\n\"53\n[e $ ! == -> _speed `i -> 3 `i 525  ]\n[; ;SPI-PIC16.c: 54: SSPCON1bits.SSPM = 0;\n\"54\n[e = . . _SSPCON1bits 0 0 -> -> 0 `i `uc ]\n[e $U 526  ]\n\"55\n[e :U 525 ]\n[; ;SPI-PIC16.c: 55: else if( speed == 5 )\n[e $ ! == -> _speed `i -> 5 `i 527  ]\n[; ;SPI-PIC16.c: 56: SSPCON1bits.SSPM = 1;\n\"56\n[e = . . _SSPCON1bits 0 0 -> -> 1 `i `uc ]\n[e $U 528  ]\n\"57\n[e :U 527 ]\n[; ;SPI-PIC16.c: 57: else if( speed == 7 )\n[e $ ! == -> _speed `i -> 7 `i 529  ]\n[; ;SPI-PIC16.c: 58: SSPCON1bits.SSPM = 2;\n\"58\n[e = . . _SSPCON1bits 0 0 -> -> 2 `i `uc ]\n[e $U 530  ]\n\"59\n[e :U 529 ]\n[; ;SPI-PIC16.c: 59: else\n[; ;SPI-PIC16.c: 61: SSPCON1bits.SSPM = 2;\n\"61\n[e = . . _SSPCON1bits 0 0 -> -> 2 `i `uc ]\n[e :U 530 ]\n[e :U 528 ]\n[e :U 526 ]\n[; ;SPI-PIC16.c: 62: break;\n\"62\n[e $U 522  ]\n[; ;SPI-PIC16.c: 63: case 0x00000002:\n\"63\n[e :U 531 ]\n[; ;SPI-PIC16.c: 65: SSPCON1bits.SSPM = 4;\n\"65\n[e = . . _SSPCON1bits 0 0 -> -> 4 `i `uc ]\n[; ;SPI-PIC16.c: 66: break;\n\"66\n[e $U 522  ]\n[; ;SPI-PIC16.c: 68: default:\n\"68\n[e :U 532 ]\n[; ;SPI-PIC16.c: 69: return -2;\n\"69\n[e ) -> -U -> 2 `i `uc ]\n[e $UE 520  ]\n\"70\n}\n[; ;SPI-PIC16.c: 70: }\n[e $U 522  ]\n\"50\n[e :U 523 ]\n[e [\\ & _ctrl -> -> -> 15 `i `l `ul , $ -> -> -> 1 `i `l `ul 524\n , $ -> -> -> 2 `i `l `ul 531\n 532 ]\n\"70\n[e :U 522 ]\n[; ;SPI-PIC16.c: 73: switch( ctrl & 0x000000F0 ) {\n\"73\n[e $U 534  ]\n{\n[; ;SPI-PIC16.c: 74: case 0x00000010:\n\"74\n[e :U 535 ]\n[; ;SPI-PIC16.c: 75: SSPCON1bits.CKP = 0;\n\"75\n[e = . . _SSPCON1bits 0 1 -> -> 0 `i `uc ]\n[; ;SPI-PIC16.c: 76: SSPSTATbits.CKE = 0;\n\"76\n[e = . . _SSPSTATbits 2 6 -> -> 0 `i `uc ]\n[; ;SPI-PIC16.c: 77: break;\n\"77\n[e $U 533  ]\n[; ;SPI-PIC16.c: 78: case 0x00000020:\n\"78\n[e :U 536 ]\n[; ;SPI-PIC16.c: 79: SSPCON1bits.CKP = 0;\n\"79\n[e = . . _SSPCON1bits 0 1 -> -> 0 `i `uc ]\n[; ;SPI-PIC16.c: 80: SSPSTATbits.CKE = 1;\n\"80\n[e = . . _SSPSTATbits 2 6 -> -> 1 `i `uc ]\n[; ;SPI-PIC16.c: 81: break;\n\"81\n[e $U 533  ]\n[; ;SPI-PIC16.c: 82: case 0x00000030:\n\"82\n[e :U 537 ]\n[; ;SPI-PIC16.c: 83: SSPCON1bits.CKP = 1;\n\"83\n[e = . . _SSPCON1bits 0 1 -> -> 1 `i `uc ]\n[; ;SPI-PIC16.c: 84: SSPSTATbits.CKE = 0;\n\"84\n[e = . . _SSPSTATbits 2 6 -> -> 0 `i `uc ]\n[; ;SPI-PIC16.c: 85: break;\n\"85\n[e $U 533  ]\n[; ;SPI-PIC16.c: 86: case 0x00000040:\n\"86\n[e :U 538 ]\n[; ;SPI-PIC16.c: 87: SSPCON1bits.CKP = 1;\n\"87\n[e = . . _SSPCON1bits 0 1 -> -> 1 `i `uc ]\n[; ;SPI-PIC16.c: 88: SSPSTATbits.CKE = 1;\n\"88\n[e = . . _SSPSTATbits 2 6 -> -> 1 `i `uc ]\n[; ;SPI-PIC16.c: 89: break;\n\"89\n[e $U 533  ]\n[; ;SPI-PIC16.c: 90: default:\n\"90\n[e :U 539 ]\n[; ;SPI-PIC16.c: 91: return -2;\n\"91\n[e ) -> -U -> 2 `i `uc ]\n[e $UE 520  ]\n\"92\n}\n[; ;SPI-PIC16.c: 92: }\n[e $U 533  ]\n\"73\n[e :U 534 ]\n[e [\\ & _ctrl -> -> -> 240 `i `l `ul , $ -> -> -> 16 `i `l `ul 535\n , $ -> -> -> 32 `i `l `ul 536\n , $ -> -> -> 48 `i `l `ul 537\n , $ -> -> -> 64 `i `l `ul 538\n 539 ]\n\"92\n[e :U 533 ]\n[; ;SPI-PIC16.c: 93: return 1;\n\"93\n[e ) -> -> 1 `i `uc ]\n[e $UE 520  ]\n[; ;SPI-PIC16.c: 94: }\n\"94\n[e :UE 520 ]\n}\n\"97\n[v _spi_open `(uc ~T0 @X0 1 ef1`uc ]\n{\n[; ;SPI-PIC16.c: 96: uint8_t spi_open( xSPIHandle spid )\n[; ;SPI-PIC16.c: 97: {\n[e :U _spi_open ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[f ]\n[; ;SPI-PIC16.c: 98: inuse = 1;\n\"98\n[e = _inuse -> -> 1 `i `uc ]\n[; ;SPI-PIC16.c: 99: SSPCON1bits.SSPEN = 1;\n\"99\n[e = . . _SSPCON1bits 0 2 -> -> 1 `i `uc ]\n[; ;SPI-PIC16.c: 100: return 1;\n\"100\n[e ) -> -> 1 `i `uc ]\n[e $UE 540  ]\n[; ;SPI-PIC16.c: 101: }\n\"101\n[e :UE 540 ]\n}\n\"104\n[v _spi_close `(uc ~T0 @X0 1 ef1`uc ]\n{\n[; ;SPI-PIC16.c: 103: uint8_t spi_close( xSPIHandle spid )\n[; ;SPI-PIC16.c: 104: {\n[e :U _spi_close ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[f ]\n[; ;SPI-PIC16.c: 105: inuse = 0;\n\"105\n[e = _inuse -> -> 0 `i `uc ]\n[; ;SPI-PIC16.c: 106: SSPCON1bits.SSPEN = 0;\n\"106\n[e = . . _SSPCON1bits 0 2 -> -> 0 `i `uc ]\n[; ;SPI-PIC16.c: 107: return 1;\n\"107\n[e ) -> -> 1 `i `uc ]\n[e $UE 541  ]\n[; ;SPI-PIC16.c: 108: }\n\"108\n[e :UE 541 ]\n}\n\"111\n[v _spi_write `(v ~T0 @X0 1 ef2`uc`uc ]\n{\n[; ;SPI-PIC16.c: 110: void spi_write( xSPIHandle spid, uint8_t data )\n[; ;SPI-PIC16.c: 111: {\n[e :U _spi_write ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[v _data `uc ~T0 @X0 1 r2 ]\n[f ]\n\"112\n[v _rxtmp `uc ~T0 @X0 1 a ]\n[; ;SPI-PIC16.c: 112: uint8_t rxtmp;\n[; ;SPI-PIC16.c: 113: SSPBUF = data;\n\"113\n[e = _SSPBUF _data ]\n[; ;SPI-PIC16.c: 114: while( !spi_available( spid ) );\n\"114\n[e $U 543  ]\n[e :U 544 ]\n[e :U 543 ]\n[e $ ! != -> ( _spi_available (1 _spid `i -> -> -> 0 `i `uc `i 544  ]\n[e :U 545 ]\n[; ;SPI-PIC16.c: 115: rxtmp = SSPBUF;\n\"115\n[e = _rxtmp _SSPBUF ]\n[; ;SPI-PIC16.c: 116: }\n\"116\n[e :UE 542 ]\n}\n\"119\n[v _spi_read `(uc ~T0 @X0 1 ef1`uc ]\n{\n[; ;SPI-PIC16.c: 118: uint8_t spi_read( xSPIHandle spid )\n[; ;SPI-PIC16.c: 119: {\n[e :U _spi_read ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[f ]\n[; ;SPI-PIC16.c: 120: SSPBUF = 0xAA;\n\"120\n[e = _SSPBUF -> -> 170 `i `uc ]\n[; ;SPI-PIC16.c: 121: while( !spi_available( spid ) );\n\"121\n[e $U 547  ]\n[e :U 548 ]\n[e :U 547 ]\n[e $ ! != -> ( _spi_available (1 _spid `i -> -> -> 0 `i `uc `i 548  ]\n[e :U 549 ]\n[; ;SPI-PIC16.c: 122: return SSPBUF;\n\"122\n[e ) _SSPBUF ]\n[e $UE 546  ]\n[; ;SPI-PIC16.c: 123: }\n\"123\n[e :UE 546 ]\n}\n\"126\n[v _spi_write_array `(v ~T0 @X0 1 ef3`uc`*Cuc`ui ]\n{\n[; ;SPI-PIC16.c: 125: void spi_write_array( xSPIHandle spid, const uint8_t * txbuf, uint16_t len )\n[; ;SPI-PIC16.c: 126: {\n[e :U _spi_write_array ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[v _txbuf `*Cuc ~T0 @X0 1 r2 ]\n[v _len `ui ~T0 @X0 1 r3 ]\n[f ]\n\"127\n[v _rxtmp `uc ~T0 @X0 1 a ]\n[; ;SPI-PIC16.c: 127: uint8_t rxtmp;\n[; ;SPI-PIC16.c: 128: while( len ) {\n\"128\n[e $U 551  ]\n[e :U 552 ]\n{\n[; ;SPI-PIC16.c: 129: SSPBUF = *txbuf++;\n\"129\n[e = _SSPBUF *U ++ _txbuf * -> -> 1 `i `x -> -> # *U _txbuf `i `x ]\n[; ;SPI-PIC16.c: 130: while( !spi_available( spid ) );\n\"130\n[e $U 554  ]\n[e :U 555 ]\n[e :U 554 ]\n[e $ ! != -> ( _spi_available (1 _spid `i -> -> -> 0 `i `uc `i 555  ]\n[e :U 556 ]\n[; ;SPI-PIC16.c: 131: rxtmp = SSPBUF;\n\"131\n[e = _rxtmp _SSPBUF ]\n[; ;SPI-PIC16.c: 132: len--;\n\"132\n[e -- _len -> -> 1 `i `ui ]\n\"133\n}\n[e :U 551 ]\n\"128\n[e $ != _len -> -> 0 `i `ui 552  ]\n[e :U 553 ]\n[; ;SPI-PIC16.c: 133: }\n[; ;SPI-PIC16.c: 134: }\n\"134\n[e :UE 550 ]\n}\n\"137\n[v _spi_read_array `(v ~T0 @X0 1 ef3`uc`*uc`ui ]\n{\n[; ;SPI-PIC16.c: 136: void spi_read_array( xSPIHandle spid, uint8_t * rxbuf, uint16_t len )\n[; ;SPI-PIC16.c: 137: {\n[e :U _spi_read_array ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[v _rxbuf `*uc ~T0 @X0 1 r2 ]\n[v _len `ui ~T0 @X0 1 r3 ]\n[f ]\n[; ;SPI-PIC16.c: 138: while( len ) {\n\"138\n[e $U 558  ]\n[e :U 559 ]\n{\n[; ;SPI-PIC16.c: 139: SSPBUF = 0xAA;\n\"139\n[e = _SSPBUF -> -> 170 `i `uc ]\n[; ;SPI-PIC16.c: 140: while( !spi_available( spid ) );\n\"140\n[e $U 561  ]\n[e :U 562 ]\n[e :U 561 ]\n[e $ ! != -> ( _spi_available (1 _spid `i -> -> -> 0 `i `uc `i 562  ]\n[e :U 563 ]\n[; ;SPI-PIC16.c: 141: *rxbuf++ = SSPBUF;\n\"141\n[e = *U ++ _rxbuf * -> -> 1 `i `x -> -> # *U _rxbuf `i `x _SSPBUF ]\n[; ;SPI-PIC16.c: 142: len--;\n\"142\n[e -- _len -> -> 1 `i `ui ]\n\"143\n}\n[e :U 558 ]\n\"138\n[e $ != _len -> -> 0 `i `ui 559  ]\n[e :U 560 ]\n[; ;SPI-PIC16.c: 143: }\n[; ;SPI-PIC16.c: 144: }\n\"144\n[e :UE 557 ]\n}\n\"147\n[v _spi_trans `(uc ~T0 @X0 1 ef2`uc`uc ]\n{\n[; ;SPI-PIC16.c: 146: BYTE spi_trans( xSPIHandle spid, uint8_t data )\n[; ;SPI-PIC16.c: 147: {\n[e :U _spi_trans ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[v _data `uc ~T0 @X0 1 r2 ]\n[f ]\n\"148\n[v _rxtmp `uc ~T0 @X0 1 a ]\n[; ;SPI-PIC16.c: 148: uint8_t rxtmp;\n[; ;SPI-PIC16.c: 149: SSPBUF = data;\n\"149\n[e = _SSPBUF _data ]\n[; ;SPI-PIC16.c: 150: while( !spi_available( spid ) );\n\"150\n[e $U 565  ]\n[e :U 566 ]\n[e :U 565 ]\n[e $ ! != -> ( _spi_available (1 _spid `i -> -> -> 0 `i `uc `i 566  ]\n[e :U 567 ]\n[; ;SPI-PIC16.c: 151: rxtmp = SSPBUF;\n\"151\n[e = _rxtmp _SSPBUF ]\n[; ;SPI-PIC16.c: 152: return rxtmp;\n\"152\n[e ) _rxtmp ]\n[e $UE 564  ]\n[; ;SPI-PIC16.c: 153: }\n\"153\n[e :UE 564 ]\n}\n\"156\n[v _spi_trans_array `(v ~T0 @X0 1 ef4`uc`*uc`*uc`ui ]\n{\n[; ;SPI-PIC16.c: 155: void spi_trans_array( xSPIHandle spid, uint8_t * txbuf, uint8_t * rxbuf, uint16_t len )\n[; ;SPI-PIC16.c: 156: {\n[e :U _spi_trans_array ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[v _txbuf `*uc ~T0 @X0 1 r2 ]\n[v _rxbuf `*uc ~T0 @X0 1 r3 ]\n[v _len `ui ~T0 @X0 1 r4 ]\n[f ]\n[; ;SPI-PIC16.c: 157: while( len ) {\n\"157\n[e $U 569  ]\n[e :U 570 ]\n{\n[; ;SPI-PIC16.c: 158: SSPBUF = *txbuf++;\n\"158\n[e = _SSPBUF *U ++ _txbuf * -> -> 1 `i `x -> -> # *U _txbuf `i `x ]\n[; ;SPI-PIC16.c: 159: while( !spi_available( spid ) );\n\"159\n[e $U 572  ]\n[e :U 573 ]\n[e :U 572 ]\n[e $ ! != -> ( _spi_available (1 _spid `i -> -> -> 0 `i `uc `i 573  ]\n[e :U 574 ]\n[; ;SPI-PIC16.c: 160: *rxbuf++ = SSPBUF;\n\"160\n[e = *U ++ _rxbuf * -> -> 1 `i `x -> -> # *U _rxbuf `i `x _SSPBUF ]\n[; ;SPI-PIC16.c: 161: len--;\n\"161\n[e -- _len -> -> 1 `i `ui ]\n\"162\n}\n[e :U 569 ]\n\"157\n[e $ != _len -> -> 0 `i `ui 570  ]\n[e :U 571 ]\n[; ;SPI-PIC16.c: 162: }\n[; ;SPI-PIC16.c: 163: }\n\"163\n[e :UE 568 ]\n}\n\"166\n[v _spi_available `(uc ~T0 @X0 1 sf1`uc ]\n{\n[; ;SPI-PIC16.c: 165: static uint8_t spi_available( xSPIHandle spid )\n[; ;SPI-PIC16.c: 166: {\n[e :U _spi_available ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[f ]\n[; ;SPI-PIC16.c: 167: return ( SSPSTATbits.BF ) ? 1 : 0;\n\"167\n[e ) -> ? != -> . . _SSPSTATbits 2 0 `i -> -> -> 0 `i `Vuc `i : -> 1 `i -> 0 `i `uc ]\n[e $UE 575  ]\n[; ;SPI-PIC16.c: 168: }\n\"168\n[e :UE 575 ]\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/460035940/SPI-PIC16.p1.d",
    "content": " build/default/production/_ext/460035940/SPI-PIC16.d  \\\n build/default/production/_ext/460035940/SPI-PIC16.p1:  \\\n C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c  \\\nC:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPIPort.h  \\\nC:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI.h "
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/460035940/SPI-PIC16.pre",
    "content": "\n# 1 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\"\n\n# 44 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\nextern volatile unsigned short UFRM @ 0xF66;\n\nasm(\"UFRM equ 0F66h\");\n\n\n\nextern volatile unsigned char UFRML @ 0xF66;\n\nasm(\"UFRML equ 0F66h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :8;\n};\nstruct {\nunsigned FRM0 :1;\nunsigned FRM1 :1;\nunsigned FRM2 :1;\nunsigned FRM3 :1;\nunsigned FRM4 :1;\nunsigned FRM5 :1;\nunsigned FRM6 :1;\nunsigned FRM7 :1;\n};\nstruct {\nunsigned FRML :8;\n};\n} UFRMLbits_t;\nextern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n\n# 127\nextern volatile unsigned char UFRMH @ 0xF67;\n\nasm(\"UFRMH equ 0F67h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :3;\n};\nstruct {\nunsigned FRM8 :1;\nunsigned FRM9 :1;\nunsigned FRM10 :1;\n};\n} UFRMHbits_t;\nextern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n\n# 166\nextern volatile unsigned char UIR @ 0xF68;\n\nasm(\"UIR equ 0F68h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIF :1;\nunsigned UERRIF :1;\nunsigned ACTVIF :1;\nunsigned TRNIF :1;\nunsigned IDLEIF :1;\nunsigned STALLIF :1;\nunsigned SOFIF :1;\n};\n} UIRbits_t;\nextern volatile UIRbits_t UIRbits @ 0xF68;\n\n# 221\nextern volatile unsigned char UIE @ 0xF69;\n\nasm(\"UIE equ 0F69h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIE :1;\nunsigned UERRIE :1;\nunsigned ACTVIE :1;\nunsigned TRNIE :1;\nunsigned IDLEIE :1;\nunsigned STALLIE :1;\nunsigned SOFIE :1;\n};\n} UIEbits_t;\nextern volatile UIEbits_t UIEbits @ 0xF69;\n\n# 276\nextern volatile unsigned char UEIR @ 0xF6A;\n\nasm(\"UEIR equ 0F6Ah\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEF :1;\nunsigned CRC5EF :1;\nunsigned CRC16EF :1;\nunsigned DFN8EF :1;\nunsigned BTOEF :1;\nunsigned :2;\nunsigned BTSEF :1;\n};\n} UEIRbits_t;\nextern volatile UEIRbits_t UEIRbits @ 0xF6A;\n\n# 326\nextern volatile unsigned char UEIE @ 0xF6B;\n\nasm(\"UEIE equ 0F6Bh\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEE :1;\nunsigned CRC5EE :1;\nunsigned CRC16EE :1;\nunsigned DFN8EE :1;\nunsigned BTOEE :1;\nunsigned :2;\nunsigned BTSEE :1;\n};\n} UEIEbits_t;\nextern volatile UEIEbits_t UEIEbits @ 0xF6B;\n\n# 376\nextern volatile unsigned char USTAT @ 0xF6C;\n\nasm(\"USTAT equ 0F6Ch\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned PPBI :1;\nunsigned DIR :1;\nunsigned ENDP :4;\n};\nstruct {\nunsigned :3;\nunsigned ENDP0 :1;\nunsigned ENDP1 :1;\nunsigned ENDP2 :1;\nunsigned ENDP3 :1;\n};\n} USTATbits_t;\nextern volatile USTATbits_t USTATbits @ 0xF6C;\n\n# 435\nextern volatile unsigned char UCON @ 0xF6D;\n\nasm(\"UCON equ 0F6Dh\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned SUSPND :1;\nunsigned RESUME :1;\nunsigned USBEN :1;\nunsigned PKTDIS :1;\nunsigned SE0 :1;\nunsigned PPBRST :1;\n};\n} UCONbits_t;\nextern volatile UCONbits_t UCONbits @ 0xF6D;\n\n# 485\nextern volatile unsigned char UADDR @ 0xF6E;\n\nasm(\"UADDR equ 0F6Eh\");\n\n\ntypedef union {\nstruct {\nunsigned ADDR :7;\n};\nstruct {\nunsigned ADDR0 :1;\nunsigned ADDR1 :1;\nunsigned ADDR2 :1;\nunsigned ADDR3 :1;\nunsigned ADDR4 :1;\nunsigned ADDR5 :1;\nunsigned ADDR6 :1;\n};\n} UADDRbits_t;\nextern volatile UADDRbits_t UADDRbits @ 0xF6E;\n\n# 548\nextern volatile unsigned char UCFG @ 0xF6F;\n\nasm(\"UCFG equ 0F6Fh\");\n\n\ntypedef union {\nstruct {\nunsigned PPB :2;\nunsigned FSEN :1;\nunsigned UTRDIS :1;\nunsigned UPUEN :1;\nunsigned :1;\nunsigned UOEMON :1;\nunsigned UTEYE :1;\n};\nstruct {\nunsigned PPB0 :1;\nunsigned PPB1 :1;\n};\nstruct {\nunsigned UPP0 :1;\n};\nstruct {\nunsigned :1;\nunsigned UPP1 :1;\n};\n} UCFGbits_t;\nextern volatile UCFGbits_t UCFGbits @ 0xF6F;\n\n# 629\nextern volatile unsigned char UEP0 @ 0xF70;\n\nasm(\"UEP0 equ 0F70h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP0CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP0HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP0INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP0OUTEN :1;\n};\nstruct {\nunsigned EP0STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS0 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK0 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN0 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN0 :1;\n};\nstruct {\nunsigned EPSTALL0 :1;\n};\n} UEP0bits_t;\nextern volatile UEP0bits_t UEP0bits @ 0xF70;\n\n# 760\nextern volatile unsigned char UEP1 @ 0xF71;\n\nasm(\"UEP1 equ 0F71h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP1CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP1HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP1INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP1OUTEN :1;\n};\nstruct {\nunsigned EP1STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS1 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK1 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN1 :1;\n};\nstruct {\nunsigned EPSTALL1 :1;\n};\n} UEP1bits_t;\nextern volatile UEP1bits_t UEP1bits @ 0xF71;\n\n# 891\nextern volatile unsigned char UEP2 @ 0xF72;\n\nasm(\"UEP2 equ 0F72h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP2CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP2HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP2INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP2OUTEN :1;\n};\nstruct {\nunsigned EP2STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS2 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK2 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN2 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN2 :1;\n};\nstruct {\nunsigned EPSTALL2 :1;\n};\n} UEP2bits_t;\nextern volatile UEP2bits_t UEP2bits @ 0xF72;\n\n# 1022\nextern volatile unsigned char UEP3 @ 0xF73;\n\nasm(\"UEP3 equ 0F73h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP3CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP3HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP3INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP3OUTEN :1;\n};\nstruct {\nunsigned EP3STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS3 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK3 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN3 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN3 :1;\n};\nstruct {\nunsigned EPSTALL3 :1;\n};\n} UEP3bits_t;\nextern volatile UEP3bits_t UEP3bits @ 0xF73;\n\n# 1153\nextern volatile unsigned char UEP4 @ 0xF74;\n\nasm(\"UEP4 equ 0F74h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP4CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP4HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP4INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP4OUTEN :1;\n};\nstruct {\nunsigned EP4STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS4 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK4 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN4 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN4 :1;\n};\nstruct {\nunsigned EPSTALL4 :1;\n};\n} UEP4bits_t;\nextern volatile UEP4bits_t UEP4bits @ 0xF74;\n\n# 1284\nextern volatile unsigned char UEP5 @ 0xF75;\n\nasm(\"UEP5 equ 0F75h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP5CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP5HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP5INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP5OUTEN :1;\n};\nstruct {\nunsigned EP5STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS5 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK5 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN5 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN5 :1;\n};\nstruct {\nunsigned EPSTALL5 :1;\n};\n} UEP5bits_t;\nextern volatile UEP5bits_t UEP5bits @ 0xF75;\n\n# 1415\nextern volatile unsigned char UEP6 @ 0xF76;\n\nasm(\"UEP6 equ 0F76h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP6CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP6HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP6INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP6OUTEN :1;\n};\nstruct {\nunsigned EP6STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS6 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK6 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN6 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN6 :1;\n};\nstruct {\nunsigned EPSTALL6 :1;\n};\n} UEP6bits_t;\nextern volatile UEP6bits_t UEP6bits @ 0xF76;\n\n# 1546\nextern volatile unsigned char UEP7 @ 0xF77;\n\nasm(\"UEP7 equ 0F77h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP7CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP7HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP7INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP7OUTEN :1;\n};\nstruct {\nunsigned EP7STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS7 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK7 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN7 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN7 :1;\n};\nstruct {\nunsigned EPSTALL7 :1;\n};\n} UEP7bits_t;\nextern volatile UEP7bits_t UEP7bits @ 0xF77;\n\n# 1677\nextern volatile unsigned char UEP8 @ 0xF78;\n\nasm(\"UEP8 equ 0F78h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS8 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK8 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN8 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN8 :1;\n};\nstruct {\nunsigned EPSTALL8 :1;\n};\n} UEP8bits_t;\nextern volatile UEP8bits_t UEP8bits @ 0xF78;\n\n# 1764\nextern volatile unsigned char UEP9 @ 0xF79;\n\nasm(\"UEP9 equ 0F79h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS9 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK9 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN9 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN9 :1;\n};\nstruct {\nunsigned EPSTALL9 :1;\n};\n} UEP9bits_t;\nextern volatile UEP9bits_t UEP9bits @ 0xF79;\n\n# 1851\nextern volatile unsigned char UEP10 @ 0xF7A;\n\nasm(\"UEP10 equ 0F7Ah\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS10 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK10 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN10 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN10 :1;\n};\nstruct {\nunsigned EPSTALL10 :1;\n};\n} UEP10bits_t;\nextern volatile UEP10bits_t UEP10bits @ 0xF7A;\n\n# 1938\nextern volatile unsigned char UEP11 @ 0xF7B;\n\nasm(\"UEP11 equ 0F7Bh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS11 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK11 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN11 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN11 :1;\n};\nstruct {\nunsigned EPSTALL11 :1;\n};\n} UEP11bits_t;\nextern volatile UEP11bits_t UEP11bits @ 0xF7B;\n\n# 2025\nextern volatile unsigned char UEP12 @ 0xF7C;\n\nasm(\"UEP12 equ 0F7Ch\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS12 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK12 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN12 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN12 :1;\n};\nstruct {\nunsigned EPSTALL12 :1;\n};\n} UEP12bits_t;\nextern volatile UEP12bits_t UEP12bits @ 0xF7C;\n\n# 2112\nextern volatile unsigned char UEP13 @ 0xF7D;\n\nasm(\"UEP13 equ 0F7Dh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS13 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK13 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN13 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN13 :1;\n};\nstruct {\nunsigned EPSTALL13 :1;\n};\n} UEP13bits_t;\nextern volatile UEP13bits_t UEP13bits @ 0xF7D;\n\n# 2199\nextern volatile unsigned char UEP14 @ 0xF7E;\n\nasm(\"UEP14 equ 0F7Eh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS14 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK14 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN14 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN14 :1;\n};\nstruct {\nunsigned EPSTALL14 :1;\n};\n} UEP14bits_t;\nextern volatile UEP14bits_t UEP14bits @ 0xF7E;\n\n# 2286\nextern volatile unsigned char UEP15 @ 0xF7F;\n\nasm(\"UEP15 equ 0F7Fh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS15 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK15 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN15 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN15 :1;\n};\nstruct {\nunsigned EPSTALL15 :1;\n};\n} UEP15bits_t;\nextern volatile UEP15bits_t UEP15bits @ 0xF7F;\n\n# 2373\nextern volatile unsigned char PORTA @ 0xF80;\n\nasm(\"PORTA equ 0F80h\");\n\n\ntypedef union {\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\nstruct {\nunsigned AN0 :1;\nunsigned AN1 :1;\nunsigned AN2 :1;\nunsigned AN3 :1;\nunsigned T0CKI :1;\nunsigned AN4 :1;\nunsigned OSC2 :1;\n};\nstruct {\nunsigned :2;\nunsigned VREFM :1;\nunsigned VREFP :1;\nunsigned :1;\nunsigned LVDIN :1;\n};\nstruct {\nunsigned :5;\nunsigned HLVDIN :1;\n};\nstruct {\nunsigned :7;\nunsigned RA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned RJPU :1;\n};\nstruct {\nunsigned ULPWUIN :1;\n};\n} PORTAbits_t;\nextern volatile PORTAbits_t PORTAbits @ 0xF80;\n\n# 2529\nextern volatile unsigned char PORTB @ 0xF81;\n\nasm(\"PORTB equ 0F81h\");\n\n\ntypedef union {\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\nstruct {\nunsigned INT0 :1;\nunsigned INT1 :1;\nunsigned INT2 :1;\nunsigned :2;\nunsigned PGM :1;\nunsigned PGC :1;\nunsigned PGD :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP2_PA2 :1;\n};\n} PORTBbits_t;\nextern volatile PORTBbits_t PORTBbits @ 0xF81;\n\n# 2638\nextern volatile unsigned char PORTC @ 0xF82;\n\nasm(\"PORTC equ 0F82h\");\n\n\ntypedef union {\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :1;\nunsigned RC4 :1;\nunsigned RC5 :1;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned T1OSO :1;\nunsigned T1OSI :1;\nunsigned CCP1 :1;\nunsigned :3;\nunsigned TX :1;\nunsigned RX :1;\n};\nstruct {\nunsigned T13CKI :1;\nunsigned :1;\nunsigned P1A :1;\nunsigned :3;\nunsigned CK :1;\nunsigned DT :1;\n};\nstruct {\nunsigned :1;\nunsigned CCP2 :1;\n};\nstruct {\nunsigned :2;\nunsigned PA1 :1;\n};\nstruct {\nunsigned :1;\nunsigned PA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned RC3 :1;\n};\n} PORTCbits_t;\nextern volatile PORTCbits_t PORTCbits @ 0xF82;\n\n# 2791\nextern volatile unsigned char PORTE @ 0xF84;\n\nasm(\"PORTE equ 0F84h\");\n\n\ntypedef union {\nstruct {\nunsigned :3;\nunsigned RE3 :1;\n};\nstruct {\nunsigned :2;\nunsigned CCP10 :1;\n};\nstruct {\nunsigned :7;\nunsigned CCP2E :1;\n};\nstruct {\nunsigned :6;\nunsigned CCP6E :1;\n};\nstruct {\nunsigned :5;\nunsigned CCP7E :1;\n};\nstruct {\nunsigned :4;\nunsigned CCP8E :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP9E :1;\n};\nstruct {\nunsigned :2;\nunsigned CS :1;\n};\nstruct {\nunsigned :7;\nunsigned PA2E :1;\n};\nstruct {\nunsigned :6;\nunsigned PB1E :1;\n};\nstruct {\nunsigned :2;\nunsigned PB2 :1;\n};\nstruct {\nunsigned :4;\nunsigned PB3E :1;\n};\nstruct {\nunsigned :5;\nunsigned PC1E :1;\n};\nstruct {\nunsigned :1;\nunsigned PC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned PC3E :1;\n};\nstruct {\nunsigned PD2 :1;\n};\nstruct {\nunsigned RDE :1;\n};\nstruct {\nunsigned RE0 :1;\n};\nstruct {\nunsigned :1;\nunsigned RE1 :1;\n};\nstruct {\nunsigned :2;\nunsigned RE2 :1;\n};\nstruct {\nunsigned :4;\nunsigned RE4 :1;\n};\nstruct {\nunsigned :5;\nunsigned RE5 :1;\n};\nstruct {\nunsigned :6;\nunsigned RE6 :1;\n};\nstruct {\nunsigned :7;\nunsigned RE7 :1;\n};\nstruct {\nunsigned :1;\nunsigned WRE :1;\n};\n} PORTEbits_t;\nextern volatile PORTEbits_t PORTEbits @ 0xF84;\n\n# 3024\nextern volatile unsigned char LATA @ 0xF89;\n\nasm(\"LATA equ 0F89h\");\n\n\ntypedef union {\nstruct {\nunsigned LATA0 :1;\nunsigned LATA1 :1;\nunsigned LATA2 :1;\nunsigned LATA3 :1;\nunsigned LATA4 :1;\nunsigned LATA5 :1;\nunsigned LATA6 :1;\n};\nstruct {\nunsigned LA0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LA1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LA3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LA4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LA5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LA6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned LATA7 :1;\n};\n} LATAbits_t;\nextern volatile LATAbits_t LATAbits @ 0xF89;\n\n# 3159\nextern volatile unsigned char LATB @ 0xF8A;\n\nasm(\"LATB equ 0F8Ah\");\n\n\ntypedef union {\nstruct {\nunsigned LATB0 :1;\nunsigned LATB1 :1;\nunsigned LATB2 :1;\nunsigned LATB3 :1;\nunsigned LATB4 :1;\nunsigned LATB5 :1;\nunsigned LATB6 :1;\nunsigned LATB7 :1;\n};\nstruct {\nunsigned LB0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LB1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LB2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LB3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LB4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LB5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LB6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LB7 :1;\n};\n} LATBbits_t;\nextern volatile LATBbits_t LATBbits @ 0xF8A;\n\n# 3291\nextern volatile unsigned char LATC @ 0xF8B;\n\nasm(\"LATC equ 0F8Bh\");\n\n\ntypedef union {\nstruct {\nunsigned LATC0 :1;\nunsigned LATC1 :1;\nunsigned LATC2 :1;\nunsigned :3;\nunsigned LATC6 :1;\nunsigned LATC7 :1;\n};\nstruct {\nunsigned LC0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LC1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LC3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LC4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LC5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LC6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LC7 :1;\n};\n} LATCbits_t;\nextern volatile LATCbits_t LATCbits @ 0xF8B;\n\n# 3406\nextern volatile unsigned char TRISA @ 0xF92;\n\nasm(\"TRISA equ 0F92h\");\n\n\nextern volatile unsigned char DDRA @ 0xF92;\n\nasm(\"DDRA equ 0F92h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} TRISAbits_t;\nextern volatile TRISAbits_t TRISAbits @ 0xF92;\n\n# 3509\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} DDRAbits_t;\nextern volatile DDRAbits_t DDRAbits @ 0xF92;\n\n# 3603\nextern volatile unsigned char TRISB @ 0xF93;\n\nasm(\"TRISB equ 0F93h\");\n\n\nextern volatile unsigned char DDRB @ 0xF93;\n\nasm(\"DDRB equ 0F93h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} TRISBbits_t;\nextern volatile TRISBbits_t TRISBbits @ 0xF93;\n\n# 3718\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} DDRBbits_t;\nextern volatile DDRBbits_t DDRBbits @ 0xF93;\n\n# 3824\nextern volatile unsigned char TRISC @ 0xF94;\n\nasm(\"TRISC equ 0F94h\");\n\n\nextern volatile unsigned char DDRC @ 0xF94;\n\nasm(\"DDRC equ 0F94h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} TRISCbits_t;\nextern volatile TRISCbits_t TRISCbits @ 0xF94;\n\n# 3914\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} DDRCbits_t;\nextern volatile DDRCbits_t DDRCbits @ 0xF94;\n\n# 3995\nextern volatile unsigned char OSCTUNE @ 0xF9B;\n\nasm(\"OSCTUNE equ 0F9Bh\");\n\n\ntypedef union {\nstruct {\nunsigned TUN :5;\nunsigned :2;\nunsigned INTSRC :1;\n};\nstruct {\nunsigned TUN0 :1;\nunsigned TUN1 :1;\nunsigned TUN2 :1;\nunsigned TUN3 :1;\nunsigned TUN4 :1;\n};\n} OSCTUNEbits_t;\nextern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n\n# 4053\nextern volatile unsigned char PIE1 @ 0xF9D;\n\nasm(\"PIE1 equ 0F9Dh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IE :1;\nunsigned TMR2IE :1;\nunsigned CCP1IE :1;\nunsigned SSPIE :1;\nunsigned TXIE :1;\nunsigned RCIE :1;\nunsigned ADIE :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IE :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IE :1;\n};\n} PIE1bits_t;\nextern volatile PIE1bits_t PIE1bits @ 0xF9D;\n\n# 4126\nextern volatile unsigned char PIR1 @ 0xF9E;\n\nasm(\"PIR1 equ 0F9Eh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IF :1;\nunsigned TMR2IF :1;\nunsigned CCP1IF :1;\nunsigned SSPIF :1;\nunsigned TXIF :1;\nunsigned RCIF :1;\nunsigned ADIF :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IF :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IF :1;\n};\n} PIR1bits_t;\nextern volatile PIR1bits_t PIR1bits @ 0xF9E;\n\n# 4199\nextern volatile unsigned char IPR1 @ 0xF9F;\n\nasm(\"IPR1 equ 0F9Fh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IP :1;\nunsigned TMR2IP :1;\nunsigned CCP1IP :1;\nunsigned SSPIP :1;\nunsigned TXIP :1;\nunsigned RCIP :1;\nunsigned ADIP :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IP :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IP :1;\n};\n} IPR1bits_t;\nextern volatile IPR1bits_t IPR1bits @ 0xF9F;\n\n# 4272\nextern volatile unsigned char PIE2 @ 0xFA0;\n\nasm(\"PIE2 equ 0FA0h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IE :1;\nunsigned TMR3IE :1;\nunsigned HLVDIE :1;\nunsigned BCLIE :1;\nunsigned EEIE :1;\nunsigned USBIE :1;\nunsigned CMIE :1;\nunsigned OSCFIE :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIE :1;\n};\n} PIE2bits_t;\nextern volatile PIE2bits_t PIE2bits @ 0xFA0;\n\n# 4342\nextern volatile unsigned char PIR2 @ 0xFA1;\n\nasm(\"PIR2 equ 0FA1h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IF :1;\nunsigned TMR3IF :1;\nunsigned HLVDIF :1;\nunsigned BCLIF :1;\nunsigned EEIF :1;\nunsigned USBIF :1;\nunsigned CMIF :1;\nunsigned OSCFIF :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIF :1;\n};\n} PIR2bits_t;\nextern volatile PIR2bits_t PIR2bits @ 0xFA1;\n\n# 4412\nextern volatile unsigned char IPR2 @ 0xFA2;\n\nasm(\"IPR2 equ 0FA2h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IP :1;\nunsigned TMR3IP :1;\nunsigned HLVDIP :1;\nunsigned BCLIP :1;\nunsigned EEIP :1;\nunsigned USBIP :1;\nunsigned CMIP :1;\nunsigned OSCFIP :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIP :1;\n};\n} IPR2bits_t;\nextern volatile IPR2bits_t IPR2bits @ 0xFA2;\n\n# 4482\nextern volatile unsigned char EECON1 @ 0xFA6;\n\nasm(\"EECON1 equ 0FA6h\");\n\n\ntypedef union {\nstruct {\nunsigned RD :1;\nunsigned WR :1;\nunsigned WREN :1;\nunsigned WRERR :1;\nunsigned FREE :1;\nunsigned :1;\nunsigned CFGS :1;\nunsigned EEPGD :1;\n};\nstruct {\nunsigned :6;\nunsigned EEFS :1;\n};\n} EECON1bits_t;\nextern volatile EECON1bits_t EECON1bits @ 0xFA6;\n\n# 4547\nextern volatile unsigned char EECON2 @ 0xFA7;\n\nasm(\"EECON2 equ 0FA7h\");\n\n\n\nextern volatile unsigned char EEDATA @ 0xFA8;\n\nasm(\"EEDATA equ 0FA8h\");\n\n\n\nextern volatile unsigned char EEADR @ 0xFA9;\n\nasm(\"EEADR equ 0FA9h\");\n\n\n\nextern volatile unsigned char RCSTA @ 0xFAB;\n\nasm(\"RCSTA equ 0FABh\");\n\n\nextern volatile unsigned char RCSTA1 @ 0xFAB;\n\nasm(\"RCSTA1 equ 0FABh\");\n\n\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTAbits_t;\nextern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n\n# 4648\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTA1bits_t;\nextern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n\n# 4722\nextern volatile unsigned char TXSTA @ 0xFAC;\n\nasm(\"TXSTA equ 0FACh\");\n\n\nextern volatile unsigned char TXSTA1 @ 0xFAC;\n\nasm(\"TXSTA1 equ 0FACh\");\n\n\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTAbits_t;\nextern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n\n# 4858\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTA1bits_t;\nextern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n\n# 4985\nextern volatile unsigned char TXREG @ 0xFAD;\n\nasm(\"TXREG equ 0FADh\");\n\n\nextern volatile unsigned char TXREG1 @ 0xFAD;\n\nasm(\"TXREG1 equ 0FADh\");\n\n\n\nextern volatile unsigned char RCREG @ 0xFAE;\n\nasm(\"RCREG equ 0FAEh\");\n\n\nextern volatile unsigned char RCREG1 @ 0xFAE;\n\nasm(\"RCREG1 equ 0FAEh\");\n\n\n\nextern volatile unsigned char SPBRG @ 0xFAF;\n\nasm(\"SPBRG equ 0FAFh\");\n\n\nextern volatile unsigned char SPBRG1 @ 0xFAF;\n\nasm(\"SPBRG1 equ 0FAFh\");\n\n\n\nextern volatile unsigned char SPBRGH @ 0xFB0;\n\nasm(\"SPBRGH equ 0FB0h\");\n\n\n\nextern volatile unsigned char T3CON @ 0xFB1;\n\nasm(\"T3CON equ 0FB1h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T3SYNC :1;\n};\nstruct {\nunsigned TMR3ON :1;\nunsigned TMR3CS :1;\nunsigned nT3SYNC :1;\nunsigned T3CCP1 :1;\nunsigned T3CKPS :2;\nunsigned T3CCP2 :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3SYNC :1;\nunsigned :1;\nunsigned T3CKPS0 :1;\nunsigned T3CKPS1 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3NSYNC :1;\n};\nstruct {\nunsigned :7;\nunsigned RD163 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN3 :1;\n};\nstruct {\nunsigned :7;\nunsigned T3RD16 :1;\n};\n} T3CONbits_t;\nextern volatile T3CONbits_t T3CONbits @ 0xFB1;\n\n# 5146\nextern volatile unsigned short TMR3 @ 0xFB2;\n\nasm(\"TMR3 equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3L @ 0xFB2;\n\nasm(\"TMR3L equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3H @ 0xFB3;\n\nasm(\"TMR3H equ 0FB3h\");\n\n\n\nextern volatile unsigned char CMCON @ 0xFB4;\n\nasm(\"CMCON equ 0FB4h\");\n\n\ntypedef union {\nstruct {\nunsigned CM :3;\nunsigned CIS :1;\nunsigned C1INV :1;\nunsigned C2INV :1;\nunsigned C1OUT :1;\nunsigned C2OUT :1;\n};\nstruct {\nunsigned CM0 :1;\nunsigned CM1 :1;\nunsigned CM2 :1;\n};\nstruct {\nunsigned CMEN0 :1;\n};\nstruct {\nunsigned :1;\nunsigned CMEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned CMEN2 :1;\n};\n} CMCONbits_t;\nextern volatile CMCONbits_t CMCONbits @ 0xFB4;\n\n# 5259\nextern volatile unsigned char CVRCON @ 0xFB5;\n\nasm(\"CVRCON equ 0FB5h\");\n\n\ntypedef union {\nstruct {\nunsigned CVR :4;\nunsigned CVRSS :1;\nunsigned CVRR :1;\nunsigned CVROE :1;\nunsigned CVREN :1;\n};\nstruct {\nunsigned CVR0 :1;\nunsigned CVR1 :1;\nunsigned CVR2 :1;\nunsigned CVR3 :1;\nunsigned CVREF :1;\n};\nstruct {\nunsigned :6;\nunsigned CVROEN :1;\n};\n} CVRCONbits_t;\nextern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n\n# 5343\nextern volatile unsigned char ECCP1AS @ 0xFB6;\n\nasm(\"ECCP1AS equ 0FB6h\");\n\n\nextern volatile unsigned char CCP1AS @ 0xFB6;\n\nasm(\"CCP1AS equ 0FB6h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} ECCP1ASbits_t;\nextern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n\n# 5412\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} CCP1ASbits_t;\nextern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n\n# 5472\nextern volatile unsigned char ECCP1DEL @ 0xFB7;\n\nasm(\"ECCP1DEL equ 0FB7h\");\n\n\nextern volatile unsigned char CCP1DEL @ 0xFB7;\n\nasm(\"CCP1DEL equ 0FB7h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} ECCP1DELbits_t;\nextern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n\n# 5496\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} CCP1DELbits_t;\nextern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n\n# 5511\nextern volatile unsigned char BAUDCON @ 0xFB8;\n\nasm(\"BAUDCON equ 0FB8h\");\n\n\nextern volatile unsigned char BAUDCTL @ 0xFB8;\n\nasm(\"BAUDCTL equ 0FB8h\");\n\n\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCONbits_t;\nextern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n\n# 5605\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCTLbits_t;\nextern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n\n# 5690\nextern volatile unsigned char CCP2CON @ 0xFBA;\n\nasm(\"CCP2CON equ 0FBAh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2M :4;\nunsigned DC2B :2;\n};\nstruct {\nunsigned CCP2M0 :1;\nunsigned CCP2M1 :1;\nunsigned CCP2M2 :1;\nunsigned CCP2M3 :1;\nunsigned DC2B0 :1;\nunsigned DC2B1 :1;\n};\n} CCP2CONbits_t;\nextern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n\n# 5753\nextern volatile unsigned short CCPR2 @ 0xFBB;\n\nasm(\"CCPR2 equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2L @ 0xFBB;\n\nasm(\"CCPR2L equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2H @ 0xFBC;\n\nasm(\"CCPR2H equ 0FBCh\");\n\n\n\nextern volatile unsigned char CCP1CON @ 0xFBD;\n\nasm(\"CCP1CON equ 0FBDh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP1M :4;\nunsigned DC1B :2;\n};\nstruct {\nunsigned CCP1M0 :1;\nunsigned CCP1M1 :1;\nunsigned CCP1M2 :1;\nunsigned CCP1M3 :1;\nunsigned DC1B0 :1;\nunsigned DC1B1 :1;\n};\n} CCP1CONbits_t;\nextern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n\n# 5834\nextern volatile unsigned short CCPR1 @ 0xFBE;\n\nasm(\"CCPR1 equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1L @ 0xFBE;\n\nasm(\"CCPR1L equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1H @ 0xFBF;\n\nasm(\"CCPR1H equ 0FBFh\");\n\n\n\nextern volatile unsigned char ADCON2 @ 0xFC0;\n\nasm(\"ADCON2 equ 0FC0h\");\n\n\ntypedef union {\nstruct {\nunsigned ADCS :3;\nunsigned ACQT :3;\nunsigned :1;\nunsigned ADFM :1;\n};\nstruct {\nunsigned ADCS0 :1;\nunsigned ADCS1 :1;\nunsigned ADCS2 :1;\nunsigned ACQT0 :1;\nunsigned ACQT1 :1;\nunsigned ACQT2 :1;\n};\n} ADCON2bits_t;\nextern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n\n# 5922\nextern volatile unsigned char ADCON1 @ 0xFC1;\n\nasm(\"ADCON1 equ 0FC1h\");\n\n\ntypedef union {\nstruct {\nunsigned PCFG :4;\nunsigned VCFG :2;\n};\nstruct {\nunsigned PCFG0 :1;\nunsigned PCFG1 :1;\nunsigned PCFG2 :1;\nunsigned PCFG3 :1;\nunsigned VCFG0 :1;\nunsigned VCFG1 :1;\n};\nstruct {\nunsigned :3;\nunsigned CHSN3 :1;\n};\nstruct {\nunsigned :4;\nunsigned VCFG01 :1;\n};\nstruct {\nunsigned :5;\nunsigned VCFG11 :1;\n};\n} ADCON1bits_t;\nextern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n\n# 6012\nextern volatile unsigned char ADCON0 @ 0xFC2;\n\nasm(\"ADCON0 equ 0FC2h\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned ADON :1;\nunsigned GO_nDONE :1;\nunsigned CHS :4;\n};\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO_DONE :1;\nunsigned CHS0 :1;\nunsigned CHS1 :1;\nunsigned CHS2 :1;\nunsigned CHS3 :1;\n};\nstruct {\nunsigned :1;\nunsigned DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned nDONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GODONE :1;\n};\n} ADCON0bits_t;\nextern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n\n# 6134\nextern volatile unsigned short ADRES @ 0xFC3;\n\nasm(\"ADRES equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESL @ 0xFC3;\n\nasm(\"ADRESL equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESH @ 0xFC4;\n\nasm(\"ADRESH equ 0FC4h\");\n\n\n\nextern volatile unsigned char SSPCON2 @ 0xFC5;\n\nasm(\"SSPCON2 equ 0FC5h\");\n\n\ntypedef union {\nstruct {\nunsigned SEN :1;\nunsigned RSEN :1;\nunsigned PEN :1;\nunsigned RCEN :1;\nunsigned ACKEN :1;\nunsigned ACKDT :1;\nunsigned ACKSTAT :1;\nunsigned GCEN :1;\n};\n} SSPCON2bits_t;\nextern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n\n# 6213\nextern volatile unsigned char SSPCON1 @ 0xFC6;\n\nasm(\"SSPCON1 equ 0FC6h\");\n\n\ntypedef union {\nstruct {\nunsigned SSPM :4;\nunsigned CKP :1;\nunsigned SSPEN :1;\nunsigned SSPOV :1;\nunsigned WCOL :1;\n};\nstruct {\nunsigned SSPM0 :1;\nunsigned SSPM1 :1;\nunsigned SSPM2 :1;\nunsigned SSPM3 :1;\n};\n} SSPCON1bits_t;\nextern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n\n# 6282\nextern volatile unsigned char SSPSTAT @ 0xFC7;\n\nasm(\"SSPSTAT equ 0FC7h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned BF :1;\nunsigned UA :1;\nunsigned R_nW :1;\nunsigned S :1;\nunsigned P :1;\nunsigned D_nA :1;\nunsigned CKE :1;\nunsigned SMP :1;\n};\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned :2;\nunsigned R_W :1;\nunsigned :2;\nunsigned D_A :1;\n};\nstruct {\nunsigned :2;\nunsigned I2C_READ :1;\nunsigned I2C_START :1;\nunsigned I2C_STOP :1;\nunsigned I2C_DAT :1;\n};\nstruct {\nunsigned :2;\nunsigned nW :1;\nunsigned :2;\nunsigned nA :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_WRITE :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned nWRITE :1;\nunsigned :2;\nunsigned nADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned READ_WRITE :1;\nunsigned :2;\nunsigned DATA_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned R :1;\nunsigned :2;\nunsigned D :1;\n};\nstruct {\nunsigned :5;\nunsigned DA :1;\n};\nstruct {\nunsigned :2;\nunsigned RW :1;\n};\nstruct {\nunsigned :3;\nunsigned START :1;\n};\nstruct {\nunsigned :4;\nunsigned STOP :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_A :1;\n};\n} SSPSTATbits_t;\nextern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n\n# 6548\nextern volatile unsigned char SSPADD @ 0xFC8;\n\nasm(\"SSPADD equ 0FC8h\");\n\n\n\nextern volatile unsigned char SSPBUF @ 0xFC9;\n\nasm(\"SSPBUF equ 0FC9h\");\n\n\n\nextern volatile unsigned char T2CON @ 0xFCA;\n\nasm(\"T2CON equ 0FCAh\");\n\n\ntypedef union {\nstruct {\nunsigned T2CKPS :2;\nunsigned TMR2ON :1;\nunsigned TOUTPS :4;\n};\nstruct {\nunsigned T2CKPS0 :1;\nunsigned T2CKPS1 :1;\nunsigned :1;\nunsigned T2OUTPS0 :1;\nunsigned T2OUTPS1 :1;\nunsigned T2OUTPS2 :1;\nunsigned T2OUTPS3 :1;\n};\nstruct {\nunsigned :3;\nunsigned TOUTPS0 :1;\nunsigned TOUTPS1 :1;\nunsigned TOUTPS2 :1;\nunsigned TOUTPS3 :1;\n};\n} T2CONbits_t;\nextern volatile T2CONbits_t T2CONbits @ 0xFCA;\n\n# 6657\nextern volatile unsigned char PR2 @ 0xFCB;\n\nasm(\"PR2 equ 0FCBh\");\n\n\nextern volatile unsigned char MEMCON @ 0xFCB;\n\nasm(\"MEMCON equ 0FCBh\");\n\n\n\nextern volatile unsigned char TMR2 @ 0xFCC;\n\nasm(\"TMR2 equ 0FCCh\");\n\n\n\nextern volatile unsigned char T1CON @ 0xFCD;\n\nasm(\"T1CON equ 0FCDh\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T1SYNC :1;\n};\nstruct {\nunsigned TMR1ON :1;\nunsigned TMR1CS :1;\nunsigned nT1SYNC :1;\nunsigned T1OSCEN :1;\nunsigned T1CKPS :2;\nunsigned T1RUN :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T1SYNC :1;\nunsigned :1;\nunsigned T1CKPS0 :1;\nunsigned T1CKPS1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN :1;\n};\nstruct {\nunsigned :7;\nunsigned T1RD16 :1;\n};\n} T1CONbits_t;\nextern volatile T1CONbits_t T1CONbits @ 0xFCD;\n\n# 6778\nextern volatile unsigned short TMR1 @ 0xFCE;\n\nasm(\"TMR1 equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1L @ 0xFCE;\n\nasm(\"TMR1L equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1H @ 0xFCF;\n\nasm(\"TMR1H equ 0FCFh\");\n\n\n\nextern volatile unsigned char RCON @ 0xFD0;\n\nasm(\"RCON equ 0FD0h\");\n\n\ntypedef union {\nstruct {\nunsigned NOT_BOR :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_POR :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_PD :1;\n};\nstruct {\nunsigned :3;\nunsigned NOT_TO :1;\n};\nstruct {\nunsigned :4;\nunsigned NOT_RI :1;\n};\nstruct {\nunsigned nBOR :1;\nunsigned nPOR :1;\nunsigned nPD :1;\nunsigned nTO :1;\nunsigned nRI :1;\nunsigned :1;\nunsigned SBOREN :1;\nunsigned IPEN :1;\n};\nstruct {\nunsigned :7;\nunsigned NOT_IPEN :1;\n};\nstruct {\nunsigned BOR :1;\nunsigned POR :1;\nunsigned PD :1;\nunsigned TO :1;\nunsigned RI :1;\nunsigned :2;\nunsigned nIPEN :1;\n};\n} RCONbits_t;\nextern volatile RCONbits_t RCONbits @ 0xFD0;\n\n# 6944\nextern volatile unsigned char WDTCON @ 0xFD1;\n\nasm(\"WDTCON equ 0FD1h\");\n\n\ntypedef union {\nstruct {\nunsigned SWDTEN :1;\n};\nstruct {\nunsigned SWDTE :1;\n};\n} WDTCONbits_t;\nextern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n\n# 6971\nextern volatile unsigned char HLVDCON @ 0xFD2;\n\nasm(\"HLVDCON equ 0FD2h\");\n\n\nextern volatile unsigned char LVDCON @ 0xFD2;\n\nasm(\"LVDCON equ 0FD2h\");\n\n\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} HLVDCONbits_t;\nextern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n\n# 7110\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} LVDCONbits_t;\nextern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n\n# 7240\nextern volatile unsigned char OSCCON @ 0xFD3;\n\nasm(\"OSCCON equ 0FD3h\");\n\n\ntypedef union {\nstruct {\nunsigned SCS :2;\nunsigned IOFS :1;\nunsigned OSTS :1;\nunsigned IRCF :3;\nunsigned IDLEN :1;\n};\nstruct {\nunsigned SCS0 :1;\nunsigned SCS1 :1;\nunsigned FLTS :1;\nunsigned :1;\nunsigned IRCF0 :1;\nunsigned IRCF1 :1;\nunsigned IRCF2 :1;\n};\n} OSCCONbits_t;\nextern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n\n# 7322\nextern volatile unsigned char T0CON @ 0xFD5;\n\nasm(\"T0CON equ 0FD5h\");\n\n\ntypedef union {\nstruct {\nunsigned T0PS :3;\nunsigned PSA :1;\nunsigned T0SE :1;\nunsigned T0CS :1;\nunsigned T08BIT :1;\nunsigned TMR0ON :1;\n};\nstruct {\nunsigned T0PS0 :1;\nunsigned T0PS1 :1;\nunsigned T0PS2 :1;\n};\n} T0CONbits_t;\nextern volatile T0CONbits_t T0CONbits @ 0xFD5;\n\n# 7391\nextern volatile unsigned short TMR0 @ 0xFD6;\n\nasm(\"TMR0 equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0L @ 0xFD6;\n\nasm(\"TMR0L equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0H @ 0xFD7;\n\nasm(\"TMR0H equ 0FD7h\");\n\n\n\nextern volatile unsigned char STATUS @ 0xFD8;\n\nasm(\"STATUS equ 0FD8h\");\n\n\ntypedef union {\nstruct {\nunsigned C :1;\nunsigned DC :1;\nunsigned Z :1;\nunsigned OV :1;\nunsigned N :1;\n};\nstruct {\nunsigned CARRY :1;\n};\nstruct {\nunsigned :4;\nunsigned NEGATIVE :1;\n};\nstruct {\nunsigned :3;\nunsigned OVERFLOW :1;\n};\nstruct {\nunsigned :2;\nunsigned ZERO :1;\n};\n} STATUSbits_t;\nextern volatile STATUSbits_t STATUSbits @ 0xFD8;\n\n# 7487\nextern volatile unsigned short FSR2 @ 0xFD9;\n\nasm(\"FSR2 equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2L @ 0xFD9;\n\nasm(\"FSR2L equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2H @ 0xFDA;\n\nasm(\"FSR2H equ 0FDAh\");\n\n\n\nextern volatile unsigned char PLUSW2 @ 0xFDB;\n\nasm(\"PLUSW2 equ 0FDBh\");\n\n\n\nextern volatile unsigned char PREINC2 @ 0xFDC;\n\nasm(\"PREINC2 equ 0FDCh\");\n\n\n\nextern volatile unsigned char POSTDEC2 @ 0xFDD;\n\nasm(\"POSTDEC2 equ 0FDDh\");\n\n\n\nextern volatile unsigned char POSTINC2 @ 0xFDE;\n\nasm(\"POSTINC2 equ 0FDEh\");\n\n\n\nextern volatile unsigned char INDF2 @ 0xFDF;\n\nasm(\"INDF2 equ 0FDFh\");\n\n\n\nextern volatile unsigned char BSR @ 0xFE0;\n\nasm(\"BSR equ 0FE0h\");\n\n\n\nextern volatile unsigned short FSR1 @ 0xFE1;\n\nasm(\"FSR1 equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1L @ 0xFE1;\n\nasm(\"FSR1L equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1H @ 0xFE2;\n\nasm(\"FSR1H equ 0FE2h\");\n\n\n\nextern volatile unsigned char PLUSW1 @ 0xFE3;\n\nasm(\"PLUSW1 equ 0FE3h\");\n\n\n\nextern volatile unsigned char PREINC1 @ 0xFE4;\n\nasm(\"PREINC1 equ 0FE4h\");\n\n\n\nextern volatile unsigned char POSTDEC1 @ 0xFE5;\n\nasm(\"POSTDEC1 equ 0FE5h\");\n\n\n\nextern volatile unsigned char POSTINC1 @ 0xFE6;\n\nasm(\"POSTINC1 equ 0FE6h\");\n\n\n\nextern volatile unsigned char INDF1 @ 0xFE7;\n\nasm(\"INDF1 equ 0FE7h\");\n\n\n\nextern volatile unsigned char WREG @ 0xFE8;\n\nasm(\"WREG equ 0FE8h\");\n\n\n\nextern volatile unsigned short FSR0 @ 0xFE9;\n\nasm(\"FSR0 equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0L @ 0xFE9;\n\nasm(\"FSR0L equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0H @ 0xFEA;\n\nasm(\"FSR0H equ 0FEAh\");\n\n\n\nextern volatile unsigned char PLUSW0 @ 0xFEB;\n\nasm(\"PLUSW0 equ 0FEBh\");\n\n\n\nextern volatile unsigned char PREINC0 @ 0xFEC;\n\nasm(\"PREINC0 equ 0FECh\");\n\n\n\nextern volatile unsigned char POSTDEC0 @ 0xFED;\n\nasm(\"POSTDEC0 equ 0FEDh\");\n\n\n\nextern volatile unsigned char POSTINC0 @ 0xFEE;\n\nasm(\"POSTINC0 equ 0FEEh\");\n\n\n\nextern volatile unsigned char INDF0 @ 0xFEF;\n\nasm(\"INDF0 equ 0FEFh\");\n\n\n\nextern volatile unsigned char INTCON3 @ 0xFF0;\n\nasm(\"INTCON3 equ 0FF0h\");\n\n\ntypedef union {\nstruct {\nunsigned INT1IF :1;\nunsigned INT2IF :1;\nunsigned :1;\nunsigned INT1IE :1;\nunsigned INT2IE :1;\nunsigned :1;\nunsigned INT1IP :1;\nunsigned INT2IP :1;\n};\nstruct {\nunsigned INT1F :1;\nunsigned INT2F :1;\nunsigned :1;\nunsigned INT1E :1;\nunsigned INT2E :1;\nunsigned :1;\nunsigned INT1P :1;\nunsigned INT2P :1;\n};\n} INTCON3bits_t;\nextern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n\n# 7734\nextern volatile unsigned char INTCON2 @ 0xFF1;\n\nasm(\"INTCON2 equ 0FF1h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned NOT_RBPU :1;\n};\nstruct {\nunsigned RBIP :1;\nunsigned :1;\nunsigned TMR0IP :1;\nunsigned :1;\nunsigned INTEDG2 :1;\nunsigned INTEDG1 :1;\nunsigned INTEDG0 :1;\nunsigned nRBPU :1;\n};\nstruct {\nunsigned :2;\nunsigned T0IP :1;\nunsigned :4;\nunsigned RBPU :1;\n};\n} INTCON2bits_t;\nextern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n\n# 7810\nextern volatile unsigned char INTCON @ 0xFF2;\n\nasm(\"INTCON equ 0FF2h\");\n\n\ntypedef union {\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE_GIEL :1;\nunsigned GIE_GIEH :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\nstruct {\nunsigned :1;\nunsigned INT0F :1;\nunsigned T0IF :1;\nunsigned :1;\nunsigned INT0E :1;\nunsigned T0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned :6;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\n} INTCONbits_t;\nextern volatile INTCONbits_t INTCONbits @ 0xFF2;\n\n# 7946\nextern volatile unsigned short PROD @ 0xFF3;\n\nasm(\"PROD equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODL @ 0xFF3;\n\nasm(\"PRODL equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODH @ 0xFF4;\n\nasm(\"PRODH equ 0FF4h\");\n\n\n\nextern volatile unsigned char TABLAT @ 0xFF5;\n\nasm(\"TABLAT equ 0FF5h\");\n\n\n\n\nextern volatile unsigned short long TBLPTR @ 0xFF6;\n\n\nasm(\"TBLPTR equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRL @ 0xFF6;\n\nasm(\"TBLPTRL equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRH @ 0xFF7;\n\nasm(\"TBLPTRH equ 0FF7h\");\n\n\n\nextern volatile unsigned char TBLPTRU @ 0xFF8;\n\nasm(\"TBLPTRU equ 0FF8h\");\n\n\n\n\nextern volatile unsigned short long PCLAT @ 0xFF9;\n\n\nasm(\"PCLAT equ 0FF9h\");\n\n\n\nextern volatile unsigned short long PC @ 0xFF9;\n\n\nasm(\"PC equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCL @ 0xFF9;\n\nasm(\"PCL equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCLATH @ 0xFFA;\n\nasm(\"PCLATH equ 0FFAh\");\n\n\n\nextern volatile unsigned char PCLATU @ 0xFFB;\n\nasm(\"PCLATU equ 0FFBh\");\n\n\n\nextern volatile unsigned char STKPTR @ 0xFFC;\n\nasm(\"STKPTR equ 0FFCh\");\n\n\ntypedef union {\nstruct {\nunsigned STKPTR :5;\nunsigned :1;\nunsigned STKUNF :1;\nunsigned STKFUL :1;\n};\nstruct {\nunsigned STKPTR0 :1;\nunsigned STKPTR1 :1;\nunsigned STKPTR2 :1;\nunsigned STKPTR3 :1;\nunsigned STKPTR4 :1;\n};\nstruct {\nunsigned :7;\nunsigned STKOVF :1;\n};\n} STKPTRbits_t;\nextern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n\n# 8103\nextern volatile unsigned short long TOS @ 0xFFD;\n\n\nasm(\"TOS equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSL @ 0xFFD;\n\nasm(\"TOSL equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSH @ 0xFFE;\n\nasm(\"TOSH equ 0FFEh\");\n\n\n\nextern volatile unsigned char TOSU @ 0xFFF;\n\nasm(\"TOSU equ 0FFFh\");\n\n# 8134\nextern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n\nextern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n\nextern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n\nextern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n\nextern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n\nextern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n\nextern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n\nextern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n\nextern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n\nextern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n\nextern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n\nextern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n\nextern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n\nextern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n\nextern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n\nextern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n\nextern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n\nextern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n\nextern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n\nextern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n\nextern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n\nextern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n\nextern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n\nextern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n\nextern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n\nextern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n\nextern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n\nextern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n\nextern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n\nextern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n\nextern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n\nextern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n\nextern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n\nextern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n\nextern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n\nextern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n\nextern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n\nextern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n\nextern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n\nextern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n\nextern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n\nextern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n\nextern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n\nextern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n\nextern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n\nextern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n\nextern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n\nextern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n\nextern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n\nextern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n\nextern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n\nextern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n\nextern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n\nextern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n\nextern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n\nextern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n\nextern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n\nextern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n\nextern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n\nextern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n\nextern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n\nextern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n\nextern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n\nextern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n\nextern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n\nextern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n\nextern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n\nextern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n\nextern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n\nextern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n\nextern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n\nextern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n\nextern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n\nextern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n\nextern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n\nextern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n\nextern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n\nextern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n\nextern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n\nextern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n\nextern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n\nextern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n\nextern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n\nextern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n\nextern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n\nextern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n\nextern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n\nextern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n\nextern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n\nextern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n\nextern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n\nextern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n\nextern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n\nextern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n\nextern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n\nextern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n\nextern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n\nextern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n\nextern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n\nextern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n\nextern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n\nextern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n\nextern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n\nextern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n\nextern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n\nextern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n\nextern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n\nextern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n\nextern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n\nextern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n\nextern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n\nextern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n\nextern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n\nextern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n\nextern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n\nextern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n\nextern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n\nextern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n\nextern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n\nextern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n\nextern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n\nextern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n\nextern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n\nextern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n\nextern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n\nextern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n\nextern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n\nextern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n\nextern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n\nextern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n\nextern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n\nextern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n\nextern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n\nextern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n\nextern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n\nextern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n\nextern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n\nextern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n\nextern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n\nextern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n\nextern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n\nextern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n\nextern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n\nextern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n\nextern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n\nextern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n\nextern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n\nextern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n\nextern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n\nextern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n\nextern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n\nextern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n\nextern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n\nextern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n\nextern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n\nextern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n\nextern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n\nextern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n\nextern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n\nextern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n\nextern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n\nextern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n\nextern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n\nextern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n\nextern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n\nextern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n\nextern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n\nextern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n\nextern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n\nextern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n\nextern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n\nextern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n\nextern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n\nextern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n\nextern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n\nextern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n\nextern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n\nextern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n\nextern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n\nextern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n\nextern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n\nextern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n\nextern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n\nextern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n\nextern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n\nextern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n\nextern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n\nextern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n\nextern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n\nextern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n\nextern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n\nextern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n\nextern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n\nextern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n\nextern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n\nextern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n\nextern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n\nextern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n\nextern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n\nextern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n\nextern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n\nextern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n\nextern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n\nextern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n\nextern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n\nextern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n\nextern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n\nextern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n\nextern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n\nextern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n\nextern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n\nextern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n\nextern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n\nextern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n\nextern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n\nextern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n\nextern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n\nextern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n\nextern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n\nextern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n\nextern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n\nextern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n\nextern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n\nextern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n\nextern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n\nextern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n\nextern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n\nextern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n\nextern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n\nextern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n\nextern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n\nextern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n\nextern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n\nextern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n\nextern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n\nextern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n\nextern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n\nextern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n\nextern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n\nextern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n\nextern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n\nextern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n\nextern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n\nextern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n\nextern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n\nextern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n\nextern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n\nextern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n\nextern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n\nextern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n\nextern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n\nextern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n\nextern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n\nextern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n\nextern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n\nextern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n\nextern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n\nextern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n\nextern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n\nextern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n\nextern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n\nextern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n\nextern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n\nextern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n\nextern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n\nextern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n\nextern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n\nextern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n\nextern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n\nextern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n\nextern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n\nextern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n\nextern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n\nextern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n\nextern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n\nextern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n\nextern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n\nextern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n\nextern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n\nextern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n\nextern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n\nextern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n\nextern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n\nextern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n\nextern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n\nextern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n\nextern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n\nextern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n\nextern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n\nextern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n\nextern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n\nextern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n\nextern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n\nextern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n\nextern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n\nextern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\n# 2008 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\adc.h\"\nunion ADCResult\n{\nint lr;\nchar br[2];\n};\n\nchar BusyADC (void);\n\nvoid ConvertADC (void);\n\nvoid CloseADC(void);\n\n# 2026\nint ReadADC(void);\n\n# 2040\nvoid OpenADC ( unsigned char ,\nunsigned char ,\nunsigned char );\n\n# 2084\nvoid SetChanADC(unsigned char );\n\n# 2100\nvoid SelChanConvADC( unsigned char );\n\n# 38 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\ancomp.h\"\nvoid Close_ancomp( void );\nvoid Open_ancomp(unsigned char config);\n\n# 584 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\spi.h\"\nvoid OpenSPI( unsigned char sync_mode,\nunsigned char bus_mode,\nunsigned char smp_phase );\n\nsigned char WriteSPI( unsigned char data_out );\n\nvoid getsSPI( unsigned char *rdptr, unsigned char length );\n\nvoid putsSPI( unsigned char *wrptr );\n\nunsigned char ReadSPI( void );\n\n# 414 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\can2510.h\"\nvoid CAN2510Initialize(  unsigned int configuration,\n unsigned char brp,\n unsigned char interruptFlags,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nsigned char CAN2510Init(  unsigned long BufferConfig,\n unsigned long BitTimeConfig,\n unsigned char interruptEnables,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nvoid CAN2510Enable( void );\n\nvoid CAN2510Disable( void );\n\nvoid CAN2510Reset( void );\n\nvoid CAN2510SetMode(  unsigned char mode );\n\nunsigned char CAN2510ReadMode( void );\n\nunsigned char CAN2510ReadStatus( void );\n\nunsigned char CAN2510ErrorState( void );\n\nunsigned char CAN2510InterruptStatus( void );\n\nvoid CAN2510InterruptEnable( unsigned char interruptFlags );\n\nunsigned char CAN2510ByteRead(  unsigned char addr );\n\nvoid CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n\nvoid CAN2510SequentialRead(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510SequentialWrite(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510BitModify(  unsigned char address,\n unsigned char mask,\n unsigned char data );\n\nvoid CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n\nvoid CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n\nvoid CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n\nvoid CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n\nsigned char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n unsigned int mask,\n unsigned int *filters );\n\nsigned char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n unsigned long mask,\n unsigned long *filters );\n\nsigned char CAN2510WriteStd(  unsigned int msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nsigned char CAN2510WriteXtd(  unsigned long msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadRTRStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes );\n\nvoid CAN2510LoadRTRXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes );\n\nvoid CAN2510SetBufferPriority(  unsigned char bufferNum,\n unsigned char bufferPriority );\n\nvoid CAN2510SendBuffer(  unsigned char bufferNumber );\n\nsigned char CAN2510WriteBuffer(  unsigned char bufferNum );\n\nunsigned char CAN2510DataReady(  unsigned char bufferNum );\n\nunsigned char CAN2510DataRead(  unsigned char bufferNum,\n unsigned long *msgId,\n unsigned char *numBytes,\n unsigned char *data );\n\n# 64 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\capture.h\"\nunion capstatus\n{\n\n# 73\nstruct\n{\n\n# 77\nunsigned Cap1OVF:1;\n\n# 82\nunsigned Cap2OVF:1;\n\n# 115\n};\n\nunsigned :8;\n\n};\n\nextern union capstatus CapStatus;\n\nunion CapResult\n{\nunsigned int lc;\nchar bc[2];\n};\n\n# 474\nvoid OpenCapture1 ( unsigned char config);\nunsigned int ReadCapture1 (void);\nvoid CloseCapture1 (void);\n\n# 484\nvoid OpenCapture2 ( unsigned char config);\nunsigned int ReadCapture2 (void);\nvoid CloseCapture2 (void);\n\n# 385 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\compare.h\"\nvoid OpenCompare1(unsigned char config,unsigned int period);\nvoid CloseCompare1(void);\n\n# 392\nvoid OpenCompare2(unsigned char config, unsigned int period);\nvoid CloseCompare2(void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\EEP.h\"\nvoid Busy_eep ( void );\nunsigned char Read_b_eep( unsigned int badd );\nvoid Write_b_eep( unsigned int badd, unsigned char bdata );\n\n# 2 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stddef.h\"\ntypedef int ptrdiff_t;\ntypedef unsigned size_t;\ntypedef unsigned short wchar_t;\n\n# 13\nextern int errno;\n\n# 65 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\GenericTypeDefs.h\"\ntypedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n\n\ntypedef enum _BIT { CLEAR = 0, SET } BIT;\n\n# 75\ntypedef signed int INT;\ntypedef signed char INT8;\ntypedef signed short int INT16;\ntypedef signed long int INT32;\n\n\n\n typedef signed long long INT64;\n\n\n\ntypedef unsigned int UINT;\ntypedef unsigned char UINT8;\ntypedef unsigned short int UINT16;\n\n# 93\ntypedef unsigned long int UINT32;\n\n\n typedef unsigned long long UINT64;\n\n\ntypedef union\n{\nUINT8 Val;\nstruct\n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n} bits;\n} UINT8_VAL, UINT8_BITS;\n\ntypedef union\n{\nUINT16 Val;\nUINT8 v[2] ;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\n} byte;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n} bits;\n} UINT16_VAL, UINT16_BITS;\n\n# 187\ntypedef union\n{\nUINT32 Val;\nUINT16 w[2] ;\nUINT8 v[4] ;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\n} word;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\nUINT8 UB;\nUINT8 MB;\n} byte;\nstruct \n{\nUINT16_VAL low;\nUINT16_VAL high;\n}wordUnion;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n} bits;\n} UINT32_VAL;\n\n\n\ntypedef union\n{\nUINT64 Val;\nUINT32 d[2] ;\nUINT16 w[4] ;\nUINT8 v[8] ;\nstruct \n{\nUINT32 LD;\nUINT32 HD;\n} dword;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\nUINT16 UW;\nUINT16 MW;\n} word;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n UINT8 b32:1;\n UINT8 b33:1;\n UINT8 b34:1;\n UINT8 b35:1;\n UINT8 b36:1;\n UINT8 b37:1;\n UINT8 b38:1;\n UINT8 b39:1;\n UINT8 b40:1;\n UINT8 b41:1;\n UINT8 b42:1;\n UINT8 b43:1;\n UINT8 b44:1;\n UINT8 b45:1;\n UINT8 b46:1;\n UINT8 b47:1;\n UINT8 b48:1;\n UINT8 b49:1;\n UINT8 b50:1;\n UINT8 b51:1;\n UINT8 b52:1;\n UINT8 b53:1;\n UINT8 b54:1;\n UINT8 b55:1;\n UINT8 b56:1;\n UINT8 b57:1;\n UINT8 b58:1;\n UINT8 b59:1;\n UINT8 b60:1;\n UINT8 b61:1;\n UINT8 b62:1;\n UINT8 b63:1;\n} bits;\n} UINT64_VAL;\n\n# 339\ntypedef void VOID;\n\ntypedef char CHAR8;\ntypedef unsigned char UCHAR8;\n\ntypedef unsigned char BYTE;\ntypedef unsigned short int WORD;\ntypedef unsigned long DWORD;\n\n\ntypedef unsigned long long QWORD;\ntypedef signed char CHAR;\ntypedef signed short int SHORT;\ntypedef signed long LONG;\n\n\ntypedef signed long long LONGLONG;\ntypedef union\n{\nBYTE Val;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n} bits;\n} BYTE_VAL, BYTE_BITS;\n\ntypedef union\n{\nWORD Val;\nBYTE v[2] ;\nstruct \n{\nBYTE LB;\nBYTE HB;\n} byte;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n} bits;\n} WORD_VAL, WORD_BITS;\n\ntypedef union\n{\nDWORD Val;\nWORD w[2] ;\nBYTE v[4] ;\nstruct \n{\nWORD LW;\nWORD HW;\n} word;\nstruct \n{\nBYTE LB;\nBYTE HB;\nBYTE UB;\nBYTE MB;\n} byte;\nstruct \n{\nWORD_VAL low;\nWORD_VAL high;\n}wordUnion;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n} bits;\n} DWORD_VAL;\n\n\ntypedef union\n{\nQWORD Val;\nDWORD d[2] ;\nWORD w[4] ;\nBYTE v[8] ;\nstruct \n{\nDWORD LD;\nDWORD HD;\n} dword;\nstruct \n{\nWORD LW;\nWORD HW;\nWORD UW;\nWORD MW;\n} word;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n BYTE b32:1;\n BYTE b33:1;\n BYTE b34:1;\n BYTE b35:1;\n BYTE b36:1;\n BYTE b37:1;\n BYTE b38:1;\n BYTE b39:1;\n BYTE b40:1;\n BYTE b41:1;\n BYTE b42:1;\n BYTE b43:1;\n BYTE b44:1;\n BYTE b45:1;\n BYTE b46:1;\n BYTE b47:1;\n BYTE b48:1;\n BYTE b49:1;\n BYTE b50:1;\n BYTE b51:1;\n BYTE b52:1;\n BYTE b53:1;\n BYTE b54:1;\n BYTE b55:1;\n BYTE b56:1;\n BYTE b57:1;\n BYTE b58:1;\n BYTE b59:1;\n BYTE b60:1;\n BYTE b61:1;\n BYTE b62:1;\n BYTE b63:1;\n} bits;\n} QWORD_VAL;\n\n# 113 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\flash.h\"\nextern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 120\nextern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n\nextern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n\nextern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 775 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\i2c.h\"\nvoid IdleI2C( void );\n\nvoid OpenI2C( unsigned char sync_mode, unsigned char slew );\n\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char putsI2C( unsigned char *wrptr );\n\nunsigned char ReadI2C( void );\n\nvoid CloseI2C( void );\n\n# 899\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char getsI2C( unsigned char *rdptr, unsigned char length );\n\n# 908\nsigned char EEAckPolling( unsigned char control );\n\nsigned char EEByteWrite( unsigned char control,\nunsigned char address,\nunsigned char data );\n\nsigned int EECurrentAddRead( unsigned char control );\n\nsigned char EEPageWrite( unsigned char control,\nunsigned char address,\nunsigned char *wrptr );\n\nsigned int EERandomRead( unsigned char control, unsigned char address );\n\nsigned char EESequentialRead( unsigned char control,\nunsigned char address,\nunsigned char *rdptr,\nunsigned char length );\n\n# 325 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\mwire.h\"\nvoid OpenMwire( unsigned char sync_mode );\n\nunsigned char ReadMwire( unsigned char high_byte,\nunsigned char low_byte );\n\n# 341\nsigned char WriteMwire( unsigned char data_out );\n\n# 354\nvoid getsMwire( unsigned char *rdptr, unsigned char length );\n\n# 126 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\portb.h\"\nvoid OpenPORTB( unsigned char config);\n\n# 176\nvoid OpenRB0INT( unsigned char config);\n\n# 194\nvoid OpenRB1INT( unsigned char config);\n\n# 211\nvoid OpenRB2INT( unsigned char config);\n\n# 85 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\pwm.h\"\nunion PWMDC\n{\nunsigned int lpwm;\nchar bpwm[2];\n};\n\n# 467\nvoid OpenPWM1 ( char period);\nvoid SetDCPWM1 ( unsigned int duty_cycle);\n\n# 477\nvoid ClosePWM1 (void);\n\n# 485\nvoid OpenPWM2 ( char period);\nvoid SetDCPWM2( unsigned int duty_cycle);\n\n# 492\nvoid ClosePWM2 (void);\n\n# 16 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\reset.h\"\nchar isMCLR(void);\nvoid StatusReset(void);\nchar isPOR(void);\nchar isWU(void);\n\n\nchar isBOR(void);\n\n\n\nchar isWDTTO(void);\nchar isWDTWU(void);\n\n\n\nchar isLVD(void);\n\n# 687 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\rtcc.h\"\nvoid Open_RTCC(void);\nvoid Close_RTCC(void);\nunsigned char update_RTCC(void);\n\n# 97 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_i2c.h\"\nvoid SWStopI2C ( void );\nvoid SWStartI2C ( void );\nvoid SWRestartI2C ( void );\nvoid SWStopI2C ( void );\n\nsigned char SWAckI2C( void );\nsigned char Clock_test( void );\nsigned int SWReadI2C( void );\nsigned char SWWriteI2C(  unsigned char data_out );\nsigned char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\nsigned char SWPutsI2C(  unsigned char *wrptr );\n\n# 84 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_spi.h\"\nvoid OpenSWSPI(void);\n\n\nchar WriteSWSPI( char output);\n\n\nvoid SetCSSWSPI(void);\n\n\nvoid ClearCSSWSPI(void);\n\n# 47 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_uart.h\"\nvoid OpenUART(void);\n\nunsigned char ReadUART(void);\n\nvoid WriteUART( unsigned char);\n\nvoid getsUART( char *, unsigned char);\n\nvoid putsUART( char *);\n\n# 79\nextern void DelayRXBitUART (void);\nextern void DelayRXHalfBitUART(void);\nextern void DelayTXBitUART (void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\timers.h\"\nunion Timers\n{\nunsigned int lt;\nchar bt[2];\n};\n\n# 118\nvoid OpenTimer0 ( unsigned char config);\nvoid CloseTimer0 (void);\nunsigned int ReadTimer0 (void);\nvoid WriteTimer0 ( unsigned int timer0);\n\n# 236\nvoid OpenTimer1 ( unsigned char config);\nvoid CloseTimer1 (void);\nunsigned int ReadTimer1 (void);\nvoid WriteTimer1 ( unsigned int timer1);\n\n# 325\nvoid OpenTimer2 ( unsigned char config);\nvoid CloseTimer2 (void);\n\n# 391\nvoid OpenTimer3 ( unsigned char config);\nvoid CloseTimer3 (void);\nunsigned int ReadTimer3 (void);\nvoid WriteTimer3 ( unsigned int timer3);\n\n# 1179\nvoid SetTmrCCPSrc( unsigned char );\n\n# 568 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\usart.h\"\nunion USART\n{\nunsigned char val;\nstruct\n{\nunsigned RX_NINE:1;\nunsigned TX_NINE:1;\nunsigned FRAME_ERROR:1;\nunsigned OVERRUN_ERROR:1;\nunsigned fill:4;\n};\n};\nextern union USART USART_Status;\nvoid OpenUSART ( unsigned char config, unsigned spbrg);\n\n# 596\nchar ReadUSART (void);\nvoid WriteUSART ( char data);\nvoid getsUSART ( char *buffer, unsigned char len);\nvoid putsUSART ( char *data);\nvoid putrsUSART ( const  char *data);\n\n# 654\nvoid baudUSART ( unsigned char baudconfig);\n\n# 87 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\xlcd.h\"\nvoid OpenXLCD( unsigned char);\n\n# 92\nvoid SetCGRamAddr( unsigned char);\n\n# 97\nvoid SetDDRamAddr( unsigned char);\n\n# 102\nunsigned char BusyXLCD(void);\n\n# 107\nunsigned char ReadAddrXLCD(void);\n\n# 112\nchar ReadDataXLCD(void);\n\n# 117\nvoid WriteCmdXLCD( unsigned char);\n\n# 122\nvoid WriteDataXLCD( char);\n\n# 132\nvoid putsXLCD( char *);\n\n# 137\nvoid putrsXLCD(const char *);\n\n\nextern void DelayFor18TCY(void);\nextern void DelayPORXLCD(void);\nextern void DelayXLCD(void);\n\n# 18 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18.h\"\n__attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *);\n\n\n# 143\n#pragma intrinsic(_delay)\nextern void _delay(unsigned long);\n#pragma intrinsic(_delaywdt)\nextern void _delaywdt(unsigned long);\n#pragma intrinsic(_delay3)\nextern void _delay3(unsigned char);\n\n# 13 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stdint.h\"\ntypedef signed char int8_t;\n\n# 20\ntypedef signed int int16_t;\n\n# 28\ntypedef signed short long int int24_t;\n\n# 36\ntypedef signed long int int32_t;\n\n# 43\ntypedef unsigned char uint8_t;\n\n# 49\ntypedef unsigned int uint16_t;\n\n# 56\ntypedef unsigned short long int uint24_t;\n\n# 63\ntypedef unsigned long int uint32_t;\n\n# 71\ntypedef signed char int_least8_t;\n\n# 78\ntypedef signed int int_least16_t;\n\n# 90\ntypedef signed short long int int_least24_t;\n\n# 98\ntypedef signed long int int_least32_t;\n\n# 105\ntypedef unsigned char uint_least8_t;\n\n# 111\ntypedef unsigned int uint_least16_t;\n\n# 121\ntypedef unsigned short long int uint_least24_t;\n\n# 128\ntypedef unsigned long int uint_least32_t;\n\n# 137\ntypedef signed char int_fast8_t;\n\n# 144\ntypedef signed int int_fast16_t;\n\n# 156\ntypedef signed short long int int_fast24_t;\n\n# 164\ntypedef signed long int int_fast32_t;\n\n# 171\ntypedef unsigned char uint_fast8_t;\n\n# 177\ntypedef unsigned int uint_fast16_t;\n\n# 187\ntypedef unsigned short long int uint_fast24_t;\n\n# 194\ntypedef unsigned long int uint_fast32_t;\n\n# 200\ntypedef int32_t intmax_t;\n\n\n\n\ntypedef uint32_t uintmax_t;\n\n\n\n\ntypedef int16_t intptr_t;\n\n\n\n\ntypedef uint16_t uintptr_t;\n\n# 18 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPIPort.h\"\ntypedef char xSPIHandle;\n\n# 58 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI.h\"\nenum enSPIModules {\nE_SPI_1 = 1,\nE_SPI_2 = 2,\nE_SPI_3 = 3,\nE_SPI_4 = 4,\n};\n\n# 86\nxSPIHandle spi_init(enum enSPIModules eModule);\n\n# 99\nuint8_t spi_control(xSPIHandle spid, uint32_t ctrl, uint32_t arg);\n\n# 111\nuint8_t spi_open(xSPIHandle spid);\n\n# 122\nuint8_t spi_close(xSPIHandle spid);\n\n# 131\nvoid spi_write(xSPIHandle spid, uint8_t data);\n\n# 140\nuint8_t spi_read(xSPIHandle spid);\n\n# 149\nvoid spi_write_array(xSPIHandle spid, const uint8_t * txbuf, uint16_t len);\n\n# 158\nvoid spi_read_array(xSPIHandle spid, uint8_t * rxbuf, uint16_t len);\n\n# 168\nuint8_t spi_trans(xSPIHandle spid, uint8_t data);\n\n# 178\nvoid spi_trans_array(xSPIHandle spid, uint8_t * txbuf, uint8_t * rxbuf, uint16_t len);\n\n# 22 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\"\nstatic uint8_t inuse = 0;\n\nstatic uint8_t spi_available( xSPIHandle spid );\n\nxSPIHandle spi_init( enum enSPIModules eModule )\n{\nif( eModule != 1 )\nreturn 0;\n\nSSPSTAT = 0x00;\nSSPCON1 = 0x00;\n\n\nspi_control( eModule, 0x00000001 | 0x00000010, 3 );\n\n\nreturn eModule;\n}\n\nuint8_t spi_control( xSPIHandle spid, uint32_t ctrl, uint32_t arg )\n{\n\nif( spid != 1 )\nreturn -1;\n\nuint8_t speed = (uint8_t) arg & 0x0000000F;\n\n\nswitch( ctrl & 0x0000000F ) {\n\ncase 0x00000001:\nif( speed == 3 )\nSSPCON1bits.SSPM = 0;\nelse if( speed == 5 )\nSSPCON1bits.SSPM = 1;\nelse if( speed == 7 )\nSSPCON1bits.SSPM = 2;\nelse\n\nSSPCON1bits.SSPM = 2;\nbreak;\ncase 0x00000002:\n\nSSPCON1bits.SSPM = 4;\nbreak;\n\ndefault:\nreturn -2;\n}\n\n\nswitch( ctrl & 0x000000F0 ) {\ncase 0x00000010:\nSSPCON1bits.CKP = 0;\nSSPSTATbits.CKE = 0;\nbreak;\ncase 0x00000020:\nSSPCON1bits.CKP = 0;\nSSPSTATbits.CKE = 1;\nbreak;\ncase 0x00000030:\nSSPCON1bits.CKP = 1;\nSSPSTATbits.CKE = 0;\nbreak;\ncase 0x00000040:\nSSPCON1bits.CKP = 1;\nSSPSTATbits.CKE = 1;\nbreak;\ndefault:\nreturn -2;\n}\nreturn 1;\n}\n\nuint8_t spi_open( xSPIHandle spid )\n{\ninuse = 1;\nSSPCON1bits.SSPEN = 1;\nreturn 1;\n}\n\nuint8_t spi_close( xSPIHandle spid )\n{\ninuse = 0;\nSSPCON1bits.SSPEN = 0;\nreturn 1;\n}\n\nvoid spi_write( xSPIHandle spid, uint8_t data )\n{\nuint8_t rxtmp;\nSSPBUF = data;\nwhile( !spi_available( spid ) );\nrxtmp = SSPBUF;\n}\n\nuint8_t spi_read( xSPIHandle spid )\n{\nSSPBUF = 0xAA;\nwhile( !spi_available( spid ) );\nreturn SSPBUF;\n}\n\nvoid spi_write_array( xSPIHandle spid, const uint8_t * txbuf, uint16_t len )\n{\nuint8_t rxtmp;\nwhile( len ) {\nSSPBUF = *txbuf++;\nwhile( !spi_available( spid ) );\nrxtmp = SSPBUF;\nlen--;\n}\n}\n\nvoid spi_read_array( xSPIHandle spid, uint8_t * rxbuf, uint16_t len )\n{\nwhile( len ) {\nSSPBUF = 0xAA;\nwhile( !spi_available( spid ) );\n*rxbuf++ = SSPBUF;\nlen--;\n}\n}\n\nBYTE spi_trans( xSPIHandle spid, uint8_t data )\n{\nuint8_t rxtmp;\nSSPBUF = data;\nwhile( !spi_available( spid ) );\nrxtmp = SSPBUF;\nreturn rxtmp;\n}\n\nvoid spi_trans_array( xSPIHandle spid, uint8_t * txbuf, uint8_t * rxbuf, uint16_t len )\n{\nwhile( len ) {\nSSPBUF = *txbuf++;\nwhile( !spi_available( spid ) );\n*rxbuf++ = SSPBUF;\nlen--;\n}\n}\n\nstatic uint8_t spi_available( xSPIHandle spid )\n{\nreturn ( SSPSTATbits.BF ) ? 1 : 0;\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/838288359/PID.p1",
    "content": "Version 3.2 HI-TECH Software Intermediate Code\n[c E4687 0 1 .. ]\n[n E4687 enCtrlDirs E_PID_DIRECT E_PID_REVERSE  ]\n[s S518 `*f 1 `*f 1 `*f 1 `f 1 `f 1 `f 1 `f 1 `f 1 `f 1 `f 1 `ul 1 `ul 1 `uc 1 `E4687 1 ]\n[n S518 pid_controller input output setpoint Kp Ki Kd omin omax iterm lastin lasttime sampletime automode direction ]\n\"135 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.h\n[v _pid_limits `(v ~T0 @X0 0 ef3`*S518`f`f ]\n\"161\n[v _pid_direction `(v ~T0 @X0 0 ef2`*S518`E4687 ]\n\"116\n[v _pid_tune `(v ~T0 @X0 0 ef4`*S518`f`f`f ]\n\"62 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick.h\n[v _tick_get `(ul ~T0 @X0 0 ef ]\n[; ;pic18f2550.h: 44: extern volatile unsigned short UFRM @ 0xF66;\n\"46 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[; ;pic18f2550.h: 46: asm(\"UFRM equ 0F66h\");\n[; <\" UFRM equ 0F66h ;# \">\n[; ;pic18f2550.h: 50: extern volatile unsigned char UFRML @ 0xF66;\n\"52\n[; ;pic18f2550.h: 52: asm(\"UFRML equ 0F66h\");\n[; <\" UFRML equ 0F66h ;# \">\n[; ;pic18f2550.h: 55: typedef union {\n[; ;pic18f2550.h: 56: struct {\n[; ;pic18f2550.h: 57: unsigned FRM :8;\n[; ;pic18f2550.h: 58: };\n[; ;pic18f2550.h: 59: struct {\n[; ;pic18f2550.h: 60: unsigned FRM0 :1;\n[; ;pic18f2550.h: 61: unsigned FRM1 :1;\n[; ;pic18f2550.h: 62: unsigned FRM2 :1;\n[; ;pic18f2550.h: 63: unsigned FRM3 :1;\n[; ;pic18f2550.h: 64: unsigned FRM4 :1;\n[; ;pic18f2550.h: 65: unsigned FRM5 :1;\n[; ;pic18f2550.h: 66: unsigned FRM6 :1;\n[; ;pic18f2550.h: 67: unsigned FRM7 :1;\n[; ;pic18f2550.h: 68: };\n[; ;pic18f2550.h: 69: struct {\n[; ;pic18f2550.h: 70: unsigned FRML :8;\n[; ;pic18f2550.h: 71: };\n[; ;pic18f2550.h: 72: } UFRMLbits_t;\n[; ;pic18f2550.h: 73: extern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n[; ;pic18f2550.h: 127: extern volatile unsigned char UFRMH @ 0xF67;\n\"129\n[; ;pic18f2550.h: 129: asm(\"UFRMH equ 0F67h\");\n[; <\" UFRMH equ 0F67h ;# \">\n[; ;pic18f2550.h: 132: typedef union {\n[; ;pic18f2550.h: 133: struct {\n[; ;pic18f2550.h: 134: unsigned FRM :3;\n[; ;pic18f2550.h: 135: };\n[; ;pic18f2550.h: 136: struct {\n[; ;pic18f2550.h: 137: unsigned FRM8 :1;\n[; ;pic18f2550.h: 138: unsigned FRM9 :1;\n[; ;pic18f2550.h: 139: unsigned FRM10 :1;\n[; ;pic18f2550.h: 140: };\n[; ;pic18f2550.h: 141: } UFRMHbits_t;\n[; ;pic18f2550.h: 142: extern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n[; ;pic18f2550.h: 166: extern volatile unsigned char UIR @ 0xF68;\n\"168\n[; ;pic18f2550.h: 168: asm(\"UIR equ 0F68h\");\n[; <\" UIR equ 0F68h ;# \">\n[; ;pic18f2550.h: 171: typedef union {\n[; ;pic18f2550.h: 172: struct {\n[; ;pic18f2550.h: 173: unsigned URSTIF :1;\n[; ;pic18f2550.h: 174: unsigned UERRIF :1;\n[; ;pic18f2550.h: 175: unsigned ACTVIF :1;\n[; ;pic18f2550.h: 176: unsigned TRNIF :1;\n[; ;pic18f2550.h: 177: unsigned IDLEIF :1;\n[; ;pic18f2550.h: 178: unsigned STALLIF :1;\n[; ;pic18f2550.h: 179: unsigned SOFIF :1;\n[; ;pic18f2550.h: 180: };\n[; ;pic18f2550.h: 181: } UIRbits_t;\n[; ;pic18f2550.h: 182: extern volatile UIRbits_t UIRbits @ 0xF68;\n[; ;pic18f2550.h: 221: extern volatile unsigned char UIE @ 0xF69;\n\"223\n[; ;pic18f2550.h: 223: asm(\"UIE equ 0F69h\");\n[; <\" UIE equ 0F69h ;# \">\n[; ;pic18f2550.h: 226: typedef union {\n[; ;pic18f2550.h: 227: struct {\n[; ;pic18f2550.h: 228: unsigned URSTIE :1;\n[; ;pic18f2550.h: 229: unsigned UERRIE :1;\n[; ;pic18f2550.h: 230: unsigned ACTVIE :1;\n[; ;pic18f2550.h: 231: unsigned TRNIE :1;\n[; ;pic18f2550.h: 232: unsigned IDLEIE :1;\n[; ;pic18f2550.h: 233: unsigned STALLIE :1;\n[; ;pic18f2550.h: 234: unsigned SOFIE :1;\n[; ;pic18f2550.h: 235: };\n[; ;pic18f2550.h: 236: } UIEbits_t;\n[; ;pic18f2550.h: 237: extern volatile UIEbits_t UIEbits @ 0xF69;\n[; ;pic18f2550.h: 276: extern volatile unsigned char UEIR @ 0xF6A;\n\"278\n[; ;pic18f2550.h: 278: asm(\"UEIR equ 0F6Ah\");\n[; <\" UEIR equ 0F6Ah ;# \">\n[; ;pic18f2550.h: 281: typedef union {\n[; ;pic18f2550.h: 282: struct {\n[; ;pic18f2550.h: 283: unsigned PIDEF :1;\n[; ;pic18f2550.h: 284: unsigned CRC5EF :1;\n[; ;pic18f2550.h: 285: unsigned CRC16EF :1;\n[; ;pic18f2550.h: 286: unsigned DFN8EF :1;\n[; ;pic18f2550.h: 287: unsigned BTOEF :1;\n[; ;pic18f2550.h: 288: unsigned :2;\n[; ;pic18f2550.h: 289: unsigned BTSEF :1;\n[; ;pic18f2550.h: 290: };\n[; ;pic18f2550.h: 291: } UEIRbits_t;\n[; ;pic18f2550.h: 292: extern volatile UEIRbits_t UEIRbits @ 0xF6A;\n[; ;pic18f2550.h: 326: extern volatile unsigned char UEIE @ 0xF6B;\n\"328\n[; ;pic18f2550.h: 328: asm(\"UEIE equ 0F6Bh\");\n[; <\" UEIE equ 0F6Bh ;# \">\n[; ;pic18f2550.h: 331: typedef union {\n[; ;pic18f2550.h: 332: struct {\n[; ;pic18f2550.h: 333: unsigned PIDEE :1;\n[; ;pic18f2550.h: 334: unsigned CRC5EE :1;\n[; ;pic18f2550.h: 335: unsigned CRC16EE :1;\n[; ;pic18f2550.h: 336: unsigned DFN8EE :1;\n[; ;pic18f2550.h: 337: unsigned BTOEE :1;\n[; ;pic18f2550.h: 338: unsigned :2;\n[; ;pic18f2550.h: 339: unsigned BTSEE :1;\n[; ;pic18f2550.h: 340: };\n[; ;pic18f2550.h: 341: } UEIEbits_t;\n[; ;pic18f2550.h: 342: extern volatile UEIEbits_t UEIEbits @ 0xF6B;\n[; ;pic18f2550.h: 376: extern volatile unsigned char USTAT @ 0xF6C;\n\"378\n[; ;pic18f2550.h: 378: asm(\"USTAT equ 0F6Ch\");\n[; <\" USTAT equ 0F6Ch ;# \">\n[; ;pic18f2550.h: 381: typedef union {\n[; ;pic18f2550.h: 382: struct {\n[; ;pic18f2550.h: 383: unsigned :1;\n[; ;pic18f2550.h: 384: unsigned PPBI :1;\n[; ;pic18f2550.h: 385: unsigned DIR :1;\n[; ;pic18f2550.h: 386: unsigned ENDP :4;\n[; ;pic18f2550.h: 387: };\n[; ;pic18f2550.h: 388: struct {\n[; ;pic18f2550.h: 389: unsigned :3;\n[; ;pic18f2550.h: 390: unsigned ENDP0 :1;\n[; ;pic18f2550.h: 391: unsigned ENDP1 :1;\n[; ;pic18f2550.h: 392: unsigned ENDP2 :1;\n[; ;pic18f2550.h: 393: unsigned ENDP3 :1;\n[; ;pic18f2550.h: 394: };\n[; ;pic18f2550.h: 395: } USTATbits_t;\n[; ;pic18f2550.h: 396: extern volatile USTATbits_t USTATbits @ 0xF6C;\n[; ;pic18f2550.h: 435: extern volatile unsigned char UCON @ 0xF6D;\n\"437\n[; ;pic18f2550.h: 437: asm(\"UCON equ 0F6Dh\");\n[; <\" UCON equ 0F6Dh ;# \">\n[; ;pic18f2550.h: 440: typedef union {\n[; ;pic18f2550.h: 441: struct {\n[; ;pic18f2550.h: 442: unsigned :1;\n[; ;pic18f2550.h: 443: unsigned SUSPND :1;\n[; ;pic18f2550.h: 444: unsigned RESUME :1;\n[; ;pic18f2550.h: 445: unsigned USBEN :1;\n[; ;pic18f2550.h: 446: unsigned PKTDIS :1;\n[; ;pic18f2550.h: 447: unsigned SE0 :1;\n[; ;pic18f2550.h: 448: unsigned PPBRST :1;\n[; ;pic18f2550.h: 449: };\n[; ;pic18f2550.h: 450: } UCONbits_t;\n[; ;pic18f2550.h: 451: extern volatile UCONbits_t UCONbits @ 0xF6D;\n[; ;pic18f2550.h: 485: extern volatile unsigned char UADDR @ 0xF6E;\n\"487\n[; ;pic18f2550.h: 487: asm(\"UADDR equ 0F6Eh\");\n[; <\" UADDR equ 0F6Eh ;# \">\n[; ;pic18f2550.h: 490: typedef union {\n[; ;pic18f2550.h: 491: struct {\n[; ;pic18f2550.h: 492: unsigned ADDR :7;\n[; ;pic18f2550.h: 493: };\n[; ;pic18f2550.h: 494: struct {\n[; ;pic18f2550.h: 495: unsigned ADDR0 :1;\n[; ;pic18f2550.h: 496: unsigned ADDR1 :1;\n[; ;pic18f2550.h: 497: unsigned ADDR2 :1;\n[; ;pic18f2550.h: 498: unsigned ADDR3 :1;\n[; ;pic18f2550.h: 499: unsigned ADDR4 :1;\n[; ;pic18f2550.h: 500: unsigned ADDR5 :1;\n[; ;pic18f2550.h: 501: unsigned ADDR6 :1;\n[; ;pic18f2550.h: 502: };\n[; ;pic18f2550.h: 503: } UADDRbits_t;\n[; ;pic18f2550.h: 504: extern volatile UADDRbits_t UADDRbits @ 0xF6E;\n[; ;pic18f2550.h: 548: extern volatile unsigned char UCFG @ 0xF6F;\n\"550\n[; ;pic18f2550.h: 550: asm(\"UCFG equ 0F6Fh\");\n[; <\" UCFG equ 0F6Fh ;# \">\n[; ;pic18f2550.h: 553: typedef union {\n[; ;pic18f2550.h: 554: struct {\n[; ;pic18f2550.h: 555: unsigned PPB :2;\n[; ;pic18f2550.h: 556: unsigned FSEN :1;\n[; ;pic18f2550.h: 557: unsigned UTRDIS :1;\n[; ;pic18f2550.h: 558: unsigned UPUEN :1;\n[; ;pic18f2550.h: 559: unsigned :1;\n[; ;pic18f2550.h: 560: unsigned UOEMON :1;\n[; ;pic18f2550.h: 561: unsigned UTEYE :1;\n[; ;pic18f2550.h: 562: };\n[; ;pic18f2550.h: 563: struct {\n[; ;pic18f2550.h: 564: unsigned PPB0 :1;\n[; ;pic18f2550.h: 565: unsigned PPB1 :1;\n[; ;pic18f2550.h: 566: };\n[; ;pic18f2550.h: 567: struct {\n[; ;pic18f2550.h: 568: unsigned UPP0 :1;\n[; ;pic18f2550.h: 569: };\n[; ;pic18f2550.h: 570: struct {\n[; ;pic18f2550.h: 571: unsigned :1;\n[; ;pic18f2550.h: 572: unsigned UPP1 :1;\n[; ;pic18f2550.h: 573: };\n[; ;pic18f2550.h: 574: } UCFGbits_t;\n[; ;pic18f2550.h: 575: extern volatile UCFGbits_t UCFGbits @ 0xF6F;\n[; ;pic18f2550.h: 629: extern volatile unsigned char UEP0 @ 0xF70;\n\"631\n[; ;pic18f2550.h: 631: asm(\"UEP0 equ 0F70h\");\n[; <\" UEP0 equ 0F70h ;# \">\n[; ;pic18f2550.h: 634: typedef union {\n[; ;pic18f2550.h: 635: struct {\n[; ;pic18f2550.h: 636: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 637: unsigned EPINEN :1;\n[; ;pic18f2550.h: 638: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 639: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 640: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 641: };\n[; ;pic18f2550.h: 642: struct {\n[; ;pic18f2550.h: 643: unsigned :3;\n[; ;pic18f2550.h: 644: unsigned EP0CONDIS :1;\n[; ;pic18f2550.h: 645: };\n[; ;pic18f2550.h: 646: struct {\n[; ;pic18f2550.h: 647: unsigned :4;\n[; ;pic18f2550.h: 648: unsigned EP0HSHK :1;\n[; ;pic18f2550.h: 649: };\n[; ;pic18f2550.h: 650: struct {\n[; ;pic18f2550.h: 651: unsigned :1;\n[; ;pic18f2550.h: 652: unsigned EP0INEN :1;\n[; ;pic18f2550.h: 653: };\n[; ;pic18f2550.h: 654: struct {\n[; ;pic18f2550.h: 655: unsigned :2;\n[; ;pic18f2550.h: 656: unsigned EP0OUTEN :1;\n[; ;pic18f2550.h: 657: };\n[; ;pic18f2550.h: 658: struct {\n[; ;pic18f2550.h: 659: unsigned EP0STALL :1;\n[; ;pic18f2550.h: 660: };\n[; ;pic18f2550.h: 661: struct {\n[; ;pic18f2550.h: 662: unsigned :3;\n[; ;pic18f2550.h: 663: unsigned EPCONDIS0 :1;\n[; ;pic18f2550.h: 664: };\n[; ;pic18f2550.h: 665: struct {\n[; ;pic18f2550.h: 666: unsigned :4;\n[; ;pic18f2550.h: 667: unsigned EPHSHK0 :1;\n[; ;pic18f2550.h: 668: };\n[; ;pic18f2550.h: 669: struct {\n[; ;pic18f2550.h: 670: unsigned :1;\n[; ;pic18f2550.h: 671: unsigned EPINEN0 :1;\n[; ;pic18f2550.h: 672: };\n[; ;pic18f2550.h: 673: struct {\n[; ;pic18f2550.h: 674: unsigned :2;\n[; ;pic18f2550.h: 675: unsigned EPOUTEN0 :1;\n[; ;pic18f2550.h: 676: };\n[; ;pic18f2550.h: 677: struct {\n[; ;pic18f2550.h: 678: unsigned EPSTALL0 :1;\n[; ;pic18f2550.h: 679: };\n[; ;pic18f2550.h: 680: } UEP0bits_t;\n[; ;pic18f2550.h: 681: extern volatile UEP0bits_t UEP0bits @ 0xF70;\n[; ;pic18f2550.h: 760: extern volatile unsigned char UEP1 @ 0xF71;\n\"762\n[; ;pic18f2550.h: 762: asm(\"UEP1 equ 0F71h\");\n[; <\" UEP1 equ 0F71h ;# \">\n[; ;pic18f2550.h: 765: typedef union {\n[; ;pic18f2550.h: 766: struct {\n[; ;pic18f2550.h: 767: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 768: unsigned EPINEN :1;\n[; ;pic18f2550.h: 769: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 770: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 771: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 772: };\n[; ;pic18f2550.h: 773: struct {\n[; ;pic18f2550.h: 774: unsigned :3;\n[; ;pic18f2550.h: 775: unsigned EP1CONDIS :1;\n[; ;pic18f2550.h: 776: };\n[; ;pic18f2550.h: 777: struct {\n[; ;pic18f2550.h: 778: unsigned :4;\n[; ;pic18f2550.h: 779: unsigned EP1HSHK :1;\n[; ;pic18f2550.h: 780: };\n[; ;pic18f2550.h: 781: struct {\n[; ;pic18f2550.h: 782: unsigned :1;\n[; ;pic18f2550.h: 783: unsigned EP1INEN :1;\n[; ;pic18f2550.h: 784: };\n[; ;pic18f2550.h: 785: struct {\n[; ;pic18f2550.h: 786: unsigned :2;\n[; ;pic18f2550.h: 787: unsigned EP1OUTEN :1;\n[; ;pic18f2550.h: 788: };\n[; ;pic18f2550.h: 789: struct {\n[; ;pic18f2550.h: 790: unsigned EP1STALL :1;\n[; ;pic18f2550.h: 791: };\n[; ;pic18f2550.h: 792: struct {\n[; ;pic18f2550.h: 793: unsigned :3;\n[; ;pic18f2550.h: 794: unsigned EPCONDIS1 :1;\n[; ;pic18f2550.h: 795: };\n[; ;pic18f2550.h: 796: struct {\n[; ;pic18f2550.h: 797: unsigned :4;\n[; ;pic18f2550.h: 798: unsigned EPHSHK1 :1;\n[; ;pic18f2550.h: 799: };\n[; ;pic18f2550.h: 800: struct {\n[; ;pic18f2550.h: 801: unsigned :1;\n[; ;pic18f2550.h: 802: unsigned EPINEN1 :1;\n[; ;pic18f2550.h: 803: };\n[; ;pic18f2550.h: 804: struct {\n[; ;pic18f2550.h: 805: unsigned :2;\n[; ;pic18f2550.h: 806: unsigned EPOUTEN1 :1;\n[; ;pic18f2550.h: 807: };\n[; ;pic18f2550.h: 808: struct {\n[; ;pic18f2550.h: 809: unsigned EPSTALL1 :1;\n[; ;pic18f2550.h: 810: };\n[; ;pic18f2550.h: 811: } UEP1bits_t;\n[; ;pic18f2550.h: 812: extern volatile UEP1bits_t UEP1bits @ 0xF71;\n[; ;pic18f2550.h: 891: extern volatile unsigned char UEP2 @ 0xF72;\n\"893\n[; ;pic18f2550.h: 893: asm(\"UEP2 equ 0F72h\");\n[; <\" UEP2 equ 0F72h ;# \">\n[; ;pic18f2550.h: 896: typedef union {\n[; ;pic18f2550.h: 897: struct {\n[; ;pic18f2550.h: 898: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 899: unsigned EPINEN :1;\n[; ;pic18f2550.h: 900: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 901: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 902: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 903: };\n[; ;pic18f2550.h: 904: struct {\n[; ;pic18f2550.h: 905: unsigned :3;\n[; ;pic18f2550.h: 906: unsigned EP2CONDIS :1;\n[; ;pic18f2550.h: 907: };\n[; ;pic18f2550.h: 908: struct {\n[; ;pic18f2550.h: 909: unsigned :4;\n[; ;pic18f2550.h: 910: unsigned EP2HSHK :1;\n[; ;pic18f2550.h: 911: };\n[; ;pic18f2550.h: 912: struct {\n[; ;pic18f2550.h: 913: unsigned :1;\n[; ;pic18f2550.h: 914: unsigned EP2INEN :1;\n[; ;pic18f2550.h: 915: };\n[; ;pic18f2550.h: 916: struct {\n[; ;pic18f2550.h: 917: unsigned :2;\n[; ;pic18f2550.h: 918: unsigned EP2OUTEN :1;\n[; ;pic18f2550.h: 919: };\n[; ;pic18f2550.h: 920: struct {\n[; ;pic18f2550.h: 921: unsigned EP2STALL :1;\n[; ;pic18f2550.h: 922: };\n[; ;pic18f2550.h: 923: struct {\n[; ;pic18f2550.h: 924: unsigned :3;\n[; ;pic18f2550.h: 925: unsigned EPCONDIS2 :1;\n[; ;pic18f2550.h: 926: };\n[; ;pic18f2550.h: 927: struct {\n[; ;pic18f2550.h: 928: unsigned :4;\n[; ;pic18f2550.h: 929: unsigned EPHSHK2 :1;\n[; ;pic18f2550.h: 930: };\n[; ;pic18f2550.h: 931: struct {\n[; ;pic18f2550.h: 932: unsigned :1;\n[; ;pic18f2550.h: 933: unsigned EPINEN2 :1;\n[; ;pic18f2550.h: 934: };\n[; ;pic18f2550.h: 935: struct {\n[; ;pic18f2550.h: 936: unsigned :2;\n[; ;pic18f2550.h: 937: unsigned EPOUTEN2 :1;\n[; ;pic18f2550.h: 938: };\n[; ;pic18f2550.h: 939: struct {\n[; ;pic18f2550.h: 940: unsigned EPSTALL2 :1;\n[; ;pic18f2550.h: 941: };\n[; ;pic18f2550.h: 942: } UEP2bits_t;\n[; ;pic18f2550.h: 943: extern volatile UEP2bits_t UEP2bits @ 0xF72;\n[; ;pic18f2550.h: 1022: extern volatile unsigned char UEP3 @ 0xF73;\n\"1024\n[; ;pic18f2550.h: 1024: asm(\"UEP3 equ 0F73h\");\n[; <\" UEP3 equ 0F73h ;# \">\n[; ;pic18f2550.h: 1027: typedef union {\n[; ;pic18f2550.h: 1028: struct {\n[; ;pic18f2550.h: 1029: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1030: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1031: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1032: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1033: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1034: };\n[; ;pic18f2550.h: 1035: struct {\n[; ;pic18f2550.h: 1036: unsigned :3;\n[; ;pic18f2550.h: 1037: unsigned EP3CONDIS :1;\n[; ;pic18f2550.h: 1038: };\n[; ;pic18f2550.h: 1039: struct {\n[; ;pic18f2550.h: 1040: unsigned :4;\n[; ;pic18f2550.h: 1041: unsigned EP3HSHK :1;\n[; ;pic18f2550.h: 1042: };\n[; ;pic18f2550.h: 1043: struct {\n[; ;pic18f2550.h: 1044: unsigned :1;\n[; ;pic18f2550.h: 1045: unsigned EP3INEN :1;\n[; ;pic18f2550.h: 1046: };\n[; ;pic18f2550.h: 1047: struct {\n[; ;pic18f2550.h: 1048: unsigned :2;\n[; ;pic18f2550.h: 1049: unsigned EP3OUTEN :1;\n[; ;pic18f2550.h: 1050: };\n[; ;pic18f2550.h: 1051: struct {\n[; ;pic18f2550.h: 1052: unsigned EP3STALL :1;\n[; ;pic18f2550.h: 1053: };\n[; ;pic18f2550.h: 1054: struct {\n[; ;pic18f2550.h: 1055: unsigned :3;\n[; ;pic18f2550.h: 1056: unsigned EPCONDIS3 :1;\n[; ;pic18f2550.h: 1057: };\n[; ;pic18f2550.h: 1058: struct {\n[; ;pic18f2550.h: 1059: unsigned :4;\n[; ;pic18f2550.h: 1060: unsigned EPHSHK3 :1;\n[; ;pic18f2550.h: 1061: };\n[; ;pic18f2550.h: 1062: struct {\n[; ;pic18f2550.h: 1063: unsigned :1;\n[; ;pic18f2550.h: 1064: unsigned EPINEN3 :1;\n[; ;pic18f2550.h: 1065: };\n[; ;pic18f2550.h: 1066: struct {\n[; ;pic18f2550.h: 1067: unsigned :2;\n[; ;pic18f2550.h: 1068: unsigned EPOUTEN3 :1;\n[; ;pic18f2550.h: 1069: };\n[; ;pic18f2550.h: 1070: struct {\n[; ;pic18f2550.h: 1071: unsigned EPSTALL3 :1;\n[; ;pic18f2550.h: 1072: };\n[; ;pic18f2550.h: 1073: } UEP3bits_t;\n[; ;pic18f2550.h: 1074: extern volatile UEP3bits_t UEP3bits @ 0xF73;\n[; ;pic18f2550.h: 1153: extern volatile unsigned char UEP4 @ 0xF74;\n\"1155\n[; ;pic18f2550.h: 1155: asm(\"UEP4 equ 0F74h\");\n[; <\" UEP4 equ 0F74h ;# \">\n[; ;pic18f2550.h: 1158: typedef union {\n[; ;pic18f2550.h: 1159: struct {\n[; ;pic18f2550.h: 1160: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1161: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1162: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1163: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1164: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1165: };\n[; ;pic18f2550.h: 1166: struct {\n[; ;pic18f2550.h: 1167: unsigned :3;\n[; ;pic18f2550.h: 1168: unsigned EP4CONDIS :1;\n[; ;pic18f2550.h: 1169: };\n[; ;pic18f2550.h: 1170: struct {\n[; ;pic18f2550.h: 1171: unsigned :4;\n[; ;pic18f2550.h: 1172: unsigned EP4HSHK :1;\n[; ;pic18f2550.h: 1173: };\n[; ;pic18f2550.h: 1174: struct {\n[; ;pic18f2550.h: 1175: unsigned :1;\n[; ;pic18f2550.h: 1176: unsigned EP4INEN :1;\n[; ;pic18f2550.h: 1177: };\n[; ;pic18f2550.h: 1178: struct {\n[; ;pic18f2550.h: 1179: unsigned :2;\n[; ;pic18f2550.h: 1180: unsigned EP4OUTEN :1;\n[; ;pic18f2550.h: 1181: };\n[; ;pic18f2550.h: 1182: struct {\n[; ;pic18f2550.h: 1183: unsigned EP4STALL :1;\n[; ;pic18f2550.h: 1184: };\n[; ;pic18f2550.h: 1185: struct {\n[; ;pic18f2550.h: 1186: unsigned :3;\n[; ;pic18f2550.h: 1187: unsigned EPCONDIS4 :1;\n[; ;pic18f2550.h: 1188: };\n[; ;pic18f2550.h: 1189: struct {\n[; ;pic18f2550.h: 1190: unsigned :4;\n[; ;pic18f2550.h: 1191: unsigned EPHSHK4 :1;\n[; ;pic18f2550.h: 1192: };\n[; ;pic18f2550.h: 1193: struct {\n[; ;pic18f2550.h: 1194: unsigned :1;\n[; ;pic18f2550.h: 1195: unsigned EPINEN4 :1;\n[; ;pic18f2550.h: 1196: };\n[; ;pic18f2550.h: 1197: struct {\n[; ;pic18f2550.h: 1198: unsigned :2;\n[; ;pic18f2550.h: 1199: unsigned EPOUTEN4 :1;\n[; ;pic18f2550.h: 1200: };\n[; ;pic18f2550.h: 1201: struct {\n[; ;pic18f2550.h: 1202: unsigned EPSTALL4 :1;\n[; ;pic18f2550.h: 1203: };\n[; ;pic18f2550.h: 1204: } UEP4bits_t;\n[; ;pic18f2550.h: 1205: extern volatile UEP4bits_t UEP4bits @ 0xF74;\n[; ;pic18f2550.h: 1284: extern volatile unsigned char UEP5 @ 0xF75;\n\"1286\n[; ;pic18f2550.h: 1286: asm(\"UEP5 equ 0F75h\");\n[; <\" UEP5 equ 0F75h ;# \">\n[; ;pic18f2550.h: 1289: typedef union {\n[; ;pic18f2550.h: 1290: struct {\n[; ;pic18f2550.h: 1291: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1292: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1293: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1294: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1295: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1296: };\n[; ;pic18f2550.h: 1297: struct {\n[; ;pic18f2550.h: 1298: unsigned :3;\n[; ;pic18f2550.h: 1299: unsigned EP5CONDIS :1;\n[; ;pic18f2550.h: 1300: };\n[; ;pic18f2550.h: 1301: struct {\n[; ;pic18f2550.h: 1302: unsigned :4;\n[; ;pic18f2550.h: 1303: unsigned EP5HSHK :1;\n[; ;pic18f2550.h: 1304: };\n[; ;pic18f2550.h: 1305: struct {\n[; ;pic18f2550.h: 1306: unsigned :1;\n[; ;pic18f2550.h: 1307: unsigned EP5INEN :1;\n[; ;pic18f2550.h: 1308: };\n[; ;pic18f2550.h: 1309: struct {\n[; ;pic18f2550.h: 1310: unsigned :2;\n[; ;pic18f2550.h: 1311: unsigned EP5OUTEN :1;\n[; ;pic18f2550.h: 1312: };\n[; ;pic18f2550.h: 1313: struct {\n[; ;pic18f2550.h: 1314: unsigned EP5STALL :1;\n[; ;pic18f2550.h: 1315: };\n[; ;pic18f2550.h: 1316: struct {\n[; ;pic18f2550.h: 1317: unsigned :3;\n[; ;pic18f2550.h: 1318: unsigned EPCONDIS5 :1;\n[; ;pic18f2550.h: 1319: };\n[; ;pic18f2550.h: 1320: struct {\n[; ;pic18f2550.h: 1321: unsigned :4;\n[; ;pic18f2550.h: 1322: unsigned EPHSHK5 :1;\n[; ;pic18f2550.h: 1323: };\n[; ;pic18f2550.h: 1324: struct {\n[; ;pic18f2550.h: 1325: unsigned :1;\n[; ;pic18f2550.h: 1326: unsigned EPINEN5 :1;\n[; ;pic18f2550.h: 1327: };\n[; ;pic18f2550.h: 1328: struct {\n[; ;pic18f2550.h: 1329: unsigned :2;\n[; ;pic18f2550.h: 1330: unsigned EPOUTEN5 :1;\n[; ;pic18f2550.h: 1331: };\n[; ;pic18f2550.h: 1332: struct {\n[; ;pic18f2550.h: 1333: unsigned EPSTALL5 :1;\n[; ;pic18f2550.h: 1334: };\n[; ;pic18f2550.h: 1335: } UEP5bits_t;\n[; ;pic18f2550.h: 1336: extern volatile UEP5bits_t UEP5bits @ 0xF75;\n[; ;pic18f2550.h: 1415: extern volatile unsigned char UEP6 @ 0xF76;\n\"1417\n[; ;pic18f2550.h: 1417: asm(\"UEP6 equ 0F76h\");\n[; <\" UEP6 equ 0F76h ;# \">\n[; ;pic18f2550.h: 1420: typedef union {\n[; ;pic18f2550.h: 1421: struct {\n[; ;pic18f2550.h: 1422: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1423: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1424: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1425: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1426: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1427: };\n[; ;pic18f2550.h: 1428: struct {\n[; ;pic18f2550.h: 1429: unsigned :3;\n[; ;pic18f2550.h: 1430: unsigned EP6CONDIS :1;\n[; ;pic18f2550.h: 1431: };\n[; ;pic18f2550.h: 1432: struct {\n[; ;pic18f2550.h: 1433: unsigned :4;\n[; ;pic18f2550.h: 1434: unsigned EP6HSHK :1;\n[; ;pic18f2550.h: 1435: };\n[; ;pic18f2550.h: 1436: struct {\n[; ;pic18f2550.h: 1437: unsigned :1;\n[; ;pic18f2550.h: 1438: unsigned EP6INEN :1;\n[; ;pic18f2550.h: 1439: };\n[; ;pic18f2550.h: 1440: struct {\n[; ;pic18f2550.h: 1441: unsigned :2;\n[; ;pic18f2550.h: 1442: unsigned EP6OUTEN :1;\n[; ;pic18f2550.h: 1443: };\n[; ;pic18f2550.h: 1444: struct {\n[; ;pic18f2550.h: 1445: unsigned EP6STALL :1;\n[; ;pic18f2550.h: 1446: };\n[; ;pic18f2550.h: 1447: struct {\n[; ;pic18f2550.h: 1448: unsigned :3;\n[; ;pic18f2550.h: 1449: unsigned EPCONDIS6 :1;\n[; ;pic18f2550.h: 1450: };\n[; ;pic18f2550.h: 1451: struct {\n[; ;pic18f2550.h: 1452: unsigned :4;\n[; ;pic18f2550.h: 1453: unsigned EPHSHK6 :1;\n[; ;pic18f2550.h: 1454: };\n[; ;pic18f2550.h: 1455: struct {\n[; ;pic18f2550.h: 1456: unsigned :1;\n[; ;pic18f2550.h: 1457: unsigned EPINEN6 :1;\n[; ;pic18f2550.h: 1458: };\n[; ;pic18f2550.h: 1459: struct {\n[; ;pic18f2550.h: 1460: unsigned :2;\n[; ;pic18f2550.h: 1461: unsigned EPOUTEN6 :1;\n[; ;pic18f2550.h: 1462: };\n[; ;pic18f2550.h: 1463: struct {\n[; ;pic18f2550.h: 1464: unsigned EPSTALL6 :1;\n[; ;pic18f2550.h: 1465: };\n[; ;pic18f2550.h: 1466: } UEP6bits_t;\n[; ;pic18f2550.h: 1467: extern volatile UEP6bits_t UEP6bits @ 0xF76;\n[; ;pic18f2550.h: 1546: extern volatile unsigned char UEP7 @ 0xF77;\n\"1548\n[; ;pic18f2550.h: 1548: asm(\"UEP7 equ 0F77h\");\n[; <\" UEP7 equ 0F77h ;# \">\n[; ;pic18f2550.h: 1551: typedef union {\n[; ;pic18f2550.h: 1552: struct {\n[; ;pic18f2550.h: 1553: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1554: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1555: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1556: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1557: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1558: };\n[; ;pic18f2550.h: 1559: struct {\n[; ;pic18f2550.h: 1560: unsigned :3;\n[; ;pic18f2550.h: 1561: unsigned EP7CONDIS :1;\n[; ;pic18f2550.h: 1562: };\n[; ;pic18f2550.h: 1563: struct {\n[; ;pic18f2550.h: 1564: unsigned :4;\n[; ;pic18f2550.h: 1565: unsigned EP7HSHK :1;\n[; ;pic18f2550.h: 1566: };\n[; ;pic18f2550.h: 1567: struct {\n[; ;pic18f2550.h: 1568: unsigned :1;\n[; ;pic18f2550.h: 1569: unsigned EP7INEN :1;\n[; ;pic18f2550.h: 1570: };\n[; ;pic18f2550.h: 1571: struct {\n[; ;pic18f2550.h: 1572: unsigned :2;\n[; ;pic18f2550.h: 1573: unsigned EP7OUTEN :1;\n[; ;pic18f2550.h: 1574: };\n[; ;pic18f2550.h: 1575: struct {\n[; ;pic18f2550.h: 1576: unsigned EP7STALL :1;\n[; ;pic18f2550.h: 1577: };\n[; ;pic18f2550.h: 1578: struct {\n[; ;pic18f2550.h: 1579: unsigned :3;\n[; ;pic18f2550.h: 1580: unsigned EPCONDIS7 :1;\n[; ;pic18f2550.h: 1581: };\n[; ;pic18f2550.h: 1582: struct {\n[; ;pic18f2550.h: 1583: unsigned :4;\n[; ;pic18f2550.h: 1584: unsigned EPHSHK7 :1;\n[; ;pic18f2550.h: 1585: };\n[; ;pic18f2550.h: 1586: struct {\n[; ;pic18f2550.h: 1587: unsigned :1;\n[; ;pic18f2550.h: 1588: unsigned EPINEN7 :1;\n[; ;pic18f2550.h: 1589: };\n[; ;pic18f2550.h: 1590: struct {\n[; ;pic18f2550.h: 1591: unsigned :2;\n[; ;pic18f2550.h: 1592: unsigned EPOUTEN7 :1;\n[; ;pic18f2550.h: 1593: };\n[; ;pic18f2550.h: 1594: struct {\n[; ;pic18f2550.h: 1595: unsigned EPSTALL7 :1;\n[; ;pic18f2550.h: 1596: };\n[; ;pic18f2550.h: 1597: } UEP7bits_t;\n[; ;pic18f2550.h: 1598: extern volatile UEP7bits_t UEP7bits @ 0xF77;\n[; ;pic18f2550.h: 1677: extern volatile unsigned char UEP8 @ 0xF78;\n\"1679\n[; ;pic18f2550.h: 1679: asm(\"UEP8 equ 0F78h\");\n[; <\" UEP8 equ 0F78h ;# \">\n[; ;pic18f2550.h: 1682: typedef union {\n[; ;pic18f2550.h: 1683: struct {\n[; ;pic18f2550.h: 1684: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1685: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1686: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1687: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1688: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1689: };\n[; ;pic18f2550.h: 1690: struct {\n[; ;pic18f2550.h: 1691: unsigned :3;\n[; ;pic18f2550.h: 1692: unsigned EPCONDIS8 :1;\n[; ;pic18f2550.h: 1693: };\n[; ;pic18f2550.h: 1694: struct {\n[; ;pic18f2550.h: 1695: unsigned :4;\n[; ;pic18f2550.h: 1696: unsigned EPHSHK8 :1;\n[; ;pic18f2550.h: 1697: };\n[; ;pic18f2550.h: 1698: struct {\n[; ;pic18f2550.h: 1699: unsigned :1;\n[; ;pic18f2550.h: 1700: unsigned EPINEN8 :1;\n[; ;pic18f2550.h: 1701: };\n[; ;pic18f2550.h: 1702: struct {\n[; ;pic18f2550.h: 1703: unsigned :2;\n[; ;pic18f2550.h: 1704: unsigned EPOUTEN8 :1;\n[; ;pic18f2550.h: 1705: };\n[; ;pic18f2550.h: 1706: struct {\n[; ;pic18f2550.h: 1707: unsigned EPSTALL8 :1;\n[; ;pic18f2550.h: 1708: };\n[; ;pic18f2550.h: 1709: } UEP8bits_t;\n[; ;pic18f2550.h: 1710: extern volatile UEP8bits_t UEP8bits @ 0xF78;\n[; ;pic18f2550.h: 1764: extern volatile unsigned char UEP9 @ 0xF79;\n\"1766\n[; ;pic18f2550.h: 1766: asm(\"UEP9 equ 0F79h\");\n[; <\" UEP9 equ 0F79h ;# \">\n[; ;pic18f2550.h: 1769: typedef union {\n[; ;pic18f2550.h: 1770: struct {\n[; ;pic18f2550.h: 1771: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1772: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1773: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1774: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1775: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1776: };\n[; ;pic18f2550.h: 1777: struct {\n[; ;pic18f2550.h: 1778: unsigned :3;\n[; ;pic18f2550.h: 1779: unsigned EPCONDIS9 :1;\n[; ;pic18f2550.h: 1780: };\n[; ;pic18f2550.h: 1781: struct {\n[; ;pic18f2550.h: 1782: unsigned :4;\n[; ;pic18f2550.h: 1783: unsigned EPHSHK9 :1;\n[; ;pic18f2550.h: 1784: };\n[; ;pic18f2550.h: 1785: struct {\n[; ;pic18f2550.h: 1786: unsigned :1;\n[; ;pic18f2550.h: 1787: unsigned EPINEN9 :1;\n[; ;pic18f2550.h: 1788: };\n[; ;pic18f2550.h: 1789: struct {\n[; ;pic18f2550.h: 1790: unsigned :2;\n[; ;pic18f2550.h: 1791: unsigned EPOUTEN9 :1;\n[; ;pic18f2550.h: 1792: };\n[; ;pic18f2550.h: 1793: struct {\n[; ;pic18f2550.h: 1794: unsigned EPSTALL9 :1;\n[; ;pic18f2550.h: 1795: };\n[; ;pic18f2550.h: 1796: } UEP9bits_t;\n[; ;pic18f2550.h: 1797: extern volatile UEP9bits_t UEP9bits @ 0xF79;\n[; ;pic18f2550.h: 1851: extern volatile unsigned char UEP10 @ 0xF7A;\n\"1853\n[; ;pic18f2550.h: 1853: asm(\"UEP10 equ 0F7Ah\");\n[; <\" UEP10 equ 0F7Ah ;# \">\n[; ;pic18f2550.h: 1856: typedef union {\n[; ;pic18f2550.h: 1857: struct {\n[; ;pic18f2550.h: 1858: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1859: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1860: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1861: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1862: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1863: };\n[; ;pic18f2550.h: 1864: struct {\n[; ;pic18f2550.h: 1865: unsigned :3;\n[; ;pic18f2550.h: 1866: unsigned EPCONDIS10 :1;\n[; ;pic18f2550.h: 1867: };\n[; ;pic18f2550.h: 1868: struct {\n[; ;pic18f2550.h: 1869: unsigned :4;\n[; ;pic18f2550.h: 1870: unsigned EPHSHK10 :1;\n[; ;pic18f2550.h: 1871: };\n[; ;pic18f2550.h: 1872: struct {\n[; ;pic18f2550.h: 1873: unsigned :1;\n[; ;pic18f2550.h: 1874: unsigned EPINEN10 :1;\n[; ;pic18f2550.h: 1875: };\n[; ;pic18f2550.h: 1876: struct {\n[; ;pic18f2550.h: 1877: unsigned :2;\n[; ;pic18f2550.h: 1878: unsigned EPOUTEN10 :1;\n[; ;pic18f2550.h: 1879: };\n[; ;pic18f2550.h: 1880: struct {\n[; ;pic18f2550.h: 1881: unsigned EPSTALL10 :1;\n[; ;pic18f2550.h: 1882: };\n[; ;pic18f2550.h: 1883: } UEP10bits_t;\n[; ;pic18f2550.h: 1884: extern volatile UEP10bits_t UEP10bits @ 0xF7A;\n[; ;pic18f2550.h: 1938: extern volatile unsigned char UEP11 @ 0xF7B;\n\"1940\n[; ;pic18f2550.h: 1940: asm(\"UEP11 equ 0F7Bh\");\n[; <\" UEP11 equ 0F7Bh ;# \">\n[; ;pic18f2550.h: 1943: typedef union {\n[; ;pic18f2550.h: 1944: struct {\n[; ;pic18f2550.h: 1945: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1946: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1947: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1948: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1949: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1950: };\n[; ;pic18f2550.h: 1951: struct {\n[; ;pic18f2550.h: 1952: unsigned :3;\n[; ;pic18f2550.h: 1953: unsigned EPCONDIS11 :1;\n[; ;pic18f2550.h: 1954: };\n[; ;pic18f2550.h: 1955: struct {\n[; ;pic18f2550.h: 1956: unsigned :4;\n[; ;pic18f2550.h: 1957: unsigned EPHSHK11 :1;\n[; ;pic18f2550.h: 1958: };\n[; ;pic18f2550.h: 1959: struct {\n[; ;pic18f2550.h: 1960: unsigned :1;\n[; ;pic18f2550.h: 1961: unsigned EPINEN11 :1;\n[; ;pic18f2550.h: 1962: };\n[; ;pic18f2550.h: 1963: struct {\n[; ;pic18f2550.h: 1964: unsigned :2;\n[; ;pic18f2550.h: 1965: unsigned EPOUTEN11 :1;\n[; ;pic18f2550.h: 1966: };\n[; ;pic18f2550.h: 1967: struct {\n[; ;pic18f2550.h: 1968: unsigned EPSTALL11 :1;\n[; ;pic18f2550.h: 1969: };\n[; ;pic18f2550.h: 1970: } UEP11bits_t;\n[; ;pic18f2550.h: 1971: extern volatile UEP11bits_t UEP11bits @ 0xF7B;\n[; ;pic18f2550.h: 2025: extern volatile unsigned char UEP12 @ 0xF7C;\n\"2027\n[; ;pic18f2550.h: 2027: asm(\"UEP12 equ 0F7Ch\");\n[; <\" UEP12 equ 0F7Ch ;# \">\n[; ;pic18f2550.h: 2030: typedef union {\n[; ;pic18f2550.h: 2031: struct {\n[; ;pic18f2550.h: 2032: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2033: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2034: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2035: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2036: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2037: };\n[; ;pic18f2550.h: 2038: struct {\n[; ;pic18f2550.h: 2039: unsigned :3;\n[; ;pic18f2550.h: 2040: unsigned EPCONDIS12 :1;\n[; ;pic18f2550.h: 2041: };\n[; ;pic18f2550.h: 2042: struct {\n[; ;pic18f2550.h: 2043: unsigned :4;\n[; ;pic18f2550.h: 2044: unsigned EPHSHK12 :1;\n[; ;pic18f2550.h: 2045: };\n[; ;pic18f2550.h: 2046: struct {\n[; ;pic18f2550.h: 2047: unsigned :1;\n[; ;pic18f2550.h: 2048: unsigned EPINEN12 :1;\n[; ;pic18f2550.h: 2049: };\n[; ;pic18f2550.h: 2050: struct {\n[; ;pic18f2550.h: 2051: unsigned :2;\n[; ;pic18f2550.h: 2052: unsigned EPOUTEN12 :1;\n[; ;pic18f2550.h: 2053: };\n[; ;pic18f2550.h: 2054: struct {\n[; ;pic18f2550.h: 2055: unsigned EPSTALL12 :1;\n[; ;pic18f2550.h: 2056: };\n[; ;pic18f2550.h: 2057: } UEP12bits_t;\n[; ;pic18f2550.h: 2058: extern volatile UEP12bits_t UEP12bits @ 0xF7C;\n[; ;pic18f2550.h: 2112: extern volatile unsigned char UEP13 @ 0xF7D;\n\"2114\n[; ;pic18f2550.h: 2114: asm(\"UEP13 equ 0F7Dh\");\n[; <\" UEP13 equ 0F7Dh ;# \">\n[; ;pic18f2550.h: 2117: typedef union {\n[; ;pic18f2550.h: 2118: struct {\n[; ;pic18f2550.h: 2119: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2120: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2121: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2122: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2123: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2124: };\n[; ;pic18f2550.h: 2125: struct {\n[; ;pic18f2550.h: 2126: unsigned :3;\n[; ;pic18f2550.h: 2127: unsigned EPCONDIS13 :1;\n[; ;pic18f2550.h: 2128: };\n[; ;pic18f2550.h: 2129: struct {\n[; ;pic18f2550.h: 2130: unsigned :4;\n[; ;pic18f2550.h: 2131: unsigned EPHSHK13 :1;\n[; ;pic18f2550.h: 2132: };\n[; ;pic18f2550.h: 2133: struct {\n[; ;pic18f2550.h: 2134: unsigned :1;\n[; ;pic18f2550.h: 2135: unsigned EPINEN13 :1;\n[; ;pic18f2550.h: 2136: };\n[; ;pic18f2550.h: 2137: struct {\n[; ;pic18f2550.h: 2138: unsigned :2;\n[; ;pic18f2550.h: 2139: unsigned EPOUTEN13 :1;\n[; ;pic18f2550.h: 2140: };\n[; ;pic18f2550.h: 2141: struct {\n[; ;pic18f2550.h: 2142: unsigned EPSTALL13 :1;\n[; ;pic18f2550.h: 2143: };\n[; ;pic18f2550.h: 2144: } UEP13bits_t;\n[; ;pic18f2550.h: 2145: extern volatile UEP13bits_t UEP13bits @ 0xF7D;\n[; ;pic18f2550.h: 2199: extern volatile unsigned char UEP14 @ 0xF7E;\n\"2201\n[; ;pic18f2550.h: 2201: asm(\"UEP14 equ 0F7Eh\");\n[; <\" UEP14 equ 0F7Eh ;# \">\n[; ;pic18f2550.h: 2204: typedef union {\n[; ;pic18f2550.h: 2205: struct {\n[; ;pic18f2550.h: 2206: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2207: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2208: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2209: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2210: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2211: };\n[; ;pic18f2550.h: 2212: struct {\n[; ;pic18f2550.h: 2213: unsigned :3;\n[; ;pic18f2550.h: 2214: unsigned EPCONDIS14 :1;\n[; ;pic18f2550.h: 2215: };\n[; ;pic18f2550.h: 2216: struct {\n[; ;pic18f2550.h: 2217: unsigned :4;\n[; ;pic18f2550.h: 2218: unsigned EPHSHK14 :1;\n[; ;pic18f2550.h: 2219: };\n[; ;pic18f2550.h: 2220: struct {\n[; ;pic18f2550.h: 2221: unsigned :1;\n[; ;pic18f2550.h: 2222: unsigned EPINEN14 :1;\n[; ;pic18f2550.h: 2223: };\n[; ;pic18f2550.h: 2224: struct {\n[; ;pic18f2550.h: 2225: unsigned :2;\n[; ;pic18f2550.h: 2226: unsigned EPOUTEN14 :1;\n[; ;pic18f2550.h: 2227: };\n[; ;pic18f2550.h: 2228: struct {\n[; ;pic18f2550.h: 2229: unsigned EPSTALL14 :1;\n[; ;pic18f2550.h: 2230: };\n[; ;pic18f2550.h: 2231: } UEP14bits_t;\n[; ;pic18f2550.h: 2232: extern volatile UEP14bits_t UEP14bits @ 0xF7E;\n[; ;pic18f2550.h: 2286: extern volatile unsigned char UEP15 @ 0xF7F;\n\"2288\n[; ;pic18f2550.h: 2288: asm(\"UEP15 equ 0F7Fh\");\n[; <\" UEP15 equ 0F7Fh ;# \">\n[; ;pic18f2550.h: 2291: typedef union {\n[; ;pic18f2550.h: 2292: struct {\n[; ;pic18f2550.h: 2293: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2294: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2295: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2296: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2297: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2298: };\n[; ;pic18f2550.h: 2299: struct {\n[; ;pic18f2550.h: 2300: unsigned :3;\n[; ;pic18f2550.h: 2301: unsigned EPCONDIS15 :1;\n[; ;pic18f2550.h: 2302: };\n[; ;pic18f2550.h: 2303: struct {\n[; ;pic18f2550.h: 2304: unsigned :4;\n[; ;pic18f2550.h: 2305: unsigned EPHSHK15 :1;\n[; ;pic18f2550.h: 2306: };\n[; ;pic18f2550.h: 2307: struct {\n[; ;pic18f2550.h: 2308: unsigned :1;\n[; ;pic18f2550.h: 2309: unsigned EPINEN15 :1;\n[; ;pic18f2550.h: 2310: };\n[; ;pic18f2550.h: 2311: struct {\n[; ;pic18f2550.h: 2312: unsigned :2;\n[; ;pic18f2550.h: 2313: unsigned EPOUTEN15 :1;\n[; ;pic18f2550.h: 2314: };\n[; ;pic18f2550.h: 2315: struct {\n[; ;pic18f2550.h: 2316: unsigned EPSTALL15 :1;\n[; ;pic18f2550.h: 2317: };\n[; ;pic18f2550.h: 2318: } UEP15bits_t;\n[; ;pic18f2550.h: 2319: extern volatile UEP15bits_t UEP15bits @ 0xF7F;\n[; ;pic18f2550.h: 2373: extern volatile unsigned char PORTA @ 0xF80;\n\"2375\n[; ;pic18f2550.h: 2375: asm(\"PORTA equ 0F80h\");\n[; <\" PORTA equ 0F80h ;# \">\n[; ;pic18f2550.h: 2378: typedef union {\n[; ;pic18f2550.h: 2379: struct {\n[; ;pic18f2550.h: 2380: unsigned RA0 :1;\n[; ;pic18f2550.h: 2381: unsigned RA1 :1;\n[; ;pic18f2550.h: 2382: unsigned RA2 :1;\n[; ;pic18f2550.h: 2383: unsigned RA3 :1;\n[; ;pic18f2550.h: 2384: unsigned RA4 :1;\n[; ;pic18f2550.h: 2385: unsigned RA5 :1;\n[; ;pic18f2550.h: 2386: unsigned RA6 :1;\n[; ;pic18f2550.h: 2387: };\n[; ;pic18f2550.h: 2388: struct {\n[; ;pic18f2550.h: 2389: unsigned AN0 :1;\n[; ;pic18f2550.h: 2390: unsigned AN1 :1;\n[; ;pic18f2550.h: 2391: unsigned AN2 :1;\n[; ;pic18f2550.h: 2392: unsigned AN3 :1;\n[; ;pic18f2550.h: 2393: unsigned T0CKI :1;\n[; ;pic18f2550.h: 2394: unsigned AN4 :1;\n[; ;pic18f2550.h: 2395: unsigned OSC2 :1;\n[; ;pic18f2550.h: 2396: };\n[; ;pic18f2550.h: 2397: struct {\n[; ;pic18f2550.h: 2398: unsigned :2;\n[; ;pic18f2550.h: 2399: unsigned VREFM :1;\n[; ;pic18f2550.h: 2400: unsigned VREFP :1;\n[; ;pic18f2550.h: 2401: unsigned :1;\n[; ;pic18f2550.h: 2402: unsigned LVDIN :1;\n[; ;pic18f2550.h: 2403: };\n[; ;pic18f2550.h: 2404: struct {\n[; ;pic18f2550.h: 2405: unsigned :5;\n[; ;pic18f2550.h: 2406: unsigned HLVDIN :1;\n[; ;pic18f2550.h: 2407: };\n[; ;pic18f2550.h: 2408: struct {\n[; ;pic18f2550.h: 2409: unsigned :7;\n[; ;pic18f2550.h: 2410: unsigned RA7 :1;\n[; ;pic18f2550.h: 2411: };\n[; ;pic18f2550.h: 2412: struct {\n[; ;pic18f2550.h: 2413: unsigned :7;\n[; ;pic18f2550.h: 2414: unsigned RJPU :1;\n[; ;pic18f2550.h: 2415: };\n[; ;pic18f2550.h: 2416: struct {\n[; ;pic18f2550.h: 2417: unsigned ULPWUIN :1;\n[; ;pic18f2550.h: 2418: };\n[; ;pic18f2550.h: 2419: } PORTAbits_t;\n[; ;pic18f2550.h: 2420: extern volatile PORTAbits_t PORTAbits @ 0xF80;\n[; ;pic18f2550.h: 2529: extern volatile unsigned char PORTB @ 0xF81;\n\"2531\n[; ;pic18f2550.h: 2531: asm(\"PORTB equ 0F81h\");\n[; <\" PORTB equ 0F81h ;# \">\n[; ;pic18f2550.h: 2534: typedef union {\n[; ;pic18f2550.h: 2535: struct {\n[; ;pic18f2550.h: 2536: unsigned RB0 :1;\n[; ;pic18f2550.h: 2537: unsigned RB1 :1;\n[; ;pic18f2550.h: 2538: unsigned RB2 :1;\n[; ;pic18f2550.h: 2539: unsigned RB3 :1;\n[; ;pic18f2550.h: 2540: unsigned RB4 :1;\n[; ;pic18f2550.h: 2541: unsigned RB5 :1;\n[; ;pic18f2550.h: 2542: unsigned RB6 :1;\n[; ;pic18f2550.h: 2543: unsigned RB7 :1;\n[; ;pic18f2550.h: 2544: };\n[; ;pic18f2550.h: 2545: struct {\n[; ;pic18f2550.h: 2546: unsigned INT0 :1;\n[; ;pic18f2550.h: 2547: unsigned INT1 :1;\n[; ;pic18f2550.h: 2548: unsigned INT2 :1;\n[; ;pic18f2550.h: 2549: unsigned :2;\n[; ;pic18f2550.h: 2550: unsigned PGM :1;\n[; ;pic18f2550.h: 2551: unsigned PGC :1;\n[; ;pic18f2550.h: 2552: unsigned PGD :1;\n[; ;pic18f2550.h: 2553: };\n[; ;pic18f2550.h: 2554: struct {\n[; ;pic18f2550.h: 2555: unsigned :3;\n[; ;pic18f2550.h: 2556: unsigned CCP2_PA2 :1;\n[; ;pic18f2550.h: 2557: };\n[; ;pic18f2550.h: 2558: } PORTBbits_t;\n[; ;pic18f2550.h: 2559: extern volatile PORTBbits_t PORTBbits @ 0xF81;\n[; ;pic18f2550.h: 2638: extern volatile unsigned char PORTC @ 0xF82;\n\"2640\n[; ;pic18f2550.h: 2640: asm(\"PORTC equ 0F82h\");\n[; <\" PORTC equ 0F82h ;# \">\n[; ;pic18f2550.h: 2643: typedef union {\n[; ;pic18f2550.h: 2644: struct {\n[; ;pic18f2550.h: 2645: unsigned RC0 :1;\n[; ;pic18f2550.h: 2646: unsigned RC1 :1;\n[; ;pic18f2550.h: 2647: unsigned RC2 :1;\n[; ;pic18f2550.h: 2648: unsigned :1;\n[; ;pic18f2550.h: 2649: unsigned RC4 :1;\n[; ;pic18f2550.h: 2650: unsigned RC5 :1;\n[; ;pic18f2550.h: 2651: unsigned RC6 :1;\n[; ;pic18f2550.h: 2652: unsigned RC7 :1;\n[; ;pic18f2550.h: 2653: };\n[; ;pic18f2550.h: 2654: struct {\n[; ;pic18f2550.h: 2655: unsigned T1OSO :1;\n[; ;pic18f2550.h: 2656: unsigned T1OSI :1;\n[; ;pic18f2550.h: 2657: unsigned CCP1 :1;\n[; ;pic18f2550.h: 2658: unsigned :3;\n[; ;pic18f2550.h: 2659: unsigned TX :1;\n[; ;pic18f2550.h: 2660: unsigned RX :1;\n[; ;pic18f2550.h: 2661: };\n[; ;pic18f2550.h: 2662: struct {\n[; ;pic18f2550.h: 2663: unsigned T13CKI :1;\n[; ;pic18f2550.h: 2664: unsigned :1;\n[; ;pic18f2550.h: 2665: unsigned P1A :1;\n[; ;pic18f2550.h: 2666: unsigned :3;\n[; ;pic18f2550.h: 2667: unsigned CK :1;\n[; ;pic18f2550.h: 2668: unsigned DT :1;\n[; ;pic18f2550.h: 2669: };\n[; ;pic18f2550.h: 2670: struct {\n[; ;pic18f2550.h: 2671: unsigned :1;\n[; ;pic18f2550.h: 2672: unsigned CCP2 :1;\n[; ;pic18f2550.h: 2673: };\n[; ;pic18f2550.h: 2674: struct {\n[; ;pic18f2550.h: 2675: unsigned :2;\n[; ;pic18f2550.h: 2676: unsigned PA1 :1;\n[; ;pic18f2550.h: 2677: };\n[; ;pic18f2550.h: 2678: struct {\n[; ;pic18f2550.h: 2679: unsigned :1;\n[; ;pic18f2550.h: 2680: unsigned PA2 :1;\n[; ;pic18f2550.h: 2681: };\n[; ;pic18f2550.h: 2682: struct {\n[; ;pic18f2550.h: 2683: unsigned :3;\n[; ;pic18f2550.h: 2684: unsigned RC3 :1;\n[; ;pic18f2550.h: 2685: };\n[; ;pic18f2550.h: 2686: } PORTCbits_t;\n[; ;pic18f2550.h: 2687: extern volatile PORTCbits_t PORTCbits @ 0xF82;\n[; ;pic18f2550.h: 2791: extern volatile unsigned char PORTE @ 0xF84;\n\"2793\n[; ;pic18f2550.h: 2793: asm(\"PORTE equ 0F84h\");\n[; <\" PORTE equ 0F84h ;# \">\n[; ;pic18f2550.h: 2796: typedef union {\n[; ;pic18f2550.h: 2797: struct {\n[; ;pic18f2550.h: 2798: unsigned :3;\n[; ;pic18f2550.h: 2799: unsigned RE3 :1;\n[; ;pic18f2550.h: 2800: };\n[; ;pic18f2550.h: 2801: struct {\n[; ;pic18f2550.h: 2802: unsigned :2;\n[; ;pic18f2550.h: 2803: unsigned CCP10 :1;\n[; ;pic18f2550.h: 2804: };\n[; ;pic18f2550.h: 2805: struct {\n[; ;pic18f2550.h: 2806: unsigned :7;\n[; ;pic18f2550.h: 2807: unsigned CCP2E :1;\n[; ;pic18f2550.h: 2808: };\n[; ;pic18f2550.h: 2809: struct {\n[; ;pic18f2550.h: 2810: unsigned :6;\n[; ;pic18f2550.h: 2811: unsigned CCP6E :1;\n[; ;pic18f2550.h: 2812: };\n[; ;pic18f2550.h: 2813: struct {\n[; ;pic18f2550.h: 2814: unsigned :5;\n[; ;pic18f2550.h: 2815: unsigned CCP7E :1;\n[; ;pic18f2550.h: 2816: };\n[; ;pic18f2550.h: 2817: struct {\n[; ;pic18f2550.h: 2818: unsigned :4;\n[; ;pic18f2550.h: 2819: unsigned CCP8E :1;\n[; ;pic18f2550.h: 2820: };\n[; ;pic18f2550.h: 2821: struct {\n[; ;pic18f2550.h: 2822: unsigned :3;\n[; ;pic18f2550.h: 2823: unsigned CCP9E :1;\n[; ;pic18f2550.h: 2824: };\n[; ;pic18f2550.h: 2825: struct {\n[; ;pic18f2550.h: 2826: unsigned :2;\n[; ;pic18f2550.h: 2827: unsigned CS :1;\n[; ;pic18f2550.h: 2828: };\n[; ;pic18f2550.h: 2829: struct {\n[; ;pic18f2550.h: 2830: unsigned :7;\n[; ;pic18f2550.h: 2831: unsigned PA2E :1;\n[; ;pic18f2550.h: 2832: };\n[; ;pic18f2550.h: 2833: struct {\n[; ;pic18f2550.h: 2834: unsigned :6;\n[; ;pic18f2550.h: 2835: unsigned PB1E :1;\n[; ;pic18f2550.h: 2836: };\n[; ;pic18f2550.h: 2837: struct {\n[; ;pic18f2550.h: 2838: unsigned :2;\n[; ;pic18f2550.h: 2839: unsigned PB2 :1;\n[; ;pic18f2550.h: 2840: };\n[; ;pic18f2550.h: 2841: struct {\n[; ;pic18f2550.h: 2842: unsigned :4;\n[; ;pic18f2550.h: 2843: unsigned PB3E :1;\n[; ;pic18f2550.h: 2844: };\n[; ;pic18f2550.h: 2845: struct {\n[; ;pic18f2550.h: 2846: unsigned :5;\n[; ;pic18f2550.h: 2847: unsigned PC1E :1;\n[; ;pic18f2550.h: 2848: };\n[; ;pic18f2550.h: 2849: struct {\n[; ;pic18f2550.h: 2850: unsigned :1;\n[; ;pic18f2550.h: 2851: unsigned PC2 :1;\n[; ;pic18f2550.h: 2852: };\n[; ;pic18f2550.h: 2853: struct {\n[; ;pic18f2550.h: 2854: unsigned :3;\n[; ;pic18f2550.h: 2855: unsigned PC3E :1;\n[; ;pic18f2550.h: 2856: };\n[; ;pic18f2550.h: 2857: struct {\n[; ;pic18f2550.h: 2858: unsigned PD2 :1;\n[; ;pic18f2550.h: 2859: };\n[; ;pic18f2550.h: 2860: struct {\n[; ;pic18f2550.h: 2861: unsigned RDE :1;\n[; ;pic18f2550.h: 2862: };\n[; ;pic18f2550.h: 2863: struct {\n[; ;pic18f2550.h: 2864: unsigned RE0 :1;\n[; ;pic18f2550.h: 2865: };\n[; ;pic18f2550.h: 2866: struct {\n[; ;pic18f2550.h: 2867: unsigned :1;\n[; ;pic18f2550.h: 2868: unsigned RE1 :1;\n[; ;pic18f2550.h: 2869: };\n[; ;pic18f2550.h: 2870: struct {\n[; ;pic18f2550.h: 2871: unsigned :2;\n[; ;pic18f2550.h: 2872: unsigned RE2 :1;\n[; ;pic18f2550.h: 2873: };\n[; ;pic18f2550.h: 2874: struct {\n[; ;pic18f2550.h: 2875: unsigned :4;\n[; ;pic18f2550.h: 2876: unsigned RE4 :1;\n[; ;pic18f2550.h: 2877: };\n[; ;pic18f2550.h: 2878: struct {\n[; ;pic18f2550.h: 2879: unsigned :5;\n[; ;pic18f2550.h: 2880: unsigned RE5 :1;\n[; ;pic18f2550.h: 2881: };\n[; ;pic18f2550.h: 2882: struct {\n[; ;pic18f2550.h: 2883: unsigned :6;\n[; ;pic18f2550.h: 2884: unsigned RE6 :1;\n[; ;pic18f2550.h: 2885: };\n[; ;pic18f2550.h: 2886: struct {\n[; ;pic18f2550.h: 2887: unsigned :7;\n[; ;pic18f2550.h: 2888: unsigned RE7 :1;\n[; ;pic18f2550.h: 2889: };\n[; ;pic18f2550.h: 2890: struct {\n[; ;pic18f2550.h: 2891: unsigned :1;\n[; ;pic18f2550.h: 2892: unsigned WRE :1;\n[; ;pic18f2550.h: 2893: };\n[; ;pic18f2550.h: 2894: } PORTEbits_t;\n[; ;pic18f2550.h: 2895: extern volatile PORTEbits_t PORTEbits @ 0xF84;\n[; ;pic18f2550.h: 3024: extern volatile unsigned char LATA @ 0xF89;\n\"3026\n[; ;pic18f2550.h: 3026: asm(\"LATA equ 0F89h\");\n[; <\" LATA equ 0F89h ;# \">\n[; ;pic18f2550.h: 3029: typedef union {\n[; ;pic18f2550.h: 3030: struct {\n[; ;pic18f2550.h: 3031: unsigned LATA0 :1;\n[; ;pic18f2550.h: 3032: unsigned LATA1 :1;\n[; ;pic18f2550.h: 3033: unsigned LATA2 :1;\n[; ;pic18f2550.h: 3034: unsigned LATA3 :1;\n[; ;pic18f2550.h: 3035: unsigned LATA4 :1;\n[; ;pic18f2550.h: 3036: unsigned LATA5 :1;\n[; ;pic18f2550.h: 3037: unsigned LATA6 :1;\n[; ;pic18f2550.h: 3038: };\n[; ;pic18f2550.h: 3039: struct {\n[; ;pic18f2550.h: 3040: unsigned LA0 :1;\n[; ;pic18f2550.h: 3041: };\n[; ;pic18f2550.h: 3042: struct {\n[; ;pic18f2550.h: 3043: unsigned :1;\n[; ;pic18f2550.h: 3044: unsigned LA1 :1;\n[; ;pic18f2550.h: 3045: };\n[; ;pic18f2550.h: 3046: struct {\n[; ;pic18f2550.h: 3047: unsigned :2;\n[; ;pic18f2550.h: 3048: unsigned LA2 :1;\n[; ;pic18f2550.h: 3049: };\n[; ;pic18f2550.h: 3050: struct {\n[; ;pic18f2550.h: 3051: unsigned :3;\n[; ;pic18f2550.h: 3052: unsigned LA3 :1;\n[; ;pic18f2550.h: 3053: };\n[; ;pic18f2550.h: 3054: struct {\n[; ;pic18f2550.h: 3055: unsigned :4;\n[; ;pic18f2550.h: 3056: unsigned LA4 :1;\n[; ;pic18f2550.h: 3057: };\n[; ;pic18f2550.h: 3058: struct {\n[; ;pic18f2550.h: 3059: unsigned :5;\n[; ;pic18f2550.h: 3060: unsigned LA5 :1;\n[; ;pic18f2550.h: 3061: };\n[; ;pic18f2550.h: 3062: struct {\n[; ;pic18f2550.h: 3063: unsigned :6;\n[; ;pic18f2550.h: 3064: unsigned LA6 :1;\n[; ;pic18f2550.h: 3065: };\n[; ;pic18f2550.h: 3066: struct {\n[; ;pic18f2550.h: 3067: unsigned :7;\n[; ;pic18f2550.h: 3068: unsigned LA7 :1;\n[; ;pic18f2550.h: 3069: };\n[; ;pic18f2550.h: 3070: struct {\n[; ;pic18f2550.h: 3071: unsigned :7;\n[; ;pic18f2550.h: 3072: unsigned LATA7 :1;\n[; ;pic18f2550.h: 3073: };\n[; ;pic18f2550.h: 3074: } LATAbits_t;\n[; ;pic18f2550.h: 3075: extern volatile LATAbits_t LATAbits @ 0xF89;\n[; ;pic18f2550.h: 3159: extern volatile unsigned char LATB @ 0xF8A;\n\"3161\n[; ;pic18f2550.h: 3161: asm(\"LATB equ 0F8Ah\");\n[; <\" LATB equ 0F8Ah ;# \">\n[; ;pic18f2550.h: 3164: typedef union {\n[; ;pic18f2550.h: 3165: struct {\n[; ;pic18f2550.h: 3166: unsigned LATB0 :1;\n[; ;pic18f2550.h: 3167: unsigned LATB1 :1;\n[; ;pic18f2550.h: 3168: unsigned LATB2 :1;\n[; ;pic18f2550.h: 3169: unsigned LATB3 :1;\n[; ;pic18f2550.h: 3170: unsigned LATB4 :1;\n[; ;pic18f2550.h: 3171: unsigned LATB5 :1;\n[; ;pic18f2550.h: 3172: unsigned LATB6 :1;\n[; ;pic18f2550.h: 3173: unsigned LATB7 :1;\n[; ;pic18f2550.h: 3174: };\n[; ;pic18f2550.h: 3175: struct {\n[; ;pic18f2550.h: 3176: unsigned LB0 :1;\n[; ;pic18f2550.h: 3177: };\n[; ;pic18f2550.h: 3178: struct {\n[; ;pic18f2550.h: 3179: unsigned :1;\n[; ;pic18f2550.h: 3180: unsigned LB1 :1;\n[; ;pic18f2550.h: 3181: };\n[; ;pic18f2550.h: 3182: struct {\n[; ;pic18f2550.h: 3183: unsigned :2;\n[; ;pic18f2550.h: 3184: unsigned LB2 :1;\n[; ;pic18f2550.h: 3185: };\n[; ;pic18f2550.h: 3186: struct {\n[; ;pic18f2550.h: 3187: unsigned :3;\n[; ;pic18f2550.h: 3188: unsigned LB3 :1;\n[; ;pic18f2550.h: 3189: };\n[; ;pic18f2550.h: 3190: struct {\n[; ;pic18f2550.h: 3191: unsigned :4;\n[; ;pic18f2550.h: 3192: unsigned LB4 :1;\n[; ;pic18f2550.h: 3193: };\n[; ;pic18f2550.h: 3194: struct {\n[; ;pic18f2550.h: 3195: unsigned :5;\n[; ;pic18f2550.h: 3196: unsigned LB5 :1;\n[; ;pic18f2550.h: 3197: };\n[; ;pic18f2550.h: 3198: struct {\n[; ;pic18f2550.h: 3199: unsigned :6;\n[; ;pic18f2550.h: 3200: unsigned LB6 :1;\n[; ;pic18f2550.h: 3201: };\n[; ;pic18f2550.h: 3202: struct {\n[; ;pic18f2550.h: 3203: unsigned :7;\n[; ;pic18f2550.h: 3204: unsigned LB7 :1;\n[; ;pic18f2550.h: 3205: };\n[; ;pic18f2550.h: 3206: } LATBbits_t;\n[; ;pic18f2550.h: 3207: extern volatile LATBbits_t LATBbits @ 0xF8A;\n[; ;pic18f2550.h: 3291: extern volatile unsigned char LATC @ 0xF8B;\n\"3293\n[; ;pic18f2550.h: 3293: asm(\"LATC equ 0F8Bh\");\n[; <\" LATC equ 0F8Bh ;# \">\n[; ;pic18f2550.h: 3296: typedef union {\n[; ;pic18f2550.h: 3297: struct {\n[; ;pic18f2550.h: 3298: unsigned LATC0 :1;\n[; ;pic18f2550.h: 3299: unsigned LATC1 :1;\n[; ;pic18f2550.h: 3300: unsigned LATC2 :1;\n[; ;pic18f2550.h: 3301: unsigned :3;\n[; ;pic18f2550.h: 3302: unsigned LATC6 :1;\n[; ;pic18f2550.h: 3303: unsigned LATC7 :1;\n[; ;pic18f2550.h: 3304: };\n[; ;pic18f2550.h: 3305: struct {\n[; ;pic18f2550.h: 3306: unsigned LC0 :1;\n[; ;pic18f2550.h: 3307: };\n[; ;pic18f2550.h: 3308: struct {\n[; ;pic18f2550.h: 3309: unsigned :1;\n[; ;pic18f2550.h: 3310: unsigned LC1 :1;\n[; ;pic18f2550.h: 3311: };\n[; ;pic18f2550.h: 3312: struct {\n[; ;pic18f2550.h: 3313: unsigned :2;\n[; ;pic18f2550.h: 3314: unsigned LC2 :1;\n[; ;pic18f2550.h: 3315: };\n[; ;pic18f2550.h: 3316: struct {\n[; ;pic18f2550.h: 3317: unsigned :3;\n[; ;pic18f2550.h: 3318: unsigned LC3 :1;\n[; ;pic18f2550.h: 3319: };\n[; ;pic18f2550.h: 3320: struct {\n[; ;pic18f2550.h: 3321: unsigned :4;\n[; ;pic18f2550.h: 3322: unsigned LC4 :1;\n[; ;pic18f2550.h: 3323: };\n[; ;pic18f2550.h: 3324: struct {\n[; ;pic18f2550.h: 3325: unsigned :5;\n[; ;pic18f2550.h: 3326: unsigned LC5 :1;\n[; ;pic18f2550.h: 3327: };\n[; ;pic18f2550.h: 3328: struct {\n[; ;pic18f2550.h: 3329: unsigned :6;\n[; ;pic18f2550.h: 3330: unsigned LC6 :1;\n[; ;pic18f2550.h: 3331: };\n[; ;pic18f2550.h: 3332: struct {\n[; ;pic18f2550.h: 3333: unsigned :7;\n[; ;pic18f2550.h: 3334: unsigned LC7 :1;\n[; ;pic18f2550.h: 3335: };\n[; ;pic18f2550.h: 3336: } LATCbits_t;\n[; ;pic18f2550.h: 3337: extern volatile LATCbits_t LATCbits @ 0xF8B;\n[; ;pic18f2550.h: 3406: extern volatile unsigned char TRISA @ 0xF92;\n\"3408\n[; ;pic18f2550.h: 3408: asm(\"TRISA equ 0F92h\");\n[; <\" TRISA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3411: extern volatile unsigned char DDRA @ 0xF92;\n\"3413\n[; ;pic18f2550.h: 3413: asm(\"DDRA equ 0F92h\");\n[; <\" DDRA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3416: typedef union {\n[; ;pic18f2550.h: 3417: struct {\n[; ;pic18f2550.h: 3418: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3419: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3420: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3421: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3422: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3423: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3424: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3425: };\n[; ;pic18f2550.h: 3426: struct {\n[; ;pic18f2550.h: 3427: unsigned RA0 :1;\n[; ;pic18f2550.h: 3428: unsigned RA1 :1;\n[; ;pic18f2550.h: 3429: unsigned RA2 :1;\n[; ;pic18f2550.h: 3430: unsigned RA3 :1;\n[; ;pic18f2550.h: 3431: unsigned RA4 :1;\n[; ;pic18f2550.h: 3432: unsigned RA5 :1;\n[; ;pic18f2550.h: 3433: unsigned RA6 :1;\n[; ;pic18f2550.h: 3434: };\n[; ;pic18f2550.h: 3435: } TRISAbits_t;\n[; ;pic18f2550.h: 3436: extern volatile TRISAbits_t TRISAbits @ 0xF92;\n[; ;pic18f2550.h: 3509: typedef union {\n[; ;pic18f2550.h: 3510: struct {\n[; ;pic18f2550.h: 3511: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3512: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3513: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3514: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3515: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3516: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3517: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3518: };\n[; ;pic18f2550.h: 3519: struct {\n[; ;pic18f2550.h: 3520: unsigned RA0 :1;\n[; ;pic18f2550.h: 3521: unsigned RA1 :1;\n[; ;pic18f2550.h: 3522: unsigned RA2 :1;\n[; ;pic18f2550.h: 3523: unsigned RA3 :1;\n[; ;pic18f2550.h: 3524: unsigned RA4 :1;\n[; ;pic18f2550.h: 3525: unsigned RA5 :1;\n[; ;pic18f2550.h: 3526: unsigned RA6 :1;\n[; ;pic18f2550.h: 3527: };\n[; ;pic18f2550.h: 3528: } DDRAbits_t;\n[; ;pic18f2550.h: 3529: extern volatile DDRAbits_t DDRAbits @ 0xF92;\n[; ;pic18f2550.h: 3603: extern volatile unsigned char TRISB @ 0xF93;\n\"3605\n[; ;pic18f2550.h: 3605: asm(\"TRISB equ 0F93h\");\n[; <\" TRISB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3608: extern volatile unsigned char DDRB @ 0xF93;\n\"3610\n[; ;pic18f2550.h: 3610: asm(\"DDRB equ 0F93h\");\n[; <\" DDRB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3613: typedef union {\n[; ;pic18f2550.h: 3614: struct {\n[; ;pic18f2550.h: 3615: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3616: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3617: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3618: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3619: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3620: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3621: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3622: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3623: };\n[; ;pic18f2550.h: 3624: struct {\n[; ;pic18f2550.h: 3625: unsigned RB0 :1;\n[; ;pic18f2550.h: 3626: unsigned RB1 :1;\n[; ;pic18f2550.h: 3627: unsigned RB2 :1;\n[; ;pic18f2550.h: 3628: unsigned RB3 :1;\n[; ;pic18f2550.h: 3629: unsigned RB4 :1;\n[; ;pic18f2550.h: 3630: unsigned RB5 :1;\n[; ;pic18f2550.h: 3631: unsigned RB6 :1;\n[; ;pic18f2550.h: 3632: unsigned RB7 :1;\n[; ;pic18f2550.h: 3633: };\n[; ;pic18f2550.h: 3634: } TRISBbits_t;\n[; ;pic18f2550.h: 3635: extern volatile TRISBbits_t TRISBbits @ 0xF93;\n[; ;pic18f2550.h: 3718: typedef union {\n[; ;pic18f2550.h: 3719: struct {\n[; ;pic18f2550.h: 3720: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3721: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3722: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3723: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3724: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3725: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3726: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3727: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3728: };\n[; ;pic18f2550.h: 3729: struct {\n[; ;pic18f2550.h: 3730: unsigned RB0 :1;\n[; ;pic18f2550.h: 3731: unsigned RB1 :1;\n[; ;pic18f2550.h: 3732: unsigned RB2 :1;\n[; ;pic18f2550.h: 3733: unsigned RB3 :1;\n[; ;pic18f2550.h: 3734: unsigned RB4 :1;\n[; ;pic18f2550.h: 3735: unsigned RB5 :1;\n[; ;pic18f2550.h: 3736: unsigned RB6 :1;\n[; ;pic18f2550.h: 3737: unsigned RB7 :1;\n[; ;pic18f2550.h: 3738: };\n[; ;pic18f2550.h: 3739: } DDRBbits_t;\n[; ;pic18f2550.h: 3740: extern volatile DDRBbits_t DDRBbits @ 0xF93;\n[; ;pic18f2550.h: 3824: extern volatile unsigned char TRISC @ 0xF94;\n\"3826\n[; ;pic18f2550.h: 3826: asm(\"TRISC equ 0F94h\");\n[; <\" TRISC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3829: extern volatile unsigned char DDRC @ 0xF94;\n\"3831\n[; ;pic18f2550.h: 3831: asm(\"DDRC equ 0F94h\");\n[; <\" DDRC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3834: typedef union {\n[; ;pic18f2550.h: 3835: struct {\n[; ;pic18f2550.h: 3836: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3837: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3838: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3839: unsigned :3;\n[; ;pic18f2550.h: 3840: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3841: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3842: };\n[; ;pic18f2550.h: 3843: struct {\n[; ;pic18f2550.h: 3844: unsigned RC0 :1;\n[; ;pic18f2550.h: 3845: unsigned RC1 :1;\n[; ;pic18f2550.h: 3846: unsigned RC2 :1;\n[; ;pic18f2550.h: 3847: unsigned :3;\n[; ;pic18f2550.h: 3848: unsigned RC6 :1;\n[; ;pic18f2550.h: 3849: unsigned RC7 :1;\n[; ;pic18f2550.h: 3850: };\n[; ;pic18f2550.h: 3851: struct {\n[; ;pic18f2550.h: 3852: unsigned :3;\n[; ;pic18f2550.h: 3853: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3854: };\n[; ;pic18f2550.h: 3855: } TRISCbits_t;\n[; ;pic18f2550.h: 3856: extern volatile TRISCbits_t TRISCbits @ 0xF94;\n[; ;pic18f2550.h: 3914: typedef union {\n[; ;pic18f2550.h: 3915: struct {\n[; ;pic18f2550.h: 3916: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3917: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3918: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3919: unsigned :3;\n[; ;pic18f2550.h: 3920: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3921: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3922: };\n[; ;pic18f2550.h: 3923: struct {\n[; ;pic18f2550.h: 3924: unsigned RC0 :1;\n[; ;pic18f2550.h: 3925: unsigned RC1 :1;\n[; ;pic18f2550.h: 3926: unsigned RC2 :1;\n[; ;pic18f2550.h: 3927: unsigned :3;\n[; ;pic18f2550.h: 3928: unsigned RC6 :1;\n[; ;pic18f2550.h: 3929: unsigned RC7 :1;\n[; ;pic18f2550.h: 3930: };\n[; ;pic18f2550.h: 3931: struct {\n[; ;pic18f2550.h: 3932: unsigned :3;\n[; ;pic18f2550.h: 3933: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3934: };\n[; ;pic18f2550.h: 3935: } DDRCbits_t;\n[; ;pic18f2550.h: 3936: extern volatile DDRCbits_t DDRCbits @ 0xF94;\n[; ;pic18f2550.h: 3995: extern volatile unsigned char OSCTUNE @ 0xF9B;\n\"3997\n[; ;pic18f2550.h: 3997: asm(\"OSCTUNE equ 0F9Bh\");\n[; <\" OSCTUNE equ 0F9Bh ;# \">\n[; ;pic18f2550.h: 4000: typedef union {\n[; ;pic18f2550.h: 4001: struct {\n[; ;pic18f2550.h: 4002: unsigned TUN :5;\n[; ;pic18f2550.h: 4003: unsigned :2;\n[; ;pic18f2550.h: 4004: unsigned INTSRC :1;\n[; ;pic18f2550.h: 4005: };\n[; ;pic18f2550.h: 4006: struct {\n[; ;pic18f2550.h: 4007: unsigned TUN0 :1;\n[; ;pic18f2550.h: 4008: unsigned TUN1 :1;\n[; ;pic18f2550.h: 4009: unsigned TUN2 :1;\n[; ;pic18f2550.h: 4010: unsigned TUN3 :1;\n[; ;pic18f2550.h: 4011: unsigned TUN4 :1;\n[; ;pic18f2550.h: 4012: };\n[; ;pic18f2550.h: 4013: } OSCTUNEbits_t;\n[; ;pic18f2550.h: 4014: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n[; ;pic18f2550.h: 4053: extern volatile unsigned char PIE1 @ 0xF9D;\n\"4055\n[; ;pic18f2550.h: 4055: asm(\"PIE1 equ 0F9Dh\");\n[; <\" PIE1 equ 0F9Dh ;# \">\n[; ;pic18f2550.h: 4058: typedef union {\n[; ;pic18f2550.h: 4059: struct {\n[; ;pic18f2550.h: 4060: unsigned TMR1IE :1;\n[; ;pic18f2550.h: 4061: unsigned TMR2IE :1;\n[; ;pic18f2550.h: 4062: unsigned CCP1IE :1;\n[; ;pic18f2550.h: 4063: unsigned SSPIE :1;\n[; ;pic18f2550.h: 4064: unsigned TXIE :1;\n[; ;pic18f2550.h: 4065: unsigned RCIE :1;\n[; ;pic18f2550.h: 4066: unsigned ADIE :1;\n[; ;pic18f2550.h: 4067: };\n[; ;pic18f2550.h: 4068: struct {\n[; ;pic18f2550.h: 4069: unsigned :5;\n[; ;pic18f2550.h: 4070: unsigned RC1IE :1;\n[; ;pic18f2550.h: 4071: };\n[; ;pic18f2550.h: 4072: struct {\n[; ;pic18f2550.h: 4073: unsigned :4;\n[; ;pic18f2550.h: 4074: unsigned TX1IE :1;\n[; ;pic18f2550.h: 4075: };\n[; ;pic18f2550.h: 4076: } PIE1bits_t;\n[; ;pic18f2550.h: 4077: extern volatile PIE1bits_t PIE1bits @ 0xF9D;\n[; ;pic18f2550.h: 4126: extern volatile unsigned char PIR1 @ 0xF9E;\n\"4128\n[; ;pic18f2550.h: 4128: asm(\"PIR1 equ 0F9Eh\");\n[; <\" PIR1 equ 0F9Eh ;# \">\n[; ;pic18f2550.h: 4131: typedef union {\n[; ;pic18f2550.h: 4132: struct {\n[; ;pic18f2550.h: 4133: unsigned TMR1IF :1;\n[; ;pic18f2550.h: 4134: unsigned TMR2IF :1;\n[; ;pic18f2550.h: 4135: unsigned CCP1IF :1;\n[; ;pic18f2550.h: 4136: unsigned SSPIF :1;\n[; ;pic18f2550.h: 4137: unsigned TXIF :1;\n[; ;pic18f2550.h: 4138: unsigned RCIF :1;\n[; ;pic18f2550.h: 4139: unsigned ADIF :1;\n[; ;pic18f2550.h: 4140: };\n[; ;pic18f2550.h: 4141: struct {\n[; ;pic18f2550.h: 4142: unsigned :5;\n[; ;pic18f2550.h: 4143: unsigned RC1IF :1;\n[; ;pic18f2550.h: 4144: };\n[; ;pic18f2550.h: 4145: struct {\n[; ;pic18f2550.h: 4146: unsigned :4;\n[; ;pic18f2550.h: 4147: unsigned TX1IF :1;\n[; ;pic18f2550.h: 4148: };\n[; ;pic18f2550.h: 4149: } PIR1bits_t;\n[; ;pic18f2550.h: 4150: extern volatile PIR1bits_t PIR1bits @ 0xF9E;\n[; ;pic18f2550.h: 4199: extern volatile unsigned char IPR1 @ 0xF9F;\n\"4201\n[; ;pic18f2550.h: 4201: asm(\"IPR1 equ 0F9Fh\");\n[; <\" IPR1 equ 0F9Fh ;# \">\n[; ;pic18f2550.h: 4204: typedef union {\n[; ;pic18f2550.h: 4205: struct {\n[; ;pic18f2550.h: 4206: unsigned TMR1IP :1;\n[; ;pic18f2550.h: 4207: unsigned TMR2IP :1;\n[; ;pic18f2550.h: 4208: unsigned CCP1IP :1;\n[; ;pic18f2550.h: 4209: unsigned SSPIP :1;\n[; ;pic18f2550.h: 4210: unsigned TXIP :1;\n[; ;pic18f2550.h: 4211: unsigned RCIP :1;\n[; ;pic18f2550.h: 4212: unsigned ADIP :1;\n[; ;pic18f2550.h: 4213: };\n[; ;pic18f2550.h: 4214: struct {\n[; ;pic18f2550.h: 4215: unsigned :5;\n[; ;pic18f2550.h: 4216: unsigned RC1IP :1;\n[; ;pic18f2550.h: 4217: };\n[; ;pic18f2550.h: 4218: struct {\n[; ;pic18f2550.h: 4219: unsigned :4;\n[; ;pic18f2550.h: 4220: unsigned TX1IP :1;\n[; ;pic18f2550.h: 4221: };\n[; ;pic18f2550.h: 4222: } IPR1bits_t;\n[; ;pic18f2550.h: 4223: extern volatile IPR1bits_t IPR1bits @ 0xF9F;\n[; ;pic18f2550.h: 4272: extern volatile unsigned char PIE2 @ 0xFA0;\n\"4274\n[; ;pic18f2550.h: 4274: asm(\"PIE2 equ 0FA0h\");\n[; <\" PIE2 equ 0FA0h ;# \">\n[; ;pic18f2550.h: 4277: typedef union {\n[; ;pic18f2550.h: 4278: struct {\n[; ;pic18f2550.h: 4279: unsigned CCP2IE :1;\n[; ;pic18f2550.h: 4280: unsigned TMR3IE :1;\n[; ;pic18f2550.h: 4281: unsigned HLVDIE :1;\n[; ;pic18f2550.h: 4282: unsigned BCLIE :1;\n[; ;pic18f2550.h: 4283: unsigned EEIE :1;\n[; ;pic18f2550.h: 4284: unsigned USBIE :1;\n[; ;pic18f2550.h: 4285: unsigned CMIE :1;\n[; ;pic18f2550.h: 4286: unsigned OSCFIE :1;\n[; ;pic18f2550.h: 4287: };\n[; ;pic18f2550.h: 4288: struct {\n[; ;pic18f2550.h: 4289: unsigned :2;\n[; ;pic18f2550.h: 4290: unsigned LVDIE :1;\n[; ;pic18f2550.h: 4291: };\n[; ;pic18f2550.h: 4292: } PIE2bits_t;\n[; ;pic18f2550.h: 4293: extern volatile PIE2bits_t PIE2bits @ 0xFA0;\n[; ;pic18f2550.h: 4342: extern volatile unsigned char PIR2 @ 0xFA1;\n\"4344\n[; ;pic18f2550.h: 4344: asm(\"PIR2 equ 0FA1h\");\n[; <\" PIR2 equ 0FA1h ;# \">\n[; ;pic18f2550.h: 4347: typedef union {\n[; ;pic18f2550.h: 4348: struct {\n[; ;pic18f2550.h: 4349: unsigned CCP2IF :1;\n[; ;pic18f2550.h: 4350: unsigned TMR3IF :1;\n[; ;pic18f2550.h: 4351: unsigned HLVDIF :1;\n[; ;pic18f2550.h: 4352: unsigned BCLIF :1;\n[; ;pic18f2550.h: 4353: unsigned EEIF :1;\n[; ;pic18f2550.h: 4354: unsigned USBIF :1;\n[; ;pic18f2550.h: 4355: unsigned CMIF :1;\n[; ;pic18f2550.h: 4356: unsigned OSCFIF :1;\n[; ;pic18f2550.h: 4357: };\n[; ;pic18f2550.h: 4358: struct {\n[; ;pic18f2550.h: 4359: unsigned :2;\n[; ;pic18f2550.h: 4360: unsigned LVDIF :1;\n[; ;pic18f2550.h: 4361: };\n[; ;pic18f2550.h: 4362: } PIR2bits_t;\n[; ;pic18f2550.h: 4363: extern volatile PIR2bits_t PIR2bits @ 0xFA1;\n[; ;pic18f2550.h: 4412: extern volatile unsigned char IPR2 @ 0xFA2;\n\"4414\n[; ;pic18f2550.h: 4414: asm(\"IPR2 equ 0FA2h\");\n[; <\" IPR2 equ 0FA2h ;# \">\n[; ;pic18f2550.h: 4417: typedef union {\n[; ;pic18f2550.h: 4418: struct {\n[; ;pic18f2550.h: 4419: unsigned CCP2IP :1;\n[; ;pic18f2550.h: 4420: unsigned TMR3IP :1;\n[; ;pic18f2550.h: 4421: unsigned HLVDIP :1;\n[; ;pic18f2550.h: 4422: unsigned BCLIP :1;\n[; ;pic18f2550.h: 4423: unsigned EEIP :1;\n[; ;pic18f2550.h: 4424: unsigned USBIP :1;\n[; ;pic18f2550.h: 4425: unsigned CMIP :1;\n[; ;pic18f2550.h: 4426: unsigned OSCFIP :1;\n[; ;pic18f2550.h: 4427: };\n[; ;pic18f2550.h: 4428: struct {\n[; ;pic18f2550.h: 4429: unsigned :2;\n[; ;pic18f2550.h: 4430: unsigned LVDIP :1;\n[; ;pic18f2550.h: 4431: };\n[; ;pic18f2550.h: 4432: } IPR2bits_t;\n[; ;pic18f2550.h: 4433: extern volatile IPR2bits_t IPR2bits @ 0xFA2;\n[; ;pic18f2550.h: 4482: extern volatile unsigned char EECON1 @ 0xFA6;\n\"4484\n[; ;pic18f2550.h: 4484: asm(\"EECON1 equ 0FA6h\");\n[; <\" EECON1 equ 0FA6h ;# \">\n[; ;pic18f2550.h: 4487: typedef union {\n[; ;pic18f2550.h: 4488: struct {\n[; ;pic18f2550.h: 4489: unsigned RD :1;\n[; ;pic18f2550.h: 4490: unsigned WR :1;\n[; ;pic18f2550.h: 4491: unsigned WREN :1;\n[; ;pic18f2550.h: 4492: unsigned WRERR :1;\n[; ;pic18f2550.h: 4493: unsigned FREE :1;\n[; ;pic18f2550.h: 4494: unsigned :1;\n[; ;pic18f2550.h: 4495: unsigned CFGS :1;\n[; ;pic18f2550.h: 4496: unsigned EEPGD :1;\n[; ;pic18f2550.h: 4497: };\n[; ;pic18f2550.h: 4498: struct {\n[; ;pic18f2550.h: 4499: unsigned :6;\n[; ;pic18f2550.h: 4500: unsigned EEFS :1;\n[; ;pic18f2550.h: 4501: };\n[; ;pic18f2550.h: 4502: } EECON1bits_t;\n[; ;pic18f2550.h: 4503: extern volatile EECON1bits_t EECON1bits @ 0xFA6;\n[; ;pic18f2550.h: 4547: extern volatile unsigned char EECON2 @ 0xFA7;\n\"4549\n[; ;pic18f2550.h: 4549: asm(\"EECON2 equ 0FA7h\");\n[; <\" EECON2 equ 0FA7h ;# \">\n[; ;pic18f2550.h: 4553: extern volatile unsigned char EEDATA @ 0xFA8;\n\"4555\n[; ;pic18f2550.h: 4555: asm(\"EEDATA equ 0FA8h\");\n[; <\" EEDATA equ 0FA8h ;# \">\n[; ;pic18f2550.h: 4559: extern volatile unsigned char EEADR @ 0xFA9;\n\"4561\n[; ;pic18f2550.h: 4561: asm(\"EEADR equ 0FA9h\");\n[; <\" EEADR equ 0FA9h ;# \">\n[; ;pic18f2550.h: 4565: extern volatile unsigned char RCSTA @ 0xFAB;\n\"4567\n[; ;pic18f2550.h: 4567: asm(\"RCSTA equ 0FABh\");\n[; <\" RCSTA equ 0FABh ;# \">\n[; ;pic18f2550.h: 4570: extern volatile unsigned char RCSTA1 @ 0xFAB;\n\"4572\n[; ;pic18f2550.h: 4572: asm(\"RCSTA1 equ 0FABh\");\n[; <\" RCSTA1 equ 0FABh ;# \">\n[; ;pic18f2550.h: 4575: typedef union {\n[; ;pic18f2550.h: 4576: struct {\n[; ;pic18f2550.h: 4577: unsigned RX9D :1;\n[; ;pic18f2550.h: 4578: unsigned OERR :1;\n[; ;pic18f2550.h: 4579: unsigned FERR :1;\n[; ;pic18f2550.h: 4580: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4581: unsigned CREN :1;\n[; ;pic18f2550.h: 4582: unsigned SREN :1;\n[; ;pic18f2550.h: 4583: unsigned RX9 :1;\n[; ;pic18f2550.h: 4584: unsigned SPEN :1;\n[; ;pic18f2550.h: 4585: };\n[; ;pic18f2550.h: 4586: struct {\n[; ;pic18f2550.h: 4587: unsigned :3;\n[; ;pic18f2550.h: 4588: unsigned ADEN :1;\n[; ;pic18f2550.h: 4589: };\n[; ;pic18f2550.h: 4590: struct {\n[; ;pic18f2550.h: 4591: unsigned :5;\n[; ;pic18f2550.h: 4592: unsigned SRENA :1;\n[; ;pic18f2550.h: 4593: };\n[; ;pic18f2550.h: 4594: } RCSTAbits_t;\n[; ;pic18f2550.h: 4595: extern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n[; ;pic18f2550.h: 4648: typedef union {\n[; ;pic18f2550.h: 4649: struct {\n[; ;pic18f2550.h: 4650: unsigned RX9D :1;\n[; ;pic18f2550.h: 4651: unsigned OERR :1;\n[; ;pic18f2550.h: 4652: unsigned FERR :1;\n[; ;pic18f2550.h: 4653: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4654: unsigned CREN :1;\n[; ;pic18f2550.h: 4655: unsigned SREN :1;\n[; ;pic18f2550.h: 4656: unsigned RX9 :1;\n[; ;pic18f2550.h: 4657: unsigned SPEN :1;\n[; ;pic18f2550.h: 4658: };\n[; ;pic18f2550.h: 4659: struct {\n[; ;pic18f2550.h: 4660: unsigned :3;\n[; ;pic18f2550.h: 4661: unsigned ADEN :1;\n[; ;pic18f2550.h: 4662: };\n[; ;pic18f2550.h: 4663: struct {\n[; ;pic18f2550.h: 4664: unsigned :5;\n[; ;pic18f2550.h: 4665: unsigned SRENA :1;\n[; ;pic18f2550.h: 4666: };\n[; ;pic18f2550.h: 4667: } RCSTA1bits_t;\n[; ;pic18f2550.h: 4668: extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n[; ;pic18f2550.h: 4722: extern volatile unsigned char TXSTA @ 0xFAC;\n\"4724\n[; ;pic18f2550.h: 4724: asm(\"TXSTA equ 0FACh\");\n[; <\" TXSTA equ 0FACh ;# \">\n[; ;pic18f2550.h: 4727: extern volatile unsigned char TXSTA1 @ 0xFAC;\n\"4729\n[; ;pic18f2550.h: 4729: asm(\"TXSTA1 equ 0FACh\");\n[; <\" TXSTA1 equ 0FACh ;# \">\n[; ;pic18f2550.h: 4732: typedef union {\n[; ;pic18f2550.h: 4733: struct {\n[; ;pic18f2550.h: 4734: unsigned TX9D :1;\n[; ;pic18f2550.h: 4735: unsigned TRMT :1;\n[; ;pic18f2550.h: 4736: unsigned BRGH :1;\n[; ;pic18f2550.h: 4737: unsigned SENDB :1;\n[; ;pic18f2550.h: 4738: unsigned SYNC :1;\n[; ;pic18f2550.h: 4739: unsigned TXEN :1;\n[; ;pic18f2550.h: 4740: unsigned TX9 :1;\n[; ;pic18f2550.h: 4741: unsigned CSRC :1;\n[; ;pic18f2550.h: 4742: };\n[; ;pic18f2550.h: 4743: struct {\n[; ;pic18f2550.h: 4744: unsigned :2;\n[; ;pic18f2550.h: 4745: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4746: };\n[; ;pic18f2550.h: 4747: struct {\n[; ;pic18f2550.h: 4748: unsigned :7;\n[; ;pic18f2550.h: 4749: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4750: };\n[; ;pic18f2550.h: 4751: struct {\n[; ;pic18f2550.h: 4752: unsigned :3;\n[; ;pic18f2550.h: 4753: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4754: };\n[; ;pic18f2550.h: 4755: struct {\n[; ;pic18f2550.h: 4756: unsigned :4;\n[; ;pic18f2550.h: 4757: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4758: };\n[; ;pic18f2550.h: 4759: struct {\n[; ;pic18f2550.h: 4760: unsigned :1;\n[; ;pic18f2550.h: 4761: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4762: };\n[; ;pic18f2550.h: 4763: struct {\n[; ;pic18f2550.h: 4764: unsigned :6;\n[; ;pic18f2550.h: 4765: unsigned TX91 :1;\n[; ;pic18f2550.h: 4766: };\n[; ;pic18f2550.h: 4767: struct {\n[; ;pic18f2550.h: 4768: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4769: };\n[; ;pic18f2550.h: 4770: struct {\n[; ;pic18f2550.h: 4771: unsigned :5;\n[; ;pic18f2550.h: 4772: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4773: };\n[; ;pic18f2550.h: 4774: } TXSTAbits_t;\n[; ;pic18f2550.h: 4775: extern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n[; ;pic18f2550.h: 4858: typedef union {\n[; ;pic18f2550.h: 4859: struct {\n[; ;pic18f2550.h: 4860: unsigned TX9D :1;\n[; ;pic18f2550.h: 4861: unsigned TRMT :1;\n[; ;pic18f2550.h: 4862: unsigned BRGH :1;\n[; ;pic18f2550.h: 4863: unsigned SENDB :1;\n[; ;pic18f2550.h: 4864: unsigned SYNC :1;\n[; ;pic18f2550.h: 4865: unsigned TXEN :1;\n[; ;pic18f2550.h: 4866: unsigned TX9 :1;\n[; ;pic18f2550.h: 4867: unsigned CSRC :1;\n[; ;pic18f2550.h: 4868: };\n[; ;pic18f2550.h: 4869: struct {\n[; ;pic18f2550.h: 4870: unsigned :2;\n[; ;pic18f2550.h: 4871: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4872: };\n[; ;pic18f2550.h: 4873: struct {\n[; ;pic18f2550.h: 4874: unsigned :7;\n[; ;pic18f2550.h: 4875: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4876: };\n[; ;pic18f2550.h: 4877: struct {\n[; ;pic18f2550.h: 4878: unsigned :3;\n[; ;pic18f2550.h: 4879: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4880: };\n[; ;pic18f2550.h: 4881: struct {\n[; ;pic18f2550.h: 4882: unsigned :4;\n[; ;pic18f2550.h: 4883: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4884: };\n[; ;pic18f2550.h: 4885: struct {\n[; ;pic18f2550.h: 4886: unsigned :1;\n[; ;pic18f2550.h: 4887: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4888: };\n[; ;pic18f2550.h: 4889: struct {\n[; ;pic18f2550.h: 4890: unsigned :6;\n[; ;pic18f2550.h: 4891: unsigned TX91 :1;\n[; ;pic18f2550.h: 4892: };\n[; ;pic18f2550.h: 4893: struct {\n[; ;pic18f2550.h: 4894: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4895: };\n[; ;pic18f2550.h: 4896: struct {\n[; ;pic18f2550.h: 4897: unsigned :5;\n[; ;pic18f2550.h: 4898: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4899: };\n[; ;pic18f2550.h: 4900: } TXSTA1bits_t;\n[; ;pic18f2550.h: 4901: extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n[; ;pic18f2550.h: 4985: extern volatile unsigned char TXREG @ 0xFAD;\n\"4987\n[; ;pic18f2550.h: 4987: asm(\"TXREG equ 0FADh\");\n[; <\" TXREG equ 0FADh ;# \">\n[; ;pic18f2550.h: 4990: extern volatile unsigned char TXREG1 @ 0xFAD;\n\"4992\n[; ;pic18f2550.h: 4992: asm(\"TXREG1 equ 0FADh\");\n[; <\" TXREG1 equ 0FADh ;# \">\n[; ;pic18f2550.h: 4996: extern volatile unsigned char RCREG @ 0xFAE;\n\"4998\n[; ;pic18f2550.h: 4998: asm(\"RCREG equ 0FAEh\");\n[; <\" RCREG equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5001: extern volatile unsigned char RCREG1 @ 0xFAE;\n\"5003\n[; ;pic18f2550.h: 5003: asm(\"RCREG1 equ 0FAEh\");\n[; <\" RCREG1 equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5007: extern volatile unsigned char SPBRG @ 0xFAF;\n\"5009\n[; ;pic18f2550.h: 5009: asm(\"SPBRG equ 0FAFh\");\n[; <\" SPBRG equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5012: extern volatile unsigned char SPBRG1 @ 0xFAF;\n\"5014\n[; ;pic18f2550.h: 5014: asm(\"SPBRG1 equ 0FAFh\");\n[; <\" SPBRG1 equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5018: extern volatile unsigned char SPBRGH @ 0xFB0;\n\"5020\n[; ;pic18f2550.h: 5020: asm(\"SPBRGH equ 0FB0h\");\n[; <\" SPBRGH equ 0FB0h ;# \">\n[; ;pic18f2550.h: 5024: extern volatile unsigned char T3CON @ 0xFB1;\n\"5026\n[; ;pic18f2550.h: 5026: asm(\"T3CON equ 0FB1h\");\n[; <\" T3CON equ 0FB1h ;# \">\n[; ;pic18f2550.h: 5029: typedef union {\n[; ;pic18f2550.h: 5030: struct {\n[; ;pic18f2550.h: 5031: unsigned :2;\n[; ;pic18f2550.h: 5032: unsigned NOT_T3SYNC :1;\n[; ;pic18f2550.h: 5033: };\n[; ;pic18f2550.h: 5034: struct {\n[; ;pic18f2550.h: 5035: unsigned TMR3ON :1;\n[; ;pic18f2550.h: 5036: unsigned TMR3CS :1;\n[; ;pic18f2550.h: 5037: unsigned nT3SYNC :1;\n[; ;pic18f2550.h: 5038: unsigned T3CCP1 :1;\n[; ;pic18f2550.h: 5039: unsigned T3CKPS :2;\n[; ;pic18f2550.h: 5040: unsigned T3CCP2 :1;\n[; ;pic18f2550.h: 5041: unsigned RD16 :1;\n[; ;pic18f2550.h: 5042: };\n[; ;pic18f2550.h: 5043: struct {\n[; ;pic18f2550.h: 5044: unsigned :2;\n[; ;pic18f2550.h: 5045: unsigned T3SYNC :1;\n[; ;pic18f2550.h: 5046: unsigned :1;\n[; ;pic18f2550.h: 5047: unsigned T3CKPS0 :1;\n[; ;pic18f2550.h: 5048: unsigned T3CKPS1 :1;\n[; ;pic18f2550.h: 5049: };\n[; ;pic18f2550.h: 5050: struct {\n[; ;pic18f2550.h: 5051: unsigned :2;\n[; ;pic18f2550.h: 5052: unsigned T3NSYNC :1;\n[; ;pic18f2550.h: 5053: };\n[; ;pic18f2550.h: 5054: struct {\n[; ;pic18f2550.h: 5055: unsigned :7;\n[; ;pic18f2550.h: 5056: unsigned RD163 :1;\n[; ;pic18f2550.h: 5057: };\n[; ;pic18f2550.h: 5058: struct {\n[; ;pic18f2550.h: 5059: unsigned :3;\n[; ;pic18f2550.h: 5060: unsigned SOSCEN3 :1;\n[; ;pic18f2550.h: 5061: };\n[; ;pic18f2550.h: 5062: struct {\n[; ;pic18f2550.h: 5063: unsigned :7;\n[; ;pic18f2550.h: 5064: unsigned T3RD16 :1;\n[; ;pic18f2550.h: 5065: };\n[; ;pic18f2550.h: 5066: } T3CONbits_t;\n[; ;pic18f2550.h: 5067: extern volatile T3CONbits_t T3CONbits @ 0xFB1;\n[; ;pic18f2550.h: 5146: extern volatile unsigned short TMR3 @ 0xFB2;\n\"5148\n[; ;pic18f2550.h: 5148: asm(\"TMR3 equ 0FB2h\");\n[; <\" TMR3 equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5152: extern volatile unsigned char TMR3L @ 0xFB2;\n\"5154\n[; ;pic18f2550.h: 5154: asm(\"TMR3L equ 0FB2h\");\n[; <\" TMR3L equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5158: extern volatile unsigned char TMR3H @ 0xFB3;\n\"5160\n[; ;pic18f2550.h: 5160: asm(\"TMR3H equ 0FB3h\");\n[; <\" TMR3H equ 0FB3h ;# \">\n[; ;pic18f2550.h: 5164: extern volatile unsigned char CMCON @ 0xFB4;\n\"5166\n[; ;pic18f2550.h: 5166: asm(\"CMCON equ 0FB4h\");\n[; <\" CMCON equ 0FB4h ;# \">\n[; ;pic18f2550.h: 5169: typedef union {\n[; ;pic18f2550.h: 5170: struct {\n[; ;pic18f2550.h: 5171: unsigned CM :3;\n[; ;pic18f2550.h: 5172: unsigned CIS :1;\n[; ;pic18f2550.h: 5173: unsigned C1INV :1;\n[; ;pic18f2550.h: 5174: unsigned C2INV :1;\n[; ;pic18f2550.h: 5175: unsigned C1OUT :1;\n[; ;pic18f2550.h: 5176: unsigned C2OUT :1;\n[; ;pic18f2550.h: 5177: };\n[; ;pic18f2550.h: 5178: struct {\n[; ;pic18f2550.h: 5179: unsigned CM0 :1;\n[; ;pic18f2550.h: 5180: unsigned CM1 :1;\n[; ;pic18f2550.h: 5181: unsigned CM2 :1;\n[; ;pic18f2550.h: 5182: };\n[; ;pic18f2550.h: 5183: struct {\n[; ;pic18f2550.h: 5184: unsigned CMEN0 :1;\n[; ;pic18f2550.h: 5185: };\n[; ;pic18f2550.h: 5186: struct {\n[; ;pic18f2550.h: 5187: unsigned :1;\n[; ;pic18f2550.h: 5188: unsigned CMEN1 :1;\n[; ;pic18f2550.h: 5189: };\n[; ;pic18f2550.h: 5190: struct {\n[; ;pic18f2550.h: 5191: unsigned :2;\n[; ;pic18f2550.h: 5192: unsigned CMEN2 :1;\n[; ;pic18f2550.h: 5193: };\n[; ;pic18f2550.h: 5194: } CMCONbits_t;\n[; ;pic18f2550.h: 5195: extern volatile CMCONbits_t CMCONbits @ 0xFB4;\n[; ;pic18f2550.h: 5259: extern volatile unsigned char CVRCON @ 0xFB5;\n\"5261\n[; ;pic18f2550.h: 5261: asm(\"CVRCON equ 0FB5h\");\n[; <\" CVRCON equ 0FB5h ;# \">\n[; ;pic18f2550.h: 5264: typedef union {\n[; ;pic18f2550.h: 5265: struct {\n[; ;pic18f2550.h: 5266: unsigned CVR :4;\n[; ;pic18f2550.h: 5267: unsigned CVRSS :1;\n[; ;pic18f2550.h: 5268: unsigned CVRR :1;\n[; ;pic18f2550.h: 5269: unsigned CVROE :1;\n[; ;pic18f2550.h: 5270: unsigned CVREN :1;\n[; ;pic18f2550.h: 5271: };\n[; ;pic18f2550.h: 5272: struct {\n[; ;pic18f2550.h: 5273: unsigned CVR0 :1;\n[; ;pic18f2550.h: 5274: unsigned CVR1 :1;\n[; ;pic18f2550.h: 5275: unsigned CVR2 :1;\n[; ;pic18f2550.h: 5276: unsigned CVR3 :1;\n[; ;pic18f2550.h: 5277: unsigned CVREF :1;\n[; ;pic18f2550.h: 5278: };\n[; ;pic18f2550.h: 5279: struct {\n[; ;pic18f2550.h: 5280: unsigned :6;\n[; ;pic18f2550.h: 5281: unsigned CVROEN :1;\n[; ;pic18f2550.h: 5282: };\n[; ;pic18f2550.h: 5283: } CVRCONbits_t;\n[; ;pic18f2550.h: 5284: extern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n[; ;pic18f2550.h: 5343: extern volatile unsigned char ECCP1AS @ 0xFB6;\n\"5345\n[; ;pic18f2550.h: 5345: asm(\"ECCP1AS equ 0FB6h\");\n[; <\" ECCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5348: extern volatile unsigned char CCP1AS @ 0xFB6;\n\"5350\n[; ;pic18f2550.h: 5350: asm(\"CCP1AS equ 0FB6h\");\n[; <\" CCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5353: typedef union {\n[; ;pic18f2550.h: 5354: struct {\n[; ;pic18f2550.h: 5355: unsigned :2;\n[; ;pic18f2550.h: 5356: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5357: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5358: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5359: };\n[; ;pic18f2550.h: 5360: struct {\n[; ;pic18f2550.h: 5361: unsigned :2;\n[; ;pic18f2550.h: 5362: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5363: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5364: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5365: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5366: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5367: };\n[; ;pic18f2550.h: 5368: } ECCP1ASbits_t;\n[; ;pic18f2550.h: 5369: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5412: typedef union {\n[; ;pic18f2550.h: 5413: struct {\n[; ;pic18f2550.h: 5414: unsigned :2;\n[; ;pic18f2550.h: 5415: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5416: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5417: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5418: };\n[; ;pic18f2550.h: 5419: struct {\n[; ;pic18f2550.h: 5420: unsigned :2;\n[; ;pic18f2550.h: 5421: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5422: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5423: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5424: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5425: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5426: };\n[; ;pic18f2550.h: 5427: } CCP1ASbits_t;\n[; ;pic18f2550.h: 5428: extern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5472: extern volatile unsigned char ECCP1DEL @ 0xFB7;\n\"5474\n[; ;pic18f2550.h: 5474: asm(\"ECCP1DEL equ 0FB7h\");\n[; <\" ECCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5477: extern volatile unsigned char CCP1DEL @ 0xFB7;\n\"5479\n[; ;pic18f2550.h: 5479: asm(\"CCP1DEL equ 0FB7h\");\n[; <\" CCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5482: typedef union {\n[; ;pic18f2550.h: 5483: struct {\n[; ;pic18f2550.h: 5484: unsigned :7;\n[; ;pic18f2550.h: 5485: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5486: };\n[; ;pic18f2550.h: 5487: } ECCP1DELbits_t;\n[; ;pic18f2550.h: 5488: extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5496: typedef union {\n[; ;pic18f2550.h: 5497: struct {\n[; ;pic18f2550.h: 5498: unsigned :7;\n[; ;pic18f2550.h: 5499: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5500: };\n[; ;pic18f2550.h: 5501: } CCP1DELbits_t;\n[; ;pic18f2550.h: 5502: extern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5511: extern volatile unsigned char BAUDCON @ 0xFB8;\n\"5513\n[; ;pic18f2550.h: 5513: asm(\"BAUDCON equ 0FB8h\");\n[; <\" BAUDCON equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5516: extern volatile unsigned char BAUDCTL @ 0xFB8;\n\"5518\n[; ;pic18f2550.h: 5518: asm(\"BAUDCTL equ 0FB8h\");\n[; <\" BAUDCTL equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5521: typedef union {\n[; ;pic18f2550.h: 5522: struct {\n[; ;pic18f2550.h: 5523: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5524: unsigned WUE :1;\n[; ;pic18f2550.h: 5525: unsigned :1;\n[; ;pic18f2550.h: 5526: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5527: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5528: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5529: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5530: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5531: };\n[; ;pic18f2550.h: 5532: struct {\n[; ;pic18f2550.h: 5533: unsigned :4;\n[; ;pic18f2550.h: 5534: unsigned SCKP :1;\n[; ;pic18f2550.h: 5535: unsigned :1;\n[; ;pic18f2550.h: 5536: unsigned RCMT :1;\n[; ;pic18f2550.h: 5537: };\n[; ;pic18f2550.h: 5538: struct {\n[; ;pic18f2550.h: 5539: unsigned :5;\n[; ;pic18f2550.h: 5540: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5541: };\n[; ;pic18f2550.h: 5542: struct {\n[; ;pic18f2550.h: 5543: unsigned :1;\n[; ;pic18f2550.h: 5544: unsigned W4E :1;\n[; ;pic18f2550.h: 5545: };\n[; ;pic18f2550.h: 5546: } BAUDCONbits_t;\n[; ;pic18f2550.h: 5547: extern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n[; ;pic18f2550.h: 5605: typedef union {\n[; ;pic18f2550.h: 5606: struct {\n[; ;pic18f2550.h: 5607: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5608: unsigned WUE :1;\n[; ;pic18f2550.h: 5609: unsigned :1;\n[; ;pic18f2550.h: 5610: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5611: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5612: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5613: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5614: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5615: };\n[; ;pic18f2550.h: 5616: struct {\n[; ;pic18f2550.h: 5617: unsigned :4;\n[; ;pic18f2550.h: 5618: unsigned SCKP :1;\n[; ;pic18f2550.h: 5619: unsigned :1;\n[; ;pic18f2550.h: 5620: unsigned RCMT :1;\n[; ;pic18f2550.h: 5621: };\n[; ;pic18f2550.h: 5622: struct {\n[; ;pic18f2550.h: 5623: unsigned :5;\n[; ;pic18f2550.h: 5624: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5625: };\n[; ;pic18f2550.h: 5626: struct {\n[; ;pic18f2550.h: 5627: unsigned :1;\n[; ;pic18f2550.h: 5628: unsigned W4E :1;\n[; ;pic18f2550.h: 5629: };\n[; ;pic18f2550.h: 5630: } BAUDCTLbits_t;\n[; ;pic18f2550.h: 5631: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n[; ;pic18f2550.h: 5690: extern volatile unsigned char CCP2CON @ 0xFBA;\n\"5692\n[; ;pic18f2550.h: 5692: asm(\"CCP2CON equ 0FBAh\");\n[; <\" CCP2CON equ 0FBAh ;# \">\n[; ;pic18f2550.h: 5695: typedef union {\n[; ;pic18f2550.h: 5696: struct {\n[; ;pic18f2550.h: 5697: unsigned CCP2M :4;\n[; ;pic18f2550.h: 5698: unsigned DC2B :2;\n[; ;pic18f2550.h: 5699: };\n[; ;pic18f2550.h: 5700: struct {\n[; ;pic18f2550.h: 5701: unsigned CCP2M0 :1;\n[; ;pic18f2550.h: 5702: unsigned CCP2M1 :1;\n[; ;pic18f2550.h: 5703: unsigned CCP2M2 :1;\n[; ;pic18f2550.h: 5704: unsigned CCP2M3 :1;\n[; ;pic18f2550.h: 5705: unsigned DC2B0 :1;\n[; ;pic18f2550.h: 5706: unsigned DC2B1 :1;\n[; ;pic18f2550.h: 5707: };\n[; ;pic18f2550.h: 5708: } CCP2CONbits_t;\n[; ;pic18f2550.h: 5709: extern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n[; ;pic18f2550.h: 5753: extern volatile unsigned short CCPR2 @ 0xFBB;\n\"5755\n[; ;pic18f2550.h: 5755: asm(\"CCPR2 equ 0FBBh\");\n[; <\" CCPR2 equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5759: extern volatile unsigned char CCPR2L @ 0xFBB;\n\"5761\n[; ;pic18f2550.h: 5761: asm(\"CCPR2L equ 0FBBh\");\n[; <\" CCPR2L equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5765: extern volatile unsigned char CCPR2H @ 0xFBC;\n\"5767\n[; ;pic18f2550.h: 5767: asm(\"CCPR2H equ 0FBCh\");\n[; <\" CCPR2H equ 0FBCh ;# \">\n[; ;pic18f2550.h: 5771: extern volatile unsigned char CCP1CON @ 0xFBD;\n\"5773\n[; ;pic18f2550.h: 5773: asm(\"CCP1CON equ 0FBDh\");\n[; <\" CCP1CON equ 0FBDh ;# \">\n[; ;pic18f2550.h: 5776: typedef union {\n[; ;pic18f2550.h: 5777: struct {\n[; ;pic18f2550.h: 5778: unsigned CCP1M :4;\n[; ;pic18f2550.h: 5779: unsigned DC1B :2;\n[; ;pic18f2550.h: 5780: };\n[; ;pic18f2550.h: 5781: struct {\n[; ;pic18f2550.h: 5782: unsigned CCP1M0 :1;\n[; ;pic18f2550.h: 5783: unsigned CCP1M1 :1;\n[; ;pic18f2550.h: 5784: unsigned CCP1M2 :1;\n[; ;pic18f2550.h: 5785: unsigned CCP1M3 :1;\n[; ;pic18f2550.h: 5786: unsigned DC1B0 :1;\n[; ;pic18f2550.h: 5787: unsigned DC1B1 :1;\n[; ;pic18f2550.h: 5788: };\n[; ;pic18f2550.h: 5789: } CCP1CONbits_t;\n[; ;pic18f2550.h: 5790: extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n[; ;pic18f2550.h: 5834: extern volatile unsigned short CCPR1 @ 0xFBE;\n\"5836\n[; ;pic18f2550.h: 5836: asm(\"CCPR1 equ 0FBEh\");\n[; <\" CCPR1 equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5840: extern volatile unsigned char CCPR1L @ 0xFBE;\n\"5842\n[; ;pic18f2550.h: 5842: asm(\"CCPR1L equ 0FBEh\");\n[; <\" CCPR1L equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5846: extern volatile unsigned char CCPR1H @ 0xFBF;\n\"5848\n[; ;pic18f2550.h: 5848: asm(\"CCPR1H equ 0FBFh\");\n[; <\" CCPR1H equ 0FBFh ;# \">\n[; ;pic18f2550.h: 5852: extern volatile unsigned char ADCON2 @ 0xFC0;\n\"5854\n[; ;pic18f2550.h: 5854: asm(\"ADCON2 equ 0FC0h\");\n[; <\" ADCON2 equ 0FC0h ;# \">\n[; ;pic18f2550.h: 5857: typedef union {\n[; ;pic18f2550.h: 5858: struct {\n[; ;pic18f2550.h: 5859: unsigned ADCS :3;\n[; ;pic18f2550.h: 5860: unsigned ACQT :3;\n[; ;pic18f2550.h: 5861: unsigned :1;\n[; ;pic18f2550.h: 5862: unsigned ADFM :1;\n[; ;pic18f2550.h: 5863: };\n[; ;pic18f2550.h: 5864: struct {\n[; ;pic18f2550.h: 5865: unsigned ADCS0 :1;\n[; ;pic18f2550.h: 5866: unsigned ADCS1 :1;\n[; ;pic18f2550.h: 5867: unsigned ADCS2 :1;\n[; ;pic18f2550.h: 5868: unsigned ACQT0 :1;\n[; ;pic18f2550.h: 5869: unsigned ACQT1 :1;\n[; ;pic18f2550.h: 5870: unsigned ACQT2 :1;\n[; ;pic18f2550.h: 5871: };\n[; ;pic18f2550.h: 5872: } ADCON2bits_t;\n[; ;pic18f2550.h: 5873: extern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n[; ;pic18f2550.h: 5922: extern volatile unsigned char ADCON1 @ 0xFC1;\n\"5924\n[; ;pic18f2550.h: 5924: asm(\"ADCON1 equ 0FC1h\");\n[; <\" ADCON1 equ 0FC1h ;# \">\n[; ;pic18f2550.h: 5927: typedef union {\n[; ;pic18f2550.h: 5928: struct {\n[; ;pic18f2550.h: 5929: unsigned PCFG :4;\n[; ;pic18f2550.h: 5930: unsigned VCFG :2;\n[; ;pic18f2550.h: 5931: };\n[; ;pic18f2550.h: 5932: struct {\n[; ;pic18f2550.h: 5933: unsigned PCFG0 :1;\n[; ;pic18f2550.h: 5934: unsigned PCFG1 :1;\n[; ;pic18f2550.h: 5935: unsigned PCFG2 :1;\n[; ;pic18f2550.h: 5936: unsigned PCFG3 :1;\n[; ;pic18f2550.h: 5937: unsigned VCFG0 :1;\n[; ;pic18f2550.h: 5938: unsigned VCFG1 :1;\n[; ;pic18f2550.h: 5939: };\n[; ;pic18f2550.h: 5940: struct {\n[; ;pic18f2550.h: 5941: unsigned :3;\n[; ;pic18f2550.h: 5942: unsigned CHSN3 :1;\n[; ;pic18f2550.h: 5943: };\n[; ;pic18f2550.h: 5944: struct {\n[; ;pic18f2550.h: 5945: unsigned :4;\n[; ;pic18f2550.h: 5946: unsigned VCFG01 :1;\n[; ;pic18f2550.h: 5947: };\n[; ;pic18f2550.h: 5948: struct {\n[; ;pic18f2550.h: 5949: unsigned :5;\n[; ;pic18f2550.h: 5950: unsigned VCFG11 :1;\n[; ;pic18f2550.h: 5951: };\n[; ;pic18f2550.h: 5952: } ADCON1bits_t;\n[; ;pic18f2550.h: 5953: extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n[; ;pic18f2550.h: 6012: extern volatile unsigned char ADCON0 @ 0xFC2;\n\"6014\n[; ;pic18f2550.h: 6014: asm(\"ADCON0 equ 0FC2h\");\n[; <\" ADCON0 equ 0FC2h ;# \">\n[; ;pic18f2550.h: 6017: typedef union {\n[; ;pic18f2550.h: 6018: struct {\n[; ;pic18f2550.h: 6019: unsigned :1;\n[; ;pic18f2550.h: 6020: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6021: };\n[; ;pic18f2550.h: 6022: struct {\n[; ;pic18f2550.h: 6023: unsigned ADON :1;\n[; ;pic18f2550.h: 6024: unsigned GO_nDONE :1;\n[; ;pic18f2550.h: 6025: unsigned CHS :4;\n[; ;pic18f2550.h: 6026: };\n[; ;pic18f2550.h: 6027: struct {\n[; ;pic18f2550.h: 6028: unsigned :1;\n[; ;pic18f2550.h: 6029: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6030: };\n[; ;pic18f2550.h: 6031: struct {\n[; ;pic18f2550.h: 6032: unsigned :1;\n[; ;pic18f2550.h: 6033: unsigned GO_DONE :1;\n[; ;pic18f2550.h: 6034: unsigned CHS0 :1;\n[; ;pic18f2550.h: 6035: unsigned CHS1 :1;\n[; ;pic18f2550.h: 6036: unsigned CHS2 :1;\n[; ;pic18f2550.h: 6037: unsigned CHS3 :1;\n[; ;pic18f2550.h: 6038: };\n[; ;pic18f2550.h: 6039: struct {\n[; ;pic18f2550.h: 6040: unsigned :1;\n[; ;pic18f2550.h: 6041: unsigned DONE :1;\n[; ;pic18f2550.h: 6042: };\n[; ;pic18f2550.h: 6043: struct {\n[; ;pic18f2550.h: 6044: unsigned :1;\n[; ;pic18f2550.h: 6045: unsigned GO :1;\n[; ;pic18f2550.h: 6046: };\n[; ;pic18f2550.h: 6047: struct {\n[; ;pic18f2550.h: 6048: unsigned :1;\n[; ;pic18f2550.h: 6049: unsigned NOT_DONE :1;\n[; ;pic18f2550.h: 6050: };\n[; ;pic18f2550.h: 6051: struct {\n[; ;pic18f2550.h: 6052: unsigned :1;\n[; ;pic18f2550.h: 6053: unsigned nDONE :1;\n[; ;pic18f2550.h: 6054: };\n[; ;pic18f2550.h: 6055: struct {\n[; ;pic18f2550.h: 6056: unsigned :1;\n[; ;pic18f2550.h: 6057: unsigned GODONE :1;\n[; ;pic18f2550.h: 6058: };\n[; ;pic18f2550.h: 6059: } ADCON0bits_t;\n[; ;pic18f2550.h: 6060: extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n[; ;pic18f2550.h: 6134: extern volatile unsigned short ADRES @ 0xFC3;\n\"6136\n[; ;pic18f2550.h: 6136: asm(\"ADRES equ 0FC3h\");\n[; <\" ADRES equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6140: extern volatile unsigned char ADRESL @ 0xFC3;\n\"6142\n[; ;pic18f2550.h: 6142: asm(\"ADRESL equ 0FC3h\");\n[; <\" ADRESL equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6146: extern volatile unsigned char ADRESH @ 0xFC4;\n\"6148\n[; ;pic18f2550.h: 6148: asm(\"ADRESH equ 0FC4h\");\n[; <\" ADRESH equ 0FC4h ;# \">\n[; ;pic18f2550.h: 6152: extern volatile unsigned char SSPCON2 @ 0xFC5;\n\"6154\n[; ;pic18f2550.h: 6154: asm(\"SSPCON2 equ 0FC5h\");\n[; <\" SSPCON2 equ 0FC5h ;# \">\n[; ;pic18f2550.h: 6157: typedef union {\n[; ;pic18f2550.h: 6158: struct {\n[; ;pic18f2550.h: 6159: unsigned SEN :1;\n[; ;pic18f2550.h: 6160: unsigned RSEN :1;\n[; ;pic18f2550.h: 6161: unsigned PEN :1;\n[; ;pic18f2550.h: 6162: unsigned RCEN :1;\n[; ;pic18f2550.h: 6163: unsigned ACKEN :1;\n[; ;pic18f2550.h: 6164: unsigned ACKDT :1;\n[; ;pic18f2550.h: 6165: unsigned ACKSTAT :1;\n[; ;pic18f2550.h: 6166: unsigned GCEN :1;\n[; ;pic18f2550.h: 6167: };\n[; ;pic18f2550.h: 6168: } SSPCON2bits_t;\n[; ;pic18f2550.h: 6169: extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n[; ;pic18f2550.h: 6213: extern volatile unsigned char SSPCON1 @ 0xFC6;\n\"6215\n[; ;pic18f2550.h: 6215: asm(\"SSPCON1 equ 0FC6h\");\n[; <\" SSPCON1 equ 0FC6h ;# \">\n[; ;pic18f2550.h: 6218: typedef union {\n[; ;pic18f2550.h: 6219: struct {\n[; ;pic18f2550.h: 6220: unsigned SSPM :4;\n[; ;pic18f2550.h: 6221: unsigned CKP :1;\n[; ;pic18f2550.h: 6222: unsigned SSPEN :1;\n[; ;pic18f2550.h: 6223: unsigned SSPOV :1;\n[; ;pic18f2550.h: 6224: unsigned WCOL :1;\n[; ;pic18f2550.h: 6225: };\n[; ;pic18f2550.h: 6226: struct {\n[; ;pic18f2550.h: 6227: unsigned SSPM0 :1;\n[; ;pic18f2550.h: 6228: unsigned SSPM1 :1;\n[; ;pic18f2550.h: 6229: unsigned SSPM2 :1;\n[; ;pic18f2550.h: 6230: unsigned SSPM3 :1;\n[; ;pic18f2550.h: 6231: };\n[; ;pic18f2550.h: 6232: } SSPCON1bits_t;\n[; ;pic18f2550.h: 6233: extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n[; ;pic18f2550.h: 6282: extern volatile unsigned char SSPSTAT @ 0xFC7;\n\"6284\n[; ;pic18f2550.h: 6284: asm(\"SSPSTAT equ 0FC7h\");\n[; <\" SSPSTAT equ 0FC7h ;# \">\n[; ;pic18f2550.h: 6287: typedef union {\n[; ;pic18f2550.h: 6288: struct {\n[; ;pic18f2550.h: 6289: unsigned :2;\n[; ;pic18f2550.h: 6290: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6291: };\n[; ;pic18f2550.h: 6292: struct {\n[; ;pic18f2550.h: 6293: unsigned :5;\n[; ;pic18f2550.h: 6294: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6295: };\n[; ;pic18f2550.h: 6296: struct {\n[; ;pic18f2550.h: 6297: unsigned BF :1;\n[; ;pic18f2550.h: 6298: unsigned UA :1;\n[; ;pic18f2550.h: 6299: unsigned R_nW :1;\n[; ;pic18f2550.h: 6300: unsigned S :1;\n[; ;pic18f2550.h: 6301: unsigned P :1;\n[; ;pic18f2550.h: 6302: unsigned D_nA :1;\n[; ;pic18f2550.h: 6303: unsigned CKE :1;\n[; ;pic18f2550.h: 6304: unsigned SMP :1;\n[; ;pic18f2550.h: 6305: };\n[; ;pic18f2550.h: 6306: struct {\n[; ;pic18f2550.h: 6307: unsigned :2;\n[; ;pic18f2550.h: 6308: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6309: };\n[; ;pic18f2550.h: 6310: struct {\n[; ;pic18f2550.h: 6311: unsigned :5;\n[; ;pic18f2550.h: 6312: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6313: };\n[; ;pic18f2550.h: 6314: struct {\n[; ;pic18f2550.h: 6315: unsigned :2;\n[; ;pic18f2550.h: 6316: unsigned R_W :1;\n[; ;pic18f2550.h: 6317: unsigned :2;\n[; ;pic18f2550.h: 6318: unsigned D_A :1;\n[; ;pic18f2550.h: 6319: };\n[; ;pic18f2550.h: 6320: struct {\n[; ;pic18f2550.h: 6321: unsigned :2;\n[; ;pic18f2550.h: 6322: unsigned I2C_READ :1;\n[; ;pic18f2550.h: 6323: unsigned I2C_START :1;\n[; ;pic18f2550.h: 6324: unsigned I2C_STOP :1;\n[; ;pic18f2550.h: 6325: unsigned I2C_DAT :1;\n[; ;pic18f2550.h: 6326: };\n[; ;pic18f2550.h: 6327: struct {\n[; ;pic18f2550.h: 6328: unsigned :2;\n[; ;pic18f2550.h: 6329: unsigned nW :1;\n[; ;pic18f2550.h: 6330: unsigned :2;\n[; ;pic18f2550.h: 6331: unsigned nA :1;\n[; ;pic18f2550.h: 6332: };\n[; ;pic18f2550.h: 6333: struct {\n[; ;pic18f2550.h: 6334: unsigned :2;\n[; ;pic18f2550.h: 6335: unsigned NOT_WRITE :1;\n[; ;pic18f2550.h: 6336: };\n[; ;pic18f2550.h: 6337: struct {\n[; ;pic18f2550.h: 6338: unsigned :5;\n[; ;pic18f2550.h: 6339: unsigned NOT_ADDRESS :1;\n[; ;pic18f2550.h: 6340: };\n[; ;pic18f2550.h: 6341: struct {\n[; ;pic18f2550.h: 6342: unsigned :2;\n[; ;pic18f2550.h: 6343: unsigned nWRITE :1;\n[; ;pic18f2550.h: 6344: unsigned :2;\n[; ;pic18f2550.h: 6345: unsigned nADDRESS :1;\n[; ;pic18f2550.h: 6346: };\n[; ;pic18f2550.h: 6347: struct {\n[; ;pic18f2550.h: 6348: unsigned :2;\n[; ;pic18f2550.h: 6349: unsigned READ_WRITE :1;\n[; ;pic18f2550.h: 6350: unsigned :2;\n[; ;pic18f2550.h: 6351: unsigned DATA_ADDRESS :1;\n[; ;pic18f2550.h: 6352: };\n[; ;pic18f2550.h: 6353: struct {\n[; ;pic18f2550.h: 6354: unsigned :2;\n[; ;pic18f2550.h: 6355: unsigned R :1;\n[; ;pic18f2550.h: 6356: unsigned :2;\n[; ;pic18f2550.h: 6357: unsigned D :1;\n[; ;pic18f2550.h: 6358: };\n[; ;pic18f2550.h: 6359: struct {\n[; ;pic18f2550.h: 6360: unsigned :5;\n[; ;pic18f2550.h: 6361: unsigned DA :1;\n[; ;pic18f2550.h: 6362: };\n[; ;pic18f2550.h: 6363: struct {\n[; ;pic18f2550.h: 6364: unsigned :2;\n[; ;pic18f2550.h: 6365: unsigned RW :1;\n[; ;pic18f2550.h: 6366: };\n[; ;pic18f2550.h: 6367: struct {\n[; ;pic18f2550.h: 6368: unsigned :3;\n[; ;pic18f2550.h: 6369: unsigned START :1;\n[; ;pic18f2550.h: 6370: };\n[; ;pic18f2550.h: 6371: struct {\n[; ;pic18f2550.h: 6372: unsigned :4;\n[; ;pic18f2550.h: 6373: unsigned STOP :1;\n[; ;pic18f2550.h: 6374: };\n[; ;pic18f2550.h: 6375: struct {\n[; ;pic18f2550.h: 6376: unsigned :2;\n[; ;pic18f2550.h: 6377: unsigned NOT_W :1;\n[; ;pic18f2550.h: 6378: };\n[; ;pic18f2550.h: 6379: struct {\n[; ;pic18f2550.h: 6380: unsigned :5;\n[; ;pic18f2550.h: 6381: unsigned NOT_A :1;\n[; ;pic18f2550.h: 6382: };\n[; ;pic18f2550.h: 6383: } SSPSTATbits_t;\n[; ;pic18f2550.h: 6384: extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n[; ;pic18f2550.h: 6548: extern volatile unsigned char SSPADD @ 0xFC8;\n\"6550\n[; ;pic18f2550.h: 6550: asm(\"SSPADD equ 0FC8h\");\n[; <\" SSPADD equ 0FC8h ;# \">\n[; ;pic18f2550.h: 6554: extern volatile unsigned char SSPBUF @ 0xFC9;\n\"6556\n[; ;pic18f2550.h: 6556: asm(\"SSPBUF equ 0FC9h\");\n[; <\" SSPBUF equ 0FC9h ;# \">\n[; ;pic18f2550.h: 6560: extern volatile unsigned char T2CON @ 0xFCA;\n\"6562\n[; ;pic18f2550.h: 6562: asm(\"T2CON equ 0FCAh\");\n[; <\" T2CON equ 0FCAh ;# \">\n[; ;pic18f2550.h: 6565: typedef union {\n[; ;pic18f2550.h: 6566: struct {\n[; ;pic18f2550.h: 6567: unsigned T2CKPS :2;\n[; ;pic18f2550.h: 6568: unsigned TMR2ON :1;\n[; ;pic18f2550.h: 6569: unsigned TOUTPS :4;\n[; ;pic18f2550.h: 6570: };\n[; ;pic18f2550.h: 6571: struct {\n[; ;pic18f2550.h: 6572: unsigned T2CKPS0 :1;\n[; ;pic18f2550.h: 6573: unsigned T2CKPS1 :1;\n[; ;pic18f2550.h: 6574: unsigned :1;\n[; ;pic18f2550.h: 6575: unsigned T2OUTPS0 :1;\n[; ;pic18f2550.h: 6576: unsigned T2OUTPS1 :1;\n[; ;pic18f2550.h: 6577: unsigned T2OUTPS2 :1;\n[; ;pic18f2550.h: 6578: unsigned T2OUTPS3 :1;\n[; ;pic18f2550.h: 6579: };\n[; ;pic18f2550.h: 6580: struct {\n[; ;pic18f2550.h: 6581: unsigned :3;\n[; ;pic18f2550.h: 6582: unsigned TOUTPS0 :1;\n[; ;pic18f2550.h: 6583: unsigned TOUTPS1 :1;\n[; ;pic18f2550.h: 6584: unsigned TOUTPS2 :1;\n[; ;pic18f2550.h: 6585: unsigned TOUTPS3 :1;\n[; ;pic18f2550.h: 6586: };\n[; ;pic18f2550.h: 6587: } T2CONbits_t;\n[; ;pic18f2550.h: 6588: extern volatile T2CONbits_t T2CONbits @ 0xFCA;\n[; ;pic18f2550.h: 6657: extern volatile unsigned char PR2 @ 0xFCB;\n\"6659\n[; ;pic18f2550.h: 6659: asm(\"PR2 equ 0FCBh\");\n[; <\" PR2 equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6662: extern volatile unsigned char MEMCON @ 0xFCB;\n\"6664\n[; ;pic18f2550.h: 6664: asm(\"MEMCON equ 0FCBh\");\n[; <\" MEMCON equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6668: extern volatile unsigned char TMR2 @ 0xFCC;\n\"6670\n[; ;pic18f2550.h: 6670: asm(\"TMR2 equ 0FCCh\");\n[; <\" TMR2 equ 0FCCh ;# \">\n[; ;pic18f2550.h: 6674: extern volatile unsigned char T1CON @ 0xFCD;\n\"6676\n[; ;pic18f2550.h: 6676: asm(\"T1CON equ 0FCDh\");\n[; <\" T1CON equ 0FCDh ;# \">\n[; ;pic18f2550.h: 6679: typedef union {\n[; ;pic18f2550.h: 6680: struct {\n[; ;pic18f2550.h: 6681: unsigned :2;\n[; ;pic18f2550.h: 6682: unsigned NOT_T1SYNC :1;\n[; ;pic18f2550.h: 6683: };\n[; ;pic18f2550.h: 6684: struct {\n[; ;pic18f2550.h: 6685: unsigned TMR1ON :1;\n[; ;pic18f2550.h: 6686: unsigned TMR1CS :1;\n[; ;pic18f2550.h: 6687: unsigned nT1SYNC :1;\n[; ;pic18f2550.h: 6688: unsigned T1OSCEN :1;\n[; ;pic18f2550.h: 6689: unsigned T1CKPS :2;\n[; ;pic18f2550.h: 6690: unsigned T1RUN :1;\n[; ;pic18f2550.h: 6691: unsigned RD16 :1;\n[; ;pic18f2550.h: 6692: };\n[; ;pic18f2550.h: 6693: struct {\n[; ;pic18f2550.h: 6694: unsigned :2;\n[; ;pic18f2550.h: 6695: unsigned T1SYNC :1;\n[; ;pic18f2550.h: 6696: unsigned :1;\n[; ;pic18f2550.h: 6697: unsigned T1CKPS0 :1;\n[; ;pic18f2550.h: 6698: unsigned T1CKPS1 :1;\n[; ;pic18f2550.h: 6699: };\n[; ;pic18f2550.h: 6700: struct {\n[; ;pic18f2550.h: 6701: unsigned :3;\n[; ;pic18f2550.h: 6702: unsigned SOSCEN :1;\n[; ;pic18f2550.h: 6703: };\n[; ;pic18f2550.h: 6704: struct {\n[; ;pic18f2550.h: 6705: unsigned :7;\n[; ;pic18f2550.h: 6706: unsigned T1RD16 :1;\n[; ;pic18f2550.h: 6707: };\n[; ;pic18f2550.h: 6708: } T1CONbits_t;\n[; ;pic18f2550.h: 6709: extern volatile T1CONbits_t T1CONbits @ 0xFCD;\n[; ;pic18f2550.h: 6778: extern volatile unsigned short TMR1 @ 0xFCE;\n\"6780\n[; ;pic18f2550.h: 6780: asm(\"TMR1 equ 0FCEh\");\n[; <\" TMR1 equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6784: extern volatile unsigned char TMR1L @ 0xFCE;\n\"6786\n[; ;pic18f2550.h: 6786: asm(\"TMR1L equ 0FCEh\");\n[; <\" TMR1L equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6790: extern volatile unsigned char TMR1H @ 0xFCF;\n\"6792\n[; ;pic18f2550.h: 6792: asm(\"TMR1H equ 0FCFh\");\n[; <\" TMR1H equ 0FCFh ;# \">\n[; ;pic18f2550.h: 6796: extern volatile unsigned char RCON @ 0xFD0;\n\"6798\n[; ;pic18f2550.h: 6798: asm(\"RCON equ 0FD0h\");\n[; <\" RCON equ 0FD0h ;# \">\n[; ;pic18f2550.h: 6801: typedef union {\n[; ;pic18f2550.h: 6802: struct {\n[; ;pic18f2550.h: 6803: unsigned NOT_BOR :1;\n[; ;pic18f2550.h: 6804: };\n[; ;pic18f2550.h: 6805: struct {\n[; ;pic18f2550.h: 6806: unsigned :1;\n[; ;pic18f2550.h: 6807: unsigned NOT_POR :1;\n[; ;pic18f2550.h: 6808: };\n[; ;pic18f2550.h: 6809: struct {\n[; ;pic18f2550.h: 6810: unsigned :2;\n[; ;pic18f2550.h: 6811: unsigned NOT_PD :1;\n[; ;pic18f2550.h: 6812: };\n[; ;pic18f2550.h: 6813: struct {\n[; ;pic18f2550.h: 6814: unsigned :3;\n[; ;pic18f2550.h: 6815: unsigned NOT_TO :1;\n[; ;pic18f2550.h: 6816: };\n[; ;pic18f2550.h: 6817: struct {\n[; ;pic18f2550.h: 6818: unsigned :4;\n[; ;pic18f2550.h: 6819: unsigned NOT_RI :1;\n[; ;pic18f2550.h: 6820: };\n[; ;pic18f2550.h: 6821: struct {\n[; ;pic18f2550.h: 6822: unsigned nBOR :1;\n[; ;pic18f2550.h: 6823: unsigned nPOR :1;\n[; ;pic18f2550.h: 6824: unsigned nPD :1;\n[; ;pic18f2550.h: 6825: unsigned nTO :1;\n[; ;pic18f2550.h: 6826: unsigned nRI :1;\n[; ;pic18f2550.h: 6827: unsigned :1;\n[; ;pic18f2550.h: 6828: unsigned SBOREN :1;\n[; ;pic18f2550.h: 6829: unsigned IPEN :1;\n[; ;pic18f2550.h: 6830: };\n[; ;pic18f2550.h: 6831: struct {\n[; ;pic18f2550.h: 6832: unsigned :7;\n[; ;pic18f2550.h: 6833: unsigned NOT_IPEN :1;\n[; ;pic18f2550.h: 6834: };\n[; ;pic18f2550.h: 6835: struct {\n[; ;pic18f2550.h: 6836: unsigned BOR :1;\n[; ;pic18f2550.h: 6837: unsigned POR :1;\n[; ;pic18f2550.h: 6838: unsigned PD :1;\n[; ;pic18f2550.h: 6839: unsigned TO :1;\n[; ;pic18f2550.h: 6840: unsigned RI :1;\n[; ;pic18f2550.h: 6841: unsigned :2;\n[; ;pic18f2550.h: 6842: unsigned nIPEN :1;\n[; ;pic18f2550.h: 6843: };\n[; ;pic18f2550.h: 6844: } RCONbits_t;\n[; ;pic18f2550.h: 6845: extern volatile RCONbits_t RCONbits @ 0xFD0;\n[; ;pic18f2550.h: 6944: extern volatile unsigned char WDTCON @ 0xFD1;\n\"6946\n[; ;pic18f2550.h: 6946: asm(\"WDTCON equ 0FD1h\");\n[; <\" WDTCON equ 0FD1h ;# \">\n[; ;pic18f2550.h: 6949: typedef union {\n[; ;pic18f2550.h: 6950: struct {\n[; ;pic18f2550.h: 6951: unsigned SWDTEN :1;\n[; ;pic18f2550.h: 6952: };\n[; ;pic18f2550.h: 6953: struct {\n[; ;pic18f2550.h: 6954: unsigned SWDTE :1;\n[; ;pic18f2550.h: 6955: };\n[; ;pic18f2550.h: 6956: } WDTCONbits_t;\n[; ;pic18f2550.h: 6957: extern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n[; ;pic18f2550.h: 6971: extern volatile unsigned char HLVDCON @ 0xFD2;\n\"6973\n[; ;pic18f2550.h: 6973: asm(\"HLVDCON equ 0FD2h\");\n[; <\" HLVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6976: extern volatile unsigned char LVDCON @ 0xFD2;\n\"6978\n[; ;pic18f2550.h: 6978: asm(\"LVDCON equ 0FD2h\");\n[; <\" LVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6981: typedef union {\n[; ;pic18f2550.h: 6982: struct {\n[; ;pic18f2550.h: 6983: unsigned HLVDL :4;\n[; ;pic18f2550.h: 6984: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 6985: unsigned IRVST :1;\n[; ;pic18f2550.h: 6986: unsigned :1;\n[; ;pic18f2550.h: 6987: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 6988: };\n[; ;pic18f2550.h: 6989: struct {\n[; ;pic18f2550.h: 6990: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 6991: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 6992: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 6993: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 6994: };\n[; ;pic18f2550.h: 6995: struct {\n[; ;pic18f2550.h: 6996: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 6997: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 6998: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 6999: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7000: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7001: unsigned IVRST :1;\n[; ;pic18f2550.h: 7002: };\n[; ;pic18f2550.h: 7003: struct {\n[; ;pic18f2550.h: 7004: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7005: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7006: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7007: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7008: unsigned :1;\n[; ;pic18f2550.h: 7009: unsigned BGST :1;\n[; ;pic18f2550.h: 7010: };\n[; ;pic18f2550.h: 7011: } HLVDCONbits_t;\n[; ;pic18f2550.h: 7012: extern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7110: typedef union {\n[; ;pic18f2550.h: 7111: struct {\n[; ;pic18f2550.h: 7112: unsigned HLVDL :4;\n[; ;pic18f2550.h: 7113: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 7114: unsigned IRVST :1;\n[; ;pic18f2550.h: 7115: unsigned :1;\n[; ;pic18f2550.h: 7116: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 7117: };\n[; ;pic18f2550.h: 7118: struct {\n[; ;pic18f2550.h: 7119: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 7120: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 7121: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 7122: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 7123: };\n[; ;pic18f2550.h: 7124: struct {\n[; ;pic18f2550.h: 7125: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 7126: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 7127: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 7128: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7129: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7130: unsigned IVRST :1;\n[; ;pic18f2550.h: 7131: };\n[; ;pic18f2550.h: 7132: struct {\n[; ;pic18f2550.h: 7133: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7134: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7135: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7136: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7137: unsigned :1;\n[; ;pic18f2550.h: 7138: unsigned BGST :1;\n[; ;pic18f2550.h: 7139: };\n[; ;pic18f2550.h: 7140: } LVDCONbits_t;\n[; ;pic18f2550.h: 7141: extern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7240: extern volatile unsigned char OSCCON @ 0xFD3;\n\"7242\n[; ;pic18f2550.h: 7242: asm(\"OSCCON equ 0FD3h\");\n[; <\" OSCCON equ 0FD3h ;# \">\n[; ;pic18f2550.h: 7245: typedef union {\n[; ;pic18f2550.h: 7246: struct {\n[; ;pic18f2550.h: 7247: unsigned SCS :2;\n[; ;pic18f2550.h: 7248: unsigned IOFS :1;\n[; ;pic18f2550.h: 7249: unsigned OSTS :1;\n[; ;pic18f2550.h: 7250: unsigned IRCF :3;\n[; ;pic18f2550.h: 7251: unsigned IDLEN :1;\n[; ;pic18f2550.h: 7252: };\n[; ;pic18f2550.h: 7253: struct {\n[; ;pic18f2550.h: 7254: unsigned SCS0 :1;\n[; ;pic18f2550.h: 7255: unsigned SCS1 :1;\n[; ;pic18f2550.h: 7256: unsigned FLTS :1;\n[; ;pic18f2550.h: 7257: unsigned :1;\n[; ;pic18f2550.h: 7258: unsigned IRCF0 :1;\n[; ;pic18f2550.h: 7259: unsigned IRCF1 :1;\n[; ;pic18f2550.h: 7260: unsigned IRCF2 :1;\n[; ;pic18f2550.h: 7261: };\n[; ;pic18f2550.h: 7262: } OSCCONbits_t;\n[; ;pic18f2550.h: 7263: extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n[; ;pic18f2550.h: 7322: extern volatile unsigned char T0CON @ 0xFD5;\n\"7324\n[; ;pic18f2550.h: 7324: asm(\"T0CON equ 0FD5h\");\n[; <\" T0CON equ 0FD5h ;# \">\n[; ;pic18f2550.h: 7327: typedef union {\n[; ;pic18f2550.h: 7328: struct {\n[; ;pic18f2550.h: 7329: unsigned T0PS :3;\n[; ;pic18f2550.h: 7330: unsigned PSA :1;\n[; ;pic18f2550.h: 7331: unsigned T0SE :1;\n[; ;pic18f2550.h: 7332: unsigned T0CS :1;\n[; ;pic18f2550.h: 7333: unsigned T08BIT :1;\n[; ;pic18f2550.h: 7334: unsigned TMR0ON :1;\n[; ;pic18f2550.h: 7335: };\n[; ;pic18f2550.h: 7336: struct {\n[; ;pic18f2550.h: 7337: unsigned T0PS0 :1;\n[; ;pic18f2550.h: 7338: unsigned T0PS1 :1;\n[; ;pic18f2550.h: 7339: unsigned T0PS2 :1;\n[; ;pic18f2550.h: 7340: };\n[; ;pic18f2550.h: 7341: } T0CONbits_t;\n[; ;pic18f2550.h: 7342: extern volatile T0CONbits_t T0CONbits @ 0xFD5;\n[; ;pic18f2550.h: 7391: extern volatile unsigned short TMR0 @ 0xFD6;\n\"7393\n[; ;pic18f2550.h: 7393: asm(\"TMR0 equ 0FD6h\");\n[; <\" TMR0 equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7397: extern volatile unsigned char TMR0L @ 0xFD6;\n\"7399\n[; ;pic18f2550.h: 7399: asm(\"TMR0L equ 0FD6h\");\n[; <\" TMR0L equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7403: extern volatile unsigned char TMR0H @ 0xFD7;\n\"7405\n[; ;pic18f2550.h: 7405: asm(\"TMR0H equ 0FD7h\");\n[; <\" TMR0H equ 0FD7h ;# \">\n[; ;pic18f2550.h: 7409: extern volatile unsigned char STATUS @ 0xFD8;\n\"7411\n[; ;pic18f2550.h: 7411: asm(\"STATUS equ 0FD8h\");\n[; <\" STATUS equ 0FD8h ;# \">\n[; ;pic18f2550.h: 7414: typedef union {\n[; ;pic18f2550.h: 7415: struct {\n[; ;pic18f2550.h: 7416: unsigned C :1;\n[; ;pic18f2550.h: 7417: unsigned DC :1;\n[; ;pic18f2550.h: 7418: unsigned Z :1;\n[; ;pic18f2550.h: 7419: unsigned OV :1;\n[; ;pic18f2550.h: 7420: unsigned N :1;\n[; ;pic18f2550.h: 7421: };\n[; ;pic18f2550.h: 7422: struct {\n[; ;pic18f2550.h: 7423: unsigned CARRY :1;\n[; ;pic18f2550.h: 7424: };\n[; ;pic18f2550.h: 7425: struct {\n[; ;pic18f2550.h: 7426: unsigned :4;\n[; ;pic18f2550.h: 7427: unsigned NEGATIVE :1;\n[; ;pic18f2550.h: 7428: };\n[; ;pic18f2550.h: 7429: struct {\n[; ;pic18f2550.h: 7430: unsigned :3;\n[; ;pic18f2550.h: 7431: unsigned OVERFLOW :1;\n[; ;pic18f2550.h: 7432: };\n[; ;pic18f2550.h: 7433: struct {\n[; ;pic18f2550.h: 7434: unsigned :2;\n[; ;pic18f2550.h: 7435: unsigned ZERO :1;\n[; ;pic18f2550.h: 7436: };\n[; ;pic18f2550.h: 7437: } STATUSbits_t;\n[; ;pic18f2550.h: 7438: extern volatile STATUSbits_t STATUSbits @ 0xFD8;\n[; ;pic18f2550.h: 7487: extern volatile unsigned short FSR2 @ 0xFD9;\n\"7489\n[; ;pic18f2550.h: 7489: asm(\"FSR2 equ 0FD9h\");\n[; <\" FSR2 equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7493: extern volatile unsigned char FSR2L @ 0xFD9;\n\"7495\n[; ;pic18f2550.h: 7495: asm(\"FSR2L equ 0FD9h\");\n[; <\" FSR2L equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7499: extern volatile unsigned char FSR2H @ 0xFDA;\n\"7501\n[; ;pic18f2550.h: 7501: asm(\"FSR2H equ 0FDAh\");\n[; <\" FSR2H equ 0FDAh ;# \">\n[; ;pic18f2550.h: 7505: extern volatile unsigned char PLUSW2 @ 0xFDB;\n\"7507\n[; ;pic18f2550.h: 7507: asm(\"PLUSW2 equ 0FDBh\");\n[; <\" PLUSW2 equ 0FDBh ;# \">\n[; ;pic18f2550.h: 7511: extern volatile unsigned char PREINC2 @ 0xFDC;\n\"7513\n[; ;pic18f2550.h: 7513: asm(\"PREINC2 equ 0FDCh\");\n[; <\" PREINC2 equ 0FDCh ;# \">\n[; ;pic18f2550.h: 7517: extern volatile unsigned char POSTDEC2 @ 0xFDD;\n\"7519\n[; ;pic18f2550.h: 7519: asm(\"POSTDEC2 equ 0FDDh\");\n[; <\" POSTDEC2 equ 0FDDh ;# \">\n[; ;pic18f2550.h: 7523: extern volatile unsigned char POSTINC2 @ 0xFDE;\n\"7525\n[; ;pic18f2550.h: 7525: asm(\"POSTINC2 equ 0FDEh\");\n[; <\" POSTINC2 equ 0FDEh ;# \">\n[; ;pic18f2550.h: 7529: extern volatile unsigned char INDF2 @ 0xFDF;\n\"7531\n[; ;pic18f2550.h: 7531: asm(\"INDF2 equ 0FDFh\");\n[; <\" INDF2 equ 0FDFh ;# \">\n[; ;pic18f2550.h: 7535: extern volatile unsigned char BSR @ 0xFE0;\n\"7537\n[; ;pic18f2550.h: 7537: asm(\"BSR equ 0FE0h\");\n[; <\" BSR equ 0FE0h ;# \">\n[; ;pic18f2550.h: 7541: extern volatile unsigned short FSR1 @ 0xFE1;\n\"7543\n[; ;pic18f2550.h: 7543: asm(\"FSR1 equ 0FE1h\");\n[; <\" FSR1 equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7547: extern volatile unsigned char FSR1L @ 0xFE1;\n\"7549\n[; ;pic18f2550.h: 7549: asm(\"FSR1L equ 0FE1h\");\n[; <\" FSR1L equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7553: extern volatile unsigned char FSR1H @ 0xFE2;\n\"7555\n[; ;pic18f2550.h: 7555: asm(\"FSR1H equ 0FE2h\");\n[; <\" FSR1H equ 0FE2h ;# \">\n[; ;pic18f2550.h: 7559: extern volatile unsigned char PLUSW1 @ 0xFE3;\n\"7561\n[; ;pic18f2550.h: 7561: asm(\"PLUSW1 equ 0FE3h\");\n[; <\" PLUSW1 equ 0FE3h ;# \">\n[; ;pic18f2550.h: 7565: extern volatile unsigned char PREINC1 @ 0xFE4;\n\"7567\n[; ;pic18f2550.h: 7567: asm(\"PREINC1 equ 0FE4h\");\n[; <\" PREINC1 equ 0FE4h ;# \">\n[; ;pic18f2550.h: 7571: extern volatile unsigned char POSTDEC1 @ 0xFE5;\n\"7573\n[; ;pic18f2550.h: 7573: asm(\"POSTDEC1 equ 0FE5h\");\n[; <\" POSTDEC1 equ 0FE5h ;# \">\n[; ;pic18f2550.h: 7577: extern volatile unsigned char POSTINC1 @ 0xFE6;\n\"7579\n[; ;pic18f2550.h: 7579: asm(\"POSTINC1 equ 0FE6h\");\n[; <\" POSTINC1 equ 0FE6h ;# \">\n[; ;pic18f2550.h: 7583: extern volatile unsigned char INDF1 @ 0xFE7;\n\"7585\n[; ;pic18f2550.h: 7585: asm(\"INDF1 equ 0FE7h\");\n[; <\" INDF1 equ 0FE7h ;# \">\n[; ;pic18f2550.h: 7589: extern volatile unsigned char WREG @ 0xFE8;\n\"7591\n[; ;pic18f2550.h: 7591: asm(\"WREG equ 0FE8h\");\n[; <\" WREG equ 0FE8h ;# \">\n[; ;pic18f2550.h: 7595: extern volatile unsigned short FSR0 @ 0xFE9;\n\"7597\n[; ;pic18f2550.h: 7597: asm(\"FSR0 equ 0FE9h\");\n[; <\" FSR0 equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7601: extern volatile unsigned char FSR0L @ 0xFE9;\n\"7603\n[; ;pic18f2550.h: 7603: asm(\"FSR0L equ 0FE9h\");\n[; <\" FSR0L equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7607: extern volatile unsigned char FSR0H @ 0xFEA;\n\"7609\n[; ;pic18f2550.h: 7609: asm(\"FSR0H equ 0FEAh\");\n[; <\" FSR0H equ 0FEAh ;# \">\n[; ;pic18f2550.h: 7613: extern volatile unsigned char PLUSW0 @ 0xFEB;\n\"7615\n[; ;pic18f2550.h: 7615: asm(\"PLUSW0 equ 0FEBh\");\n[; <\" PLUSW0 equ 0FEBh ;# \">\n[; ;pic18f2550.h: 7619: extern volatile unsigned char PREINC0 @ 0xFEC;\n\"7621\n[; ;pic18f2550.h: 7621: asm(\"PREINC0 equ 0FECh\");\n[; <\" PREINC0 equ 0FECh ;# \">\n[; ;pic18f2550.h: 7625: extern volatile unsigned char POSTDEC0 @ 0xFED;\n\"7627\n[; ;pic18f2550.h: 7627: asm(\"POSTDEC0 equ 0FEDh\");\n[; <\" POSTDEC0 equ 0FEDh ;# \">\n[; ;pic18f2550.h: 7631: extern volatile unsigned char POSTINC0 @ 0xFEE;\n\"7633\n[; ;pic18f2550.h: 7633: asm(\"POSTINC0 equ 0FEEh\");\n[; <\" POSTINC0 equ 0FEEh ;# \">\n[; ;pic18f2550.h: 7637: extern volatile unsigned char INDF0 @ 0xFEF;\n\"7639\n[; ;pic18f2550.h: 7639: asm(\"INDF0 equ 0FEFh\");\n[; <\" INDF0 equ 0FEFh ;# \">\n[; ;pic18f2550.h: 7643: extern volatile unsigned char INTCON3 @ 0xFF0;\n\"7645\n[; ;pic18f2550.h: 7645: asm(\"INTCON3 equ 0FF0h\");\n[; <\" INTCON3 equ 0FF0h ;# \">\n[; ;pic18f2550.h: 7648: typedef union {\n[; ;pic18f2550.h: 7649: struct {\n[; ;pic18f2550.h: 7650: unsigned INT1IF :1;\n[; ;pic18f2550.h: 7651: unsigned INT2IF :1;\n[; ;pic18f2550.h: 7652: unsigned :1;\n[; ;pic18f2550.h: 7653: unsigned INT1IE :1;\n[; ;pic18f2550.h: 7654: unsigned INT2IE :1;\n[; ;pic18f2550.h: 7655: unsigned :1;\n[; ;pic18f2550.h: 7656: unsigned INT1IP :1;\n[; ;pic18f2550.h: 7657: unsigned INT2IP :1;\n[; ;pic18f2550.h: 7658: };\n[; ;pic18f2550.h: 7659: struct {\n[; ;pic18f2550.h: 7660: unsigned INT1F :1;\n[; ;pic18f2550.h: 7661: unsigned INT2F :1;\n[; ;pic18f2550.h: 7662: unsigned :1;\n[; ;pic18f2550.h: 7663: unsigned INT1E :1;\n[; ;pic18f2550.h: 7664: unsigned INT2E :1;\n[; ;pic18f2550.h: 7665: unsigned :1;\n[; ;pic18f2550.h: 7666: unsigned INT1P :1;\n[; ;pic18f2550.h: 7667: unsigned INT2P :1;\n[; ;pic18f2550.h: 7668: };\n[; ;pic18f2550.h: 7669: } INTCON3bits_t;\n[; ;pic18f2550.h: 7670: extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n[; ;pic18f2550.h: 7734: extern volatile unsigned char INTCON2 @ 0xFF1;\n\"7736\n[; ;pic18f2550.h: 7736: asm(\"INTCON2 equ 0FF1h\");\n[; <\" INTCON2 equ 0FF1h ;# \">\n[; ;pic18f2550.h: 7739: typedef union {\n[; ;pic18f2550.h: 7740: struct {\n[; ;pic18f2550.h: 7741: unsigned :7;\n[; ;pic18f2550.h: 7742: unsigned NOT_RBPU :1;\n[; ;pic18f2550.h: 7743: };\n[; ;pic18f2550.h: 7744: struct {\n[; ;pic18f2550.h: 7745: unsigned RBIP :1;\n[; ;pic18f2550.h: 7746: unsigned :1;\n[; ;pic18f2550.h: 7747: unsigned TMR0IP :1;\n[; ;pic18f2550.h: 7748: unsigned :1;\n[; ;pic18f2550.h: 7749: unsigned INTEDG2 :1;\n[; ;pic18f2550.h: 7750: unsigned INTEDG1 :1;\n[; ;pic18f2550.h: 7751: unsigned INTEDG0 :1;\n[; ;pic18f2550.h: 7752: unsigned nRBPU :1;\n[; ;pic18f2550.h: 7753: };\n[; ;pic18f2550.h: 7754: struct {\n[; ;pic18f2550.h: 7755: unsigned :2;\n[; ;pic18f2550.h: 7756: unsigned T0IP :1;\n[; ;pic18f2550.h: 7757: unsigned :4;\n[; ;pic18f2550.h: 7758: unsigned RBPU :1;\n[; ;pic18f2550.h: 7759: };\n[; ;pic18f2550.h: 7760: } INTCON2bits_t;\n[; ;pic18f2550.h: 7761: extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n[; ;pic18f2550.h: 7810: extern volatile unsigned char INTCON @ 0xFF2;\n\"7812\n[; ;pic18f2550.h: 7812: asm(\"INTCON equ 0FF2h\");\n[; <\" INTCON equ 0FF2h ;# \">\n[; ;pic18f2550.h: 7815: typedef union {\n[; ;pic18f2550.h: 7816: struct {\n[; ;pic18f2550.h: 7817: unsigned RBIF :1;\n[; ;pic18f2550.h: 7818: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7819: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7820: unsigned RBIE :1;\n[; ;pic18f2550.h: 7821: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7822: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7823: unsigned PEIE_GIEL :1;\n[; ;pic18f2550.h: 7824: unsigned GIE_GIEH :1;\n[; ;pic18f2550.h: 7825: };\n[; ;pic18f2550.h: 7826: struct {\n[; ;pic18f2550.h: 7827: unsigned RBIF :1;\n[; ;pic18f2550.h: 7828: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7829: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7830: unsigned RBIE :1;\n[; ;pic18f2550.h: 7831: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7832: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7833: unsigned PEIE :1;\n[; ;pic18f2550.h: 7834: unsigned GIE :1;\n[; ;pic18f2550.h: 7835: };\n[; ;pic18f2550.h: 7836: struct {\n[; ;pic18f2550.h: 7837: unsigned RBIF :1;\n[; ;pic18f2550.h: 7838: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7839: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7840: unsigned RBIE :1;\n[; ;pic18f2550.h: 7841: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7842: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7843: unsigned GIEL :1;\n[; ;pic18f2550.h: 7844: unsigned GIEH :1;\n[; ;pic18f2550.h: 7845: };\n[; ;pic18f2550.h: 7846: struct {\n[; ;pic18f2550.h: 7847: unsigned :1;\n[; ;pic18f2550.h: 7848: unsigned INT0F :1;\n[; ;pic18f2550.h: 7849: unsigned T0IF :1;\n[; ;pic18f2550.h: 7850: unsigned :1;\n[; ;pic18f2550.h: 7851: unsigned INT0E :1;\n[; ;pic18f2550.h: 7852: unsigned T0IE :1;\n[; ;pic18f2550.h: 7853: unsigned PEIE :1;\n[; ;pic18f2550.h: 7854: unsigned GIE :1;\n[; ;pic18f2550.h: 7855: };\n[; ;pic18f2550.h: 7856: struct {\n[; ;pic18f2550.h: 7857: unsigned :6;\n[; ;pic18f2550.h: 7858: unsigned GIEL :1;\n[; ;pic18f2550.h: 7859: unsigned GIEH :1;\n[; ;pic18f2550.h: 7860: };\n[; ;pic18f2550.h: 7861: } INTCONbits_t;\n[; ;pic18f2550.h: 7862: extern volatile INTCONbits_t INTCONbits @ 0xFF2;\n[; ;pic18f2550.h: 7946: extern volatile unsigned short PROD @ 0xFF3;\n\"7948\n[; ;pic18f2550.h: 7948: asm(\"PROD equ 0FF3h\");\n[; <\" PROD equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7952: extern volatile unsigned char PRODL @ 0xFF3;\n\"7954\n[; ;pic18f2550.h: 7954: asm(\"PRODL equ 0FF3h\");\n[; <\" PRODL equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7958: extern volatile unsigned char PRODH @ 0xFF4;\n\"7960\n[; ;pic18f2550.h: 7960: asm(\"PRODH equ 0FF4h\");\n[; <\" PRODH equ 0FF4h ;# \">\n[; ;pic18f2550.h: 7964: extern volatile unsigned char TABLAT @ 0xFF5;\n\"7966\n[; ;pic18f2550.h: 7966: asm(\"TABLAT equ 0FF5h\");\n[; <\" TABLAT equ 0FF5h ;# \">\n[; ;pic18f2550.h: 7971: extern volatile unsigned short long TBLPTR @ 0xFF6;\n\"7974\n[; ;pic18f2550.h: 7974: asm(\"TBLPTR equ 0FF6h\");\n[; <\" TBLPTR equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7978: extern volatile unsigned char TBLPTRL @ 0xFF6;\n\"7980\n[; ;pic18f2550.h: 7980: asm(\"TBLPTRL equ 0FF6h\");\n[; <\" TBLPTRL equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7984: extern volatile unsigned char TBLPTRH @ 0xFF7;\n\"7986\n[; ;pic18f2550.h: 7986: asm(\"TBLPTRH equ 0FF7h\");\n[; <\" TBLPTRH equ 0FF7h ;# \">\n[; ;pic18f2550.h: 7990: extern volatile unsigned char TBLPTRU @ 0xFF8;\n\"7992\n[; ;pic18f2550.h: 7992: asm(\"TBLPTRU equ 0FF8h\");\n[; <\" TBLPTRU equ 0FF8h ;# \">\n[; ;pic18f2550.h: 7997: extern volatile unsigned short long PCLAT @ 0xFF9;\n\"8000\n[; ;pic18f2550.h: 8000: asm(\"PCLAT equ 0FF9h\");\n[; <\" PCLAT equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8004: extern volatile unsigned short long PC @ 0xFF9;\n\"8007\n[; ;pic18f2550.h: 8007: asm(\"PC equ 0FF9h\");\n[; <\" PC equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8011: extern volatile unsigned char PCL @ 0xFF9;\n\"8013\n[; ;pic18f2550.h: 8013: asm(\"PCL equ 0FF9h\");\n[; <\" PCL equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8017: extern volatile unsigned char PCLATH @ 0xFFA;\n\"8019\n[; ;pic18f2550.h: 8019: asm(\"PCLATH equ 0FFAh\");\n[; <\" PCLATH equ 0FFAh ;# \">\n[; ;pic18f2550.h: 8023: extern volatile unsigned char PCLATU @ 0xFFB;\n\"8025\n[; ;pic18f2550.h: 8025: asm(\"PCLATU equ 0FFBh\");\n[; <\" PCLATU equ 0FFBh ;# \">\n[; ;pic18f2550.h: 8029: extern volatile unsigned char STKPTR @ 0xFFC;\n\"8031\n[; ;pic18f2550.h: 8031: asm(\"STKPTR equ 0FFCh\");\n[; <\" STKPTR equ 0FFCh ;# \">\n[; ;pic18f2550.h: 8034: typedef union {\n[; ;pic18f2550.h: 8035: struct {\n[; ;pic18f2550.h: 8036: unsigned STKPTR :5;\n[; ;pic18f2550.h: 8037: unsigned :1;\n[; ;pic18f2550.h: 8038: unsigned STKUNF :1;\n[; ;pic18f2550.h: 8039: unsigned STKFUL :1;\n[; ;pic18f2550.h: 8040: };\n[; ;pic18f2550.h: 8041: struct {\n[; ;pic18f2550.h: 8042: unsigned STKPTR0 :1;\n[; ;pic18f2550.h: 8043: unsigned STKPTR1 :1;\n[; ;pic18f2550.h: 8044: unsigned STKPTR2 :1;\n[; ;pic18f2550.h: 8045: unsigned STKPTR3 :1;\n[; ;pic18f2550.h: 8046: unsigned STKPTR4 :1;\n[; ;pic18f2550.h: 8047: };\n[; ;pic18f2550.h: 8048: struct {\n[; ;pic18f2550.h: 8049: unsigned :7;\n[; ;pic18f2550.h: 8050: unsigned STKOVF :1;\n[; ;pic18f2550.h: 8051: };\n[; ;pic18f2550.h: 8052: } STKPTRbits_t;\n[; ;pic18f2550.h: 8053: extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n[; ;pic18f2550.h: 8103: extern volatile unsigned short long TOS @ 0xFFD;\n\"8106\n[; ;pic18f2550.h: 8106: asm(\"TOS equ 0FFDh\");\n[; <\" TOS equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8110: extern volatile unsigned char TOSL @ 0xFFD;\n\"8112\n[; ;pic18f2550.h: 8112: asm(\"TOSL equ 0FFDh\");\n[; <\" TOSL equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8116: extern volatile unsigned char TOSH @ 0xFFE;\n\"8118\n[; ;pic18f2550.h: 8118: asm(\"TOSH equ 0FFEh\");\n[; <\" TOSH equ 0FFEh ;# \">\n[; ;pic18f2550.h: 8122: extern volatile unsigned char TOSU @ 0xFFF;\n\"8124\n[; ;pic18f2550.h: 8124: asm(\"TOSU equ 0FFFh\");\n[; <\" TOSU equ 0FFFh ;# \">\n[; ;pic18f2550.h: 8134: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n[; ;pic18f2550.h: 8136: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n[; ;pic18f2550.h: 8138: extern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n[; ;pic18f2550.h: 8140: extern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n[; ;pic18f2550.h: 8142: extern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n[; ;pic18f2550.h: 8144: extern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n[; ;pic18f2550.h: 8146: extern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n[; ;pic18f2550.h: 8148: extern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n[; ;pic18f2550.h: 8150: extern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n[; ;pic18f2550.h: 8152: extern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n[; ;pic18f2550.h: 8154: extern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n[; ;pic18f2550.h: 8156: extern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n[; ;pic18f2550.h: 8158: extern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n[; ;pic18f2550.h: 8160: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8162: extern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n[; ;pic18f2550.h: 8164: extern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n[; ;pic18f2550.h: 8166: extern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n[; ;pic18f2550.h: 8168: extern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n[; ;pic18f2550.h: 8170: extern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n[; ;pic18f2550.h: 8172: extern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n[; ;pic18f2550.h: 8174: extern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n[; ;pic18f2550.h: 8176: extern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8178: extern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n[; ;pic18f2550.h: 8180: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n[; ;pic18f2550.h: 8182: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n[; ;pic18f2550.h: 8184: extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n[; ;pic18f2550.h: 8186: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n[; ;pic18f2550.h: 8188: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 8190: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 8192: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 8194: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 8196: extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8198: extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n[; ;pic18f2550.h: 8200: extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n[; ;pic18f2550.h: 8202: extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n[; ;pic18f2550.h: 8204: extern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n[; ;pic18f2550.h: 8206: extern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8208: extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8210: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n[; ;pic18f2550.h: 8212: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8214: extern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8216: extern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n[; ;pic18f2550.h: 8218: extern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n[; ;pic18f2550.h: 8220: extern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n[; ;pic18f2550.h: 8222: extern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n[; ;pic18f2550.h: 8224: extern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n[; ;pic18f2550.h: 8226: extern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n[; ;pic18f2550.h: 8228: extern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n[; ;pic18f2550.h: 8230: extern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n[; ;pic18f2550.h: 8232: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n[; ;pic18f2550.h: 8234: extern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8236: extern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8238: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n[; ;pic18f2550.h: 8240: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n[; ;pic18f2550.h: 8242: extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n[; ;pic18f2550.h: 8244: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n[; ;pic18f2550.h: 8246: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n[; ;pic18f2550.h: 8248: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n[; ;pic18f2550.h: 8250: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n[; ;pic18f2550.h: 8252: extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8254: extern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8256: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n[; ;pic18f2550.h: 8258: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n[; ;pic18f2550.h: 8260: extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n[; ;pic18f2550.h: 8262: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n[; ;pic18f2550.h: 8264: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n[; ;pic18f2550.h: 8266: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n[; ;pic18f2550.h: 8268: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n[; ;pic18f2550.h: 8270: extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 8272: extern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8274: extern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8276: extern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8278: extern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8280: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8282: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n[; ;pic18f2550.h: 8284: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n[; ;pic18f2550.h: 8286: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n[; ;pic18f2550.h: 8288: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n[; ;pic18f2550.h: 8290: extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8292: extern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n[; ;pic18f2550.h: 8294: extern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 8296: extern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n[; ;pic18f2550.h: 8298: extern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n[; ;pic18f2550.h: 8300: extern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8302: extern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8304: extern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8306: extern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8308: extern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8310: extern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8312: extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n[; ;pic18f2550.h: 8314: extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n[; ;pic18f2550.h: 8316: extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n[; ;pic18f2550.h: 8318: extern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n[; ;pic18f2550.h: 8320: extern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n[; ;pic18f2550.h: 8322: extern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n[; ;pic18f2550.h: 8324: extern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n[; ;pic18f2550.h: 8326: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n[; ;pic18f2550.h: 8328: extern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8330: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8332: extern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8334: extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n[; ;pic18f2550.h: 8336: extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n[; ;pic18f2550.h: 8338: extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n[; ;pic18f2550.h: 8340: extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n[; ;pic18f2550.h: 8342: extern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8344: extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n[; ;pic18f2550.h: 8346: extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8348: extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8350: extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n[; ;pic18f2550.h: 8352: extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8354: extern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8356: extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8358: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n[; ;pic18f2550.h: 8360: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n[; ;pic18f2550.h: 8362: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n[; ;pic18f2550.h: 8364: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n[; ;pic18f2550.h: 8366: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n[; ;pic18f2550.h: 8368: extern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n[; ;pic18f2550.h: 8370: extern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n[; ;pic18f2550.h: 8372: extern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n[; ;pic18f2550.h: 8374: extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8376: extern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 8378: extern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8380: extern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8382: extern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8384: extern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n[; ;pic18f2550.h: 8386: extern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n[; ;pic18f2550.h: 8388: extern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n[; ;pic18f2550.h: 8390: extern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n[; ;pic18f2550.h: 8392: extern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8394: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n[; ;pic18f2550.h: 8396: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n[; ;pic18f2550.h: 8398: extern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n[; ;pic18f2550.h: 8400: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n[; ;pic18f2550.h: 8402: extern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n[; ;pic18f2550.h: 8404: extern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n[; ;pic18f2550.h: 8406: extern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n[; ;pic18f2550.h: 8408: extern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n[; ;pic18f2550.h: 8410: extern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8412: extern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8414: extern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8416: extern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8418: extern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8420: extern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8422: extern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8424: extern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8426: extern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8428: extern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8430: extern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8432: extern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8434: extern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8436: extern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8438: extern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8440: extern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8442: extern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8444: extern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8446: extern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8448: extern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8450: extern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8452: extern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8454: extern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8456: extern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8458: extern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8460: extern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8462: extern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8464: extern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8466: extern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8468: extern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8470: extern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8472: extern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8474: extern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8476: extern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8478: extern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8480: extern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8482: extern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8484: extern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8486: extern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8488: extern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8490: extern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8492: extern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8494: extern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n[; ;pic18f2550.h: 8496: extern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n[; ;pic18f2550.h: 8498: extern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n[; ;pic18f2550.h: 8500: extern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n[; ;pic18f2550.h: 8502: extern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n[; ;pic18f2550.h: 8504: extern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n[; ;pic18f2550.h: 8506: extern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8508: extern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8510: extern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8512: extern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8514: extern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8516: extern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8518: extern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n[; ;pic18f2550.h: 8520: extern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n[; ;pic18f2550.h: 8522: extern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8524: extern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8526: extern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n[; ;pic18f2550.h: 8528: extern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n[; ;pic18f2550.h: 8530: extern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n[; ;pic18f2550.h: 8532: extern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n[; ;pic18f2550.h: 8534: extern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n[; ;pic18f2550.h: 8536: extern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n[; ;pic18f2550.h: 8538: extern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8540: extern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8542: extern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8544: extern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8546: extern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8548: extern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8550: extern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n[; ;pic18f2550.h: 8552: extern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n[; ;pic18f2550.h: 8554: extern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8556: extern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8558: extern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n[; ;pic18f2550.h: 8560: extern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n[; ;pic18f2550.h: 8562: extern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n[; ;pic18f2550.h: 8564: extern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n[; ;pic18f2550.h: 8566: extern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n[; ;pic18f2550.h: 8568: extern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n[; ;pic18f2550.h: 8570: extern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8572: extern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8574: extern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8576: extern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8578: extern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8580: extern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8582: extern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n[; ;pic18f2550.h: 8584: extern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n[; ;pic18f2550.h: 8586: extern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8588: extern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8590: extern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n[; ;pic18f2550.h: 8592: extern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n[; ;pic18f2550.h: 8594: extern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n[; ;pic18f2550.h: 8596: extern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n[; ;pic18f2550.h: 8598: extern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n[; ;pic18f2550.h: 8600: extern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n[; ;pic18f2550.h: 8602: extern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8604: extern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8606: extern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8608: extern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8610: extern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8612: extern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8614: extern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n[; ;pic18f2550.h: 8616: extern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n[; ;pic18f2550.h: 8618: extern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8620: extern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8622: extern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n[; ;pic18f2550.h: 8624: extern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n[; ;pic18f2550.h: 8626: extern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n[; ;pic18f2550.h: 8628: extern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n[; ;pic18f2550.h: 8630: extern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n[; ;pic18f2550.h: 8632: extern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n[; ;pic18f2550.h: 8634: extern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8636: extern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8638: extern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8640: extern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8642: extern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8644: extern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8646: extern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n[; ;pic18f2550.h: 8648: extern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n[; ;pic18f2550.h: 8650: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n[; ;pic18f2550.h: 8652: extern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8654: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n[; ;pic18f2550.h: 8656: extern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n[; ;pic18f2550.h: 8658: extern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n[; ;pic18f2550.h: 8660: extern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n[; ;pic18f2550.h: 8662: extern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n[; ;pic18f2550.h: 8664: extern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n[; ;pic18f2550.h: 8666: extern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n[; ;pic18f2550.h: 8668: extern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n[; ;pic18f2550.h: 8670: extern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n[; ;pic18f2550.h: 8672: extern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n[; ;pic18f2550.h: 8674: extern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n[; ;pic18f2550.h: 8676: extern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n[; ;pic18f2550.h: 8678: extern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n[; ;pic18f2550.h: 8680: extern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n[; ;pic18f2550.h: 8682: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8684: extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8686: extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8688: extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8690: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8692: extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8694: extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8696: extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8698: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8700: extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8702: extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8704: extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8706: extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8708: extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8710: extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8712: extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8714: extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8716: extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8718: extern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8720: extern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8722: extern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 8724: extern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 8726: extern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n[; ;pic18f2550.h: 8728: extern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n[; ;pic18f2550.h: 8730: extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n[; ;pic18f2550.h: 8732: extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 8734: extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8736: extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8738: extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8740: extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8742: extern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 8744: extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8746: extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8748: extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8750: extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8752: extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8754: extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8756: extern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 8758: extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8760: extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8762: extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8764: extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8766: extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8768: extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8770: extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n[; ;pic18f2550.h: 8772: extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n[; ;pic18f2550.h: 8774: extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n[; ;pic18f2550.h: 8776: extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n[; ;pic18f2550.h: 8778: extern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8780: extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8782: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n[; ;pic18f2550.h: 8784: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n[; ;pic18f2550.h: 8786: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n[; ;pic18f2550.h: 8788: extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8790: extern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8792: extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8794: extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8796: extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8798: extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8800: extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8802: extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8804: extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8806: extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8808: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8810: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8812: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8814: extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8816: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8818: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8820: extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8822: extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8824: extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8826: extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8828: extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8830: extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8832: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8834: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8836: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8838: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8840: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8842: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8844: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8846: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8848: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8850: extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8852: extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8854: extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8856: extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8858: extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8860: extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8862: extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8864: extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8866: extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8868: extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8870: extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8872: extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n[; ;pic18f2550.h: 8874: extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n[; ;pic18f2550.h: 8876: extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n[; ;pic18f2550.h: 8878: extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8880: extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8882: extern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8884: extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8886: extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8888: extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8890: extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8892: extern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8894: extern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8896: extern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8898: extern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8900: extern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8902: extern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8904: extern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8906: extern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8908: extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n[; ;pic18f2550.h: 8910: extern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8912: extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8914: extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8916: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8918: extern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8920: extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8922: extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 8924: extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 8926: extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 8928: extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 8930: extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 8932: extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 8934: extern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8936: extern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8938: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n[; ;pic18f2550.h: 8940: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 8942: extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n[; ;pic18f2550.h: 8944: extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n[; ;pic18f2550.h: 8946: extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n[; ;pic18f2550.h: 8948: extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n[; ;pic18f2550.h: 8950: extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8952: extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8954: extern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8956: extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8958: extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8960: extern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8962: extern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8964: extern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8966: extern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8968: extern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8970: extern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 8972: extern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8974: extern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n[; ;pic18f2550.h: 8976: extern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n[; ;pic18f2550.h: 8978: extern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n[; ;pic18f2550.h: 8980: extern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8982: extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8984: extern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 8986: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8988: extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8990: extern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n[; ;pic18f2550.h: 8992: extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 8994: extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 8996: extern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 8998: extern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n[; ;pic18f2550.h: 9000: extern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n[; ;pic18f2550.h: 9002: extern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n[; ;pic18f2550.h: 9004: extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9006: extern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9008: extern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9010: extern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n[; ;pic18f2550.h: 9012: extern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n[; ;pic18f2550.h: 9014: extern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n[; ;pic18f2550.h: 9016: extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n[; ;pic18f2550.h: 9018: extern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n[; ;pic18f2550.h: 9020: extern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n[; ;pic18f2550.h: 9022: extern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9024: extern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 9026: extern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9028: extern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9030: extern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9032: extern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 9034: extern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 9036: extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9038: extern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 9040: extern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 9042: extern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 9044: extern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 9046: extern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n[; ;pic18f2550.h: 9048: extern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 9050: extern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 9052: extern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 9054: extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n[; ;pic18f2550.h: 9056: extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n[; ;pic18f2550.h: 9058: extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n[; ;pic18f2550.h: 9060: extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9062: extern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9064: extern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9066: extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9068: extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9070: extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9072: extern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 9074: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n[; ;pic18f2550.h: 9076: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n[; ;pic18f2550.h: 9078: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n[; ;pic18f2550.h: 9080: extern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9082: extern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9084: extern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n[; ;pic18f2550.h: 9086: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9088: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9090: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9092: extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9094: extern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9096: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n[; ;pic18f2550.h: 9098: extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9100: extern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9102: extern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9104: extern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9106: extern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 9108: extern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 9110: extern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 9112: extern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 9114: extern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 9116: extern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 9118: extern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9120: extern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n[; ;pic18f2550.h: 9122: extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9124: extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9126: extern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n[; ;pic18f2550.h: 9128: extern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9130: extern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9132: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n[; ;pic18f2550.h: 9134: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n[; ;pic18f2550.h: 9136: extern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9138: extern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9140: extern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9142: extern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9144: extern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9146: extern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n[; ;pic18f2550.h: 9148: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9150: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n[; ;pic18f2550.h: 9152: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n[; ;pic18f2550.h: 9154: extern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n[; ;pic18f2550.h: 9156: extern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n[; ;pic18f2550.h: 9158: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9160: extern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9162: extern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n[; ;pic18f2550.h: 9164: extern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n[; ;pic18f2550.h: 9166: extern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n[; ;pic18f2550.h: 9168: extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9170: extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9172: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n[; ;pic18f2550.h: 9174: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9176: extern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9178: extern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n[; ;pic18f2550.h: 9180: extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n[; ;pic18f2550.h: 9182: extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n[; ;pic18f2550.h: 9184: extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n[; ;pic18f2550.h: 9186: extern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n[; ;pic18f2550.h: 9188: extern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n[; ;pic18f2550.h: 9190: extern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n[; ;pic18f2550.h: 9192: extern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n[; ;pic18f2550.h: 9194: extern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n[; ;pic18f2550.h: 9196: extern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n[; ;pic18f2550.h: 9198: extern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n[; ;pic18f2550.h: 9200: extern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 9202: extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9204: extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9206: extern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n[; ;pic18f2550.h: 9208: extern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n[; ;pic18f2550.h: 9210: extern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n[; ;pic18f2550.h: 9212: extern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n[; ;pic18f2550.h: 9214: extern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n[; ;pic18f2550.h: 9216: extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n[; ;pic18f2550.h: 9218: extern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 9220: extern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n[; ;pic18f2550.h: 9222: extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9224: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9226: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9228: extern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9230: extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n[; ;pic18f2550.h: 9232: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9234: extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n[; ;pic18f2550.h: 9236: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9238: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9240: extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9242: extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n[; ;pic18f2550.h: 9244: extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n[; ;pic18f2550.h: 9246: extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n[; ;pic18f2550.h: 9248: extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n[; ;pic18f2550.h: 9250: extern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9252: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n[; ;pic18f2550.h: 9254: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n[; ;pic18f2550.h: 9256: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9258: extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9260: extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9262: extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n[; ;pic18f2550.h: 9264: extern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n[; ;pic18f2550.h: 9266: extern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9268: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n[; ;pic18f2550.h: 9270: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n[; ;pic18f2550.h: 9272: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9274: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9276: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9278: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9280: extern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9282: extern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n[; ;pic18f2550.h: 9284: extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n[; ;pic18f2550.h: 9286: extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n[; ;pic18f2550.h: 9288: extern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9290: extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9292: extern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9294: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9296: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9298: extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9300: extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n[; ;pic18f2550.h: 9302: extern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n[; ;pic18f2550.h: 9304: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n[; ;pic18f2550.h: 9306: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n[; ;pic18f2550.h: 9308: extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n[; ;pic18f2550.h: 9310: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n[; ;pic18f2550.h: 9312: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n[; ;pic18f2550.h: 9314: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n[; ;pic18f2550.h: 9316: extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n[; ;pic18f2550.h: 9318: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n[; ;pic18f2550.h: 9320: extern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n[; ;pic18f2550.h: 9322: extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n[; ;pic18f2550.h: 9324: extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n[; ;pic18f2550.h: 9326: extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n[; ;pic18f2550.h: 9328: extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n[; ;pic18f2550.h: 9330: extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9332: extern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9334: extern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9336: extern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9338: extern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9340: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n[; ;pic18f2550.h: 9342: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n[; ;pic18f2550.h: 9344: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n[; ;pic18f2550.h: 9346: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n[; ;pic18f2550.h: 9348: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n[; ;pic18f2550.h: 9350: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n[; ;pic18f2550.h: 9352: extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n[; ;pic18f2550.h: 9354: extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n[; ;pic18f2550.h: 9356: extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n[; ;pic18f2550.h: 9358: extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n[; ;pic18f2550.h: 9360: extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n[; ;pic18f2550.h: 9362: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n[; ;pic18f2550.h: 9364: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n[; ;pic18f2550.h: 9366: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n[; ;pic18f2550.h: 9368: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n[; ;pic18f2550.h: 9370: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n[; ;pic18f2550.h: 9372: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n[; ;pic18f2550.h: 9374: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n[; ;pic18f2550.h: 9376: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n[; ;pic18f2550.h: 9378: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n[; ;pic18f2550.h: 9380: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n[; ;pic18f2550.h: 9382: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9384: extern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9386: extern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n[; ;pic18f2550.h: 9388: extern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n[; ;pic18f2550.h: 9390: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n[; ;pic18f2550.h: 9392: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n[; ;pic18f2550.h: 9394: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n[; ;pic18f2550.h: 9396: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n[; ;pic18f2550.h: 9398: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n[; ;pic18f2550.h: 9400: extern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9402: extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9404: extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9406: extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9408: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9410: extern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9412: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9414: extern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9416: extern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9418: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9420: extern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9422: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9424: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9426: extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9428: extern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n[; ;pic18f2550.h: 9430: extern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n[; ;pic18f2550.h: 9432: extern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n[; ;pic18f2550.h: 9434: extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9436: extern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n[; ;pic18f2550.h: 9438: extern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9440: extern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9442: extern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n[; ;pic18f2550.h: 9444: extern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n[; ;pic18f2550.h: 9446: extern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n[; ;pic18f2550.h: 9448: extern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n[; ;pic18f2550.h: 9450: extern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n[; ;pic18f2550.h: 9452: extern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n[; ;pic18f2550.h: 9454: extern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n[; ;pic18f2550.h: 9456: extern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n[; ;pic18f2550.h: 9458: extern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n[; ;pic18f2550.h: 9460: extern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9462: extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9464: extern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9466: extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9468: extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n[; ;pic18f2550.h: 9470: extern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9472: extern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9474: extern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9476: extern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n[; ;pic18f2550.h: 9478: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n[; ;pic18f2550.h: 9480: extern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9482: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n[; ;pic18f2550.h: 9484: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n[; ;pic18f2550.h: 9486: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9488: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n[; ;pic18f2550.h: 9490: extern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9492: extern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9494: extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 9496: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 9498: extern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 9500: extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 9502: extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9504: extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9506: extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9508: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9510: extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9512: extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9514: extern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9516: extern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;adc.h: 2008: union ADCResult\n[; ;adc.h: 2009: {\n[; ;adc.h: 2010: int lr;\n[; ;adc.h: 2011: char br[2];\n[; ;adc.h: 2012: };\n[; ;adc.h: 2014: char BusyADC (void);\n[; ;adc.h: 2016: void ConvertADC (void);\n[; ;adc.h: 2018: void CloseADC(void);\n[; ;adc.h: 2026: int ReadADC(void);\n[; ;adc.h: 2040: void OpenADC ( unsigned char ,\n[; ;adc.h: 2041: unsigned char ,\n[; ;adc.h: 2042: unsigned char );\n[; ;adc.h: 2084: void SetChanADC(unsigned char );\n[; ;adc.h: 2100: void SelChanConvADC( unsigned char );\n[; ;ancomp.h: 38: void Close_ancomp( void );\n[; ;ancomp.h: 39: void Open_ancomp(unsigned char config);\n[; ;spi.h: 584: void OpenSPI( unsigned char sync_mode,\n[; ;spi.h: 585: unsigned char bus_mode,\n[; ;spi.h: 586: unsigned char smp_phase );\n[; ;spi.h: 588: signed char WriteSPI( unsigned char data_out );\n[; ;spi.h: 590: void getsSPI( unsigned char *rdptr, unsigned char length );\n[; ;spi.h: 592: void putsSPI( unsigned char *wrptr );\n[; ;spi.h: 594: unsigned char ReadSPI( void );\n[; ;can2510.h: 414: void CAN2510Initialize(  unsigned int configuration,\n[; ;can2510.h: 415: unsigned char brp,\n[; ;can2510.h: 416: unsigned char interruptFlags,\n[; ;can2510.h: 417: unsigned char SPI_syncMode,\n[; ;can2510.h: 418: unsigned char SPI_busMode,\n[; ;can2510.h: 419: unsigned char SPI_smpPhase );\n[; ;can2510.h: 421: signed char CAN2510Init(  unsigned long BufferConfig,\n[; ;can2510.h: 422: unsigned long BitTimeConfig,\n[; ;can2510.h: 423: unsigned char interruptEnables,\n[; ;can2510.h: 424: unsigned char SPI_syncMode,\n[; ;can2510.h: 425: unsigned char SPI_busMode,\n[; ;can2510.h: 426: unsigned char SPI_smpPhase );\n[; ;can2510.h: 428: void CAN2510Enable( void );\n[; ;can2510.h: 430: void CAN2510Disable( void );\n[; ;can2510.h: 432: void CAN2510Reset( void );\n[; ;can2510.h: 434: void CAN2510SetMode(  unsigned char mode );\n[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );\n[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );\n[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );\n[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );\n[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );\n[; ;can2510.h: 446: unsigned char CAN2510ByteRead(  unsigned char addr );\n[; ;can2510.h: 448: void CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n[; ;can2510.h: 450: void CAN2510SequentialRead(  unsigned char *DataArray,\n[; ;can2510.h: 451: unsigned char CAN2510addr,\n[; ;can2510.h: 452: unsigned char numbytes );\n[; ;can2510.h: 454: void CAN2510SequentialWrite(  unsigned char *DataArray,\n[; ;can2510.h: 455: unsigned char CAN2510addr,\n[; ;can2510.h: 456: unsigned char numbytes );\n[; ;can2510.h: 458: void CAN2510BitModify(  unsigned char address,\n[; ;can2510.h: 459: unsigned char mask,\n[; ;can2510.h: 460: unsigned char data );\n[; ;can2510.h: 462: void CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n[; ;can2510.h: 466: void CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n[; ;can2510.h: 470: signed char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n[; ;can2510.h: 471: unsigned int mask,\n[; ;can2510.h: 472: unsigned int *filters );\n[; ;can2510.h: 474: signed char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n[; ;can2510.h: 475: unsigned long mask,\n[; ;can2510.h: 476: unsigned long *filters );\n[; ;can2510.h: 478: signed char CAN2510WriteStd(  unsigned int msgId,\n[; ;can2510.h: 479: unsigned char msgPriority,\n[; ;can2510.h: 480: unsigned char numBytes,\n[; ;can2510.h: 481: unsigned char *data );\n[; ;can2510.h: 483: signed char CAN2510WriteXtd(  unsigned long msgId,\n[; ;can2510.h: 484: unsigned char msgPriority,\n[; ;can2510.h: 485: unsigned char numBytes,\n[; ;can2510.h: 486: unsigned char *data );\n[; ;can2510.h: 488: void CAN2510LoadBufferStd(  unsigned char bufferNum,\n[; ;can2510.h: 489: unsigned int msgId,\n[; ;can2510.h: 490: unsigned char numBytes,\n[; ;can2510.h: 491: unsigned char *data );\n[; ;can2510.h: 493: void CAN2510LoadBufferXtd(  unsigned char bufferNum,\n[; ;can2510.h: 494: unsigned long msgId,\n[; ;can2510.h: 495: unsigned char numBytes,\n[; ;can2510.h: 496: unsigned char *data );\n[; ;can2510.h: 498: void CAN2510LoadRTRStd(  unsigned char bufferNum,\n[; ;can2510.h: 499: unsigned int msgId,\n[; ;can2510.h: 500: unsigned char numBytes );\n[; ;can2510.h: 502: void CAN2510LoadRTRXtd(  unsigned char bufferNum,\n[; ;can2510.h: 503: unsigned long msgId,\n[; ;can2510.h: 504: unsigned char numBytes );\n[; ;can2510.h: 506: void CAN2510SetBufferPriority(  unsigned char bufferNum,\n[; ;can2510.h: 507: unsigned char bufferPriority );\n[; ;can2510.h: 509: void CAN2510SendBuffer(  unsigned char bufferNumber );\n[; ;can2510.h: 511: signed char CAN2510WriteBuffer(  unsigned char bufferNum );\n[; ;can2510.h: 513: unsigned char CAN2510DataReady(  unsigned char bufferNum );\n[; ;can2510.h: 515: unsigned char CAN2510DataRead(  unsigned char bufferNum,\n[; ;can2510.h: 516: unsigned long *msgId,\n[; ;can2510.h: 517: unsigned char *numBytes,\n[; ;can2510.h: 518: unsigned char *data );\n[; ;capture.h: 64: union capstatus\n[; ;capture.h: 65: {\n[; ;capture.h: 73: struct\n[; ;capture.h: 74: {\n[; ;capture.h: 77: unsigned Cap1OVF:1;\n[; ;capture.h: 82: unsigned Cap2OVF:1;\n[; ;capture.h: 115: };\n[; ;capture.h: 117: unsigned :8;\n[; ;capture.h: 119: };\n[; ;capture.h: 121: extern union capstatus CapStatus;\n[; ;capture.h: 123: union CapResult\n[; ;capture.h: 124: {\n[; ;capture.h: 125: unsigned int lc;\n[; ;capture.h: 126: char bc[2];\n[; ;capture.h: 127: };\n[; ;capture.h: 474: void OpenCapture1 ( unsigned char config);\n[; ;capture.h: 475: unsigned int ReadCapture1 (void);\n[; ;capture.h: 476: void CloseCapture1 (void);\n[; ;capture.h: 484: void OpenCapture2 ( unsigned char config);\n[; ;capture.h: 485: unsigned int ReadCapture2 (void);\n[; ;capture.h: 486: void CloseCapture2 (void);\n[; ;compare.h: 385: void OpenCompare1(unsigned char config,unsigned int period);\n[; ;compare.h: 386: void CloseCompare1(void);\n[; ;compare.h: 392: void OpenCompare2(unsigned char config, unsigned int period);\n[; ;compare.h: 393: void CloseCompare2(void);\n[; ;EEP.h: 36: void Busy_eep ( void );\n[; ;EEP.h: 37: unsigned char Read_b_eep( unsigned int badd );\n[; ;EEP.h: 38: void Write_b_eep( unsigned int badd, unsigned char bdata );\n[; ;stddef.h: 2: typedef int ptrdiff_t;\n[; ;stddef.h: 3: typedef unsigned size_t;\n[; ;stddef.h: 4: typedef unsigned short wchar_t;\n[; ;stddef.h: 13: extern int errno;\n[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;\n[; ;GenericTypeDefs.h: 75: typedef signed int INT;\n[; ;GenericTypeDefs.h: 76: typedef signed char INT8;\n[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;\n[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;\n[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;\n[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;\n[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;\n[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;\n[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;\n[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;\n[; ;GenericTypeDefs.h: 99: typedef union\n[; ;GenericTypeDefs.h: 100: {\n[; ;GenericTypeDefs.h: 101: UINT8 Val;\n[; ;GenericTypeDefs.h: 102: struct\n[; ;GenericTypeDefs.h: 103: {\n[; ;GenericTypeDefs.h: 104: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 105: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 106: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 107: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 108: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 109: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 110: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 111: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 112: } bits;\n[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;\n[; ;GenericTypeDefs.h: 115: typedef union\n[; ;GenericTypeDefs.h: 116: {\n[; ;GenericTypeDefs.h: 117: UINT16 Val;\n[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;\n[; ;GenericTypeDefs.h: 119: struct \n[; ;GenericTypeDefs.h: 120: {\n[; ;GenericTypeDefs.h: 121: UINT8 LB;\n[; ;GenericTypeDefs.h: 122: UINT8 HB;\n[; ;GenericTypeDefs.h: 123: } byte;\n[; ;GenericTypeDefs.h: 124: struct \n[; ;GenericTypeDefs.h: 125: {\n[; ;GenericTypeDefs.h: 126: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 127: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 128: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 129: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 130: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 131: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 132: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 133: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 134: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 135: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 136: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 137: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 138: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 139: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 140: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 141: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 142: } bits;\n[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;\n[; ;GenericTypeDefs.h: 187: typedef union\n[; ;GenericTypeDefs.h: 188: {\n[; ;GenericTypeDefs.h: 189: UINT32 Val;\n[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;\n[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;\n[; ;GenericTypeDefs.h: 192: struct \n[; ;GenericTypeDefs.h: 193: {\n[; ;GenericTypeDefs.h: 194: UINT16 LW;\n[; ;GenericTypeDefs.h: 195: UINT16 HW;\n[; ;GenericTypeDefs.h: 196: } word;\n[; ;GenericTypeDefs.h: 197: struct \n[; ;GenericTypeDefs.h: 198: {\n[; ;GenericTypeDefs.h: 199: UINT8 LB;\n[; ;GenericTypeDefs.h: 200: UINT8 HB;\n[; ;GenericTypeDefs.h: 201: UINT8 UB;\n[; ;GenericTypeDefs.h: 202: UINT8 MB;\n[; ;GenericTypeDefs.h: 203: } byte;\n[; ;GenericTypeDefs.h: 204: struct \n[; ;GenericTypeDefs.h: 205: {\n[; ;GenericTypeDefs.h: 206: UINT16_VAL low;\n[; ;GenericTypeDefs.h: 207: UINT16_VAL high;\n[; ;GenericTypeDefs.h: 208: }wordUnion;\n[; ;GenericTypeDefs.h: 209: struct \n[; ;GenericTypeDefs.h: 210: {\n[; ;GenericTypeDefs.h: 211: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 212: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 213: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 214: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 215: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 216: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 217: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 218: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 219: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 220: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 221: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 222: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 223: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 224: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 225: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 226: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 227: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 228: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 229: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 230: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 231: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 232: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 233: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 234: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 235: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 236: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 237: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 238: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 239: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 240: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 241: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 242: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 243: } bits;\n[; ;GenericTypeDefs.h: 244: } UINT32_VAL;\n[; ;GenericTypeDefs.h: 248: typedef union\n[; ;GenericTypeDefs.h: 249: {\n[; ;GenericTypeDefs.h: 250: UINT64 Val;\n[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;\n[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;\n[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;\n[; ;GenericTypeDefs.h: 254: struct \n[; ;GenericTypeDefs.h: 255: {\n[; ;GenericTypeDefs.h: 256: UINT32 LD;\n[; ;GenericTypeDefs.h: 257: UINT32 HD;\n[; ;GenericTypeDefs.h: 258: } dword;\n[; ;GenericTypeDefs.h: 259: struct \n[; ;GenericTypeDefs.h: 260: {\n[; ;GenericTypeDefs.h: 261: UINT16 LW;\n[; ;GenericTypeDefs.h: 262: UINT16 HW;\n[; ;GenericTypeDefs.h: 263: UINT16 UW;\n[; ;GenericTypeDefs.h: 264: UINT16 MW;\n[; ;GenericTypeDefs.h: 265: } word;\n[; ;GenericTypeDefs.h: 266: struct \n[; ;GenericTypeDefs.h: 267: {\n[; ;GenericTypeDefs.h: 268: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 269: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 270: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 271: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 272: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 273: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 274: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 275: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 276: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 277: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 278: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 279: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 280: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 281: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 282: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 283: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 284: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 285: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 286: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 287: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 288: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 289: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 290: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 291: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 292: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 293: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 294: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 295: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 296: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 297: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 298: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 299: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 300: UINT8 b32:1;\n[; ;GenericTypeDefs.h: 301: UINT8 b33:1;\n[; ;GenericTypeDefs.h: 302: UINT8 b34:1;\n[; ;GenericTypeDefs.h: 303: UINT8 b35:1;\n[; ;GenericTypeDefs.h: 304: UINT8 b36:1;\n[; ;GenericTypeDefs.h: 305: UINT8 b37:1;\n[; ;GenericTypeDefs.h: 306: UINT8 b38:1;\n[; ;GenericTypeDefs.h: 307: UINT8 b39:1;\n[; ;GenericTypeDefs.h: 308: UINT8 b40:1;\n[; ;GenericTypeDefs.h: 309: UINT8 b41:1;\n[; ;GenericTypeDefs.h: 310: UINT8 b42:1;\n[; ;GenericTypeDefs.h: 311: UINT8 b43:1;\n[; ;GenericTypeDefs.h: 312: UINT8 b44:1;\n[; ;GenericTypeDefs.h: 313: UINT8 b45:1;\n[; ;GenericTypeDefs.h: 314: UINT8 b46:1;\n[; ;GenericTypeDefs.h: 315: UINT8 b47:1;\n[; ;GenericTypeDefs.h: 316: UINT8 b48:1;\n[; ;GenericTypeDefs.h: 317: UINT8 b49:1;\n[; ;GenericTypeDefs.h: 318: UINT8 b50:1;\n[; ;GenericTypeDefs.h: 319: UINT8 b51:1;\n[; ;GenericTypeDefs.h: 320: UINT8 b52:1;\n[; ;GenericTypeDefs.h: 321: UINT8 b53:1;\n[; ;GenericTypeDefs.h: 322: UINT8 b54:1;\n[; ;GenericTypeDefs.h: 323: UINT8 b55:1;\n[; ;GenericTypeDefs.h: 324: UINT8 b56:1;\n[; ;GenericTypeDefs.h: 325: UINT8 b57:1;\n[; ;GenericTypeDefs.h: 326: UINT8 b58:1;\n[; ;GenericTypeDefs.h: 327: UINT8 b59:1;\n[; ;GenericTypeDefs.h: 328: UINT8 b60:1;\n[; ;GenericTypeDefs.h: 329: UINT8 b61:1;\n[; ;GenericTypeDefs.h: 330: UINT8 b62:1;\n[; ;GenericTypeDefs.h: 331: UINT8 b63:1;\n[; ;GenericTypeDefs.h: 332: } bits;\n[; ;GenericTypeDefs.h: 333: } UINT64_VAL;\n[; ;GenericTypeDefs.h: 339: typedef void VOID;\n[; ;GenericTypeDefs.h: 341: typedef char CHAR8;\n[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;\n[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;\n[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;\n[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;\n[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;\n[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;\n[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;\n[; ;GenericTypeDefs.h: 352: typedef signed long LONG;\n[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;\n[; ;GenericTypeDefs.h: 356: typedef union\n[; ;GenericTypeDefs.h: 357: {\n[; ;GenericTypeDefs.h: 358: BYTE Val;\n[; ;GenericTypeDefs.h: 359: struct \n[; ;GenericTypeDefs.h: 360: {\n[; ;GenericTypeDefs.h: 361: BYTE b0:1;\n[; ;GenericTypeDefs.h: 362: BYTE b1:1;\n[; ;GenericTypeDefs.h: 363: BYTE b2:1;\n[; ;GenericTypeDefs.h: 364: BYTE b3:1;\n[; ;GenericTypeDefs.h: 365: BYTE b4:1;\n[; ;GenericTypeDefs.h: 366: BYTE b5:1;\n[; ;GenericTypeDefs.h: 367: BYTE b6:1;\n[; ;GenericTypeDefs.h: 368: BYTE b7:1;\n[; ;GenericTypeDefs.h: 369: } bits;\n[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;\n[; ;GenericTypeDefs.h: 372: typedef union\n[; ;GenericTypeDefs.h: 373: {\n[; ;GenericTypeDefs.h: 374: WORD Val;\n[; ;GenericTypeDefs.h: 375: BYTE v[2] ;\n[; ;GenericTypeDefs.h: 376: struct \n[; ;GenericTypeDefs.h: 377: {\n[; ;GenericTypeDefs.h: 378: BYTE LB;\n[; ;GenericTypeDefs.h: 379: BYTE HB;\n[; ;GenericTypeDefs.h: 380: } byte;\n[; ;GenericTypeDefs.h: 381: struct \n[; ;GenericTypeDefs.h: 382: {\n[; ;GenericTypeDefs.h: 383: BYTE b0:1;\n[; ;GenericTypeDefs.h: 384: BYTE b1:1;\n[; ;GenericTypeDefs.h: 385: BYTE b2:1;\n[; ;GenericTypeDefs.h: 386: BYTE b3:1;\n[; ;GenericTypeDefs.h: 387: BYTE b4:1;\n[; ;GenericTypeDefs.h: 388: BYTE b5:1;\n[; ;GenericTypeDefs.h: 389: BYTE b6:1;\n[; ;GenericTypeDefs.h: 390: BYTE b7:1;\n[; ;GenericTypeDefs.h: 391: BYTE b8:1;\n[; ;GenericTypeDefs.h: 392: BYTE b9:1;\n[; ;GenericTypeDefs.h: 393: BYTE b10:1;\n[; ;GenericTypeDefs.h: 394: BYTE b11:1;\n[; ;GenericTypeDefs.h: 395: BYTE b12:1;\n[; ;GenericTypeDefs.h: 396: BYTE b13:1;\n[; ;GenericTypeDefs.h: 397: BYTE b14:1;\n[; ;GenericTypeDefs.h: 398: BYTE b15:1;\n[; ;GenericTypeDefs.h: 399: } bits;\n[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;\n[; ;GenericTypeDefs.h: 402: typedef union\n[; ;GenericTypeDefs.h: 403: {\n[; ;GenericTypeDefs.h: 404: DWORD Val;\n[; ;GenericTypeDefs.h: 405: WORD w[2] ;\n[; ;GenericTypeDefs.h: 406: BYTE v[4] ;\n[; ;GenericTypeDefs.h: 407: struct \n[; ;GenericTypeDefs.h: 408: {\n[; ;GenericTypeDefs.h: 409: WORD LW;\n[; ;GenericTypeDefs.h: 410: WORD HW;\n[; ;GenericTypeDefs.h: 411: } word;\n[; ;GenericTypeDefs.h: 412: struct \n[; ;GenericTypeDefs.h: 413: {\n[; ;GenericTypeDefs.h: 414: BYTE LB;\n[; ;GenericTypeDefs.h: 415: BYTE HB;\n[; ;GenericTypeDefs.h: 416: BYTE UB;\n[; ;GenericTypeDefs.h: 417: BYTE MB;\n[; ;GenericTypeDefs.h: 418: } byte;\n[; ;GenericTypeDefs.h: 419: struct \n[; ;GenericTypeDefs.h: 420: {\n[; ;GenericTypeDefs.h: 421: WORD_VAL low;\n[; ;GenericTypeDefs.h: 422: WORD_VAL high;\n[; ;GenericTypeDefs.h: 423: }wordUnion;\n[; ;GenericTypeDefs.h: 424: struct \n[; ;GenericTypeDefs.h: 425: {\n[; ;GenericTypeDefs.h: 426: BYTE b0:1;\n[; ;GenericTypeDefs.h: 427: BYTE b1:1;\n[; ;GenericTypeDefs.h: 428: BYTE b2:1;\n[; ;GenericTypeDefs.h: 429: BYTE b3:1;\n[; ;GenericTypeDefs.h: 430: BYTE b4:1;\n[; ;GenericTypeDefs.h: 431: BYTE b5:1;\n[; ;GenericTypeDefs.h: 432: BYTE b6:1;\n[; ;GenericTypeDefs.h: 433: BYTE b7:1;\n[; ;GenericTypeDefs.h: 434: BYTE b8:1;\n[; ;GenericTypeDefs.h: 435: BYTE b9:1;\n[; ;GenericTypeDefs.h: 436: BYTE b10:1;\n[; ;GenericTypeDefs.h: 437: BYTE b11:1;\n[; ;GenericTypeDefs.h: 438: BYTE b12:1;\n[; ;GenericTypeDefs.h: 439: BYTE b13:1;\n[; ;GenericTypeDefs.h: 440: BYTE b14:1;\n[; ;GenericTypeDefs.h: 441: BYTE b15:1;\n[; ;GenericTypeDefs.h: 442: BYTE b16:1;\n[; ;GenericTypeDefs.h: 443: BYTE b17:1;\n[; ;GenericTypeDefs.h: 444: BYTE b18:1;\n[; ;GenericTypeDefs.h: 445: BYTE b19:1;\n[; ;GenericTypeDefs.h: 446: BYTE b20:1;\n[; ;GenericTypeDefs.h: 447: BYTE b21:1;\n[; ;GenericTypeDefs.h: 448: BYTE b22:1;\n[; ;GenericTypeDefs.h: 449: BYTE b23:1;\n[; ;GenericTypeDefs.h: 450: BYTE b24:1;\n[; ;GenericTypeDefs.h: 451: BYTE b25:1;\n[; ;GenericTypeDefs.h: 452: BYTE b26:1;\n[; ;GenericTypeDefs.h: 453: BYTE b27:1;\n[; ;GenericTypeDefs.h: 454: BYTE b28:1;\n[; ;GenericTypeDefs.h: 455: BYTE b29:1;\n[; ;GenericTypeDefs.h: 456: BYTE b30:1;\n[; ;GenericTypeDefs.h: 457: BYTE b31:1;\n[; ;GenericTypeDefs.h: 458: } bits;\n[; ;GenericTypeDefs.h: 459: } DWORD_VAL;\n[; ;GenericTypeDefs.h: 462: typedef union\n[; ;GenericTypeDefs.h: 463: {\n[; ;GenericTypeDefs.h: 464: QWORD Val;\n[; ;GenericTypeDefs.h: 465: DWORD d[2] ;\n[; ;GenericTypeDefs.h: 466: WORD w[4] ;\n[; ;GenericTypeDefs.h: 467: BYTE v[8] ;\n[; ;GenericTypeDefs.h: 468: struct \n[; ;GenericTypeDefs.h: 469: {\n[; ;GenericTypeDefs.h: 470: DWORD LD;\n[; ;GenericTypeDefs.h: 471: DWORD HD;\n[; ;GenericTypeDefs.h: 472: } dword;\n[; ;GenericTypeDefs.h: 473: struct \n[; ;GenericTypeDefs.h: 474: {\n[; ;GenericTypeDefs.h: 475: WORD LW;\n[; ;GenericTypeDefs.h: 476: WORD HW;\n[; ;GenericTypeDefs.h: 477: WORD UW;\n[; ;GenericTypeDefs.h: 478: WORD MW;\n[; ;GenericTypeDefs.h: 479: } word;\n[; ;GenericTypeDefs.h: 480: struct \n[; ;GenericTypeDefs.h: 481: {\n[; ;GenericTypeDefs.h: 482: BYTE b0:1;\n[; ;GenericTypeDefs.h: 483: BYTE b1:1;\n[; ;GenericTypeDefs.h: 484: BYTE b2:1;\n[; ;GenericTypeDefs.h: 485: BYTE b3:1;\n[; ;GenericTypeDefs.h: 486: BYTE b4:1;\n[; ;GenericTypeDefs.h: 487: BYTE b5:1;\n[; ;GenericTypeDefs.h: 488: BYTE b6:1;\n[; ;GenericTypeDefs.h: 489: BYTE b7:1;\n[; ;GenericTypeDefs.h: 490: BYTE b8:1;\n[; ;GenericTypeDefs.h: 491: BYTE b9:1;\n[; ;GenericTypeDefs.h: 492: BYTE b10:1;\n[; ;GenericTypeDefs.h: 493: BYTE b11:1;\n[; ;GenericTypeDefs.h: 494: BYTE b12:1;\n[; ;GenericTypeDefs.h: 495: BYTE b13:1;\n[; ;GenericTypeDefs.h: 496: BYTE b14:1;\n[; ;GenericTypeDefs.h: 497: BYTE b15:1;\n[; ;GenericTypeDefs.h: 498: BYTE b16:1;\n[; ;GenericTypeDefs.h: 499: BYTE b17:1;\n[; ;GenericTypeDefs.h: 500: BYTE b18:1;\n[; ;GenericTypeDefs.h: 501: BYTE b19:1;\n[; ;GenericTypeDefs.h: 502: BYTE b20:1;\n[; ;GenericTypeDefs.h: 503: BYTE b21:1;\n[; ;GenericTypeDefs.h: 504: BYTE b22:1;\n[; ;GenericTypeDefs.h: 505: BYTE b23:1;\n[; ;GenericTypeDefs.h: 506: BYTE b24:1;\n[; ;GenericTypeDefs.h: 507: BYTE b25:1;\n[; ;GenericTypeDefs.h: 508: BYTE b26:1;\n[; ;GenericTypeDefs.h: 509: BYTE b27:1;\n[; ;GenericTypeDefs.h: 510: BYTE b28:1;\n[; ;GenericTypeDefs.h: 511: BYTE b29:1;\n[; ;GenericTypeDefs.h: 512: BYTE b30:1;\n[; ;GenericTypeDefs.h: 513: BYTE b31:1;\n[; ;GenericTypeDefs.h: 514: BYTE b32:1;\n[; ;GenericTypeDefs.h: 515: BYTE b33:1;\n[; ;GenericTypeDefs.h: 516: BYTE b34:1;\n[; ;GenericTypeDefs.h: 517: BYTE b35:1;\n[; ;GenericTypeDefs.h: 518: BYTE b36:1;\n[; ;GenericTypeDefs.h: 519: BYTE b37:1;\n[; ;GenericTypeDefs.h: 520: BYTE b38:1;\n[; ;GenericTypeDefs.h: 521: BYTE b39:1;\n[; ;GenericTypeDefs.h: 522: BYTE b40:1;\n[; ;GenericTypeDefs.h: 523: BYTE b41:1;\n[; ;GenericTypeDefs.h: 524: BYTE b42:1;\n[; ;GenericTypeDefs.h: 525: BYTE b43:1;\n[; ;GenericTypeDefs.h: 526: BYTE b44:1;\n[; ;GenericTypeDefs.h: 527: BYTE b45:1;\n[; ;GenericTypeDefs.h: 528: BYTE b46:1;\n[; ;GenericTypeDefs.h: 529: BYTE b47:1;\n[; ;GenericTypeDefs.h: 530: BYTE b48:1;\n[; ;GenericTypeDefs.h: 531: BYTE b49:1;\n[; ;GenericTypeDefs.h: 532: BYTE b50:1;\n[; ;GenericTypeDefs.h: 533: BYTE b51:1;\n[; ;GenericTypeDefs.h: 534: BYTE b52:1;\n[; ;GenericTypeDefs.h: 535: BYTE b53:1;\n[; ;GenericTypeDefs.h: 536: BYTE b54:1;\n[; ;GenericTypeDefs.h: 537: BYTE b55:1;\n[; ;GenericTypeDefs.h: 538: BYTE b56:1;\n[; ;GenericTypeDefs.h: 539: BYTE b57:1;\n[; ;GenericTypeDefs.h: 540: BYTE b58:1;\n[; ;GenericTypeDefs.h: 541: BYTE b59:1;\n[; ;GenericTypeDefs.h: 542: BYTE b60:1;\n[; ;GenericTypeDefs.h: 543: BYTE b61:1;\n[; ;GenericTypeDefs.h: 544: BYTE b62:1;\n[; ;GenericTypeDefs.h: 545: BYTE b63:1;\n[; ;GenericTypeDefs.h: 546: } bits;\n[; ;GenericTypeDefs.h: 547: } QWORD_VAL;\n[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;i2c.h: 775: void IdleI2C( void );\n[; ;i2c.h: 777: void OpenI2C( unsigned char sync_mode, unsigned char slew );\n[; ;i2c.h: 779: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 781: signed char putsI2C( unsigned char *wrptr );\n[; ;i2c.h: 783: unsigned char ReadI2C( void );\n[; ;i2c.h: 785: void CloseI2C( void );\n[; ;i2c.h: 899: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 901: signed char getsI2C( unsigned char *rdptr, unsigned char length );\n[; ;i2c.h: 908: signed char EEAckPolling( unsigned char control );\n[; ;i2c.h: 910: signed char EEByteWrite( unsigned char control,\n[; ;i2c.h: 911: unsigned char address,\n[; ;i2c.h: 912: unsigned char data );\n[; ;i2c.h: 914: signed int EECurrentAddRead( unsigned char control );\n[; ;i2c.h: 916: signed char EEPageWrite( unsigned char control,\n[; ;i2c.h: 917: unsigned char address,\n[; ;i2c.h: 918: unsigned char *wrptr );\n[; ;i2c.h: 920: signed int EERandomRead( unsigned char control, unsigned char address );\n[; ;i2c.h: 922: signed char EESequentialRead( unsigned char control,\n[; ;i2c.h: 923: unsigned char address,\n[; ;i2c.h: 924: unsigned char *rdptr,\n[; ;i2c.h: 925: unsigned char length );\n[; ;mwire.h: 325: void OpenMwire( unsigned char sync_mode );\n[; ;mwire.h: 327: unsigned char ReadMwire( unsigned char high_byte,\n[; ;mwire.h: 328: unsigned char low_byte );\n[; ;mwire.h: 341: signed char WriteMwire( unsigned char data_out );\n[; ;mwire.h: 354: void getsMwire( unsigned char *rdptr, unsigned char length );\n[; ;portb.h: 126: void OpenPORTB( unsigned char config);\n[; ;portb.h: 176: void OpenRB0INT( unsigned char config);\n[; ;portb.h: 194: void OpenRB1INT( unsigned char config);\n[; ;portb.h: 211: void OpenRB2INT( unsigned char config);\n[; ;pwm.h: 85: union PWMDC\n[; ;pwm.h: 86: {\n[; ;pwm.h: 87: unsigned int lpwm;\n[; ;pwm.h: 88: char bpwm[2];\n[; ;pwm.h: 89: };\n[; ;pwm.h: 467: void OpenPWM1 ( char period);\n[; ;pwm.h: 468: void SetDCPWM1 ( unsigned int duty_cycle);\n[; ;pwm.h: 477: void ClosePWM1 (void);\n[; ;pwm.h: 485: void OpenPWM2 ( char period);\n[; ;pwm.h: 486: void SetDCPWM2( unsigned int duty_cycle);\n[; ;pwm.h: 492: void ClosePWM2 (void);\n[; ;reset.h: 16: char isMCLR(void);\n[; ;reset.h: 17: void StatusReset(void);\n[; ;reset.h: 18: char isPOR(void);\n[; ;reset.h: 19: char isWU(void);\n[; ;reset.h: 22: char isBOR(void);\n[; ;reset.h: 26: char isWDTTO(void);\n[; ;reset.h: 27: char isWDTWU(void);\n[; ;reset.h: 31: char isLVD(void);\n[; ;rtcc.h: 687: void Open_RTCC(void);\n[; ;rtcc.h: 688: void Close_RTCC(void);\n[; ;rtcc.h: 689: unsigned char update_RTCC(void);\n[; ;sw_i2c.h: 97: void SWStopI2C ( void );\n[; ;sw_i2c.h: 98: void SWStartI2C ( void );\n[; ;sw_i2c.h: 99: void SWRestartI2C ( void );\n[; ;sw_i2c.h: 100: void SWStopI2C ( void );\n[; ;sw_i2c.h: 102: signed char SWAckI2C( void );\n[; ;sw_i2c.h: 103: signed char Clock_test( void );\n[; ;sw_i2c.h: 104: signed int SWReadI2C( void );\n[; ;sw_i2c.h: 105: signed char SWWriteI2C(  unsigned char data_out );\n[; ;sw_i2c.h: 106: signed char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\n[; ;sw_i2c.h: 107: signed char SWPutsI2C(  unsigned char *wrptr );\n[; ;sw_spi.h: 84: void OpenSWSPI(void);\n[; ;sw_spi.h: 87: char WriteSWSPI( char output);\n[; ;sw_spi.h: 90: void SetCSSWSPI(void);\n[; ;sw_spi.h: 93: void ClearCSSWSPI(void);\n[; ;sw_uart.h: 47: void OpenUART(void);\n[; ;sw_uart.h: 49: unsigned char ReadUART(void);\n[; ;sw_uart.h: 51: void WriteUART( unsigned char);\n[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);\n[; ;sw_uart.h: 55: void putsUART( char *);\n[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);\n[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);\n[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);\n[; ;timers.h: 36: union Timers\n[; ;timers.h: 37: {\n[; ;timers.h: 38: unsigned int lt;\n[; ;timers.h: 39: char bt[2];\n[; ;timers.h: 40: };\n[; ;timers.h: 118: void OpenTimer0 ( unsigned char config);\n[; ;timers.h: 119: void CloseTimer0 (void);\n[; ;timers.h: 120: unsigned int ReadTimer0 (void);\n[; ;timers.h: 121: void WriteTimer0 ( unsigned int timer0);\n[; ;timers.h: 236: void OpenTimer1 ( unsigned char config);\n[; ;timers.h: 237: void CloseTimer1 (void);\n[; ;timers.h: 238: unsigned int ReadTimer1 (void);\n[; ;timers.h: 239: void WriteTimer1 ( unsigned int timer1);\n[; ;timers.h: 325: void OpenTimer2 ( unsigned char config);\n[; ;timers.h: 326: void CloseTimer2 (void);\n[; ;timers.h: 391: void OpenTimer3 ( unsigned char config);\n[; ;timers.h: 392: void CloseTimer3 (void);\n[; ;timers.h: 393: unsigned int ReadTimer3 (void);\n[; ;timers.h: 394: void WriteTimer3 ( unsigned int timer3);\n[; ;timers.h: 1179: void SetTmrCCPSrc( unsigned char );\n[; ;usart.h: 568: union USART\n[; ;usart.h: 569: {\n[; ;usart.h: 570: unsigned char val;\n[; ;usart.h: 571: struct\n[; ;usart.h: 572: {\n[; ;usart.h: 573: unsigned RX_NINE:1;\n[; ;usart.h: 574: unsigned TX_NINE:1;\n[; ;usart.h: 575: unsigned FRAME_ERROR:1;\n[; ;usart.h: 576: unsigned OVERRUN_ERROR:1;\n[; ;usart.h: 577: unsigned fill:4;\n[; ;usart.h: 578: };\n[; ;usart.h: 579: };\n[; ;usart.h: 580: extern union USART USART_Status;\n[; ;usart.h: 581: void OpenUSART ( unsigned char config, unsigned spbrg);\n[; ;usart.h: 596: char ReadUSART (void);\n[; ;usart.h: 597: void WriteUSART ( char data);\n[; ;usart.h: 598: void getsUSART ( char *buffer, unsigned char len);\n[; ;usart.h: 599: void putsUSART ( char *data);\n[; ;usart.h: 600: void putrsUSART ( const  char *data);\n[; ;usart.h: 654: void baudUSART ( unsigned char baudconfig);\n[; ;xlcd.h: 87: void OpenXLCD( unsigned char);\n[; ;xlcd.h: 92: void SetCGRamAddr( unsigned char);\n[; ;xlcd.h: 97: void SetDDRamAddr( unsigned char);\n[; ;xlcd.h: 102: unsigned char BusyXLCD(void);\n[; ;xlcd.h: 107: unsigned char ReadAddrXLCD(void);\n[; ;xlcd.h: 112: char ReadDataXLCD(void);\n[; ;xlcd.h: 117: void WriteCmdXLCD( unsigned char);\n[; ;xlcd.h: 122: void WriteDataXLCD( char);\n[; ;xlcd.h: 132: void putsXLCD( char *);\n[; ;xlcd.h: 137: void putrsXLCD(const char *);\n[; ;xlcd.h: 140: extern void DelayFor18TCY(void);\n[; ;xlcd.h: 141: extern void DelayPORXLCD(void);\n[; ;xlcd.h: 142: extern void DelayXLCD(void);\n[; ;pic18.h: 18: __attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned c\n[; ;pic18.h: 144: extern void _delay(unsigned long);\n[; ;pic18.h: 146: extern void _delaywdt(unsigned long);\n[; ;pic18.h: 148: extern void _delay3(unsigned char);\n[; ;stdint.h: 13: typedef signed char int8_t;\n[; ;stdint.h: 20: typedef signed int int16_t;\n[; ;stdint.h: 28: typedef signed short long int int24_t;\n[; ;stdint.h: 36: typedef signed long int int32_t;\n[; ;stdint.h: 43: typedef unsigned char uint8_t;\n[; ;stdint.h: 49: typedef unsigned int uint16_t;\n[; ;stdint.h: 56: typedef unsigned short long int uint24_t;\n[; ;stdint.h: 63: typedef unsigned long int uint32_t;\n[; ;stdint.h: 71: typedef signed char int_least8_t;\n[; ;stdint.h: 78: typedef signed int int_least16_t;\n[; ;stdint.h: 90: typedef signed short long int int_least24_t;\n[; ;stdint.h: 98: typedef signed long int int_least32_t;\n[; ;stdint.h: 105: typedef unsigned char uint_least8_t;\n[; ;stdint.h: 111: typedef unsigned int uint_least16_t;\n[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;\n[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;\n[; ;stdint.h: 137: typedef signed char int_fast8_t;\n[; ;stdint.h: 144: typedef signed int int_fast16_t;\n[; ;stdint.h: 156: typedef signed short long int int_fast24_t;\n[; ;stdint.h: 164: typedef signed long int int_fast32_t;\n[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;\n[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;\n[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;\n[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;\n[; ;stdint.h: 200: typedef int32_t intmax_t;\n[; ;stdint.h: 205: typedef uint32_t uintmax_t;\n[; ;stdint.h: 210: typedef int16_t intptr_t;\n[; ;stdint.h: 215: typedef uint16_t uintptr_t;\n[; ;Tick.h: 50: void tick_init();\n[; ;Tick.h: 62: uint32_t tick_get();\n[; ;Tick.h: 71: void tick_update();\n[; ;PID.h: 40: enum enCtrlDirs {\n[; ;PID.h: 41: E_PID_DIRECT,\n[; ;PID.h: 42: E_PID_REVERSE,\n[; ;PID.h: 43: };\n[; ;PID.h: 45: struct pid_controller {\n[; ;PID.h: 47: float * input;\n[; ;PID.h: 48: float * output;\n[; ;PID.h: 49: float * setpoint;\n[; ;PID.h: 51: float Kp;\n[; ;PID.h: 52: float Ki;\n[; ;PID.h: 53: float Kd;\n[; ;PID.h: 55: float omin;\n[; ;PID.h: 56: float omax;\n[; ;PID.h: 58: float iterm;\n[; ;PID.h: 59: float lastin;\n[; ;PID.h: 61: uint32_t lasttime;\n[; ;PID.h: 62: uint32_t sampletime;\n[; ;PID.h: 64: uint8_t automode;\n[; ;PID.h: 65: enum enCtrlDirs direction;\n[; ;PID.h: 66: };\n[; ;PID.h: 68: typedef struct pid_controller * pid_t;\n[; ;PID.h: 90: pid_t pid_create(pid_t pid, float* in, float* out, float* set, float kp, float ki, float kd);\n[; ;PID.h: 103: uint8_t pid_compute(pid_t pid);\n[; ;PID.h: 116: void pid_tune(pid_t pid, float kp, float ki, float kd);\n[; ;PID.h: 126: void pid_sample(pid_t pid, uint32_t time);\n[; ;PID.h: 135: void pid_limits(pid_t pid, float min, float max);\n[; ;PID.h: 146: void pid_auto(pid_t pid);\n[; ;PID.h: 148: void pid_manual(pid_t pid);\n[; ;PID.h: 161: void pid_direction(pid_t pid, enum enCtrlDirs direction);\n\"25 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c\n[v _pid_create `(*S518 ~T0 @X0 1 ef7`*S518`*f`*f`*f`f`f`f ]\n{\n[; ;PID.c: 24: pid_t pid_create(pid_t pid, float* in, float* out, float* set, float kp, float ki, float kd)\n[; ;PID.c: 25: {\n[e :U _pid_create ]\n[v _pid `*S518 ~T0 @X0 1 r1 ]\n[v _in `*f ~T0 @X0 1 r2 ]\n[v _out `*f ~T0 @X0 1 r3 ]\n[v _set `*f ~T0 @X0 1 r4 ]\n[v _kp `f ~T0 @X0 1 r5 ]\n[v _ki `f ~T0 @X0 1 r6 ]\n[v _kd `f ~T0 @X0 1 r7 ]\n[f ]\n[; ;PID.c: 26: pid->input = in;\n\"26\n[e = . *U _pid 0 _in ]\n[; ;PID.c: 27: pid->output = out;\n\"27\n[e = . *U _pid 1 _out ]\n[; ;PID.c: 28: pid->setpoint = set;\n\"28\n[e = . *U _pid 2 _set ]\n[; ;PID.c: 29: pid->automode = 0;\n\"29\n[e = . *U _pid 12 -> -> 0 `i `uc ]\n[; ;PID.c: 30: pid_limits(pid, 0, 255);\n\"30\n[e ( _pid_limits (3 , , _pid -> -> 0 `i `f -> -> 255 `i `f ]\n[; ;PID.c: 31: pid->sampletime = 100 * (((unsigned long long)((12000000 + 128ull)/256ull)) / 1000);\n\"31\n[e = . *U _pid 11 * -> -> -> 100 `i `l `ul / / + -> -> 12000000 `l `ul -> 128 `ul -> 256 `ul -> -> -> 1000 `i `l `ul ]\n[; ;PID.c: 33: pid_direction(pid, E_PID_DIRECT);\n\"33\n[e ( _pid_direction (2 , _pid -> . `E4687 0 `E4687 ]\n[; ;PID.c: 34: pid_tune(pid, kp, ki, kd);\n\"34\n[e ( _pid_tune (4 , , , _pid _kp _ki _kd ]\n[; ;PID.c: 36: pid->lasttime = tick_get() - pid->sampletime;\n\"36\n[e = . *U _pid 10 - ( _tick_get ..  . *U _pid 11 ]\n[; ;PID.c: 38: return pid;\n\"38\n[e ) _pid ]\n[e $UE 519  ]\n[; ;PID.c: 39: }\n\"39\n[e :UE 519 ]\n}\n\"42\n[v _pid_compute `(uc ~T0 @X0 1 ef1`*S518 ]\n{\n[; ;PID.c: 41: uint8_t pid_compute(pid_t pid)\n[; ;PID.c: 42: {\n[e :U _pid_compute ]\n[v _pid `*S518 ~T0 @X0 1 r1 ]\n[f ]\n\"43\n[v _now `ul ~T0 @X0 1 a ]\n[; ;PID.c: 43: uint32_t now;\n[; ;PID.c: 45: if (!pid->automode)\n\"45\n[e $ ! ! != -> . *U _pid 12 `i -> -> -> 0 `i `uc `i 521  ]\n[; ;PID.c: 46: return 0;\n\"46\n[e ) -> -> 0 `i `uc ]\n[e $UE 520  ]\n[e :U 521 ]\n[; ;PID.c: 47: now = tick_get();\n\"47\n[e = _now ( _tick_get ..  ]\n[; ;PID.c: 48: if (now - pid->lasttime >= pid->sampletime) {\n\"48\n[e $ ! >= - _now . *U _pid 10 . *U _pid 11 522  ]\n{\n\"49\n[v _in `f ~T0 @X0 1 a ]\n[; ;PID.c: 49: float in = *(pid->input);\n[e = _in *U . *U _pid 0 ]\n\"51\n[v _error `f ~T0 @X0 1 a ]\n[; ;PID.c: 51: float error = (*(pid->setpoint)) - in;\n[e = _error - *U . *U _pid 2 _in ]\n[; ;PID.c: 53: pid->iterm += (pid->Ki * error);\n\"53\n[e =+ . *U _pid 8 * . *U _pid 4 _error ]\n[; ;PID.c: 54: if (pid->iterm > pid->omax)\n\"54\n[e $ ! > . *U _pid 8 . *U _pid 7 523  ]\n[; ;PID.c: 55: pid->iterm = pid->omax;\n\"55\n[e = . *U _pid 8 . *U _pid 7 ]\n[e $U 524  ]\n\"56\n[e :U 523 ]\n[; ;PID.c: 56: else if (pid->iterm < pid->omin)\n[e $ ! < . *U _pid 8 . *U _pid 6 525  ]\n[; ;PID.c: 57: pid->iterm = pid->omin;\n\"57\n[e = . *U _pid 8 . *U _pid 6 ]\n[e :U 525 ]\n\"59\n[e :U 524 ]\n[v _dinput `f ~T0 @X0 1 a ]\n[; ;PID.c: 59: float dinput = in - pid->lastin;\n[e = _dinput - _in . *U _pid 9 ]\n\"61\n[v _out `f ~T0 @X0 1 a ]\n[; ;PID.c: 61: float out = pid->Kp * error + pid->iterm - pid->Kd * dinput;\n[e = _out - + * . *U _pid 3 _error . *U _pid 8 * . *U _pid 5 _dinput ]\n[; ;PID.c: 63: if (out > pid->omax)\n\"63\n[e $ ! > _out . *U _pid 7 526  ]\n[; ;PID.c: 64: out = pid->omax;\n\"64\n[e = _out . *U _pid 7 ]\n[e $U 527  ]\n\"65\n[e :U 526 ]\n[; ;PID.c: 65: else if (out < pid->omin)\n[e $ ! < _out . *U _pid 6 528  ]\n[; ;PID.c: 66: out = pid->omin;\n\"66\n[e = _out . *U _pid 6 ]\n[e :U 528 ]\n\"68\n[e :U 527 ]\n[; ;PID.c: 68: *(pid->output) = out;\n[e = *U . *U _pid 1 _out ]\n[; ;PID.c: 70: pid->lastin = in;\n\"70\n[e = . *U _pid 9 _in ]\n[; ;PID.c: 71: pid->lasttime = now;\n\"71\n[e = . *U _pid 10 _now ]\n[; ;PID.c: 72: return 1;\n\"72\n[e ) -> -> 1 `i `uc ]\n[e $UE 520  ]\n\"73\n}\n[e :U 522 ]\n[; ;PID.c: 73: }\n[; ;PID.c: 74: return 0;\n\"74\n[e ) -> -> 0 `i `uc ]\n[e $UE 520  ]\n[; ;PID.c: 75: }\n\"75\n[e :UE 520 ]\n}\n\"78\n[v _pid_tune `(v ~T0 @X0 1 ef4`*S518`f`f`f ]\n{\n[; ;PID.c: 77: void pid_tune(pid_t pid, float kp, float ki, float kd)\n[; ;PID.c: 78: {\n[e :U _pid_tune ]\n[v _pid `*S518 ~T0 @X0 1 r1 ]\n[v _kp `f ~T0 @X0 1 r2 ]\n[v _ki `f ~T0 @X0 1 r3 ]\n[v _kd `f ~T0 @X0 1 r4 ]\n[f ]\n[; ;PID.c: 79: if (kp < 0 || ki < 0 || kd < 0)\n\"79\n[e $ ! || || < _kp -> -> 0 `i `f < _ki -> -> 0 `i `f < _kd -> -> 0 `i `f 530  ]\n[; ;PID.c: 80: return;\n\"80\n[e $UE 529  ]\n[e :U 530 ]\n\"82\n[v _ssec `f ~T0 @X0 1 a ]\n[; ;PID.c: 82: float ssec = ((float) pid->sampletime) / ((unsigned long long)((12000000 + 128ull)/256ull));\n[e = _ssec / -> . *U _pid 11 `f -> / + -> -> 12000000 `l `ul -> 128 `ul -> 256 `ul `f ]\n[; ;PID.c: 84: pid->Kp = kp;\n\"84\n[e = . *U _pid 3 _kp ]\n[; ;PID.c: 85: pid->Ki = ki * ssec;\n\"85\n[e = . *U _pid 4 * _ki _ssec ]\n[; ;PID.c: 86: pid->Kd = kd / ssec;\n\"86\n[e = . *U _pid 5 / _kd _ssec ]\n[; ;PID.c: 88: if (pid->direction == E_PID_REVERSE) {\n\"88\n[e $ ! == -> . *U _pid 13 `i -> . `E4687 1 `i 531  ]\n{\n[; ;PID.c: 89: pid->Kp = 0 - pid->Kp;\n\"89\n[e = . *U _pid 3 - -> -> 0 `i `f . *U _pid 3 ]\n[; ;PID.c: 90: pid->Ki = 0 - pid->Ki;\n\"90\n[e = . *U _pid 4 - -> -> 0 `i `f . *U _pid 4 ]\n[; ;PID.c: 91: pid->Kd = 0 - pid->Kd;\n\"91\n[e = . *U _pid 5 - -> -> 0 `i `f . *U _pid 5 ]\n\"92\n}\n[e :U 531 ]\n[; ;PID.c: 92: }\n[; ;PID.c: 93: }\n\"93\n[e :UE 529 ]\n}\n\"96\n[v _pid_sample `(v ~T0 @X0 1 ef2`*S518`ul ]\n{\n[; ;PID.c: 95: void pid_sample(pid_t pid, uint32_t time)\n[; ;PID.c: 96: {\n[e :U _pid_sample ]\n[v _pid `*S518 ~T0 @X0 1 r1 ]\n[v _time `ul ~T0 @X0 1 r2 ]\n[f ]\n[; ;PID.c: 97: if (time > 0) {\n\"97\n[e $ ! > _time -> -> -> 0 `i `l `ul 533  ]\n{\n\"98\n[v _ratio `f ~T0 @X0 1 a ]\n[; ;PID.c: 98: float ratio = (float) (time * (((unsigned long long)((12000000 + 128ull)/256ull)) / 1000)) / (float) pid->sampletime;\n[e = _ratio / -> * _time / / + -> -> 12000000 `l `ul -> 128 `ul -> 256 `ul -> -> -> 1000 `i `l `ul `f -> . *U _pid 11 `f ]\n[; ;PID.c: 99: pid->Ki *= ratio;\n\"99\n[e =* . *U _pid 4 _ratio ]\n[; ;PID.c: 100: pid->Kd /= ratio;\n\"100\n[e =/ . *U _pid 5 _ratio ]\n[; ;PID.c: 101: pid->sampletime = (uint32_t) (time * (((unsigned long long)((12000000 + 128ull)/256ull)) / 1000));\n\"101\n[e = . *U _pid 11 * _time / / + -> -> 12000000 `l `ul -> 128 `ul -> 256 `ul -> -> -> 1000 `i `l `ul ]\n\"102\n}\n[e :U 533 ]\n[; ;PID.c: 102: }\n[; ;PID.c: 103: }\n\"103\n[e :UE 532 ]\n}\n\"106\n[v _pid_limits `(v ~T0 @X0 1 ef3`*S518`f`f ]\n{\n[; ;PID.c: 105: void pid_limits(pid_t pid, float min, float max)\n[; ;PID.c: 106: {\n[e :U _pid_limits ]\n[v _pid `*S518 ~T0 @X0 1 r1 ]\n[v _min `f ~T0 @X0 1 r2 ]\n[v _max `f ~T0 @X0 1 r3 ]\n[f ]\n[; ;PID.c: 107: if (min >= max) return;\n\"107\n[e $ ! >= _min _max 535  ]\n[e $UE 534  ]\n[e :U 535 ]\n[; ;PID.c: 108: pid->omin = min;\n\"108\n[e = . *U _pid 6 _min ]\n[; ;PID.c: 109: pid->omax = max;\n\"109\n[e = . *U _pid 7 _max ]\n[; ;PID.c: 111: if (pid->automode) {\n\"111\n[e $ ! != -> . *U _pid 12 `i -> -> -> 0 `i `uc `i 536  ]\n{\n[; ;PID.c: 112: if (*(pid->output) > pid->omax)\n\"112\n[e $ ! > *U . *U _pid 1 . *U _pid 7 537  ]\n[; ;PID.c: 113: *(pid->output) = pid->omax;\n\"113\n[e = *U . *U _pid 1 . *U _pid 7 ]\n[e $U 538  ]\n\"114\n[e :U 537 ]\n[; ;PID.c: 114: else if (*(pid->output) < pid->omin)\n[e $ ! < *U . *U _pid 1 . *U _pid 6 539  ]\n[; ;PID.c: 115: *(pid->output) = pid->omin;\n\"115\n[e = *U . *U _pid 1 . *U _pid 6 ]\n[e :U 539 ]\n\"117\n[e :U 538 ]\n[; ;PID.c: 117: if (pid->iterm > pid->omax)\n[e $ ! > . *U _pid 8 . *U _pid 7 540  ]\n[; ;PID.c: 118: pid->iterm = pid->omax;\n\"118\n[e = . *U _pid 8 . *U _pid 7 ]\n[e $U 541  ]\n\"119\n[e :U 540 ]\n[; ;PID.c: 119: else if (pid->iterm < pid->omin)\n[e $ ! < . *U _pid 8 . *U _pid 6 542  ]\n[; ;PID.c: 120: pid->iterm = pid->omin;\n\"120\n[e = . *U _pid 8 . *U _pid 6 ]\n[e :U 542 ]\n\"121\n[e :U 541 ]\n}\n[e :U 536 ]\n[; ;PID.c: 121: }\n[; ;PID.c: 122: }\n\"122\n[e :UE 534 ]\n}\n\"125\n[v _pid_auto `(v ~T0 @X0 1 ef1`*S518 ]\n{\n[; ;PID.c: 124: void pid_auto(pid_t pid)\n[; ;PID.c: 125: {\n[e :U _pid_auto ]\n[v _pid `*S518 ~T0 @X0 1 r1 ]\n[f ]\n[; ;PID.c: 126: if (!pid->automode) {\n\"126\n[e $ ! ! != -> . *U _pid 12 `i -> -> -> 0 `i `uc `i 544  ]\n{\n[; ;PID.c: 127: pid->lastin = *(pid->output);\n\"127\n[e = . *U _pid 9 *U . *U _pid 1 ]\n[; ;PID.c: 128: pid->lastin = *(pid->input);\n\"128\n[e = . *U _pid 9 *U . *U _pid 0 ]\n[; ;PID.c: 129: if (pid->iterm > pid->omax)\n\"129\n[e $ ! > . *U _pid 8 . *U _pid 7 545  ]\n[; ;PID.c: 130: pid->iterm = pid->omax;\n\"130\n[e = . *U _pid 8 . *U _pid 7 ]\n[e $U 546  ]\n\"131\n[e :U 545 ]\n[; ;PID.c: 131: else if (pid->iterm < pid->omin)\n[e $ ! < . *U _pid 8 . *U _pid 6 547  ]\n[; ;PID.c: 132: pid->iterm = pid->omin;\n\"132\n[e = . *U _pid 8 . *U _pid 6 ]\n[e :U 547 ]\n\"133\n[e :U 546 ]\n[; ;PID.c: 133: pid->automode = 1;\n[e = . *U _pid 12 -> -> 1 `i `uc ]\n\"134\n}\n[e :U 544 ]\n[; ;PID.c: 134: }\n[; ;PID.c: 135: }\n\"135\n[e :UE 543 ]\n}\n\"138\n[v _pid_direction `(v ~T0 @X0 1 ef2`*S518`E4687 ]\n{\n[; ;PID.c: 137: void pid_direction(pid_t pid, enum enCtrlDirs direction)\n[; ;PID.c: 138: {\n[e :U _pid_direction ]\n[v _pid `*S518 ~T0 @X0 1 r1 ]\n[v _direction `E4687 ~T0 @X0 1 r2 ]\n[f ]\n[; ;PID.c: 139: if (pid->automode && pid->direction != direction) {\n\"139\n[e $ ! && != -> . *U _pid 12 `i -> -> -> 0 `i `uc `i != -> . *U _pid 13 `i -> _direction `i 549  ]\n{\n[; ;PID.c: 140: pid->Kp = (0 - pid->Kp);\n\"140\n[e = . *U _pid 3 - -> -> 0 `i `f . *U _pid 3 ]\n[; ;PID.c: 141: pid->Ki = 0 - pid->Ki;\n\"141\n[e = . *U _pid 4 - -> -> 0 `i `f . *U _pid 4 ]\n[; ;PID.c: 142: pid->Kd = 0 - pid->Kd;\n\"142\n[e = . *U _pid 5 - -> -> 0 `i `f . *U _pid 5 ]\n\"143\n}\n[e :U 549 ]\n[; ;PID.c: 143: }\n[; ;PID.c: 144: pid->direction = direction;\n\"144\n[e = . *U _pid 13 _direction ]\n[; ;PID.c: 145: }\n\"145\n[e :UE 548 ]\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/838288359/PID.p1.d",
    "content": " build/default/production/_ext/838288359/PID.d  \\\n build/default/production/_ext/838288359/PID.p1:  \\\n C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c  \\\nC:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/TickPort.h  \\\nC:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick.h  \\\nC:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.h "
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/_ext/838288359/PID.pre",
    "content": "\n# 1 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c\"\n\n# 44 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\nextern volatile unsigned short UFRM @ 0xF66;\n\nasm(\"UFRM equ 0F66h\");\n\n\n\nextern volatile unsigned char UFRML @ 0xF66;\n\nasm(\"UFRML equ 0F66h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :8;\n};\nstruct {\nunsigned FRM0 :1;\nunsigned FRM1 :1;\nunsigned FRM2 :1;\nunsigned FRM3 :1;\nunsigned FRM4 :1;\nunsigned FRM5 :1;\nunsigned FRM6 :1;\nunsigned FRM7 :1;\n};\nstruct {\nunsigned FRML :8;\n};\n} UFRMLbits_t;\nextern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n\n# 127\nextern volatile unsigned char UFRMH @ 0xF67;\n\nasm(\"UFRMH equ 0F67h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :3;\n};\nstruct {\nunsigned FRM8 :1;\nunsigned FRM9 :1;\nunsigned FRM10 :1;\n};\n} UFRMHbits_t;\nextern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n\n# 166\nextern volatile unsigned char UIR @ 0xF68;\n\nasm(\"UIR equ 0F68h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIF :1;\nunsigned UERRIF :1;\nunsigned ACTVIF :1;\nunsigned TRNIF :1;\nunsigned IDLEIF :1;\nunsigned STALLIF :1;\nunsigned SOFIF :1;\n};\n} UIRbits_t;\nextern volatile UIRbits_t UIRbits @ 0xF68;\n\n# 221\nextern volatile unsigned char UIE @ 0xF69;\n\nasm(\"UIE equ 0F69h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIE :1;\nunsigned UERRIE :1;\nunsigned ACTVIE :1;\nunsigned TRNIE :1;\nunsigned IDLEIE :1;\nunsigned STALLIE :1;\nunsigned SOFIE :1;\n};\n} UIEbits_t;\nextern volatile UIEbits_t UIEbits @ 0xF69;\n\n# 276\nextern volatile unsigned char UEIR @ 0xF6A;\n\nasm(\"UEIR equ 0F6Ah\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEF :1;\nunsigned CRC5EF :1;\nunsigned CRC16EF :1;\nunsigned DFN8EF :1;\nunsigned BTOEF :1;\nunsigned :2;\nunsigned BTSEF :1;\n};\n} UEIRbits_t;\nextern volatile UEIRbits_t UEIRbits @ 0xF6A;\n\n# 326\nextern volatile unsigned char UEIE @ 0xF6B;\n\nasm(\"UEIE equ 0F6Bh\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEE :1;\nunsigned CRC5EE :1;\nunsigned CRC16EE :1;\nunsigned DFN8EE :1;\nunsigned BTOEE :1;\nunsigned :2;\nunsigned BTSEE :1;\n};\n} UEIEbits_t;\nextern volatile UEIEbits_t UEIEbits @ 0xF6B;\n\n# 376\nextern volatile unsigned char USTAT @ 0xF6C;\n\nasm(\"USTAT equ 0F6Ch\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned PPBI :1;\nunsigned DIR :1;\nunsigned ENDP :4;\n};\nstruct {\nunsigned :3;\nunsigned ENDP0 :1;\nunsigned ENDP1 :1;\nunsigned ENDP2 :1;\nunsigned ENDP3 :1;\n};\n} USTATbits_t;\nextern volatile USTATbits_t USTATbits @ 0xF6C;\n\n# 435\nextern volatile unsigned char UCON @ 0xF6D;\n\nasm(\"UCON equ 0F6Dh\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned SUSPND :1;\nunsigned RESUME :1;\nunsigned USBEN :1;\nunsigned PKTDIS :1;\nunsigned SE0 :1;\nunsigned PPBRST :1;\n};\n} UCONbits_t;\nextern volatile UCONbits_t UCONbits @ 0xF6D;\n\n# 485\nextern volatile unsigned char UADDR @ 0xF6E;\n\nasm(\"UADDR equ 0F6Eh\");\n\n\ntypedef union {\nstruct {\nunsigned ADDR :7;\n};\nstruct {\nunsigned ADDR0 :1;\nunsigned ADDR1 :1;\nunsigned ADDR2 :1;\nunsigned ADDR3 :1;\nunsigned ADDR4 :1;\nunsigned ADDR5 :1;\nunsigned ADDR6 :1;\n};\n} UADDRbits_t;\nextern volatile UADDRbits_t UADDRbits @ 0xF6E;\n\n# 548\nextern volatile unsigned char UCFG @ 0xF6F;\n\nasm(\"UCFG equ 0F6Fh\");\n\n\ntypedef union {\nstruct {\nunsigned PPB :2;\nunsigned FSEN :1;\nunsigned UTRDIS :1;\nunsigned UPUEN :1;\nunsigned :1;\nunsigned UOEMON :1;\nunsigned UTEYE :1;\n};\nstruct {\nunsigned PPB0 :1;\nunsigned PPB1 :1;\n};\nstruct {\nunsigned UPP0 :1;\n};\nstruct {\nunsigned :1;\nunsigned UPP1 :1;\n};\n} UCFGbits_t;\nextern volatile UCFGbits_t UCFGbits @ 0xF6F;\n\n# 629\nextern volatile unsigned char UEP0 @ 0xF70;\n\nasm(\"UEP0 equ 0F70h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP0CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP0HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP0INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP0OUTEN :1;\n};\nstruct {\nunsigned EP0STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS0 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK0 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN0 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN0 :1;\n};\nstruct {\nunsigned EPSTALL0 :1;\n};\n} UEP0bits_t;\nextern volatile UEP0bits_t UEP0bits @ 0xF70;\n\n# 760\nextern volatile unsigned char UEP1 @ 0xF71;\n\nasm(\"UEP1 equ 0F71h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP1CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP1HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP1INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP1OUTEN :1;\n};\nstruct {\nunsigned EP1STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS1 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK1 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN1 :1;\n};\nstruct {\nunsigned EPSTALL1 :1;\n};\n} UEP1bits_t;\nextern volatile UEP1bits_t UEP1bits @ 0xF71;\n\n# 891\nextern volatile unsigned char UEP2 @ 0xF72;\n\nasm(\"UEP2 equ 0F72h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP2CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP2HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP2INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP2OUTEN :1;\n};\nstruct {\nunsigned EP2STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS2 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK2 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN2 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN2 :1;\n};\nstruct {\nunsigned EPSTALL2 :1;\n};\n} UEP2bits_t;\nextern volatile UEP2bits_t UEP2bits @ 0xF72;\n\n# 1022\nextern volatile unsigned char UEP3 @ 0xF73;\n\nasm(\"UEP3 equ 0F73h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP3CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP3HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP3INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP3OUTEN :1;\n};\nstruct {\nunsigned EP3STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS3 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK3 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN3 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN3 :1;\n};\nstruct {\nunsigned EPSTALL3 :1;\n};\n} UEP3bits_t;\nextern volatile UEP3bits_t UEP3bits @ 0xF73;\n\n# 1153\nextern volatile unsigned char UEP4 @ 0xF74;\n\nasm(\"UEP4 equ 0F74h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP4CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP4HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP4INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP4OUTEN :1;\n};\nstruct {\nunsigned EP4STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS4 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK4 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN4 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN4 :1;\n};\nstruct {\nunsigned EPSTALL4 :1;\n};\n} UEP4bits_t;\nextern volatile UEP4bits_t UEP4bits @ 0xF74;\n\n# 1284\nextern volatile unsigned char UEP5 @ 0xF75;\n\nasm(\"UEP5 equ 0F75h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP5CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP5HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP5INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP5OUTEN :1;\n};\nstruct {\nunsigned EP5STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS5 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK5 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN5 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN5 :1;\n};\nstruct {\nunsigned EPSTALL5 :1;\n};\n} UEP5bits_t;\nextern volatile UEP5bits_t UEP5bits @ 0xF75;\n\n# 1415\nextern volatile unsigned char UEP6 @ 0xF76;\n\nasm(\"UEP6 equ 0F76h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP6CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP6HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP6INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP6OUTEN :1;\n};\nstruct {\nunsigned EP6STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS6 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK6 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN6 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN6 :1;\n};\nstruct {\nunsigned EPSTALL6 :1;\n};\n} UEP6bits_t;\nextern volatile UEP6bits_t UEP6bits @ 0xF76;\n\n# 1546\nextern volatile unsigned char UEP7 @ 0xF77;\n\nasm(\"UEP7 equ 0F77h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP7CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP7HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP7INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP7OUTEN :1;\n};\nstruct {\nunsigned EP7STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS7 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK7 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN7 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN7 :1;\n};\nstruct {\nunsigned EPSTALL7 :1;\n};\n} UEP7bits_t;\nextern volatile UEP7bits_t UEP7bits @ 0xF77;\n\n# 1677\nextern volatile unsigned char UEP8 @ 0xF78;\n\nasm(\"UEP8 equ 0F78h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS8 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK8 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN8 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN8 :1;\n};\nstruct {\nunsigned EPSTALL8 :1;\n};\n} UEP8bits_t;\nextern volatile UEP8bits_t UEP8bits @ 0xF78;\n\n# 1764\nextern volatile unsigned char UEP9 @ 0xF79;\n\nasm(\"UEP9 equ 0F79h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS9 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK9 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN9 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN9 :1;\n};\nstruct {\nunsigned EPSTALL9 :1;\n};\n} UEP9bits_t;\nextern volatile UEP9bits_t UEP9bits @ 0xF79;\n\n# 1851\nextern volatile unsigned char UEP10 @ 0xF7A;\n\nasm(\"UEP10 equ 0F7Ah\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS10 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK10 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN10 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN10 :1;\n};\nstruct {\nunsigned EPSTALL10 :1;\n};\n} UEP10bits_t;\nextern volatile UEP10bits_t UEP10bits @ 0xF7A;\n\n# 1938\nextern volatile unsigned char UEP11 @ 0xF7B;\n\nasm(\"UEP11 equ 0F7Bh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS11 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK11 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN11 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN11 :1;\n};\nstruct {\nunsigned EPSTALL11 :1;\n};\n} UEP11bits_t;\nextern volatile UEP11bits_t UEP11bits @ 0xF7B;\n\n# 2025\nextern volatile unsigned char UEP12 @ 0xF7C;\n\nasm(\"UEP12 equ 0F7Ch\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS12 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK12 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN12 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN12 :1;\n};\nstruct {\nunsigned EPSTALL12 :1;\n};\n} UEP12bits_t;\nextern volatile UEP12bits_t UEP12bits @ 0xF7C;\n\n# 2112\nextern volatile unsigned char UEP13 @ 0xF7D;\n\nasm(\"UEP13 equ 0F7Dh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS13 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK13 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN13 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN13 :1;\n};\nstruct {\nunsigned EPSTALL13 :1;\n};\n} UEP13bits_t;\nextern volatile UEP13bits_t UEP13bits @ 0xF7D;\n\n# 2199\nextern volatile unsigned char UEP14 @ 0xF7E;\n\nasm(\"UEP14 equ 0F7Eh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS14 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK14 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN14 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN14 :1;\n};\nstruct {\nunsigned EPSTALL14 :1;\n};\n} UEP14bits_t;\nextern volatile UEP14bits_t UEP14bits @ 0xF7E;\n\n# 2286\nextern volatile unsigned char UEP15 @ 0xF7F;\n\nasm(\"UEP15 equ 0F7Fh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS15 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK15 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN15 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN15 :1;\n};\nstruct {\nunsigned EPSTALL15 :1;\n};\n} UEP15bits_t;\nextern volatile UEP15bits_t UEP15bits @ 0xF7F;\n\n# 2373\nextern volatile unsigned char PORTA @ 0xF80;\n\nasm(\"PORTA equ 0F80h\");\n\n\ntypedef union {\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\nstruct {\nunsigned AN0 :1;\nunsigned AN1 :1;\nunsigned AN2 :1;\nunsigned AN3 :1;\nunsigned T0CKI :1;\nunsigned AN4 :1;\nunsigned OSC2 :1;\n};\nstruct {\nunsigned :2;\nunsigned VREFM :1;\nunsigned VREFP :1;\nunsigned :1;\nunsigned LVDIN :1;\n};\nstruct {\nunsigned :5;\nunsigned HLVDIN :1;\n};\nstruct {\nunsigned :7;\nunsigned RA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned RJPU :1;\n};\nstruct {\nunsigned ULPWUIN :1;\n};\n} PORTAbits_t;\nextern volatile PORTAbits_t PORTAbits @ 0xF80;\n\n# 2529\nextern volatile unsigned char PORTB @ 0xF81;\n\nasm(\"PORTB equ 0F81h\");\n\n\ntypedef union {\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\nstruct {\nunsigned INT0 :1;\nunsigned INT1 :1;\nunsigned INT2 :1;\nunsigned :2;\nunsigned PGM :1;\nunsigned PGC :1;\nunsigned PGD :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP2_PA2 :1;\n};\n} PORTBbits_t;\nextern volatile PORTBbits_t PORTBbits @ 0xF81;\n\n# 2638\nextern volatile unsigned char PORTC @ 0xF82;\n\nasm(\"PORTC equ 0F82h\");\n\n\ntypedef union {\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :1;\nunsigned RC4 :1;\nunsigned RC5 :1;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned T1OSO :1;\nunsigned T1OSI :1;\nunsigned CCP1 :1;\nunsigned :3;\nunsigned TX :1;\nunsigned RX :1;\n};\nstruct {\nunsigned T13CKI :1;\nunsigned :1;\nunsigned P1A :1;\nunsigned :3;\nunsigned CK :1;\nunsigned DT :1;\n};\nstruct {\nunsigned :1;\nunsigned CCP2 :1;\n};\nstruct {\nunsigned :2;\nunsigned PA1 :1;\n};\nstruct {\nunsigned :1;\nunsigned PA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned RC3 :1;\n};\n} PORTCbits_t;\nextern volatile PORTCbits_t PORTCbits @ 0xF82;\n\n# 2791\nextern volatile unsigned char PORTE @ 0xF84;\n\nasm(\"PORTE equ 0F84h\");\n\n\ntypedef union {\nstruct {\nunsigned :3;\nunsigned RE3 :1;\n};\nstruct {\nunsigned :2;\nunsigned CCP10 :1;\n};\nstruct {\nunsigned :7;\nunsigned CCP2E :1;\n};\nstruct {\nunsigned :6;\nunsigned CCP6E :1;\n};\nstruct {\nunsigned :5;\nunsigned CCP7E :1;\n};\nstruct {\nunsigned :4;\nunsigned CCP8E :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP9E :1;\n};\nstruct {\nunsigned :2;\nunsigned CS :1;\n};\nstruct {\nunsigned :7;\nunsigned PA2E :1;\n};\nstruct {\nunsigned :6;\nunsigned PB1E :1;\n};\nstruct {\nunsigned :2;\nunsigned PB2 :1;\n};\nstruct {\nunsigned :4;\nunsigned PB3E :1;\n};\nstruct {\nunsigned :5;\nunsigned PC1E :1;\n};\nstruct {\nunsigned :1;\nunsigned PC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned PC3E :1;\n};\nstruct {\nunsigned PD2 :1;\n};\nstruct {\nunsigned RDE :1;\n};\nstruct {\nunsigned RE0 :1;\n};\nstruct {\nunsigned :1;\nunsigned RE1 :1;\n};\nstruct {\nunsigned :2;\nunsigned RE2 :1;\n};\nstruct {\nunsigned :4;\nunsigned RE4 :1;\n};\nstruct {\nunsigned :5;\nunsigned RE5 :1;\n};\nstruct {\nunsigned :6;\nunsigned RE6 :1;\n};\nstruct {\nunsigned :7;\nunsigned RE7 :1;\n};\nstruct {\nunsigned :1;\nunsigned WRE :1;\n};\n} PORTEbits_t;\nextern volatile PORTEbits_t PORTEbits @ 0xF84;\n\n# 3024\nextern volatile unsigned char LATA @ 0xF89;\n\nasm(\"LATA equ 0F89h\");\n\n\ntypedef union {\nstruct {\nunsigned LATA0 :1;\nunsigned LATA1 :1;\nunsigned LATA2 :1;\nunsigned LATA3 :1;\nunsigned LATA4 :1;\nunsigned LATA5 :1;\nunsigned LATA6 :1;\n};\nstruct {\nunsigned LA0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LA1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LA3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LA4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LA5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LA6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned LATA7 :1;\n};\n} LATAbits_t;\nextern volatile LATAbits_t LATAbits @ 0xF89;\n\n# 3159\nextern volatile unsigned char LATB @ 0xF8A;\n\nasm(\"LATB equ 0F8Ah\");\n\n\ntypedef union {\nstruct {\nunsigned LATB0 :1;\nunsigned LATB1 :1;\nunsigned LATB2 :1;\nunsigned LATB3 :1;\nunsigned LATB4 :1;\nunsigned LATB5 :1;\nunsigned LATB6 :1;\nunsigned LATB7 :1;\n};\nstruct {\nunsigned LB0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LB1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LB2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LB3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LB4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LB5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LB6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LB7 :1;\n};\n} LATBbits_t;\nextern volatile LATBbits_t LATBbits @ 0xF8A;\n\n# 3291\nextern volatile unsigned char LATC @ 0xF8B;\n\nasm(\"LATC equ 0F8Bh\");\n\n\ntypedef union {\nstruct {\nunsigned LATC0 :1;\nunsigned LATC1 :1;\nunsigned LATC2 :1;\nunsigned :3;\nunsigned LATC6 :1;\nunsigned LATC7 :1;\n};\nstruct {\nunsigned LC0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LC1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LC3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LC4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LC5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LC6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LC7 :1;\n};\n} LATCbits_t;\nextern volatile LATCbits_t LATCbits @ 0xF8B;\n\n# 3406\nextern volatile unsigned char TRISA @ 0xF92;\n\nasm(\"TRISA equ 0F92h\");\n\n\nextern volatile unsigned char DDRA @ 0xF92;\n\nasm(\"DDRA equ 0F92h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} TRISAbits_t;\nextern volatile TRISAbits_t TRISAbits @ 0xF92;\n\n# 3509\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} DDRAbits_t;\nextern volatile DDRAbits_t DDRAbits @ 0xF92;\n\n# 3603\nextern volatile unsigned char TRISB @ 0xF93;\n\nasm(\"TRISB equ 0F93h\");\n\n\nextern volatile unsigned char DDRB @ 0xF93;\n\nasm(\"DDRB equ 0F93h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} TRISBbits_t;\nextern volatile TRISBbits_t TRISBbits @ 0xF93;\n\n# 3718\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} DDRBbits_t;\nextern volatile DDRBbits_t DDRBbits @ 0xF93;\n\n# 3824\nextern volatile unsigned char TRISC @ 0xF94;\n\nasm(\"TRISC equ 0F94h\");\n\n\nextern volatile unsigned char DDRC @ 0xF94;\n\nasm(\"DDRC equ 0F94h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} TRISCbits_t;\nextern volatile TRISCbits_t TRISCbits @ 0xF94;\n\n# 3914\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} DDRCbits_t;\nextern volatile DDRCbits_t DDRCbits @ 0xF94;\n\n# 3995\nextern volatile unsigned char OSCTUNE @ 0xF9B;\n\nasm(\"OSCTUNE equ 0F9Bh\");\n\n\ntypedef union {\nstruct {\nunsigned TUN :5;\nunsigned :2;\nunsigned INTSRC :1;\n};\nstruct {\nunsigned TUN0 :1;\nunsigned TUN1 :1;\nunsigned TUN2 :1;\nunsigned TUN3 :1;\nunsigned TUN4 :1;\n};\n} OSCTUNEbits_t;\nextern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n\n# 4053\nextern volatile unsigned char PIE1 @ 0xF9D;\n\nasm(\"PIE1 equ 0F9Dh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IE :1;\nunsigned TMR2IE :1;\nunsigned CCP1IE :1;\nunsigned SSPIE :1;\nunsigned TXIE :1;\nunsigned RCIE :1;\nunsigned ADIE :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IE :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IE :1;\n};\n} PIE1bits_t;\nextern volatile PIE1bits_t PIE1bits @ 0xF9D;\n\n# 4126\nextern volatile unsigned char PIR1 @ 0xF9E;\n\nasm(\"PIR1 equ 0F9Eh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IF :1;\nunsigned TMR2IF :1;\nunsigned CCP1IF :1;\nunsigned SSPIF :1;\nunsigned TXIF :1;\nunsigned RCIF :1;\nunsigned ADIF :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IF :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IF :1;\n};\n} PIR1bits_t;\nextern volatile PIR1bits_t PIR1bits @ 0xF9E;\n\n# 4199\nextern volatile unsigned char IPR1 @ 0xF9F;\n\nasm(\"IPR1 equ 0F9Fh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IP :1;\nunsigned TMR2IP :1;\nunsigned CCP1IP :1;\nunsigned SSPIP :1;\nunsigned TXIP :1;\nunsigned RCIP :1;\nunsigned ADIP :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IP :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IP :1;\n};\n} IPR1bits_t;\nextern volatile IPR1bits_t IPR1bits @ 0xF9F;\n\n# 4272\nextern volatile unsigned char PIE2 @ 0xFA0;\n\nasm(\"PIE2 equ 0FA0h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IE :1;\nunsigned TMR3IE :1;\nunsigned HLVDIE :1;\nunsigned BCLIE :1;\nunsigned EEIE :1;\nunsigned USBIE :1;\nunsigned CMIE :1;\nunsigned OSCFIE :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIE :1;\n};\n} PIE2bits_t;\nextern volatile PIE2bits_t PIE2bits @ 0xFA0;\n\n# 4342\nextern volatile unsigned char PIR2 @ 0xFA1;\n\nasm(\"PIR2 equ 0FA1h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IF :1;\nunsigned TMR3IF :1;\nunsigned HLVDIF :1;\nunsigned BCLIF :1;\nunsigned EEIF :1;\nunsigned USBIF :1;\nunsigned CMIF :1;\nunsigned OSCFIF :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIF :1;\n};\n} PIR2bits_t;\nextern volatile PIR2bits_t PIR2bits @ 0xFA1;\n\n# 4412\nextern volatile unsigned char IPR2 @ 0xFA2;\n\nasm(\"IPR2 equ 0FA2h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IP :1;\nunsigned TMR3IP :1;\nunsigned HLVDIP :1;\nunsigned BCLIP :1;\nunsigned EEIP :1;\nunsigned USBIP :1;\nunsigned CMIP :1;\nunsigned OSCFIP :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIP :1;\n};\n} IPR2bits_t;\nextern volatile IPR2bits_t IPR2bits @ 0xFA2;\n\n# 4482\nextern volatile unsigned char EECON1 @ 0xFA6;\n\nasm(\"EECON1 equ 0FA6h\");\n\n\ntypedef union {\nstruct {\nunsigned RD :1;\nunsigned WR :1;\nunsigned WREN :1;\nunsigned WRERR :1;\nunsigned FREE :1;\nunsigned :1;\nunsigned CFGS :1;\nunsigned EEPGD :1;\n};\nstruct {\nunsigned :6;\nunsigned EEFS :1;\n};\n} EECON1bits_t;\nextern volatile EECON1bits_t EECON1bits @ 0xFA6;\n\n# 4547\nextern volatile unsigned char EECON2 @ 0xFA7;\n\nasm(\"EECON2 equ 0FA7h\");\n\n\n\nextern volatile unsigned char EEDATA @ 0xFA8;\n\nasm(\"EEDATA equ 0FA8h\");\n\n\n\nextern volatile unsigned char EEADR @ 0xFA9;\n\nasm(\"EEADR equ 0FA9h\");\n\n\n\nextern volatile unsigned char RCSTA @ 0xFAB;\n\nasm(\"RCSTA equ 0FABh\");\n\n\nextern volatile unsigned char RCSTA1 @ 0xFAB;\n\nasm(\"RCSTA1 equ 0FABh\");\n\n\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTAbits_t;\nextern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n\n# 4648\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTA1bits_t;\nextern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n\n# 4722\nextern volatile unsigned char TXSTA @ 0xFAC;\n\nasm(\"TXSTA equ 0FACh\");\n\n\nextern volatile unsigned char TXSTA1 @ 0xFAC;\n\nasm(\"TXSTA1 equ 0FACh\");\n\n\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTAbits_t;\nextern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n\n# 4858\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTA1bits_t;\nextern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n\n# 4985\nextern volatile unsigned char TXREG @ 0xFAD;\n\nasm(\"TXREG equ 0FADh\");\n\n\nextern volatile unsigned char TXREG1 @ 0xFAD;\n\nasm(\"TXREG1 equ 0FADh\");\n\n\n\nextern volatile unsigned char RCREG @ 0xFAE;\n\nasm(\"RCREG equ 0FAEh\");\n\n\nextern volatile unsigned char RCREG1 @ 0xFAE;\n\nasm(\"RCREG1 equ 0FAEh\");\n\n\n\nextern volatile unsigned char SPBRG @ 0xFAF;\n\nasm(\"SPBRG equ 0FAFh\");\n\n\nextern volatile unsigned char SPBRG1 @ 0xFAF;\n\nasm(\"SPBRG1 equ 0FAFh\");\n\n\n\nextern volatile unsigned char SPBRGH @ 0xFB0;\n\nasm(\"SPBRGH equ 0FB0h\");\n\n\n\nextern volatile unsigned char T3CON @ 0xFB1;\n\nasm(\"T3CON equ 0FB1h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T3SYNC :1;\n};\nstruct {\nunsigned TMR3ON :1;\nunsigned TMR3CS :1;\nunsigned nT3SYNC :1;\nunsigned T3CCP1 :1;\nunsigned T3CKPS :2;\nunsigned T3CCP2 :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3SYNC :1;\nunsigned :1;\nunsigned T3CKPS0 :1;\nunsigned T3CKPS1 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3NSYNC :1;\n};\nstruct {\nunsigned :7;\nunsigned RD163 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN3 :1;\n};\nstruct {\nunsigned :7;\nunsigned T3RD16 :1;\n};\n} T3CONbits_t;\nextern volatile T3CONbits_t T3CONbits @ 0xFB1;\n\n# 5146\nextern volatile unsigned short TMR3 @ 0xFB2;\n\nasm(\"TMR3 equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3L @ 0xFB2;\n\nasm(\"TMR3L equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3H @ 0xFB3;\n\nasm(\"TMR3H equ 0FB3h\");\n\n\n\nextern volatile unsigned char CMCON @ 0xFB4;\n\nasm(\"CMCON equ 0FB4h\");\n\n\ntypedef union {\nstruct {\nunsigned CM :3;\nunsigned CIS :1;\nunsigned C1INV :1;\nunsigned C2INV :1;\nunsigned C1OUT :1;\nunsigned C2OUT :1;\n};\nstruct {\nunsigned CM0 :1;\nunsigned CM1 :1;\nunsigned CM2 :1;\n};\nstruct {\nunsigned CMEN0 :1;\n};\nstruct {\nunsigned :1;\nunsigned CMEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned CMEN2 :1;\n};\n} CMCONbits_t;\nextern volatile CMCONbits_t CMCONbits @ 0xFB4;\n\n# 5259\nextern volatile unsigned char CVRCON @ 0xFB5;\n\nasm(\"CVRCON equ 0FB5h\");\n\n\ntypedef union {\nstruct {\nunsigned CVR :4;\nunsigned CVRSS :1;\nunsigned CVRR :1;\nunsigned CVROE :1;\nunsigned CVREN :1;\n};\nstruct {\nunsigned CVR0 :1;\nunsigned CVR1 :1;\nunsigned CVR2 :1;\nunsigned CVR3 :1;\nunsigned CVREF :1;\n};\nstruct {\nunsigned :6;\nunsigned CVROEN :1;\n};\n} CVRCONbits_t;\nextern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n\n# 5343\nextern volatile unsigned char ECCP1AS @ 0xFB6;\n\nasm(\"ECCP1AS equ 0FB6h\");\n\n\nextern volatile unsigned char CCP1AS @ 0xFB6;\n\nasm(\"CCP1AS equ 0FB6h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} ECCP1ASbits_t;\nextern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n\n# 5412\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} CCP1ASbits_t;\nextern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n\n# 5472\nextern volatile unsigned char ECCP1DEL @ 0xFB7;\n\nasm(\"ECCP1DEL equ 0FB7h\");\n\n\nextern volatile unsigned char CCP1DEL @ 0xFB7;\n\nasm(\"CCP1DEL equ 0FB7h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} ECCP1DELbits_t;\nextern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n\n# 5496\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} CCP1DELbits_t;\nextern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n\n# 5511\nextern volatile unsigned char BAUDCON @ 0xFB8;\n\nasm(\"BAUDCON equ 0FB8h\");\n\n\nextern volatile unsigned char BAUDCTL @ 0xFB8;\n\nasm(\"BAUDCTL equ 0FB8h\");\n\n\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCONbits_t;\nextern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n\n# 5605\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCTLbits_t;\nextern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n\n# 5690\nextern volatile unsigned char CCP2CON @ 0xFBA;\n\nasm(\"CCP2CON equ 0FBAh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2M :4;\nunsigned DC2B :2;\n};\nstruct {\nunsigned CCP2M0 :1;\nunsigned CCP2M1 :1;\nunsigned CCP2M2 :1;\nunsigned CCP2M3 :1;\nunsigned DC2B0 :1;\nunsigned DC2B1 :1;\n};\n} CCP2CONbits_t;\nextern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n\n# 5753\nextern volatile unsigned short CCPR2 @ 0xFBB;\n\nasm(\"CCPR2 equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2L @ 0xFBB;\n\nasm(\"CCPR2L equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2H @ 0xFBC;\n\nasm(\"CCPR2H equ 0FBCh\");\n\n\n\nextern volatile unsigned char CCP1CON @ 0xFBD;\n\nasm(\"CCP1CON equ 0FBDh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP1M :4;\nunsigned DC1B :2;\n};\nstruct {\nunsigned CCP1M0 :1;\nunsigned CCP1M1 :1;\nunsigned CCP1M2 :1;\nunsigned CCP1M3 :1;\nunsigned DC1B0 :1;\nunsigned DC1B1 :1;\n};\n} CCP1CONbits_t;\nextern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n\n# 5834\nextern volatile unsigned short CCPR1 @ 0xFBE;\n\nasm(\"CCPR1 equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1L @ 0xFBE;\n\nasm(\"CCPR1L equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1H @ 0xFBF;\n\nasm(\"CCPR1H equ 0FBFh\");\n\n\n\nextern volatile unsigned char ADCON2 @ 0xFC0;\n\nasm(\"ADCON2 equ 0FC0h\");\n\n\ntypedef union {\nstruct {\nunsigned ADCS :3;\nunsigned ACQT :3;\nunsigned :1;\nunsigned ADFM :1;\n};\nstruct {\nunsigned ADCS0 :1;\nunsigned ADCS1 :1;\nunsigned ADCS2 :1;\nunsigned ACQT0 :1;\nunsigned ACQT1 :1;\nunsigned ACQT2 :1;\n};\n} ADCON2bits_t;\nextern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n\n# 5922\nextern volatile unsigned char ADCON1 @ 0xFC1;\n\nasm(\"ADCON1 equ 0FC1h\");\n\n\ntypedef union {\nstruct {\nunsigned PCFG :4;\nunsigned VCFG :2;\n};\nstruct {\nunsigned PCFG0 :1;\nunsigned PCFG1 :1;\nunsigned PCFG2 :1;\nunsigned PCFG3 :1;\nunsigned VCFG0 :1;\nunsigned VCFG1 :1;\n};\nstruct {\nunsigned :3;\nunsigned CHSN3 :1;\n};\nstruct {\nunsigned :4;\nunsigned VCFG01 :1;\n};\nstruct {\nunsigned :5;\nunsigned VCFG11 :1;\n};\n} ADCON1bits_t;\nextern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n\n# 6012\nextern volatile unsigned char ADCON0 @ 0xFC2;\n\nasm(\"ADCON0 equ 0FC2h\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned ADON :1;\nunsigned GO_nDONE :1;\nunsigned CHS :4;\n};\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO_DONE :1;\nunsigned CHS0 :1;\nunsigned CHS1 :1;\nunsigned CHS2 :1;\nunsigned CHS3 :1;\n};\nstruct {\nunsigned :1;\nunsigned DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned nDONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GODONE :1;\n};\n} ADCON0bits_t;\nextern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n\n# 6134\nextern volatile unsigned short ADRES @ 0xFC3;\n\nasm(\"ADRES equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESL @ 0xFC3;\n\nasm(\"ADRESL equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESH @ 0xFC4;\n\nasm(\"ADRESH equ 0FC4h\");\n\n\n\nextern volatile unsigned char SSPCON2 @ 0xFC5;\n\nasm(\"SSPCON2 equ 0FC5h\");\n\n\ntypedef union {\nstruct {\nunsigned SEN :1;\nunsigned RSEN :1;\nunsigned PEN :1;\nunsigned RCEN :1;\nunsigned ACKEN :1;\nunsigned ACKDT :1;\nunsigned ACKSTAT :1;\nunsigned GCEN :1;\n};\n} SSPCON2bits_t;\nextern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n\n# 6213\nextern volatile unsigned char SSPCON1 @ 0xFC6;\n\nasm(\"SSPCON1 equ 0FC6h\");\n\n\ntypedef union {\nstruct {\nunsigned SSPM :4;\nunsigned CKP :1;\nunsigned SSPEN :1;\nunsigned SSPOV :1;\nunsigned WCOL :1;\n};\nstruct {\nunsigned SSPM0 :1;\nunsigned SSPM1 :1;\nunsigned SSPM2 :1;\nunsigned SSPM3 :1;\n};\n} SSPCON1bits_t;\nextern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n\n# 6282\nextern volatile unsigned char SSPSTAT @ 0xFC7;\n\nasm(\"SSPSTAT equ 0FC7h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned BF :1;\nunsigned UA :1;\nunsigned R_nW :1;\nunsigned S :1;\nunsigned P :1;\nunsigned D_nA :1;\nunsigned CKE :1;\nunsigned SMP :1;\n};\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned :2;\nunsigned R_W :1;\nunsigned :2;\nunsigned D_A :1;\n};\nstruct {\nunsigned :2;\nunsigned I2C_READ :1;\nunsigned I2C_START :1;\nunsigned I2C_STOP :1;\nunsigned I2C_DAT :1;\n};\nstruct {\nunsigned :2;\nunsigned nW :1;\nunsigned :2;\nunsigned nA :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_WRITE :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned nWRITE :1;\nunsigned :2;\nunsigned nADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned READ_WRITE :1;\nunsigned :2;\nunsigned DATA_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned R :1;\nunsigned :2;\nunsigned D :1;\n};\nstruct {\nunsigned :5;\nunsigned DA :1;\n};\nstruct {\nunsigned :2;\nunsigned RW :1;\n};\nstruct {\nunsigned :3;\nunsigned START :1;\n};\nstruct {\nunsigned :4;\nunsigned STOP :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_A :1;\n};\n} SSPSTATbits_t;\nextern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n\n# 6548\nextern volatile unsigned char SSPADD @ 0xFC8;\n\nasm(\"SSPADD equ 0FC8h\");\n\n\n\nextern volatile unsigned char SSPBUF @ 0xFC9;\n\nasm(\"SSPBUF equ 0FC9h\");\n\n\n\nextern volatile unsigned char T2CON @ 0xFCA;\n\nasm(\"T2CON equ 0FCAh\");\n\n\ntypedef union {\nstruct {\nunsigned T2CKPS :2;\nunsigned TMR2ON :1;\nunsigned TOUTPS :4;\n};\nstruct {\nunsigned T2CKPS0 :1;\nunsigned T2CKPS1 :1;\nunsigned :1;\nunsigned T2OUTPS0 :1;\nunsigned T2OUTPS1 :1;\nunsigned T2OUTPS2 :1;\nunsigned T2OUTPS3 :1;\n};\nstruct {\nunsigned :3;\nunsigned TOUTPS0 :1;\nunsigned TOUTPS1 :1;\nunsigned TOUTPS2 :1;\nunsigned TOUTPS3 :1;\n};\n} T2CONbits_t;\nextern volatile T2CONbits_t T2CONbits @ 0xFCA;\n\n# 6657\nextern volatile unsigned char PR2 @ 0xFCB;\n\nasm(\"PR2 equ 0FCBh\");\n\n\nextern volatile unsigned char MEMCON @ 0xFCB;\n\nasm(\"MEMCON equ 0FCBh\");\n\n\n\nextern volatile unsigned char TMR2 @ 0xFCC;\n\nasm(\"TMR2 equ 0FCCh\");\n\n\n\nextern volatile unsigned char T1CON @ 0xFCD;\n\nasm(\"T1CON equ 0FCDh\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T1SYNC :1;\n};\nstruct {\nunsigned TMR1ON :1;\nunsigned TMR1CS :1;\nunsigned nT1SYNC :1;\nunsigned T1OSCEN :1;\nunsigned T1CKPS :2;\nunsigned T1RUN :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T1SYNC :1;\nunsigned :1;\nunsigned T1CKPS0 :1;\nunsigned T1CKPS1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN :1;\n};\nstruct {\nunsigned :7;\nunsigned T1RD16 :1;\n};\n} T1CONbits_t;\nextern volatile T1CONbits_t T1CONbits @ 0xFCD;\n\n# 6778\nextern volatile unsigned short TMR1 @ 0xFCE;\n\nasm(\"TMR1 equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1L @ 0xFCE;\n\nasm(\"TMR1L equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1H @ 0xFCF;\n\nasm(\"TMR1H equ 0FCFh\");\n\n\n\nextern volatile unsigned char RCON @ 0xFD0;\n\nasm(\"RCON equ 0FD0h\");\n\n\ntypedef union {\nstruct {\nunsigned NOT_BOR :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_POR :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_PD :1;\n};\nstruct {\nunsigned :3;\nunsigned NOT_TO :1;\n};\nstruct {\nunsigned :4;\nunsigned NOT_RI :1;\n};\nstruct {\nunsigned nBOR :1;\nunsigned nPOR :1;\nunsigned nPD :1;\nunsigned nTO :1;\nunsigned nRI :1;\nunsigned :1;\nunsigned SBOREN :1;\nunsigned IPEN :1;\n};\nstruct {\nunsigned :7;\nunsigned NOT_IPEN :1;\n};\nstruct {\nunsigned BOR :1;\nunsigned POR :1;\nunsigned PD :1;\nunsigned TO :1;\nunsigned RI :1;\nunsigned :2;\nunsigned nIPEN :1;\n};\n} RCONbits_t;\nextern volatile RCONbits_t RCONbits @ 0xFD0;\n\n# 6944\nextern volatile unsigned char WDTCON @ 0xFD1;\n\nasm(\"WDTCON equ 0FD1h\");\n\n\ntypedef union {\nstruct {\nunsigned SWDTEN :1;\n};\nstruct {\nunsigned SWDTE :1;\n};\n} WDTCONbits_t;\nextern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n\n# 6971\nextern volatile unsigned char HLVDCON @ 0xFD2;\n\nasm(\"HLVDCON equ 0FD2h\");\n\n\nextern volatile unsigned char LVDCON @ 0xFD2;\n\nasm(\"LVDCON equ 0FD2h\");\n\n\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} HLVDCONbits_t;\nextern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n\n# 7110\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} LVDCONbits_t;\nextern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n\n# 7240\nextern volatile unsigned char OSCCON @ 0xFD3;\n\nasm(\"OSCCON equ 0FD3h\");\n\n\ntypedef union {\nstruct {\nunsigned SCS :2;\nunsigned IOFS :1;\nunsigned OSTS :1;\nunsigned IRCF :3;\nunsigned IDLEN :1;\n};\nstruct {\nunsigned SCS0 :1;\nunsigned SCS1 :1;\nunsigned FLTS :1;\nunsigned :1;\nunsigned IRCF0 :1;\nunsigned IRCF1 :1;\nunsigned IRCF2 :1;\n};\n} OSCCONbits_t;\nextern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n\n# 7322\nextern volatile unsigned char T0CON @ 0xFD5;\n\nasm(\"T0CON equ 0FD5h\");\n\n\ntypedef union {\nstruct {\nunsigned T0PS :3;\nunsigned PSA :1;\nunsigned T0SE :1;\nunsigned T0CS :1;\nunsigned T08BIT :1;\nunsigned TMR0ON :1;\n};\nstruct {\nunsigned T0PS0 :1;\nunsigned T0PS1 :1;\nunsigned T0PS2 :1;\n};\n} T0CONbits_t;\nextern volatile T0CONbits_t T0CONbits @ 0xFD5;\n\n# 7391\nextern volatile unsigned short TMR0 @ 0xFD6;\n\nasm(\"TMR0 equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0L @ 0xFD6;\n\nasm(\"TMR0L equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0H @ 0xFD7;\n\nasm(\"TMR0H equ 0FD7h\");\n\n\n\nextern volatile unsigned char STATUS @ 0xFD8;\n\nasm(\"STATUS equ 0FD8h\");\n\n\ntypedef union {\nstruct {\nunsigned C :1;\nunsigned DC :1;\nunsigned Z :1;\nunsigned OV :1;\nunsigned N :1;\n};\nstruct {\nunsigned CARRY :1;\n};\nstruct {\nunsigned :4;\nunsigned NEGATIVE :1;\n};\nstruct {\nunsigned :3;\nunsigned OVERFLOW :1;\n};\nstruct {\nunsigned :2;\nunsigned ZERO :1;\n};\n} STATUSbits_t;\nextern volatile STATUSbits_t STATUSbits @ 0xFD8;\n\n# 7487\nextern volatile unsigned short FSR2 @ 0xFD9;\n\nasm(\"FSR2 equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2L @ 0xFD9;\n\nasm(\"FSR2L equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2H @ 0xFDA;\n\nasm(\"FSR2H equ 0FDAh\");\n\n\n\nextern volatile unsigned char PLUSW2 @ 0xFDB;\n\nasm(\"PLUSW2 equ 0FDBh\");\n\n\n\nextern volatile unsigned char PREINC2 @ 0xFDC;\n\nasm(\"PREINC2 equ 0FDCh\");\n\n\n\nextern volatile unsigned char POSTDEC2 @ 0xFDD;\n\nasm(\"POSTDEC2 equ 0FDDh\");\n\n\n\nextern volatile unsigned char POSTINC2 @ 0xFDE;\n\nasm(\"POSTINC2 equ 0FDEh\");\n\n\n\nextern volatile unsigned char INDF2 @ 0xFDF;\n\nasm(\"INDF2 equ 0FDFh\");\n\n\n\nextern volatile unsigned char BSR @ 0xFE0;\n\nasm(\"BSR equ 0FE0h\");\n\n\n\nextern volatile unsigned short FSR1 @ 0xFE1;\n\nasm(\"FSR1 equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1L @ 0xFE1;\n\nasm(\"FSR1L equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1H @ 0xFE2;\n\nasm(\"FSR1H equ 0FE2h\");\n\n\n\nextern volatile unsigned char PLUSW1 @ 0xFE3;\n\nasm(\"PLUSW1 equ 0FE3h\");\n\n\n\nextern volatile unsigned char PREINC1 @ 0xFE4;\n\nasm(\"PREINC1 equ 0FE4h\");\n\n\n\nextern volatile unsigned char POSTDEC1 @ 0xFE5;\n\nasm(\"POSTDEC1 equ 0FE5h\");\n\n\n\nextern volatile unsigned char POSTINC1 @ 0xFE6;\n\nasm(\"POSTINC1 equ 0FE6h\");\n\n\n\nextern volatile unsigned char INDF1 @ 0xFE7;\n\nasm(\"INDF1 equ 0FE7h\");\n\n\n\nextern volatile unsigned char WREG @ 0xFE8;\n\nasm(\"WREG equ 0FE8h\");\n\n\n\nextern volatile unsigned short FSR0 @ 0xFE9;\n\nasm(\"FSR0 equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0L @ 0xFE9;\n\nasm(\"FSR0L equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0H @ 0xFEA;\n\nasm(\"FSR0H equ 0FEAh\");\n\n\n\nextern volatile unsigned char PLUSW0 @ 0xFEB;\n\nasm(\"PLUSW0 equ 0FEBh\");\n\n\n\nextern volatile unsigned char PREINC0 @ 0xFEC;\n\nasm(\"PREINC0 equ 0FECh\");\n\n\n\nextern volatile unsigned char POSTDEC0 @ 0xFED;\n\nasm(\"POSTDEC0 equ 0FEDh\");\n\n\n\nextern volatile unsigned char POSTINC0 @ 0xFEE;\n\nasm(\"POSTINC0 equ 0FEEh\");\n\n\n\nextern volatile unsigned char INDF0 @ 0xFEF;\n\nasm(\"INDF0 equ 0FEFh\");\n\n\n\nextern volatile unsigned char INTCON3 @ 0xFF0;\n\nasm(\"INTCON3 equ 0FF0h\");\n\n\ntypedef union {\nstruct {\nunsigned INT1IF :1;\nunsigned INT2IF :1;\nunsigned :1;\nunsigned INT1IE :1;\nunsigned INT2IE :1;\nunsigned :1;\nunsigned INT1IP :1;\nunsigned INT2IP :1;\n};\nstruct {\nunsigned INT1F :1;\nunsigned INT2F :1;\nunsigned :1;\nunsigned INT1E :1;\nunsigned INT2E :1;\nunsigned :1;\nunsigned INT1P :1;\nunsigned INT2P :1;\n};\n} INTCON3bits_t;\nextern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n\n# 7734\nextern volatile unsigned char INTCON2 @ 0xFF1;\n\nasm(\"INTCON2 equ 0FF1h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned NOT_RBPU :1;\n};\nstruct {\nunsigned RBIP :1;\nunsigned :1;\nunsigned TMR0IP :1;\nunsigned :1;\nunsigned INTEDG2 :1;\nunsigned INTEDG1 :1;\nunsigned INTEDG0 :1;\nunsigned nRBPU :1;\n};\nstruct {\nunsigned :2;\nunsigned T0IP :1;\nunsigned :4;\nunsigned RBPU :1;\n};\n} INTCON2bits_t;\nextern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n\n# 7810\nextern volatile unsigned char INTCON @ 0xFF2;\n\nasm(\"INTCON equ 0FF2h\");\n\n\ntypedef union {\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE_GIEL :1;\nunsigned GIE_GIEH :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\nstruct {\nunsigned :1;\nunsigned INT0F :1;\nunsigned T0IF :1;\nunsigned :1;\nunsigned INT0E :1;\nunsigned T0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned :6;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\n} INTCONbits_t;\nextern volatile INTCONbits_t INTCONbits @ 0xFF2;\n\n# 7946\nextern volatile unsigned short PROD @ 0xFF3;\n\nasm(\"PROD equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODL @ 0xFF3;\n\nasm(\"PRODL equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODH @ 0xFF4;\n\nasm(\"PRODH equ 0FF4h\");\n\n\n\nextern volatile unsigned char TABLAT @ 0xFF5;\n\nasm(\"TABLAT equ 0FF5h\");\n\n\n\n\nextern volatile unsigned short long TBLPTR @ 0xFF6;\n\n\nasm(\"TBLPTR equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRL @ 0xFF6;\n\nasm(\"TBLPTRL equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRH @ 0xFF7;\n\nasm(\"TBLPTRH equ 0FF7h\");\n\n\n\nextern volatile unsigned char TBLPTRU @ 0xFF8;\n\nasm(\"TBLPTRU equ 0FF8h\");\n\n\n\n\nextern volatile unsigned short long PCLAT @ 0xFF9;\n\n\nasm(\"PCLAT equ 0FF9h\");\n\n\n\nextern volatile unsigned short long PC @ 0xFF9;\n\n\nasm(\"PC equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCL @ 0xFF9;\n\nasm(\"PCL equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCLATH @ 0xFFA;\n\nasm(\"PCLATH equ 0FFAh\");\n\n\n\nextern volatile unsigned char PCLATU @ 0xFFB;\n\nasm(\"PCLATU equ 0FFBh\");\n\n\n\nextern volatile unsigned char STKPTR @ 0xFFC;\n\nasm(\"STKPTR equ 0FFCh\");\n\n\ntypedef union {\nstruct {\nunsigned STKPTR :5;\nunsigned :1;\nunsigned STKUNF :1;\nunsigned STKFUL :1;\n};\nstruct {\nunsigned STKPTR0 :1;\nunsigned STKPTR1 :1;\nunsigned STKPTR2 :1;\nunsigned STKPTR3 :1;\nunsigned STKPTR4 :1;\n};\nstruct {\nunsigned :7;\nunsigned STKOVF :1;\n};\n} STKPTRbits_t;\nextern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n\n# 8103\nextern volatile unsigned short long TOS @ 0xFFD;\n\n\nasm(\"TOS equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSL @ 0xFFD;\n\nasm(\"TOSL equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSH @ 0xFFE;\n\nasm(\"TOSH equ 0FFEh\");\n\n\n\nextern volatile unsigned char TOSU @ 0xFFF;\n\nasm(\"TOSU equ 0FFFh\");\n\n# 8134\nextern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n\nextern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n\nextern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n\nextern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n\nextern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n\nextern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n\nextern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n\nextern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n\nextern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n\nextern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n\nextern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n\nextern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n\nextern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n\nextern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n\nextern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n\nextern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n\nextern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n\nextern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n\nextern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n\nextern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n\nextern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n\nextern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n\nextern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n\nextern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n\nextern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n\nextern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n\nextern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n\nextern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n\nextern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n\nextern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n\nextern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n\nextern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n\nextern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n\nextern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n\nextern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n\nextern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n\nextern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n\nextern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n\nextern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n\nextern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n\nextern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n\nextern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n\nextern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n\nextern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n\nextern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n\nextern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n\nextern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n\nextern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n\nextern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n\nextern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n\nextern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n\nextern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n\nextern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n\nextern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n\nextern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n\nextern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n\nextern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n\nextern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n\nextern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n\nextern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n\nextern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n\nextern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n\nextern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n\nextern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n\nextern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n\nextern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n\nextern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n\nextern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n\nextern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n\nextern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n\nextern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n\nextern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n\nextern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n\nextern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n\nextern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n\nextern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n\nextern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n\nextern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n\nextern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n\nextern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n\nextern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n\nextern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n\nextern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n\nextern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n\nextern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n\nextern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n\nextern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n\nextern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n\nextern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n\nextern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n\nextern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n\nextern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n\nextern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n\nextern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n\nextern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n\nextern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n\nextern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n\nextern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n\nextern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n\nextern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n\nextern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n\nextern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n\nextern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n\nextern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n\nextern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n\nextern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n\nextern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n\nextern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n\nextern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n\nextern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n\nextern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n\nextern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n\nextern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n\nextern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n\nextern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n\nextern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n\nextern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n\nextern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n\nextern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n\nextern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n\nextern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n\nextern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n\nextern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n\nextern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n\nextern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n\nextern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n\nextern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n\nextern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n\nextern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n\nextern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n\nextern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n\nextern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n\nextern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n\nextern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n\nextern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n\nextern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n\nextern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n\nextern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n\nextern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n\nextern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n\nextern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n\nextern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n\nextern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n\nextern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n\nextern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n\nextern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n\nextern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n\nextern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n\nextern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n\nextern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n\nextern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n\nextern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n\nextern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n\nextern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n\nextern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n\nextern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n\nextern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n\nextern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n\nextern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n\nextern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n\nextern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n\nextern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n\nextern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n\nextern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n\nextern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n\nextern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n\nextern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n\nextern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n\nextern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n\nextern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n\nextern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n\nextern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n\nextern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n\nextern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n\nextern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n\nextern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n\nextern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n\nextern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n\nextern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n\nextern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n\nextern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n\nextern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n\nextern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n\nextern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n\nextern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n\nextern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n\nextern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n\nextern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n\nextern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n\nextern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n\nextern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n\nextern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n\nextern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n\nextern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n\nextern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n\nextern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n\nextern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n\nextern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n\nextern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n\nextern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n\nextern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n\nextern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n\nextern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n\nextern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n\nextern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n\nextern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n\nextern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n\nextern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n\nextern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n\nextern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n\nextern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n\nextern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n\nextern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n\nextern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n\nextern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n\nextern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n\nextern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n\nextern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n\nextern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n\nextern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n\nextern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n\nextern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n\nextern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n\nextern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n\nextern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n\nextern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n\nextern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n\nextern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n\nextern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n\nextern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n\nextern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n\nextern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n\nextern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n\nextern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n\nextern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n\nextern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n\nextern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n\nextern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n\nextern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n\nextern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n\nextern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n\nextern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n\nextern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n\nextern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n\nextern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n\nextern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n\nextern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n\nextern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n\nextern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n\nextern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n\nextern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n\nextern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n\nextern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n\nextern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n\nextern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n\nextern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n\nextern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n\nextern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n\nextern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n\nextern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n\nextern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n\nextern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n\nextern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n\nextern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n\nextern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n\nextern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n\nextern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n\nextern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n\nextern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n\nextern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n\nextern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n\nextern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n\nextern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n\nextern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n\nextern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n\nextern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n\nextern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n\nextern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n\nextern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n\nextern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n\nextern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n\nextern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n\nextern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n\nextern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n\nextern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n\nextern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n\nextern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n\nextern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n\nextern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n\nextern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n\nextern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n\nextern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n\nextern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n\nextern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n\nextern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n\nextern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\n# 2008 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\adc.h\"\nunion ADCResult\n{\nint lr;\nchar br[2];\n};\n\nchar BusyADC (void);\n\nvoid ConvertADC (void);\n\nvoid CloseADC(void);\n\n# 2026\nint ReadADC(void);\n\n# 2040\nvoid OpenADC ( unsigned char ,\nunsigned char ,\nunsigned char );\n\n# 2084\nvoid SetChanADC(unsigned char );\n\n# 2100\nvoid SelChanConvADC( unsigned char );\n\n# 38 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\ancomp.h\"\nvoid Close_ancomp( void );\nvoid Open_ancomp(unsigned char config);\n\n# 584 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\spi.h\"\nvoid OpenSPI( unsigned char sync_mode,\nunsigned char bus_mode,\nunsigned char smp_phase );\n\nsigned char WriteSPI( unsigned char data_out );\n\nvoid getsSPI( unsigned char *rdptr, unsigned char length );\n\nvoid putsSPI( unsigned char *wrptr );\n\nunsigned char ReadSPI( void );\n\n# 414 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\can2510.h\"\nvoid CAN2510Initialize(  unsigned int configuration,\n unsigned char brp,\n unsigned char interruptFlags,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nsigned char CAN2510Init(  unsigned long BufferConfig,\n unsigned long BitTimeConfig,\n unsigned char interruptEnables,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nvoid CAN2510Enable( void );\n\nvoid CAN2510Disable( void );\n\nvoid CAN2510Reset( void );\n\nvoid CAN2510SetMode(  unsigned char mode );\n\nunsigned char CAN2510ReadMode( void );\n\nunsigned char CAN2510ReadStatus( void );\n\nunsigned char CAN2510ErrorState( void );\n\nunsigned char CAN2510InterruptStatus( void );\n\nvoid CAN2510InterruptEnable( unsigned char interruptFlags );\n\nunsigned char CAN2510ByteRead(  unsigned char addr );\n\nvoid CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n\nvoid CAN2510SequentialRead(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510SequentialWrite(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510BitModify(  unsigned char address,\n unsigned char mask,\n unsigned char data );\n\nvoid CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n\nvoid CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n\nvoid CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n\nvoid CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n\nsigned char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n unsigned int mask,\n unsigned int *filters );\n\nsigned char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n unsigned long mask,\n unsigned long *filters );\n\nsigned char CAN2510WriteStd(  unsigned int msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nsigned char CAN2510WriteXtd(  unsigned long msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadRTRStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes );\n\nvoid CAN2510LoadRTRXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes );\n\nvoid CAN2510SetBufferPriority(  unsigned char bufferNum,\n unsigned char bufferPriority );\n\nvoid CAN2510SendBuffer(  unsigned char bufferNumber );\n\nsigned char CAN2510WriteBuffer(  unsigned char bufferNum );\n\nunsigned char CAN2510DataReady(  unsigned char bufferNum );\n\nunsigned char CAN2510DataRead(  unsigned char bufferNum,\n unsigned long *msgId,\n unsigned char *numBytes,\n unsigned char *data );\n\n# 64 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\capture.h\"\nunion capstatus\n{\n\n# 73\nstruct\n{\n\n# 77\nunsigned Cap1OVF:1;\n\n# 82\nunsigned Cap2OVF:1;\n\n# 115\n};\n\nunsigned :8;\n\n};\n\nextern union capstatus CapStatus;\n\nunion CapResult\n{\nunsigned int lc;\nchar bc[2];\n};\n\n# 474\nvoid OpenCapture1 ( unsigned char config);\nunsigned int ReadCapture1 (void);\nvoid CloseCapture1 (void);\n\n# 484\nvoid OpenCapture2 ( unsigned char config);\nunsigned int ReadCapture2 (void);\nvoid CloseCapture2 (void);\n\n# 385 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\compare.h\"\nvoid OpenCompare1(unsigned char config,unsigned int period);\nvoid CloseCompare1(void);\n\n# 392\nvoid OpenCompare2(unsigned char config, unsigned int period);\nvoid CloseCompare2(void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\EEP.h\"\nvoid Busy_eep ( void );\nunsigned char Read_b_eep( unsigned int badd );\nvoid Write_b_eep( unsigned int badd, unsigned char bdata );\n\n# 2 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stddef.h\"\ntypedef int ptrdiff_t;\ntypedef unsigned size_t;\ntypedef unsigned short wchar_t;\n\n# 13\nextern int errno;\n\n# 65 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\GenericTypeDefs.h\"\ntypedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n\n\ntypedef enum _BIT { CLEAR = 0, SET } BIT;\n\n# 75\ntypedef signed int INT;\ntypedef signed char INT8;\ntypedef signed short int INT16;\ntypedef signed long int INT32;\n\n\n\n typedef signed long long INT64;\n\n\n\ntypedef unsigned int UINT;\ntypedef unsigned char UINT8;\ntypedef unsigned short int UINT16;\n\n# 93\ntypedef unsigned long int UINT32;\n\n\n typedef unsigned long long UINT64;\n\n\ntypedef union\n{\nUINT8 Val;\nstruct\n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n} bits;\n} UINT8_VAL, UINT8_BITS;\n\ntypedef union\n{\nUINT16 Val;\nUINT8 v[2] ;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\n} byte;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n} bits;\n} UINT16_VAL, UINT16_BITS;\n\n# 187\ntypedef union\n{\nUINT32 Val;\nUINT16 w[2] ;\nUINT8 v[4] ;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\n} word;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\nUINT8 UB;\nUINT8 MB;\n} byte;\nstruct \n{\nUINT16_VAL low;\nUINT16_VAL high;\n}wordUnion;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n} bits;\n} UINT32_VAL;\n\n\n\ntypedef union\n{\nUINT64 Val;\nUINT32 d[2] ;\nUINT16 w[4] ;\nUINT8 v[8] ;\nstruct \n{\nUINT32 LD;\nUINT32 HD;\n} dword;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\nUINT16 UW;\nUINT16 MW;\n} word;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n UINT8 b32:1;\n UINT8 b33:1;\n UINT8 b34:1;\n UINT8 b35:1;\n UINT8 b36:1;\n UINT8 b37:1;\n UINT8 b38:1;\n UINT8 b39:1;\n UINT8 b40:1;\n UINT8 b41:1;\n UINT8 b42:1;\n UINT8 b43:1;\n UINT8 b44:1;\n UINT8 b45:1;\n UINT8 b46:1;\n UINT8 b47:1;\n UINT8 b48:1;\n UINT8 b49:1;\n UINT8 b50:1;\n UINT8 b51:1;\n UINT8 b52:1;\n UINT8 b53:1;\n UINT8 b54:1;\n UINT8 b55:1;\n UINT8 b56:1;\n UINT8 b57:1;\n UINT8 b58:1;\n UINT8 b59:1;\n UINT8 b60:1;\n UINT8 b61:1;\n UINT8 b62:1;\n UINT8 b63:1;\n} bits;\n} UINT64_VAL;\n\n# 339\ntypedef void VOID;\n\ntypedef char CHAR8;\ntypedef unsigned char UCHAR8;\n\ntypedef unsigned char BYTE;\ntypedef unsigned short int WORD;\ntypedef unsigned long DWORD;\n\n\ntypedef unsigned long long QWORD;\ntypedef signed char CHAR;\ntypedef signed short int SHORT;\ntypedef signed long LONG;\n\n\ntypedef signed long long LONGLONG;\ntypedef union\n{\nBYTE Val;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n} bits;\n} BYTE_VAL, BYTE_BITS;\n\ntypedef union\n{\nWORD Val;\nBYTE v[2] ;\nstruct \n{\nBYTE LB;\nBYTE HB;\n} byte;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n} bits;\n} WORD_VAL, WORD_BITS;\n\ntypedef union\n{\nDWORD Val;\nWORD w[2] ;\nBYTE v[4] ;\nstruct \n{\nWORD LW;\nWORD HW;\n} word;\nstruct \n{\nBYTE LB;\nBYTE HB;\nBYTE UB;\nBYTE MB;\n} byte;\nstruct \n{\nWORD_VAL low;\nWORD_VAL high;\n}wordUnion;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n} bits;\n} DWORD_VAL;\n\n\ntypedef union\n{\nQWORD Val;\nDWORD d[2] ;\nWORD w[4] ;\nBYTE v[8] ;\nstruct \n{\nDWORD LD;\nDWORD HD;\n} dword;\nstruct \n{\nWORD LW;\nWORD HW;\nWORD UW;\nWORD MW;\n} word;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n BYTE b32:1;\n BYTE b33:1;\n BYTE b34:1;\n BYTE b35:1;\n BYTE b36:1;\n BYTE b37:1;\n BYTE b38:1;\n BYTE b39:1;\n BYTE b40:1;\n BYTE b41:1;\n BYTE b42:1;\n BYTE b43:1;\n BYTE b44:1;\n BYTE b45:1;\n BYTE b46:1;\n BYTE b47:1;\n BYTE b48:1;\n BYTE b49:1;\n BYTE b50:1;\n BYTE b51:1;\n BYTE b52:1;\n BYTE b53:1;\n BYTE b54:1;\n BYTE b55:1;\n BYTE b56:1;\n BYTE b57:1;\n BYTE b58:1;\n BYTE b59:1;\n BYTE b60:1;\n BYTE b61:1;\n BYTE b62:1;\n BYTE b63:1;\n} bits;\n} QWORD_VAL;\n\n# 113 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\flash.h\"\nextern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 120\nextern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n\nextern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n\nextern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 775 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\i2c.h\"\nvoid IdleI2C( void );\n\nvoid OpenI2C( unsigned char sync_mode, unsigned char slew );\n\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char putsI2C( unsigned char *wrptr );\n\nunsigned char ReadI2C( void );\n\nvoid CloseI2C( void );\n\n# 899\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char getsI2C( unsigned char *rdptr, unsigned char length );\n\n# 908\nsigned char EEAckPolling( unsigned char control );\n\nsigned char EEByteWrite( unsigned char control,\nunsigned char address,\nunsigned char data );\n\nsigned int EECurrentAddRead( unsigned char control );\n\nsigned char EEPageWrite( unsigned char control,\nunsigned char address,\nunsigned char *wrptr );\n\nsigned int EERandomRead( unsigned char control, unsigned char address );\n\nsigned char EESequentialRead( unsigned char control,\nunsigned char address,\nunsigned char *rdptr,\nunsigned char length );\n\n# 325 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\mwire.h\"\nvoid OpenMwire( unsigned char sync_mode );\n\nunsigned char ReadMwire( unsigned char high_byte,\nunsigned char low_byte );\n\n# 341\nsigned char WriteMwire( unsigned char data_out );\n\n# 354\nvoid getsMwire( unsigned char *rdptr, unsigned char length );\n\n# 126 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\portb.h\"\nvoid OpenPORTB( unsigned char config);\n\n# 176\nvoid OpenRB0INT( unsigned char config);\n\n# 194\nvoid OpenRB1INT( unsigned char config);\n\n# 211\nvoid OpenRB2INT( unsigned char config);\n\n# 85 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\pwm.h\"\nunion PWMDC\n{\nunsigned int lpwm;\nchar bpwm[2];\n};\n\n# 467\nvoid OpenPWM1 ( char period);\nvoid SetDCPWM1 ( unsigned int duty_cycle);\n\n# 477\nvoid ClosePWM1 (void);\n\n# 485\nvoid OpenPWM2 ( char period);\nvoid SetDCPWM2( unsigned int duty_cycle);\n\n# 492\nvoid ClosePWM2 (void);\n\n# 16 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\reset.h\"\nchar isMCLR(void);\nvoid StatusReset(void);\nchar isPOR(void);\nchar isWU(void);\n\n\nchar isBOR(void);\n\n\n\nchar isWDTTO(void);\nchar isWDTWU(void);\n\n\n\nchar isLVD(void);\n\n# 687 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\rtcc.h\"\nvoid Open_RTCC(void);\nvoid Close_RTCC(void);\nunsigned char update_RTCC(void);\n\n# 97 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_i2c.h\"\nvoid SWStopI2C ( void );\nvoid SWStartI2C ( void );\nvoid SWRestartI2C ( void );\nvoid SWStopI2C ( void );\n\nsigned char SWAckI2C( void );\nsigned char Clock_test( void );\nsigned int SWReadI2C( void );\nsigned char SWWriteI2C(  unsigned char data_out );\nsigned char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\nsigned char SWPutsI2C(  unsigned char *wrptr );\n\n# 84 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_spi.h\"\nvoid OpenSWSPI(void);\n\n\nchar WriteSWSPI( char output);\n\n\nvoid SetCSSWSPI(void);\n\n\nvoid ClearCSSWSPI(void);\n\n# 47 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_uart.h\"\nvoid OpenUART(void);\n\nunsigned char ReadUART(void);\n\nvoid WriteUART( unsigned char);\n\nvoid getsUART( char *, unsigned char);\n\nvoid putsUART( char *);\n\n# 79\nextern void DelayRXBitUART (void);\nextern void DelayRXHalfBitUART(void);\nextern void DelayTXBitUART (void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\timers.h\"\nunion Timers\n{\nunsigned int lt;\nchar bt[2];\n};\n\n# 118\nvoid OpenTimer0 ( unsigned char config);\nvoid CloseTimer0 (void);\nunsigned int ReadTimer0 (void);\nvoid WriteTimer0 ( unsigned int timer0);\n\n# 236\nvoid OpenTimer1 ( unsigned char config);\nvoid CloseTimer1 (void);\nunsigned int ReadTimer1 (void);\nvoid WriteTimer1 ( unsigned int timer1);\n\n# 325\nvoid OpenTimer2 ( unsigned char config);\nvoid CloseTimer2 (void);\n\n# 391\nvoid OpenTimer3 ( unsigned char config);\nvoid CloseTimer3 (void);\nunsigned int ReadTimer3 (void);\nvoid WriteTimer3 ( unsigned int timer3);\n\n# 1179\nvoid SetTmrCCPSrc( unsigned char );\n\n# 568 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\usart.h\"\nunion USART\n{\nunsigned char val;\nstruct\n{\nunsigned RX_NINE:1;\nunsigned TX_NINE:1;\nunsigned FRAME_ERROR:1;\nunsigned OVERRUN_ERROR:1;\nunsigned fill:4;\n};\n};\nextern union USART USART_Status;\nvoid OpenUSART ( unsigned char config, unsigned spbrg);\n\n# 596\nchar ReadUSART (void);\nvoid WriteUSART ( char data);\nvoid getsUSART ( char *buffer, unsigned char len);\nvoid putsUSART ( char *data);\nvoid putrsUSART ( const  char *data);\n\n# 654\nvoid baudUSART ( unsigned char baudconfig);\n\n# 87 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\xlcd.h\"\nvoid OpenXLCD( unsigned char);\n\n# 92\nvoid SetCGRamAddr( unsigned char);\n\n# 97\nvoid SetDDRamAddr( unsigned char);\n\n# 102\nunsigned char BusyXLCD(void);\n\n# 107\nunsigned char ReadAddrXLCD(void);\n\n# 112\nchar ReadDataXLCD(void);\n\n# 117\nvoid WriteCmdXLCD( unsigned char);\n\n# 122\nvoid WriteDataXLCD( char);\n\n# 132\nvoid putsXLCD( char *);\n\n# 137\nvoid putrsXLCD(const char *);\n\n\nextern void DelayFor18TCY(void);\nextern void DelayPORXLCD(void);\nextern void DelayXLCD(void);\n\n# 18 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18.h\"\n__attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *);\n\n\n# 143\n#pragma intrinsic(_delay)\nextern void _delay(unsigned long);\n#pragma intrinsic(_delaywdt)\nextern void _delaywdt(unsigned long);\n#pragma intrinsic(_delay3)\nextern void _delay3(unsigned char);\n\n# 13 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stdint.h\"\ntypedef signed char int8_t;\n\n# 20\ntypedef signed int int16_t;\n\n# 28\ntypedef signed short long int int24_t;\n\n# 36\ntypedef signed long int int32_t;\n\n# 43\ntypedef unsigned char uint8_t;\n\n# 49\ntypedef unsigned int uint16_t;\n\n# 56\ntypedef unsigned short long int uint24_t;\n\n# 63\ntypedef unsigned long int uint32_t;\n\n# 71\ntypedef signed char int_least8_t;\n\n# 78\ntypedef signed int int_least16_t;\n\n# 90\ntypedef signed short long int int_least24_t;\n\n# 98\ntypedef signed long int int_least32_t;\n\n# 105\ntypedef unsigned char uint_least8_t;\n\n# 111\ntypedef unsigned int uint_least16_t;\n\n# 121\ntypedef unsigned short long int uint_least24_t;\n\n# 128\ntypedef unsigned long int uint_least32_t;\n\n# 137\ntypedef signed char int_fast8_t;\n\n# 144\ntypedef signed int int_fast16_t;\n\n# 156\ntypedef signed short long int int_fast24_t;\n\n# 164\ntypedef signed long int int_fast32_t;\n\n# 171\ntypedef unsigned char uint_fast8_t;\n\n# 177\ntypedef unsigned int uint_fast16_t;\n\n# 187\ntypedef unsigned short long int uint_fast24_t;\n\n# 194\ntypedef unsigned long int uint_fast32_t;\n\n# 200\ntypedef int32_t intmax_t;\n\n\n\n\ntypedef uint32_t uintmax_t;\n\n\n\n\ntypedef int16_t intptr_t;\n\n\n\n\ntypedef uint16_t uintptr_t;\n\n# 50 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick.h\"\nvoid tick_init();\n\n# 62\nuint32_t tick_get();\n\n# 71\nvoid tick_update();\n\n# 40 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.h\"\nenum enCtrlDirs {\nE_PID_DIRECT,\nE_PID_REVERSE,\n};\n\nstruct pid_controller {\n\nfloat * input;\nfloat * output;\nfloat * setpoint;\n\nfloat Kp;\nfloat Ki;\nfloat Kd;\n\nfloat omin;\nfloat omax;\n\nfloat iterm;\nfloat lastin;\n\nuint32_t lasttime;\nuint32_t sampletime;\n\nuint8_t automode;\nenum enCtrlDirs direction;\n};\n\ntypedef struct pid_controller * pid_t;\n\n# 90\npid_t pid_create(pid_t pid, float* in, float* out, float* set, float kp, float ki, float kd);\n\n# 103\nuint8_t pid_compute(pid_t pid);\n\n# 116\nvoid pid_tune(pid_t pid, float kp, float ki, float kd);\n\n# 126\nvoid pid_sample(pid_t pid, uint32_t time);\n\n# 135\nvoid pid_limits(pid_t pid, float min, float max);\n\n# 146\nvoid pid_auto(pid_t pid);\n\nvoid pid_manual(pid_t pid);\n\n# 161\nvoid pid_direction(pid_t pid, enum enCtrlDirs direction);\n\n# 24 \"C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c\"\npid_t pid_create(pid_t pid, float* in, float* out, float* set, float kp, float ki, float kd)\n{\npid->input = in;\npid->output = out;\npid->setpoint = set;\npid->automode = 0;\npid_limits(pid, 0, 255);\npid->sampletime = 100 * (((unsigned long long)((12000000 + 128ull)/256ull)) / 1000);\n\npid_direction(pid, E_PID_DIRECT);\npid_tune(pid, kp, ki, kd);\n\npid->lasttime = tick_get() - pid->sampletime;\n\nreturn pid;\n}\n\nuint8_t pid_compute(pid_t pid)\n{\nuint32_t now;\n\nif (!pid->automode)\nreturn 0;\nnow = tick_get();\nif (now - pid->lasttime >= pid->sampletime) {\nfloat in = *(pid->input);\n\nfloat error = (*(pid->setpoint)) - in;\n\npid->iterm += (pid->Ki * error);\nif (pid->iterm > pid->omax)\npid->iterm = pid->omax;\nelse if (pid->iterm < pid->omin)\npid->iterm = pid->omin;\n\nfloat dinput = in - pid->lastin;\n\nfloat out = pid->Kp * error + pid->iterm - pid->Kd * dinput;\n\nif (out > pid->omax)\nout = pid->omax;\nelse if (out < pid->omin)\nout = pid->omin;\n\n*(pid->output) = out;\n\npid->lastin = in;\npid->lasttime = now;\nreturn 1;\n}\nreturn 0;\n}\n\nvoid pid_tune(pid_t pid, float kp, float ki, float kd)\n{\nif (kp < 0 || ki < 0 || kd < 0)\nreturn;\n\nfloat ssec = ((float) pid->sampletime) / ((unsigned long long)((12000000 + 128ull)/256ull));\n\npid->Kp = kp;\npid->Ki = ki * ssec;\npid->Kd = kd / ssec;\n\nif (pid->direction == E_PID_REVERSE) {\npid->Kp = 0 - pid->Kp;\npid->Ki = 0 - pid->Ki;\npid->Kd = 0 - pid->Kd;\n}\n}\n\nvoid pid_sample(pid_t pid, uint32_t time)\n{\nif (time > 0) {\nfloat ratio = (float) (time * (((unsigned long long)((12000000 + 128ull)/256ull)) / 1000)) / (float) pid->sampletime;\npid->Ki *= ratio;\npid->Kd /= ratio;\npid->sampletime = (uint32_t) (time * (((unsigned long long)((12000000 + 128ull)/256ull)) / 1000));\n}\n}\n\nvoid pid_limits(pid_t pid, float min, float max)\n{\nif (min >= max) return;\npid->omin = min;\npid->omax = max;\n\nif (pid->automode) {\nif (*(pid->output) > pid->omax)\n*(pid->output) = pid->omax;\nelse if (*(pid->output) < pid->omin)\n*(pid->output) = pid->omin;\n\nif (pid->iterm > pid->omax)\npid->iterm = pid->omax;\nelse if (pid->iterm < pid->omin)\npid->iterm = pid->omin;\n}\n}\n\nvoid pid_auto(pid_t pid)\n{\nif (!pid->automode) {\npid->lastin = *(pid->output);\npid->lastin = *(pid->input);\nif (pid->iterm > pid->omax)\npid->iterm = pid->omax;\nelse if (pid->iterm < pid->omin)\npid->iterm = pid->omin;\npid->automode = 1;\n}\n}\n\nvoid pid_direction(pid_t pid, enum enCtrlDirs direction)\n{\nif (pid->automode && pid->direction != direction) {\npid->Kp = (0 - pid->Kp);\npid->Ki = 0 - pid->Ki;\npid->Kd = 0 - pid->Kd;\n}\npid->direction = direction;\n}\n\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/io.p1",
    "content": "Version 3.2 HI-TECH Software Intermediate Code\n\"2373 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[v _PORTA `Vuc ~T0 @X0 0 e@3968 ]\n\"2529\n[v _PORTB `Vuc ~T0 @X0 0 e@3969 ]\n\"2638\n[v _PORTC `Vuc ~T0 @X0 0 e@3970 ]\n\"2791\n[v _PORTE `Vuc ~T0 @X0 0 e@3972 ]\n\"3406\n[v _TRISA `Vuc ~T0 @X0 0 e@3986 ]\n\"3603\n[v _TRISB `Vuc ~T0 @X0 0 e@3987 ]\n\"3824\n[v _TRISC `Vuc ~T0 @X0 0 e@3988 ]\n[; ;stdint.h: 13: typedef signed char int8_t;\n[; ;stdint.h: 20: typedef signed int int16_t;\n[; ;stdint.h: 28: typedef signed short long int int24_t;\n[; ;stdint.h: 36: typedef signed long int int32_t;\n[; ;stdint.h: 43: typedef unsigned char uint8_t;\n[; ;stdint.h: 49: typedef unsigned int uint16_t;\n[; ;stdint.h: 56: typedef unsigned short long int uint24_t;\n[; ;stdint.h: 63: typedef unsigned long int uint32_t;\n[; ;stdint.h: 71: typedef signed char int_least8_t;\n[; ;stdint.h: 78: typedef signed int int_least16_t;\n[; ;stdint.h: 90: typedef signed short long int int_least24_t;\n[; ;stdint.h: 98: typedef signed long int int_least32_t;\n[; ;stdint.h: 105: typedef unsigned char uint_least8_t;\n[; ;stdint.h: 111: typedef unsigned int uint_least16_t;\n[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;\n[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;\n[; ;stdint.h: 137: typedef signed char int_fast8_t;\n[; ;stdint.h: 144: typedef signed int int_fast16_t;\n[; ;stdint.h: 156: typedef signed short long int int_fast24_t;\n[; ;stdint.h: 164: typedef signed long int int_fast32_t;\n[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;\n[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;\n[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;\n[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;\n[; ;stdint.h: 200: typedef int32_t intmax_t;\n[; ;stdint.h: 205: typedef uint32_t uintmax_t;\n[; ;stdint.h: 210: typedef int16_t intptr_t;\n[; ;stdint.h: 215: typedef uint16_t uintptr_t;\n[; ;io.h: 59: void io_mode(uint8_t pin, uint8_t mode);\n[; ;io.h: 70: void io_write(uint8_t pin, uint8_t value);\n[; ;io.h: 83: uint8_t io_read( uint8_t pin );\n[; ;pic18f2550.h: 44: extern volatile unsigned short UFRM @ 0xF66;\n\"46 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[; ;pic18f2550.h: 46: asm(\"UFRM equ 0F66h\");\n[; <\" UFRM equ 0F66h ;# \">\n[; ;pic18f2550.h: 50: extern volatile unsigned char UFRML @ 0xF66;\n\"52\n[; ;pic18f2550.h: 52: asm(\"UFRML equ 0F66h\");\n[; <\" UFRML equ 0F66h ;# \">\n[; ;pic18f2550.h: 55: typedef union {\n[; ;pic18f2550.h: 56: struct {\n[; ;pic18f2550.h: 57: unsigned FRM :8;\n[; ;pic18f2550.h: 58: };\n[; ;pic18f2550.h: 59: struct {\n[; ;pic18f2550.h: 60: unsigned FRM0 :1;\n[; ;pic18f2550.h: 61: unsigned FRM1 :1;\n[; ;pic18f2550.h: 62: unsigned FRM2 :1;\n[; ;pic18f2550.h: 63: unsigned FRM3 :1;\n[; ;pic18f2550.h: 64: unsigned FRM4 :1;\n[; ;pic18f2550.h: 65: unsigned FRM5 :1;\n[; ;pic18f2550.h: 66: unsigned FRM6 :1;\n[; ;pic18f2550.h: 67: unsigned FRM7 :1;\n[; ;pic18f2550.h: 68: };\n[; ;pic18f2550.h: 69: struct {\n[; ;pic18f2550.h: 70: unsigned FRML :8;\n[; ;pic18f2550.h: 71: };\n[; ;pic18f2550.h: 72: } UFRMLbits_t;\n[; ;pic18f2550.h: 73: extern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n[; ;pic18f2550.h: 127: extern volatile unsigned char UFRMH @ 0xF67;\n\"129\n[; ;pic18f2550.h: 129: asm(\"UFRMH equ 0F67h\");\n[; <\" UFRMH equ 0F67h ;# \">\n[; ;pic18f2550.h: 132: typedef union {\n[; ;pic18f2550.h: 133: struct {\n[; ;pic18f2550.h: 134: unsigned FRM :3;\n[; ;pic18f2550.h: 135: };\n[; ;pic18f2550.h: 136: struct {\n[; ;pic18f2550.h: 137: unsigned FRM8 :1;\n[; ;pic18f2550.h: 138: unsigned FRM9 :1;\n[; ;pic18f2550.h: 139: unsigned FRM10 :1;\n[; ;pic18f2550.h: 140: };\n[; ;pic18f2550.h: 141: } UFRMHbits_t;\n[; ;pic18f2550.h: 142: extern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n[; ;pic18f2550.h: 166: extern volatile unsigned char UIR @ 0xF68;\n\"168\n[; ;pic18f2550.h: 168: asm(\"UIR equ 0F68h\");\n[; <\" UIR equ 0F68h ;# \">\n[; ;pic18f2550.h: 171: typedef union {\n[; ;pic18f2550.h: 172: struct {\n[; ;pic18f2550.h: 173: unsigned URSTIF :1;\n[; ;pic18f2550.h: 174: unsigned UERRIF :1;\n[; ;pic18f2550.h: 175: unsigned ACTVIF :1;\n[; ;pic18f2550.h: 176: unsigned TRNIF :1;\n[; ;pic18f2550.h: 177: unsigned IDLEIF :1;\n[; ;pic18f2550.h: 178: unsigned STALLIF :1;\n[; ;pic18f2550.h: 179: unsigned SOFIF :1;\n[; ;pic18f2550.h: 180: };\n[; ;pic18f2550.h: 181: } UIRbits_t;\n[; ;pic18f2550.h: 182: extern volatile UIRbits_t UIRbits @ 0xF68;\n[; ;pic18f2550.h: 221: extern volatile unsigned char UIE @ 0xF69;\n\"223\n[; ;pic18f2550.h: 223: asm(\"UIE equ 0F69h\");\n[; <\" UIE equ 0F69h ;# \">\n[; ;pic18f2550.h: 226: typedef union {\n[; ;pic18f2550.h: 227: struct {\n[; ;pic18f2550.h: 228: unsigned URSTIE :1;\n[; ;pic18f2550.h: 229: unsigned UERRIE :1;\n[; ;pic18f2550.h: 230: unsigned ACTVIE :1;\n[; ;pic18f2550.h: 231: unsigned TRNIE :1;\n[; ;pic18f2550.h: 232: unsigned IDLEIE :1;\n[; ;pic18f2550.h: 233: unsigned STALLIE :1;\n[; ;pic18f2550.h: 234: unsigned SOFIE :1;\n[; ;pic18f2550.h: 235: };\n[; ;pic18f2550.h: 236: } UIEbits_t;\n[; ;pic18f2550.h: 237: extern volatile UIEbits_t UIEbits @ 0xF69;\n[; ;pic18f2550.h: 276: extern volatile unsigned char UEIR @ 0xF6A;\n\"278\n[; ;pic18f2550.h: 278: asm(\"UEIR equ 0F6Ah\");\n[; <\" UEIR equ 0F6Ah ;# \">\n[; ;pic18f2550.h: 281: typedef union {\n[; ;pic18f2550.h: 282: struct {\n[; ;pic18f2550.h: 283: unsigned PIDEF :1;\n[; ;pic18f2550.h: 284: unsigned CRC5EF :1;\n[; ;pic18f2550.h: 285: unsigned CRC16EF :1;\n[; ;pic18f2550.h: 286: unsigned DFN8EF :1;\n[; ;pic18f2550.h: 287: unsigned BTOEF :1;\n[; ;pic18f2550.h: 288: unsigned :2;\n[; ;pic18f2550.h: 289: unsigned BTSEF :1;\n[; ;pic18f2550.h: 290: };\n[; ;pic18f2550.h: 291: } UEIRbits_t;\n[; ;pic18f2550.h: 292: extern volatile UEIRbits_t UEIRbits @ 0xF6A;\n[; ;pic18f2550.h: 326: extern volatile unsigned char UEIE @ 0xF6B;\n\"328\n[; ;pic18f2550.h: 328: asm(\"UEIE equ 0F6Bh\");\n[; <\" UEIE equ 0F6Bh ;# \">\n[; ;pic18f2550.h: 331: typedef union {\n[; ;pic18f2550.h: 332: struct {\n[; ;pic18f2550.h: 333: unsigned PIDEE :1;\n[; ;pic18f2550.h: 334: unsigned CRC5EE :1;\n[; ;pic18f2550.h: 335: unsigned CRC16EE :1;\n[; ;pic18f2550.h: 336: unsigned DFN8EE :1;\n[; ;pic18f2550.h: 337: unsigned BTOEE :1;\n[; ;pic18f2550.h: 338: unsigned :2;\n[; ;pic18f2550.h: 339: unsigned BTSEE :1;\n[; ;pic18f2550.h: 340: };\n[; ;pic18f2550.h: 341: } UEIEbits_t;\n[; ;pic18f2550.h: 342: extern volatile UEIEbits_t UEIEbits @ 0xF6B;\n[; ;pic18f2550.h: 376: extern volatile unsigned char USTAT @ 0xF6C;\n\"378\n[; ;pic18f2550.h: 378: asm(\"USTAT equ 0F6Ch\");\n[; <\" USTAT equ 0F6Ch ;# \">\n[; ;pic18f2550.h: 381: typedef union {\n[; ;pic18f2550.h: 382: struct {\n[; ;pic18f2550.h: 383: unsigned :1;\n[; ;pic18f2550.h: 384: unsigned PPBI :1;\n[; ;pic18f2550.h: 385: unsigned DIR :1;\n[; ;pic18f2550.h: 386: unsigned ENDP :4;\n[; ;pic18f2550.h: 387: };\n[; ;pic18f2550.h: 388: struct {\n[; ;pic18f2550.h: 389: unsigned :3;\n[; ;pic18f2550.h: 390: unsigned ENDP0 :1;\n[; ;pic18f2550.h: 391: unsigned ENDP1 :1;\n[; ;pic18f2550.h: 392: unsigned ENDP2 :1;\n[; ;pic18f2550.h: 393: unsigned ENDP3 :1;\n[; ;pic18f2550.h: 394: };\n[; ;pic18f2550.h: 395: } USTATbits_t;\n[; ;pic18f2550.h: 396: extern volatile USTATbits_t USTATbits @ 0xF6C;\n[; ;pic18f2550.h: 435: extern volatile unsigned char UCON @ 0xF6D;\n\"437\n[; ;pic18f2550.h: 437: asm(\"UCON equ 0F6Dh\");\n[; <\" UCON equ 0F6Dh ;# \">\n[; ;pic18f2550.h: 440: typedef union {\n[; ;pic18f2550.h: 441: struct {\n[; ;pic18f2550.h: 442: unsigned :1;\n[; ;pic18f2550.h: 443: unsigned SUSPND :1;\n[; ;pic18f2550.h: 444: unsigned RESUME :1;\n[; ;pic18f2550.h: 445: unsigned USBEN :1;\n[; ;pic18f2550.h: 446: unsigned PKTDIS :1;\n[; ;pic18f2550.h: 447: unsigned SE0 :1;\n[; ;pic18f2550.h: 448: unsigned PPBRST :1;\n[; ;pic18f2550.h: 449: };\n[; ;pic18f2550.h: 450: } UCONbits_t;\n[; ;pic18f2550.h: 451: extern volatile UCONbits_t UCONbits @ 0xF6D;\n[; ;pic18f2550.h: 485: extern volatile unsigned char UADDR @ 0xF6E;\n\"487\n[; ;pic18f2550.h: 487: asm(\"UADDR equ 0F6Eh\");\n[; <\" UADDR equ 0F6Eh ;# \">\n[; ;pic18f2550.h: 490: typedef union {\n[; ;pic18f2550.h: 491: struct {\n[; ;pic18f2550.h: 492: unsigned ADDR :7;\n[; ;pic18f2550.h: 493: };\n[; ;pic18f2550.h: 494: struct {\n[; ;pic18f2550.h: 495: unsigned ADDR0 :1;\n[; ;pic18f2550.h: 496: unsigned ADDR1 :1;\n[; ;pic18f2550.h: 497: unsigned ADDR2 :1;\n[; ;pic18f2550.h: 498: unsigned ADDR3 :1;\n[; ;pic18f2550.h: 499: unsigned ADDR4 :1;\n[; ;pic18f2550.h: 500: unsigned ADDR5 :1;\n[; ;pic18f2550.h: 501: unsigned ADDR6 :1;\n[; ;pic18f2550.h: 502: };\n[; ;pic18f2550.h: 503: } UADDRbits_t;\n[; ;pic18f2550.h: 504: extern volatile UADDRbits_t UADDRbits @ 0xF6E;\n[; ;pic18f2550.h: 548: extern volatile unsigned char UCFG @ 0xF6F;\n\"550\n[; ;pic18f2550.h: 550: asm(\"UCFG equ 0F6Fh\");\n[; <\" UCFG equ 0F6Fh ;# \">\n[; ;pic18f2550.h: 553: typedef union {\n[; ;pic18f2550.h: 554: struct {\n[; ;pic18f2550.h: 555: unsigned PPB :2;\n[; ;pic18f2550.h: 556: unsigned FSEN :1;\n[; ;pic18f2550.h: 557: unsigned UTRDIS :1;\n[; ;pic18f2550.h: 558: unsigned UPUEN :1;\n[; ;pic18f2550.h: 559: unsigned :1;\n[; ;pic18f2550.h: 560: unsigned UOEMON :1;\n[; ;pic18f2550.h: 561: unsigned UTEYE :1;\n[; ;pic18f2550.h: 562: };\n[; ;pic18f2550.h: 563: struct {\n[; ;pic18f2550.h: 564: unsigned PPB0 :1;\n[; ;pic18f2550.h: 565: unsigned PPB1 :1;\n[; ;pic18f2550.h: 566: };\n[; ;pic18f2550.h: 567: struct {\n[; ;pic18f2550.h: 568: unsigned UPP0 :1;\n[; ;pic18f2550.h: 569: };\n[; ;pic18f2550.h: 570: struct {\n[; ;pic18f2550.h: 571: unsigned :1;\n[; ;pic18f2550.h: 572: unsigned UPP1 :1;\n[; ;pic18f2550.h: 573: };\n[; ;pic18f2550.h: 574: } UCFGbits_t;\n[; ;pic18f2550.h: 575: extern volatile UCFGbits_t UCFGbits @ 0xF6F;\n[; ;pic18f2550.h: 629: extern volatile unsigned char UEP0 @ 0xF70;\n\"631\n[; ;pic18f2550.h: 631: asm(\"UEP0 equ 0F70h\");\n[; <\" UEP0 equ 0F70h ;# \">\n[; ;pic18f2550.h: 634: typedef union {\n[; ;pic18f2550.h: 635: struct {\n[; ;pic18f2550.h: 636: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 637: unsigned EPINEN :1;\n[; ;pic18f2550.h: 638: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 639: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 640: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 641: };\n[; ;pic18f2550.h: 642: struct {\n[; ;pic18f2550.h: 643: unsigned :3;\n[; ;pic18f2550.h: 644: unsigned EP0CONDIS :1;\n[; ;pic18f2550.h: 645: };\n[; ;pic18f2550.h: 646: struct {\n[; ;pic18f2550.h: 647: unsigned :4;\n[; ;pic18f2550.h: 648: unsigned EP0HSHK :1;\n[; ;pic18f2550.h: 649: };\n[; ;pic18f2550.h: 650: struct {\n[; ;pic18f2550.h: 651: unsigned :1;\n[; ;pic18f2550.h: 652: unsigned EP0INEN :1;\n[; ;pic18f2550.h: 653: };\n[; ;pic18f2550.h: 654: struct {\n[; ;pic18f2550.h: 655: unsigned :2;\n[; ;pic18f2550.h: 656: unsigned EP0OUTEN :1;\n[; ;pic18f2550.h: 657: };\n[; ;pic18f2550.h: 658: struct {\n[; ;pic18f2550.h: 659: unsigned EP0STALL :1;\n[; ;pic18f2550.h: 660: };\n[; ;pic18f2550.h: 661: struct {\n[; ;pic18f2550.h: 662: unsigned :3;\n[; ;pic18f2550.h: 663: unsigned EPCONDIS0 :1;\n[; ;pic18f2550.h: 664: };\n[; ;pic18f2550.h: 665: struct {\n[; ;pic18f2550.h: 666: unsigned :4;\n[; ;pic18f2550.h: 667: unsigned EPHSHK0 :1;\n[; ;pic18f2550.h: 668: };\n[; ;pic18f2550.h: 669: struct {\n[; ;pic18f2550.h: 670: unsigned :1;\n[; ;pic18f2550.h: 671: unsigned EPINEN0 :1;\n[; ;pic18f2550.h: 672: };\n[; ;pic18f2550.h: 673: struct {\n[; ;pic18f2550.h: 674: unsigned :2;\n[; ;pic18f2550.h: 675: unsigned EPOUTEN0 :1;\n[; ;pic18f2550.h: 676: };\n[; ;pic18f2550.h: 677: struct {\n[; ;pic18f2550.h: 678: unsigned EPSTALL0 :1;\n[; ;pic18f2550.h: 679: };\n[; ;pic18f2550.h: 680: } UEP0bits_t;\n[; ;pic18f2550.h: 681: extern volatile UEP0bits_t UEP0bits @ 0xF70;\n[; ;pic18f2550.h: 760: extern volatile unsigned char UEP1 @ 0xF71;\n\"762\n[; ;pic18f2550.h: 762: asm(\"UEP1 equ 0F71h\");\n[; <\" UEP1 equ 0F71h ;# \">\n[; ;pic18f2550.h: 765: typedef union {\n[; ;pic18f2550.h: 766: struct {\n[; ;pic18f2550.h: 767: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 768: unsigned EPINEN :1;\n[; ;pic18f2550.h: 769: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 770: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 771: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 772: };\n[; ;pic18f2550.h: 773: struct {\n[; ;pic18f2550.h: 774: unsigned :3;\n[; ;pic18f2550.h: 775: unsigned EP1CONDIS :1;\n[; ;pic18f2550.h: 776: };\n[; ;pic18f2550.h: 777: struct {\n[; ;pic18f2550.h: 778: unsigned :4;\n[; ;pic18f2550.h: 779: unsigned EP1HSHK :1;\n[; ;pic18f2550.h: 780: };\n[; ;pic18f2550.h: 781: struct {\n[; ;pic18f2550.h: 782: unsigned :1;\n[; ;pic18f2550.h: 783: unsigned EP1INEN :1;\n[; ;pic18f2550.h: 784: };\n[; ;pic18f2550.h: 785: struct {\n[; ;pic18f2550.h: 786: unsigned :2;\n[; ;pic18f2550.h: 787: unsigned EP1OUTEN :1;\n[; ;pic18f2550.h: 788: };\n[; ;pic18f2550.h: 789: struct {\n[; ;pic18f2550.h: 790: unsigned EP1STALL :1;\n[; ;pic18f2550.h: 791: };\n[; ;pic18f2550.h: 792: struct {\n[; ;pic18f2550.h: 793: unsigned :3;\n[; ;pic18f2550.h: 794: unsigned EPCONDIS1 :1;\n[; ;pic18f2550.h: 795: };\n[; ;pic18f2550.h: 796: struct {\n[; ;pic18f2550.h: 797: unsigned :4;\n[; ;pic18f2550.h: 798: unsigned EPHSHK1 :1;\n[; ;pic18f2550.h: 799: };\n[; ;pic18f2550.h: 800: struct {\n[; ;pic18f2550.h: 801: unsigned :1;\n[; ;pic18f2550.h: 802: unsigned EPINEN1 :1;\n[; ;pic18f2550.h: 803: };\n[; ;pic18f2550.h: 804: struct {\n[; ;pic18f2550.h: 805: unsigned :2;\n[; ;pic18f2550.h: 806: unsigned EPOUTEN1 :1;\n[; ;pic18f2550.h: 807: };\n[; ;pic18f2550.h: 808: struct {\n[; ;pic18f2550.h: 809: unsigned EPSTALL1 :1;\n[; ;pic18f2550.h: 810: };\n[; ;pic18f2550.h: 811: } UEP1bits_t;\n[; ;pic18f2550.h: 812: extern volatile UEP1bits_t UEP1bits @ 0xF71;\n[; ;pic18f2550.h: 891: extern volatile unsigned char UEP2 @ 0xF72;\n\"893\n[; ;pic18f2550.h: 893: asm(\"UEP2 equ 0F72h\");\n[; <\" UEP2 equ 0F72h ;# \">\n[; ;pic18f2550.h: 896: typedef union {\n[; ;pic18f2550.h: 897: struct {\n[; ;pic18f2550.h: 898: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 899: unsigned EPINEN :1;\n[; ;pic18f2550.h: 900: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 901: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 902: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 903: };\n[; ;pic18f2550.h: 904: struct {\n[; ;pic18f2550.h: 905: unsigned :3;\n[; ;pic18f2550.h: 906: unsigned EP2CONDIS :1;\n[; ;pic18f2550.h: 907: };\n[; ;pic18f2550.h: 908: struct {\n[; ;pic18f2550.h: 909: unsigned :4;\n[; ;pic18f2550.h: 910: unsigned EP2HSHK :1;\n[; ;pic18f2550.h: 911: };\n[; ;pic18f2550.h: 912: struct {\n[; ;pic18f2550.h: 913: unsigned :1;\n[; ;pic18f2550.h: 914: unsigned EP2INEN :1;\n[; ;pic18f2550.h: 915: };\n[; ;pic18f2550.h: 916: struct {\n[; ;pic18f2550.h: 917: unsigned :2;\n[; ;pic18f2550.h: 918: unsigned EP2OUTEN :1;\n[; ;pic18f2550.h: 919: };\n[; ;pic18f2550.h: 920: struct {\n[; ;pic18f2550.h: 921: unsigned EP2STALL :1;\n[; ;pic18f2550.h: 922: };\n[; ;pic18f2550.h: 923: struct {\n[; ;pic18f2550.h: 924: unsigned :3;\n[; ;pic18f2550.h: 925: unsigned EPCONDIS2 :1;\n[; ;pic18f2550.h: 926: };\n[; ;pic18f2550.h: 927: struct {\n[; ;pic18f2550.h: 928: unsigned :4;\n[; ;pic18f2550.h: 929: unsigned EPHSHK2 :1;\n[; ;pic18f2550.h: 930: };\n[; ;pic18f2550.h: 931: struct {\n[; ;pic18f2550.h: 932: unsigned :1;\n[; ;pic18f2550.h: 933: unsigned EPINEN2 :1;\n[; ;pic18f2550.h: 934: };\n[; ;pic18f2550.h: 935: struct {\n[; ;pic18f2550.h: 936: unsigned :2;\n[; ;pic18f2550.h: 937: unsigned EPOUTEN2 :1;\n[; ;pic18f2550.h: 938: };\n[; ;pic18f2550.h: 939: struct {\n[; ;pic18f2550.h: 940: unsigned EPSTALL2 :1;\n[; ;pic18f2550.h: 941: };\n[; ;pic18f2550.h: 942: } UEP2bits_t;\n[; ;pic18f2550.h: 943: extern volatile UEP2bits_t UEP2bits @ 0xF72;\n[; ;pic18f2550.h: 1022: extern volatile unsigned char UEP3 @ 0xF73;\n\"1024\n[; ;pic18f2550.h: 1024: asm(\"UEP3 equ 0F73h\");\n[; <\" UEP3 equ 0F73h ;# \">\n[; ;pic18f2550.h: 1027: typedef union {\n[; ;pic18f2550.h: 1028: struct {\n[; ;pic18f2550.h: 1029: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1030: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1031: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1032: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1033: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1034: };\n[; ;pic18f2550.h: 1035: struct {\n[; ;pic18f2550.h: 1036: unsigned :3;\n[; ;pic18f2550.h: 1037: unsigned EP3CONDIS :1;\n[; ;pic18f2550.h: 1038: };\n[; ;pic18f2550.h: 1039: struct {\n[; ;pic18f2550.h: 1040: unsigned :4;\n[; ;pic18f2550.h: 1041: unsigned EP3HSHK :1;\n[; ;pic18f2550.h: 1042: };\n[; ;pic18f2550.h: 1043: struct {\n[; ;pic18f2550.h: 1044: unsigned :1;\n[; ;pic18f2550.h: 1045: unsigned EP3INEN :1;\n[; ;pic18f2550.h: 1046: };\n[; ;pic18f2550.h: 1047: struct {\n[; ;pic18f2550.h: 1048: unsigned :2;\n[; ;pic18f2550.h: 1049: unsigned EP3OUTEN :1;\n[; ;pic18f2550.h: 1050: };\n[; ;pic18f2550.h: 1051: struct {\n[; ;pic18f2550.h: 1052: unsigned EP3STALL :1;\n[; ;pic18f2550.h: 1053: };\n[; ;pic18f2550.h: 1054: struct {\n[; ;pic18f2550.h: 1055: unsigned :3;\n[; ;pic18f2550.h: 1056: unsigned EPCONDIS3 :1;\n[; ;pic18f2550.h: 1057: };\n[; ;pic18f2550.h: 1058: struct {\n[; ;pic18f2550.h: 1059: unsigned :4;\n[; ;pic18f2550.h: 1060: unsigned EPHSHK3 :1;\n[; ;pic18f2550.h: 1061: };\n[; ;pic18f2550.h: 1062: struct {\n[; ;pic18f2550.h: 1063: unsigned :1;\n[; ;pic18f2550.h: 1064: unsigned EPINEN3 :1;\n[; ;pic18f2550.h: 1065: };\n[; ;pic18f2550.h: 1066: struct {\n[; ;pic18f2550.h: 1067: unsigned :2;\n[; ;pic18f2550.h: 1068: unsigned EPOUTEN3 :1;\n[; ;pic18f2550.h: 1069: };\n[; ;pic18f2550.h: 1070: struct {\n[; ;pic18f2550.h: 1071: unsigned EPSTALL3 :1;\n[; ;pic18f2550.h: 1072: };\n[; ;pic18f2550.h: 1073: } UEP3bits_t;\n[; ;pic18f2550.h: 1074: extern volatile UEP3bits_t UEP3bits @ 0xF73;\n[; ;pic18f2550.h: 1153: extern volatile unsigned char UEP4 @ 0xF74;\n\"1155\n[; ;pic18f2550.h: 1155: asm(\"UEP4 equ 0F74h\");\n[; <\" UEP4 equ 0F74h ;# \">\n[; ;pic18f2550.h: 1158: typedef union {\n[; ;pic18f2550.h: 1159: struct {\n[; ;pic18f2550.h: 1160: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1161: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1162: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1163: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1164: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1165: };\n[; ;pic18f2550.h: 1166: struct {\n[; ;pic18f2550.h: 1167: unsigned :3;\n[; ;pic18f2550.h: 1168: unsigned EP4CONDIS :1;\n[; ;pic18f2550.h: 1169: };\n[; ;pic18f2550.h: 1170: struct {\n[; ;pic18f2550.h: 1171: unsigned :4;\n[; ;pic18f2550.h: 1172: unsigned EP4HSHK :1;\n[; ;pic18f2550.h: 1173: };\n[; ;pic18f2550.h: 1174: struct {\n[; ;pic18f2550.h: 1175: unsigned :1;\n[; ;pic18f2550.h: 1176: unsigned EP4INEN :1;\n[; ;pic18f2550.h: 1177: };\n[; ;pic18f2550.h: 1178: struct {\n[; ;pic18f2550.h: 1179: unsigned :2;\n[; ;pic18f2550.h: 1180: unsigned EP4OUTEN :1;\n[; ;pic18f2550.h: 1181: };\n[; ;pic18f2550.h: 1182: struct {\n[; ;pic18f2550.h: 1183: unsigned EP4STALL :1;\n[; ;pic18f2550.h: 1184: };\n[; ;pic18f2550.h: 1185: struct {\n[; ;pic18f2550.h: 1186: unsigned :3;\n[; ;pic18f2550.h: 1187: unsigned EPCONDIS4 :1;\n[; ;pic18f2550.h: 1188: };\n[; ;pic18f2550.h: 1189: struct {\n[; ;pic18f2550.h: 1190: unsigned :4;\n[; ;pic18f2550.h: 1191: unsigned EPHSHK4 :1;\n[; ;pic18f2550.h: 1192: };\n[; ;pic18f2550.h: 1193: struct {\n[; ;pic18f2550.h: 1194: unsigned :1;\n[; ;pic18f2550.h: 1195: unsigned EPINEN4 :1;\n[; ;pic18f2550.h: 1196: };\n[; ;pic18f2550.h: 1197: struct {\n[; ;pic18f2550.h: 1198: unsigned :2;\n[; ;pic18f2550.h: 1199: unsigned EPOUTEN4 :1;\n[; ;pic18f2550.h: 1200: };\n[; ;pic18f2550.h: 1201: struct {\n[; ;pic18f2550.h: 1202: unsigned EPSTALL4 :1;\n[; ;pic18f2550.h: 1203: };\n[; ;pic18f2550.h: 1204: } UEP4bits_t;\n[; ;pic18f2550.h: 1205: extern volatile UEP4bits_t UEP4bits @ 0xF74;\n[; ;pic18f2550.h: 1284: extern volatile unsigned char UEP5 @ 0xF75;\n\"1286\n[; ;pic18f2550.h: 1286: asm(\"UEP5 equ 0F75h\");\n[; <\" UEP5 equ 0F75h ;# \">\n[; ;pic18f2550.h: 1289: typedef union {\n[; ;pic18f2550.h: 1290: struct {\n[; ;pic18f2550.h: 1291: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1292: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1293: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1294: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1295: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1296: };\n[; ;pic18f2550.h: 1297: struct {\n[; ;pic18f2550.h: 1298: unsigned :3;\n[; ;pic18f2550.h: 1299: unsigned EP5CONDIS :1;\n[; ;pic18f2550.h: 1300: };\n[; ;pic18f2550.h: 1301: struct {\n[; ;pic18f2550.h: 1302: unsigned :4;\n[; ;pic18f2550.h: 1303: unsigned EP5HSHK :1;\n[; ;pic18f2550.h: 1304: };\n[; ;pic18f2550.h: 1305: struct {\n[; ;pic18f2550.h: 1306: unsigned :1;\n[; ;pic18f2550.h: 1307: unsigned EP5INEN :1;\n[; ;pic18f2550.h: 1308: };\n[; ;pic18f2550.h: 1309: struct {\n[; ;pic18f2550.h: 1310: unsigned :2;\n[; ;pic18f2550.h: 1311: unsigned EP5OUTEN :1;\n[; ;pic18f2550.h: 1312: };\n[; ;pic18f2550.h: 1313: struct {\n[; ;pic18f2550.h: 1314: unsigned EP5STALL :1;\n[; ;pic18f2550.h: 1315: };\n[; ;pic18f2550.h: 1316: struct {\n[; ;pic18f2550.h: 1317: unsigned :3;\n[; ;pic18f2550.h: 1318: unsigned EPCONDIS5 :1;\n[; ;pic18f2550.h: 1319: };\n[; ;pic18f2550.h: 1320: struct {\n[; ;pic18f2550.h: 1321: unsigned :4;\n[; ;pic18f2550.h: 1322: unsigned EPHSHK5 :1;\n[; ;pic18f2550.h: 1323: };\n[; ;pic18f2550.h: 1324: struct {\n[; ;pic18f2550.h: 1325: unsigned :1;\n[; ;pic18f2550.h: 1326: unsigned EPINEN5 :1;\n[; ;pic18f2550.h: 1327: };\n[; ;pic18f2550.h: 1328: struct {\n[; ;pic18f2550.h: 1329: unsigned :2;\n[; ;pic18f2550.h: 1330: unsigned EPOUTEN5 :1;\n[; ;pic18f2550.h: 1331: };\n[; ;pic18f2550.h: 1332: struct {\n[; ;pic18f2550.h: 1333: unsigned EPSTALL5 :1;\n[; ;pic18f2550.h: 1334: };\n[; ;pic18f2550.h: 1335: } UEP5bits_t;\n[; ;pic18f2550.h: 1336: extern volatile UEP5bits_t UEP5bits @ 0xF75;\n[; ;pic18f2550.h: 1415: extern volatile unsigned char UEP6 @ 0xF76;\n\"1417\n[; ;pic18f2550.h: 1417: asm(\"UEP6 equ 0F76h\");\n[; <\" UEP6 equ 0F76h ;# \">\n[; ;pic18f2550.h: 1420: typedef union {\n[; ;pic18f2550.h: 1421: struct {\n[; ;pic18f2550.h: 1422: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1423: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1424: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1425: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1426: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1427: };\n[; ;pic18f2550.h: 1428: struct {\n[; ;pic18f2550.h: 1429: unsigned :3;\n[; ;pic18f2550.h: 1430: unsigned EP6CONDIS :1;\n[; ;pic18f2550.h: 1431: };\n[; ;pic18f2550.h: 1432: struct {\n[; ;pic18f2550.h: 1433: unsigned :4;\n[; ;pic18f2550.h: 1434: unsigned EP6HSHK :1;\n[; ;pic18f2550.h: 1435: };\n[; ;pic18f2550.h: 1436: struct {\n[; ;pic18f2550.h: 1437: unsigned :1;\n[; ;pic18f2550.h: 1438: unsigned EP6INEN :1;\n[; ;pic18f2550.h: 1439: };\n[; ;pic18f2550.h: 1440: struct {\n[; ;pic18f2550.h: 1441: unsigned :2;\n[; ;pic18f2550.h: 1442: unsigned EP6OUTEN :1;\n[; ;pic18f2550.h: 1443: };\n[; ;pic18f2550.h: 1444: struct {\n[; ;pic18f2550.h: 1445: unsigned EP6STALL :1;\n[; ;pic18f2550.h: 1446: };\n[; ;pic18f2550.h: 1447: struct {\n[; ;pic18f2550.h: 1448: unsigned :3;\n[; ;pic18f2550.h: 1449: unsigned EPCONDIS6 :1;\n[; ;pic18f2550.h: 1450: };\n[; ;pic18f2550.h: 1451: struct {\n[; ;pic18f2550.h: 1452: unsigned :4;\n[; ;pic18f2550.h: 1453: unsigned EPHSHK6 :1;\n[; ;pic18f2550.h: 1454: };\n[; ;pic18f2550.h: 1455: struct {\n[; ;pic18f2550.h: 1456: unsigned :1;\n[; ;pic18f2550.h: 1457: unsigned EPINEN6 :1;\n[; ;pic18f2550.h: 1458: };\n[; ;pic18f2550.h: 1459: struct {\n[; ;pic18f2550.h: 1460: unsigned :2;\n[; ;pic18f2550.h: 1461: unsigned EPOUTEN6 :1;\n[; ;pic18f2550.h: 1462: };\n[; ;pic18f2550.h: 1463: struct {\n[; ;pic18f2550.h: 1464: unsigned EPSTALL6 :1;\n[; ;pic18f2550.h: 1465: };\n[; ;pic18f2550.h: 1466: } UEP6bits_t;\n[; ;pic18f2550.h: 1467: extern volatile UEP6bits_t UEP6bits @ 0xF76;\n[; ;pic18f2550.h: 1546: extern volatile unsigned char UEP7 @ 0xF77;\n\"1548\n[; ;pic18f2550.h: 1548: asm(\"UEP7 equ 0F77h\");\n[; <\" UEP7 equ 0F77h ;# \">\n[; ;pic18f2550.h: 1551: typedef union {\n[; ;pic18f2550.h: 1552: struct {\n[; ;pic18f2550.h: 1553: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1554: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1555: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1556: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1557: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1558: };\n[; ;pic18f2550.h: 1559: struct {\n[; ;pic18f2550.h: 1560: unsigned :3;\n[; ;pic18f2550.h: 1561: unsigned EP7CONDIS :1;\n[; ;pic18f2550.h: 1562: };\n[; ;pic18f2550.h: 1563: struct {\n[; ;pic18f2550.h: 1564: unsigned :4;\n[; ;pic18f2550.h: 1565: unsigned EP7HSHK :1;\n[; ;pic18f2550.h: 1566: };\n[; ;pic18f2550.h: 1567: struct {\n[; ;pic18f2550.h: 1568: unsigned :1;\n[; ;pic18f2550.h: 1569: unsigned EP7INEN :1;\n[; ;pic18f2550.h: 1570: };\n[; ;pic18f2550.h: 1571: struct {\n[; ;pic18f2550.h: 1572: unsigned :2;\n[; ;pic18f2550.h: 1573: unsigned EP7OUTEN :1;\n[; ;pic18f2550.h: 1574: };\n[; ;pic18f2550.h: 1575: struct {\n[; ;pic18f2550.h: 1576: unsigned EP7STALL :1;\n[; ;pic18f2550.h: 1577: };\n[; ;pic18f2550.h: 1578: struct {\n[; ;pic18f2550.h: 1579: unsigned :3;\n[; ;pic18f2550.h: 1580: unsigned EPCONDIS7 :1;\n[; ;pic18f2550.h: 1581: };\n[; ;pic18f2550.h: 1582: struct {\n[; ;pic18f2550.h: 1583: unsigned :4;\n[; ;pic18f2550.h: 1584: unsigned EPHSHK7 :1;\n[; ;pic18f2550.h: 1585: };\n[; ;pic18f2550.h: 1586: struct {\n[; ;pic18f2550.h: 1587: unsigned :1;\n[; ;pic18f2550.h: 1588: unsigned EPINEN7 :1;\n[; ;pic18f2550.h: 1589: };\n[; ;pic18f2550.h: 1590: struct {\n[; ;pic18f2550.h: 1591: unsigned :2;\n[; ;pic18f2550.h: 1592: unsigned EPOUTEN7 :1;\n[; ;pic18f2550.h: 1593: };\n[; ;pic18f2550.h: 1594: struct {\n[; ;pic18f2550.h: 1595: unsigned EPSTALL7 :1;\n[; ;pic18f2550.h: 1596: };\n[; ;pic18f2550.h: 1597: } UEP7bits_t;\n[; ;pic18f2550.h: 1598: extern volatile UEP7bits_t UEP7bits @ 0xF77;\n[; ;pic18f2550.h: 1677: extern volatile unsigned char UEP8 @ 0xF78;\n\"1679\n[; ;pic18f2550.h: 1679: asm(\"UEP8 equ 0F78h\");\n[; <\" UEP8 equ 0F78h ;# \">\n[; ;pic18f2550.h: 1682: typedef union {\n[; ;pic18f2550.h: 1683: struct {\n[; ;pic18f2550.h: 1684: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1685: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1686: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1687: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1688: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1689: };\n[; ;pic18f2550.h: 1690: struct {\n[; ;pic18f2550.h: 1691: unsigned :3;\n[; ;pic18f2550.h: 1692: unsigned EPCONDIS8 :1;\n[; ;pic18f2550.h: 1693: };\n[; ;pic18f2550.h: 1694: struct {\n[; ;pic18f2550.h: 1695: unsigned :4;\n[; ;pic18f2550.h: 1696: unsigned EPHSHK8 :1;\n[; ;pic18f2550.h: 1697: };\n[; ;pic18f2550.h: 1698: struct {\n[; ;pic18f2550.h: 1699: unsigned :1;\n[; ;pic18f2550.h: 1700: unsigned EPINEN8 :1;\n[; ;pic18f2550.h: 1701: };\n[; ;pic18f2550.h: 1702: struct {\n[; ;pic18f2550.h: 1703: unsigned :2;\n[; ;pic18f2550.h: 1704: unsigned EPOUTEN8 :1;\n[; ;pic18f2550.h: 1705: };\n[; ;pic18f2550.h: 1706: struct {\n[; ;pic18f2550.h: 1707: unsigned EPSTALL8 :1;\n[; ;pic18f2550.h: 1708: };\n[; ;pic18f2550.h: 1709: } UEP8bits_t;\n[; ;pic18f2550.h: 1710: extern volatile UEP8bits_t UEP8bits @ 0xF78;\n[; ;pic18f2550.h: 1764: extern volatile unsigned char UEP9 @ 0xF79;\n\"1766\n[; ;pic18f2550.h: 1766: asm(\"UEP9 equ 0F79h\");\n[; <\" UEP9 equ 0F79h ;# \">\n[; ;pic18f2550.h: 1769: typedef union {\n[; ;pic18f2550.h: 1770: struct {\n[; ;pic18f2550.h: 1771: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1772: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1773: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1774: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1775: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1776: };\n[; ;pic18f2550.h: 1777: struct {\n[; ;pic18f2550.h: 1778: unsigned :3;\n[; ;pic18f2550.h: 1779: unsigned EPCONDIS9 :1;\n[; ;pic18f2550.h: 1780: };\n[; ;pic18f2550.h: 1781: struct {\n[; ;pic18f2550.h: 1782: unsigned :4;\n[; ;pic18f2550.h: 1783: unsigned EPHSHK9 :1;\n[; ;pic18f2550.h: 1784: };\n[; ;pic18f2550.h: 1785: struct {\n[; ;pic18f2550.h: 1786: unsigned :1;\n[; ;pic18f2550.h: 1787: unsigned EPINEN9 :1;\n[; ;pic18f2550.h: 1788: };\n[; ;pic18f2550.h: 1789: struct {\n[; ;pic18f2550.h: 1790: unsigned :2;\n[; ;pic18f2550.h: 1791: unsigned EPOUTEN9 :1;\n[; ;pic18f2550.h: 1792: };\n[; ;pic18f2550.h: 1793: struct {\n[; ;pic18f2550.h: 1794: unsigned EPSTALL9 :1;\n[; ;pic18f2550.h: 1795: };\n[; ;pic18f2550.h: 1796: } UEP9bits_t;\n[; ;pic18f2550.h: 1797: extern volatile UEP9bits_t UEP9bits @ 0xF79;\n[; ;pic18f2550.h: 1851: extern volatile unsigned char UEP10 @ 0xF7A;\n\"1853\n[; ;pic18f2550.h: 1853: asm(\"UEP10 equ 0F7Ah\");\n[; <\" UEP10 equ 0F7Ah ;# \">\n[; ;pic18f2550.h: 1856: typedef union {\n[; ;pic18f2550.h: 1857: struct {\n[; ;pic18f2550.h: 1858: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1859: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1860: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1861: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1862: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1863: };\n[; ;pic18f2550.h: 1864: struct {\n[; ;pic18f2550.h: 1865: unsigned :3;\n[; ;pic18f2550.h: 1866: unsigned EPCONDIS10 :1;\n[; ;pic18f2550.h: 1867: };\n[; ;pic18f2550.h: 1868: struct {\n[; ;pic18f2550.h: 1869: unsigned :4;\n[; ;pic18f2550.h: 1870: unsigned EPHSHK10 :1;\n[; ;pic18f2550.h: 1871: };\n[; ;pic18f2550.h: 1872: struct {\n[; ;pic18f2550.h: 1873: unsigned :1;\n[; ;pic18f2550.h: 1874: unsigned EPINEN10 :1;\n[; ;pic18f2550.h: 1875: };\n[; ;pic18f2550.h: 1876: struct {\n[; ;pic18f2550.h: 1877: unsigned :2;\n[; ;pic18f2550.h: 1878: unsigned EPOUTEN10 :1;\n[; ;pic18f2550.h: 1879: };\n[; ;pic18f2550.h: 1880: struct {\n[; ;pic18f2550.h: 1881: unsigned EPSTALL10 :1;\n[; ;pic18f2550.h: 1882: };\n[; ;pic18f2550.h: 1883: } UEP10bits_t;\n[; ;pic18f2550.h: 1884: extern volatile UEP10bits_t UEP10bits @ 0xF7A;\n[; ;pic18f2550.h: 1938: extern volatile unsigned char UEP11 @ 0xF7B;\n\"1940\n[; ;pic18f2550.h: 1940: asm(\"UEP11 equ 0F7Bh\");\n[; <\" UEP11 equ 0F7Bh ;# \">\n[; ;pic18f2550.h: 1943: typedef union {\n[; ;pic18f2550.h: 1944: struct {\n[; ;pic18f2550.h: 1945: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1946: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1947: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1948: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1949: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1950: };\n[; ;pic18f2550.h: 1951: struct {\n[; ;pic18f2550.h: 1952: unsigned :3;\n[; ;pic18f2550.h: 1953: unsigned EPCONDIS11 :1;\n[; ;pic18f2550.h: 1954: };\n[; ;pic18f2550.h: 1955: struct {\n[; ;pic18f2550.h: 1956: unsigned :4;\n[; ;pic18f2550.h: 1957: unsigned EPHSHK11 :1;\n[; ;pic18f2550.h: 1958: };\n[; ;pic18f2550.h: 1959: struct {\n[; ;pic18f2550.h: 1960: unsigned :1;\n[; ;pic18f2550.h: 1961: unsigned EPINEN11 :1;\n[; ;pic18f2550.h: 1962: };\n[; ;pic18f2550.h: 1963: struct {\n[; ;pic18f2550.h: 1964: unsigned :2;\n[; ;pic18f2550.h: 1965: unsigned EPOUTEN11 :1;\n[; ;pic18f2550.h: 1966: };\n[; ;pic18f2550.h: 1967: struct {\n[; ;pic18f2550.h: 1968: unsigned EPSTALL11 :1;\n[; ;pic18f2550.h: 1969: };\n[; ;pic18f2550.h: 1970: } UEP11bits_t;\n[; ;pic18f2550.h: 1971: extern volatile UEP11bits_t UEP11bits @ 0xF7B;\n[; ;pic18f2550.h: 2025: extern volatile unsigned char UEP12 @ 0xF7C;\n\"2027\n[; ;pic18f2550.h: 2027: asm(\"UEP12 equ 0F7Ch\");\n[; <\" UEP12 equ 0F7Ch ;# \">\n[; ;pic18f2550.h: 2030: typedef union {\n[; ;pic18f2550.h: 2031: struct {\n[; ;pic18f2550.h: 2032: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2033: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2034: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2035: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2036: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2037: };\n[; ;pic18f2550.h: 2038: struct {\n[; ;pic18f2550.h: 2039: unsigned :3;\n[; ;pic18f2550.h: 2040: unsigned EPCONDIS12 :1;\n[; ;pic18f2550.h: 2041: };\n[; ;pic18f2550.h: 2042: struct {\n[; ;pic18f2550.h: 2043: unsigned :4;\n[; ;pic18f2550.h: 2044: unsigned EPHSHK12 :1;\n[; ;pic18f2550.h: 2045: };\n[; ;pic18f2550.h: 2046: struct {\n[; ;pic18f2550.h: 2047: unsigned :1;\n[; ;pic18f2550.h: 2048: unsigned EPINEN12 :1;\n[; ;pic18f2550.h: 2049: };\n[; ;pic18f2550.h: 2050: struct {\n[; ;pic18f2550.h: 2051: unsigned :2;\n[; ;pic18f2550.h: 2052: unsigned EPOUTEN12 :1;\n[; ;pic18f2550.h: 2053: };\n[; ;pic18f2550.h: 2054: struct {\n[; ;pic18f2550.h: 2055: unsigned EPSTALL12 :1;\n[; ;pic18f2550.h: 2056: };\n[; ;pic18f2550.h: 2057: } UEP12bits_t;\n[; ;pic18f2550.h: 2058: extern volatile UEP12bits_t UEP12bits @ 0xF7C;\n[; ;pic18f2550.h: 2112: extern volatile unsigned char UEP13 @ 0xF7D;\n\"2114\n[; ;pic18f2550.h: 2114: asm(\"UEP13 equ 0F7Dh\");\n[; <\" UEP13 equ 0F7Dh ;# \">\n[; ;pic18f2550.h: 2117: typedef union {\n[; ;pic18f2550.h: 2118: struct {\n[; ;pic18f2550.h: 2119: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2120: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2121: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2122: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2123: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2124: };\n[; ;pic18f2550.h: 2125: struct {\n[; ;pic18f2550.h: 2126: unsigned :3;\n[; ;pic18f2550.h: 2127: unsigned EPCONDIS13 :1;\n[; ;pic18f2550.h: 2128: };\n[; ;pic18f2550.h: 2129: struct {\n[; ;pic18f2550.h: 2130: unsigned :4;\n[; ;pic18f2550.h: 2131: unsigned EPHSHK13 :1;\n[; ;pic18f2550.h: 2132: };\n[; ;pic18f2550.h: 2133: struct {\n[; ;pic18f2550.h: 2134: unsigned :1;\n[; ;pic18f2550.h: 2135: unsigned EPINEN13 :1;\n[; ;pic18f2550.h: 2136: };\n[; ;pic18f2550.h: 2137: struct {\n[; ;pic18f2550.h: 2138: unsigned :2;\n[; ;pic18f2550.h: 2139: unsigned EPOUTEN13 :1;\n[; ;pic18f2550.h: 2140: };\n[; ;pic18f2550.h: 2141: struct {\n[; ;pic18f2550.h: 2142: unsigned EPSTALL13 :1;\n[; ;pic18f2550.h: 2143: };\n[; ;pic18f2550.h: 2144: } UEP13bits_t;\n[; ;pic18f2550.h: 2145: extern volatile UEP13bits_t UEP13bits @ 0xF7D;\n[; ;pic18f2550.h: 2199: extern volatile unsigned char UEP14 @ 0xF7E;\n\"2201\n[; ;pic18f2550.h: 2201: asm(\"UEP14 equ 0F7Eh\");\n[; <\" UEP14 equ 0F7Eh ;# \">\n[; ;pic18f2550.h: 2204: typedef union {\n[; ;pic18f2550.h: 2205: struct {\n[; ;pic18f2550.h: 2206: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2207: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2208: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2209: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2210: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2211: };\n[; ;pic18f2550.h: 2212: struct {\n[; ;pic18f2550.h: 2213: unsigned :3;\n[; ;pic18f2550.h: 2214: unsigned EPCONDIS14 :1;\n[; ;pic18f2550.h: 2215: };\n[; ;pic18f2550.h: 2216: struct {\n[; ;pic18f2550.h: 2217: unsigned :4;\n[; ;pic18f2550.h: 2218: unsigned EPHSHK14 :1;\n[; ;pic18f2550.h: 2219: };\n[; ;pic18f2550.h: 2220: struct {\n[; ;pic18f2550.h: 2221: unsigned :1;\n[; ;pic18f2550.h: 2222: unsigned EPINEN14 :1;\n[; ;pic18f2550.h: 2223: };\n[; ;pic18f2550.h: 2224: struct {\n[; ;pic18f2550.h: 2225: unsigned :2;\n[; ;pic18f2550.h: 2226: unsigned EPOUTEN14 :1;\n[; ;pic18f2550.h: 2227: };\n[; ;pic18f2550.h: 2228: struct {\n[; ;pic18f2550.h: 2229: unsigned EPSTALL14 :1;\n[; ;pic18f2550.h: 2230: };\n[; ;pic18f2550.h: 2231: } UEP14bits_t;\n[; ;pic18f2550.h: 2232: extern volatile UEP14bits_t UEP14bits @ 0xF7E;\n[; ;pic18f2550.h: 2286: extern volatile unsigned char UEP15 @ 0xF7F;\n\"2288\n[; ;pic18f2550.h: 2288: asm(\"UEP15 equ 0F7Fh\");\n[; <\" UEP15 equ 0F7Fh ;# \">\n[; ;pic18f2550.h: 2291: typedef union {\n[; ;pic18f2550.h: 2292: struct {\n[; ;pic18f2550.h: 2293: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2294: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2295: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2296: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2297: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2298: };\n[; ;pic18f2550.h: 2299: struct {\n[; ;pic18f2550.h: 2300: unsigned :3;\n[; ;pic18f2550.h: 2301: unsigned EPCONDIS15 :1;\n[; ;pic18f2550.h: 2302: };\n[; ;pic18f2550.h: 2303: struct {\n[; ;pic18f2550.h: 2304: unsigned :4;\n[; ;pic18f2550.h: 2305: unsigned EPHSHK15 :1;\n[; ;pic18f2550.h: 2306: };\n[; ;pic18f2550.h: 2307: struct {\n[; ;pic18f2550.h: 2308: unsigned :1;\n[; ;pic18f2550.h: 2309: unsigned EPINEN15 :1;\n[; ;pic18f2550.h: 2310: };\n[; ;pic18f2550.h: 2311: struct {\n[; ;pic18f2550.h: 2312: unsigned :2;\n[; ;pic18f2550.h: 2313: unsigned EPOUTEN15 :1;\n[; ;pic18f2550.h: 2314: };\n[; ;pic18f2550.h: 2315: struct {\n[; ;pic18f2550.h: 2316: unsigned EPSTALL15 :1;\n[; ;pic18f2550.h: 2317: };\n[; ;pic18f2550.h: 2318: } UEP15bits_t;\n[; ;pic18f2550.h: 2319: extern volatile UEP15bits_t UEP15bits @ 0xF7F;\n[; ;pic18f2550.h: 2373: extern volatile unsigned char PORTA @ 0xF80;\n\"2375\n[; ;pic18f2550.h: 2375: asm(\"PORTA equ 0F80h\");\n[; <\" PORTA equ 0F80h ;# \">\n[; ;pic18f2550.h: 2378: typedef union {\n[; ;pic18f2550.h: 2379: struct {\n[; ;pic18f2550.h: 2380: unsigned RA0 :1;\n[; ;pic18f2550.h: 2381: unsigned RA1 :1;\n[; ;pic18f2550.h: 2382: unsigned RA2 :1;\n[; ;pic18f2550.h: 2383: unsigned RA3 :1;\n[; ;pic18f2550.h: 2384: unsigned RA4 :1;\n[; ;pic18f2550.h: 2385: unsigned RA5 :1;\n[; ;pic18f2550.h: 2386: unsigned RA6 :1;\n[; ;pic18f2550.h: 2387: };\n[; ;pic18f2550.h: 2388: struct {\n[; ;pic18f2550.h: 2389: unsigned AN0 :1;\n[; ;pic18f2550.h: 2390: unsigned AN1 :1;\n[; ;pic18f2550.h: 2391: unsigned AN2 :1;\n[; ;pic18f2550.h: 2392: unsigned AN3 :1;\n[; ;pic18f2550.h: 2393: unsigned T0CKI :1;\n[; ;pic18f2550.h: 2394: unsigned AN4 :1;\n[; ;pic18f2550.h: 2395: unsigned OSC2 :1;\n[; ;pic18f2550.h: 2396: };\n[; ;pic18f2550.h: 2397: struct {\n[; ;pic18f2550.h: 2398: unsigned :2;\n[; ;pic18f2550.h: 2399: unsigned VREFM :1;\n[; ;pic18f2550.h: 2400: unsigned VREFP :1;\n[; ;pic18f2550.h: 2401: unsigned :1;\n[; ;pic18f2550.h: 2402: unsigned LVDIN :1;\n[; ;pic18f2550.h: 2403: };\n[; ;pic18f2550.h: 2404: struct {\n[; ;pic18f2550.h: 2405: unsigned :5;\n[; ;pic18f2550.h: 2406: unsigned HLVDIN :1;\n[; ;pic18f2550.h: 2407: };\n[; ;pic18f2550.h: 2408: struct {\n[; ;pic18f2550.h: 2409: unsigned :7;\n[; ;pic18f2550.h: 2410: unsigned RA7 :1;\n[; ;pic18f2550.h: 2411: };\n[; ;pic18f2550.h: 2412: struct {\n[; ;pic18f2550.h: 2413: unsigned :7;\n[; ;pic18f2550.h: 2414: unsigned RJPU :1;\n[; ;pic18f2550.h: 2415: };\n[; ;pic18f2550.h: 2416: struct {\n[; ;pic18f2550.h: 2417: unsigned ULPWUIN :1;\n[; ;pic18f2550.h: 2418: };\n[; ;pic18f2550.h: 2419: } PORTAbits_t;\n[; ;pic18f2550.h: 2420: extern volatile PORTAbits_t PORTAbits @ 0xF80;\n[; ;pic18f2550.h: 2529: extern volatile unsigned char PORTB @ 0xF81;\n\"2531\n[; ;pic18f2550.h: 2531: asm(\"PORTB equ 0F81h\");\n[; <\" PORTB equ 0F81h ;# \">\n[; ;pic18f2550.h: 2534: typedef union {\n[; ;pic18f2550.h: 2535: struct {\n[; ;pic18f2550.h: 2536: unsigned RB0 :1;\n[; ;pic18f2550.h: 2537: unsigned RB1 :1;\n[; ;pic18f2550.h: 2538: unsigned RB2 :1;\n[; ;pic18f2550.h: 2539: unsigned RB3 :1;\n[; ;pic18f2550.h: 2540: unsigned RB4 :1;\n[; ;pic18f2550.h: 2541: unsigned RB5 :1;\n[; ;pic18f2550.h: 2542: unsigned RB6 :1;\n[; ;pic18f2550.h: 2543: unsigned RB7 :1;\n[; ;pic18f2550.h: 2544: };\n[; ;pic18f2550.h: 2545: struct {\n[; ;pic18f2550.h: 2546: unsigned INT0 :1;\n[; ;pic18f2550.h: 2547: unsigned INT1 :1;\n[; ;pic18f2550.h: 2548: unsigned INT2 :1;\n[; ;pic18f2550.h: 2549: unsigned :2;\n[; ;pic18f2550.h: 2550: unsigned PGM :1;\n[; ;pic18f2550.h: 2551: unsigned PGC :1;\n[; ;pic18f2550.h: 2552: unsigned PGD :1;\n[; ;pic18f2550.h: 2553: };\n[; ;pic18f2550.h: 2554: struct {\n[; ;pic18f2550.h: 2555: unsigned :3;\n[; ;pic18f2550.h: 2556: unsigned CCP2_PA2 :1;\n[; ;pic18f2550.h: 2557: };\n[; ;pic18f2550.h: 2558: } PORTBbits_t;\n[; ;pic18f2550.h: 2559: extern volatile PORTBbits_t PORTBbits @ 0xF81;\n[; ;pic18f2550.h: 2638: extern volatile unsigned char PORTC @ 0xF82;\n\"2640\n[; ;pic18f2550.h: 2640: asm(\"PORTC equ 0F82h\");\n[; <\" PORTC equ 0F82h ;# \">\n[; ;pic18f2550.h: 2643: typedef union {\n[; ;pic18f2550.h: 2644: struct {\n[; ;pic18f2550.h: 2645: unsigned RC0 :1;\n[; ;pic18f2550.h: 2646: unsigned RC1 :1;\n[; ;pic18f2550.h: 2647: unsigned RC2 :1;\n[; ;pic18f2550.h: 2648: unsigned :1;\n[; ;pic18f2550.h: 2649: unsigned RC4 :1;\n[; ;pic18f2550.h: 2650: unsigned RC5 :1;\n[; ;pic18f2550.h: 2651: unsigned RC6 :1;\n[; ;pic18f2550.h: 2652: unsigned RC7 :1;\n[; ;pic18f2550.h: 2653: };\n[; ;pic18f2550.h: 2654: struct {\n[; ;pic18f2550.h: 2655: unsigned T1OSO :1;\n[; ;pic18f2550.h: 2656: unsigned T1OSI :1;\n[; ;pic18f2550.h: 2657: unsigned CCP1 :1;\n[; ;pic18f2550.h: 2658: unsigned :3;\n[; ;pic18f2550.h: 2659: unsigned TX :1;\n[; ;pic18f2550.h: 2660: unsigned RX :1;\n[; ;pic18f2550.h: 2661: };\n[; ;pic18f2550.h: 2662: struct {\n[; ;pic18f2550.h: 2663: unsigned T13CKI :1;\n[; ;pic18f2550.h: 2664: unsigned :1;\n[; ;pic18f2550.h: 2665: unsigned P1A :1;\n[; ;pic18f2550.h: 2666: unsigned :3;\n[; ;pic18f2550.h: 2667: unsigned CK :1;\n[; ;pic18f2550.h: 2668: unsigned DT :1;\n[; ;pic18f2550.h: 2669: };\n[; ;pic18f2550.h: 2670: struct {\n[; ;pic18f2550.h: 2671: unsigned :1;\n[; ;pic18f2550.h: 2672: unsigned CCP2 :1;\n[; ;pic18f2550.h: 2673: };\n[; ;pic18f2550.h: 2674: struct {\n[; ;pic18f2550.h: 2675: unsigned :2;\n[; ;pic18f2550.h: 2676: unsigned PA1 :1;\n[; ;pic18f2550.h: 2677: };\n[; ;pic18f2550.h: 2678: struct {\n[; ;pic18f2550.h: 2679: unsigned :1;\n[; ;pic18f2550.h: 2680: unsigned PA2 :1;\n[; ;pic18f2550.h: 2681: };\n[; ;pic18f2550.h: 2682: struct {\n[; ;pic18f2550.h: 2683: unsigned :3;\n[; ;pic18f2550.h: 2684: unsigned RC3 :1;\n[; ;pic18f2550.h: 2685: };\n[; ;pic18f2550.h: 2686: } PORTCbits_t;\n[; ;pic18f2550.h: 2687: extern volatile PORTCbits_t PORTCbits @ 0xF82;\n[; ;pic18f2550.h: 2791: extern volatile unsigned char PORTE @ 0xF84;\n\"2793\n[; ;pic18f2550.h: 2793: asm(\"PORTE equ 0F84h\");\n[; <\" PORTE equ 0F84h ;# \">\n[; ;pic18f2550.h: 2796: typedef union {\n[; ;pic18f2550.h: 2797: struct {\n[; ;pic18f2550.h: 2798: unsigned :3;\n[; ;pic18f2550.h: 2799: unsigned RE3 :1;\n[; ;pic18f2550.h: 2800: };\n[; ;pic18f2550.h: 2801: struct {\n[; ;pic18f2550.h: 2802: unsigned :2;\n[; ;pic18f2550.h: 2803: unsigned CCP10 :1;\n[; ;pic18f2550.h: 2804: };\n[; ;pic18f2550.h: 2805: struct {\n[; ;pic18f2550.h: 2806: unsigned :7;\n[; ;pic18f2550.h: 2807: unsigned CCP2E :1;\n[; ;pic18f2550.h: 2808: };\n[; ;pic18f2550.h: 2809: struct {\n[; ;pic18f2550.h: 2810: unsigned :6;\n[; ;pic18f2550.h: 2811: unsigned CCP6E :1;\n[; ;pic18f2550.h: 2812: };\n[; ;pic18f2550.h: 2813: struct {\n[; ;pic18f2550.h: 2814: unsigned :5;\n[; ;pic18f2550.h: 2815: unsigned CCP7E :1;\n[; ;pic18f2550.h: 2816: };\n[; ;pic18f2550.h: 2817: struct {\n[; ;pic18f2550.h: 2818: unsigned :4;\n[; ;pic18f2550.h: 2819: unsigned CCP8E :1;\n[; ;pic18f2550.h: 2820: };\n[; ;pic18f2550.h: 2821: struct {\n[; ;pic18f2550.h: 2822: unsigned :3;\n[; ;pic18f2550.h: 2823: unsigned CCP9E :1;\n[; ;pic18f2550.h: 2824: };\n[; ;pic18f2550.h: 2825: struct {\n[; ;pic18f2550.h: 2826: unsigned :2;\n[; ;pic18f2550.h: 2827: unsigned CS :1;\n[; ;pic18f2550.h: 2828: };\n[; ;pic18f2550.h: 2829: struct {\n[; ;pic18f2550.h: 2830: unsigned :7;\n[; ;pic18f2550.h: 2831: unsigned PA2E :1;\n[; ;pic18f2550.h: 2832: };\n[; ;pic18f2550.h: 2833: struct {\n[; ;pic18f2550.h: 2834: unsigned :6;\n[; ;pic18f2550.h: 2835: unsigned PB1E :1;\n[; ;pic18f2550.h: 2836: };\n[; ;pic18f2550.h: 2837: struct {\n[; ;pic18f2550.h: 2838: unsigned :2;\n[; ;pic18f2550.h: 2839: unsigned PB2 :1;\n[; ;pic18f2550.h: 2840: };\n[; ;pic18f2550.h: 2841: struct {\n[; ;pic18f2550.h: 2842: unsigned :4;\n[; ;pic18f2550.h: 2843: unsigned PB3E :1;\n[; ;pic18f2550.h: 2844: };\n[; ;pic18f2550.h: 2845: struct {\n[; ;pic18f2550.h: 2846: unsigned :5;\n[; ;pic18f2550.h: 2847: unsigned PC1E :1;\n[; ;pic18f2550.h: 2848: };\n[; ;pic18f2550.h: 2849: struct {\n[; ;pic18f2550.h: 2850: unsigned :1;\n[; ;pic18f2550.h: 2851: unsigned PC2 :1;\n[; ;pic18f2550.h: 2852: };\n[; ;pic18f2550.h: 2853: struct {\n[; ;pic18f2550.h: 2854: unsigned :3;\n[; ;pic18f2550.h: 2855: unsigned PC3E :1;\n[; ;pic18f2550.h: 2856: };\n[; ;pic18f2550.h: 2857: struct {\n[; ;pic18f2550.h: 2858: unsigned PD2 :1;\n[; ;pic18f2550.h: 2859: };\n[; ;pic18f2550.h: 2860: struct {\n[; ;pic18f2550.h: 2861: unsigned RDE :1;\n[; ;pic18f2550.h: 2862: };\n[; ;pic18f2550.h: 2863: struct {\n[; ;pic18f2550.h: 2864: unsigned RE0 :1;\n[; ;pic18f2550.h: 2865: };\n[; ;pic18f2550.h: 2866: struct {\n[; ;pic18f2550.h: 2867: unsigned :1;\n[; ;pic18f2550.h: 2868: unsigned RE1 :1;\n[; ;pic18f2550.h: 2869: };\n[; ;pic18f2550.h: 2870: struct {\n[; ;pic18f2550.h: 2871: unsigned :2;\n[; ;pic18f2550.h: 2872: unsigned RE2 :1;\n[; ;pic18f2550.h: 2873: };\n[; ;pic18f2550.h: 2874: struct {\n[; ;pic18f2550.h: 2875: unsigned :4;\n[; ;pic18f2550.h: 2876: unsigned RE4 :1;\n[; ;pic18f2550.h: 2877: };\n[; ;pic18f2550.h: 2878: struct {\n[; ;pic18f2550.h: 2879: unsigned :5;\n[; ;pic18f2550.h: 2880: unsigned RE5 :1;\n[; ;pic18f2550.h: 2881: };\n[; ;pic18f2550.h: 2882: struct {\n[; ;pic18f2550.h: 2883: unsigned :6;\n[; ;pic18f2550.h: 2884: unsigned RE6 :1;\n[; ;pic18f2550.h: 2885: };\n[; ;pic18f2550.h: 2886: struct {\n[; ;pic18f2550.h: 2887: unsigned :7;\n[; ;pic18f2550.h: 2888: unsigned RE7 :1;\n[; ;pic18f2550.h: 2889: };\n[; ;pic18f2550.h: 2890: struct {\n[; ;pic18f2550.h: 2891: unsigned :1;\n[; ;pic18f2550.h: 2892: unsigned WRE :1;\n[; ;pic18f2550.h: 2893: };\n[; ;pic18f2550.h: 2894: } PORTEbits_t;\n[; ;pic18f2550.h: 2895: extern volatile PORTEbits_t PORTEbits @ 0xF84;\n[; ;pic18f2550.h: 3024: extern volatile unsigned char LATA @ 0xF89;\n\"3026\n[; ;pic18f2550.h: 3026: asm(\"LATA equ 0F89h\");\n[; <\" LATA equ 0F89h ;# \">\n[; ;pic18f2550.h: 3029: typedef union {\n[; ;pic18f2550.h: 3030: struct {\n[; ;pic18f2550.h: 3031: unsigned LATA0 :1;\n[; ;pic18f2550.h: 3032: unsigned LATA1 :1;\n[; ;pic18f2550.h: 3033: unsigned LATA2 :1;\n[; ;pic18f2550.h: 3034: unsigned LATA3 :1;\n[; ;pic18f2550.h: 3035: unsigned LATA4 :1;\n[; ;pic18f2550.h: 3036: unsigned LATA5 :1;\n[; ;pic18f2550.h: 3037: unsigned LATA6 :1;\n[; ;pic18f2550.h: 3038: };\n[; ;pic18f2550.h: 3039: struct {\n[; ;pic18f2550.h: 3040: unsigned LA0 :1;\n[; ;pic18f2550.h: 3041: };\n[; ;pic18f2550.h: 3042: struct {\n[; ;pic18f2550.h: 3043: unsigned :1;\n[; ;pic18f2550.h: 3044: unsigned LA1 :1;\n[; ;pic18f2550.h: 3045: };\n[; ;pic18f2550.h: 3046: struct {\n[; ;pic18f2550.h: 3047: unsigned :2;\n[; ;pic18f2550.h: 3048: unsigned LA2 :1;\n[; ;pic18f2550.h: 3049: };\n[; ;pic18f2550.h: 3050: struct {\n[; ;pic18f2550.h: 3051: unsigned :3;\n[; ;pic18f2550.h: 3052: unsigned LA3 :1;\n[; ;pic18f2550.h: 3053: };\n[; ;pic18f2550.h: 3054: struct {\n[; ;pic18f2550.h: 3055: unsigned :4;\n[; ;pic18f2550.h: 3056: unsigned LA4 :1;\n[; ;pic18f2550.h: 3057: };\n[; ;pic18f2550.h: 3058: struct {\n[; ;pic18f2550.h: 3059: unsigned :5;\n[; ;pic18f2550.h: 3060: unsigned LA5 :1;\n[; ;pic18f2550.h: 3061: };\n[; ;pic18f2550.h: 3062: struct {\n[; ;pic18f2550.h: 3063: unsigned :6;\n[; ;pic18f2550.h: 3064: unsigned LA6 :1;\n[; ;pic18f2550.h: 3065: };\n[; ;pic18f2550.h: 3066: struct {\n[; ;pic18f2550.h: 3067: unsigned :7;\n[; ;pic18f2550.h: 3068: unsigned LA7 :1;\n[; ;pic18f2550.h: 3069: };\n[; ;pic18f2550.h: 3070: struct {\n[; ;pic18f2550.h: 3071: unsigned :7;\n[; ;pic18f2550.h: 3072: unsigned LATA7 :1;\n[; ;pic18f2550.h: 3073: };\n[; ;pic18f2550.h: 3074: } LATAbits_t;\n[; ;pic18f2550.h: 3075: extern volatile LATAbits_t LATAbits @ 0xF89;\n[; ;pic18f2550.h: 3159: extern volatile unsigned char LATB @ 0xF8A;\n\"3161\n[; ;pic18f2550.h: 3161: asm(\"LATB equ 0F8Ah\");\n[; <\" LATB equ 0F8Ah ;# \">\n[; ;pic18f2550.h: 3164: typedef union {\n[; ;pic18f2550.h: 3165: struct {\n[; ;pic18f2550.h: 3166: unsigned LATB0 :1;\n[; ;pic18f2550.h: 3167: unsigned LATB1 :1;\n[; ;pic18f2550.h: 3168: unsigned LATB2 :1;\n[; ;pic18f2550.h: 3169: unsigned LATB3 :1;\n[; ;pic18f2550.h: 3170: unsigned LATB4 :1;\n[; ;pic18f2550.h: 3171: unsigned LATB5 :1;\n[; ;pic18f2550.h: 3172: unsigned LATB6 :1;\n[; ;pic18f2550.h: 3173: unsigned LATB7 :1;\n[; ;pic18f2550.h: 3174: };\n[; ;pic18f2550.h: 3175: struct {\n[; ;pic18f2550.h: 3176: unsigned LB0 :1;\n[; ;pic18f2550.h: 3177: };\n[; ;pic18f2550.h: 3178: struct {\n[; ;pic18f2550.h: 3179: unsigned :1;\n[; ;pic18f2550.h: 3180: unsigned LB1 :1;\n[; ;pic18f2550.h: 3181: };\n[; ;pic18f2550.h: 3182: struct {\n[; ;pic18f2550.h: 3183: unsigned :2;\n[; ;pic18f2550.h: 3184: unsigned LB2 :1;\n[; ;pic18f2550.h: 3185: };\n[; ;pic18f2550.h: 3186: struct {\n[; ;pic18f2550.h: 3187: unsigned :3;\n[; ;pic18f2550.h: 3188: unsigned LB3 :1;\n[; ;pic18f2550.h: 3189: };\n[; ;pic18f2550.h: 3190: struct {\n[; ;pic18f2550.h: 3191: unsigned :4;\n[; ;pic18f2550.h: 3192: unsigned LB4 :1;\n[; ;pic18f2550.h: 3193: };\n[; ;pic18f2550.h: 3194: struct {\n[; ;pic18f2550.h: 3195: unsigned :5;\n[; ;pic18f2550.h: 3196: unsigned LB5 :1;\n[; ;pic18f2550.h: 3197: };\n[; ;pic18f2550.h: 3198: struct {\n[; ;pic18f2550.h: 3199: unsigned :6;\n[; ;pic18f2550.h: 3200: unsigned LB6 :1;\n[; ;pic18f2550.h: 3201: };\n[; ;pic18f2550.h: 3202: struct {\n[; ;pic18f2550.h: 3203: unsigned :7;\n[; ;pic18f2550.h: 3204: unsigned LB7 :1;\n[; ;pic18f2550.h: 3205: };\n[; ;pic18f2550.h: 3206: } LATBbits_t;\n[; ;pic18f2550.h: 3207: extern volatile LATBbits_t LATBbits @ 0xF8A;\n[; ;pic18f2550.h: 3291: extern volatile unsigned char LATC @ 0xF8B;\n\"3293\n[; ;pic18f2550.h: 3293: asm(\"LATC equ 0F8Bh\");\n[; <\" LATC equ 0F8Bh ;# \">\n[; ;pic18f2550.h: 3296: typedef union {\n[; ;pic18f2550.h: 3297: struct {\n[; ;pic18f2550.h: 3298: unsigned LATC0 :1;\n[; ;pic18f2550.h: 3299: unsigned LATC1 :1;\n[; ;pic18f2550.h: 3300: unsigned LATC2 :1;\n[; ;pic18f2550.h: 3301: unsigned :3;\n[; ;pic18f2550.h: 3302: unsigned LATC6 :1;\n[; ;pic18f2550.h: 3303: unsigned LATC7 :1;\n[; ;pic18f2550.h: 3304: };\n[; ;pic18f2550.h: 3305: struct {\n[; ;pic18f2550.h: 3306: unsigned LC0 :1;\n[; ;pic18f2550.h: 3307: };\n[; ;pic18f2550.h: 3308: struct {\n[; ;pic18f2550.h: 3309: unsigned :1;\n[; ;pic18f2550.h: 3310: unsigned LC1 :1;\n[; ;pic18f2550.h: 3311: };\n[; ;pic18f2550.h: 3312: struct {\n[; ;pic18f2550.h: 3313: unsigned :2;\n[; ;pic18f2550.h: 3314: unsigned LC2 :1;\n[; ;pic18f2550.h: 3315: };\n[; ;pic18f2550.h: 3316: struct {\n[; ;pic18f2550.h: 3317: unsigned :3;\n[; ;pic18f2550.h: 3318: unsigned LC3 :1;\n[; ;pic18f2550.h: 3319: };\n[; ;pic18f2550.h: 3320: struct {\n[; ;pic18f2550.h: 3321: unsigned :4;\n[; ;pic18f2550.h: 3322: unsigned LC4 :1;\n[; ;pic18f2550.h: 3323: };\n[; ;pic18f2550.h: 3324: struct {\n[; ;pic18f2550.h: 3325: unsigned :5;\n[; ;pic18f2550.h: 3326: unsigned LC5 :1;\n[; ;pic18f2550.h: 3327: };\n[; ;pic18f2550.h: 3328: struct {\n[; ;pic18f2550.h: 3329: unsigned :6;\n[; ;pic18f2550.h: 3330: unsigned LC6 :1;\n[; ;pic18f2550.h: 3331: };\n[; ;pic18f2550.h: 3332: struct {\n[; ;pic18f2550.h: 3333: unsigned :7;\n[; ;pic18f2550.h: 3334: unsigned LC7 :1;\n[; ;pic18f2550.h: 3335: };\n[; ;pic18f2550.h: 3336: } LATCbits_t;\n[; ;pic18f2550.h: 3337: extern volatile LATCbits_t LATCbits @ 0xF8B;\n[; ;pic18f2550.h: 3406: extern volatile unsigned char TRISA @ 0xF92;\n\"3408\n[; ;pic18f2550.h: 3408: asm(\"TRISA equ 0F92h\");\n[; <\" TRISA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3411: extern volatile unsigned char DDRA @ 0xF92;\n\"3413\n[; ;pic18f2550.h: 3413: asm(\"DDRA equ 0F92h\");\n[; <\" DDRA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3416: typedef union {\n[; ;pic18f2550.h: 3417: struct {\n[; ;pic18f2550.h: 3418: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3419: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3420: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3421: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3422: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3423: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3424: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3425: };\n[; ;pic18f2550.h: 3426: struct {\n[; ;pic18f2550.h: 3427: unsigned RA0 :1;\n[; ;pic18f2550.h: 3428: unsigned RA1 :1;\n[; ;pic18f2550.h: 3429: unsigned RA2 :1;\n[; ;pic18f2550.h: 3430: unsigned RA3 :1;\n[; ;pic18f2550.h: 3431: unsigned RA4 :1;\n[; ;pic18f2550.h: 3432: unsigned RA5 :1;\n[; ;pic18f2550.h: 3433: unsigned RA6 :1;\n[; ;pic18f2550.h: 3434: };\n[; ;pic18f2550.h: 3435: } TRISAbits_t;\n[; ;pic18f2550.h: 3436: extern volatile TRISAbits_t TRISAbits @ 0xF92;\n[; ;pic18f2550.h: 3509: typedef union {\n[; ;pic18f2550.h: 3510: struct {\n[; ;pic18f2550.h: 3511: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3512: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3513: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3514: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3515: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3516: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3517: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3518: };\n[; ;pic18f2550.h: 3519: struct {\n[; ;pic18f2550.h: 3520: unsigned RA0 :1;\n[; ;pic18f2550.h: 3521: unsigned RA1 :1;\n[; ;pic18f2550.h: 3522: unsigned RA2 :1;\n[; ;pic18f2550.h: 3523: unsigned RA3 :1;\n[; ;pic18f2550.h: 3524: unsigned RA4 :1;\n[; ;pic18f2550.h: 3525: unsigned RA5 :1;\n[; ;pic18f2550.h: 3526: unsigned RA6 :1;\n[; ;pic18f2550.h: 3527: };\n[; ;pic18f2550.h: 3528: } DDRAbits_t;\n[; ;pic18f2550.h: 3529: extern volatile DDRAbits_t DDRAbits @ 0xF92;\n[; ;pic18f2550.h: 3603: extern volatile unsigned char TRISB @ 0xF93;\n\"3605\n[; ;pic18f2550.h: 3605: asm(\"TRISB equ 0F93h\");\n[; <\" TRISB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3608: extern volatile unsigned char DDRB @ 0xF93;\n\"3610\n[; ;pic18f2550.h: 3610: asm(\"DDRB equ 0F93h\");\n[; <\" DDRB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3613: typedef union {\n[; ;pic18f2550.h: 3614: struct {\n[; ;pic18f2550.h: 3615: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3616: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3617: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3618: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3619: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3620: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3621: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3622: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3623: };\n[; ;pic18f2550.h: 3624: struct {\n[; ;pic18f2550.h: 3625: unsigned RB0 :1;\n[; ;pic18f2550.h: 3626: unsigned RB1 :1;\n[; ;pic18f2550.h: 3627: unsigned RB2 :1;\n[; ;pic18f2550.h: 3628: unsigned RB3 :1;\n[; ;pic18f2550.h: 3629: unsigned RB4 :1;\n[; ;pic18f2550.h: 3630: unsigned RB5 :1;\n[; ;pic18f2550.h: 3631: unsigned RB6 :1;\n[; ;pic18f2550.h: 3632: unsigned RB7 :1;\n[; ;pic18f2550.h: 3633: };\n[; ;pic18f2550.h: 3634: } TRISBbits_t;\n[; ;pic18f2550.h: 3635: extern volatile TRISBbits_t TRISBbits @ 0xF93;\n[; ;pic18f2550.h: 3718: typedef union {\n[; ;pic18f2550.h: 3719: struct {\n[; ;pic18f2550.h: 3720: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3721: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3722: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3723: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3724: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3725: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3726: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3727: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3728: };\n[; ;pic18f2550.h: 3729: struct {\n[; ;pic18f2550.h: 3730: unsigned RB0 :1;\n[; ;pic18f2550.h: 3731: unsigned RB1 :1;\n[; ;pic18f2550.h: 3732: unsigned RB2 :1;\n[; ;pic18f2550.h: 3733: unsigned RB3 :1;\n[; ;pic18f2550.h: 3734: unsigned RB4 :1;\n[; ;pic18f2550.h: 3735: unsigned RB5 :1;\n[; ;pic18f2550.h: 3736: unsigned RB6 :1;\n[; ;pic18f2550.h: 3737: unsigned RB7 :1;\n[; ;pic18f2550.h: 3738: };\n[; ;pic18f2550.h: 3739: } DDRBbits_t;\n[; ;pic18f2550.h: 3740: extern volatile DDRBbits_t DDRBbits @ 0xF93;\n[; ;pic18f2550.h: 3824: extern volatile unsigned char TRISC @ 0xF94;\n\"3826\n[; ;pic18f2550.h: 3826: asm(\"TRISC equ 0F94h\");\n[; <\" TRISC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3829: extern volatile unsigned char DDRC @ 0xF94;\n\"3831\n[; ;pic18f2550.h: 3831: asm(\"DDRC equ 0F94h\");\n[; <\" DDRC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3834: typedef union {\n[; ;pic18f2550.h: 3835: struct {\n[; ;pic18f2550.h: 3836: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3837: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3838: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3839: unsigned :3;\n[; ;pic18f2550.h: 3840: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3841: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3842: };\n[; ;pic18f2550.h: 3843: struct {\n[; ;pic18f2550.h: 3844: unsigned RC0 :1;\n[; ;pic18f2550.h: 3845: unsigned RC1 :1;\n[; ;pic18f2550.h: 3846: unsigned RC2 :1;\n[; ;pic18f2550.h: 3847: unsigned :3;\n[; ;pic18f2550.h: 3848: unsigned RC6 :1;\n[; ;pic18f2550.h: 3849: unsigned RC7 :1;\n[; ;pic18f2550.h: 3850: };\n[; ;pic18f2550.h: 3851: struct {\n[; ;pic18f2550.h: 3852: unsigned :3;\n[; ;pic18f2550.h: 3853: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3854: };\n[; ;pic18f2550.h: 3855: } TRISCbits_t;\n[; ;pic18f2550.h: 3856: extern volatile TRISCbits_t TRISCbits @ 0xF94;\n[; ;pic18f2550.h: 3914: typedef union {\n[; ;pic18f2550.h: 3915: struct {\n[; ;pic18f2550.h: 3916: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3917: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3918: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3919: unsigned :3;\n[; ;pic18f2550.h: 3920: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3921: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3922: };\n[; ;pic18f2550.h: 3923: struct {\n[; ;pic18f2550.h: 3924: unsigned RC0 :1;\n[; ;pic18f2550.h: 3925: unsigned RC1 :1;\n[; ;pic18f2550.h: 3926: unsigned RC2 :1;\n[; ;pic18f2550.h: 3927: unsigned :3;\n[; ;pic18f2550.h: 3928: unsigned RC6 :1;\n[; ;pic18f2550.h: 3929: unsigned RC7 :1;\n[; ;pic18f2550.h: 3930: };\n[; ;pic18f2550.h: 3931: struct {\n[; ;pic18f2550.h: 3932: unsigned :3;\n[; ;pic18f2550.h: 3933: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3934: };\n[; ;pic18f2550.h: 3935: } DDRCbits_t;\n[; ;pic18f2550.h: 3936: extern volatile DDRCbits_t DDRCbits @ 0xF94;\n[; ;pic18f2550.h: 3995: extern volatile unsigned char OSCTUNE @ 0xF9B;\n\"3997\n[; ;pic18f2550.h: 3997: asm(\"OSCTUNE equ 0F9Bh\");\n[; <\" OSCTUNE equ 0F9Bh ;# \">\n[; ;pic18f2550.h: 4000: typedef union {\n[; ;pic18f2550.h: 4001: struct {\n[; ;pic18f2550.h: 4002: unsigned TUN :5;\n[; ;pic18f2550.h: 4003: unsigned :2;\n[; ;pic18f2550.h: 4004: unsigned INTSRC :1;\n[; ;pic18f2550.h: 4005: };\n[; ;pic18f2550.h: 4006: struct {\n[; ;pic18f2550.h: 4007: unsigned TUN0 :1;\n[; ;pic18f2550.h: 4008: unsigned TUN1 :1;\n[; ;pic18f2550.h: 4009: unsigned TUN2 :1;\n[; ;pic18f2550.h: 4010: unsigned TUN3 :1;\n[; ;pic18f2550.h: 4011: unsigned TUN4 :1;\n[; ;pic18f2550.h: 4012: };\n[; ;pic18f2550.h: 4013: } OSCTUNEbits_t;\n[; ;pic18f2550.h: 4014: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n[; ;pic18f2550.h: 4053: extern volatile unsigned char PIE1 @ 0xF9D;\n\"4055\n[; ;pic18f2550.h: 4055: asm(\"PIE1 equ 0F9Dh\");\n[; <\" PIE1 equ 0F9Dh ;# \">\n[; ;pic18f2550.h: 4058: typedef union {\n[; ;pic18f2550.h: 4059: struct {\n[; ;pic18f2550.h: 4060: unsigned TMR1IE :1;\n[; ;pic18f2550.h: 4061: unsigned TMR2IE :1;\n[; ;pic18f2550.h: 4062: unsigned CCP1IE :1;\n[; ;pic18f2550.h: 4063: unsigned SSPIE :1;\n[; ;pic18f2550.h: 4064: unsigned TXIE :1;\n[; ;pic18f2550.h: 4065: unsigned RCIE :1;\n[; ;pic18f2550.h: 4066: unsigned ADIE :1;\n[; ;pic18f2550.h: 4067: };\n[; ;pic18f2550.h: 4068: struct {\n[; ;pic18f2550.h: 4069: unsigned :5;\n[; ;pic18f2550.h: 4070: unsigned RC1IE :1;\n[; ;pic18f2550.h: 4071: };\n[; ;pic18f2550.h: 4072: struct {\n[; ;pic18f2550.h: 4073: unsigned :4;\n[; ;pic18f2550.h: 4074: unsigned TX1IE :1;\n[; ;pic18f2550.h: 4075: };\n[; ;pic18f2550.h: 4076: } PIE1bits_t;\n[; ;pic18f2550.h: 4077: extern volatile PIE1bits_t PIE1bits @ 0xF9D;\n[; ;pic18f2550.h: 4126: extern volatile unsigned char PIR1 @ 0xF9E;\n\"4128\n[; ;pic18f2550.h: 4128: asm(\"PIR1 equ 0F9Eh\");\n[; <\" PIR1 equ 0F9Eh ;# \">\n[; ;pic18f2550.h: 4131: typedef union {\n[; ;pic18f2550.h: 4132: struct {\n[; ;pic18f2550.h: 4133: unsigned TMR1IF :1;\n[; ;pic18f2550.h: 4134: unsigned TMR2IF :1;\n[; ;pic18f2550.h: 4135: unsigned CCP1IF :1;\n[; ;pic18f2550.h: 4136: unsigned SSPIF :1;\n[; ;pic18f2550.h: 4137: unsigned TXIF :1;\n[; ;pic18f2550.h: 4138: unsigned RCIF :1;\n[; ;pic18f2550.h: 4139: unsigned ADIF :1;\n[; ;pic18f2550.h: 4140: };\n[; ;pic18f2550.h: 4141: struct {\n[; ;pic18f2550.h: 4142: unsigned :5;\n[; ;pic18f2550.h: 4143: unsigned RC1IF :1;\n[; ;pic18f2550.h: 4144: };\n[; ;pic18f2550.h: 4145: struct {\n[; ;pic18f2550.h: 4146: unsigned :4;\n[; ;pic18f2550.h: 4147: unsigned TX1IF :1;\n[; ;pic18f2550.h: 4148: };\n[; ;pic18f2550.h: 4149: } PIR1bits_t;\n[; ;pic18f2550.h: 4150: extern volatile PIR1bits_t PIR1bits @ 0xF9E;\n[; ;pic18f2550.h: 4199: extern volatile unsigned char IPR1 @ 0xF9F;\n\"4201\n[; ;pic18f2550.h: 4201: asm(\"IPR1 equ 0F9Fh\");\n[; <\" IPR1 equ 0F9Fh ;# \">\n[; ;pic18f2550.h: 4204: typedef union {\n[; ;pic18f2550.h: 4205: struct {\n[; ;pic18f2550.h: 4206: unsigned TMR1IP :1;\n[; ;pic18f2550.h: 4207: unsigned TMR2IP :1;\n[; ;pic18f2550.h: 4208: unsigned CCP1IP :1;\n[; ;pic18f2550.h: 4209: unsigned SSPIP :1;\n[; ;pic18f2550.h: 4210: unsigned TXIP :1;\n[; ;pic18f2550.h: 4211: unsigned RCIP :1;\n[; ;pic18f2550.h: 4212: unsigned ADIP :1;\n[; ;pic18f2550.h: 4213: };\n[; ;pic18f2550.h: 4214: struct {\n[; ;pic18f2550.h: 4215: unsigned :5;\n[; ;pic18f2550.h: 4216: unsigned RC1IP :1;\n[; ;pic18f2550.h: 4217: };\n[; ;pic18f2550.h: 4218: struct {\n[; ;pic18f2550.h: 4219: unsigned :4;\n[; ;pic18f2550.h: 4220: unsigned TX1IP :1;\n[; ;pic18f2550.h: 4221: };\n[; ;pic18f2550.h: 4222: } IPR1bits_t;\n[; ;pic18f2550.h: 4223: extern volatile IPR1bits_t IPR1bits @ 0xF9F;\n[; ;pic18f2550.h: 4272: extern volatile unsigned char PIE2 @ 0xFA0;\n\"4274\n[; ;pic18f2550.h: 4274: asm(\"PIE2 equ 0FA0h\");\n[; <\" PIE2 equ 0FA0h ;# \">\n[; ;pic18f2550.h: 4277: typedef union {\n[; ;pic18f2550.h: 4278: struct {\n[; ;pic18f2550.h: 4279: unsigned CCP2IE :1;\n[; ;pic18f2550.h: 4280: unsigned TMR3IE :1;\n[; ;pic18f2550.h: 4281: unsigned HLVDIE :1;\n[; ;pic18f2550.h: 4282: unsigned BCLIE :1;\n[; ;pic18f2550.h: 4283: unsigned EEIE :1;\n[; ;pic18f2550.h: 4284: unsigned USBIE :1;\n[; ;pic18f2550.h: 4285: unsigned CMIE :1;\n[; ;pic18f2550.h: 4286: unsigned OSCFIE :1;\n[; ;pic18f2550.h: 4287: };\n[; ;pic18f2550.h: 4288: struct {\n[; ;pic18f2550.h: 4289: unsigned :2;\n[; ;pic18f2550.h: 4290: unsigned LVDIE :1;\n[; ;pic18f2550.h: 4291: };\n[; ;pic18f2550.h: 4292: } PIE2bits_t;\n[; ;pic18f2550.h: 4293: extern volatile PIE2bits_t PIE2bits @ 0xFA0;\n[; ;pic18f2550.h: 4342: extern volatile unsigned char PIR2 @ 0xFA1;\n\"4344\n[; ;pic18f2550.h: 4344: asm(\"PIR2 equ 0FA1h\");\n[; <\" PIR2 equ 0FA1h ;# \">\n[; ;pic18f2550.h: 4347: typedef union {\n[; ;pic18f2550.h: 4348: struct {\n[; ;pic18f2550.h: 4349: unsigned CCP2IF :1;\n[; ;pic18f2550.h: 4350: unsigned TMR3IF :1;\n[; ;pic18f2550.h: 4351: unsigned HLVDIF :1;\n[; ;pic18f2550.h: 4352: unsigned BCLIF :1;\n[; ;pic18f2550.h: 4353: unsigned EEIF :1;\n[; ;pic18f2550.h: 4354: unsigned USBIF :1;\n[; ;pic18f2550.h: 4355: unsigned CMIF :1;\n[; ;pic18f2550.h: 4356: unsigned OSCFIF :1;\n[; ;pic18f2550.h: 4357: };\n[; ;pic18f2550.h: 4358: struct {\n[; ;pic18f2550.h: 4359: unsigned :2;\n[; ;pic18f2550.h: 4360: unsigned LVDIF :1;\n[; ;pic18f2550.h: 4361: };\n[; ;pic18f2550.h: 4362: } PIR2bits_t;\n[; ;pic18f2550.h: 4363: extern volatile PIR2bits_t PIR2bits @ 0xFA1;\n[; ;pic18f2550.h: 4412: extern volatile unsigned char IPR2 @ 0xFA2;\n\"4414\n[; ;pic18f2550.h: 4414: asm(\"IPR2 equ 0FA2h\");\n[; <\" IPR2 equ 0FA2h ;# \">\n[; ;pic18f2550.h: 4417: typedef union {\n[; ;pic18f2550.h: 4418: struct {\n[; ;pic18f2550.h: 4419: unsigned CCP2IP :1;\n[; ;pic18f2550.h: 4420: unsigned TMR3IP :1;\n[; ;pic18f2550.h: 4421: unsigned HLVDIP :1;\n[; ;pic18f2550.h: 4422: unsigned BCLIP :1;\n[; ;pic18f2550.h: 4423: unsigned EEIP :1;\n[; ;pic18f2550.h: 4424: unsigned USBIP :1;\n[; ;pic18f2550.h: 4425: unsigned CMIP :1;\n[; ;pic18f2550.h: 4426: unsigned OSCFIP :1;\n[; ;pic18f2550.h: 4427: };\n[; ;pic18f2550.h: 4428: struct {\n[; ;pic18f2550.h: 4429: unsigned :2;\n[; ;pic18f2550.h: 4430: unsigned LVDIP :1;\n[; ;pic18f2550.h: 4431: };\n[; ;pic18f2550.h: 4432: } IPR2bits_t;\n[; ;pic18f2550.h: 4433: extern volatile IPR2bits_t IPR2bits @ 0xFA2;\n[; ;pic18f2550.h: 4482: extern volatile unsigned char EECON1 @ 0xFA6;\n\"4484\n[; ;pic18f2550.h: 4484: asm(\"EECON1 equ 0FA6h\");\n[; <\" EECON1 equ 0FA6h ;# \">\n[; ;pic18f2550.h: 4487: typedef union {\n[; ;pic18f2550.h: 4488: struct {\n[; ;pic18f2550.h: 4489: unsigned RD :1;\n[; ;pic18f2550.h: 4490: unsigned WR :1;\n[; ;pic18f2550.h: 4491: unsigned WREN :1;\n[; ;pic18f2550.h: 4492: unsigned WRERR :1;\n[; ;pic18f2550.h: 4493: unsigned FREE :1;\n[; ;pic18f2550.h: 4494: unsigned :1;\n[; ;pic18f2550.h: 4495: unsigned CFGS :1;\n[; ;pic18f2550.h: 4496: unsigned EEPGD :1;\n[; ;pic18f2550.h: 4497: };\n[; ;pic18f2550.h: 4498: struct {\n[; ;pic18f2550.h: 4499: unsigned :6;\n[; ;pic18f2550.h: 4500: unsigned EEFS :1;\n[; ;pic18f2550.h: 4501: };\n[; ;pic18f2550.h: 4502: } EECON1bits_t;\n[; ;pic18f2550.h: 4503: extern volatile EECON1bits_t EECON1bits @ 0xFA6;\n[; ;pic18f2550.h: 4547: extern volatile unsigned char EECON2 @ 0xFA7;\n\"4549\n[; ;pic18f2550.h: 4549: asm(\"EECON2 equ 0FA7h\");\n[; <\" EECON2 equ 0FA7h ;# \">\n[; ;pic18f2550.h: 4553: extern volatile unsigned char EEDATA @ 0xFA8;\n\"4555\n[; ;pic18f2550.h: 4555: asm(\"EEDATA equ 0FA8h\");\n[; <\" EEDATA equ 0FA8h ;# \">\n[; ;pic18f2550.h: 4559: extern volatile unsigned char EEADR @ 0xFA9;\n\"4561\n[; ;pic18f2550.h: 4561: asm(\"EEADR equ 0FA9h\");\n[; <\" EEADR equ 0FA9h ;# \">\n[; ;pic18f2550.h: 4565: extern volatile unsigned char RCSTA @ 0xFAB;\n\"4567\n[; ;pic18f2550.h: 4567: asm(\"RCSTA equ 0FABh\");\n[; <\" RCSTA equ 0FABh ;# \">\n[; ;pic18f2550.h: 4570: extern volatile unsigned char RCSTA1 @ 0xFAB;\n\"4572\n[; ;pic18f2550.h: 4572: asm(\"RCSTA1 equ 0FABh\");\n[; <\" RCSTA1 equ 0FABh ;# \">\n[; ;pic18f2550.h: 4575: typedef union {\n[; ;pic18f2550.h: 4576: struct {\n[; ;pic18f2550.h: 4577: unsigned RX9D :1;\n[; ;pic18f2550.h: 4578: unsigned OERR :1;\n[; ;pic18f2550.h: 4579: unsigned FERR :1;\n[; ;pic18f2550.h: 4580: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4581: unsigned CREN :1;\n[; ;pic18f2550.h: 4582: unsigned SREN :1;\n[; ;pic18f2550.h: 4583: unsigned RX9 :1;\n[; ;pic18f2550.h: 4584: unsigned SPEN :1;\n[; ;pic18f2550.h: 4585: };\n[; ;pic18f2550.h: 4586: struct {\n[; ;pic18f2550.h: 4587: unsigned :3;\n[; ;pic18f2550.h: 4588: unsigned ADEN :1;\n[; ;pic18f2550.h: 4589: };\n[; ;pic18f2550.h: 4590: struct {\n[; ;pic18f2550.h: 4591: unsigned :5;\n[; ;pic18f2550.h: 4592: unsigned SRENA :1;\n[; ;pic18f2550.h: 4593: };\n[; ;pic18f2550.h: 4594: } RCSTAbits_t;\n[; ;pic18f2550.h: 4595: extern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n[; ;pic18f2550.h: 4648: typedef union {\n[; ;pic18f2550.h: 4649: struct {\n[; ;pic18f2550.h: 4650: unsigned RX9D :1;\n[; ;pic18f2550.h: 4651: unsigned OERR :1;\n[; ;pic18f2550.h: 4652: unsigned FERR :1;\n[; ;pic18f2550.h: 4653: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4654: unsigned CREN :1;\n[; ;pic18f2550.h: 4655: unsigned SREN :1;\n[; ;pic18f2550.h: 4656: unsigned RX9 :1;\n[; ;pic18f2550.h: 4657: unsigned SPEN :1;\n[; ;pic18f2550.h: 4658: };\n[; ;pic18f2550.h: 4659: struct {\n[; ;pic18f2550.h: 4660: unsigned :3;\n[; ;pic18f2550.h: 4661: unsigned ADEN :1;\n[; ;pic18f2550.h: 4662: };\n[; ;pic18f2550.h: 4663: struct {\n[; ;pic18f2550.h: 4664: unsigned :5;\n[; ;pic18f2550.h: 4665: unsigned SRENA :1;\n[; ;pic18f2550.h: 4666: };\n[; ;pic18f2550.h: 4667: } RCSTA1bits_t;\n[; ;pic18f2550.h: 4668: extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n[; ;pic18f2550.h: 4722: extern volatile unsigned char TXSTA @ 0xFAC;\n\"4724\n[; ;pic18f2550.h: 4724: asm(\"TXSTA equ 0FACh\");\n[; <\" TXSTA equ 0FACh ;# \">\n[; ;pic18f2550.h: 4727: extern volatile unsigned char TXSTA1 @ 0xFAC;\n\"4729\n[; ;pic18f2550.h: 4729: asm(\"TXSTA1 equ 0FACh\");\n[; <\" TXSTA1 equ 0FACh ;# \">\n[; ;pic18f2550.h: 4732: typedef union {\n[; ;pic18f2550.h: 4733: struct {\n[; ;pic18f2550.h: 4734: unsigned TX9D :1;\n[; ;pic18f2550.h: 4735: unsigned TRMT :1;\n[; ;pic18f2550.h: 4736: unsigned BRGH :1;\n[; ;pic18f2550.h: 4737: unsigned SENDB :1;\n[; ;pic18f2550.h: 4738: unsigned SYNC :1;\n[; ;pic18f2550.h: 4739: unsigned TXEN :1;\n[; ;pic18f2550.h: 4740: unsigned TX9 :1;\n[; ;pic18f2550.h: 4741: unsigned CSRC :1;\n[; ;pic18f2550.h: 4742: };\n[; ;pic18f2550.h: 4743: struct {\n[; ;pic18f2550.h: 4744: unsigned :2;\n[; ;pic18f2550.h: 4745: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4746: };\n[; ;pic18f2550.h: 4747: struct {\n[; ;pic18f2550.h: 4748: unsigned :7;\n[; ;pic18f2550.h: 4749: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4750: };\n[; ;pic18f2550.h: 4751: struct {\n[; ;pic18f2550.h: 4752: unsigned :3;\n[; ;pic18f2550.h: 4753: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4754: };\n[; ;pic18f2550.h: 4755: struct {\n[; ;pic18f2550.h: 4756: unsigned :4;\n[; ;pic18f2550.h: 4757: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4758: };\n[; ;pic18f2550.h: 4759: struct {\n[; ;pic18f2550.h: 4760: unsigned :1;\n[; ;pic18f2550.h: 4761: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4762: };\n[; ;pic18f2550.h: 4763: struct {\n[; ;pic18f2550.h: 4764: unsigned :6;\n[; ;pic18f2550.h: 4765: unsigned TX91 :1;\n[; ;pic18f2550.h: 4766: };\n[; ;pic18f2550.h: 4767: struct {\n[; ;pic18f2550.h: 4768: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4769: };\n[; ;pic18f2550.h: 4770: struct {\n[; ;pic18f2550.h: 4771: unsigned :5;\n[; ;pic18f2550.h: 4772: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4773: };\n[; ;pic18f2550.h: 4774: } TXSTAbits_t;\n[; ;pic18f2550.h: 4775: extern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n[; ;pic18f2550.h: 4858: typedef union {\n[; ;pic18f2550.h: 4859: struct {\n[; ;pic18f2550.h: 4860: unsigned TX9D :1;\n[; ;pic18f2550.h: 4861: unsigned TRMT :1;\n[; ;pic18f2550.h: 4862: unsigned BRGH :1;\n[; ;pic18f2550.h: 4863: unsigned SENDB :1;\n[; ;pic18f2550.h: 4864: unsigned SYNC :1;\n[; ;pic18f2550.h: 4865: unsigned TXEN :1;\n[; ;pic18f2550.h: 4866: unsigned TX9 :1;\n[; ;pic18f2550.h: 4867: unsigned CSRC :1;\n[; ;pic18f2550.h: 4868: };\n[; ;pic18f2550.h: 4869: struct {\n[; ;pic18f2550.h: 4870: unsigned :2;\n[; ;pic18f2550.h: 4871: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4872: };\n[; ;pic18f2550.h: 4873: struct {\n[; ;pic18f2550.h: 4874: unsigned :7;\n[; ;pic18f2550.h: 4875: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4876: };\n[; ;pic18f2550.h: 4877: struct {\n[; ;pic18f2550.h: 4878: unsigned :3;\n[; ;pic18f2550.h: 4879: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4880: };\n[; ;pic18f2550.h: 4881: struct {\n[; ;pic18f2550.h: 4882: unsigned :4;\n[; ;pic18f2550.h: 4883: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4884: };\n[; ;pic18f2550.h: 4885: struct {\n[; ;pic18f2550.h: 4886: unsigned :1;\n[; ;pic18f2550.h: 4887: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4888: };\n[; ;pic18f2550.h: 4889: struct {\n[; ;pic18f2550.h: 4890: unsigned :6;\n[; ;pic18f2550.h: 4891: unsigned TX91 :1;\n[; ;pic18f2550.h: 4892: };\n[; ;pic18f2550.h: 4893: struct {\n[; ;pic18f2550.h: 4894: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4895: };\n[; ;pic18f2550.h: 4896: struct {\n[; ;pic18f2550.h: 4897: unsigned :5;\n[; ;pic18f2550.h: 4898: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4899: };\n[; ;pic18f2550.h: 4900: } TXSTA1bits_t;\n[; ;pic18f2550.h: 4901: extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n[; ;pic18f2550.h: 4985: extern volatile unsigned char TXREG @ 0xFAD;\n\"4987\n[; ;pic18f2550.h: 4987: asm(\"TXREG equ 0FADh\");\n[; <\" TXREG equ 0FADh ;# \">\n[; ;pic18f2550.h: 4990: extern volatile unsigned char TXREG1 @ 0xFAD;\n\"4992\n[; ;pic18f2550.h: 4992: asm(\"TXREG1 equ 0FADh\");\n[; <\" TXREG1 equ 0FADh ;# \">\n[; ;pic18f2550.h: 4996: extern volatile unsigned char RCREG @ 0xFAE;\n\"4998\n[; ;pic18f2550.h: 4998: asm(\"RCREG equ 0FAEh\");\n[; <\" RCREG equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5001: extern volatile unsigned char RCREG1 @ 0xFAE;\n\"5003\n[; ;pic18f2550.h: 5003: asm(\"RCREG1 equ 0FAEh\");\n[; <\" RCREG1 equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5007: extern volatile unsigned char SPBRG @ 0xFAF;\n\"5009\n[; ;pic18f2550.h: 5009: asm(\"SPBRG equ 0FAFh\");\n[; <\" SPBRG equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5012: extern volatile unsigned char SPBRG1 @ 0xFAF;\n\"5014\n[; ;pic18f2550.h: 5014: asm(\"SPBRG1 equ 0FAFh\");\n[; <\" SPBRG1 equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5018: extern volatile unsigned char SPBRGH @ 0xFB0;\n\"5020\n[; ;pic18f2550.h: 5020: asm(\"SPBRGH equ 0FB0h\");\n[; <\" SPBRGH equ 0FB0h ;# \">\n[; ;pic18f2550.h: 5024: extern volatile unsigned char T3CON @ 0xFB1;\n\"5026\n[; ;pic18f2550.h: 5026: asm(\"T3CON equ 0FB1h\");\n[; <\" T3CON equ 0FB1h ;# \">\n[; ;pic18f2550.h: 5029: typedef union {\n[; ;pic18f2550.h: 5030: struct {\n[; ;pic18f2550.h: 5031: unsigned :2;\n[; ;pic18f2550.h: 5032: unsigned NOT_T3SYNC :1;\n[; ;pic18f2550.h: 5033: };\n[; ;pic18f2550.h: 5034: struct {\n[; ;pic18f2550.h: 5035: unsigned TMR3ON :1;\n[; ;pic18f2550.h: 5036: unsigned TMR3CS :1;\n[; ;pic18f2550.h: 5037: unsigned nT3SYNC :1;\n[; ;pic18f2550.h: 5038: unsigned T3CCP1 :1;\n[; ;pic18f2550.h: 5039: unsigned T3CKPS :2;\n[; ;pic18f2550.h: 5040: unsigned T3CCP2 :1;\n[; ;pic18f2550.h: 5041: unsigned RD16 :1;\n[; ;pic18f2550.h: 5042: };\n[; ;pic18f2550.h: 5043: struct {\n[; ;pic18f2550.h: 5044: unsigned :2;\n[; ;pic18f2550.h: 5045: unsigned T3SYNC :1;\n[; ;pic18f2550.h: 5046: unsigned :1;\n[; ;pic18f2550.h: 5047: unsigned T3CKPS0 :1;\n[; ;pic18f2550.h: 5048: unsigned T3CKPS1 :1;\n[; ;pic18f2550.h: 5049: };\n[; ;pic18f2550.h: 5050: struct {\n[; ;pic18f2550.h: 5051: unsigned :2;\n[; ;pic18f2550.h: 5052: unsigned T3NSYNC :1;\n[; ;pic18f2550.h: 5053: };\n[; ;pic18f2550.h: 5054: struct {\n[; ;pic18f2550.h: 5055: unsigned :7;\n[; ;pic18f2550.h: 5056: unsigned RD163 :1;\n[; ;pic18f2550.h: 5057: };\n[; ;pic18f2550.h: 5058: struct {\n[; ;pic18f2550.h: 5059: unsigned :3;\n[; ;pic18f2550.h: 5060: unsigned SOSCEN3 :1;\n[; ;pic18f2550.h: 5061: };\n[; ;pic18f2550.h: 5062: struct {\n[; ;pic18f2550.h: 5063: unsigned :7;\n[; ;pic18f2550.h: 5064: unsigned T3RD16 :1;\n[; ;pic18f2550.h: 5065: };\n[; ;pic18f2550.h: 5066: } T3CONbits_t;\n[; ;pic18f2550.h: 5067: extern volatile T3CONbits_t T3CONbits @ 0xFB1;\n[; ;pic18f2550.h: 5146: extern volatile unsigned short TMR3 @ 0xFB2;\n\"5148\n[; ;pic18f2550.h: 5148: asm(\"TMR3 equ 0FB2h\");\n[; <\" TMR3 equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5152: extern volatile unsigned char TMR3L @ 0xFB2;\n\"5154\n[; ;pic18f2550.h: 5154: asm(\"TMR3L equ 0FB2h\");\n[; <\" TMR3L equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5158: extern volatile unsigned char TMR3H @ 0xFB3;\n\"5160\n[; ;pic18f2550.h: 5160: asm(\"TMR3H equ 0FB3h\");\n[; <\" TMR3H equ 0FB3h ;# \">\n[; ;pic18f2550.h: 5164: extern volatile unsigned char CMCON @ 0xFB4;\n\"5166\n[; ;pic18f2550.h: 5166: asm(\"CMCON equ 0FB4h\");\n[; <\" CMCON equ 0FB4h ;# \">\n[; ;pic18f2550.h: 5169: typedef union {\n[; ;pic18f2550.h: 5170: struct {\n[; ;pic18f2550.h: 5171: unsigned CM :3;\n[; ;pic18f2550.h: 5172: unsigned CIS :1;\n[; ;pic18f2550.h: 5173: unsigned C1INV :1;\n[; ;pic18f2550.h: 5174: unsigned C2INV :1;\n[; ;pic18f2550.h: 5175: unsigned C1OUT :1;\n[; ;pic18f2550.h: 5176: unsigned C2OUT :1;\n[; ;pic18f2550.h: 5177: };\n[; ;pic18f2550.h: 5178: struct {\n[; ;pic18f2550.h: 5179: unsigned CM0 :1;\n[; ;pic18f2550.h: 5180: unsigned CM1 :1;\n[; ;pic18f2550.h: 5181: unsigned CM2 :1;\n[; ;pic18f2550.h: 5182: };\n[; ;pic18f2550.h: 5183: struct {\n[; ;pic18f2550.h: 5184: unsigned CMEN0 :1;\n[; ;pic18f2550.h: 5185: };\n[; ;pic18f2550.h: 5186: struct {\n[; ;pic18f2550.h: 5187: unsigned :1;\n[; ;pic18f2550.h: 5188: unsigned CMEN1 :1;\n[; ;pic18f2550.h: 5189: };\n[; ;pic18f2550.h: 5190: struct {\n[; ;pic18f2550.h: 5191: unsigned :2;\n[; ;pic18f2550.h: 5192: unsigned CMEN2 :1;\n[; ;pic18f2550.h: 5193: };\n[; ;pic18f2550.h: 5194: } CMCONbits_t;\n[; ;pic18f2550.h: 5195: extern volatile CMCONbits_t CMCONbits @ 0xFB4;\n[; ;pic18f2550.h: 5259: extern volatile unsigned char CVRCON @ 0xFB5;\n\"5261\n[; ;pic18f2550.h: 5261: asm(\"CVRCON equ 0FB5h\");\n[; <\" CVRCON equ 0FB5h ;# \">\n[; ;pic18f2550.h: 5264: typedef union {\n[; ;pic18f2550.h: 5265: struct {\n[; ;pic18f2550.h: 5266: unsigned CVR :4;\n[; ;pic18f2550.h: 5267: unsigned CVRSS :1;\n[; ;pic18f2550.h: 5268: unsigned CVRR :1;\n[; ;pic18f2550.h: 5269: unsigned CVROE :1;\n[; ;pic18f2550.h: 5270: unsigned CVREN :1;\n[; ;pic18f2550.h: 5271: };\n[; ;pic18f2550.h: 5272: struct {\n[; ;pic18f2550.h: 5273: unsigned CVR0 :1;\n[; ;pic18f2550.h: 5274: unsigned CVR1 :1;\n[; ;pic18f2550.h: 5275: unsigned CVR2 :1;\n[; ;pic18f2550.h: 5276: unsigned CVR3 :1;\n[; ;pic18f2550.h: 5277: unsigned CVREF :1;\n[; ;pic18f2550.h: 5278: };\n[; ;pic18f2550.h: 5279: struct {\n[; ;pic18f2550.h: 5280: unsigned :6;\n[; ;pic18f2550.h: 5281: unsigned CVROEN :1;\n[; ;pic18f2550.h: 5282: };\n[; ;pic18f2550.h: 5283: } CVRCONbits_t;\n[; ;pic18f2550.h: 5284: extern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n[; ;pic18f2550.h: 5343: extern volatile unsigned char ECCP1AS @ 0xFB6;\n\"5345\n[; ;pic18f2550.h: 5345: asm(\"ECCP1AS equ 0FB6h\");\n[; <\" ECCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5348: extern volatile unsigned char CCP1AS @ 0xFB6;\n\"5350\n[; ;pic18f2550.h: 5350: asm(\"CCP1AS equ 0FB6h\");\n[; <\" CCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5353: typedef union {\n[; ;pic18f2550.h: 5354: struct {\n[; ;pic18f2550.h: 5355: unsigned :2;\n[; ;pic18f2550.h: 5356: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5357: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5358: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5359: };\n[; ;pic18f2550.h: 5360: struct {\n[; ;pic18f2550.h: 5361: unsigned :2;\n[; ;pic18f2550.h: 5362: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5363: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5364: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5365: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5366: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5367: };\n[; ;pic18f2550.h: 5368: } ECCP1ASbits_t;\n[; ;pic18f2550.h: 5369: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5412: typedef union {\n[; ;pic18f2550.h: 5413: struct {\n[; ;pic18f2550.h: 5414: unsigned :2;\n[; ;pic18f2550.h: 5415: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5416: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5417: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5418: };\n[; ;pic18f2550.h: 5419: struct {\n[; ;pic18f2550.h: 5420: unsigned :2;\n[; ;pic18f2550.h: 5421: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5422: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5423: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5424: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5425: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5426: };\n[; ;pic18f2550.h: 5427: } CCP1ASbits_t;\n[; ;pic18f2550.h: 5428: extern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5472: extern volatile unsigned char ECCP1DEL @ 0xFB7;\n\"5474\n[; ;pic18f2550.h: 5474: asm(\"ECCP1DEL equ 0FB7h\");\n[; <\" ECCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5477: extern volatile unsigned char CCP1DEL @ 0xFB7;\n\"5479\n[; ;pic18f2550.h: 5479: asm(\"CCP1DEL equ 0FB7h\");\n[; <\" CCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5482: typedef union {\n[; ;pic18f2550.h: 5483: struct {\n[; ;pic18f2550.h: 5484: unsigned :7;\n[; ;pic18f2550.h: 5485: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5486: };\n[; ;pic18f2550.h: 5487: } ECCP1DELbits_t;\n[; ;pic18f2550.h: 5488: extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5496: typedef union {\n[; ;pic18f2550.h: 5497: struct {\n[; ;pic18f2550.h: 5498: unsigned :7;\n[; ;pic18f2550.h: 5499: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5500: };\n[; ;pic18f2550.h: 5501: } CCP1DELbits_t;\n[; ;pic18f2550.h: 5502: extern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5511: extern volatile unsigned char BAUDCON @ 0xFB8;\n\"5513\n[; ;pic18f2550.h: 5513: asm(\"BAUDCON equ 0FB8h\");\n[; <\" BAUDCON equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5516: extern volatile unsigned char BAUDCTL @ 0xFB8;\n\"5518\n[; ;pic18f2550.h: 5518: asm(\"BAUDCTL equ 0FB8h\");\n[; <\" BAUDCTL equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5521: typedef union {\n[; ;pic18f2550.h: 5522: struct {\n[; ;pic18f2550.h: 5523: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5524: unsigned WUE :1;\n[; ;pic18f2550.h: 5525: unsigned :1;\n[; ;pic18f2550.h: 5526: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5527: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5528: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5529: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5530: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5531: };\n[; ;pic18f2550.h: 5532: struct {\n[; ;pic18f2550.h: 5533: unsigned :4;\n[; ;pic18f2550.h: 5534: unsigned SCKP :1;\n[; ;pic18f2550.h: 5535: unsigned :1;\n[; ;pic18f2550.h: 5536: unsigned RCMT :1;\n[; ;pic18f2550.h: 5537: };\n[; ;pic18f2550.h: 5538: struct {\n[; ;pic18f2550.h: 5539: unsigned :5;\n[; ;pic18f2550.h: 5540: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5541: };\n[; ;pic18f2550.h: 5542: struct {\n[; ;pic18f2550.h: 5543: unsigned :1;\n[; ;pic18f2550.h: 5544: unsigned W4E :1;\n[; ;pic18f2550.h: 5545: };\n[; ;pic18f2550.h: 5546: } BAUDCONbits_t;\n[; ;pic18f2550.h: 5547: extern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n[; ;pic18f2550.h: 5605: typedef union {\n[; ;pic18f2550.h: 5606: struct {\n[; ;pic18f2550.h: 5607: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5608: unsigned WUE :1;\n[; ;pic18f2550.h: 5609: unsigned :1;\n[; ;pic18f2550.h: 5610: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5611: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5612: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5613: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5614: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5615: };\n[; ;pic18f2550.h: 5616: struct {\n[; ;pic18f2550.h: 5617: unsigned :4;\n[; ;pic18f2550.h: 5618: unsigned SCKP :1;\n[; ;pic18f2550.h: 5619: unsigned :1;\n[; ;pic18f2550.h: 5620: unsigned RCMT :1;\n[; ;pic18f2550.h: 5621: };\n[; ;pic18f2550.h: 5622: struct {\n[; ;pic18f2550.h: 5623: unsigned :5;\n[; ;pic18f2550.h: 5624: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5625: };\n[; ;pic18f2550.h: 5626: struct {\n[; ;pic18f2550.h: 5627: unsigned :1;\n[; ;pic18f2550.h: 5628: unsigned W4E :1;\n[; ;pic18f2550.h: 5629: };\n[; ;pic18f2550.h: 5630: } BAUDCTLbits_t;\n[; ;pic18f2550.h: 5631: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n[; ;pic18f2550.h: 5690: extern volatile unsigned char CCP2CON @ 0xFBA;\n\"5692\n[; ;pic18f2550.h: 5692: asm(\"CCP2CON equ 0FBAh\");\n[; <\" CCP2CON equ 0FBAh ;# \">\n[; ;pic18f2550.h: 5695: typedef union {\n[; ;pic18f2550.h: 5696: struct {\n[; ;pic18f2550.h: 5697: unsigned CCP2M :4;\n[; ;pic18f2550.h: 5698: unsigned DC2B :2;\n[; ;pic18f2550.h: 5699: };\n[; ;pic18f2550.h: 5700: struct {\n[; ;pic18f2550.h: 5701: unsigned CCP2M0 :1;\n[; ;pic18f2550.h: 5702: unsigned CCP2M1 :1;\n[; ;pic18f2550.h: 5703: unsigned CCP2M2 :1;\n[; ;pic18f2550.h: 5704: unsigned CCP2M3 :1;\n[; ;pic18f2550.h: 5705: unsigned DC2B0 :1;\n[; ;pic18f2550.h: 5706: unsigned DC2B1 :1;\n[; ;pic18f2550.h: 5707: };\n[; ;pic18f2550.h: 5708: } CCP2CONbits_t;\n[; ;pic18f2550.h: 5709: extern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n[; ;pic18f2550.h: 5753: extern volatile unsigned short CCPR2 @ 0xFBB;\n\"5755\n[; ;pic18f2550.h: 5755: asm(\"CCPR2 equ 0FBBh\");\n[; <\" CCPR2 equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5759: extern volatile unsigned char CCPR2L @ 0xFBB;\n\"5761\n[; ;pic18f2550.h: 5761: asm(\"CCPR2L equ 0FBBh\");\n[; <\" CCPR2L equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5765: extern volatile unsigned char CCPR2H @ 0xFBC;\n\"5767\n[; ;pic18f2550.h: 5767: asm(\"CCPR2H equ 0FBCh\");\n[; <\" CCPR2H equ 0FBCh ;# \">\n[; ;pic18f2550.h: 5771: extern volatile unsigned char CCP1CON @ 0xFBD;\n\"5773\n[; ;pic18f2550.h: 5773: asm(\"CCP1CON equ 0FBDh\");\n[; <\" CCP1CON equ 0FBDh ;# \">\n[; ;pic18f2550.h: 5776: typedef union {\n[; ;pic18f2550.h: 5777: struct {\n[; ;pic18f2550.h: 5778: unsigned CCP1M :4;\n[; ;pic18f2550.h: 5779: unsigned DC1B :2;\n[; ;pic18f2550.h: 5780: };\n[; ;pic18f2550.h: 5781: struct {\n[; ;pic18f2550.h: 5782: unsigned CCP1M0 :1;\n[; ;pic18f2550.h: 5783: unsigned CCP1M1 :1;\n[; ;pic18f2550.h: 5784: unsigned CCP1M2 :1;\n[; ;pic18f2550.h: 5785: unsigned CCP1M3 :1;\n[; ;pic18f2550.h: 5786: unsigned DC1B0 :1;\n[; ;pic18f2550.h: 5787: unsigned DC1B1 :1;\n[; ;pic18f2550.h: 5788: };\n[; ;pic18f2550.h: 5789: } CCP1CONbits_t;\n[; ;pic18f2550.h: 5790: extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n[; ;pic18f2550.h: 5834: extern volatile unsigned short CCPR1 @ 0xFBE;\n\"5836\n[; ;pic18f2550.h: 5836: asm(\"CCPR1 equ 0FBEh\");\n[; <\" CCPR1 equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5840: extern volatile unsigned char CCPR1L @ 0xFBE;\n\"5842\n[; ;pic18f2550.h: 5842: asm(\"CCPR1L equ 0FBEh\");\n[; <\" CCPR1L equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5846: extern volatile unsigned char CCPR1H @ 0xFBF;\n\"5848\n[; ;pic18f2550.h: 5848: asm(\"CCPR1H equ 0FBFh\");\n[; <\" CCPR1H equ 0FBFh ;# \">\n[; ;pic18f2550.h: 5852: extern volatile unsigned char ADCON2 @ 0xFC0;\n\"5854\n[; ;pic18f2550.h: 5854: asm(\"ADCON2 equ 0FC0h\");\n[; <\" ADCON2 equ 0FC0h ;# \">\n[; ;pic18f2550.h: 5857: typedef union {\n[; ;pic18f2550.h: 5858: struct {\n[; ;pic18f2550.h: 5859: unsigned ADCS :3;\n[; ;pic18f2550.h: 5860: unsigned ACQT :3;\n[; ;pic18f2550.h: 5861: unsigned :1;\n[; ;pic18f2550.h: 5862: unsigned ADFM :1;\n[; ;pic18f2550.h: 5863: };\n[; ;pic18f2550.h: 5864: struct {\n[; ;pic18f2550.h: 5865: unsigned ADCS0 :1;\n[; ;pic18f2550.h: 5866: unsigned ADCS1 :1;\n[; ;pic18f2550.h: 5867: unsigned ADCS2 :1;\n[; ;pic18f2550.h: 5868: unsigned ACQT0 :1;\n[; ;pic18f2550.h: 5869: unsigned ACQT1 :1;\n[; ;pic18f2550.h: 5870: unsigned ACQT2 :1;\n[; ;pic18f2550.h: 5871: };\n[; ;pic18f2550.h: 5872: } ADCON2bits_t;\n[; ;pic18f2550.h: 5873: extern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n[; ;pic18f2550.h: 5922: extern volatile unsigned char ADCON1 @ 0xFC1;\n\"5924\n[; ;pic18f2550.h: 5924: asm(\"ADCON1 equ 0FC1h\");\n[; <\" ADCON1 equ 0FC1h ;# \">\n[; ;pic18f2550.h: 5927: typedef union {\n[; ;pic18f2550.h: 5928: struct {\n[; ;pic18f2550.h: 5929: unsigned PCFG :4;\n[; ;pic18f2550.h: 5930: unsigned VCFG :2;\n[; ;pic18f2550.h: 5931: };\n[; ;pic18f2550.h: 5932: struct {\n[; ;pic18f2550.h: 5933: unsigned PCFG0 :1;\n[; ;pic18f2550.h: 5934: unsigned PCFG1 :1;\n[; ;pic18f2550.h: 5935: unsigned PCFG2 :1;\n[; ;pic18f2550.h: 5936: unsigned PCFG3 :1;\n[; ;pic18f2550.h: 5937: unsigned VCFG0 :1;\n[; ;pic18f2550.h: 5938: unsigned VCFG1 :1;\n[; ;pic18f2550.h: 5939: };\n[; ;pic18f2550.h: 5940: struct {\n[; ;pic18f2550.h: 5941: unsigned :3;\n[; ;pic18f2550.h: 5942: unsigned CHSN3 :1;\n[; ;pic18f2550.h: 5943: };\n[; ;pic18f2550.h: 5944: struct {\n[; ;pic18f2550.h: 5945: unsigned :4;\n[; ;pic18f2550.h: 5946: unsigned VCFG01 :1;\n[; ;pic18f2550.h: 5947: };\n[; ;pic18f2550.h: 5948: struct {\n[; ;pic18f2550.h: 5949: unsigned :5;\n[; ;pic18f2550.h: 5950: unsigned VCFG11 :1;\n[; ;pic18f2550.h: 5951: };\n[; ;pic18f2550.h: 5952: } ADCON1bits_t;\n[; ;pic18f2550.h: 5953: extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n[; ;pic18f2550.h: 6012: extern volatile unsigned char ADCON0 @ 0xFC2;\n\"6014\n[; ;pic18f2550.h: 6014: asm(\"ADCON0 equ 0FC2h\");\n[; <\" ADCON0 equ 0FC2h ;# \">\n[; ;pic18f2550.h: 6017: typedef union {\n[; ;pic18f2550.h: 6018: struct {\n[; ;pic18f2550.h: 6019: unsigned :1;\n[; ;pic18f2550.h: 6020: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6021: };\n[; ;pic18f2550.h: 6022: struct {\n[; ;pic18f2550.h: 6023: unsigned ADON :1;\n[; ;pic18f2550.h: 6024: unsigned GO_nDONE :1;\n[; ;pic18f2550.h: 6025: unsigned CHS :4;\n[; ;pic18f2550.h: 6026: };\n[; ;pic18f2550.h: 6027: struct {\n[; ;pic18f2550.h: 6028: unsigned :1;\n[; ;pic18f2550.h: 6029: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6030: };\n[; ;pic18f2550.h: 6031: struct {\n[; ;pic18f2550.h: 6032: unsigned :1;\n[; ;pic18f2550.h: 6033: unsigned GO_DONE :1;\n[; ;pic18f2550.h: 6034: unsigned CHS0 :1;\n[; ;pic18f2550.h: 6035: unsigned CHS1 :1;\n[; ;pic18f2550.h: 6036: unsigned CHS2 :1;\n[; ;pic18f2550.h: 6037: unsigned CHS3 :1;\n[; ;pic18f2550.h: 6038: };\n[; ;pic18f2550.h: 6039: struct {\n[; ;pic18f2550.h: 6040: unsigned :1;\n[; ;pic18f2550.h: 6041: unsigned DONE :1;\n[; ;pic18f2550.h: 6042: };\n[; ;pic18f2550.h: 6043: struct {\n[; ;pic18f2550.h: 6044: unsigned :1;\n[; ;pic18f2550.h: 6045: unsigned GO :1;\n[; ;pic18f2550.h: 6046: };\n[; ;pic18f2550.h: 6047: struct {\n[; ;pic18f2550.h: 6048: unsigned :1;\n[; ;pic18f2550.h: 6049: unsigned NOT_DONE :1;\n[; ;pic18f2550.h: 6050: };\n[; ;pic18f2550.h: 6051: struct {\n[; ;pic18f2550.h: 6052: unsigned :1;\n[; ;pic18f2550.h: 6053: unsigned nDONE :1;\n[; ;pic18f2550.h: 6054: };\n[; ;pic18f2550.h: 6055: struct {\n[; ;pic18f2550.h: 6056: unsigned :1;\n[; ;pic18f2550.h: 6057: unsigned GODONE :1;\n[; ;pic18f2550.h: 6058: };\n[; ;pic18f2550.h: 6059: } ADCON0bits_t;\n[; ;pic18f2550.h: 6060: extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n[; ;pic18f2550.h: 6134: extern volatile unsigned short ADRES @ 0xFC3;\n\"6136\n[; ;pic18f2550.h: 6136: asm(\"ADRES equ 0FC3h\");\n[; <\" ADRES equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6140: extern volatile unsigned char ADRESL @ 0xFC3;\n\"6142\n[; ;pic18f2550.h: 6142: asm(\"ADRESL equ 0FC3h\");\n[; <\" ADRESL equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6146: extern volatile unsigned char ADRESH @ 0xFC4;\n\"6148\n[; ;pic18f2550.h: 6148: asm(\"ADRESH equ 0FC4h\");\n[; <\" ADRESH equ 0FC4h ;# \">\n[; ;pic18f2550.h: 6152: extern volatile unsigned char SSPCON2 @ 0xFC5;\n\"6154\n[; ;pic18f2550.h: 6154: asm(\"SSPCON2 equ 0FC5h\");\n[; <\" SSPCON2 equ 0FC5h ;# \">\n[; ;pic18f2550.h: 6157: typedef union {\n[; ;pic18f2550.h: 6158: struct {\n[; ;pic18f2550.h: 6159: unsigned SEN :1;\n[; ;pic18f2550.h: 6160: unsigned RSEN :1;\n[; ;pic18f2550.h: 6161: unsigned PEN :1;\n[; ;pic18f2550.h: 6162: unsigned RCEN :1;\n[; ;pic18f2550.h: 6163: unsigned ACKEN :1;\n[; ;pic18f2550.h: 6164: unsigned ACKDT :1;\n[; ;pic18f2550.h: 6165: unsigned ACKSTAT :1;\n[; ;pic18f2550.h: 6166: unsigned GCEN :1;\n[; ;pic18f2550.h: 6167: };\n[; ;pic18f2550.h: 6168: } SSPCON2bits_t;\n[; ;pic18f2550.h: 6169: extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n[; ;pic18f2550.h: 6213: extern volatile unsigned char SSPCON1 @ 0xFC6;\n\"6215\n[; ;pic18f2550.h: 6215: asm(\"SSPCON1 equ 0FC6h\");\n[; <\" SSPCON1 equ 0FC6h ;# \">\n[; ;pic18f2550.h: 6218: typedef union {\n[; ;pic18f2550.h: 6219: struct {\n[; ;pic18f2550.h: 6220: unsigned SSPM :4;\n[; ;pic18f2550.h: 6221: unsigned CKP :1;\n[; ;pic18f2550.h: 6222: unsigned SSPEN :1;\n[; ;pic18f2550.h: 6223: unsigned SSPOV :1;\n[; ;pic18f2550.h: 6224: unsigned WCOL :1;\n[; ;pic18f2550.h: 6225: };\n[; ;pic18f2550.h: 6226: struct {\n[; ;pic18f2550.h: 6227: unsigned SSPM0 :1;\n[; ;pic18f2550.h: 6228: unsigned SSPM1 :1;\n[; ;pic18f2550.h: 6229: unsigned SSPM2 :1;\n[; ;pic18f2550.h: 6230: unsigned SSPM3 :1;\n[; ;pic18f2550.h: 6231: };\n[; ;pic18f2550.h: 6232: } SSPCON1bits_t;\n[; ;pic18f2550.h: 6233: extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n[; ;pic18f2550.h: 6282: extern volatile unsigned char SSPSTAT @ 0xFC7;\n\"6284\n[; ;pic18f2550.h: 6284: asm(\"SSPSTAT equ 0FC7h\");\n[; <\" SSPSTAT equ 0FC7h ;# \">\n[; ;pic18f2550.h: 6287: typedef union {\n[; ;pic18f2550.h: 6288: struct {\n[; ;pic18f2550.h: 6289: unsigned :2;\n[; ;pic18f2550.h: 6290: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6291: };\n[; ;pic18f2550.h: 6292: struct {\n[; ;pic18f2550.h: 6293: unsigned :5;\n[; ;pic18f2550.h: 6294: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6295: };\n[; ;pic18f2550.h: 6296: struct {\n[; ;pic18f2550.h: 6297: unsigned BF :1;\n[; ;pic18f2550.h: 6298: unsigned UA :1;\n[; ;pic18f2550.h: 6299: unsigned R_nW :1;\n[; ;pic18f2550.h: 6300: unsigned S :1;\n[; ;pic18f2550.h: 6301: unsigned P :1;\n[; ;pic18f2550.h: 6302: unsigned D_nA :1;\n[; ;pic18f2550.h: 6303: unsigned CKE :1;\n[; ;pic18f2550.h: 6304: unsigned SMP :1;\n[; ;pic18f2550.h: 6305: };\n[; ;pic18f2550.h: 6306: struct {\n[; ;pic18f2550.h: 6307: unsigned :2;\n[; ;pic18f2550.h: 6308: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6309: };\n[; ;pic18f2550.h: 6310: struct {\n[; ;pic18f2550.h: 6311: unsigned :5;\n[; ;pic18f2550.h: 6312: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6313: };\n[; ;pic18f2550.h: 6314: struct {\n[; ;pic18f2550.h: 6315: unsigned :2;\n[; ;pic18f2550.h: 6316: unsigned R_W :1;\n[; ;pic18f2550.h: 6317: unsigned :2;\n[; ;pic18f2550.h: 6318: unsigned D_A :1;\n[; ;pic18f2550.h: 6319: };\n[; ;pic18f2550.h: 6320: struct {\n[; ;pic18f2550.h: 6321: unsigned :2;\n[; ;pic18f2550.h: 6322: unsigned I2C_READ :1;\n[; ;pic18f2550.h: 6323: unsigned I2C_START :1;\n[; ;pic18f2550.h: 6324: unsigned I2C_STOP :1;\n[; ;pic18f2550.h: 6325: unsigned I2C_DAT :1;\n[; ;pic18f2550.h: 6326: };\n[; ;pic18f2550.h: 6327: struct {\n[; ;pic18f2550.h: 6328: unsigned :2;\n[; ;pic18f2550.h: 6329: unsigned nW :1;\n[; ;pic18f2550.h: 6330: unsigned :2;\n[; ;pic18f2550.h: 6331: unsigned nA :1;\n[; ;pic18f2550.h: 6332: };\n[; ;pic18f2550.h: 6333: struct {\n[; ;pic18f2550.h: 6334: unsigned :2;\n[; ;pic18f2550.h: 6335: unsigned NOT_WRITE :1;\n[; ;pic18f2550.h: 6336: };\n[; ;pic18f2550.h: 6337: struct {\n[; ;pic18f2550.h: 6338: unsigned :5;\n[; ;pic18f2550.h: 6339: unsigned NOT_ADDRESS :1;\n[; ;pic18f2550.h: 6340: };\n[; ;pic18f2550.h: 6341: struct {\n[; ;pic18f2550.h: 6342: unsigned :2;\n[; ;pic18f2550.h: 6343: unsigned nWRITE :1;\n[; ;pic18f2550.h: 6344: unsigned :2;\n[; ;pic18f2550.h: 6345: unsigned nADDRESS :1;\n[; ;pic18f2550.h: 6346: };\n[; ;pic18f2550.h: 6347: struct {\n[; ;pic18f2550.h: 6348: unsigned :2;\n[; ;pic18f2550.h: 6349: unsigned READ_WRITE :1;\n[; ;pic18f2550.h: 6350: unsigned :2;\n[; ;pic18f2550.h: 6351: unsigned DATA_ADDRESS :1;\n[; ;pic18f2550.h: 6352: };\n[; ;pic18f2550.h: 6353: struct {\n[; ;pic18f2550.h: 6354: unsigned :2;\n[; ;pic18f2550.h: 6355: unsigned R :1;\n[; ;pic18f2550.h: 6356: unsigned :2;\n[; ;pic18f2550.h: 6357: unsigned D :1;\n[; ;pic18f2550.h: 6358: };\n[; ;pic18f2550.h: 6359: struct {\n[; ;pic18f2550.h: 6360: unsigned :5;\n[; ;pic18f2550.h: 6361: unsigned DA :1;\n[; ;pic18f2550.h: 6362: };\n[; ;pic18f2550.h: 6363: struct {\n[; ;pic18f2550.h: 6364: unsigned :2;\n[; ;pic18f2550.h: 6365: unsigned RW :1;\n[; ;pic18f2550.h: 6366: };\n[; ;pic18f2550.h: 6367: struct {\n[; ;pic18f2550.h: 6368: unsigned :3;\n[; ;pic18f2550.h: 6369: unsigned START :1;\n[; ;pic18f2550.h: 6370: };\n[; ;pic18f2550.h: 6371: struct {\n[; ;pic18f2550.h: 6372: unsigned :4;\n[; ;pic18f2550.h: 6373: unsigned STOP :1;\n[; ;pic18f2550.h: 6374: };\n[; ;pic18f2550.h: 6375: struct {\n[; ;pic18f2550.h: 6376: unsigned :2;\n[; ;pic18f2550.h: 6377: unsigned NOT_W :1;\n[; ;pic18f2550.h: 6378: };\n[; ;pic18f2550.h: 6379: struct {\n[; ;pic18f2550.h: 6380: unsigned :5;\n[; ;pic18f2550.h: 6381: unsigned NOT_A :1;\n[; ;pic18f2550.h: 6382: };\n[; ;pic18f2550.h: 6383: } SSPSTATbits_t;\n[; ;pic18f2550.h: 6384: extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n[; ;pic18f2550.h: 6548: extern volatile unsigned char SSPADD @ 0xFC8;\n\"6550\n[; ;pic18f2550.h: 6550: asm(\"SSPADD equ 0FC8h\");\n[; <\" SSPADD equ 0FC8h ;# \">\n[; ;pic18f2550.h: 6554: extern volatile unsigned char SSPBUF @ 0xFC9;\n\"6556\n[; ;pic18f2550.h: 6556: asm(\"SSPBUF equ 0FC9h\");\n[; <\" SSPBUF equ 0FC9h ;# \">\n[; ;pic18f2550.h: 6560: extern volatile unsigned char T2CON @ 0xFCA;\n\"6562\n[; ;pic18f2550.h: 6562: asm(\"T2CON equ 0FCAh\");\n[; <\" T2CON equ 0FCAh ;# \">\n[; ;pic18f2550.h: 6565: typedef union {\n[; ;pic18f2550.h: 6566: struct {\n[; ;pic18f2550.h: 6567: unsigned T2CKPS :2;\n[; ;pic18f2550.h: 6568: unsigned TMR2ON :1;\n[; ;pic18f2550.h: 6569: unsigned TOUTPS :4;\n[; ;pic18f2550.h: 6570: };\n[; ;pic18f2550.h: 6571: struct {\n[; ;pic18f2550.h: 6572: unsigned T2CKPS0 :1;\n[; ;pic18f2550.h: 6573: unsigned T2CKPS1 :1;\n[; ;pic18f2550.h: 6574: unsigned :1;\n[; ;pic18f2550.h: 6575: unsigned T2OUTPS0 :1;\n[; ;pic18f2550.h: 6576: unsigned T2OUTPS1 :1;\n[; ;pic18f2550.h: 6577: unsigned T2OUTPS2 :1;\n[; ;pic18f2550.h: 6578: unsigned T2OUTPS3 :1;\n[; ;pic18f2550.h: 6579: };\n[; ;pic18f2550.h: 6580: struct {\n[; ;pic18f2550.h: 6581: unsigned :3;\n[; ;pic18f2550.h: 6582: unsigned TOUTPS0 :1;\n[; ;pic18f2550.h: 6583: unsigned TOUTPS1 :1;\n[; ;pic18f2550.h: 6584: unsigned TOUTPS2 :1;\n[; ;pic18f2550.h: 6585: unsigned TOUTPS3 :1;\n[; ;pic18f2550.h: 6586: };\n[; ;pic18f2550.h: 6587: } T2CONbits_t;\n[; ;pic18f2550.h: 6588: extern volatile T2CONbits_t T2CONbits @ 0xFCA;\n[; ;pic18f2550.h: 6657: extern volatile unsigned char PR2 @ 0xFCB;\n\"6659\n[; ;pic18f2550.h: 6659: asm(\"PR2 equ 0FCBh\");\n[; <\" PR2 equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6662: extern volatile unsigned char MEMCON @ 0xFCB;\n\"6664\n[; ;pic18f2550.h: 6664: asm(\"MEMCON equ 0FCBh\");\n[; <\" MEMCON equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6668: extern volatile unsigned char TMR2 @ 0xFCC;\n\"6670\n[; ;pic18f2550.h: 6670: asm(\"TMR2 equ 0FCCh\");\n[; <\" TMR2 equ 0FCCh ;# \">\n[; ;pic18f2550.h: 6674: extern volatile unsigned char T1CON @ 0xFCD;\n\"6676\n[; ;pic18f2550.h: 6676: asm(\"T1CON equ 0FCDh\");\n[; <\" T1CON equ 0FCDh ;# \">\n[; ;pic18f2550.h: 6679: typedef union {\n[; ;pic18f2550.h: 6680: struct {\n[; ;pic18f2550.h: 6681: unsigned :2;\n[; ;pic18f2550.h: 6682: unsigned NOT_T1SYNC :1;\n[; ;pic18f2550.h: 6683: };\n[; ;pic18f2550.h: 6684: struct {\n[; ;pic18f2550.h: 6685: unsigned TMR1ON :1;\n[; ;pic18f2550.h: 6686: unsigned TMR1CS :1;\n[; ;pic18f2550.h: 6687: unsigned nT1SYNC :1;\n[; ;pic18f2550.h: 6688: unsigned T1OSCEN :1;\n[; ;pic18f2550.h: 6689: unsigned T1CKPS :2;\n[; ;pic18f2550.h: 6690: unsigned T1RUN :1;\n[; ;pic18f2550.h: 6691: unsigned RD16 :1;\n[; ;pic18f2550.h: 6692: };\n[; ;pic18f2550.h: 6693: struct {\n[; ;pic18f2550.h: 6694: unsigned :2;\n[; ;pic18f2550.h: 6695: unsigned T1SYNC :1;\n[; ;pic18f2550.h: 6696: unsigned :1;\n[; ;pic18f2550.h: 6697: unsigned T1CKPS0 :1;\n[; ;pic18f2550.h: 6698: unsigned T1CKPS1 :1;\n[; ;pic18f2550.h: 6699: };\n[; ;pic18f2550.h: 6700: struct {\n[; ;pic18f2550.h: 6701: unsigned :3;\n[; ;pic18f2550.h: 6702: unsigned SOSCEN :1;\n[; ;pic18f2550.h: 6703: };\n[; ;pic18f2550.h: 6704: struct {\n[; ;pic18f2550.h: 6705: unsigned :7;\n[; ;pic18f2550.h: 6706: unsigned T1RD16 :1;\n[; ;pic18f2550.h: 6707: };\n[; ;pic18f2550.h: 6708: } T1CONbits_t;\n[; ;pic18f2550.h: 6709: extern volatile T1CONbits_t T1CONbits @ 0xFCD;\n[; ;pic18f2550.h: 6778: extern volatile unsigned short TMR1 @ 0xFCE;\n\"6780\n[; ;pic18f2550.h: 6780: asm(\"TMR1 equ 0FCEh\");\n[; <\" TMR1 equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6784: extern volatile unsigned char TMR1L @ 0xFCE;\n\"6786\n[; ;pic18f2550.h: 6786: asm(\"TMR1L equ 0FCEh\");\n[; <\" TMR1L equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6790: extern volatile unsigned char TMR1H @ 0xFCF;\n\"6792\n[; ;pic18f2550.h: 6792: asm(\"TMR1H equ 0FCFh\");\n[; <\" TMR1H equ 0FCFh ;# \">\n[; ;pic18f2550.h: 6796: extern volatile unsigned char RCON @ 0xFD0;\n\"6798\n[; ;pic18f2550.h: 6798: asm(\"RCON equ 0FD0h\");\n[; <\" RCON equ 0FD0h ;# \">\n[; ;pic18f2550.h: 6801: typedef union {\n[; ;pic18f2550.h: 6802: struct {\n[; ;pic18f2550.h: 6803: unsigned NOT_BOR :1;\n[; ;pic18f2550.h: 6804: };\n[; ;pic18f2550.h: 6805: struct {\n[; ;pic18f2550.h: 6806: unsigned :1;\n[; ;pic18f2550.h: 6807: unsigned NOT_POR :1;\n[; ;pic18f2550.h: 6808: };\n[; ;pic18f2550.h: 6809: struct {\n[; ;pic18f2550.h: 6810: unsigned :2;\n[; ;pic18f2550.h: 6811: unsigned NOT_PD :1;\n[; ;pic18f2550.h: 6812: };\n[; ;pic18f2550.h: 6813: struct {\n[; ;pic18f2550.h: 6814: unsigned :3;\n[; ;pic18f2550.h: 6815: unsigned NOT_TO :1;\n[; ;pic18f2550.h: 6816: };\n[; ;pic18f2550.h: 6817: struct {\n[; ;pic18f2550.h: 6818: unsigned :4;\n[; ;pic18f2550.h: 6819: unsigned NOT_RI :1;\n[; ;pic18f2550.h: 6820: };\n[; ;pic18f2550.h: 6821: struct {\n[; ;pic18f2550.h: 6822: unsigned nBOR :1;\n[; ;pic18f2550.h: 6823: unsigned nPOR :1;\n[; ;pic18f2550.h: 6824: unsigned nPD :1;\n[; ;pic18f2550.h: 6825: unsigned nTO :1;\n[; ;pic18f2550.h: 6826: unsigned nRI :1;\n[; ;pic18f2550.h: 6827: unsigned :1;\n[; ;pic18f2550.h: 6828: unsigned SBOREN :1;\n[; ;pic18f2550.h: 6829: unsigned IPEN :1;\n[; ;pic18f2550.h: 6830: };\n[; ;pic18f2550.h: 6831: struct {\n[; ;pic18f2550.h: 6832: unsigned :7;\n[; ;pic18f2550.h: 6833: unsigned NOT_IPEN :1;\n[; ;pic18f2550.h: 6834: };\n[; ;pic18f2550.h: 6835: struct {\n[; ;pic18f2550.h: 6836: unsigned BOR :1;\n[; ;pic18f2550.h: 6837: unsigned POR :1;\n[; ;pic18f2550.h: 6838: unsigned PD :1;\n[; ;pic18f2550.h: 6839: unsigned TO :1;\n[; ;pic18f2550.h: 6840: unsigned RI :1;\n[; ;pic18f2550.h: 6841: unsigned :2;\n[; ;pic18f2550.h: 6842: unsigned nIPEN :1;\n[; ;pic18f2550.h: 6843: };\n[; ;pic18f2550.h: 6844: } RCONbits_t;\n[; ;pic18f2550.h: 6845: extern volatile RCONbits_t RCONbits @ 0xFD0;\n[; ;pic18f2550.h: 6944: extern volatile unsigned char WDTCON @ 0xFD1;\n\"6946\n[; ;pic18f2550.h: 6946: asm(\"WDTCON equ 0FD1h\");\n[; <\" WDTCON equ 0FD1h ;# \">\n[; ;pic18f2550.h: 6949: typedef union {\n[; ;pic18f2550.h: 6950: struct {\n[; ;pic18f2550.h: 6951: unsigned SWDTEN :1;\n[; ;pic18f2550.h: 6952: };\n[; ;pic18f2550.h: 6953: struct {\n[; ;pic18f2550.h: 6954: unsigned SWDTE :1;\n[; ;pic18f2550.h: 6955: };\n[; ;pic18f2550.h: 6956: } WDTCONbits_t;\n[; ;pic18f2550.h: 6957: extern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n[; ;pic18f2550.h: 6971: extern volatile unsigned char HLVDCON @ 0xFD2;\n\"6973\n[; ;pic18f2550.h: 6973: asm(\"HLVDCON equ 0FD2h\");\n[; <\" HLVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6976: extern volatile unsigned char LVDCON @ 0xFD2;\n\"6978\n[; ;pic18f2550.h: 6978: asm(\"LVDCON equ 0FD2h\");\n[; <\" LVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6981: typedef union {\n[; ;pic18f2550.h: 6982: struct {\n[; ;pic18f2550.h: 6983: unsigned HLVDL :4;\n[; ;pic18f2550.h: 6984: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 6985: unsigned IRVST :1;\n[; ;pic18f2550.h: 6986: unsigned :1;\n[; ;pic18f2550.h: 6987: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 6988: };\n[; ;pic18f2550.h: 6989: struct {\n[; ;pic18f2550.h: 6990: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 6991: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 6992: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 6993: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 6994: };\n[; ;pic18f2550.h: 6995: struct {\n[; ;pic18f2550.h: 6996: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 6997: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 6998: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 6999: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7000: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7001: unsigned IVRST :1;\n[; ;pic18f2550.h: 7002: };\n[; ;pic18f2550.h: 7003: struct {\n[; ;pic18f2550.h: 7004: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7005: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7006: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7007: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7008: unsigned :1;\n[; ;pic18f2550.h: 7009: unsigned BGST :1;\n[; ;pic18f2550.h: 7010: };\n[; ;pic18f2550.h: 7011: } HLVDCONbits_t;\n[; ;pic18f2550.h: 7012: extern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7110: typedef union {\n[; ;pic18f2550.h: 7111: struct {\n[; ;pic18f2550.h: 7112: unsigned HLVDL :4;\n[; ;pic18f2550.h: 7113: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 7114: unsigned IRVST :1;\n[; ;pic18f2550.h: 7115: unsigned :1;\n[; ;pic18f2550.h: 7116: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 7117: };\n[; ;pic18f2550.h: 7118: struct {\n[; ;pic18f2550.h: 7119: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 7120: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 7121: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 7122: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 7123: };\n[; ;pic18f2550.h: 7124: struct {\n[; ;pic18f2550.h: 7125: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 7126: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 7127: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 7128: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7129: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7130: unsigned IVRST :1;\n[; ;pic18f2550.h: 7131: };\n[; ;pic18f2550.h: 7132: struct {\n[; ;pic18f2550.h: 7133: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7134: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7135: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7136: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7137: unsigned :1;\n[; ;pic18f2550.h: 7138: unsigned BGST :1;\n[; ;pic18f2550.h: 7139: };\n[; ;pic18f2550.h: 7140: } LVDCONbits_t;\n[; ;pic18f2550.h: 7141: extern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7240: extern volatile unsigned char OSCCON @ 0xFD3;\n\"7242\n[; ;pic18f2550.h: 7242: asm(\"OSCCON equ 0FD3h\");\n[; <\" OSCCON equ 0FD3h ;# \">\n[; ;pic18f2550.h: 7245: typedef union {\n[; ;pic18f2550.h: 7246: struct {\n[; ;pic18f2550.h: 7247: unsigned SCS :2;\n[; ;pic18f2550.h: 7248: unsigned IOFS :1;\n[; ;pic18f2550.h: 7249: unsigned OSTS :1;\n[; ;pic18f2550.h: 7250: unsigned IRCF :3;\n[; ;pic18f2550.h: 7251: unsigned IDLEN :1;\n[; ;pic18f2550.h: 7252: };\n[; ;pic18f2550.h: 7253: struct {\n[; ;pic18f2550.h: 7254: unsigned SCS0 :1;\n[; ;pic18f2550.h: 7255: unsigned SCS1 :1;\n[; ;pic18f2550.h: 7256: unsigned FLTS :1;\n[; ;pic18f2550.h: 7257: unsigned :1;\n[; ;pic18f2550.h: 7258: unsigned IRCF0 :1;\n[; ;pic18f2550.h: 7259: unsigned IRCF1 :1;\n[; ;pic18f2550.h: 7260: unsigned IRCF2 :1;\n[; ;pic18f2550.h: 7261: };\n[; ;pic18f2550.h: 7262: } OSCCONbits_t;\n[; ;pic18f2550.h: 7263: extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n[; ;pic18f2550.h: 7322: extern volatile unsigned char T0CON @ 0xFD5;\n\"7324\n[; ;pic18f2550.h: 7324: asm(\"T0CON equ 0FD5h\");\n[; <\" T0CON equ 0FD5h ;# \">\n[; ;pic18f2550.h: 7327: typedef union {\n[; ;pic18f2550.h: 7328: struct {\n[; ;pic18f2550.h: 7329: unsigned T0PS :3;\n[; ;pic18f2550.h: 7330: unsigned PSA :1;\n[; ;pic18f2550.h: 7331: unsigned T0SE :1;\n[; ;pic18f2550.h: 7332: unsigned T0CS :1;\n[; ;pic18f2550.h: 7333: unsigned T08BIT :1;\n[; ;pic18f2550.h: 7334: unsigned TMR0ON :1;\n[; ;pic18f2550.h: 7335: };\n[; ;pic18f2550.h: 7336: struct {\n[; ;pic18f2550.h: 7337: unsigned T0PS0 :1;\n[; ;pic18f2550.h: 7338: unsigned T0PS1 :1;\n[; ;pic18f2550.h: 7339: unsigned T0PS2 :1;\n[; ;pic18f2550.h: 7340: };\n[; ;pic18f2550.h: 7341: } T0CONbits_t;\n[; ;pic18f2550.h: 7342: extern volatile T0CONbits_t T0CONbits @ 0xFD5;\n[; ;pic18f2550.h: 7391: extern volatile unsigned short TMR0 @ 0xFD6;\n\"7393\n[; ;pic18f2550.h: 7393: asm(\"TMR0 equ 0FD6h\");\n[; <\" TMR0 equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7397: extern volatile unsigned char TMR0L @ 0xFD6;\n\"7399\n[; ;pic18f2550.h: 7399: asm(\"TMR0L equ 0FD6h\");\n[; <\" TMR0L equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7403: extern volatile unsigned char TMR0H @ 0xFD7;\n\"7405\n[; ;pic18f2550.h: 7405: asm(\"TMR0H equ 0FD7h\");\n[; <\" TMR0H equ 0FD7h ;# \">\n[; ;pic18f2550.h: 7409: extern volatile unsigned char STATUS @ 0xFD8;\n\"7411\n[; ;pic18f2550.h: 7411: asm(\"STATUS equ 0FD8h\");\n[; <\" STATUS equ 0FD8h ;# \">\n[; ;pic18f2550.h: 7414: typedef union {\n[; ;pic18f2550.h: 7415: struct {\n[; ;pic18f2550.h: 7416: unsigned C :1;\n[; ;pic18f2550.h: 7417: unsigned DC :1;\n[; ;pic18f2550.h: 7418: unsigned Z :1;\n[; ;pic18f2550.h: 7419: unsigned OV :1;\n[; ;pic18f2550.h: 7420: unsigned N :1;\n[; ;pic18f2550.h: 7421: };\n[; ;pic18f2550.h: 7422: struct {\n[; ;pic18f2550.h: 7423: unsigned CARRY :1;\n[; ;pic18f2550.h: 7424: };\n[; ;pic18f2550.h: 7425: struct {\n[; ;pic18f2550.h: 7426: unsigned :4;\n[; ;pic18f2550.h: 7427: unsigned NEGATIVE :1;\n[; ;pic18f2550.h: 7428: };\n[; ;pic18f2550.h: 7429: struct {\n[; ;pic18f2550.h: 7430: unsigned :3;\n[; ;pic18f2550.h: 7431: unsigned OVERFLOW :1;\n[; ;pic18f2550.h: 7432: };\n[; ;pic18f2550.h: 7433: struct {\n[; ;pic18f2550.h: 7434: unsigned :2;\n[; ;pic18f2550.h: 7435: unsigned ZERO :1;\n[; ;pic18f2550.h: 7436: };\n[; ;pic18f2550.h: 7437: } STATUSbits_t;\n[; ;pic18f2550.h: 7438: extern volatile STATUSbits_t STATUSbits @ 0xFD8;\n[; ;pic18f2550.h: 7487: extern volatile unsigned short FSR2 @ 0xFD9;\n\"7489\n[; ;pic18f2550.h: 7489: asm(\"FSR2 equ 0FD9h\");\n[; <\" FSR2 equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7493: extern volatile unsigned char FSR2L @ 0xFD9;\n\"7495\n[; ;pic18f2550.h: 7495: asm(\"FSR2L equ 0FD9h\");\n[; <\" FSR2L equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7499: extern volatile unsigned char FSR2H @ 0xFDA;\n\"7501\n[; ;pic18f2550.h: 7501: asm(\"FSR2H equ 0FDAh\");\n[; <\" FSR2H equ 0FDAh ;# \">\n[; ;pic18f2550.h: 7505: extern volatile unsigned char PLUSW2 @ 0xFDB;\n\"7507\n[; ;pic18f2550.h: 7507: asm(\"PLUSW2 equ 0FDBh\");\n[; <\" PLUSW2 equ 0FDBh ;# \">\n[; ;pic18f2550.h: 7511: extern volatile unsigned char PREINC2 @ 0xFDC;\n\"7513\n[; ;pic18f2550.h: 7513: asm(\"PREINC2 equ 0FDCh\");\n[; <\" PREINC2 equ 0FDCh ;# \">\n[; ;pic18f2550.h: 7517: extern volatile unsigned char POSTDEC2 @ 0xFDD;\n\"7519\n[; ;pic18f2550.h: 7519: asm(\"POSTDEC2 equ 0FDDh\");\n[; <\" POSTDEC2 equ 0FDDh ;# \">\n[; ;pic18f2550.h: 7523: extern volatile unsigned char POSTINC2 @ 0xFDE;\n\"7525\n[; ;pic18f2550.h: 7525: asm(\"POSTINC2 equ 0FDEh\");\n[; <\" POSTINC2 equ 0FDEh ;# \">\n[; ;pic18f2550.h: 7529: extern volatile unsigned char INDF2 @ 0xFDF;\n\"7531\n[; ;pic18f2550.h: 7531: asm(\"INDF2 equ 0FDFh\");\n[; <\" INDF2 equ 0FDFh ;# \">\n[; ;pic18f2550.h: 7535: extern volatile unsigned char BSR @ 0xFE0;\n\"7537\n[; ;pic18f2550.h: 7537: asm(\"BSR equ 0FE0h\");\n[; <\" BSR equ 0FE0h ;# \">\n[; ;pic18f2550.h: 7541: extern volatile unsigned short FSR1 @ 0xFE1;\n\"7543\n[; ;pic18f2550.h: 7543: asm(\"FSR1 equ 0FE1h\");\n[; <\" FSR1 equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7547: extern volatile unsigned char FSR1L @ 0xFE1;\n\"7549\n[; ;pic18f2550.h: 7549: asm(\"FSR1L equ 0FE1h\");\n[; <\" FSR1L equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7553: extern volatile unsigned char FSR1H @ 0xFE2;\n\"7555\n[; ;pic18f2550.h: 7555: asm(\"FSR1H equ 0FE2h\");\n[; <\" FSR1H equ 0FE2h ;# \">\n[; ;pic18f2550.h: 7559: extern volatile unsigned char PLUSW1 @ 0xFE3;\n\"7561\n[; ;pic18f2550.h: 7561: asm(\"PLUSW1 equ 0FE3h\");\n[; <\" PLUSW1 equ 0FE3h ;# \">\n[; ;pic18f2550.h: 7565: extern volatile unsigned char PREINC1 @ 0xFE4;\n\"7567\n[; ;pic18f2550.h: 7567: asm(\"PREINC1 equ 0FE4h\");\n[; <\" PREINC1 equ 0FE4h ;# \">\n[; ;pic18f2550.h: 7571: extern volatile unsigned char POSTDEC1 @ 0xFE5;\n\"7573\n[; ;pic18f2550.h: 7573: asm(\"POSTDEC1 equ 0FE5h\");\n[; <\" POSTDEC1 equ 0FE5h ;# \">\n[; ;pic18f2550.h: 7577: extern volatile unsigned char POSTINC1 @ 0xFE6;\n\"7579\n[; ;pic18f2550.h: 7579: asm(\"POSTINC1 equ 0FE6h\");\n[; <\" POSTINC1 equ 0FE6h ;# \">\n[; ;pic18f2550.h: 7583: extern volatile unsigned char INDF1 @ 0xFE7;\n\"7585\n[; ;pic18f2550.h: 7585: asm(\"INDF1 equ 0FE7h\");\n[; <\" INDF1 equ 0FE7h ;# \">\n[; ;pic18f2550.h: 7589: extern volatile unsigned char WREG @ 0xFE8;\n\"7591\n[; ;pic18f2550.h: 7591: asm(\"WREG equ 0FE8h\");\n[; <\" WREG equ 0FE8h ;# \">\n[; ;pic18f2550.h: 7595: extern volatile unsigned short FSR0 @ 0xFE9;\n\"7597\n[; ;pic18f2550.h: 7597: asm(\"FSR0 equ 0FE9h\");\n[; <\" FSR0 equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7601: extern volatile unsigned char FSR0L @ 0xFE9;\n\"7603\n[; ;pic18f2550.h: 7603: asm(\"FSR0L equ 0FE9h\");\n[; <\" FSR0L equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7607: extern volatile unsigned char FSR0H @ 0xFEA;\n\"7609\n[; ;pic18f2550.h: 7609: asm(\"FSR0H equ 0FEAh\");\n[; <\" FSR0H equ 0FEAh ;# \">\n[; ;pic18f2550.h: 7613: extern volatile unsigned char PLUSW0 @ 0xFEB;\n\"7615\n[; ;pic18f2550.h: 7615: asm(\"PLUSW0 equ 0FEBh\");\n[; <\" PLUSW0 equ 0FEBh ;# \">\n[; ;pic18f2550.h: 7619: extern volatile unsigned char PREINC0 @ 0xFEC;\n\"7621\n[; ;pic18f2550.h: 7621: asm(\"PREINC0 equ 0FECh\");\n[; <\" PREINC0 equ 0FECh ;# \">\n[; ;pic18f2550.h: 7625: extern volatile unsigned char POSTDEC0 @ 0xFED;\n\"7627\n[; ;pic18f2550.h: 7627: asm(\"POSTDEC0 equ 0FEDh\");\n[; <\" POSTDEC0 equ 0FEDh ;# \">\n[; ;pic18f2550.h: 7631: extern volatile unsigned char POSTINC0 @ 0xFEE;\n\"7633\n[; ;pic18f2550.h: 7633: asm(\"POSTINC0 equ 0FEEh\");\n[; <\" POSTINC0 equ 0FEEh ;# \">\n[; ;pic18f2550.h: 7637: extern volatile unsigned char INDF0 @ 0xFEF;\n\"7639\n[; ;pic18f2550.h: 7639: asm(\"INDF0 equ 0FEFh\");\n[; <\" INDF0 equ 0FEFh ;# \">\n[; ;pic18f2550.h: 7643: extern volatile unsigned char INTCON3 @ 0xFF0;\n\"7645\n[; ;pic18f2550.h: 7645: asm(\"INTCON3 equ 0FF0h\");\n[; <\" INTCON3 equ 0FF0h ;# \">\n[; ;pic18f2550.h: 7648: typedef union {\n[; ;pic18f2550.h: 7649: struct {\n[; ;pic18f2550.h: 7650: unsigned INT1IF :1;\n[; ;pic18f2550.h: 7651: unsigned INT2IF :1;\n[; ;pic18f2550.h: 7652: unsigned :1;\n[; ;pic18f2550.h: 7653: unsigned INT1IE :1;\n[; ;pic18f2550.h: 7654: unsigned INT2IE :1;\n[; ;pic18f2550.h: 7655: unsigned :1;\n[; ;pic18f2550.h: 7656: unsigned INT1IP :1;\n[; ;pic18f2550.h: 7657: unsigned INT2IP :1;\n[; ;pic18f2550.h: 7658: };\n[; ;pic18f2550.h: 7659: struct {\n[; ;pic18f2550.h: 7660: unsigned INT1F :1;\n[; ;pic18f2550.h: 7661: unsigned INT2F :1;\n[; ;pic18f2550.h: 7662: unsigned :1;\n[; ;pic18f2550.h: 7663: unsigned INT1E :1;\n[; ;pic18f2550.h: 7664: unsigned INT2E :1;\n[; ;pic18f2550.h: 7665: unsigned :1;\n[; ;pic18f2550.h: 7666: unsigned INT1P :1;\n[; ;pic18f2550.h: 7667: unsigned INT2P :1;\n[; ;pic18f2550.h: 7668: };\n[; ;pic18f2550.h: 7669: } INTCON3bits_t;\n[; ;pic18f2550.h: 7670: extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n[; ;pic18f2550.h: 7734: extern volatile unsigned char INTCON2 @ 0xFF1;\n\"7736\n[; ;pic18f2550.h: 7736: asm(\"INTCON2 equ 0FF1h\");\n[; <\" INTCON2 equ 0FF1h ;# \">\n[; ;pic18f2550.h: 7739: typedef union {\n[; ;pic18f2550.h: 7740: struct {\n[; ;pic18f2550.h: 7741: unsigned :7;\n[; ;pic18f2550.h: 7742: unsigned NOT_RBPU :1;\n[; ;pic18f2550.h: 7743: };\n[; ;pic18f2550.h: 7744: struct {\n[; ;pic18f2550.h: 7745: unsigned RBIP :1;\n[; ;pic18f2550.h: 7746: unsigned :1;\n[; ;pic18f2550.h: 7747: unsigned TMR0IP :1;\n[; ;pic18f2550.h: 7748: unsigned :1;\n[; ;pic18f2550.h: 7749: unsigned INTEDG2 :1;\n[; ;pic18f2550.h: 7750: unsigned INTEDG1 :1;\n[; ;pic18f2550.h: 7751: unsigned INTEDG0 :1;\n[; ;pic18f2550.h: 7752: unsigned nRBPU :1;\n[; ;pic18f2550.h: 7753: };\n[; ;pic18f2550.h: 7754: struct {\n[; ;pic18f2550.h: 7755: unsigned :2;\n[; ;pic18f2550.h: 7756: unsigned T0IP :1;\n[; ;pic18f2550.h: 7757: unsigned :4;\n[; ;pic18f2550.h: 7758: unsigned RBPU :1;\n[; ;pic18f2550.h: 7759: };\n[; ;pic18f2550.h: 7760: } INTCON2bits_t;\n[; ;pic18f2550.h: 7761: extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n[; ;pic18f2550.h: 7810: extern volatile unsigned char INTCON @ 0xFF2;\n\"7812\n[; ;pic18f2550.h: 7812: asm(\"INTCON equ 0FF2h\");\n[; <\" INTCON equ 0FF2h ;# \">\n[; ;pic18f2550.h: 7815: typedef union {\n[; ;pic18f2550.h: 7816: struct {\n[; ;pic18f2550.h: 7817: unsigned RBIF :1;\n[; ;pic18f2550.h: 7818: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7819: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7820: unsigned RBIE :1;\n[; ;pic18f2550.h: 7821: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7822: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7823: unsigned PEIE_GIEL :1;\n[; ;pic18f2550.h: 7824: unsigned GIE_GIEH :1;\n[; ;pic18f2550.h: 7825: };\n[; ;pic18f2550.h: 7826: struct {\n[; ;pic18f2550.h: 7827: unsigned RBIF :1;\n[; ;pic18f2550.h: 7828: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7829: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7830: unsigned RBIE :1;\n[; ;pic18f2550.h: 7831: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7832: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7833: unsigned PEIE :1;\n[; ;pic18f2550.h: 7834: unsigned GIE :1;\n[; ;pic18f2550.h: 7835: };\n[; ;pic18f2550.h: 7836: struct {\n[; ;pic18f2550.h: 7837: unsigned RBIF :1;\n[; ;pic18f2550.h: 7838: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7839: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7840: unsigned RBIE :1;\n[; ;pic18f2550.h: 7841: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7842: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7843: unsigned GIEL :1;\n[; ;pic18f2550.h: 7844: unsigned GIEH :1;\n[; ;pic18f2550.h: 7845: };\n[; ;pic18f2550.h: 7846: struct {\n[; ;pic18f2550.h: 7847: unsigned :1;\n[; ;pic18f2550.h: 7848: unsigned INT0F :1;\n[; ;pic18f2550.h: 7849: unsigned T0IF :1;\n[; ;pic18f2550.h: 7850: unsigned :1;\n[; ;pic18f2550.h: 7851: unsigned INT0E :1;\n[; ;pic18f2550.h: 7852: unsigned T0IE :1;\n[; ;pic18f2550.h: 7853: unsigned PEIE :1;\n[; ;pic18f2550.h: 7854: unsigned GIE :1;\n[; ;pic18f2550.h: 7855: };\n[; ;pic18f2550.h: 7856: struct {\n[; ;pic18f2550.h: 7857: unsigned :6;\n[; ;pic18f2550.h: 7858: unsigned GIEL :1;\n[; ;pic18f2550.h: 7859: unsigned GIEH :1;\n[; ;pic18f2550.h: 7860: };\n[; ;pic18f2550.h: 7861: } INTCONbits_t;\n[; ;pic18f2550.h: 7862: extern volatile INTCONbits_t INTCONbits @ 0xFF2;\n[; ;pic18f2550.h: 7946: extern volatile unsigned short PROD @ 0xFF3;\n\"7948\n[; ;pic18f2550.h: 7948: asm(\"PROD equ 0FF3h\");\n[; <\" PROD equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7952: extern volatile unsigned char PRODL @ 0xFF3;\n\"7954\n[; ;pic18f2550.h: 7954: asm(\"PRODL equ 0FF3h\");\n[; <\" PRODL equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7958: extern volatile unsigned char PRODH @ 0xFF4;\n\"7960\n[; ;pic18f2550.h: 7960: asm(\"PRODH equ 0FF4h\");\n[; <\" PRODH equ 0FF4h ;# \">\n[; ;pic18f2550.h: 7964: extern volatile unsigned char TABLAT @ 0xFF5;\n\"7966\n[; ;pic18f2550.h: 7966: asm(\"TABLAT equ 0FF5h\");\n[; <\" TABLAT equ 0FF5h ;# \">\n[; ;pic18f2550.h: 7971: extern volatile unsigned short long TBLPTR @ 0xFF6;\n\"7974\n[; ;pic18f2550.h: 7974: asm(\"TBLPTR equ 0FF6h\");\n[; <\" TBLPTR equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7978: extern volatile unsigned char TBLPTRL @ 0xFF6;\n\"7980\n[; ;pic18f2550.h: 7980: asm(\"TBLPTRL equ 0FF6h\");\n[; <\" TBLPTRL equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7984: extern volatile unsigned char TBLPTRH @ 0xFF7;\n\"7986\n[; ;pic18f2550.h: 7986: asm(\"TBLPTRH equ 0FF7h\");\n[; <\" TBLPTRH equ 0FF7h ;# \">\n[; ;pic18f2550.h: 7990: extern volatile unsigned char TBLPTRU @ 0xFF8;\n\"7992\n[; ;pic18f2550.h: 7992: asm(\"TBLPTRU equ 0FF8h\");\n[; <\" TBLPTRU equ 0FF8h ;# \">\n[; ;pic18f2550.h: 7997: extern volatile unsigned short long PCLAT @ 0xFF9;\n\"8000\n[; ;pic18f2550.h: 8000: asm(\"PCLAT equ 0FF9h\");\n[; <\" PCLAT equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8004: extern volatile unsigned short long PC @ 0xFF9;\n\"8007\n[; ;pic18f2550.h: 8007: asm(\"PC equ 0FF9h\");\n[; <\" PC equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8011: extern volatile unsigned char PCL @ 0xFF9;\n\"8013\n[; ;pic18f2550.h: 8013: asm(\"PCL equ 0FF9h\");\n[; <\" PCL equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8017: extern volatile unsigned char PCLATH @ 0xFFA;\n\"8019\n[; ;pic18f2550.h: 8019: asm(\"PCLATH equ 0FFAh\");\n[; <\" PCLATH equ 0FFAh ;# \">\n[; ;pic18f2550.h: 8023: extern volatile unsigned char PCLATU @ 0xFFB;\n\"8025\n[; ;pic18f2550.h: 8025: asm(\"PCLATU equ 0FFBh\");\n[; <\" PCLATU equ 0FFBh ;# \">\n[; ;pic18f2550.h: 8029: extern volatile unsigned char STKPTR @ 0xFFC;\n\"8031\n[; ;pic18f2550.h: 8031: asm(\"STKPTR equ 0FFCh\");\n[; <\" STKPTR equ 0FFCh ;# \">\n[; ;pic18f2550.h: 8034: typedef union {\n[; ;pic18f2550.h: 8035: struct {\n[; ;pic18f2550.h: 8036: unsigned STKPTR :5;\n[; ;pic18f2550.h: 8037: unsigned :1;\n[; ;pic18f2550.h: 8038: unsigned STKUNF :1;\n[; ;pic18f2550.h: 8039: unsigned STKFUL :1;\n[; ;pic18f2550.h: 8040: };\n[; ;pic18f2550.h: 8041: struct {\n[; ;pic18f2550.h: 8042: unsigned STKPTR0 :1;\n[; ;pic18f2550.h: 8043: unsigned STKPTR1 :1;\n[; ;pic18f2550.h: 8044: unsigned STKPTR2 :1;\n[; ;pic18f2550.h: 8045: unsigned STKPTR3 :1;\n[; ;pic18f2550.h: 8046: unsigned STKPTR4 :1;\n[; ;pic18f2550.h: 8047: };\n[; ;pic18f2550.h: 8048: struct {\n[; ;pic18f2550.h: 8049: unsigned :7;\n[; ;pic18f2550.h: 8050: unsigned STKOVF :1;\n[; ;pic18f2550.h: 8051: };\n[; ;pic18f2550.h: 8052: } STKPTRbits_t;\n[; ;pic18f2550.h: 8053: extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n[; ;pic18f2550.h: 8103: extern volatile unsigned short long TOS @ 0xFFD;\n\"8106\n[; ;pic18f2550.h: 8106: asm(\"TOS equ 0FFDh\");\n[; <\" TOS equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8110: extern volatile unsigned char TOSL @ 0xFFD;\n\"8112\n[; ;pic18f2550.h: 8112: asm(\"TOSL equ 0FFDh\");\n[; <\" TOSL equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8116: extern volatile unsigned char TOSH @ 0xFFE;\n\"8118\n[; ;pic18f2550.h: 8118: asm(\"TOSH equ 0FFEh\");\n[; <\" TOSH equ 0FFEh ;# \">\n[; ;pic18f2550.h: 8122: extern volatile unsigned char TOSU @ 0xFFF;\n\"8124\n[; ;pic18f2550.h: 8124: asm(\"TOSU equ 0FFFh\");\n[; <\" TOSU equ 0FFFh ;# \">\n[; ;pic18f2550.h: 8134: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n[; ;pic18f2550.h: 8136: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n[; ;pic18f2550.h: 8138: extern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n[; ;pic18f2550.h: 8140: extern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n[; ;pic18f2550.h: 8142: extern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n[; ;pic18f2550.h: 8144: extern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n[; ;pic18f2550.h: 8146: extern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n[; ;pic18f2550.h: 8148: extern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n[; ;pic18f2550.h: 8150: extern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n[; ;pic18f2550.h: 8152: extern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n[; ;pic18f2550.h: 8154: extern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n[; ;pic18f2550.h: 8156: extern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n[; ;pic18f2550.h: 8158: extern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n[; ;pic18f2550.h: 8160: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8162: extern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n[; ;pic18f2550.h: 8164: extern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n[; ;pic18f2550.h: 8166: extern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n[; ;pic18f2550.h: 8168: extern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n[; ;pic18f2550.h: 8170: extern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n[; ;pic18f2550.h: 8172: extern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n[; ;pic18f2550.h: 8174: extern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n[; ;pic18f2550.h: 8176: extern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8178: extern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n[; ;pic18f2550.h: 8180: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n[; ;pic18f2550.h: 8182: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n[; ;pic18f2550.h: 8184: extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n[; ;pic18f2550.h: 8186: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n[; ;pic18f2550.h: 8188: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 8190: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 8192: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 8194: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 8196: extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8198: extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n[; ;pic18f2550.h: 8200: extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n[; ;pic18f2550.h: 8202: extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n[; ;pic18f2550.h: 8204: extern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n[; ;pic18f2550.h: 8206: extern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8208: extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8210: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n[; ;pic18f2550.h: 8212: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8214: extern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8216: extern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n[; ;pic18f2550.h: 8218: extern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n[; ;pic18f2550.h: 8220: extern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n[; ;pic18f2550.h: 8222: extern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n[; ;pic18f2550.h: 8224: extern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n[; ;pic18f2550.h: 8226: extern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n[; ;pic18f2550.h: 8228: extern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n[; ;pic18f2550.h: 8230: extern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n[; ;pic18f2550.h: 8232: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n[; ;pic18f2550.h: 8234: extern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8236: extern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8238: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n[; ;pic18f2550.h: 8240: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n[; ;pic18f2550.h: 8242: extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n[; ;pic18f2550.h: 8244: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n[; ;pic18f2550.h: 8246: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n[; ;pic18f2550.h: 8248: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n[; ;pic18f2550.h: 8250: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n[; ;pic18f2550.h: 8252: extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8254: extern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8256: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n[; ;pic18f2550.h: 8258: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n[; ;pic18f2550.h: 8260: extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n[; ;pic18f2550.h: 8262: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n[; ;pic18f2550.h: 8264: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n[; ;pic18f2550.h: 8266: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n[; ;pic18f2550.h: 8268: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n[; ;pic18f2550.h: 8270: extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 8272: extern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8274: extern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8276: extern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8278: extern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8280: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8282: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n[; ;pic18f2550.h: 8284: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n[; ;pic18f2550.h: 8286: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n[; ;pic18f2550.h: 8288: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n[; ;pic18f2550.h: 8290: extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8292: extern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n[; ;pic18f2550.h: 8294: extern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 8296: extern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n[; ;pic18f2550.h: 8298: extern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n[; ;pic18f2550.h: 8300: extern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8302: extern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8304: extern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8306: extern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8308: extern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8310: extern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8312: extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n[; ;pic18f2550.h: 8314: extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n[; ;pic18f2550.h: 8316: extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n[; ;pic18f2550.h: 8318: extern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n[; ;pic18f2550.h: 8320: extern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n[; ;pic18f2550.h: 8322: extern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n[; ;pic18f2550.h: 8324: extern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n[; ;pic18f2550.h: 8326: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n[; ;pic18f2550.h: 8328: extern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8330: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8332: extern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8334: extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n[; ;pic18f2550.h: 8336: extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n[; ;pic18f2550.h: 8338: extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n[; ;pic18f2550.h: 8340: extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n[; ;pic18f2550.h: 8342: extern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8344: extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n[; ;pic18f2550.h: 8346: extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8348: extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8350: extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n[; ;pic18f2550.h: 8352: extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8354: extern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8356: extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8358: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n[; ;pic18f2550.h: 8360: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n[; ;pic18f2550.h: 8362: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n[; ;pic18f2550.h: 8364: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n[; ;pic18f2550.h: 8366: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n[; ;pic18f2550.h: 8368: extern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n[; ;pic18f2550.h: 8370: extern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n[; ;pic18f2550.h: 8372: extern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n[; ;pic18f2550.h: 8374: extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8376: extern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 8378: extern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8380: extern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8382: extern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8384: extern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n[; ;pic18f2550.h: 8386: extern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n[; ;pic18f2550.h: 8388: extern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n[; ;pic18f2550.h: 8390: extern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n[; ;pic18f2550.h: 8392: extern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8394: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n[; ;pic18f2550.h: 8396: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n[; ;pic18f2550.h: 8398: extern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n[; ;pic18f2550.h: 8400: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n[; ;pic18f2550.h: 8402: extern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n[; ;pic18f2550.h: 8404: extern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n[; ;pic18f2550.h: 8406: extern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n[; ;pic18f2550.h: 8408: extern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n[; ;pic18f2550.h: 8410: extern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8412: extern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8414: extern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8416: extern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8418: extern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8420: extern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8422: extern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8424: extern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8426: extern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8428: extern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8430: extern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8432: extern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8434: extern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8436: extern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8438: extern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8440: extern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8442: extern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8444: extern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8446: extern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8448: extern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8450: extern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8452: extern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8454: extern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8456: extern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8458: extern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8460: extern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8462: extern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8464: extern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8466: extern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8468: extern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8470: extern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8472: extern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8474: extern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8476: extern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8478: extern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8480: extern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8482: extern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8484: extern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8486: extern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8488: extern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8490: extern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8492: extern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8494: extern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n[; ;pic18f2550.h: 8496: extern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n[; ;pic18f2550.h: 8498: extern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n[; ;pic18f2550.h: 8500: extern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n[; ;pic18f2550.h: 8502: extern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n[; ;pic18f2550.h: 8504: extern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n[; ;pic18f2550.h: 8506: extern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8508: extern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8510: extern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8512: extern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8514: extern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8516: extern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8518: extern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n[; ;pic18f2550.h: 8520: extern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n[; ;pic18f2550.h: 8522: extern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8524: extern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8526: extern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n[; ;pic18f2550.h: 8528: extern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n[; ;pic18f2550.h: 8530: extern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n[; ;pic18f2550.h: 8532: extern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n[; ;pic18f2550.h: 8534: extern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n[; ;pic18f2550.h: 8536: extern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n[; ;pic18f2550.h: 8538: extern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8540: extern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8542: extern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8544: extern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8546: extern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8548: extern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8550: extern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n[; ;pic18f2550.h: 8552: extern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n[; ;pic18f2550.h: 8554: extern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8556: extern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8558: extern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n[; ;pic18f2550.h: 8560: extern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n[; ;pic18f2550.h: 8562: extern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n[; ;pic18f2550.h: 8564: extern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n[; ;pic18f2550.h: 8566: extern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n[; ;pic18f2550.h: 8568: extern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n[; ;pic18f2550.h: 8570: extern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8572: extern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8574: extern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8576: extern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8578: extern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8580: extern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8582: extern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n[; ;pic18f2550.h: 8584: extern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n[; ;pic18f2550.h: 8586: extern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8588: extern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8590: extern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n[; ;pic18f2550.h: 8592: extern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n[; ;pic18f2550.h: 8594: extern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n[; ;pic18f2550.h: 8596: extern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n[; ;pic18f2550.h: 8598: extern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n[; ;pic18f2550.h: 8600: extern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n[; ;pic18f2550.h: 8602: extern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8604: extern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8606: extern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8608: extern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8610: extern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8612: extern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8614: extern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n[; ;pic18f2550.h: 8616: extern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n[; ;pic18f2550.h: 8618: extern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8620: extern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8622: extern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n[; ;pic18f2550.h: 8624: extern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n[; ;pic18f2550.h: 8626: extern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n[; ;pic18f2550.h: 8628: extern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n[; ;pic18f2550.h: 8630: extern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n[; ;pic18f2550.h: 8632: extern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n[; ;pic18f2550.h: 8634: extern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8636: extern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8638: extern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8640: extern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8642: extern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8644: extern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8646: extern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n[; ;pic18f2550.h: 8648: extern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n[; ;pic18f2550.h: 8650: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n[; ;pic18f2550.h: 8652: extern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8654: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n[; ;pic18f2550.h: 8656: extern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n[; ;pic18f2550.h: 8658: extern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n[; ;pic18f2550.h: 8660: extern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n[; ;pic18f2550.h: 8662: extern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n[; ;pic18f2550.h: 8664: extern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n[; ;pic18f2550.h: 8666: extern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n[; ;pic18f2550.h: 8668: extern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n[; ;pic18f2550.h: 8670: extern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n[; ;pic18f2550.h: 8672: extern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n[; ;pic18f2550.h: 8674: extern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n[; ;pic18f2550.h: 8676: extern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n[; ;pic18f2550.h: 8678: extern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n[; ;pic18f2550.h: 8680: extern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n[; ;pic18f2550.h: 8682: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8684: extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8686: extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8688: extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8690: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8692: extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8694: extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8696: extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8698: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8700: extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8702: extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8704: extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8706: extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8708: extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8710: extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8712: extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8714: extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8716: extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8718: extern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8720: extern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8722: extern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 8724: extern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 8726: extern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n[; ;pic18f2550.h: 8728: extern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n[; ;pic18f2550.h: 8730: extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n[; ;pic18f2550.h: 8732: extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 8734: extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8736: extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8738: extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8740: extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8742: extern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 8744: extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8746: extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8748: extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8750: extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8752: extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8754: extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8756: extern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 8758: extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8760: extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8762: extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8764: extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8766: extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8768: extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8770: extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n[; ;pic18f2550.h: 8772: extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n[; ;pic18f2550.h: 8774: extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n[; ;pic18f2550.h: 8776: extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n[; ;pic18f2550.h: 8778: extern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8780: extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8782: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n[; ;pic18f2550.h: 8784: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n[; ;pic18f2550.h: 8786: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n[; ;pic18f2550.h: 8788: extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8790: extern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8792: extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8794: extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8796: extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8798: extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8800: extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8802: extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8804: extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8806: extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8808: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8810: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8812: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8814: extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8816: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8818: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8820: extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8822: extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8824: extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8826: extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8828: extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8830: extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8832: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8834: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8836: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8838: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8840: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8842: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8844: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8846: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8848: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8850: extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8852: extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8854: extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8856: extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8858: extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8860: extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8862: extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8864: extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8866: extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8868: extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8870: extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8872: extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n[; ;pic18f2550.h: 8874: extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n[; ;pic18f2550.h: 8876: extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n[; ;pic18f2550.h: 8878: extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8880: extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8882: extern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8884: extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8886: extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8888: extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8890: extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8892: extern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8894: extern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8896: extern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8898: extern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8900: extern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8902: extern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8904: extern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8906: extern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8908: extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n[; ;pic18f2550.h: 8910: extern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8912: extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8914: extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8916: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8918: extern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8920: extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8922: extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 8924: extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 8926: extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 8928: extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 8930: extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 8932: extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 8934: extern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8936: extern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8938: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n[; ;pic18f2550.h: 8940: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 8942: extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n[; ;pic18f2550.h: 8944: extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n[; ;pic18f2550.h: 8946: extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n[; ;pic18f2550.h: 8948: extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n[; ;pic18f2550.h: 8950: extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8952: extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8954: extern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8956: extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8958: extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8960: extern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8962: extern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8964: extern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8966: extern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8968: extern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8970: extern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 8972: extern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8974: extern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n[; ;pic18f2550.h: 8976: extern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n[; ;pic18f2550.h: 8978: extern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n[; ;pic18f2550.h: 8980: extern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8982: extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8984: extern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 8986: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8988: extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8990: extern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n[; ;pic18f2550.h: 8992: extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 8994: extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 8996: extern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 8998: extern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n[; ;pic18f2550.h: 9000: extern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n[; ;pic18f2550.h: 9002: extern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n[; ;pic18f2550.h: 9004: extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9006: extern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9008: extern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9010: extern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n[; ;pic18f2550.h: 9012: extern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n[; ;pic18f2550.h: 9014: extern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n[; ;pic18f2550.h: 9016: extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n[; ;pic18f2550.h: 9018: extern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n[; ;pic18f2550.h: 9020: extern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n[; ;pic18f2550.h: 9022: extern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9024: extern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 9026: extern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9028: extern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9030: extern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9032: extern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 9034: extern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 9036: extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9038: extern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 9040: extern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 9042: extern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 9044: extern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 9046: extern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n[; ;pic18f2550.h: 9048: extern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 9050: extern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 9052: extern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 9054: extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n[; ;pic18f2550.h: 9056: extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n[; ;pic18f2550.h: 9058: extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n[; ;pic18f2550.h: 9060: extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9062: extern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9064: extern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9066: extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9068: extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9070: extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9072: extern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 9074: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n[; ;pic18f2550.h: 9076: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n[; ;pic18f2550.h: 9078: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n[; ;pic18f2550.h: 9080: extern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9082: extern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9084: extern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n[; ;pic18f2550.h: 9086: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9088: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9090: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9092: extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9094: extern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9096: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n[; ;pic18f2550.h: 9098: extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9100: extern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9102: extern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9104: extern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9106: extern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 9108: extern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 9110: extern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 9112: extern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 9114: extern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 9116: extern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 9118: extern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9120: extern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n[; ;pic18f2550.h: 9122: extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9124: extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9126: extern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n[; ;pic18f2550.h: 9128: extern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9130: extern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9132: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n[; ;pic18f2550.h: 9134: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n[; ;pic18f2550.h: 9136: extern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9138: extern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9140: extern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9142: extern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9144: extern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9146: extern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n[; ;pic18f2550.h: 9148: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9150: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n[; ;pic18f2550.h: 9152: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n[; ;pic18f2550.h: 9154: extern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n[; ;pic18f2550.h: 9156: extern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n[; ;pic18f2550.h: 9158: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9160: extern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9162: extern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n[; ;pic18f2550.h: 9164: extern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n[; ;pic18f2550.h: 9166: extern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n[; ;pic18f2550.h: 9168: extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9170: extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9172: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n[; ;pic18f2550.h: 9174: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9176: extern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9178: extern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n[; ;pic18f2550.h: 9180: extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n[; ;pic18f2550.h: 9182: extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n[; ;pic18f2550.h: 9184: extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n[; ;pic18f2550.h: 9186: extern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n[; ;pic18f2550.h: 9188: extern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n[; ;pic18f2550.h: 9190: extern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n[; ;pic18f2550.h: 9192: extern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n[; ;pic18f2550.h: 9194: extern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n[; ;pic18f2550.h: 9196: extern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n[; ;pic18f2550.h: 9198: extern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n[; ;pic18f2550.h: 9200: extern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 9202: extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9204: extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9206: extern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n[; ;pic18f2550.h: 9208: extern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n[; ;pic18f2550.h: 9210: extern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n[; ;pic18f2550.h: 9212: extern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n[; ;pic18f2550.h: 9214: extern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n[; ;pic18f2550.h: 9216: extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n[; ;pic18f2550.h: 9218: extern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 9220: extern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n[; ;pic18f2550.h: 9222: extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9224: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9226: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9228: extern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9230: extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n[; ;pic18f2550.h: 9232: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9234: extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n[; ;pic18f2550.h: 9236: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9238: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9240: extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9242: extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n[; ;pic18f2550.h: 9244: extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n[; ;pic18f2550.h: 9246: extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n[; ;pic18f2550.h: 9248: extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n[; ;pic18f2550.h: 9250: extern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9252: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n[; ;pic18f2550.h: 9254: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n[; ;pic18f2550.h: 9256: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9258: extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9260: extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9262: extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n[; ;pic18f2550.h: 9264: extern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n[; ;pic18f2550.h: 9266: extern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9268: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n[; ;pic18f2550.h: 9270: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n[; ;pic18f2550.h: 9272: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9274: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9276: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9278: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9280: extern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9282: extern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n[; ;pic18f2550.h: 9284: extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n[; ;pic18f2550.h: 9286: extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n[; ;pic18f2550.h: 9288: extern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9290: extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9292: extern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9294: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9296: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9298: extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9300: extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n[; ;pic18f2550.h: 9302: extern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n[; ;pic18f2550.h: 9304: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n[; ;pic18f2550.h: 9306: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n[; ;pic18f2550.h: 9308: extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n[; ;pic18f2550.h: 9310: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n[; ;pic18f2550.h: 9312: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n[; ;pic18f2550.h: 9314: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n[; ;pic18f2550.h: 9316: extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n[; ;pic18f2550.h: 9318: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n[; ;pic18f2550.h: 9320: extern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n[; ;pic18f2550.h: 9322: extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n[; ;pic18f2550.h: 9324: extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n[; ;pic18f2550.h: 9326: extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n[; ;pic18f2550.h: 9328: extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n[; ;pic18f2550.h: 9330: extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9332: extern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9334: extern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9336: extern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9338: extern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9340: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n[; ;pic18f2550.h: 9342: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n[; ;pic18f2550.h: 9344: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n[; ;pic18f2550.h: 9346: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n[; ;pic18f2550.h: 9348: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n[; ;pic18f2550.h: 9350: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n[; ;pic18f2550.h: 9352: extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n[; ;pic18f2550.h: 9354: extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n[; ;pic18f2550.h: 9356: extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n[; ;pic18f2550.h: 9358: extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n[; ;pic18f2550.h: 9360: extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n[; ;pic18f2550.h: 9362: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n[; ;pic18f2550.h: 9364: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n[; ;pic18f2550.h: 9366: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n[; ;pic18f2550.h: 9368: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n[; ;pic18f2550.h: 9370: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n[; ;pic18f2550.h: 9372: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n[; ;pic18f2550.h: 9374: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n[; ;pic18f2550.h: 9376: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n[; ;pic18f2550.h: 9378: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n[; ;pic18f2550.h: 9380: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n[; ;pic18f2550.h: 9382: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9384: extern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9386: extern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n[; ;pic18f2550.h: 9388: extern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n[; ;pic18f2550.h: 9390: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n[; ;pic18f2550.h: 9392: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n[; ;pic18f2550.h: 9394: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n[; ;pic18f2550.h: 9396: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n[; ;pic18f2550.h: 9398: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n[; ;pic18f2550.h: 9400: extern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9402: extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9404: extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9406: extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9408: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9410: extern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9412: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9414: extern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9416: extern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9418: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9420: extern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9422: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9424: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9426: extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9428: extern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n[; ;pic18f2550.h: 9430: extern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n[; ;pic18f2550.h: 9432: extern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n[; ;pic18f2550.h: 9434: extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9436: extern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n[; ;pic18f2550.h: 9438: extern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9440: extern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9442: extern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n[; ;pic18f2550.h: 9444: extern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n[; ;pic18f2550.h: 9446: extern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n[; ;pic18f2550.h: 9448: extern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n[; ;pic18f2550.h: 9450: extern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n[; ;pic18f2550.h: 9452: extern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n[; ;pic18f2550.h: 9454: extern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n[; ;pic18f2550.h: 9456: extern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n[; ;pic18f2550.h: 9458: extern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n[; ;pic18f2550.h: 9460: extern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9462: extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9464: extern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9466: extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9468: extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n[; ;pic18f2550.h: 9470: extern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9472: extern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9474: extern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9476: extern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n[; ;pic18f2550.h: 9478: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n[; ;pic18f2550.h: 9480: extern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9482: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n[; ;pic18f2550.h: 9484: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n[; ;pic18f2550.h: 9486: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9488: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n[; ;pic18f2550.h: 9490: extern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9492: extern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9494: extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 9496: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 9498: extern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 9500: extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 9502: extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9504: extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9506: extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9508: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9510: extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9512: extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9514: extern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9516: extern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;adc.h: 2008: union ADCResult\n[; ;adc.h: 2009: {\n[; ;adc.h: 2010: int lr;\n[; ;adc.h: 2011: char br[2];\n[; ;adc.h: 2012: };\n[; ;adc.h: 2014: char BusyADC (void);\n[; ;adc.h: 2016: void ConvertADC (void);\n[; ;adc.h: 2018: void CloseADC(void);\n[; ;adc.h: 2026: int ReadADC(void);\n[; ;adc.h: 2040: void OpenADC ( unsigned char ,\n[; ;adc.h: 2041: unsigned char ,\n[; ;adc.h: 2042: unsigned char );\n[; ;adc.h: 2084: void SetChanADC(unsigned char );\n[; ;adc.h: 2100: void SelChanConvADC( unsigned char );\n[; ;ancomp.h: 38: void Close_ancomp( void );\n[; ;ancomp.h: 39: void Open_ancomp(unsigned char config);\n[; ;spi.h: 584: void OpenSPI( unsigned char sync_mode,\n[; ;spi.h: 585: unsigned char bus_mode,\n[; ;spi.h: 586: unsigned char smp_phase );\n[; ;spi.h: 588: signed char WriteSPI( unsigned char data_out );\n[; ;spi.h: 590: void getsSPI( unsigned char *rdptr, unsigned char length );\n[; ;spi.h: 592: void putsSPI( unsigned char *wrptr );\n[; ;spi.h: 594: unsigned char ReadSPI( void );\n[; ;can2510.h: 414: void CAN2510Initialize(  unsigned int configuration,\n[; ;can2510.h: 415: unsigned char brp,\n[; ;can2510.h: 416: unsigned char interruptFlags,\n[; ;can2510.h: 417: unsigned char SPI_syncMode,\n[; ;can2510.h: 418: unsigned char SPI_busMode,\n[; ;can2510.h: 419: unsigned char SPI_smpPhase );\n[; ;can2510.h: 421: signed char CAN2510Init(  unsigned long BufferConfig,\n[; ;can2510.h: 422: unsigned long BitTimeConfig,\n[; ;can2510.h: 423: unsigned char interruptEnables,\n[; ;can2510.h: 424: unsigned char SPI_syncMode,\n[; ;can2510.h: 425: unsigned char SPI_busMode,\n[; ;can2510.h: 426: unsigned char SPI_smpPhase );\n[; ;can2510.h: 428: void CAN2510Enable( void );\n[; ;can2510.h: 430: void CAN2510Disable( void );\n[; ;can2510.h: 432: void CAN2510Reset( void );\n[; ;can2510.h: 434: void CAN2510SetMode(  unsigned char mode );\n[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );\n[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );\n[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );\n[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );\n[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );\n[; ;can2510.h: 446: unsigned char CAN2510ByteRead(  unsigned char addr );\n[; ;can2510.h: 448: void CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n[; ;can2510.h: 450: void CAN2510SequentialRead(  unsigned char *DataArray,\n[; ;can2510.h: 451: unsigned char CAN2510addr,\n[; ;can2510.h: 452: unsigned char numbytes );\n[; ;can2510.h: 454: void CAN2510SequentialWrite(  unsigned char *DataArray,\n[; ;can2510.h: 455: unsigned char CAN2510addr,\n[; ;can2510.h: 456: unsigned char numbytes );\n[; ;can2510.h: 458: void CAN2510BitModify(  unsigned char address,\n[; ;can2510.h: 459: unsigned char mask,\n[; ;can2510.h: 460: unsigned char data );\n[; ;can2510.h: 462: void CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n[; ;can2510.h: 466: void CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n[; ;can2510.h: 470: signed char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n[; ;can2510.h: 471: unsigned int mask,\n[; ;can2510.h: 472: unsigned int *filters );\n[; ;can2510.h: 474: signed char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n[; ;can2510.h: 475: unsigned long mask,\n[; ;can2510.h: 476: unsigned long *filters );\n[; ;can2510.h: 478: signed char CAN2510WriteStd(  unsigned int msgId,\n[; ;can2510.h: 479: unsigned char msgPriority,\n[; ;can2510.h: 480: unsigned char numBytes,\n[; ;can2510.h: 481: unsigned char *data );\n[; ;can2510.h: 483: signed char CAN2510WriteXtd(  unsigned long msgId,\n[; ;can2510.h: 484: unsigned char msgPriority,\n[; ;can2510.h: 485: unsigned char numBytes,\n[; ;can2510.h: 486: unsigned char *data );\n[; ;can2510.h: 488: void CAN2510LoadBufferStd(  unsigned char bufferNum,\n[; ;can2510.h: 489: unsigned int msgId,\n[; ;can2510.h: 490: unsigned char numBytes,\n[; ;can2510.h: 491: unsigned char *data );\n[; ;can2510.h: 493: void CAN2510LoadBufferXtd(  unsigned char bufferNum,\n[; ;can2510.h: 494: unsigned long msgId,\n[; ;can2510.h: 495: unsigned char numBytes,\n[; ;can2510.h: 496: unsigned char *data );\n[; ;can2510.h: 498: void CAN2510LoadRTRStd(  unsigned char bufferNum,\n[; ;can2510.h: 499: unsigned int msgId,\n[; ;can2510.h: 500: unsigned char numBytes );\n[; ;can2510.h: 502: void CAN2510LoadRTRXtd(  unsigned char bufferNum,\n[; ;can2510.h: 503: unsigned long msgId,\n[; ;can2510.h: 504: unsigned char numBytes );\n[; ;can2510.h: 506: void CAN2510SetBufferPriority(  unsigned char bufferNum,\n[; ;can2510.h: 507: unsigned char bufferPriority );\n[; ;can2510.h: 509: void CAN2510SendBuffer(  unsigned char bufferNumber );\n[; ;can2510.h: 511: signed char CAN2510WriteBuffer(  unsigned char bufferNum );\n[; ;can2510.h: 513: unsigned char CAN2510DataReady(  unsigned char bufferNum );\n[; ;can2510.h: 515: unsigned char CAN2510DataRead(  unsigned char bufferNum,\n[; ;can2510.h: 516: unsigned long *msgId,\n[; ;can2510.h: 517: unsigned char *numBytes,\n[; ;can2510.h: 518: unsigned char *data );\n[; ;capture.h: 64: union capstatus\n[; ;capture.h: 65: {\n[; ;capture.h: 73: struct\n[; ;capture.h: 74: {\n[; ;capture.h: 77: unsigned Cap1OVF:1;\n[; ;capture.h: 82: unsigned Cap2OVF:1;\n[; ;capture.h: 115: };\n[; ;capture.h: 117: unsigned :8;\n[; ;capture.h: 119: };\n[; ;capture.h: 121: extern union capstatus CapStatus;\n[; ;capture.h: 123: union CapResult\n[; ;capture.h: 124: {\n[; ;capture.h: 125: unsigned int lc;\n[; ;capture.h: 126: char bc[2];\n[; ;capture.h: 127: };\n[; ;capture.h: 474: void OpenCapture1 ( unsigned char config);\n[; ;capture.h: 475: unsigned int ReadCapture1 (void);\n[; ;capture.h: 476: void CloseCapture1 (void);\n[; ;capture.h: 484: void OpenCapture2 ( unsigned char config);\n[; ;capture.h: 485: unsigned int ReadCapture2 (void);\n[; ;capture.h: 486: void CloseCapture2 (void);\n[; ;compare.h: 385: void OpenCompare1(unsigned char config,unsigned int period);\n[; ;compare.h: 386: void CloseCompare1(void);\n[; ;compare.h: 392: void OpenCompare2(unsigned char config, unsigned int period);\n[; ;compare.h: 393: void CloseCompare2(void);\n[; ;EEP.h: 36: void Busy_eep ( void );\n[; ;EEP.h: 37: unsigned char Read_b_eep( unsigned int badd );\n[; ;EEP.h: 38: void Write_b_eep( unsigned int badd, unsigned char bdata );\n[; ;stddef.h: 2: typedef int ptrdiff_t;\n[; ;stddef.h: 3: typedef unsigned size_t;\n[; ;stddef.h: 4: typedef unsigned short wchar_t;\n[; ;stddef.h: 13: extern int errno;\n[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;\n[; ;GenericTypeDefs.h: 75: typedef signed int INT;\n[; ;GenericTypeDefs.h: 76: typedef signed char INT8;\n[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;\n[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;\n[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;\n[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;\n[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;\n[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;\n[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;\n[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;\n[; ;GenericTypeDefs.h: 99: typedef union\n[; ;GenericTypeDefs.h: 100: {\n[; ;GenericTypeDefs.h: 101: UINT8 Val;\n[; ;GenericTypeDefs.h: 102: struct\n[; ;GenericTypeDefs.h: 103: {\n[; ;GenericTypeDefs.h: 104: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 105: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 106: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 107: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 108: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 109: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 110: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 111: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 112: } bits;\n[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;\n[; ;GenericTypeDefs.h: 115: typedef union\n[; ;GenericTypeDefs.h: 116: {\n[; ;GenericTypeDefs.h: 117: UINT16 Val;\n[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;\n[; ;GenericTypeDefs.h: 119: struct \n[; ;GenericTypeDefs.h: 120: {\n[; ;GenericTypeDefs.h: 121: UINT8 LB;\n[; ;GenericTypeDefs.h: 122: UINT8 HB;\n[; ;GenericTypeDefs.h: 123: } byte;\n[; ;GenericTypeDefs.h: 124: struct \n[; ;GenericTypeDefs.h: 125: {\n[; ;GenericTypeDefs.h: 126: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 127: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 128: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 129: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 130: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 131: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 132: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 133: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 134: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 135: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 136: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 137: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 138: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 139: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 140: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 141: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 142: } bits;\n[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;\n[; ;GenericTypeDefs.h: 187: typedef union\n[; ;GenericTypeDefs.h: 188: {\n[; ;GenericTypeDefs.h: 189: UINT32 Val;\n[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;\n[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;\n[; ;GenericTypeDefs.h: 192: struct \n[; ;GenericTypeDefs.h: 193: {\n[; ;GenericTypeDefs.h: 194: UINT16 LW;\n[; ;GenericTypeDefs.h: 195: UINT16 HW;\n[; ;GenericTypeDefs.h: 196: } word;\n[; ;GenericTypeDefs.h: 197: struct \n[; ;GenericTypeDefs.h: 198: {\n[; ;GenericTypeDefs.h: 199: UINT8 LB;\n[; ;GenericTypeDefs.h: 200: UINT8 HB;\n[; ;GenericTypeDefs.h: 201: UINT8 UB;\n[; ;GenericTypeDefs.h: 202: UINT8 MB;\n[; ;GenericTypeDefs.h: 203: } byte;\n[; ;GenericTypeDefs.h: 204: struct \n[; ;GenericTypeDefs.h: 205: {\n[; ;GenericTypeDefs.h: 206: UINT16_VAL low;\n[; ;GenericTypeDefs.h: 207: UINT16_VAL high;\n[; ;GenericTypeDefs.h: 208: }wordUnion;\n[; ;GenericTypeDefs.h: 209: struct \n[; ;GenericTypeDefs.h: 210: {\n[; ;GenericTypeDefs.h: 211: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 212: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 213: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 214: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 215: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 216: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 217: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 218: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 219: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 220: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 221: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 222: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 223: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 224: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 225: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 226: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 227: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 228: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 229: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 230: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 231: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 232: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 233: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 234: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 235: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 236: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 237: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 238: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 239: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 240: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 241: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 242: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 243: } bits;\n[; ;GenericTypeDefs.h: 244: } UINT32_VAL;\n[; ;GenericTypeDefs.h: 248: typedef union\n[; ;GenericTypeDefs.h: 249: {\n[; ;GenericTypeDefs.h: 250: UINT64 Val;\n[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;\n[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;\n[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;\n[; ;GenericTypeDefs.h: 254: struct \n[; ;GenericTypeDefs.h: 255: {\n[; ;GenericTypeDefs.h: 256: UINT32 LD;\n[; ;GenericTypeDefs.h: 257: UINT32 HD;\n[; ;GenericTypeDefs.h: 258: } dword;\n[; ;GenericTypeDefs.h: 259: struct \n[; ;GenericTypeDefs.h: 260: {\n[; ;GenericTypeDefs.h: 261: UINT16 LW;\n[; ;GenericTypeDefs.h: 262: UINT16 HW;\n[; ;GenericTypeDefs.h: 263: UINT16 UW;\n[; ;GenericTypeDefs.h: 264: UINT16 MW;\n[; ;GenericTypeDefs.h: 265: } word;\n[; ;GenericTypeDefs.h: 266: struct \n[; ;GenericTypeDefs.h: 267: {\n[; ;GenericTypeDefs.h: 268: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 269: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 270: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 271: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 272: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 273: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 274: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 275: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 276: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 277: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 278: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 279: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 280: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 281: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 282: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 283: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 284: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 285: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 286: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 287: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 288: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 289: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 290: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 291: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 292: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 293: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 294: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 295: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 296: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 297: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 298: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 299: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 300: UINT8 b32:1;\n[; ;GenericTypeDefs.h: 301: UINT8 b33:1;\n[; ;GenericTypeDefs.h: 302: UINT8 b34:1;\n[; ;GenericTypeDefs.h: 303: UINT8 b35:1;\n[; ;GenericTypeDefs.h: 304: UINT8 b36:1;\n[; ;GenericTypeDefs.h: 305: UINT8 b37:1;\n[; ;GenericTypeDefs.h: 306: UINT8 b38:1;\n[; ;GenericTypeDefs.h: 307: UINT8 b39:1;\n[; ;GenericTypeDefs.h: 308: UINT8 b40:1;\n[; ;GenericTypeDefs.h: 309: UINT8 b41:1;\n[; ;GenericTypeDefs.h: 310: UINT8 b42:1;\n[; ;GenericTypeDefs.h: 311: UINT8 b43:1;\n[; ;GenericTypeDefs.h: 312: UINT8 b44:1;\n[; ;GenericTypeDefs.h: 313: UINT8 b45:1;\n[; ;GenericTypeDefs.h: 314: UINT8 b46:1;\n[; ;GenericTypeDefs.h: 315: UINT8 b47:1;\n[; ;GenericTypeDefs.h: 316: UINT8 b48:1;\n[; ;GenericTypeDefs.h: 317: UINT8 b49:1;\n[; ;GenericTypeDefs.h: 318: UINT8 b50:1;\n[; ;GenericTypeDefs.h: 319: UINT8 b51:1;\n[; ;GenericTypeDefs.h: 320: UINT8 b52:1;\n[; ;GenericTypeDefs.h: 321: UINT8 b53:1;\n[; ;GenericTypeDefs.h: 322: UINT8 b54:1;\n[; ;GenericTypeDefs.h: 323: UINT8 b55:1;\n[; ;GenericTypeDefs.h: 324: UINT8 b56:1;\n[; ;GenericTypeDefs.h: 325: UINT8 b57:1;\n[; ;GenericTypeDefs.h: 326: UINT8 b58:1;\n[; ;GenericTypeDefs.h: 327: UINT8 b59:1;\n[; ;GenericTypeDefs.h: 328: UINT8 b60:1;\n[; ;GenericTypeDefs.h: 329: UINT8 b61:1;\n[; ;GenericTypeDefs.h: 330: UINT8 b62:1;\n[; ;GenericTypeDefs.h: 331: UINT8 b63:1;\n[; ;GenericTypeDefs.h: 332: } bits;\n[; ;GenericTypeDefs.h: 333: } UINT64_VAL;\n[; ;GenericTypeDefs.h: 339: typedef void VOID;\n[; ;GenericTypeDefs.h: 341: typedef char CHAR8;\n[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;\n[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;\n[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;\n[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;\n[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;\n[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;\n[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;\n[; ;GenericTypeDefs.h: 352: typedef signed long LONG;\n[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;\n[; ;GenericTypeDefs.h: 356: typedef union\n[; ;GenericTypeDefs.h: 357: {\n[; ;GenericTypeDefs.h: 358: BYTE Val;\n[; ;GenericTypeDefs.h: 359: struct \n[; ;GenericTypeDefs.h: 360: {\n[; ;GenericTypeDefs.h: 361: BYTE b0:1;\n[; ;GenericTypeDefs.h: 362: BYTE b1:1;\n[; ;GenericTypeDefs.h: 363: BYTE b2:1;\n[; ;GenericTypeDefs.h: 364: BYTE b3:1;\n[; ;GenericTypeDefs.h: 365: BYTE b4:1;\n[; ;GenericTypeDefs.h: 366: BYTE b5:1;\n[; ;GenericTypeDefs.h: 367: BYTE b6:1;\n[; ;GenericTypeDefs.h: 368: BYTE b7:1;\n[; ;GenericTypeDefs.h: 369: } bits;\n[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;\n[; ;GenericTypeDefs.h: 372: typedef union\n[; ;GenericTypeDefs.h: 373: {\n[; ;GenericTypeDefs.h: 374: WORD Val;\n[; ;GenericTypeDefs.h: 375: BYTE v[2] ;\n[; ;GenericTypeDefs.h: 376: struct \n[; ;GenericTypeDefs.h: 377: {\n[; ;GenericTypeDefs.h: 378: BYTE LB;\n[; ;GenericTypeDefs.h: 379: BYTE HB;\n[; ;GenericTypeDefs.h: 380: } byte;\n[; ;GenericTypeDefs.h: 381: struct \n[; ;GenericTypeDefs.h: 382: {\n[; ;GenericTypeDefs.h: 383: BYTE b0:1;\n[; ;GenericTypeDefs.h: 384: BYTE b1:1;\n[; ;GenericTypeDefs.h: 385: BYTE b2:1;\n[; ;GenericTypeDefs.h: 386: BYTE b3:1;\n[; ;GenericTypeDefs.h: 387: BYTE b4:1;\n[; ;GenericTypeDefs.h: 388: BYTE b5:1;\n[; ;GenericTypeDefs.h: 389: BYTE b6:1;\n[; ;GenericTypeDefs.h: 390: BYTE b7:1;\n[; ;GenericTypeDefs.h: 391: BYTE b8:1;\n[; ;GenericTypeDefs.h: 392: BYTE b9:1;\n[; ;GenericTypeDefs.h: 393: BYTE b10:1;\n[; ;GenericTypeDefs.h: 394: BYTE b11:1;\n[; ;GenericTypeDefs.h: 395: BYTE b12:1;\n[; ;GenericTypeDefs.h: 396: BYTE b13:1;\n[; ;GenericTypeDefs.h: 397: BYTE b14:1;\n[; ;GenericTypeDefs.h: 398: BYTE b15:1;\n[; ;GenericTypeDefs.h: 399: } bits;\n[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;\n[; ;GenericTypeDefs.h: 402: typedef union\n[; ;GenericTypeDefs.h: 403: {\n[; ;GenericTypeDefs.h: 404: DWORD Val;\n[; ;GenericTypeDefs.h: 405: WORD w[2] ;\n[; ;GenericTypeDefs.h: 406: BYTE v[4] ;\n[; ;GenericTypeDefs.h: 407: struct \n[; ;GenericTypeDefs.h: 408: {\n[; ;GenericTypeDefs.h: 409: WORD LW;\n[; ;GenericTypeDefs.h: 410: WORD HW;\n[; ;GenericTypeDefs.h: 411: } word;\n[; ;GenericTypeDefs.h: 412: struct \n[; ;GenericTypeDefs.h: 413: {\n[; ;GenericTypeDefs.h: 414: BYTE LB;\n[; ;GenericTypeDefs.h: 415: BYTE HB;\n[; ;GenericTypeDefs.h: 416: BYTE UB;\n[; ;GenericTypeDefs.h: 417: BYTE MB;\n[; ;GenericTypeDefs.h: 418: } byte;\n[; ;GenericTypeDefs.h: 419: struct \n[; ;GenericTypeDefs.h: 420: {\n[; ;GenericTypeDefs.h: 421: WORD_VAL low;\n[; ;GenericTypeDefs.h: 422: WORD_VAL high;\n[; ;GenericTypeDefs.h: 423: }wordUnion;\n[; ;GenericTypeDefs.h: 424: struct \n[; ;GenericTypeDefs.h: 425: {\n[; ;GenericTypeDefs.h: 426: BYTE b0:1;\n[; ;GenericTypeDefs.h: 427: BYTE b1:1;\n[; ;GenericTypeDefs.h: 428: BYTE b2:1;\n[; ;GenericTypeDefs.h: 429: BYTE b3:1;\n[; ;GenericTypeDefs.h: 430: BYTE b4:1;\n[; ;GenericTypeDefs.h: 431: BYTE b5:1;\n[; ;GenericTypeDefs.h: 432: BYTE b6:1;\n[; ;GenericTypeDefs.h: 433: BYTE b7:1;\n[; ;GenericTypeDefs.h: 434: BYTE b8:1;\n[; ;GenericTypeDefs.h: 435: BYTE b9:1;\n[; ;GenericTypeDefs.h: 436: BYTE b10:1;\n[; ;GenericTypeDefs.h: 437: BYTE b11:1;\n[; ;GenericTypeDefs.h: 438: BYTE b12:1;\n[; ;GenericTypeDefs.h: 439: BYTE b13:1;\n[; ;GenericTypeDefs.h: 440: BYTE b14:1;\n[; ;GenericTypeDefs.h: 441: BYTE b15:1;\n[; ;GenericTypeDefs.h: 442: BYTE b16:1;\n[; ;GenericTypeDefs.h: 443: BYTE b17:1;\n[; ;GenericTypeDefs.h: 444: BYTE b18:1;\n[; ;GenericTypeDefs.h: 445: BYTE b19:1;\n[; ;GenericTypeDefs.h: 446: BYTE b20:1;\n[; ;GenericTypeDefs.h: 447: BYTE b21:1;\n[; ;GenericTypeDefs.h: 448: BYTE b22:1;\n[; ;GenericTypeDefs.h: 449: BYTE b23:1;\n[; ;GenericTypeDefs.h: 450: BYTE b24:1;\n[; ;GenericTypeDefs.h: 451: BYTE b25:1;\n[; ;GenericTypeDefs.h: 452: BYTE b26:1;\n[; ;GenericTypeDefs.h: 453: BYTE b27:1;\n[; ;GenericTypeDefs.h: 454: BYTE b28:1;\n[; ;GenericTypeDefs.h: 455: BYTE b29:1;\n[; ;GenericTypeDefs.h: 456: BYTE b30:1;\n[; ;GenericTypeDefs.h: 457: BYTE b31:1;\n[; ;GenericTypeDefs.h: 458: } bits;\n[; ;GenericTypeDefs.h: 459: } DWORD_VAL;\n[; ;GenericTypeDefs.h: 462: typedef union\n[; ;GenericTypeDefs.h: 463: {\n[; ;GenericTypeDefs.h: 464: QWORD Val;\n[; ;GenericTypeDefs.h: 465: DWORD d[2] ;\n[; ;GenericTypeDefs.h: 466: WORD w[4] ;\n[; ;GenericTypeDefs.h: 467: BYTE v[8] ;\n[; ;GenericTypeDefs.h: 468: struct \n[; ;GenericTypeDefs.h: 469: {\n[; ;GenericTypeDefs.h: 470: DWORD LD;\n[; ;GenericTypeDefs.h: 471: DWORD HD;\n[; ;GenericTypeDefs.h: 472: } dword;\n[; ;GenericTypeDefs.h: 473: struct \n[; ;GenericTypeDefs.h: 474: {\n[; ;GenericTypeDefs.h: 475: WORD LW;\n[; ;GenericTypeDefs.h: 476: WORD HW;\n[; ;GenericTypeDefs.h: 477: WORD UW;\n[; ;GenericTypeDefs.h: 478: WORD MW;\n[; ;GenericTypeDefs.h: 479: } word;\n[; ;GenericTypeDefs.h: 480: struct \n[; ;GenericTypeDefs.h: 481: {\n[; ;GenericTypeDefs.h: 482: BYTE b0:1;\n[; ;GenericTypeDefs.h: 483: BYTE b1:1;\n[; ;GenericTypeDefs.h: 484: BYTE b2:1;\n[; ;GenericTypeDefs.h: 485: BYTE b3:1;\n[; ;GenericTypeDefs.h: 486: BYTE b4:1;\n[; ;GenericTypeDefs.h: 487: BYTE b5:1;\n[; ;GenericTypeDefs.h: 488: BYTE b6:1;\n[; ;GenericTypeDefs.h: 489: BYTE b7:1;\n[; ;GenericTypeDefs.h: 490: BYTE b8:1;\n[; ;GenericTypeDefs.h: 491: BYTE b9:1;\n[; ;GenericTypeDefs.h: 492: BYTE b10:1;\n[; ;GenericTypeDefs.h: 493: BYTE b11:1;\n[; ;GenericTypeDefs.h: 494: BYTE b12:1;\n[; ;GenericTypeDefs.h: 495: BYTE b13:1;\n[; ;GenericTypeDefs.h: 496: BYTE b14:1;\n[; ;GenericTypeDefs.h: 497: BYTE b15:1;\n[; ;GenericTypeDefs.h: 498: BYTE b16:1;\n[; ;GenericTypeDefs.h: 499: BYTE b17:1;\n[; ;GenericTypeDefs.h: 500: BYTE b18:1;\n[; ;GenericTypeDefs.h: 501: BYTE b19:1;\n[; ;GenericTypeDefs.h: 502: BYTE b20:1;\n[; ;GenericTypeDefs.h: 503: BYTE b21:1;\n[; ;GenericTypeDefs.h: 504: BYTE b22:1;\n[; ;GenericTypeDefs.h: 505: BYTE b23:1;\n[; ;GenericTypeDefs.h: 506: BYTE b24:1;\n[; ;GenericTypeDefs.h: 507: BYTE b25:1;\n[; ;GenericTypeDefs.h: 508: BYTE b26:1;\n[; ;GenericTypeDefs.h: 509: BYTE b27:1;\n[; ;GenericTypeDefs.h: 510: BYTE b28:1;\n[; ;GenericTypeDefs.h: 511: BYTE b29:1;\n[; ;GenericTypeDefs.h: 512: BYTE b30:1;\n[; ;GenericTypeDefs.h: 513: BYTE b31:1;\n[; ;GenericTypeDefs.h: 514: BYTE b32:1;\n[; ;GenericTypeDefs.h: 515: BYTE b33:1;\n[; ;GenericTypeDefs.h: 516: BYTE b34:1;\n[; ;GenericTypeDefs.h: 517: BYTE b35:1;\n[; ;GenericTypeDefs.h: 518: BYTE b36:1;\n[; ;GenericTypeDefs.h: 519: BYTE b37:1;\n[; ;GenericTypeDefs.h: 520: BYTE b38:1;\n[; ;GenericTypeDefs.h: 521: BYTE b39:1;\n[; ;GenericTypeDefs.h: 522: BYTE b40:1;\n[; ;GenericTypeDefs.h: 523: BYTE b41:1;\n[; ;GenericTypeDefs.h: 524: BYTE b42:1;\n[; ;GenericTypeDefs.h: 525: BYTE b43:1;\n[; ;GenericTypeDefs.h: 526: BYTE b44:1;\n[; ;GenericTypeDefs.h: 527: BYTE b45:1;\n[; ;GenericTypeDefs.h: 528: BYTE b46:1;\n[; ;GenericTypeDefs.h: 529: BYTE b47:1;\n[; ;GenericTypeDefs.h: 530: BYTE b48:1;\n[; ;GenericTypeDefs.h: 531: BYTE b49:1;\n[; ;GenericTypeDefs.h: 532: BYTE b50:1;\n[; ;GenericTypeDefs.h: 533: BYTE b51:1;\n[; ;GenericTypeDefs.h: 534: BYTE b52:1;\n[; ;GenericTypeDefs.h: 535: BYTE b53:1;\n[; ;GenericTypeDefs.h: 536: BYTE b54:1;\n[; ;GenericTypeDefs.h: 537: BYTE b55:1;\n[; ;GenericTypeDefs.h: 538: BYTE b56:1;\n[; ;GenericTypeDefs.h: 539: BYTE b57:1;\n[; ;GenericTypeDefs.h: 540: BYTE b58:1;\n[; ;GenericTypeDefs.h: 541: BYTE b59:1;\n[; ;GenericTypeDefs.h: 542: BYTE b60:1;\n[; ;GenericTypeDefs.h: 543: BYTE b61:1;\n[; ;GenericTypeDefs.h: 544: BYTE b62:1;\n[; ;GenericTypeDefs.h: 545: BYTE b63:1;\n[; ;GenericTypeDefs.h: 546: } bits;\n[; ;GenericTypeDefs.h: 547: } QWORD_VAL;\n[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;i2c.h: 775: void IdleI2C( void );\n[; ;i2c.h: 777: void OpenI2C( unsigned char sync_mode, unsigned char slew );\n[; ;i2c.h: 779: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 781: signed char putsI2C( unsigned char *wrptr );\n[; ;i2c.h: 783: unsigned char ReadI2C( void );\n[; ;i2c.h: 785: void CloseI2C( void );\n[; ;i2c.h: 899: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 901: signed char getsI2C( unsigned char *rdptr, unsigned char length );\n[; ;i2c.h: 908: signed char EEAckPolling( unsigned char control );\n[; ;i2c.h: 910: signed char EEByteWrite( unsigned char control,\n[; ;i2c.h: 911: unsigned char address,\n[; ;i2c.h: 912: unsigned char data );\n[; ;i2c.h: 914: signed int EECurrentAddRead( unsigned char control );\n[; ;i2c.h: 916: signed char EEPageWrite( unsigned char control,\n[; ;i2c.h: 917: unsigned char address,\n[; ;i2c.h: 918: unsigned char *wrptr );\n[; ;i2c.h: 920: signed int EERandomRead( unsigned char control, unsigned char address );\n[; ;i2c.h: 922: signed char EESequentialRead( unsigned char control,\n[; ;i2c.h: 923: unsigned char address,\n[; ;i2c.h: 924: unsigned char *rdptr,\n[; ;i2c.h: 925: unsigned char length );\n[; ;mwire.h: 325: void OpenMwire( unsigned char sync_mode );\n[; ;mwire.h: 327: unsigned char ReadMwire( unsigned char high_byte,\n[; ;mwire.h: 328: unsigned char low_byte );\n[; ;mwire.h: 341: signed char WriteMwire( unsigned char data_out );\n[; ;mwire.h: 354: void getsMwire( unsigned char *rdptr, unsigned char length );\n[; ;portb.h: 126: void OpenPORTB( unsigned char config);\n[; ;portb.h: 176: void OpenRB0INT( unsigned char config);\n[; ;portb.h: 194: void OpenRB1INT( unsigned char config);\n[; ;portb.h: 211: void OpenRB2INT( unsigned char config);\n[; ;pwm.h: 85: union PWMDC\n[; ;pwm.h: 86: {\n[; ;pwm.h: 87: unsigned int lpwm;\n[; ;pwm.h: 88: char bpwm[2];\n[; ;pwm.h: 89: };\n[; ;pwm.h: 467: void OpenPWM1 ( char period);\n[; ;pwm.h: 468: void SetDCPWM1 ( unsigned int duty_cycle);\n[; ;pwm.h: 477: void ClosePWM1 (void);\n[; ;pwm.h: 485: void OpenPWM2 ( char period);\n[; ;pwm.h: 486: void SetDCPWM2( unsigned int duty_cycle);\n[; ;pwm.h: 492: void ClosePWM2 (void);\n[; ;reset.h: 16: char isMCLR(void);\n[; ;reset.h: 17: void StatusReset(void);\n[; ;reset.h: 18: char isPOR(void);\n[; ;reset.h: 19: char isWU(void);\n[; ;reset.h: 22: char isBOR(void);\n[; ;reset.h: 26: char isWDTTO(void);\n[; ;reset.h: 27: char isWDTWU(void);\n[; ;reset.h: 31: char isLVD(void);\n[; ;rtcc.h: 687: void Open_RTCC(void);\n[; ;rtcc.h: 688: void Close_RTCC(void);\n[; ;rtcc.h: 689: unsigned char update_RTCC(void);\n[; ;sw_i2c.h: 97: void SWStopI2C ( void );\n[; ;sw_i2c.h: 98: void SWStartI2C ( void );\n[; ;sw_i2c.h: 99: void SWRestartI2C ( void );\n[; ;sw_i2c.h: 100: void SWStopI2C ( void );\n[; ;sw_i2c.h: 102: signed char SWAckI2C( void );\n[; ;sw_i2c.h: 103: signed char Clock_test( void );\n[; ;sw_i2c.h: 104: signed int SWReadI2C( void );\n[; ;sw_i2c.h: 105: signed char SWWriteI2C(  unsigned char data_out );\n[; ;sw_i2c.h: 106: signed char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\n[; ;sw_i2c.h: 107: signed char SWPutsI2C(  unsigned char *wrptr );\n[; ;sw_spi.h: 84: void OpenSWSPI(void);\n[; ;sw_spi.h: 87: char WriteSWSPI( char output);\n[; ;sw_spi.h: 90: void SetCSSWSPI(void);\n[; ;sw_spi.h: 93: void ClearCSSWSPI(void);\n[; ;sw_uart.h: 47: void OpenUART(void);\n[; ;sw_uart.h: 49: unsigned char ReadUART(void);\n[; ;sw_uart.h: 51: void WriteUART( unsigned char);\n[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);\n[; ;sw_uart.h: 55: void putsUART( char *);\n[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);\n[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);\n[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);\n[; ;timers.h: 36: union Timers\n[; ;timers.h: 37: {\n[; ;timers.h: 38: unsigned int lt;\n[; ;timers.h: 39: char bt[2];\n[; ;timers.h: 40: };\n[; ;timers.h: 118: void OpenTimer0 ( unsigned char config);\n[; ;timers.h: 119: void CloseTimer0 (void);\n[; ;timers.h: 120: unsigned int ReadTimer0 (void);\n[; ;timers.h: 121: void WriteTimer0 ( unsigned int timer0);\n[; ;timers.h: 236: void OpenTimer1 ( unsigned char config);\n[; ;timers.h: 237: void CloseTimer1 (void);\n[; ;timers.h: 238: unsigned int ReadTimer1 (void);\n[; ;timers.h: 239: void WriteTimer1 ( unsigned int timer1);\n[; ;timers.h: 325: void OpenTimer2 ( unsigned char config);\n[; ;timers.h: 326: void CloseTimer2 (void);\n[; ;timers.h: 391: void OpenTimer3 ( unsigned char config);\n[; ;timers.h: 392: void CloseTimer3 (void);\n[; ;timers.h: 393: unsigned int ReadTimer3 (void);\n[; ;timers.h: 394: void WriteTimer3 ( unsigned int timer3);\n[; ;timers.h: 1179: void SetTmrCCPSrc( unsigned char );\n[; ;usart.h: 568: union USART\n[; ;usart.h: 569: {\n[; ;usart.h: 570: unsigned char val;\n[; ;usart.h: 571: struct\n[; ;usart.h: 572: {\n[; ;usart.h: 573: unsigned RX_NINE:1;\n[; ;usart.h: 574: unsigned TX_NINE:1;\n[; ;usart.h: 575: unsigned FRAME_ERROR:1;\n[; ;usart.h: 576: unsigned OVERRUN_ERROR:1;\n[; ;usart.h: 577: unsigned fill:4;\n[; ;usart.h: 578: };\n[; ;usart.h: 579: };\n[; ;usart.h: 580: extern union USART USART_Status;\n[; ;usart.h: 581: void OpenUSART ( unsigned char config, unsigned spbrg);\n[; ;usart.h: 596: char ReadUSART (void);\n[; ;usart.h: 597: void WriteUSART ( char data);\n[; ;usart.h: 598: void getsUSART ( char *buffer, unsigned char len);\n[; ;usart.h: 599: void putsUSART ( char *data);\n[; ;usart.h: 600: void putrsUSART ( const  char *data);\n[; ;usart.h: 654: void baudUSART ( unsigned char baudconfig);\n[; ;xlcd.h: 87: void OpenXLCD( unsigned char);\n[; ;xlcd.h: 92: void SetCGRamAddr( unsigned char);\n[; ;xlcd.h: 97: void SetDDRamAddr( unsigned char);\n[; ;xlcd.h: 102: unsigned char BusyXLCD(void);\n[; ;xlcd.h: 107: unsigned char ReadAddrXLCD(void);\n[; ;xlcd.h: 112: char ReadDataXLCD(void);\n[; ;xlcd.h: 117: void WriteCmdXLCD( unsigned char);\n[; ;xlcd.h: 122: void WriteDataXLCD( char);\n[; ;xlcd.h: 132: void putsXLCD( char *);\n[; ;xlcd.h: 137: void putrsXLCD(const char *);\n[; ;xlcd.h: 140: extern void DelayFor18TCY(void);\n[; ;xlcd.h: 141: extern void DelayPORXLCD(void);\n[; ;xlcd.h: 142: extern void DelayXLCD(void);\n[; ;pic18.h: 18: __attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned c\n[; ;pic18.h: 144: extern void _delay(unsigned long);\n[; ;pic18.h: 146: extern void _delaywdt(unsigned long);\n[; ;pic18.h: 148: extern void _delay3(unsigned char);\n\"3 io.c\n[v _portptrs `*Vuc ~T0 @X0 -> 0 `x e ]\n[i _portptrs\n:U ..\n\"6\n&U _PORTA\n\"9\n&U _PORTB\n\"12\n&U _PORTC\n\"18\n&U _PORTE\n..\n]\n[; ;io.c: 3: volatile uint8_t * portptrs[] =\n[; ;io.c: 4: {\n[; ;io.c: 6: &PORTA,\n[; ;io.c: 9: &PORTB,\n[; ;io.c: 12: &PORTC,\n[; ;io.c: 18: &PORTE,\n[; ;io.c: 21: };\n\"23\n[v _trisptrs `*Vuc ~T0 @X0 -> 0 `x e ]\n[i _trisptrs\n:U ..\n\"26\n&U _TRISA\n\"29\n&U _TRISB\n\"40\n&U _TRISC\n..\n]\n[; ;io.c: 23: volatile uint8_t * trisptrs[] =\n[; ;io.c: 24: {\n[; ;io.c: 26: &TRISA,\n[; ;io.c: 29: &TRISB,\n[; ;io.c: 32: &TRISC\n[; ;io.c: 40: };\n\"42\n[v _mask `Cuc ~T0 @X0 -> 0 `x e ]\n[i _mask\n:U ..\n\"44\n-> -> 1 `i `uc\n\"45\n-> -> 2 `i `uc\n\"46\n-> -> 4 `i `uc\n\"47\n-> -> 8 `i `uc\n\"48\n-> -> 16 `i `uc\n\"49\n-> -> 32 `i `uc\n\"50\n-> -> 64 `i `uc\n\"52\n-> -> 128 `i `uc\n..\n]\n[; ;io.c: 42: const uint8_t mask[] =\n[; ;io.c: 43: {\n[; ;io.c: 44: 0x01,\n[; ;io.c: 45: 0x02,\n[; ;io.c: 46: 0x04,\n[; ;io.c: 47: 0x08,\n[; ;io.c: 48: 0x10,\n[; ;io.c: 49: 0x20,\n[; ;io.c: 50: 0x40,\n[; ;io.c: 51: 0x80\n[; ;io.c: 52: };\n\"56\n[v _io_mode `(v ~T0 @X0 1 ef2`uc`uc ]\n{\n[; ;io.c: 55: void io_mode( uint8_t pin, uint8_t value )\n[; ;io.c: 56: {\n[e :U _io_mode ]\n[v _pin `uc ~T0 @X0 1 r1 ]\n[v _value `uc ~T0 @X0 1 r2 ]\n[f ]\n\"57\n[v _port `uc ~T0 @X0 1 a ]\n[; ;io.c: 57: uint8_t port = pin / 8;\n[e = _port -> / -> _pin `i -> 8 `i `uc ]\n\"58\n[v _num `uc ~T0 @X0 1 a ]\n[; ;io.c: 58: uint8_t num = pin % 8;\n[e = _num -> % -> _pin `i -> 8 `i `uc ]\n\"60\n[v _now `uc ~T0 @X0 1 a ]\n[; ;io.c: 60: uint8_t now = *(trisptrs[port]);\n[e = _now *U *U + &U _trisptrs * -> _port `ux -> -> # *U &U _trisptrs `ui `ux ]\n[; ;io.c: 62: if( value == 0 )\n\"62\n[e $ ! == -> _value `i -> 0 `i 519  ]\n[; ;io.c: 63: now &= ~mask[num];\n\"63\n[e =& _now -> ~ -> *U + &U _mask * -> _num `ux -> -> # *U &U _mask `ui `ux `i `uc ]\n[e $U 520  ]\n\"64\n[e :U 519 ]\n[; ;io.c: 64: else\n[; ;io.c: 65: now |= mask[num];\n\"65\n[e =| _now *U + &U _mask * -> _num `ux -> -> # *U &U _mask `ui `ux ]\n[e :U 520 ]\n[; ;io.c: 67: *(trisptrs[port]) = now;\n\"67\n[e = *U *U + &U _trisptrs * -> _port `ux -> -> # *U &U _trisptrs `ui `ux _now ]\n[; ;io.c: 68: }\n\"68\n[e :UE 518 ]\n}\n\"71\n[v _io_write `(v ~T0 @X0 1 ef2`uc`uc ]\n{\n[; ;io.c: 70: void io_write( uint8_t pin, uint8_t value )\n[; ;io.c: 71: {\n[e :U _io_write ]\n[v _pin `uc ~T0 @X0 1 r1 ]\n[v _value `uc ~T0 @X0 1 r2 ]\n[f ]\n\"72\n[v _port `uc ~T0 @X0 1 a ]\n[; ;io.c: 72: uint8_t port = pin / 8;\n[e = _port -> / -> _pin `i -> 8 `i `uc ]\n\"73\n[v _num `uc ~T0 @X0 1 a ]\n[; ;io.c: 73: uint8_t num = pin % 8;\n[e = _num -> % -> _pin `i -> 8 `i `uc ]\n\"75\n[v _now `uc ~T0 @X0 1 a ]\n[; ;io.c: 75: uint8_t now = *(portptrs[port]);\n[e = _now *U *U + &U _portptrs * -> _port `ux -> -> # *U &U _portptrs `ui `ux ]\n[; ;io.c: 77: if( value == 0 )\n\"77\n[e $ ! == -> _value `i -> 0 `i 522  ]\n[; ;io.c: 78: now &= ~mask[num];\n\"78\n[e =& _now -> ~ -> *U + &U _mask * -> _num `ux -> -> # *U &U _mask `ui `ux `i `uc ]\n[e $U 523  ]\n\"79\n[e :U 522 ]\n[; ;io.c: 79: else\n[; ;io.c: 80: now |= mask[num];\n\"80\n[e =| _now *U + &U _mask * -> _num `ux -> -> # *U &U _mask `ui `ux ]\n[e :U 523 ]\n[; ;io.c: 82: *(portptrs[port]) = now;\n\"82\n[e = *U *U + &U _portptrs * -> _port `ux -> -> # *U &U _portptrs `ui `ux _now ]\n[; ;io.c: 83: }\n\"83\n[e :UE 521 ]\n}\n\"87\n[v _io_read `(uc ~T0 @X0 1 ef1`uc ]\n{\n[; ;io.c: 86: uint8_t io_read( uint8_t pin )\n[; ;io.c: 87: {\n[e :U _io_read ]\n[v _pin `uc ~T0 @X0 1 r1 ]\n[f ]\n\"88\n[v _port `uc ~T0 @X0 1 a ]\n[; ;io.c: 88: uint8_t port = pin / 8;\n[e = _port -> / -> _pin `i -> 8 `i `uc ]\n\"89\n[v _num `uc ~T0 @X0 1 a ]\n[; ;io.c: 89: uint8_t num = pin % 8;\n[e = _num -> % -> _pin `i -> 8 `i `uc ]\n\"91\n[v _now `uc ~T0 @X0 1 a ]\n[; ;io.c: 91: uint8_t now = *(portptrs[port]);\n[e = _now *U *U + &U _portptrs * -> _port `ux -> -> # *U &U _portptrs `ui `ux ]\n[; ;io.c: 93: if( now & mask[num])\n\"93\n[e $ ! != & -> _now `i -> *U + &U _mask * -> _num `ux -> -> # *U &U _mask `ui `ux `i -> 0 `i 525  ]\n[; ;io.c: 94: return 1;\n\"94\n[e ) -> -> 1 `i `uc ]\n[e $UE 524  ]\n[e $U 526  ]\n\"95\n[e :U 525 ]\n[; ;io.c: 95: else\n[; ;io.c: 96: return 0;\n\"96\n[e ) -> -> 0 `i `uc ]\n[e $UE 524  ]\n[e :U 526 ]\n[; ;io.c: 97: }\n\"97\n[e :UE 524 ]\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/io.p1.d.tmp",
    "content": " build/default/production/io.d  \\\n build/default/production/io.p1:  \\\n io.c  \\\nio.h "
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/io.pre",
    "content": "\n# 1 \"io.c\"\n\n# 13 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stdint.h\"\ntypedef signed char int8_t;\n\n# 20\ntypedef signed int int16_t;\n\n# 28\ntypedef signed short long int int24_t;\n\n# 36\ntypedef signed long int int32_t;\n\n# 43\ntypedef unsigned char uint8_t;\n\n# 49\ntypedef unsigned int uint16_t;\n\n# 56\ntypedef unsigned short long int uint24_t;\n\n# 63\ntypedef unsigned long int uint32_t;\n\n# 71\ntypedef signed char int_least8_t;\n\n# 78\ntypedef signed int int_least16_t;\n\n# 90\ntypedef signed short long int int_least24_t;\n\n# 98\ntypedef signed long int int_least32_t;\n\n# 105\ntypedef unsigned char uint_least8_t;\n\n# 111\ntypedef unsigned int uint_least16_t;\n\n# 121\ntypedef unsigned short long int uint_least24_t;\n\n# 128\ntypedef unsigned long int uint_least32_t;\n\n# 137\ntypedef signed char int_fast8_t;\n\n# 144\ntypedef signed int int_fast16_t;\n\n# 156\ntypedef signed short long int int_fast24_t;\n\n# 164\ntypedef signed long int int_fast32_t;\n\n# 171\ntypedef unsigned char uint_fast8_t;\n\n# 177\ntypedef unsigned int uint_fast16_t;\n\n# 187\ntypedef unsigned short long int uint_fast24_t;\n\n# 194\ntypedef unsigned long int uint_fast32_t;\n\n# 200\ntypedef int32_t intmax_t;\n\n\n\n\ntypedef uint32_t uintmax_t;\n\n\n\n\ntypedef int16_t intptr_t;\n\n\n\n\ntypedef uint16_t uintptr_t;\n\n# 59 \"io.h\"\nvoid io_mode(uint8_t pin, uint8_t mode);\n\n# 70\nvoid io_write(uint8_t pin, uint8_t value);\n\n# 83\nuint8_t io_read( uint8_t pin );\n\n# 44 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\nextern volatile unsigned short UFRM @ 0xF66;\n\nasm(\"UFRM equ 0F66h\");\n\n\n\nextern volatile unsigned char UFRML @ 0xF66;\n\nasm(\"UFRML equ 0F66h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :8;\n};\nstruct {\nunsigned FRM0 :1;\nunsigned FRM1 :1;\nunsigned FRM2 :1;\nunsigned FRM3 :1;\nunsigned FRM4 :1;\nunsigned FRM5 :1;\nunsigned FRM6 :1;\nunsigned FRM7 :1;\n};\nstruct {\nunsigned FRML :8;\n};\n} UFRMLbits_t;\nextern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n\n# 127\nextern volatile unsigned char UFRMH @ 0xF67;\n\nasm(\"UFRMH equ 0F67h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :3;\n};\nstruct {\nunsigned FRM8 :1;\nunsigned FRM9 :1;\nunsigned FRM10 :1;\n};\n} UFRMHbits_t;\nextern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n\n# 166\nextern volatile unsigned char UIR @ 0xF68;\n\nasm(\"UIR equ 0F68h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIF :1;\nunsigned UERRIF :1;\nunsigned ACTVIF :1;\nunsigned TRNIF :1;\nunsigned IDLEIF :1;\nunsigned STALLIF :1;\nunsigned SOFIF :1;\n};\n} UIRbits_t;\nextern volatile UIRbits_t UIRbits @ 0xF68;\n\n# 221\nextern volatile unsigned char UIE @ 0xF69;\n\nasm(\"UIE equ 0F69h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIE :1;\nunsigned UERRIE :1;\nunsigned ACTVIE :1;\nunsigned TRNIE :1;\nunsigned IDLEIE :1;\nunsigned STALLIE :1;\nunsigned SOFIE :1;\n};\n} UIEbits_t;\nextern volatile UIEbits_t UIEbits @ 0xF69;\n\n# 276\nextern volatile unsigned char UEIR @ 0xF6A;\n\nasm(\"UEIR equ 0F6Ah\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEF :1;\nunsigned CRC5EF :1;\nunsigned CRC16EF :1;\nunsigned DFN8EF :1;\nunsigned BTOEF :1;\nunsigned :2;\nunsigned BTSEF :1;\n};\n} UEIRbits_t;\nextern volatile UEIRbits_t UEIRbits @ 0xF6A;\n\n# 326\nextern volatile unsigned char UEIE @ 0xF6B;\n\nasm(\"UEIE equ 0F6Bh\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEE :1;\nunsigned CRC5EE :1;\nunsigned CRC16EE :1;\nunsigned DFN8EE :1;\nunsigned BTOEE :1;\nunsigned :2;\nunsigned BTSEE :1;\n};\n} UEIEbits_t;\nextern volatile UEIEbits_t UEIEbits @ 0xF6B;\n\n# 376\nextern volatile unsigned char USTAT @ 0xF6C;\n\nasm(\"USTAT equ 0F6Ch\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned PPBI :1;\nunsigned DIR :1;\nunsigned ENDP :4;\n};\nstruct {\nunsigned :3;\nunsigned ENDP0 :1;\nunsigned ENDP1 :1;\nunsigned ENDP2 :1;\nunsigned ENDP3 :1;\n};\n} USTATbits_t;\nextern volatile USTATbits_t USTATbits @ 0xF6C;\n\n# 435\nextern volatile unsigned char UCON @ 0xF6D;\n\nasm(\"UCON equ 0F6Dh\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned SUSPND :1;\nunsigned RESUME :1;\nunsigned USBEN :1;\nunsigned PKTDIS :1;\nunsigned SE0 :1;\nunsigned PPBRST :1;\n};\n} UCONbits_t;\nextern volatile UCONbits_t UCONbits @ 0xF6D;\n\n# 485\nextern volatile unsigned char UADDR @ 0xF6E;\n\nasm(\"UADDR equ 0F6Eh\");\n\n\ntypedef union {\nstruct {\nunsigned ADDR :7;\n};\nstruct {\nunsigned ADDR0 :1;\nunsigned ADDR1 :1;\nunsigned ADDR2 :1;\nunsigned ADDR3 :1;\nunsigned ADDR4 :1;\nunsigned ADDR5 :1;\nunsigned ADDR6 :1;\n};\n} UADDRbits_t;\nextern volatile UADDRbits_t UADDRbits @ 0xF6E;\n\n# 548\nextern volatile unsigned char UCFG @ 0xF6F;\n\nasm(\"UCFG equ 0F6Fh\");\n\n\ntypedef union {\nstruct {\nunsigned PPB :2;\nunsigned FSEN :1;\nunsigned UTRDIS :1;\nunsigned UPUEN :1;\nunsigned :1;\nunsigned UOEMON :1;\nunsigned UTEYE :1;\n};\nstruct {\nunsigned PPB0 :1;\nunsigned PPB1 :1;\n};\nstruct {\nunsigned UPP0 :1;\n};\nstruct {\nunsigned :1;\nunsigned UPP1 :1;\n};\n} UCFGbits_t;\nextern volatile UCFGbits_t UCFGbits @ 0xF6F;\n\n# 629\nextern volatile unsigned char UEP0 @ 0xF70;\n\nasm(\"UEP0 equ 0F70h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP0CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP0HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP0INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP0OUTEN :1;\n};\nstruct {\nunsigned EP0STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS0 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK0 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN0 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN0 :1;\n};\nstruct {\nunsigned EPSTALL0 :1;\n};\n} UEP0bits_t;\nextern volatile UEP0bits_t UEP0bits @ 0xF70;\n\n# 760\nextern volatile unsigned char UEP1 @ 0xF71;\n\nasm(\"UEP1 equ 0F71h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP1CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP1HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP1INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP1OUTEN :1;\n};\nstruct {\nunsigned EP1STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS1 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK1 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN1 :1;\n};\nstruct {\nunsigned EPSTALL1 :1;\n};\n} UEP1bits_t;\nextern volatile UEP1bits_t UEP1bits @ 0xF71;\n\n# 891\nextern volatile unsigned char UEP2 @ 0xF72;\n\nasm(\"UEP2 equ 0F72h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP2CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP2HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP2INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP2OUTEN :1;\n};\nstruct {\nunsigned EP2STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS2 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK2 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN2 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN2 :1;\n};\nstruct {\nunsigned EPSTALL2 :1;\n};\n} UEP2bits_t;\nextern volatile UEP2bits_t UEP2bits @ 0xF72;\n\n# 1022\nextern volatile unsigned char UEP3 @ 0xF73;\n\nasm(\"UEP3 equ 0F73h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP3CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP3HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP3INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP3OUTEN :1;\n};\nstruct {\nunsigned EP3STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS3 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK3 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN3 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN3 :1;\n};\nstruct {\nunsigned EPSTALL3 :1;\n};\n} UEP3bits_t;\nextern volatile UEP3bits_t UEP3bits @ 0xF73;\n\n# 1153\nextern volatile unsigned char UEP4 @ 0xF74;\n\nasm(\"UEP4 equ 0F74h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP4CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP4HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP4INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP4OUTEN :1;\n};\nstruct {\nunsigned EP4STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS4 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK4 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN4 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN4 :1;\n};\nstruct {\nunsigned EPSTALL4 :1;\n};\n} UEP4bits_t;\nextern volatile UEP4bits_t UEP4bits @ 0xF74;\n\n# 1284\nextern volatile unsigned char UEP5 @ 0xF75;\n\nasm(\"UEP5 equ 0F75h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP5CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP5HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP5INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP5OUTEN :1;\n};\nstruct {\nunsigned EP5STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS5 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK5 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN5 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN5 :1;\n};\nstruct {\nunsigned EPSTALL5 :1;\n};\n} UEP5bits_t;\nextern volatile UEP5bits_t UEP5bits @ 0xF75;\n\n# 1415\nextern volatile unsigned char UEP6 @ 0xF76;\n\nasm(\"UEP6 equ 0F76h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP6CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP6HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP6INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP6OUTEN :1;\n};\nstruct {\nunsigned EP6STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS6 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK6 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN6 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN6 :1;\n};\nstruct {\nunsigned EPSTALL6 :1;\n};\n} UEP6bits_t;\nextern volatile UEP6bits_t UEP6bits @ 0xF76;\n\n# 1546\nextern volatile unsigned char UEP7 @ 0xF77;\n\nasm(\"UEP7 equ 0F77h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP7CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP7HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP7INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP7OUTEN :1;\n};\nstruct {\nunsigned EP7STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS7 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK7 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN7 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN7 :1;\n};\nstruct {\nunsigned EPSTALL7 :1;\n};\n} UEP7bits_t;\nextern volatile UEP7bits_t UEP7bits @ 0xF77;\n\n# 1677\nextern volatile unsigned char UEP8 @ 0xF78;\n\nasm(\"UEP8 equ 0F78h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS8 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK8 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN8 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN8 :1;\n};\nstruct {\nunsigned EPSTALL8 :1;\n};\n} UEP8bits_t;\nextern volatile UEP8bits_t UEP8bits @ 0xF78;\n\n# 1764\nextern volatile unsigned char UEP9 @ 0xF79;\n\nasm(\"UEP9 equ 0F79h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS9 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK9 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN9 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN9 :1;\n};\nstruct {\nunsigned EPSTALL9 :1;\n};\n} UEP9bits_t;\nextern volatile UEP9bits_t UEP9bits @ 0xF79;\n\n# 1851\nextern volatile unsigned char UEP10 @ 0xF7A;\n\nasm(\"UEP10 equ 0F7Ah\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS10 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK10 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN10 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN10 :1;\n};\nstruct {\nunsigned EPSTALL10 :1;\n};\n} UEP10bits_t;\nextern volatile UEP10bits_t UEP10bits @ 0xF7A;\n\n# 1938\nextern volatile unsigned char UEP11 @ 0xF7B;\n\nasm(\"UEP11 equ 0F7Bh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS11 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK11 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN11 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN11 :1;\n};\nstruct {\nunsigned EPSTALL11 :1;\n};\n} UEP11bits_t;\nextern volatile UEP11bits_t UEP11bits @ 0xF7B;\n\n# 2025\nextern volatile unsigned char UEP12 @ 0xF7C;\n\nasm(\"UEP12 equ 0F7Ch\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS12 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK12 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN12 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN12 :1;\n};\nstruct {\nunsigned EPSTALL12 :1;\n};\n} UEP12bits_t;\nextern volatile UEP12bits_t UEP12bits @ 0xF7C;\n\n# 2112\nextern volatile unsigned char UEP13 @ 0xF7D;\n\nasm(\"UEP13 equ 0F7Dh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS13 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK13 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN13 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN13 :1;\n};\nstruct {\nunsigned EPSTALL13 :1;\n};\n} UEP13bits_t;\nextern volatile UEP13bits_t UEP13bits @ 0xF7D;\n\n# 2199\nextern volatile unsigned char UEP14 @ 0xF7E;\n\nasm(\"UEP14 equ 0F7Eh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS14 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK14 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN14 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN14 :1;\n};\nstruct {\nunsigned EPSTALL14 :1;\n};\n} UEP14bits_t;\nextern volatile UEP14bits_t UEP14bits @ 0xF7E;\n\n# 2286\nextern volatile unsigned char UEP15 @ 0xF7F;\n\nasm(\"UEP15 equ 0F7Fh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS15 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK15 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN15 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN15 :1;\n};\nstruct {\nunsigned EPSTALL15 :1;\n};\n} UEP15bits_t;\nextern volatile UEP15bits_t UEP15bits @ 0xF7F;\n\n# 2373\nextern volatile unsigned char PORTA @ 0xF80;\n\nasm(\"PORTA equ 0F80h\");\n\n\ntypedef union {\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\nstruct {\nunsigned AN0 :1;\nunsigned AN1 :1;\nunsigned AN2 :1;\nunsigned AN3 :1;\nunsigned T0CKI :1;\nunsigned AN4 :1;\nunsigned OSC2 :1;\n};\nstruct {\nunsigned :2;\nunsigned VREFM :1;\nunsigned VREFP :1;\nunsigned :1;\nunsigned LVDIN :1;\n};\nstruct {\nunsigned :5;\nunsigned HLVDIN :1;\n};\nstruct {\nunsigned :7;\nunsigned RA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned RJPU :1;\n};\nstruct {\nunsigned ULPWUIN :1;\n};\n} PORTAbits_t;\nextern volatile PORTAbits_t PORTAbits @ 0xF80;\n\n# 2529\nextern volatile unsigned char PORTB @ 0xF81;\n\nasm(\"PORTB equ 0F81h\");\n\n\ntypedef union {\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\nstruct {\nunsigned INT0 :1;\nunsigned INT1 :1;\nunsigned INT2 :1;\nunsigned :2;\nunsigned PGM :1;\nunsigned PGC :1;\nunsigned PGD :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP2_PA2 :1;\n};\n} PORTBbits_t;\nextern volatile PORTBbits_t PORTBbits @ 0xF81;\n\n# 2638\nextern volatile unsigned char PORTC @ 0xF82;\n\nasm(\"PORTC equ 0F82h\");\n\n\ntypedef union {\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :1;\nunsigned RC4 :1;\nunsigned RC5 :1;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned T1OSO :1;\nunsigned T1OSI :1;\nunsigned CCP1 :1;\nunsigned :3;\nunsigned TX :1;\nunsigned RX :1;\n};\nstruct {\nunsigned T13CKI :1;\nunsigned :1;\nunsigned P1A :1;\nunsigned :3;\nunsigned CK :1;\nunsigned DT :1;\n};\nstruct {\nunsigned :1;\nunsigned CCP2 :1;\n};\nstruct {\nunsigned :2;\nunsigned PA1 :1;\n};\nstruct {\nunsigned :1;\nunsigned PA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned RC3 :1;\n};\n} PORTCbits_t;\nextern volatile PORTCbits_t PORTCbits @ 0xF82;\n\n# 2791\nextern volatile unsigned char PORTE @ 0xF84;\n\nasm(\"PORTE equ 0F84h\");\n\n\ntypedef union {\nstruct {\nunsigned :3;\nunsigned RE3 :1;\n};\nstruct {\nunsigned :2;\nunsigned CCP10 :1;\n};\nstruct {\nunsigned :7;\nunsigned CCP2E :1;\n};\nstruct {\nunsigned :6;\nunsigned CCP6E :1;\n};\nstruct {\nunsigned :5;\nunsigned CCP7E :1;\n};\nstruct {\nunsigned :4;\nunsigned CCP8E :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP9E :1;\n};\nstruct {\nunsigned :2;\nunsigned CS :1;\n};\nstruct {\nunsigned :7;\nunsigned PA2E :1;\n};\nstruct {\nunsigned :6;\nunsigned PB1E :1;\n};\nstruct {\nunsigned :2;\nunsigned PB2 :1;\n};\nstruct {\nunsigned :4;\nunsigned PB3E :1;\n};\nstruct {\nunsigned :5;\nunsigned PC1E :1;\n};\nstruct {\nunsigned :1;\nunsigned PC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned PC3E :1;\n};\nstruct {\nunsigned PD2 :1;\n};\nstruct {\nunsigned RDE :1;\n};\nstruct {\nunsigned RE0 :1;\n};\nstruct {\nunsigned :1;\nunsigned RE1 :1;\n};\nstruct {\nunsigned :2;\nunsigned RE2 :1;\n};\nstruct {\nunsigned :4;\nunsigned RE4 :1;\n};\nstruct {\nunsigned :5;\nunsigned RE5 :1;\n};\nstruct {\nunsigned :6;\nunsigned RE6 :1;\n};\nstruct {\nunsigned :7;\nunsigned RE7 :1;\n};\nstruct {\nunsigned :1;\nunsigned WRE :1;\n};\n} PORTEbits_t;\nextern volatile PORTEbits_t PORTEbits @ 0xF84;\n\n# 3024\nextern volatile unsigned char LATA @ 0xF89;\n\nasm(\"LATA equ 0F89h\");\n\n\ntypedef union {\nstruct {\nunsigned LATA0 :1;\nunsigned LATA1 :1;\nunsigned LATA2 :1;\nunsigned LATA3 :1;\nunsigned LATA4 :1;\nunsigned LATA5 :1;\nunsigned LATA6 :1;\n};\nstruct {\nunsigned LA0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LA1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LA3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LA4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LA5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LA6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned LATA7 :1;\n};\n} LATAbits_t;\nextern volatile LATAbits_t LATAbits @ 0xF89;\n\n# 3159\nextern volatile unsigned char LATB @ 0xF8A;\n\nasm(\"LATB equ 0F8Ah\");\n\n\ntypedef union {\nstruct {\nunsigned LATB0 :1;\nunsigned LATB1 :1;\nunsigned LATB2 :1;\nunsigned LATB3 :1;\nunsigned LATB4 :1;\nunsigned LATB5 :1;\nunsigned LATB6 :1;\nunsigned LATB7 :1;\n};\nstruct {\nunsigned LB0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LB1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LB2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LB3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LB4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LB5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LB6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LB7 :1;\n};\n} LATBbits_t;\nextern volatile LATBbits_t LATBbits @ 0xF8A;\n\n# 3291\nextern volatile unsigned char LATC @ 0xF8B;\n\nasm(\"LATC equ 0F8Bh\");\n\n\ntypedef union {\nstruct {\nunsigned LATC0 :1;\nunsigned LATC1 :1;\nunsigned LATC2 :1;\nunsigned :3;\nunsigned LATC6 :1;\nunsigned LATC7 :1;\n};\nstruct {\nunsigned LC0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LC1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LC3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LC4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LC5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LC6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LC7 :1;\n};\n} LATCbits_t;\nextern volatile LATCbits_t LATCbits @ 0xF8B;\n\n# 3406\nextern volatile unsigned char TRISA @ 0xF92;\n\nasm(\"TRISA equ 0F92h\");\n\n\nextern volatile unsigned char DDRA @ 0xF92;\n\nasm(\"DDRA equ 0F92h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} TRISAbits_t;\nextern volatile TRISAbits_t TRISAbits @ 0xF92;\n\n# 3509\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} DDRAbits_t;\nextern volatile DDRAbits_t DDRAbits @ 0xF92;\n\n# 3603\nextern volatile unsigned char TRISB @ 0xF93;\n\nasm(\"TRISB equ 0F93h\");\n\n\nextern volatile unsigned char DDRB @ 0xF93;\n\nasm(\"DDRB equ 0F93h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} TRISBbits_t;\nextern volatile TRISBbits_t TRISBbits @ 0xF93;\n\n# 3718\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} DDRBbits_t;\nextern volatile DDRBbits_t DDRBbits @ 0xF93;\n\n# 3824\nextern volatile unsigned char TRISC @ 0xF94;\n\nasm(\"TRISC equ 0F94h\");\n\n\nextern volatile unsigned char DDRC @ 0xF94;\n\nasm(\"DDRC equ 0F94h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} TRISCbits_t;\nextern volatile TRISCbits_t TRISCbits @ 0xF94;\n\n# 3914\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} DDRCbits_t;\nextern volatile DDRCbits_t DDRCbits @ 0xF94;\n\n# 3995\nextern volatile unsigned char OSCTUNE @ 0xF9B;\n\nasm(\"OSCTUNE equ 0F9Bh\");\n\n\ntypedef union {\nstruct {\nunsigned TUN :5;\nunsigned :2;\nunsigned INTSRC :1;\n};\nstruct {\nunsigned TUN0 :1;\nunsigned TUN1 :1;\nunsigned TUN2 :1;\nunsigned TUN3 :1;\nunsigned TUN4 :1;\n};\n} OSCTUNEbits_t;\nextern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n\n# 4053\nextern volatile unsigned char PIE1 @ 0xF9D;\n\nasm(\"PIE1 equ 0F9Dh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IE :1;\nunsigned TMR2IE :1;\nunsigned CCP1IE :1;\nunsigned SSPIE :1;\nunsigned TXIE :1;\nunsigned RCIE :1;\nunsigned ADIE :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IE :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IE :1;\n};\n} PIE1bits_t;\nextern volatile PIE1bits_t PIE1bits @ 0xF9D;\n\n# 4126\nextern volatile unsigned char PIR1 @ 0xF9E;\n\nasm(\"PIR1 equ 0F9Eh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IF :1;\nunsigned TMR2IF :1;\nunsigned CCP1IF :1;\nunsigned SSPIF :1;\nunsigned TXIF :1;\nunsigned RCIF :1;\nunsigned ADIF :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IF :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IF :1;\n};\n} PIR1bits_t;\nextern volatile PIR1bits_t PIR1bits @ 0xF9E;\n\n# 4199\nextern volatile unsigned char IPR1 @ 0xF9F;\n\nasm(\"IPR1 equ 0F9Fh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IP :1;\nunsigned TMR2IP :1;\nunsigned CCP1IP :1;\nunsigned SSPIP :1;\nunsigned TXIP :1;\nunsigned RCIP :1;\nunsigned ADIP :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IP :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IP :1;\n};\n} IPR1bits_t;\nextern volatile IPR1bits_t IPR1bits @ 0xF9F;\n\n# 4272\nextern volatile unsigned char PIE2 @ 0xFA0;\n\nasm(\"PIE2 equ 0FA0h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IE :1;\nunsigned TMR3IE :1;\nunsigned HLVDIE :1;\nunsigned BCLIE :1;\nunsigned EEIE :1;\nunsigned USBIE :1;\nunsigned CMIE :1;\nunsigned OSCFIE :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIE :1;\n};\n} PIE2bits_t;\nextern volatile PIE2bits_t PIE2bits @ 0xFA0;\n\n# 4342\nextern volatile unsigned char PIR2 @ 0xFA1;\n\nasm(\"PIR2 equ 0FA1h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IF :1;\nunsigned TMR3IF :1;\nunsigned HLVDIF :1;\nunsigned BCLIF :1;\nunsigned EEIF :1;\nunsigned USBIF :1;\nunsigned CMIF :1;\nunsigned OSCFIF :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIF :1;\n};\n} PIR2bits_t;\nextern volatile PIR2bits_t PIR2bits @ 0xFA1;\n\n# 4412\nextern volatile unsigned char IPR2 @ 0xFA2;\n\nasm(\"IPR2 equ 0FA2h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IP :1;\nunsigned TMR3IP :1;\nunsigned HLVDIP :1;\nunsigned BCLIP :1;\nunsigned EEIP :1;\nunsigned USBIP :1;\nunsigned CMIP :1;\nunsigned OSCFIP :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIP :1;\n};\n} IPR2bits_t;\nextern volatile IPR2bits_t IPR2bits @ 0xFA2;\n\n# 4482\nextern volatile unsigned char EECON1 @ 0xFA6;\n\nasm(\"EECON1 equ 0FA6h\");\n\n\ntypedef union {\nstruct {\nunsigned RD :1;\nunsigned WR :1;\nunsigned WREN :1;\nunsigned WRERR :1;\nunsigned FREE :1;\nunsigned :1;\nunsigned CFGS :1;\nunsigned EEPGD :1;\n};\nstruct {\nunsigned :6;\nunsigned EEFS :1;\n};\n} EECON1bits_t;\nextern volatile EECON1bits_t EECON1bits @ 0xFA6;\n\n# 4547\nextern volatile unsigned char EECON2 @ 0xFA7;\n\nasm(\"EECON2 equ 0FA7h\");\n\n\n\nextern volatile unsigned char EEDATA @ 0xFA8;\n\nasm(\"EEDATA equ 0FA8h\");\n\n\n\nextern volatile unsigned char EEADR @ 0xFA9;\n\nasm(\"EEADR equ 0FA9h\");\n\n\n\nextern volatile unsigned char RCSTA @ 0xFAB;\n\nasm(\"RCSTA equ 0FABh\");\n\n\nextern volatile unsigned char RCSTA1 @ 0xFAB;\n\nasm(\"RCSTA1 equ 0FABh\");\n\n\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTAbits_t;\nextern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n\n# 4648\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTA1bits_t;\nextern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n\n# 4722\nextern volatile unsigned char TXSTA @ 0xFAC;\n\nasm(\"TXSTA equ 0FACh\");\n\n\nextern volatile unsigned char TXSTA1 @ 0xFAC;\n\nasm(\"TXSTA1 equ 0FACh\");\n\n\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTAbits_t;\nextern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n\n# 4858\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTA1bits_t;\nextern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n\n# 4985\nextern volatile unsigned char TXREG @ 0xFAD;\n\nasm(\"TXREG equ 0FADh\");\n\n\nextern volatile unsigned char TXREG1 @ 0xFAD;\n\nasm(\"TXREG1 equ 0FADh\");\n\n\n\nextern volatile unsigned char RCREG @ 0xFAE;\n\nasm(\"RCREG equ 0FAEh\");\n\n\nextern volatile unsigned char RCREG1 @ 0xFAE;\n\nasm(\"RCREG1 equ 0FAEh\");\n\n\n\nextern volatile unsigned char SPBRG @ 0xFAF;\n\nasm(\"SPBRG equ 0FAFh\");\n\n\nextern volatile unsigned char SPBRG1 @ 0xFAF;\n\nasm(\"SPBRG1 equ 0FAFh\");\n\n\n\nextern volatile unsigned char SPBRGH @ 0xFB0;\n\nasm(\"SPBRGH equ 0FB0h\");\n\n\n\nextern volatile unsigned char T3CON @ 0xFB1;\n\nasm(\"T3CON equ 0FB1h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T3SYNC :1;\n};\nstruct {\nunsigned TMR3ON :1;\nunsigned TMR3CS :1;\nunsigned nT3SYNC :1;\nunsigned T3CCP1 :1;\nunsigned T3CKPS :2;\nunsigned T3CCP2 :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3SYNC :1;\nunsigned :1;\nunsigned T3CKPS0 :1;\nunsigned T3CKPS1 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3NSYNC :1;\n};\nstruct {\nunsigned :7;\nunsigned RD163 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN3 :1;\n};\nstruct {\nunsigned :7;\nunsigned T3RD16 :1;\n};\n} T3CONbits_t;\nextern volatile T3CONbits_t T3CONbits @ 0xFB1;\n\n# 5146\nextern volatile unsigned short TMR3 @ 0xFB2;\n\nasm(\"TMR3 equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3L @ 0xFB2;\n\nasm(\"TMR3L equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3H @ 0xFB3;\n\nasm(\"TMR3H equ 0FB3h\");\n\n\n\nextern volatile unsigned char CMCON @ 0xFB4;\n\nasm(\"CMCON equ 0FB4h\");\n\n\ntypedef union {\nstruct {\nunsigned CM :3;\nunsigned CIS :1;\nunsigned C1INV :1;\nunsigned C2INV :1;\nunsigned C1OUT :1;\nunsigned C2OUT :1;\n};\nstruct {\nunsigned CM0 :1;\nunsigned CM1 :1;\nunsigned CM2 :1;\n};\nstruct {\nunsigned CMEN0 :1;\n};\nstruct {\nunsigned :1;\nunsigned CMEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned CMEN2 :1;\n};\n} CMCONbits_t;\nextern volatile CMCONbits_t CMCONbits @ 0xFB4;\n\n# 5259\nextern volatile unsigned char CVRCON @ 0xFB5;\n\nasm(\"CVRCON equ 0FB5h\");\n\n\ntypedef union {\nstruct {\nunsigned CVR :4;\nunsigned CVRSS :1;\nunsigned CVRR :1;\nunsigned CVROE :1;\nunsigned CVREN :1;\n};\nstruct {\nunsigned CVR0 :1;\nunsigned CVR1 :1;\nunsigned CVR2 :1;\nunsigned CVR3 :1;\nunsigned CVREF :1;\n};\nstruct {\nunsigned :6;\nunsigned CVROEN :1;\n};\n} CVRCONbits_t;\nextern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n\n# 5343\nextern volatile unsigned char ECCP1AS @ 0xFB6;\n\nasm(\"ECCP1AS equ 0FB6h\");\n\n\nextern volatile unsigned char CCP1AS @ 0xFB6;\n\nasm(\"CCP1AS equ 0FB6h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} ECCP1ASbits_t;\nextern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n\n# 5412\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} CCP1ASbits_t;\nextern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n\n# 5472\nextern volatile unsigned char ECCP1DEL @ 0xFB7;\n\nasm(\"ECCP1DEL equ 0FB7h\");\n\n\nextern volatile unsigned char CCP1DEL @ 0xFB7;\n\nasm(\"CCP1DEL equ 0FB7h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} ECCP1DELbits_t;\nextern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n\n# 5496\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} CCP1DELbits_t;\nextern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n\n# 5511\nextern volatile unsigned char BAUDCON @ 0xFB8;\n\nasm(\"BAUDCON equ 0FB8h\");\n\n\nextern volatile unsigned char BAUDCTL @ 0xFB8;\n\nasm(\"BAUDCTL equ 0FB8h\");\n\n\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCONbits_t;\nextern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n\n# 5605\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCTLbits_t;\nextern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n\n# 5690\nextern volatile unsigned char CCP2CON @ 0xFBA;\n\nasm(\"CCP2CON equ 0FBAh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2M :4;\nunsigned DC2B :2;\n};\nstruct {\nunsigned CCP2M0 :1;\nunsigned CCP2M1 :1;\nunsigned CCP2M2 :1;\nunsigned CCP2M3 :1;\nunsigned DC2B0 :1;\nunsigned DC2B1 :1;\n};\n} CCP2CONbits_t;\nextern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n\n# 5753\nextern volatile unsigned short CCPR2 @ 0xFBB;\n\nasm(\"CCPR2 equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2L @ 0xFBB;\n\nasm(\"CCPR2L equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2H @ 0xFBC;\n\nasm(\"CCPR2H equ 0FBCh\");\n\n\n\nextern volatile unsigned char CCP1CON @ 0xFBD;\n\nasm(\"CCP1CON equ 0FBDh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP1M :4;\nunsigned DC1B :2;\n};\nstruct {\nunsigned CCP1M0 :1;\nunsigned CCP1M1 :1;\nunsigned CCP1M2 :1;\nunsigned CCP1M3 :1;\nunsigned DC1B0 :1;\nunsigned DC1B1 :1;\n};\n} CCP1CONbits_t;\nextern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n\n# 5834\nextern volatile unsigned short CCPR1 @ 0xFBE;\n\nasm(\"CCPR1 equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1L @ 0xFBE;\n\nasm(\"CCPR1L equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1H @ 0xFBF;\n\nasm(\"CCPR1H equ 0FBFh\");\n\n\n\nextern volatile unsigned char ADCON2 @ 0xFC0;\n\nasm(\"ADCON2 equ 0FC0h\");\n\n\ntypedef union {\nstruct {\nunsigned ADCS :3;\nunsigned ACQT :3;\nunsigned :1;\nunsigned ADFM :1;\n};\nstruct {\nunsigned ADCS0 :1;\nunsigned ADCS1 :1;\nunsigned ADCS2 :1;\nunsigned ACQT0 :1;\nunsigned ACQT1 :1;\nunsigned ACQT2 :1;\n};\n} ADCON2bits_t;\nextern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n\n# 5922\nextern volatile unsigned char ADCON1 @ 0xFC1;\n\nasm(\"ADCON1 equ 0FC1h\");\n\n\ntypedef union {\nstruct {\nunsigned PCFG :4;\nunsigned VCFG :2;\n};\nstruct {\nunsigned PCFG0 :1;\nunsigned PCFG1 :1;\nunsigned PCFG2 :1;\nunsigned PCFG3 :1;\nunsigned VCFG0 :1;\nunsigned VCFG1 :1;\n};\nstruct {\nunsigned :3;\nunsigned CHSN3 :1;\n};\nstruct {\nunsigned :4;\nunsigned VCFG01 :1;\n};\nstruct {\nunsigned :5;\nunsigned VCFG11 :1;\n};\n} ADCON1bits_t;\nextern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n\n# 6012\nextern volatile unsigned char ADCON0 @ 0xFC2;\n\nasm(\"ADCON0 equ 0FC2h\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned ADON :1;\nunsigned GO_nDONE :1;\nunsigned CHS :4;\n};\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO_DONE :1;\nunsigned CHS0 :1;\nunsigned CHS1 :1;\nunsigned CHS2 :1;\nunsigned CHS3 :1;\n};\nstruct {\nunsigned :1;\nunsigned DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned nDONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GODONE :1;\n};\n} ADCON0bits_t;\nextern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n\n# 6134\nextern volatile unsigned short ADRES @ 0xFC3;\n\nasm(\"ADRES equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESL @ 0xFC3;\n\nasm(\"ADRESL equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESH @ 0xFC4;\n\nasm(\"ADRESH equ 0FC4h\");\n\n\n\nextern volatile unsigned char SSPCON2 @ 0xFC5;\n\nasm(\"SSPCON2 equ 0FC5h\");\n\n\ntypedef union {\nstruct {\nunsigned SEN :1;\nunsigned RSEN :1;\nunsigned PEN :1;\nunsigned RCEN :1;\nunsigned ACKEN :1;\nunsigned ACKDT :1;\nunsigned ACKSTAT :1;\nunsigned GCEN :1;\n};\n} SSPCON2bits_t;\nextern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n\n# 6213\nextern volatile unsigned char SSPCON1 @ 0xFC6;\n\nasm(\"SSPCON1 equ 0FC6h\");\n\n\ntypedef union {\nstruct {\nunsigned SSPM :4;\nunsigned CKP :1;\nunsigned SSPEN :1;\nunsigned SSPOV :1;\nunsigned WCOL :1;\n};\nstruct {\nunsigned SSPM0 :1;\nunsigned SSPM1 :1;\nunsigned SSPM2 :1;\nunsigned SSPM3 :1;\n};\n} SSPCON1bits_t;\nextern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n\n# 6282\nextern volatile unsigned char SSPSTAT @ 0xFC7;\n\nasm(\"SSPSTAT equ 0FC7h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned BF :1;\nunsigned UA :1;\nunsigned R_nW :1;\nunsigned S :1;\nunsigned P :1;\nunsigned D_nA :1;\nunsigned CKE :1;\nunsigned SMP :1;\n};\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned :2;\nunsigned R_W :1;\nunsigned :2;\nunsigned D_A :1;\n};\nstruct {\nunsigned :2;\nunsigned I2C_READ :1;\nunsigned I2C_START :1;\nunsigned I2C_STOP :1;\nunsigned I2C_DAT :1;\n};\nstruct {\nunsigned :2;\nunsigned nW :1;\nunsigned :2;\nunsigned nA :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_WRITE :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned nWRITE :1;\nunsigned :2;\nunsigned nADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned READ_WRITE :1;\nunsigned :2;\nunsigned DATA_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned R :1;\nunsigned :2;\nunsigned D :1;\n};\nstruct {\nunsigned :5;\nunsigned DA :1;\n};\nstruct {\nunsigned :2;\nunsigned RW :1;\n};\nstruct {\nunsigned :3;\nunsigned START :1;\n};\nstruct {\nunsigned :4;\nunsigned STOP :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_A :1;\n};\n} SSPSTATbits_t;\nextern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n\n# 6548\nextern volatile unsigned char SSPADD @ 0xFC8;\n\nasm(\"SSPADD equ 0FC8h\");\n\n\n\nextern volatile unsigned char SSPBUF @ 0xFC9;\n\nasm(\"SSPBUF equ 0FC9h\");\n\n\n\nextern volatile unsigned char T2CON @ 0xFCA;\n\nasm(\"T2CON equ 0FCAh\");\n\n\ntypedef union {\nstruct {\nunsigned T2CKPS :2;\nunsigned TMR2ON :1;\nunsigned TOUTPS :4;\n};\nstruct {\nunsigned T2CKPS0 :1;\nunsigned T2CKPS1 :1;\nunsigned :1;\nunsigned T2OUTPS0 :1;\nunsigned T2OUTPS1 :1;\nunsigned T2OUTPS2 :1;\nunsigned T2OUTPS3 :1;\n};\nstruct {\nunsigned :3;\nunsigned TOUTPS0 :1;\nunsigned TOUTPS1 :1;\nunsigned TOUTPS2 :1;\nunsigned TOUTPS3 :1;\n};\n} T2CONbits_t;\nextern volatile T2CONbits_t T2CONbits @ 0xFCA;\n\n# 6657\nextern volatile unsigned char PR2 @ 0xFCB;\n\nasm(\"PR2 equ 0FCBh\");\n\n\nextern volatile unsigned char MEMCON @ 0xFCB;\n\nasm(\"MEMCON equ 0FCBh\");\n\n\n\nextern volatile unsigned char TMR2 @ 0xFCC;\n\nasm(\"TMR2 equ 0FCCh\");\n\n\n\nextern volatile unsigned char T1CON @ 0xFCD;\n\nasm(\"T1CON equ 0FCDh\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T1SYNC :1;\n};\nstruct {\nunsigned TMR1ON :1;\nunsigned TMR1CS :1;\nunsigned nT1SYNC :1;\nunsigned T1OSCEN :1;\nunsigned T1CKPS :2;\nunsigned T1RUN :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T1SYNC :1;\nunsigned :1;\nunsigned T1CKPS0 :1;\nunsigned T1CKPS1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN :1;\n};\nstruct {\nunsigned :7;\nunsigned T1RD16 :1;\n};\n} T1CONbits_t;\nextern volatile T1CONbits_t T1CONbits @ 0xFCD;\n\n# 6778\nextern volatile unsigned short TMR1 @ 0xFCE;\n\nasm(\"TMR1 equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1L @ 0xFCE;\n\nasm(\"TMR1L equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1H @ 0xFCF;\n\nasm(\"TMR1H equ 0FCFh\");\n\n\n\nextern volatile unsigned char RCON @ 0xFD0;\n\nasm(\"RCON equ 0FD0h\");\n\n\ntypedef union {\nstruct {\nunsigned NOT_BOR :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_POR :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_PD :1;\n};\nstruct {\nunsigned :3;\nunsigned NOT_TO :1;\n};\nstruct {\nunsigned :4;\nunsigned NOT_RI :1;\n};\nstruct {\nunsigned nBOR :1;\nunsigned nPOR :1;\nunsigned nPD :1;\nunsigned nTO :1;\nunsigned nRI :1;\nunsigned :1;\nunsigned SBOREN :1;\nunsigned IPEN :1;\n};\nstruct {\nunsigned :7;\nunsigned NOT_IPEN :1;\n};\nstruct {\nunsigned BOR :1;\nunsigned POR :1;\nunsigned PD :1;\nunsigned TO :1;\nunsigned RI :1;\nunsigned :2;\nunsigned nIPEN :1;\n};\n} RCONbits_t;\nextern volatile RCONbits_t RCONbits @ 0xFD0;\n\n# 6944\nextern volatile unsigned char WDTCON @ 0xFD1;\n\nasm(\"WDTCON equ 0FD1h\");\n\n\ntypedef union {\nstruct {\nunsigned SWDTEN :1;\n};\nstruct {\nunsigned SWDTE :1;\n};\n} WDTCONbits_t;\nextern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n\n# 6971\nextern volatile unsigned char HLVDCON @ 0xFD2;\n\nasm(\"HLVDCON equ 0FD2h\");\n\n\nextern volatile unsigned char LVDCON @ 0xFD2;\n\nasm(\"LVDCON equ 0FD2h\");\n\n\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} HLVDCONbits_t;\nextern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n\n# 7110\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} LVDCONbits_t;\nextern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n\n# 7240\nextern volatile unsigned char OSCCON @ 0xFD3;\n\nasm(\"OSCCON equ 0FD3h\");\n\n\ntypedef union {\nstruct {\nunsigned SCS :2;\nunsigned IOFS :1;\nunsigned OSTS :1;\nunsigned IRCF :3;\nunsigned IDLEN :1;\n};\nstruct {\nunsigned SCS0 :1;\nunsigned SCS1 :1;\nunsigned FLTS :1;\nunsigned :1;\nunsigned IRCF0 :1;\nunsigned IRCF1 :1;\nunsigned IRCF2 :1;\n};\n} OSCCONbits_t;\nextern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n\n# 7322\nextern volatile unsigned char T0CON @ 0xFD5;\n\nasm(\"T0CON equ 0FD5h\");\n\n\ntypedef union {\nstruct {\nunsigned T0PS :3;\nunsigned PSA :1;\nunsigned T0SE :1;\nunsigned T0CS :1;\nunsigned T08BIT :1;\nunsigned TMR0ON :1;\n};\nstruct {\nunsigned T0PS0 :1;\nunsigned T0PS1 :1;\nunsigned T0PS2 :1;\n};\n} T0CONbits_t;\nextern volatile T0CONbits_t T0CONbits @ 0xFD5;\n\n# 7391\nextern volatile unsigned short TMR0 @ 0xFD6;\n\nasm(\"TMR0 equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0L @ 0xFD6;\n\nasm(\"TMR0L equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0H @ 0xFD7;\n\nasm(\"TMR0H equ 0FD7h\");\n\n\n\nextern volatile unsigned char STATUS @ 0xFD8;\n\nasm(\"STATUS equ 0FD8h\");\n\n\ntypedef union {\nstruct {\nunsigned C :1;\nunsigned DC :1;\nunsigned Z :1;\nunsigned OV :1;\nunsigned N :1;\n};\nstruct {\nunsigned CARRY :1;\n};\nstruct {\nunsigned :4;\nunsigned NEGATIVE :1;\n};\nstruct {\nunsigned :3;\nunsigned OVERFLOW :1;\n};\nstruct {\nunsigned :2;\nunsigned ZERO :1;\n};\n} STATUSbits_t;\nextern volatile STATUSbits_t STATUSbits @ 0xFD8;\n\n# 7487\nextern volatile unsigned short FSR2 @ 0xFD9;\n\nasm(\"FSR2 equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2L @ 0xFD9;\n\nasm(\"FSR2L equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2H @ 0xFDA;\n\nasm(\"FSR2H equ 0FDAh\");\n\n\n\nextern volatile unsigned char PLUSW2 @ 0xFDB;\n\nasm(\"PLUSW2 equ 0FDBh\");\n\n\n\nextern volatile unsigned char PREINC2 @ 0xFDC;\n\nasm(\"PREINC2 equ 0FDCh\");\n\n\n\nextern volatile unsigned char POSTDEC2 @ 0xFDD;\n\nasm(\"POSTDEC2 equ 0FDDh\");\n\n\n\nextern volatile unsigned char POSTINC2 @ 0xFDE;\n\nasm(\"POSTINC2 equ 0FDEh\");\n\n\n\nextern volatile unsigned char INDF2 @ 0xFDF;\n\nasm(\"INDF2 equ 0FDFh\");\n\n\n\nextern volatile unsigned char BSR @ 0xFE0;\n\nasm(\"BSR equ 0FE0h\");\n\n\n\nextern volatile unsigned short FSR1 @ 0xFE1;\n\nasm(\"FSR1 equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1L @ 0xFE1;\n\nasm(\"FSR1L equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1H @ 0xFE2;\n\nasm(\"FSR1H equ 0FE2h\");\n\n\n\nextern volatile unsigned char PLUSW1 @ 0xFE3;\n\nasm(\"PLUSW1 equ 0FE3h\");\n\n\n\nextern volatile unsigned char PREINC1 @ 0xFE4;\n\nasm(\"PREINC1 equ 0FE4h\");\n\n\n\nextern volatile unsigned char POSTDEC1 @ 0xFE5;\n\nasm(\"POSTDEC1 equ 0FE5h\");\n\n\n\nextern volatile unsigned char POSTINC1 @ 0xFE6;\n\nasm(\"POSTINC1 equ 0FE6h\");\n\n\n\nextern volatile unsigned char INDF1 @ 0xFE7;\n\nasm(\"INDF1 equ 0FE7h\");\n\n\n\nextern volatile unsigned char WREG @ 0xFE8;\n\nasm(\"WREG equ 0FE8h\");\n\n\n\nextern volatile unsigned short FSR0 @ 0xFE9;\n\nasm(\"FSR0 equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0L @ 0xFE9;\n\nasm(\"FSR0L equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0H @ 0xFEA;\n\nasm(\"FSR0H equ 0FEAh\");\n\n\n\nextern volatile unsigned char PLUSW0 @ 0xFEB;\n\nasm(\"PLUSW0 equ 0FEBh\");\n\n\n\nextern volatile unsigned char PREINC0 @ 0xFEC;\n\nasm(\"PREINC0 equ 0FECh\");\n\n\n\nextern volatile unsigned char POSTDEC0 @ 0xFED;\n\nasm(\"POSTDEC0 equ 0FEDh\");\n\n\n\nextern volatile unsigned char POSTINC0 @ 0xFEE;\n\nasm(\"POSTINC0 equ 0FEEh\");\n\n\n\nextern volatile unsigned char INDF0 @ 0xFEF;\n\nasm(\"INDF0 equ 0FEFh\");\n\n\n\nextern volatile unsigned char INTCON3 @ 0xFF0;\n\nasm(\"INTCON3 equ 0FF0h\");\n\n\ntypedef union {\nstruct {\nunsigned INT1IF :1;\nunsigned INT2IF :1;\nunsigned :1;\nunsigned INT1IE :1;\nunsigned INT2IE :1;\nunsigned :1;\nunsigned INT1IP :1;\nunsigned INT2IP :1;\n};\nstruct {\nunsigned INT1F :1;\nunsigned INT2F :1;\nunsigned :1;\nunsigned INT1E :1;\nunsigned INT2E :1;\nunsigned :1;\nunsigned INT1P :1;\nunsigned INT2P :1;\n};\n} INTCON3bits_t;\nextern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n\n# 7734\nextern volatile unsigned char INTCON2 @ 0xFF1;\n\nasm(\"INTCON2 equ 0FF1h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned NOT_RBPU :1;\n};\nstruct {\nunsigned RBIP :1;\nunsigned :1;\nunsigned TMR0IP :1;\nunsigned :1;\nunsigned INTEDG2 :1;\nunsigned INTEDG1 :1;\nunsigned INTEDG0 :1;\nunsigned nRBPU :1;\n};\nstruct {\nunsigned :2;\nunsigned T0IP :1;\nunsigned :4;\nunsigned RBPU :1;\n};\n} INTCON2bits_t;\nextern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n\n# 7810\nextern volatile unsigned char INTCON @ 0xFF2;\n\nasm(\"INTCON equ 0FF2h\");\n\n\ntypedef union {\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE_GIEL :1;\nunsigned GIE_GIEH :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\nstruct {\nunsigned :1;\nunsigned INT0F :1;\nunsigned T0IF :1;\nunsigned :1;\nunsigned INT0E :1;\nunsigned T0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned :6;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\n} INTCONbits_t;\nextern volatile INTCONbits_t INTCONbits @ 0xFF2;\n\n# 7946\nextern volatile unsigned short PROD @ 0xFF3;\n\nasm(\"PROD equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODL @ 0xFF3;\n\nasm(\"PRODL equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODH @ 0xFF4;\n\nasm(\"PRODH equ 0FF4h\");\n\n\n\nextern volatile unsigned char TABLAT @ 0xFF5;\n\nasm(\"TABLAT equ 0FF5h\");\n\n\n\n\nextern volatile unsigned short long TBLPTR @ 0xFF6;\n\n\nasm(\"TBLPTR equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRL @ 0xFF6;\n\nasm(\"TBLPTRL equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRH @ 0xFF7;\n\nasm(\"TBLPTRH equ 0FF7h\");\n\n\n\nextern volatile unsigned char TBLPTRU @ 0xFF8;\n\nasm(\"TBLPTRU equ 0FF8h\");\n\n\n\n\nextern volatile unsigned short long PCLAT @ 0xFF9;\n\n\nasm(\"PCLAT equ 0FF9h\");\n\n\n\nextern volatile unsigned short long PC @ 0xFF9;\n\n\nasm(\"PC equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCL @ 0xFF9;\n\nasm(\"PCL equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCLATH @ 0xFFA;\n\nasm(\"PCLATH equ 0FFAh\");\n\n\n\nextern volatile unsigned char PCLATU @ 0xFFB;\n\nasm(\"PCLATU equ 0FFBh\");\n\n\n\nextern volatile unsigned char STKPTR @ 0xFFC;\n\nasm(\"STKPTR equ 0FFCh\");\n\n\ntypedef union {\nstruct {\nunsigned STKPTR :5;\nunsigned :1;\nunsigned STKUNF :1;\nunsigned STKFUL :1;\n};\nstruct {\nunsigned STKPTR0 :1;\nunsigned STKPTR1 :1;\nunsigned STKPTR2 :1;\nunsigned STKPTR3 :1;\nunsigned STKPTR4 :1;\n};\nstruct {\nunsigned :7;\nunsigned STKOVF :1;\n};\n} STKPTRbits_t;\nextern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n\n# 8103\nextern volatile unsigned short long TOS @ 0xFFD;\n\n\nasm(\"TOS equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSL @ 0xFFD;\n\nasm(\"TOSL equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSH @ 0xFFE;\n\nasm(\"TOSH equ 0FFEh\");\n\n\n\nextern volatile unsigned char TOSU @ 0xFFF;\n\nasm(\"TOSU equ 0FFFh\");\n\n# 8134\nextern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n\nextern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n\nextern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n\nextern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n\nextern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n\nextern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n\nextern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n\nextern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n\nextern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n\nextern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n\nextern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n\nextern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n\nextern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n\nextern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n\nextern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n\nextern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n\nextern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n\nextern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n\nextern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n\nextern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n\nextern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n\nextern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n\nextern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n\nextern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n\nextern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n\nextern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n\nextern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n\nextern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n\nextern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n\nextern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n\nextern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n\nextern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n\nextern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n\nextern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n\nextern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n\nextern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n\nextern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n\nextern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n\nextern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n\nextern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n\nextern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n\nextern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n\nextern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n\nextern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n\nextern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n\nextern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n\nextern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n\nextern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n\nextern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n\nextern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n\nextern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n\nextern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n\nextern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n\nextern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n\nextern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n\nextern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n\nextern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n\nextern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n\nextern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n\nextern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n\nextern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n\nextern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n\nextern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n\nextern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n\nextern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n\nextern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n\nextern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n\nextern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n\nextern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n\nextern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n\nextern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n\nextern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n\nextern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n\nextern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n\nextern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n\nextern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n\nextern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n\nextern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n\nextern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n\nextern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n\nextern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n\nextern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n\nextern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n\nextern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n\nextern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n\nextern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n\nextern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n\nextern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n\nextern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n\nextern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n\nextern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n\nextern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n\nextern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n\nextern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n\nextern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n\nextern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n\nextern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n\nextern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n\nextern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n\nextern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n\nextern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n\nextern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n\nextern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n\nextern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n\nextern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n\nextern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n\nextern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n\nextern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n\nextern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n\nextern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n\nextern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n\nextern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n\nextern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n\nextern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n\nextern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n\nextern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n\nextern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n\nextern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n\nextern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n\nextern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n\nextern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n\nextern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n\nextern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n\nextern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n\nextern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n\nextern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n\nextern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n\nextern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n\nextern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n\nextern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n\nextern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n\nextern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n\nextern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n\nextern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n\nextern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n\nextern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n\nextern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n\nextern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n\nextern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n\nextern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n\nextern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n\nextern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n\nextern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n\nextern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n\nextern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n\nextern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n\nextern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n\nextern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n\nextern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n\nextern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n\nextern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n\nextern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n\nextern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n\nextern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n\nextern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n\nextern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n\nextern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n\nextern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n\nextern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n\nextern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n\nextern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n\nextern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n\nextern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n\nextern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n\nextern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n\nextern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n\nextern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n\nextern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n\nextern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n\nextern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n\nextern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n\nextern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n\nextern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n\nextern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n\nextern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n\nextern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n\nextern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n\nextern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n\nextern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n\nextern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n\nextern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n\nextern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n\nextern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n\nextern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n\nextern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n\nextern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n\nextern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n\nextern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n\nextern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n\nextern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n\nextern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n\nextern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n\nextern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n\nextern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n\nextern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n\nextern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n\nextern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n\nextern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n\nextern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n\nextern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n\nextern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n\nextern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n\nextern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n\nextern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n\nextern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n\nextern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n\nextern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n\nextern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n\nextern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n\nextern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n\nextern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n\nextern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n\nextern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n\nextern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n\nextern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n\nextern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n\nextern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n\nextern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n\nextern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n\nextern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n\nextern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n\nextern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n\nextern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n\nextern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n\nextern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n\nextern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n\nextern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n\nextern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n\nextern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n\nextern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n\nextern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n\nextern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n\nextern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n\nextern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n\nextern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n\nextern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n\nextern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n\nextern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n\nextern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n\nextern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n\nextern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n\nextern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n\nextern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n\nextern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n\nextern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n\nextern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n\nextern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n\nextern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n\nextern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n\nextern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n\nextern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n\nextern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n\nextern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n\nextern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n\nextern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n\nextern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n\nextern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n\nextern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n\nextern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n\nextern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n\nextern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n\nextern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n\nextern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n\nextern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n\nextern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n\nextern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n\nextern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n\nextern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n\nextern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n\nextern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n\nextern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n\nextern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n\nextern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n\nextern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n\nextern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n\nextern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n\nextern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n\nextern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n\nextern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n\nextern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n\nextern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n\nextern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n\nextern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n\nextern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n\nextern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n\nextern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n\nextern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n\nextern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n\nextern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n\nextern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n\nextern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n\nextern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n\nextern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n\nextern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n\nextern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n\nextern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\n# 2008 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\adc.h\"\nunion ADCResult\n{\nint lr;\nchar br[2];\n};\n\nchar BusyADC (void);\n\nvoid ConvertADC (void);\n\nvoid CloseADC(void);\n\n# 2026\nint ReadADC(void);\n\n# 2040\nvoid OpenADC ( unsigned char ,\nunsigned char ,\nunsigned char );\n\n# 2084\nvoid SetChanADC(unsigned char );\n\n# 2100\nvoid SelChanConvADC( unsigned char );\n\n# 38 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\ancomp.h\"\nvoid Close_ancomp( void );\nvoid Open_ancomp(unsigned char config);\n\n# 584 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\spi.h\"\nvoid OpenSPI( unsigned char sync_mode,\nunsigned char bus_mode,\nunsigned char smp_phase );\n\nsigned char WriteSPI( unsigned char data_out );\n\nvoid getsSPI( unsigned char *rdptr, unsigned char length );\n\nvoid putsSPI( unsigned char *wrptr );\n\nunsigned char ReadSPI( void );\n\n# 414 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\can2510.h\"\nvoid CAN2510Initialize(  unsigned int configuration,\n unsigned char brp,\n unsigned char interruptFlags,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nsigned char CAN2510Init(  unsigned long BufferConfig,\n unsigned long BitTimeConfig,\n unsigned char interruptEnables,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nvoid CAN2510Enable( void );\n\nvoid CAN2510Disable( void );\n\nvoid CAN2510Reset( void );\n\nvoid CAN2510SetMode(  unsigned char mode );\n\nunsigned char CAN2510ReadMode( void );\n\nunsigned char CAN2510ReadStatus( void );\n\nunsigned char CAN2510ErrorState( void );\n\nunsigned char CAN2510InterruptStatus( void );\n\nvoid CAN2510InterruptEnable( unsigned char interruptFlags );\n\nunsigned char CAN2510ByteRead(  unsigned char addr );\n\nvoid CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n\nvoid CAN2510SequentialRead(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510SequentialWrite(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510BitModify(  unsigned char address,\n unsigned char mask,\n unsigned char data );\n\nvoid CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n\nvoid CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n\nvoid CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n\nvoid CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n\nsigned char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n unsigned int mask,\n unsigned int *filters );\n\nsigned char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n unsigned long mask,\n unsigned long *filters );\n\nsigned char CAN2510WriteStd(  unsigned int msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nsigned char CAN2510WriteXtd(  unsigned long msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadRTRStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes );\n\nvoid CAN2510LoadRTRXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes );\n\nvoid CAN2510SetBufferPriority(  unsigned char bufferNum,\n unsigned char bufferPriority );\n\nvoid CAN2510SendBuffer(  unsigned char bufferNumber );\n\nsigned char CAN2510WriteBuffer(  unsigned char bufferNum );\n\nunsigned char CAN2510DataReady(  unsigned char bufferNum );\n\nunsigned char CAN2510DataRead(  unsigned char bufferNum,\n unsigned long *msgId,\n unsigned char *numBytes,\n unsigned char *data );\n\n# 64 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\capture.h\"\nunion capstatus\n{\n\n# 73\nstruct\n{\n\n# 77\nunsigned Cap1OVF:1;\n\n# 82\nunsigned Cap2OVF:1;\n\n# 115\n};\n\nunsigned :8;\n\n};\n\nextern union capstatus CapStatus;\n\nunion CapResult\n{\nunsigned int lc;\nchar bc[2];\n};\n\n# 474\nvoid OpenCapture1 ( unsigned char config);\nunsigned int ReadCapture1 (void);\nvoid CloseCapture1 (void);\n\n# 484\nvoid OpenCapture2 ( unsigned char config);\nunsigned int ReadCapture2 (void);\nvoid CloseCapture2 (void);\n\n# 385 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\compare.h\"\nvoid OpenCompare1(unsigned char config,unsigned int period);\nvoid CloseCompare1(void);\n\n# 392\nvoid OpenCompare2(unsigned char config, unsigned int period);\nvoid CloseCompare2(void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\EEP.h\"\nvoid Busy_eep ( void );\nunsigned char Read_b_eep( unsigned int badd );\nvoid Write_b_eep( unsigned int badd, unsigned char bdata );\n\n# 2 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stddef.h\"\ntypedef int ptrdiff_t;\ntypedef unsigned size_t;\ntypedef unsigned short wchar_t;\n\n# 13\nextern int errno;\n\n# 65 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\GenericTypeDefs.h\"\ntypedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n\n\ntypedef enum _BIT { CLEAR = 0, SET } BIT;\n\n# 75\ntypedef signed int INT;\ntypedef signed char INT8;\ntypedef signed short int INT16;\ntypedef signed long int INT32;\n\n\n\n typedef signed long long INT64;\n\n\n\ntypedef unsigned int UINT;\ntypedef unsigned char UINT8;\ntypedef unsigned short int UINT16;\n\n# 93\ntypedef unsigned long int UINT32;\n\n\n typedef unsigned long long UINT64;\n\n\ntypedef union\n{\nUINT8 Val;\nstruct\n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n} bits;\n} UINT8_VAL, UINT8_BITS;\n\ntypedef union\n{\nUINT16 Val;\nUINT8 v[2] ;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\n} byte;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n} bits;\n} UINT16_VAL, UINT16_BITS;\n\n# 187\ntypedef union\n{\nUINT32 Val;\nUINT16 w[2] ;\nUINT8 v[4] ;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\n} word;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\nUINT8 UB;\nUINT8 MB;\n} byte;\nstruct \n{\nUINT16_VAL low;\nUINT16_VAL high;\n}wordUnion;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n} bits;\n} UINT32_VAL;\n\n\n\ntypedef union\n{\nUINT64 Val;\nUINT32 d[2] ;\nUINT16 w[4] ;\nUINT8 v[8] ;\nstruct \n{\nUINT32 LD;\nUINT32 HD;\n} dword;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\nUINT16 UW;\nUINT16 MW;\n} word;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n UINT8 b32:1;\n UINT8 b33:1;\n UINT8 b34:1;\n UINT8 b35:1;\n UINT8 b36:1;\n UINT8 b37:1;\n UINT8 b38:1;\n UINT8 b39:1;\n UINT8 b40:1;\n UINT8 b41:1;\n UINT8 b42:1;\n UINT8 b43:1;\n UINT8 b44:1;\n UINT8 b45:1;\n UINT8 b46:1;\n UINT8 b47:1;\n UINT8 b48:1;\n UINT8 b49:1;\n UINT8 b50:1;\n UINT8 b51:1;\n UINT8 b52:1;\n UINT8 b53:1;\n UINT8 b54:1;\n UINT8 b55:1;\n UINT8 b56:1;\n UINT8 b57:1;\n UINT8 b58:1;\n UINT8 b59:1;\n UINT8 b60:1;\n UINT8 b61:1;\n UINT8 b62:1;\n UINT8 b63:1;\n} bits;\n} UINT64_VAL;\n\n# 339\ntypedef void VOID;\n\ntypedef char CHAR8;\ntypedef unsigned char UCHAR8;\n\ntypedef unsigned char BYTE;\ntypedef unsigned short int WORD;\ntypedef unsigned long DWORD;\n\n\ntypedef unsigned long long QWORD;\ntypedef signed char CHAR;\ntypedef signed short int SHORT;\ntypedef signed long LONG;\n\n\ntypedef signed long long LONGLONG;\ntypedef union\n{\nBYTE Val;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n} bits;\n} BYTE_VAL, BYTE_BITS;\n\ntypedef union\n{\nWORD Val;\nBYTE v[2] ;\nstruct \n{\nBYTE LB;\nBYTE HB;\n} byte;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n} bits;\n} WORD_VAL, WORD_BITS;\n\ntypedef union\n{\nDWORD Val;\nWORD w[2] ;\nBYTE v[4] ;\nstruct \n{\nWORD LW;\nWORD HW;\n} word;\nstruct \n{\nBYTE LB;\nBYTE HB;\nBYTE UB;\nBYTE MB;\n} byte;\nstruct \n{\nWORD_VAL low;\nWORD_VAL high;\n}wordUnion;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n} bits;\n} DWORD_VAL;\n\n\ntypedef union\n{\nQWORD Val;\nDWORD d[2] ;\nWORD w[4] ;\nBYTE v[8] ;\nstruct \n{\nDWORD LD;\nDWORD HD;\n} dword;\nstruct \n{\nWORD LW;\nWORD HW;\nWORD UW;\nWORD MW;\n} word;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n BYTE b32:1;\n BYTE b33:1;\n BYTE b34:1;\n BYTE b35:1;\n BYTE b36:1;\n BYTE b37:1;\n BYTE b38:1;\n BYTE b39:1;\n BYTE b40:1;\n BYTE b41:1;\n BYTE b42:1;\n BYTE b43:1;\n BYTE b44:1;\n BYTE b45:1;\n BYTE b46:1;\n BYTE b47:1;\n BYTE b48:1;\n BYTE b49:1;\n BYTE b50:1;\n BYTE b51:1;\n BYTE b52:1;\n BYTE b53:1;\n BYTE b54:1;\n BYTE b55:1;\n BYTE b56:1;\n BYTE b57:1;\n BYTE b58:1;\n BYTE b59:1;\n BYTE b60:1;\n BYTE b61:1;\n BYTE b62:1;\n BYTE b63:1;\n} bits;\n} QWORD_VAL;\n\n# 113 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\flash.h\"\nextern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 120\nextern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n\nextern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n\nextern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 775 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\i2c.h\"\nvoid IdleI2C( void );\n\nvoid OpenI2C( unsigned char sync_mode, unsigned char slew );\n\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char putsI2C( unsigned char *wrptr );\n\nunsigned char ReadI2C( void );\n\nvoid CloseI2C( void );\n\n# 899\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char getsI2C( unsigned char *rdptr, unsigned char length );\n\n# 908\nsigned char EEAckPolling( unsigned char control );\n\nsigned char EEByteWrite( unsigned char control,\nunsigned char address,\nunsigned char data );\n\nsigned int EECurrentAddRead( unsigned char control );\n\nsigned char EEPageWrite( unsigned char control,\nunsigned char address,\nunsigned char *wrptr );\n\nsigned int EERandomRead( unsigned char control, unsigned char address );\n\nsigned char EESequentialRead( unsigned char control,\nunsigned char address,\nunsigned char *rdptr,\nunsigned char length );\n\n# 325 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\mwire.h\"\nvoid OpenMwire( unsigned char sync_mode );\n\nunsigned char ReadMwire( unsigned char high_byte,\nunsigned char low_byte );\n\n# 341\nsigned char WriteMwire( unsigned char data_out );\n\n# 354\nvoid getsMwire( unsigned char *rdptr, unsigned char length );\n\n# 126 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\portb.h\"\nvoid OpenPORTB( unsigned char config);\n\n# 176\nvoid OpenRB0INT( unsigned char config);\n\n# 194\nvoid OpenRB1INT( unsigned char config);\n\n# 211\nvoid OpenRB2INT( unsigned char config);\n\n# 85 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\pwm.h\"\nunion PWMDC\n{\nunsigned int lpwm;\nchar bpwm[2];\n};\n\n# 467\nvoid OpenPWM1 ( char period);\nvoid SetDCPWM1 ( unsigned int duty_cycle);\n\n# 477\nvoid ClosePWM1 (void);\n\n# 485\nvoid OpenPWM2 ( char period);\nvoid SetDCPWM2( unsigned int duty_cycle);\n\n# 492\nvoid ClosePWM2 (void);\n\n# 16 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\reset.h\"\nchar isMCLR(void);\nvoid StatusReset(void);\nchar isPOR(void);\nchar isWU(void);\n\n\nchar isBOR(void);\n\n\n\nchar isWDTTO(void);\nchar isWDTWU(void);\n\n\n\nchar isLVD(void);\n\n# 687 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\rtcc.h\"\nvoid Open_RTCC(void);\nvoid Close_RTCC(void);\nunsigned char update_RTCC(void);\n\n# 97 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_i2c.h\"\nvoid SWStopI2C ( void );\nvoid SWStartI2C ( void );\nvoid SWRestartI2C ( void );\nvoid SWStopI2C ( void );\n\nsigned char SWAckI2C( void );\nsigned char Clock_test( void );\nsigned int SWReadI2C( void );\nsigned char SWWriteI2C(  unsigned char data_out );\nsigned char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\nsigned char SWPutsI2C(  unsigned char *wrptr );\n\n# 84 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_spi.h\"\nvoid OpenSWSPI(void);\n\n\nchar WriteSWSPI( char output);\n\n\nvoid SetCSSWSPI(void);\n\n\nvoid ClearCSSWSPI(void);\n\n# 47 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_uart.h\"\nvoid OpenUART(void);\n\nunsigned char ReadUART(void);\n\nvoid WriteUART( unsigned char);\n\nvoid getsUART( char *, unsigned char);\n\nvoid putsUART( char *);\n\n# 79\nextern void DelayRXBitUART (void);\nextern void DelayRXHalfBitUART(void);\nextern void DelayTXBitUART (void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\timers.h\"\nunion Timers\n{\nunsigned int lt;\nchar bt[2];\n};\n\n# 118\nvoid OpenTimer0 ( unsigned char config);\nvoid CloseTimer0 (void);\nunsigned int ReadTimer0 (void);\nvoid WriteTimer0 ( unsigned int timer0);\n\n# 236\nvoid OpenTimer1 ( unsigned char config);\nvoid CloseTimer1 (void);\nunsigned int ReadTimer1 (void);\nvoid WriteTimer1 ( unsigned int timer1);\n\n# 325\nvoid OpenTimer2 ( unsigned char config);\nvoid CloseTimer2 (void);\n\n# 391\nvoid OpenTimer3 ( unsigned char config);\nvoid CloseTimer3 (void);\nunsigned int ReadTimer3 (void);\nvoid WriteTimer3 ( unsigned int timer3);\n\n# 1179\nvoid SetTmrCCPSrc( unsigned char );\n\n# 568 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\usart.h\"\nunion USART\n{\nunsigned char val;\nstruct\n{\nunsigned RX_NINE:1;\nunsigned TX_NINE:1;\nunsigned FRAME_ERROR:1;\nunsigned OVERRUN_ERROR:1;\nunsigned fill:4;\n};\n};\nextern union USART USART_Status;\nvoid OpenUSART ( unsigned char config, unsigned spbrg);\n\n# 596\nchar ReadUSART (void);\nvoid WriteUSART ( char data);\nvoid getsUSART ( char *buffer, unsigned char len);\nvoid putsUSART ( char *data);\nvoid putrsUSART ( const  char *data);\n\n# 654\nvoid baudUSART ( unsigned char baudconfig);\n\n# 87 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\xlcd.h\"\nvoid OpenXLCD( unsigned char);\n\n# 92\nvoid SetCGRamAddr( unsigned char);\n\n# 97\nvoid SetDDRamAddr( unsigned char);\n\n# 102\nunsigned char BusyXLCD(void);\n\n# 107\nunsigned char ReadAddrXLCD(void);\n\n# 112\nchar ReadDataXLCD(void);\n\n# 117\nvoid WriteCmdXLCD( unsigned char);\n\n# 122\nvoid WriteDataXLCD( char);\n\n# 132\nvoid putsXLCD( char *);\n\n# 137\nvoid putrsXLCD(const char *);\n\n\nextern void DelayFor18TCY(void);\nextern void DelayPORXLCD(void);\nextern void DelayXLCD(void);\n\n# 18 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18.h\"\n__attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *);\n\n\n# 143\n#pragma intrinsic(_delay)\nextern void _delay(unsigned long);\n#pragma intrinsic(_delaywdt)\nextern void _delaywdt(unsigned long);\n#pragma intrinsic(_delay3)\nextern void _delay3(unsigned char);\n\n# 3 \"io.c\"\nvolatile uint8_t * portptrs[] =\n{\n\n&PORTA,\n\n\n&PORTB,\n\n\n&PORTC,\n\n# 18\n&PORTE,\n\n\n};\n\nvolatile uint8_t * trisptrs[] =\n{\n\n&TRISA,\n\n\n&TRISB,\n\n\n&TRISC\n\n# 40\n};\n\nconst uint8_t mask[] =\n{\n0x01,\n0x02,\n0x04,\n0x08,\n0x10,\n0x20,\n0x40,\n0x80\n};\n\n\nvoid io_mode( uint8_t pin, uint8_t value )\n{\nuint8_t port = pin / 8;\nuint8_t num = pin % 8;\n\nuint8_t now = *(trisptrs[port]);\n\nif( value == 0 )\nnow &= ~mask[num];\nelse\nnow |= mask[num];\n\n*(trisptrs[port]) = now;\n}\n\nvoid io_write( uint8_t pin, uint8_t value )\n{\nuint8_t port = pin / 8;\nuint8_t num = pin % 8;\n\nuint8_t now = *(portptrs[port]);\n\nif( value == 0 )\nnow &= ~mask[num];\nelse\nnow |= mask[num];\n\n*(portptrs[port]) = now;\n}\n\n\nuint8_t io_read( uint8_t pin )\n{\nuint8_t port = pin / 8;\nuint8_t num = pin % 8;\n\nuint8_t now = *(portptrs[port]);\n\nif( now & mask[num])\nreturn 1;\nelse\nreturn 0;\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/main.p1",
    "content": "Version 3.2 HI-TECH Software Intermediate Code\n[c E4687 0 1 .. ]\n[n E4687 enCtrlDirs E_PID_DIRECT E_PID_REVERSE  ]\n[s S518 `*f 1 `*f 1 `*f 1 `f 1 `f 1 `f 1 `f 1 `f 1 `f 1 `f 1 `ul 1 `ul 1 `uc 1 `E4687 1 ]\n[n S518 pid_controller input output setpoint Kp Ki Kd omin omax iterm lastin lasttime sampletime automode direction ]\n[s S519 `uc 1 `uc 1 ]\n[n S519 thermocuple_struct spi cspin ]\n[p mainexit ]\n[c E4736 1 2 3 4 .. ]\n[n E4736 enSPIModules E_SPI_1 E_SPI_2 E_SPI_3 E_SPI_4  ]\n\"86 ../SPI/SPI.h\n[v _spi_init `(uc ~T0 @X0 0 ef1`E4736 ]\n\"99\n[v _spi_control `(uc ~T0 @X0 0 ef3`uc`ul`ul ]\n\"58 tc.h\n[v _tc_init `(S519 ~T0 @X0 0 ef2`uc`uc ]\n\"90 ../PID.h\n[v _pid_create `(*S518 ~T0 @X0 0 ef7`*S518`*f`*f`*f`f`f`f ]\n\"135\n[v _pid_limits `(v ~T0 @X0 0 ef3`*S518`f`f ]\n\"146\n[v _pid_auto `(v ~T0 @X0 0 ef1`*S518 ]\n\"62 ../Tick/Tick.h\n[v _tick_get `(ul ~T0 @X0 0 ef ]\n\"82 tc.h\n[v _tc_read_float `(f ~T0 @X0 0 ef1`*S519 ]\n\"103 ../PID.h\n[v _pid_compute `(uc ~T0 @X0 0 ef1`*S518 ]\n[; ;pic18f2550.h: 44: extern volatile unsigned short UFRM @ 0xF66;\n\"46 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[; ;pic18f2550.h: 46: asm(\"UFRM equ 0F66h\");\n[; <\" UFRM equ 0F66h ;# \">\n[; ;pic18f2550.h: 50: extern volatile unsigned char UFRML @ 0xF66;\n\"52\n[; ;pic18f2550.h: 52: asm(\"UFRML equ 0F66h\");\n[; <\" UFRML equ 0F66h ;# \">\n[; ;pic18f2550.h: 55: typedef union {\n[; ;pic18f2550.h: 56: struct {\n[; ;pic18f2550.h: 57: unsigned FRM :8;\n[; ;pic18f2550.h: 58: };\n[; ;pic18f2550.h: 59: struct {\n[; ;pic18f2550.h: 60: unsigned FRM0 :1;\n[; ;pic18f2550.h: 61: unsigned FRM1 :1;\n[; ;pic18f2550.h: 62: unsigned FRM2 :1;\n[; ;pic18f2550.h: 63: unsigned FRM3 :1;\n[; ;pic18f2550.h: 64: unsigned FRM4 :1;\n[; ;pic18f2550.h: 65: unsigned FRM5 :1;\n[; ;pic18f2550.h: 66: unsigned FRM6 :1;\n[; ;pic18f2550.h: 67: unsigned FRM7 :1;\n[; ;pic18f2550.h: 68: };\n[; ;pic18f2550.h: 69: struct {\n[; ;pic18f2550.h: 70: unsigned FRML :8;\n[; ;pic18f2550.h: 71: };\n[; ;pic18f2550.h: 72: } UFRMLbits_t;\n[; ;pic18f2550.h: 73: extern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n[; ;pic18f2550.h: 127: extern volatile unsigned char UFRMH @ 0xF67;\n\"129\n[; ;pic18f2550.h: 129: asm(\"UFRMH equ 0F67h\");\n[; <\" UFRMH equ 0F67h ;# \">\n[; ;pic18f2550.h: 132: typedef union {\n[; ;pic18f2550.h: 133: struct {\n[; ;pic18f2550.h: 134: unsigned FRM :3;\n[; ;pic18f2550.h: 135: };\n[; ;pic18f2550.h: 136: struct {\n[; ;pic18f2550.h: 137: unsigned FRM8 :1;\n[; ;pic18f2550.h: 138: unsigned FRM9 :1;\n[; ;pic18f2550.h: 139: unsigned FRM10 :1;\n[; ;pic18f2550.h: 140: };\n[; ;pic18f2550.h: 141: } UFRMHbits_t;\n[; ;pic18f2550.h: 142: extern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n[; ;pic18f2550.h: 166: extern volatile unsigned char UIR @ 0xF68;\n\"168\n[; ;pic18f2550.h: 168: asm(\"UIR equ 0F68h\");\n[; <\" UIR equ 0F68h ;# \">\n[; ;pic18f2550.h: 171: typedef union {\n[; ;pic18f2550.h: 172: struct {\n[; ;pic18f2550.h: 173: unsigned URSTIF :1;\n[; ;pic18f2550.h: 174: unsigned UERRIF :1;\n[; ;pic18f2550.h: 175: unsigned ACTVIF :1;\n[; ;pic18f2550.h: 176: unsigned TRNIF :1;\n[; ;pic18f2550.h: 177: unsigned IDLEIF :1;\n[; ;pic18f2550.h: 178: unsigned STALLIF :1;\n[; ;pic18f2550.h: 179: unsigned SOFIF :1;\n[; ;pic18f2550.h: 180: };\n[; ;pic18f2550.h: 181: } UIRbits_t;\n[; ;pic18f2550.h: 182: extern volatile UIRbits_t UIRbits @ 0xF68;\n[; ;pic18f2550.h: 221: extern volatile unsigned char UIE @ 0xF69;\n\"223\n[; ;pic18f2550.h: 223: asm(\"UIE equ 0F69h\");\n[; <\" UIE equ 0F69h ;# \">\n[; ;pic18f2550.h: 226: typedef union {\n[; ;pic18f2550.h: 227: struct {\n[; ;pic18f2550.h: 228: unsigned URSTIE :1;\n[; ;pic18f2550.h: 229: unsigned UERRIE :1;\n[; ;pic18f2550.h: 230: unsigned ACTVIE :1;\n[; ;pic18f2550.h: 231: unsigned TRNIE :1;\n[; ;pic18f2550.h: 232: unsigned IDLEIE :1;\n[; ;pic18f2550.h: 233: unsigned STALLIE :1;\n[; ;pic18f2550.h: 234: unsigned SOFIE :1;\n[; ;pic18f2550.h: 235: };\n[; ;pic18f2550.h: 236: } UIEbits_t;\n[; ;pic18f2550.h: 237: extern volatile UIEbits_t UIEbits @ 0xF69;\n[; ;pic18f2550.h: 276: extern volatile unsigned char UEIR @ 0xF6A;\n\"278\n[; ;pic18f2550.h: 278: asm(\"UEIR equ 0F6Ah\");\n[; <\" UEIR equ 0F6Ah ;# \">\n[; ;pic18f2550.h: 281: typedef union {\n[; ;pic18f2550.h: 282: struct {\n[; ;pic18f2550.h: 283: unsigned PIDEF :1;\n[; ;pic18f2550.h: 284: unsigned CRC5EF :1;\n[; ;pic18f2550.h: 285: unsigned CRC16EF :1;\n[; ;pic18f2550.h: 286: unsigned DFN8EF :1;\n[; ;pic18f2550.h: 287: unsigned BTOEF :1;\n[; ;pic18f2550.h: 288: unsigned :2;\n[; ;pic18f2550.h: 289: unsigned BTSEF :1;\n[; ;pic18f2550.h: 290: };\n[; ;pic18f2550.h: 291: } UEIRbits_t;\n[; ;pic18f2550.h: 292: extern volatile UEIRbits_t UEIRbits @ 0xF6A;\n[; ;pic18f2550.h: 326: extern volatile unsigned char UEIE @ 0xF6B;\n\"328\n[; ;pic18f2550.h: 328: asm(\"UEIE equ 0F6Bh\");\n[; <\" UEIE equ 0F6Bh ;# \">\n[; ;pic18f2550.h: 331: typedef union {\n[; ;pic18f2550.h: 332: struct {\n[; ;pic18f2550.h: 333: unsigned PIDEE :1;\n[; ;pic18f2550.h: 334: unsigned CRC5EE :1;\n[; ;pic18f2550.h: 335: unsigned CRC16EE :1;\n[; ;pic18f2550.h: 336: unsigned DFN8EE :1;\n[; ;pic18f2550.h: 337: unsigned BTOEE :1;\n[; ;pic18f2550.h: 338: unsigned :2;\n[; ;pic18f2550.h: 339: unsigned BTSEE :1;\n[; ;pic18f2550.h: 340: };\n[; ;pic18f2550.h: 341: } UEIEbits_t;\n[; ;pic18f2550.h: 342: extern volatile UEIEbits_t UEIEbits @ 0xF6B;\n[; ;pic18f2550.h: 376: extern volatile unsigned char USTAT @ 0xF6C;\n\"378\n[; ;pic18f2550.h: 378: asm(\"USTAT equ 0F6Ch\");\n[; <\" USTAT equ 0F6Ch ;# \">\n[; ;pic18f2550.h: 381: typedef union {\n[; ;pic18f2550.h: 382: struct {\n[; ;pic18f2550.h: 383: unsigned :1;\n[; ;pic18f2550.h: 384: unsigned PPBI :1;\n[; ;pic18f2550.h: 385: unsigned DIR :1;\n[; ;pic18f2550.h: 386: unsigned ENDP :4;\n[; ;pic18f2550.h: 387: };\n[; ;pic18f2550.h: 388: struct {\n[; ;pic18f2550.h: 389: unsigned :3;\n[; ;pic18f2550.h: 390: unsigned ENDP0 :1;\n[; ;pic18f2550.h: 391: unsigned ENDP1 :1;\n[; ;pic18f2550.h: 392: unsigned ENDP2 :1;\n[; ;pic18f2550.h: 393: unsigned ENDP3 :1;\n[; ;pic18f2550.h: 394: };\n[; ;pic18f2550.h: 395: } USTATbits_t;\n[; ;pic18f2550.h: 396: extern volatile USTATbits_t USTATbits @ 0xF6C;\n[; ;pic18f2550.h: 435: extern volatile unsigned char UCON @ 0xF6D;\n\"437\n[; ;pic18f2550.h: 437: asm(\"UCON equ 0F6Dh\");\n[; <\" UCON equ 0F6Dh ;# \">\n[; ;pic18f2550.h: 440: typedef union {\n[; ;pic18f2550.h: 441: struct {\n[; ;pic18f2550.h: 442: unsigned :1;\n[; ;pic18f2550.h: 443: unsigned SUSPND :1;\n[; ;pic18f2550.h: 444: unsigned RESUME :1;\n[; ;pic18f2550.h: 445: unsigned USBEN :1;\n[; ;pic18f2550.h: 446: unsigned PKTDIS :1;\n[; ;pic18f2550.h: 447: unsigned SE0 :1;\n[; ;pic18f2550.h: 448: unsigned PPBRST :1;\n[; ;pic18f2550.h: 449: };\n[; ;pic18f2550.h: 450: } UCONbits_t;\n[; ;pic18f2550.h: 451: extern volatile UCONbits_t UCONbits @ 0xF6D;\n[; ;pic18f2550.h: 485: extern volatile unsigned char UADDR @ 0xF6E;\n\"487\n[; ;pic18f2550.h: 487: asm(\"UADDR equ 0F6Eh\");\n[; <\" UADDR equ 0F6Eh ;# \">\n[; ;pic18f2550.h: 490: typedef union {\n[; ;pic18f2550.h: 491: struct {\n[; ;pic18f2550.h: 492: unsigned ADDR :7;\n[; ;pic18f2550.h: 493: };\n[; ;pic18f2550.h: 494: struct {\n[; ;pic18f2550.h: 495: unsigned ADDR0 :1;\n[; ;pic18f2550.h: 496: unsigned ADDR1 :1;\n[; ;pic18f2550.h: 497: unsigned ADDR2 :1;\n[; ;pic18f2550.h: 498: unsigned ADDR3 :1;\n[; ;pic18f2550.h: 499: unsigned ADDR4 :1;\n[; ;pic18f2550.h: 500: unsigned ADDR5 :1;\n[; ;pic18f2550.h: 501: unsigned ADDR6 :1;\n[; ;pic18f2550.h: 502: };\n[; ;pic18f2550.h: 503: } UADDRbits_t;\n[; ;pic18f2550.h: 504: extern volatile UADDRbits_t UADDRbits @ 0xF6E;\n[; ;pic18f2550.h: 548: extern volatile unsigned char UCFG @ 0xF6F;\n\"550\n[; ;pic18f2550.h: 550: asm(\"UCFG equ 0F6Fh\");\n[; <\" UCFG equ 0F6Fh ;# \">\n[; ;pic18f2550.h: 553: typedef union {\n[; ;pic18f2550.h: 554: struct {\n[; ;pic18f2550.h: 555: unsigned PPB :2;\n[; ;pic18f2550.h: 556: unsigned FSEN :1;\n[; ;pic18f2550.h: 557: unsigned UTRDIS :1;\n[; ;pic18f2550.h: 558: unsigned UPUEN :1;\n[; ;pic18f2550.h: 559: unsigned :1;\n[; ;pic18f2550.h: 560: unsigned UOEMON :1;\n[; ;pic18f2550.h: 561: unsigned UTEYE :1;\n[; ;pic18f2550.h: 562: };\n[; ;pic18f2550.h: 563: struct {\n[; ;pic18f2550.h: 564: unsigned PPB0 :1;\n[; ;pic18f2550.h: 565: unsigned PPB1 :1;\n[; ;pic18f2550.h: 566: };\n[; ;pic18f2550.h: 567: struct {\n[; ;pic18f2550.h: 568: unsigned UPP0 :1;\n[; ;pic18f2550.h: 569: };\n[; ;pic18f2550.h: 570: struct {\n[; ;pic18f2550.h: 571: unsigned :1;\n[; ;pic18f2550.h: 572: unsigned UPP1 :1;\n[; ;pic18f2550.h: 573: };\n[; ;pic18f2550.h: 574: } UCFGbits_t;\n[; ;pic18f2550.h: 575: extern volatile UCFGbits_t UCFGbits @ 0xF6F;\n[; ;pic18f2550.h: 629: extern volatile unsigned char UEP0 @ 0xF70;\n\"631\n[; ;pic18f2550.h: 631: asm(\"UEP0 equ 0F70h\");\n[; <\" UEP0 equ 0F70h ;# \">\n[; ;pic18f2550.h: 634: typedef union {\n[; ;pic18f2550.h: 635: struct {\n[; ;pic18f2550.h: 636: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 637: unsigned EPINEN :1;\n[; ;pic18f2550.h: 638: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 639: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 640: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 641: };\n[; ;pic18f2550.h: 642: struct {\n[; ;pic18f2550.h: 643: unsigned :3;\n[; ;pic18f2550.h: 644: unsigned EP0CONDIS :1;\n[; ;pic18f2550.h: 645: };\n[; ;pic18f2550.h: 646: struct {\n[; ;pic18f2550.h: 647: unsigned :4;\n[; ;pic18f2550.h: 648: unsigned EP0HSHK :1;\n[; ;pic18f2550.h: 649: };\n[; ;pic18f2550.h: 650: struct {\n[; ;pic18f2550.h: 651: unsigned :1;\n[; ;pic18f2550.h: 652: unsigned EP0INEN :1;\n[; ;pic18f2550.h: 653: };\n[; ;pic18f2550.h: 654: struct {\n[; ;pic18f2550.h: 655: unsigned :2;\n[; ;pic18f2550.h: 656: unsigned EP0OUTEN :1;\n[; ;pic18f2550.h: 657: };\n[; ;pic18f2550.h: 658: struct {\n[; ;pic18f2550.h: 659: unsigned EP0STALL :1;\n[; ;pic18f2550.h: 660: };\n[; ;pic18f2550.h: 661: struct {\n[; ;pic18f2550.h: 662: unsigned :3;\n[; ;pic18f2550.h: 663: unsigned EPCONDIS0 :1;\n[; ;pic18f2550.h: 664: };\n[; ;pic18f2550.h: 665: struct {\n[; ;pic18f2550.h: 666: unsigned :4;\n[; ;pic18f2550.h: 667: unsigned EPHSHK0 :1;\n[; ;pic18f2550.h: 668: };\n[; ;pic18f2550.h: 669: struct {\n[; ;pic18f2550.h: 670: unsigned :1;\n[; ;pic18f2550.h: 671: unsigned EPINEN0 :1;\n[; ;pic18f2550.h: 672: };\n[; ;pic18f2550.h: 673: struct {\n[; ;pic18f2550.h: 674: unsigned :2;\n[; ;pic18f2550.h: 675: unsigned EPOUTEN0 :1;\n[; ;pic18f2550.h: 676: };\n[; ;pic18f2550.h: 677: struct {\n[; ;pic18f2550.h: 678: unsigned EPSTALL0 :1;\n[; ;pic18f2550.h: 679: };\n[; ;pic18f2550.h: 680: } UEP0bits_t;\n[; ;pic18f2550.h: 681: extern volatile UEP0bits_t UEP0bits @ 0xF70;\n[; ;pic18f2550.h: 760: extern volatile unsigned char UEP1 @ 0xF71;\n\"762\n[; ;pic18f2550.h: 762: asm(\"UEP1 equ 0F71h\");\n[; <\" UEP1 equ 0F71h ;# \">\n[; ;pic18f2550.h: 765: typedef union {\n[; ;pic18f2550.h: 766: struct {\n[; ;pic18f2550.h: 767: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 768: unsigned EPINEN :1;\n[; ;pic18f2550.h: 769: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 770: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 771: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 772: };\n[; ;pic18f2550.h: 773: struct {\n[; ;pic18f2550.h: 774: unsigned :3;\n[; ;pic18f2550.h: 775: unsigned EP1CONDIS :1;\n[; ;pic18f2550.h: 776: };\n[; ;pic18f2550.h: 777: struct {\n[; ;pic18f2550.h: 778: unsigned :4;\n[; ;pic18f2550.h: 779: unsigned EP1HSHK :1;\n[; ;pic18f2550.h: 780: };\n[; ;pic18f2550.h: 781: struct {\n[; ;pic18f2550.h: 782: unsigned :1;\n[; ;pic18f2550.h: 783: unsigned EP1INEN :1;\n[; ;pic18f2550.h: 784: };\n[; ;pic18f2550.h: 785: struct {\n[; ;pic18f2550.h: 786: unsigned :2;\n[; ;pic18f2550.h: 787: unsigned EP1OUTEN :1;\n[; ;pic18f2550.h: 788: };\n[; ;pic18f2550.h: 789: struct {\n[; ;pic18f2550.h: 790: unsigned EP1STALL :1;\n[; ;pic18f2550.h: 791: };\n[; ;pic18f2550.h: 792: struct {\n[; ;pic18f2550.h: 793: unsigned :3;\n[; ;pic18f2550.h: 794: unsigned EPCONDIS1 :1;\n[; ;pic18f2550.h: 795: };\n[; ;pic18f2550.h: 796: struct {\n[; ;pic18f2550.h: 797: unsigned :4;\n[; ;pic18f2550.h: 798: unsigned EPHSHK1 :1;\n[; ;pic18f2550.h: 799: };\n[; ;pic18f2550.h: 800: struct {\n[; ;pic18f2550.h: 801: unsigned :1;\n[; ;pic18f2550.h: 802: unsigned EPINEN1 :1;\n[; ;pic18f2550.h: 803: };\n[; ;pic18f2550.h: 804: struct {\n[; ;pic18f2550.h: 805: unsigned :2;\n[; ;pic18f2550.h: 806: unsigned EPOUTEN1 :1;\n[; ;pic18f2550.h: 807: };\n[; ;pic18f2550.h: 808: struct {\n[; ;pic18f2550.h: 809: unsigned EPSTALL1 :1;\n[; ;pic18f2550.h: 810: };\n[; ;pic18f2550.h: 811: } UEP1bits_t;\n[; ;pic18f2550.h: 812: extern volatile UEP1bits_t UEP1bits @ 0xF71;\n[; ;pic18f2550.h: 891: extern volatile unsigned char UEP2 @ 0xF72;\n\"893\n[; ;pic18f2550.h: 893: asm(\"UEP2 equ 0F72h\");\n[; <\" UEP2 equ 0F72h ;# \">\n[; ;pic18f2550.h: 896: typedef union {\n[; ;pic18f2550.h: 897: struct {\n[; ;pic18f2550.h: 898: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 899: unsigned EPINEN :1;\n[; ;pic18f2550.h: 900: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 901: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 902: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 903: };\n[; ;pic18f2550.h: 904: struct {\n[; ;pic18f2550.h: 905: unsigned :3;\n[; ;pic18f2550.h: 906: unsigned EP2CONDIS :1;\n[; ;pic18f2550.h: 907: };\n[; ;pic18f2550.h: 908: struct {\n[; ;pic18f2550.h: 909: unsigned :4;\n[; ;pic18f2550.h: 910: unsigned EP2HSHK :1;\n[; ;pic18f2550.h: 911: };\n[; ;pic18f2550.h: 912: struct {\n[; ;pic18f2550.h: 913: unsigned :1;\n[; ;pic18f2550.h: 914: unsigned EP2INEN :1;\n[; ;pic18f2550.h: 915: };\n[; ;pic18f2550.h: 916: struct {\n[; ;pic18f2550.h: 917: unsigned :2;\n[; ;pic18f2550.h: 918: unsigned EP2OUTEN :1;\n[; ;pic18f2550.h: 919: };\n[; ;pic18f2550.h: 920: struct {\n[; ;pic18f2550.h: 921: unsigned EP2STALL :1;\n[; ;pic18f2550.h: 922: };\n[; ;pic18f2550.h: 923: struct {\n[; ;pic18f2550.h: 924: unsigned :3;\n[; ;pic18f2550.h: 925: unsigned EPCONDIS2 :1;\n[; ;pic18f2550.h: 926: };\n[; ;pic18f2550.h: 927: struct {\n[; ;pic18f2550.h: 928: unsigned :4;\n[; ;pic18f2550.h: 929: unsigned EPHSHK2 :1;\n[; ;pic18f2550.h: 930: };\n[; ;pic18f2550.h: 931: struct {\n[; ;pic18f2550.h: 932: unsigned :1;\n[; ;pic18f2550.h: 933: unsigned EPINEN2 :1;\n[; ;pic18f2550.h: 934: };\n[; ;pic18f2550.h: 935: struct {\n[; ;pic18f2550.h: 936: unsigned :2;\n[; ;pic18f2550.h: 937: unsigned EPOUTEN2 :1;\n[; ;pic18f2550.h: 938: };\n[; ;pic18f2550.h: 939: struct {\n[; ;pic18f2550.h: 940: unsigned EPSTALL2 :1;\n[; ;pic18f2550.h: 941: };\n[; ;pic18f2550.h: 942: } UEP2bits_t;\n[; ;pic18f2550.h: 943: extern volatile UEP2bits_t UEP2bits @ 0xF72;\n[; ;pic18f2550.h: 1022: extern volatile unsigned char UEP3 @ 0xF73;\n\"1024\n[; ;pic18f2550.h: 1024: asm(\"UEP3 equ 0F73h\");\n[; <\" UEP3 equ 0F73h ;# \">\n[; ;pic18f2550.h: 1027: typedef union {\n[; ;pic18f2550.h: 1028: struct {\n[; ;pic18f2550.h: 1029: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1030: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1031: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1032: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1033: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1034: };\n[; ;pic18f2550.h: 1035: struct {\n[; ;pic18f2550.h: 1036: unsigned :3;\n[; ;pic18f2550.h: 1037: unsigned EP3CONDIS :1;\n[; ;pic18f2550.h: 1038: };\n[; ;pic18f2550.h: 1039: struct {\n[; ;pic18f2550.h: 1040: unsigned :4;\n[; ;pic18f2550.h: 1041: unsigned EP3HSHK :1;\n[; ;pic18f2550.h: 1042: };\n[; ;pic18f2550.h: 1043: struct {\n[; ;pic18f2550.h: 1044: unsigned :1;\n[; ;pic18f2550.h: 1045: unsigned EP3INEN :1;\n[; ;pic18f2550.h: 1046: };\n[; ;pic18f2550.h: 1047: struct {\n[; ;pic18f2550.h: 1048: unsigned :2;\n[; ;pic18f2550.h: 1049: unsigned EP3OUTEN :1;\n[; ;pic18f2550.h: 1050: };\n[; ;pic18f2550.h: 1051: struct {\n[; ;pic18f2550.h: 1052: unsigned EP3STALL :1;\n[; ;pic18f2550.h: 1053: };\n[; ;pic18f2550.h: 1054: struct {\n[; ;pic18f2550.h: 1055: unsigned :3;\n[; ;pic18f2550.h: 1056: unsigned EPCONDIS3 :1;\n[; ;pic18f2550.h: 1057: };\n[; ;pic18f2550.h: 1058: struct {\n[; ;pic18f2550.h: 1059: unsigned :4;\n[; ;pic18f2550.h: 1060: unsigned EPHSHK3 :1;\n[; ;pic18f2550.h: 1061: };\n[; ;pic18f2550.h: 1062: struct {\n[; ;pic18f2550.h: 1063: unsigned :1;\n[; ;pic18f2550.h: 1064: unsigned EPINEN3 :1;\n[; ;pic18f2550.h: 1065: };\n[; ;pic18f2550.h: 1066: struct {\n[; ;pic18f2550.h: 1067: unsigned :2;\n[; ;pic18f2550.h: 1068: unsigned EPOUTEN3 :1;\n[; ;pic18f2550.h: 1069: };\n[; ;pic18f2550.h: 1070: struct {\n[; ;pic18f2550.h: 1071: unsigned EPSTALL3 :1;\n[; ;pic18f2550.h: 1072: };\n[; ;pic18f2550.h: 1073: } UEP3bits_t;\n[; ;pic18f2550.h: 1074: extern volatile UEP3bits_t UEP3bits @ 0xF73;\n[; ;pic18f2550.h: 1153: extern volatile unsigned char UEP4 @ 0xF74;\n\"1155\n[; ;pic18f2550.h: 1155: asm(\"UEP4 equ 0F74h\");\n[; <\" UEP4 equ 0F74h ;# \">\n[; ;pic18f2550.h: 1158: typedef union {\n[; ;pic18f2550.h: 1159: struct {\n[; ;pic18f2550.h: 1160: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1161: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1162: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1163: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1164: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1165: };\n[; ;pic18f2550.h: 1166: struct {\n[; ;pic18f2550.h: 1167: unsigned :3;\n[; ;pic18f2550.h: 1168: unsigned EP4CONDIS :1;\n[; ;pic18f2550.h: 1169: };\n[; ;pic18f2550.h: 1170: struct {\n[; ;pic18f2550.h: 1171: unsigned :4;\n[; ;pic18f2550.h: 1172: unsigned EP4HSHK :1;\n[; ;pic18f2550.h: 1173: };\n[; ;pic18f2550.h: 1174: struct {\n[; ;pic18f2550.h: 1175: unsigned :1;\n[; ;pic18f2550.h: 1176: unsigned EP4INEN :1;\n[; ;pic18f2550.h: 1177: };\n[; ;pic18f2550.h: 1178: struct {\n[; ;pic18f2550.h: 1179: unsigned :2;\n[; ;pic18f2550.h: 1180: unsigned EP4OUTEN :1;\n[; ;pic18f2550.h: 1181: };\n[; ;pic18f2550.h: 1182: struct {\n[; ;pic18f2550.h: 1183: unsigned EP4STALL :1;\n[; ;pic18f2550.h: 1184: };\n[; ;pic18f2550.h: 1185: struct {\n[; ;pic18f2550.h: 1186: unsigned :3;\n[; ;pic18f2550.h: 1187: unsigned EPCONDIS4 :1;\n[; ;pic18f2550.h: 1188: };\n[; ;pic18f2550.h: 1189: struct {\n[; ;pic18f2550.h: 1190: unsigned :4;\n[; ;pic18f2550.h: 1191: unsigned EPHSHK4 :1;\n[; ;pic18f2550.h: 1192: };\n[; ;pic18f2550.h: 1193: struct {\n[; ;pic18f2550.h: 1194: unsigned :1;\n[; ;pic18f2550.h: 1195: unsigned EPINEN4 :1;\n[; ;pic18f2550.h: 1196: };\n[; ;pic18f2550.h: 1197: struct {\n[; ;pic18f2550.h: 1198: unsigned :2;\n[; ;pic18f2550.h: 1199: unsigned EPOUTEN4 :1;\n[; ;pic18f2550.h: 1200: };\n[; ;pic18f2550.h: 1201: struct {\n[; ;pic18f2550.h: 1202: unsigned EPSTALL4 :1;\n[; ;pic18f2550.h: 1203: };\n[; ;pic18f2550.h: 1204: } UEP4bits_t;\n[; ;pic18f2550.h: 1205: extern volatile UEP4bits_t UEP4bits @ 0xF74;\n[; ;pic18f2550.h: 1284: extern volatile unsigned char UEP5 @ 0xF75;\n\"1286\n[; ;pic18f2550.h: 1286: asm(\"UEP5 equ 0F75h\");\n[; <\" UEP5 equ 0F75h ;# \">\n[; ;pic18f2550.h: 1289: typedef union {\n[; ;pic18f2550.h: 1290: struct {\n[; ;pic18f2550.h: 1291: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1292: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1293: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1294: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1295: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1296: };\n[; ;pic18f2550.h: 1297: struct {\n[; ;pic18f2550.h: 1298: unsigned :3;\n[; ;pic18f2550.h: 1299: unsigned EP5CONDIS :1;\n[; ;pic18f2550.h: 1300: };\n[; ;pic18f2550.h: 1301: struct {\n[; ;pic18f2550.h: 1302: unsigned :4;\n[; ;pic18f2550.h: 1303: unsigned EP5HSHK :1;\n[; ;pic18f2550.h: 1304: };\n[; ;pic18f2550.h: 1305: struct {\n[; ;pic18f2550.h: 1306: unsigned :1;\n[; ;pic18f2550.h: 1307: unsigned EP5INEN :1;\n[; ;pic18f2550.h: 1308: };\n[; ;pic18f2550.h: 1309: struct {\n[; ;pic18f2550.h: 1310: unsigned :2;\n[; ;pic18f2550.h: 1311: unsigned EP5OUTEN :1;\n[; ;pic18f2550.h: 1312: };\n[; ;pic18f2550.h: 1313: struct {\n[; ;pic18f2550.h: 1314: unsigned EP5STALL :1;\n[; ;pic18f2550.h: 1315: };\n[; ;pic18f2550.h: 1316: struct {\n[; ;pic18f2550.h: 1317: unsigned :3;\n[; ;pic18f2550.h: 1318: unsigned EPCONDIS5 :1;\n[; ;pic18f2550.h: 1319: };\n[; ;pic18f2550.h: 1320: struct {\n[; ;pic18f2550.h: 1321: unsigned :4;\n[; ;pic18f2550.h: 1322: unsigned EPHSHK5 :1;\n[; ;pic18f2550.h: 1323: };\n[; ;pic18f2550.h: 1324: struct {\n[; ;pic18f2550.h: 1325: unsigned :1;\n[; ;pic18f2550.h: 1326: unsigned EPINEN5 :1;\n[; ;pic18f2550.h: 1327: };\n[; ;pic18f2550.h: 1328: struct {\n[; ;pic18f2550.h: 1329: unsigned :2;\n[; ;pic18f2550.h: 1330: unsigned EPOUTEN5 :1;\n[; ;pic18f2550.h: 1331: };\n[; ;pic18f2550.h: 1332: struct {\n[; ;pic18f2550.h: 1333: unsigned EPSTALL5 :1;\n[; ;pic18f2550.h: 1334: };\n[; ;pic18f2550.h: 1335: } UEP5bits_t;\n[; ;pic18f2550.h: 1336: extern volatile UEP5bits_t UEP5bits @ 0xF75;\n[; ;pic18f2550.h: 1415: extern volatile unsigned char UEP6 @ 0xF76;\n\"1417\n[; ;pic18f2550.h: 1417: asm(\"UEP6 equ 0F76h\");\n[; <\" UEP6 equ 0F76h ;# \">\n[; ;pic18f2550.h: 1420: typedef union {\n[; ;pic18f2550.h: 1421: struct {\n[; ;pic18f2550.h: 1422: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1423: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1424: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1425: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1426: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1427: };\n[; ;pic18f2550.h: 1428: struct {\n[; ;pic18f2550.h: 1429: unsigned :3;\n[; ;pic18f2550.h: 1430: unsigned EP6CONDIS :1;\n[; ;pic18f2550.h: 1431: };\n[; ;pic18f2550.h: 1432: struct {\n[; ;pic18f2550.h: 1433: unsigned :4;\n[; ;pic18f2550.h: 1434: unsigned EP6HSHK :1;\n[; ;pic18f2550.h: 1435: };\n[; ;pic18f2550.h: 1436: struct {\n[; ;pic18f2550.h: 1437: unsigned :1;\n[; ;pic18f2550.h: 1438: unsigned EP6INEN :1;\n[; ;pic18f2550.h: 1439: };\n[; ;pic18f2550.h: 1440: struct {\n[; ;pic18f2550.h: 1441: unsigned :2;\n[; ;pic18f2550.h: 1442: unsigned EP6OUTEN :1;\n[; ;pic18f2550.h: 1443: };\n[; ;pic18f2550.h: 1444: struct {\n[; ;pic18f2550.h: 1445: unsigned EP6STALL :1;\n[; ;pic18f2550.h: 1446: };\n[; ;pic18f2550.h: 1447: struct {\n[; ;pic18f2550.h: 1448: unsigned :3;\n[; ;pic18f2550.h: 1449: unsigned EPCONDIS6 :1;\n[; ;pic18f2550.h: 1450: };\n[; ;pic18f2550.h: 1451: struct {\n[; ;pic18f2550.h: 1452: unsigned :4;\n[; ;pic18f2550.h: 1453: unsigned EPHSHK6 :1;\n[; ;pic18f2550.h: 1454: };\n[; ;pic18f2550.h: 1455: struct {\n[; ;pic18f2550.h: 1456: unsigned :1;\n[; ;pic18f2550.h: 1457: unsigned EPINEN6 :1;\n[; ;pic18f2550.h: 1458: };\n[; ;pic18f2550.h: 1459: struct {\n[; ;pic18f2550.h: 1460: unsigned :2;\n[; ;pic18f2550.h: 1461: unsigned EPOUTEN6 :1;\n[; ;pic18f2550.h: 1462: };\n[; ;pic18f2550.h: 1463: struct {\n[; ;pic18f2550.h: 1464: unsigned EPSTALL6 :1;\n[; ;pic18f2550.h: 1465: };\n[; ;pic18f2550.h: 1466: } UEP6bits_t;\n[; ;pic18f2550.h: 1467: extern volatile UEP6bits_t UEP6bits @ 0xF76;\n[; ;pic18f2550.h: 1546: extern volatile unsigned char UEP7 @ 0xF77;\n\"1548\n[; ;pic18f2550.h: 1548: asm(\"UEP7 equ 0F77h\");\n[; <\" UEP7 equ 0F77h ;# \">\n[; ;pic18f2550.h: 1551: typedef union {\n[; ;pic18f2550.h: 1552: struct {\n[; ;pic18f2550.h: 1553: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1554: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1555: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1556: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1557: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1558: };\n[; ;pic18f2550.h: 1559: struct {\n[; ;pic18f2550.h: 1560: unsigned :3;\n[; ;pic18f2550.h: 1561: unsigned EP7CONDIS :1;\n[; ;pic18f2550.h: 1562: };\n[; ;pic18f2550.h: 1563: struct {\n[; ;pic18f2550.h: 1564: unsigned :4;\n[; ;pic18f2550.h: 1565: unsigned EP7HSHK :1;\n[; ;pic18f2550.h: 1566: };\n[; ;pic18f2550.h: 1567: struct {\n[; ;pic18f2550.h: 1568: unsigned :1;\n[; ;pic18f2550.h: 1569: unsigned EP7INEN :1;\n[; ;pic18f2550.h: 1570: };\n[; ;pic18f2550.h: 1571: struct {\n[; ;pic18f2550.h: 1572: unsigned :2;\n[; ;pic18f2550.h: 1573: unsigned EP7OUTEN :1;\n[; ;pic18f2550.h: 1574: };\n[; ;pic18f2550.h: 1575: struct {\n[; ;pic18f2550.h: 1576: unsigned EP7STALL :1;\n[; ;pic18f2550.h: 1577: };\n[; ;pic18f2550.h: 1578: struct {\n[; ;pic18f2550.h: 1579: unsigned :3;\n[; ;pic18f2550.h: 1580: unsigned EPCONDIS7 :1;\n[; ;pic18f2550.h: 1581: };\n[; ;pic18f2550.h: 1582: struct {\n[; ;pic18f2550.h: 1583: unsigned :4;\n[; ;pic18f2550.h: 1584: unsigned EPHSHK7 :1;\n[; ;pic18f2550.h: 1585: };\n[; ;pic18f2550.h: 1586: struct {\n[; ;pic18f2550.h: 1587: unsigned :1;\n[; ;pic18f2550.h: 1588: unsigned EPINEN7 :1;\n[; ;pic18f2550.h: 1589: };\n[; ;pic18f2550.h: 1590: struct {\n[; ;pic18f2550.h: 1591: unsigned :2;\n[; ;pic18f2550.h: 1592: unsigned EPOUTEN7 :1;\n[; ;pic18f2550.h: 1593: };\n[; ;pic18f2550.h: 1594: struct {\n[; ;pic18f2550.h: 1595: unsigned EPSTALL7 :1;\n[; ;pic18f2550.h: 1596: };\n[; ;pic18f2550.h: 1597: } UEP7bits_t;\n[; ;pic18f2550.h: 1598: extern volatile UEP7bits_t UEP7bits @ 0xF77;\n[; ;pic18f2550.h: 1677: extern volatile unsigned char UEP8 @ 0xF78;\n\"1679\n[; ;pic18f2550.h: 1679: asm(\"UEP8 equ 0F78h\");\n[; <\" UEP8 equ 0F78h ;# \">\n[; ;pic18f2550.h: 1682: typedef union {\n[; ;pic18f2550.h: 1683: struct {\n[; ;pic18f2550.h: 1684: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1685: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1686: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1687: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1688: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1689: };\n[; ;pic18f2550.h: 1690: struct {\n[; ;pic18f2550.h: 1691: unsigned :3;\n[; ;pic18f2550.h: 1692: unsigned EPCONDIS8 :1;\n[; ;pic18f2550.h: 1693: };\n[; ;pic18f2550.h: 1694: struct {\n[; ;pic18f2550.h: 1695: unsigned :4;\n[; ;pic18f2550.h: 1696: unsigned EPHSHK8 :1;\n[; ;pic18f2550.h: 1697: };\n[; ;pic18f2550.h: 1698: struct {\n[; ;pic18f2550.h: 1699: unsigned :1;\n[; ;pic18f2550.h: 1700: unsigned EPINEN8 :1;\n[; ;pic18f2550.h: 1701: };\n[; ;pic18f2550.h: 1702: struct {\n[; ;pic18f2550.h: 1703: unsigned :2;\n[; ;pic18f2550.h: 1704: unsigned EPOUTEN8 :1;\n[; ;pic18f2550.h: 1705: };\n[; ;pic18f2550.h: 1706: struct {\n[; ;pic18f2550.h: 1707: unsigned EPSTALL8 :1;\n[; ;pic18f2550.h: 1708: };\n[; ;pic18f2550.h: 1709: } UEP8bits_t;\n[; ;pic18f2550.h: 1710: extern volatile UEP8bits_t UEP8bits @ 0xF78;\n[; ;pic18f2550.h: 1764: extern volatile unsigned char UEP9 @ 0xF79;\n\"1766\n[; ;pic18f2550.h: 1766: asm(\"UEP9 equ 0F79h\");\n[; <\" UEP9 equ 0F79h ;# \">\n[; ;pic18f2550.h: 1769: typedef union {\n[; ;pic18f2550.h: 1770: struct {\n[; ;pic18f2550.h: 1771: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1772: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1773: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1774: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1775: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1776: };\n[; ;pic18f2550.h: 1777: struct {\n[; ;pic18f2550.h: 1778: unsigned :3;\n[; ;pic18f2550.h: 1779: unsigned EPCONDIS9 :1;\n[; ;pic18f2550.h: 1780: };\n[; ;pic18f2550.h: 1781: struct {\n[; ;pic18f2550.h: 1782: unsigned :4;\n[; ;pic18f2550.h: 1783: unsigned EPHSHK9 :1;\n[; ;pic18f2550.h: 1784: };\n[; ;pic18f2550.h: 1785: struct {\n[; ;pic18f2550.h: 1786: unsigned :1;\n[; ;pic18f2550.h: 1787: unsigned EPINEN9 :1;\n[; ;pic18f2550.h: 1788: };\n[; ;pic18f2550.h: 1789: struct {\n[; ;pic18f2550.h: 1790: unsigned :2;\n[; ;pic18f2550.h: 1791: unsigned EPOUTEN9 :1;\n[; ;pic18f2550.h: 1792: };\n[; ;pic18f2550.h: 1793: struct {\n[; ;pic18f2550.h: 1794: unsigned EPSTALL9 :1;\n[; ;pic18f2550.h: 1795: };\n[; ;pic18f2550.h: 1796: } UEP9bits_t;\n[; ;pic18f2550.h: 1797: extern volatile UEP9bits_t UEP9bits @ 0xF79;\n[; ;pic18f2550.h: 1851: extern volatile unsigned char UEP10 @ 0xF7A;\n\"1853\n[; ;pic18f2550.h: 1853: asm(\"UEP10 equ 0F7Ah\");\n[; <\" UEP10 equ 0F7Ah ;# \">\n[; ;pic18f2550.h: 1856: typedef union {\n[; ;pic18f2550.h: 1857: struct {\n[; ;pic18f2550.h: 1858: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1859: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1860: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1861: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1862: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1863: };\n[; ;pic18f2550.h: 1864: struct {\n[; ;pic18f2550.h: 1865: unsigned :3;\n[; ;pic18f2550.h: 1866: unsigned EPCONDIS10 :1;\n[; ;pic18f2550.h: 1867: };\n[; ;pic18f2550.h: 1868: struct {\n[; ;pic18f2550.h: 1869: unsigned :4;\n[; ;pic18f2550.h: 1870: unsigned EPHSHK10 :1;\n[; ;pic18f2550.h: 1871: };\n[; ;pic18f2550.h: 1872: struct {\n[; ;pic18f2550.h: 1873: unsigned :1;\n[; ;pic18f2550.h: 1874: unsigned EPINEN10 :1;\n[; ;pic18f2550.h: 1875: };\n[; ;pic18f2550.h: 1876: struct {\n[; ;pic18f2550.h: 1877: unsigned :2;\n[; ;pic18f2550.h: 1878: unsigned EPOUTEN10 :1;\n[; ;pic18f2550.h: 1879: };\n[; ;pic18f2550.h: 1880: struct {\n[; ;pic18f2550.h: 1881: unsigned EPSTALL10 :1;\n[; ;pic18f2550.h: 1882: };\n[; ;pic18f2550.h: 1883: } UEP10bits_t;\n[; ;pic18f2550.h: 1884: extern volatile UEP10bits_t UEP10bits @ 0xF7A;\n[; ;pic18f2550.h: 1938: extern volatile unsigned char UEP11 @ 0xF7B;\n\"1940\n[; ;pic18f2550.h: 1940: asm(\"UEP11 equ 0F7Bh\");\n[; <\" UEP11 equ 0F7Bh ;# \">\n[; ;pic18f2550.h: 1943: typedef union {\n[; ;pic18f2550.h: 1944: struct {\n[; ;pic18f2550.h: 1945: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1946: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1947: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1948: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1949: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1950: };\n[; ;pic18f2550.h: 1951: struct {\n[; ;pic18f2550.h: 1952: unsigned :3;\n[; ;pic18f2550.h: 1953: unsigned EPCONDIS11 :1;\n[; ;pic18f2550.h: 1954: };\n[; ;pic18f2550.h: 1955: struct {\n[; ;pic18f2550.h: 1956: unsigned :4;\n[; ;pic18f2550.h: 1957: unsigned EPHSHK11 :1;\n[; ;pic18f2550.h: 1958: };\n[; ;pic18f2550.h: 1959: struct {\n[; ;pic18f2550.h: 1960: unsigned :1;\n[; ;pic18f2550.h: 1961: unsigned EPINEN11 :1;\n[; ;pic18f2550.h: 1962: };\n[; ;pic18f2550.h: 1963: struct {\n[; ;pic18f2550.h: 1964: unsigned :2;\n[; ;pic18f2550.h: 1965: unsigned EPOUTEN11 :1;\n[; ;pic18f2550.h: 1966: };\n[; ;pic18f2550.h: 1967: struct {\n[; ;pic18f2550.h: 1968: unsigned EPSTALL11 :1;\n[; ;pic18f2550.h: 1969: };\n[; ;pic18f2550.h: 1970: } UEP11bits_t;\n[; ;pic18f2550.h: 1971: extern volatile UEP11bits_t UEP11bits @ 0xF7B;\n[; ;pic18f2550.h: 2025: extern volatile unsigned char UEP12 @ 0xF7C;\n\"2027\n[; ;pic18f2550.h: 2027: asm(\"UEP12 equ 0F7Ch\");\n[; <\" UEP12 equ 0F7Ch ;# \">\n[; ;pic18f2550.h: 2030: typedef union {\n[; ;pic18f2550.h: 2031: struct {\n[; ;pic18f2550.h: 2032: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2033: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2034: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2035: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2036: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2037: };\n[; ;pic18f2550.h: 2038: struct {\n[; ;pic18f2550.h: 2039: unsigned :3;\n[; ;pic18f2550.h: 2040: unsigned EPCONDIS12 :1;\n[; ;pic18f2550.h: 2041: };\n[; ;pic18f2550.h: 2042: struct {\n[; ;pic18f2550.h: 2043: unsigned :4;\n[; ;pic18f2550.h: 2044: unsigned EPHSHK12 :1;\n[; ;pic18f2550.h: 2045: };\n[; ;pic18f2550.h: 2046: struct {\n[; ;pic18f2550.h: 2047: unsigned :1;\n[; ;pic18f2550.h: 2048: unsigned EPINEN12 :1;\n[; ;pic18f2550.h: 2049: };\n[; ;pic18f2550.h: 2050: struct {\n[; ;pic18f2550.h: 2051: unsigned :2;\n[; ;pic18f2550.h: 2052: unsigned EPOUTEN12 :1;\n[; ;pic18f2550.h: 2053: };\n[; ;pic18f2550.h: 2054: struct {\n[; ;pic18f2550.h: 2055: unsigned EPSTALL12 :1;\n[; ;pic18f2550.h: 2056: };\n[; ;pic18f2550.h: 2057: } UEP12bits_t;\n[; ;pic18f2550.h: 2058: extern volatile UEP12bits_t UEP12bits @ 0xF7C;\n[; ;pic18f2550.h: 2112: extern volatile unsigned char UEP13 @ 0xF7D;\n\"2114\n[; ;pic18f2550.h: 2114: asm(\"UEP13 equ 0F7Dh\");\n[; <\" UEP13 equ 0F7Dh ;# \">\n[; ;pic18f2550.h: 2117: typedef union {\n[; ;pic18f2550.h: 2118: struct {\n[; ;pic18f2550.h: 2119: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2120: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2121: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2122: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2123: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2124: };\n[; ;pic18f2550.h: 2125: struct {\n[; ;pic18f2550.h: 2126: unsigned :3;\n[; ;pic18f2550.h: 2127: unsigned EPCONDIS13 :1;\n[; ;pic18f2550.h: 2128: };\n[; ;pic18f2550.h: 2129: struct {\n[; ;pic18f2550.h: 2130: unsigned :4;\n[; ;pic18f2550.h: 2131: unsigned EPHSHK13 :1;\n[; ;pic18f2550.h: 2132: };\n[; ;pic18f2550.h: 2133: struct {\n[; ;pic18f2550.h: 2134: unsigned :1;\n[; ;pic18f2550.h: 2135: unsigned EPINEN13 :1;\n[; ;pic18f2550.h: 2136: };\n[; ;pic18f2550.h: 2137: struct {\n[; ;pic18f2550.h: 2138: unsigned :2;\n[; ;pic18f2550.h: 2139: unsigned EPOUTEN13 :1;\n[; ;pic18f2550.h: 2140: };\n[; ;pic18f2550.h: 2141: struct {\n[; ;pic18f2550.h: 2142: unsigned EPSTALL13 :1;\n[; ;pic18f2550.h: 2143: };\n[; ;pic18f2550.h: 2144: } UEP13bits_t;\n[; ;pic18f2550.h: 2145: extern volatile UEP13bits_t UEP13bits @ 0xF7D;\n[; ;pic18f2550.h: 2199: extern volatile unsigned char UEP14 @ 0xF7E;\n\"2201\n[; ;pic18f2550.h: 2201: asm(\"UEP14 equ 0F7Eh\");\n[; <\" UEP14 equ 0F7Eh ;# \">\n[; ;pic18f2550.h: 2204: typedef union {\n[; ;pic18f2550.h: 2205: struct {\n[; ;pic18f2550.h: 2206: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2207: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2208: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2209: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2210: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2211: };\n[; ;pic18f2550.h: 2212: struct {\n[; ;pic18f2550.h: 2213: unsigned :3;\n[; ;pic18f2550.h: 2214: unsigned EPCONDIS14 :1;\n[; ;pic18f2550.h: 2215: };\n[; ;pic18f2550.h: 2216: struct {\n[; ;pic18f2550.h: 2217: unsigned :4;\n[; ;pic18f2550.h: 2218: unsigned EPHSHK14 :1;\n[; ;pic18f2550.h: 2219: };\n[; ;pic18f2550.h: 2220: struct {\n[; ;pic18f2550.h: 2221: unsigned :1;\n[; ;pic18f2550.h: 2222: unsigned EPINEN14 :1;\n[; ;pic18f2550.h: 2223: };\n[; ;pic18f2550.h: 2224: struct {\n[; ;pic18f2550.h: 2225: unsigned :2;\n[; ;pic18f2550.h: 2226: unsigned EPOUTEN14 :1;\n[; ;pic18f2550.h: 2227: };\n[; ;pic18f2550.h: 2228: struct {\n[; ;pic18f2550.h: 2229: unsigned EPSTALL14 :1;\n[; ;pic18f2550.h: 2230: };\n[; ;pic18f2550.h: 2231: } UEP14bits_t;\n[; ;pic18f2550.h: 2232: extern volatile UEP14bits_t UEP14bits @ 0xF7E;\n[; ;pic18f2550.h: 2286: extern volatile unsigned char UEP15 @ 0xF7F;\n\"2288\n[; ;pic18f2550.h: 2288: asm(\"UEP15 equ 0F7Fh\");\n[; <\" UEP15 equ 0F7Fh ;# \">\n[; ;pic18f2550.h: 2291: typedef union {\n[; ;pic18f2550.h: 2292: struct {\n[; ;pic18f2550.h: 2293: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2294: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2295: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2296: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2297: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2298: };\n[; ;pic18f2550.h: 2299: struct {\n[; ;pic18f2550.h: 2300: unsigned :3;\n[; ;pic18f2550.h: 2301: unsigned EPCONDIS15 :1;\n[; ;pic18f2550.h: 2302: };\n[; ;pic18f2550.h: 2303: struct {\n[; ;pic18f2550.h: 2304: unsigned :4;\n[; ;pic18f2550.h: 2305: unsigned EPHSHK15 :1;\n[; ;pic18f2550.h: 2306: };\n[; ;pic18f2550.h: 2307: struct {\n[; ;pic18f2550.h: 2308: unsigned :1;\n[; ;pic18f2550.h: 2309: unsigned EPINEN15 :1;\n[; ;pic18f2550.h: 2310: };\n[; ;pic18f2550.h: 2311: struct {\n[; ;pic18f2550.h: 2312: unsigned :2;\n[; ;pic18f2550.h: 2313: unsigned EPOUTEN15 :1;\n[; ;pic18f2550.h: 2314: };\n[; ;pic18f2550.h: 2315: struct {\n[; ;pic18f2550.h: 2316: unsigned EPSTALL15 :1;\n[; ;pic18f2550.h: 2317: };\n[; ;pic18f2550.h: 2318: } UEP15bits_t;\n[; ;pic18f2550.h: 2319: extern volatile UEP15bits_t UEP15bits @ 0xF7F;\n[; ;pic18f2550.h: 2373: extern volatile unsigned char PORTA @ 0xF80;\n\"2375\n[; ;pic18f2550.h: 2375: asm(\"PORTA equ 0F80h\");\n[; <\" PORTA equ 0F80h ;# \">\n[; ;pic18f2550.h: 2378: typedef union {\n[; ;pic18f2550.h: 2379: struct {\n[; ;pic18f2550.h: 2380: unsigned RA0 :1;\n[; ;pic18f2550.h: 2381: unsigned RA1 :1;\n[; ;pic18f2550.h: 2382: unsigned RA2 :1;\n[; ;pic18f2550.h: 2383: unsigned RA3 :1;\n[; ;pic18f2550.h: 2384: unsigned RA4 :1;\n[; ;pic18f2550.h: 2385: unsigned RA5 :1;\n[; ;pic18f2550.h: 2386: unsigned RA6 :1;\n[; ;pic18f2550.h: 2387: };\n[; ;pic18f2550.h: 2388: struct {\n[; ;pic18f2550.h: 2389: unsigned AN0 :1;\n[; ;pic18f2550.h: 2390: unsigned AN1 :1;\n[; ;pic18f2550.h: 2391: unsigned AN2 :1;\n[; ;pic18f2550.h: 2392: unsigned AN3 :1;\n[; ;pic18f2550.h: 2393: unsigned T0CKI :1;\n[; ;pic18f2550.h: 2394: unsigned AN4 :1;\n[; ;pic18f2550.h: 2395: unsigned OSC2 :1;\n[; ;pic18f2550.h: 2396: };\n[; ;pic18f2550.h: 2397: struct {\n[; ;pic18f2550.h: 2398: unsigned :2;\n[; ;pic18f2550.h: 2399: unsigned VREFM :1;\n[; ;pic18f2550.h: 2400: unsigned VREFP :1;\n[; ;pic18f2550.h: 2401: unsigned :1;\n[; ;pic18f2550.h: 2402: unsigned LVDIN :1;\n[; ;pic18f2550.h: 2403: };\n[; ;pic18f2550.h: 2404: struct {\n[; ;pic18f2550.h: 2405: unsigned :5;\n[; ;pic18f2550.h: 2406: unsigned HLVDIN :1;\n[; ;pic18f2550.h: 2407: };\n[; ;pic18f2550.h: 2408: struct {\n[; ;pic18f2550.h: 2409: unsigned :7;\n[; ;pic18f2550.h: 2410: unsigned RA7 :1;\n[; ;pic18f2550.h: 2411: };\n[; ;pic18f2550.h: 2412: struct {\n[; ;pic18f2550.h: 2413: unsigned :7;\n[; ;pic18f2550.h: 2414: unsigned RJPU :1;\n[; ;pic18f2550.h: 2415: };\n[; ;pic18f2550.h: 2416: struct {\n[; ;pic18f2550.h: 2417: unsigned ULPWUIN :1;\n[; ;pic18f2550.h: 2418: };\n[; ;pic18f2550.h: 2419: } PORTAbits_t;\n[; ;pic18f2550.h: 2420: extern volatile PORTAbits_t PORTAbits @ 0xF80;\n[; ;pic18f2550.h: 2529: extern volatile unsigned char PORTB @ 0xF81;\n\"2531\n[; ;pic18f2550.h: 2531: asm(\"PORTB equ 0F81h\");\n[; <\" PORTB equ 0F81h ;# \">\n[; ;pic18f2550.h: 2534: typedef union {\n[; ;pic18f2550.h: 2535: struct {\n[; ;pic18f2550.h: 2536: unsigned RB0 :1;\n[; ;pic18f2550.h: 2537: unsigned RB1 :1;\n[; ;pic18f2550.h: 2538: unsigned RB2 :1;\n[; ;pic18f2550.h: 2539: unsigned RB3 :1;\n[; ;pic18f2550.h: 2540: unsigned RB4 :1;\n[; ;pic18f2550.h: 2541: unsigned RB5 :1;\n[; ;pic18f2550.h: 2542: unsigned RB6 :1;\n[; ;pic18f2550.h: 2543: unsigned RB7 :1;\n[; ;pic18f2550.h: 2544: };\n[; ;pic18f2550.h: 2545: struct {\n[; ;pic18f2550.h: 2546: unsigned INT0 :1;\n[; ;pic18f2550.h: 2547: unsigned INT1 :1;\n[; ;pic18f2550.h: 2548: unsigned INT2 :1;\n[; ;pic18f2550.h: 2549: unsigned :2;\n[; ;pic18f2550.h: 2550: unsigned PGM :1;\n[; ;pic18f2550.h: 2551: unsigned PGC :1;\n[; ;pic18f2550.h: 2552: unsigned PGD :1;\n[; ;pic18f2550.h: 2553: };\n[; ;pic18f2550.h: 2554: struct {\n[; ;pic18f2550.h: 2555: unsigned :3;\n[; ;pic18f2550.h: 2556: unsigned CCP2_PA2 :1;\n[; ;pic18f2550.h: 2557: };\n[; ;pic18f2550.h: 2558: } PORTBbits_t;\n[; ;pic18f2550.h: 2559: extern volatile PORTBbits_t PORTBbits @ 0xF81;\n[; ;pic18f2550.h: 2638: extern volatile unsigned char PORTC @ 0xF82;\n\"2640\n[; ;pic18f2550.h: 2640: asm(\"PORTC equ 0F82h\");\n[; <\" PORTC equ 0F82h ;# \">\n[; ;pic18f2550.h: 2643: typedef union {\n[; ;pic18f2550.h: 2644: struct {\n[; ;pic18f2550.h: 2645: unsigned RC0 :1;\n[; ;pic18f2550.h: 2646: unsigned RC1 :1;\n[; ;pic18f2550.h: 2647: unsigned RC2 :1;\n[; ;pic18f2550.h: 2648: unsigned :1;\n[; ;pic18f2550.h: 2649: unsigned RC4 :1;\n[; ;pic18f2550.h: 2650: unsigned RC5 :1;\n[; ;pic18f2550.h: 2651: unsigned RC6 :1;\n[; ;pic18f2550.h: 2652: unsigned RC7 :1;\n[; ;pic18f2550.h: 2653: };\n[; ;pic18f2550.h: 2654: struct {\n[; ;pic18f2550.h: 2655: unsigned T1OSO :1;\n[; ;pic18f2550.h: 2656: unsigned T1OSI :1;\n[; ;pic18f2550.h: 2657: unsigned CCP1 :1;\n[; ;pic18f2550.h: 2658: unsigned :3;\n[; ;pic18f2550.h: 2659: unsigned TX :1;\n[; ;pic18f2550.h: 2660: unsigned RX :1;\n[; ;pic18f2550.h: 2661: };\n[; ;pic18f2550.h: 2662: struct {\n[; ;pic18f2550.h: 2663: unsigned T13CKI :1;\n[; ;pic18f2550.h: 2664: unsigned :1;\n[; ;pic18f2550.h: 2665: unsigned P1A :1;\n[; ;pic18f2550.h: 2666: unsigned :3;\n[; ;pic18f2550.h: 2667: unsigned CK :1;\n[; ;pic18f2550.h: 2668: unsigned DT :1;\n[; ;pic18f2550.h: 2669: };\n[; ;pic18f2550.h: 2670: struct {\n[; ;pic18f2550.h: 2671: unsigned :1;\n[; ;pic18f2550.h: 2672: unsigned CCP2 :1;\n[; ;pic18f2550.h: 2673: };\n[; ;pic18f2550.h: 2674: struct {\n[; ;pic18f2550.h: 2675: unsigned :2;\n[; ;pic18f2550.h: 2676: unsigned PA1 :1;\n[; ;pic18f2550.h: 2677: };\n[; ;pic18f2550.h: 2678: struct {\n[; ;pic18f2550.h: 2679: unsigned :1;\n[; ;pic18f2550.h: 2680: unsigned PA2 :1;\n[; ;pic18f2550.h: 2681: };\n[; ;pic18f2550.h: 2682: struct {\n[; ;pic18f2550.h: 2683: unsigned :3;\n[; ;pic18f2550.h: 2684: unsigned RC3 :1;\n[; ;pic18f2550.h: 2685: };\n[; ;pic18f2550.h: 2686: } PORTCbits_t;\n[; ;pic18f2550.h: 2687: extern volatile PORTCbits_t PORTCbits @ 0xF82;\n[; ;pic18f2550.h: 2791: extern volatile unsigned char PORTE @ 0xF84;\n\"2793\n[; ;pic18f2550.h: 2793: asm(\"PORTE equ 0F84h\");\n[; <\" PORTE equ 0F84h ;# \">\n[; ;pic18f2550.h: 2796: typedef union {\n[; ;pic18f2550.h: 2797: struct {\n[; ;pic18f2550.h: 2798: unsigned :3;\n[; ;pic18f2550.h: 2799: unsigned RE3 :1;\n[; ;pic18f2550.h: 2800: };\n[; ;pic18f2550.h: 2801: struct {\n[; ;pic18f2550.h: 2802: unsigned :2;\n[; ;pic18f2550.h: 2803: unsigned CCP10 :1;\n[; ;pic18f2550.h: 2804: };\n[; ;pic18f2550.h: 2805: struct {\n[; ;pic18f2550.h: 2806: unsigned :7;\n[; ;pic18f2550.h: 2807: unsigned CCP2E :1;\n[; ;pic18f2550.h: 2808: };\n[; ;pic18f2550.h: 2809: struct {\n[; ;pic18f2550.h: 2810: unsigned :6;\n[; ;pic18f2550.h: 2811: unsigned CCP6E :1;\n[; ;pic18f2550.h: 2812: };\n[; ;pic18f2550.h: 2813: struct {\n[; ;pic18f2550.h: 2814: unsigned :5;\n[; ;pic18f2550.h: 2815: unsigned CCP7E :1;\n[; ;pic18f2550.h: 2816: };\n[; ;pic18f2550.h: 2817: struct {\n[; ;pic18f2550.h: 2818: unsigned :4;\n[; ;pic18f2550.h: 2819: unsigned CCP8E :1;\n[; ;pic18f2550.h: 2820: };\n[; ;pic18f2550.h: 2821: struct {\n[; ;pic18f2550.h: 2822: unsigned :3;\n[; ;pic18f2550.h: 2823: unsigned CCP9E :1;\n[; ;pic18f2550.h: 2824: };\n[; ;pic18f2550.h: 2825: struct {\n[; ;pic18f2550.h: 2826: unsigned :2;\n[; ;pic18f2550.h: 2827: unsigned CS :1;\n[; ;pic18f2550.h: 2828: };\n[; ;pic18f2550.h: 2829: struct {\n[; ;pic18f2550.h: 2830: unsigned :7;\n[; ;pic18f2550.h: 2831: unsigned PA2E :1;\n[; ;pic18f2550.h: 2832: };\n[; ;pic18f2550.h: 2833: struct {\n[; ;pic18f2550.h: 2834: unsigned :6;\n[; ;pic18f2550.h: 2835: unsigned PB1E :1;\n[; ;pic18f2550.h: 2836: };\n[; ;pic18f2550.h: 2837: struct {\n[; ;pic18f2550.h: 2838: unsigned :2;\n[; ;pic18f2550.h: 2839: unsigned PB2 :1;\n[; ;pic18f2550.h: 2840: };\n[; ;pic18f2550.h: 2841: struct {\n[; ;pic18f2550.h: 2842: unsigned :4;\n[; ;pic18f2550.h: 2843: unsigned PB3E :1;\n[; ;pic18f2550.h: 2844: };\n[; ;pic18f2550.h: 2845: struct {\n[; ;pic18f2550.h: 2846: unsigned :5;\n[; ;pic18f2550.h: 2847: unsigned PC1E :1;\n[; ;pic18f2550.h: 2848: };\n[; ;pic18f2550.h: 2849: struct {\n[; ;pic18f2550.h: 2850: unsigned :1;\n[; ;pic18f2550.h: 2851: unsigned PC2 :1;\n[; ;pic18f2550.h: 2852: };\n[; ;pic18f2550.h: 2853: struct {\n[; ;pic18f2550.h: 2854: unsigned :3;\n[; ;pic18f2550.h: 2855: unsigned PC3E :1;\n[; ;pic18f2550.h: 2856: };\n[; ;pic18f2550.h: 2857: struct {\n[; ;pic18f2550.h: 2858: unsigned PD2 :1;\n[; ;pic18f2550.h: 2859: };\n[; ;pic18f2550.h: 2860: struct {\n[; ;pic18f2550.h: 2861: unsigned RDE :1;\n[; ;pic18f2550.h: 2862: };\n[; ;pic18f2550.h: 2863: struct {\n[; ;pic18f2550.h: 2864: unsigned RE0 :1;\n[; ;pic18f2550.h: 2865: };\n[; ;pic18f2550.h: 2866: struct {\n[; ;pic18f2550.h: 2867: unsigned :1;\n[; ;pic18f2550.h: 2868: unsigned RE1 :1;\n[; ;pic18f2550.h: 2869: };\n[; ;pic18f2550.h: 2870: struct {\n[; ;pic18f2550.h: 2871: unsigned :2;\n[; ;pic18f2550.h: 2872: unsigned RE2 :1;\n[; ;pic18f2550.h: 2873: };\n[; ;pic18f2550.h: 2874: struct {\n[; ;pic18f2550.h: 2875: unsigned :4;\n[; ;pic18f2550.h: 2876: unsigned RE4 :1;\n[; ;pic18f2550.h: 2877: };\n[; ;pic18f2550.h: 2878: struct {\n[; ;pic18f2550.h: 2879: unsigned :5;\n[; ;pic18f2550.h: 2880: unsigned RE5 :1;\n[; ;pic18f2550.h: 2881: };\n[; ;pic18f2550.h: 2882: struct {\n[; ;pic18f2550.h: 2883: unsigned :6;\n[; ;pic18f2550.h: 2884: unsigned RE6 :1;\n[; ;pic18f2550.h: 2885: };\n[; ;pic18f2550.h: 2886: struct {\n[; ;pic18f2550.h: 2887: unsigned :7;\n[; ;pic18f2550.h: 2888: unsigned RE7 :1;\n[; ;pic18f2550.h: 2889: };\n[; ;pic18f2550.h: 2890: struct {\n[; ;pic18f2550.h: 2891: unsigned :1;\n[; ;pic18f2550.h: 2892: unsigned WRE :1;\n[; ;pic18f2550.h: 2893: };\n[; ;pic18f2550.h: 2894: } PORTEbits_t;\n[; ;pic18f2550.h: 2895: extern volatile PORTEbits_t PORTEbits @ 0xF84;\n[; ;pic18f2550.h: 3024: extern volatile unsigned char LATA @ 0xF89;\n\"3026\n[; ;pic18f2550.h: 3026: asm(\"LATA equ 0F89h\");\n[; <\" LATA equ 0F89h ;# \">\n[; ;pic18f2550.h: 3029: typedef union {\n[; ;pic18f2550.h: 3030: struct {\n[; ;pic18f2550.h: 3031: unsigned LATA0 :1;\n[; ;pic18f2550.h: 3032: unsigned LATA1 :1;\n[; ;pic18f2550.h: 3033: unsigned LATA2 :1;\n[; ;pic18f2550.h: 3034: unsigned LATA3 :1;\n[; ;pic18f2550.h: 3035: unsigned LATA4 :1;\n[; ;pic18f2550.h: 3036: unsigned LATA5 :1;\n[; ;pic18f2550.h: 3037: unsigned LATA6 :1;\n[; ;pic18f2550.h: 3038: };\n[; ;pic18f2550.h: 3039: struct {\n[; ;pic18f2550.h: 3040: unsigned LA0 :1;\n[; ;pic18f2550.h: 3041: };\n[; ;pic18f2550.h: 3042: struct {\n[; ;pic18f2550.h: 3043: unsigned :1;\n[; ;pic18f2550.h: 3044: unsigned LA1 :1;\n[; ;pic18f2550.h: 3045: };\n[; ;pic18f2550.h: 3046: struct {\n[; ;pic18f2550.h: 3047: unsigned :2;\n[; ;pic18f2550.h: 3048: unsigned LA2 :1;\n[; ;pic18f2550.h: 3049: };\n[; ;pic18f2550.h: 3050: struct {\n[; ;pic18f2550.h: 3051: unsigned :3;\n[; ;pic18f2550.h: 3052: unsigned LA3 :1;\n[; ;pic18f2550.h: 3053: };\n[; ;pic18f2550.h: 3054: struct {\n[; ;pic18f2550.h: 3055: unsigned :4;\n[; ;pic18f2550.h: 3056: unsigned LA4 :1;\n[; ;pic18f2550.h: 3057: };\n[; ;pic18f2550.h: 3058: struct {\n[; ;pic18f2550.h: 3059: unsigned :5;\n[; ;pic18f2550.h: 3060: unsigned LA5 :1;\n[; ;pic18f2550.h: 3061: };\n[; ;pic18f2550.h: 3062: struct {\n[; ;pic18f2550.h: 3063: unsigned :6;\n[; ;pic18f2550.h: 3064: unsigned LA6 :1;\n[; ;pic18f2550.h: 3065: };\n[; ;pic18f2550.h: 3066: struct {\n[; ;pic18f2550.h: 3067: unsigned :7;\n[; ;pic18f2550.h: 3068: unsigned LA7 :1;\n[; ;pic18f2550.h: 3069: };\n[; ;pic18f2550.h: 3070: struct {\n[; ;pic18f2550.h: 3071: unsigned :7;\n[; ;pic18f2550.h: 3072: unsigned LATA7 :1;\n[; ;pic18f2550.h: 3073: };\n[; ;pic18f2550.h: 3074: } LATAbits_t;\n[; ;pic18f2550.h: 3075: extern volatile LATAbits_t LATAbits @ 0xF89;\n[; ;pic18f2550.h: 3159: extern volatile unsigned char LATB @ 0xF8A;\n\"3161\n[; ;pic18f2550.h: 3161: asm(\"LATB equ 0F8Ah\");\n[; <\" LATB equ 0F8Ah ;# \">\n[; ;pic18f2550.h: 3164: typedef union {\n[; ;pic18f2550.h: 3165: struct {\n[; ;pic18f2550.h: 3166: unsigned LATB0 :1;\n[; ;pic18f2550.h: 3167: unsigned LATB1 :1;\n[; ;pic18f2550.h: 3168: unsigned LATB2 :1;\n[; ;pic18f2550.h: 3169: unsigned LATB3 :1;\n[; ;pic18f2550.h: 3170: unsigned LATB4 :1;\n[; ;pic18f2550.h: 3171: unsigned LATB5 :1;\n[; ;pic18f2550.h: 3172: unsigned LATB6 :1;\n[; ;pic18f2550.h: 3173: unsigned LATB7 :1;\n[; ;pic18f2550.h: 3174: };\n[; ;pic18f2550.h: 3175: struct {\n[; ;pic18f2550.h: 3176: unsigned LB0 :1;\n[; ;pic18f2550.h: 3177: };\n[; ;pic18f2550.h: 3178: struct {\n[; ;pic18f2550.h: 3179: unsigned :1;\n[; ;pic18f2550.h: 3180: unsigned LB1 :1;\n[; ;pic18f2550.h: 3181: };\n[; ;pic18f2550.h: 3182: struct {\n[; ;pic18f2550.h: 3183: unsigned :2;\n[; ;pic18f2550.h: 3184: unsigned LB2 :1;\n[; ;pic18f2550.h: 3185: };\n[; ;pic18f2550.h: 3186: struct {\n[; ;pic18f2550.h: 3187: unsigned :3;\n[; ;pic18f2550.h: 3188: unsigned LB3 :1;\n[; ;pic18f2550.h: 3189: };\n[; ;pic18f2550.h: 3190: struct {\n[; ;pic18f2550.h: 3191: unsigned :4;\n[; ;pic18f2550.h: 3192: unsigned LB4 :1;\n[; ;pic18f2550.h: 3193: };\n[; ;pic18f2550.h: 3194: struct {\n[; ;pic18f2550.h: 3195: unsigned :5;\n[; ;pic18f2550.h: 3196: unsigned LB5 :1;\n[; ;pic18f2550.h: 3197: };\n[; ;pic18f2550.h: 3198: struct {\n[; ;pic18f2550.h: 3199: unsigned :6;\n[; ;pic18f2550.h: 3200: unsigned LB6 :1;\n[; ;pic18f2550.h: 3201: };\n[; ;pic18f2550.h: 3202: struct {\n[; ;pic18f2550.h: 3203: unsigned :7;\n[; ;pic18f2550.h: 3204: unsigned LB7 :1;\n[; ;pic18f2550.h: 3205: };\n[; ;pic18f2550.h: 3206: } LATBbits_t;\n[; ;pic18f2550.h: 3207: extern volatile LATBbits_t LATBbits @ 0xF8A;\n[; ;pic18f2550.h: 3291: extern volatile unsigned char LATC @ 0xF8B;\n\"3293\n[; ;pic18f2550.h: 3293: asm(\"LATC equ 0F8Bh\");\n[; <\" LATC equ 0F8Bh ;# \">\n[; ;pic18f2550.h: 3296: typedef union {\n[; ;pic18f2550.h: 3297: struct {\n[; ;pic18f2550.h: 3298: unsigned LATC0 :1;\n[; ;pic18f2550.h: 3299: unsigned LATC1 :1;\n[; ;pic18f2550.h: 3300: unsigned LATC2 :1;\n[; ;pic18f2550.h: 3301: unsigned :3;\n[; ;pic18f2550.h: 3302: unsigned LATC6 :1;\n[; ;pic18f2550.h: 3303: unsigned LATC7 :1;\n[; ;pic18f2550.h: 3304: };\n[; ;pic18f2550.h: 3305: struct {\n[; ;pic18f2550.h: 3306: unsigned LC0 :1;\n[; ;pic18f2550.h: 3307: };\n[; ;pic18f2550.h: 3308: struct {\n[; ;pic18f2550.h: 3309: unsigned :1;\n[; ;pic18f2550.h: 3310: unsigned LC1 :1;\n[; ;pic18f2550.h: 3311: };\n[; ;pic18f2550.h: 3312: struct {\n[; ;pic18f2550.h: 3313: unsigned :2;\n[; ;pic18f2550.h: 3314: unsigned LC2 :1;\n[; ;pic18f2550.h: 3315: };\n[; ;pic18f2550.h: 3316: struct {\n[; ;pic18f2550.h: 3317: unsigned :3;\n[; ;pic18f2550.h: 3318: unsigned LC3 :1;\n[; ;pic18f2550.h: 3319: };\n[; ;pic18f2550.h: 3320: struct {\n[; ;pic18f2550.h: 3321: unsigned :4;\n[; ;pic18f2550.h: 3322: unsigned LC4 :1;\n[; ;pic18f2550.h: 3323: };\n[; ;pic18f2550.h: 3324: struct {\n[; ;pic18f2550.h: 3325: unsigned :5;\n[; ;pic18f2550.h: 3326: unsigned LC5 :1;\n[; ;pic18f2550.h: 3327: };\n[; ;pic18f2550.h: 3328: struct {\n[; ;pic18f2550.h: 3329: unsigned :6;\n[; ;pic18f2550.h: 3330: unsigned LC6 :1;\n[; ;pic18f2550.h: 3331: };\n[; ;pic18f2550.h: 3332: struct {\n[; ;pic18f2550.h: 3333: unsigned :7;\n[; ;pic18f2550.h: 3334: unsigned LC7 :1;\n[; ;pic18f2550.h: 3335: };\n[; ;pic18f2550.h: 3336: } LATCbits_t;\n[; ;pic18f2550.h: 3337: extern volatile LATCbits_t LATCbits @ 0xF8B;\n[; ;pic18f2550.h: 3406: extern volatile unsigned char TRISA @ 0xF92;\n\"3408\n[; ;pic18f2550.h: 3408: asm(\"TRISA equ 0F92h\");\n[; <\" TRISA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3411: extern volatile unsigned char DDRA @ 0xF92;\n\"3413\n[; ;pic18f2550.h: 3413: asm(\"DDRA equ 0F92h\");\n[; <\" DDRA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3416: typedef union {\n[; ;pic18f2550.h: 3417: struct {\n[; ;pic18f2550.h: 3418: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3419: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3420: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3421: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3422: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3423: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3424: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3425: };\n[; ;pic18f2550.h: 3426: struct {\n[; ;pic18f2550.h: 3427: unsigned RA0 :1;\n[; ;pic18f2550.h: 3428: unsigned RA1 :1;\n[; ;pic18f2550.h: 3429: unsigned RA2 :1;\n[; ;pic18f2550.h: 3430: unsigned RA3 :1;\n[; ;pic18f2550.h: 3431: unsigned RA4 :1;\n[; ;pic18f2550.h: 3432: unsigned RA5 :1;\n[; ;pic18f2550.h: 3433: unsigned RA6 :1;\n[; ;pic18f2550.h: 3434: };\n[; ;pic18f2550.h: 3435: } TRISAbits_t;\n[; ;pic18f2550.h: 3436: extern volatile TRISAbits_t TRISAbits @ 0xF92;\n[; ;pic18f2550.h: 3509: typedef union {\n[; ;pic18f2550.h: 3510: struct {\n[; ;pic18f2550.h: 3511: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3512: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3513: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3514: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3515: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3516: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3517: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3518: };\n[; ;pic18f2550.h: 3519: struct {\n[; ;pic18f2550.h: 3520: unsigned RA0 :1;\n[; ;pic18f2550.h: 3521: unsigned RA1 :1;\n[; ;pic18f2550.h: 3522: unsigned RA2 :1;\n[; ;pic18f2550.h: 3523: unsigned RA3 :1;\n[; ;pic18f2550.h: 3524: unsigned RA4 :1;\n[; ;pic18f2550.h: 3525: unsigned RA5 :1;\n[; ;pic18f2550.h: 3526: unsigned RA6 :1;\n[; ;pic18f2550.h: 3527: };\n[; ;pic18f2550.h: 3528: } DDRAbits_t;\n[; ;pic18f2550.h: 3529: extern volatile DDRAbits_t DDRAbits @ 0xF92;\n[; ;pic18f2550.h: 3603: extern volatile unsigned char TRISB @ 0xF93;\n\"3605\n[; ;pic18f2550.h: 3605: asm(\"TRISB equ 0F93h\");\n[; <\" TRISB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3608: extern volatile unsigned char DDRB @ 0xF93;\n\"3610\n[; ;pic18f2550.h: 3610: asm(\"DDRB equ 0F93h\");\n[; <\" DDRB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3613: typedef union {\n[; ;pic18f2550.h: 3614: struct {\n[; ;pic18f2550.h: 3615: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3616: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3617: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3618: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3619: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3620: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3621: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3622: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3623: };\n[; ;pic18f2550.h: 3624: struct {\n[; ;pic18f2550.h: 3625: unsigned RB0 :1;\n[; ;pic18f2550.h: 3626: unsigned RB1 :1;\n[; ;pic18f2550.h: 3627: unsigned RB2 :1;\n[; ;pic18f2550.h: 3628: unsigned RB3 :1;\n[; ;pic18f2550.h: 3629: unsigned RB4 :1;\n[; ;pic18f2550.h: 3630: unsigned RB5 :1;\n[; ;pic18f2550.h: 3631: unsigned RB6 :1;\n[; ;pic18f2550.h: 3632: unsigned RB7 :1;\n[; ;pic18f2550.h: 3633: };\n[; ;pic18f2550.h: 3634: } TRISBbits_t;\n[; ;pic18f2550.h: 3635: extern volatile TRISBbits_t TRISBbits @ 0xF93;\n[; ;pic18f2550.h: 3718: typedef union {\n[; ;pic18f2550.h: 3719: struct {\n[; ;pic18f2550.h: 3720: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3721: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3722: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3723: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3724: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3725: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3726: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3727: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3728: };\n[; ;pic18f2550.h: 3729: struct {\n[; ;pic18f2550.h: 3730: unsigned RB0 :1;\n[; ;pic18f2550.h: 3731: unsigned RB1 :1;\n[; ;pic18f2550.h: 3732: unsigned RB2 :1;\n[; ;pic18f2550.h: 3733: unsigned RB3 :1;\n[; ;pic18f2550.h: 3734: unsigned RB4 :1;\n[; ;pic18f2550.h: 3735: unsigned RB5 :1;\n[; ;pic18f2550.h: 3736: unsigned RB6 :1;\n[; ;pic18f2550.h: 3737: unsigned RB7 :1;\n[; ;pic18f2550.h: 3738: };\n[; ;pic18f2550.h: 3739: } DDRBbits_t;\n[; ;pic18f2550.h: 3740: extern volatile DDRBbits_t DDRBbits @ 0xF93;\n[; ;pic18f2550.h: 3824: extern volatile unsigned char TRISC @ 0xF94;\n\"3826\n[; ;pic18f2550.h: 3826: asm(\"TRISC equ 0F94h\");\n[; <\" TRISC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3829: extern volatile unsigned char DDRC @ 0xF94;\n\"3831\n[; ;pic18f2550.h: 3831: asm(\"DDRC equ 0F94h\");\n[; <\" DDRC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3834: typedef union {\n[; ;pic18f2550.h: 3835: struct {\n[; ;pic18f2550.h: 3836: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3837: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3838: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3839: unsigned :3;\n[; ;pic18f2550.h: 3840: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3841: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3842: };\n[; ;pic18f2550.h: 3843: struct {\n[; ;pic18f2550.h: 3844: unsigned RC0 :1;\n[; ;pic18f2550.h: 3845: unsigned RC1 :1;\n[; ;pic18f2550.h: 3846: unsigned RC2 :1;\n[; ;pic18f2550.h: 3847: unsigned :3;\n[; ;pic18f2550.h: 3848: unsigned RC6 :1;\n[; ;pic18f2550.h: 3849: unsigned RC7 :1;\n[; ;pic18f2550.h: 3850: };\n[; ;pic18f2550.h: 3851: struct {\n[; ;pic18f2550.h: 3852: unsigned :3;\n[; ;pic18f2550.h: 3853: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3854: };\n[; ;pic18f2550.h: 3855: } TRISCbits_t;\n[; ;pic18f2550.h: 3856: extern volatile TRISCbits_t TRISCbits @ 0xF94;\n[; ;pic18f2550.h: 3914: typedef union {\n[; ;pic18f2550.h: 3915: struct {\n[; ;pic18f2550.h: 3916: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3917: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3918: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3919: unsigned :3;\n[; ;pic18f2550.h: 3920: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3921: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3922: };\n[; ;pic18f2550.h: 3923: struct {\n[; ;pic18f2550.h: 3924: unsigned RC0 :1;\n[; ;pic18f2550.h: 3925: unsigned RC1 :1;\n[; ;pic18f2550.h: 3926: unsigned RC2 :1;\n[; ;pic18f2550.h: 3927: unsigned :3;\n[; ;pic18f2550.h: 3928: unsigned RC6 :1;\n[; ;pic18f2550.h: 3929: unsigned RC7 :1;\n[; ;pic18f2550.h: 3930: };\n[; ;pic18f2550.h: 3931: struct {\n[; ;pic18f2550.h: 3932: unsigned :3;\n[; ;pic18f2550.h: 3933: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3934: };\n[; ;pic18f2550.h: 3935: } DDRCbits_t;\n[; ;pic18f2550.h: 3936: extern volatile DDRCbits_t DDRCbits @ 0xF94;\n[; ;pic18f2550.h: 3995: extern volatile unsigned char OSCTUNE @ 0xF9B;\n\"3997\n[; ;pic18f2550.h: 3997: asm(\"OSCTUNE equ 0F9Bh\");\n[; <\" OSCTUNE equ 0F9Bh ;# \">\n[; ;pic18f2550.h: 4000: typedef union {\n[; ;pic18f2550.h: 4001: struct {\n[; ;pic18f2550.h: 4002: unsigned TUN :5;\n[; ;pic18f2550.h: 4003: unsigned :2;\n[; ;pic18f2550.h: 4004: unsigned INTSRC :1;\n[; ;pic18f2550.h: 4005: };\n[; ;pic18f2550.h: 4006: struct {\n[; ;pic18f2550.h: 4007: unsigned TUN0 :1;\n[; ;pic18f2550.h: 4008: unsigned TUN1 :1;\n[; ;pic18f2550.h: 4009: unsigned TUN2 :1;\n[; ;pic18f2550.h: 4010: unsigned TUN3 :1;\n[; ;pic18f2550.h: 4011: unsigned TUN4 :1;\n[; ;pic18f2550.h: 4012: };\n[; ;pic18f2550.h: 4013: } OSCTUNEbits_t;\n[; ;pic18f2550.h: 4014: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n[; ;pic18f2550.h: 4053: extern volatile unsigned char PIE1 @ 0xF9D;\n\"4055\n[; ;pic18f2550.h: 4055: asm(\"PIE1 equ 0F9Dh\");\n[; <\" PIE1 equ 0F9Dh ;# \">\n[; ;pic18f2550.h: 4058: typedef union {\n[; ;pic18f2550.h: 4059: struct {\n[; ;pic18f2550.h: 4060: unsigned TMR1IE :1;\n[; ;pic18f2550.h: 4061: unsigned TMR2IE :1;\n[; ;pic18f2550.h: 4062: unsigned CCP1IE :1;\n[; ;pic18f2550.h: 4063: unsigned SSPIE :1;\n[; ;pic18f2550.h: 4064: unsigned TXIE :1;\n[; ;pic18f2550.h: 4065: unsigned RCIE :1;\n[; ;pic18f2550.h: 4066: unsigned ADIE :1;\n[; ;pic18f2550.h: 4067: };\n[; ;pic18f2550.h: 4068: struct {\n[; ;pic18f2550.h: 4069: unsigned :5;\n[; ;pic18f2550.h: 4070: unsigned RC1IE :1;\n[; ;pic18f2550.h: 4071: };\n[; ;pic18f2550.h: 4072: struct {\n[; ;pic18f2550.h: 4073: unsigned :4;\n[; ;pic18f2550.h: 4074: unsigned TX1IE :1;\n[; ;pic18f2550.h: 4075: };\n[; ;pic18f2550.h: 4076: } PIE1bits_t;\n[; ;pic18f2550.h: 4077: extern volatile PIE1bits_t PIE1bits @ 0xF9D;\n[; ;pic18f2550.h: 4126: extern volatile unsigned char PIR1 @ 0xF9E;\n\"4128\n[; ;pic18f2550.h: 4128: asm(\"PIR1 equ 0F9Eh\");\n[; <\" PIR1 equ 0F9Eh ;# \">\n[; ;pic18f2550.h: 4131: typedef union {\n[; ;pic18f2550.h: 4132: struct {\n[; ;pic18f2550.h: 4133: unsigned TMR1IF :1;\n[; ;pic18f2550.h: 4134: unsigned TMR2IF :1;\n[; ;pic18f2550.h: 4135: unsigned CCP1IF :1;\n[; ;pic18f2550.h: 4136: unsigned SSPIF :1;\n[; ;pic18f2550.h: 4137: unsigned TXIF :1;\n[; ;pic18f2550.h: 4138: unsigned RCIF :1;\n[; ;pic18f2550.h: 4139: unsigned ADIF :1;\n[; ;pic18f2550.h: 4140: };\n[; ;pic18f2550.h: 4141: struct {\n[; ;pic18f2550.h: 4142: unsigned :5;\n[; ;pic18f2550.h: 4143: unsigned RC1IF :1;\n[; ;pic18f2550.h: 4144: };\n[; ;pic18f2550.h: 4145: struct {\n[; ;pic18f2550.h: 4146: unsigned :4;\n[; ;pic18f2550.h: 4147: unsigned TX1IF :1;\n[; ;pic18f2550.h: 4148: };\n[; ;pic18f2550.h: 4149: } PIR1bits_t;\n[; ;pic18f2550.h: 4150: extern volatile PIR1bits_t PIR1bits @ 0xF9E;\n[; ;pic18f2550.h: 4199: extern volatile unsigned char IPR1 @ 0xF9F;\n\"4201\n[; ;pic18f2550.h: 4201: asm(\"IPR1 equ 0F9Fh\");\n[; <\" IPR1 equ 0F9Fh ;# \">\n[; ;pic18f2550.h: 4204: typedef union {\n[; ;pic18f2550.h: 4205: struct {\n[; ;pic18f2550.h: 4206: unsigned TMR1IP :1;\n[; ;pic18f2550.h: 4207: unsigned TMR2IP :1;\n[; ;pic18f2550.h: 4208: unsigned CCP1IP :1;\n[; ;pic18f2550.h: 4209: unsigned SSPIP :1;\n[; ;pic18f2550.h: 4210: unsigned TXIP :1;\n[; ;pic18f2550.h: 4211: unsigned RCIP :1;\n[; ;pic18f2550.h: 4212: unsigned ADIP :1;\n[; ;pic18f2550.h: 4213: };\n[; ;pic18f2550.h: 4214: struct {\n[; ;pic18f2550.h: 4215: unsigned :5;\n[; ;pic18f2550.h: 4216: unsigned RC1IP :1;\n[; ;pic18f2550.h: 4217: };\n[; ;pic18f2550.h: 4218: struct {\n[; ;pic18f2550.h: 4219: unsigned :4;\n[; ;pic18f2550.h: 4220: unsigned TX1IP :1;\n[; ;pic18f2550.h: 4221: };\n[; ;pic18f2550.h: 4222: } IPR1bits_t;\n[; ;pic18f2550.h: 4223: extern volatile IPR1bits_t IPR1bits @ 0xF9F;\n[; ;pic18f2550.h: 4272: extern volatile unsigned char PIE2 @ 0xFA0;\n\"4274\n[; ;pic18f2550.h: 4274: asm(\"PIE2 equ 0FA0h\");\n[; <\" PIE2 equ 0FA0h ;# \">\n[; ;pic18f2550.h: 4277: typedef union {\n[; ;pic18f2550.h: 4278: struct {\n[; ;pic18f2550.h: 4279: unsigned CCP2IE :1;\n[; ;pic18f2550.h: 4280: unsigned TMR3IE :1;\n[; ;pic18f2550.h: 4281: unsigned HLVDIE :1;\n[; ;pic18f2550.h: 4282: unsigned BCLIE :1;\n[; ;pic18f2550.h: 4283: unsigned EEIE :1;\n[; ;pic18f2550.h: 4284: unsigned USBIE :1;\n[; ;pic18f2550.h: 4285: unsigned CMIE :1;\n[; ;pic18f2550.h: 4286: unsigned OSCFIE :1;\n[; ;pic18f2550.h: 4287: };\n[; ;pic18f2550.h: 4288: struct {\n[; ;pic18f2550.h: 4289: unsigned :2;\n[; ;pic18f2550.h: 4290: unsigned LVDIE :1;\n[; ;pic18f2550.h: 4291: };\n[; ;pic18f2550.h: 4292: } PIE2bits_t;\n[; ;pic18f2550.h: 4293: extern volatile PIE2bits_t PIE2bits @ 0xFA0;\n[; ;pic18f2550.h: 4342: extern volatile unsigned char PIR2 @ 0xFA1;\n\"4344\n[; ;pic18f2550.h: 4344: asm(\"PIR2 equ 0FA1h\");\n[; <\" PIR2 equ 0FA1h ;# \">\n[; ;pic18f2550.h: 4347: typedef union {\n[; ;pic18f2550.h: 4348: struct {\n[; ;pic18f2550.h: 4349: unsigned CCP2IF :1;\n[; ;pic18f2550.h: 4350: unsigned TMR3IF :1;\n[; ;pic18f2550.h: 4351: unsigned HLVDIF :1;\n[; ;pic18f2550.h: 4352: unsigned BCLIF :1;\n[; ;pic18f2550.h: 4353: unsigned EEIF :1;\n[; ;pic18f2550.h: 4354: unsigned USBIF :1;\n[; ;pic18f2550.h: 4355: unsigned CMIF :1;\n[; ;pic18f2550.h: 4356: unsigned OSCFIF :1;\n[; ;pic18f2550.h: 4357: };\n[; ;pic18f2550.h: 4358: struct {\n[; ;pic18f2550.h: 4359: unsigned :2;\n[; ;pic18f2550.h: 4360: unsigned LVDIF :1;\n[; ;pic18f2550.h: 4361: };\n[; ;pic18f2550.h: 4362: } PIR2bits_t;\n[; ;pic18f2550.h: 4363: extern volatile PIR2bits_t PIR2bits @ 0xFA1;\n[; ;pic18f2550.h: 4412: extern volatile unsigned char IPR2 @ 0xFA2;\n\"4414\n[; ;pic18f2550.h: 4414: asm(\"IPR2 equ 0FA2h\");\n[; <\" IPR2 equ 0FA2h ;# \">\n[; ;pic18f2550.h: 4417: typedef union {\n[; ;pic18f2550.h: 4418: struct {\n[; ;pic18f2550.h: 4419: unsigned CCP2IP :1;\n[; ;pic18f2550.h: 4420: unsigned TMR3IP :1;\n[; ;pic18f2550.h: 4421: unsigned HLVDIP :1;\n[; ;pic18f2550.h: 4422: unsigned BCLIP :1;\n[; ;pic18f2550.h: 4423: unsigned EEIP :1;\n[; ;pic18f2550.h: 4424: unsigned USBIP :1;\n[; ;pic18f2550.h: 4425: unsigned CMIP :1;\n[; ;pic18f2550.h: 4426: unsigned OSCFIP :1;\n[; ;pic18f2550.h: 4427: };\n[; ;pic18f2550.h: 4428: struct {\n[; ;pic18f2550.h: 4429: unsigned :2;\n[; ;pic18f2550.h: 4430: unsigned LVDIP :1;\n[; ;pic18f2550.h: 4431: };\n[; ;pic18f2550.h: 4432: } IPR2bits_t;\n[; ;pic18f2550.h: 4433: extern volatile IPR2bits_t IPR2bits @ 0xFA2;\n[; ;pic18f2550.h: 4482: extern volatile unsigned char EECON1 @ 0xFA6;\n\"4484\n[; ;pic18f2550.h: 4484: asm(\"EECON1 equ 0FA6h\");\n[; <\" EECON1 equ 0FA6h ;# \">\n[; ;pic18f2550.h: 4487: typedef union {\n[; ;pic18f2550.h: 4488: struct {\n[; ;pic18f2550.h: 4489: unsigned RD :1;\n[; ;pic18f2550.h: 4490: unsigned WR :1;\n[; ;pic18f2550.h: 4491: unsigned WREN :1;\n[; ;pic18f2550.h: 4492: unsigned WRERR :1;\n[; ;pic18f2550.h: 4493: unsigned FREE :1;\n[; ;pic18f2550.h: 4494: unsigned :1;\n[; ;pic18f2550.h: 4495: unsigned CFGS :1;\n[; ;pic18f2550.h: 4496: unsigned EEPGD :1;\n[; ;pic18f2550.h: 4497: };\n[; ;pic18f2550.h: 4498: struct {\n[; ;pic18f2550.h: 4499: unsigned :6;\n[; ;pic18f2550.h: 4500: unsigned EEFS :1;\n[; ;pic18f2550.h: 4501: };\n[; ;pic18f2550.h: 4502: } EECON1bits_t;\n[; ;pic18f2550.h: 4503: extern volatile EECON1bits_t EECON1bits @ 0xFA6;\n[; ;pic18f2550.h: 4547: extern volatile unsigned char EECON2 @ 0xFA7;\n\"4549\n[; ;pic18f2550.h: 4549: asm(\"EECON2 equ 0FA7h\");\n[; <\" EECON2 equ 0FA7h ;# \">\n[; ;pic18f2550.h: 4553: extern volatile unsigned char EEDATA @ 0xFA8;\n\"4555\n[; ;pic18f2550.h: 4555: asm(\"EEDATA equ 0FA8h\");\n[; <\" EEDATA equ 0FA8h ;# \">\n[; ;pic18f2550.h: 4559: extern volatile unsigned char EEADR @ 0xFA9;\n\"4561\n[; ;pic18f2550.h: 4561: asm(\"EEADR equ 0FA9h\");\n[; <\" EEADR equ 0FA9h ;# \">\n[; ;pic18f2550.h: 4565: extern volatile unsigned char RCSTA @ 0xFAB;\n\"4567\n[; ;pic18f2550.h: 4567: asm(\"RCSTA equ 0FABh\");\n[; <\" RCSTA equ 0FABh ;# \">\n[; ;pic18f2550.h: 4570: extern volatile unsigned char RCSTA1 @ 0xFAB;\n\"4572\n[; ;pic18f2550.h: 4572: asm(\"RCSTA1 equ 0FABh\");\n[; <\" RCSTA1 equ 0FABh ;# \">\n[; ;pic18f2550.h: 4575: typedef union {\n[; ;pic18f2550.h: 4576: struct {\n[; ;pic18f2550.h: 4577: unsigned RX9D :1;\n[; ;pic18f2550.h: 4578: unsigned OERR :1;\n[; ;pic18f2550.h: 4579: unsigned FERR :1;\n[; ;pic18f2550.h: 4580: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4581: unsigned CREN :1;\n[; ;pic18f2550.h: 4582: unsigned SREN :1;\n[; ;pic18f2550.h: 4583: unsigned RX9 :1;\n[; ;pic18f2550.h: 4584: unsigned SPEN :1;\n[; ;pic18f2550.h: 4585: };\n[; ;pic18f2550.h: 4586: struct {\n[; ;pic18f2550.h: 4587: unsigned :3;\n[; ;pic18f2550.h: 4588: unsigned ADEN :1;\n[; ;pic18f2550.h: 4589: };\n[; ;pic18f2550.h: 4590: struct {\n[; ;pic18f2550.h: 4591: unsigned :5;\n[; ;pic18f2550.h: 4592: unsigned SRENA :1;\n[; ;pic18f2550.h: 4593: };\n[; ;pic18f2550.h: 4594: } RCSTAbits_t;\n[; ;pic18f2550.h: 4595: extern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n[; ;pic18f2550.h: 4648: typedef union {\n[; ;pic18f2550.h: 4649: struct {\n[; ;pic18f2550.h: 4650: unsigned RX9D :1;\n[; ;pic18f2550.h: 4651: unsigned OERR :1;\n[; ;pic18f2550.h: 4652: unsigned FERR :1;\n[; ;pic18f2550.h: 4653: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4654: unsigned CREN :1;\n[; ;pic18f2550.h: 4655: unsigned SREN :1;\n[; ;pic18f2550.h: 4656: unsigned RX9 :1;\n[; ;pic18f2550.h: 4657: unsigned SPEN :1;\n[; ;pic18f2550.h: 4658: };\n[; ;pic18f2550.h: 4659: struct {\n[; ;pic18f2550.h: 4660: unsigned :3;\n[; ;pic18f2550.h: 4661: unsigned ADEN :1;\n[; ;pic18f2550.h: 4662: };\n[; ;pic18f2550.h: 4663: struct {\n[; ;pic18f2550.h: 4664: unsigned :5;\n[; ;pic18f2550.h: 4665: unsigned SRENA :1;\n[; ;pic18f2550.h: 4666: };\n[; ;pic18f2550.h: 4667: } RCSTA1bits_t;\n[; ;pic18f2550.h: 4668: extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n[; ;pic18f2550.h: 4722: extern volatile unsigned char TXSTA @ 0xFAC;\n\"4724\n[; ;pic18f2550.h: 4724: asm(\"TXSTA equ 0FACh\");\n[; <\" TXSTA equ 0FACh ;# \">\n[; ;pic18f2550.h: 4727: extern volatile unsigned char TXSTA1 @ 0xFAC;\n\"4729\n[; ;pic18f2550.h: 4729: asm(\"TXSTA1 equ 0FACh\");\n[; <\" TXSTA1 equ 0FACh ;# \">\n[; ;pic18f2550.h: 4732: typedef union {\n[; ;pic18f2550.h: 4733: struct {\n[; ;pic18f2550.h: 4734: unsigned TX9D :1;\n[; ;pic18f2550.h: 4735: unsigned TRMT :1;\n[; ;pic18f2550.h: 4736: unsigned BRGH :1;\n[; ;pic18f2550.h: 4737: unsigned SENDB :1;\n[; ;pic18f2550.h: 4738: unsigned SYNC :1;\n[; ;pic18f2550.h: 4739: unsigned TXEN :1;\n[; ;pic18f2550.h: 4740: unsigned TX9 :1;\n[; ;pic18f2550.h: 4741: unsigned CSRC :1;\n[; ;pic18f2550.h: 4742: };\n[; ;pic18f2550.h: 4743: struct {\n[; ;pic18f2550.h: 4744: unsigned :2;\n[; ;pic18f2550.h: 4745: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4746: };\n[; ;pic18f2550.h: 4747: struct {\n[; ;pic18f2550.h: 4748: unsigned :7;\n[; ;pic18f2550.h: 4749: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4750: };\n[; ;pic18f2550.h: 4751: struct {\n[; ;pic18f2550.h: 4752: unsigned :3;\n[; ;pic18f2550.h: 4753: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4754: };\n[; ;pic18f2550.h: 4755: struct {\n[; ;pic18f2550.h: 4756: unsigned :4;\n[; ;pic18f2550.h: 4757: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4758: };\n[; ;pic18f2550.h: 4759: struct {\n[; ;pic18f2550.h: 4760: unsigned :1;\n[; ;pic18f2550.h: 4761: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4762: };\n[; ;pic18f2550.h: 4763: struct {\n[; ;pic18f2550.h: 4764: unsigned :6;\n[; ;pic18f2550.h: 4765: unsigned TX91 :1;\n[; ;pic18f2550.h: 4766: };\n[; ;pic18f2550.h: 4767: struct {\n[; ;pic18f2550.h: 4768: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4769: };\n[; ;pic18f2550.h: 4770: struct {\n[; ;pic18f2550.h: 4771: unsigned :5;\n[; ;pic18f2550.h: 4772: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4773: };\n[; ;pic18f2550.h: 4774: } TXSTAbits_t;\n[; ;pic18f2550.h: 4775: extern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n[; ;pic18f2550.h: 4858: typedef union {\n[; ;pic18f2550.h: 4859: struct {\n[; ;pic18f2550.h: 4860: unsigned TX9D :1;\n[; ;pic18f2550.h: 4861: unsigned TRMT :1;\n[; ;pic18f2550.h: 4862: unsigned BRGH :1;\n[; ;pic18f2550.h: 4863: unsigned SENDB :1;\n[; ;pic18f2550.h: 4864: unsigned SYNC :1;\n[; ;pic18f2550.h: 4865: unsigned TXEN :1;\n[; ;pic18f2550.h: 4866: unsigned TX9 :1;\n[; ;pic18f2550.h: 4867: unsigned CSRC :1;\n[; ;pic18f2550.h: 4868: };\n[; ;pic18f2550.h: 4869: struct {\n[; ;pic18f2550.h: 4870: unsigned :2;\n[; ;pic18f2550.h: 4871: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4872: };\n[; ;pic18f2550.h: 4873: struct {\n[; ;pic18f2550.h: 4874: unsigned :7;\n[; ;pic18f2550.h: 4875: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4876: };\n[; ;pic18f2550.h: 4877: struct {\n[; ;pic18f2550.h: 4878: unsigned :3;\n[; ;pic18f2550.h: 4879: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4880: };\n[; ;pic18f2550.h: 4881: struct {\n[; ;pic18f2550.h: 4882: unsigned :4;\n[; ;pic18f2550.h: 4883: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4884: };\n[; ;pic18f2550.h: 4885: struct {\n[; ;pic18f2550.h: 4886: unsigned :1;\n[; ;pic18f2550.h: 4887: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4888: };\n[; ;pic18f2550.h: 4889: struct {\n[; ;pic18f2550.h: 4890: unsigned :6;\n[; ;pic18f2550.h: 4891: unsigned TX91 :1;\n[; ;pic18f2550.h: 4892: };\n[; ;pic18f2550.h: 4893: struct {\n[; ;pic18f2550.h: 4894: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4895: };\n[; ;pic18f2550.h: 4896: struct {\n[; ;pic18f2550.h: 4897: unsigned :5;\n[; ;pic18f2550.h: 4898: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4899: };\n[; ;pic18f2550.h: 4900: } TXSTA1bits_t;\n[; ;pic18f2550.h: 4901: extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n[; ;pic18f2550.h: 4985: extern volatile unsigned char TXREG @ 0xFAD;\n\"4987\n[; ;pic18f2550.h: 4987: asm(\"TXREG equ 0FADh\");\n[; <\" TXREG equ 0FADh ;# \">\n[; ;pic18f2550.h: 4990: extern volatile unsigned char TXREG1 @ 0xFAD;\n\"4992\n[; ;pic18f2550.h: 4992: asm(\"TXREG1 equ 0FADh\");\n[; <\" TXREG1 equ 0FADh ;# \">\n[; ;pic18f2550.h: 4996: extern volatile unsigned char RCREG @ 0xFAE;\n\"4998\n[; ;pic18f2550.h: 4998: asm(\"RCREG equ 0FAEh\");\n[; <\" RCREG equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5001: extern volatile unsigned char RCREG1 @ 0xFAE;\n\"5003\n[; ;pic18f2550.h: 5003: asm(\"RCREG1 equ 0FAEh\");\n[; <\" RCREG1 equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5007: extern volatile unsigned char SPBRG @ 0xFAF;\n\"5009\n[; ;pic18f2550.h: 5009: asm(\"SPBRG equ 0FAFh\");\n[; <\" SPBRG equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5012: extern volatile unsigned char SPBRG1 @ 0xFAF;\n\"5014\n[; ;pic18f2550.h: 5014: asm(\"SPBRG1 equ 0FAFh\");\n[; <\" SPBRG1 equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5018: extern volatile unsigned char SPBRGH @ 0xFB0;\n\"5020\n[; ;pic18f2550.h: 5020: asm(\"SPBRGH equ 0FB0h\");\n[; <\" SPBRGH equ 0FB0h ;# \">\n[; ;pic18f2550.h: 5024: extern volatile unsigned char T3CON @ 0xFB1;\n\"5026\n[; ;pic18f2550.h: 5026: asm(\"T3CON equ 0FB1h\");\n[; <\" T3CON equ 0FB1h ;# \">\n[; ;pic18f2550.h: 5029: typedef union {\n[; ;pic18f2550.h: 5030: struct {\n[; ;pic18f2550.h: 5031: unsigned :2;\n[; ;pic18f2550.h: 5032: unsigned NOT_T3SYNC :1;\n[; ;pic18f2550.h: 5033: };\n[; ;pic18f2550.h: 5034: struct {\n[; ;pic18f2550.h: 5035: unsigned TMR3ON :1;\n[; ;pic18f2550.h: 5036: unsigned TMR3CS :1;\n[; ;pic18f2550.h: 5037: unsigned nT3SYNC :1;\n[; ;pic18f2550.h: 5038: unsigned T3CCP1 :1;\n[; ;pic18f2550.h: 5039: unsigned T3CKPS :2;\n[; ;pic18f2550.h: 5040: unsigned T3CCP2 :1;\n[; ;pic18f2550.h: 5041: unsigned RD16 :1;\n[; ;pic18f2550.h: 5042: };\n[; ;pic18f2550.h: 5043: struct {\n[; ;pic18f2550.h: 5044: unsigned :2;\n[; ;pic18f2550.h: 5045: unsigned T3SYNC :1;\n[; ;pic18f2550.h: 5046: unsigned :1;\n[; ;pic18f2550.h: 5047: unsigned T3CKPS0 :1;\n[; ;pic18f2550.h: 5048: unsigned T3CKPS1 :1;\n[; ;pic18f2550.h: 5049: };\n[; ;pic18f2550.h: 5050: struct {\n[; ;pic18f2550.h: 5051: unsigned :2;\n[; ;pic18f2550.h: 5052: unsigned T3NSYNC :1;\n[; ;pic18f2550.h: 5053: };\n[; ;pic18f2550.h: 5054: struct {\n[; ;pic18f2550.h: 5055: unsigned :7;\n[; ;pic18f2550.h: 5056: unsigned RD163 :1;\n[; ;pic18f2550.h: 5057: };\n[; ;pic18f2550.h: 5058: struct {\n[; ;pic18f2550.h: 5059: unsigned :3;\n[; ;pic18f2550.h: 5060: unsigned SOSCEN3 :1;\n[; ;pic18f2550.h: 5061: };\n[; ;pic18f2550.h: 5062: struct {\n[; ;pic18f2550.h: 5063: unsigned :7;\n[; ;pic18f2550.h: 5064: unsigned T3RD16 :1;\n[; ;pic18f2550.h: 5065: };\n[; ;pic18f2550.h: 5066: } T3CONbits_t;\n[; ;pic18f2550.h: 5067: extern volatile T3CONbits_t T3CONbits @ 0xFB1;\n[; ;pic18f2550.h: 5146: extern volatile unsigned short TMR3 @ 0xFB2;\n\"5148\n[; ;pic18f2550.h: 5148: asm(\"TMR3 equ 0FB2h\");\n[; <\" TMR3 equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5152: extern volatile unsigned char TMR3L @ 0xFB2;\n\"5154\n[; ;pic18f2550.h: 5154: asm(\"TMR3L equ 0FB2h\");\n[; <\" TMR3L equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5158: extern volatile unsigned char TMR3H @ 0xFB3;\n\"5160\n[; ;pic18f2550.h: 5160: asm(\"TMR3H equ 0FB3h\");\n[; <\" TMR3H equ 0FB3h ;# \">\n[; ;pic18f2550.h: 5164: extern volatile unsigned char CMCON @ 0xFB4;\n\"5166\n[; ;pic18f2550.h: 5166: asm(\"CMCON equ 0FB4h\");\n[; <\" CMCON equ 0FB4h ;# \">\n[; ;pic18f2550.h: 5169: typedef union {\n[; ;pic18f2550.h: 5170: struct {\n[; ;pic18f2550.h: 5171: unsigned CM :3;\n[; ;pic18f2550.h: 5172: unsigned CIS :1;\n[; ;pic18f2550.h: 5173: unsigned C1INV :1;\n[; ;pic18f2550.h: 5174: unsigned C2INV :1;\n[; ;pic18f2550.h: 5175: unsigned C1OUT :1;\n[; ;pic18f2550.h: 5176: unsigned C2OUT :1;\n[; ;pic18f2550.h: 5177: };\n[; ;pic18f2550.h: 5178: struct {\n[; ;pic18f2550.h: 5179: unsigned CM0 :1;\n[; ;pic18f2550.h: 5180: unsigned CM1 :1;\n[; ;pic18f2550.h: 5181: unsigned CM2 :1;\n[; ;pic18f2550.h: 5182: };\n[; ;pic18f2550.h: 5183: struct {\n[; ;pic18f2550.h: 5184: unsigned CMEN0 :1;\n[; ;pic18f2550.h: 5185: };\n[; ;pic18f2550.h: 5186: struct {\n[; ;pic18f2550.h: 5187: unsigned :1;\n[; ;pic18f2550.h: 5188: unsigned CMEN1 :1;\n[; ;pic18f2550.h: 5189: };\n[; ;pic18f2550.h: 5190: struct {\n[; ;pic18f2550.h: 5191: unsigned :2;\n[; ;pic18f2550.h: 5192: unsigned CMEN2 :1;\n[; ;pic18f2550.h: 5193: };\n[; ;pic18f2550.h: 5194: } CMCONbits_t;\n[; ;pic18f2550.h: 5195: extern volatile CMCONbits_t CMCONbits @ 0xFB4;\n[; ;pic18f2550.h: 5259: extern volatile unsigned char CVRCON @ 0xFB5;\n\"5261\n[; ;pic18f2550.h: 5261: asm(\"CVRCON equ 0FB5h\");\n[; <\" CVRCON equ 0FB5h ;# \">\n[; ;pic18f2550.h: 5264: typedef union {\n[; ;pic18f2550.h: 5265: struct {\n[; ;pic18f2550.h: 5266: unsigned CVR :4;\n[; ;pic18f2550.h: 5267: unsigned CVRSS :1;\n[; ;pic18f2550.h: 5268: unsigned CVRR :1;\n[; ;pic18f2550.h: 5269: unsigned CVROE :1;\n[; ;pic18f2550.h: 5270: unsigned CVREN :1;\n[; ;pic18f2550.h: 5271: };\n[; ;pic18f2550.h: 5272: struct {\n[; ;pic18f2550.h: 5273: unsigned CVR0 :1;\n[; ;pic18f2550.h: 5274: unsigned CVR1 :1;\n[; ;pic18f2550.h: 5275: unsigned CVR2 :1;\n[; ;pic18f2550.h: 5276: unsigned CVR3 :1;\n[; ;pic18f2550.h: 5277: unsigned CVREF :1;\n[; ;pic18f2550.h: 5278: };\n[; ;pic18f2550.h: 5279: struct {\n[; ;pic18f2550.h: 5280: unsigned :6;\n[; ;pic18f2550.h: 5281: unsigned CVROEN :1;\n[; ;pic18f2550.h: 5282: };\n[; ;pic18f2550.h: 5283: } CVRCONbits_t;\n[; ;pic18f2550.h: 5284: extern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n[; ;pic18f2550.h: 5343: extern volatile unsigned char ECCP1AS @ 0xFB6;\n\"5345\n[; ;pic18f2550.h: 5345: asm(\"ECCP1AS equ 0FB6h\");\n[; <\" ECCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5348: extern volatile unsigned char CCP1AS @ 0xFB6;\n\"5350\n[; ;pic18f2550.h: 5350: asm(\"CCP1AS equ 0FB6h\");\n[; <\" CCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5353: typedef union {\n[; ;pic18f2550.h: 5354: struct {\n[; ;pic18f2550.h: 5355: unsigned :2;\n[; ;pic18f2550.h: 5356: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5357: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5358: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5359: };\n[; ;pic18f2550.h: 5360: struct {\n[; ;pic18f2550.h: 5361: unsigned :2;\n[; ;pic18f2550.h: 5362: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5363: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5364: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5365: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5366: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5367: };\n[; ;pic18f2550.h: 5368: } ECCP1ASbits_t;\n[; ;pic18f2550.h: 5369: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5412: typedef union {\n[; ;pic18f2550.h: 5413: struct {\n[; ;pic18f2550.h: 5414: unsigned :2;\n[; ;pic18f2550.h: 5415: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5416: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5417: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5418: };\n[; ;pic18f2550.h: 5419: struct {\n[; ;pic18f2550.h: 5420: unsigned :2;\n[; ;pic18f2550.h: 5421: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5422: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5423: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5424: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5425: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5426: };\n[; ;pic18f2550.h: 5427: } CCP1ASbits_t;\n[; ;pic18f2550.h: 5428: extern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5472: extern volatile unsigned char ECCP1DEL @ 0xFB7;\n\"5474\n[; ;pic18f2550.h: 5474: asm(\"ECCP1DEL equ 0FB7h\");\n[; <\" ECCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5477: extern volatile unsigned char CCP1DEL @ 0xFB7;\n\"5479\n[; ;pic18f2550.h: 5479: asm(\"CCP1DEL equ 0FB7h\");\n[; <\" CCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5482: typedef union {\n[; ;pic18f2550.h: 5483: struct {\n[; ;pic18f2550.h: 5484: unsigned :7;\n[; ;pic18f2550.h: 5485: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5486: };\n[; ;pic18f2550.h: 5487: } ECCP1DELbits_t;\n[; ;pic18f2550.h: 5488: extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5496: typedef union {\n[; ;pic18f2550.h: 5497: struct {\n[; ;pic18f2550.h: 5498: unsigned :7;\n[; ;pic18f2550.h: 5499: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5500: };\n[; ;pic18f2550.h: 5501: } CCP1DELbits_t;\n[; ;pic18f2550.h: 5502: extern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5511: extern volatile unsigned char BAUDCON @ 0xFB8;\n\"5513\n[; ;pic18f2550.h: 5513: asm(\"BAUDCON equ 0FB8h\");\n[; <\" BAUDCON equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5516: extern volatile unsigned char BAUDCTL @ 0xFB8;\n\"5518\n[; ;pic18f2550.h: 5518: asm(\"BAUDCTL equ 0FB8h\");\n[; <\" BAUDCTL equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5521: typedef union {\n[; ;pic18f2550.h: 5522: struct {\n[; ;pic18f2550.h: 5523: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5524: unsigned WUE :1;\n[; ;pic18f2550.h: 5525: unsigned :1;\n[; ;pic18f2550.h: 5526: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5527: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5528: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5529: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5530: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5531: };\n[; ;pic18f2550.h: 5532: struct {\n[; ;pic18f2550.h: 5533: unsigned :4;\n[; ;pic18f2550.h: 5534: unsigned SCKP :1;\n[; ;pic18f2550.h: 5535: unsigned :1;\n[; ;pic18f2550.h: 5536: unsigned RCMT :1;\n[; ;pic18f2550.h: 5537: };\n[; ;pic18f2550.h: 5538: struct {\n[; ;pic18f2550.h: 5539: unsigned :5;\n[; ;pic18f2550.h: 5540: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5541: };\n[; ;pic18f2550.h: 5542: struct {\n[; ;pic18f2550.h: 5543: unsigned :1;\n[; ;pic18f2550.h: 5544: unsigned W4E :1;\n[; ;pic18f2550.h: 5545: };\n[; ;pic18f2550.h: 5546: } BAUDCONbits_t;\n[; ;pic18f2550.h: 5547: extern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n[; ;pic18f2550.h: 5605: typedef union {\n[; ;pic18f2550.h: 5606: struct {\n[; ;pic18f2550.h: 5607: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5608: unsigned WUE :1;\n[; ;pic18f2550.h: 5609: unsigned :1;\n[; ;pic18f2550.h: 5610: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5611: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5612: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5613: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5614: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5615: };\n[; ;pic18f2550.h: 5616: struct {\n[; ;pic18f2550.h: 5617: unsigned :4;\n[; ;pic18f2550.h: 5618: unsigned SCKP :1;\n[; ;pic18f2550.h: 5619: unsigned :1;\n[; ;pic18f2550.h: 5620: unsigned RCMT :1;\n[; ;pic18f2550.h: 5621: };\n[; ;pic18f2550.h: 5622: struct {\n[; ;pic18f2550.h: 5623: unsigned :5;\n[; ;pic18f2550.h: 5624: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5625: };\n[; ;pic18f2550.h: 5626: struct {\n[; ;pic18f2550.h: 5627: unsigned :1;\n[; ;pic18f2550.h: 5628: unsigned W4E :1;\n[; ;pic18f2550.h: 5629: };\n[; ;pic18f2550.h: 5630: } BAUDCTLbits_t;\n[; ;pic18f2550.h: 5631: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n[; ;pic18f2550.h: 5690: extern volatile unsigned char CCP2CON @ 0xFBA;\n\"5692\n[; ;pic18f2550.h: 5692: asm(\"CCP2CON equ 0FBAh\");\n[; <\" CCP2CON equ 0FBAh ;# \">\n[; ;pic18f2550.h: 5695: typedef union {\n[; ;pic18f2550.h: 5696: struct {\n[; ;pic18f2550.h: 5697: unsigned CCP2M :4;\n[; ;pic18f2550.h: 5698: unsigned DC2B :2;\n[; ;pic18f2550.h: 5699: };\n[; ;pic18f2550.h: 5700: struct {\n[; ;pic18f2550.h: 5701: unsigned CCP2M0 :1;\n[; ;pic18f2550.h: 5702: unsigned CCP2M1 :1;\n[; ;pic18f2550.h: 5703: unsigned CCP2M2 :1;\n[; ;pic18f2550.h: 5704: unsigned CCP2M3 :1;\n[; ;pic18f2550.h: 5705: unsigned DC2B0 :1;\n[; ;pic18f2550.h: 5706: unsigned DC2B1 :1;\n[; ;pic18f2550.h: 5707: };\n[; ;pic18f2550.h: 5708: } CCP2CONbits_t;\n[; ;pic18f2550.h: 5709: extern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n[; ;pic18f2550.h: 5753: extern volatile unsigned short CCPR2 @ 0xFBB;\n\"5755\n[; ;pic18f2550.h: 5755: asm(\"CCPR2 equ 0FBBh\");\n[; <\" CCPR2 equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5759: extern volatile unsigned char CCPR2L @ 0xFBB;\n\"5761\n[; ;pic18f2550.h: 5761: asm(\"CCPR2L equ 0FBBh\");\n[; <\" CCPR2L equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5765: extern volatile unsigned char CCPR2H @ 0xFBC;\n\"5767\n[; ;pic18f2550.h: 5767: asm(\"CCPR2H equ 0FBCh\");\n[; <\" CCPR2H equ 0FBCh ;# \">\n[; ;pic18f2550.h: 5771: extern volatile unsigned char CCP1CON @ 0xFBD;\n\"5773\n[; ;pic18f2550.h: 5773: asm(\"CCP1CON equ 0FBDh\");\n[; <\" CCP1CON equ 0FBDh ;# \">\n[; ;pic18f2550.h: 5776: typedef union {\n[; ;pic18f2550.h: 5777: struct {\n[; ;pic18f2550.h: 5778: unsigned CCP1M :4;\n[; ;pic18f2550.h: 5779: unsigned DC1B :2;\n[; ;pic18f2550.h: 5780: };\n[; ;pic18f2550.h: 5781: struct {\n[; ;pic18f2550.h: 5782: unsigned CCP1M0 :1;\n[; ;pic18f2550.h: 5783: unsigned CCP1M1 :1;\n[; ;pic18f2550.h: 5784: unsigned CCP1M2 :1;\n[; ;pic18f2550.h: 5785: unsigned CCP1M3 :1;\n[; ;pic18f2550.h: 5786: unsigned DC1B0 :1;\n[; ;pic18f2550.h: 5787: unsigned DC1B1 :1;\n[; ;pic18f2550.h: 5788: };\n[; ;pic18f2550.h: 5789: } CCP1CONbits_t;\n[; ;pic18f2550.h: 5790: extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n[; ;pic18f2550.h: 5834: extern volatile unsigned short CCPR1 @ 0xFBE;\n\"5836\n[; ;pic18f2550.h: 5836: asm(\"CCPR1 equ 0FBEh\");\n[; <\" CCPR1 equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5840: extern volatile unsigned char CCPR1L @ 0xFBE;\n\"5842\n[; ;pic18f2550.h: 5842: asm(\"CCPR1L equ 0FBEh\");\n[; <\" CCPR1L equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5846: extern volatile unsigned char CCPR1H @ 0xFBF;\n\"5848\n[; ;pic18f2550.h: 5848: asm(\"CCPR1H equ 0FBFh\");\n[; <\" CCPR1H equ 0FBFh ;# \">\n[; ;pic18f2550.h: 5852: extern volatile unsigned char ADCON2 @ 0xFC0;\n\"5854\n[; ;pic18f2550.h: 5854: asm(\"ADCON2 equ 0FC0h\");\n[; <\" ADCON2 equ 0FC0h ;# \">\n[; ;pic18f2550.h: 5857: typedef union {\n[; ;pic18f2550.h: 5858: struct {\n[; ;pic18f2550.h: 5859: unsigned ADCS :3;\n[; ;pic18f2550.h: 5860: unsigned ACQT :3;\n[; ;pic18f2550.h: 5861: unsigned :1;\n[; ;pic18f2550.h: 5862: unsigned ADFM :1;\n[; ;pic18f2550.h: 5863: };\n[; ;pic18f2550.h: 5864: struct {\n[; ;pic18f2550.h: 5865: unsigned ADCS0 :1;\n[; ;pic18f2550.h: 5866: unsigned ADCS1 :1;\n[; ;pic18f2550.h: 5867: unsigned ADCS2 :1;\n[; ;pic18f2550.h: 5868: unsigned ACQT0 :1;\n[; ;pic18f2550.h: 5869: unsigned ACQT1 :1;\n[; ;pic18f2550.h: 5870: unsigned ACQT2 :1;\n[; ;pic18f2550.h: 5871: };\n[; ;pic18f2550.h: 5872: } ADCON2bits_t;\n[; ;pic18f2550.h: 5873: extern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n[; ;pic18f2550.h: 5922: extern volatile unsigned char ADCON1 @ 0xFC1;\n\"5924\n[; ;pic18f2550.h: 5924: asm(\"ADCON1 equ 0FC1h\");\n[; <\" ADCON1 equ 0FC1h ;# \">\n[; ;pic18f2550.h: 5927: typedef union {\n[; ;pic18f2550.h: 5928: struct {\n[; ;pic18f2550.h: 5929: unsigned PCFG :4;\n[; ;pic18f2550.h: 5930: unsigned VCFG :2;\n[; ;pic18f2550.h: 5931: };\n[; ;pic18f2550.h: 5932: struct {\n[; ;pic18f2550.h: 5933: unsigned PCFG0 :1;\n[; ;pic18f2550.h: 5934: unsigned PCFG1 :1;\n[; ;pic18f2550.h: 5935: unsigned PCFG2 :1;\n[; ;pic18f2550.h: 5936: unsigned PCFG3 :1;\n[; ;pic18f2550.h: 5937: unsigned VCFG0 :1;\n[; ;pic18f2550.h: 5938: unsigned VCFG1 :1;\n[; ;pic18f2550.h: 5939: };\n[; ;pic18f2550.h: 5940: struct {\n[; ;pic18f2550.h: 5941: unsigned :3;\n[; ;pic18f2550.h: 5942: unsigned CHSN3 :1;\n[; ;pic18f2550.h: 5943: };\n[; ;pic18f2550.h: 5944: struct {\n[; ;pic18f2550.h: 5945: unsigned :4;\n[; ;pic18f2550.h: 5946: unsigned VCFG01 :1;\n[; ;pic18f2550.h: 5947: };\n[; ;pic18f2550.h: 5948: struct {\n[; ;pic18f2550.h: 5949: unsigned :5;\n[; ;pic18f2550.h: 5950: unsigned VCFG11 :1;\n[; ;pic18f2550.h: 5951: };\n[; ;pic18f2550.h: 5952: } ADCON1bits_t;\n[; ;pic18f2550.h: 5953: extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n[; ;pic18f2550.h: 6012: extern volatile unsigned char ADCON0 @ 0xFC2;\n\"6014\n[; ;pic18f2550.h: 6014: asm(\"ADCON0 equ 0FC2h\");\n[; <\" ADCON0 equ 0FC2h ;# \">\n[; ;pic18f2550.h: 6017: typedef union {\n[; ;pic18f2550.h: 6018: struct {\n[; ;pic18f2550.h: 6019: unsigned :1;\n[; ;pic18f2550.h: 6020: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6021: };\n[; ;pic18f2550.h: 6022: struct {\n[; ;pic18f2550.h: 6023: unsigned ADON :1;\n[; ;pic18f2550.h: 6024: unsigned GO_nDONE :1;\n[; ;pic18f2550.h: 6025: unsigned CHS :4;\n[; ;pic18f2550.h: 6026: };\n[; ;pic18f2550.h: 6027: struct {\n[; ;pic18f2550.h: 6028: unsigned :1;\n[; ;pic18f2550.h: 6029: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6030: };\n[; ;pic18f2550.h: 6031: struct {\n[; ;pic18f2550.h: 6032: unsigned :1;\n[; ;pic18f2550.h: 6033: unsigned GO_DONE :1;\n[; ;pic18f2550.h: 6034: unsigned CHS0 :1;\n[; ;pic18f2550.h: 6035: unsigned CHS1 :1;\n[; ;pic18f2550.h: 6036: unsigned CHS2 :1;\n[; ;pic18f2550.h: 6037: unsigned CHS3 :1;\n[; ;pic18f2550.h: 6038: };\n[; ;pic18f2550.h: 6039: struct {\n[; ;pic18f2550.h: 6040: unsigned :1;\n[; ;pic18f2550.h: 6041: unsigned DONE :1;\n[; ;pic18f2550.h: 6042: };\n[; ;pic18f2550.h: 6043: struct {\n[; ;pic18f2550.h: 6044: unsigned :1;\n[; ;pic18f2550.h: 6045: unsigned GO :1;\n[; ;pic18f2550.h: 6046: };\n[; ;pic18f2550.h: 6047: struct {\n[; ;pic18f2550.h: 6048: unsigned :1;\n[; ;pic18f2550.h: 6049: unsigned NOT_DONE :1;\n[; ;pic18f2550.h: 6050: };\n[; ;pic18f2550.h: 6051: struct {\n[; ;pic18f2550.h: 6052: unsigned :1;\n[; ;pic18f2550.h: 6053: unsigned nDONE :1;\n[; ;pic18f2550.h: 6054: };\n[; ;pic18f2550.h: 6055: struct {\n[; ;pic18f2550.h: 6056: unsigned :1;\n[; ;pic18f2550.h: 6057: unsigned GODONE :1;\n[; ;pic18f2550.h: 6058: };\n[; ;pic18f2550.h: 6059: } ADCON0bits_t;\n[; ;pic18f2550.h: 6060: extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n[; ;pic18f2550.h: 6134: extern volatile unsigned short ADRES @ 0xFC3;\n\"6136\n[; ;pic18f2550.h: 6136: asm(\"ADRES equ 0FC3h\");\n[; <\" ADRES equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6140: extern volatile unsigned char ADRESL @ 0xFC3;\n\"6142\n[; ;pic18f2550.h: 6142: asm(\"ADRESL equ 0FC3h\");\n[; <\" ADRESL equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6146: extern volatile unsigned char ADRESH @ 0xFC4;\n\"6148\n[; ;pic18f2550.h: 6148: asm(\"ADRESH equ 0FC4h\");\n[; <\" ADRESH equ 0FC4h ;# \">\n[; ;pic18f2550.h: 6152: extern volatile unsigned char SSPCON2 @ 0xFC5;\n\"6154\n[; ;pic18f2550.h: 6154: asm(\"SSPCON2 equ 0FC5h\");\n[; <\" SSPCON2 equ 0FC5h ;# \">\n[; ;pic18f2550.h: 6157: typedef union {\n[; ;pic18f2550.h: 6158: struct {\n[; ;pic18f2550.h: 6159: unsigned SEN :1;\n[; ;pic18f2550.h: 6160: unsigned RSEN :1;\n[; ;pic18f2550.h: 6161: unsigned PEN :1;\n[; ;pic18f2550.h: 6162: unsigned RCEN :1;\n[; ;pic18f2550.h: 6163: unsigned ACKEN :1;\n[; ;pic18f2550.h: 6164: unsigned ACKDT :1;\n[; ;pic18f2550.h: 6165: unsigned ACKSTAT :1;\n[; ;pic18f2550.h: 6166: unsigned GCEN :1;\n[; ;pic18f2550.h: 6167: };\n[; ;pic18f2550.h: 6168: } SSPCON2bits_t;\n[; ;pic18f2550.h: 6169: extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n[; ;pic18f2550.h: 6213: extern volatile unsigned char SSPCON1 @ 0xFC6;\n\"6215\n[; ;pic18f2550.h: 6215: asm(\"SSPCON1 equ 0FC6h\");\n[; <\" SSPCON1 equ 0FC6h ;# \">\n[; ;pic18f2550.h: 6218: typedef union {\n[; ;pic18f2550.h: 6219: struct {\n[; ;pic18f2550.h: 6220: unsigned SSPM :4;\n[; ;pic18f2550.h: 6221: unsigned CKP :1;\n[; ;pic18f2550.h: 6222: unsigned SSPEN :1;\n[; ;pic18f2550.h: 6223: unsigned SSPOV :1;\n[; ;pic18f2550.h: 6224: unsigned WCOL :1;\n[; ;pic18f2550.h: 6225: };\n[; ;pic18f2550.h: 6226: struct {\n[; ;pic18f2550.h: 6227: unsigned SSPM0 :1;\n[; ;pic18f2550.h: 6228: unsigned SSPM1 :1;\n[; ;pic18f2550.h: 6229: unsigned SSPM2 :1;\n[; ;pic18f2550.h: 6230: unsigned SSPM3 :1;\n[; ;pic18f2550.h: 6231: };\n[; ;pic18f2550.h: 6232: } SSPCON1bits_t;\n[; ;pic18f2550.h: 6233: extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n[; ;pic18f2550.h: 6282: extern volatile unsigned char SSPSTAT @ 0xFC7;\n\"6284\n[; ;pic18f2550.h: 6284: asm(\"SSPSTAT equ 0FC7h\");\n[; <\" SSPSTAT equ 0FC7h ;# \">\n[; ;pic18f2550.h: 6287: typedef union {\n[; ;pic18f2550.h: 6288: struct {\n[; ;pic18f2550.h: 6289: unsigned :2;\n[; ;pic18f2550.h: 6290: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6291: };\n[; ;pic18f2550.h: 6292: struct {\n[; ;pic18f2550.h: 6293: unsigned :5;\n[; ;pic18f2550.h: 6294: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6295: };\n[; ;pic18f2550.h: 6296: struct {\n[; ;pic18f2550.h: 6297: unsigned BF :1;\n[; ;pic18f2550.h: 6298: unsigned UA :1;\n[; ;pic18f2550.h: 6299: unsigned R_nW :1;\n[; ;pic18f2550.h: 6300: unsigned S :1;\n[; ;pic18f2550.h: 6301: unsigned P :1;\n[; ;pic18f2550.h: 6302: unsigned D_nA :1;\n[; ;pic18f2550.h: 6303: unsigned CKE :1;\n[; ;pic18f2550.h: 6304: unsigned SMP :1;\n[; ;pic18f2550.h: 6305: };\n[; ;pic18f2550.h: 6306: struct {\n[; ;pic18f2550.h: 6307: unsigned :2;\n[; ;pic18f2550.h: 6308: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6309: };\n[; ;pic18f2550.h: 6310: struct {\n[; ;pic18f2550.h: 6311: unsigned :5;\n[; ;pic18f2550.h: 6312: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6313: };\n[; ;pic18f2550.h: 6314: struct {\n[; ;pic18f2550.h: 6315: unsigned :2;\n[; ;pic18f2550.h: 6316: unsigned R_W :1;\n[; ;pic18f2550.h: 6317: unsigned :2;\n[; ;pic18f2550.h: 6318: unsigned D_A :1;\n[; ;pic18f2550.h: 6319: };\n[; ;pic18f2550.h: 6320: struct {\n[; ;pic18f2550.h: 6321: unsigned :2;\n[; ;pic18f2550.h: 6322: unsigned I2C_READ :1;\n[; ;pic18f2550.h: 6323: unsigned I2C_START :1;\n[; ;pic18f2550.h: 6324: unsigned I2C_STOP :1;\n[; ;pic18f2550.h: 6325: unsigned I2C_DAT :1;\n[; ;pic18f2550.h: 6326: };\n[; ;pic18f2550.h: 6327: struct {\n[; ;pic18f2550.h: 6328: unsigned :2;\n[; ;pic18f2550.h: 6329: unsigned nW :1;\n[; ;pic18f2550.h: 6330: unsigned :2;\n[; ;pic18f2550.h: 6331: unsigned nA :1;\n[; ;pic18f2550.h: 6332: };\n[; ;pic18f2550.h: 6333: struct {\n[; ;pic18f2550.h: 6334: unsigned :2;\n[; ;pic18f2550.h: 6335: unsigned NOT_WRITE :1;\n[; ;pic18f2550.h: 6336: };\n[; ;pic18f2550.h: 6337: struct {\n[; ;pic18f2550.h: 6338: unsigned :5;\n[; ;pic18f2550.h: 6339: unsigned NOT_ADDRESS :1;\n[; ;pic18f2550.h: 6340: };\n[; ;pic18f2550.h: 6341: struct {\n[; ;pic18f2550.h: 6342: unsigned :2;\n[; ;pic18f2550.h: 6343: unsigned nWRITE :1;\n[; ;pic18f2550.h: 6344: unsigned :2;\n[; ;pic18f2550.h: 6345: unsigned nADDRESS :1;\n[; ;pic18f2550.h: 6346: };\n[; ;pic18f2550.h: 6347: struct {\n[; ;pic18f2550.h: 6348: unsigned :2;\n[; ;pic18f2550.h: 6349: unsigned READ_WRITE :1;\n[; ;pic18f2550.h: 6350: unsigned :2;\n[; ;pic18f2550.h: 6351: unsigned DATA_ADDRESS :1;\n[; ;pic18f2550.h: 6352: };\n[; ;pic18f2550.h: 6353: struct {\n[; ;pic18f2550.h: 6354: unsigned :2;\n[; ;pic18f2550.h: 6355: unsigned R :1;\n[; ;pic18f2550.h: 6356: unsigned :2;\n[; ;pic18f2550.h: 6357: unsigned D :1;\n[; ;pic18f2550.h: 6358: };\n[; ;pic18f2550.h: 6359: struct {\n[; ;pic18f2550.h: 6360: unsigned :5;\n[; ;pic18f2550.h: 6361: unsigned DA :1;\n[; ;pic18f2550.h: 6362: };\n[; ;pic18f2550.h: 6363: struct {\n[; ;pic18f2550.h: 6364: unsigned :2;\n[; ;pic18f2550.h: 6365: unsigned RW :1;\n[; ;pic18f2550.h: 6366: };\n[; ;pic18f2550.h: 6367: struct {\n[; ;pic18f2550.h: 6368: unsigned :3;\n[; ;pic18f2550.h: 6369: unsigned START :1;\n[; ;pic18f2550.h: 6370: };\n[; ;pic18f2550.h: 6371: struct {\n[; ;pic18f2550.h: 6372: unsigned :4;\n[; ;pic18f2550.h: 6373: unsigned STOP :1;\n[; ;pic18f2550.h: 6374: };\n[; ;pic18f2550.h: 6375: struct {\n[; ;pic18f2550.h: 6376: unsigned :2;\n[; ;pic18f2550.h: 6377: unsigned NOT_W :1;\n[; ;pic18f2550.h: 6378: };\n[; ;pic18f2550.h: 6379: struct {\n[; ;pic18f2550.h: 6380: unsigned :5;\n[; ;pic18f2550.h: 6381: unsigned NOT_A :1;\n[; ;pic18f2550.h: 6382: };\n[; ;pic18f2550.h: 6383: } SSPSTATbits_t;\n[; ;pic18f2550.h: 6384: extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n[; ;pic18f2550.h: 6548: extern volatile unsigned char SSPADD @ 0xFC8;\n\"6550\n[; ;pic18f2550.h: 6550: asm(\"SSPADD equ 0FC8h\");\n[; <\" SSPADD equ 0FC8h ;# \">\n[; ;pic18f2550.h: 6554: extern volatile unsigned char SSPBUF @ 0xFC9;\n\"6556\n[; ;pic18f2550.h: 6556: asm(\"SSPBUF equ 0FC9h\");\n[; <\" SSPBUF equ 0FC9h ;# \">\n[; ;pic18f2550.h: 6560: extern volatile unsigned char T2CON @ 0xFCA;\n\"6562\n[; ;pic18f2550.h: 6562: asm(\"T2CON equ 0FCAh\");\n[; <\" T2CON equ 0FCAh ;# \">\n[; ;pic18f2550.h: 6565: typedef union {\n[; ;pic18f2550.h: 6566: struct {\n[; ;pic18f2550.h: 6567: unsigned T2CKPS :2;\n[; ;pic18f2550.h: 6568: unsigned TMR2ON :1;\n[; ;pic18f2550.h: 6569: unsigned TOUTPS :4;\n[; ;pic18f2550.h: 6570: };\n[; ;pic18f2550.h: 6571: struct {\n[; ;pic18f2550.h: 6572: unsigned T2CKPS0 :1;\n[; ;pic18f2550.h: 6573: unsigned T2CKPS1 :1;\n[; ;pic18f2550.h: 6574: unsigned :1;\n[; ;pic18f2550.h: 6575: unsigned T2OUTPS0 :1;\n[; ;pic18f2550.h: 6576: unsigned T2OUTPS1 :1;\n[; ;pic18f2550.h: 6577: unsigned T2OUTPS2 :1;\n[; ;pic18f2550.h: 6578: unsigned T2OUTPS3 :1;\n[; ;pic18f2550.h: 6579: };\n[; ;pic18f2550.h: 6580: struct {\n[; ;pic18f2550.h: 6581: unsigned :3;\n[; ;pic18f2550.h: 6582: unsigned TOUTPS0 :1;\n[; ;pic18f2550.h: 6583: unsigned TOUTPS1 :1;\n[; ;pic18f2550.h: 6584: unsigned TOUTPS2 :1;\n[; ;pic18f2550.h: 6585: unsigned TOUTPS3 :1;\n[; ;pic18f2550.h: 6586: };\n[; ;pic18f2550.h: 6587: } T2CONbits_t;\n[; ;pic18f2550.h: 6588: extern volatile T2CONbits_t T2CONbits @ 0xFCA;\n[; ;pic18f2550.h: 6657: extern volatile unsigned char PR2 @ 0xFCB;\n\"6659\n[; ;pic18f2550.h: 6659: asm(\"PR2 equ 0FCBh\");\n[; <\" PR2 equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6662: extern volatile unsigned char MEMCON @ 0xFCB;\n\"6664\n[; ;pic18f2550.h: 6664: asm(\"MEMCON equ 0FCBh\");\n[; <\" MEMCON equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6668: extern volatile unsigned char TMR2 @ 0xFCC;\n\"6670\n[; ;pic18f2550.h: 6670: asm(\"TMR2 equ 0FCCh\");\n[; <\" TMR2 equ 0FCCh ;# \">\n[; ;pic18f2550.h: 6674: extern volatile unsigned char T1CON @ 0xFCD;\n\"6676\n[; ;pic18f2550.h: 6676: asm(\"T1CON equ 0FCDh\");\n[; <\" T1CON equ 0FCDh ;# \">\n[; ;pic18f2550.h: 6679: typedef union {\n[; ;pic18f2550.h: 6680: struct {\n[; ;pic18f2550.h: 6681: unsigned :2;\n[; ;pic18f2550.h: 6682: unsigned NOT_T1SYNC :1;\n[; ;pic18f2550.h: 6683: };\n[; ;pic18f2550.h: 6684: struct {\n[; ;pic18f2550.h: 6685: unsigned TMR1ON :1;\n[; ;pic18f2550.h: 6686: unsigned TMR1CS :1;\n[; ;pic18f2550.h: 6687: unsigned nT1SYNC :1;\n[; ;pic18f2550.h: 6688: unsigned T1OSCEN :1;\n[; ;pic18f2550.h: 6689: unsigned T1CKPS :2;\n[; ;pic18f2550.h: 6690: unsigned T1RUN :1;\n[; ;pic18f2550.h: 6691: unsigned RD16 :1;\n[; ;pic18f2550.h: 6692: };\n[; ;pic18f2550.h: 6693: struct {\n[; ;pic18f2550.h: 6694: unsigned :2;\n[; ;pic18f2550.h: 6695: unsigned T1SYNC :1;\n[; ;pic18f2550.h: 6696: unsigned :1;\n[; ;pic18f2550.h: 6697: unsigned T1CKPS0 :1;\n[; ;pic18f2550.h: 6698: unsigned T1CKPS1 :1;\n[; ;pic18f2550.h: 6699: };\n[; ;pic18f2550.h: 6700: struct {\n[; ;pic18f2550.h: 6701: unsigned :3;\n[; ;pic18f2550.h: 6702: unsigned SOSCEN :1;\n[; ;pic18f2550.h: 6703: };\n[; ;pic18f2550.h: 6704: struct {\n[; ;pic18f2550.h: 6705: unsigned :7;\n[; ;pic18f2550.h: 6706: unsigned T1RD16 :1;\n[; ;pic18f2550.h: 6707: };\n[; ;pic18f2550.h: 6708: } T1CONbits_t;\n[; ;pic18f2550.h: 6709: extern volatile T1CONbits_t T1CONbits @ 0xFCD;\n[; ;pic18f2550.h: 6778: extern volatile unsigned short TMR1 @ 0xFCE;\n\"6780\n[; ;pic18f2550.h: 6780: asm(\"TMR1 equ 0FCEh\");\n[; <\" TMR1 equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6784: extern volatile unsigned char TMR1L @ 0xFCE;\n\"6786\n[; ;pic18f2550.h: 6786: asm(\"TMR1L equ 0FCEh\");\n[; <\" TMR1L equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6790: extern volatile unsigned char TMR1H @ 0xFCF;\n\"6792\n[; ;pic18f2550.h: 6792: asm(\"TMR1H equ 0FCFh\");\n[; <\" TMR1H equ 0FCFh ;# \">\n[; ;pic18f2550.h: 6796: extern volatile unsigned char RCON @ 0xFD0;\n\"6798\n[; ;pic18f2550.h: 6798: asm(\"RCON equ 0FD0h\");\n[; <\" RCON equ 0FD0h ;# \">\n[; ;pic18f2550.h: 6801: typedef union {\n[; ;pic18f2550.h: 6802: struct {\n[; ;pic18f2550.h: 6803: unsigned NOT_BOR :1;\n[; ;pic18f2550.h: 6804: };\n[; ;pic18f2550.h: 6805: struct {\n[; ;pic18f2550.h: 6806: unsigned :1;\n[; ;pic18f2550.h: 6807: unsigned NOT_POR :1;\n[; ;pic18f2550.h: 6808: };\n[; ;pic18f2550.h: 6809: struct {\n[; ;pic18f2550.h: 6810: unsigned :2;\n[; ;pic18f2550.h: 6811: unsigned NOT_PD :1;\n[; ;pic18f2550.h: 6812: };\n[; ;pic18f2550.h: 6813: struct {\n[; ;pic18f2550.h: 6814: unsigned :3;\n[; ;pic18f2550.h: 6815: unsigned NOT_TO :1;\n[; ;pic18f2550.h: 6816: };\n[; ;pic18f2550.h: 6817: struct {\n[; ;pic18f2550.h: 6818: unsigned :4;\n[; ;pic18f2550.h: 6819: unsigned NOT_RI :1;\n[; ;pic18f2550.h: 6820: };\n[; ;pic18f2550.h: 6821: struct {\n[; ;pic18f2550.h: 6822: unsigned nBOR :1;\n[; ;pic18f2550.h: 6823: unsigned nPOR :1;\n[; ;pic18f2550.h: 6824: unsigned nPD :1;\n[; ;pic18f2550.h: 6825: unsigned nTO :1;\n[; ;pic18f2550.h: 6826: unsigned nRI :1;\n[; ;pic18f2550.h: 6827: unsigned :1;\n[; ;pic18f2550.h: 6828: unsigned SBOREN :1;\n[; ;pic18f2550.h: 6829: unsigned IPEN :1;\n[; ;pic18f2550.h: 6830: };\n[; ;pic18f2550.h: 6831: struct {\n[; ;pic18f2550.h: 6832: unsigned :7;\n[; ;pic18f2550.h: 6833: unsigned NOT_IPEN :1;\n[; ;pic18f2550.h: 6834: };\n[; ;pic18f2550.h: 6835: struct {\n[; ;pic18f2550.h: 6836: unsigned BOR :1;\n[; ;pic18f2550.h: 6837: unsigned POR :1;\n[; ;pic18f2550.h: 6838: unsigned PD :1;\n[; ;pic18f2550.h: 6839: unsigned TO :1;\n[; ;pic18f2550.h: 6840: unsigned RI :1;\n[; ;pic18f2550.h: 6841: unsigned :2;\n[; ;pic18f2550.h: 6842: unsigned nIPEN :1;\n[; ;pic18f2550.h: 6843: };\n[; ;pic18f2550.h: 6844: } RCONbits_t;\n[; ;pic18f2550.h: 6845: extern volatile RCONbits_t RCONbits @ 0xFD0;\n[; ;pic18f2550.h: 6944: extern volatile unsigned char WDTCON @ 0xFD1;\n\"6946\n[; ;pic18f2550.h: 6946: asm(\"WDTCON equ 0FD1h\");\n[; <\" WDTCON equ 0FD1h ;# \">\n[; ;pic18f2550.h: 6949: typedef union {\n[; ;pic18f2550.h: 6950: struct {\n[; ;pic18f2550.h: 6951: unsigned SWDTEN :1;\n[; ;pic18f2550.h: 6952: };\n[; ;pic18f2550.h: 6953: struct {\n[; ;pic18f2550.h: 6954: unsigned SWDTE :1;\n[; ;pic18f2550.h: 6955: };\n[; ;pic18f2550.h: 6956: } WDTCONbits_t;\n[; ;pic18f2550.h: 6957: extern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n[; ;pic18f2550.h: 6971: extern volatile unsigned char HLVDCON @ 0xFD2;\n\"6973\n[; ;pic18f2550.h: 6973: asm(\"HLVDCON equ 0FD2h\");\n[; <\" HLVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6976: extern volatile unsigned char LVDCON @ 0xFD2;\n\"6978\n[; ;pic18f2550.h: 6978: asm(\"LVDCON equ 0FD2h\");\n[; <\" LVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6981: typedef union {\n[; ;pic18f2550.h: 6982: struct {\n[; ;pic18f2550.h: 6983: unsigned HLVDL :4;\n[; ;pic18f2550.h: 6984: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 6985: unsigned IRVST :1;\n[; ;pic18f2550.h: 6986: unsigned :1;\n[; ;pic18f2550.h: 6987: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 6988: };\n[; ;pic18f2550.h: 6989: struct {\n[; ;pic18f2550.h: 6990: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 6991: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 6992: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 6993: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 6994: };\n[; ;pic18f2550.h: 6995: struct {\n[; ;pic18f2550.h: 6996: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 6997: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 6998: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 6999: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7000: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7001: unsigned IVRST :1;\n[; ;pic18f2550.h: 7002: };\n[; ;pic18f2550.h: 7003: struct {\n[; ;pic18f2550.h: 7004: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7005: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7006: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7007: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7008: unsigned :1;\n[; ;pic18f2550.h: 7009: unsigned BGST :1;\n[; ;pic18f2550.h: 7010: };\n[; ;pic18f2550.h: 7011: } HLVDCONbits_t;\n[; ;pic18f2550.h: 7012: extern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7110: typedef union {\n[; ;pic18f2550.h: 7111: struct {\n[; ;pic18f2550.h: 7112: unsigned HLVDL :4;\n[; ;pic18f2550.h: 7113: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 7114: unsigned IRVST :1;\n[; ;pic18f2550.h: 7115: unsigned :1;\n[; ;pic18f2550.h: 7116: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 7117: };\n[; ;pic18f2550.h: 7118: struct {\n[; ;pic18f2550.h: 7119: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 7120: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 7121: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 7122: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 7123: };\n[; ;pic18f2550.h: 7124: struct {\n[; ;pic18f2550.h: 7125: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 7126: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 7127: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 7128: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7129: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7130: unsigned IVRST :1;\n[; ;pic18f2550.h: 7131: };\n[; ;pic18f2550.h: 7132: struct {\n[; ;pic18f2550.h: 7133: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7134: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7135: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7136: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7137: unsigned :1;\n[; ;pic18f2550.h: 7138: unsigned BGST :1;\n[; ;pic18f2550.h: 7139: };\n[; ;pic18f2550.h: 7140: } LVDCONbits_t;\n[; ;pic18f2550.h: 7141: extern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7240: extern volatile unsigned char OSCCON @ 0xFD3;\n\"7242\n[; ;pic18f2550.h: 7242: asm(\"OSCCON equ 0FD3h\");\n[; <\" OSCCON equ 0FD3h ;# \">\n[; ;pic18f2550.h: 7245: typedef union {\n[; ;pic18f2550.h: 7246: struct {\n[; ;pic18f2550.h: 7247: unsigned SCS :2;\n[; ;pic18f2550.h: 7248: unsigned IOFS :1;\n[; ;pic18f2550.h: 7249: unsigned OSTS :1;\n[; ;pic18f2550.h: 7250: unsigned IRCF :3;\n[; ;pic18f2550.h: 7251: unsigned IDLEN :1;\n[; ;pic18f2550.h: 7252: };\n[; ;pic18f2550.h: 7253: struct {\n[; ;pic18f2550.h: 7254: unsigned SCS0 :1;\n[; ;pic18f2550.h: 7255: unsigned SCS1 :1;\n[; ;pic18f2550.h: 7256: unsigned FLTS :1;\n[; ;pic18f2550.h: 7257: unsigned :1;\n[; ;pic18f2550.h: 7258: unsigned IRCF0 :1;\n[; ;pic18f2550.h: 7259: unsigned IRCF1 :1;\n[; ;pic18f2550.h: 7260: unsigned IRCF2 :1;\n[; ;pic18f2550.h: 7261: };\n[; ;pic18f2550.h: 7262: } OSCCONbits_t;\n[; ;pic18f2550.h: 7263: extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n[; ;pic18f2550.h: 7322: extern volatile unsigned char T0CON @ 0xFD5;\n\"7324\n[; ;pic18f2550.h: 7324: asm(\"T0CON equ 0FD5h\");\n[; <\" T0CON equ 0FD5h ;# \">\n[; ;pic18f2550.h: 7327: typedef union {\n[; ;pic18f2550.h: 7328: struct {\n[; ;pic18f2550.h: 7329: unsigned T0PS :3;\n[; ;pic18f2550.h: 7330: unsigned PSA :1;\n[; ;pic18f2550.h: 7331: unsigned T0SE :1;\n[; ;pic18f2550.h: 7332: unsigned T0CS :1;\n[; ;pic18f2550.h: 7333: unsigned T08BIT :1;\n[; ;pic18f2550.h: 7334: unsigned TMR0ON :1;\n[; ;pic18f2550.h: 7335: };\n[; ;pic18f2550.h: 7336: struct {\n[; ;pic18f2550.h: 7337: unsigned T0PS0 :1;\n[; ;pic18f2550.h: 7338: unsigned T0PS1 :1;\n[; ;pic18f2550.h: 7339: unsigned T0PS2 :1;\n[; ;pic18f2550.h: 7340: };\n[; ;pic18f2550.h: 7341: } T0CONbits_t;\n[; ;pic18f2550.h: 7342: extern volatile T0CONbits_t T0CONbits @ 0xFD5;\n[; ;pic18f2550.h: 7391: extern volatile unsigned short TMR0 @ 0xFD6;\n\"7393\n[; ;pic18f2550.h: 7393: asm(\"TMR0 equ 0FD6h\");\n[; <\" TMR0 equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7397: extern volatile unsigned char TMR0L @ 0xFD6;\n\"7399\n[; ;pic18f2550.h: 7399: asm(\"TMR0L equ 0FD6h\");\n[; <\" TMR0L equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7403: extern volatile unsigned char TMR0H @ 0xFD7;\n\"7405\n[; ;pic18f2550.h: 7405: asm(\"TMR0H equ 0FD7h\");\n[; <\" TMR0H equ 0FD7h ;# \">\n[; ;pic18f2550.h: 7409: extern volatile unsigned char STATUS @ 0xFD8;\n\"7411\n[; ;pic18f2550.h: 7411: asm(\"STATUS equ 0FD8h\");\n[; <\" STATUS equ 0FD8h ;# \">\n[; ;pic18f2550.h: 7414: typedef union {\n[; ;pic18f2550.h: 7415: struct {\n[; ;pic18f2550.h: 7416: unsigned C :1;\n[; ;pic18f2550.h: 7417: unsigned DC :1;\n[; ;pic18f2550.h: 7418: unsigned Z :1;\n[; ;pic18f2550.h: 7419: unsigned OV :1;\n[; ;pic18f2550.h: 7420: unsigned N :1;\n[; ;pic18f2550.h: 7421: };\n[; ;pic18f2550.h: 7422: struct {\n[; ;pic18f2550.h: 7423: unsigned CARRY :1;\n[; ;pic18f2550.h: 7424: };\n[; ;pic18f2550.h: 7425: struct {\n[; ;pic18f2550.h: 7426: unsigned :4;\n[; ;pic18f2550.h: 7427: unsigned NEGATIVE :1;\n[; ;pic18f2550.h: 7428: };\n[; ;pic18f2550.h: 7429: struct {\n[; ;pic18f2550.h: 7430: unsigned :3;\n[; ;pic18f2550.h: 7431: unsigned OVERFLOW :1;\n[; ;pic18f2550.h: 7432: };\n[; ;pic18f2550.h: 7433: struct {\n[; ;pic18f2550.h: 7434: unsigned :2;\n[; ;pic18f2550.h: 7435: unsigned ZERO :1;\n[; ;pic18f2550.h: 7436: };\n[; ;pic18f2550.h: 7437: } STATUSbits_t;\n[; ;pic18f2550.h: 7438: extern volatile STATUSbits_t STATUSbits @ 0xFD8;\n[; ;pic18f2550.h: 7487: extern volatile unsigned short FSR2 @ 0xFD9;\n\"7489\n[; ;pic18f2550.h: 7489: asm(\"FSR2 equ 0FD9h\");\n[; <\" FSR2 equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7493: extern volatile unsigned char FSR2L @ 0xFD9;\n\"7495\n[; ;pic18f2550.h: 7495: asm(\"FSR2L equ 0FD9h\");\n[; <\" FSR2L equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7499: extern volatile unsigned char FSR2H @ 0xFDA;\n\"7501\n[; ;pic18f2550.h: 7501: asm(\"FSR2H equ 0FDAh\");\n[; <\" FSR2H equ 0FDAh ;# \">\n[; ;pic18f2550.h: 7505: extern volatile unsigned char PLUSW2 @ 0xFDB;\n\"7507\n[; ;pic18f2550.h: 7507: asm(\"PLUSW2 equ 0FDBh\");\n[; <\" PLUSW2 equ 0FDBh ;# \">\n[; ;pic18f2550.h: 7511: extern volatile unsigned char PREINC2 @ 0xFDC;\n\"7513\n[; ;pic18f2550.h: 7513: asm(\"PREINC2 equ 0FDCh\");\n[; <\" PREINC2 equ 0FDCh ;# \">\n[; ;pic18f2550.h: 7517: extern volatile unsigned char POSTDEC2 @ 0xFDD;\n\"7519\n[; ;pic18f2550.h: 7519: asm(\"POSTDEC2 equ 0FDDh\");\n[; <\" POSTDEC2 equ 0FDDh ;# \">\n[; ;pic18f2550.h: 7523: extern volatile unsigned char POSTINC2 @ 0xFDE;\n\"7525\n[; ;pic18f2550.h: 7525: asm(\"POSTINC2 equ 0FDEh\");\n[; <\" POSTINC2 equ 0FDEh ;# \">\n[; ;pic18f2550.h: 7529: extern volatile unsigned char INDF2 @ 0xFDF;\n\"7531\n[; ;pic18f2550.h: 7531: asm(\"INDF2 equ 0FDFh\");\n[; <\" INDF2 equ 0FDFh ;# \">\n[; ;pic18f2550.h: 7535: extern volatile unsigned char BSR @ 0xFE0;\n\"7537\n[; ;pic18f2550.h: 7537: asm(\"BSR equ 0FE0h\");\n[; <\" BSR equ 0FE0h ;# \">\n[; ;pic18f2550.h: 7541: extern volatile unsigned short FSR1 @ 0xFE1;\n\"7543\n[; ;pic18f2550.h: 7543: asm(\"FSR1 equ 0FE1h\");\n[; <\" FSR1 equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7547: extern volatile unsigned char FSR1L @ 0xFE1;\n\"7549\n[; ;pic18f2550.h: 7549: asm(\"FSR1L equ 0FE1h\");\n[; <\" FSR1L equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7553: extern volatile unsigned char FSR1H @ 0xFE2;\n\"7555\n[; ;pic18f2550.h: 7555: asm(\"FSR1H equ 0FE2h\");\n[; <\" FSR1H equ 0FE2h ;# \">\n[; ;pic18f2550.h: 7559: extern volatile unsigned char PLUSW1 @ 0xFE3;\n\"7561\n[; ;pic18f2550.h: 7561: asm(\"PLUSW1 equ 0FE3h\");\n[; <\" PLUSW1 equ 0FE3h ;# \">\n[; ;pic18f2550.h: 7565: extern volatile unsigned char PREINC1 @ 0xFE4;\n\"7567\n[; ;pic18f2550.h: 7567: asm(\"PREINC1 equ 0FE4h\");\n[; <\" PREINC1 equ 0FE4h ;# \">\n[; ;pic18f2550.h: 7571: extern volatile unsigned char POSTDEC1 @ 0xFE5;\n\"7573\n[; ;pic18f2550.h: 7573: asm(\"POSTDEC1 equ 0FE5h\");\n[; <\" POSTDEC1 equ 0FE5h ;# \">\n[; ;pic18f2550.h: 7577: extern volatile unsigned char POSTINC1 @ 0xFE6;\n\"7579\n[; ;pic18f2550.h: 7579: asm(\"POSTINC1 equ 0FE6h\");\n[; <\" POSTINC1 equ 0FE6h ;# \">\n[; ;pic18f2550.h: 7583: extern volatile unsigned char INDF1 @ 0xFE7;\n\"7585\n[; ;pic18f2550.h: 7585: asm(\"INDF1 equ 0FE7h\");\n[; <\" INDF1 equ 0FE7h ;# \">\n[; ;pic18f2550.h: 7589: extern volatile unsigned char WREG @ 0xFE8;\n\"7591\n[; ;pic18f2550.h: 7591: asm(\"WREG equ 0FE8h\");\n[; <\" WREG equ 0FE8h ;# \">\n[; ;pic18f2550.h: 7595: extern volatile unsigned short FSR0 @ 0xFE9;\n\"7597\n[; ;pic18f2550.h: 7597: asm(\"FSR0 equ 0FE9h\");\n[; <\" FSR0 equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7601: extern volatile unsigned char FSR0L @ 0xFE9;\n\"7603\n[; ;pic18f2550.h: 7603: asm(\"FSR0L equ 0FE9h\");\n[; <\" FSR0L equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7607: extern volatile unsigned char FSR0H @ 0xFEA;\n\"7609\n[; ;pic18f2550.h: 7609: asm(\"FSR0H equ 0FEAh\");\n[; <\" FSR0H equ 0FEAh ;# \">\n[; ;pic18f2550.h: 7613: extern volatile unsigned char PLUSW0 @ 0xFEB;\n\"7615\n[; ;pic18f2550.h: 7615: asm(\"PLUSW0 equ 0FEBh\");\n[; <\" PLUSW0 equ 0FEBh ;# \">\n[; ;pic18f2550.h: 7619: extern volatile unsigned char PREINC0 @ 0xFEC;\n\"7621\n[; ;pic18f2550.h: 7621: asm(\"PREINC0 equ 0FECh\");\n[; <\" PREINC0 equ 0FECh ;# \">\n[; ;pic18f2550.h: 7625: extern volatile unsigned char POSTDEC0 @ 0xFED;\n\"7627\n[; ;pic18f2550.h: 7627: asm(\"POSTDEC0 equ 0FEDh\");\n[; <\" POSTDEC0 equ 0FEDh ;# \">\n[; ;pic18f2550.h: 7631: extern volatile unsigned char POSTINC0 @ 0xFEE;\n\"7633\n[; ;pic18f2550.h: 7633: asm(\"POSTINC0 equ 0FEEh\");\n[; <\" POSTINC0 equ 0FEEh ;# \">\n[; ;pic18f2550.h: 7637: extern volatile unsigned char INDF0 @ 0xFEF;\n\"7639\n[; ;pic18f2550.h: 7639: asm(\"INDF0 equ 0FEFh\");\n[; <\" INDF0 equ 0FEFh ;# \">\n[; ;pic18f2550.h: 7643: extern volatile unsigned char INTCON3 @ 0xFF0;\n\"7645\n[; ;pic18f2550.h: 7645: asm(\"INTCON3 equ 0FF0h\");\n[; <\" INTCON3 equ 0FF0h ;# \">\n[; ;pic18f2550.h: 7648: typedef union {\n[; ;pic18f2550.h: 7649: struct {\n[; ;pic18f2550.h: 7650: unsigned INT1IF :1;\n[; ;pic18f2550.h: 7651: unsigned INT2IF :1;\n[; ;pic18f2550.h: 7652: unsigned :1;\n[; ;pic18f2550.h: 7653: unsigned INT1IE :1;\n[; ;pic18f2550.h: 7654: unsigned INT2IE :1;\n[; ;pic18f2550.h: 7655: unsigned :1;\n[; ;pic18f2550.h: 7656: unsigned INT1IP :1;\n[; ;pic18f2550.h: 7657: unsigned INT2IP :1;\n[; ;pic18f2550.h: 7658: };\n[; ;pic18f2550.h: 7659: struct {\n[; ;pic18f2550.h: 7660: unsigned INT1F :1;\n[; ;pic18f2550.h: 7661: unsigned INT2F :1;\n[; ;pic18f2550.h: 7662: unsigned :1;\n[; ;pic18f2550.h: 7663: unsigned INT1E :1;\n[; ;pic18f2550.h: 7664: unsigned INT2E :1;\n[; ;pic18f2550.h: 7665: unsigned :1;\n[; ;pic18f2550.h: 7666: unsigned INT1P :1;\n[; ;pic18f2550.h: 7667: unsigned INT2P :1;\n[; ;pic18f2550.h: 7668: };\n[; ;pic18f2550.h: 7669: } INTCON3bits_t;\n[; ;pic18f2550.h: 7670: extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n[; ;pic18f2550.h: 7734: extern volatile unsigned char INTCON2 @ 0xFF1;\n\"7736\n[; ;pic18f2550.h: 7736: asm(\"INTCON2 equ 0FF1h\");\n[; <\" INTCON2 equ 0FF1h ;# \">\n[; ;pic18f2550.h: 7739: typedef union {\n[; ;pic18f2550.h: 7740: struct {\n[; ;pic18f2550.h: 7741: unsigned :7;\n[; ;pic18f2550.h: 7742: unsigned NOT_RBPU :1;\n[; ;pic18f2550.h: 7743: };\n[; ;pic18f2550.h: 7744: struct {\n[; ;pic18f2550.h: 7745: unsigned RBIP :1;\n[; ;pic18f2550.h: 7746: unsigned :1;\n[; ;pic18f2550.h: 7747: unsigned TMR0IP :1;\n[; ;pic18f2550.h: 7748: unsigned :1;\n[; ;pic18f2550.h: 7749: unsigned INTEDG2 :1;\n[; ;pic18f2550.h: 7750: unsigned INTEDG1 :1;\n[; ;pic18f2550.h: 7751: unsigned INTEDG0 :1;\n[; ;pic18f2550.h: 7752: unsigned nRBPU :1;\n[; ;pic18f2550.h: 7753: };\n[; ;pic18f2550.h: 7754: struct {\n[; ;pic18f2550.h: 7755: unsigned :2;\n[; ;pic18f2550.h: 7756: unsigned T0IP :1;\n[; ;pic18f2550.h: 7757: unsigned :4;\n[; ;pic18f2550.h: 7758: unsigned RBPU :1;\n[; ;pic18f2550.h: 7759: };\n[; ;pic18f2550.h: 7760: } INTCON2bits_t;\n[; ;pic18f2550.h: 7761: extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n[; ;pic18f2550.h: 7810: extern volatile unsigned char INTCON @ 0xFF2;\n\"7812\n[; ;pic18f2550.h: 7812: asm(\"INTCON equ 0FF2h\");\n[; <\" INTCON equ 0FF2h ;# \">\n[; ;pic18f2550.h: 7815: typedef union {\n[; ;pic18f2550.h: 7816: struct {\n[; ;pic18f2550.h: 7817: unsigned RBIF :1;\n[; ;pic18f2550.h: 7818: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7819: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7820: unsigned RBIE :1;\n[; ;pic18f2550.h: 7821: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7822: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7823: unsigned PEIE_GIEL :1;\n[; ;pic18f2550.h: 7824: unsigned GIE_GIEH :1;\n[; ;pic18f2550.h: 7825: };\n[; ;pic18f2550.h: 7826: struct {\n[; ;pic18f2550.h: 7827: unsigned RBIF :1;\n[; ;pic18f2550.h: 7828: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7829: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7830: unsigned RBIE :1;\n[; ;pic18f2550.h: 7831: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7832: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7833: unsigned PEIE :1;\n[; ;pic18f2550.h: 7834: unsigned GIE :1;\n[; ;pic18f2550.h: 7835: };\n[; ;pic18f2550.h: 7836: struct {\n[; ;pic18f2550.h: 7837: unsigned RBIF :1;\n[; ;pic18f2550.h: 7838: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7839: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7840: unsigned RBIE :1;\n[; ;pic18f2550.h: 7841: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7842: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7843: unsigned GIEL :1;\n[; ;pic18f2550.h: 7844: unsigned GIEH :1;\n[; ;pic18f2550.h: 7845: };\n[; ;pic18f2550.h: 7846: struct {\n[; ;pic18f2550.h: 7847: unsigned :1;\n[; ;pic18f2550.h: 7848: unsigned INT0F :1;\n[; ;pic18f2550.h: 7849: unsigned T0IF :1;\n[; ;pic18f2550.h: 7850: unsigned :1;\n[; ;pic18f2550.h: 7851: unsigned INT0E :1;\n[; ;pic18f2550.h: 7852: unsigned T0IE :1;\n[; ;pic18f2550.h: 7853: unsigned PEIE :1;\n[; ;pic18f2550.h: 7854: unsigned GIE :1;\n[; ;pic18f2550.h: 7855: };\n[; ;pic18f2550.h: 7856: struct {\n[; ;pic18f2550.h: 7857: unsigned :6;\n[; ;pic18f2550.h: 7858: unsigned GIEL :1;\n[; ;pic18f2550.h: 7859: unsigned GIEH :1;\n[; ;pic18f2550.h: 7860: };\n[; ;pic18f2550.h: 7861: } INTCONbits_t;\n[; ;pic18f2550.h: 7862: extern volatile INTCONbits_t INTCONbits @ 0xFF2;\n[; ;pic18f2550.h: 7946: extern volatile unsigned short PROD @ 0xFF3;\n\"7948\n[; ;pic18f2550.h: 7948: asm(\"PROD equ 0FF3h\");\n[; <\" PROD equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7952: extern volatile unsigned char PRODL @ 0xFF3;\n\"7954\n[; ;pic18f2550.h: 7954: asm(\"PRODL equ 0FF3h\");\n[; <\" PRODL equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7958: extern volatile unsigned char PRODH @ 0xFF4;\n\"7960\n[; ;pic18f2550.h: 7960: asm(\"PRODH equ 0FF4h\");\n[; <\" PRODH equ 0FF4h ;# \">\n[; ;pic18f2550.h: 7964: extern volatile unsigned char TABLAT @ 0xFF5;\n\"7966\n[; ;pic18f2550.h: 7966: asm(\"TABLAT equ 0FF5h\");\n[; <\" TABLAT equ 0FF5h ;# \">\n[; ;pic18f2550.h: 7971: extern volatile unsigned short long TBLPTR @ 0xFF6;\n\"7974\n[; ;pic18f2550.h: 7974: asm(\"TBLPTR equ 0FF6h\");\n[; <\" TBLPTR equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7978: extern volatile unsigned char TBLPTRL @ 0xFF6;\n\"7980\n[; ;pic18f2550.h: 7980: asm(\"TBLPTRL equ 0FF6h\");\n[; <\" TBLPTRL equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7984: extern volatile unsigned char TBLPTRH @ 0xFF7;\n\"7986\n[; ;pic18f2550.h: 7986: asm(\"TBLPTRH equ 0FF7h\");\n[; <\" TBLPTRH equ 0FF7h ;# \">\n[; ;pic18f2550.h: 7990: extern volatile unsigned char TBLPTRU @ 0xFF8;\n\"7992\n[; ;pic18f2550.h: 7992: asm(\"TBLPTRU equ 0FF8h\");\n[; <\" TBLPTRU equ 0FF8h ;# \">\n[; ;pic18f2550.h: 7997: extern volatile unsigned short long PCLAT @ 0xFF9;\n\"8000\n[; ;pic18f2550.h: 8000: asm(\"PCLAT equ 0FF9h\");\n[; <\" PCLAT equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8004: extern volatile unsigned short long PC @ 0xFF9;\n\"8007\n[; ;pic18f2550.h: 8007: asm(\"PC equ 0FF9h\");\n[; <\" PC equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8011: extern volatile unsigned char PCL @ 0xFF9;\n\"8013\n[; ;pic18f2550.h: 8013: asm(\"PCL equ 0FF9h\");\n[; <\" PCL equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8017: extern volatile unsigned char PCLATH @ 0xFFA;\n\"8019\n[; ;pic18f2550.h: 8019: asm(\"PCLATH equ 0FFAh\");\n[; <\" PCLATH equ 0FFAh ;# \">\n[; ;pic18f2550.h: 8023: extern volatile unsigned char PCLATU @ 0xFFB;\n\"8025\n[; ;pic18f2550.h: 8025: asm(\"PCLATU equ 0FFBh\");\n[; <\" PCLATU equ 0FFBh ;# \">\n[; ;pic18f2550.h: 8029: extern volatile unsigned char STKPTR @ 0xFFC;\n\"8031\n[; ;pic18f2550.h: 8031: asm(\"STKPTR equ 0FFCh\");\n[; <\" STKPTR equ 0FFCh ;# \">\n[; ;pic18f2550.h: 8034: typedef union {\n[; ;pic18f2550.h: 8035: struct {\n[; ;pic18f2550.h: 8036: unsigned STKPTR :5;\n[; ;pic18f2550.h: 8037: unsigned :1;\n[; ;pic18f2550.h: 8038: unsigned STKUNF :1;\n[; ;pic18f2550.h: 8039: unsigned STKFUL :1;\n[; ;pic18f2550.h: 8040: };\n[; ;pic18f2550.h: 8041: struct {\n[; ;pic18f2550.h: 8042: unsigned STKPTR0 :1;\n[; ;pic18f2550.h: 8043: unsigned STKPTR1 :1;\n[; ;pic18f2550.h: 8044: unsigned STKPTR2 :1;\n[; ;pic18f2550.h: 8045: unsigned STKPTR3 :1;\n[; ;pic18f2550.h: 8046: unsigned STKPTR4 :1;\n[; ;pic18f2550.h: 8047: };\n[; ;pic18f2550.h: 8048: struct {\n[; ;pic18f2550.h: 8049: unsigned :7;\n[; ;pic18f2550.h: 8050: unsigned STKOVF :1;\n[; ;pic18f2550.h: 8051: };\n[; ;pic18f2550.h: 8052: } STKPTRbits_t;\n[; ;pic18f2550.h: 8053: extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n[; ;pic18f2550.h: 8103: extern volatile unsigned short long TOS @ 0xFFD;\n\"8106\n[; ;pic18f2550.h: 8106: asm(\"TOS equ 0FFDh\");\n[; <\" TOS equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8110: extern volatile unsigned char TOSL @ 0xFFD;\n\"8112\n[; ;pic18f2550.h: 8112: asm(\"TOSL equ 0FFDh\");\n[; <\" TOSL equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8116: extern volatile unsigned char TOSH @ 0xFFE;\n\"8118\n[; ;pic18f2550.h: 8118: asm(\"TOSH equ 0FFEh\");\n[; <\" TOSH equ 0FFEh ;# \">\n[; ;pic18f2550.h: 8122: extern volatile unsigned char TOSU @ 0xFFF;\n\"8124\n[; ;pic18f2550.h: 8124: asm(\"TOSU equ 0FFFh\");\n[; <\" TOSU equ 0FFFh ;# \">\n[; ;pic18f2550.h: 8134: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n[; ;pic18f2550.h: 8136: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n[; ;pic18f2550.h: 8138: extern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n[; ;pic18f2550.h: 8140: extern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n[; ;pic18f2550.h: 8142: extern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n[; ;pic18f2550.h: 8144: extern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n[; ;pic18f2550.h: 8146: extern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n[; ;pic18f2550.h: 8148: extern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n[; ;pic18f2550.h: 8150: extern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n[; ;pic18f2550.h: 8152: extern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n[; ;pic18f2550.h: 8154: extern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n[; ;pic18f2550.h: 8156: extern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n[; ;pic18f2550.h: 8158: extern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n[; ;pic18f2550.h: 8160: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8162: extern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n[; ;pic18f2550.h: 8164: extern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n[; ;pic18f2550.h: 8166: extern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n[; ;pic18f2550.h: 8168: extern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n[; ;pic18f2550.h: 8170: extern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n[; ;pic18f2550.h: 8172: extern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n[; ;pic18f2550.h: 8174: extern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n[; ;pic18f2550.h: 8176: extern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8178: extern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n[; ;pic18f2550.h: 8180: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n[; ;pic18f2550.h: 8182: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n[; ;pic18f2550.h: 8184: extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n[; ;pic18f2550.h: 8186: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n[; ;pic18f2550.h: 8188: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 8190: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 8192: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 8194: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 8196: extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8198: extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n[; ;pic18f2550.h: 8200: extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n[; ;pic18f2550.h: 8202: extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n[; ;pic18f2550.h: 8204: extern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n[; ;pic18f2550.h: 8206: extern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8208: extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8210: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n[; ;pic18f2550.h: 8212: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8214: extern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8216: extern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n[; ;pic18f2550.h: 8218: extern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n[; ;pic18f2550.h: 8220: extern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n[; ;pic18f2550.h: 8222: extern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n[; ;pic18f2550.h: 8224: extern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n[; ;pic18f2550.h: 8226: extern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n[; ;pic18f2550.h: 8228: extern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n[; ;pic18f2550.h: 8230: extern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n[; ;pic18f2550.h: 8232: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n[; ;pic18f2550.h: 8234: extern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8236: extern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8238: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n[; ;pic18f2550.h: 8240: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n[; ;pic18f2550.h: 8242: extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n[; ;pic18f2550.h: 8244: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n[; ;pic18f2550.h: 8246: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n[; ;pic18f2550.h: 8248: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n[; ;pic18f2550.h: 8250: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n[; ;pic18f2550.h: 8252: extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8254: extern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8256: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n[; ;pic18f2550.h: 8258: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n[; ;pic18f2550.h: 8260: extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n[; ;pic18f2550.h: 8262: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n[; ;pic18f2550.h: 8264: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n[; ;pic18f2550.h: 8266: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n[; ;pic18f2550.h: 8268: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n[; ;pic18f2550.h: 8270: extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 8272: extern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8274: extern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8276: extern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8278: extern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8280: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8282: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n[; ;pic18f2550.h: 8284: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n[; ;pic18f2550.h: 8286: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n[; ;pic18f2550.h: 8288: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n[; ;pic18f2550.h: 8290: extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8292: extern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n[; ;pic18f2550.h: 8294: extern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 8296: extern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n[; ;pic18f2550.h: 8298: extern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n[; ;pic18f2550.h: 8300: extern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8302: extern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8304: extern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8306: extern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8308: extern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8310: extern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8312: extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n[; ;pic18f2550.h: 8314: extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n[; ;pic18f2550.h: 8316: extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n[; ;pic18f2550.h: 8318: extern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n[; ;pic18f2550.h: 8320: extern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n[; ;pic18f2550.h: 8322: extern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n[; ;pic18f2550.h: 8324: extern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n[; ;pic18f2550.h: 8326: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n[; ;pic18f2550.h: 8328: extern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8330: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8332: extern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8334: extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n[; ;pic18f2550.h: 8336: extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n[; ;pic18f2550.h: 8338: extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n[; ;pic18f2550.h: 8340: extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n[; ;pic18f2550.h: 8342: extern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8344: extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n[; ;pic18f2550.h: 8346: extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8348: extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8350: extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n[; ;pic18f2550.h: 8352: extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8354: extern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8356: extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8358: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n[; ;pic18f2550.h: 8360: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n[; ;pic18f2550.h: 8362: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n[; ;pic18f2550.h: 8364: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n[; ;pic18f2550.h: 8366: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n[; ;pic18f2550.h: 8368: extern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n[; ;pic18f2550.h: 8370: extern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n[; ;pic18f2550.h: 8372: extern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n[; ;pic18f2550.h: 8374: extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8376: extern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 8378: extern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8380: extern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8382: extern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8384: extern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n[; ;pic18f2550.h: 8386: extern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n[; ;pic18f2550.h: 8388: extern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n[; ;pic18f2550.h: 8390: extern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n[; ;pic18f2550.h: 8392: extern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8394: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n[; ;pic18f2550.h: 8396: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n[; ;pic18f2550.h: 8398: extern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n[; ;pic18f2550.h: 8400: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n[; ;pic18f2550.h: 8402: extern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n[; ;pic18f2550.h: 8404: extern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n[; ;pic18f2550.h: 8406: extern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n[; ;pic18f2550.h: 8408: extern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n[; ;pic18f2550.h: 8410: extern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8412: extern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8414: extern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8416: extern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8418: extern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8420: extern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8422: extern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8424: extern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8426: extern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8428: extern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8430: extern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8432: extern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8434: extern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8436: extern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8438: extern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8440: extern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8442: extern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8444: extern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8446: extern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8448: extern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8450: extern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8452: extern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8454: extern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8456: extern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8458: extern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8460: extern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8462: extern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8464: extern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8466: extern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8468: extern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8470: extern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8472: extern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8474: extern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8476: extern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8478: extern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8480: extern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8482: extern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8484: extern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8486: extern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8488: extern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8490: extern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8492: extern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8494: extern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n[; ;pic18f2550.h: 8496: extern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n[; ;pic18f2550.h: 8498: extern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n[; ;pic18f2550.h: 8500: extern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n[; ;pic18f2550.h: 8502: extern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n[; ;pic18f2550.h: 8504: extern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n[; ;pic18f2550.h: 8506: extern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8508: extern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8510: extern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8512: extern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8514: extern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8516: extern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8518: extern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n[; ;pic18f2550.h: 8520: extern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n[; ;pic18f2550.h: 8522: extern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8524: extern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8526: extern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n[; ;pic18f2550.h: 8528: extern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n[; ;pic18f2550.h: 8530: extern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n[; ;pic18f2550.h: 8532: extern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n[; ;pic18f2550.h: 8534: extern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n[; ;pic18f2550.h: 8536: extern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n[; ;pic18f2550.h: 8538: extern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8540: extern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8542: extern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8544: extern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8546: extern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8548: extern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8550: extern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n[; ;pic18f2550.h: 8552: extern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n[; ;pic18f2550.h: 8554: extern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8556: extern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8558: extern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n[; ;pic18f2550.h: 8560: extern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n[; ;pic18f2550.h: 8562: extern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n[; ;pic18f2550.h: 8564: extern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n[; ;pic18f2550.h: 8566: extern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n[; ;pic18f2550.h: 8568: extern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n[; ;pic18f2550.h: 8570: extern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8572: extern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8574: extern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8576: extern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8578: extern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8580: extern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8582: extern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n[; ;pic18f2550.h: 8584: extern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n[; ;pic18f2550.h: 8586: extern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8588: extern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8590: extern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n[; ;pic18f2550.h: 8592: extern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n[; ;pic18f2550.h: 8594: extern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n[; ;pic18f2550.h: 8596: extern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n[; ;pic18f2550.h: 8598: extern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n[; ;pic18f2550.h: 8600: extern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n[; ;pic18f2550.h: 8602: extern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8604: extern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8606: extern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8608: extern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8610: extern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8612: extern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8614: extern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n[; ;pic18f2550.h: 8616: extern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n[; ;pic18f2550.h: 8618: extern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8620: extern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8622: extern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n[; ;pic18f2550.h: 8624: extern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n[; ;pic18f2550.h: 8626: extern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n[; ;pic18f2550.h: 8628: extern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n[; ;pic18f2550.h: 8630: extern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n[; ;pic18f2550.h: 8632: extern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n[; ;pic18f2550.h: 8634: extern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8636: extern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8638: extern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8640: extern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8642: extern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8644: extern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8646: extern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n[; ;pic18f2550.h: 8648: extern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n[; ;pic18f2550.h: 8650: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n[; ;pic18f2550.h: 8652: extern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8654: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n[; ;pic18f2550.h: 8656: extern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n[; ;pic18f2550.h: 8658: extern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n[; ;pic18f2550.h: 8660: extern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n[; ;pic18f2550.h: 8662: extern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n[; ;pic18f2550.h: 8664: extern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n[; ;pic18f2550.h: 8666: extern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n[; ;pic18f2550.h: 8668: extern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n[; ;pic18f2550.h: 8670: extern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n[; ;pic18f2550.h: 8672: extern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n[; ;pic18f2550.h: 8674: extern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n[; ;pic18f2550.h: 8676: extern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n[; ;pic18f2550.h: 8678: extern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n[; ;pic18f2550.h: 8680: extern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n[; ;pic18f2550.h: 8682: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8684: extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8686: extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8688: extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8690: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8692: extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8694: extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8696: extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8698: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8700: extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8702: extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8704: extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8706: extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8708: extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8710: extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8712: extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8714: extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8716: extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8718: extern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8720: extern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8722: extern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 8724: extern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 8726: extern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n[; ;pic18f2550.h: 8728: extern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n[; ;pic18f2550.h: 8730: extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n[; ;pic18f2550.h: 8732: extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 8734: extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8736: extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8738: extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8740: extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8742: extern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 8744: extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8746: extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8748: extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8750: extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8752: extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8754: extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8756: extern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 8758: extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8760: extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8762: extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8764: extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8766: extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8768: extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8770: extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n[; ;pic18f2550.h: 8772: extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n[; ;pic18f2550.h: 8774: extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n[; ;pic18f2550.h: 8776: extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n[; ;pic18f2550.h: 8778: extern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8780: extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8782: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n[; ;pic18f2550.h: 8784: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n[; ;pic18f2550.h: 8786: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n[; ;pic18f2550.h: 8788: extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8790: extern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8792: extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8794: extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8796: extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8798: extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8800: extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8802: extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8804: extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8806: extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8808: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8810: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8812: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8814: extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8816: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8818: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8820: extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8822: extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8824: extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8826: extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8828: extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8830: extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8832: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8834: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8836: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8838: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8840: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8842: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8844: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8846: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8848: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8850: extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8852: extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8854: extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8856: extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8858: extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8860: extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8862: extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8864: extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8866: extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8868: extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8870: extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8872: extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n[; ;pic18f2550.h: 8874: extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n[; ;pic18f2550.h: 8876: extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n[; ;pic18f2550.h: 8878: extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8880: extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8882: extern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8884: extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8886: extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8888: extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8890: extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8892: extern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8894: extern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8896: extern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8898: extern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8900: extern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8902: extern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8904: extern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8906: extern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8908: extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n[; ;pic18f2550.h: 8910: extern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8912: extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8914: extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8916: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8918: extern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8920: extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8922: extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 8924: extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 8926: extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 8928: extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 8930: extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 8932: extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 8934: extern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8936: extern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8938: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n[; ;pic18f2550.h: 8940: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 8942: extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n[; ;pic18f2550.h: 8944: extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n[; ;pic18f2550.h: 8946: extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n[; ;pic18f2550.h: 8948: extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n[; ;pic18f2550.h: 8950: extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8952: extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8954: extern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8956: extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8958: extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8960: extern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8962: extern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8964: extern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8966: extern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8968: extern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8970: extern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 8972: extern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8974: extern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n[; ;pic18f2550.h: 8976: extern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n[; ;pic18f2550.h: 8978: extern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n[; ;pic18f2550.h: 8980: extern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8982: extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8984: extern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 8986: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8988: extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8990: extern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n[; ;pic18f2550.h: 8992: extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 8994: extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 8996: extern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 8998: extern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n[; ;pic18f2550.h: 9000: extern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n[; ;pic18f2550.h: 9002: extern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n[; ;pic18f2550.h: 9004: extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9006: extern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9008: extern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9010: extern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n[; ;pic18f2550.h: 9012: extern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n[; ;pic18f2550.h: 9014: extern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n[; ;pic18f2550.h: 9016: extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n[; ;pic18f2550.h: 9018: extern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n[; ;pic18f2550.h: 9020: extern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n[; ;pic18f2550.h: 9022: extern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9024: extern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 9026: extern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9028: extern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9030: extern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9032: extern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 9034: extern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 9036: extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9038: extern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 9040: extern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 9042: extern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 9044: extern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 9046: extern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n[; ;pic18f2550.h: 9048: extern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 9050: extern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 9052: extern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 9054: extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n[; ;pic18f2550.h: 9056: extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n[; ;pic18f2550.h: 9058: extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n[; ;pic18f2550.h: 9060: extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9062: extern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9064: extern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9066: extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9068: extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9070: extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9072: extern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 9074: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n[; ;pic18f2550.h: 9076: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n[; ;pic18f2550.h: 9078: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n[; ;pic18f2550.h: 9080: extern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9082: extern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9084: extern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n[; ;pic18f2550.h: 9086: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9088: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9090: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9092: extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9094: extern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9096: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n[; ;pic18f2550.h: 9098: extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9100: extern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9102: extern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9104: extern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9106: extern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 9108: extern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 9110: extern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 9112: extern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 9114: extern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 9116: extern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 9118: extern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9120: extern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n[; ;pic18f2550.h: 9122: extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9124: extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9126: extern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n[; ;pic18f2550.h: 9128: extern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9130: extern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9132: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n[; ;pic18f2550.h: 9134: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n[; ;pic18f2550.h: 9136: extern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9138: extern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9140: extern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9142: extern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9144: extern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9146: extern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n[; ;pic18f2550.h: 9148: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9150: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n[; ;pic18f2550.h: 9152: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n[; ;pic18f2550.h: 9154: extern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n[; ;pic18f2550.h: 9156: extern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n[; ;pic18f2550.h: 9158: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9160: extern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9162: extern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n[; ;pic18f2550.h: 9164: extern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n[; ;pic18f2550.h: 9166: extern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n[; ;pic18f2550.h: 9168: extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9170: extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9172: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n[; ;pic18f2550.h: 9174: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9176: extern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9178: extern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n[; ;pic18f2550.h: 9180: extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n[; ;pic18f2550.h: 9182: extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n[; ;pic18f2550.h: 9184: extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n[; ;pic18f2550.h: 9186: extern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n[; ;pic18f2550.h: 9188: extern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n[; ;pic18f2550.h: 9190: extern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n[; ;pic18f2550.h: 9192: extern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n[; ;pic18f2550.h: 9194: extern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n[; ;pic18f2550.h: 9196: extern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n[; ;pic18f2550.h: 9198: extern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n[; ;pic18f2550.h: 9200: extern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 9202: extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9204: extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9206: extern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n[; ;pic18f2550.h: 9208: extern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n[; ;pic18f2550.h: 9210: extern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n[; ;pic18f2550.h: 9212: extern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n[; ;pic18f2550.h: 9214: extern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n[; ;pic18f2550.h: 9216: extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n[; ;pic18f2550.h: 9218: extern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 9220: extern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n[; ;pic18f2550.h: 9222: extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9224: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9226: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9228: extern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9230: extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n[; ;pic18f2550.h: 9232: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9234: extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n[; ;pic18f2550.h: 9236: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9238: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9240: extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9242: extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n[; ;pic18f2550.h: 9244: extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n[; ;pic18f2550.h: 9246: extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n[; ;pic18f2550.h: 9248: extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n[; ;pic18f2550.h: 9250: extern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9252: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n[; ;pic18f2550.h: 9254: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n[; ;pic18f2550.h: 9256: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9258: extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9260: extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9262: extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n[; ;pic18f2550.h: 9264: extern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n[; ;pic18f2550.h: 9266: extern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9268: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n[; ;pic18f2550.h: 9270: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n[; ;pic18f2550.h: 9272: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9274: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9276: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9278: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9280: extern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9282: extern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n[; ;pic18f2550.h: 9284: extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n[; ;pic18f2550.h: 9286: extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n[; ;pic18f2550.h: 9288: extern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9290: extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9292: extern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9294: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9296: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9298: extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9300: extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n[; ;pic18f2550.h: 9302: extern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n[; ;pic18f2550.h: 9304: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n[; ;pic18f2550.h: 9306: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n[; ;pic18f2550.h: 9308: extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n[; ;pic18f2550.h: 9310: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n[; ;pic18f2550.h: 9312: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n[; ;pic18f2550.h: 9314: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n[; ;pic18f2550.h: 9316: extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n[; ;pic18f2550.h: 9318: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n[; ;pic18f2550.h: 9320: extern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n[; ;pic18f2550.h: 9322: extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n[; ;pic18f2550.h: 9324: extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n[; ;pic18f2550.h: 9326: extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n[; ;pic18f2550.h: 9328: extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n[; ;pic18f2550.h: 9330: extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9332: extern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9334: extern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9336: extern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9338: extern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9340: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n[; ;pic18f2550.h: 9342: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n[; ;pic18f2550.h: 9344: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n[; ;pic18f2550.h: 9346: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n[; ;pic18f2550.h: 9348: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n[; ;pic18f2550.h: 9350: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n[; ;pic18f2550.h: 9352: extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n[; ;pic18f2550.h: 9354: extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n[; ;pic18f2550.h: 9356: extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n[; ;pic18f2550.h: 9358: extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n[; ;pic18f2550.h: 9360: extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n[; ;pic18f2550.h: 9362: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n[; ;pic18f2550.h: 9364: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n[; ;pic18f2550.h: 9366: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n[; ;pic18f2550.h: 9368: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n[; ;pic18f2550.h: 9370: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n[; ;pic18f2550.h: 9372: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n[; ;pic18f2550.h: 9374: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n[; ;pic18f2550.h: 9376: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n[; ;pic18f2550.h: 9378: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n[; ;pic18f2550.h: 9380: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n[; ;pic18f2550.h: 9382: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9384: extern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9386: extern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n[; ;pic18f2550.h: 9388: extern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n[; ;pic18f2550.h: 9390: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n[; ;pic18f2550.h: 9392: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n[; ;pic18f2550.h: 9394: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n[; ;pic18f2550.h: 9396: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n[; ;pic18f2550.h: 9398: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n[; ;pic18f2550.h: 9400: extern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9402: extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9404: extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9406: extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9408: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9410: extern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9412: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9414: extern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9416: extern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9418: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9420: extern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9422: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9424: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9426: extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9428: extern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n[; ;pic18f2550.h: 9430: extern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n[; ;pic18f2550.h: 9432: extern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n[; ;pic18f2550.h: 9434: extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9436: extern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n[; ;pic18f2550.h: 9438: extern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9440: extern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9442: extern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n[; ;pic18f2550.h: 9444: extern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n[; ;pic18f2550.h: 9446: extern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n[; ;pic18f2550.h: 9448: extern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n[; ;pic18f2550.h: 9450: extern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n[; ;pic18f2550.h: 9452: extern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n[; ;pic18f2550.h: 9454: extern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n[; ;pic18f2550.h: 9456: extern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n[; ;pic18f2550.h: 9458: extern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n[; ;pic18f2550.h: 9460: extern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9462: extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9464: extern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9466: extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9468: extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n[; ;pic18f2550.h: 9470: extern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9472: extern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9474: extern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9476: extern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n[; ;pic18f2550.h: 9478: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n[; ;pic18f2550.h: 9480: extern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9482: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n[; ;pic18f2550.h: 9484: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n[; ;pic18f2550.h: 9486: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9488: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n[; ;pic18f2550.h: 9490: extern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9492: extern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9494: extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 9496: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 9498: extern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 9500: extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 9502: extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9504: extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9506: extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9508: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9510: extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9512: extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9514: extern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9516: extern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;adc.h: 2008: union ADCResult\n[; ;adc.h: 2009: {\n[; ;adc.h: 2010: int lr;\n[; ;adc.h: 2011: char br[2];\n[; ;adc.h: 2012: };\n[; ;adc.h: 2014: char BusyADC (void);\n[; ;adc.h: 2016: void ConvertADC (void);\n[; ;adc.h: 2018: void CloseADC(void);\n[; ;adc.h: 2026: int ReadADC(void);\n[; ;adc.h: 2040: void OpenADC ( unsigned char ,\n[; ;adc.h: 2041: unsigned char ,\n[; ;adc.h: 2042: unsigned char );\n[; ;adc.h: 2084: void SetChanADC(unsigned char );\n[; ;adc.h: 2100: void SelChanConvADC( unsigned char );\n[; ;ancomp.h: 38: void Close_ancomp( void );\n[; ;ancomp.h: 39: void Open_ancomp(unsigned char config);\n[; ;spi.h: 584: void OpenSPI( unsigned char sync_mode,\n[; ;spi.h: 585: unsigned char bus_mode,\n[; ;spi.h: 586: unsigned char smp_phase );\n[; ;spi.h: 588: signed char WriteSPI( unsigned char data_out );\n[; ;spi.h: 590: void getsSPI( unsigned char *rdptr, unsigned char length );\n[; ;spi.h: 592: void putsSPI( unsigned char *wrptr );\n[; ;spi.h: 594: unsigned char ReadSPI( void );\n[; ;can2510.h: 414: void CAN2510Initialize(  unsigned int configuration,\n[; ;can2510.h: 415: unsigned char brp,\n[; ;can2510.h: 416: unsigned char interruptFlags,\n[; ;can2510.h: 417: unsigned char SPI_syncMode,\n[; ;can2510.h: 418: unsigned char SPI_busMode,\n[; ;can2510.h: 419: unsigned char SPI_smpPhase );\n[; ;can2510.h: 421: signed char CAN2510Init(  unsigned long BufferConfig,\n[; ;can2510.h: 422: unsigned long BitTimeConfig,\n[; ;can2510.h: 423: unsigned char interruptEnables,\n[; ;can2510.h: 424: unsigned char SPI_syncMode,\n[; ;can2510.h: 425: unsigned char SPI_busMode,\n[; ;can2510.h: 426: unsigned char SPI_smpPhase );\n[; ;can2510.h: 428: void CAN2510Enable( void );\n[; ;can2510.h: 430: void CAN2510Disable( void );\n[; ;can2510.h: 432: void CAN2510Reset( void );\n[; ;can2510.h: 434: void CAN2510SetMode(  unsigned char mode );\n[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );\n[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );\n[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );\n[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );\n[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );\n[; ;can2510.h: 446: unsigned char CAN2510ByteRead(  unsigned char addr );\n[; ;can2510.h: 448: void CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n[; ;can2510.h: 450: void CAN2510SequentialRead(  unsigned char *DataArray,\n[; ;can2510.h: 451: unsigned char CAN2510addr,\n[; ;can2510.h: 452: unsigned char numbytes );\n[; ;can2510.h: 454: void CAN2510SequentialWrite(  unsigned char *DataArray,\n[; ;can2510.h: 455: unsigned char CAN2510addr,\n[; ;can2510.h: 456: unsigned char numbytes );\n[; ;can2510.h: 458: void CAN2510BitModify(  unsigned char address,\n[; ;can2510.h: 459: unsigned char mask,\n[; ;can2510.h: 460: unsigned char data );\n[; ;can2510.h: 462: void CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n[; ;can2510.h: 466: void CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n[; ;can2510.h: 470: signed char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n[; ;can2510.h: 471: unsigned int mask,\n[; ;can2510.h: 472: unsigned int *filters );\n[; ;can2510.h: 474: signed char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n[; ;can2510.h: 475: unsigned long mask,\n[; ;can2510.h: 476: unsigned long *filters );\n[; ;can2510.h: 478: signed char CAN2510WriteStd(  unsigned int msgId,\n[; ;can2510.h: 479: unsigned char msgPriority,\n[; ;can2510.h: 480: unsigned char numBytes,\n[; ;can2510.h: 481: unsigned char *data );\n[; ;can2510.h: 483: signed char CAN2510WriteXtd(  unsigned long msgId,\n[; ;can2510.h: 484: unsigned char msgPriority,\n[; ;can2510.h: 485: unsigned char numBytes,\n[; ;can2510.h: 486: unsigned char *data );\n[; ;can2510.h: 488: void CAN2510LoadBufferStd(  unsigned char bufferNum,\n[; ;can2510.h: 489: unsigned int msgId,\n[; ;can2510.h: 490: unsigned char numBytes,\n[; ;can2510.h: 491: unsigned char *data );\n[; ;can2510.h: 493: void CAN2510LoadBufferXtd(  unsigned char bufferNum,\n[; ;can2510.h: 494: unsigned long msgId,\n[; ;can2510.h: 495: unsigned char numBytes,\n[; ;can2510.h: 496: unsigned char *data );\n[; ;can2510.h: 498: void CAN2510LoadRTRStd(  unsigned char bufferNum,\n[; ;can2510.h: 499: unsigned int msgId,\n[; ;can2510.h: 500: unsigned char numBytes );\n[; ;can2510.h: 502: void CAN2510LoadRTRXtd(  unsigned char bufferNum,\n[; ;can2510.h: 503: unsigned long msgId,\n[; ;can2510.h: 504: unsigned char numBytes );\n[; ;can2510.h: 506: void CAN2510SetBufferPriority(  unsigned char bufferNum,\n[; ;can2510.h: 507: unsigned char bufferPriority );\n[; ;can2510.h: 509: void CAN2510SendBuffer(  unsigned char bufferNumber );\n[; ;can2510.h: 511: signed char CAN2510WriteBuffer(  unsigned char bufferNum );\n[; ;can2510.h: 513: unsigned char CAN2510DataReady(  unsigned char bufferNum );\n[; ;can2510.h: 515: unsigned char CAN2510DataRead(  unsigned char bufferNum,\n[; ;can2510.h: 516: unsigned long *msgId,\n[; ;can2510.h: 517: unsigned char *numBytes,\n[; ;can2510.h: 518: unsigned char *data );\n[; ;capture.h: 64: union capstatus\n[; ;capture.h: 65: {\n[; ;capture.h: 73: struct\n[; ;capture.h: 74: {\n[; ;capture.h: 77: unsigned Cap1OVF:1;\n[; ;capture.h: 82: unsigned Cap2OVF:1;\n[; ;capture.h: 115: };\n[; ;capture.h: 117: unsigned :8;\n[; ;capture.h: 119: };\n[; ;capture.h: 121: extern union capstatus CapStatus;\n[; ;capture.h: 123: union CapResult\n[; ;capture.h: 124: {\n[; ;capture.h: 125: unsigned int lc;\n[; ;capture.h: 126: char bc[2];\n[; ;capture.h: 127: };\n[; ;capture.h: 474: void OpenCapture1 ( unsigned char config);\n[; ;capture.h: 475: unsigned int ReadCapture1 (void);\n[; ;capture.h: 476: void CloseCapture1 (void);\n[; ;capture.h: 484: void OpenCapture2 ( unsigned char config);\n[; ;capture.h: 485: unsigned int ReadCapture2 (void);\n[; ;capture.h: 486: void CloseCapture2 (void);\n[; ;compare.h: 385: void OpenCompare1(unsigned char config,unsigned int period);\n[; ;compare.h: 386: void CloseCompare1(void);\n[; ;compare.h: 392: void OpenCompare2(unsigned char config, unsigned int period);\n[; ;compare.h: 393: void CloseCompare2(void);\n[; ;EEP.h: 36: void Busy_eep ( void );\n[; ;EEP.h: 37: unsigned char Read_b_eep( unsigned int badd );\n[; ;EEP.h: 38: void Write_b_eep( unsigned int badd, unsigned char bdata );\n[; ;stddef.h: 2: typedef int ptrdiff_t;\n[; ;stddef.h: 3: typedef unsigned size_t;\n[; ;stddef.h: 4: typedef unsigned short wchar_t;\n[; ;stddef.h: 13: extern int errno;\n[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;\n[; ;GenericTypeDefs.h: 75: typedef signed int INT;\n[; ;GenericTypeDefs.h: 76: typedef signed char INT8;\n[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;\n[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;\n[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;\n[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;\n[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;\n[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;\n[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;\n[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;\n[; ;GenericTypeDefs.h: 99: typedef union\n[; ;GenericTypeDefs.h: 100: {\n[; ;GenericTypeDefs.h: 101: UINT8 Val;\n[; ;GenericTypeDefs.h: 102: struct\n[; ;GenericTypeDefs.h: 103: {\n[; ;GenericTypeDefs.h: 104: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 105: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 106: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 107: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 108: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 109: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 110: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 111: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 112: } bits;\n[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;\n[; ;GenericTypeDefs.h: 115: typedef union\n[; ;GenericTypeDefs.h: 116: {\n[; ;GenericTypeDefs.h: 117: UINT16 Val;\n[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;\n[; ;GenericTypeDefs.h: 119: struct \n[; ;GenericTypeDefs.h: 120: {\n[; ;GenericTypeDefs.h: 121: UINT8 LB;\n[; ;GenericTypeDefs.h: 122: UINT8 HB;\n[; ;GenericTypeDefs.h: 123: } byte;\n[; ;GenericTypeDefs.h: 124: struct \n[; ;GenericTypeDefs.h: 125: {\n[; ;GenericTypeDefs.h: 126: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 127: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 128: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 129: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 130: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 131: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 132: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 133: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 134: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 135: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 136: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 137: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 138: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 139: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 140: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 141: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 142: } bits;\n[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;\n[; ;GenericTypeDefs.h: 187: typedef union\n[; ;GenericTypeDefs.h: 188: {\n[; ;GenericTypeDefs.h: 189: UINT32 Val;\n[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;\n[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;\n[; ;GenericTypeDefs.h: 192: struct \n[; ;GenericTypeDefs.h: 193: {\n[; ;GenericTypeDefs.h: 194: UINT16 LW;\n[; ;GenericTypeDefs.h: 195: UINT16 HW;\n[; ;GenericTypeDefs.h: 196: } word;\n[; ;GenericTypeDefs.h: 197: struct \n[; ;GenericTypeDefs.h: 198: {\n[; ;GenericTypeDefs.h: 199: UINT8 LB;\n[; ;GenericTypeDefs.h: 200: UINT8 HB;\n[; ;GenericTypeDefs.h: 201: UINT8 UB;\n[; ;GenericTypeDefs.h: 202: UINT8 MB;\n[; ;GenericTypeDefs.h: 203: } byte;\n[; ;GenericTypeDefs.h: 204: struct \n[; ;GenericTypeDefs.h: 205: {\n[; ;GenericTypeDefs.h: 206: UINT16_VAL low;\n[; ;GenericTypeDefs.h: 207: UINT16_VAL high;\n[; ;GenericTypeDefs.h: 208: }wordUnion;\n[; ;GenericTypeDefs.h: 209: struct \n[; ;GenericTypeDefs.h: 210: {\n[; ;GenericTypeDefs.h: 211: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 212: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 213: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 214: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 215: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 216: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 217: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 218: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 219: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 220: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 221: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 222: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 223: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 224: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 225: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 226: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 227: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 228: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 229: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 230: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 231: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 232: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 233: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 234: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 235: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 236: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 237: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 238: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 239: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 240: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 241: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 242: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 243: } bits;\n[; ;GenericTypeDefs.h: 244: } UINT32_VAL;\n[; ;GenericTypeDefs.h: 248: typedef union\n[; ;GenericTypeDefs.h: 249: {\n[; ;GenericTypeDefs.h: 250: UINT64 Val;\n[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;\n[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;\n[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;\n[; ;GenericTypeDefs.h: 254: struct \n[; ;GenericTypeDefs.h: 255: {\n[; ;GenericTypeDefs.h: 256: UINT32 LD;\n[; ;GenericTypeDefs.h: 257: UINT32 HD;\n[; ;GenericTypeDefs.h: 258: } dword;\n[; ;GenericTypeDefs.h: 259: struct \n[; ;GenericTypeDefs.h: 260: {\n[; ;GenericTypeDefs.h: 261: UINT16 LW;\n[; ;GenericTypeDefs.h: 262: UINT16 HW;\n[; ;GenericTypeDefs.h: 263: UINT16 UW;\n[; ;GenericTypeDefs.h: 264: UINT16 MW;\n[; ;GenericTypeDefs.h: 265: } word;\n[; ;GenericTypeDefs.h: 266: struct \n[; ;GenericTypeDefs.h: 267: {\n[; ;GenericTypeDefs.h: 268: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 269: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 270: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 271: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 272: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 273: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 274: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 275: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 276: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 277: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 278: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 279: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 280: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 281: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 282: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 283: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 284: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 285: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 286: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 287: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 288: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 289: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 290: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 291: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 292: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 293: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 294: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 295: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 296: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 297: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 298: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 299: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 300: UINT8 b32:1;\n[; ;GenericTypeDefs.h: 301: UINT8 b33:1;\n[; ;GenericTypeDefs.h: 302: UINT8 b34:1;\n[; ;GenericTypeDefs.h: 303: UINT8 b35:1;\n[; ;GenericTypeDefs.h: 304: UINT8 b36:1;\n[; ;GenericTypeDefs.h: 305: UINT8 b37:1;\n[; ;GenericTypeDefs.h: 306: UINT8 b38:1;\n[; ;GenericTypeDefs.h: 307: UINT8 b39:1;\n[; ;GenericTypeDefs.h: 308: UINT8 b40:1;\n[; ;GenericTypeDefs.h: 309: UINT8 b41:1;\n[; ;GenericTypeDefs.h: 310: UINT8 b42:1;\n[; ;GenericTypeDefs.h: 311: UINT8 b43:1;\n[; ;GenericTypeDefs.h: 312: UINT8 b44:1;\n[; ;GenericTypeDefs.h: 313: UINT8 b45:1;\n[; ;GenericTypeDefs.h: 314: UINT8 b46:1;\n[; ;GenericTypeDefs.h: 315: UINT8 b47:1;\n[; ;GenericTypeDefs.h: 316: UINT8 b48:1;\n[; ;GenericTypeDefs.h: 317: UINT8 b49:1;\n[; ;GenericTypeDefs.h: 318: UINT8 b50:1;\n[; ;GenericTypeDefs.h: 319: UINT8 b51:1;\n[; ;GenericTypeDefs.h: 320: UINT8 b52:1;\n[; ;GenericTypeDefs.h: 321: UINT8 b53:1;\n[; ;GenericTypeDefs.h: 322: UINT8 b54:1;\n[; ;GenericTypeDefs.h: 323: UINT8 b55:1;\n[; ;GenericTypeDefs.h: 324: UINT8 b56:1;\n[; ;GenericTypeDefs.h: 325: UINT8 b57:1;\n[; ;GenericTypeDefs.h: 326: UINT8 b58:1;\n[; ;GenericTypeDefs.h: 327: UINT8 b59:1;\n[; ;GenericTypeDefs.h: 328: UINT8 b60:1;\n[; ;GenericTypeDefs.h: 329: UINT8 b61:1;\n[; ;GenericTypeDefs.h: 330: UINT8 b62:1;\n[; ;GenericTypeDefs.h: 331: UINT8 b63:1;\n[; ;GenericTypeDefs.h: 332: } bits;\n[; ;GenericTypeDefs.h: 333: } UINT64_VAL;\n[; ;GenericTypeDefs.h: 339: typedef void VOID;\n[; ;GenericTypeDefs.h: 341: typedef char CHAR8;\n[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;\n[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;\n[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;\n[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;\n[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;\n[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;\n[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;\n[; ;GenericTypeDefs.h: 352: typedef signed long LONG;\n[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;\n[; ;GenericTypeDefs.h: 356: typedef union\n[; ;GenericTypeDefs.h: 357: {\n[; ;GenericTypeDefs.h: 358: BYTE Val;\n[; ;GenericTypeDefs.h: 359: struct \n[; ;GenericTypeDefs.h: 360: {\n[; ;GenericTypeDefs.h: 361: BYTE b0:1;\n[; ;GenericTypeDefs.h: 362: BYTE b1:1;\n[; ;GenericTypeDefs.h: 363: BYTE b2:1;\n[; ;GenericTypeDefs.h: 364: BYTE b3:1;\n[; ;GenericTypeDefs.h: 365: BYTE b4:1;\n[; ;GenericTypeDefs.h: 366: BYTE b5:1;\n[; ;GenericTypeDefs.h: 367: BYTE b6:1;\n[; ;GenericTypeDefs.h: 368: BYTE b7:1;\n[; ;GenericTypeDefs.h: 369: } bits;\n[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;\n[; ;GenericTypeDefs.h: 372: typedef union\n[; ;GenericTypeDefs.h: 373: {\n[; ;GenericTypeDefs.h: 374: WORD Val;\n[; ;GenericTypeDefs.h: 375: BYTE v[2] ;\n[; ;GenericTypeDefs.h: 376: struct \n[; ;GenericTypeDefs.h: 377: {\n[; ;GenericTypeDefs.h: 378: BYTE LB;\n[; ;GenericTypeDefs.h: 379: BYTE HB;\n[; ;GenericTypeDefs.h: 380: } byte;\n[; ;GenericTypeDefs.h: 381: struct \n[; ;GenericTypeDefs.h: 382: {\n[; ;GenericTypeDefs.h: 383: BYTE b0:1;\n[; ;GenericTypeDefs.h: 384: BYTE b1:1;\n[; ;GenericTypeDefs.h: 385: BYTE b2:1;\n[; ;GenericTypeDefs.h: 386: BYTE b3:1;\n[; ;GenericTypeDefs.h: 387: BYTE b4:1;\n[; ;GenericTypeDefs.h: 388: BYTE b5:1;\n[; ;GenericTypeDefs.h: 389: BYTE b6:1;\n[; ;GenericTypeDefs.h: 390: BYTE b7:1;\n[; ;GenericTypeDefs.h: 391: BYTE b8:1;\n[; ;GenericTypeDefs.h: 392: BYTE b9:1;\n[; ;GenericTypeDefs.h: 393: BYTE b10:1;\n[; ;GenericTypeDefs.h: 394: BYTE b11:1;\n[; ;GenericTypeDefs.h: 395: BYTE b12:1;\n[; ;GenericTypeDefs.h: 396: BYTE b13:1;\n[; ;GenericTypeDefs.h: 397: BYTE b14:1;\n[; ;GenericTypeDefs.h: 398: BYTE b15:1;\n[; ;GenericTypeDefs.h: 399: } bits;\n[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;\n[; ;GenericTypeDefs.h: 402: typedef union\n[; ;GenericTypeDefs.h: 403: {\n[; ;GenericTypeDefs.h: 404: DWORD Val;\n[; ;GenericTypeDefs.h: 405: WORD w[2] ;\n[; ;GenericTypeDefs.h: 406: BYTE v[4] ;\n[; ;GenericTypeDefs.h: 407: struct \n[; ;GenericTypeDefs.h: 408: {\n[; ;GenericTypeDefs.h: 409: WORD LW;\n[; ;GenericTypeDefs.h: 410: WORD HW;\n[; ;GenericTypeDefs.h: 411: } word;\n[; ;GenericTypeDefs.h: 412: struct \n[; ;GenericTypeDefs.h: 413: {\n[; ;GenericTypeDefs.h: 414: BYTE LB;\n[; ;GenericTypeDefs.h: 415: BYTE HB;\n[; ;GenericTypeDefs.h: 416: BYTE UB;\n[; ;GenericTypeDefs.h: 417: BYTE MB;\n[; ;GenericTypeDefs.h: 418: } byte;\n[; ;GenericTypeDefs.h: 419: struct \n[; ;GenericTypeDefs.h: 420: {\n[; ;GenericTypeDefs.h: 421: WORD_VAL low;\n[; ;GenericTypeDefs.h: 422: WORD_VAL high;\n[; ;GenericTypeDefs.h: 423: }wordUnion;\n[; ;GenericTypeDefs.h: 424: struct \n[; ;GenericTypeDefs.h: 425: {\n[; ;GenericTypeDefs.h: 426: BYTE b0:1;\n[; ;GenericTypeDefs.h: 427: BYTE b1:1;\n[; ;GenericTypeDefs.h: 428: BYTE b2:1;\n[; ;GenericTypeDefs.h: 429: BYTE b3:1;\n[; ;GenericTypeDefs.h: 430: BYTE b4:1;\n[; ;GenericTypeDefs.h: 431: BYTE b5:1;\n[; ;GenericTypeDefs.h: 432: BYTE b6:1;\n[; ;GenericTypeDefs.h: 433: BYTE b7:1;\n[; ;GenericTypeDefs.h: 434: BYTE b8:1;\n[; ;GenericTypeDefs.h: 435: BYTE b9:1;\n[; ;GenericTypeDefs.h: 436: BYTE b10:1;\n[; ;GenericTypeDefs.h: 437: BYTE b11:1;\n[; ;GenericTypeDefs.h: 438: BYTE b12:1;\n[; ;GenericTypeDefs.h: 439: BYTE b13:1;\n[; ;GenericTypeDefs.h: 440: BYTE b14:1;\n[; ;GenericTypeDefs.h: 441: BYTE b15:1;\n[; ;GenericTypeDefs.h: 442: BYTE b16:1;\n[; ;GenericTypeDefs.h: 443: BYTE b17:1;\n[; ;GenericTypeDefs.h: 444: BYTE b18:1;\n[; ;GenericTypeDefs.h: 445: BYTE b19:1;\n[; ;GenericTypeDefs.h: 446: BYTE b20:1;\n[; ;GenericTypeDefs.h: 447: BYTE b21:1;\n[; ;GenericTypeDefs.h: 448: BYTE b22:1;\n[; ;GenericTypeDefs.h: 449: BYTE b23:1;\n[; ;GenericTypeDefs.h: 450: BYTE b24:1;\n[; ;GenericTypeDefs.h: 451: BYTE b25:1;\n[; ;GenericTypeDefs.h: 452: BYTE b26:1;\n[; ;GenericTypeDefs.h: 453: BYTE b27:1;\n[; ;GenericTypeDefs.h: 454: BYTE b28:1;\n[; ;GenericTypeDefs.h: 455: BYTE b29:1;\n[; ;GenericTypeDefs.h: 456: BYTE b30:1;\n[; ;GenericTypeDefs.h: 457: BYTE b31:1;\n[; ;GenericTypeDefs.h: 458: } bits;\n[; ;GenericTypeDefs.h: 459: } DWORD_VAL;\n[; ;GenericTypeDefs.h: 462: typedef union\n[; ;GenericTypeDefs.h: 463: {\n[; ;GenericTypeDefs.h: 464: QWORD Val;\n[; ;GenericTypeDefs.h: 465: DWORD d[2] ;\n[; ;GenericTypeDefs.h: 466: WORD w[4] ;\n[; ;GenericTypeDefs.h: 467: BYTE v[8] ;\n[; ;GenericTypeDefs.h: 468: struct \n[; ;GenericTypeDefs.h: 469: {\n[; ;GenericTypeDefs.h: 470: DWORD LD;\n[; ;GenericTypeDefs.h: 471: DWORD HD;\n[; ;GenericTypeDefs.h: 472: } dword;\n[; ;GenericTypeDefs.h: 473: struct \n[; ;GenericTypeDefs.h: 474: {\n[; ;GenericTypeDefs.h: 475: WORD LW;\n[; ;GenericTypeDefs.h: 476: WORD HW;\n[; ;GenericTypeDefs.h: 477: WORD UW;\n[; ;GenericTypeDefs.h: 478: WORD MW;\n[; ;GenericTypeDefs.h: 479: } word;\n[; ;GenericTypeDefs.h: 480: struct \n[; ;GenericTypeDefs.h: 481: {\n[; ;GenericTypeDefs.h: 482: BYTE b0:1;\n[; ;GenericTypeDefs.h: 483: BYTE b1:1;\n[; ;GenericTypeDefs.h: 484: BYTE b2:1;\n[; ;GenericTypeDefs.h: 485: BYTE b3:1;\n[; ;GenericTypeDefs.h: 486: BYTE b4:1;\n[; ;GenericTypeDefs.h: 487: BYTE b5:1;\n[; ;GenericTypeDefs.h: 488: BYTE b6:1;\n[; ;GenericTypeDefs.h: 489: BYTE b7:1;\n[; ;GenericTypeDefs.h: 490: BYTE b8:1;\n[; ;GenericTypeDefs.h: 491: BYTE b9:1;\n[; ;GenericTypeDefs.h: 492: BYTE b10:1;\n[; ;GenericTypeDefs.h: 493: BYTE b11:1;\n[; ;GenericTypeDefs.h: 494: BYTE b12:1;\n[; ;GenericTypeDefs.h: 495: BYTE b13:1;\n[; ;GenericTypeDefs.h: 496: BYTE b14:1;\n[; ;GenericTypeDefs.h: 497: BYTE b15:1;\n[; ;GenericTypeDefs.h: 498: BYTE b16:1;\n[; ;GenericTypeDefs.h: 499: BYTE b17:1;\n[; ;GenericTypeDefs.h: 500: BYTE b18:1;\n[; ;GenericTypeDefs.h: 501: BYTE b19:1;\n[; ;GenericTypeDefs.h: 502: BYTE b20:1;\n[; ;GenericTypeDefs.h: 503: BYTE b21:1;\n[; ;GenericTypeDefs.h: 504: BYTE b22:1;\n[; ;GenericTypeDefs.h: 505: BYTE b23:1;\n[; ;GenericTypeDefs.h: 506: BYTE b24:1;\n[; ;GenericTypeDefs.h: 507: BYTE b25:1;\n[; ;GenericTypeDefs.h: 508: BYTE b26:1;\n[; ;GenericTypeDefs.h: 509: BYTE b27:1;\n[; ;GenericTypeDefs.h: 510: BYTE b28:1;\n[; ;GenericTypeDefs.h: 511: BYTE b29:1;\n[; ;GenericTypeDefs.h: 512: BYTE b30:1;\n[; ;GenericTypeDefs.h: 513: BYTE b31:1;\n[; ;GenericTypeDefs.h: 514: BYTE b32:1;\n[; ;GenericTypeDefs.h: 515: BYTE b33:1;\n[; ;GenericTypeDefs.h: 516: BYTE b34:1;\n[; ;GenericTypeDefs.h: 517: BYTE b35:1;\n[; ;GenericTypeDefs.h: 518: BYTE b36:1;\n[; ;GenericTypeDefs.h: 519: BYTE b37:1;\n[; ;GenericTypeDefs.h: 520: BYTE b38:1;\n[; ;GenericTypeDefs.h: 521: BYTE b39:1;\n[; ;GenericTypeDefs.h: 522: BYTE b40:1;\n[; ;GenericTypeDefs.h: 523: BYTE b41:1;\n[; ;GenericTypeDefs.h: 524: BYTE b42:1;\n[; ;GenericTypeDefs.h: 525: BYTE b43:1;\n[; ;GenericTypeDefs.h: 526: BYTE b44:1;\n[; ;GenericTypeDefs.h: 527: BYTE b45:1;\n[; ;GenericTypeDefs.h: 528: BYTE b46:1;\n[; ;GenericTypeDefs.h: 529: BYTE b47:1;\n[; ;GenericTypeDefs.h: 530: BYTE b48:1;\n[; ;GenericTypeDefs.h: 531: BYTE b49:1;\n[; ;GenericTypeDefs.h: 532: BYTE b50:1;\n[; ;GenericTypeDefs.h: 533: BYTE b51:1;\n[; ;GenericTypeDefs.h: 534: BYTE b52:1;\n[; ;GenericTypeDefs.h: 535: BYTE b53:1;\n[; ;GenericTypeDefs.h: 536: BYTE b54:1;\n[; ;GenericTypeDefs.h: 537: BYTE b55:1;\n[; ;GenericTypeDefs.h: 538: BYTE b56:1;\n[; ;GenericTypeDefs.h: 539: BYTE b57:1;\n[; ;GenericTypeDefs.h: 540: BYTE b58:1;\n[; ;GenericTypeDefs.h: 541: BYTE b59:1;\n[; ;GenericTypeDefs.h: 542: BYTE b60:1;\n[; ;GenericTypeDefs.h: 543: BYTE b61:1;\n[; ;GenericTypeDefs.h: 544: BYTE b62:1;\n[; ;GenericTypeDefs.h: 545: BYTE b63:1;\n[; ;GenericTypeDefs.h: 546: } bits;\n[; ;GenericTypeDefs.h: 547: } QWORD_VAL;\n[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;i2c.h: 775: void IdleI2C( void );\n[; ;i2c.h: 777: void OpenI2C( unsigned char sync_mode, unsigned char slew );\n[; ;i2c.h: 779: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 781: signed char putsI2C( unsigned char *wrptr );\n[; ;i2c.h: 783: unsigned char ReadI2C( void );\n[; ;i2c.h: 785: void CloseI2C( void );\n[; ;i2c.h: 899: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 901: signed char getsI2C( unsigned char *rdptr, unsigned char length );\n[; ;i2c.h: 908: signed char EEAckPolling( unsigned char control );\n[; ;i2c.h: 910: signed char EEByteWrite( unsigned char control,\n[; ;i2c.h: 911: unsigned char address,\n[; ;i2c.h: 912: unsigned char data );\n[; ;i2c.h: 914: signed int EECurrentAddRead( unsigned char control );\n[; ;i2c.h: 916: signed char EEPageWrite( unsigned char control,\n[; ;i2c.h: 917: unsigned char address,\n[; ;i2c.h: 918: unsigned char *wrptr );\n[; ;i2c.h: 920: signed int EERandomRead( unsigned char control, unsigned char address );\n[; ;i2c.h: 922: signed char EESequentialRead( unsigned char control,\n[; ;i2c.h: 923: unsigned char address,\n[; ;i2c.h: 924: unsigned char *rdptr,\n[; ;i2c.h: 925: unsigned char length );\n[; ;mwire.h: 325: void OpenMwire( unsigned char sync_mode );\n[; ;mwire.h: 327: unsigned char ReadMwire( unsigned char high_byte,\n[; ;mwire.h: 328: unsigned char low_byte );\n[; ;mwire.h: 341: signed char WriteMwire( unsigned char data_out );\n[; ;mwire.h: 354: void getsMwire( unsigned char *rdptr, unsigned char length );\n[; ;portb.h: 126: void OpenPORTB( unsigned char config);\n[; ;portb.h: 176: void OpenRB0INT( unsigned char config);\n[; ;portb.h: 194: void OpenRB1INT( unsigned char config);\n[; ;portb.h: 211: void OpenRB2INT( unsigned char config);\n[; ;pwm.h: 85: union PWMDC\n[; ;pwm.h: 86: {\n[; ;pwm.h: 87: unsigned int lpwm;\n[; ;pwm.h: 88: char bpwm[2];\n[; ;pwm.h: 89: };\n[; ;pwm.h: 467: void OpenPWM1 ( char period);\n[; ;pwm.h: 468: void SetDCPWM1 ( unsigned int duty_cycle);\n[; ;pwm.h: 477: void ClosePWM1 (void);\n[; ;pwm.h: 485: void OpenPWM2 ( char period);\n[; ;pwm.h: 486: void SetDCPWM2( unsigned int duty_cycle);\n[; ;pwm.h: 492: void ClosePWM2 (void);\n[; ;reset.h: 16: char isMCLR(void);\n[; ;reset.h: 17: void StatusReset(void);\n[; ;reset.h: 18: char isPOR(void);\n[; ;reset.h: 19: char isWU(void);\n[; ;reset.h: 22: char isBOR(void);\n[; ;reset.h: 26: char isWDTTO(void);\n[; ;reset.h: 27: char isWDTWU(void);\n[; ;reset.h: 31: char isLVD(void);\n[; ;rtcc.h: 687: void Open_RTCC(void);\n[; ;rtcc.h: 688: void Close_RTCC(void);\n[; ;rtcc.h: 689: unsigned char update_RTCC(void);\n[; ;sw_i2c.h: 97: void SWStopI2C ( void );\n[; ;sw_i2c.h: 98: void SWStartI2C ( void );\n[; ;sw_i2c.h: 99: void SWRestartI2C ( void );\n[; ;sw_i2c.h: 100: void SWStopI2C ( void );\n[; ;sw_i2c.h: 102: signed char SWAckI2C( void );\n[; ;sw_i2c.h: 103: signed char Clock_test( void );\n[; ;sw_i2c.h: 104: signed int SWReadI2C( void );\n[; ;sw_i2c.h: 105: signed char SWWriteI2C(  unsigned char data_out );\n[; ;sw_i2c.h: 106: signed char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\n[; ;sw_i2c.h: 107: signed char SWPutsI2C(  unsigned char *wrptr );\n[; ;sw_spi.h: 84: void OpenSWSPI(void);\n[; ;sw_spi.h: 87: char WriteSWSPI( char output);\n[; ;sw_spi.h: 90: void SetCSSWSPI(void);\n[; ;sw_spi.h: 93: void ClearCSSWSPI(void);\n[; ;sw_uart.h: 47: void OpenUART(void);\n[; ;sw_uart.h: 49: unsigned char ReadUART(void);\n[; ;sw_uart.h: 51: void WriteUART( unsigned char);\n[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);\n[; ;sw_uart.h: 55: void putsUART( char *);\n[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);\n[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);\n[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);\n[; ;timers.h: 36: union Timers\n[; ;timers.h: 37: {\n[; ;timers.h: 38: unsigned int lt;\n[; ;timers.h: 39: char bt[2];\n[; ;timers.h: 40: };\n[; ;timers.h: 118: void OpenTimer0 ( unsigned char config);\n[; ;timers.h: 119: void CloseTimer0 (void);\n[; ;timers.h: 120: unsigned int ReadTimer0 (void);\n[; ;timers.h: 121: void WriteTimer0 ( unsigned int timer0);\n[; ;timers.h: 236: void OpenTimer1 ( unsigned char config);\n[; ;timers.h: 237: void CloseTimer1 (void);\n[; ;timers.h: 238: unsigned int ReadTimer1 (void);\n[; ;timers.h: 239: void WriteTimer1 ( unsigned int timer1);\n[; ;timers.h: 325: void OpenTimer2 ( unsigned char config);\n[; ;timers.h: 326: void CloseTimer2 (void);\n[; ;timers.h: 391: void OpenTimer3 ( unsigned char config);\n[; ;timers.h: 392: void CloseTimer3 (void);\n[; ;timers.h: 393: unsigned int ReadTimer3 (void);\n[; ;timers.h: 394: void WriteTimer3 ( unsigned int timer3);\n[; ;timers.h: 1179: void SetTmrCCPSrc( unsigned char );\n[; ;usart.h: 568: union USART\n[; ;usart.h: 569: {\n[; ;usart.h: 570: unsigned char val;\n[; ;usart.h: 571: struct\n[; ;usart.h: 572: {\n[; ;usart.h: 573: unsigned RX_NINE:1;\n[; ;usart.h: 574: unsigned TX_NINE:1;\n[; ;usart.h: 575: unsigned FRAME_ERROR:1;\n[; ;usart.h: 576: unsigned OVERRUN_ERROR:1;\n[; ;usart.h: 577: unsigned fill:4;\n[; ;usart.h: 578: };\n[; ;usart.h: 579: };\n[; ;usart.h: 580: extern union USART USART_Status;\n[; ;usart.h: 581: void OpenUSART ( unsigned char config, unsigned spbrg);\n[; ;usart.h: 596: char ReadUSART (void);\n[; ;usart.h: 597: void WriteUSART ( char data);\n[; ;usart.h: 598: void getsUSART ( char *buffer, unsigned char len);\n[; ;usart.h: 599: void putsUSART ( char *data);\n[; ;usart.h: 600: void putrsUSART ( const  char *data);\n[; ;usart.h: 654: void baudUSART ( unsigned char baudconfig);\n[; ;xlcd.h: 87: void OpenXLCD( unsigned char);\n[; ;xlcd.h: 92: void SetCGRamAddr( unsigned char);\n[; ;xlcd.h: 97: void SetDDRamAddr( unsigned char);\n[; ;xlcd.h: 102: unsigned char BusyXLCD(void);\n[; ;xlcd.h: 107: unsigned char ReadAddrXLCD(void);\n[; ;xlcd.h: 112: char ReadDataXLCD(void);\n[; ;xlcd.h: 117: void WriteCmdXLCD( unsigned char);\n[; ;xlcd.h: 122: void WriteDataXLCD( char);\n[; ;xlcd.h: 132: void putsXLCD( char *);\n[; ;xlcd.h: 137: void putrsXLCD(const char *);\n[; ;xlcd.h: 140: extern void DelayFor18TCY(void);\n[; ;xlcd.h: 141: extern void DelayPORXLCD(void);\n[; ;xlcd.h: 142: extern void DelayXLCD(void);\n[; ;pic18.h: 18: __attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned c\n[; ;pic18.h: 144: extern void _delay(unsigned long);\n[; ;pic18.h: 146: extern void _delaywdt(unsigned long);\n[; ;pic18.h: 148: extern void _delay3(unsigned char);\n[; ;stdint.h: 13: typedef signed char int8_t;\n[; ;stdint.h: 20: typedef signed int int16_t;\n[; ;stdint.h: 28: typedef signed short long int int24_t;\n[; ;stdint.h: 36: typedef signed long int int32_t;\n[; ;stdint.h: 43: typedef unsigned char uint8_t;\n[; ;stdint.h: 49: typedef unsigned int uint16_t;\n[; ;stdint.h: 56: typedef unsigned short long int uint24_t;\n[; ;stdint.h: 63: typedef unsigned long int uint32_t;\n[; ;stdint.h: 71: typedef signed char int_least8_t;\n[; ;stdint.h: 78: typedef signed int int_least16_t;\n[; ;stdint.h: 90: typedef signed short long int int_least24_t;\n[; ;stdint.h: 98: typedef signed long int int_least32_t;\n[; ;stdint.h: 105: typedef unsigned char uint_least8_t;\n[; ;stdint.h: 111: typedef unsigned int uint_least16_t;\n[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;\n[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;\n[; ;stdint.h: 137: typedef signed char int_fast8_t;\n[; ;stdint.h: 144: typedef signed int int_fast16_t;\n[; ;stdint.h: 156: typedef signed short long int int_fast24_t;\n[; ;stdint.h: 164: typedef signed long int int_fast32_t;\n[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;\n[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;\n[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;\n[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;\n[; ;stdint.h: 200: typedef int32_t intmax_t;\n[; ;stdint.h: 205: typedef uint32_t uintmax_t;\n[; ;stdint.h: 210: typedef int16_t intptr_t;\n[; ;stdint.h: 215: typedef uint16_t uintptr_t;\n[; ;Tick.h: 50: void tick_init();\n[; ;Tick.h: 62: uint32_t tick_get();\n[; ;Tick.h: 71: void tick_update();\n[; ;PID.h: 40: enum enCtrlDirs {\n[; ;PID.h: 41: E_PID_DIRECT,\n[; ;PID.h: 42: E_PID_REVERSE,\n[; ;PID.h: 43: };\n[; ;PID.h: 45: struct pid_controller {\n[; ;PID.h: 47: float * input;\n[; ;PID.h: 48: float * output;\n[; ;PID.h: 49: float * setpoint;\n[; ;PID.h: 51: float Kp;\n[; ;PID.h: 52: float Ki;\n[; ;PID.h: 53: float Kd;\n[; ;PID.h: 55: float omin;\n[; ;PID.h: 56: float omax;\n[; ;PID.h: 58: float iterm;\n[; ;PID.h: 59: float lastin;\n[; ;PID.h: 61: uint32_t lasttime;\n[; ;PID.h: 62: uint32_t sampletime;\n[; ;PID.h: 64: uint8_t automode;\n[; ;PID.h: 65: enum enCtrlDirs direction;\n[; ;PID.h: 66: };\n[; ;PID.h: 68: typedef struct pid_controller * pid_t;\n[; ;PID.h: 90: pid_t pid_create(pid_t pid, float* in, float* out, float* set, float kp, float ki, float kd);\n[; ;PID.h: 103: uint8_t pid_compute(pid_t pid);\n[; ;PID.h: 116: void pid_tune(pid_t pid, float kp, float ki, float kd);\n[; ;PID.h: 126: void pid_sample(pid_t pid, uint32_t time);\n[; ;PID.h: 135: void pid_limits(pid_t pid, float min, float max);\n[; ;PID.h: 146: void pid_auto(pid_t pid);\n[; ;PID.h: 148: void pid_manual(pid_t pid);\n[; ;PID.h: 161: void pid_direction(pid_t pid, enum enCtrlDirs direction);\n[; ;SPIPort.h: 18: typedef char xSPIHandle;\n[; ;SPI.h: 58: enum enSPIModules {\n[; ;SPI.h: 59: E_SPI_1 = 1,\n[; ;SPI.h: 60: E_SPI_2 = 2,\n[; ;SPI.h: 61: E_SPI_3 = 3,\n[; ;SPI.h: 62: E_SPI_4 = 4,\n[; ;SPI.h: 63: };\n[; ;SPI.h: 86: xSPIHandle spi_init(enum enSPIModules eModule);\n[; ;SPI.h: 99: uint8_t spi_control(xSPIHandle spid, uint32_t ctrl, uint32_t arg);\n[; ;SPI.h: 111: uint8_t spi_open(xSPIHandle spid);\n[; ;SPI.h: 122: uint8_t spi_close(xSPIHandle spid);\n[; ;SPI.h: 131: void spi_write(xSPIHandle spid, uint8_t data);\n[; ;SPI.h: 140: uint8_t spi_read(xSPIHandle spid);\n[; ;SPI.h: 149: void spi_write_array(xSPIHandle spid, const uint8_t * txbuf, uint16_t len);\n[; ;SPI.h: 158: void spi_read_array(xSPIHandle spid, uint8_t * rxbuf, uint16_t len);\n[; ;SPI.h: 168: uint8_t spi_trans(xSPIHandle spid, uint8_t data);\n[; ;SPI.h: 178: void spi_trans_array(xSPIHandle spid, uint8_t * txbuf, uint8_t * rxbuf, uint16_t len);\n[; ;io.h: 59: void io_mode(uint8_t pin, uint8_t mode);\n[; ;io.h: 70: void io_write(uint8_t pin, uint8_t value);\n[; ;io.h: 83: uint8_t io_read( uint8_t pin );\n[; ;tc.h: 37: struct thermocuple_struct\n[; ;tc.h: 38: {\n[; ;tc.h: 39: xSPIHandle spi;\n[; ;tc.h: 40: uint8_t cspin;\n[; ;tc.h: 41: };\n[; ;tc.h: 43: typedef struct thermocuple_struct tc_t;\n[; ;tc.h: 58: tc_t tc_init(xSPIHandle spid, uint8_t cspin);\n[; ;tc.h: 70: int16_t tc_read(tc_t * tcpl);\n[; ;tc.h: 82: float tc_read_float(tc_t * tcpl);\n\"6 main.c\n[p x PLLDIV=1 ]\n\"7\n[p x CPUDIV=OSC1_PLL2 ]\n\"8\n[p x USBDIV=1 ]\n\"11\n[p x FOSC=EC_EC ]\n\"12\n[p x FCMEN=OFF ]\n\"13\n[p x IESO=OFF ]\n\"16\n[p x PWRT=OFF ]\n\"17\n[p x BOR=OFF ]\n\"18\n[p x BORV=3 ]\n\"19\n[p x VREGEN=ON ]\n\"22\n[p x WDT=OFF ]\n\"23\n[p x WDTPS=32768 ]\n\"26\n[p x CCP2MX=OFF ]\n\"27\n[p x PBADEN=OFF ]\n\"28\n[p x LPT1OSC=OFF ]\n\"29\n[p x MCLRE=ON ]\n\"32\n[p x STVREN=ON ]\n\"33\n[p x LVP=OFF ]\n\"34\n[p x XINST=OFF ]\n\"37\n[p x CP0=OFF ]\n\"38\n[p x CP1=OFF ]\n\"39\n[p x CP2=OFF ]\n\"40\n[p x CP3=OFF ]\n\"43\n[p x CPB=OFF ]\n\"44\n[p x CPD=OFF ]\n\"47\n[p x WRT0=OFF ]\n\"48\n[p x WRT1=OFF ]\n\"49\n[p x WRT2=OFF ]\n\"50\n[p x WRT3=OFF ]\n\"53\n[p x WRTC=OFF ]\n\"54\n[p x WRTB=OFF ]\n\"55\n[p x WRTD=OFF ]\n\"58\n[p x EBTR0=OFF ]\n\"59\n[p x EBTR1=OFF ]\n\"60\n[p x EBTR2=OFF ]\n\"61\n[p x EBTR3=OFF ]\n\"64\n[p x EBTRB=OFF ]\n\"69\n[v _lastrun `ul ~T0 @X0 1 e ]\n[i _lastrun\n-> -> -> 0 `i `l `ul\n]\n[; ;main.c: 69: uint32_t lastrun = 0;\n\"71\n[v _in `f ~T0 @X0 1 e ]\n[v _out `f ~T0 @X0 1 e ]\n[v _set `f ~T0 @X0 1 e ]\n[i _set\n-> -> 100 `i `f\n]\n[; ;main.c: 71: float in, out, set = 100;\n\"73\n[v _pidctrl `S518 ~T0 @X0 1 e ]\n[; ;main.c: 73: struct pid_controller pidctrl;\n\"74\n[v _pid `*S518 ~T0 @X0 1 e ]\n[i _pid\n-> -> 0 `i `*S518\n]\n[; ;main.c: 74: pid_t pid = 0;\n\"76\n[v _spi `uc ~T0 @X0 1 e ]\n[; ;main.c: 76: xSPIHandle spi;\n\"78\n[v _sensor1 `S519 ~T0 @X0 1 e ]\n[; ;main.c: 78: tc_t sensor1;\n\"79\n[v _sensor2 `S519 ~T0 @X0 1 e ]\n[; ;main.c: 79: tc_t sensor2;\n\"82\n[v _main `(i ~T0 @X0 1 ef2`i`**uc ]\n{\n[; ;main.c: 81: int main(int argc, char** argv)\n[; ;main.c: 82: {\n[e :U _main ]\n[v _argc `i ~T0 @X0 1 r1 ]\n[v _argv `**uc ~T0 @X0 1 r2 ]\n[f ]\n[; ;main.c: 83: spi = spi_init(E_SPI_1);\n\"83\n[e = _spi ( _spi_init (1 -> . `E4736 0 `E4736 ]\n[; ;main.c: 84: spi_control(spi, 0x00000001 | 0x00000010, 7);\n\"84\n[e ( _spi_control (3 , , _spi -> -> | -> 1 `i -> 16 `i `l `ul -> -> -> 7 `i `l `ul ]\n[; ;main.c: 87: sensor1 = tc_init(spi, 10);\n\"87\n[e = _sensor1 ( _tc_init (2 , _spi -> -> 10 `i `uc ]\n[; ;main.c: 88: sensor2 = tc_init(spi, 11);\n\"88\n[e = _sensor2 ( _tc_init (2 , _spi -> -> 11 `i `uc ]\n[; ;main.c: 91: pid = pid_create(&pidctrl, &in, &out, &set, 5, 1, 3);\n\"91\n[e = _pid ( _pid_create (4 , , , , , , &U _pidctrl &U _in &U _out &U _set -> -> 5 `i `f -> -> 1 `i `f -> -> 3 `i `f ]\n[; ;main.c: 93: pid_limits(pid, 0, 255);\n\"93\n[e ( _pid_limits (3 , , _pid -> -> 0 `i `f -> -> 255 `i `f ]\n[; ;main.c: 95: pid_auto(pid);\n\"95\n[e ( _pid_auto (1 _pid ]\n[; ;main.c: 97: for (;;) {\n\"97\n{\n[e :U 521 ]\n{\n[; ;main.c: 98: if (tick_get() - lastrun >= ((unsigned long long)((12000000 + 128ull)/256ull))) {\n\"98\n[e $ ! >= - ( _tick_get ..  _lastrun / + -> -> 12000000 `l `ul -> 128 `ul -> 256 `ul 524  ]\n{\n[; ;main.c: 99: lastrun = tick_get();\n\"99\n[e = _lastrun ( _tick_get ..  ]\n[; ;main.c: 101: in = tc_read_float(&sensor1);\n\"101\n[e = _in ( _tc_read_float (1 &U _sensor1 ]\n[; ;main.c: 103: pid_compute(pid);\n\"103\n[e ( _pid_compute (1 _pid ]\n\"106\n}\n[e :U 524 ]\n\"107\n}\n[; ;main.c: 106: }\n[; ;main.c: 107: }\n[e $U 521  ]\n[e :U 522 ]\n}\n[; ;main.c: 109: }\n\"109\n[e :UE 520 ]\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/main.p1.d",
    "content": " build/default/production/main.d  \\\n build/default/production/main.p1:  \\\n main.c  \\\n../PID.h  \\\n../Tick/TickPort.h  \\\nio.h  \\\n../SPI/SPIPort.h  \\\ntc.h  \\\n../Tick/Tick.h  \\\n../SPI/SPI.h "
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/main.pre",
    "content": "\n# 1 \"main.c\"\n\n# 44 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\nextern volatile unsigned short UFRM @ 0xF66;\n\nasm(\"UFRM equ 0F66h\");\n\n\n\nextern volatile unsigned char UFRML @ 0xF66;\n\nasm(\"UFRML equ 0F66h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :8;\n};\nstruct {\nunsigned FRM0 :1;\nunsigned FRM1 :1;\nunsigned FRM2 :1;\nunsigned FRM3 :1;\nunsigned FRM4 :1;\nunsigned FRM5 :1;\nunsigned FRM6 :1;\nunsigned FRM7 :1;\n};\nstruct {\nunsigned FRML :8;\n};\n} UFRMLbits_t;\nextern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n\n# 127\nextern volatile unsigned char UFRMH @ 0xF67;\n\nasm(\"UFRMH equ 0F67h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :3;\n};\nstruct {\nunsigned FRM8 :1;\nunsigned FRM9 :1;\nunsigned FRM10 :1;\n};\n} UFRMHbits_t;\nextern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n\n# 166\nextern volatile unsigned char UIR @ 0xF68;\n\nasm(\"UIR equ 0F68h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIF :1;\nunsigned UERRIF :1;\nunsigned ACTVIF :1;\nunsigned TRNIF :1;\nunsigned IDLEIF :1;\nunsigned STALLIF :1;\nunsigned SOFIF :1;\n};\n} UIRbits_t;\nextern volatile UIRbits_t UIRbits @ 0xF68;\n\n# 221\nextern volatile unsigned char UIE @ 0xF69;\n\nasm(\"UIE equ 0F69h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIE :1;\nunsigned UERRIE :1;\nunsigned ACTVIE :1;\nunsigned TRNIE :1;\nunsigned IDLEIE :1;\nunsigned STALLIE :1;\nunsigned SOFIE :1;\n};\n} UIEbits_t;\nextern volatile UIEbits_t UIEbits @ 0xF69;\n\n# 276\nextern volatile unsigned char UEIR @ 0xF6A;\n\nasm(\"UEIR equ 0F6Ah\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEF :1;\nunsigned CRC5EF :1;\nunsigned CRC16EF :1;\nunsigned DFN8EF :1;\nunsigned BTOEF :1;\nunsigned :2;\nunsigned BTSEF :1;\n};\n} UEIRbits_t;\nextern volatile UEIRbits_t UEIRbits @ 0xF6A;\n\n# 326\nextern volatile unsigned char UEIE @ 0xF6B;\n\nasm(\"UEIE equ 0F6Bh\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEE :1;\nunsigned CRC5EE :1;\nunsigned CRC16EE :1;\nunsigned DFN8EE :1;\nunsigned BTOEE :1;\nunsigned :2;\nunsigned BTSEE :1;\n};\n} UEIEbits_t;\nextern volatile UEIEbits_t UEIEbits @ 0xF6B;\n\n# 376\nextern volatile unsigned char USTAT @ 0xF6C;\n\nasm(\"USTAT equ 0F6Ch\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned PPBI :1;\nunsigned DIR :1;\nunsigned ENDP :4;\n};\nstruct {\nunsigned :3;\nunsigned ENDP0 :1;\nunsigned ENDP1 :1;\nunsigned ENDP2 :1;\nunsigned ENDP3 :1;\n};\n} USTATbits_t;\nextern volatile USTATbits_t USTATbits @ 0xF6C;\n\n# 435\nextern volatile unsigned char UCON @ 0xF6D;\n\nasm(\"UCON equ 0F6Dh\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned SUSPND :1;\nunsigned RESUME :1;\nunsigned USBEN :1;\nunsigned PKTDIS :1;\nunsigned SE0 :1;\nunsigned PPBRST :1;\n};\n} UCONbits_t;\nextern volatile UCONbits_t UCONbits @ 0xF6D;\n\n# 485\nextern volatile unsigned char UADDR @ 0xF6E;\n\nasm(\"UADDR equ 0F6Eh\");\n\n\ntypedef union {\nstruct {\nunsigned ADDR :7;\n};\nstruct {\nunsigned ADDR0 :1;\nunsigned ADDR1 :1;\nunsigned ADDR2 :1;\nunsigned ADDR3 :1;\nunsigned ADDR4 :1;\nunsigned ADDR5 :1;\nunsigned ADDR6 :1;\n};\n} UADDRbits_t;\nextern volatile UADDRbits_t UADDRbits @ 0xF6E;\n\n# 548\nextern volatile unsigned char UCFG @ 0xF6F;\n\nasm(\"UCFG equ 0F6Fh\");\n\n\ntypedef union {\nstruct {\nunsigned PPB :2;\nunsigned FSEN :1;\nunsigned UTRDIS :1;\nunsigned UPUEN :1;\nunsigned :1;\nunsigned UOEMON :1;\nunsigned UTEYE :1;\n};\nstruct {\nunsigned PPB0 :1;\nunsigned PPB1 :1;\n};\nstruct {\nunsigned UPP0 :1;\n};\nstruct {\nunsigned :1;\nunsigned UPP1 :1;\n};\n} UCFGbits_t;\nextern volatile UCFGbits_t UCFGbits @ 0xF6F;\n\n# 629\nextern volatile unsigned char UEP0 @ 0xF70;\n\nasm(\"UEP0 equ 0F70h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP0CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP0HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP0INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP0OUTEN :1;\n};\nstruct {\nunsigned EP0STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS0 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK0 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN0 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN0 :1;\n};\nstruct {\nunsigned EPSTALL0 :1;\n};\n} UEP0bits_t;\nextern volatile UEP0bits_t UEP0bits @ 0xF70;\n\n# 760\nextern volatile unsigned char UEP1 @ 0xF71;\n\nasm(\"UEP1 equ 0F71h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP1CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP1HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP1INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP1OUTEN :1;\n};\nstruct {\nunsigned EP1STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS1 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK1 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN1 :1;\n};\nstruct {\nunsigned EPSTALL1 :1;\n};\n} UEP1bits_t;\nextern volatile UEP1bits_t UEP1bits @ 0xF71;\n\n# 891\nextern volatile unsigned char UEP2 @ 0xF72;\n\nasm(\"UEP2 equ 0F72h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP2CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP2HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP2INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP2OUTEN :1;\n};\nstruct {\nunsigned EP2STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS2 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK2 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN2 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN2 :1;\n};\nstruct {\nunsigned EPSTALL2 :1;\n};\n} UEP2bits_t;\nextern volatile UEP2bits_t UEP2bits @ 0xF72;\n\n# 1022\nextern volatile unsigned char UEP3 @ 0xF73;\n\nasm(\"UEP3 equ 0F73h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP3CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP3HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP3INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP3OUTEN :1;\n};\nstruct {\nunsigned EP3STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS3 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK3 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN3 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN3 :1;\n};\nstruct {\nunsigned EPSTALL3 :1;\n};\n} UEP3bits_t;\nextern volatile UEP3bits_t UEP3bits @ 0xF73;\n\n# 1153\nextern volatile unsigned char UEP4 @ 0xF74;\n\nasm(\"UEP4 equ 0F74h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP4CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP4HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP4INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP4OUTEN :1;\n};\nstruct {\nunsigned EP4STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS4 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK4 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN4 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN4 :1;\n};\nstruct {\nunsigned EPSTALL4 :1;\n};\n} UEP4bits_t;\nextern volatile UEP4bits_t UEP4bits @ 0xF74;\n\n# 1284\nextern volatile unsigned char UEP5 @ 0xF75;\n\nasm(\"UEP5 equ 0F75h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP5CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP5HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP5INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP5OUTEN :1;\n};\nstruct {\nunsigned EP5STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS5 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK5 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN5 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN5 :1;\n};\nstruct {\nunsigned EPSTALL5 :1;\n};\n} UEP5bits_t;\nextern volatile UEP5bits_t UEP5bits @ 0xF75;\n\n# 1415\nextern volatile unsigned char UEP6 @ 0xF76;\n\nasm(\"UEP6 equ 0F76h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP6CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP6HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP6INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP6OUTEN :1;\n};\nstruct {\nunsigned EP6STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS6 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK6 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN6 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN6 :1;\n};\nstruct {\nunsigned EPSTALL6 :1;\n};\n} UEP6bits_t;\nextern volatile UEP6bits_t UEP6bits @ 0xF76;\n\n# 1546\nextern volatile unsigned char UEP7 @ 0xF77;\n\nasm(\"UEP7 equ 0F77h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP7CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP7HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP7INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP7OUTEN :1;\n};\nstruct {\nunsigned EP7STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS7 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK7 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN7 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN7 :1;\n};\nstruct {\nunsigned EPSTALL7 :1;\n};\n} UEP7bits_t;\nextern volatile UEP7bits_t UEP7bits @ 0xF77;\n\n# 1677\nextern volatile unsigned char UEP8 @ 0xF78;\n\nasm(\"UEP8 equ 0F78h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS8 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK8 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN8 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN8 :1;\n};\nstruct {\nunsigned EPSTALL8 :1;\n};\n} UEP8bits_t;\nextern volatile UEP8bits_t UEP8bits @ 0xF78;\n\n# 1764\nextern volatile unsigned char UEP9 @ 0xF79;\n\nasm(\"UEP9 equ 0F79h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS9 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK9 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN9 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN9 :1;\n};\nstruct {\nunsigned EPSTALL9 :1;\n};\n} UEP9bits_t;\nextern volatile UEP9bits_t UEP9bits @ 0xF79;\n\n# 1851\nextern volatile unsigned char UEP10 @ 0xF7A;\n\nasm(\"UEP10 equ 0F7Ah\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS10 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK10 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN10 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN10 :1;\n};\nstruct {\nunsigned EPSTALL10 :1;\n};\n} UEP10bits_t;\nextern volatile UEP10bits_t UEP10bits @ 0xF7A;\n\n# 1938\nextern volatile unsigned char UEP11 @ 0xF7B;\n\nasm(\"UEP11 equ 0F7Bh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS11 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK11 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN11 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN11 :1;\n};\nstruct {\nunsigned EPSTALL11 :1;\n};\n} UEP11bits_t;\nextern volatile UEP11bits_t UEP11bits @ 0xF7B;\n\n# 2025\nextern volatile unsigned char UEP12 @ 0xF7C;\n\nasm(\"UEP12 equ 0F7Ch\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS12 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK12 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN12 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN12 :1;\n};\nstruct {\nunsigned EPSTALL12 :1;\n};\n} UEP12bits_t;\nextern volatile UEP12bits_t UEP12bits @ 0xF7C;\n\n# 2112\nextern volatile unsigned char UEP13 @ 0xF7D;\n\nasm(\"UEP13 equ 0F7Dh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS13 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK13 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN13 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN13 :1;\n};\nstruct {\nunsigned EPSTALL13 :1;\n};\n} UEP13bits_t;\nextern volatile UEP13bits_t UEP13bits @ 0xF7D;\n\n# 2199\nextern volatile unsigned char UEP14 @ 0xF7E;\n\nasm(\"UEP14 equ 0F7Eh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS14 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK14 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN14 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN14 :1;\n};\nstruct {\nunsigned EPSTALL14 :1;\n};\n} UEP14bits_t;\nextern volatile UEP14bits_t UEP14bits @ 0xF7E;\n\n# 2286\nextern volatile unsigned char UEP15 @ 0xF7F;\n\nasm(\"UEP15 equ 0F7Fh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS15 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK15 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN15 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN15 :1;\n};\nstruct {\nunsigned EPSTALL15 :1;\n};\n} UEP15bits_t;\nextern volatile UEP15bits_t UEP15bits @ 0xF7F;\n\n# 2373\nextern volatile unsigned char PORTA @ 0xF80;\n\nasm(\"PORTA equ 0F80h\");\n\n\ntypedef union {\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\nstruct {\nunsigned AN0 :1;\nunsigned AN1 :1;\nunsigned AN2 :1;\nunsigned AN3 :1;\nunsigned T0CKI :1;\nunsigned AN4 :1;\nunsigned OSC2 :1;\n};\nstruct {\nunsigned :2;\nunsigned VREFM :1;\nunsigned VREFP :1;\nunsigned :1;\nunsigned LVDIN :1;\n};\nstruct {\nunsigned :5;\nunsigned HLVDIN :1;\n};\nstruct {\nunsigned :7;\nunsigned RA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned RJPU :1;\n};\nstruct {\nunsigned ULPWUIN :1;\n};\n} PORTAbits_t;\nextern volatile PORTAbits_t PORTAbits @ 0xF80;\n\n# 2529\nextern volatile unsigned char PORTB @ 0xF81;\n\nasm(\"PORTB equ 0F81h\");\n\n\ntypedef union {\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\nstruct {\nunsigned INT0 :1;\nunsigned INT1 :1;\nunsigned INT2 :1;\nunsigned :2;\nunsigned PGM :1;\nunsigned PGC :1;\nunsigned PGD :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP2_PA2 :1;\n};\n} PORTBbits_t;\nextern volatile PORTBbits_t PORTBbits @ 0xF81;\n\n# 2638\nextern volatile unsigned char PORTC @ 0xF82;\n\nasm(\"PORTC equ 0F82h\");\n\n\ntypedef union {\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :1;\nunsigned RC4 :1;\nunsigned RC5 :1;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned T1OSO :1;\nunsigned T1OSI :1;\nunsigned CCP1 :1;\nunsigned :3;\nunsigned TX :1;\nunsigned RX :1;\n};\nstruct {\nunsigned T13CKI :1;\nunsigned :1;\nunsigned P1A :1;\nunsigned :3;\nunsigned CK :1;\nunsigned DT :1;\n};\nstruct {\nunsigned :1;\nunsigned CCP2 :1;\n};\nstruct {\nunsigned :2;\nunsigned PA1 :1;\n};\nstruct {\nunsigned :1;\nunsigned PA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned RC3 :1;\n};\n} PORTCbits_t;\nextern volatile PORTCbits_t PORTCbits @ 0xF82;\n\n# 2791\nextern volatile unsigned char PORTE @ 0xF84;\n\nasm(\"PORTE equ 0F84h\");\n\n\ntypedef union {\nstruct {\nunsigned :3;\nunsigned RE3 :1;\n};\nstruct {\nunsigned :2;\nunsigned CCP10 :1;\n};\nstruct {\nunsigned :7;\nunsigned CCP2E :1;\n};\nstruct {\nunsigned :6;\nunsigned CCP6E :1;\n};\nstruct {\nunsigned :5;\nunsigned CCP7E :1;\n};\nstruct {\nunsigned :4;\nunsigned CCP8E :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP9E :1;\n};\nstruct {\nunsigned :2;\nunsigned CS :1;\n};\nstruct {\nunsigned :7;\nunsigned PA2E :1;\n};\nstruct {\nunsigned :6;\nunsigned PB1E :1;\n};\nstruct {\nunsigned :2;\nunsigned PB2 :1;\n};\nstruct {\nunsigned :4;\nunsigned PB3E :1;\n};\nstruct {\nunsigned :5;\nunsigned PC1E :1;\n};\nstruct {\nunsigned :1;\nunsigned PC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned PC3E :1;\n};\nstruct {\nunsigned PD2 :1;\n};\nstruct {\nunsigned RDE :1;\n};\nstruct {\nunsigned RE0 :1;\n};\nstruct {\nunsigned :1;\nunsigned RE1 :1;\n};\nstruct {\nunsigned :2;\nunsigned RE2 :1;\n};\nstruct {\nunsigned :4;\nunsigned RE4 :1;\n};\nstruct {\nunsigned :5;\nunsigned RE5 :1;\n};\nstruct {\nunsigned :6;\nunsigned RE6 :1;\n};\nstruct {\nunsigned :7;\nunsigned RE7 :1;\n};\nstruct {\nunsigned :1;\nunsigned WRE :1;\n};\n} PORTEbits_t;\nextern volatile PORTEbits_t PORTEbits @ 0xF84;\n\n# 3024\nextern volatile unsigned char LATA @ 0xF89;\n\nasm(\"LATA equ 0F89h\");\n\n\ntypedef union {\nstruct {\nunsigned LATA0 :1;\nunsigned LATA1 :1;\nunsigned LATA2 :1;\nunsigned LATA3 :1;\nunsigned LATA4 :1;\nunsigned LATA5 :1;\nunsigned LATA6 :1;\n};\nstruct {\nunsigned LA0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LA1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LA3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LA4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LA5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LA6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned LATA7 :1;\n};\n} LATAbits_t;\nextern volatile LATAbits_t LATAbits @ 0xF89;\n\n# 3159\nextern volatile unsigned char LATB @ 0xF8A;\n\nasm(\"LATB equ 0F8Ah\");\n\n\ntypedef union {\nstruct {\nunsigned LATB0 :1;\nunsigned LATB1 :1;\nunsigned LATB2 :1;\nunsigned LATB3 :1;\nunsigned LATB4 :1;\nunsigned LATB5 :1;\nunsigned LATB6 :1;\nunsigned LATB7 :1;\n};\nstruct {\nunsigned LB0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LB1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LB2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LB3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LB4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LB5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LB6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LB7 :1;\n};\n} LATBbits_t;\nextern volatile LATBbits_t LATBbits @ 0xF8A;\n\n# 3291\nextern volatile unsigned char LATC @ 0xF8B;\n\nasm(\"LATC equ 0F8Bh\");\n\n\ntypedef union {\nstruct {\nunsigned LATC0 :1;\nunsigned LATC1 :1;\nunsigned LATC2 :1;\nunsigned :3;\nunsigned LATC6 :1;\nunsigned LATC7 :1;\n};\nstruct {\nunsigned LC0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LC1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LC3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LC4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LC5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LC6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LC7 :1;\n};\n} LATCbits_t;\nextern volatile LATCbits_t LATCbits @ 0xF8B;\n\n# 3406\nextern volatile unsigned char TRISA @ 0xF92;\n\nasm(\"TRISA equ 0F92h\");\n\n\nextern volatile unsigned char DDRA @ 0xF92;\n\nasm(\"DDRA equ 0F92h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} TRISAbits_t;\nextern volatile TRISAbits_t TRISAbits @ 0xF92;\n\n# 3509\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} DDRAbits_t;\nextern volatile DDRAbits_t DDRAbits @ 0xF92;\n\n# 3603\nextern volatile unsigned char TRISB @ 0xF93;\n\nasm(\"TRISB equ 0F93h\");\n\n\nextern volatile unsigned char DDRB @ 0xF93;\n\nasm(\"DDRB equ 0F93h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} TRISBbits_t;\nextern volatile TRISBbits_t TRISBbits @ 0xF93;\n\n# 3718\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} DDRBbits_t;\nextern volatile DDRBbits_t DDRBbits @ 0xF93;\n\n# 3824\nextern volatile unsigned char TRISC @ 0xF94;\n\nasm(\"TRISC equ 0F94h\");\n\n\nextern volatile unsigned char DDRC @ 0xF94;\n\nasm(\"DDRC equ 0F94h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} TRISCbits_t;\nextern volatile TRISCbits_t TRISCbits @ 0xF94;\n\n# 3914\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} DDRCbits_t;\nextern volatile DDRCbits_t DDRCbits @ 0xF94;\n\n# 3995\nextern volatile unsigned char OSCTUNE @ 0xF9B;\n\nasm(\"OSCTUNE equ 0F9Bh\");\n\n\ntypedef union {\nstruct {\nunsigned TUN :5;\nunsigned :2;\nunsigned INTSRC :1;\n};\nstruct {\nunsigned TUN0 :1;\nunsigned TUN1 :1;\nunsigned TUN2 :1;\nunsigned TUN3 :1;\nunsigned TUN4 :1;\n};\n} OSCTUNEbits_t;\nextern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n\n# 4053\nextern volatile unsigned char PIE1 @ 0xF9D;\n\nasm(\"PIE1 equ 0F9Dh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IE :1;\nunsigned TMR2IE :1;\nunsigned CCP1IE :1;\nunsigned SSPIE :1;\nunsigned TXIE :1;\nunsigned RCIE :1;\nunsigned ADIE :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IE :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IE :1;\n};\n} PIE1bits_t;\nextern volatile PIE1bits_t PIE1bits @ 0xF9D;\n\n# 4126\nextern volatile unsigned char PIR1 @ 0xF9E;\n\nasm(\"PIR1 equ 0F9Eh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IF :1;\nunsigned TMR2IF :1;\nunsigned CCP1IF :1;\nunsigned SSPIF :1;\nunsigned TXIF :1;\nunsigned RCIF :1;\nunsigned ADIF :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IF :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IF :1;\n};\n} PIR1bits_t;\nextern volatile PIR1bits_t PIR1bits @ 0xF9E;\n\n# 4199\nextern volatile unsigned char IPR1 @ 0xF9F;\n\nasm(\"IPR1 equ 0F9Fh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IP :1;\nunsigned TMR2IP :1;\nunsigned CCP1IP :1;\nunsigned SSPIP :1;\nunsigned TXIP :1;\nunsigned RCIP :1;\nunsigned ADIP :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IP :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IP :1;\n};\n} IPR1bits_t;\nextern volatile IPR1bits_t IPR1bits @ 0xF9F;\n\n# 4272\nextern volatile unsigned char PIE2 @ 0xFA0;\n\nasm(\"PIE2 equ 0FA0h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IE :1;\nunsigned TMR3IE :1;\nunsigned HLVDIE :1;\nunsigned BCLIE :1;\nunsigned EEIE :1;\nunsigned USBIE :1;\nunsigned CMIE :1;\nunsigned OSCFIE :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIE :1;\n};\n} PIE2bits_t;\nextern volatile PIE2bits_t PIE2bits @ 0xFA0;\n\n# 4342\nextern volatile unsigned char PIR2 @ 0xFA1;\n\nasm(\"PIR2 equ 0FA1h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IF :1;\nunsigned TMR3IF :1;\nunsigned HLVDIF :1;\nunsigned BCLIF :1;\nunsigned EEIF :1;\nunsigned USBIF :1;\nunsigned CMIF :1;\nunsigned OSCFIF :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIF :1;\n};\n} PIR2bits_t;\nextern volatile PIR2bits_t PIR2bits @ 0xFA1;\n\n# 4412\nextern volatile unsigned char IPR2 @ 0xFA2;\n\nasm(\"IPR2 equ 0FA2h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IP :1;\nunsigned TMR3IP :1;\nunsigned HLVDIP :1;\nunsigned BCLIP :1;\nunsigned EEIP :1;\nunsigned USBIP :1;\nunsigned CMIP :1;\nunsigned OSCFIP :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIP :1;\n};\n} IPR2bits_t;\nextern volatile IPR2bits_t IPR2bits @ 0xFA2;\n\n# 4482\nextern volatile unsigned char EECON1 @ 0xFA6;\n\nasm(\"EECON1 equ 0FA6h\");\n\n\ntypedef union {\nstruct {\nunsigned RD :1;\nunsigned WR :1;\nunsigned WREN :1;\nunsigned WRERR :1;\nunsigned FREE :1;\nunsigned :1;\nunsigned CFGS :1;\nunsigned EEPGD :1;\n};\nstruct {\nunsigned :6;\nunsigned EEFS :1;\n};\n} EECON1bits_t;\nextern volatile EECON1bits_t EECON1bits @ 0xFA6;\n\n# 4547\nextern volatile unsigned char EECON2 @ 0xFA7;\n\nasm(\"EECON2 equ 0FA7h\");\n\n\n\nextern volatile unsigned char EEDATA @ 0xFA8;\n\nasm(\"EEDATA equ 0FA8h\");\n\n\n\nextern volatile unsigned char EEADR @ 0xFA9;\n\nasm(\"EEADR equ 0FA9h\");\n\n\n\nextern volatile unsigned char RCSTA @ 0xFAB;\n\nasm(\"RCSTA equ 0FABh\");\n\n\nextern volatile unsigned char RCSTA1 @ 0xFAB;\n\nasm(\"RCSTA1 equ 0FABh\");\n\n\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTAbits_t;\nextern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n\n# 4648\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTA1bits_t;\nextern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n\n# 4722\nextern volatile unsigned char TXSTA @ 0xFAC;\n\nasm(\"TXSTA equ 0FACh\");\n\n\nextern volatile unsigned char TXSTA1 @ 0xFAC;\n\nasm(\"TXSTA1 equ 0FACh\");\n\n\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTAbits_t;\nextern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n\n# 4858\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTA1bits_t;\nextern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n\n# 4985\nextern volatile unsigned char TXREG @ 0xFAD;\n\nasm(\"TXREG equ 0FADh\");\n\n\nextern volatile unsigned char TXREG1 @ 0xFAD;\n\nasm(\"TXREG1 equ 0FADh\");\n\n\n\nextern volatile unsigned char RCREG @ 0xFAE;\n\nasm(\"RCREG equ 0FAEh\");\n\n\nextern volatile unsigned char RCREG1 @ 0xFAE;\n\nasm(\"RCREG1 equ 0FAEh\");\n\n\n\nextern volatile unsigned char SPBRG @ 0xFAF;\n\nasm(\"SPBRG equ 0FAFh\");\n\n\nextern volatile unsigned char SPBRG1 @ 0xFAF;\n\nasm(\"SPBRG1 equ 0FAFh\");\n\n\n\nextern volatile unsigned char SPBRGH @ 0xFB0;\n\nasm(\"SPBRGH equ 0FB0h\");\n\n\n\nextern volatile unsigned char T3CON @ 0xFB1;\n\nasm(\"T3CON equ 0FB1h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T3SYNC :1;\n};\nstruct {\nunsigned TMR3ON :1;\nunsigned TMR3CS :1;\nunsigned nT3SYNC :1;\nunsigned T3CCP1 :1;\nunsigned T3CKPS :2;\nunsigned T3CCP2 :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3SYNC :1;\nunsigned :1;\nunsigned T3CKPS0 :1;\nunsigned T3CKPS1 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3NSYNC :1;\n};\nstruct {\nunsigned :7;\nunsigned RD163 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN3 :1;\n};\nstruct {\nunsigned :7;\nunsigned T3RD16 :1;\n};\n} T3CONbits_t;\nextern volatile T3CONbits_t T3CONbits @ 0xFB1;\n\n# 5146\nextern volatile unsigned short TMR3 @ 0xFB2;\n\nasm(\"TMR3 equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3L @ 0xFB2;\n\nasm(\"TMR3L equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3H @ 0xFB3;\n\nasm(\"TMR3H equ 0FB3h\");\n\n\n\nextern volatile unsigned char CMCON @ 0xFB4;\n\nasm(\"CMCON equ 0FB4h\");\n\n\ntypedef union {\nstruct {\nunsigned CM :3;\nunsigned CIS :1;\nunsigned C1INV :1;\nunsigned C2INV :1;\nunsigned C1OUT :1;\nunsigned C2OUT :1;\n};\nstruct {\nunsigned CM0 :1;\nunsigned CM1 :1;\nunsigned CM2 :1;\n};\nstruct {\nunsigned CMEN0 :1;\n};\nstruct {\nunsigned :1;\nunsigned CMEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned CMEN2 :1;\n};\n} CMCONbits_t;\nextern volatile CMCONbits_t CMCONbits @ 0xFB4;\n\n# 5259\nextern volatile unsigned char CVRCON @ 0xFB5;\n\nasm(\"CVRCON equ 0FB5h\");\n\n\ntypedef union {\nstruct {\nunsigned CVR :4;\nunsigned CVRSS :1;\nunsigned CVRR :1;\nunsigned CVROE :1;\nunsigned CVREN :1;\n};\nstruct {\nunsigned CVR0 :1;\nunsigned CVR1 :1;\nunsigned CVR2 :1;\nunsigned CVR3 :1;\nunsigned CVREF :1;\n};\nstruct {\nunsigned :6;\nunsigned CVROEN :1;\n};\n} CVRCONbits_t;\nextern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n\n# 5343\nextern volatile unsigned char ECCP1AS @ 0xFB6;\n\nasm(\"ECCP1AS equ 0FB6h\");\n\n\nextern volatile unsigned char CCP1AS @ 0xFB6;\n\nasm(\"CCP1AS equ 0FB6h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} ECCP1ASbits_t;\nextern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n\n# 5412\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} CCP1ASbits_t;\nextern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n\n# 5472\nextern volatile unsigned char ECCP1DEL @ 0xFB7;\n\nasm(\"ECCP1DEL equ 0FB7h\");\n\n\nextern volatile unsigned char CCP1DEL @ 0xFB7;\n\nasm(\"CCP1DEL equ 0FB7h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} ECCP1DELbits_t;\nextern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n\n# 5496\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} CCP1DELbits_t;\nextern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n\n# 5511\nextern volatile unsigned char BAUDCON @ 0xFB8;\n\nasm(\"BAUDCON equ 0FB8h\");\n\n\nextern volatile unsigned char BAUDCTL @ 0xFB8;\n\nasm(\"BAUDCTL equ 0FB8h\");\n\n\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCONbits_t;\nextern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n\n# 5605\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCTLbits_t;\nextern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n\n# 5690\nextern volatile unsigned char CCP2CON @ 0xFBA;\n\nasm(\"CCP2CON equ 0FBAh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2M :4;\nunsigned DC2B :2;\n};\nstruct {\nunsigned CCP2M0 :1;\nunsigned CCP2M1 :1;\nunsigned CCP2M2 :1;\nunsigned CCP2M3 :1;\nunsigned DC2B0 :1;\nunsigned DC2B1 :1;\n};\n} CCP2CONbits_t;\nextern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n\n# 5753\nextern volatile unsigned short CCPR2 @ 0xFBB;\n\nasm(\"CCPR2 equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2L @ 0xFBB;\n\nasm(\"CCPR2L equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2H @ 0xFBC;\n\nasm(\"CCPR2H equ 0FBCh\");\n\n\n\nextern volatile unsigned char CCP1CON @ 0xFBD;\n\nasm(\"CCP1CON equ 0FBDh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP1M :4;\nunsigned DC1B :2;\n};\nstruct {\nunsigned CCP1M0 :1;\nunsigned CCP1M1 :1;\nunsigned CCP1M2 :1;\nunsigned CCP1M3 :1;\nunsigned DC1B0 :1;\nunsigned DC1B1 :1;\n};\n} CCP1CONbits_t;\nextern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n\n# 5834\nextern volatile unsigned short CCPR1 @ 0xFBE;\n\nasm(\"CCPR1 equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1L @ 0xFBE;\n\nasm(\"CCPR1L equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1H @ 0xFBF;\n\nasm(\"CCPR1H equ 0FBFh\");\n\n\n\nextern volatile unsigned char ADCON2 @ 0xFC0;\n\nasm(\"ADCON2 equ 0FC0h\");\n\n\ntypedef union {\nstruct {\nunsigned ADCS :3;\nunsigned ACQT :3;\nunsigned :1;\nunsigned ADFM :1;\n};\nstruct {\nunsigned ADCS0 :1;\nunsigned ADCS1 :1;\nunsigned ADCS2 :1;\nunsigned ACQT0 :1;\nunsigned ACQT1 :1;\nunsigned ACQT2 :1;\n};\n} ADCON2bits_t;\nextern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n\n# 5922\nextern volatile unsigned char ADCON1 @ 0xFC1;\n\nasm(\"ADCON1 equ 0FC1h\");\n\n\ntypedef union {\nstruct {\nunsigned PCFG :4;\nunsigned VCFG :2;\n};\nstruct {\nunsigned PCFG0 :1;\nunsigned PCFG1 :1;\nunsigned PCFG2 :1;\nunsigned PCFG3 :1;\nunsigned VCFG0 :1;\nunsigned VCFG1 :1;\n};\nstruct {\nunsigned :3;\nunsigned CHSN3 :1;\n};\nstruct {\nunsigned :4;\nunsigned VCFG01 :1;\n};\nstruct {\nunsigned :5;\nunsigned VCFG11 :1;\n};\n} ADCON1bits_t;\nextern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n\n# 6012\nextern volatile unsigned char ADCON0 @ 0xFC2;\n\nasm(\"ADCON0 equ 0FC2h\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned ADON :1;\nunsigned GO_nDONE :1;\nunsigned CHS :4;\n};\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO_DONE :1;\nunsigned CHS0 :1;\nunsigned CHS1 :1;\nunsigned CHS2 :1;\nunsigned CHS3 :1;\n};\nstruct {\nunsigned :1;\nunsigned DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned nDONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GODONE :1;\n};\n} ADCON0bits_t;\nextern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n\n# 6134\nextern volatile unsigned short ADRES @ 0xFC3;\n\nasm(\"ADRES equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESL @ 0xFC3;\n\nasm(\"ADRESL equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESH @ 0xFC4;\n\nasm(\"ADRESH equ 0FC4h\");\n\n\n\nextern volatile unsigned char SSPCON2 @ 0xFC5;\n\nasm(\"SSPCON2 equ 0FC5h\");\n\n\ntypedef union {\nstruct {\nunsigned SEN :1;\nunsigned RSEN :1;\nunsigned PEN :1;\nunsigned RCEN :1;\nunsigned ACKEN :1;\nunsigned ACKDT :1;\nunsigned ACKSTAT :1;\nunsigned GCEN :1;\n};\n} SSPCON2bits_t;\nextern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n\n# 6213\nextern volatile unsigned char SSPCON1 @ 0xFC6;\n\nasm(\"SSPCON1 equ 0FC6h\");\n\n\ntypedef union {\nstruct {\nunsigned SSPM :4;\nunsigned CKP :1;\nunsigned SSPEN :1;\nunsigned SSPOV :1;\nunsigned WCOL :1;\n};\nstruct {\nunsigned SSPM0 :1;\nunsigned SSPM1 :1;\nunsigned SSPM2 :1;\nunsigned SSPM3 :1;\n};\n} SSPCON1bits_t;\nextern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n\n# 6282\nextern volatile unsigned char SSPSTAT @ 0xFC7;\n\nasm(\"SSPSTAT equ 0FC7h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned BF :1;\nunsigned UA :1;\nunsigned R_nW :1;\nunsigned S :1;\nunsigned P :1;\nunsigned D_nA :1;\nunsigned CKE :1;\nunsigned SMP :1;\n};\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned :2;\nunsigned R_W :1;\nunsigned :2;\nunsigned D_A :1;\n};\nstruct {\nunsigned :2;\nunsigned I2C_READ :1;\nunsigned I2C_START :1;\nunsigned I2C_STOP :1;\nunsigned I2C_DAT :1;\n};\nstruct {\nunsigned :2;\nunsigned nW :1;\nunsigned :2;\nunsigned nA :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_WRITE :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned nWRITE :1;\nunsigned :2;\nunsigned nADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned READ_WRITE :1;\nunsigned :2;\nunsigned DATA_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned R :1;\nunsigned :2;\nunsigned D :1;\n};\nstruct {\nunsigned :5;\nunsigned DA :1;\n};\nstruct {\nunsigned :2;\nunsigned RW :1;\n};\nstruct {\nunsigned :3;\nunsigned START :1;\n};\nstruct {\nunsigned :4;\nunsigned STOP :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_A :1;\n};\n} SSPSTATbits_t;\nextern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n\n# 6548\nextern volatile unsigned char SSPADD @ 0xFC8;\n\nasm(\"SSPADD equ 0FC8h\");\n\n\n\nextern volatile unsigned char SSPBUF @ 0xFC9;\n\nasm(\"SSPBUF equ 0FC9h\");\n\n\n\nextern volatile unsigned char T2CON @ 0xFCA;\n\nasm(\"T2CON equ 0FCAh\");\n\n\ntypedef union {\nstruct {\nunsigned T2CKPS :2;\nunsigned TMR2ON :1;\nunsigned TOUTPS :4;\n};\nstruct {\nunsigned T2CKPS0 :1;\nunsigned T2CKPS1 :1;\nunsigned :1;\nunsigned T2OUTPS0 :1;\nunsigned T2OUTPS1 :1;\nunsigned T2OUTPS2 :1;\nunsigned T2OUTPS3 :1;\n};\nstruct {\nunsigned :3;\nunsigned TOUTPS0 :1;\nunsigned TOUTPS1 :1;\nunsigned TOUTPS2 :1;\nunsigned TOUTPS3 :1;\n};\n} T2CONbits_t;\nextern volatile T2CONbits_t T2CONbits @ 0xFCA;\n\n# 6657\nextern volatile unsigned char PR2 @ 0xFCB;\n\nasm(\"PR2 equ 0FCBh\");\n\n\nextern volatile unsigned char MEMCON @ 0xFCB;\n\nasm(\"MEMCON equ 0FCBh\");\n\n\n\nextern volatile unsigned char TMR2 @ 0xFCC;\n\nasm(\"TMR2 equ 0FCCh\");\n\n\n\nextern volatile unsigned char T1CON @ 0xFCD;\n\nasm(\"T1CON equ 0FCDh\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T1SYNC :1;\n};\nstruct {\nunsigned TMR1ON :1;\nunsigned TMR1CS :1;\nunsigned nT1SYNC :1;\nunsigned T1OSCEN :1;\nunsigned T1CKPS :2;\nunsigned T1RUN :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T1SYNC :1;\nunsigned :1;\nunsigned T1CKPS0 :1;\nunsigned T1CKPS1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN :1;\n};\nstruct {\nunsigned :7;\nunsigned T1RD16 :1;\n};\n} T1CONbits_t;\nextern volatile T1CONbits_t T1CONbits @ 0xFCD;\n\n# 6778\nextern volatile unsigned short TMR1 @ 0xFCE;\n\nasm(\"TMR1 equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1L @ 0xFCE;\n\nasm(\"TMR1L equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1H @ 0xFCF;\n\nasm(\"TMR1H equ 0FCFh\");\n\n\n\nextern volatile unsigned char RCON @ 0xFD0;\n\nasm(\"RCON equ 0FD0h\");\n\n\ntypedef union {\nstruct {\nunsigned NOT_BOR :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_POR :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_PD :1;\n};\nstruct {\nunsigned :3;\nunsigned NOT_TO :1;\n};\nstruct {\nunsigned :4;\nunsigned NOT_RI :1;\n};\nstruct {\nunsigned nBOR :1;\nunsigned nPOR :1;\nunsigned nPD :1;\nunsigned nTO :1;\nunsigned nRI :1;\nunsigned :1;\nunsigned SBOREN :1;\nunsigned IPEN :1;\n};\nstruct {\nunsigned :7;\nunsigned NOT_IPEN :1;\n};\nstruct {\nunsigned BOR :1;\nunsigned POR :1;\nunsigned PD :1;\nunsigned TO :1;\nunsigned RI :1;\nunsigned :2;\nunsigned nIPEN :1;\n};\n} RCONbits_t;\nextern volatile RCONbits_t RCONbits @ 0xFD0;\n\n# 6944\nextern volatile unsigned char WDTCON @ 0xFD1;\n\nasm(\"WDTCON equ 0FD1h\");\n\n\ntypedef union {\nstruct {\nunsigned SWDTEN :1;\n};\nstruct {\nunsigned SWDTE :1;\n};\n} WDTCONbits_t;\nextern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n\n# 6971\nextern volatile unsigned char HLVDCON @ 0xFD2;\n\nasm(\"HLVDCON equ 0FD2h\");\n\n\nextern volatile unsigned char LVDCON @ 0xFD2;\n\nasm(\"LVDCON equ 0FD2h\");\n\n\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} HLVDCONbits_t;\nextern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n\n# 7110\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} LVDCONbits_t;\nextern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n\n# 7240\nextern volatile unsigned char OSCCON @ 0xFD3;\n\nasm(\"OSCCON equ 0FD3h\");\n\n\ntypedef union {\nstruct {\nunsigned SCS :2;\nunsigned IOFS :1;\nunsigned OSTS :1;\nunsigned IRCF :3;\nunsigned IDLEN :1;\n};\nstruct {\nunsigned SCS0 :1;\nunsigned SCS1 :1;\nunsigned FLTS :1;\nunsigned :1;\nunsigned IRCF0 :1;\nunsigned IRCF1 :1;\nunsigned IRCF2 :1;\n};\n} OSCCONbits_t;\nextern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n\n# 7322\nextern volatile unsigned char T0CON @ 0xFD5;\n\nasm(\"T0CON equ 0FD5h\");\n\n\ntypedef union {\nstruct {\nunsigned T0PS :3;\nunsigned PSA :1;\nunsigned T0SE :1;\nunsigned T0CS :1;\nunsigned T08BIT :1;\nunsigned TMR0ON :1;\n};\nstruct {\nunsigned T0PS0 :1;\nunsigned T0PS1 :1;\nunsigned T0PS2 :1;\n};\n} T0CONbits_t;\nextern volatile T0CONbits_t T0CONbits @ 0xFD5;\n\n# 7391\nextern volatile unsigned short TMR0 @ 0xFD6;\n\nasm(\"TMR0 equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0L @ 0xFD6;\n\nasm(\"TMR0L equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0H @ 0xFD7;\n\nasm(\"TMR0H equ 0FD7h\");\n\n\n\nextern volatile unsigned char STATUS @ 0xFD8;\n\nasm(\"STATUS equ 0FD8h\");\n\n\ntypedef union {\nstruct {\nunsigned C :1;\nunsigned DC :1;\nunsigned Z :1;\nunsigned OV :1;\nunsigned N :1;\n};\nstruct {\nunsigned CARRY :1;\n};\nstruct {\nunsigned :4;\nunsigned NEGATIVE :1;\n};\nstruct {\nunsigned :3;\nunsigned OVERFLOW :1;\n};\nstruct {\nunsigned :2;\nunsigned ZERO :1;\n};\n} STATUSbits_t;\nextern volatile STATUSbits_t STATUSbits @ 0xFD8;\n\n# 7487\nextern volatile unsigned short FSR2 @ 0xFD9;\n\nasm(\"FSR2 equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2L @ 0xFD9;\n\nasm(\"FSR2L equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2H @ 0xFDA;\n\nasm(\"FSR2H equ 0FDAh\");\n\n\n\nextern volatile unsigned char PLUSW2 @ 0xFDB;\n\nasm(\"PLUSW2 equ 0FDBh\");\n\n\n\nextern volatile unsigned char PREINC2 @ 0xFDC;\n\nasm(\"PREINC2 equ 0FDCh\");\n\n\n\nextern volatile unsigned char POSTDEC2 @ 0xFDD;\n\nasm(\"POSTDEC2 equ 0FDDh\");\n\n\n\nextern volatile unsigned char POSTINC2 @ 0xFDE;\n\nasm(\"POSTINC2 equ 0FDEh\");\n\n\n\nextern volatile unsigned char INDF2 @ 0xFDF;\n\nasm(\"INDF2 equ 0FDFh\");\n\n\n\nextern volatile unsigned char BSR @ 0xFE0;\n\nasm(\"BSR equ 0FE0h\");\n\n\n\nextern volatile unsigned short FSR1 @ 0xFE1;\n\nasm(\"FSR1 equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1L @ 0xFE1;\n\nasm(\"FSR1L equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1H @ 0xFE2;\n\nasm(\"FSR1H equ 0FE2h\");\n\n\n\nextern volatile unsigned char PLUSW1 @ 0xFE3;\n\nasm(\"PLUSW1 equ 0FE3h\");\n\n\n\nextern volatile unsigned char PREINC1 @ 0xFE4;\n\nasm(\"PREINC1 equ 0FE4h\");\n\n\n\nextern volatile unsigned char POSTDEC1 @ 0xFE5;\n\nasm(\"POSTDEC1 equ 0FE5h\");\n\n\n\nextern volatile unsigned char POSTINC1 @ 0xFE6;\n\nasm(\"POSTINC1 equ 0FE6h\");\n\n\n\nextern volatile unsigned char INDF1 @ 0xFE7;\n\nasm(\"INDF1 equ 0FE7h\");\n\n\n\nextern volatile unsigned char WREG @ 0xFE8;\n\nasm(\"WREG equ 0FE8h\");\n\n\n\nextern volatile unsigned short FSR0 @ 0xFE9;\n\nasm(\"FSR0 equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0L @ 0xFE9;\n\nasm(\"FSR0L equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0H @ 0xFEA;\n\nasm(\"FSR0H equ 0FEAh\");\n\n\n\nextern volatile unsigned char PLUSW0 @ 0xFEB;\n\nasm(\"PLUSW0 equ 0FEBh\");\n\n\n\nextern volatile unsigned char PREINC0 @ 0xFEC;\n\nasm(\"PREINC0 equ 0FECh\");\n\n\n\nextern volatile unsigned char POSTDEC0 @ 0xFED;\n\nasm(\"POSTDEC0 equ 0FEDh\");\n\n\n\nextern volatile unsigned char POSTINC0 @ 0xFEE;\n\nasm(\"POSTINC0 equ 0FEEh\");\n\n\n\nextern volatile unsigned char INDF0 @ 0xFEF;\n\nasm(\"INDF0 equ 0FEFh\");\n\n\n\nextern volatile unsigned char INTCON3 @ 0xFF0;\n\nasm(\"INTCON3 equ 0FF0h\");\n\n\ntypedef union {\nstruct {\nunsigned INT1IF :1;\nunsigned INT2IF :1;\nunsigned :1;\nunsigned INT1IE :1;\nunsigned INT2IE :1;\nunsigned :1;\nunsigned INT1IP :1;\nunsigned INT2IP :1;\n};\nstruct {\nunsigned INT1F :1;\nunsigned INT2F :1;\nunsigned :1;\nunsigned INT1E :1;\nunsigned INT2E :1;\nunsigned :1;\nunsigned INT1P :1;\nunsigned INT2P :1;\n};\n} INTCON3bits_t;\nextern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n\n# 7734\nextern volatile unsigned char INTCON2 @ 0xFF1;\n\nasm(\"INTCON2 equ 0FF1h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned NOT_RBPU :1;\n};\nstruct {\nunsigned RBIP :1;\nunsigned :1;\nunsigned TMR0IP :1;\nunsigned :1;\nunsigned INTEDG2 :1;\nunsigned INTEDG1 :1;\nunsigned INTEDG0 :1;\nunsigned nRBPU :1;\n};\nstruct {\nunsigned :2;\nunsigned T0IP :1;\nunsigned :4;\nunsigned RBPU :1;\n};\n} INTCON2bits_t;\nextern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n\n# 7810\nextern volatile unsigned char INTCON @ 0xFF2;\n\nasm(\"INTCON equ 0FF2h\");\n\n\ntypedef union {\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE_GIEL :1;\nunsigned GIE_GIEH :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\nstruct {\nunsigned :1;\nunsigned INT0F :1;\nunsigned T0IF :1;\nunsigned :1;\nunsigned INT0E :1;\nunsigned T0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned :6;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\n} INTCONbits_t;\nextern volatile INTCONbits_t INTCONbits @ 0xFF2;\n\n# 7946\nextern volatile unsigned short PROD @ 0xFF3;\n\nasm(\"PROD equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODL @ 0xFF3;\n\nasm(\"PRODL equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODH @ 0xFF4;\n\nasm(\"PRODH equ 0FF4h\");\n\n\n\nextern volatile unsigned char TABLAT @ 0xFF5;\n\nasm(\"TABLAT equ 0FF5h\");\n\n\n\n\nextern volatile unsigned short long TBLPTR @ 0xFF6;\n\n\nasm(\"TBLPTR equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRL @ 0xFF6;\n\nasm(\"TBLPTRL equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRH @ 0xFF7;\n\nasm(\"TBLPTRH equ 0FF7h\");\n\n\n\nextern volatile unsigned char TBLPTRU @ 0xFF8;\n\nasm(\"TBLPTRU equ 0FF8h\");\n\n\n\n\nextern volatile unsigned short long PCLAT @ 0xFF9;\n\n\nasm(\"PCLAT equ 0FF9h\");\n\n\n\nextern volatile unsigned short long PC @ 0xFF9;\n\n\nasm(\"PC equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCL @ 0xFF9;\n\nasm(\"PCL equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCLATH @ 0xFFA;\n\nasm(\"PCLATH equ 0FFAh\");\n\n\n\nextern volatile unsigned char PCLATU @ 0xFFB;\n\nasm(\"PCLATU equ 0FFBh\");\n\n\n\nextern volatile unsigned char STKPTR @ 0xFFC;\n\nasm(\"STKPTR equ 0FFCh\");\n\n\ntypedef union {\nstruct {\nunsigned STKPTR :5;\nunsigned :1;\nunsigned STKUNF :1;\nunsigned STKFUL :1;\n};\nstruct {\nunsigned STKPTR0 :1;\nunsigned STKPTR1 :1;\nunsigned STKPTR2 :1;\nunsigned STKPTR3 :1;\nunsigned STKPTR4 :1;\n};\nstruct {\nunsigned :7;\nunsigned STKOVF :1;\n};\n} STKPTRbits_t;\nextern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n\n# 8103\nextern volatile unsigned short long TOS @ 0xFFD;\n\n\nasm(\"TOS equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSL @ 0xFFD;\n\nasm(\"TOSL equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSH @ 0xFFE;\n\nasm(\"TOSH equ 0FFEh\");\n\n\n\nextern volatile unsigned char TOSU @ 0xFFF;\n\nasm(\"TOSU equ 0FFFh\");\n\n# 8134\nextern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n\nextern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n\nextern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n\nextern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n\nextern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n\nextern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n\nextern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n\nextern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n\nextern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n\nextern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n\nextern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n\nextern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n\nextern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n\nextern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n\nextern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n\nextern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n\nextern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n\nextern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n\nextern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n\nextern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n\nextern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n\nextern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n\nextern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n\nextern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n\nextern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n\nextern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n\nextern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n\nextern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n\nextern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n\nextern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n\nextern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n\nextern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n\nextern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n\nextern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n\nextern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n\nextern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n\nextern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n\nextern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n\nextern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n\nextern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n\nextern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n\nextern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n\nextern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n\nextern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n\nextern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n\nextern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n\nextern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n\nextern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n\nextern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n\nextern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n\nextern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n\nextern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n\nextern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n\nextern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n\nextern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n\nextern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n\nextern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n\nextern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n\nextern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n\nextern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n\nextern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n\nextern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n\nextern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n\nextern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n\nextern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n\nextern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n\nextern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n\nextern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n\nextern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n\nextern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n\nextern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n\nextern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n\nextern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n\nextern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n\nextern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n\nextern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n\nextern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n\nextern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n\nextern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n\nextern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n\nextern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n\nextern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n\nextern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n\nextern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n\nextern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n\nextern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n\nextern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n\nextern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n\nextern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n\nextern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n\nextern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n\nextern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n\nextern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n\nextern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n\nextern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n\nextern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n\nextern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n\nextern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n\nextern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n\nextern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n\nextern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n\nextern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n\nextern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n\nextern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n\nextern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n\nextern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n\nextern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n\nextern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n\nextern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n\nextern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n\nextern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n\nextern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n\nextern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n\nextern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n\nextern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n\nextern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n\nextern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n\nextern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n\nextern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n\nextern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n\nextern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n\nextern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n\nextern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n\nextern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n\nextern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n\nextern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n\nextern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n\nextern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n\nextern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n\nextern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n\nextern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n\nextern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n\nextern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n\nextern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n\nextern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n\nextern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n\nextern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n\nextern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n\nextern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n\nextern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n\nextern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n\nextern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n\nextern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n\nextern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n\nextern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n\nextern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n\nextern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n\nextern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n\nextern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n\nextern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n\nextern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n\nextern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n\nextern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n\nextern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n\nextern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n\nextern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n\nextern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n\nextern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n\nextern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n\nextern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n\nextern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n\nextern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n\nextern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n\nextern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n\nextern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n\nextern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n\nextern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n\nextern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n\nextern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n\nextern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n\nextern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n\nextern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n\nextern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n\nextern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n\nextern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n\nextern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n\nextern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n\nextern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n\nextern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n\nextern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n\nextern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n\nextern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n\nextern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n\nextern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n\nextern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n\nextern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n\nextern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n\nextern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n\nextern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n\nextern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n\nextern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n\nextern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n\nextern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n\nextern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n\nextern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n\nextern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n\nextern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n\nextern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n\nextern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n\nextern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n\nextern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n\nextern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n\nextern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n\nextern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n\nextern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n\nextern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n\nextern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n\nextern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n\nextern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n\nextern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n\nextern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n\nextern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n\nextern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n\nextern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n\nextern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n\nextern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n\nextern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n\nextern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n\nextern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n\nextern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n\nextern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n\nextern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n\nextern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n\nextern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n\nextern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n\nextern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n\nextern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n\nextern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n\nextern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n\nextern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n\nextern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n\nextern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n\nextern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n\nextern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n\nextern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n\nextern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n\nextern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n\nextern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n\nextern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n\nextern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n\nextern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n\nextern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n\nextern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n\nextern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n\nextern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n\nextern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n\nextern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n\nextern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n\nextern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n\nextern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n\nextern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n\nextern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n\nextern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n\nextern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n\nextern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n\nextern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n\nextern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n\nextern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n\nextern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n\nextern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n\nextern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n\nextern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n\nextern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n\nextern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n\nextern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n\nextern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n\nextern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n\nextern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n\nextern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n\nextern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n\nextern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n\nextern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n\nextern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n\nextern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n\nextern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n\nextern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n\nextern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n\nextern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n\nextern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n\nextern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n\nextern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n\nextern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n\nextern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n\nextern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n\nextern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n\nextern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n\nextern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n\nextern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n\nextern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n\nextern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n\nextern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n\nextern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n\nextern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n\nextern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n\nextern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n\nextern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\n# 2008 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\adc.h\"\nunion ADCResult\n{\nint lr;\nchar br[2];\n};\n\nchar BusyADC (void);\n\nvoid ConvertADC (void);\n\nvoid CloseADC(void);\n\n# 2026\nint ReadADC(void);\n\n# 2040\nvoid OpenADC ( unsigned char ,\nunsigned char ,\nunsigned char );\n\n# 2084\nvoid SetChanADC(unsigned char );\n\n# 2100\nvoid SelChanConvADC( unsigned char );\n\n# 38 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\ancomp.h\"\nvoid Close_ancomp( void );\nvoid Open_ancomp(unsigned char config);\n\n# 584 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\spi.h\"\nvoid OpenSPI( unsigned char sync_mode,\nunsigned char bus_mode,\nunsigned char smp_phase );\n\nsigned char WriteSPI( unsigned char data_out );\n\nvoid getsSPI( unsigned char *rdptr, unsigned char length );\n\nvoid putsSPI( unsigned char *wrptr );\n\nunsigned char ReadSPI( void );\n\n# 414 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\can2510.h\"\nvoid CAN2510Initialize(  unsigned int configuration,\n unsigned char brp,\n unsigned char interruptFlags,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nsigned char CAN2510Init(  unsigned long BufferConfig,\n unsigned long BitTimeConfig,\n unsigned char interruptEnables,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nvoid CAN2510Enable( void );\n\nvoid CAN2510Disable( void );\n\nvoid CAN2510Reset( void );\n\nvoid CAN2510SetMode(  unsigned char mode );\n\nunsigned char CAN2510ReadMode( void );\n\nunsigned char CAN2510ReadStatus( void );\n\nunsigned char CAN2510ErrorState( void );\n\nunsigned char CAN2510InterruptStatus( void );\n\nvoid CAN2510InterruptEnable( unsigned char interruptFlags );\n\nunsigned char CAN2510ByteRead(  unsigned char addr );\n\nvoid CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n\nvoid CAN2510SequentialRead(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510SequentialWrite(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510BitModify(  unsigned char address,\n unsigned char mask,\n unsigned char data );\n\nvoid CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n\nvoid CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n\nvoid CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n\nvoid CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n\nsigned char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n unsigned int mask,\n unsigned int *filters );\n\nsigned char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n unsigned long mask,\n unsigned long *filters );\n\nsigned char CAN2510WriteStd(  unsigned int msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nsigned char CAN2510WriteXtd(  unsigned long msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadRTRStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes );\n\nvoid CAN2510LoadRTRXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes );\n\nvoid CAN2510SetBufferPriority(  unsigned char bufferNum,\n unsigned char bufferPriority );\n\nvoid CAN2510SendBuffer(  unsigned char bufferNumber );\n\nsigned char CAN2510WriteBuffer(  unsigned char bufferNum );\n\nunsigned char CAN2510DataReady(  unsigned char bufferNum );\n\nunsigned char CAN2510DataRead(  unsigned char bufferNum,\n unsigned long *msgId,\n unsigned char *numBytes,\n unsigned char *data );\n\n# 64 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\capture.h\"\nunion capstatus\n{\n\n# 73\nstruct\n{\n\n# 77\nunsigned Cap1OVF:1;\n\n# 82\nunsigned Cap2OVF:1;\n\n# 115\n};\n\nunsigned :8;\n\n};\n\nextern union capstatus CapStatus;\n\nunion CapResult\n{\nunsigned int lc;\nchar bc[2];\n};\n\n# 474\nvoid OpenCapture1 ( unsigned char config);\nunsigned int ReadCapture1 (void);\nvoid CloseCapture1 (void);\n\n# 484\nvoid OpenCapture2 ( unsigned char config);\nunsigned int ReadCapture2 (void);\nvoid CloseCapture2 (void);\n\n# 385 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\compare.h\"\nvoid OpenCompare1(unsigned char config,unsigned int period);\nvoid CloseCompare1(void);\n\n# 392\nvoid OpenCompare2(unsigned char config, unsigned int period);\nvoid CloseCompare2(void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\EEP.h\"\nvoid Busy_eep ( void );\nunsigned char Read_b_eep( unsigned int badd );\nvoid Write_b_eep( unsigned int badd, unsigned char bdata );\n\n# 2 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stddef.h\"\ntypedef int ptrdiff_t;\ntypedef unsigned size_t;\ntypedef unsigned short wchar_t;\n\n# 13\nextern int errno;\n\n# 65 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\GenericTypeDefs.h\"\ntypedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n\n\ntypedef enum _BIT { CLEAR = 0, SET } BIT;\n\n# 75\ntypedef signed int INT;\ntypedef signed char INT8;\ntypedef signed short int INT16;\ntypedef signed long int INT32;\n\n\n\n typedef signed long long INT64;\n\n\n\ntypedef unsigned int UINT;\ntypedef unsigned char UINT8;\ntypedef unsigned short int UINT16;\n\n# 93\ntypedef unsigned long int UINT32;\n\n\n typedef unsigned long long UINT64;\n\n\ntypedef union\n{\nUINT8 Val;\nstruct\n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n} bits;\n} UINT8_VAL, UINT8_BITS;\n\ntypedef union\n{\nUINT16 Val;\nUINT8 v[2] ;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\n} byte;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n} bits;\n} UINT16_VAL, UINT16_BITS;\n\n# 187\ntypedef union\n{\nUINT32 Val;\nUINT16 w[2] ;\nUINT8 v[4] ;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\n} word;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\nUINT8 UB;\nUINT8 MB;\n} byte;\nstruct \n{\nUINT16_VAL low;\nUINT16_VAL high;\n}wordUnion;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n} bits;\n} UINT32_VAL;\n\n\n\ntypedef union\n{\nUINT64 Val;\nUINT32 d[2] ;\nUINT16 w[4] ;\nUINT8 v[8] ;\nstruct \n{\nUINT32 LD;\nUINT32 HD;\n} dword;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\nUINT16 UW;\nUINT16 MW;\n} word;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n UINT8 b32:1;\n UINT8 b33:1;\n UINT8 b34:1;\n UINT8 b35:1;\n UINT8 b36:1;\n UINT8 b37:1;\n UINT8 b38:1;\n UINT8 b39:1;\n UINT8 b40:1;\n UINT8 b41:1;\n UINT8 b42:1;\n UINT8 b43:1;\n UINT8 b44:1;\n UINT8 b45:1;\n UINT8 b46:1;\n UINT8 b47:1;\n UINT8 b48:1;\n UINT8 b49:1;\n UINT8 b50:1;\n UINT8 b51:1;\n UINT8 b52:1;\n UINT8 b53:1;\n UINT8 b54:1;\n UINT8 b55:1;\n UINT8 b56:1;\n UINT8 b57:1;\n UINT8 b58:1;\n UINT8 b59:1;\n UINT8 b60:1;\n UINT8 b61:1;\n UINT8 b62:1;\n UINT8 b63:1;\n} bits;\n} UINT64_VAL;\n\n# 339\ntypedef void VOID;\n\ntypedef char CHAR8;\ntypedef unsigned char UCHAR8;\n\ntypedef unsigned char BYTE;\ntypedef unsigned short int WORD;\ntypedef unsigned long DWORD;\n\n\ntypedef unsigned long long QWORD;\ntypedef signed char CHAR;\ntypedef signed short int SHORT;\ntypedef signed long LONG;\n\n\ntypedef signed long long LONGLONG;\ntypedef union\n{\nBYTE Val;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n} bits;\n} BYTE_VAL, BYTE_BITS;\n\ntypedef union\n{\nWORD Val;\nBYTE v[2] ;\nstruct \n{\nBYTE LB;\nBYTE HB;\n} byte;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n} bits;\n} WORD_VAL, WORD_BITS;\n\ntypedef union\n{\nDWORD Val;\nWORD w[2] ;\nBYTE v[4] ;\nstruct \n{\nWORD LW;\nWORD HW;\n} word;\nstruct \n{\nBYTE LB;\nBYTE HB;\nBYTE UB;\nBYTE MB;\n} byte;\nstruct \n{\nWORD_VAL low;\nWORD_VAL high;\n}wordUnion;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n} bits;\n} DWORD_VAL;\n\n\ntypedef union\n{\nQWORD Val;\nDWORD d[2] ;\nWORD w[4] ;\nBYTE v[8] ;\nstruct \n{\nDWORD LD;\nDWORD HD;\n} dword;\nstruct \n{\nWORD LW;\nWORD HW;\nWORD UW;\nWORD MW;\n} word;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n BYTE b32:1;\n BYTE b33:1;\n BYTE b34:1;\n BYTE b35:1;\n BYTE b36:1;\n BYTE b37:1;\n BYTE b38:1;\n BYTE b39:1;\n BYTE b40:1;\n BYTE b41:1;\n BYTE b42:1;\n BYTE b43:1;\n BYTE b44:1;\n BYTE b45:1;\n BYTE b46:1;\n BYTE b47:1;\n BYTE b48:1;\n BYTE b49:1;\n BYTE b50:1;\n BYTE b51:1;\n BYTE b52:1;\n BYTE b53:1;\n BYTE b54:1;\n BYTE b55:1;\n BYTE b56:1;\n BYTE b57:1;\n BYTE b58:1;\n BYTE b59:1;\n BYTE b60:1;\n BYTE b61:1;\n BYTE b62:1;\n BYTE b63:1;\n} bits;\n} QWORD_VAL;\n\n# 113 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\flash.h\"\nextern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 120\nextern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n\nextern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n\nextern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 775 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\i2c.h\"\nvoid IdleI2C( void );\n\nvoid OpenI2C( unsigned char sync_mode, unsigned char slew );\n\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char putsI2C( unsigned char *wrptr );\n\nunsigned char ReadI2C( void );\n\nvoid CloseI2C( void );\n\n# 899\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char getsI2C( unsigned char *rdptr, unsigned char length );\n\n# 908\nsigned char EEAckPolling( unsigned char control );\n\nsigned char EEByteWrite( unsigned char control,\nunsigned char address,\nunsigned char data );\n\nsigned int EECurrentAddRead( unsigned char control );\n\nsigned char EEPageWrite( unsigned char control,\nunsigned char address,\nunsigned char *wrptr );\n\nsigned int EERandomRead( unsigned char control, unsigned char address );\n\nsigned char EESequentialRead( unsigned char control,\nunsigned char address,\nunsigned char *rdptr,\nunsigned char length );\n\n# 325 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\mwire.h\"\nvoid OpenMwire( unsigned char sync_mode );\n\nunsigned char ReadMwire( unsigned char high_byte,\nunsigned char low_byte );\n\n# 341\nsigned char WriteMwire( unsigned char data_out );\n\n# 354\nvoid getsMwire( unsigned char *rdptr, unsigned char length );\n\n# 126 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\portb.h\"\nvoid OpenPORTB( unsigned char config);\n\n# 176\nvoid OpenRB0INT( unsigned char config);\n\n# 194\nvoid OpenRB1INT( unsigned char config);\n\n# 211\nvoid OpenRB2INT( unsigned char config);\n\n# 85 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\pwm.h\"\nunion PWMDC\n{\nunsigned int lpwm;\nchar bpwm[2];\n};\n\n# 467\nvoid OpenPWM1 ( char period);\nvoid SetDCPWM1 ( unsigned int duty_cycle);\n\n# 477\nvoid ClosePWM1 (void);\n\n# 485\nvoid OpenPWM2 ( char period);\nvoid SetDCPWM2( unsigned int duty_cycle);\n\n# 492\nvoid ClosePWM2 (void);\n\n# 16 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\reset.h\"\nchar isMCLR(void);\nvoid StatusReset(void);\nchar isPOR(void);\nchar isWU(void);\n\n\nchar isBOR(void);\n\n\n\nchar isWDTTO(void);\nchar isWDTWU(void);\n\n\n\nchar isLVD(void);\n\n# 687 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\rtcc.h\"\nvoid Open_RTCC(void);\nvoid Close_RTCC(void);\nunsigned char update_RTCC(void);\n\n# 97 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_i2c.h\"\nvoid SWStopI2C ( void );\nvoid SWStartI2C ( void );\nvoid SWRestartI2C ( void );\nvoid SWStopI2C ( void );\n\nsigned char SWAckI2C( void );\nsigned char Clock_test( void );\nsigned int SWReadI2C( void );\nsigned char SWWriteI2C(  unsigned char data_out );\nsigned char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\nsigned char SWPutsI2C(  unsigned char *wrptr );\n\n# 84 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_spi.h\"\nvoid OpenSWSPI(void);\n\n\nchar WriteSWSPI( char output);\n\n\nvoid SetCSSWSPI(void);\n\n\nvoid ClearCSSWSPI(void);\n\n# 47 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_uart.h\"\nvoid OpenUART(void);\n\nunsigned char ReadUART(void);\n\nvoid WriteUART( unsigned char);\n\nvoid getsUART( char *, unsigned char);\n\nvoid putsUART( char *);\n\n# 79\nextern void DelayRXBitUART (void);\nextern void DelayRXHalfBitUART(void);\nextern void DelayTXBitUART (void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\timers.h\"\nunion Timers\n{\nunsigned int lt;\nchar bt[2];\n};\n\n# 118\nvoid OpenTimer0 ( unsigned char config);\nvoid CloseTimer0 (void);\nunsigned int ReadTimer0 (void);\nvoid WriteTimer0 ( unsigned int timer0);\n\n# 236\nvoid OpenTimer1 ( unsigned char config);\nvoid CloseTimer1 (void);\nunsigned int ReadTimer1 (void);\nvoid WriteTimer1 ( unsigned int timer1);\n\n# 325\nvoid OpenTimer2 ( unsigned char config);\nvoid CloseTimer2 (void);\n\n# 391\nvoid OpenTimer3 ( unsigned char config);\nvoid CloseTimer3 (void);\nunsigned int ReadTimer3 (void);\nvoid WriteTimer3 ( unsigned int timer3);\n\n# 1179\nvoid SetTmrCCPSrc( unsigned char );\n\n# 568 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\usart.h\"\nunion USART\n{\nunsigned char val;\nstruct\n{\nunsigned RX_NINE:1;\nunsigned TX_NINE:1;\nunsigned FRAME_ERROR:1;\nunsigned OVERRUN_ERROR:1;\nunsigned fill:4;\n};\n};\nextern union USART USART_Status;\nvoid OpenUSART ( unsigned char config, unsigned spbrg);\n\n# 596\nchar ReadUSART (void);\nvoid WriteUSART ( char data);\nvoid getsUSART ( char *buffer, unsigned char len);\nvoid putsUSART ( char *data);\nvoid putrsUSART ( const  char *data);\n\n# 654\nvoid baudUSART ( unsigned char baudconfig);\n\n# 87 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\xlcd.h\"\nvoid OpenXLCD( unsigned char);\n\n# 92\nvoid SetCGRamAddr( unsigned char);\n\n# 97\nvoid SetDDRamAddr( unsigned char);\n\n# 102\nunsigned char BusyXLCD(void);\n\n# 107\nunsigned char ReadAddrXLCD(void);\n\n# 112\nchar ReadDataXLCD(void);\n\n# 117\nvoid WriteCmdXLCD( unsigned char);\n\n# 122\nvoid WriteDataXLCD( char);\n\n# 132\nvoid putsXLCD( char *);\n\n# 137\nvoid putrsXLCD(const char *);\n\n\nextern void DelayFor18TCY(void);\nextern void DelayPORXLCD(void);\nextern void DelayXLCD(void);\n\n# 18 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18.h\"\n__attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *);\n\n\n# 143\n#pragma intrinsic(_delay)\nextern void _delay(unsigned long);\n#pragma intrinsic(_delaywdt)\nextern void _delaywdt(unsigned long);\n#pragma intrinsic(_delay3)\nextern void _delay3(unsigned char);\n\n# 13 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stdint.h\"\ntypedef signed char int8_t;\n\n# 20\ntypedef signed int int16_t;\n\n# 28\ntypedef signed short long int int24_t;\n\n# 36\ntypedef signed long int int32_t;\n\n# 43\ntypedef unsigned char uint8_t;\n\n# 49\ntypedef unsigned int uint16_t;\n\n# 56\ntypedef unsigned short long int uint24_t;\n\n# 63\ntypedef unsigned long int uint32_t;\n\n# 71\ntypedef signed char int_least8_t;\n\n# 78\ntypedef signed int int_least16_t;\n\n# 90\ntypedef signed short long int int_least24_t;\n\n# 98\ntypedef signed long int int_least32_t;\n\n# 105\ntypedef unsigned char uint_least8_t;\n\n# 111\ntypedef unsigned int uint_least16_t;\n\n# 121\ntypedef unsigned short long int uint_least24_t;\n\n# 128\ntypedef unsigned long int uint_least32_t;\n\n# 137\ntypedef signed char int_fast8_t;\n\n# 144\ntypedef signed int int_fast16_t;\n\n# 156\ntypedef signed short long int int_fast24_t;\n\n# 164\ntypedef signed long int int_fast32_t;\n\n# 171\ntypedef unsigned char uint_fast8_t;\n\n# 177\ntypedef unsigned int uint_fast16_t;\n\n# 187\ntypedef unsigned short long int uint_fast24_t;\n\n# 194\ntypedef unsigned long int uint_fast32_t;\n\n# 200\ntypedef int32_t intmax_t;\n\n\n\n\ntypedef uint32_t uintmax_t;\n\n\n\n\ntypedef int16_t intptr_t;\n\n\n\n\ntypedef uint16_t uintptr_t;\n\n# 50 \"../Tick/Tick.h\"\nvoid tick_init();\n\n# 62\nuint32_t tick_get();\n\n# 71\nvoid tick_update();\n\n# 40 \"../PID.h\"\nenum enCtrlDirs {\nE_PID_DIRECT,\nE_PID_REVERSE,\n};\n\nstruct pid_controller {\n\nfloat * input;\nfloat * output;\nfloat * setpoint;\n\nfloat Kp;\nfloat Ki;\nfloat Kd;\n\nfloat omin;\nfloat omax;\n\nfloat iterm;\nfloat lastin;\n\nuint32_t lasttime;\nuint32_t sampletime;\n\nuint8_t automode;\nenum enCtrlDirs direction;\n};\n\ntypedef struct pid_controller * pid_t;\n\n# 90\npid_t pid_create(pid_t pid, float* in, float* out, float* set, float kp, float ki, float kd);\n\n# 103\nuint8_t pid_compute(pid_t pid);\n\n# 116\nvoid pid_tune(pid_t pid, float kp, float ki, float kd);\n\n# 126\nvoid pid_sample(pid_t pid, uint32_t time);\n\n# 135\nvoid pid_limits(pid_t pid, float min, float max);\n\n# 146\nvoid pid_auto(pid_t pid);\n\nvoid pid_manual(pid_t pid);\n\n# 161\nvoid pid_direction(pid_t pid, enum enCtrlDirs direction);\n\n# 18 \"../SPI/SPIPort.h\"\ntypedef char xSPIHandle;\n\n# 58 \"../SPI/SPI.h\"\nenum enSPIModules {\nE_SPI_1 = 1,\nE_SPI_2 = 2,\nE_SPI_3 = 3,\nE_SPI_4 = 4,\n};\n\n# 86\nxSPIHandle spi_init(enum enSPIModules eModule);\n\n# 99\nuint8_t spi_control(xSPIHandle spid, uint32_t ctrl, uint32_t arg);\n\n# 111\nuint8_t spi_open(xSPIHandle spid);\n\n# 122\nuint8_t spi_close(xSPIHandle spid);\n\n# 131\nvoid spi_write(xSPIHandle spid, uint8_t data);\n\n# 140\nuint8_t spi_read(xSPIHandle spid);\n\n# 149\nvoid spi_write_array(xSPIHandle spid, const uint8_t * txbuf, uint16_t len);\n\n# 158\nvoid spi_read_array(xSPIHandle spid, uint8_t * rxbuf, uint16_t len);\n\n# 168\nuint8_t spi_trans(xSPIHandle spid, uint8_t data);\n\n# 178\nvoid spi_trans_array(xSPIHandle spid, uint8_t * txbuf, uint8_t * rxbuf, uint16_t len);\n\n# 59 \"io.h\"\nvoid io_mode(uint8_t pin, uint8_t mode);\n\n# 70\nvoid io_write(uint8_t pin, uint8_t value);\n\n# 83\nuint8_t io_read( uint8_t pin );\n\n# 37 \"tc.h\"\nstruct thermocuple_struct\n{\nxSPIHandle spi;\nuint8_t cspin;\n};\n\ntypedef struct thermocuple_struct tc_t;\n\n# 58\ntc_t tc_init(xSPIHandle spid, uint8_t cspin);\n\n# 70\nint16_t tc_read(tc_t * tcpl);\n\n# 82\nfloat tc_read_float(tc_t * tcpl);\n\n\n# 6 \"main.c\"\n#pragma config PLLDIV = 1\n#pragma config CPUDIV = OSC1_PLL2\n#pragma config USBDIV = 1\n\n\n#pragma config FOSC = EC_EC\n#pragma config FCMEN = OFF\n#pragma config IESO = OFF\n\n\n#pragma config PWRT = OFF\n#pragma config BOR = OFF\n#pragma config BORV = 3\n#pragma config VREGEN = ON\n\n\n#pragma config WDT = OFF\n#pragma config WDTPS = 32768\n\n\n#pragma config CCP2MX = OFF\n#pragma config PBADEN = OFF\n#pragma config LPT1OSC = OFF\n#pragma config MCLRE = ON\n\n\n#pragma config STVREN = ON\n#pragma config LVP = OFF\n#pragma config XINST = OFF\n\n\n#pragma config CP0 = OFF\n#pragma config CP1 = OFF\n#pragma config CP2 = OFF\n#pragma config CP3 = OFF\n\n\n#pragma config CPB = OFF\n#pragma config CPD = OFF\n\n\n#pragma config WRT0 = OFF\n#pragma config WRT1 = OFF\n#pragma config WRT2 = OFF\n#pragma config WRT3 = OFF\n\n\n#pragma config WRTC = OFF\n#pragma config WRTB = OFF\n#pragma config WRTD = OFF\n\n\n#pragma config EBTR0 = OFF\n#pragma config EBTR1 = OFF\n#pragma config EBTR2 = OFF\n#pragma config EBTR3 = OFF\n\n\n#pragma config EBTRB = OFF\n\n\n\n\nuint32_t lastrun = 0;\n\nfloat in, out, set = 100;\n\nstruct pid_controller pidctrl;\npid_t pid = 0;\n\nxSPIHandle spi;\n\ntc_t sensor1;\ntc_t sensor2;\n\nint main(int argc, char** argv)\n{\nspi = spi_init(E_SPI_1);\nspi_control(spi, 0x00000001 | 0x00000010, 7);\n\n\nsensor1 = tc_init(spi, 10);\nsensor2 = tc_init(spi, 11);\n\n\npid = pid_create(&pidctrl, &in, &out, &set, 5, 1, 3);\n\npid_limits(pid, 0, 255);\n\npid_auto(pid);\n\nfor (;;) {\nif (tick_get() - lastrun >= ((unsigned long long)((12000000 + 128ull)/256ull))) {\nlastrun = tick_get();\n\nin = tc_read_float(&sensor1);\n\npid_compute(pid);\n\n\n}\n}\n\n}\n\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/tc.p1",
    "content": "Version 3.2 HI-TECH Software Intermediate Code\n[s S518 `uc 1 `uc 1 ]\n[n S518 thermocuple_struct spi cspin ]\n\"70 io.h\n[v _io_write `(v ~T0 @X0 0 ef2`uc`uc ]\n\"59\n[v _io_mode `(v ~T0 @X0 0 ef2`uc`uc ]\n\"99 ../SPI/SPI.h\n[v _spi_control `(uc ~T0 @X0 0 ef3`uc`ul`ul ]\n\"111\n[v _spi_open `(uc ~T0 @X0 0 ef1`uc ]\n\"158\n[v _spi_read_array `(v ~T0 @X0 0 ef3`uc`*uc`ui ]\n[; ;stdint.h: 13: typedef signed char int8_t;\n[; ;stdint.h: 20: typedef signed int int16_t;\n[; ;stdint.h: 28: typedef signed short long int int24_t;\n[; ;stdint.h: 36: typedef signed long int int32_t;\n[; ;stdint.h: 43: typedef unsigned char uint8_t;\n[; ;stdint.h: 49: typedef unsigned int uint16_t;\n[; ;stdint.h: 56: typedef unsigned short long int uint24_t;\n[; ;stdint.h: 63: typedef unsigned long int uint32_t;\n[; ;stdint.h: 71: typedef signed char int_least8_t;\n[; ;stdint.h: 78: typedef signed int int_least16_t;\n[; ;stdint.h: 90: typedef signed short long int int_least24_t;\n[; ;stdint.h: 98: typedef signed long int int_least32_t;\n[; ;stdint.h: 105: typedef unsigned char uint_least8_t;\n[; ;stdint.h: 111: typedef unsigned int uint_least16_t;\n[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;\n[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;\n[; ;stdint.h: 137: typedef signed char int_fast8_t;\n[; ;stdint.h: 144: typedef signed int int_fast16_t;\n[; ;stdint.h: 156: typedef signed short long int int_fast24_t;\n[; ;stdint.h: 164: typedef signed long int int_fast32_t;\n[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;\n[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;\n[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;\n[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;\n[; ;stdint.h: 200: typedef int32_t intmax_t;\n[; ;stdint.h: 205: typedef uint32_t uintmax_t;\n[; ;stdint.h: 210: typedef int16_t intptr_t;\n[; ;stdint.h: 215: typedef uint16_t uintptr_t;\n[; ;pic18f2550.h: 44: extern volatile unsigned short UFRM @ 0xF66;\n\"46 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[; ;pic18f2550.h: 46: asm(\"UFRM equ 0F66h\");\n[; <\" UFRM equ 0F66h ;# \">\n[; ;pic18f2550.h: 50: extern volatile unsigned char UFRML @ 0xF66;\n\"52\n[; ;pic18f2550.h: 52: asm(\"UFRML equ 0F66h\");\n[; <\" UFRML equ 0F66h ;# \">\n[; ;pic18f2550.h: 55: typedef union {\n[; ;pic18f2550.h: 56: struct {\n[; ;pic18f2550.h: 57: unsigned FRM :8;\n[; ;pic18f2550.h: 58: };\n[; ;pic18f2550.h: 59: struct {\n[; ;pic18f2550.h: 60: unsigned FRM0 :1;\n[; ;pic18f2550.h: 61: unsigned FRM1 :1;\n[; ;pic18f2550.h: 62: unsigned FRM2 :1;\n[; ;pic18f2550.h: 63: unsigned FRM3 :1;\n[; ;pic18f2550.h: 64: unsigned FRM4 :1;\n[; ;pic18f2550.h: 65: unsigned FRM5 :1;\n[; ;pic18f2550.h: 66: unsigned FRM6 :1;\n[; ;pic18f2550.h: 67: unsigned FRM7 :1;\n[; ;pic18f2550.h: 68: };\n[; ;pic18f2550.h: 69: struct {\n[; ;pic18f2550.h: 70: unsigned FRML :8;\n[; ;pic18f2550.h: 71: };\n[; ;pic18f2550.h: 72: } UFRMLbits_t;\n[; ;pic18f2550.h: 73: extern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n[; ;pic18f2550.h: 127: extern volatile unsigned char UFRMH @ 0xF67;\n\"129\n[; ;pic18f2550.h: 129: asm(\"UFRMH equ 0F67h\");\n[; <\" UFRMH equ 0F67h ;# \">\n[; ;pic18f2550.h: 132: typedef union {\n[; ;pic18f2550.h: 133: struct {\n[; ;pic18f2550.h: 134: unsigned FRM :3;\n[; ;pic18f2550.h: 135: };\n[; ;pic18f2550.h: 136: struct {\n[; ;pic18f2550.h: 137: unsigned FRM8 :1;\n[; ;pic18f2550.h: 138: unsigned FRM9 :1;\n[; ;pic18f2550.h: 139: unsigned FRM10 :1;\n[; ;pic18f2550.h: 140: };\n[; ;pic18f2550.h: 141: } UFRMHbits_t;\n[; ;pic18f2550.h: 142: extern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n[; ;pic18f2550.h: 166: extern volatile unsigned char UIR @ 0xF68;\n\"168\n[; ;pic18f2550.h: 168: asm(\"UIR equ 0F68h\");\n[; <\" UIR equ 0F68h ;# \">\n[; ;pic18f2550.h: 171: typedef union {\n[; ;pic18f2550.h: 172: struct {\n[; ;pic18f2550.h: 173: unsigned URSTIF :1;\n[; ;pic18f2550.h: 174: unsigned UERRIF :1;\n[; ;pic18f2550.h: 175: unsigned ACTVIF :1;\n[; ;pic18f2550.h: 176: unsigned TRNIF :1;\n[; ;pic18f2550.h: 177: unsigned IDLEIF :1;\n[; ;pic18f2550.h: 178: unsigned STALLIF :1;\n[; ;pic18f2550.h: 179: unsigned SOFIF :1;\n[; ;pic18f2550.h: 180: };\n[; ;pic18f2550.h: 181: } UIRbits_t;\n[; ;pic18f2550.h: 182: extern volatile UIRbits_t UIRbits @ 0xF68;\n[; ;pic18f2550.h: 221: extern volatile unsigned char UIE @ 0xF69;\n\"223\n[; ;pic18f2550.h: 223: asm(\"UIE equ 0F69h\");\n[; <\" UIE equ 0F69h ;# \">\n[; ;pic18f2550.h: 226: typedef union {\n[; ;pic18f2550.h: 227: struct {\n[; ;pic18f2550.h: 228: unsigned URSTIE :1;\n[; ;pic18f2550.h: 229: unsigned UERRIE :1;\n[; ;pic18f2550.h: 230: unsigned ACTVIE :1;\n[; ;pic18f2550.h: 231: unsigned TRNIE :1;\n[; ;pic18f2550.h: 232: unsigned IDLEIE :1;\n[; ;pic18f2550.h: 233: unsigned STALLIE :1;\n[; ;pic18f2550.h: 234: unsigned SOFIE :1;\n[; ;pic18f2550.h: 235: };\n[; ;pic18f2550.h: 236: } UIEbits_t;\n[; ;pic18f2550.h: 237: extern volatile UIEbits_t UIEbits @ 0xF69;\n[; ;pic18f2550.h: 276: extern volatile unsigned char UEIR @ 0xF6A;\n\"278\n[; ;pic18f2550.h: 278: asm(\"UEIR equ 0F6Ah\");\n[; <\" UEIR equ 0F6Ah ;# \">\n[; ;pic18f2550.h: 281: typedef union {\n[; ;pic18f2550.h: 282: struct {\n[; ;pic18f2550.h: 283: unsigned PIDEF :1;\n[; ;pic18f2550.h: 284: unsigned CRC5EF :1;\n[; ;pic18f2550.h: 285: unsigned CRC16EF :1;\n[; ;pic18f2550.h: 286: unsigned DFN8EF :1;\n[; ;pic18f2550.h: 287: unsigned BTOEF :1;\n[; ;pic18f2550.h: 288: unsigned :2;\n[; ;pic18f2550.h: 289: unsigned BTSEF :1;\n[; ;pic18f2550.h: 290: };\n[; ;pic18f2550.h: 291: } UEIRbits_t;\n[; ;pic18f2550.h: 292: extern volatile UEIRbits_t UEIRbits @ 0xF6A;\n[; ;pic18f2550.h: 326: extern volatile unsigned char UEIE @ 0xF6B;\n\"328\n[; ;pic18f2550.h: 328: asm(\"UEIE equ 0F6Bh\");\n[; <\" UEIE equ 0F6Bh ;# \">\n[; ;pic18f2550.h: 331: typedef union {\n[; ;pic18f2550.h: 332: struct {\n[; ;pic18f2550.h: 333: unsigned PIDEE :1;\n[; ;pic18f2550.h: 334: unsigned CRC5EE :1;\n[; ;pic18f2550.h: 335: unsigned CRC16EE :1;\n[; ;pic18f2550.h: 336: unsigned DFN8EE :1;\n[; ;pic18f2550.h: 337: unsigned BTOEE :1;\n[; ;pic18f2550.h: 338: unsigned :2;\n[; ;pic18f2550.h: 339: unsigned BTSEE :1;\n[; ;pic18f2550.h: 340: };\n[; ;pic18f2550.h: 341: } UEIEbits_t;\n[; ;pic18f2550.h: 342: extern volatile UEIEbits_t UEIEbits @ 0xF6B;\n[; ;pic18f2550.h: 376: extern volatile unsigned char USTAT @ 0xF6C;\n\"378\n[; ;pic18f2550.h: 378: asm(\"USTAT equ 0F6Ch\");\n[; <\" USTAT equ 0F6Ch ;# \">\n[; ;pic18f2550.h: 381: typedef union {\n[; ;pic18f2550.h: 382: struct {\n[; ;pic18f2550.h: 383: unsigned :1;\n[; ;pic18f2550.h: 384: unsigned PPBI :1;\n[; ;pic18f2550.h: 385: unsigned DIR :1;\n[; ;pic18f2550.h: 386: unsigned ENDP :4;\n[; ;pic18f2550.h: 387: };\n[; ;pic18f2550.h: 388: struct {\n[; ;pic18f2550.h: 389: unsigned :3;\n[; ;pic18f2550.h: 390: unsigned ENDP0 :1;\n[; ;pic18f2550.h: 391: unsigned ENDP1 :1;\n[; ;pic18f2550.h: 392: unsigned ENDP2 :1;\n[; ;pic18f2550.h: 393: unsigned ENDP3 :1;\n[; ;pic18f2550.h: 394: };\n[; ;pic18f2550.h: 395: } USTATbits_t;\n[; ;pic18f2550.h: 396: extern volatile USTATbits_t USTATbits @ 0xF6C;\n[; ;pic18f2550.h: 435: extern volatile unsigned char UCON @ 0xF6D;\n\"437\n[; ;pic18f2550.h: 437: asm(\"UCON equ 0F6Dh\");\n[; <\" UCON equ 0F6Dh ;# \">\n[; ;pic18f2550.h: 440: typedef union {\n[; ;pic18f2550.h: 441: struct {\n[; ;pic18f2550.h: 442: unsigned :1;\n[; ;pic18f2550.h: 443: unsigned SUSPND :1;\n[; ;pic18f2550.h: 444: unsigned RESUME :1;\n[; ;pic18f2550.h: 445: unsigned USBEN :1;\n[; ;pic18f2550.h: 446: unsigned PKTDIS :1;\n[; ;pic18f2550.h: 447: unsigned SE0 :1;\n[; ;pic18f2550.h: 448: unsigned PPBRST :1;\n[; ;pic18f2550.h: 449: };\n[; ;pic18f2550.h: 450: } UCONbits_t;\n[; ;pic18f2550.h: 451: extern volatile UCONbits_t UCONbits @ 0xF6D;\n[; ;pic18f2550.h: 485: extern volatile unsigned char UADDR @ 0xF6E;\n\"487\n[; ;pic18f2550.h: 487: asm(\"UADDR equ 0F6Eh\");\n[; <\" UADDR equ 0F6Eh ;# \">\n[; ;pic18f2550.h: 490: typedef union {\n[; ;pic18f2550.h: 491: struct {\n[; ;pic18f2550.h: 492: unsigned ADDR :7;\n[; ;pic18f2550.h: 493: };\n[; ;pic18f2550.h: 494: struct {\n[; ;pic18f2550.h: 495: unsigned ADDR0 :1;\n[; ;pic18f2550.h: 496: unsigned ADDR1 :1;\n[; ;pic18f2550.h: 497: unsigned ADDR2 :1;\n[; ;pic18f2550.h: 498: unsigned ADDR3 :1;\n[; ;pic18f2550.h: 499: unsigned ADDR4 :1;\n[; ;pic18f2550.h: 500: unsigned ADDR5 :1;\n[; ;pic18f2550.h: 501: unsigned ADDR6 :1;\n[; ;pic18f2550.h: 502: };\n[; ;pic18f2550.h: 503: } UADDRbits_t;\n[; ;pic18f2550.h: 504: extern volatile UADDRbits_t UADDRbits @ 0xF6E;\n[; ;pic18f2550.h: 548: extern volatile unsigned char UCFG @ 0xF6F;\n\"550\n[; ;pic18f2550.h: 550: asm(\"UCFG equ 0F6Fh\");\n[; <\" UCFG equ 0F6Fh ;# \">\n[; ;pic18f2550.h: 553: typedef union {\n[; ;pic18f2550.h: 554: struct {\n[; ;pic18f2550.h: 555: unsigned PPB :2;\n[; ;pic18f2550.h: 556: unsigned FSEN :1;\n[; ;pic18f2550.h: 557: unsigned UTRDIS :1;\n[; ;pic18f2550.h: 558: unsigned UPUEN :1;\n[; ;pic18f2550.h: 559: unsigned :1;\n[; ;pic18f2550.h: 560: unsigned UOEMON :1;\n[; ;pic18f2550.h: 561: unsigned UTEYE :1;\n[; ;pic18f2550.h: 562: };\n[; ;pic18f2550.h: 563: struct {\n[; ;pic18f2550.h: 564: unsigned PPB0 :1;\n[; ;pic18f2550.h: 565: unsigned PPB1 :1;\n[; ;pic18f2550.h: 566: };\n[; ;pic18f2550.h: 567: struct {\n[; ;pic18f2550.h: 568: unsigned UPP0 :1;\n[; ;pic18f2550.h: 569: };\n[; ;pic18f2550.h: 570: struct {\n[; ;pic18f2550.h: 571: unsigned :1;\n[; ;pic18f2550.h: 572: unsigned UPP1 :1;\n[; ;pic18f2550.h: 573: };\n[; ;pic18f2550.h: 574: } UCFGbits_t;\n[; ;pic18f2550.h: 575: extern volatile UCFGbits_t UCFGbits @ 0xF6F;\n[; ;pic18f2550.h: 629: extern volatile unsigned char UEP0 @ 0xF70;\n\"631\n[; ;pic18f2550.h: 631: asm(\"UEP0 equ 0F70h\");\n[; <\" UEP0 equ 0F70h ;# \">\n[; ;pic18f2550.h: 634: typedef union {\n[; ;pic18f2550.h: 635: struct {\n[; ;pic18f2550.h: 636: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 637: unsigned EPINEN :1;\n[; ;pic18f2550.h: 638: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 639: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 640: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 641: };\n[; ;pic18f2550.h: 642: struct {\n[; ;pic18f2550.h: 643: unsigned :3;\n[; ;pic18f2550.h: 644: unsigned EP0CONDIS :1;\n[; ;pic18f2550.h: 645: };\n[; ;pic18f2550.h: 646: struct {\n[; ;pic18f2550.h: 647: unsigned :4;\n[; ;pic18f2550.h: 648: unsigned EP0HSHK :1;\n[; ;pic18f2550.h: 649: };\n[; ;pic18f2550.h: 650: struct {\n[; ;pic18f2550.h: 651: unsigned :1;\n[; ;pic18f2550.h: 652: unsigned EP0INEN :1;\n[; ;pic18f2550.h: 653: };\n[; ;pic18f2550.h: 654: struct {\n[; ;pic18f2550.h: 655: unsigned :2;\n[; ;pic18f2550.h: 656: unsigned EP0OUTEN :1;\n[; ;pic18f2550.h: 657: };\n[; ;pic18f2550.h: 658: struct {\n[; ;pic18f2550.h: 659: unsigned EP0STALL :1;\n[; ;pic18f2550.h: 660: };\n[; ;pic18f2550.h: 661: struct {\n[; ;pic18f2550.h: 662: unsigned :3;\n[; ;pic18f2550.h: 663: unsigned EPCONDIS0 :1;\n[; ;pic18f2550.h: 664: };\n[; ;pic18f2550.h: 665: struct {\n[; ;pic18f2550.h: 666: unsigned :4;\n[; ;pic18f2550.h: 667: unsigned EPHSHK0 :1;\n[; ;pic18f2550.h: 668: };\n[; ;pic18f2550.h: 669: struct {\n[; ;pic18f2550.h: 670: unsigned :1;\n[; ;pic18f2550.h: 671: unsigned EPINEN0 :1;\n[; ;pic18f2550.h: 672: };\n[; ;pic18f2550.h: 673: struct {\n[; ;pic18f2550.h: 674: unsigned :2;\n[; ;pic18f2550.h: 675: unsigned EPOUTEN0 :1;\n[; ;pic18f2550.h: 676: };\n[; ;pic18f2550.h: 677: struct {\n[; ;pic18f2550.h: 678: unsigned EPSTALL0 :1;\n[; ;pic18f2550.h: 679: };\n[; ;pic18f2550.h: 680: } UEP0bits_t;\n[; ;pic18f2550.h: 681: extern volatile UEP0bits_t UEP0bits @ 0xF70;\n[; ;pic18f2550.h: 760: extern volatile unsigned char UEP1 @ 0xF71;\n\"762\n[; ;pic18f2550.h: 762: asm(\"UEP1 equ 0F71h\");\n[; <\" UEP1 equ 0F71h ;# \">\n[; ;pic18f2550.h: 765: typedef union {\n[; ;pic18f2550.h: 766: struct {\n[; ;pic18f2550.h: 767: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 768: unsigned EPINEN :1;\n[; ;pic18f2550.h: 769: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 770: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 771: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 772: };\n[; ;pic18f2550.h: 773: struct {\n[; ;pic18f2550.h: 774: unsigned :3;\n[; ;pic18f2550.h: 775: unsigned EP1CONDIS :1;\n[; ;pic18f2550.h: 776: };\n[; ;pic18f2550.h: 777: struct {\n[; ;pic18f2550.h: 778: unsigned :4;\n[; ;pic18f2550.h: 779: unsigned EP1HSHK :1;\n[; ;pic18f2550.h: 780: };\n[; ;pic18f2550.h: 781: struct {\n[; ;pic18f2550.h: 782: unsigned :1;\n[; ;pic18f2550.h: 783: unsigned EP1INEN :1;\n[; ;pic18f2550.h: 784: };\n[; ;pic18f2550.h: 785: struct {\n[; ;pic18f2550.h: 786: unsigned :2;\n[; ;pic18f2550.h: 787: unsigned EP1OUTEN :1;\n[; ;pic18f2550.h: 788: };\n[; ;pic18f2550.h: 789: struct {\n[; ;pic18f2550.h: 790: unsigned EP1STALL :1;\n[; ;pic18f2550.h: 791: };\n[; ;pic18f2550.h: 792: struct {\n[; ;pic18f2550.h: 793: unsigned :3;\n[; ;pic18f2550.h: 794: unsigned EPCONDIS1 :1;\n[; ;pic18f2550.h: 795: };\n[; ;pic18f2550.h: 796: struct {\n[; ;pic18f2550.h: 797: unsigned :4;\n[; ;pic18f2550.h: 798: unsigned EPHSHK1 :1;\n[; ;pic18f2550.h: 799: };\n[; ;pic18f2550.h: 800: struct {\n[; ;pic18f2550.h: 801: unsigned :1;\n[; ;pic18f2550.h: 802: unsigned EPINEN1 :1;\n[; ;pic18f2550.h: 803: };\n[; ;pic18f2550.h: 804: struct {\n[; ;pic18f2550.h: 805: unsigned :2;\n[; ;pic18f2550.h: 806: unsigned EPOUTEN1 :1;\n[; ;pic18f2550.h: 807: };\n[; ;pic18f2550.h: 808: struct {\n[; ;pic18f2550.h: 809: unsigned EPSTALL1 :1;\n[; ;pic18f2550.h: 810: };\n[; ;pic18f2550.h: 811: } UEP1bits_t;\n[; ;pic18f2550.h: 812: extern volatile UEP1bits_t UEP1bits @ 0xF71;\n[; ;pic18f2550.h: 891: extern volatile unsigned char UEP2 @ 0xF72;\n\"893\n[; ;pic18f2550.h: 893: asm(\"UEP2 equ 0F72h\");\n[; <\" UEP2 equ 0F72h ;# \">\n[; ;pic18f2550.h: 896: typedef union {\n[; ;pic18f2550.h: 897: struct {\n[; ;pic18f2550.h: 898: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 899: unsigned EPINEN :1;\n[; ;pic18f2550.h: 900: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 901: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 902: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 903: };\n[; ;pic18f2550.h: 904: struct {\n[; ;pic18f2550.h: 905: unsigned :3;\n[; ;pic18f2550.h: 906: unsigned EP2CONDIS :1;\n[; ;pic18f2550.h: 907: };\n[; ;pic18f2550.h: 908: struct {\n[; ;pic18f2550.h: 909: unsigned :4;\n[; ;pic18f2550.h: 910: unsigned EP2HSHK :1;\n[; ;pic18f2550.h: 911: };\n[; ;pic18f2550.h: 912: struct {\n[; ;pic18f2550.h: 913: unsigned :1;\n[; ;pic18f2550.h: 914: unsigned EP2INEN :1;\n[; ;pic18f2550.h: 915: };\n[; ;pic18f2550.h: 916: struct {\n[; ;pic18f2550.h: 917: unsigned :2;\n[; ;pic18f2550.h: 918: unsigned EP2OUTEN :1;\n[; ;pic18f2550.h: 919: };\n[; ;pic18f2550.h: 920: struct {\n[; ;pic18f2550.h: 921: unsigned EP2STALL :1;\n[; ;pic18f2550.h: 922: };\n[; ;pic18f2550.h: 923: struct {\n[; ;pic18f2550.h: 924: unsigned :3;\n[; ;pic18f2550.h: 925: unsigned EPCONDIS2 :1;\n[; ;pic18f2550.h: 926: };\n[; ;pic18f2550.h: 927: struct {\n[; ;pic18f2550.h: 928: unsigned :4;\n[; ;pic18f2550.h: 929: unsigned EPHSHK2 :1;\n[; ;pic18f2550.h: 930: };\n[; ;pic18f2550.h: 931: struct {\n[; ;pic18f2550.h: 932: unsigned :1;\n[; ;pic18f2550.h: 933: unsigned EPINEN2 :1;\n[; ;pic18f2550.h: 934: };\n[; ;pic18f2550.h: 935: struct {\n[; ;pic18f2550.h: 936: unsigned :2;\n[; ;pic18f2550.h: 937: unsigned EPOUTEN2 :1;\n[; ;pic18f2550.h: 938: };\n[; ;pic18f2550.h: 939: struct {\n[; ;pic18f2550.h: 940: unsigned EPSTALL2 :1;\n[; ;pic18f2550.h: 941: };\n[; ;pic18f2550.h: 942: } UEP2bits_t;\n[; ;pic18f2550.h: 943: extern volatile UEP2bits_t UEP2bits @ 0xF72;\n[; ;pic18f2550.h: 1022: extern volatile unsigned char UEP3 @ 0xF73;\n\"1024\n[; ;pic18f2550.h: 1024: asm(\"UEP3 equ 0F73h\");\n[; <\" UEP3 equ 0F73h ;# \">\n[; ;pic18f2550.h: 1027: typedef union {\n[; ;pic18f2550.h: 1028: struct {\n[; ;pic18f2550.h: 1029: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1030: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1031: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1032: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1033: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1034: };\n[; ;pic18f2550.h: 1035: struct {\n[; ;pic18f2550.h: 1036: unsigned :3;\n[; ;pic18f2550.h: 1037: unsigned EP3CONDIS :1;\n[; ;pic18f2550.h: 1038: };\n[; ;pic18f2550.h: 1039: struct {\n[; ;pic18f2550.h: 1040: unsigned :4;\n[; ;pic18f2550.h: 1041: unsigned EP3HSHK :1;\n[; ;pic18f2550.h: 1042: };\n[; ;pic18f2550.h: 1043: struct {\n[; ;pic18f2550.h: 1044: unsigned :1;\n[; ;pic18f2550.h: 1045: unsigned EP3INEN :1;\n[; ;pic18f2550.h: 1046: };\n[; ;pic18f2550.h: 1047: struct {\n[; ;pic18f2550.h: 1048: unsigned :2;\n[; ;pic18f2550.h: 1049: unsigned EP3OUTEN :1;\n[; ;pic18f2550.h: 1050: };\n[; ;pic18f2550.h: 1051: struct {\n[; ;pic18f2550.h: 1052: unsigned EP3STALL :1;\n[; ;pic18f2550.h: 1053: };\n[; ;pic18f2550.h: 1054: struct {\n[; ;pic18f2550.h: 1055: unsigned :3;\n[; ;pic18f2550.h: 1056: unsigned EPCONDIS3 :1;\n[; ;pic18f2550.h: 1057: };\n[; ;pic18f2550.h: 1058: struct {\n[; ;pic18f2550.h: 1059: unsigned :4;\n[; ;pic18f2550.h: 1060: unsigned EPHSHK3 :1;\n[; ;pic18f2550.h: 1061: };\n[; ;pic18f2550.h: 1062: struct {\n[; ;pic18f2550.h: 1063: unsigned :1;\n[; ;pic18f2550.h: 1064: unsigned EPINEN3 :1;\n[; ;pic18f2550.h: 1065: };\n[; ;pic18f2550.h: 1066: struct {\n[; ;pic18f2550.h: 1067: unsigned :2;\n[; ;pic18f2550.h: 1068: unsigned EPOUTEN3 :1;\n[; ;pic18f2550.h: 1069: };\n[; ;pic18f2550.h: 1070: struct {\n[; ;pic18f2550.h: 1071: unsigned EPSTALL3 :1;\n[; ;pic18f2550.h: 1072: };\n[; ;pic18f2550.h: 1073: } UEP3bits_t;\n[; ;pic18f2550.h: 1074: extern volatile UEP3bits_t UEP3bits @ 0xF73;\n[; ;pic18f2550.h: 1153: extern volatile unsigned char UEP4 @ 0xF74;\n\"1155\n[; ;pic18f2550.h: 1155: asm(\"UEP4 equ 0F74h\");\n[; <\" UEP4 equ 0F74h ;# \">\n[; ;pic18f2550.h: 1158: typedef union {\n[; ;pic18f2550.h: 1159: struct {\n[; ;pic18f2550.h: 1160: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1161: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1162: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1163: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1164: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1165: };\n[; ;pic18f2550.h: 1166: struct {\n[; ;pic18f2550.h: 1167: unsigned :3;\n[; ;pic18f2550.h: 1168: unsigned EP4CONDIS :1;\n[; ;pic18f2550.h: 1169: };\n[; ;pic18f2550.h: 1170: struct {\n[; ;pic18f2550.h: 1171: unsigned :4;\n[; ;pic18f2550.h: 1172: unsigned EP4HSHK :1;\n[; ;pic18f2550.h: 1173: };\n[; ;pic18f2550.h: 1174: struct {\n[; ;pic18f2550.h: 1175: unsigned :1;\n[; ;pic18f2550.h: 1176: unsigned EP4INEN :1;\n[; ;pic18f2550.h: 1177: };\n[; ;pic18f2550.h: 1178: struct {\n[; ;pic18f2550.h: 1179: unsigned :2;\n[; ;pic18f2550.h: 1180: unsigned EP4OUTEN :1;\n[; ;pic18f2550.h: 1181: };\n[; ;pic18f2550.h: 1182: struct {\n[; ;pic18f2550.h: 1183: unsigned EP4STALL :1;\n[; ;pic18f2550.h: 1184: };\n[; ;pic18f2550.h: 1185: struct {\n[; ;pic18f2550.h: 1186: unsigned :3;\n[; ;pic18f2550.h: 1187: unsigned EPCONDIS4 :1;\n[; ;pic18f2550.h: 1188: };\n[; ;pic18f2550.h: 1189: struct {\n[; ;pic18f2550.h: 1190: unsigned :4;\n[; ;pic18f2550.h: 1191: unsigned EPHSHK4 :1;\n[; ;pic18f2550.h: 1192: };\n[; ;pic18f2550.h: 1193: struct {\n[; ;pic18f2550.h: 1194: unsigned :1;\n[; ;pic18f2550.h: 1195: unsigned EPINEN4 :1;\n[; ;pic18f2550.h: 1196: };\n[; ;pic18f2550.h: 1197: struct {\n[; ;pic18f2550.h: 1198: unsigned :2;\n[; ;pic18f2550.h: 1199: unsigned EPOUTEN4 :1;\n[; ;pic18f2550.h: 1200: };\n[; ;pic18f2550.h: 1201: struct {\n[; ;pic18f2550.h: 1202: unsigned EPSTALL4 :1;\n[; ;pic18f2550.h: 1203: };\n[; ;pic18f2550.h: 1204: } UEP4bits_t;\n[; ;pic18f2550.h: 1205: extern volatile UEP4bits_t UEP4bits @ 0xF74;\n[; ;pic18f2550.h: 1284: extern volatile unsigned char UEP5 @ 0xF75;\n\"1286\n[; ;pic18f2550.h: 1286: asm(\"UEP5 equ 0F75h\");\n[; <\" UEP5 equ 0F75h ;# \">\n[; ;pic18f2550.h: 1289: typedef union {\n[; ;pic18f2550.h: 1290: struct {\n[; ;pic18f2550.h: 1291: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1292: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1293: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1294: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1295: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1296: };\n[; ;pic18f2550.h: 1297: struct {\n[; ;pic18f2550.h: 1298: unsigned :3;\n[; ;pic18f2550.h: 1299: unsigned EP5CONDIS :1;\n[; ;pic18f2550.h: 1300: };\n[; ;pic18f2550.h: 1301: struct {\n[; ;pic18f2550.h: 1302: unsigned :4;\n[; ;pic18f2550.h: 1303: unsigned EP5HSHK :1;\n[; ;pic18f2550.h: 1304: };\n[; ;pic18f2550.h: 1305: struct {\n[; ;pic18f2550.h: 1306: unsigned :1;\n[; ;pic18f2550.h: 1307: unsigned EP5INEN :1;\n[; ;pic18f2550.h: 1308: };\n[; ;pic18f2550.h: 1309: struct {\n[; ;pic18f2550.h: 1310: unsigned :2;\n[; ;pic18f2550.h: 1311: unsigned EP5OUTEN :1;\n[; ;pic18f2550.h: 1312: };\n[; ;pic18f2550.h: 1313: struct {\n[; ;pic18f2550.h: 1314: unsigned EP5STALL :1;\n[; ;pic18f2550.h: 1315: };\n[; ;pic18f2550.h: 1316: struct {\n[; ;pic18f2550.h: 1317: unsigned :3;\n[; ;pic18f2550.h: 1318: unsigned EPCONDIS5 :1;\n[; ;pic18f2550.h: 1319: };\n[; ;pic18f2550.h: 1320: struct {\n[; ;pic18f2550.h: 1321: unsigned :4;\n[; ;pic18f2550.h: 1322: unsigned EPHSHK5 :1;\n[; ;pic18f2550.h: 1323: };\n[; ;pic18f2550.h: 1324: struct {\n[; ;pic18f2550.h: 1325: unsigned :1;\n[; ;pic18f2550.h: 1326: unsigned EPINEN5 :1;\n[; ;pic18f2550.h: 1327: };\n[; ;pic18f2550.h: 1328: struct {\n[; ;pic18f2550.h: 1329: unsigned :2;\n[; ;pic18f2550.h: 1330: unsigned EPOUTEN5 :1;\n[; ;pic18f2550.h: 1331: };\n[; ;pic18f2550.h: 1332: struct {\n[; ;pic18f2550.h: 1333: unsigned EPSTALL5 :1;\n[; ;pic18f2550.h: 1334: };\n[; ;pic18f2550.h: 1335: } UEP5bits_t;\n[; ;pic18f2550.h: 1336: extern volatile UEP5bits_t UEP5bits @ 0xF75;\n[; ;pic18f2550.h: 1415: extern volatile unsigned char UEP6 @ 0xF76;\n\"1417\n[; ;pic18f2550.h: 1417: asm(\"UEP6 equ 0F76h\");\n[; <\" UEP6 equ 0F76h ;# \">\n[; ;pic18f2550.h: 1420: typedef union {\n[; ;pic18f2550.h: 1421: struct {\n[; ;pic18f2550.h: 1422: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1423: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1424: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1425: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1426: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1427: };\n[; ;pic18f2550.h: 1428: struct {\n[; ;pic18f2550.h: 1429: unsigned :3;\n[; ;pic18f2550.h: 1430: unsigned EP6CONDIS :1;\n[; ;pic18f2550.h: 1431: };\n[; ;pic18f2550.h: 1432: struct {\n[; ;pic18f2550.h: 1433: unsigned :4;\n[; ;pic18f2550.h: 1434: unsigned EP6HSHK :1;\n[; ;pic18f2550.h: 1435: };\n[; ;pic18f2550.h: 1436: struct {\n[; ;pic18f2550.h: 1437: unsigned :1;\n[; ;pic18f2550.h: 1438: unsigned EP6INEN :1;\n[; ;pic18f2550.h: 1439: };\n[; ;pic18f2550.h: 1440: struct {\n[; ;pic18f2550.h: 1441: unsigned :2;\n[; ;pic18f2550.h: 1442: unsigned EP6OUTEN :1;\n[; ;pic18f2550.h: 1443: };\n[; ;pic18f2550.h: 1444: struct {\n[; ;pic18f2550.h: 1445: unsigned EP6STALL :1;\n[; ;pic18f2550.h: 1446: };\n[; ;pic18f2550.h: 1447: struct {\n[; ;pic18f2550.h: 1448: unsigned :3;\n[; ;pic18f2550.h: 1449: unsigned EPCONDIS6 :1;\n[; ;pic18f2550.h: 1450: };\n[; ;pic18f2550.h: 1451: struct {\n[; ;pic18f2550.h: 1452: unsigned :4;\n[; ;pic18f2550.h: 1453: unsigned EPHSHK6 :1;\n[; ;pic18f2550.h: 1454: };\n[; ;pic18f2550.h: 1455: struct {\n[; ;pic18f2550.h: 1456: unsigned :1;\n[; ;pic18f2550.h: 1457: unsigned EPINEN6 :1;\n[; ;pic18f2550.h: 1458: };\n[; ;pic18f2550.h: 1459: struct {\n[; ;pic18f2550.h: 1460: unsigned :2;\n[; ;pic18f2550.h: 1461: unsigned EPOUTEN6 :1;\n[; ;pic18f2550.h: 1462: };\n[; ;pic18f2550.h: 1463: struct {\n[; ;pic18f2550.h: 1464: unsigned EPSTALL6 :1;\n[; ;pic18f2550.h: 1465: };\n[; ;pic18f2550.h: 1466: } UEP6bits_t;\n[; ;pic18f2550.h: 1467: extern volatile UEP6bits_t UEP6bits @ 0xF76;\n[; ;pic18f2550.h: 1546: extern volatile unsigned char UEP7 @ 0xF77;\n\"1548\n[; ;pic18f2550.h: 1548: asm(\"UEP7 equ 0F77h\");\n[; <\" UEP7 equ 0F77h ;# \">\n[; ;pic18f2550.h: 1551: typedef union {\n[; ;pic18f2550.h: 1552: struct {\n[; ;pic18f2550.h: 1553: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1554: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1555: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1556: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1557: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1558: };\n[; ;pic18f2550.h: 1559: struct {\n[; ;pic18f2550.h: 1560: unsigned :3;\n[; ;pic18f2550.h: 1561: unsigned EP7CONDIS :1;\n[; ;pic18f2550.h: 1562: };\n[; ;pic18f2550.h: 1563: struct {\n[; ;pic18f2550.h: 1564: unsigned :4;\n[; ;pic18f2550.h: 1565: unsigned EP7HSHK :1;\n[; ;pic18f2550.h: 1566: };\n[; ;pic18f2550.h: 1567: struct {\n[; ;pic18f2550.h: 1568: unsigned :1;\n[; ;pic18f2550.h: 1569: unsigned EP7INEN :1;\n[; ;pic18f2550.h: 1570: };\n[; ;pic18f2550.h: 1571: struct {\n[; ;pic18f2550.h: 1572: unsigned :2;\n[; ;pic18f2550.h: 1573: unsigned EP7OUTEN :1;\n[; ;pic18f2550.h: 1574: };\n[; ;pic18f2550.h: 1575: struct {\n[; ;pic18f2550.h: 1576: unsigned EP7STALL :1;\n[; ;pic18f2550.h: 1577: };\n[; ;pic18f2550.h: 1578: struct {\n[; ;pic18f2550.h: 1579: unsigned :3;\n[; ;pic18f2550.h: 1580: unsigned EPCONDIS7 :1;\n[; ;pic18f2550.h: 1581: };\n[; ;pic18f2550.h: 1582: struct {\n[; ;pic18f2550.h: 1583: unsigned :4;\n[; ;pic18f2550.h: 1584: unsigned EPHSHK7 :1;\n[; ;pic18f2550.h: 1585: };\n[; ;pic18f2550.h: 1586: struct {\n[; ;pic18f2550.h: 1587: unsigned :1;\n[; ;pic18f2550.h: 1588: unsigned EPINEN7 :1;\n[; ;pic18f2550.h: 1589: };\n[; ;pic18f2550.h: 1590: struct {\n[; ;pic18f2550.h: 1591: unsigned :2;\n[; ;pic18f2550.h: 1592: unsigned EPOUTEN7 :1;\n[; ;pic18f2550.h: 1593: };\n[; ;pic18f2550.h: 1594: struct {\n[; ;pic18f2550.h: 1595: unsigned EPSTALL7 :1;\n[; ;pic18f2550.h: 1596: };\n[; ;pic18f2550.h: 1597: } UEP7bits_t;\n[; ;pic18f2550.h: 1598: extern volatile UEP7bits_t UEP7bits @ 0xF77;\n[; ;pic18f2550.h: 1677: extern volatile unsigned char UEP8 @ 0xF78;\n\"1679\n[; ;pic18f2550.h: 1679: asm(\"UEP8 equ 0F78h\");\n[; <\" UEP8 equ 0F78h ;# \">\n[; ;pic18f2550.h: 1682: typedef union {\n[; ;pic18f2550.h: 1683: struct {\n[; ;pic18f2550.h: 1684: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1685: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1686: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1687: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1688: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1689: };\n[; ;pic18f2550.h: 1690: struct {\n[; ;pic18f2550.h: 1691: unsigned :3;\n[; ;pic18f2550.h: 1692: unsigned EPCONDIS8 :1;\n[; ;pic18f2550.h: 1693: };\n[; ;pic18f2550.h: 1694: struct {\n[; ;pic18f2550.h: 1695: unsigned :4;\n[; ;pic18f2550.h: 1696: unsigned EPHSHK8 :1;\n[; ;pic18f2550.h: 1697: };\n[; ;pic18f2550.h: 1698: struct {\n[; ;pic18f2550.h: 1699: unsigned :1;\n[; ;pic18f2550.h: 1700: unsigned EPINEN8 :1;\n[; ;pic18f2550.h: 1701: };\n[; ;pic18f2550.h: 1702: struct {\n[; ;pic18f2550.h: 1703: unsigned :2;\n[; ;pic18f2550.h: 1704: unsigned EPOUTEN8 :1;\n[; ;pic18f2550.h: 1705: };\n[; ;pic18f2550.h: 1706: struct {\n[; ;pic18f2550.h: 1707: unsigned EPSTALL8 :1;\n[; ;pic18f2550.h: 1708: };\n[; ;pic18f2550.h: 1709: } UEP8bits_t;\n[; ;pic18f2550.h: 1710: extern volatile UEP8bits_t UEP8bits @ 0xF78;\n[; ;pic18f2550.h: 1764: extern volatile unsigned char UEP9 @ 0xF79;\n\"1766\n[; ;pic18f2550.h: 1766: asm(\"UEP9 equ 0F79h\");\n[; <\" UEP9 equ 0F79h ;# \">\n[; ;pic18f2550.h: 1769: typedef union {\n[; ;pic18f2550.h: 1770: struct {\n[; ;pic18f2550.h: 1771: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1772: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1773: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1774: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1775: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1776: };\n[; ;pic18f2550.h: 1777: struct {\n[; ;pic18f2550.h: 1778: unsigned :3;\n[; ;pic18f2550.h: 1779: unsigned EPCONDIS9 :1;\n[; ;pic18f2550.h: 1780: };\n[; ;pic18f2550.h: 1781: struct {\n[; ;pic18f2550.h: 1782: unsigned :4;\n[; ;pic18f2550.h: 1783: unsigned EPHSHK9 :1;\n[; ;pic18f2550.h: 1784: };\n[; ;pic18f2550.h: 1785: struct {\n[; ;pic18f2550.h: 1786: unsigned :1;\n[; ;pic18f2550.h: 1787: unsigned EPINEN9 :1;\n[; ;pic18f2550.h: 1788: };\n[; ;pic18f2550.h: 1789: struct {\n[; ;pic18f2550.h: 1790: unsigned :2;\n[; ;pic18f2550.h: 1791: unsigned EPOUTEN9 :1;\n[; ;pic18f2550.h: 1792: };\n[; ;pic18f2550.h: 1793: struct {\n[; ;pic18f2550.h: 1794: unsigned EPSTALL9 :1;\n[; ;pic18f2550.h: 1795: };\n[; ;pic18f2550.h: 1796: } UEP9bits_t;\n[; ;pic18f2550.h: 1797: extern volatile UEP9bits_t UEP9bits @ 0xF79;\n[; ;pic18f2550.h: 1851: extern volatile unsigned char UEP10 @ 0xF7A;\n\"1853\n[; ;pic18f2550.h: 1853: asm(\"UEP10 equ 0F7Ah\");\n[; <\" UEP10 equ 0F7Ah ;# \">\n[; ;pic18f2550.h: 1856: typedef union {\n[; ;pic18f2550.h: 1857: struct {\n[; ;pic18f2550.h: 1858: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1859: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1860: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1861: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1862: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1863: };\n[; ;pic18f2550.h: 1864: struct {\n[; ;pic18f2550.h: 1865: unsigned :3;\n[; ;pic18f2550.h: 1866: unsigned EPCONDIS10 :1;\n[; ;pic18f2550.h: 1867: };\n[; ;pic18f2550.h: 1868: struct {\n[; ;pic18f2550.h: 1869: unsigned :4;\n[; ;pic18f2550.h: 1870: unsigned EPHSHK10 :1;\n[; ;pic18f2550.h: 1871: };\n[; ;pic18f2550.h: 1872: struct {\n[; ;pic18f2550.h: 1873: unsigned :1;\n[; ;pic18f2550.h: 1874: unsigned EPINEN10 :1;\n[; ;pic18f2550.h: 1875: };\n[; ;pic18f2550.h: 1876: struct {\n[; ;pic18f2550.h: 1877: unsigned :2;\n[; ;pic18f2550.h: 1878: unsigned EPOUTEN10 :1;\n[; ;pic18f2550.h: 1879: };\n[; ;pic18f2550.h: 1880: struct {\n[; ;pic18f2550.h: 1881: unsigned EPSTALL10 :1;\n[; ;pic18f2550.h: 1882: };\n[; ;pic18f2550.h: 1883: } UEP10bits_t;\n[; ;pic18f2550.h: 1884: extern volatile UEP10bits_t UEP10bits @ 0xF7A;\n[; ;pic18f2550.h: 1938: extern volatile unsigned char UEP11 @ 0xF7B;\n\"1940\n[; ;pic18f2550.h: 1940: asm(\"UEP11 equ 0F7Bh\");\n[; <\" UEP11 equ 0F7Bh ;# \">\n[; ;pic18f2550.h: 1943: typedef union {\n[; ;pic18f2550.h: 1944: struct {\n[; ;pic18f2550.h: 1945: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 1946: unsigned EPINEN :1;\n[; ;pic18f2550.h: 1947: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 1948: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 1949: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 1950: };\n[; ;pic18f2550.h: 1951: struct {\n[; ;pic18f2550.h: 1952: unsigned :3;\n[; ;pic18f2550.h: 1953: unsigned EPCONDIS11 :1;\n[; ;pic18f2550.h: 1954: };\n[; ;pic18f2550.h: 1955: struct {\n[; ;pic18f2550.h: 1956: unsigned :4;\n[; ;pic18f2550.h: 1957: unsigned EPHSHK11 :1;\n[; ;pic18f2550.h: 1958: };\n[; ;pic18f2550.h: 1959: struct {\n[; ;pic18f2550.h: 1960: unsigned :1;\n[; ;pic18f2550.h: 1961: unsigned EPINEN11 :1;\n[; ;pic18f2550.h: 1962: };\n[; ;pic18f2550.h: 1963: struct {\n[; ;pic18f2550.h: 1964: unsigned :2;\n[; ;pic18f2550.h: 1965: unsigned EPOUTEN11 :1;\n[; ;pic18f2550.h: 1966: };\n[; ;pic18f2550.h: 1967: struct {\n[; ;pic18f2550.h: 1968: unsigned EPSTALL11 :1;\n[; ;pic18f2550.h: 1969: };\n[; ;pic18f2550.h: 1970: } UEP11bits_t;\n[; ;pic18f2550.h: 1971: extern volatile UEP11bits_t UEP11bits @ 0xF7B;\n[; ;pic18f2550.h: 2025: extern volatile unsigned char UEP12 @ 0xF7C;\n\"2027\n[; ;pic18f2550.h: 2027: asm(\"UEP12 equ 0F7Ch\");\n[; <\" UEP12 equ 0F7Ch ;# \">\n[; ;pic18f2550.h: 2030: typedef union {\n[; ;pic18f2550.h: 2031: struct {\n[; ;pic18f2550.h: 2032: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2033: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2034: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2035: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2036: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2037: };\n[; ;pic18f2550.h: 2038: struct {\n[; ;pic18f2550.h: 2039: unsigned :3;\n[; ;pic18f2550.h: 2040: unsigned EPCONDIS12 :1;\n[; ;pic18f2550.h: 2041: };\n[; ;pic18f2550.h: 2042: struct {\n[; ;pic18f2550.h: 2043: unsigned :4;\n[; ;pic18f2550.h: 2044: unsigned EPHSHK12 :1;\n[; ;pic18f2550.h: 2045: };\n[; ;pic18f2550.h: 2046: struct {\n[; ;pic18f2550.h: 2047: unsigned :1;\n[; ;pic18f2550.h: 2048: unsigned EPINEN12 :1;\n[; ;pic18f2550.h: 2049: };\n[; ;pic18f2550.h: 2050: struct {\n[; ;pic18f2550.h: 2051: unsigned :2;\n[; ;pic18f2550.h: 2052: unsigned EPOUTEN12 :1;\n[; ;pic18f2550.h: 2053: };\n[; ;pic18f2550.h: 2054: struct {\n[; ;pic18f2550.h: 2055: unsigned EPSTALL12 :1;\n[; ;pic18f2550.h: 2056: };\n[; ;pic18f2550.h: 2057: } UEP12bits_t;\n[; ;pic18f2550.h: 2058: extern volatile UEP12bits_t UEP12bits @ 0xF7C;\n[; ;pic18f2550.h: 2112: extern volatile unsigned char UEP13 @ 0xF7D;\n\"2114\n[; ;pic18f2550.h: 2114: asm(\"UEP13 equ 0F7Dh\");\n[; <\" UEP13 equ 0F7Dh ;# \">\n[; ;pic18f2550.h: 2117: typedef union {\n[; ;pic18f2550.h: 2118: struct {\n[; ;pic18f2550.h: 2119: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2120: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2121: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2122: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2123: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2124: };\n[; ;pic18f2550.h: 2125: struct {\n[; ;pic18f2550.h: 2126: unsigned :3;\n[; ;pic18f2550.h: 2127: unsigned EPCONDIS13 :1;\n[; ;pic18f2550.h: 2128: };\n[; ;pic18f2550.h: 2129: struct {\n[; ;pic18f2550.h: 2130: unsigned :4;\n[; ;pic18f2550.h: 2131: unsigned EPHSHK13 :1;\n[; ;pic18f2550.h: 2132: };\n[; ;pic18f2550.h: 2133: struct {\n[; ;pic18f2550.h: 2134: unsigned :1;\n[; ;pic18f2550.h: 2135: unsigned EPINEN13 :1;\n[; ;pic18f2550.h: 2136: };\n[; ;pic18f2550.h: 2137: struct {\n[; ;pic18f2550.h: 2138: unsigned :2;\n[; ;pic18f2550.h: 2139: unsigned EPOUTEN13 :1;\n[; ;pic18f2550.h: 2140: };\n[; ;pic18f2550.h: 2141: struct {\n[; ;pic18f2550.h: 2142: unsigned EPSTALL13 :1;\n[; ;pic18f2550.h: 2143: };\n[; ;pic18f2550.h: 2144: } UEP13bits_t;\n[; ;pic18f2550.h: 2145: extern volatile UEP13bits_t UEP13bits @ 0xF7D;\n[; ;pic18f2550.h: 2199: extern volatile unsigned char UEP14 @ 0xF7E;\n\"2201\n[; ;pic18f2550.h: 2201: asm(\"UEP14 equ 0F7Eh\");\n[; <\" UEP14 equ 0F7Eh ;# \">\n[; ;pic18f2550.h: 2204: typedef union {\n[; ;pic18f2550.h: 2205: struct {\n[; ;pic18f2550.h: 2206: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2207: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2208: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2209: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2210: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2211: };\n[; ;pic18f2550.h: 2212: struct {\n[; ;pic18f2550.h: 2213: unsigned :3;\n[; ;pic18f2550.h: 2214: unsigned EPCONDIS14 :1;\n[; ;pic18f2550.h: 2215: };\n[; ;pic18f2550.h: 2216: struct {\n[; ;pic18f2550.h: 2217: unsigned :4;\n[; ;pic18f2550.h: 2218: unsigned EPHSHK14 :1;\n[; ;pic18f2550.h: 2219: };\n[; ;pic18f2550.h: 2220: struct {\n[; ;pic18f2550.h: 2221: unsigned :1;\n[; ;pic18f2550.h: 2222: unsigned EPINEN14 :1;\n[; ;pic18f2550.h: 2223: };\n[; ;pic18f2550.h: 2224: struct {\n[; ;pic18f2550.h: 2225: unsigned :2;\n[; ;pic18f2550.h: 2226: unsigned EPOUTEN14 :1;\n[; ;pic18f2550.h: 2227: };\n[; ;pic18f2550.h: 2228: struct {\n[; ;pic18f2550.h: 2229: unsigned EPSTALL14 :1;\n[; ;pic18f2550.h: 2230: };\n[; ;pic18f2550.h: 2231: } UEP14bits_t;\n[; ;pic18f2550.h: 2232: extern volatile UEP14bits_t UEP14bits @ 0xF7E;\n[; ;pic18f2550.h: 2286: extern volatile unsigned char UEP15 @ 0xF7F;\n\"2288\n[; ;pic18f2550.h: 2288: asm(\"UEP15 equ 0F7Fh\");\n[; <\" UEP15 equ 0F7Fh ;# \">\n[; ;pic18f2550.h: 2291: typedef union {\n[; ;pic18f2550.h: 2292: struct {\n[; ;pic18f2550.h: 2293: unsigned EPSTALL :1;\n[; ;pic18f2550.h: 2294: unsigned EPINEN :1;\n[; ;pic18f2550.h: 2295: unsigned EPOUTEN :1;\n[; ;pic18f2550.h: 2296: unsigned EPCONDIS :1;\n[; ;pic18f2550.h: 2297: unsigned EPHSHK :1;\n[; ;pic18f2550.h: 2298: };\n[; ;pic18f2550.h: 2299: struct {\n[; ;pic18f2550.h: 2300: unsigned :3;\n[; ;pic18f2550.h: 2301: unsigned EPCONDIS15 :1;\n[; ;pic18f2550.h: 2302: };\n[; ;pic18f2550.h: 2303: struct {\n[; ;pic18f2550.h: 2304: unsigned :4;\n[; ;pic18f2550.h: 2305: unsigned EPHSHK15 :1;\n[; ;pic18f2550.h: 2306: };\n[; ;pic18f2550.h: 2307: struct {\n[; ;pic18f2550.h: 2308: unsigned :1;\n[; ;pic18f2550.h: 2309: unsigned EPINEN15 :1;\n[; ;pic18f2550.h: 2310: };\n[; ;pic18f2550.h: 2311: struct {\n[; ;pic18f2550.h: 2312: unsigned :2;\n[; ;pic18f2550.h: 2313: unsigned EPOUTEN15 :1;\n[; ;pic18f2550.h: 2314: };\n[; ;pic18f2550.h: 2315: struct {\n[; ;pic18f2550.h: 2316: unsigned EPSTALL15 :1;\n[; ;pic18f2550.h: 2317: };\n[; ;pic18f2550.h: 2318: } UEP15bits_t;\n[; ;pic18f2550.h: 2319: extern volatile UEP15bits_t UEP15bits @ 0xF7F;\n[; ;pic18f2550.h: 2373: extern volatile unsigned char PORTA @ 0xF80;\n\"2375\n[; ;pic18f2550.h: 2375: asm(\"PORTA equ 0F80h\");\n[; <\" PORTA equ 0F80h ;# \">\n[; ;pic18f2550.h: 2378: typedef union {\n[; ;pic18f2550.h: 2379: struct {\n[; ;pic18f2550.h: 2380: unsigned RA0 :1;\n[; ;pic18f2550.h: 2381: unsigned RA1 :1;\n[; ;pic18f2550.h: 2382: unsigned RA2 :1;\n[; ;pic18f2550.h: 2383: unsigned RA3 :1;\n[; ;pic18f2550.h: 2384: unsigned RA4 :1;\n[; ;pic18f2550.h: 2385: unsigned RA5 :1;\n[; ;pic18f2550.h: 2386: unsigned RA6 :1;\n[; ;pic18f2550.h: 2387: };\n[; ;pic18f2550.h: 2388: struct {\n[; ;pic18f2550.h: 2389: unsigned AN0 :1;\n[; ;pic18f2550.h: 2390: unsigned AN1 :1;\n[; ;pic18f2550.h: 2391: unsigned AN2 :1;\n[; ;pic18f2550.h: 2392: unsigned AN3 :1;\n[; ;pic18f2550.h: 2393: unsigned T0CKI :1;\n[; ;pic18f2550.h: 2394: unsigned AN4 :1;\n[; ;pic18f2550.h: 2395: unsigned OSC2 :1;\n[; ;pic18f2550.h: 2396: };\n[; ;pic18f2550.h: 2397: struct {\n[; ;pic18f2550.h: 2398: unsigned :2;\n[; ;pic18f2550.h: 2399: unsigned VREFM :1;\n[; ;pic18f2550.h: 2400: unsigned VREFP :1;\n[; ;pic18f2550.h: 2401: unsigned :1;\n[; ;pic18f2550.h: 2402: unsigned LVDIN :1;\n[; ;pic18f2550.h: 2403: };\n[; ;pic18f2550.h: 2404: struct {\n[; ;pic18f2550.h: 2405: unsigned :5;\n[; ;pic18f2550.h: 2406: unsigned HLVDIN :1;\n[; ;pic18f2550.h: 2407: };\n[; ;pic18f2550.h: 2408: struct {\n[; ;pic18f2550.h: 2409: unsigned :7;\n[; ;pic18f2550.h: 2410: unsigned RA7 :1;\n[; ;pic18f2550.h: 2411: };\n[; ;pic18f2550.h: 2412: struct {\n[; ;pic18f2550.h: 2413: unsigned :7;\n[; ;pic18f2550.h: 2414: unsigned RJPU :1;\n[; ;pic18f2550.h: 2415: };\n[; ;pic18f2550.h: 2416: struct {\n[; ;pic18f2550.h: 2417: unsigned ULPWUIN :1;\n[; ;pic18f2550.h: 2418: };\n[; ;pic18f2550.h: 2419: } PORTAbits_t;\n[; ;pic18f2550.h: 2420: extern volatile PORTAbits_t PORTAbits @ 0xF80;\n[; ;pic18f2550.h: 2529: extern volatile unsigned char PORTB @ 0xF81;\n\"2531\n[; ;pic18f2550.h: 2531: asm(\"PORTB equ 0F81h\");\n[; <\" PORTB equ 0F81h ;# \">\n[; ;pic18f2550.h: 2534: typedef union {\n[; ;pic18f2550.h: 2535: struct {\n[; ;pic18f2550.h: 2536: unsigned RB0 :1;\n[; ;pic18f2550.h: 2537: unsigned RB1 :1;\n[; ;pic18f2550.h: 2538: unsigned RB2 :1;\n[; ;pic18f2550.h: 2539: unsigned RB3 :1;\n[; ;pic18f2550.h: 2540: unsigned RB4 :1;\n[; ;pic18f2550.h: 2541: unsigned RB5 :1;\n[; ;pic18f2550.h: 2542: unsigned RB6 :1;\n[; ;pic18f2550.h: 2543: unsigned RB7 :1;\n[; ;pic18f2550.h: 2544: };\n[; ;pic18f2550.h: 2545: struct {\n[; ;pic18f2550.h: 2546: unsigned INT0 :1;\n[; ;pic18f2550.h: 2547: unsigned INT1 :1;\n[; ;pic18f2550.h: 2548: unsigned INT2 :1;\n[; ;pic18f2550.h: 2549: unsigned :2;\n[; ;pic18f2550.h: 2550: unsigned PGM :1;\n[; ;pic18f2550.h: 2551: unsigned PGC :1;\n[; ;pic18f2550.h: 2552: unsigned PGD :1;\n[; ;pic18f2550.h: 2553: };\n[; ;pic18f2550.h: 2554: struct {\n[; ;pic18f2550.h: 2555: unsigned :3;\n[; ;pic18f2550.h: 2556: unsigned CCP2_PA2 :1;\n[; ;pic18f2550.h: 2557: };\n[; ;pic18f2550.h: 2558: } PORTBbits_t;\n[; ;pic18f2550.h: 2559: extern volatile PORTBbits_t PORTBbits @ 0xF81;\n[; ;pic18f2550.h: 2638: extern volatile unsigned char PORTC @ 0xF82;\n\"2640\n[; ;pic18f2550.h: 2640: asm(\"PORTC equ 0F82h\");\n[; <\" PORTC equ 0F82h ;# \">\n[; ;pic18f2550.h: 2643: typedef union {\n[; ;pic18f2550.h: 2644: struct {\n[; ;pic18f2550.h: 2645: unsigned RC0 :1;\n[; ;pic18f2550.h: 2646: unsigned RC1 :1;\n[; ;pic18f2550.h: 2647: unsigned RC2 :1;\n[; ;pic18f2550.h: 2648: unsigned :1;\n[; ;pic18f2550.h: 2649: unsigned RC4 :1;\n[; ;pic18f2550.h: 2650: unsigned RC5 :1;\n[; ;pic18f2550.h: 2651: unsigned RC6 :1;\n[; ;pic18f2550.h: 2652: unsigned RC7 :1;\n[; ;pic18f2550.h: 2653: };\n[; ;pic18f2550.h: 2654: struct {\n[; ;pic18f2550.h: 2655: unsigned T1OSO :1;\n[; ;pic18f2550.h: 2656: unsigned T1OSI :1;\n[; ;pic18f2550.h: 2657: unsigned CCP1 :1;\n[; ;pic18f2550.h: 2658: unsigned :3;\n[; ;pic18f2550.h: 2659: unsigned TX :1;\n[; ;pic18f2550.h: 2660: unsigned RX :1;\n[; ;pic18f2550.h: 2661: };\n[; ;pic18f2550.h: 2662: struct {\n[; ;pic18f2550.h: 2663: unsigned T13CKI :1;\n[; ;pic18f2550.h: 2664: unsigned :1;\n[; ;pic18f2550.h: 2665: unsigned P1A :1;\n[; ;pic18f2550.h: 2666: unsigned :3;\n[; ;pic18f2550.h: 2667: unsigned CK :1;\n[; ;pic18f2550.h: 2668: unsigned DT :1;\n[; ;pic18f2550.h: 2669: };\n[; ;pic18f2550.h: 2670: struct {\n[; ;pic18f2550.h: 2671: unsigned :1;\n[; ;pic18f2550.h: 2672: unsigned CCP2 :1;\n[; ;pic18f2550.h: 2673: };\n[; ;pic18f2550.h: 2674: struct {\n[; ;pic18f2550.h: 2675: unsigned :2;\n[; ;pic18f2550.h: 2676: unsigned PA1 :1;\n[; ;pic18f2550.h: 2677: };\n[; ;pic18f2550.h: 2678: struct {\n[; ;pic18f2550.h: 2679: unsigned :1;\n[; ;pic18f2550.h: 2680: unsigned PA2 :1;\n[; ;pic18f2550.h: 2681: };\n[; ;pic18f2550.h: 2682: struct {\n[; ;pic18f2550.h: 2683: unsigned :3;\n[; ;pic18f2550.h: 2684: unsigned RC3 :1;\n[; ;pic18f2550.h: 2685: };\n[; ;pic18f2550.h: 2686: } PORTCbits_t;\n[; ;pic18f2550.h: 2687: extern volatile PORTCbits_t PORTCbits @ 0xF82;\n[; ;pic18f2550.h: 2791: extern volatile unsigned char PORTE @ 0xF84;\n\"2793\n[; ;pic18f2550.h: 2793: asm(\"PORTE equ 0F84h\");\n[; <\" PORTE equ 0F84h ;# \">\n[; ;pic18f2550.h: 2796: typedef union {\n[; ;pic18f2550.h: 2797: struct {\n[; ;pic18f2550.h: 2798: unsigned :3;\n[; ;pic18f2550.h: 2799: unsigned RE3 :1;\n[; ;pic18f2550.h: 2800: };\n[; ;pic18f2550.h: 2801: struct {\n[; ;pic18f2550.h: 2802: unsigned :2;\n[; ;pic18f2550.h: 2803: unsigned CCP10 :1;\n[; ;pic18f2550.h: 2804: };\n[; ;pic18f2550.h: 2805: struct {\n[; ;pic18f2550.h: 2806: unsigned :7;\n[; ;pic18f2550.h: 2807: unsigned CCP2E :1;\n[; ;pic18f2550.h: 2808: };\n[; ;pic18f2550.h: 2809: struct {\n[; ;pic18f2550.h: 2810: unsigned :6;\n[; ;pic18f2550.h: 2811: unsigned CCP6E :1;\n[; ;pic18f2550.h: 2812: };\n[; ;pic18f2550.h: 2813: struct {\n[; ;pic18f2550.h: 2814: unsigned :5;\n[; ;pic18f2550.h: 2815: unsigned CCP7E :1;\n[; ;pic18f2550.h: 2816: };\n[; ;pic18f2550.h: 2817: struct {\n[; ;pic18f2550.h: 2818: unsigned :4;\n[; ;pic18f2550.h: 2819: unsigned CCP8E :1;\n[; ;pic18f2550.h: 2820: };\n[; ;pic18f2550.h: 2821: struct {\n[; ;pic18f2550.h: 2822: unsigned :3;\n[; ;pic18f2550.h: 2823: unsigned CCP9E :1;\n[; ;pic18f2550.h: 2824: };\n[; ;pic18f2550.h: 2825: struct {\n[; ;pic18f2550.h: 2826: unsigned :2;\n[; ;pic18f2550.h: 2827: unsigned CS :1;\n[; ;pic18f2550.h: 2828: };\n[; ;pic18f2550.h: 2829: struct {\n[; ;pic18f2550.h: 2830: unsigned :7;\n[; ;pic18f2550.h: 2831: unsigned PA2E :1;\n[; ;pic18f2550.h: 2832: };\n[; ;pic18f2550.h: 2833: struct {\n[; ;pic18f2550.h: 2834: unsigned :6;\n[; ;pic18f2550.h: 2835: unsigned PB1E :1;\n[; ;pic18f2550.h: 2836: };\n[; ;pic18f2550.h: 2837: struct {\n[; ;pic18f2550.h: 2838: unsigned :2;\n[; ;pic18f2550.h: 2839: unsigned PB2 :1;\n[; ;pic18f2550.h: 2840: };\n[; ;pic18f2550.h: 2841: struct {\n[; ;pic18f2550.h: 2842: unsigned :4;\n[; ;pic18f2550.h: 2843: unsigned PB3E :1;\n[; ;pic18f2550.h: 2844: };\n[; ;pic18f2550.h: 2845: struct {\n[; ;pic18f2550.h: 2846: unsigned :5;\n[; ;pic18f2550.h: 2847: unsigned PC1E :1;\n[; ;pic18f2550.h: 2848: };\n[; ;pic18f2550.h: 2849: struct {\n[; ;pic18f2550.h: 2850: unsigned :1;\n[; ;pic18f2550.h: 2851: unsigned PC2 :1;\n[; ;pic18f2550.h: 2852: };\n[; ;pic18f2550.h: 2853: struct {\n[; ;pic18f2550.h: 2854: unsigned :3;\n[; ;pic18f2550.h: 2855: unsigned PC3E :1;\n[; ;pic18f2550.h: 2856: };\n[; ;pic18f2550.h: 2857: struct {\n[; ;pic18f2550.h: 2858: unsigned PD2 :1;\n[; ;pic18f2550.h: 2859: };\n[; ;pic18f2550.h: 2860: struct {\n[; ;pic18f2550.h: 2861: unsigned RDE :1;\n[; ;pic18f2550.h: 2862: };\n[; ;pic18f2550.h: 2863: struct {\n[; ;pic18f2550.h: 2864: unsigned RE0 :1;\n[; ;pic18f2550.h: 2865: };\n[; ;pic18f2550.h: 2866: struct {\n[; ;pic18f2550.h: 2867: unsigned :1;\n[; ;pic18f2550.h: 2868: unsigned RE1 :1;\n[; ;pic18f2550.h: 2869: };\n[; ;pic18f2550.h: 2870: struct {\n[; ;pic18f2550.h: 2871: unsigned :2;\n[; ;pic18f2550.h: 2872: unsigned RE2 :1;\n[; ;pic18f2550.h: 2873: };\n[; ;pic18f2550.h: 2874: struct {\n[; ;pic18f2550.h: 2875: unsigned :4;\n[; ;pic18f2550.h: 2876: unsigned RE4 :1;\n[; ;pic18f2550.h: 2877: };\n[; ;pic18f2550.h: 2878: struct {\n[; ;pic18f2550.h: 2879: unsigned :5;\n[; ;pic18f2550.h: 2880: unsigned RE5 :1;\n[; ;pic18f2550.h: 2881: };\n[; ;pic18f2550.h: 2882: struct {\n[; ;pic18f2550.h: 2883: unsigned :6;\n[; ;pic18f2550.h: 2884: unsigned RE6 :1;\n[; ;pic18f2550.h: 2885: };\n[; ;pic18f2550.h: 2886: struct {\n[; ;pic18f2550.h: 2887: unsigned :7;\n[; ;pic18f2550.h: 2888: unsigned RE7 :1;\n[; ;pic18f2550.h: 2889: };\n[; ;pic18f2550.h: 2890: struct {\n[; ;pic18f2550.h: 2891: unsigned :1;\n[; ;pic18f2550.h: 2892: unsigned WRE :1;\n[; ;pic18f2550.h: 2893: };\n[; ;pic18f2550.h: 2894: } PORTEbits_t;\n[; ;pic18f2550.h: 2895: extern volatile PORTEbits_t PORTEbits @ 0xF84;\n[; ;pic18f2550.h: 3024: extern volatile unsigned char LATA @ 0xF89;\n\"3026\n[; ;pic18f2550.h: 3026: asm(\"LATA equ 0F89h\");\n[; <\" LATA equ 0F89h ;# \">\n[; ;pic18f2550.h: 3029: typedef union {\n[; ;pic18f2550.h: 3030: struct {\n[; ;pic18f2550.h: 3031: unsigned LATA0 :1;\n[; ;pic18f2550.h: 3032: unsigned LATA1 :1;\n[; ;pic18f2550.h: 3033: unsigned LATA2 :1;\n[; ;pic18f2550.h: 3034: unsigned LATA3 :1;\n[; ;pic18f2550.h: 3035: unsigned LATA4 :1;\n[; ;pic18f2550.h: 3036: unsigned LATA5 :1;\n[; ;pic18f2550.h: 3037: unsigned LATA6 :1;\n[; ;pic18f2550.h: 3038: };\n[; ;pic18f2550.h: 3039: struct {\n[; ;pic18f2550.h: 3040: unsigned LA0 :1;\n[; ;pic18f2550.h: 3041: };\n[; ;pic18f2550.h: 3042: struct {\n[; ;pic18f2550.h: 3043: unsigned :1;\n[; ;pic18f2550.h: 3044: unsigned LA1 :1;\n[; ;pic18f2550.h: 3045: };\n[; ;pic18f2550.h: 3046: struct {\n[; ;pic18f2550.h: 3047: unsigned :2;\n[; ;pic18f2550.h: 3048: unsigned LA2 :1;\n[; ;pic18f2550.h: 3049: };\n[; ;pic18f2550.h: 3050: struct {\n[; ;pic18f2550.h: 3051: unsigned :3;\n[; ;pic18f2550.h: 3052: unsigned LA3 :1;\n[; ;pic18f2550.h: 3053: };\n[; ;pic18f2550.h: 3054: struct {\n[; ;pic18f2550.h: 3055: unsigned :4;\n[; ;pic18f2550.h: 3056: unsigned LA4 :1;\n[; ;pic18f2550.h: 3057: };\n[; ;pic18f2550.h: 3058: struct {\n[; ;pic18f2550.h: 3059: unsigned :5;\n[; ;pic18f2550.h: 3060: unsigned LA5 :1;\n[; ;pic18f2550.h: 3061: };\n[; ;pic18f2550.h: 3062: struct {\n[; ;pic18f2550.h: 3063: unsigned :6;\n[; ;pic18f2550.h: 3064: unsigned LA6 :1;\n[; ;pic18f2550.h: 3065: };\n[; ;pic18f2550.h: 3066: struct {\n[; ;pic18f2550.h: 3067: unsigned :7;\n[; ;pic18f2550.h: 3068: unsigned LA7 :1;\n[; ;pic18f2550.h: 3069: };\n[; ;pic18f2550.h: 3070: struct {\n[; ;pic18f2550.h: 3071: unsigned :7;\n[; ;pic18f2550.h: 3072: unsigned LATA7 :1;\n[; ;pic18f2550.h: 3073: };\n[; ;pic18f2550.h: 3074: } LATAbits_t;\n[; ;pic18f2550.h: 3075: extern volatile LATAbits_t LATAbits @ 0xF89;\n[; ;pic18f2550.h: 3159: extern volatile unsigned char LATB @ 0xF8A;\n\"3161\n[; ;pic18f2550.h: 3161: asm(\"LATB equ 0F8Ah\");\n[; <\" LATB equ 0F8Ah ;# \">\n[; ;pic18f2550.h: 3164: typedef union {\n[; ;pic18f2550.h: 3165: struct {\n[; ;pic18f2550.h: 3166: unsigned LATB0 :1;\n[; ;pic18f2550.h: 3167: unsigned LATB1 :1;\n[; ;pic18f2550.h: 3168: unsigned LATB2 :1;\n[; ;pic18f2550.h: 3169: unsigned LATB3 :1;\n[; ;pic18f2550.h: 3170: unsigned LATB4 :1;\n[; ;pic18f2550.h: 3171: unsigned LATB5 :1;\n[; ;pic18f2550.h: 3172: unsigned LATB6 :1;\n[; ;pic18f2550.h: 3173: unsigned LATB7 :1;\n[; ;pic18f2550.h: 3174: };\n[; ;pic18f2550.h: 3175: struct {\n[; ;pic18f2550.h: 3176: unsigned LB0 :1;\n[; ;pic18f2550.h: 3177: };\n[; ;pic18f2550.h: 3178: struct {\n[; ;pic18f2550.h: 3179: unsigned :1;\n[; ;pic18f2550.h: 3180: unsigned LB1 :1;\n[; ;pic18f2550.h: 3181: };\n[; ;pic18f2550.h: 3182: struct {\n[; ;pic18f2550.h: 3183: unsigned :2;\n[; ;pic18f2550.h: 3184: unsigned LB2 :1;\n[; ;pic18f2550.h: 3185: };\n[; ;pic18f2550.h: 3186: struct {\n[; ;pic18f2550.h: 3187: unsigned :3;\n[; ;pic18f2550.h: 3188: unsigned LB3 :1;\n[; ;pic18f2550.h: 3189: };\n[; ;pic18f2550.h: 3190: struct {\n[; ;pic18f2550.h: 3191: unsigned :4;\n[; ;pic18f2550.h: 3192: unsigned LB4 :1;\n[; ;pic18f2550.h: 3193: };\n[; ;pic18f2550.h: 3194: struct {\n[; ;pic18f2550.h: 3195: unsigned :5;\n[; ;pic18f2550.h: 3196: unsigned LB5 :1;\n[; ;pic18f2550.h: 3197: };\n[; ;pic18f2550.h: 3198: struct {\n[; ;pic18f2550.h: 3199: unsigned :6;\n[; ;pic18f2550.h: 3200: unsigned LB6 :1;\n[; ;pic18f2550.h: 3201: };\n[; ;pic18f2550.h: 3202: struct {\n[; ;pic18f2550.h: 3203: unsigned :7;\n[; ;pic18f2550.h: 3204: unsigned LB7 :1;\n[; ;pic18f2550.h: 3205: };\n[; ;pic18f2550.h: 3206: } LATBbits_t;\n[; ;pic18f2550.h: 3207: extern volatile LATBbits_t LATBbits @ 0xF8A;\n[; ;pic18f2550.h: 3291: extern volatile unsigned char LATC @ 0xF8B;\n\"3293\n[; ;pic18f2550.h: 3293: asm(\"LATC equ 0F8Bh\");\n[; <\" LATC equ 0F8Bh ;# \">\n[; ;pic18f2550.h: 3296: typedef union {\n[; ;pic18f2550.h: 3297: struct {\n[; ;pic18f2550.h: 3298: unsigned LATC0 :1;\n[; ;pic18f2550.h: 3299: unsigned LATC1 :1;\n[; ;pic18f2550.h: 3300: unsigned LATC2 :1;\n[; ;pic18f2550.h: 3301: unsigned :3;\n[; ;pic18f2550.h: 3302: unsigned LATC6 :1;\n[; ;pic18f2550.h: 3303: unsigned LATC7 :1;\n[; ;pic18f2550.h: 3304: };\n[; ;pic18f2550.h: 3305: struct {\n[; ;pic18f2550.h: 3306: unsigned LC0 :1;\n[; ;pic18f2550.h: 3307: };\n[; ;pic18f2550.h: 3308: struct {\n[; ;pic18f2550.h: 3309: unsigned :1;\n[; ;pic18f2550.h: 3310: unsigned LC1 :1;\n[; ;pic18f2550.h: 3311: };\n[; ;pic18f2550.h: 3312: struct {\n[; ;pic18f2550.h: 3313: unsigned :2;\n[; ;pic18f2550.h: 3314: unsigned LC2 :1;\n[; ;pic18f2550.h: 3315: };\n[; ;pic18f2550.h: 3316: struct {\n[; ;pic18f2550.h: 3317: unsigned :3;\n[; ;pic18f2550.h: 3318: unsigned LC3 :1;\n[; ;pic18f2550.h: 3319: };\n[; ;pic18f2550.h: 3320: struct {\n[; ;pic18f2550.h: 3321: unsigned :4;\n[; ;pic18f2550.h: 3322: unsigned LC4 :1;\n[; ;pic18f2550.h: 3323: };\n[; ;pic18f2550.h: 3324: struct {\n[; ;pic18f2550.h: 3325: unsigned :5;\n[; ;pic18f2550.h: 3326: unsigned LC5 :1;\n[; ;pic18f2550.h: 3327: };\n[; ;pic18f2550.h: 3328: struct {\n[; ;pic18f2550.h: 3329: unsigned :6;\n[; ;pic18f2550.h: 3330: unsigned LC6 :1;\n[; ;pic18f2550.h: 3331: };\n[; ;pic18f2550.h: 3332: struct {\n[; ;pic18f2550.h: 3333: unsigned :7;\n[; ;pic18f2550.h: 3334: unsigned LC7 :1;\n[; ;pic18f2550.h: 3335: };\n[; ;pic18f2550.h: 3336: } LATCbits_t;\n[; ;pic18f2550.h: 3337: extern volatile LATCbits_t LATCbits @ 0xF8B;\n[; ;pic18f2550.h: 3406: extern volatile unsigned char TRISA @ 0xF92;\n\"3408\n[; ;pic18f2550.h: 3408: asm(\"TRISA equ 0F92h\");\n[; <\" TRISA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3411: extern volatile unsigned char DDRA @ 0xF92;\n\"3413\n[; ;pic18f2550.h: 3413: asm(\"DDRA equ 0F92h\");\n[; <\" DDRA equ 0F92h ;# \">\n[; ;pic18f2550.h: 3416: typedef union {\n[; ;pic18f2550.h: 3417: struct {\n[; ;pic18f2550.h: 3418: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3419: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3420: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3421: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3422: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3423: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3424: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3425: };\n[; ;pic18f2550.h: 3426: struct {\n[; ;pic18f2550.h: 3427: unsigned RA0 :1;\n[; ;pic18f2550.h: 3428: unsigned RA1 :1;\n[; ;pic18f2550.h: 3429: unsigned RA2 :1;\n[; ;pic18f2550.h: 3430: unsigned RA3 :1;\n[; ;pic18f2550.h: 3431: unsigned RA4 :1;\n[; ;pic18f2550.h: 3432: unsigned RA5 :1;\n[; ;pic18f2550.h: 3433: unsigned RA6 :1;\n[; ;pic18f2550.h: 3434: };\n[; ;pic18f2550.h: 3435: } TRISAbits_t;\n[; ;pic18f2550.h: 3436: extern volatile TRISAbits_t TRISAbits @ 0xF92;\n[; ;pic18f2550.h: 3509: typedef union {\n[; ;pic18f2550.h: 3510: struct {\n[; ;pic18f2550.h: 3511: unsigned TRISA0 :1;\n[; ;pic18f2550.h: 3512: unsigned TRISA1 :1;\n[; ;pic18f2550.h: 3513: unsigned TRISA2 :1;\n[; ;pic18f2550.h: 3514: unsigned TRISA3 :1;\n[; ;pic18f2550.h: 3515: unsigned TRISA4 :1;\n[; ;pic18f2550.h: 3516: unsigned TRISA5 :1;\n[; ;pic18f2550.h: 3517: unsigned TRISA6 :1;\n[; ;pic18f2550.h: 3518: };\n[; ;pic18f2550.h: 3519: struct {\n[; ;pic18f2550.h: 3520: unsigned RA0 :1;\n[; ;pic18f2550.h: 3521: unsigned RA1 :1;\n[; ;pic18f2550.h: 3522: unsigned RA2 :1;\n[; ;pic18f2550.h: 3523: unsigned RA3 :1;\n[; ;pic18f2550.h: 3524: unsigned RA4 :1;\n[; ;pic18f2550.h: 3525: unsigned RA5 :1;\n[; ;pic18f2550.h: 3526: unsigned RA6 :1;\n[; ;pic18f2550.h: 3527: };\n[; ;pic18f2550.h: 3528: } DDRAbits_t;\n[; ;pic18f2550.h: 3529: extern volatile DDRAbits_t DDRAbits @ 0xF92;\n[; ;pic18f2550.h: 3603: extern volatile unsigned char TRISB @ 0xF93;\n\"3605\n[; ;pic18f2550.h: 3605: asm(\"TRISB equ 0F93h\");\n[; <\" TRISB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3608: extern volatile unsigned char DDRB @ 0xF93;\n\"3610\n[; ;pic18f2550.h: 3610: asm(\"DDRB equ 0F93h\");\n[; <\" DDRB equ 0F93h ;# \">\n[; ;pic18f2550.h: 3613: typedef union {\n[; ;pic18f2550.h: 3614: struct {\n[; ;pic18f2550.h: 3615: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3616: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3617: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3618: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3619: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3620: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3621: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3622: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3623: };\n[; ;pic18f2550.h: 3624: struct {\n[; ;pic18f2550.h: 3625: unsigned RB0 :1;\n[; ;pic18f2550.h: 3626: unsigned RB1 :1;\n[; ;pic18f2550.h: 3627: unsigned RB2 :1;\n[; ;pic18f2550.h: 3628: unsigned RB3 :1;\n[; ;pic18f2550.h: 3629: unsigned RB4 :1;\n[; ;pic18f2550.h: 3630: unsigned RB5 :1;\n[; ;pic18f2550.h: 3631: unsigned RB6 :1;\n[; ;pic18f2550.h: 3632: unsigned RB7 :1;\n[; ;pic18f2550.h: 3633: };\n[; ;pic18f2550.h: 3634: } TRISBbits_t;\n[; ;pic18f2550.h: 3635: extern volatile TRISBbits_t TRISBbits @ 0xF93;\n[; ;pic18f2550.h: 3718: typedef union {\n[; ;pic18f2550.h: 3719: struct {\n[; ;pic18f2550.h: 3720: unsigned TRISB0 :1;\n[; ;pic18f2550.h: 3721: unsigned TRISB1 :1;\n[; ;pic18f2550.h: 3722: unsigned TRISB2 :1;\n[; ;pic18f2550.h: 3723: unsigned TRISB3 :1;\n[; ;pic18f2550.h: 3724: unsigned TRISB4 :1;\n[; ;pic18f2550.h: 3725: unsigned TRISB5 :1;\n[; ;pic18f2550.h: 3726: unsigned TRISB6 :1;\n[; ;pic18f2550.h: 3727: unsigned TRISB7 :1;\n[; ;pic18f2550.h: 3728: };\n[; ;pic18f2550.h: 3729: struct {\n[; ;pic18f2550.h: 3730: unsigned RB0 :1;\n[; ;pic18f2550.h: 3731: unsigned RB1 :1;\n[; ;pic18f2550.h: 3732: unsigned RB2 :1;\n[; ;pic18f2550.h: 3733: unsigned RB3 :1;\n[; ;pic18f2550.h: 3734: unsigned RB4 :1;\n[; ;pic18f2550.h: 3735: unsigned RB5 :1;\n[; ;pic18f2550.h: 3736: unsigned RB6 :1;\n[; ;pic18f2550.h: 3737: unsigned RB7 :1;\n[; ;pic18f2550.h: 3738: };\n[; ;pic18f2550.h: 3739: } DDRBbits_t;\n[; ;pic18f2550.h: 3740: extern volatile DDRBbits_t DDRBbits @ 0xF93;\n[; ;pic18f2550.h: 3824: extern volatile unsigned char TRISC @ 0xF94;\n\"3826\n[; ;pic18f2550.h: 3826: asm(\"TRISC equ 0F94h\");\n[; <\" TRISC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3829: extern volatile unsigned char DDRC @ 0xF94;\n\"3831\n[; ;pic18f2550.h: 3831: asm(\"DDRC equ 0F94h\");\n[; <\" DDRC equ 0F94h ;# \">\n[; ;pic18f2550.h: 3834: typedef union {\n[; ;pic18f2550.h: 3835: struct {\n[; ;pic18f2550.h: 3836: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3837: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3838: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3839: unsigned :3;\n[; ;pic18f2550.h: 3840: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3841: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3842: };\n[; ;pic18f2550.h: 3843: struct {\n[; ;pic18f2550.h: 3844: unsigned RC0 :1;\n[; ;pic18f2550.h: 3845: unsigned RC1 :1;\n[; ;pic18f2550.h: 3846: unsigned RC2 :1;\n[; ;pic18f2550.h: 3847: unsigned :3;\n[; ;pic18f2550.h: 3848: unsigned RC6 :1;\n[; ;pic18f2550.h: 3849: unsigned RC7 :1;\n[; ;pic18f2550.h: 3850: };\n[; ;pic18f2550.h: 3851: struct {\n[; ;pic18f2550.h: 3852: unsigned :3;\n[; ;pic18f2550.h: 3853: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3854: };\n[; ;pic18f2550.h: 3855: } TRISCbits_t;\n[; ;pic18f2550.h: 3856: extern volatile TRISCbits_t TRISCbits @ 0xF94;\n[; ;pic18f2550.h: 3914: typedef union {\n[; ;pic18f2550.h: 3915: struct {\n[; ;pic18f2550.h: 3916: unsigned TRISC0 :1;\n[; ;pic18f2550.h: 3917: unsigned TRISC1 :1;\n[; ;pic18f2550.h: 3918: unsigned TRISC2 :1;\n[; ;pic18f2550.h: 3919: unsigned :3;\n[; ;pic18f2550.h: 3920: unsigned TRISC6 :1;\n[; ;pic18f2550.h: 3921: unsigned TRISC7 :1;\n[; ;pic18f2550.h: 3922: };\n[; ;pic18f2550.h: 3923: struct {\n[; ;pic18f2550.h: 3924: unsigned RC0 :1;\n[; ;pic18f2550.h: 3925: unsigned RC1 :1;\n[; ;pic18f2550.h: 3926: unsigned RC2 :1;\n[; ;pic18f2550.h: 3927: unsigned :3;\n[; ;pic18f2550.h: 3928: unsigned RC6 :1;\n[; ;pic18f2550.h: 3929: unsigned RC7 :1;\n[; ;pic18f2550.h: 3930: };\n[; ;pic18f2550.h: 3931: struct {\n[; ;pic18f2550.h: 3932: unsigned :3;\n[; ;pic18f2550.h: 3933: unsigned TRISC3 :1;\n[; ;pic18f2550.h: 3934: };\n[; ;pic18f2550.h: 3935: } DDRCbits_t;\n[; ;pic18f2550.h: 3936: extern volatile DDRCbits_t DDRCbits @ 0xF94;\n[; ;pic18f2550.h: 3995: extern volatile unsigned char OSCTUNE @ 0xF9B;\n\"3997\n[; ;pic18f2550.h: 3997: asm(\"OSCTUNE equ 0F9Bh\");\n[; <\" OSCTUNE equ 0F9Bh ;# \">\n[; ;pic18f2550.h: 4000: typedef union {\n[; ;pic18f2550.h: 4001: struct {\n[; ;pic18f2550.h: 4002: unsigned TUN :5;\n[; ;pic18f2550.h: 4003: unsigned :2;\n[; ;pic18f2550.h: 4004: unsigned INTSRC :1;\n[; ;pic18f2550.h: 4005: };\n[; ;pic18f2550.h: 4006: struct {\n[; ;pic18f2550.h: 4007: unsigned TUN0 :1;\n[; ;pic18f2550.h: 4008: unsigned TUN1 :1;\n[; ;pic18f2550.h: 4009: unsigned TUN2 :1;\n[; ;pic18f2550.h: 4010: unsigned TUN3 :1;\n[; ;pic18f2550.h: 4011: unsigned TUN4 :1;\n[; ;pic18f2550.h: 4012: };\n[; ;pic18f2550.h: 4013: } OSCTUNEbits_t;\n[; ;pic18f2550.h: 4014: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n[; ;pic18f2550.h: 4053: extern volatile unsigned char PIE1 @ 0xF9D;\n\"4055\n[; ;pic18f2550.h: 4055: asm(\"PIE1 equ 0F9Dh\");\n[; <\" PIE1 equ 0F9Dh ;# \">\n[; ;pic18f2550.h: 4058: typedef union {\n[; ;pic18f2550.h: 4059: struct {\n[; ;pic18f2550.h: 4060: unsigned TMR1IE :1;\n[; ;pic18f2550.h: 4061: unsigned TMR2IE :1;\n[; ;pic18f2550.h: 4062: unsigned CCP1IE :1;\n[; ;pic18f2550.h: 4063: unsigned SSPIE :1;\n[; ;pic18f2550.h: 4064: unsigned TXIE :1;\n[; ;pic18f2550.h: 4065: unsigned RCIE :1;\n[; ;pic18f2550.h: 4066: unsigned ADIE :1;\n[; ;pic18f2550.h: 4067: };\n[; ;pic18f2550.h: 4068: struct {\n[; ;pic18f2550.h: 4069: unsigned :5;\n[; ;pic18f2550.h: 4070: unsigned RC1IE :1;\n[; ;pic18f2550.h: 4071: };\n[; ;pic18f2550.h: 4072: struct {\n[; ;pic18f2550.h: 4073: unsigned :4;\n[; ;pic18f2550.h: 4074: unsigned TX1IE :1;\n[; ;pic18f2550.h: 4075: };\n[; ;pic18f2550.h: 4076: } PIE1bits_t;\n[; ;pic18f2550.h: 4077: extern volatile PIE1bits_t PIE1bits @ 0xF9D;\n[; ;pic18f2550.h: 4126: extern volatile unsigned char PIR1 @ 0xF9E;\n\"4128\n[; ;pic18f2550.h: 4128: asm(\"PIR1 equ 0F9Eh\");\n[; <\" PIR1 equ 0F9Eh ;# \">\n[; ;pic18f2550.h: 4131: typedef union {\n[; ;pic18f2550.h: 4132: struct {\n[; ;pic18f2550.h: 4133: unsigned TMR1IF :1;\n[; ;pic18f2550.h: 4134: unsigned TMR2IF :1;\n[; ;pic18f2550.h: 4135: unsigned CCP1IF :1;\n[; ;pic18f2550.h: 4136: unsigned SSPIF :1;\n[; ;pic18f2550.h: 4137: unsigned TXIF :1;\n[; ;pic18f2550.h: 4138: unsigned RCIF :1;\n[; ;pic18f2550.h: 4139: unsigned ADIF :1;\n[; ;pic18f2550.h: 4140: };\n[; ;pic18f2550.h: 4141: struct {\n[; ;pic18f2550.h: 4142: unsigned :5;\n[; ;pic18f2550.h: 4143: unsigned RC1IF :1;\n[; ;pic18f2550.h: 4144: };\n[; ;pic18f2550.h: 4145: struct {\n[; ;pic18f2550.h: 4146: unsigned :4;\n[; ;pic18f2550.h: 4147: unsigned TX1IF :1;\n[; ;pic18f2550.h: 4148: };\n[; ;pic18f2550.h: 4149: } PIR1bits_t;\n[; ;pic18f2550.h: 4150: extern volatile PIR1bits_t PIR1bits @ 0xF9E;\n[; ;pic18f2550.h: 4199: extern volatile unsigned char IPR1 @ 0xF9F;\n\"4201\n[; ;pic18f2550.h: 4201: asm(\"IPR1 equ 0F9Fh\");\n[; <\" IPR1 equ 0F9Fh ;# \">\n[; ;pic18f2550.h: 4204: typedef union {\n[; ;pic18f2550.h: 4205: struct {\n[; ;pic18f2550.h: 4206: unsigned TMR1IP :1;\n[; ;pic18f2550.h: 4207: unsigned TMR2IP :1;\n[; ;pic18f2550.h: 4208: unsigned CCP1IP :1;\n[; ;pic18f2550.h: 4209: unsigned SSPIP :1;\n[; ;pic18f2550.h: 4210: unsigned TXIP :1;\n[; ;pic18f2550.h: 4211: unsigned RCIP :1;\n[; ;pic18f2550.h: 4212: unsigned ADIP :1;\n[; ;pic18f2550.h: 4213: };\n[; ;pic18f2550.h: 4214: struct {\n[; ;pic18f2550.h: 4215: unsigned :5;\n[; ;pic18f2550.h: 4216: unsigned RC1IP :1;\n[; ;pic18f2550.h: 4217: };\n[; ;pic18f2550.h: 4218: struct {\n[; ;pic18f2550.h: 4219: unsigned :4;\n[; ;pic18f2550.h: 4220: unsigned TX1IP :1;\n[; ;pic18f2550.h: 4221: };\n[; ;pic18f2550.h: 4222: } IPR1bits_t;\n[; ;pic18f2550.h: 4223: extern volatile IPR1bits_t IPR1bits @ 0xF9F;\n[; ;pic18f2550.h: 4272: extern volatile unsigned char PIE2 @ 0xFA0;\n\"4274\n[; ;pic18f2550.h: 4274: asm(\"PIE2 equ 0FA0h\");\n[; <\" PIE2 equ 0FA0h ;# \">\n[; ;pic18f2550.h: 4277: typedef union {\n[; ;pic18f2550.h: 4278: struct {\n[; ;pic18f2550.h: 4279: unsigned CCP2IE :1;\n[; ;pic18f2550.h: 4280: unsigned TMR3IE :1;\n[; ;pic18f2550.h: 4281: unsigned HLVDIE :1;\n[; ;pic18f2550.h: 4282: unsigned BCLIE :1;\n[; ;pic18f2550.h: 4283: unsigned EEIE :1;\n[; ;pic18f2550.h: 4284: unsigned USBIE :1;\n[; ;pic18f2550.h: 4285: unsigned CMIE :1;\n[; ;pic18f2550.h: 4286: unsigned OSCFIE :1;\n[; ;pic18f2550.h: 4287: };\n[; ;pic18f2550.h: 4288: struct {\n[; ;pic18f2550.h: 4289: unsigned :2;\n[; ;pic18f2550.h: 4290: unsigned LVDIE :1;\n[; ;pic18f2550.h: 4291: };\n[; ;pic18f2550.h: 4292: } PIE2bits_t;\n[; ;pic18f2550.h: 4293: extern volatile PIE2bits_t PIE2bits @ 0xFA0;\n[; ;pic18f2550.h: 4342: extern volatile unsigned char PIR2 @ 0xFA1;\n\"4344\n[; ;pic18f2550.h: 4344: asm(\"PIR2 equ 0FA1h\");\n[; <\" PIR2 equ 0FA1h ;# \">\n[; ;pic18f2550.h: 4347: typedef union {\n[; ;pic18f2550.h: 4348: struct {\n[; ;pic18f2550.h: 4349: unsigned CCP2IF :1;\n[; ;pic18f2550.h: 4350: unsigned TMR3IF :1;\n[; ;pic18f2550.h: 4351: unsigned HLVDIF :1;\n[; ;pic18f2550.h: 4352: unsigned BCLIF :1;\n[; ;pic18f2550.h: 4353: unsigned EEIF :1;\n[; ;pic18f2550.h: 4354: unsigned USBIF :1;\n[; ;pic18f2550.h: 4355: unsigned CMIF :1;\n[; ;pic18f2550.h: 4356: unsigned OSCFIF :1;\n[; ;pic18f2550.h: 4357: };\n[; ;pic18f2550.h: 4358: struct {\n[; ;pic18f2550.h: 4359: unsigned :2;\n[; ;pic18f2550.h: 4360: unsigned LVDIF :1;\n[; ;pic18f2550.h: 4361: };\n[; ;pic18f2550.h: 4362: } PIR2bits_t;\n[; ;pic18f2550.h: 4363: extern volatile PIR2bits_t PIR2bits @ 0xFA1;\n[; ;pic18f2550.h: 4412: extern volatile unsigned char IPR2 @ 0xFA2;\n\"4414\n[; ;pic18f2550.h: 4414: asm(\"IPR2 equ 0FA2h\");\n[; <\" IPR2 equ 0FA2h ;# \">\n[; ;pic18f2550.h: 4417: typedef union {\n[; ;pic18f2550.h: 4418: struct {\n[; ;pic18f2550.h: 4419: unsigned CCP2IP :1;\n[; ;pic18f2550.h: 4420: unsigned TMR3IP :1;\n[; ;pic18f2550.h: 4421: unsigned HLVDIP :1;\n[; ;pic18f2550.h: 4422: unsigned BCLIP :1;\n[; ;pic18f2550.h: 4423: unsigned EEIP :1;\n[; ;pic18f2550.h: 4424: unsigned USBIP :1;\n[; ;pic18f2550.h: 4425: unsigned CMIP :1;\n[; ;pic18f2550.h: 4426: unsigned OSCFIP :1;\n[; ;pic18f2550.h: 4427: };\n[; ;pic18f2550.h: 4428: struct {\n[; ;pic18f2550.h: 4429: unsigned :2;\n[; ;pic18f2550.h: 4430: unsigned LVDIP :1;\n[; ;pic18f2550.h: 4431: };\n[; ;pic18f2550.h: 4432: } IPR2bits_t;\n[; ;pic18f2550.h: 4433: extern volatile IPR2bits_t IPR2bits @ 0xFA2;\n[; ;pic18f2550.h: 4482: extern volatile unsigned char EECON1 @ 0xFA6;\n\"4484\n[; ;pic18f2550.h: 4484: asm(\"EECON1 equ 0FA6h\");\n[; <\" EECON1 equ 0FA6h ;# \">\n[; ;pic18f2550.h: 4487: typedef union {\n[; ;pic18f2550.h: 4488: struct {\n[; ;pic18f2550.h: 4489: unsigned RD :1;\n[; ;pic18f2550.h: 4490: unsigned WR :1;\n[; ;pic18f2550.h: 4491: unsigned WREN :1;\n[; ;pic18f2550.h: 4492: unsigned WRERR :1;\n[; ;pic18f2550.h: 4493: unsigned FREE :1;\n[; ;pic18f2550.h: 4494: unsigned :1;\n[; ;pic18f2550.h: 4495: unsigned CFGS :1;\n[; ;pic18f2550.h: 4496: unsigned EEPGD :1;\n[; ;pic18f2550.h: 4497: };\n[; ;pic18f2550.h: 4498: struct {\n[; ;pic18f2550.h: 4499: unsigned :6;\n[; ;pic18f2550.h: 4500: unsigned EEFS :1;\n[; ;pic18f2550.h: 4501: };\n[; ;pic18f2550.h: 4502: } EECON1bits_t;\n[; ;pic18f2550.h: 4503: extern volatile EECON1bits_t EECON1bits @ 0xFA6;\n[; ;pic18f2550.h: 4547: extern volatile unsigned char EECON2 @ 0xFA7;\n\"4549\n[; ;pic18f2550.h: 4549: asm(\"EECON2 equ 0FA7h\");\n[; <\" EECON2 equ 0FA7h ;# \">\n[; ;pic18f2550.h: 4553: extern volatile unsigned char EEDATA @ 0xFA8;\n\"4555\n[; ;pic18f2550.h: 4555: asm(\"EEDATA equ 0FA8h\");\n[; <\" EEDATA equ 0FA8h ;# \">\n[; ;pic18f2550.h: 4559: extern volatile unsigned char EEADR @ 0xFA9;\n\"4561\n[; ;pic18f2550.h: 4561: asm(\"EEADR equ 0FA9h\");\n[; <\" EEADR equ 0FA9h ;# \">\n[; ;pic18f2550.h: 4565: extern volatile unsigned char RCSTA @ 0xFAB;\n\"4567\n[; ;pic18f2550.h: 4567: asm(\"RCSTA equ 0FABh\");\n[; <\" RCSTA equ 0FABh ;# \">\n[; ;pic18f2550.h: 4570: extern volatile unsigned char RCSTA1 @ 0xFAB;\n\"4572\n[; ;pic18f2550.h: 4572: asm(\"RCSTA1 equ 0FABh\");\n[; <\" RCSTA1 equ 0FABh ;# \">\n[; ;pic18f2550.h: 4575: typedef union {\n[; ;pic18f2550.h: 4576: struct {\n[; ;pic18f2550.h: 4577: unsigned RX9D :1;\n[; ;pic18f2550.h: 4578: unsigned OERR :1;\n[; ;pic18f2550.h: 4579: unsigned FERR :1;\n[; ;pic18f2550.h: 4580: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4581: unsigned CREN :1;\n[; ;pic18f2550.h: 4582: unsigned SREN :1;\n[; ;pic18f2550.h: 4583: unsigned RX9 :1;\n[; ;pic18f2550.h: 4584: unsigned SPEN :1;\n[; ;pic18f2550.h: 4585: };\n[; ;pic18f2550.h: 4586: struct {\n[; ;pic18f2550.h: 4587: unsigned :3;\n[; ;pic18f2550.h: 4588: unsigned ADEN :1;\n[; ;pic18f2550.h: 4589: };\n[; ;pic18f2550.h: 4590: struct {\n[; ;pic18f2550.h: 4591: unsigned :5;\n[; ;pic18f2550.h: 4592: unsigned SRENA :1;\n[; ;pic18f2550.h: 4593: };\n[; ;pic18f2550.h: 4594: } RCSTAbits_t;\n[; ;pic18f2550.h: 4595: extern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n[; ;pic18f2550.h: 4648: typedef union {\n[; ;pic18f2550.h: 4649: struct {\n[; ;pic18f2550.h: 4650: unsigned RX9D :1;\n[; ;pic18f2550.h: 4651: unsigned OERR :1;\n[; ;pic18f2550.h: 4652: unsigned FERR :1;\n[; ;pic18f2550.h: 4653: unsigned ADDEN :1;\n[; ;pic18f2550.h: 4654: unsigned CREN :1;\n[; ;pic18f2550.h: 4655: unsigned SREN :1;\n[; ;pic18f2550.h: 4656: unsigned RX9 :1;\n[; ;pic18f2550.h: 4657: unsigned SPEN :1;\n[; ;pic18f2550.h: 4658: };\n[; ;pic18f2550.h: 4659: struct {\n[; ;pic18f2550.h: 4660: unsigned :3;\n[; ;pic18f2550.h: 4661: unsigned ADEN :1;\n[; ;pic18f2550.h: 4662: };\n[; ;pic18f2550.h: 4663: struct {\n[; ;pic18f2550.h: 4664: unsigned :5;\n[; ;pic18f2550.h: 4665: unsigned SRENA :1;\n[; ;pic18f2550.h: 4666: };\n[; ;pic18f2550.h: 4667: } RCSTA1bits_t;\n[; ;pic18f2550.h: 4668: extern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n[; ;pic18f2550.h: 4722: extern volatile unsigned char TXSTA @ 0xFAC;\n\"4724\n[; ;pic18f2550.h: 4724: asm(\"TXSTA equ 0FACh\");\n[; <\" TXSTA equ 0FACh ;# \">\n[; ;pic18f2550.h: 4727: extern volatile unsigned char TXSTA1 @ 0xFAC;\n\"4729\n[; ;pic18f2550.h: 4729: asm(\"TXSTA1 equ 0FACh\");\n[; <\" TXSTA1 equ 0FACh ;# \">\n[; ;pic18f2550.h: 4732: typedef union {\n[; ;pic18f2550.h: 4733: struct {\n[; ;pic18f2550.h: 4734: unsigned TX9D :1;\n[; ;pic18f2550.h: 4735: unsigned TRMT :1;\n[; ;pic18f2550.h: 4736: unsigned BRGH :1;\n[; ;pic18f2550.h: 4737: unsigned SENDB :1;\n[; ;pic18f2550.h: 4738: unsigned SYNC :1;\n[; ;pic18f2550.h: 4739: unsigned TXEN :1;\n[; ;pic18f2550.h: 4740: unsigned TX9 :1;\n[; ;pic18f2550.h: 4741: unsigned CSRC :1;\n[; ;pic18f2550.h: 4742: };\n[; ;pic18f2550.h: 4743: struct {\n[; ;pic18f2550.h: 4744: unsigned :2;\n[; ;pic18f2550.h: 4745: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4746: };\n[; ;pic18f2550.h: 4747: struct {\n[; ;pic18f2550.h: 4748: unsigned :7;\n[; ;pic18f2550.h: 4749: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4750: };\n[; ;pic18f2550.h: 4751: struct {\n[; ;pic18f2550.h: 4752: unsigned :3;\n[; ;pic18f2550.h: 4753: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4754: };\n[; ;pic18f2550.h: 4755: struct {\n[; ;pic18f2550.h: 4756: unsigned :4;\n[; ;pic18f2550.h: 4757: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4758: };\n[; ;pic18f2550.h: 4759: struct {\n[; ;pic18f2550.h: 4760: unsigned :1;\n[; ;pic18f2550.h: 4761: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4762: };\n[; ;pic18f2550.h: 4763: struct {\n[; ;pic18f2550.h: 4764: unsigned :6;\n[; ;pic18f2550.h: 4765: unsigned TX91 :1;\n[; ;pic18f2550.h: 4766: };\n[; ;pic18f2550.h: 4767: struct {\n[; ;pic18f2550.h: 4768: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4769: };\n[; ;pic18f2550.h: 4770: struct {\n[; ;pic18f2550.h: 4771: unsigned :5;\n[; ;pic18f2550.h: 4772: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4773: };\n[; ;pic18f2550.h: 4774: } TXSTAbits_t;\n[; ;pic18f2550.h: 4775: extern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n[; ;pic18f2550.h: 4858: typedef union {\n[; ;pic18f2550.h: 4859: struct {\n[; ;pic18f2550.h: 4860: unsigned TX9D :1;\n[; ;pic18f2550.h: 4861: unsigned TRMT :1;\n[; ;pic18f2550.h: 4862: unsigned BRGH :1;\n[; ;pic18f2550.h: 4863: unsigned SENDB :1;\n[; ;pic18f2550.h: 4864: unsigned SYNC :1;\n[; ;pic18f2550.h: 4865: unsigned TXEN :1;\n[; ;pic18f2550.h: 4866: unsigned TX9 :1;\n[; ;pic18f2550.h: 4867: unsigned CSRC :1;\n[; ;pic18f2550.h: 4868: };\n[; ;pic18f2550.h: 4869: struct {\n[; ;pic18f2550.h: 4870: unsigned :2;\n[; ;pic18f2550.h: 4871: unsigned BRGH1 :1;\n[; ;pic18f2550.h: 4872: };\n[; ;pic18f2550.h: 4873: struct {\n[; ;pic18f2550.h: 4874: unsigned :7;\n[; ;pic18f2550.h: 4875: unsigned CSRC1 :1;\n[; ;pic18f2550.h: 4876: };\n[; ;pic18f2550.h: 4877: struct {\n[; ;pic18f2550.h: 4878: unsigned :3;\n[; ;pic18f2550.h: 4879: unsigned SENDB1 :1;\n[; ;pic18f2550.h: 4880: };\n[; ;pic18f2550.h: 4881: struct {\n[; ;pic18f2550.h: 4882: unsigned :4;\n[; ;pic18f2550.h: 4883: unsigned SYNC1 :1;\n[; ;pic18f2550.h: 4884: };\n[; ;pic18f2550.h: 4885: struct {\n[; ;pic18f2550.h: 4886: unsigned :1;\n[; ;pic18f2550.h: 4887: unsigned TRMT1 :1;\n[; ;pic18f2550.h: 4888: };\n[; ;pic18f2550.h: 4889: struct {\n[; ;pic18f2550.h: 4890: unsigned :6;\n[; ;pic18f2550.h: 4891: unsigned TX91 :1;\n[; ;pic18f2550.h: 4892: };\n[; ;pic18f2550.h: 4893: struct {\n[; ;pic18f2550.h: 4894: unsigned TX9D1 :1;\n[; ;pic18f2550.h: 4895: };\n[; ;pic18f2550.h: 4896: struct {\n[; ;pic18f2550.h: 4897: unsigned :5;\n[; ;pic18f2550.h: 4898: unsigned TXEN1 :1;\n[; ;pic18f2550.h: 4899: };\n[; ;pic18f2550.h: 4900: } TXSTA1bits_t;\n[; ;pic18f2550.h: 4901: extern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n[; ;pic18f2550.h: 4985: extern volatile unsigned char TXREG @ 0xFAD;\n\"4987\n[; ;pic18f2550.h: 4987: asm(\"TXREG equ 0FADh\");\n[; <\" TXREG equ 0FADh ;# \">\n[; ;pic18f2550.h: 4990: extern volatile unsigned char TXREG1 @ 0xFAD;\n\"4992\n[; ;pic18f2550.h: 4992: asm(\"TXREG1 equ 0FADh\");\n[; <\" TXREG1 equ 0FADh ;# \">\n[; ;pic18f2550.h: 4996: extern volatile unsigned char RCREG @ 0xFAE;\n\"4998\n[; ;pic18f2550.h: 4998: asm(\"RCREG equ 0FAEh\");\n[; <\" RCREG equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5001: extern volatile unsigned char RCREG1 @ 0xFAE;\n\"5003\n[; ;pic18f2550.h: 5003: asm(\"RCREG1 equ 0FAEh\");\n[; <\" RCREG1 equ 0FAEh ;# \">\n[; ;pic18f2550.h: 5007: extern volatile unsigned char SPBRG @ 0xFAF;\n\"5009\n[; ;pic18f2550.h: 5009: asm(\"SPBRG equ 0FAFh\");\n[; <\" SPBRG equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5012: extern volatile unsigned char SPBRG1 @ 0xFAF;\n\"5014\n[; ;pic18f2550.h: 5014: asm(\"SPBRG1 equ 0FAFh\");\n[; <\" SPBRG1 equ 0FAFh ;# \">\n[; ;pic18f2550.h: 5018: extern volatile unsigned char SPBRGH @ 0xFB0;\n\"5020\n[; ;pic18f2550.h: 5020: asm(\"SPBRGH equ 0FB0h\");\n[; <\" SPBRGH equ 0FB0h ;# \">\n[; ;pic18f2550.h: 5024: extern volatile unsigned char T3CON @ 0xFB1;\n\"5026\n[; ;pic18f2550.h: 5026: asm(\"T3CON equ 0FB1h\");\n[; <\" T3CON equ 0FB1h ;# \">\n[; ;pic18f2550.h: 5029: typedef union {\n[; ;pic18f2550.h: 5030: struct {\n[; ;pic18f2550.h: 5031: unsigned :2;\n[; ;pic18f2550.h: 5032: unsigned NOT_T3SYNC :1;\n[; ;pic18f2550.h: 5033: };\n[; ;pic18f2550.h: 5034: struct {\n[; ;pic18f2550.h: 5035: unsigned TMR3ON :1;\n[; ;pic18f2550.h: 5036: unsigned TMR3CS :1;\n[; ;pic18f2550.h: 5037: unsigned nT3SYNC :1;\n[; ;pic18f2550.h: 5038: unsigned T3CCP1 :1;\n[; ;pic18f2550.h: 5039: unsigned T3CKPS :2;\n[; ;pic18f2550.h: 5040: unsigned T3CCP2 :1;\n[; ;pic18f2550.h: 5041: unsigned RD16 :1;\n[; ;pic18f2550.h: 5042: };\n[; ;pic18f2550.h: 5043: struct {\n[; ;pic18f2550.h: 5044: unsigned :2;\n[; ;pic18f2550.h: 5045: unsigned T3SYNC :1;\n[; ;pic18f2550.h: 5046: unsigned :1;\n[; ;pic18f2550.h: 5047: unsigned T3CKPS0 :1;\n[; ;pic18f2550.h: 5048: unsigned T3CKPS1 :1;\n[; ;pic18f2550.h: 5049: };\n[; ;pic18f2550.h: 5050: struct {\n[; ;pic18f2550.h: 5051: unsigned :2;\n[; ;pic18f2550.h: 5052: unsigned T3NSYNC :1;\n[; ;pic18f2550.h: 5053: };\n[; ;pic18f2550.h: 5054: struct {\n[; ;pic18f2550.h: 5055: unsigned :7;\n[; ;pic18f2550.h: 5056: unsigned RD163 :1;\n[; ;pic18f2550.h: 5057: };\n[; ;pic18f2550.h: 5058: struct {\n[; ;pic18f2550.h: 5059: unsigned :3;\n[; ;pic18f2550.h: 5060: unsigned SOSCEN3 :1;\n[; ;pic18f2550.h: 5061: };\n[; ;pic18f2550.h: 5062: struct {\n[; ;pic18f2550.h: 5063: unsigned :7;\n[; ;pic18f2550.h: 5064: unsigned T3RD16 :1;\n[; ;pic18f2550.h: 5065: };\n[; ;pic18f2550.h: 5066: } T3CONbits_t;\n[; ;pic18f2550.h: 5067: extern volatile T3CONbits_t T3CONbits @ 0xFB1;\n[; ;pic18f2550.h: 5146: extern volatile unsigned short TMR3 @ 0xFB2;\n\"5148\n[; ;pic18f2550.h: 5148: asm(\"TMR3 equ 0FB2h\");\n[; <\" TMR3 equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5152: extern volatile unsigned char TMR3L @ 0xFB2;\n\"5154\n[; ;pic18f2550.h: 5154: asm(\"TMR3L equ 0FB2h\");\n[; <\" TMR3L equ 0FB2h ;# \">\n[; ;pic18f2550.h: 5158: extern volatile unsigned char TMR3H @ 0xFB3;\n\"5160\n[; ;pic18f2550.h: 5160: asm(\"TMR3H equ 0FB3h\");\n[; <\" TMR3H equ 0FB3h ;# \">\n[; ;pic18f2550.h: 5164: extern volatile unsigned char CMCON @ 0xFB4;\n\"5166\n[; ;pic18f2550.h: 5166: asm(\"CMCON equ 0FB4h\");\n[; <\" CMCON equ 0FB4h ;# \">\n[; ;pic18f2550.h: 5169: typedef union {\n[; ;pic18f2550.h: 5170: struct {\n[; ;pic18f2550.h: 5171: unsigned CM :3;\n[; ;pic18f2550.h: 5172: unsigned CIS :1;\n[; ;pic18f2550.h: 5173: unsigned C1INV :1;\n[; ;pic18f2550.h: 5174: unsigned C2INV :1;\n[; ;pic18f2550.h: 5175: unsigned C1OUT :1;\n[; ;pic18f2550.h: 5176: unsigned C2OUT :1;\n[; ;pic18f2550.h: 5177: };\n[; ;pic18f2550.h: 5178: struct {\n[; ;pic18f2550.h: 5179: unsigned CM0 :1;\n[; ;pic18f2550.h: 5180: unsigned CM1 :1;\n[; ;pic18f2550.h: 5181: unsigned CM2 :1;\n[; ;pic18f2550.h: 5182: };\n[; ;pic18f2550.h: 5183: struct {\n[; ;pic18f2550.h: 5184: unsigned CMEN0 :1;\n[; ;pic18f2550.h: 5185: };\n[; ;pic18f2550.h: 5186: struct {\n[; ;pic18f2550.h: 5187: unsigned :1;\n[; ;pic18f2550.h: 5188: unsigned CMEN1 :1;\n[; ;pic18f2550.h: 5189: };\n[; ;pic18f2550.h: 5190: struct {\n[; ;pic18f2550.h: 5191: unsigned :2;\n[; ;pic18f2550.h: 5192: unsigned CMEN2 :1;\n[; ;pic18f2550.h: 5193: };\n[; ;pic18f2550.h: 5194: } CMCONbits_t;\n[; ;pic18f2550.h: 5195: extern volatile CMCONbits_t CMCONbits @ 0xFB4;\n[; ;pic18f2550.h: 5259: extern volatile unsigned char CVRCON @ 0xFB5;\n\"5261\n[; ;pic18f2550.h: 5261: asm(\"CVRCON equ 0FB5h\");\n[; <\" CVRCON equ 0FB5h ;# \">\n[; ;pic18f2550.h: 5264: typedef union {\n[; ;pic18f2550.h: 5265: struct {\n[; ;pic18f2550.h: 5266: unsigned CVR :4;\n[; ;pic18f2550.h: 5267: unsigned CVRSS :1;\n[; ;pic18f2550.h: 5268: unsigned CVRR :1;\n[; ;pic18f2550.h: 5269: unsigned CVROE :1;\n[; ;pic18f2550.h: 5270: unsigned CVREN :1;\n[; ;pic18f2550.h: 5271: };\n[; ;pic18f2550.h: 5272: struct {\n[; ;pic18f2550.h: 5273: unsigned CVR0 :1;\n[; ;pic18f2550.h: 5274: unsigned CVR1 :1;\n[; ;pic18f2550.h: 5275: unsigned CVR2 :1;\n[; ;pic18f2550.h: 5276: unsigned CVR3 :1;\n[; ;pic18f2550.h: 5277: unsigned CVREF :1;\n[; ;pic18f2550.h: 5278: };\n[; ;pic18f2550.h: 5279: struct {\n[; ;pic18f2550.h: 5280: unsigned :6;\n[; ;pic18f2550.h: 5281: unsigned CVROEN :1;\n[; ;pic18f2550.h: 5282: };\n[; ;pic18f2550.h: 5283: } CVRCONbits_t;\n[; ;pic18f2550.h: 5284: extern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n[; ;pic18f2550.h: 5343: extern volatile unsigned char ECCP1AS @ 0xFB6;\n\"5345\n[; ;pic18f2550.h: 5345: asm(\"ECCP1AS equ 0FB6h\");\n[; <\" ECCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5348: extern volatile unsigned char CCP1AS @ 0xFB6;\n\"5350\n[; ;pic18f2550.h: 5350: asm(\"CCP1AS equ 0FB6h\");\n[; <\" CCP1AS equ 0FB6h ;# \">\n[; ;pic18f2550.h: 5353: typedef union {\n[; ;pic18f2550.h: 5354: struct {\n[; ;pic18f2550.h: 5355: unsigned :2;\n[; ;pic18f2550.h: 5356: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5357: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5358: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5359: };\n[; ;pic18f2550.h: 5360: struct {\n[; ;pic18f2550.h: 5361: unsigned :2;\n[; ;pic18f2550.h: 5362: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5363: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5364: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5365: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5366: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5367: };\n[; ;pic18f2550.h: 5368: } ECCP1ASbits_t;\n[; ;pic18f2550.h: 5369: extern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5412: typedef union {\n[; ;pic18f2550.h: 5413: struct {\n[; ;pic18f2550.h: 5414: unsigned :2;\n[; ;pic18f2550.h: 5415: unsigned PSSAC :2;\n[; ;pic18f2550.h: 5416: unsigned ECCPAS :3;\n[; ;pic18f2550.h: 5417: unsigned ECCPASE :1;\n[; ;pic18f2550.h: 5418: };\n[; ;pic18f2550.h: 5419: struct {\n[; ;pic18f2550.h: 5420: unsigned :2;\n[; ;pic18f2550.h: 5421: unsigned PSSAC0 :1;\n[; ;pic18f2550.h: 5422: unsigned PSSAC1 :1;\n[; ;pic18f2550.h: 5423: unsigned ECCPAS0 :1;\n[; ;pic18f2550.h: 5424: unsigned ECCPAS1 :1;\n[; ;pic18f2550.h: 5425: unsigned ECCPAS2 :1;\n[; ;pic18f2550.h: 5426: };\n[; ;pic18f2550.h: 5427: } CCP1ASbits_t;\n[; ;pic18f2550.h: 5428: extern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n[; ;pic18f2550.h: 5472: extern volatile unsigned char ECCP1DEL @ 0xFB7;\n\"5474\n[; ;pic18f2550.h: 5474: asm(\"ECCP1DEL equ 0FB7h\");\n[; <\" ECCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5477: extern volatile unsigned char CCP1DEL @ 0xFB7;\n\"5479\n[; ;pic18f2550.h: 5479: asm(\"CCP1DEL equ 0FB7h\");\n[; <\" CCP1DEL equ 0FB7h ;# \">\n[; ;pic18f2550.h: 5482: typedef union {\n[; ;pic18f2550.h: 5483: struct {\n[; ;pic18f2550.h: 5484: unsigned :7;\n[; ;pic18f2550.h: 5485: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5486: };\n[; ;pic18f2550.h: 5487: } ECCP1DELbits_t;\n[; ;pic18f2550.h: 5488: extern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5496: typedef union {\n[; ;pic18f2550.h: 5497: struct {\n[; ;pic18f2550.h: 5498: unsigned :7;\n[; ;pic18f2550.h: 5499: unsigned PRSEN :1;\n[; ;pic18f2550.h: 5500: };\n[; ;pic18f2550.h: 5501: } CCP1DELbits_t;\n[; ;pic18f2550.h: 5502: extern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n[; ;pic18f2550.h: 5511: extern volatile unsigned char BAUDCON @ 0xFB8;\n\"5513\n[; ;pic18f2550.h: 5513: asm(\"BAUDCON equ 0FB8h\");\n[; <\" BAUDCON equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5516: extern volatile unsigned char BAUDCTL @ 0xFB8;\n\"5518\n[; ;pic18f2550.h: 5518: asm(\"BAUDCTL equ 0FB8h\");\n[; <\" BAUDCTL equ 0FB8h ;# \">\n[; ;pic18f2550.h: 5521: typedef union {\n[; ;pic18f2550.h: 5522: struct {\n[; ;pic18f2550.h: 5523: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5524: unsigned WUE :1;\n[; ;pic18f2550.h: 5525: unsigned :1;\n[; ;pic18f2550.h: 5526: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5527: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5528: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5529: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5530: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5531: };\n[; ;pic18f2550.h: 5532: struct {\n[; ;pic18f2550.h: 5533: unsigned :4;\n[; ;pic18f2550.h: 5534: unsigned SCKP :1;\n[; ;pic18f2550.h: 5535: unsigned :1;\n[; ;pic18f2550.h: 5536: unsigned RCMT :1;\n[; ;pic18f2550.h: 5537: };\n[; ;pic18f2550.h: 5538: struct {\n[; ;pic18f2550.h: 5539: unsigned :5;\n[; ;pic18f2550.h: 5540: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5541: };\n[; ;pic18f2550.h: 5542: struct {\n[; ;pic18f2550.h: 5543: unsigned :1;\n[; ;pic18f2550.h: 5544: unsigned W4E :1;\n[; ;pic18f2550.h: 5545: };\n[; ;pic18f2550.h: 5546: } BAUDCONbits_t;\n[; ;pic18f2550.h: 5547: extern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n[; ;pic18f2550.h: 5605: typedef union {\n[; ;pic18f2550.h: 5606: struct {\n[; ;pic18f2550.h: 5607: unsigned ABDEN :1;\n[; ;pic18f2550.h: 5608: unsigned WUE :1;\n[; ;pic18f2550.h: 5609: unsigned :1;\n[; ;pic18f2550.h: 5610: unsigned BRG16 :1;\n[; ;pic18f2550.h: 5611: unsigned TXCKP :1;\n[; ;pic18f2550.h: 5612: unsigned RXDTP :1;\n[; ;pic18f2550.h: 5613: unsigned RCIDL :1;\n[; ;pic18f2550.h: 5614: unsigned ABDOVF :1;\n[; ;pic18f2550.h: 5615: };\n[; ;pic18f2550.h: 5616: struct {\n[; ;pic18f2550.h: 5617: unsigned :4;\n[; ;pic18f2550.h: 5618: unsigned SCKP :1;\n[; ;pic18f2550.h: 5619: unsigned :1;\n[; ;pic18f2550.h: 5620: unsigned RCMT :1;\n[; ;pic18f2550.h: 5621: };\n[; ;pic18f2550.h: 5622: struct {\n[; ;pic18f2550.h: 5623: unsigned :5;\n[; ;pic18f2550.h: 5624: unsigned RXCKP :1;\n[; ;pic18f2550.h: 5625: };\n[; ;pic18f2550.h: 5626: struct {\n[; ;pic18f2550.h: 5627: unsigned :1;\n[; ;pic18f2550.h: 5628: unsigned W4E :1;\n[; ;pic18f2550.h: 5629: };\n[; ;pic18f2550.h: 5630: } BAUDCTLbits_t;\n[; ;pic18f2550.h: 5631: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n[; ;pic18f2550.h: 5690: extern volatile unsigned char CCP2CON @ 0xFBA;\n\"5692\n[; ;pic18f2550.h: 5692: asm(\"CCP2CON equ 0FBAh\");\n[; <\" CCP2CON equ 0FBAh ;# \">\n[; ;pic18f2550.h: 5695: typedef union {\n[; ;pic18f2550.h: 5696: struct {\n[; ;pic18f2550.h: 5697: unsigned CCP2M :4;\n[; ;pic18f2550.h: 5698: unsigned DC2B :2;\n[; ;pic18f2550.h: 5699: };\n[; ;pic18f2550.h: 5700: struct {\n[; ;pic18f2550.h: 5701: unsigned CCP2M0 :1;\n[; ;pic18f2550.h: 5702: unsigned CCP2M1 :1;\n[; ;pic18f2550.h: 5703: unsigned CCP2M2 :1;\n[; ;pic18f2550.h: 5704: unsigned CCP2M3 :1;\n[; ;pic18f2550.h: 5705: unsigned DC2B0 :1;\n[; ;pic18f2550.h: 5706: unsigned DC2B1 :1;\n[; ;pic18f2550.h: 5707: };\n[; ;pic18f2550.h: 5708: } CCP2CONbits_t;\n[; ;pic18f2550.h: 5709: extern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n[; ;pic18f2550.h: 5753: extern volatile unsigned short CCPR2 @ 0xFBB;\n\"5755\n[; ;pic18f2550.h: 5755: asm(\"CCPR2 equ 0FBBh\");\n[; <\" CCPR2 equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5759: extern volatile unsigned char CCPR2L @ 0xFBB;\n\"5761\n[; ;pic18f2550.h: 5761: asm(\"CCPR2L equ 0FBBh\");\n[; <\" CCPR2L equ 0FBBh ;# \">\n[; ;pic18f2550.h: 5765: extern volatile unsigned char CCPR2H @ 0xFBC;\n\"5767\n[; ;pic18f2550.h: 5767: asm(\"CCPR2H equ 0FBCh\");\n[; <\" CCPR2H equ 0FBCh ;# \">\n[; ;pic18f2550.h: 5771: extern volatile unsigned char CCP1CON @ 0xFBD;\n\"5773\n[; ;pic18f2550.h: 5773: asm(\"CCP1CON equ 0FBDh\");\n[; <\" CCP1CON equ 0FBDh ;# \">\n[; ;pic18f2550.h: 5776: typedef union {\n[; ;pic18f2550.h: 5777: struct {\n[; ;pic18f2550.h: 5778: unsigned CCP1M :4;\n[; ;pic18f2550.h: 5779: unsigned DC1B :2;\n[; ;pic18f2550.h: 5780: };\n[; ;pic18f2550.h: 5781: struct {\n[; ;pic18f2550.h: 5782: unsigned CCP1M0 :1;\n[; ;pic18f2550.h: 5783: unsigned CCP1M1 :1;\n[; ;pic18f2550.h: 5784: unsigned CCP1M2 :1;\n[; ;pic18f2550.h: 5785: unsigned CCP1M3 :1;\n[; ;pic18f2550.h: 5786: unsigned DC1B0 :1;\n[; ;pic18f2550.h: 5787: unsigned DC1B1 :1;\n[; ;pic18f2550.h: 5788: };\n[; ;pic18f2550.h: 5789: } CCP1CONbits_t;\n[; ;pic18f2550.h: 5790: extern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n[; ;pic18f2550.h: 5834: extern volatile unsigned short CCPR1 @ 0xFBE;\n\"5836\n[; ;pic18f2550.h: 5836: asm(\"CCPR1 equ 0FBEh\");\n[; <\" CCPR1 equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5840: extern volatile unsigned char CCPR1L @ 0xFBE;\n\"5842\n[; ;pic18f2550.h: 5842: asm(\"CCPR1L equ 0FBEh\");\n[; <\" CCPR1L equ 0FBEh ;# \">\n[; ;pic18f2550.h: 5846: extern volatile unsigned char CCPR1H @ 0xFBF;\n\"5848\n[; ;pic18f2550.h: 5848: asm(\"CCPR1H equ 0FBFh\");\n[; <\" CCPR1H equ 0FBFh ;# \">\n[; ;pic18f2550.h: 5852: extern volatile unsigned char ADCON2 @ 0xFC0;\n\"5854\n[; ;pic18f2550.h: 5854: asm(\"ADCON2 equ 0FC0h\");\n[; <\" ADCON2 equ 0FC0h ;# \">\n[; ;pic18f2550.h: 5857: typedef union {\n[; ;pic18f2550.h: 5858: struct {\n[; ;pic18f2550.h: 5859: unsigned ADCS :3;\n[; ;pic18f2550.h: 5860: unsigned ACQT :3;\n[; ;pic18f2550.h: 5861: unsigned :1;\n[; ;pic18f2550.h: 5862: unsigned ADFM :1;\n[; ;pic18f2550.h: 5863: };\n[; ;pic18f2550.h: 5864: struct {\n[; ;pic18f2550.h: 5865: unsigned ADCS0 :1;\n[; ;pic18f2550.h: 5866: unsigned ADCS1 :1;\n[; ;pic18f2550.h: 5867: unsigned ADCS2 :1;\n[; ;pic18f2550.h: 5868: unsigned ACQT0 :1;\n[; ;pic18f2550.h: 5869: unsigned ACQT1 :1;\n[; ;pic18f2550.h: 5870: unsigned ACQT2 :1;\n[; ;pic18f2550.h: 5871: };\n[; ;pic18f2550.h: 5872: } ADCON2bits_t;\n[; ;pic18f2550.h: 5873: extern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n[; ;pic18f2550.h: 5922: extern volatile unsigned char ADCON1 @ 0xFC1;\n\"5924\n[; ;pic18f2550.h: 5924: asm(\"ADCON1 equ 0FC1h\");\n[; <\" ADCON1 equ 0FC1h ;# \">\n[; ;pic18f2550.h: 5927: typedef union {\n[; ;pic18f2550.h: 5928: struct {\n[; ;pic18f2550.h: 5929: unsigned PCFG :4;\n[; ;pic18f2550.h: 5930: unsigned VCFG :2;\n[; ;pic18f2550.h: 5931: };\n[; ;pic18f2550.h: 5932: struct {\n[; ;pic18f2550.h: 5933: unsigned PCFG0 :1;\n[; ;pic18f2550.h: 5934: unsigned PCFG1 :1;\n[; ;pic18f2550.h: 5935: unsigned PCFG2 :1;\n[; ;pic18f2550.h: 5936: unsigned PCFG3 :1;\n[; ;pic18f2550.h: 5937: unsigned VCFG0 :1;\n[; ;pic18f2550.h: 5938: unsigned VCFG1 :1;\n[; ;pic18f2550.h: 5939: };\n[; ;pic18f2550.h: 5940: struct {\n[; ;pic18f2550.h: 5941: unsigned :3;\n[; ;pic18f2550.h: 5942: unsigned CHSN3 :1;\n[; ;pic18f2550.h: 5943: };\n[; ;pic18f2550.h: 5944: struct {\n[; ;pic18f2550.h: 5945: unsigned :4;\n[; ;pic18f2550.h: 5946: unsigned VCFG01 :1;\n[; ;pic18f2550.h: 5947: };\n[; ;pic18f2550.h: 5948: struct {\n[; ;pic18f2550.h: 5949: unsigned :5;\n[; ;pic18f2550.h: 5950: unsigned VCFG11 :1;\n[; ;pic18f2550.h: 5951: };\n[; ;pic18f2550.h: 5952: } ADCON1bits_t;\n[; ;pic18f2550.h: 5953: extern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n[; ;pic18f2550.h: 6012: extern volatile unsigned char ADCON0 @ 0xFC2;\n\"6014\n[; ;pic18f2550.h: 6014: asm(\"ADCON0 equ 0FC2h\");\n[; <\" ADCON0 equ 0FC2h ;# \">\n[; ;pic18f2550.h: 6017: typedef union {\n[; ;pic18f2550.h: 6018: struct {\n[; ;pic18f2550.h: 6019: unsigned :1;\n[; ;pic18f2550.h: 6020: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6021: };\n[; ;pic18f2550.h: 6022: struct {\n[; ;pic18f2550.h: 6023: unsigned ADON :1;\n[; ;pic18f2550.h: 6024: unsigned GO_nDONE :1;\n[; ;pic18f2550.h: 6025: unsigned CHS :4;\n[; ;pic18f2550.h: 6026: };\n[; ;pic18f2550.h: 6027: struct {\n[; ;pic18f2550.h: 6028: unsigned :1;\n[; ;pic18f2550.h: 6029: unsigned GO_NOT_DONE :1;\n[; ;pic18f2550.h: 6030: };\n[; ;pic18f2550.h: 6031: struct {\n[; ;pic18f2550.h: 6032: unsigned :1;\n[; ;pic18f2550.h: 6033: unsigned GO_DONE :1;\n[; ;pic18f2550.h: 6034: unsigned CHS0 :1;\n[; ;pic18f2550.h: 6035: unsigned CHS1 :1;\n[; ;pic18f2550.h: 6036: unsigned CHS2 :1;\n[; ;pic18f2550.h: 6037: unsigned CHS3 :1;\n[; ;pic18f2550.h: 6038: };\n[; ;pic18f2550.h: 6039: struct {\n[; ;pic18f2550.h: 6040: unsigned :1;\n[; ;pic18f2550.h: 6041: unsigned DONE :1;\n[; ;pic18f2550.h: 6042: };\n[; ;pic18f2550.h: 6043: struct {\n[; ;pic18f2550.h: 6044: unsigned :1;\n[; ;pic18f2550.h: 6045: unsigned GO :1;\n[; ;pic18f2550.h: 6046: };\n[; ;pic18f2550.h: 6047: struct {\n[; ;pic18f2550.h: 6048: unsigned :1;\n[; ;pic18f2550.h: 6049: unsigned NOT_DONE :1;\n[; ;pic18f2550.h: 6050: };\n[; ;pic18f2550.h: 6051: struct {\n[; ;pic18f2550.h: 6052: unsigned :1;\n[; ;pic18f2550.h: 6053: unsigned nDONE :1;\n[; ;pic18f2550.h: 6054: };\n[; ;pic18f2550.h: 6055: struct {\n[; ;pic18f2550.h: 6056: unsigned :1;\n[; ;pic18f2550.h: 6057: unsigned GODONE :1;\n[; ;pic18f2550.h: 6058: };\n[; ;pic18f2550.h: 6059: } ADCON0bits_t;\n[; ;pic18f2550.h: 6060: extern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n[; ;pic18f2550.h: 6134: extern volatile unsigned short ADRES @ 0xFC3;\n\"6136\n[; ;pic18f2550.h: 6136: asm(\"ADRES equ 0FC3h\");\n[; <\" ADRES equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6140: extern volatile unsigned char ADRESL @ 0xFC3;\n\"6142\n[; ;pic18f2550.h: 6142: asm(\"ADRESL equ 0FC3h\");\n[; <\" ADRESL equ 0FC3h ;# \">\n[; ;pic18f2550.h: 6146: extern volatile unsigned char ADRESH @ 0xFC4;\n\"6148\n[; ;pic18f2550.h: 6148: asm(\"ADRESH equ 0FC4h\");\n[; <\" ADRESH equ 0FC4h ;# \">\n[; ;pic18f2550.h: 6152: extern volatile unsigned char SSPCON2 @ 0xFC5;\n\"6154\n[; ;pic18f2550.h: 6154: asm(\"SSPCON2 equ 0FC5h\");\n[; <\" SSPCON2 equ 0FC5h ;# \">\n[; ;pic18f2550.h: 6157: typedef union {\n[; ;pic18f2550.h: 6158: struct {\n[; ;pic18f2550.h: 6159: unsigned SEN :1;\n[; ;pic18f2550.h: 6160: unsigned RSEN :1;\n[; ;pic18f2550.h: 6161: unsigned PEN :1;\n[; ;pic18f2550.h: 6162: unsigned RCEN :1;\n[; ;pic18f2550.h: 6163: unsigned ACKEN :1;\n[; ;pic18f2550.h: 6164: unsigned ACKDT :1;\n[; ;pic18f2550.h: 6165: unsigned ACKSTAT :1;\n[; ;pic18f2550.h: 6166: unsigned GCEN :1;\n[; ;pic18f2550.h: 6167: };\n[; ;pic18f2550.h: 6168: } SSPCON2bits_t;\n[; ;pic18f2550.h: 6169: extern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n[; ;pic18f2550.h: 6213: extern volatile unsigned char SSPCON1 @ 0xFC6;\n\"6215\n[; ;pic18f2550.h: 6215: asm(\"SSPCON1 equ 0FC6h\");\n[; <\" SSPCON1 equ 0FC6h ;# \">\n[; ;pic18f2550.h: 6218: typedef union {\n[; ;pic18f2550.h: 6219: struct {\n[; ;pic18f2550.h: 6220: unsigned SSPM :4;\n[; ;pic18f2550.h: 6221: unsigned CKP :1;\n[; ;pic18f2550.h: 6222: unsigned SSPEN :1;\n[; ;pic18f2550.h: 6223: unsigned SSPOV :1;\n[; ;pic18f2550.h: 6224: unsigned WCOL :1;\n[; ;pic18f2550.h: 6225: };\n[; ;pic18f2550.h: 6226: struct {\n[; ;pic18f2550.h: 6227: unsigned SSPM0 :1;\n[; ;pic18f2550.h: 6228: unsigned SSPM1 :1;\n[; ;pic18f2550.h: 6229: unsigned SSPM2 :1;\n[; ;pic18f2550.h: 6230: unsigned SSPM3 :1;\n[; ;pic18f2550.h: 6231: };\n[; ;pic18f2550.h: 6232: } SSPCON1bits_t;\n[; ;pic18f2550.h: 6233: extern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n[; ;pic18f2550.h: 6282: extern volatile unsigned char SSPSTAT @ 0xFC7;\n\"6284\n[; ;pic18f2550.h: 6284: asm(\"SSPSTAT equ 0FC7h\");\n[; <\" SSPSTAT equ 0FC7h ;# \">\n[; ;pic18f2550.h: 6287: typedef union {\n[; ;pic18f2550.h: 6288: struct {\n[; ;pic18f2550.h: 6289: unsigned :2;\n[; ;pic18f2550.h: 6290: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6291: };\n[; ;pic18f2550.h: 6292: struct {\n[; ;pic18f2550.h: 6293: unsigned :5;\n[; ;pic18f2550.h: 6294: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6295: };\n[; ;pic18f2550.h: 6296: struct {\n[; ;pic18f2550.h: 6297: unsigned BF :1;\n[; ;pic18f2550.h: 6298: unsigned UA :1;\n[; ;pic18f2550.h: 6299: unsigned R_nW :1;\n[; ;pic18f2550.h: 6300: unsigned S :1;\n[; ;pic18f2550.h: 6301: unsigned P :1;\n[; ;pic18f2550.h: 6302: unsigned D_nA :1;\n[; ;pic18f2550.h: 6303: unsigned CKE :1;\n[; ;pic18f2550.h: 6304: unsigned SMP :1;\n[; ;pic18f2550.h: 6305: };\n[; ;pic18f2550.h: 6306: struct {\n[; ;pic18f2550.h: 6307: unsigned :2;\n[; ;pic18f2550.h: 6308: unsigned R_NOT_W :1;\n[; ;pic18f2550.h: 6309: };\n[; ;pic18f2550.h: 6310: struct {\n[; ;pic18f2550.h: 6311: unsigned :5;\n[; ;pic18f2550.h: 6312: unsigned D_NOT_A :1;\n[; ;pic18f2550.h: 6313: };\n[; ;pic18f2550.h: 6314: struct {\n[; ;pic18f2550.h: 6315: unsigned :2;\n[; ;pic18f2550.h: 6316: unsigned R_W :1;\n[; ;pic18f2550.h: 6317: unsigned :2;\n[; ;pic18f2550.h: 6318: unsigned D_A :1;\n[; ;pic18f2550.h: 6319: };\n[; ;pic18f2550.h: 6320: struct {\n[; ;pic18f2550.h: 6321: unsigned :2;\n[; ;pic18f2550.h: 6322: unsigned I2C_READ :1;\n[; ;pic18f2550.h: 6323: unsigned I2C_START :1;\n[; ;pic18f2550.h: 6324: unsigned I2C_STOP :1;\n[; ;pic18f2550.h: 6325: unsigned I2C_DAT :1;\n[; ;pic18f2550.h: 6326: };\n[; ;pic18f2550.h: 6327: struct {\n[; ;pic18f2550.h: 6328: unsigned :2;\n[; ;pic18f2550.h: 6329: unsigned nW :1;\n[; ;pic18f2550.h: 6330: unsigned :2;\n[; ;pic18f2550.h: 6331: unsigned nA :1;\n[; ;pic18f2550.h: 6332: };\n[; ;pic18f2550.h: 6333: struct {\n[; ;pic18f2550.h: 6334: unsigned :2;\n[; ;pic18f2550.h: 6335: unsigned NOT_WRITE :1;\n[; ;pic18f2550.h: 6336: };\n[; ;pic18f2550.h: 6337: struct {\n[; ;pic18f2550.h: 6338: unsigned :5;\n[; ;pic18f2550.h: 6339: unsigned NOT_ADDRESS :1;\n[; ;pic18f2550.h: 6340: };\n[; ;pic18f2550.h: 6341: struct {\n[; ;pic18f2550.h: 6342: unsigned :2;\n[; ;pic18f2550.h: 6343: unsigned nWRITE :1;\n[; ;pic18f2550.h: 6344: unsigned :2;\n[; ;pic18f2550.h: 6345: unsigned nADDRESS :1;\n[; ;pic18f2550.h: 6346: };\n[; ;pic18f2550.h: 6347: struct {\n[; ;pic18f2550.h: 6348: unsigned :2;\n[; ;pic18f2550.h: 6349: unsigned READ_WRITE :1;\n[; ;pic18f2550.h: 6350: unsigned :2;\n[; ;pic18f2550.h: 6351: unsigned DATA_ADDRESS :1;\n[; ;pic18f2550.h: 6352: };\n[; ;pic18f2550.h: 6353: struct {\n[; ;pic18f2550.h: 6354: unsigned :2;\n[; ;pic18f2550.h: 6355: unsigned R :1;\n[; ;pic18f2550.h: 6356: unsigned :2;\n[; ;pic18f2550.h: 6357: unsigned D :1;\n[; ;pic18f2550.h: 6358: };\n[; ;pic18f2550.h: 6359: struct {\n[; ;pic18f2550.h: 6360: unsigned :5;\n[; ;pic18f2550.h: 6361: unsigned DA :1;\n[; ;pic18f2550.h: 6362: };\n[; ;pic18f2550.h: 6363: struct {\n[; ;pic18f2550.h: 6364: unsigned :2;\n[; ;pic18f2550.h: 6365: unsigned RW :1;\n[; ;pic18f2550.h: 6366: };\n[; ;pic18f2550.h: 6367: struct {\n[; ;pic18f2550.h: 6368: unsigned :3;\n[; ;pic18f2550.h: 6369: unsigned START :1;\n[; ;pic18f2550.h: 6370: };\n[; ;pic18f2550.h: 6371: struct {\n[; ;pic18f2550.h: 6372: unsigned :4;\n[; ;pic18f2550.h: 6373: unsigned STOP :1;\n[; ;pic18f2550.h: 6374: };\n[; ;pic18f2550.h: 6375: struct {\n[; ;pic18f2550.h: 6376: unsigned :2;\n[; ;pic18f2550.h: 6377: unsigned NOT_W :1;\n[; ;pic18f2550.h: 6378: };\n[; ;pic18f2550.h: 6379: struct {\n[; ;pic18f2550.h: 6380: unsigned :5;\n[; ;pic18f2550.h: 6381: unsigned NOT_A :1;\n[; ;pic18f2550.h: 6382: };\n[; ;pic18f2550.h: 6383: } SSPSTATbits_t;\n[; ;pic18f2550.h: 6384: extern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n[; ;pic18f2550.h: 6548: extern volatile unsigned char SSPADD @ 0xFC8;\n\"6550\n[; ;pic18f2550.h: 6550: asm(\"SSPADD equ 0FC8h\");\n[; <\" SSPADD equ 0FC8h ;# \">\n[; ;pic18f2550.h: 6554: extern volatile unsigned char SSPBUF @ 0xFC9;\n\"6556\n[; ;pic18f2550.h: 6556: asm(\"SSPBUF equ 0FC9h\");\n[; <\" SSPBUF equ 0FC9h ;# \">\n[; ;pic18f2550.h: 6560: extern volatile unsigned char T2CON @ 0xFCA;\n\"6562\n[; ;pic18f2550.h: 6562: asm(\"T2CON equ 0FCAh\");\n[; <\" T2CON equ 0FCAh ;# \">\n[; ;pic18f2550.h: 6565: typedef union {\n[; ;pic18f2550.h: 6566: struct {\n[; ;pic18f2550.h: 6567: unsigned T2CKPS :2;\n[; ;pic18f2550.h: 6568: unsigned TMR2ON :1;\n[; ;pic18f2550.h: 6569: unsigned TOUTPS :4;\n[; ;pic18f2550.h: 6570: };\n[; ;pic18f2550.h: 6571: struct {\n[; ;pic18f2550.h: 6572: unsigned T2CKPS0 :1;\n[; ;pic18f2550.h: 6573: unsigned T2CKPS1 :1;\n[; ;pic18f2550.h: 6574: unsigned :1;\n[; ;pic18f2550.h: 6575: unsigned T2OUTPS0 :1;\n[; ;pic18f2550.h: 6576: unsigned T2OUTPS1 :1;\n[; ;pic18f2550.h: 6577: unsigned T2OUTPS2 :1;\n[; ;pic18f2550.h: 6578: unsigned T2OUTPS3 :1;\n[; ;pic18f2550.h: 6579: };\n[; ;pic18f2550.h: 6580: struct {\n[; ;pic18f2550.h: 6581: unsigned :3;\n[; ;pic18f2550.h: 6582: unsigned TOUTPS0 :1;\n[; ;pic18f2550.h: 6583: unsigned TOUTPS1 :1;\n[; ;pic18f2550.h: 6584: unsigned TOUTPS2 :1;\n[; ;pic18f2550.h: 6585: unsigned TOUTPS3 :1;\n[; ;pic18f2550.h: 6586: };\n[; ;pic18f2550.h: 6587: } T2CONbits_t;\n[; ;pic18f2550.h: 6588: extern volatile T2CONbits_t T2CONbits @ 0xFCA;\n[; ;pic18f2550.h: 6657: extern volatile unsigned char PR2 @ 0xFCB;\n\"6659\n[; ;pic18f2550.h: 6659: asm(\"PR2 equ 0FCBh\");\n[; <\" PR2 equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6662: extern volatile unsigned char MEMCON @ 0xFCB;\n\"6664\n[; ;pic18f2550.h: 6664: asm(\"MEMCON equ 0FCBh\");\n[; <\" MEMCON equ 0FCBh ;# \">\n[; ;pic18f2550.h: 6668: extern volatile unsigned char TMR2 @ 0xFCC;\n\"6670\n[; ;pic18f2550.h: 6670: asm(\"TMR2 equ 0FCCh\");\n[; <\" TMR2 equ 0FCCh ;# \">\n[; ;pic18f2550.h: 6674: extern volatile unsigned char T1CON @ 0xFCD;\n\"6676\n[; ;pic18f2550.h: 6676: asm(\"T1CON equ 0FCDh\");\n[; <\" T1CON equ 0FCDh ;# \">\n[; ;pic18f2550.h: 6679: typedef union {\n[; ;pic18f2550.h: 6680: struct {\n[; ;pic18f2550.h: 6681: unsigned :2;\n[; ;pic18f2550.h: 6682: unsigned NOT_T1SYNC :1;\n[; ;pic18f2550.h: 6683: };\n[; ;pic18f2550.h: 6684: struct {\n[; ;pic18f2550.h: 6685: unsigned TMR1ON :1;\n[; ;pic18f2550.h: 6686: unsigned TMR1CS :1;\n[; ;pic18f2550.h: 6687: unsigned nT1SYNC :1;\n[; ;pic18f2550.h: 6688: unsigned T1OSCEN :1;\n[; ;pic18f2550.h: 6689: unsigned T1CKPS :2;\n[; ;pic18f2550.h: 6690: unsigned T1RUN :1;\n[; ;pic18f2550.h: 6691: unsigned RD16 :1;\n[; ;pic18f2550.h: 6692: };\n[; ;pic18f2550.h: 6693: struct {\n[; ;pic18f2550.h: 6694: unsigned :2;\n[; ;pic18f2550.h: 6695: unsigned T1SYNC :1;\n[; ;pic18f2550.h: 6696: unsigned :1;\n[; ;pic18f2550.h: 6697: unsigned T1CKPS0 :1;\n[; ;pic18f2550.h: 6698: unsigned T1CKPS1 :1;\n[; ;pic18f2550.h: 6699: };\n[; ;pic18f2550.h: 6700: struct {\n[; ;pic18f2550.h: 6701: unsigned :3;\n[; ;pic18f2550.h: 6702: unsigned SOSCEN :1;\n[; ;pic18f2550.h: 6703: };\n[; ;pic18f2550.h: 6704: struct {\n[; ;pic18f2550.h: 6705: unsigned :7;\n[; ;pic18f2550.h: 6706: unsigned T1RD16 :1;\n[; ;pic18f2550.h: 6707: };\n[; ;pic18f2550.h: 6708: } T1CONbits_t;\n[; ;pic18f2550.h: 6709: extern volatile T1CONbits_t T1CONbits @ 0xFCD;\n[; ;pic18f2550.h: 6778: extern volatile unsigned short TMR1 @ 0xFCE;\n\"6780\n[; ;pic18f2550.h: 6780: asm(\"TMR1 equ 0FCEh\");\n[; <\" TMR1 equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6784: extern volatile unsigned char TMR1L @ 0xFCE;\n\"6786\n[; ;pic18f2550.h: 6786: asm(\"TMR1L equ 0FCEh\");\n[; <\" TMR1L equ 0FCEh ;# \">\n[; ;pic18f2550.h: 6790: extern volatile unsigned char TMR1H @ 0xFCF;\n\"6792\n[; ;pic18f2550.h: 6792: asm(\"TMR1H equ 0FCFh\");\n[; <\" TMR1H equ 0FCFh ;# \">\n[; ;pic18f2550.h: 6796: extern volatile unsigned char RCON @ 0xFD0;\n\"6798\n[; ;pic18f2550.h: 6798: asm(\"RCON equ 0FD0h\");\n[; <\" RCON equ 0FD0h ;# \">\n[; ;pic18f2550.h: 6801: typedef union {\n[; ;pic18f2550.h: 6802: struct {\n[; ;pic18f2550.h: 6803: unsigned NOT_BOR :1;\n[; ;pic18f2550.h: 6804: };\n[; ;pic18f2550.h: 6805: struct {\n[; ;pic18f2550.h: 6806: unsigned :1;\n[; ;pic18f2550.h: 6807: unsigned NOT_POR :1;\n[; ;pic18f2550.h: 6808: };\n[; ;pic18f2550.h: 6809: struct {\n[; ;pic18f2550.h: 6810: unsigned :2;\n[; ;pic18f2550.h: 6811: unsigned NOT_PD :1;\n[; ;pic18f2550.h: 6812: };\n[; ;pic18f2550.h: 6813: struct {\n[; ;pic18f2550.h: 6814: unsigned :3;\n[; ;pic18f2550.h: 6815: unsigned NOT_TO :1;\n[; ;pic18f2550.h: 6816: };\n[; ;pic18f2550.h: 6817: struct {\n[; ;pic18f2550.h: 6818: unsigned :4;\n[; ;pic18f2550.h: 6819: unsigned NOT_RI :1;\n[; ;pic18f2550.h: 6820: };\n[; ;pic18f2550.h: 6821: struct {\n[; ;pic18f2550.h: 6822: unsigned nBOR :1;\n[; ;pic18f2550.h: 6823: unsigned nPOR :1;\n[; ;pic18f2550.h: 6824: unsigned nPD :1;\n[; ;pic18f2550.h: 6825: unsigned nTO :1;\n[; ;pic18f2550.h: 6826: unsigned nRI :1;\n[; ;pic18f2550.h: 6827: unsigned :1;\n[; ;pic18f2550.h: 6828: unsigned SBOREN :1;\n[; ;pic18f2550.h: 6829: unsigned IPEN :1;\n[; ;pic18f2550.h: 6830: };\n[; ;pic18f2550.h: 6831: struct {\n[; ;pic18f2550.h: 6832: unsigned :7;\n[; ;pic18f2550.h: 6833: unsigned NOT_IPEN :1;\n[; ;pic18f2550.h: 6834: };\n[; ;pic18f2550.h: 6835: struct {\n[; ;pic18f2550.h: 6836: unsigned BOR :1;\n[; ;pic18f2550.h: 6837: unsigned POR :1;\n[; ;pic18f2550.h: 6838: unsigned PD :1;\n[; ;pic18f2550.h: 6839: unsigned TO :1;\n[; ;pic18f2550.h: 6840: unsigned RI :1;\n[; ;pic18f2550.h: 6841: unsigned :2;\n[; ;pic18f2550.h: 6842: unsigned nIPEN :1;\n[; ;pic18f2550.h: 6843: };\n[; ;pic18f2550.h: 6844: } RCONbits_t;\n[; ;pic18f2550.h: 6845: extern volatile RCONbits_t RCONbits @ 0xFD0;\n[; ;pic18f2550.h: 6944: extern volatile unsigned char WDTCON @ 0xFD1;\n\"6946\n[; ;pic18f2550.h: 6946: asm(\"WDTCON equ 0FD1h\");\n[; <\" WDTCON equ 0FD1h ;# \">\n[; ;pic18f2550.h: 6949: typedef union {\n[; ;pic18f2550.h: 6950: struct {\n[; ;pic18f2550.h: 6951: unsigned SWDTEN :1;\n[; ;pic18f2550.h: 6952: };\n[; ;pic18f2550.h: 6953: struct {\n[; ;pic18f2550.h: 6954: unsigned SWDTE :1;\n[; ;pic18f2550.h: 6955: };\n[; ;pic18f2550.h: 6956: } WDTCONbits_t;\n[; ;pic18f2550.h: 6957: extern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n[; ;pic18f2550.h: 6971: extern volatile unsigned char HLVDCON @ 0xFD2;\n\"6973\n[; ;pic18f2550.h: 6973: asm(\"HLVDCON equ 0FD2h\");\n[; <\" HLVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6976: extern volatile unsigned char LVDCON @ 0xFD2;\n\"6978\n[; ;pic18f2550.h: 6978: asm(\"LVDCON equ 0FD2h\");\n[; <\" LVDCON equ 0FD2h ;# \">\n[; ;pic18f2550.h: 6981: typedef union {\n[; ;pic18f2550.h: 6982: struct {\n[; ;pic18f2550.h: 6983: unsigned HLVDL :4;\n[; ;pic18f2550.h: 6984: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 6985: unsigned IRVST :1;\n[; ;pic18f2550.h: 6986: unsigned :1;\n[; ;pic18f2550.h: 6987: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 6988: };\n[; ;pic18f2550.h: 6989: struct {\n[; ;pic18f2550.h: 6990: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 6991: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 6992: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 6993: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 6994: };\n[; ;pic18f2550.h: 6995: struct {\n[; ;pic18f2550.h: 6996: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 6997: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 6998: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 6999: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7000: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7001: unsigned IVRST :1;\n[; ;pic18f2550.h: 7002: };\n[; ;pic18f2550.h: 7003: struct {\n[; ;pic18f2550.h: 7004: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7005: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7006: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7007: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7008: unsigned :1;\n[; ;pic18f2550.h: 7009: unsigned BGST :1;\n[; ;pic18f2550.h: 7010: };\n[; ;pic18f2550.h: 7011: } HLVDCONbits_t;\n[; ;pic18f2550.h: 7012: extern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7110: typedef union {\n[; ;pic18f2550.h: 7111: struct {\n[; ;pic18f2550.h: 7112: unsigned HLVDL :4;\n[; ;pic18f2550.h: 7113: unsigned HLVDEN :1;\n[; ;pic18f2550.h: 7114: unsigned IRVST :1;\n[; ;pic18f2550.h: 7115: unsigned :1;\n[; ;pic18f2550.h: 7116: unsigned VDIRMAG :1;\n[; ;pic18f2550.h: 7117: };\n[; ;pic18f2550.h: 7118: struct {\n[; ;pic18f2550.h: 7119: unsigned HLVDL0 :1;\n[; ;pic18f2550.h: 7120: unsigned HLVDL1 :1;\n[; ;pic18f2550.h: 7121: unsigned HLVDL2 :1;\n[; ;pic18f2550.h: 7122: unsigned HLVDL3 :1;\n[; ;pic18f2550.h: 7123: };\n[; ;pic18f2550.h: 7124: struct {\n[; ;pic18f2550.h: 7125: unsigned LVDL0 :1;\n[; ;pic18f2550.h: 7126: unsigned LVDL1 :1;\n[; ;pic18f2550.h: 7127: unsigned LVDL2 :1;\n[; ;pic18f2550.h: 7128: unsigned LVDL3 :1;\n[; ;pic18f2550.h: 7129: unsigned LVDEN :1;\n[; ;pic18f2550.h: 7130: unsigned IVRST :1;\n[; ;pic18f2550.h: 7131: };\n[; ;pic18f2550.h: 7132: struct {\n[; ;pic18f2550.h: 7133: unsigned LVV0 :1;\n[; ;pic18f2550.h: 7134: unsigned LVV1 :1;\n[; ;pic18f2550.h: 7135: unsigned LVV2 :1;\n[; ;pic18f2550.h: 7136: unsigned LVV3 :1;\n[; ;pic18f2550.h: 7137: unsigned :1;\n[; ;pic18f2550.h: 7138: unsigned BGST :1;\n[; ;pic18f2550.h: 7139: };\n[; ;pic18f2550.h: 7140: } LVDCONbits_t;\n[; ;pic18f2550.h: 7141: extern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n[; ;pic18f2550.h: 7240: extern volatile unsigned char OSCCON @ 0xFD3;\n\"7242\n[; ;pic18f2550.h: 7242: asm(\"OSCCON equ 0FD3h\");\n[; <\" OSCCON equ 0FD3h ;# \">\n[; ;pic18f2550.h: 7245: typedef union {\n[; ;pic18f2550.h: 7246: struct {\n[; ;pic18f2550.h: 7247: unsigned SCS :2;\n[; ;pic18f2550.h: 7248: unsigned IOFS :1;\n[; ;pic18f2550.h: 7249: unsigned OSTS :1;\n[; ;pic18f2550.h: 7250: unsigned IRCF :3;\n[; ;pic18f2550.h: 7251: unsigned IDLEN :1;\n[; ;pic18f2550.h: 7252: };\n[; ;pic18f2550.h: 7253: struct {\n[; ;pic18f2550.h: 7254: unsigned SCS0 :1;\n[; ;pic18f2550.h: 7255: unsigned SCS1 :1;\n[; ;pic18f2550.h: 7256: unsigned FLTS :1;\n[; ;pic18f2550.h: 7257: unsigned :1;\n[; ;pic18f2550.h: 7258: unsigned IRCF0 :1;\n[; ;pic18f2550.h: 7259: unsigned IRCF1 :1;\n[; ;pic18f2550.h: 7260: unsigned IRCF2 :1;\n[; ;pic18f2550.h: 7261: };\n[; ;pic18f2550.h: 7262: } OSCCONbits_t;\n[; ;pic18f2550.h: 7263: extern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n[; ;pic18f2550.h: 7322: extern volatile unsigned char T0CON @ 0xFD5;\n\"7324\n[; ;pic18f2550.h: 7324: asm(\"T0CON equ 0FD5h\");\n[; <\" T0CON equ 0FD5h ;# \">\n[; ;pic18f2550.h: 7327: typedef union {\n[; ;pic18f2550.h: 7328: struct {\n[; ;pic18f2550.h: 7329: unsigned T0PS :3;\n[; ;pic18f2550.h: 7330: unsigned PSA :1;\n[; ;pic18f2550.h: 7331: unsigned T0SE :1;\n[; ;pic18f2550.h: 7332: unsigned T0CS :1;\n[; ;pic18f2550.h: 7333: unsigned T08BIT :1;\n[; ;pic18f2550.h: 7334: unsigned TMR0ON :1;\n[; ;pic18f2550.h: 7335: };\n[; ;pic18f2550.h: 7336: struct {\n[; ;pic18f2550.h: 7337: unsigned T0PS0 :1;\n[; ;pic18f2550.h: 7338: unsigned T0PS1 :1;\n[; ;pic18f2550.h: 7339: unsigned T0PS2 :1;\n[; ;pic18f2550.h: 7340: };\n[; ;pic18f2550.h: 7341: } T0CONbits_t;\n[; ;pic18f2550.h: 7342: extern volatile T0CONbits_t T0CONbits @ 0xFD5;\n[; ;pic18f2550.h: 7391: extern volatile unsigned short TMR0 @ 0xFD6;\n\"7393\n[; ;pic18f2550.h: 7393: asm(\"TMR0 equ 0FD6h\");\n[; <\" TMR0 equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7397: extern volatile unsigned char TMR0L @ 0xFD6;\n\"7399\n[; ;pic18f2550.h: 7399: asm(\"TMR0L equ 0FD6h\");\n[; <\" TMR0L equ 0FD6h ;# \">\n[; ;pic18f2550.h: 7403: extern volatile unsigned char TMR0H @ 0xFD7;\n\"7405\n[; ;pic18f2550.h: 7405: asm(\"TMR0H equ 0FD7h\");\n[; <\" TMR0H equ 0FD7h ;# \">\n[; ;pic18f2550.h: 7409: extern volatile unsigned char STATUS @ 0xFD8;\n\"7411\n[; ;pic18f2550.h: 7411: asm(\"STATUS equ 0FD8h\");\n[; <\" STATUS equ 0FD8h ;# \">\n[; ;pic18f2550.h: 7414: typedef union {\n[; ;pic18f2550.h: 7415: struct {\n[; ;pic18f2550.h: 7416: unsigned C :1;\n[; ;pic18f2550.h: 7417: unsigned DC :1;\n[; ;pic18f2550.h: 7418: unsigned Z :1;\n[; ;pic18f2550.h: 7419: unsigned OV :1;\n[; ;pic18f2550.h: 7420: unsigned N :1;\n[; ;pic18f2550.h: 7421: };\n[; ;pic18f2550.h: 7422: struct {\n[; ;pic18f2550.h: 7423: unsigned CARRY :1;\n[; ;pic18f2550.h: 7424: };\n[; ;pic18f2550.h: 7425: struct {\n[; ;pic18f2550.h: 7426: unsigned :4;\n[; ;pic18f2550.h: 7427: unsigned NEGATIVE :1;\n[; ;pic18f2550.h: 7428: };\n[; ;pic18f2550.h: 7429: struct {\n[; ;pic18f2550.h: 7430: unsigned :3;\n[; ;pic18f2550.h: 7431: unsigned OVERFLOW :1;\n[; ;pic18f2550.h: 7432: };\n[; ;pic18f2550.h: 7433: struct {\n[; ;pic18f2550.h: 7434: unsigned :2;\n[; ;pic18f2550.h: 7435: unsigned ZERO :1;\n[; ;pic18f2550.h: 7436: };\n[; ;pic18f2550.h: 7437: } STATUSbits_t;\n[; ;pic18f2550.h: 7438: extern volatile STATUSbits_t STATUSbits @ 0xFD8;\n[; ;pic18f2550.h: 7487: extern volatile unsigned short FSR2 @ 0xFD9;\n\"7489\n[; ;pic18f2550.h: 7489: asm(\"FSR2 equ 0FD9h\");\n[; <\" FSR2 equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7493: extern volatile unsigned char FSR2L @ 0xFD9;\n\"7495\n[; ;pic18f2550.h: 7495: asm(\"FSR2L equ 0FD9h\");\n[; <\" FSR2L equ 0FD9h ;# \">\n[; ;pic18f2550.h: 7499: extern volatile unsigned char FSR2H @ 0xFDA;\n\"7501\n[; ;pic18f2550.h: 7501: asm(\"FSR2H equ 0FDAh\");\n[; <\" FSR2H equ 0FDAh ;# \">\n[; ;pic18f2550.h: 7505: extern volatile unsigned char PLUSW2 @ 0xFDB;\n\"7507\n[; ;pic18f2550.h: 7507: asm(\"PLUSW2 equ 0FDBh\");\n[; <\" PLUSW2 equ 0FDBh ;# \">\n[; ;pic18f2550.h: 7511: extern volatile unsigned char PREINC2 @ 0xFDC;\n\"7513\n[; ;pic18f2550.h: 7513: asm(\"PREINC2 equ 0FDCh\");\n[; <\" PREINC2 equ 0FDCh ;# \">\n[; ;pic18f2550.h: 7517: extern volatile unsigned char POSTDEC2 @ 0xFDD;\n\"7519\n[; ;pic18f2550.h: 7519: asm(\"POSTDEC2 equ 0FDDh\");\n[; <\" POSTDEC2 equ 0FDDh ;# \">\n[; ;pic18f2550.h: 7523: extern volatile unsigned char POSTINC2 @ 0xFDE;\n\"7525\n[; ;pic18f2550.h: 7525: asm(\"POSTINC2 equ 0FDEh\");\n[; <\" POSTINC2 equ 0FDEh ;# \">\n[; ;pic18f2550.h: 7529: extern volatile unsigned char INDF2 @ 0xFDF;\n\"7531\n[; ;pic18f2550.h: 7531: asm(\"INDF2 equ 0FDFh\");\n[; <\" INDF2 equ 0FDFh ;# \">\n[; ;pic18f2550.h: 7535: extern volatile unsigned char BSR @ 0xFE0;\n\"7537\n[; ;pic18f2550.h: 7537: asm(\"BSR equ 0FE0h\");\n[; <\" BSR equ 0FE0h ;# \">\n[; ;pic18f2550.h: 7541: extern volatile unsigned short FSR1 @ 0xFE1;\n\"7543\n[; ;pic18f2550.h: 7543: asm(\"FSR1 equ 0FE1h\");\n[; <\" FSR1 equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7547: extern volatile unsigned char FSR1L @ 0xFE1;\n\"7549\n[; ;pic18f2550.h: 7549: asm(\"FSR1L equ 0FE1h\");\n[; <\" FSR1L equ 0FE1h ;# \">\n[; ;pic18f2550.h: 7553: extern volatile unsigned char FSR1H @ 0xFE2;\n\"7555\n[; ;pic18f2550.h: 7555: asm(\"FSR1H equ 0FE2h\");\n[; <\" FSR1H equ 0FE2h ;# \">\n[; ;pic18f2550.h: 7559: extern volatile unsigned char PLUSW1 @ 0xFE3;\n\"7561\n[; ;pic18f2550.h: 7561: asm(\"PLUSW1 equ 0FE3h\");\n[; <\" PLUSW1 equ 0FE3h ;# \">\n[; ;pic18f2550.h: 7565: extern volatile unsigned char PREINC1 @ 0xFE4;\n\"7567\n[; ;pic18f2550.h: 7567: asm(\"PREINC1 equ 0FE4h\");\n[; <\" PREINC1 equ 0FE4h ;# \">\n[; ;pic18f2550.h: 7571: extern volatile unsigned char POSTDEC1 @ 0xFE5;\n\"7573\n[; ;pic18f2550.h: 7573: asm(\"POSTDEC1 equ 0FE5h\");\n[; <\" POSTDEC1 equ 0FE5h ;# \">\n[; ;pic18f2550.h: 7577: extern volatile unsigned char POSTINC1 @ 0xFE6;\n\"7579\n[; ;pic18f2550.h: 7579: asm(\"POSTINC1 equ 0FE6h\");\n[; <\" POSTINC1 equ 0FE6h ;# \">\n[; ;pic18f2550.h: 7583: extern volatile unsigned char INDF1 @ 0xFE7;\n\"7585\n[; ;pic18f2550.h: 7585: asm(\"INDF1 equ 0FE7h\");\n[; <\" INDF1 equ 0FE7h ;# \">\n[; ;pic18f2550.h: 7589: extern volatile unsigned char WREG @ 0xFE8;\n\"7591\n[; ;pic18f2550.h: 7591: asm(\"WREG equ 0FE8h\");\n[; <\" WREG equ 0FE8h ;# \">\n[; ;pic18f2550.h: 7595: extern volatile unsigned short FSR0 @ 0xFE9;\n\"7597\n[; ;pic18f2550.h: 7597: asm(\"FSR0 equ 0FE9h\");\n[; <\" FSR0 equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7601: extern volatile unsigned char FSR0L @ 0xFE9;\n\"7603\n[; ;pic18f2550.h: 7603: asm(\"FSR0L equ 0FE9h\");\n[; <\" FSR0L equ 0FE9h ;# \">\n[; ;pic18f2550.h: 7607: extern volatile unsigned char FSR0H @ 0xFEA;\n\"7609\n[; ;pic18f2550.h: 7609: asm(\"FSR0H equ 0FEAh\");\n[; <\" FSR0H equ 0FEAh ;# \">\n[; ;pic18f2550.h: 7613: extern volatile unsigned char PLUSW0 @ 0xFEB;\n\"7615\n[; ;pic18f2550.h: 7615: asm(\"PLUSW0 equ 0FEBh\");\n[; <\" PLUSW0 equ 0FEBh ;# \">\n[; ;pic18f2550.h: 7619: extern volatile unsigned char PREINC0 @ 0xFEC;\n\"7621\n[; ;pic18f2550.h: 7621: asm(\"PREINC0 equ 0FECh\");\n[; <\" PREINC0 equ 0FECh ;# \">\n[; ;pic18f2550.h: 7625: extern volatile unsigned char POSTDEC0 @ 0xFED;\n\"7627\n[; ;pic18f2550.h: 7627: asm(\"POSTDEC0 equ 0FEDh\");\n[; <\" POSTDEC0 equ 0FEDh ;# \">\n[; ;pic18f2550.h: 7631: extern volatile unsigned char POSTINC0 @ 0xFEE;\n\"7633\n[; ;pic18f2550.h: 7633: asm(\"POSTINC0 equ 0FEEh\");\n[; <\" POSTINC0 equ 0FEEh ;# \">\n[; ;pic18f2550.h: 7637: extern volatile unsigned char INDF0 @ 0xFEF;\n\"7639\n[; ;pic18f2550.h: 7639: asm(\"INDF0 equ 0FEFh\");\n[; <\" INDF0 equ 0FEFh ;# \">\n[; ;pic18f2550.h: 7643: extern volatile unsigned char INTCON3 @ 0xFF0;\n\"7645\n[; ;pic18f2550.h: 7645: asm(\"INTCON3 equ 0FF0h\");\n[; <\" INTCON3 equ 0FF0h ;# \">\n[; ;pic18f2550.h: 7648: typedef union {\n[; ;pic18f2550.h: 7649: struct {\n[; ;pic18f2550.h: 7650: unsigned INT1IF :1;\n[; ;pic18f2550.h: 7651: unsigned INT2IF :1;\n[; ;pic18f2550.h: 7652: unsigned :1;\n[; ;pic18f2550.h: 7653: unsigned INT1IE :1;\n[; ;pic18f2550.h: 7654: unsigned INT2IE :1;\n[; ;pic18f2550.h: 7655: unsigned :1;\n[; ;pic18f2550.h: 7656: unsigned INT1IP :1;\n[; ;pic18f2550.h: 7657: unsigned INT2IP :1;\n[; ;pic18f2550.h: 7658: };\n[; ;pic18f2550.h: 7659: struct {\n[; ;pic18f2550.h: 7660: unsigned INT1F :1;\n[; ;pic18f2550.h: 7661: unsigned INT2F :1;\n[; ;pic18f2550.h: 7662: unsigned :1;\n[; ;pic18f2550.h: 7663: unsigned INT1E :1;\n[; ;pic18f2550.h: 7664: unsigned INT2E :1;\n[; ;pic18f2550.h: 7665: unsigned :1;\n[; ;pic18f2550.h: 7666: unsigned INT1P :1;\n[; ;pic18f2550.h: 7667: unsigned INT2P :1;\n[; ;pic18f2550.h: 7668: };\n[; ;pic18f2550.h: 7669: } INTCON3bits_t;\n[; ;pic18f2550.h: 7670: extern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n[; ;pic18f2550.h: 7734: extern volatile unsigned char INTCON2 @ 0xFF1;\n\"7736\n[; ;pic18f2550.h: 7736: asm(\"INTCON2 equ 0FF1h\");\n[; <\" INTCON2 equ 0FF1h ;# \">\n[; ;pic18f2550.h: 7739: typedef union {\n[; ;pic18f2550.h: 7740: struct {\n[; ;pic18f2550.h: 7741: unsigned :7;\n[; ;pic18f2550.h: 7742: unsigned NOT_RBPU :1;\n[; ;pic18f2550.h: 7743: };\n[; ;pic18f2550.h: 7744: struct {\n[; ;pic18f2550.h: 7745: unsigned RBIP :1;\n[; ;pic18f2550.h: 7746: unsigned :1;\n[; ;pic18f2550.h: 7747: unsigned TMR0IP :1;\n[; ;pic18f2550.h: 7748: unsigned :1;\n[; ;pic18f2550.h: 7749: unsigned INTEDG2 :1;\n[; ;pic18f2550.h: 7750: unsigned INTEDG1 :1;\n[; ;pic18f2550.h: 7751: unsigned INTEDG0 :1;\n[; ;pic18f2550.h: 7752: unsigned nRBPU :1;\n[; ;pic18f2550.h: 7753: };\n[; ;pic18f2550.h: 7754: struct {\n[; ;pic18f2550.h: 7755: unsigned :2;\n[; ;pic18f2550.h: 7756: unsigned T0IP :1;\n[; ;pic18f2550.h: 7757: unsigned :4;\n[; ;pic18f2550.h: 7758: unsigned RBPU :1;\n[; ;pic18f2550.h: 7759: };\n[; ;pic18f2550.h: 7760: } INTCON2bits_t;\n[; ;pic18f2550.h: 7761: extern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n[; ;pic18f2550.h: 7810: extern volatile unsigned char INTCON @ 0xFF2;\n\"7812\n[; ;pic18f2550.h: 7812: asm(\"INTCON equ 0FF2h\");\n[; <\" INTCON equ 0FF2h ;# \">\n[; ;pic18f2550.h: 7815: typedef union {\n[; ;pic18f2550.h: 7816: struct {\n[; ;pic18f2550.h: 7817: unsigned RBIF :1;\n[; ;pic18f2550.h: 7818: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7819: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7820: unsigned RBIE :1;\n[; ;pic18f2550.h: 7821: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7822: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7823: unsigned PEIE_GIEL :1;\n[; ;pic18f2550.h: 7824: unsigned GIE_GIEH :1;\n[; ;pic18f2550.h: 7825: };\n[; ;pic18f2550.h: 7826: struct {\n[; ;pic18f2550.h: 7827: unsigned RBIF :1;\n[; ;pic18f2550.h: 7828: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7829: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7830: unsigned RBIE :1;\n[; ;pic18f2550.h: 7831: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7832: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7833: unsigned PEIE :1;\n[; ;pic18f2550.h: 7834: unsigned GIE :1;\n[; ;pic18f2550.h: 7835: };\n[; ;pic18f2550.h: 7836: struct {\n[; ;pic18f2550.h: 7837: unsigned RBIF :1;\n[; ;pic18f2550.h: 7838: unsigned INT0IF :1;\n[; ;pic18f2550.h: 7839: unsigned TMR0IF :1;\n[; ;pic18f2550.h: 7840: unsigned RBIE :1;\n[; ;pic18f2550.h: 7841: unsigned INT0IE :1;\n[; ;pic18f2550.h: 7842: unsigned TMR0IE :1;\n[; ;pic18f2550.h: 7843: unsigned GIEL :1;\n[; ;pic18f2550.h: 7844: unsigned GIEH :1;\n[; ;pic18f2550.h: 7845: };\n[; ;pic18f2550.h: 7846: struct {\n[; ;pic18f2550.h: 7847: unsigned :1;\n[; ;pic18f2550.h: 7848: unsigned INT0F :1;\n[; ;pic18f2550.h: 7849: unsigned T0IF :1;\n[; ;pic18f2550.h: 7850: unsigned :1;\n[; ;pic18f2550.h: 7851: unsigned INT0E :1;\n[; ;pic18f2550.h: 7852: unsigned T0IE :1;\n[; ;pic18f2550.h: 7853: unsigned PEIE :1;\n[; ;pic18f2550.h: 7854: unsigned GIE :1;\n[; ;pic18f2550.h: 7855: };\n[; ;pic18f2550.h: 7856: struct {\n[; ;pic18f2550.h: 7857: unsigned :6;\n[; ;pic18f2550.h: 7858: unsigned GIEL :1;\n[; ;pic18f2550.h: 7859: unsigned GIEH :1;\n[; ;pic18f2550.h: 7860: };\n[; ;pic18f2550.h: 7861: } INTCONbits_t;\n[; ;pic18f2550.h: 7862: extern volatile INTCONbits_t INTCONbits @ 0xFF2;\n[; ;pic18f2550.h: 7946: extern volatile unsigned short PROD @ 0xFF3;\n\"7948\n[; ;pic18f2550.h: 7948: asm(\"PROD equ 0FF3h\");\n[; <\" PROD equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7952: extern volatile unsigned char PRODL @ 0xFF3;\n\"7954\n[; ;pic18f2550.h: 7954: asm(\"PRODL equ 0FF3h\");\n[; <\" PRODL equ 0FF3h ;# \">\n[; ;pic18f2550.h: 7958: extern volatile unsigned char PRODH @ 0xFF4;\n\"7960\n[; ;pic18f2550.h: 7960: asm(\"PRODH equ 0FF4h\");\n[; <\" PRODH equ 0FF4h ;# \">\n[; ;pic18f2550.h: 7964: extern volatile unsigned char TABLAT @ 0xFF5;\n\"7966\n[; ;pic18f2550.h: 7966: asm(\"TABLAT equ 0FF5h\");\n[; <\" TABLAT equ 0FF5h ;# \">\n[; ;pic18f2550.h: 7971: extern volatile unsigned short long TBLPTR @ 0xFF6;\n\"7974\n[; ;pic18f2550.h: 7974: asm(\"TBLPTR equ 0FF6h\");\n[; <\" TBLPTR equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7978: extern volatile unsigned char TBLPTRL @ 0xFF6;\n\"7980\n[; ;pic18f2550.h: 7980: asm(\"TBLPTRL equ 0FF6h\");\n[; <\" TBLPTRL equ 0FF6h ;# \">\n[; ;pic18f2550.h: 7984: extern volatile unsigned char TBLPTRH @ 0xFF7;\n\"7986\n[; ;pic18f2550.h: 7986: asm(\"TBLPTRH equ 0FF7h\");\n[; <\" TBLPTRH equ 0FF7h ;# \">\n[; ;pic18f2550.h: 7990: extern volatile unsigned char TBLPTRU @ 0xFF8;\n\"7992\n[; ;pic18f2550.h: 7992: asm(\"TBLPTRU equ 0FF8h\");\n[; <\" TBLPTRU equ 0FF8h ;# \">\n[; ;pic18f2550.h: 7997: extern volatile unsigned short long PCLAT @ 0xFF9;\n\"8000\n[; ;pic18f2550.h: 8000: asm(\"PCLAT equ 0FF9h\");\n[; <\" PCLAT equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8004: extern volatile unsigned short long PC @ 0xFF9;\n\"8007\n[; ;pic18f2550.h: 8007: asm(\"PC equ 0FF9h\");\n[; <\" PC equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8011: extern volatile unsigned char PCL @ 0xFF9;\n\"8013\n[; ;pic18f2550.h: 8013: asm(\"PCL equ 0FF9h\");\n[; <\" PCL equ 0FF9h ;# \">\n[; ;pic18f2550.h: 8017: extern volatile unsigned char PCLATH @ 0xFFA;\n\"8019\n[; ;pic18f2550.h: 8019: asm(\"PCLATH equ 0FFAh\");\n[; <\" PCLATH equ 0FFAh ;# \">\n[; ;pic18f2550.h: 8023: extern volatile unsigned char PCLATU @ 0xFFB;\n\"8025\n[; ;pic18f2550.h: 8025: asm(\"PCLATU equ 0FFBh\");\n[; <\" PCLATU equ 0FFBh ;# \">\n[; ;pic18f2550.h: 8029: extern volatile unsigned char STKPTR @ 0xFFC;\n\"8031\n[; ;pic18f2550.h: 8031: asm(\"STKPTR equ 0FFCh\");\n[; <\" STKPTR equ 0FFCh ;# \">\n[; ;pic18f2550.h: 8034: typedef union {\n[; ;pic18f2550.h: 8035: struct {\n[; ;pic18f2550.h: 8036: unsigned STKPTR :5;\n[; ;pic18f2550.h: 8037: unsigned :1;\n[; ;pic18f2550.h: 8038: unsigned STKUNF :1;\n[; ;pic18f2550.h: 8039: unsigned STKFUL :1;\n[; ;pic18f2550.h: 8040: };\n[; ;pic18f2550.h: 8041: struct {\n[; ;pic18f2550.h: 8042: unsigned STKPTR0 :1;\n[; ;pic18f2550.h: 8043: unsigned STKPTR1 :1;\n[; ;pic18f2550.h: 8044: unsigned STKPTR2 :1;\n[; ;pic18f2550.h: 8045: unsigned STKPTR3 :1;\n[; ;pic18f2550.h: 8046: unsigned STKPTR4 :1;\n[; ;pic18f2550.h: 8047: };\n[; ;pic18f2550.h: 8048: struct {\n[; ;pic18f2550.h: 8049: unsigned :7;\n[; ;pic18f2550.h: 8050: unsigned STKOVF :1;\n[; ;pic18f2550.h: 8051: };\n[; ;pic18f2550.h: 8052: } STKPTRbits_t;\n[; ;pic18f2550.h: 8053: extern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n[; ;pic18f2550.h: 8103: extern volatile unsigned short long TOS @ 0xFFD;\n\"8106\n[; ;pic18f2550.h: 8106: asm(\"TOS equ 0FFDh\");\n[; <\" TOS equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8110: extern volatile unsigned char TOSL @ 0xFFD;\n\"8112\n[; ;pic18f2550.h: 8112: asm(\"TOSL equ 0FFDh\");\n[; <\" TOSL equ 0FFDh ;# \">\n[; ;pic18f2550.h: 8116: extern volatile unsigned char TOSH @ 0xFFE;\n\"8118\n[; ;pic18f2550.h: 8118: asm(\"TOSH equ 0FFEh\");\n[; <\" TOSH equ 0FFEh ;# \">\n[; ;pic18f2550.h: 8122: extern volatile unsigned char TOSU @ 0xFFF;\n\"8124\n[; ;pic18f2550.h: 8124: asm(\"TOSU equ 0FFFh\");\n[; <\" TOSU equ 0FFFh ;# \">\n[; ;pic18f2550.h: 8134: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n[; ;pic18f2550.h: 8136: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n[; ;pic18f2550.h: 8138: extern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n[; ;pic18f2550.h: 8140: extern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n[; ;pic18f2550.h: 8142: extern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n[; ;pic18f2550.h: 8144: extern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n[; ;pic18f2550.h: 8146: extern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n[; ;pic18f2550.h: 8148: extern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n[; ;pic18f2550.h: 8150: extern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n[; ;pic18f2550.h: 8152: extern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n[; ;pic18f2550.h: 8154: extern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n[; ;pic18f2550.h: 8156: extern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n[; ;pic18f2550.h: 8158: extern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n[; ;pic18f2550.h: 8160: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8162: extern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n[; ;pic18f2550.h: 8164: extern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n[; ;pic18f2550.h: 8166: extern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n[; ;pic18f2550.h: 8168: extern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n[; ;pic18f2550.h: 8170: extern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n[; ;pic18f2550.h: 8172: extern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n[; ;pic18f2550.h: 8174: extern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n[; ;pic18f2550.h: 8176: extern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n[; ;pic18f2550.h: 8178: extern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n[; ;pic18f2550.h: 8180: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n[; ;pic18f2550.h: 8182: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n[; ;pic18f2550.h: 8184: extern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n[; ;pic18f2550.h: 8186: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n[; ;pic18f2550.h: 8188: extern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 8190: extern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 8192: extern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 8194: extern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 8196: extern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8198: extern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n[; ;pic18f2550.h: 8200: extern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n[; ;pic18f2550.h: 8202: extern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n[; ;pic18f2550.h: 8204: extern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n[; ;pic18f2550.h: 8206: extern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8208: extern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8210: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n[; ;pic18f2550.h: 8212: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8214: extern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n[; ;pic18f2550.h: 8216: extern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n[; ;pic18f2550.h: 8218: extern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n[; ;pic18f2550.h: 8220: extern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n[; ;pic18f2550.h: 8222: extern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n[; ;pic18f2550.h: 8224: extern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n[; ;pic18f2550.h: 8226: extern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n[; ;pic18f2550.h: 8228: extern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n[; ;pic18f2550.h: 8230: extern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n[; ;pic18f2550.h: 8232: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n[; ;pic18f2550.h: 8234: extern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8236: extern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8238: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n[; ;pic18f2550.h: 8240: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n[; ;pic18f2550.h: 8242: extern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n[; ;pic18f2550.h: 8244: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n[; ;pic18f2550.h: 8246: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n[; ;pic18f2550.h: 8248: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n[; ;pic18f2550.h: 8250: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n[; ;pic18f2550.h: 8252: extern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8254: extern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8256: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n[; ;pic18f2550.h: 8258: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n[; ;pic18f2550.h: 8260: extern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n[; ;pic18f2550.h: 8262: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n[; ;pic18f2550.h: 8264: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n[; ;pic18f2550.h: 8266: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n[; ;pic18f2550.h: 8268: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n[; ;pic18f2550.h: 8270: extern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 8272: extern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8274: extern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8276: extern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8278: extern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8280: extern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8282: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n[; ;pic18f2550.h: 8284: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n[; ;pic18f2550.h: 8286: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n[; ;pic18f2550.h: 8288: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n[; ;pic18f2550.h: 8290: extern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8292: extern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n[; ;pic18f2550.h: 8294: extern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 8296: extern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n[; ;pic18f2550.h: 8298: extern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n[; ;pic18f2550.h: 8300: extern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8302: extern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8304: extern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8306: extern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n[; ;pic18f2550.h: 8308: extern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n[; ;pic18f2550.h: 8310: extern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n[; ;pic18f2550.h: 8312: extern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n[; ;pic18f2550.h: 8314: extern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n[; ;pic18f2550.h: 8316: extern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n[; ;pic18f2550.h: 8318: extern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n[; ;pic18f2550.h: 8320: extern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n[; ;pic18f2550.h: 8322: extern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n[; ;pic18f2550.h: 8324: extern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n[; ;pic18f2550.h: 8326: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n[; ;pic18f2550.h: 8328: extern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8330: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8332: extern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n[; ;pic18f2550.h: 8334: extern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n[; ;pic18f2550.h: 8336: extern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n[; ;pic18f2550.h: 8338: extern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n[; ;pic18f2550.h: 8340: extern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n[; ;pic18f2550.h: 8342: extern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8344: extern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n[; ;pic18f2550.h: 8346: extern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8348: extern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n[; ;pic18f2550.h: 8350: extern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n[; ;pic18f2550.h: 8352: extern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n[; ;pic18f2550.h: 8354: extern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8356: extern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8358: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n[; ;pic18f2550.h: 8360: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n[; ;pic18f2550.h: 8362: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n[; ;pic18f2550.h: 8364: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n[; ;pic18f2550.h: 8366: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n[; ;pic18f2550.h: 8368: extern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n[; ;pic18f2550.h: 8370: extern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n[; ;pic18f2550.h: 8372: extern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n[; ;pic18f2550.h: 8374: extern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8376: extern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 8378: extern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8380: extern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8382: extern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8384: extern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n[; ;pic18f2550.h: 8386: extern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n[; ;pic18f2550.h: 8388: extern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n[; ;pic18f2550.h: 8390: extern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n[; ;pic18f2550.h: 8392: extern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n[; ;pic18f2550.h: 8394: extern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n[; ;pic18f2550.h: 8396: extern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n[; ;pic18f2550.h: 8398: extern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n[; ;pic18f2550.h: 8400: extern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n[; ;pic18f2550.h: 8402: extern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n[; ;pic18f2550.h: 8404: extern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n[; ;pic18f2550.h: 8406: extern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n[; ;pic18f2550.h: 8408: extern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n[; ;pic18f2550.h: 8410: extern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8412: extern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8414: extern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8416: extern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8418: extern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8420: extern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8422: extern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8424: extern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8426: extern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8428: extern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8430: extern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8432: extern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8434: extern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8436: extern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8438: extern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8440: extern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8442: extern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8444: extern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8446: extern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8448: extern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8450: extern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8452: extern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8454: extern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8456: extern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8458: extern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8460: extern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8462: extern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8464: extern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8466: extern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8468: extern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8470: extern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8472: extern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8474: extern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8476: extern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8478: extern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8480: extern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8482: extern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8484: extern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8486: extern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8488: extern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8490: extern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n[; ;pic18f2550.h: 8492: extern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n[; ;pic18f2550.h: 8494: extern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n[; ;pic18f2550.h: 8496: extern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n[; ;pic18f2550.h: 8498: extern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n[; ;pic18f2550.h: 8500: extern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n[; ;pic18f2550.h: 8502: extern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n[; ;pic18f2550.h: 8504: extern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n[; ;pic18f2550.h: 8506: extern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n[; ;pic18f2550.h: 8508: extern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n[; ;pic18f2550.h: 8510: extern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n[; ;pic18f2550.h: 8512: extern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n[; ;pic18f2550.h: 8514: extern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n[; ;pic18f2550.h: 8516: extern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n[; ;pic18f2550.h: 8518: extern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n[; ;pic18f2550.h: 8520: extern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n[; ;pic18f2550.h: 8522: extern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n[; ;pic18f2550.h: 8524: extern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n[; ;pic18f2550.h: 8526: extern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n[; ;pic18f2550.h: 8528: extern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n[; ;pic18f2550.h: 8530: extern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n[; ;pic18f2550.h: 8532: extern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n[; ;pic18f2550.h: 8534: extern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n[; ;pic18f2550.h: 8536: extern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n[; ;pic18f2550.h: 8538: extern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n[; ;pic18f2550.h: 8540: extern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n[; ;pic18f2550.h: 8542: extern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n[; ;pic18f2550.h: 8544: extern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n[; ;pic18f2550.h: 8546: extern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n[; ;pic18f2550.h: 8548: extern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n[; ;pic18f2550.h: 8550: extern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n[; ;pic18f2550.h: 8552: extern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n[; ;pic18f2550.h: 8554: extern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n[; ;pic18f2550.h: 8556: extern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n[; ;pic18f2550.h: 8558: extern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n[; ;pic18f2550.h: 8560: extern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n[; ;pic18f2550.h: 8562: extern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n[; ;pic18f2550.h: 8564: extern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n[; ;pic18f2550.h: 8566: extern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n[; ;pic18f2550.h: 8568: extern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n[; ;pic18f2550.h: 8570: extern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n[; ;pic18f2550.h: 8572: extern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n[; ;pic18f2550.h: 8574: extern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n[; ;pic18f2550.h: 8576: extern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n[; ;pic18f2550.h: 8578: extern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n[; ;pic18f2550.h: 8580: extern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n[; ;pic18f2550.h: 8582: extern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n[; ;pic18f2550.h: 8584: extern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n[; ;pic18f2550.h: 8586: extern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n[; ;pic18f2550.h: 8588: extern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n[; ;pic18f2550.h: 8590: extern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n[; ;pic18f2550.h: 8592: extern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n[; ;pic18f2550.h: 8594: extern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n[; ;pic18f2550.h: 8596: extern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n[; ;pic18f2550.h: 8598: extern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n[; ;pic18f2550.h: 8600: extern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n[; ;pic18f2550.h: 8602: extern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n[; ;pic18f2550.h: 8604: extern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n[; ;pic18f2550.h: 8606: extern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n[; ;pic18f2550.h: 8608: extern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n[; ;pic18f2550.h: 8610: extern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n[; ;pic18f2550.h: 8612: extern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n[; ;pic18f2550.h: 8614: extern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n[; ;pic18f2550.h: 8616: extern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n[; ;pic18f2550.h: 8618: extern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n[; ;pic18f2550.h: 8620: extern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n[; ;pic18f2550.h: 8622: extern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n[; ;pic18f2550.h: 8624: extern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n[; ;pic18f2550.h: 8626: extern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n[; ;pic18f2550.h: 8628: extern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n[; ;pic18f2550.h: 8630: extern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n[; ;pic18f2550.h: 8632: extern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n[; ;pic18f2550.h: 8634: extern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n[; ;pic18f2550.h: 8636: extern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n[; ;pic18f2550.h: 8638: extern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n[; ;pic18f2550.h: 8640: extern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n[; ;pic18f2550.h: 8642: extern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n[; ;pic18f2550.h: 8644: extern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n[; ;pic18f2550.h: 8646: extern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n[; ;pic18f2550.h: 8648: extern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n[; ;pic18f2550.h: 8650: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n[; ;pic18f2550.h: 8652: extern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8654: extern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n[; ;pic18f2550.h: 8656: extern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n[; ;pic18f2550.h: 8658: extern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n[; ;pic18f2550.h: 8660: extern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n[; ;pic18f2550.h: 8662: extern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n[; ;pic18f2550.h: 8664: extern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n[; ;pic18f2550.h: 8666: extern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n[; ;pic18f2550.h: 8668: extern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n[; ;pic18f2550.h: 8670: extern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n[; ;pic18f2550.h: 8672: extern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n[; ;pic18f2550.h: 8674: extern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n[; ;pic18f2550.h: 8676: extern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n[; ;pic18f2550.h: 8678: extern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n[; ;pic18f2550.h: 8680: extern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n[; ;pic18f2550.h: 8682: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8684: extern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8686: extern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8688: extern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n[; ;pic18f2550.h: 8690: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8692: extern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8694: extern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8696: extern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8698: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8700: extern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8702: extern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8704: extern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8706: extern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8708: extern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8710: extern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8712: extern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8714: extern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8716: extern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8718: extern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8720: extern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8722: extern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 8724: extern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 8726: extern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n[; ;pic18f2550.h: 8728: extern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n[; ;pic18f2550.h: 8730: extern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n[; ;pic18f2550.h: 8732: extern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 8734: extern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8736: extern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8738: extern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n[; ;pic18f2550.h: 8740: extern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n[; ;pic18f2550.h: 8742: extern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 8744: extern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8746: extern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8748: extern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n[; ;pic18f2550.h: 8750: extern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n[; ;pic18f2550.h: 8752: extern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8754: extern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n[; ;pic18f2550.h: 8756: extern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 8758: extern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8760: extern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8762: extern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n[; ;pic18f2550.h: 8764: extern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n[; ;pic18f2550.h: 8766: extern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8768: extern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n[; ;pic18f2550.h: 8770: extern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n[; ;pic18f2550.h: 8772: extern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n[; ;pic18f2550.h: 8774: extern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n[; ;pic18f2550.h: 8776: extern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n[; ;pic18f2550.h: 8778: extern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n[; ;pic18f2550.h: 8780: extern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8782: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n[; ;pic18f2550.h: 8784: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n[; ;pic18f2550.h: 8786: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n[; ;pic18f2550.h: 8788: extern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8790: extern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n[; ;pic18f2550.h: 8792: extern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8794: extern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8796: extern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8798: extern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8800: extern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8802: extern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8804: extern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8806: extern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8808: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n[; ;pic18f2550.h: 8810: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n[; ;pic18f2550.h: 8812: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n[; ;pic18f2550.h: 8814: extern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n[; ;pic18f2550.h: 8816: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n[; ;pic18f2550.h: 8818: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n[; ;pic18f2550.h: 8820: extern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n[; ;pic18f2550.h: 8822: extern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n[; ;pic18f2550.h: 8824: extern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8826: extern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8828: extern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8830: extern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8832: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8834: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8836: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8838: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8840: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8842: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8844: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8846: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8848: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8850: extern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n[; ;pic18f2550.h: 8852: extern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n[; ;pic18f2550.h: 8854: extern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n[; ;pic18f2550.h: 8856: extern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n[; ;pic18f2550.h: 8858: extern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n[; ;pic18f2550.h: 8860: extern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n[; ;pic18f2550.h: 8862: extern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n[; ;pic18f2550.h: 8864: extern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n[; ;pic18f2550.h: 8866: extern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n[; ;pic18f2550.h: 8868: extern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n[; ;pic18f2550.h: 8870: extern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n[; ;pic18f2550.h: 8872: extern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n[; ;pic18f2550.h: 8874: extern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n[; ;pic18f2550.h: 8876: extern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n[; ;pic18f2550.h: 8878: extern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n[; ;pic18f2550.h: 8880: extern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n[; ;pic18f2550.h: 8882: extern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n[; ;pic18f2550.h: 8884: extern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n[; ;pic18f2550.h: 8886: extern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n[; ;pic18f2550.h: 8888: extern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 8890: extern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n[; ;pic18f2550.h: 8892: extern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8894: extern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8896: extern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8898: extern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8900: extern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n[; ;pic18f2550.h: 8902: extern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n[; ;pic18f2550.h: 8904: extern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n[; ;pic18f2550.h: 8906: extern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n[; ;pic18f2550.h: 8908: extern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n[; ;pic18f2550.h: 8910: extern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8912: extern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 8914: extern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 8916: extern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 8918: extern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 8920: extern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8922: extern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 8924: extern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 8926: extern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 8928: extern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 8930: extern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 8932: extern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 8934: extern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8936: extern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 8938: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n[; ;pic18f2550.h: 8940: extern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 8942: extern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n[; ;pic18f2550.h: 8944: extern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n[; ;pic18f2550.h: 8946: extern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n[; ;pic18f2550.h: 8948: extern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n[; ;pic18f2550.h: 8950: extern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8952: extern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n[; ;pic18f2550.h: 8954: extern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8956: extern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 8958: extern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 8960: extern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 8962: extern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 8964: extern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 8966: extern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 8968: extern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 8970: extern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 8972: extern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 8974: extern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n[; ;pic18f2550.h: 8976: extern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n[; ;pic18f2550.h: 8978: extern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n[; ;pic18f2550.h: 8980: extern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n[; ;pic18f2550.h: 8982: extern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 8984: extern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 8986: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8988: extern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n[; ;pic18f2550.h: 8990: extern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n[; ;pic18f2550.h: 8992: extern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 8994: extern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 8996: extern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 8998: extern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n[; ;pic18f2550.h: 9000: extern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n[; ;pic18f2550.h: 9002: extern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n[; ;pic18f2550.h: 9004: extern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9006: extern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9008: extern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9010: extern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n[; ;pic18f2550.h: 9012: extern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n[; ;pic18f2550.h: 9014: extern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n[; ;pic18f2550.h: 9016: extern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n[; ;pic18f2550.h: 9018: extern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n[; ;pic18f2550.h: 9020: extern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n[; ;pic18f2550.h: 9022: extern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9024: extern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n[; ;pic18f2550.h: 9026: extern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9028: extern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9030: extern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9032: extern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n[; ;pic18f2550.h: 9034: extern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n[; ;pic18f2550.h: 9036: extern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9038: extern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n[; ;pic18f2550.h: 9040: extern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n[; ;pic18f2550.h: 9042: extern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n[; ;pic18f2550.h: 9044: extern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n[; ;pic18f2550.h: 9046: extern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n[; ;pic18f2550.h: 9048: extern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n[; ;pic18f2550.h: 9050: extern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n[; ;pic18f2550.h: 9052: extern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n[; ;pic18f2550.h: 9054: extern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n[; ;pic18f2550.h: 9056: extern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n[; ;pic18f2550.h: 9058: extern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n[; ;pic18f2550.h: 9060: extern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9062: extern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9064: extern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9066: extern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9068: extern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9070: extern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9072: extern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n[; ;pic18f2550.h: 9074: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n[; ;pic18f2550.h: 9076: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n[; ;pic18f2550.h: 9078: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n[; ;pic18f2550.h: 9080: extern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9082: extern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9084: extern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n[; ;pic18f2550.h: 9086: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9088: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n[; ;pic18f2550.h: 9090: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n[; ;pic18f2550.h: 9092: extern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n[; ;pic18f2550.h: 9094: extern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n[; ;pic18f2550.h: 9096: extern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n[; ;pic18f2550.h: 9098: extern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9100: extern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9102: extern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n[; ;pic18f2550.h: 9104: extern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9106: extern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n[; ;pic18f2550.h: 9108: extern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n[; ;pic18f2550.h: 9110: extern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n[; ;pic18f2550.h: 9112: extern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n[; ;pic18f2550.h: 9114: extern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n[; ;pic18f2550.h: 9116: extern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n[; ;pic18f2550.h: 9118: extern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9120: extern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n[; ;pic18f2550.h: 9122: extern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9124: extern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n[; ;pic18f2550.h: 9126: extern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n[; ;pic18f2550.h: 9128: extern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9130: extern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n[; ;pic18f2550.h: 9132: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n[; ;pic18f2550.h: 9134: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n[; ;pic18f2550.h: 9136: extern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9138: extern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n[; ;pic18f2550.h: 9140: extern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9142: extern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9144: extern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9146: extern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n[; ;pic18f2550.h: 9148: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9150: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n[; ;pic18f2550.h: 9152: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n[; ;pic18f2550.h: 9154: extern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n[; ;pic18f2550.h: 9156: extern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n[; ;pic18f2550.h: 9158: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9160: extern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n[; ;pic18f2550.h: 9162: extern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n[; ;pic18f2550.h: 9164: extern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n[; ;pic18f2550.h: 9166: extern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n[; ;pic18f2550.h: 9168: extern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9170: extern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9172: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n[; ;pic18f2550.h: 9174: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9176: extern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n[; ;pic18f2550.h: 9178: extern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n[; ;pic18f2550.h: 9180: extern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n[; ;pic18f2550.h: 9182: extern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n[; ;pic18f2550.h: 9184: extern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n[; ;pic18f2550.h: 9186: extern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n[; ;pic18f2550.h: 9188: extern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n[; ;pic18f2550.h: 9190: extern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n[; ;pic18f2550.h: 9192: extern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n[; ;pic18f2550.h: 9194: extern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n[; ;pic18f2550.h: 9196: extern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n[; ;pic18f2550.h: 9198: extern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n[; ;pic18f2550.h: 9200: extern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n[; ;pic18f2550.h: 9202: extern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9204: extern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n[; ;pic18f2550.h: 9206: extern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n[; ;pic18f2550.h: 9208: extern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n[; ;pic18f2550.h: 9210: extern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n[; ;pic18f2550.h: 9212: extern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n[; ;pic18f2550.h: 9214: extern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n[; ;pic18f2550.h: 9216: extern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n[; ;pic18f2550.h: 9218: extern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n[; ;pic18f2550.h: 9220: extern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n[; ;pic18f2550.h: 9222: extern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9224: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n[; ;pic18f2550.h: 9226: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9228: extern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n[; ;pic18f2550.h: 9230: extern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n[; ;pic18f2550.h: 9232: extern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n[; ;pic18f2550.h: 9234: extern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n[; ;pic18f2550.h: 9236: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9238: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9240: extern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9242: extern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n[; ;pic18f2550.h: 9244: extern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n[; ;pic18f2550.h: 9246: extern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n[; ;pic18f2550.h: 9248: extern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n[; ;pic18f2550.h: 9250: extern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9252: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n[; ;pic18f2550.h: 9254: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n[; ;pic18f2550.h: 9256: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n[; ;pic18f2550.h: 9258: extern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n[; ;pic18f2550.h: 9260: extern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n[; ;pic18f2550.h: 9262: extern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n[; ;pic18f2550.h: 9264: extern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n[; ;pic18f2550.h: 9266: extern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9268: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n[; ;pic18f2550.h: 9270: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n[; ;pic18f2550.h: 9272: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9274: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9276: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9278: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9280: extern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n[; ;pic18f2550.h: 9282: extern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n[; ;pic18f2550.h: 9284: extern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n[; ;pic18f2550.h: 9286: extern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n[; ;pic18f2550.h: 9288: extern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9290: extern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n[; ;pic18f2550.h: 9292: extern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9294: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n[; ;pic18f2550.h: 9296: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n[; ;pic18f2550.h: 9298: extern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n[; ;pic18f2550.h: 9300: extern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n[; ;pic18f2550.h: 9302: extern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n[; ;pic18f2550.h: 9304: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n[; ;pic18f2550.h: 9306: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n[; ;pic18f2550.h: 9308: extern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n[; ;pic18f2550.h: 9310: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n[; ;pic18f2550.h: 9312: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n[; ;pic18f2550.h: 9314: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n[; ;pic18f2550.h: 9316: extern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n[; ;pic18f2550.h: 9318: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n[; ;pic18f2550.h: 9320: extern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n[; ;pic18f2550.h: 9322: extern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n[; ;pic18f2550.h: 9324: extern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n[; ;pic18f2550.h: 9326: extern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n[; ;pic18f2550.h: 9328: extern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n[; ;pic18f2550.h: 9330: extern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9332: extern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n[; ;pic18f2550.h: 9334: extern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n[; ;pic18f2550.h: 9336: extern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n[; ;pic18f2550.h: 9338: extern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n[; ;pic18f2550.h: 9340: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n[; ;pic18f2550.h: 9342: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n[; ;pic18f2550.h: 9344: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n[; ;pic18f2550.h: 9346: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n[; ;pic18f2550.h: 9348: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n[; ;pic18f2550.h: 9350: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n[; ;pic18f2550.h: 9352: extern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n[; ;pic18f2550.h: 9354: extern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n[; ;pic18f2550.h: 9356: extern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n[; ;pic18f2550.h: 9358: extern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n[; ;pic18f2550.h: 9360: extern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n[; ;pic18f2550.h: 9362: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n[; ;pic18f2550.h: 9364: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n[; ;pic18f2550.h: 9366: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n[; ;pic18f2550.h: 9368: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n[; ;pic18f2550.h: 9370: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n[; ;pic18f2550.h: 9372: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n[; ;pic18f2550.h: 9374: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n[; ;pic18f2550.h: 9376: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n[; ;pic18f2550.h: 9378: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n[; ;pic18f2550.h: 9380: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n[; ;pic18f2550.h: 9382: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9384: extern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n[; ;pic18f2550.h: 9386: extern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n[; ;pic18f2550.h: 9388: extern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n[; ;pic18f2550.h: 9390: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n[; ;pic18f2550.h: 9392: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n[; ;pic18f2550.h: 9394: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n[; ;pic18f2550.h: 9396: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n[; ;pic18f2550.h: 9398: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n[; ;pic18f2550.h: 9400: extern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n[; ;pic18f2550.h: 9402: extern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9404: extern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9406: extern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9408: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9410: extern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n[; ;pic18f2550.h: 9412: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9414: extern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n[; ;pic18f2550.h: 9416: extern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n[; ;pic18f2550.h: 9418: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9420: extern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n[; ;pic18f2550.h: 9422: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n[; ;pic18f2550.h: 9424: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n[; ;pic18f2550.h: 9426: extern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n[; ;pic18f2550.h: 9428: extern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n[; ;pic18f2550.h: 9430: extern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n[; ;pic18f2550.h: 9432: extern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n[; ;pic18f2550.h: 9434: extern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n[; ;pic18f2550.h: 9436: extern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n[; ;pic18f2550.h: 9438: extern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n[; ;pic18f2550.h: 9440: extern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n[; ;pic18f2550.h: 9442: extern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n[; ;pic18f2550.h: 9444: extern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n[; ;pic18f2550.h: 9446: extern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n[; ;pic18f2550.h: 9448: extern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n[; ;pic18f2550.h: 9450: extern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n[; ;pic18f2550.h: 9452: extern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n[; ;pic18f2550.h: 9454: extern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n[; ;pic18f2550.h: 9456: extern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n[; ;pic18f2550.h: 9458: extern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n[; ;pic18f2550.h: 9460: extern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9462: extern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n[; ;pic18f2550.h: 9464: extern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9466: extern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n[; ;pic18f2550.h: 9468: extern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n[; ;pic18f2550.h: 9470: extern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n[; ;pic18f2550.h: 9472: extern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n[; ;pic18f2550.h: 9474: extern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9476: extern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n[; ;pic18f2550.h: 9478: extern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n[; ;pic18f2550.h: 9480: extern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n[; ;pic18f2550.h: 9482: extern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n[; ;pic18f2550.h: 9484: extern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n[; ;pic18f2550.h: 9486: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n[; ;pic18f2550.h: 9488: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n[; ;pic18f2550.h: 9490: extern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9492: extern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n[; ;pic18f2550.h: 9494: extern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n[; ;pic18f2550.h: 9496: extern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n[; ;pic18f2550.h: 9498: extern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n[; ;pic18f2550.h: 9500: extern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n[; ;pic18f2550.h: 9502: extern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n[; ;pic18f2550.h: 9504: extern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n[; ;pic18f2550.h: 9506: extern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n[; ;pic18f2550.h: 9508: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n[; ;pic18f2550.h: 9510: extern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n[; ;pic18f2550.h: 9512: extern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n[; ;pic18f2550.h: 9514: extern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;pic18f2550.h: 9516: extern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n[; ;adc.h: 2008: union ADCResult\n[; ;adc.h: 2009: {\n[; ;adc.h: 2010: int lr;\n[; ;adc.h: 2011: char br[2];\n[; ;adc.h: 2012: };\n[; ;adc.h: 2014: char BusyADC (void);\n[; ;adc.h: 2016: void ConvertADC (void);\n[; ;adc.h: 2018: void CloseADC(void);\n[; ;adc.h: 2026: int ReadADC(void);\n[; ;adc.h: 2040: void OpenADC ( unsigned char ,\n[; ;adc.h: 2041: unsigned char ,\n[; ;adc.h: 2042: unsigned char );\n[; ;adc.h: 2084: void SetChanADC(unsigned char );\n[; ;adc.h: 2100: void SelChanConvADC( unsigned char );\n[; ;ancomp.h: 38: void Close_ancomp( void );\n[; ;ancomp.h: 39: void Open_ancomp(unsigned char config);\n[; ;spi.h: 584: void OpenSPI( unsigned char sync_mode,\n[; ;spi.h: 585: unsigned char bus_mode,\n[; ;spi.h: 586: unsigned char smp_phase );\n[; ;spi.h: 588: signed char WriteSPI( unsigned char data_out );\n[; ;spi.h: 590: void getsSPI( unsigned char *rdptr, unsigned char length );\n[; ;spi.h: 592: void putsSPI( unsigned char *wrptr );\n[; ;spi.h: 594: unsigned char ReadSPI( void );\n[; ;can2510.h: 414: void CAN2510Initialize(  unsigned int configuration,\n[; ;can2510.h: 415: unsigned char brp,\n[; ;can2510.h: 416: unsigned char interruptFlags,\n[; ;can2510.h: 417: unsigned char SPI_syncMode,\n[; ;can2510.h: 418: unsigned char SPI_busMode,\n[; ;can2510.h: 419: unsigned char SPI_smpPhase );\n[; ;can2510.h: 421: signed char CAN2510Init(  unsigned long BufferConfig,\n[; ;can2510.h: 422: unsigned long BitTimeConfig,\n[; ;can2510.h: 423: unsigned char interruptEnables,\n[; ;can2510.h: 424: unsigned char SPI_syncMode,\n[; ;can2510.h: 425: unsigned char SPI_busMode,\n[; ;can2510.h: 426: unsigned char SPI_smpPhase );\n[; ;can2510.h: 428: void CAN2510Enable( void );\n[; ;can2510.h: 430: void CAN2510Disable( void );\n[; ;can2510.h: 432: void CAN2510Reset( void );\n[; ;can2510.h: 434: void CAN2510SetMode(  unsigned char mode );\n[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );\n[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );\n[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );\n[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );\n[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );\n[; ;can2510.h: 446: unsigned char CAN2510ByteRead(  unsigned char addr );\n[; ;can2510.h: 448: void CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n[; ;can2510.h: 450: void CAN2510SequentialRead(  unsigned char *DataArray,\n[; ;can2510.h: 451: unsigned char CAN2510addr,\n[; ;can2510.h: 452: unsigned char numbytes );\n[; ;can2510.h: 454: void CAN2510SequentialWrite(  unsigned char *DataArray,\n[; ;can2510.h: 455: unsigned char CAN2510addr,\n[; ;can2510.h: 456: unsigned char numbytes );\n[; ;can2510.h: 458: void CAN2510BitModify(  unsigned char address,\n[; ;can2510.h: 459: unsigned char mask,\n[; ;can2510.h: 460: unsigned char data );\n[; ;can2510.h: 462: void CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n[; ;can2510.h: 466: void CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n[; ;can2510.h: 470: signed char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n[; ;can2510.h: 471: unsigned int mask,\n[; ;can2510.h: 472: unsigned int *filters );\n[; ;can2510.h: 474: signed char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n[; ;can2510.h: 475: unsigned long mask,\n[; ;can2510.h: 476: unsigned long *filters );\n[; ;can2510.h: 478: signed char CAN2510WriteStd(  unsigned int msgId,\n[; ;can2510.h: 479: unsigned char msgPriority,\n[; ;can2510.h: 480: unsigned char numBytes,\n[; ;can2510.h: 481: unsigned char *data );\n[; ;can2510.h: 483: signed char CAN2510WriteXtd(  unsigned long msgId,\n[; ;can2510.h: 484: unsigned char msgPriority,\n[; ;can2510.h: 485: unsigned char numBytes,\n[; ;can2510.h: 486: unsigned char *data );\n[; ;can2510.h: 488: void CAN2510LoadBufferStd(  unsigned char bufferNum,\n[; ;can2510.h: 489: unsigned int msgId,\n[; ;can2510.h: 490: unsigned char numBytes,\n[; ;can2510.h: 491: unsigned char *data );\n[; ;can2510.h: 493: void CAN2510LoadBufferXtd(  unsigned char bufferNum,\n[; ;can2510.h: 494: unsigned long msgId,\n[; ;can2510.h: 495: unsigned char numBytes,\n[; ;can2510.h: 496: unsigned char *data );\n[; ;can2510.h: 498: void CAN2510LoadRTRStd(  unsigned char bufferNum,\n[; ;can2510.h: 499: unsigned int msgId,\n[; ;can2510.h: 500: unsigned char numBytes );\n[; ;can2510.h: 502: void CAN2510LoadRTRXtd(  unsigned char bufferNum,\n[; ;can2510.h: 503: unsigned long msgId,\n[; ;can2510.h: 504: unsigned char numBytes );\n[; ;can2510.h: 506: void CAN2510SetBufferPriority(  unsigned char bufferNum,\n[; ;can2510.h: 507: unsigned char bufferPriority );\n[; ;can2510.h: 509: void CAN2510SendBuffer(  unsigned char bufferNumber );\n[; ;can2510.h: 511: signed char CAN2510WriteBuffer(  unsigned char bufferNum );\n[; ;can2510.h: 513: unsigned char CAN2510DataReady(  unsigned char bufferNum );\n[; ;can2510.h: 515: unsigned char CAN2510DataRead(  unsigned char bufferNum,\n[; ;can2510.h: 516: unsigned long *msgId,\n[; ;can2510.h: 517: unsigned char *numBytes,\n[; ;can2510.h: 518: unsigned char *data );\n[; ;capture.h: 64: union capstatus\n[; ;capture.h: 65: {\n[; ;capture.h: 73: struct\n[; ;capture.h: 74: {\n[; ;capture.h: 77: unsigned Cap1OVF:1;\n[; ;capture.h: 82: unsigned Cap2OVF:1;\n[; ;capture.h: 115: };\n[; ;capture.h: 117: unsigned :8;\n[; ;capture.h: 119: };\n[; ;capture.h: 121: extern union capstatus CapStatus;\n[; ;capture.h: 123: union CapResult\n[; ;capture.h: 124: {\n[; ;capture.h: 125: unsigned int lc;\n[; ;capture.h: 126: char bc[2];\n[; ;capture.h: 127: };\n[; ;capture.h: 474: void OpenCapture1 ( unsigned char config);\n[; ;capture.h: 475: unsigned int ReadCapture1 (void);\n[; ;capture.h: 476: void CloseCapture1 (void);\n[; ;capture.h: 484: void OpenCapture2 ( unsigned char config);\n[; ;capture.h: 485: unsigned int ReadCapture2 (void);\n[; ;capture.h: 486: void CloseCapture2 (void);\n[; ;compare.h: 385: void OpenCompare1(unsigned char config,unsigned int period);\n[; ;compare.h: 386: void CloseCompare1(void);\n[; ;compare.h: 392: void OpenCompare2(unsigned char config, unsigned int period);\n[; ;compare.h: 393: void CloseCompare2(void);\n[; ;EEP.h: 36: void Busy_eep ( void );\n[; ;EEP.h: 37: unsigned char Read_b_eep( unsigned int badd );\n[; ;EEP.h: 38: void Write_b_eep( unsigned int badd, unsigned char bdata );\n[; ;stddef.h: 2: typedef int ptrdiff_t;\n[; ;stddef.h: 3: typedef unsigned size_t;\n[; ;stddef.h: 4: typedef unsigned short wchar_t;\n[; ;stddef.h: 13: extern int errno;\n[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;\n[; ;GenericTypeDefs.h: 75: typedef signed int INT;\n[; ;GenericTypeDefs.h: 76: typedef signed char INT8;\n[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;\n[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;\n[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;\n[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;\n[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;\n[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;\n[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;\n[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;\n[; ;GenericTypeDefs.h: 99: typedef union\n[; ;GenericTypeDefs.h: 100: {\n[; ;GenericTypeDefs.h: 101: UINT8 Val;\n[; ;GenericTypeDefs.h: 102: struct\n[; ;GenericTypeDefs.h: 103: {\n[; ;GenericTypeDefs.h: 104: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 105: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 106: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 107: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 108: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 109: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 110: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 111: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 112: } bits;\n[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;\n[; ;GenericTypeDefs.h: 115: typedef union\n[; ;GenericTypeDefs.h: 116: {\n[; ;GenericTypeDefs.h: 117: UINT16 Val;\n[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;\n[; ;GenericTypeDefs.h: 119: struct \n[; ;GenericTypeDefs.h: 120: {\n[; ;GenericTypeDefs.h: 121: UINT8 LB;\n[; ;GenericTypeDefs.h: 122: UINT8 HB;\n[; ;GenericTypeDefs.h: 123: } byte;\n[; ;GenericTypeDefs.h: 124: struct \n[; ;GenericTypeDefs.h: 125: {\n[; ;GenericTypeDefs.h: 126: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 127: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 128: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 129: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 130: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 131: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 132: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 133: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 134: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 135: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 136: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 137: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 138: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 139: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 140: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 141: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 142: } bits;\n[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;\n[; ;GenericTypeDefs.h: 187: typedef union\n[; ;GenericTypeDefs.h: 188: {\n[; ;GenericTypeDefs.h: 189: UINT32 Val;\n[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;\n[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;\n[; ;GenericTypeDefs.h: 192: struct \n[; ;GenericTypeDefs.h: 193: {\n[; ;GenericTypeDefs.h: 194: UINT16 LW;\n[; ;GenericTypeDefs.h: 195: UINT16 HW;\n[; ;GenericTypeDefs.h: 196: } word;\n[; ;GenericTypeDefs.h: 197: struct \n[; ;GenericTypeDefs.h: 198: {\n[; ;GenericTypeDefs.h: 199: UINT8 LB;\n[; ;GenericTypeDefs.h: 200: UINT8 HB;\n[; ;GenericTypeDefs.h: 201: UINT8 UB;\n[; ;GenericTypeDefs.h: 202: UINT8 MB;\n[; ;GenericTypeDefs.h: 203: } byte;\n[; ;GenericTypeDefs.h: 204: struct \n[; ;GenericTypeDefs.h: 205: {\n[; ;GenericTypeDefs.h: 206: UINT16_VAL low;\n[; ;GenericTypeDefs.h: 207: UINT16_VAL high;\n[; ;GenericTypeDefs.h: 208: }wordUnion;\n[; ;GenericTypeDefs.h: 209: struct \n[; ;GenericTypeDefs.h: 210: {\n[; ;GenericTypeDefs.h: 211: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 212: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 213: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 214: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 215: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 216: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 217: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 218: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 219: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 220: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 221: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 222: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 223: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 224: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 225: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 226: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 227: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 228: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 229: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 230: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 231: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 232: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 233: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 234: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 235: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 236: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 237: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 238: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 239: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 240: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 241: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 242: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 243: } bits;\n[; ;GenericTypeDefs.h: 244: } UINT32_VAL;\n[; ;GenericTypeDefs.h: 248: typedef union\n[; ;GenericTypeDefs.h: 249: {\n[; ;GenericTypeDefs.h: 250: UINT64 Val;\n[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;\n[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;\n[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;\n[; ;GenericTypeDefs.h: 254: struct \n[; ;GenericTypeDefs.h: 255: {\n[; ;GenericTypeDefs.h: 256: UINT32 LD;\n[; ;GenericTypeDefs.h: 257: UINT32 HD;\n[; ;GenericTypeDefs.h: 258: } dword;\n[; ;GenericTypeDefs.h: 259: struct \n[; ;GenericTypeDefs.h: 260: {\n[; ;GenericTypeDefs.h: 261: UINT16 LW;\n[; ;GenericTypeDefs.h: 262: UINT16 HW;\n[; ;GenericTypeDefs.h: 263: UINT16 UW;\n[; ;GenericTypeDefs.h: 264: UINT16 MW;\n[; ;GenericTypeDefs.h: 265: } word;\n[; ;GenericTypeDefs.h: 266: struct \n[; ;GenericTypeDefs.h: 267: {\n[; ;GenericTypeDefs.h: 268: UINT8 b0:1;\n[; ;GenericTypeDefs.h: 269: UINT8 b1:1;\n[; ;GenericTypeDefs.h: 270: UINT8 b2:1;\n[; ;GenericTypeDefs.h: 271: UINT8 b3:1;\n[; ;GenericTypeDefs.h: 272: UINT8 b4:1;\n[; ;GenericTypeDefs.h: 273: UINT8 b5:1;\n[; ;GenericTypeDefs.h: 274: UINT8 b6:1;\n[; ;GenericTypeDefs.h: 275: UINT8 b7:1;\n[; ;GenericTypeDefs.h: 276: UINT8 b8:1;\n[; ;GenericTypeDefs.h: 277: UINT8 b9:1;\n[; ;GenericTypeDefs.h: 278: UINT8 b10:1;\n[; ;GenericTypeDefs.h: 279: UINT8 b11:1;\n[; ;GenericTypeDefs.h: 280: UINT8 b12:1;\n[; ;GenericTypeDefs.h: 281: UINT8 b13:1;\n[; ;GenericTypeDefs.h: 282: UINT8 b14:1;\n[; ;GenericTypeDefs.h: 283: UINT8 b15:1;\n[; ;GenericTypeDefs.h: 284: UINT8 b16:1;\n[; ;GenericTypeDefs.h: 285: UINT8 b17:1;\n[; ;GenericTypeDefs.h: 286: UINT8 b18:1;\n[; ;GenericTypeDefs.h: 287: UINT8 b19:1;\n[; ;GenericTypeDefs.h: 288: UINT8 b20:1;\n[; ;GenericTypeDefs.h: 289: UINT8 b21:1;\n[; ;GenericTypeDefs.h: 290: UINT8 b22:1;\n[; ;GenericTypeDefs.h: 291: UINT8 b23:1;\n[; ;GenericTypeDefs.h: 292: UINT8 b24:1;\n[; ;GenericTypeDefs.h: 293: UINT8 b25:1;\n[; ;GenericTypeDefs.h: 294: UINT8 b26:1;\n[; ;GenericTypeDefs.h: 295: UINT8 b27:1;\n[; ;GenericTypeDefs.h: 296: UINT8 b28:1;\n[; ;GenericTypeDefs.h: 297: UINT8 b29:1;\n[; ;GenericTypeDefs.h: 298: UINT8 b30:1;\n[; ;GenericTypeDefs.h: 299: UINT8 b31:1;\n[; ;GenericTypeDefs.h: 300: UINT8 b32:1;\n[; ;GenericTypeDefs.h: 301: UINT8 b33:1;\n[; ;GenericTypeDefs.h: 302: UINT8 b34:1;\n[; ;GenericTypeDefs.h: 303: UINT8 b35:1;\n[; ;GenericTypeDefs.h: 304: UINT8 b36:1;\n[; ;GenericTypeDefs.h: 305: UINT8 b37:1;\n[; ;GenericTypeDefs.h: 306: UINT8 b38:1;\n[; ;GenericTypeDefs.h: 307: UINT8 b39:1;\n[; ;GenericTypeDefs.h: 308: UINT8 b40:1;\n[; ;GenericTypeDefs.h: 309: UINT8 b41:1;\n[; ;GenericTypeDefs.h: 310: UINT8 b42:1;\n[; ;GenericTypeDefs.h: 311: UINT8 b43:1;\n[; ;GenericTypeDefs.h: 312: UINT8 b44:1;\n[; ;GenericTypeDefs.h: 313: UINT8 b45:1;\n[; ;GenericTypeDefs.h: 314: UINT8 b46:1;\n[; ;GenericTypeDefs.h: 315: UINT8 b47:1;\n[; ;GenericTypeDefs.h: 316: UINT8 b48:1;\n[; ;GenericTypeDefs.h: 317: UINT8 b49:1;\n[; ;GenericTypeDefs.h: 318: UINT8 b50:1;\n[; ;GenericTypeDefs.h: 319: UINT8 b51:1;\n[; ;GenericTypeDefs.h: 320: UINT8 b52:1;\n[; ;GenericTypeDefs.h: 321: UINT8 b53:1;\n[; ;GenericTypeDefs.h: 322: UINT8 b54:1;\n[; ;GenericTypeDefs.h: 323: UINT8 b55:1;\n[; ;GenericTypeDefs.h: 324: UINT8 b56:1;\n[; ;GenericTypeDefs.h: 325: UINT8 b57:1;\n[; ;GenericTypeDefs.h: 326: UINT8 b58:1;\n[; ;GenericTypeDefs.h: 327: UINT8 b59:1;\n[; ;GenericTypeDefs.h: 328: UINT8 b60:1;\n[; ;GenericTypeDefs.h: 329: UINT8 b61:1;\n[; ;GenericTypeDefs.h: 330: UINT8 b62:1;\n[; ;GenericTypeDefs.h: 331: UINT8 b63:1;\n[; ;GenericTypeDefs.h: 332: } bits;\n[; ;GenericTypeDefs.h: 333: } UINT64_VAL;\n[; ;GenericTypeDefs.h: 339: typedef void VOID;\n[; ;GenericTypeDefs.h: 341: typedef char CHAR8;\n[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;\n[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;\n[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;\n[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;\n[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;\n[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;\n[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;\n[; ;GenericTypeDefs.h: 352: typedef signed long LONG;\n[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;\n[; ;GenericTypeDefs.h: 356: typedef union\n[; ;GenericTypeDefs.h: 357: {\n[; ;GenericTypeDefs.h: 358: BYTE Val;\n[; ;GenericTypeDefs.h: 359: struct \n[; ;GenericTypeDefs.h: 360: {\n[; ;GenericTypeDefs.h: 361: BYTE b0:1;\n[; ;GenericTypeDefs.h: 362: BYTE b1:1;\n[; ;GenericTypeDefs.h: 363: BYTE b2:1;\n[; ;GenericTypeDefs.h: 364: BYTE b3:1;\n[; ;GenericTypeDefs.h: 365: BYTE b4:1;\n[; ;GenericTypeDefs.h: 366: BYTE b5:1;\n[; ;GenericTypeDefs.h: 367: BYTE b6:1;\n[; ;GenericTypeDefs.h: 368: BYTE b7:1;\n[; ;GenericTypeDefs.h: 369: } bits;\n[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;\n[; ;GenericTypeDefs.h: 372: typedef union\n[; ;GenericTypeDefs.h: 373: {\n[; ;GenericTypeDefs.h: 374: WORD Val;\n[; ;GenericTypeDefs.h: 375: BYTE v[2] ;\n[; ;GenericTypeDefs.h: 376: struct \n[; ;GenericTypeDefs.h: 377: {\n[; ;GenericTypeDefs.h: 378: BYTE LB;\n[; ;GenericTypeDefs.h: 379: BYTE HB;\n[; ;GenericTypeDefs.h: 380: } byte;\n[; ;GenericTypeDefs.h: 381: struct \n[; ;GenericTypeDefs.h: 382: {\n[; ;GenericTypeDefs.h: 383: BYTE b0:1;\n[; ;GenericTypeDefs.h: 384: BYTE b1:1;\n[; ;GenericTypeDefs.h: 385: BYTE b2:1;\n[; ;GenericTypeDefs.h: 386: BYTE b3:1;\n[; ;GenericTypeDefs.h: 387: BYTE b4:1;\n[; ;GenericTypeDefs.h: 388: BYTE b5:1;\n[; ;GenericTypeDefs.h: 389: BYTE b6:1;\n[; ;GenericTypeDefs.h: 390: BYTE b7:1;\n[; ;GenericTypeDefs.h: 391: BYTE b8:1;\n[; ;GenericTypeDefs.h: 392: BYTE b9:1;\n[; ;GenericTypeDefs.h: 393: BYTE b10:1;\n[; ;GenericTypeDefs.h: 394: BYTE b11:1;\n[; ;GenericTypeDefs.h: 395: BYTE b12:1;\n[; ;GenericTypeDefs.h: 396: BYTE b13:1;\n[; ;GenericTypeDefs.h: 397: BYTE b14:1;\n[; ;GenericTypeDefs.h: 398: BYTE b15:1;\n[; ;GenericTypeDefs.h: 399: } bits;\n[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;\n[; ;GenericTypeDefs.h: 402: typedef union\n[; ;GenericTypeDefs.h: 403: {\n[; ;GenericTypeDefs.h: 404: DWORD Val;\n[; ;GenericTypeDefs.h: 405: WORD w[2] ;\n[; ;GenericTypeDefs.h: 406: BYTE v[4] ;\n[; ;GenericTypeDefs.h: 407: struct \n[; ;GenericTypeDefs.h: 408: {\n[; ;GenericTypeDefs.h: 409: WORD LW;\n[; ;GenericTypeDefs.h: 410: WORD HW;\n[; ;GenericTypeDefs.h: 411: } word;\n[; ;GenericTypeDefs.h: 412: struct \n[; ;GenericTypeDefs.h: 413: {\n[; ;GenericTypeDefs.h: 414: BYTE LB;\n[; ;GenericTypeDefs.h: 415: BYTE HB;\n[; ;GenericTypeDefs.h: 416: BYTE UB;\n[; ;GenericTypeDefs.h: 417: BYTE MB;\n[; ;GenericTypeDefs.h: 418: } byte;\n[; ;GenericTypeDefs.h: 419: struct \n[; ;GenericTypeDefs.h: 420: {\n[; ;GenericTypeDefs.h: 421: WORD_VAL low;\n[; ;GenericTypeDefs.h: 422: WORD_VAL high;\n[; ;GenericTypeDefs.h: 423: }wordUnion;\n[; ;GenericTypeDefs.h: 424: struct \n[; ;GenericTypeDefs.h: 425: {\n[; ;GenericTypeDefs.h: 426: BYTE b0:1;\n[; ;GenericTypeDefs.h: 427: BYTE b1:1;\n[; ;GenericTypeDefs.h: 428: BYTE b2:1;\n[; ;GenericTypeDefs.h: 429: BYTE b3:1;\n[; ;GenericTypeDefs.h: 430: BYTE b4:1;\n[; ;GenericTypeDefs.h: 431: BYTE b5:1;\n[; ;GenericTypeDefs.h: 432: BYTE b6:1;\n[; ;GenericTypeDefs.h: 433: BYTE b7:1;\n[; ;GenericTypeDefs.h: 434: BYTE b8:1;\n[; ;GenericTypeDefs.h: 435: BYTE b9:1;\n[; ;GenericTypeDefs.h: 436: BYTE b10:1;\n[; ;GenericTypeDefs.h: 437: BYTE b11:1;\n[; ;GenericTypeDefs.h: 438: BYTE b12:1;\n[; ;GenericTypeDefs.h: 439: BYTE b13:1;\n[; ;GenericTypeDefs.h: 440: BYTE b14:1;\n[; ;GenericTypeDefs.h: 441: BYTE b15:1;\n[; ;GenericTypeDefs.h: 442: BYTE b16:1;\n[; ;GenericTypeDefs.h: 443: BYTE b17:1;\n[; ;GenericTypeDefs.h: 444: BYTE b18:1;\n[; ;GenericTypeDefs.h: 445: BYTE b19:1;\n[; ;GenericTypeDefs.h: 446: BYTE b20:1;\n[; ;GenericTypeDefs.h: 447: BYTE b21:1;\n[; ;GenericTypeDefs.h: 448: BYTE b22:1;\n[; ;GenericTypeDefs.h: 449: BYTE b23:1;\n[; ;GenericTypeDefs.h: 450: BYTE b24:1;\n[; ;GenericTypeDefs.h: 451: BYTE b25:1;\n[; ;GenericTypeDefs.h: 452: BYTE b26:1;\n[; ;GenericTypeDefs.h: 453: BYTE b27:1;\n[; ;GenericTypeDefs.h: 454: BYTE b28:1;\n[; ;GenericTypeDefs.h: 455: BYTE b29:1;\n[; ;GenericTypeDefs.h: 456: BYTE b30:1;\n[; ;GenericTypeDefs.h: 457: BYTE b31:1;\n[; ;GenericTypeDefs.h: 458: } bits;\n[; ;GenericTypeDefs.h: 459: } DWORD_VAL;\n[; ;GenericTypeDefs.h: 462: typedef union\n[; ;GenericTypeDefs.h: 463: {\n[; ;GenericTypeDefs.h: 464: QWORD Val;\n[; ;GenericTypeDefs.h: 465: DWORD d[2] ;\n[; ;GenericTypeDefs.h: 466: WORD w[4] ;\n[; ;GenericTypeDefs.h: 467: BYTE v[8] ;\n[; ;GenericTypeDefs.h: 468: struct \n[; ;GenericTypeDefs.h: 469: {\n[; ;GenericTypeDefs.h: 470: DWORD LD;\n[; ;GenericTypeDefs.h: 471: DWORD HD;\n[; ;GenericTypeDefs.h: 472: } dword;\n[; ;GenericTypeDefs.h: 473: struct \n[; ;GenericTypeDefs.h: 474: {\n[; ;GenericTypeDefs.h: 475: WORD LW;\n[; ;GenericTypeDefs.h: 476: WORD HW;\n[; ;GenericTypeDefs.h: 477: WORD UW;\n[; ;GenericTypeDefs.h: 478: WORD MW;\n[; ;GenericTypeDefs.h: 479: } word;\n[; ;GenericTypeDefs.h: 480: struct \n[; ;GenericTypeDefs.h: 481: {\n[; ;GenericTypeDefs.h: 482: BYTE b0:1;\n[; ;GenericTypeDefs.h: 483: BYTE b1:1;\n[; ;GenericTypeDefs.h: 484: BYTE b2:1;\n[; ;GenericTypeDefs.h: 485: BYTE b3:1;\n[; ;GenericTypeDefs.h: 486: BYTE b4:1;\n[; ;GenericTypeDefs.h: 487: BYTE b5:1;\n[; ;GenericTypeDefs.h: 488: BYTE b6:1;\n[; ;GenericTypeDefs.h: 489: BYTE b7:1;\n[; ;GenericTypeDefs.h: 490: BYTE b8:1;\n[; ;GenericTypeDefs.h: 491: BYTE b9:1;\n[; ;GenericTypeDefs.h: 492: BYTE b10:1;\n[; ;GenericTypeDefs.h: 493: BYTE b11:1;\n[; ;GenericTypeDefs.h: 494: BYTE b12:1;\n[; ;GenericTypeDefs.h: 495: BYTE b13:1;\n[; ;GenericTypeDefs.h: 496: BYTE b14:1;\n[; ;GenericTypeDefs.h: 497: BYTE b15:1;\n[; ;GenericTypeDefs.h: 498: BYTE b16:1;\n[; ;GenericTypeDefs.h: 499: BYTE b17:1;\n[; ;GenericTypeDefs.h: 500: BYTE b18:1;\n[; ;GenericTypeDefs.h: 501: BYTE b19:1;\n[; ;GenericTypeDefs.h: 502: BYTE b20:1;\n[; ;GenericTypeDefs.h: 503: BYTE b21:1;\n[; ;GenericTypeDefs.h: 504: BYTE b22:1;\n[; ;GenericTypeDefs.h: 505: BYTE b23:1;\n[; ;GenericTypeDefs.h: 506: BYTE b24:1;\n[; ;GenericTypeDefs.h: 507: BYTE b25:1;\n[; ;GenericTypeDefs.h: 508: BYTE b26:1;\n[; ;GenericTypeDefs.h: 509: BYTE b27:1;\n[; ;GenericTypeDefs.h: 510: BYTE b28:1;\n[; ;GenericTypeDefs.h: 511: BYTE b29:1;\n[; ;GenericTypeDefs.h: 512: BYTE b30:1;\n[; ;GenericTypeDefs.h: 513: BYTE b31:1;\n[; ;GenericTypeDefs.h: 514: BYTE b32:1;\n[; ;GenericTypeDefs.h: 515: BYTE b33:1;\n[; ;GenericTypeDefs.h: 516: BYTE b34:1;\n[; ;GenericTypeDefs.h: 517: BYTE b35:1;\n[; ;GenericTypeDefs.h: 518: BYTE b36:1;\n[; ;GenericTypeDefs.h: 519: BYTE b37:1;\n[; ;GenericTypeDefs.h: 520: BYTE b38:1;\n[; ;GenericTypeDefs.h: 521: BYTE b39:1;\n[; ;GenericTypeDefs.h: 522: BYTE b40:1;\n[; ;GenericTypeDefs.h: 523: BYTE b41:1;\n[; ;GenericTypeDefs.h: 524: BYTE b42:1;\n[; ;GenericTypeDefs.h: 525: BYTE b43:1;\n[; ;GenericTypeDefs.h: 526: BYTE b44:1;\n[; ;GenericTypeDefs.h: 527: BYTE b45:1;\n[; ;GenericTypeDefs.h: 528: BYTE b46:1;\n[; ;GenericTypeDefs.h: 529: BYTE b47:1;\n[; ;GenericTypeDefs.h: 530: BYTE b48:1;\n[; ;GenericTypeDefs.h: 531: BYTE b49:1;\n[; ;GenericTypeDefs.h: 532: BYTE b50:1;\n[; ;GenericTypeDefs.h: 533: BYTE b51:1;\n[; ;GenericTypeDefs.h: 534: BYTE b52:1;\n[; ;GenericTypeDefs.h: 535: BYTE b53:1;\n[; ;GenericTypeDefs.h: 536: BYTE b54:1;\n[; ;GenericTypeDefs.h: 537: BYTE b55:1;\n[; ;GenericTypeDefs.h: 538: BYTE b56:1;\n[; ;GenericTypeDefs.h: 539: BYTE b57:1;\n[; ;GenericTypeDefs.h: 540: BYTE b58:1;\n[; ;GenericTypeDefs.h: 541: BYTE b59:1;\n[; ;GenericTypeDefs.h: 542: BYTE b60:1;\n[; ;GenericTypeDefs.h: 543: BYTE b61:1;\n[; ;GenericTypeDefs.h: 544: BYTE b62:1;\n[; ;GenericTypeDefs.h: 545: BYTE b63:1;\n[; ;GenericTypeDefs.h: 546: } bits;\n[; ;GenericTypeDefs.h: 547: } QWORD_VAL;\n[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n[; ;i2c.h: 775: void IdleI2C( void );\n[; ;i2c.h: 777: void OpenI2C( unsigned char sync_mode, unsigned char slew );\n[; ;i2c.h: 779: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 781: signed char putsI2C( unsigned char *wrptr );\n[; ;i2c.h: 783: unsigned char ReadI2C( void );\n[; ;i2c.h: 785: void CloseI2C( void );\n[; ;i2c.h: 899: signed char WriteI2C( unsigned char data_out );\n[; ;i2c.h: 901: signed char getsI2C( unsigned char *rdptr, unsigned char length );\n[; ;i2c.h: 908: signed char EEAckPolling( unsigned char control );\n[; ;i2c.h: 910: signed char EEByteWrite( unsigned char control,\n[; ;i2c.h: 911: unsigned char address,\n[; ;i2c.h: 912: unsigned char data );\n[; ;i2c.h: 914: signed int EECurrentAddRead( unsigned char control );\n[; ;i2c.h: 916: signed char EEPageWrite( unsigned char control,\n[; ;i2c.h: 917: unsigned char address,\n[; ;i2c.h: 918: unsigned char *wrptr );\n[; ;i2c.h: 920: signed int EERandomRead( unsigned char control, unsigned char address );\n[; ;i2c.h: 922: signed char EESequentialRead( unsigned char control,\n[; ;i2c.h: 923: unsigned char address,\n[; ;i2c.h: 924: unsigned char *rdptr,\n[; ;i2c.h: 925: unsigned char length );\n[; ;mwire.h: 325: void OpenMwire( unsigned char sync_mode );\n[; ;mwire.h: 327: unsigned char ReadMwire( unsigned char high_byte,\n[; ;mwire.h: 328: unsigned char low_byte );\n[; ;mwire.h: 341: signed char WriteMwire( unsigned char data_out );\n[; ;mwire.h: 354: void getsMwire( unsigned char *rdptr, unsigned char length );\n[; ;portb.h: 126: void OpenPORTB( unsigned char config);\n[; ;portb.h: 176: void OpenRB0INT( unsigned char config);\n[; ;portb.h: 194: void OpenRB1INT( unsigned char config);\n[; ;portb.h: 211: void OpenRB2INT( unsigned char config);\n[; ;pwm.h: 85: union PWMDC\n[; ;pwm.h: 86: {\n[; ;pwm.h: 87: unsigned int lpwm;\n[; ;pwm.h: 88: char bpwm[2];\n[; ;pwm.h: 89: };\n[; ;pwm.h: 467: void OpenPWM1 ( char period);\n[; ;pwm.h: 468: void SetDCPWM1 ( unsigned int duty_cycle);\n[; ;pwm.h: 477: void ClosePWM1 (void);\n[; ;pwm.h: 485: void OpenPWM2 ( char period);\n[; ;pwm.h: 486: void SetDCPWM2( unsigned int duty_cycle);\n[; ;pwm.h: 492: void ClosePWM2 (void);\n[; ;reset.h: 16: char isMCLR(void);\n[; ;reset.h: 17: void StatusReset(void);\n[; ;reset.h: 18: char isPOR(void);\n[; ;reset.h: 19: char isWU(void);\n[; ;reset.h: 22: char isBOR(void);\n[; ;reset.h: 26: char isWDTTO(void);\n[; ;reset.h: 27: char isWDTWU(void);\n[; ;reset.h: 31: char isLVD(void);\n[; ;rtcc.h: 687: void Open_RTCC(void);\n[; ;rtcc.h: 688: void Close_RTCC(void);\n[; ;rtcc.h: 689: unsigned char update_RTCC(void);\n[; ;sw_i2c.h: 97: void SWStopI2C ( void );\n[; ;sw_i2c.h: 98: void SWStartI2C ( void );\n[; ;sw_i2c.h: 99: void SWRestartI2C ( void );\n[; ;sw_i2c.h: 100: void SWStopI2C ( void );\n[; ;sw_i2c.h: 102: signed char SWAckI2C( void );\n[; ;sw_i2c.h: 103: signed char Clock_test( void );\n[; ;sw_i2c.h: 104: signed int SWReadI2C( void );\n[; ;sw_i2c.h: 105: signed char SWWriteI2C(  unsigned char data_out );\n[; ;sw_i2c.h: 106: signed char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\n[; ;sw_i2c.h: 107: signed char SWPutsI2C(  unsigned char *wrptr );\n[; ;sw_spi.h: 84: void OpenSWSPI(void);\n[; ;sw_spi.h: 87: char WriteSWSPI( char output);\n[; ;sw_spi.h: 90: void SetCSSWSPI(void);\n[; ;sw_spi.h: 93: void ClearCSSWSPI(void);\n[; ;sw_uart.h: 47: void OpenUART(void);\n[; ;sw_uart.h: 49: unsigned char ReadUART(void);\n[; ;sw_uart.h: 51: void WriteUART( unsigned char);\n[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);\n[; ;sw_uart.h: 55: void putsUART( char *);\n[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);\n[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);\n[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);\n[; ;timers.h: 36: union Timers\n[; ;timers.h: 37: {\n[; ;timers.h: 38: unsigned int lt;\n[; ;timers.h: 39: char bt[2];\n[; ;timers.h: 40: };\n[; ;timers.h: 118: void OpenTimer0 ( unsigned char config);\n[; ;timers.h: 119: void CloseTimer0 (void);\n[; ;timers.h: 120: unsigned int ReadTimer0 (void);\n[; ;timers.h: 121: void WriteTimer0 ( unsigned int timer0);\n[; ;timers.h: 236: void OpenTimer1 ( unsigned char config);\n[; ;timers.h: 237: void CloseTimer1 (void);\n[; ;timers.h: 238: unsigned int ReadTimer1 (void);\n[; ;timers.h: 239: void WriteTimer1 ( unsigned int timer1);\n[; ;timers.h: 325: void OpenTimer2 ( unsigned char config);\n[; ;timers.h: 326: void CloseTimer2 (void);\n[; ;timers.h: 391: void OpenTimer3 ( unsigned char config);\n[; ;timers.h: 392: void CloseTimer3 (void);\n[; ;timers.h: 393: unsigned int ReadTimer3 (void);\n[; ;timers.h: 394: void WriteTimer3 ( unsigned int timer3);\n[; ;timers.h: 1179: void SetTmrCCPSrc( unsigned char );\n[; ;usart.h: 568: union USART\n[; ;usart.h: 569: {\n[; ;usart.h: 570: unsigned char val;\n[; ;usart.h: 571: struct\n[; ;usart.h: 572: {\n[; ;usart.h: 573: unsigned RX_NINE:1;\n[; ;usart.h: 574: unsigned TX_NINE:1;\n[; ;usart.h: 575: unsigned FRAME_ERROR:1;\n[; ;usart.h: 576: unsigned OVERRUN_ERROR:1;\n[; ;usart.h: 577: unsigned fill:4;\n[; ;usart.h: 578: };\n[; ;usart.h: 579: };\n[; ;usart.h: 580: extern union USART USART_Status;\n[; ;usart.h: 581: void OpenUSART ( unsigned char config, unsigned spbrg);\n[; ;usart.h: 596: char ReadUSART (void);\n[; ;usart.h: 597: void WriteUSART ( char data);\n[; ;usart.h: 598: void getsUSART ( char *buffer, unsigned char len);\n[; ;usart.h: 599: void putsUSART ( char *data);\n[; ;usart.h: 600: void putrsUSART ( const  char *data);\n[; ;usart.h: 654: void baudUSART ( unsigned char baudconfig);\n[; ;xlcd.h: 87: void OpenXLCD( unsigned char);\n[; ;xlcd.h: 92: void SetCGRamAddr( unsigned char);\n[; ;xlcd.h: 97: void SetDDRamAddr( unsigned char);\n[; ;xlcd.h: 102: unsigned char BusyXLCD(void);\n[; ;xlcd.h: 107: unsigned char ReadAddrXLCD(void);\n[; ;xlcd.h: 112: char ReadDataXLCD(void);\n[; ;xlcd.h: 117: void WriteCmdXLCD( unsigned char);\n[; ;xlcd.h: 122: void WriteDataXLCD( char);\n[; ;xlcd.h: 132: void putsXLCD( char *);\n[; ;xlcd.h: 137: void putrsXLCD(const char *);\n[; ;xlcd.h: 140: extern void DelayFor18TCY(void);\n[; ;xlcd.h: 141: extern void DelayPORXLCD(void);\n[; ;xlcd.h: 142: extern void DelayXLCD(void);\n[; ;pic18.h: 18: __attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned c\n[; ;pic18.h: 144: extern void _delay(unsigned long);\n[; ;pic18.h: 146: extern void _delaywdt(unsigned long);\n[; ;pic18.h: 148: extern void _delay3(unsigned char);\n[; ;SPIPort.h: 18: typedef char xSPIHandle;\n[; ;SPI.h: 58: enum enSPIModules {\n[; ;SPI.h: 59: E_SPI_1 = 1,\n[; ;SPI.h: 60: E_SPI_2 = 2,\n[; ;SPI.h: 61: E_SPI_3 = 3,\n[; ;SPI.h: 62: E_SPI_4 = 4,\n[; ;SPI.h: 63: };\n[; ;SPI.h: 86: xSPIHandle spi_init(enum enSPIModules eModule);\n[; ;SPI.h: 99: uint8_t spi_control(xSPIHandle spid, uint32_t ctrl, uint32_t arg);\n[; ;SPI.h: 111: uint8_t spi_open(xSPIHandle spid);\n[; ;SPI.h: 122: uint8_t spi_close(xSPIHandle spid);\n[; ;SPI.h: 131: void spi_write(xSPIHandle spid, uint8_t data);\n[; ;SPI.h: 140: uint8_t spi_read(xSPIHandle spid);\n[; ;SPI.h: 149: void spi_write_array(xSPIHandle spid, const uint8_t * txbuf, uint16_t len);\n[; ;SPI.h: 158: void spi_read_array(xSPIHandle spid, uint8_t * rxbuf, uint16_t len);\n[; ;SPI.h: 168: uint8_t spi_trans(xSPIHandle spid, uint8_t data);\n[; ;SPI.h: 178: void spi_trans_array(xSPIHandle spid, uint8_t * txbuf, uint8_t * rxbuf, uint16_t len);\n[; ;io.h: 59: void io_mode(uint8_t pin, uint8_t mode);\n[; ;io.h: 70: void io_write(uint8_t pin, uint8_t value);\n[; ;io.h: 83: uint8_t io_read( uint8_t pin );\n[; ;tc.h: 37: struct thermocuple_struct\n[; ;tc.h: 38: {\n[; ;tc.h: 39: xSPIHandle spi;\n[; ;tc.h: 40: uint8_t cspin;\n[; ;tc.h: 41: };\n[; ;tc.h: 43: typedef struct thermocuple_struct tc_t;\n[; ;tc.h: 58: tc_t tc_init(xSPIHandle spid, uint8_t cspin);\n[; ;tc.h: 70: int16_t tc_read(tc_t * tcpl);\n[; ;tc.h: 82: float tc_read_float(tc_t * tcpl);\n\"4 tc.c\n[v _tc_init `(S518 ~T0 @X0 1 ef2`uc`uc ]\n{\n[; ;tc.c: 3: tc_t tc_init(xSPIHandle spid, uint8_t cspin)\n[; ;tc.c: 4: {\n[e :U _tc_init ]\n[v _spid `uc ~T0 @X0 1 r1 ]\n[v _cspin `uc ~T0 @X0 1 r2 ]\n[f ]\n\"5\n[v _tcpl `S518 ~T0 @X0 1 a ]\n[; ;tc.c: 5: struct thermocuple_struct tcpl;\n[; ;tc.c: 8: io_write(cspin, 1);\n\"8\n[e ( _io_write (2 , _cspin -> -> 1 `i `uc ]\n[; ;tc.c: 9: io_mode(cspin, 0);\n\"9\n[e ( _io_mode (2 , _cspin -> -> 0 `i `uc ]\n[; ;tc.c: 11: spi_control(spid, 0x00000001 | 0x00000020, 4);\n\"11\n[e ( _spi_control (3 , , _spid -> -> | -> 1 `i -> 32 `i `l `ul -> -> -> 4 `i `l `ul ]\n[; ;tc.c: 12: spi_open(spid);\n\"12\n[e ( _spi_open (1 _spid ]\n[; ;tc.c: 14: tcpl.spi = spid;\n\"14\n[e = . _tcpl 0 _spid ]\n[; ;tc.c: 15: tcpl.cspin = cspin;\n\"15\n[e = . _tcpl 1 _cspin ]\n[; ;tc.c: 17: return tcpl;\n\"17\n[e ) _tcpl ]\n[e $UE 519  ]\n[; ;tc.c: 18: }\n\"18\n[e :UE 519 ]\n}\n\"21\n[v _tc_read `(i ~T0 @X0 1 ef1`*S518 ]\n{\n[; ;tc.c: 20: int16_t tc_read(tc_t * tcpl)\n[; ;tc.c: 21: {\n[e :U _tc_read ]\n[v _tcpl `*S518 ~T0 @X0 1 r1 ]\n[f ]\n\"22\n[v _buf `ui ~T0 @X0 1 a ]\n[; ;tc.c: 22: uint16_t buf = 0;\n[e = _buf -> -> 0 `i `ui ]\n[; ;tc.c: 25: io_write(tcpl->cspin, 0);\n\"25\n[e ( _io_write (2 , . *U _tcpl 1 -> -> 0 `i `uc ]\n[; ;tc.c: 27: spi_read_array(tcpl->spi, (uint8_t *) & buf, 2);\n\"27\n[e ( _spi_read_array (3 , , . *U _tcpl 0 -> &U _buf `*uc -> -> 2 `i `ui ]\n[; ;tc.c: 29: io_write(tcpl->cspin, 1);\n\"29\n[e ( _io_write (2 , . *U _tcpl 1 -> -> 1 `i `uc ]\n[; ;tc.c: 31: if (buf & (1 << 2))\n\"31\n[e $ ! != & _buf -> << -> 1 `i -> 2 `i `ui -> -> 0 `i `ui 521  ]\n[; ;tc.c: 32: return -1;\n\"32\n[e ) -U -> 1 `i ]\n[e $UE 520  ]\n[e :U 521 ]\n[; ;tc.c: 34: buf &= 0x7FF8;\n\"34\n[e =& _buf -> -> 32760 `i `ui ]\n[; ;tc.c: 36: buf >>= 3;\n\"36\n[e =>> _buf -> 3 `i ]\n[; ;tc.c: 37: return buf;\n\"37\n[e ) -> _buf `i ]\n[e $UE 520  ]\n[; ;tc.c: 38: }\n\"38\n[e :UE 520 ]\n}\n\"41\n[v _tc_read_float `(f ~T0 @X0 1 ef1`*S518 ]\n{\n[; ;tc.c: 40: float tc_read_float(tc_t * tcpl)\n[; ;tc.c: 41: {\n[e :U _tc_read_float ]\n[v _tcpl `*S518 ~T0 @X0 1 r1 ]\n[f ]\n[; ;tc.c: 42: return((float) tc_read(tcpl))* 0.25;\n\"42\n[e ) -> * -> -> ( _tc_read (1 _tcpl `f `d .0.25 `f ]\n[e $UE 522  ]\n[; ;tc.c: 43: }\n\"43\n[e :UE 522 ]\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/tc.p1.d",
    "content": " build/default/production/tc.d  \\\n build/default/production/tc.p1:  \\\n tc.c  \\\nio.h  \\\n../SPI/SPIPort.h  \\\ntc.h  \\\n../SPI/SPI.h "
  },
  {
    "path": "pid-demo-pic18.X/build/default/production/tc.pre",
    "content": "\n# 1 \"tc.c\"\n\n# 13 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stdint.h\"\ntypedef signed char int8_t;\n\n# 20\ntypedef signed int int16_t;\n\n# 28\ntypedef signed short long int int24_t;\n\n# 36\ntypedef signed long int int32_t;\n\n# 43\ntypedef unsigned char uint8_t;\n\n# 49\ntypedef unsigned int uint16_t;\n\n# 56\ntypedef unsigned short long int uint24_t;\n\n# 63\ntypedef unsigned long int uint32_t;\n\n# 71\ntypedef signed char int_least8_t;\n\n# 78\ntypedef signed int int_least16_t;\n\n# 90\ntypedef signed short long int int_least24_t;\n\n# 98\ntypedef signed long int int_least32_t;\n\n# 105\ntypedef unsigned char uint_least8_t;\n\n# 111\ntypedef unsigned int uint_least16_t;\n\n# 121\ntypedef unsigned short long int uint_least24_t;\n\n# 128\ntypedef unsigned long int uint_least32_t;\n\n# 137\ntypedef signed char int_fast8_t;\n\n# 144\ntypedef signed int int_fast16_t;\n\n# 156\ntypedef signed short long int int_fast24_t;\n\n# 164\ntypedef signed long int int_fast32_t;\n\n# 171\ntypedef unsigned char uint_fast8_t;\n\n# 177\ntypedef unsigned int uint_fast16_t;\n\n# 187\ntypedef unsigned short long int uint_fast24_t;\n\n# 194\ntypedef unsigned long int uint_fast32_t;\n\n# 200\ntypedef int32_t intmax_t;\n\n\n\n\ntypedef uint32_t uintmax_t;\n\n\n\n\ntypedef int16_t intptr_t;\n\n\n\n\ntypedef uint16_t uintptr_t;\n\n# 44 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\nextern volatile unsigned short UFRM @ 0xF66;\n\nasm(\"UFRM equ 0F66h\");\n\n\n\nextern volatile unsigned char UFRML @ 0xF66;\n\nasm(\"UFRML equ 0F66h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :8;\n};\nstruct {\nunsigned FRM0 :1;\nunsigned FRM1 :1;\nunsigned FRM2 :1;\nunsigned FRM3 :1;\nunsigned FRM4 :1;\nunsigned FRM5 :1;\nunsigned FRM6 :1;\nunsigned FRM7 :1;\n};\nstruct {\nunsigned FRML :8;\n};\n} UFRMLbits_t;\nextern volatile UFRMLbits_t UFRMLbits @ 0xF66;\n\n# 127\nextern volatile unsigned char UFRMH @ 0xF67;\n\nasm(\"UFRMH equ 0F67h\");\n\n\ntypedef union {\nstruct {\nunsigned FRM :3;\n};\nstruct {\nunsigned FRM8 :1;\nunsigned FRM9 :1;\nunsigned FRM10 :1;\n};\n} UFRMHbits_t;\nextern volatile UFRMHbits_t UFRMHbits @ 0xF67;\n\n# 166\nextern volatile unsigned char UIR @ 0xF68;\n\nasm(\"UIR equ 0F68h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIF :1;\nunsigned UERRIF :1;\nunsigned ACTVIF :1;\nunsigned TRNIF :1;\nunsigned IDLEIF :1;\nunsigned STALLIF :1;\nunsigned SOFIF :1;\n};\n} UIRbits_t;\nextern volatile UIRbits_t UIRbits @ 0xF68;\n\n# 221\nextern volatile unsigned char UIE @ 0xF69;\n\nasm(\"UIE equ 0F69h\");\n\n\ntypedef union {\nstruct {\nunsigned URSTIE :1;\nunsigned UERRIE :1;\nunsigned ACTVIE :1;\nunsigned TRNIE :1;\nunsigned IDLEIE :1;\nunsigned STALLIE :1;\nunsigned SOFIE :1;\n};\n} UIEbits_t;\nextern volatile UIEbits_t UIEbits @ 0xF69;\n\n# 276\nextern volatile unsigned char UEIR @ 0xF6A;\n\nasm(\"UEIR equ 0F6Ah\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEF :1;\nunsigned CRC5EF :1;\nunsigned CRC16EF :1;\nunsigned DFN8EF :1;\nunsigned BTOEF :1;\nunsigned :2;\nunsigned BTSEF :1;\n};\n} UEIRbits_t;\nextern volatile UEIRbits_t UEIRbits @ 0xF6A;\n\n# 326\nextern volatile unsigned char UEIE @ 0xF6B;\n\nasm(\"UEIE equ 0F6Bh\");\n\n\ntypedef union {\nstruct {\nunsigned PIDEE :1;\nunsigned CRC5EE :1;\nunsigned CRC16EE :1;\nunsigned DFN8EE :1;\nunsigned BTOEE :1;\nunsigned :2;\nunsigned BTSEE :1;\n};\n} UEIEbits_t;\nextern volatile UEIEbits_t UEIEbits @ 0xF6B;\n\n# 376\nextern volatile unsigned char USTAT @ 0xF6C;\n\nasm(\"USTAT equ 0F6Ch\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned PPBI :1;\nunsigned DIR :1;\nunsigned ENDP :4;\n};\nstruct {\nunsigned :3;\nunsigned ENDP0 :1;\nunsigned ENDP1 :1;\nunsigned ENDP2 :1;\nunsigned ENDP3 :1;\n};\n} USTATbits_t;\nextern volatile USTATbits_t USTATbits @ 0xF6C;\n\n# 435\nextern volatile unsigned char UCON @ 0xF6D;\n\nasm(\"UCON equ 0F6Dh\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned SUSPND :1;\nunsigned RESUME :1;\nunsigned USBEN :1;\nunsigned PKTDIS :1;\nunsigned SE0 :1;\nunsigned PPBRST :1;\n};\n} UCONbits_t;\nextern volatile UCONbits_t UCONbits @ 0xF6D;\n\n# 485\nextern volatile unsigned char UADDR @ 0xF6E;\n\nasm(\"UADDR equ 0F6Eh\");\n\n\ntypedef union {\nstruct {\nunsigned ADDR :7;\n};\nstruct {\nunsigned ADDR0 :1;\nunsigned ADDR1 :1;\nunsigned ADDR2 :1;\nunsigned ADDR3 :1;\nunsigned ADDR4 :1;\nunsigned ADDR5 :1;\nunsigned ADDR6 :1;\n};\n} UADDRbits_t;\nextern volatile UADDRbits_t UADDRbits @ 0xF6E;\n\n# 548\nextern volatile unsigned char UCFG @ 0xF6F;\n\nasm(\"UCFG equ 0F6Fh\");\n\n\ntypedef union {\nstruct {\nunsigned PPB :2;\nunsigned FSEN :1;\nunsigned UTRDIS :1;\nunsigned UPUEN :1;\nunsigned :1;\nunsigned UOEMON :1;\nunsigned UTEYE :1;\n};\nstruct {\nunsigned PPB0 :1;\nunsigned PPB1 :1;\n};\nstruct {\nunsigned UPP0 :1;\n};\nstruct {\nunsigned :1;\nunsigned UPP1 :1;\n};\n} UCFGbits_t;\nextern volatile UCFGbits_t UCFGbits @ 0xF6F;\n\n# 629\nextern volatile unsigned char UEP0 @ 0xF70;\n\nasm(\"UEP0 equ 0F70h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP0CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP0HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP0INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP0OUTEN :1;\n};\nstruct {\nunsigned EP0STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS0 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK0 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN0 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN0 :1;\n};\nstruct {\nunsigned EPSTALL0 :1;\n};\n} UEP0bits_t;\nextern volatile UEP0bits_t UEP0bits @ 0xF70;\n\n# 760\nextern volatile unsigned char UEP1 @ 0xF71;\n\nasm(\"UEP1 equ 0F71h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP1CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP1HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP1INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP1OUTEN :1;\n};\nstruct {\nunsigned EP1STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS1 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK1 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN1 :1;\n};\nstruct {\nunsigned EPSTALL1 :1;\n};\n} UEP1bits_t;\nextern volatile UEP1bits_t UEP1bits @ 0xF71;\n\n# 891\nextern volatile unsigned char UEP2 @ 0xF72;\n\nasm(\"UEP2 equ 0F72h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP2CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP2HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP2INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP2OUTEN :1;\n};\nstruct {\nunsigned EP2STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS2 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK2 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN2 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN2 :1;\n};\nstruct {\nunsigned EPSTALL2 :1;\n};\n} UEP2bits_t;\nextern volatile UEP2bits_t UEP2bits @ 0xF72;\n\n# 1022\nextern volatile unsigned char UEP3 @ 0xF73;\n\nasm(\"UEP3 equ 0F73h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP3CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP3HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP3INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP3OUTEN :1;\n};\nstruct {\nunsigned EP3STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS3 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK3 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN3 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN3 :1;\n};\nstruct {\nunsigned EPSTALL3 :1;\n};\n} UEP3bits_t;\nextern volatile UEP3bits_t UEP3bits @ 0xF73;\n\n# 1153\nextern volatile unsigned char UEP4 @ 0xF74;\n\nasm(\"UEP4 equ 0F74h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP4CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP4HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP4INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP4OUTEN :1;\n};\nstruct {\nunsigned EP4STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS4 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK4 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN4 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN4 :1;\n};\nstruct {\nunsigned EPSTALL4 :1;\n};\n} UEP4bits_t;\nextern volatile UEP4bits_t UEP4bits @ 0xF74;\n\n# 1284\nextern volatile unsigned char UEP5 @ 0xF75;\n\nasm(\"UEP5 equ 0F75h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP5CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP5HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP5INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP5OUTEN :1;\n};\nstruct {\nunsigned EP5STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS5 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK5 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN5 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN5 :1;\n};\nstruct {\nunsigned EPSTALL5 :1;\n};\n} UEP5bits_t;\nextern volatile UEP5bits_t UEP5bits @ 0xF75;\n\n# 1415\nextern volatile unsigned char UEP6 @ 0xF76;\n\nasm(\"UEP6 equ 0F76h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP6CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP6HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP6INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP6OUTEN :1;\n};\nstruct {\nunsigned EP6STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS6 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK6 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN6 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN6 :1;\n};\nstruct {\nunsigned EPSTALL6 :1;\n};\n} UEP6bits_t;\nextern volatile UEP6bits_t UEP6bits @ 0xF76;\n\n# 1546\nextern volatile unsigned char UEP7 @ 0xF77;\n\nasm(\"UEP7 equ 0F77h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EP7CONDIS :1;\n};\nstruct {\nunsigned :4;\nunsigned EP7HSHK :1;\n};\nstruct {\nunsigned :1;\nunsigned EP7INEN :1;\n};\nstruct {\nunsigned :2;\nunsigned EP7OUTEN :1;\n};\nstruct {\nunsigned EP7STALL :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS7 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK7 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN7 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN7 :1;\n};\nstruct {\nunsigned EPSTALL7 :1;\n};\n} UEP7bits_t;\nextern volatile UEP7bits_t UEP7bits @ 0xF77;\n\n# 1677\nextern volatile unsigned char UEP8 @ 0xF78;\n\nasm(\"UEP8 equ 0F78h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS8 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK8 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN8 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN8 :1;\n};\nstruct {\nunsigned EPSTALL8 :1;\n};\n} UEP8bits_t;\nextern volatile UEP8bits_t UEP8bits @ 0xF78;\n\n# 1764\nextern volatile unsigned char UEP9 @ 0xF79;\n\nasm(\"UEP9 equ 0F79h\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS9 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK9 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN9 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN9 :1;\n};\nstruct {\nunsigned EPSTALL9 :1;\n};\n} UEP9bits_t;\nextern volatile UEP9bits_t UEP9bits @ 0xF79;\n\n# 1851\nextern volatile unsigned char UEP10 @ 0xF7A;\n\nasm(\"UEP10 equ 0F7Ah\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS10 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK10 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN10 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN10 :1;\n};\nstruct {\nunsigned EPSTALL10 :1;\n};\n} UEP10bits_t;\nextern volatile UEP10bits_t UEP10bits @ 0xF7A;\n\n# 1938\nextern volatile unsigned char UEP11 @ 0xF7B;\n\nasm(\"UEP11 equ 0F7Bh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS11 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK11 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN11 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN11 :1;\n};\nstruct {\nunsigned EPSTALL11 :1;\n};\n} UEP11bits_t;\nextern volatile UEP11bits_t UEP11bits @ 0xF7B;\n\n# 2025\nextern volatile unsigned char UEP12 @ 0xF7C;\n\nasm(\"UEP12 equ 0F7Ch\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS12 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK12 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN12 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN12 :1;\n};\nstruct {\nunsigned EPSTALL12 :1;\n};\n} UEP12bits_t;\nextern volatile UEP12bits_t UEP12bits @ 0xF7C;\n\n# 2112\nextern volatile unsigned char UEP13 @ 0xF7D;\n\nasm(\"UEP13 equ 0F7Dh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS13 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK13 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN13 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN13 :1;\n};\nstruct {\nunsigned EPSTALL13 :1;\n};\n} UEP13bits_t;\nextern volatile UEP13bits_t UEP13bits @ 0xF7D;\n\n# 2199\nextern volatile unsigned char UEP14 @ 0xF7E;\n\nasm(\"UEP14 equ 0F7Eh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS14 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK14 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN14 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN14 :1;\n};\nstruct {\nunsigned EPSTALL14 :1;\n};\n} UEP14bits_t;\nextern volatile UEP14bits_t UEP14bits @ 0xF7E;\n\n# 2286\nextern volatile unsigned char UEP15 @ 0xF7F;\n\nasm(\"UEP15 equ 0F7Fh\");\n\n\ntypedef union {\nstruct {\nunsigned EPSTALL :1;\nunsigned EPINEN :1;\nunsigned EPOUTEN :1;\nunsigned EPCONDIS :1;\nunsigned EPHSHK :1;\n};\nstruct {\nunsigned :3;\nunsigned EPCONDIS15 :1;\n};\nstruct {\nunsigned :4;\nunsigned EPHSHK15 :1;\n};\nstruct {\nunsigned :1;\nunsigned EPINEN15 :1;\n};\nstruct {\nunsigned :2;\nunsigned EPOUTEN15 :1;\n};\nstruct {\nunsigned EPSTALL15 :1;\n};\n} UEP15bits_t;\nextern volatile UEP15bits_t UEP15bits @ 0xF7F;\n\n# 2373\nextern volatile unsigned char PORTA @ 0xF80;\n\nasm(\"PORTA equ 0F80h\");\n\n\ntypedef union {\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\nstruct {\nunsigned AN0 :1;\nunsigned AN1 :1;\nunsigned AN2 :1;\nunsigned AN3 :1;\nunsigned T0CKI :1;\nunsigned AN4 :1;\nunsigned OSC2 :1;\n};\nstruct {\nunsigned :2;\nunsigned VREFM :1;\nunsigned VREFP :1;\nunsigned :1;\nunsigned LVDIN :1;\n};\nstruct {\nunsigned :5;\nunsigned HLVDIN :1;\n};\nstruct {\nunsigned :7;\nunsigned RA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned RJPU :1;\n};\nstruct {\nunsigned ULPWUIN :1;\n};\n} PORTAbits_t;\nextern volatile PORTAbits_t PORTAbits @ 0xF80;\n\n# 2529\nextern volatile unsigned char PORTB @ 0xF81;\n\nasm(\"PORTB equ 0F81h\");\n\n\ntypedef union {\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\nstruct {\nunsigned INT0 :1;\nunsigned INT1 :1;\nunsigned INT2 :1;\nunsigned :2;\nunsigned PGM :1;\nunsigned PGC :1;\nunsigned PGD :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP2_PA2 :1;\n};\n} PORTBbits_t;\nextern volatile PORTBbits_t PORTBbits @ 0xF81;\n\n# 2638\nextern volatile unsigned char PORTC @ 0xF82;\n\nasm(\"PORTC equ 0F82h\");\n\n\ntypedef union {\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :1;\nunsigned RC4 :1;\nunsigned RC5 :1;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned T1OSO :1;\nunsigned T1OSI :1;\nunsigned CCP1 :1;\nunsigned :3;\nunsigned TX :1;\nunsigned RX :1;\n};\nstruct {\nunsigned T13CKI :1;\nunsigned :1;\nunsigned P1A :1;\nunsigned :3;\nunsigned CK :1;\nunsigned DT :1;\n};\nstruct {\nunsigned :1;\nunsigned CCP2 :1;\n};\nstruct {\nunsigned :2;\nunsigned PA1 :1;\n};\nstruct {\nunsigned :1;\nunsigned PA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned RC3 :1;\n};\n} PORTCbits_t;\nextern volatile PORTCbits_t PORTCbits @ 0xF82;\n\n# 2791\nextern volatile unsigned char PORTE @ 0xF84;\n\nasm(\"PORTE equ 0F84h\");\n\n\ntypedef union {\nstruct {\nunsigned :3;\nunsigned RE3 :1;\n};\nstruct {\nunsigned :2;\nunsigned CCP10 :1;\n};\nstruct {\nunsigned :7;\nunsigned CCP2E :1;\n};\nstruct {\nunsigned :6;\nunsigned CCP6E :1;\n};\nstruct {\nunsigned :5;\nunsigned CCP7E :1;\n};\nstruct {\nunsigned :4;\nunsigned CCP8E :1;\n};\nstruct {\nunsigned :3;\nunsigned CCP9E :1;\n};\nstruct {\nunsigned :2;\nunsigned CS :1;\n};\nstruct {\nunsigned :7;\nunsigned PA2E :1;\n};\nstruct {\nunsigned :6;\nunsigned PB1E :1;\n};\nstruct {\nunsigned :2;\nunsigned PB2 :1;\n};\nstruct {\nunsigned :4;\nunsigned PB3E :1;\n};\nstruct {\nunsigned :5;\nunsigned PC1E :1;\n};\nstruct {\nunsigned :1;\nunsigned PC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned PC3E :1;\n};\nstruct {\nunsigned PD2 :1;\n};\nstruct {\nunsigned RDE :1;\n};\nstruct {\nunsigned RE0 :1;\n};\nstruct {\nunsigned :1;\nunsigned RE1 :1;\n};\nstruct {\nunsigned :2;\nunsigned RE2 :1;\n};\nstruct {\nunsigned :4;\nunsigned RE4 :1;\n};\nstruct {\nunsigned :5;\nunsigned RE5 :1;\n};\nstruct {\nunsigned :6;\nunsigned RE6 :1;\n};\nstruct {\nunsigned :7;\nunsigned RE7 :1;\n};\nstruct {\nunsigned :1;\nunsigned WRE :1;\n};\n} PORTEbits_t;\nextern volatile PORTEbits_t PORTEbits @ 0xF84;\n\n# 3024\nextern volatile unsigned char LATA @ 0xF89;\n\nasm(\"LATA equ 0F89h\");\n\n\ntypedef union {\nstruct {\nunsigned LATA0 :1;\nunsigned LATA1 :1;\nunsigned LATA2 :1;\nunsigned LATA3 :1;\nunsigned LATA4 :1;\nunsigned LATA5 :1;\nunsigned LATA6 :1;\n};\nstruct {\nunsigned LA0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LA1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LA2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LA3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LA4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LA5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LA6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LA7 :1;\n};\nstruct {\nunsigned :7;\nunsigned LATA7 :1;\n};\n} LATAbits_t;\nextern volatile LATAbits_t LATAbits @ 0xF89;\n\n# 3159\nextern volatile unsigned char LATB @ 0xF8A;\n\nasm(\"LATB equ 0F8Ah\");\n\n\ntypedef union {\nstruct {\nunsigned LATB0 :1;\nunsigned LATB1 :1;\nunsigned LATB2 :1;\nunsigned LATB3 :1;\nunsigned LATB4 :1;\nunsigned LATB5 :1;\nunsigned LATB6 :1;\nunsigned LATB7 :1;\n};\nstruct {\nunsigned LB0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LB1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LB2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LB3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LB4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LB5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LB6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LB7 :1;\n};\n} LATBbits_t;\nextern volatile LATBbits_t LATBbits @ 0xF8A;\n\n# 3291\nextern volatile unsigned char LATC @ 0xF8B;\n\nasm(\"LATC equ 0F8Bh\");\n\n\ntypedef union {\nstruct {\nunsigned LATC0 :1;\nunsigned LATC1 :1;\nunsigned LATC2 :1;\nunsigned :3;\nunsigned LATC6 :1;\nunsigned LATC7 :1;\n};\nstruct {\nunsigned LC0 :1;\n};\nstruct {\nunsigned :1;\nunsigned LC1 :1;\n};\nstruct {\nunsigned :2;\nunsigned LC2 :1;\n};\nstruct {\nunsigned :3;\nunsigned LC3 :1;\n};\nstruct {\nunsigned :4;\nunsigned LC4 :1;\n};\nstruct {\nunsigned :5;\nunsigned LC5 :1;\n};\nstruct {\nunsigned :6;\nunsigned LC6 :1;\n};\nstruct {\nunsigned :7;\nunsigned LC7 :1;\n};\n} LATCbits_t;\nextern volatile LATCbits_t LATCbits @ 0xF8B;\n\n# 3406\nextern volatile unsigned char TRISA @ 0xF92;\n\nasm(\"TRISA equ 0F92h\");\n\n\nextern volatile unsigned char DDRA @ 0xF92;\n\nasm(\"DDRA equ 0F92h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} TRISAbits_t;\nextern volatile TRISAbits_t TRISAbits @ 0xF92;\n\n# 3509\ntypedef union {\nstruct {\nunsigned TRISA0 :1;\nunsigned TRISA1 :1;\nunsigned TRISA2 :1;\nunsigned TRISA3 :1;\nunsigned TRISA4 :1;\nunsigned TRISA5 :1;\nunsigned TRISA6 :1;\n};\nstruct {\nunsigned RA0 :1;\nunsigned RA1 :1;\nunsigned RA2 :1;\nunsigned RA3 :1;\nunsigned RA4 :1;\nunsigned RA5 :1;\nunsigned RA6 :1;\n};\n} DDRAbits_t;\nextern volatile DDRAbits_t DDRAbits @ 0xF92;\n\n# 3603\nextern volatile unsigned char TRISB @ 0xF93;\n\nasm(\"TRISB equ 0F93h\");\n\n\nextern volatile unsigned char DDRB @ 0xF93;\n\nasm(\"DDRB equ 0F93h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} TRISBbits_t;\nextern volatile TRISBbits_t TRISBbits @ 0xF93;\n\n# 3718\ntypedef union {\nstruct {\nunsigned TRISB0 :1;\nunsigned TRISB1 :1;\nunsigned TRISB2 :1;\nunsigned TRISB3 :1;\nunsigned TRISB4 :1;\nunsigned TRISB5 :1;\nunsigned TRISB6 :1;\nunsigned TRISB7 :1;\n};\nstruct {\nunsigned RB0 :1;\nunsigned RB1 :1;\nunsigned RB2 :1;\nunsigned RB3 :1;\nunsigned RB4 :1;\nunsigned RB5 :1;\nunsigned RB6 :1;\nunsigned RB7 :1;\n};\n} DDRBbits_t;\nextern volatile DDRBbits_t DDRBbits @ 0xF93;\n\n# 3824\nextern volatile unsigned char TRISC @ 0xF94;\n\nasm(\"TRISC equ 0F94h\");\n\n\nextern volatile unsigned char DDRC @ 0xF94;\n\nasm(\"DDRC equ 0F94h\");\n\n\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} TRISCbits_t;\nextern volatile TRISCbits_t TRISCbits @ 0xF94;\n\n# 3914\ntypedef union {\nstruct {\nunsigned TRISC0 :1;\nunsigned TRISC1 :1;\nunsigned TRISC2 :1;\nunsigned :3;\nunsigned TRISC6 :1;\nunsigned TRISC7 :1;\n};\nstruct {\nunsigned RC0 :1;\nunsigned RC1 :1;\nunsigned RC2 :1;\nunsigned :3;\nunsigned RC6 :1;\nunsigned RC7 :1;\n};\nstruct {\nunsigned :3;\nunsigned TRISC3 :1;\n};\n} DDRCbits_t;\nextern volatile DDRCbits_t DDRCbits @ 0xF94;\n\n# 3995\nextern volatile unsigned char OSCTUNE @ 0xF9B;\n\nasm(\"OSCTUNE equ 0F9Bh\");\n\n\ntypedef union {\nstruct {\nunsigned TUN :5;\nunsigned :2;\nunsigned INTSRC :1;\n};\nstruct {\nunsigned TUN0 :1;\nunsigned TUN1 :1;\nunsigned TUN2 :1;\nunsigned TUN3 :1;\nunsigned TUN4 :1;\n};\n} OSCTUNEbits_t;\nextern volatile OSCTUNEbits_t OSCTUNEbits @ 0xF9B;\n\n# 4053\nextern volatile unsigned char PIE1 @ 0xF9D;\n\nasm(\"PIE1 equ 0F9Dh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IE :1;\nunsigned TMR2IE :1;\nunsigned CCP1IE :1;\nunsigned SSPIE :1;\nunsigned TXIE :1;\nunsigned RCIE :1;\nunsigned ADIE :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IE :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IE :1;\n};\n} PIE1bits_t;\nextern volatile PIE1bits_t PIE1bits @ 0xF9D;\n\n# 4126\nextern volatile unsigned char PIR1 @ 0xF9E;\n\nasm(\"PIR1 equ 0F9Eh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IF :1;\nunsigned TMR2IF :1;\nunsigned CCP1IF :1;\nunsigned SSPIF :1;\nunsigned TXIF :1;\nunsigned RCIF :1;\nunsigned ADIF :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IF :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IF :1;\n};\n} PIR1bits_t;\nextern volatile PIR1bits_t PIR1bits @ 0xF9E;\n\n# 4199\nextern volatile unsigned char IPR1 @ 0xF9F;\n\nasm(\"IPR1 equ 0F9Fh\");\n\n\ntypedef union {\nstruct {\nunsigned TMR1IP :1;\nunsigned TMR2IP :1;\nunsigned CCP1IP :1;\nunsigned SSPIP :1;\nunsigned TXIP :1;\nunsigned RCIP :1;\nunsigned ADIP :1;\n};\nstruct {\nunsigned :5;\nunsigned RC1IP :1;\n};\nstruct {\nunsigned :4;\nunsigned TX1IP :1;\n};\n} IPR1bits_t;\nextern volatile IPR1bits_t IPR1bits @ 0xF9F;\n\n# 4272\nextern volatile unsigned char PIE2 @ 0xFA0;\n\nasm(\"PIE2 equ 0FA0h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IE :1;\nunsigned TMR3IE :1;\nunsigned HLVDIE :1;\nunsigned BCLIE :1;\nunsigned EEIE :1;\nunsigned USBIE :1;\nunsigned CMIE :1;\nunsigned OSCFIE :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIE :1;\n};\n} PIE2bits_t;\nextern volatile PIE2bits_t PIE2bits @ 0xFA0;\n\n# 4342\nextern volatile unsigned char PIR2 @ 0xFA1;\n\nasm(\"PIR2 equ 0FA1h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IF :1;\nunsigned TMR3IF :1;\nunsigned HLVDIF :1;\nunsigned BCLIF :1;\nunsigned EEIF :1;\nunsigned USBIF :1;\nunsigned CMIF :1;\nunsigned OSCFIF :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIF :1;\n};\n} PIR2bits_t;\nextern volatile PIR2bits_t PIR2bits @ 0xFA1;\n\n# 4412\nextern volatile unsigned char IPR2 @ 0xFA2;\n\nasm(\"IPR2 equ 0FA2h\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2IP :1;\nunsigned TMR3IP :1;\nunsigned HLVDIP :1;\nunsigned BCLIP :1;\nunsigned EEIP :1;\nunsigned USBIP :1;\nunsigned CMIP :1;\nunsigned OSCFIP :1;\n};\nstruct {\nunsigned :2;\nunsigned LVDIP :1;\n};\n} IPR2bits_t;\nextern volatile IPR2bits_t IPR2bits @ 0xFA2;\n\n# 4482\nextern volatile unsigned char EECON1 @ 0xFA6;\n\nasm(\"EECON1 equ 0FA6h\");\n\n\ntypedef union {\nstruct {\nunsigned RD :1;\nunsigned WR :1;\nunsigned WREN :1;\nunsigned WRERR :1;\nunsigned FREE :1;\nunsigned :1;\nunsigned CFGS :1;\nunsigned EEPGD :1;\n};\nstruct {\nunsigned :6;\nunsigned EEFS :1;\n};\n} EECON1bits_t;\nextern volatile EECON1bits_t EECON1bits @ 0xFA6;\n\n# 4547\nextern volatile unsigned char EECON2 @ 0xFA7;\n\nasm(\"EECON2 equ 0FA7h\");\n\n\n\nextern volatile unsigned char EEDATA @ 0xFA8;\n\nasm(\"EEDATA equ 0FA8h\");\n\n\n\nextern volatile unsigned char EEADR @ 0xFA9;\n\nasm(\"EEADR equ 0FA9h\");\n\n\n\nextern volatile unsigned char RCSTA @ 0xFAB;\n\nasm(\"RCSTA equ 0FABh\");\n\n\nextern volatile unsigned char RCSTA1 @ 0xFAB;\n\nasm(\"RCSTA1 equ 0FABh\");\n\n\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTAbits_t;\nextern volatile RCSTAbits_t RCSTAbits @ 0xFAB;\n\n# 4648\ntypedef union {\nstruct {\nunsigned RX9D :1;\nunsigned OERR :1;\nunsigned FERR :1;\nunsigned ADDEN :1;\nunsigned CREN :1;\nunsigned SREN :1;\nunsigned RX9 :1;\nunsigned SPEN :1;\n};\nstruct {\nunsigned :3;\nunsigned ADEN :1;\n};\nstruct {\nunsigned :5;\nunsigned SRENA :1;\n};\n} RCSTA1bits_t;\nextern volatile RCSTA1bits_t RCSTA1bits @ 0xFAB;\n\n# 4722\nextern volatile unsigned char TXSTA @ 0xFAC;\n\nasm(\"TXSTA equ 0FACh\");\n\n\nextern volatile unsigned char TXSTA1 @ 0xFAC;\n\nasm(\"TXSTA1 equ 0FACh\");\n\n\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTAbits_t;\nextern volatile TXSTAbits_t TXSTAbits @ 0xFAC;\n\n# 4858\ntypedef union {\nstruct {\nunsigned TX9D :1;\nunsigned TRMT :1;\nunsigned BRGH :1;\nunsigned SENDB :1;\nunsigned SYNC :1;\nunsigned TXEN :1;\nunsigned TX9 :1;\nunsigned CSRC :1;\n};\nstruct {\nunsigned :2;\nunsigned BRGH1 :1;\n};\nstruct {\nunsigned :7;\nunsigned CSRC1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SENDB1 :1;\n};\nstruct {\nunsigned :4;\nunsigned SYNC1 :1;\n};\nstruct {\nunsigned :1;\nunsigned TRMT1 :1;\n};\nstruct {\nunsigned :6;\nunsigned TX91 :1;\n};\nstruct {\nunsigned TX9D1 :1;\n};\nstruct {\nunsigned :5;\nunsigned TXEN1 :1;\n};\n} TXSTA1bits_t;\nextern volatile TXSTA1bits_t TXSTA1bits @ 0xFAC;\n\n# 4985\nextern volatile unsigned char TXREG @ 0xFAD;\n\nasm(\"TXREG equ 0FADh\");\n\n\nextern volatile unsigned char TXREG1 @ 0xFAD;\n\nasm(\"TXREG1 equ 0FADh\");\n\n\n\nextern volatile unsigned char RCREG @ 0xFAE;\n\nasm(\"RCREG equ 0FAEh\");\n\n\nextern volatile unsigned char RCREG1 @ 0xFAE;\n\nasm(\"RCREG1 equ 0FAEh\");\n\n\n\nextern volatile unsigned char SPBRG @ 0xFAF;\n\nasm(\"SPBRG equ 0FAFh\");\n\n\nextern volatile unsigned char SPBRG1 @ 0xFAF;\n\nasm(\"SPBRG1 equ 0FAFh\");\n\n\n\nextern volatile unsigned char SPBRGH @ 0xFB0;\n\nasm(\"SPBRGH equ 0FB0h\");\n\n\n\nextern volatile unsigned char T3CON @ 0xFB1;\n\nasm(\"T3CON equ 0FB1h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T3SYNC :1;\n};\nstruct {\nunsigned TMR3ON :1;\nunsigned TMR3CS :1;\nunsigned nT3SYNC :1;\nunsigned T3CCP1 :1;\nunsigned T3CKPS :2;\nunsigned T3CCP2 :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3SYNC :1;\nunsigned :1;\nunsigned T3CKPS0 :1;\nunsigned T3CKPS1 :1;\n};\nstruct {\nunsigned :2;\nunsigned T3NSYNC :1;\n};\nstruct {\nunsigned :7;\nunsigned RD163 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN3 :1;\n};\nstruct {\nunsigned :7;\nunsigned T3RD16 :1;\n};\n} T3CONbits_t;\nextern volatile T3CONbits_t T3CONbits @ 0xFB1;\n\n# 5146\nextern volatile unsigned short TMR3 @ 0xFB2;\n\nasm(\"TMR3 equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3L @ 0xFB2;\n\nasm(\"TMR3L equ 0FB2h\");\n\n\n\nextern volatile unsigned char TMR3H @ 0xFB3;\n\nasm(\"TMR3H equ 0FB3h\");\n\n\n\nextern volatile unsigned char CMCON @ 0xFB4;\n\nasm(\"CMCON equ 0FB4h\");\n\n\ntypedef union {\nstruct {\nunsigned CM :3;\nunsigned CIS :1;\nunsigned C1INV :1;\nunsigned C2INV :1;\nunsigned C1OUT :1;\nunsigned C2OUT :1;\n};\nstruct {\nunsigned CM0 :1;\nunsigned CM1 :1;\nunsigned CM2 :1;\n};\nstruct {\nunsigned CMEN0 :1;\n};\nstruct {\nunsigned :1;\nunsigned CMEN1 :1;\n};\nstruct {\nunsigned :2;\nunsigned CMEN2 :1;\n};\n} CMCONbits_t;\nextern volatile CMCONbits_t CMCONbits @ 0xFB4;\n\n# 5259\nextern volatile unsigned char CVRCON @ 0xFB5;\n\nasm(\"CVRCON equ 0FB5h\");\n\n\ntypedef union {\nstruct {\nunsigned CVR :4;\nunsigned CVRSS :1;\nunsigned CVRR :1;\nunsigned CVROE :1;\nunsigned CVREN :1;\n};\nstruct {\nunsigned CVR0 :1;\nunsigned CVR1 :1;\nunsigned CVR2 :1;\nunsigned CVR3 :1;\nunsigned CVREF :1;\n};\nstruct {\nunsigned :6;\nunsigned CVROEN :1;\n};\n} CVRCONbits_t;\nextern volatile CVRCONbits_t CVRCONbits @ 0xFB5;\n\n# 5343\nextern volatile unsigned char ECCP1AS @ 0xFB6;\n\nasm(\"ECCP1AS equ 0FB6h\");\n\n\nextern volatile unsigned char CCP1AS @ 0xFB6;\n\nasm(\"CCP1AS equ 0FB6h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} ECCP1ASbits_t;\nextern volatile ECCP1ASbits_t ECCP1ASbits @ 0xFB6;\n\n# 5412\ntypedef union {\nstruct {\nunsigned :2;\nunsigned PSSAC :2;\nunsigned ECCPAS :3;\nunsigned ECCPASE :1;\n};\nstruct {\nunsigned :2;\nunsigned PSSAC0 :1;\nunsigned PSSAC1 :1;\nunsigned ECCPAS0 :1;\nunsigned ECCPAS1 :1;\nunsigned ECCPAS2 :1;\n};\n} CCP1ASbits_t;\nextern volatile CCP1ASbits_t CCP1ASbits @ 0xFB6;\n\n# 5472\nextern volatile unsigned char ECCP1DEL @ 0xFB7;\n\nasm(\"ECCP1DEL equ 0FB7h\");\n\n\nextern volatile unsigned char CCP1DEL @ 0xFB7;\n\nasm(\"CCP1DEL equ 0FB7h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} ECCP1DELbits_t;\nextern volatile ECCP1DELbits_t ECCP1DELbits @ 0xFB7;\n\n# 5496\ntypedef union {\nstruct {\nunsigned :7;\nunsigned PRSEN :1;\n};\n} CCP1DELbits_t;\nextern volatile CCP1DELbits_t CCP1DELbits @ 0xFB7;\n\n# 5511\nextern volatile unsigned char BAUDCON @ 0xFB8;\n\nasm(\"BAUDCON equ 0FB8h\");\n\n\nextern volatile unsigned char BAUDCTL @ 0xFB8;\n\nasm(\"BAUDCTL equ 0FB8h\");\n\n\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCONbits_t;\nextern volatile BAUDCONbits_t BAUDCONbits @ 0xFB8;\n\n# 5605\ntypedef union {\nstruct {\nunsigned ABDEN :1;\nunsigned WUE :1;\nunsigned :1;\nunsigned BRG16 :1;\nunsigned TXCKP :1;\nunsigned RXDTP :1;\nunsigned RCIDL :1;\nunsigned ABDOVF :1;\n};\nstruct {\nunsigned :4;\nunsigned SCKP :1;\nunsigned :1;\nunsigned RCMT :1;\n};\nstruct {\nunsigned :5;\nunsigned RXCKP :1;\n};\nstruct {\nunsigned :1;\nunsigned W4E :1;\n};\n} BAUDCTLbits_t;\nextern volatile BAUDCTLbits_t BAUDCTLbits @ 0xFB8;\n\n# 5690\nextern volatile unsigned char CCP2CON @ 0xFBA;\n\nasm(\"CCP2CON equ 0FBAh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP2M :4;\nunsigned DC2B :2;\n};\nstruct {\nunsigned CCP2M0 :1;\nunsigned CCP2M1 :1;\nunsigned CCP2M2 :1;\nunsigned CCP2M3 :1;\nunsigned DC2B0 :1;\nunsigned DC2B1 :1;\n};\n} CCP2CONbits_t;\nextern volatile CCP2CONbits_t CCP2CONbits @ 0xFBA;\n\n# 5753\nextern volatile unsigned short CCPR2 @ 0xFBB;\n\nasm(\"CCPR2 equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2L @ 0xFBB;\n\nasm(\"CCPR2L equ 0FBBh\");\n\n\n\nextern volatile unsigned char CCPR2H @ 0xFBC;\n\nasm(\"CCPR2H equ 0FBCh\");\n\n\n\nextern volatile unsigned char CCP1CON @ 0xFBD;\n\nasm(\"CCP1CON equ 0FBDh\");\n\n\ntypedef union {\nstruct {\nunsigned CCP1M :4;\nunsigned DC1B :2;\n};\nstruct {\nunsigned CCP1M0 :1;\nunsigned CCP1M1 :1;\nunsigned CCP1M2 :1;\nunsigned CCP1M3 :1;\nunsigned DC1B0 :1;\nunsigned DC1B1 :1;\n};\n} CCP1CONbits_t;\nextern volatile CCP1CONbits_t CCP1CONbits @ 0xFBD;\n\n# 5834\nextern volatile unsigned short CCPR1 @ 0xFBE;\n\nasm(\"CCPR1 equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1L @ 0xFBE;\n\nasm(\"CCPR1L equ 0FBEh\");\n\n\n\nextern volatile unsigned char CCPR1H @ 0xFBF;\n\nasm(\"CCPR1H equ 0FBFh\");\n\n\n\nextern volatile unsigned char ADCON2 @ 0xFC0;\n\nasm(\"ADCON2 equ 0FC0h\");\n\n\ntypedef union {\nstruct {\nunsigned ADCS :3;\nunsigned ACQT :3;\nunsigned :1;\nunsigned ADFM :1;\n};\nstruct {\nunsigned ADCS0 :1;\nunsigned ADCS1 :1;\nunsigned ADCS2 :1;\nunsigned ACQT0 :1;\nunsigned ACQT1 :1;\nunsigned ACQT2 :1;\n};\n} ADCON2bits_t;\nextern volatile ADCON2bits_t ADCON2bits @ 0xFC0;\n\n# 5922\nextern volatile unsigned char ADCON1 @ 0xFC1;\n\nasm(\"ADCON1 equ 0FC1h\");\n\n\ntypedef union {\nstruct {\nunsigned PCFG :4;\nunsigned VCFG :2;\n};\nstruct {\nunsigned PCFG0 :1;\nunsigned PCFG1 :1;\nunsigned PCFG2 :1;\nunsigned PCFG3 :1;\nunsigned VCFG0 :1;\nunsigned VCFG1 :1;\n};\nstruct {\nunsigned :3;\nunsigned CHSN3 :1;\n};\nstruct {\nunsigned :4;\nunsigned VCFG01 :1;\n};\nstruct {\nunsigned :5;\nunsigned VCFG11 :1;\n};\n} ADCON1bits_t;\nextern volatile ADCON1bits_t ADCON1bits @ 0xFC1;\n\n# 6012\nextern volatile unsigned char ADCON0 @ 0xFC2;\n\nasm(\"ADCON0 equ 0FC2h\");\n\n\ntypedef union {\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned ADON :1;\nunsigned GO_nDONE :1;\nunsigned CHS :4;\n};\nstruct {\nunsigned :1;\nunsigned GO_NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO_DONE :1;\nunsigned CHS0 :1;\nunsigned CHS1 :1;\nunsigned CHS2 :1;\nunsigned CHS3 :1;\n};\nstruct {\nunsigned :1;\nunsigned DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GO :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_DONE :1;\n};\nstruct {\nunsigned :1;\nunsigned nDONE :1;\n};\nstruct {\nunsigned :1;\nunsigned GODONE :1;\n};\n} ADCON0bits_t;\nextern volatile ADCON0bits_t ADCON0bits @ 0xFC2;\n\n# 6134\nextern volatile unsigned short ADRES @ 0xFC3;\n\nasm(\"ADRES equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESL @ 0xFC3;\n\nasm(\"ADRESL equ 0FC3h\");\n\n\n\nextern volatile unsigned char ADRESH @ 0xFC4;\n\nasm(\"ADRESH equ 0FC4h\");\n\n\n\nextern volatile unsigned char SSPCON2 @ 0xFC5;\n\nasm(\"SSPCON2 equ 0FC5h\");\n\n\ntypedef union {\nstruct {\nunsigned SEN :1;\nunsigned RSEN :1;\nunsigned PEN :1;\nunsigned RCEN :1;\nunsigned ACKEN :1;\nunsigned ACKDT :1;\nunsigned ACKSTAT :1;\nunsigned GCEN :1;\n};\n} SSPCON2bits_t;\nextern volatile SSPCON2bits_t SSPCON2bits @ 0xFC5;\n\n# 6213\nextern volatile unsigned char SSPCON1 @ 0xFC6;\n\nasm(\"SSPCON1 equ 0FC6h\");\n\n\ntypedef union {\nstruct {\nunsigned SSPM :4;\nunsigned CKP :1;\nunsigned SSPEN :1;\nunsigned SSPOV :1;\nunsigned WCOL :1;\n};\nstruct {\nunsigned SSPM0 :1;\nunsigned SSPM1 :1;\nunsigned SSPM2 :1;\nunsigned SSPM3 :1;\n};\n} SSPCON1bits_t;\nextern volatile SSPCON1bits_t SSPCON1bits @ 0xFC6;\n\n# 6282\nextern volatile unsigned char SSPSTAT @ 0xFC7;\n\nasm(\"SSPSTAT equ 0FC7h\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned BF :1;\nunsigned UA :1;\nunsigned R_nW :1;\nunsigned S :1;\nunsigned P :1;\nunsigned D_nA :1;\nunsigned CKE :1;\nunsigned SMP :1;\n};\nstruct {\nunsigned :2;\nunsigned R_NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned D_NOT_A :1;\n};\nstruct {\nunsigned :2;\nunsigned R_W :1;\nunsigned :2;\nunsigned D_A :1;\n};\nstruct {\nunsigned :2;\nunsigned I2C_READ :1;\nunsigned I2C_START :1;\nunsigned I2C_STOP :1;\nunsigned I2C_DAT :1;\n};\nstruct {\nunsigned :2;\nunsigned nW :1;\nunsigned :2;\nunsigned nA :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_WRITE :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned nWRITE :1;\nunsigned :2;\nunsigned nADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned READ_WRITE :1;\nunsigned :2;\nunsigned DATA_ADDRESS :1;\n};\nstruct {\nunsigned :2;\nunsigned R :1;\nunsigned :2;\nunsigned D :1;\n};\nstruct {\nunsigned :5;\nunsigned DA :1;\n};\nstruct {\nunsigned :2;\nunsigned RW :1;\n};\nstruct {\nunsigned :3;\nunsigned START :1;\n};\nstruct {\nunsigned :4;\nunsigned STOP :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_W :1;\n};\nstruct {\nunsigned :5;\nunsigned NOT_A :1;\n};\n} SSPSTATbits_t;\nextern volatile SSPSTATbits_t SSPSTATbits @ 0xFC7;\n\n# 6548\nextern volatile unsigned char SSPADD @ 0xFC8;\n\nasm(\"SSPADD equ 0FC8h\");\n\n\n\nextern volatile unsigned char SSPBUF @ 0xFC9;\n\nasm(\"SSPBUF equ 0FC9h\");\n\n\n\nextern volatile unsigned char T2CON @ 0xFCA;\n\nasm(\"T2CON equ 0FCAh\");\n\n\ntypedef union {\nstruct {\nunsigned T2CKPS :2;\nunsigned TMR2ON :1;\nunsigned TOUTPS :4;\n};\nstruct {\nunsigned T2CKPS0 :1;\nunsigned T2CKPS1 :1;\nunsigned :1;\nunsigned T2OUTPS0 :1;\nunsigned T2OUTPS1 :1;\nunsigned T2OUTPS2 :1;\nunsigned T2OUTPS3 :1;\n};\nstruct {\nunsigned :3;\nunsigned TOUTPS0 :1;\nunsigned TOUTPS1 :1;\nunsigned TOUTPS2 :1;\nunsigned TOUTPS3 :1;\n};\n} T2CONbits_t;\nextern volatile T2CONbits_t T2CONbits @ 0xFCA;\n\n# 6657\nextern volatile unsigned char PR2 @ 0xFCB;\n\nasm(\"PR2 equ 0FCBh\");\n\n\nextern volatile unsigned char MEMCON @ 0xFCB;\n\nasm(\"MEMCON equ 0FCBh\");\n\n\n\nextern volatile unsigned char TMR2 @ 0xFCC;\n\nasm(\"TMR2 equ 0FCCh\");\n\n\n\nextern volatile unsigned char T1CON @ 0xFCD;\n\nasm(\"T1CON equ 0FCDh\");\n\n\ntypedef union {\nstruct {\nunsigned :2;\nunsigned NOT_T1SYNC :1;\n};\nstruct {\nunsigned TMR1ON :1;\nunsigned TMR1CS :1;\nunsigned nT1SYNC :1;\nunsigned T1OSCEN :1;\nunsigned T1CKPS :2;\nunsigned T1RUN :1;\nunsigned RD16 :1;\n};\nstruct {\nunsigned :2;\nunsigned T1SYNC :1;\nunsigned :1;\nunsigned T1CKPS0 :1;\nunsigned T1CKPS1 :1;\n};\nstruct {\nunsigned :3;\nunsigned SOSCEN :1;\n};\nstruct {\nunsigned :7;\nunsigned T1RD16 :1;\n};\n} T1CONbits_t;\nextern volatile T1CONbits_t T1CONbits @ 0xFCD;\n\n# 6778\nextern volatile unsigned short TMR1 @ 0xFCE;\n\nasm(\"TMR1 equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1L @ 0xFCE;\n\nasm(\"TMR1L equ 0FCEh\");\n\n\n\nextern volatile unsigned char TMR1H @ 0xFCF;\n\nasm(\"TMR1H equ 0FCFh\");\n\n\n\nextern volatile unsigned char RCON @ 0xFD0;\n\nasm(\"RCON equ 0FD0h\");\n\n\ntypedef union {\nstruct {\nunsigned NOT_BOR :1;\n};\nstruct {\nunsigned :1;\nunsigned NOT_POR :1;\n};\nstruct {\nunsigned :2;\nunsigned NOT_PD :1;\n};\nstruct {\nunsigned :3;\nunsigned NOT_TO :1;\n};\nstruct {\nunsigned :4;\nunsigned NOT_RI :1;\n};\nstruct {\nunsigned nBOR :1;\nunsigned nPOR :1;\nunsigned nPD :1;\nunsigned nTO :1;\nunsigned nRI :1;\nunsigned :1;\nunsigned SBOREN :1;\nunsigned IPEN :1;\n};\nstruct {\nunsigned :7;\nunsigned NOT_IPEN :1;\n};\nstruct {\nunsigned BOR :1;\nunsigned POR :1;\nunsigned PD :1;\nunsigned TO :1;\nunsigned RI :1;\nunsigned :2;\nunsigned nIPEN :1;\n};\n} RCONbits_t;\nextern volatile RCONbits_t RCONbits @ 0xFD0;\n\n# 6944\nextern volatile unsigned char WDTCON @ 0xFD1;\n\nasm(\"WDTCON equ 0FD1h\");\n\n\ntypedef union {\nstruct {\nunsigned SWDTEN :1;\n};\nstruct {\nunsigned SWDTE :1;\n};\n} WDTCONbits_t;\nextern volatile WDTCONbits_t WDTCONbits @ 0xFD1;\n\n# 6971\nextern volatile unsigned char HLVDCON @ 0xFD2;\n\nasm(\"HLVDCON equ 0FD2h\");\n\n\nextern volatile unsigned char LVDCON @ 0xFD2;\n\nasm(\"LVDCON equ 0FD2h\");\n\n\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} HLVDCONbits_t;\nextern volatile HLVDCONbits_t HLVDCONbits @ 0xFD2;\n\n# 7110\ntypedef union {\nstruct {\nunsigned HLVDL :4;\nunsigned HLVDEN :1;\nunsigned IRVST :1;\nunsigned :1;\nunsigned VDIRMAG :1;\n};\nstruct {\nunsigned HLVDL0 :1;\nunsigned HLVDL1 :1;\nunsigned HLVDL2 :1;\nunsigned HLVDL3 :1;\n};\nstruct {\nunsigned LVDL0 :1;\nunsigned LVDL1 :1;\nunsigned LVDL2 :1;\nunsigned LVDL3 :1;\nunsigned LVDEN :1;\nunsigned IVRST :1;\n};\nstruct {\nunsigned LVV0 :1;\nunsigned LVV1 :1;\nunsigned LVV2 :1;\nunsigned LVV3 :1;\nunsigned :1;\nunsigned BGST :1;\n};\n} LVDCONbits_t;\nextern volatile LVDCONbits_t LVDCONbits @ 0xFD2;\n\n# 7240\nextern volatile unsigned char OSCCON @ 0xFD3;\n\nasm(\"OSCCON equ 0FD3h\");\n\n\ntypedef union {\nstruct {\nunsigned SCS :2;\nunsigned IOFS :1;\nunsigned OSTS :1;\nunsigned IRCF :3;\nunsigned IDLEN :1;\n};\nstruct {\nunsigned SCS0 :1;\nunsigned SCS1 :1;\nunsigned FLTS :1;\nunsigned :1;\nunsigned IRCF0 :1;\nunsigned IRCF1 :1;\nunsigned IRCF2 :1;\n};\n} OSCCONbits_t;\nextern volatile OSCCONbits_t OSCCONbits @ 0xFD3;\n\n# 7322\nextern volatile unsigned char T0CON @ 0xFD5;\n\nasm(\"T0CON equ 0FD5h\");\n\n\ntypedef union {\nstruct {\nunsigned T0PS :3;\nunsigned PSA :1;\nunsigned T0SE :1;\nunsigned T0CS :1;\nunsigned T08BIT :1;\nunsigned TMR0ON :1;\n};\nstruct {\nunsigned T0PS0 :1;\nunsigned T0PS1 :1;\nunsigned T0PS2 :1;\n};\n} T0CONbits_t;\nextern volatile T0CONbits_t T0CONbits @ 0xFD5;\n\n# 7391\nextern volatile unsigned short TMR0 @ 0xFD6;\n\nasm(\"TMR0 equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0L @ 0xFD6;\n\nasm(\"TMR0L equ 0FD6h\");\n\n\n\nextern volatile unsigned char TMR0H @ 0xFD7;\n\nasm(\"TMR0H equ 0FD7h\");\n\n\n\nextern volatile unsigned char STATUS @ 0xFD8;\n\nasm(\"STATUS equ 0FD8h\");\n\n\ntypedef union {\nstruct {\nunsigned C :1;\nunsigned DC :1;\nunsigned Z :1;\nunsigned OV :1;\nunsigned N :1;\n};\nstruct {\nunsigned CARRY :1;\n};\nstruct {\nunsigned :4;\nunsigned NEGATIVE :1;\n};\nstruct {\nunsigned :3;\nunsigned OVERFLOW :1;\n};\nstruct {\nunsigned :2;\nunsigned ZERO :1;\n};\n} STATUSbits_t;\nextern volatile STATUSbits_t STATUSbits @ 0xFD8;\n\n# 7487\nextern volatile unsigned short FSR2 @ 0xFD9;\n\nasm(\"FSR2 equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2L @ 0xFD9;\n\nasm(\"FSR2L equ 0FD9h\");\n\n\n\nextern volatile unsigned char FSR2H @ 0xFDA;\n\nasm(\"FSR2H equ 0FDAh\");\n\n\n\nextern volatile unsigned char PLUSW2 @ 0xFDB;\n\nasm(\"PLUSW2 equ 0FDBh\");\n\n\n\nextern volatile unsigned char PREINC2 @ 0xFDC;\n\nasm(\"PREINC2 equ 0FDCh\");\n\n\n\nextern volatile unsigned char POSTDEC2 @ 0xFDD;\n\nasm(\"POSTDEC2 equ 0FDDh\");\n\n\n\nextern volatile unsigned char POSTINC2 @ 0xFDE;\n\nasm(\"POSTINC2 equ 0FDEh\");\n\n\n\nextern volatile unsigned char INDF2 @ 0xFDF;\n\nasm(\"INDF2 equ 0FDFh\");\n\n\n\nextern volatile unsigned char BSR @ 0xFE0;\n\nasm(\"BSR equ 0FE0h\");\n\n\n\nextern volatile unsigned short FSR1 @ 0xFE1;\n\nasm(\"FSR1 equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1L @ 0xFE1;\n\nasm(\"FSR1L equ 0FE1h\");\n\n\n\nextern volatile unsigned char FSR1H @ 0xFE2;\n\nasm(\"FSR1H equ 0FE2h\");\n\n\n\nextern volatile unsigned char PLUSW1 @ 0xFE3;\n\nasm(\"PLUSW1 equ 0FE3h\");\n\n\n\nextern volatile unsigned char PREINC1 @ 0xFE4;\n\nasm(\"PREINC1 equ 0FE4h\");\n\n\n\nextern volatile unsigned char POSTDEC1 @ 0xFE5;\n\nasm(\"POSTDEC1 equ 0FE5h\");\n\n\n\nextern volatile unsigned char POSTINC1 @ 0xFE6;\n\nasm(\"POSTINC1 equ 0FE6h\");\n\n\n\nextern volatile unsigned char INDF1 @ 0xFE7;\n\nasm(\"INDF1 equ 0FE7h\");\n\n\n\nextern volatile unsigned char WREG @ 0xFE8;\n\nasm(\"WREG equ 0FE8h\");\n\n\n\nextern volatile unsigned short FSR0 @ 0xFE9;\n\nasm(\"FSR0 equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0L @ 0xFE9;\n\nasm(\"FSR0L equ 0FE9h\");\n\n\n\nextern volatile unsigned char FSR0H @ 0xFEA;\n\nasm(\"FSR0H equ 0FEAh\");\n\n\n\nextern volatile unsigned char PLUSW0 @ 0xFEB;\n\nasm(\"PLUSW0 equ 0FEBh\");\n\n\n\nextern volatile unsigned char PREINC0 @ 0xFEC;\n\nasm(\"PREINC0 equ 0FECh\");\n\n\n\nextern volatile unsigned char POSTDEC0 @ 0xFED;\n\nasm(\"POSTDEC0 equ 0FEDh\");\n\n\n\nextern volatile unsigned char POSTINC0 @ 0xFEE;\n\nasm(\"POSTINC0 equ 0FEEh\");\n\n\n\nextern volatile unsigned char INDF0 @ 0xFEF;\n\nasm(\"INDF0 equ 0FEFh\");\n\n\n\nextern volatile unsigned char INTCON3 @ 0xFF0;\n\nasm(\"INTCON3 equ 0FF0h\");\n\n\ntypedef union {\nstruct {\nunsigned INT1IF :1;\nunsigned INT2IF :1;\nunsigned :1;\nunsigned INT1IE :1;\nunsigned INT2IE :1;\nunsigned :1;\nunsigned INT1IP :1;\nunsigned INT2IP :1;\n};\nstruct {\nunsigned INT1F :1;\nunsigned INT2F :1;\nunsigned :1;\nunsigned INT1E :1;\nunsigned INT2E :1;\nunsigned :1;\nunsigned INT1P :1;\nunsigned INT2P :1;\n};\n} INTCON3bits_t;\nextern volatile INTCON3bits_t INTCON3bits @ 0xFF0;\n\n# 7734\nextern volatile unsigned char INTCON2 @ 0xFF1;\n\nasm(\"INTCON2 equ 0FF1h\");\n\n\ntypedef union {\nstruct {\nunsigned :7;\nunsigned NOT_RBPU :1;\n};\nstruct {\nunsigned RBIP :1;\nunsigned :1;\nunsigned TMR0IP :1;\nunsigned :1;\nunsigned INTEDG2 :1;\nunsigned INTEDG1 :1;\nunsigned INTEDG0 :1;\nunsigned nRBPU :1;\n};\nstruct {\nunsigned :2;\nunsigned T0IP :1;\nunsigned :4;\nunsigned RBPU :1;\n};\n} INTCON2bits_t;\nextern volatile INTCON2bits_t INTCON2bits @ 0xFF1;\n\n# 7810\nextern volatile unsigned char INTCON @ 0xFF2;\n\nasm(\"INTCON equ 0FF2h\");\n\n\ntypedef union {\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE_GIEL :1;\nunsigned GIE_GIEH :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned RBIF :1;\nunsigned INT0IF :1;\nunsigned TMR0IF :1;\nunsigned RBIE :1;\nunsigned INT0IE :1;\nunsigned TMR0IE :1;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\nstruct {\nunsigned :1;\nunsigned INT0F :1;\nunsigned T0IF :1;\nunsigned :1;\nunsigned INT0E :1;\nunsigned T0IE :1;\nunsigned PEIE :1;\nunsigned GIE :1;\n};\nstruct {\nunsigned :6;\nunsigned GIEL :1;\nunsigned GIEH :1;\n};\n} INTCONbits_t;\nextern volatile INTCONbits_t INTCONbits @ 0xFF2;\n\n# 7946\nextern volatile unsigned short PROD @ 0xFF3;\n\nasm(\"PROD equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODL @ 0xFF3;\n\nasm(\"PRODL equ 0FF3h\");\n\n\n\nextern volatile unsigned char PRODH @ 0xFF4;\n\nasm(\"PRODH equ 0FF4h\");\n\n\n\nextern volatile unsigned char TABLAT @ 0xFF5;\n\nasm(\"TABLAT equ 0FF5h\");\n\n\n\n\nextern volatile unsigned short long TBLPTR @ 0xFF6;\n\n\nasm(\"TBLPTR equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRL @ 0xFF6;\n\nasm(\"TBLPTRL equ 0FF6h\");\n\n\n\nextern volatile unsigned char TBLPTRH @ 0xFF7;\n\nasm(\"TBLPTRH equ 0FF7h\");\n\n\n\nextern volatile unsigned char TBLPTRU @ 0xFF8;\n\nasm(\"TBLPTRU equ 0FF8h\");\n\n\n\n\nextern volatile unsigned short long PCLAT @ 0xFF9;\n\n\nasm(\"PCLAT equ 0FF9h\");\n\n\n\nextern volatile unsigned short long PC @ 0xFF9;\n\n\nasm(\"PC equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCL @ 0xFF9;\n\nasm(\"PCL equ 0FF9h\");\n\n\n\nextern volatile unsigned char PCLATH @ 0xFFA;\n\nasm(\"PCLATH equ 0FFAh\");\n\n\n\nextern volatile unsigned char PCLATU @ 0xFFB;\n\nasm(\"PCLATU equ 0FFBh\");\n\n\n\nextern volatile unsigned char STKPTR @ 0xFFC;\n\nasm(\"STKPTR equ 0FFCh\");\n\n\ntypedef union {\nstruct {\nunsigned STKPTR :5;\nunsigned :1;\nunsigned STKUNF :1;\nunsigned STKFUL :1;\n};\nstruct {\nunsigned STKPTR0 :1;\nunsigned STKPTR1 :1;\nunsigned STKPTR2 :1;\nunsigned STKPTR3 :1;\nunsigned STKPTR4 :1;\n};\nstruct {\nunsigned :7;\nunsigned STKOVF :1;\n};\n} STKPTRbits_t;\nextern volatile STKPTRbits_t STKPTRbits @ 0xFFC;\n\n# 8103\nextern volatile unsigned short long TOS @ 0xFFD;\n\n\nasm(\"TOS equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSL @ 0xFFD;\n\nasm(\"TOSL equ 0FFDh\");\n\n\n\nextern volatile unsigned char TOSH @ 0xFFE;\n\nasm(\"TOSH equ 0FFEh\");\n\n\n\nextern volatile unsigned char TOSU @ 0xFFF;\n\nasm(\"TOSU equ 0FFFh\");\n\n# 8134\nextern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;\n\nextern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;\n\nextern volatile __bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;\n\nextern volatile __bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;\n\nextern volatile __bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;\n\nextern volatile __bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;\n\nextern volatile __bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;\n\nextern volatile __bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;\n\nextern volatile __bit ACTVIE @ (((unsigned) &UIE)*8) + 2;\n\nextern volatile __bit ACTVIF @ (((unsigned) &UIR)*8) + 2;\n\nextern volatile __bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;\n\nextern volatile __bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;\n\nextern volatile __bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;\n\nextern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADDR0 @ (((unsigned) &UADDR)*8) + 0;\n\nextern volatile __bit ADDR1 @ (((unsigned) &UADDR)*8) + 1;\n\nextern volatile __bit ADDR2 @ (((unsigned) &UADDR)*8) + 2;\n\nextern volatile __bit ADDR3 @ (((unsigned) &UADDR)*8) + 3;\n\nextern volatile __bit ADDR4 @ (((unsigned) &UADDR)*8) + 4;\n\nextern volatile __bit ADDR5 @ (((unsigned) &UADDR)*8) + 5;\n\nextern volatile __bit ADDR6 @ (((unsigned) &UADDR)*8) + 6;\n\nextern volatile __bit ADEN @ (((unsigned) &RCSTA)*8) + 3;\n\nextern volatile __bit ADFM @ (((unsigned) &ADCON2)*8) + 7;\n\nextern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;\n\nextern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;\n\nextern volatile __bit ADIP @ (((unsigned) &IPR1)*8) + 6;\n\nextern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;\n\nextern volatile __bit AN0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit AN1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit AN2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit AN3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit AN4 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit BCLIE @ (((unsigned) &PIE2)*8) + 3;\n\nextern volatile __bit BCLIF @ (((unsigned) &PIR2)*8) + 3;\n\nextern volatile __bit BCLIP @ (((unsigned) &IPR2)*8) + 3;\n\nextern volatile __bit BF @ (((unsigned) &SSPSTAT)*8) + 0;\n\nextern volatile __bit BGST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;\n\nextern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;\n\nextern volatile __bit BTOEE @ (((unsigned) &UEIE)*8) + 4;\n\nextern volatile __bit BTOEF @ (((unsigned) &UEIR)*8) + 4;\n\nextern volatile __bit BTSEE @ (((unsigned) &UEIE)*8) + 7;\n\nextern volatile __bit BTSEF @ (((unsigned) &UEIR)*8) + 7;\n\nextern volatile __bit C1INV @ (((unsigned) &CMCON)*8) + 4;\n\nextern volatile __bit C1OUT @ (((unsigned) &CMCON)*8) + 6;\n\nextern volatile __bit C2INV @ (((unsigned) &CMCON)*8) + 5;\n\nextern volatile __bit C2OUT @ (((unsigned) &CMCON)*8) + 7;\n\nextern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;\n\nextern volatile __bit CCP1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit CCP10 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;\n\nextern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;\n\nextern volatile __bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;\n\nextern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;\n\nextern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;\n\nextern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;\n\nextern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;\n\nextern volatile __bit CCP2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit CCP2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;\n\nextern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;\n\nextern volatile __bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;\n\nextern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;\n\nextern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;\n\nextern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;\n\nextern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;\n\nextern volatile __bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit CCP6E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit CCP7E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit CCP8E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit CCP9E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit CFGS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;\n\nextern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;\n\nextern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;\n\nextern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;\n\nextern volatile __bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit CIS @ (((unsigned) &CMCON)*8) + 3;\n\nextern volatile __bit CK @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;\n\nextern volatile __bit CKP @ (((unsigned) &SSPCON1)*8) + 4;\n\nextern volatile __bit CM0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CM1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CM2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;\n\nextern volatile __bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;\n\nextern volatile __bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;\n\nextern volatile __bit CMIE @ (((unsigned) &PIE2)*8) + 6;\n\nextern volatile __bit CMIF @ (((unsigned) &PIR2)*8) + 6;\n\nextern volatile __bit CMIP @ (((unsigned) &IPR2)*8) + 6;\n\nextern volatile __bit CRC16EE @ (((unsigned) &UEIE)*8) + 2;\n\nextern volatile __bit CRC16EF @ (((unsigned) &UEIR)*8) + 2;\n\nextern volatile __bit CRC5EE @ (((unsigned) &UEIE)*8) + 1;\n\nextern volatile __bit CRC5EF @ (((unsigned) &UEIR)*8) + 1;\n\nextern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;\n\nextern volatile __bit CS @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;\n\nextern volatile __bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;\n\nextern volatile __bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;\n\nextern volatile __bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;\n\nextern volatile __bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;\n\nextern volatile __bit CVREF @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit CVREN @ (((unsigned) &CVRCON)*8) + 7;\n\nextern volatile __bit CVROE @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;\n\nextern volatile __bit CVRR @ (((unsigned) &CVRCON)*8) + 5;\n\nextern volatile __bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;\n\nextern volatile __bit DA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DATA_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;\n\nextern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;\n\nextern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;\n\nextern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;\n\nextern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;\n\nextern volatile __bit DFN8EE @ (((unsigned) &UEIE)*8) + 3;\n\nextern volatile __bit DFN8EF @ (((unsigned) &UEIR)*8) + 3;\n\nextern volatile __bit DIR @ (((unsigned) &USTAT)*8) + 2;\n\nextern volatile __bit DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit DT @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;\n\nextern volatile __bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;\n\nextern volatile __bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;\n\nextern volatile __bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;\n\nextern volatile __bit EEFS @ (((unsigned) &EECON1)*8) + 6;\n\nextern volatile __bit EEIE @ (((unsigned) &PIE2)*8) + 4;\n\nextern volatile __bit EEIF @ (((unsigned) &PIR2)*8) + 4;\n\nextern volatile __bit EEIP @ (((unsigned) &IPR2)*8) + 4;\n\nextern volatile __bit EEPGD @ (((unsigned) &EECON1)*8) + 7;\n\nextern volatile __bit ENDP0 @ (((unsigned) &USTAT)*8) + 3;\n\nextern volatile __bit ENDP1 @ (((unsigned) &USTAT)*8) + 4;\n\nextern volatile __bit ENDP2 @ (((unsigned) &USTAT)*8) + 5;\n\nextern volatile __bit ENDP3 @ (((unsigned) &USTAT)*8) + 6;\n\nextern volatile __bit EP0CONDIS @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EP0HSHK @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EP0INEN @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EP0OUTEN @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EP0STALL @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EP1CONDIS @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EP1HSHK @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EP1INEN @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EP1OUTEN @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EP1STALL @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EP2CONDIS @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EP2HSHK @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EP2INEN @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EP2OUTEN @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EP2STALL @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EP3CONDIS @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EP3HSHK @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EP3INEN @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EP3OUTEN @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EP3STALL @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EP4CONDIS @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EP4HSHK @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EP4INEN @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EP4OUTEN @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EP4STALL @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EP5CONDIS @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EP5HSHK @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EP5INEN @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EP5OUTEN @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EP5STALL @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EP6CONDIS @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EP6HSHK @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EP6INEN @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EP6OUTEN @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EP6STALL @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EP7CONDIS @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EP7HSHK @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EP7INEN @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EP7OUTEN @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EP7STALL @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPCONDIS0 @ (((unsigned) &UEP0)*8) + 3;\n\nextern volatile __bit EPCONDIS1 @ (((unsigned) &UEP1)*8) + 3;\n\nextern volatile __bit EPCONDIS10 @ (((unsigned) &UEP10)*8) + 3;\n\nextern volatile __bit EPCONDIS11 @ (((unsigned) &UEP11)*8) + 3;\n\nextern volatile __bit EPCONDIS12 @ (((unsigned) &UEP12)*8) + 3;\n\nextern volatile __bit EPCONDIS13 @ (((unsigned) &UEP13)*8) + 3;\n\nextern volatile __bit EPCONDIS14 @ (((unsigned) &UEP14)*8) + 3;\n\nextern volatile __bit EPCONDIS15 @ (((unsigned) &UEP15)*8) + 3;\n\nextern volatile __bit EPCONDIS2 @ (((unsigned) &UEP2)*8) + 3;\n\nextern volatile __bit EPCONDIS3 @ (((unsigned) &UEP3)*8) + 3;\n\nextern volatile __bit EPCONDIS4 @ (((unsigned) &UEP4)*8) + 3;\n\nextern volatile __bit EPCONDIS5 @ (((unsigned) &UEP5)*8) + 3;\n\nextern volatile __bit EPCONDIS6 @ (((unsigned) &UEP6)*8) + 3;\n\nextern volatile __bit EPCONDIS7 @ (((unsigned) &UEP7)*8) + 3;\n\nextern volatile __bit EPCONDIS8 @ (((unsigned) &UEP8)*8) + 3;\n\nextern volatile __bit EPCONDIS9 @ (((unsigned) &UEP9)*8) + 3;\n\nextern volatile __bit EPHSHK0 @ (((unsigned) &UEP0)*8) + 4;\n\nextern volatile __bit EPHSHK1 @ (((unsigned) &UEP1)*8) + 4;\n\nextern volatile __bit EPHSHK10 @ (((unsigned) &UEP10)*8) + 4;\n\nextern volatile __bit EPHSHK11 @ (((unsigned) &UEP11)*8) + 4;\n\nextern volatile __bit EPHSHK12 @ (((unsigned) &UEP12)*8) + 4;\n\nextern volatile __bit EPHSHK13 @ (((unsigned) &UEP13)*8) + 4;\n\nextern volatile __bit EPHSHK14 @ (((unsigned) &UEP14)*8) + 4;\n\nextern volatile __bit EPHSHK15 @ (((unsigned) &UEP15)*8) + 4;\n\nextern volatile __bit EPHSHK2 @ (((unsigned) &UEP2)*8) + 4;\n\nextern volatile __bit EPHSHK3 @ (((unsigned) &UEP3)*8) + 4;\n\nextern volatile __bit EPHSHK4 @ (((unsigned) &UEP4)*8) + 4;\n\nextern volatile __bit EPHSHK5 @ (((unsigned) &UEP5)*8) + 4;\n\nextern volatile __bit EPHSHK6 @ (((unsigned) &UEP6)*8) + 4;\n\nextern volatile __bit EPHSHK7 @ (((unsigned) &UEP7)*8) + 4;\n\nextern volatile __bit EPHSHK8 @ (((unsigned) &UEP8)*8) + 4;\n\nextern volatile __bit EPHSHK9 @ (((unsigned) &UEP9)*8) + 4;\n\nextern volatile __bit EPINEN0 @ (((unsigned) &UEP0)*8) + 1;\n\nextern volatile __bit EPINEN1 @ (((unsigned) &UEP1)*8) + 1;\n\nextern volatile __bit EPINEN10 @ (((unsigned) &UEP10)*8) + 1;\n\nextern volatile __bit EPINEN11 @ (((unsigned) &UEP11)*8) + 1;\n\nextern volatile __bit EPINEN12 @ (((unsigned) &UEP12)*8) + 1;\n\nextern volatile __bit EPINEN13 @ (((unsigned) &UEP13)*8) + 1;\n\nextern volatile __bit EPINEN14 @ (((unsigned) &UEP14)*8) + 1;\n\nextern volatile __bit EPINEN15 @ (((unsigned) &UEP15)*8) + 1;\n\nextern volatile __bit EPINEN2 @ (((unsigned) &UEP2)*8) + 1;\n\nextern volatile __bit EPINEN3 @ (((unsigned) &UEP3)*8) + 1;\n\nextern volatile __bit EPINEN4 @ (((unsigned) &UEP4)*8) + 1;\n\nextern volatile __bit EPINEN5 @ (((unsigned) &UEP5)*8) + 1;\n\nextern volatile __bit EPINEN6 @ (((unsigned) &UEP6)*8) + 1;\n\nextern volatile __bit EPINEN7 @ (((unsigned) &UEP7)*8) + 1;\n\nextern volatile __bit EPINEN8 @ (((unsigned) &UEP8)*8) + 1;\n\nextern volatile __bit EPINEN9 @ (((unsigned) &UEP9)*8) + 1;\n\nextern volatile __bit EPOUTEN0 @ (((unsigned) &UEP0)*8) + 2;\n\nextern volatile __bit EPOUTEN1 @ (((unsigned) &UEP1)*8) + 2;\n\nextern volatile __bit EPOUTEN10 @ (((unsigned) &UEP10)*8) + 2;\n\nextern volatile __bit EPOUTEN11 @ (((unsigned) &UEP11)*8) + 2;\n\nextern volatile __bit EPOUTEN12 @ (((unsigned) &UEP12)*8) + 2;\n\nextern volatile __bit EPOUTEN13 @ (((unsigned) &UEP13)*8) + 2;\n\nextern volatile __bit EPOUTEN14 @ (((unsigned) &UEP14)*8) + 2;\n\nextern volatile __bit EPOUTEN15 @ (((unsigned) &UEP15)*8) + 2;\n\nextern volatile __bit EPOUTEN2 @ (((unsigned) &UEP2)*8) + 2;\n\nextern volatile __bit EPOUTEN3 @ (((unsigned) &UEP3)*8) + 2;\n\nextern volatile __bit EPOUTEN4 @ (((unsigned) &UEP4)*8) + 2;\n\nextern volatile __bit EPOUTEN5 @ (((unsigned) &UEP5)*8) + 2;\n\nextern volatile __bit EPOUTEN6 @ (((unsigned) &UEP6)*8) + 2;\n\nextern volatile __bit EPOUTEN7 @ (((unsigned) &UEP7)*8) + 2;\n\nextern volatile __bit EPOUTEN8 @ (((unsigned) &UEP8)*8) + 2;\n\nextern volatile __bit EPOUTEN9 @ (((unsigned) &UEP9)*8) + 2;\n\nextern volatile __bit EPSTALL0 @ (((unsigned) &UEP0)*8) + 0;\n\nextern volatile __bit EPSTALL1 @ (((unsigned) &UEP1)*8) + 0;\n\nextern volatile __bit EPSTALL10 @ (((unsigned) &UEP10)*8) + 0;\n\nextern volatile __bit EPSTALL11 @ (((unsigned) &UEP11)*8) + 0;\n\nextern volatile __bit EPSTALL12 @ (((unsigned) &UEP12)*8) + 0;\n\nextern volatile __bit EPSTALL13 @ (((unsigned) &UEP13)*8) + 0;\n\nextern volatile __bit EPSTALL14 @ (((unsigned) &UEP14)*8) + 0;\n\nextern volatile __bit EPSTALL15 @ (((unsigned) &UEP15)*8) + 0;\n\nextern volatile __bit EPSTALL2 @ (((unsigned) &UEP2)*8) + 0;\n\nextern volatile __bit EPSTALL3 @ (((unsigned) &UEP3)*8) + 0;\n\nextern volatile __bit EPSTALL4 @ (((unsigned) &UEP4)*8) + 0;\n\nextern volatile __bit EPSTALL5 @ (((unsigned) &UEP5)*8) + 0;\n\nextern volatile __bit EPSTALL6 @ (((unsigned) &UEP6)*8) + 0;\n\nextern volatile __bit EPSTALL7 @ (((unsigned) &UEP7)*8) + 0;\n\nextern volatile __bit EPSTALL8 @ (((unsigned) &UEP8)*8) + 0;\n\nextern volatile __bit EPSTALL9 @ (((unsigned) &UEP9)*8) + 0;\n\nextern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;\n\nextern volatile __bit FLTS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit FREE @ (((unsigned) &EECON1)*8) + 4;\n\nextern volatile __bit FRM0 @ (((unsigned) &UFRML)*8) + 0;\n\nextern volatile __bit FRM1 @ (((unsigned) &UFRML)*8) + 1;\n\nextern volatile __bit FRM10 @ (((unsigned) &UFRMH)*8) + 2;\n\nextern volatile __bit FRM2 @ (((unsigned) &UFRML)*8) + 2;\n\nextern volatile __bit FRM3 @ (((unsigned) &UFRML)*8) + 3;\n\nextern volatile __bit FRM4 @ (((unsigned) &UFRML)*8) + 4;\n\nextern volatile __bit FRM5 @ (((unsigned) &UFRML)*8) + 5;\n\nextern volatile __bit FRM6 @ (((unsigned) &UFRML)*8) + 6;\n\nextern volatile __bit FRM7 @ (((unsigned) &UFRML)*8) + 7;\n\nextern volatile __bit FRM8 @ (((unsigned) &UFRMH)*8) + 0;\n\nextern volatile __bit FRM9 @ (((unsigned) &UFRMH)*8) + 1;\n\nextern volatile __bit FSEN @ (((unsigned) &UCFG)*8) + 2;\n\nextern volatile __bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;\n\nextern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;\n\nextern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GODONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit I2C_DAT @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit I2C_READ @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit I2C_START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit I2C_STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit IDLEIE @ (((unsigned) &UIE)*8) + 4;\n\nextern volatile __bit IDLEIF @ (((unsigned) &UIR)*8) + 4;\n\nextern volatile __bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;\n\nextern volatile __bit INT0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit INT0E @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0F @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT0IE @ (((unsigned) &INTCON)*8) + 4;\n\nextern volatile __bit INT0IF @ (((unsigned) &INTCON)*8) + 1;\n\nextern volatile __bit INT1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit INT1E @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1F @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;\n\nextern volatile __bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;\n\nextern volatile __bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT1P @ (((unsigned) &INTCON3)*8) + 6;\n\nextern volatile __bit INT2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit INT2E @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2F @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;\n\nextern volatile __bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;\n\nextern volatile __bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INT2P @ (((unsigned) &INTCON3)*8) + 7;\n\nextern volatile __bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;\n\nextern volatile __bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;\n\nextern volatile __bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;\n\nextern volatile __bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;\n\nextern volatile __bit IOFS @ (((unsigned) &OSCCON)*8) + 2;\n\nextern volatile __bit IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;\n\nextern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;\n\nextern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;\n\nextern volatile __bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;\n\nextern volatile __bit LA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;\n\nextern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;\n\nextern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;\n\nextern volatile __bit LATA3 @ (((unsigned) &LATA)*8) + 3;\n\nextern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;\n\nextern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;\n\nextern volatile __bit LATA6 @ (((unsigned) &LATA)*8) + 6;\n\nextern volatile __bit LATA7 @ (((unsigned) &LATA)*8) + 7;\n\nextern volatile __bit LATB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LATB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LATB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LATB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LB0 @ (((unsigned) &LATB)*8) + 0;\n\nextern volatile __bit LB1 @ (((unsigned) &LATB)*8) + 1;\n\nextern volatile __bit LB2 @ (((unsigned) &LATB)*8) + 2;\n\nextern volatile __bit LB3 @ (((unsigned) &LATB)*8) + 3;\n\nextern volatile __bit LB4 @ (((unsigned) &LATB)*8) + 4;\n\nextern volatile __bit LB5 @ (((unsigned) &LATB)*8) + 5;\n\nextern volatile __bit LB6 @ (((unsigned) &LATB)*8) + 6;\n\nextern volatile __bit LB7 @ (((unsigned) &LATB)*8) + 7;\n\nextern volatile __bit LC0 @ (((unsigned) &LATC)*8) + 0;\n\nextern volatile __bit LC1 @ (((unsigned) &LATC)*8) + 1;\n\nextern volatile __bit LC2 @ (((unsigned) &LATC)*8) + 2;\n\nextern volatile __bit LC3 @ (((unsigned) &LATC)*8) + 3;\n\nextern volatile __bit LC4 @ (((unsigned) &LATC)*8) + 4;\n\nextern volatile __bit LC5 @ (((unsigned) &LATC)*8) + 5;\n\nextern volatile __bit LC6 @ (((unsigned) &LATC)*8) + 6;\n\nextern volatile __bit LC7 @ (((unsigned) &LATC)*8) + 7;\n\nextern volatile __bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;\n\nextern volatile __bit LVDIE @ (((unsigned) &PIE2)*8) + 2;\n\nextern volatile __bit LVDIF @ (((unsigned) &PIR2)*8) + 2;\n\nextern volatile __bit LVDIN @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit LVDIP @ (((unsigned) &IPR2)*8) + 2;\n\nextern volatile __bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;\n\nextern volatile __bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;\n\nextern volatile __bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;\n\nextern volatile __bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;\n\nextern volatile __bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;\n\nextern volatile __bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit NOT_IPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit NOT_PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit NOT_POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit NOT_RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit NOT_TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;\n\nextern volatile __bit OSC2 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;\n\nextern volatile __bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;\n\nextern volatile __bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;\n\nextern volatile __bit OSTS @ (((unsigned) &OSCCON)*8) + 3;\n\nextern volatile __bit OV @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;\n\nextern volatile __bit P1A @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA1 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit PA2 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit PA2E @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit PB1E @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit PB2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit PB3E @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit PC1E @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit PC2 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit PC3E @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;\n\nextern volatile __bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;\n\nextern volatile __bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;\n\nextern volatile __bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;\n\nextern volatile __bit PD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit PD2 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;\n\nextern volatile __bit PEN @ (((unsigned) &SSPCON2)*8) + 2;\n\nextern volatile __bit PGC @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit PGD @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit PGM @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit PIDEE @ (((unsigned) &UEIE)*8) + 0;\n\nextern volatile __bit PIDEF @ (((unsigned) &UEIR)*8) + 0;\n\nextern volatile __bit PKTDIS @ (((unsigned) &UCON)*8) + 4;\n\nextern volatile __bit POR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit PPB0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit PPB1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit PPBI @ (((unsigned) &USTAT)*8) + 1;\n\nextern volatile __bit PPBRST @ (((unsigned) &UCON)*8) + 6;\n\nextern volatile __bit PRSEN @ (((unsigned) &ECCP1DEL)*8) + 7;\n\nextern volatile __bit PSA @ (((unsigned) &T0CON)*8) + 3;\n\nextern volatile __bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;\n\nextern volatile __bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;\n\nextern volatile __bit RA7 @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;\n\nextern volatile __bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;\n\nextern volatile __bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;\n\nextern volatile __bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;\n\nextern volatile __bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;\n\nextern volatile __bit RBIE @ (((unsigned) &INTCON)*8) + 3;\n\nextern volatile __bit RBIF @ (((unsigned) &INTCON)*8) + 0;\n\nextern volatile __bit RBIP @ (((unsigned) &INTCON2)*8) + 0;\n\nextern volatile __bit RBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit RC1IE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RC1IF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RC1IP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;\n\nextern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;\n\nextern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;\n\nextern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;\n\nextern volatile __bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;\n\nextern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;\n\nextern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;\n\nextern volatile __bit RCIP @ (((unsigned) &IPR1)*8) + 5;\n\nextern volatile __bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;\n\nextern volatile __bit RD @ (((unsigned) &EECON1)*8) + 0;\n\nextern volatile __bit RD163 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit RDE @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE0 @ (((unsigned) &PORTE)*8) + 0;\n\nextern volatile __bit RE1 @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit RE2 @ (((unsigned) &PORTE)*8) + 2;\n\nextern volatile __bit RE3 @ (((unsigned) &PORTE)*8) + 3;\n\nextern volatile __bit RE4 @ (((unsigned) &PORTE)*8) + 4;\n\nextern volatile __bit RE5 @ (((unsigned) &PORTE)*8) + 5;\n\nextern volatile __bit RE6 @ (((unsigned) &PORTE)*8) + 6;\n\nextern volatile __bit RE7 @ (((unsigned) &PORTE)*8) + 7;\n\nextern volatile __bit READ_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RESUME @ (((unsigned) &UCON)*8) + 2;\n\nextern volatile __bit RI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit RJPU @ (((unsigned) &PORTA)*8) + 7;\n\nextern volatile __bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;\n\nextern volatile __bit RW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit RX @ (((unsigned) &PORTC)*8) + 7;\n\nextern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;\n\nextern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;\n\nextern volatile __bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;\n\nextern volatile __bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit SBOREN @ (((unsigned) &RCON)*8) + 6;\n\nextern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;\n\nextern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;\n\nextern volatile __bit SE0 @ (((unsigned) &UCON)*8) + 5;\n\nextern volatile __bit SEN @ (((unsigned) &SSPCON2)*8) + 0;\n\nextern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;\n\nextern volatile __bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;\n\nextern volatile __bit SOFIE @ (((unsigned) &UIE)*8) + 6;\n\nextern volatile __bit SOFIF @ (((unsigned) &UIR)*8) + 6;\n\nextern volatile __bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;\n\nextern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SRENA @ (((unsigned) &RCSTA)*8) + 5;\n\nextern volatile __bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;\n\nextern volatile __bit SSPIE @ (((unsigned) &PIE1)*8) + 3;\n\nextern volatile __bit SSPIF @ (((unsigned) &PIR1)*8) + 3;\n\nextern volatile __bit SSPIP @ (((unsigned) &IPR1)*8) + 3;\n\nextern volatile __bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;\n\nextern volatile __bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;\n\nextern volatile __bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;\n\nextern volatile __bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;\n\nextern volatile __bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;\n\nextern volatile __bit STALLIE @ (((unsigned) &UIE)*8) + 5;\n\nextern volatile __bit STALLIF @ (((unsigned) &UIR)*8) + 5;\n\nextern volatile __bit START @ (((unsigned) &SSPSTAT)*8) + 3;\n\nextern volatile __bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;\n\nextern volatile __bit STKPTR0 @ (((unsigned) &STKPTR)*8) + 0;\n\nextern volatile __bit STKPTR1 @ (((unsigned) &STKPTR)*8) + 1;\n\nextern volatile __bit STKPTR2 @ (((unsigned) &STKPTR)*8) + 2;\n\nextern volatile __bit STKPTR3 @ (((unsigned) &STKPTR)*8) + 3;\n\nextern volatile __bit STKPTR4 @ (((unsigned) &STKPTR)*8) + 4;\n\nextern volatile __bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;\n\nextern volatile __bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;\n\nextern volatile __bit SUSPND @ (((unsigned) &UCON)*8) + 1;\n\nextern volatile __bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;\n\nextern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;\n\nextern volatile __bit T08BIT @ (((unsigned) &T0CON)*8) + 6;\n\nextern volatile __bit T0CKI @ (((unsigned) &PORTA)*8) + 4;\n\nextern volatile __bit T0CS @ (((unsigned) &T0CON)*8) + 5;\n\nextern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit T0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;\n\nextern volatile __bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;\n\nextern volatile __bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;\n\nextern volatile __bit T0SE @ (((unsigned) &T0CON)*8) + 4;\n\nextern volatile __bit T13CKI @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;\n\nextern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;\n\nextern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;\n\nextern volatile __bit T1OSI @ (((unsigned) &PORTC)*8) + 1;\n\nextern volatile __bit T1OSO @ (((unsigned) &PORTC)*8) + 0;\n\nextern volatile __bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;\n\nextern volatile __bit T1RUN @ (((unsigned) &T1CON)*8) + 6;\n\nextern volatile __bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;\n\nextern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;\n\nextern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;\n\nextern volatile __bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;\n\nextern volatile __bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;\n\nextern volatile __bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;\n\nextern volatile __bit T3NSYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;\n\nextern volatile __bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;\n\nextern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;\n\nextern volatile __bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;\n\nextern volatile __bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;\n\nextern volatile __bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;\n\nextern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;\n\nextern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;\n\nextern volatile __bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;\n\nextern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;\n\nextern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;\n\nextern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;\n\nextern volatile __bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;\n\nextern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;\n\nextern volatile __bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;\n\nextern volatile __bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;\n\nextern volatile __bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;\n\nextern volatile __bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;\n\nextern volatile __bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;\n\nextern volatile __bit TO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;\n\nextern volatile __bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;\n\nextern volatile __bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;\n\nextern volatile __bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;\n\nextern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;\n\nextern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;\n\nextern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;\n\nextern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;\n\nextern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;\n\nextern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;\n\nextern volatile __bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;\n\nextern volatile __bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;\n\nextern volatile __bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;\n\nextern volatile __bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;\n\nextern volatile __bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;\n\nextern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;\n\nextern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;\n\nextern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;\n\nextern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;\n\nextern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;\n\nextern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;\n\nextern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;\n\nextern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;\n\nextern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;\n\nextern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;\n\nextern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;\n\nextern volatile __bit TRNIE @ (((unsigned) &UIE)*8) + 3;\n\nextern volatile __bit TRNIF @ (((unsigned) &UIR)*8) + 3;\n\nextern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;\n\nextern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;\n\nextern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;\n\nextern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;\n\nextern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;\n\nextern volatile __bit TX @ (((unsigned) &PORTC)*8) + 6;\n\nextern volatile __bit TX1IE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TX1IF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TX1IP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX91 @ (((unsigned) &TXSTA)*8) + 6;\n\nextern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;\n\nextern volatile __bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;\n\nextern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;\n\nextern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;\n\nextern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;\n\nextern volatile __bit TXIP @ (((unsigned) &IPR1)*8) + 4;\n\nextern volatile __bit UA @ (((unsigned) &SSPSTAT)*8) + 1;\n\nextern volatile __bit UERRIE @ (((unsigned) &UIE)*8) + 1;\n\nextern volatile __bit UERRIF @ (((unsigned) &UIR)*8) + 1;\n\nextern volatile __bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;\n\nextern volatile __bit UOEMON @ (((unsigned) &UCFG)*8) + 6;\n\nextern volatile __bit UPP0 @ (((unsigned) &UCFG)*8) + 0;\n\nextern volatile __bit UPP1 @ (((unsigned) &UCFG)*8) + 1;\n\nextern volatile __bit UPUEN @ (((unsigned) &UCFG)*8) + 4;\n\nextern volatile __bit URSTIE @ (((unsigned) &UIE)*8) + 0;\n\nextern volatile __bit URSTIF @ (((unsigned) &UIR)*8) + 0;\n\nextern volatile __bit USBEN @ (((unsigned) &UCON)*8) + 3;\n\nextern volatile __bit USBIE @ (((unsigned) &PIE2)*8) + 5;\n\nextern volatile __bit USBIF @ (((unsigned) &PIR2)*8) + 5;\n\nextern volatile __bit USBIP @ (((unsigned) &IPR2)*8) + 5;\n\nextern volatile __bit UTEYE @ (((unsigned) &UCFG)*8) + 7;\n\nextern volatile __bit UTRDIS @ (((unsigned) &UCFG)*8) + 3;\n\nextern volatile __bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;\n\nextern volatile __bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;\n\nextern volatile __bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;\n\nextern volatile __bit VREFM @ (((unsigned) &PORTA)*8) + 2;\n\nextern volatile __bit VREFP @ (((unsigned) &PORTA)*8) + 3;\n\nextern volatile __bit W4E @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;\n\nextern volatile __bit WR @ (((unsigned) &EECON1)*8) + 1;\n\nextern volatile __bit WRE @ (((unsigned) &PORTE)*8) + 1;\n\nextern volatile __bit WREN @ (((unsigned) &EECON1)*8) + 2;\n\nextern volatile __bit WRERR @ (((unsigned) &EECON1)*8) + 3;\n\nextern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;\n\nextern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;\n\nextern volatile __bit nA @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;\n\nextern volatile __bit nBOR @ (((unsigned) &RCON)*8) + 0;\n\nextern volatile __bit nDONE @ (((unsigned) &ADCON0)*8) + 1;\n\nextern volatile __bit nIPEN @ (((unsigned) &RCON)*8) + 7;\n\nextern volatile __bit nPD @ (((unsigned) &RCON)*8) + 2;\n\nextern volatile __bit nPOR @ (((unsigned) &RCON)*8) + 1;\n\nextern volatile __bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;\n\nextern volatile __bit nRI @ (((unsigned) &RCON)*8) + 4;\n\nextern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;\n\nextern volatile __bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;\n\nextern volatile __bit nTO @ (((unsigned) &RCON)*8) + 3;\n\nextern volatile __bit nW @ (((unsigned) &SSPSTAT)*8) + 2;\n\nextern volatile __bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;\n\n# 2008 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\adc.h\"\nunion ADCResult\n{\nint lr;\nchar br[2];\n};\n\nchar BusyADC (void);\n\nvoid ConvertADC (void);\n\nvoid CloseADC(void);\n\n# 2026\nint ReadADC(void);\n\n# 2040\nvoid OpenADC ( unsigned char ,\nunsigned char ,\nunsigned char );\n\n# 2084\nvoid SetChanADC(unsigned char );\n\n# 2100\nvoid SelChanConvADC( unsigned char );\n\n# 38 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\ancomp.h\"\nvoid Close_ancomp( void );\nvoid Open_ancomp(unsigned char config);\n\n# 584 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\spi.h\"\nvoid OpenSPI( unsigned char sync_mode,\nunsigned char bus_mode,\nunsigned char smp_phase );\n\nsigned char WriteSPI( unsigned char data_out );\n\nvoid getsSPI( unsigned char *rdptr, unsigned char length );\n\nvoid putsSPI( unsigned char *wrptr );\n\nunsigned char ReadSPI( void );\n\n# 414 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\can2510.h\"\nvoid CAN2510Initialize(  unsigned int configuration,\n unsigned char brp,\n unsigned char interruptFlags,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nsigned char CAN2510Init(  unsigned long BufferConfig,\n unsigned long BitTimeConfig,\n unsigned char interruptEnables,\n unsigned char SPI_syncMode,\n unsigned char SPI_busMode,\n unsigned char SPI_smpPhase );\n\nvoid CAN2510Enable( void );\n\nvoid CAN2510Disable( void );\n\nvoid CAN2510Reset( void );\n\nvoid CAN2510SetMode(  unsigned char mode );\n\nunsigned char CAN2510ReadMode( void );\n\nunsigned char CAN2510ReadStatus( void );\n\nunsigned char CAN2510ErrorState( void );\n\nunsigned char CAN2510InterruptStatus( void );\n\nvoid CAN2510InterruptEnable( unsigned char interruptFlags );\n\nunsigned char CAN2510ByteRead(  unsigned char addr );\n\nvoid CAN2510ByteWrite(  unsigned char addr,  unsigned char value );\n\nvoid CAN2510SequentialRead(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510SequentialWrite(  unsigned char *DataArray,\n unsigned char CAN2510addr,\n unsigned char numbytes );\n\nvoid CAN2510BitModify(  unsigned char address,\n unsigned char mask,\n unsigned char data );\n\nvoid CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );\n\nvoid CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );\n\nvoid CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );\n\nvoid CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );\n\nsigned char CAN2510SetMsgFilterStd(  unsigned char bufferNum,\n unsigned int mask,\n unsigned int *filters );\n\nsigned char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,\n unsigned long mask,\n unsigned long *filters );\n\nsigned char CAN2510WriteStd(  unsigned int msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nsigned char CAN2510WriteXtd(  unsigned long msgId,\n unsigned char msgPriority,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadBufferXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes,\n unsigned char *data );\n\nvoid CAN2510LoadRTRStd(  unsigned char bufferNum,\n unsigned int msgId,\n unsigned char numBytes );\n\nvoid CAN2510LoadRTRXtd(  unsigned char bufferNum,\n unsigned long msgId,\n unsigned char numBytes );\n\nvoid CAN2510SetBufferPriority(  unsigned char bufferNum,\n unsigned char bufferPriority );\n\nvoid CAN2510SendBuffer(  unsigned char bufferNumber );\n\nsigned char CAN2510WriteBuffer(  unsigned char bufferNum );\n\nunsigned char CAN2510DataReady(  unsigned char bufferNum );\n\nunsigned char CAN2510DataRead(  unsigned char bufferNum,\n unsigned long *msgId,\n unsigned char *numBytes,\n unsigned char *data );\n\n# 64 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\capture.h\"\nunion capstatus\n{\n\n# 73\nstruct\n{\n\n# 77\nunsigned Cap1OVF:1;\n\n# 82\nunsigned Cap2OVF:1;\n\n# 115\n};\n\nunsigned :8;\n\n};\n\nextern union capstatus CapStatus;\n\nunion CapResult\n{\nunsigned int lc;\nchar bc[2];\n};\n\n# 474\nvoid OpenCapture1 ( unsigned char config);\nunsigned int ReadCapture1 (void);\nvoid CloseCapture1 (void);\n\n# 484\nvoid OpenCapture2 ( unsigned char config);\nunsigned int ReadCapture2 (void);\nvoid CloseCapture2 (void);\n\n# 385 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\compare.h\"\nvoid OpenCompare1(unsigned char config,unsigned int period);\nvoid CloseCompare1(void);\n\n# 392\nvoid OpenCompare2(unsigned char config, unsigned int period);\nvoid CloseCompare2(void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\EEP.h\"\nvoid Busy_eep ( void );\nunsigned char Read_b_eep( unsigned int badd );\nvoid Write_b_eep( unsigned int badd, unsigned char bdata );\n\n# 2 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\stddef.h\"\ntypedef int ptrdiff_t;\ntypedef unsigned size_t;\ntypedef unsigned short wchar_t;\n\n# 13\nextern int errno;\n\n# 65 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\GenericTypeDefs.h\"\ntypedef enum _BOOL { FALSE = 0, TRUE } BOOL;\n\n\ntypedef enum _BIT { CLEAR = 0, SET } BIT;\n\n# 75\ntypedef signed int INT;\ntypedef signed char INT8;\ntypedef signed short int INT16;\ntypedef signed long int INT32;\n\n\n\n typedef signed long long INT64;\n\n\n\ntypedef unsigned int UINT;\ntypedef unsigned char UINT8;\ntypedef unsigned short int UINT16;\n\n# 93\ntypedef unsigned long int UINT32;\n\n\n typedef unsigned long long UINT64;\n\n\ntypedef union\n{\nUINT8 Val;\nstruct\n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n} bits;\n} UINT8_VAL, UINT8_BITS;\n\ntypedef union\n{\nUINT16 Val;\nUINT8 v[2] ;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\n} byte;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n} bits;\n} UINT16_VAL, UINT16_BITS;\n\n# 187\ntypedef union\n{\nUINT32 Val;\nUINT16 w[2] ;\nUINT8 v[4] ;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\n} word;\nstruct \n{\nUINT8 LB;\nUINT8 HB;\nUINT8 UB;\nUINT8 MB;\n} byte;\nstruct \n{\nUINT16_VAL low;\nUINT16_VAL high;\n}wordUnion;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n} bits;\n} UINT32_VAL;\n\n\n\ntypedef union\n{\nUINT64 Val;\nUINT32 d[2] ;\nUINT16 w[4] ;\nUINT8 v[8] ;\nstruct \n{\nUINT32 LD;\nUINT32 HD;\n} dword;\nstruct \n{\nUINT16 LW;\nUINT16 HW;\nUINT16 UW;\nUINT16 MW;\n} word;\nstruct \n{\n UINT8 b0:1;\n UINT8 b1:1;\n UINT8 b2:1;\n UINT8 b3:1;\n UINT8 b4:1;\n UINT8 b5:1;\n UINT8 b6:1;\n UINT8 b7:1;\n UINT8 b8:1;\n UINT8 b9:1;\n UINT8 b10:1;\n UINT8 b11:1;\n UINT8 b12:1;\n UINT8 b13:1;\n UINT8 b14:1;\n UINT8 b15:1;\n UINT8 b16:1;\n UINT8 b17:1;\n UINT8 b18:1;\n UINT8 b19:1;\n UINT8 b20:1;\n UINT8 b21:1;\n UINT8 b22:1;\n UINT8 b23:1;\n UINT8 b24:1;\n UINT8 b25:1;\n UINT8 b26:1;\n UINT8 b27:1;\n UINT8 b28:1;\n UINT8 b29:1;\n UINT8 b30:1;\n UINT8 b31:1;\n UINT8 b32:1;\n UINT8 b33:1;\n UINT8 b34:1;\n UINT8 b35:1;\n UINT8 b36:1;\n UINT8 b37:1;\n UINT8 b38:1;\n UINT8 b39:1;\n UINT8 b40:1;\n UINT8 b41:1;\n UINT8 b42:1;\n UINT8 b43:1;\n UINT8 b44:1;\n UINT8 b45:1;\n UINT8 b46:1;\n UINT8 b47:1;\n UINT8 b48:1;\n UINT8 b49:1;\n UINT8 b50:1;\n UINT8 b51:1;\n UINT8 b52:1;\n UINT8 b53:1;\n UINT8 b54:1;\n UINT8 b55:1;\n UINT8 b56:1;\n UINT8 b57:1;\n UINT8 b58:1;\n UINT8 b59:1;\n UINT8 b60:1;\n UINT8 b61:1;\n UINT8 b62:1;\n UINT8 b63:1;\n} bits;\n} UINT64_VAL;\n\n# 339\ntypedef void VOID;\n\ntypedef char CHAR8;\ntypedef unsigned char UCHAR8;\n\ntypedef unsigned char BYTE;\ntypedef unsigned short int WORD;\ntypedef unsigned long DWORD;\n\n\ntypedef unsigned long long QWORD;\ntypedef signed char CHAR;\ntypedef signed short int SHORT;\ntypedef signed long LONG;\n\n\ntypedef signed long long LONGLONG;\ntypedef union\n{\nBYTE Val;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n} bits;\n} BYTE_VAL, BYTE_BITS;\n\ntypedef union\n{\nWORD Val;\nBYTE v[2] ;\nstruct \n{\nBYTE LB;\nBYTE HB;\n} byte;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n} bits;\n} WORD_VAL, WORD_BITS;\n\ntypedef union\n{\nDWORD Val;\nWORD w[2] ;\nBYTE v[4] ;\nstruct \n{\nWORD LW;\nWORD HW;\n} word;\nstruct \n{\nBYTE LB;\nBYTE HB;\nBYTE UB;\nBYTE MB;\n} byte;\nstruct \n{\nWORD_VAL low;\nWORD_VAL high;\n}wordUnion;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n} bits;\n} DWORD_VAL;\n\n\ntypedef union\n{\nQWORD Val;\nDWORD d[2] ;\nWORD w[4] ;\nBYTE v[8] ;\nstruct \n{\nDWORD LD;\nDWORD HD;\n} dword;\nstruct \n{\nWORD LW;\nWORD HW;\nWORD UW;\nWORD MW;\n} word;\nstruct \n{\n BYTE b0:1;\n BYTE b1:1;\n BYTE b2:1;\n BYTE b3:1;\n BYTE b4:1;\n BYTE b5:1;\n BYTE b6:1;\n BYTE b7:1;\n BYTE b8:1;\n BYTE b9:1;\n BYTE b10:1;\n BYTE b11:1;\n BYTE b12:1;\n BYTE b13:1;\n BYTE b14:1;\n BYTE b15:1;\n BYTE b16:1;\n BYTE b17:1;\n BYTE b18:1;\n BYTE b19:1;\n BYTE b20:1;\n BYTE b21:1;\n BYTE b22:1;\n BYTE b23:1;\n BYTE b24:1;\n BYTE b25:1;\n BYTE b26:1;\n BYTE b27:1;\n BYTE b28:1;\n BYTE b29:1;\n BYTE b30:1;\n BYTE b31:1;\n BYTE b32:1;\n BYTE b33:1;\n BYTE b34:1;\n BYTE b35:1;\n BYTE b36:1;\n BYTE b37:1;\n BYTE b38:1;\n BYTE b39:1;\n BYTE b40:1;\n BYTE b41:1;\n BYTE b42:1;\n BYTE b43:1;\n BYTE b44:1;\n BYTE b45:1;\n BYTE b46:1;\n BYTE b47:1;\n BYTE b48:1;\n BYTE b49:1;\n BYTE b50:1;\n BYTE b51:1;\n BYTE b52:1;\n BYTE b53:1;\n BYTE b54:1;\n BYTE b55:1;\n BYTE b56:1;\n BYTE b57:1;\n BYTE b58:1;\n BYTE b59:1;\n BYTE b60:1;\n BYTE b61:1;\n BYTE b62:1;\n BYTE b63:1;\n} bits;\n} QWORD_VAL;\n\n# 113 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\flash.h\"\nextern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 120\nextern void EraseFlash(unsigned long startaddr, unsigned long endaddr);\n\nextern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);\n\nextern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);\n\n# 775 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\i2c.h\"\nvoid IdleI2C( void );\n\nvoid OpenI2C( unsigned char sync_mode, unsigned char slew );\n\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char putsI2C( unsigned char *wrptr );\n\nunsigned char ReadI2C( void );\n\nvoid CloseI2C( void );\n\n# 899\nsigned char WriteI2C( unsigned char data_out );\n\nsigned char getsI2C( unsigned char *rdptr, unsigned char length );\n\n# 908\nsigned char EEAckPolling( unsigned char control );\n\nsigned char EEByteWrite( unsigned char control,\nunsigned char address,\nunsigned char data );\n\nsigned int EECurrentAddRead( unsigned char control );\n\nsigned char EEPageWrite( unsigned char control,\nunsigned char address,\nunsigned char *wrptr );\n\nsigned int EERandomRead( unsigned char control, unsigned char address );\n\nsigned char EESequentialRead( unsigned char control,\nunsigned char address,\nunsigned char *rdptr,\nunsigned char length );\n\n# 325 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\mwire.h\"\nvoid OpenMwire( unsigned char sync_mode );\n\nunsigned char ReadMwire( unsigned char high_byte,\nunsigned char low_byte );\n\n# 341\nsigned char WriteMwire( unsigned char data_out );\n\n# 354\nvoid getsMwire( unsigned char *rdptr, unsigned char length );\n\n# 126 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\portb.h\"\nvoid OpenPORTB( unsigned char config);\n\n# 176\nvoid OpenRB0INT( unsigned char config);\n\n# 194\nvoid OpenRB1INT( unsigned char config);\n\n# 211\nvoid OpenRB2INT( unsigned char config);\n\n# 85 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\pwm.h\"\nunion PWMDC\n{\nunsigned int lpwm;\nchar bpwm[2];\n};\n\n# 467\nvoid OpenPWM1 ( char period);\nvoid SetDCPWM1 ( unsigned int duty_cycle);\n\n# 477\nvoid ClosePWM1 (void);\n\n# 485\nvoid OpenPWM2 ( char period);\nvoid SetDCPWM2( unsigned int duty_cycle);\n\n# 492\nvoid ClosePWM2 (void);\n\n# 16 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\reset.h\"\nchar isMCLR(void);\nvoid StatusReset(void);\nchar isPOR(void);\nchar isWU(void);\n\n\nchar isBOR(void);\n\n\n\nchar isWDTTO(void);\nchar isWDTWU(void);\n\n\n\nchar isLVD(void);\n\n# 687 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\rtcc.h\"\nvoid Open_RTCC(void);\nvoid Close_RTCC(void);\nunsigned char update_RTCC(void);\n\n# 97 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_i2c.h\"\nvoid SWStopI2C ( void );\nvoid SWStartI2C ( void );\nvoid SWRestartI2C ( void );\nvoid SWStopI2C ( void );\n\nsigned char SWAckI2C( void );\nsigned char Clock_test( void );\nsigned int SWReadI2C( void );\nsigned char SWWriteI2C(  unsigned char data_out );\nsigned char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );\nsigned char SWPutsI2C(  unsigned char *wrptr );\n\n# 84 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_spi.h\"\nvoid OpenSWSPI(void);\n\n\nchar WriteSWSPI( char output);\n\n\nvoid SetCSSWSPI(void);\n\n\nvoid ClearCSSWSPI(void);\n\n# 47 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\sw_uart.h\"\nvoid OpenUART(void);\n\nunsigned char ReadUART(void);\n\nvoid WriteUART( unsigned char);\n\nvoid getsUART( char *, unsigned char);\n\nvoid putsUART( char *);\n\n# 79\nextern void DelayRXBitUART (void);\nextern void DelayRXHalfBitUART(void);\nextern void DelayTXBitUART (void);\n\n# 36 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\timers.h\"\nunion Timers\n{\nunsigned int lt;\nchar bt[2];\n};\n\n# 118\nvoid OpenTimer0 ( unsigned char config);\nvoid CloseTimer0 (void);\nunsigned int ReadTimer0 (void);\nvoid WriteTimer0 ( unsigned int timer0);\n\n# 236\nvoid OpenTimer1 ( unsigned char config);\nvoid CloseTimer1 (void);\nunsigned int ReadTimer1 (void);\nvoid WriteTimer1 ( unsigned int timer1);\n\n# 325\nvoid OpenTimer2 ( unsigned char config);\nvoid CloseTimer2 (void);\n\n# 391\nvoid OpenTimer3 ( unsigned char config);\nvoid CloseTimer3 (void);\nunsigned int ReadTimer3 (void);\nvoid WriteTimer3 ( unsigned int timer3);\n\n# 1179\nvoid SetTmrCCPSrc( unsigned char );\n\n# 568 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\usart.h\"\nunion USART\n{\nunsigned char val;\nstruct\n{\nunsigned RX_NINE:1;\nunsigned TX_NINE:1;\nunsigned FRAME_ERROR:1;\nunsigned OVERRUN_ERROR:1;\nunsigned fill:4;\n};\n};\nextern union USART USART_Status;\nvoid OpenUSART ( unsigned char config, unsigned spbrg);\n\n# 596\nchar ReadUSART (void);\nvoid WriteUSART ( char data);\nvoid getsUSART ( char *buffer, unsigned char len);\nvoid putsUSART ( char *data);\nvoid putrsUSART ( const  char *data);\n\n# 654\nvoid baudUSART ( unsigned char baudconfig);\n\n# 87 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\plib\\xlcd.h\"\nvoid OpenXLCD( unsigned char);\n\n# 92\nvoid SetCGRamAddr( unsigned char);\n\n# 97\nvoid SetDDRamAddr( unsigned char);\n\n# 102\nunsigned char BusyXLCD(void);\n\n# 107\nunsigned char ReadAddrXLCD(void);\n\n# 112\nchar ReadDataXLCD(void);\n\n# 117\nvoid WriteCmdXLCD( unsigned char);\n\n# 122\nvoid WriteDataXLCD( char);\n\n# 132\nvoid putsXLCD( char *);\n\n# 137\nvoid putrsXLCD(const char *);\n\n\nextern void DelayFor18TCY(void);\nextern void DelayPORXLCD(void);\nextern void DelayXLCD(void);\n\n# 18 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18.h\"\n__attribute__((__unsupported__(\"The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash\"))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *);\n\n\n# 143\n#pragma intrinsic(_delay)\nextern void _delay(unsigned long);\n#pragma intrinsic(_delaywdt)\nextern void _delaywdt(unsigned long);\n#pragma intrinsic(_delay3)\nextern void _delay3(unsigned char);\n\n# 18 \"../SPI/SPIPort.h\"\ntypedef char xSPIHandle;\n\n# 58 \"../SPI/SPI.h\"\nenum enSPIModules {\nE_SPI_1 = 1,\nE_SPI_2 = 2,\nE_SPI_3 = 3,\nE_SPI_4 = 4,\n};\n\n# 86\nxSPIHandle spi_init(enum enSPIModules eModule);\n\n# 99\nuint8_t spi_control(xSPIHandle spid, uint32_t ctrl, uint32_t arg);\n\n# 111\nuint8_t spi_open(xSPIHandle spid);\n\n# 122\nuint8_t spi_close(xSPIHandle spid);\n\n# 131\nvoid spi_write(xSPIHandle spid, uint8_t data);\n\n# 140\nuint8_t spi_read(xSPIHandle spid);\n\n# 149\nvoid spi_write_array(xSPIHandle spid, const uint8_t * txbuf, uint16_t len);\n\n# 158\nvoid spi_read_array(xSPIHandle spid, uint8_t * rxbuf, uint16_t len);\n\n# 168\nuint8_t spi_trans(xSPIHandle spid, uint8_t data);\n\n# 178\nvoid spi_trans_array(xSPIHandle spid, uint8_t * txbuf, uint8_t * rxbuf, uint16_t len);\n\n# 59 \"io.h\"\nvoid io_mode(uint8_t pin, uint8_t mode);\n\n# 70\nvoid io_write(uint8_t pin, uint8_t value);\n\n# 83\nuint8_t io_read( uint8_t pin );\n\n# 37 \"tc.h\"\nstruct thermocuple_struct\n{\nxSPIHandle spi;\nuint8_t cspin;\n};\n\ntypedef struct thermocuple_struct tc_t;\n\n# 58\ntc_t tc_init(xSPIHandle spid, uint8_t cspin);\n\n# 70\nint16_t tc_read(tc_t * tcpl);\n\n# 82\nfloat tc_read_float(tc_t * tcpl);\n\n# 3 \"tc.c\"\ntc_t tc_init(xSPIHandle spid, uint8_t cspin)\n{\nstruct thermocuple_struct tcpl;\n\n\nio_write(cspin, 1);\nio_mode(cspin, 0);\n\nspi_control(spid, 0x00000001 | 0x00000020, 4);\nspi_open(spid);\n\ntcpl.spi = spid;\ntcpl.cspin = cspin;\n\nreturn tcpl;\n}\n\nint16_t tc_read(tc_t * tcpl)\n{\nuint16_t buf = 0;\n\n\nio_write(tcpl->cspin, 0);\n\nspi_read_array(tcpl->spi, (uint8_t *) & buf, 2);\n\nio_write(tcpl->cspin, 1);\n\nif (buf & (1 << 2))\nreturn -1;\n\nbuf &= 0x7FF8;\n\nbuf >>= 3;\nreturn buf;\n}\n\nfloat tc_read_float(tc_t * tcpl)\n{\nreturn((float) tc_read(tcpl))* 0.25;\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/dist/default/production/pid-demo-pic18.X.production.hex",
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  {
    "path": "pid-demo-pic18.X/dist/default/production/pid-demo-pic18.X.production.hxl",
    "content": "### HEXMate logfile and output summary ###\n### Memory Usage ###\n Unused memory ranges:\n  4h - 7FFh\n  228Ch - 1FFFFFh\n  200008h - 2FFFFFh\n  30000Eh - 30003Fh\n  \n dist/default/production\\pid-demo-pic18.X.production.hex ranges:\n  0h - 3h\n  800h - 228Bh\n  200000h - 200007h\n  300000h - 30000Dh\n  \n### Hex Memory Map ###\n Legend:\n  - = Unused memory\n  F = Filled ROM\n  S = Stored serial code\n  A = Stored ASCII string\n  R = Reserved for checksum\n  C = Stored checksum result\n  T = Trailing code\n  & = Find & replace opcode\n  X = Find & delete opcode\n  1 = dist/default/production\\pid-demo-pic18.X.production.hex\n00000000: 1111------------------------------------------------------------\n00000800: 1111111111111111111111111111111111111111111111111111111111111111\n00000840: 1111111111111111111111111111111111111111111111111111111111111111\n00000880: 1111111111111111111111111111111111111111111111111111111111111111\n000008C0: 1111111111111111111111111111111111111111111111111111111111111111\n00000900: 1111111111111111111111111111111111111111111111111111111111111111\n00000940: 1111111111111111111111111111111111111111111111111111111111111111\n00000980: 1111111111111111111111111111111111111111111111111111111111111111\n000009C0: 1111111111111111111111111111111111111111111111111111111111111111\n00000A00: 1111111111111111111111111111111111111111111111111111111111111111\n00000A40: 1111111111111111111111111111111111111111111111111111111111111111\n00000A80: 1111111111111111111111111111111111111111111111111111111111111111\n00000AC0: 1111111111111111111111111111111111111111111111111111111111111111\n00000B00: 1111111111111111111111111111111111111111111111111111111111111111\n00000B40: 1111111111111111111111111111111111111111111111111111111111111111\n00000B80: 1111111111111111111111111111111111111111111111111111111111111111\n00000BC0: 1111111111111111111111111111111111111111111111111111111111111111\n00000C00: 1111111111111111111111111111111111111111111111111111111111111111\n00000C40: 1111111111111111111111111111111111111111111111111111111111111111\n00000C80: 1111111111111111111111111111111111111111111111111111111111111111\n00000CC0: 1111111111111111111111111111111111111111111111111111111111111111\n00000D00: 1111111111111111111111111111111111111111111111111111111111111111\n00000D40: 1111111111111111111111111111111111111111111111111111111111111111\n00000D80: 1111111111111111111111111111111111111111111111111111111111111111\n00000DC0: 1111111111111111111111111111111111111111111111111111111111111111\n00000E00: 1111111111111111111111111111111111111111111111111111111111111111\n00000E40: 1111111111111111111111111111111111111111111111111111111111111111\n00000E80: 1111111111111111111111111111111111111111111111111111111111111111\n00000EC0: 1111111111111111111111111111111111111111111111111111111111111111\n00000F00: 1111111111111111111111111111111111111111111111111111111111111111\n00000F40: 1111111111111111111111111111111111111111111111111111111111111111\n00000F80: 1111111111111111111111111111111111111111111111111111111111111111\n00000FC0: 1111111111111111111111111111111111111111111111111111111111111111\n00001000: 1111111111111111111111111111111111111111111111111111111111111111\n00001040: 1111111111111111111111111111111111111111111111111111111111111111\n00001080: 1111111111111111111111111111111111111111111111111111111111111111\n000010C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001100: 1111111111111111111111111111111111111111111111111111111111111111\n00001140: 1111111111111111111111111111111111111111111111111111111111111111\n00001180: 1111111111111111111111111111111111111111111111111111111111111111\n000011C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001200: 1111111111111111111111111111111111111111111111111111111111111111\n00001240: 1111111111111111111111111111111111111111111111111111111111111111\n00001280: 1111111111111111111111111111111111111111111111111111111111111111\n000012C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001300: 1111111111111111111111111111111111111111111111111111111111111111\n00001340: 1111111111111111111111111111111111111111111111111111111111111111\n00001380: 1111111111111111111111111111111111111111111111111111111111111111\n000013C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001400: 1111111111111111111111111111111111111111111111111111111111111111\n00001440: 1111111111111111111111111111111111111111111111111111111111111111\n00001480: 1111111111111111111111111111111111111111111111111111111111111111\n000014C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001500: 1111111111111111111111111111111111111111111111111111111111111111\n00001540: 1111111111111111111111111111111111111111111111111111111111111111\n00001580: 1111111111111111111111111111111111111111111111111111111111111111\n000015C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001600: 1111111111111111111111111111111111111111111111111111111111111111\n00001640: 1111111111111111111111111111111111111111111111111111111111111111\n00001680: 1111111111111111111111111111111111111111111111111111111111111111\n000016C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001700: 1111111111111111111111111111111111111111111111111111111111111111\n00001740: 1111111111111111111111111111111111111111111111111111111111111111\n00001780: 1111111111111111111111111111111111111111111111111111111111111111\n000017C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001800: 1111111111111111111111111111111111111111111111111111111111111111\n00001840: 1111111111111111111111111111111111111111111111111111111111111111\n00001880: 1111111111111111111111111111111111111111111111111111111111111111\n000018C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001900: 1111111111111111111111111111111111111111111111111111111111111111\n00001940: 1111111111111111111111111111111111111111111111111111111111111111\n00001980: 1111111111111111111111111111111111111111111111111111111111111111\n000019C0: 1111111111111111111111111111111111111111111111111111111111111111\n00001A00: 1111111111111111111111111111111111111111111111111111111111111111\n00001A40: 1111111111111111111111111111111111111111111111111111111111111111\n00001A80: 1111111111111111111111111111111111111111111111111111111111111111\n00001AC0: 1111111111111111111111111111111111111111111111111111111111111111\n00001B00: 1111111111111111111111111111111111111111111111111111111111111111\n00001B40: 1111111111111111111111111111111111111111111111111111111111111111\n00001B80: 1111111111111111111111111111111111111111111111111111111111111111\n00001BC0: 1111111111111111111111111111111111111111111111111111111111111111\n00001C00: 1111111111111111111111111111111111111111111111111111111111111111\n00001C40: 1111111111111111111111111111111111111111111111111111111111111111\n00001C80: 1111111111111111111111111111111111111111111111111111111111111111\n00001CC0: 1111111111111111111111111111111111111111111111111111111111111111\n00001D00: 1111111111111111111111111111111111111111111111111111111111111111\n00001D40: 1111111111111111111111111111111111111111111111111111111111111111\n00001D80: 1111111111111111111111111111111111111111111111111111111111111111\n00001DC0: 1111111111111111111111111111111111111111111111111111111111111111\n00001E00: 1111111111111111111111111111111111111111111111111111111111111111\n00001E40: 1111111111111111111111111111111111111111111111111111111111111111\n00001E80: 1111111111111111111111111111111111111111111111111111111111111111\n00001EC0: 1111111111111111111111111111111111111111111111111111111111111111\n00001F00: 1111111111111111111111111111111111111111111111111111111111111111\n00001F40: 1111111111111111111111111111111111111111111111111111111111111111\n00001F80: 1111111111111111111111111111111111111111111111111111111111111111\n00001FC0: 1111111111111111111111111111111111111111111111111111111111111111\n00002000: 1111111111111111111111111111111111111111111111111111111111111111\n00002040: 1111111111111111111111111111111111111111111111111111111111111111\n00002080: 1111111111111111111111111111111111111111111111111111111111111111\n000020C0: 1111111111111111111111111111111111111111111111111111111111111111\n00002100: 1111111111111111111111111111111111111111111111111111111111111111\n00002140: 1111111111111111111111111111111111111111111111111111111111111111\n00002180: 1111111111111111111111111111111111111111111111111111111111111111\n000021C0: 1111111111111111111111111111111111111111111111111111111111111111\n00002200: 1111111111111111111111111111111111111111111111111111111111111111\n00002240: 1111111111111111111111111111111111111111111111111111111111111111\n00002280: 111111111111----------------------------------------------------\n00200000: 11111111--------------------------------------------------------\n00300000: 11111111111111--------------------------------------------------\n"
  },
  {
    "path": "pid-demo-pic18.X/dist/default/production/pid-demo-pic18.X.production.lst",
    "content": "\n\nMicrochip Technology PIC18 LITE Macro Assembler V1.12 build 49521 \n                                                                                               Thu Aug 14 17:09:40 2014\n\nHI-TECH Software Omniscient Code Generator (Lite mode) build 49521\n     1  0000                     opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n     2                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n     3                           \n     4                           opt pagewidth 120\n     5                           \n     6                           \topt lm\n     7                           \n     8  0000                     porta\tequ\t0F80h\n     9  0000                     portb\tequ\t0F81h\n    10  0000                     portc\tequ\t0F82h\n    11  0000                     portd\tequ\t0F83h\n    12  0000                     porte\tequ\t0F84h\n    13  0000                     lata\tequ\t0F89h\n    14  0000                     latb\tequ\t0F8Ah\n    15  0000                     latc\tequ\t0F8Bh\n    16  0000                     latd\tequ\t0F8Ch\n    17  0000                     late\tequ\t0F8Dh\n    18  0000                     trisa\tequ\t0F92h\n    19  0000                     trisb\tequ\t0F93h\n    20  0000                     trisc\tequ\t0F94h\n    21  0000                     trisd\tequ\t0F95h\n    22  0000                     trise\tequ\t0F96h\n    23  0000                     pie1\tequ\t0F9Dh\n    24  0000                     pir1\tequ\t0F9Eh\n    25  0000                     ipr1\tequ\t0F9Fh\n    26  0000                     pie2\tequ\t0FA0h\n    27  0000                     pir2\tequ\t0FA1h\n    28  0000                     ipr2\tequ\t0FA2h\n    29  0000                     t3con\tequ\t0FB1h\n    30  0000                     tmr3l\tequ\t0FB2h\n    31  0000                     tmr3h\tequ\t0FB3h\n    32  0000                     ccp1con\tequ\t0FBDh\n    33  0000                     ccpr1l\tequ\t0FBEh\n    34  0000                     ccpr1h\tequ\t0FBFh\n    35  0000                     adcon1\tequ\t0FC1h\n    36  0000                     adcon0\tequ\t0FC2h\n    37  0000                     adresl\tequ\t0FC3h\n    38  0000                     adresh\tequ\t0FC4h\n    39  0000                     sspcon2\tequ\t0FC5h\n    40  0000                     sspcon1\tequ\t0FC6h\n    41  0000                     sspstat\tequ\t0FC7h\n    42  0000                     sspadd\tequ\t0FC8h\n    43  0000                     sspbuf\tequ\t0FC9h\n    44  0000                     t2con\tequ\t0FCAh\n    45  0000                     pr2\tequ\t0FCBh\n    46  0000                     tmr2\tequ\t0FCCh\n    47  0000                     t1con\tequ\t0FCDh\n    48  0000                     tmr1l\tequ\t0FCEh\n    49  0000                     tmr1h\tequ\t0FCFh\n    50  0000                     rcon\tequ\t0FD0h\n    51  0000                     wdtcon\tequ\t0FD1h\n    52  0000                     lvdcon\tequ\t0FD2h\n    53  0000                     osccon\tequ\t0FD3h\n    54  0000                     t0con\tequ\t0FD5h\n    55  0000                     tmr0l\tequ\t0FD6h\n    56  0000                     tmr0h\tequ\t0FD7h\n    57  0000                     status\tequ\t0FD8h\n    58  0000                     fsr2\tequ\t0FD9h\n    59  0000                     fsr2l\tequ\t0FD9h\n    60  0000                     fsr2h\tequ\t0FDAh\n    61  0000                     plusw2\tequ\t0FDBh\n    62  0000                     preinc2\tequ\t0FDCh\n    63  0000                     postdec2\tequ\t0FDDh\n    64  0000                     postinc2\tequ\t0FDEh\n    65  0000                     indf2\tequ\t0FDFh\n    66  0000                     bsr\tequ\t0FE0h\n    67  0000                     fsr1\tequ\t0FE1h\n    68  0000                     fsr1l\tequ\t0FE1h\n    69  0000                     fsr1h\tequ\t0FE2h\n    70  0000                     plusw1\tequ\t0FE3h\n    71  0000                     preinc1\tequ\t0FE4h\n    72  0000                     postdec1\tequ\t0FE5h\n    73  0000                     postinc1\tequ\t0FE6h\n    74  0000                     indf1\tequ\t0FE7h\n    75  0000                     wreg\tequ\t0FE8h\n    76  0000                     fsr0\tequ\t0FE9h\n    77  0000                     fsr0l\tequ\t0FE9h\n    78  0000                     fsr0h\tequ\t0FEAh\n    79  0000                     plusw0\tequ\t0FEBh\n    80  0000                     preinc0\tequ\t0FECh\n    81  0000                     postdec0\tequ\t0FEDh\n    82  0000                     postinc0\tequ\t0FEEh\n    83  0000                     indf0\tequ\t0FEFh\n    84  0000                     intcon3\tequ\t0FF0h\n    85  0000                     intcon2\tequ\t0FF1h\n    86  0000                     intcon\tequ\t0FF2h\n    87  0000                     prod\tequ\t0FF3h\n    88  0000                     prodl\tequ\t0FF3h\n    89  0000                     prodh\tequ\t0FF4h\n    90  0000                     tablat\tequ\t0FF5h\n    91  0000                     tblptr\tequ\t0FF6h\n    92  0000                     tblptrl\tequ\t0FF6h\n    93  0000                     tblptrh\tequ\t0FF7h\n    94  0000                     tblptru\tequ\t0FF8h\n    95  0000                     pcl\tequ\t0FF9h\n    96  0000                     pclat\tequ\t0FFAh\n    97  0000                     pclath\tequ\t0FFAh\n    98  0000                     pclatu\tequ\t0FFBh\n    99  0000                     stkptr\tequ\t0FFCh\n   100  0000                     tosl\tequ\t0FFDh\n   101  0000                     tosh\tequ\t0FFEh\n   102  0000                     tosu\tequ\t0FFFh\n   103                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   104                           \n   105  0000                     \tendm\n   106                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   107                           \n   108                           opt pagewidth 120\n   109  0000                     UFRM equ 0F66h ;# \n   110                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   111  0000                     UFRML equ 0F66h ;# \n   112                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   113  0000                     UFRMH equ 0F67h ;# \n   114                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   115  0000                     UIR equ 0F68h ;# \n   116                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   117  0000                     UIE equ 0F69h ;# \n   118                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   119  0000                     UEIR equ 0F6Ah ;# \n   120                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   121  0000                     UEIE equ 0F6Bh ;# \n   122                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   123  0000                     USTAT equ 0F6Ch ;# \n   124                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   125  0000                     UCON equ 0F6Dh ;# \n   126                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   127  0000                     UADDR equ 0F6Eh ;# \n   128                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   129  0000                     UCFG equ 0F6Fh ;# \n   130                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   131  0000                     UEP0 equ 0F70h ;# \n   132                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   133  0000                     UEP1 equ 0F71h ;# \n   134                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   135  0000                     UEP2 equ 0F72h ;# \n   136                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   137  0000                     UEP3 equ 0F73h ;# \n   138                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   139  0000                     UEP4 equ 0F74h ;# \n   140                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   141  0000                     UEP5 equ 0F75h ;# \n   142                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   143  0000                     UEP6 equ 0F76h ;# \n   144                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   145  0000                     UEP7 equ 0F77h ;# \n   146                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   147  0000                     UEP8 equ 0F78h ;# \n   148                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   149  0000                     UEP9 equ 0F79h ;# \n   150                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   151  0000                     UEP10 equ 0F7Ah ;# \n   152                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   153  0000                     UEP11 equ 0F7Bh ;# \n   154                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   155  0000                     UEP12 equ 0F7Ch ;# \n   156                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   157  0000                     UEP13 equ 0F7Dh ;# \n   158                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   159  0000                     UEP14 equ 0F7Eh ;# \n   160                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   161  0000                     UEP15 equ 0F7Fh ;# \n   162                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   163  0000                     PORTA equ 0F80h ;# \n   164                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   165  0000                     PORTB equ 0F81h ;# \n   166                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   167  0000                     PORTC equ 0F82h ;# \n   168                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   169  0000                     PORTE equ 0F84h ;# \n   170                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   171  0000                     LATA equ 0F89h ;# \n   172                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   173  0000                     LATB equ 0F8Ah ;# \n   174                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   175  0000                     LATC equ 0F8Bh ;# \n   176                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   177  0000                     TRISA equ 0F92h ;# \n   178                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   179  0000                     DDRA equ 0F92h ;# \n   180                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   181  0000                     TRISB equ 0F93h ;# \n   182                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   183  0000                     DDRB equ 0F93h ;# \n   184                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   185  0000                     TRISC equ 0F94h ;# \n   186                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   187  0000                     DDRC equ 0F94h ;# \n   188                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   189  0000                     OSCTUNE equ 0F9Bh ;# \n   190                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   191  0000                     PIE1 equ 0F9Dh ;# \n   192                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   193  0000                     PIR1 equ 0F9Eh ;# \n   194                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   195  0000                     IPR1 equ 0F9Fh ;# \n   196                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   197  0000                     PIE2 equ 0FA0h ;# \n   198                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   199  0000                     PIR2 equ 0FA1h ;# \n   200                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   201  0000                     IPR2 equ 0FA2h ;# \n   202                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   203  0000                     EECON1 equ 0FA6h ;# \n   204                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   205  0000                     EECON2 equ 0FA7h ;# \n   206                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   207  0000                     EEDATA equ 0FA8h ;# \n   208                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   209  0000                     EEADR equ 0FA9h ;# \n   210                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   211  0000                     RCSTA equ 0FABh ;# \n   212                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   213  0000                     RCSTA1 equ 0FABh ;# \n   214                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   215  0000                     TXSTA equ 0FACh ;# \n   216                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   217  0000                     TXSTA1 equ 0FACh ;# \n   218                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   219  0000                     TXREG equ 0FADh ;# \n   220                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   221  0000                     TXREG1 equ 0FADh ;# \n   222                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   223  0000                     RCREG equ 0FAEh ;# \n   224                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   225  0000                     RCREG1 equ 0FAEh ;# \n   226                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   227  0000                     SPBRG equ 0FAFh ;# \n   228                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   229  0000                     SPBRG1 equ 0FAFh ;# \n   230                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   231  0000                     SPBRGH equ 0FB0h ;# \n   232                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   233  0000                     T3CON equ 0FB1h ;# \n   234                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   235  0000                     TMR3 equ 0FB2h ;# \n   236                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   237  0000                     TMR3L equ 0FB2h ;# \n   238                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   239  0000                     TMR3H equ 0FB3h ;# \n   240                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   241  0000                     CMCON equ 0FB4h ;# \n   242                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   243  0000                     CVRCON equ 0FB5h ;# \n   244                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   245  0000                     ECCP1AS equ 0FB6h ;# \n   246                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   247  0000                     CCP1AS equ 0FB6h ;# \n   248                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   249  0000                     ECCP1DEL equ 0FB7h ;# \n   250                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   251  0000                     CCP1DEL equ 0FB7h ;# \n   252                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   253  0000                     BAUDCON equ 0FB8h ;# \n   254                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   255  0000                     BAUDCTL equ 0FB8h ;# \n   256                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   257  0000                     CCP2CON equ 0FBAh ;# \n   258                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   259  0000                     CCPR2 equ 0FBBh ;# \n   260                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   261  0000                     CCPR2L equ 0FBBh ;# \n   262                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   263  0000                     CCPR2H equ 0FBCh ;# \n   264                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   265  0000                     CCP1CON equ 0FBDh ;# \n   266                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   267  0000                     CCPR1 equ 0FBEh ;# \n   268                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   269  0000                     CCPR1L equ 0FBEh ;# \n   270                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   271  0000                     CCPR1H equ 0FBFh ;# \n   272                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   273  0000                     ADCON2 equ 0FC0h ;# \n   274                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   275  0000                     ADCON1 equ 0FC1h ;# \n   276                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   277  0000                     ADCON0 equ 0FC2h ;# \n   278                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   279  0000                     ADRES equ 0FC3h ;# \n   280                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   281  0000                     ADRESL equ 0FC3h ;# \n   282                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   283  0000                     ADRESH equ 0FC4h ;# \n   284                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   285  0000                     SSPCON2 equ 0FC5h ;# \n   286                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   287  0000                     SSPCON1 equ 0FC6h ;# \n   288                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   289  0000                     SSPSTAT equ 0FC7h ;# \n   290                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   291  0000                     SSPADD equ 0FC8h ;# \n   292                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   293  0000                     SSPBUF equ 0FC9h ;# \n   294                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   295  0000                     T2CON equ 0FCAh ;# \n   296                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   297  0000                     PR2 equ 0FCBh ;# \n   298                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   299  0000                     MEMCON equ 0FCBh ;# \n   300                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   301  0000                     TMR2 equ 0FCCh ;# \n   302                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   303  0000                     T1CON equ 0FCDh ;# \n   304                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   305  0000                     TMR1 equ 0FCEh ;# \n   306                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   307  0000                     TMR1L equ 0FCEh ;# \n   308                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   309  0000                     TMR1H equ 0FCFh ;# \n   310                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   311  0000                     RCON equ 0FD0h ;# \n   312                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   313  0000                     WDTCON equ 0FD1h ;# \n   314                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   315  0000                     HLVDCON equ 0FD2h ;# \n   316                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   317  0000                     LVDCON equ 0FD2h ;# \n   318                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   319  0000                     OSCCON equ 0FD3h ;# \n   320                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   321  0000                     T0CON equ 0FD5h ;# \n   322                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   323  0000                     TMR0 equ 0FD6h ;# \n   324                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   325  0000                     TMR0L equ 0FD6h ;# \n   326                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   327  0000                     TMR0H equ 0FD7h ;# \n   328                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   329  0000                     STATUS equ 0FD8h ;# \n   330                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   331  0000                     FSR2 equ 0FD9h ;# \n   332                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   333  0000                     FSR2L equ 0FD9h ;# \n   334                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   335  0000                     FSR2H equ 0FDAh ;# \n   336                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   337  0000                     PLUSW2 equ 0FDBh ;# \n   338                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   339  0000                     PREINC2 equ 0FDCh ;# \n   340                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   341  0000                     POSTDEC2 equ 0FDDh ;# \n   342                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   343  0000                     POSTINC2 equ 0FDEh ;# \n   344                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   345  0000                     INDF2 equ 0FDFh ;# \n   346                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   347  0000                     BSR equ 0FE0h ;# \n   348                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   349  0000                     FSR1 equ 0FE1h ;# \n   350                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   351  0000                     FSR1L equ 0FE1h ;# \n   352                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   353  0000                     FSR1H equ 0FE2h ;# \n   354                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   355  0000                     PLUSW1 equ 0FE3h ;# \n   356                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   357  0000                     PREINC1 equ 0FE4h ;# \n   358                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   359  0000                     POSTDEC1 equ 0FE5h ;# \n   360                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   361  0000                     POSTINC1 equ 0FE6h ;# \n   362                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   363  0000                     INDF1 equ 0FE7h ;# \n   364                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   365  0000                     WREG equ 0FE8h ;# \n   366                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   367  0000                     FSR0 equ 0FE9h ;# \n   368                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   369  0000                     FSR0L equ 0FE9h ;# \n   370                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   371  0000                     FSR0H equ 0FEAh ;# \n   372                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   373  0000                     PLUSW0 equ 0FEBh ;# \n   374                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   375  0000                     PREINC0 equ 0FECh ;# \n   376                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   377  0000                     POSTDEC0 equ 0FEDh ;# \n   378                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   379  0000                     POSTINC0 equ 0FEEh ;# \n   380                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   381  0000                     INDF0 equ 0FEFh ;# \n   382                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   383  0000                     INTCON3 equ 0FF0h ;# \n   384                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   385  0000                     INTCON2 equ 0FF1h ;# \n   386                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   387  0000                     INTCON equ 0FF2h ;# \n   388                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   389  0000                     PROD equ 0FF3h ;# \n   390                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   391  0000                     PRODL equ 0FF3h ;# \n   392                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   393  0000                     PRODH equ 0FF4h ;# \n   394                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   395  0000                     TABLAT equ 0FF5h ;# \n   396                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   397  0000                     TBLPTR equ 0FF6h ;# \n   398                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   399  0000                     TBLPTRL equ 0FF6h ;# \n   400                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   401  0000                     TBLPTRH equ 0FF7h ;# \n   402                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   403  0000                     TBLPTRU equ 0FF8h ;# \n   404                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   405  0000                     PCLAT equ 0FF9h ;# \n   406                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   407  0000                     PC equ 0FF9h ;# \n   408                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   409  0000                     PCL equ 0FF9h ;# \n   410                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   411  0000                     PCLATH equ 0FFAh ;# \n   412                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   413  0000                     PCLATU equ 0FFBh ;# \n   414                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   415  0000                     STKPTR equ 0FFCh ;# \n   416                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   417  0000                     TOS equ 0FFDh ;# \n   418                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   419  0000                     TOSL equ 0FFDh ;# \n   420                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   421  0000                     TOSH equ 0FFEh ;# \n   422                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   423  0000                     TOSU equ 0FFFh ;# \n   424                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   425  0000                     UFRM equ 0F66h ;# \n   426                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   427  0000                     UFRML equ 0F66h ;# \n   428                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   429  0000                     UFRMH equ 0F67h ;# \n   430                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   431  0000                     UIR equ 0F68h ;# \n   432                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   433  0000                     UIE equ 0F69h ;# \n   434                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   435  0000                     UEIR equ 0F6Ah ;# \n   436                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   437  0000                     UEIE equ 0F6Bh ;# \n   438                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   439  0000                     USTAT equ 0F6Ch ;# \n   440                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   441  0000                     UCON equ 0F6Dh ;# \n   442                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   443  0000                     UADDR equ 0F6Eh ;# \n   444                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   445  0000                     UCFG equ 0F6Fh ;# \n   446                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   447  0000                     UEP0 equ 0F70h ;# \n   448                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   449  0000                     UEP1 equ 0F71h ;# \n   450                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   451  0000                     UEP2 equ 0F72h ;# \n   452                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   453  0000                     UEP3 equ 0F73h ;# \n   454                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   455  0000                     UEP4 equ 0F74h ;# \n   456                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   457  0000                     UEP5 equ 0F75h ;# \n   458                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   459  0000                     UEP6 equ 0F76h ;# \n   460                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   461  0000                     UEP7 equ 0F77h ;# \n   462                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   463  0000                     UEP8 equ 0F78h ;# \n   464                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   465  0000                     UEP9 equ 0F79h ;# \n   466                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   467  0000                     UEP10 equ 0F7Ah ;# \n   468                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   469  0000                     UEP11 equ 0F7Bh ;# \n   470                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   471  0000                     UEP12 equ 0F7Ch ;# \n   472                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   473  0000                     UEP13 equ 0F7Dh ;# \n   474                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   475  0000                     UEP14 equ 0F7Eh ;# \n   476                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   477  0000                     UEP15 equ 0F7Fh ;# \n   478                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   479  0000                     PORTA equ 0F80h ;# \n   480                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   481  0000                     PORTB equ 0F81h ;# \n   482                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   483  0000                     PORTC equ 0F82h ;# \n   484                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   485  0000                     PORTE equ 0F84h ;# \n   486                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   487  0000                     LATA equ 0F89h ;# \n   488                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   489  0000                     LATB equ 0F8Ah ;# \n   490                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   491  0000                     LATC equ 0F8Bh ;# \n   492                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   493  0000                     TRISA equ 0F92h ;# \n   494                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   495  0000                     DDRA equ 0F92h ;# \n   496                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   497  0000                     TRISB equ 0F93h ;# \n   498                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   499  0000                     DDRB equ 0F93h ;# \n   500                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   501  0000                     TRISC equ 0F94h ;# \n   502                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   503  0000                     DDRC equ 0F94h ;# \n   504                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   505  0000                     OSCTUNE equ 0F9Bh ;# \n   506                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   507  0000                     PIE1 equ 0F9Dh ;# \n   508                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   509  0000                     PIR1 equ 0F9Eh ;# \n   510                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   511  0000                     IPR1 equ 0F9Fh ;# \n   512                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   513  0000                     PIE2 equ 0FA0h ;# \n   514                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   515  0000                     PIR2 equ 0FA1h ;# \n   516                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   517  0000                     IPR2 equ 0FA2h ;# \n   518                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   519  0000                     EECON1 equ 0FA6h ;# \n   520                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   521  0000                     EECON2 equ 0FA7h ;# \n   522                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   523  0000                     EEDATA equ 0FA8h ;# \n   524                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   525  0000                     EEADR equ 0FA9h ;# \n   526                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   527  0000                     RCSTA equ 0FABh ;# \n   528                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   529  0000                     RCSTA1 equ 0FABh ;# \n   530                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   531  0000                     TXSTA equ 0FACh ;# \n   532                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   533  0000                     TXSTA1 equ 0FACh ;# \n   534                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   535  0000                     TXREG equ 0FADh ;# \n   536                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   537  0000                     TXREG1 equ 0FADh ;# \n   538                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   539  0000                     RCREG equ 0FAEh ;# \n   540                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   541  0000                     RCREG1 equ 0FAEh ;# \n   542                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   543  0000                     SPBRG equ 0FAFh ;# \n   544                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   545  0000                     SPBRG1 equ 0FAFh ;# \n   546                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   547  0000                     SPBRGH equ 0FB0h ;# \n   548                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   549  0000                     T3CON equ 0FB1h ;# \n   550                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   551  0000                     TMR3 equ 0FB2h ;# \n   552                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   553  0000                     TMR3L equ 0FB2h ;# \n   554                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   555  0000                     TMR3H equ 0FB3h ;# \n   556                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   557  0000                     CMCON equ 0FB4h ;# \n   558                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   559  0000                     CVRCON equ 0FB5h ;# \n   560                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   561  0000                     ECCP1AS equ 0FB6h ;# \n   562                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   563  0000                     CCP1AS equ 0FB6h ;# \n   564                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   565  0000                     ECCP1DEL equ 0FB7h ;# \n   566                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   567  0000                     CCP1DEL equ 0FB7h ;# \n   568                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   569  0000                     BAUDCON equ 0FB8h ;# \n   570                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   571  0000                     BAUDCTL equ 0FB8h ;# \n   572                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   573  0000                     CCP2CON equ 0FBAh ;# \n   574                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   575  0000                     CCPR2 equ 0FBBh ;# \n   576                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   577  0000                     CCPR2L equ 0FBBh ;# \n   578                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   579  0000                     CCPR2H equ 0FBCh ;# \n   580                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   581  0000                     CCP1CON equ 0FBDh ;# \n   582                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   583  0000                     CCPR1 equ 0FBEh ;# \n   584                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   585  0000                     CCPR1L equ 0FBEh ;# \n   586                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   587  0000                     CCPR1H equ 0FBFh ;# \n   588                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   589  0000                     ADCON2 equ 0FC0h ;# \n   590                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   591  0000                     ADCON1 equ 0FC1h ;# \n   592                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   593  0000                     ADCON0 equ 0FC2h ;# \n   594                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   595  0000                     ADRES equ 0FC3h ;# \n   596                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   597  0000                     ADRESL equ 0FC3h ;# \n   598                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   599  0000                     ADRESH equ 0FC4h ;# \n   600                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   601  0000                     SSPCON2 equ 0FC5h ;# \n   602                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   603  0000                     SSPCON1 equ 0FC6h ;# \n   604                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   605  0000                     SSPSTAT equ 0FC7h ;# \n   606                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   607  0000                     SSPADD equ 0FC8h ;# \n   608                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   609  0000                     SSPBUF equ 0FC9h ;# \n   610                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   611  0000                     T2CON equ 0FCAh ;# \n   612                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   613  0000                     PR2 equ 0FCBh ;# \n   614                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   615  0000                     MEMCON equ 0FCBh ;# \n   616                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   617  0000                     TMR2 equ 0FCCh ;# \n   618                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   619  0000                     T1CON equ 0FCDh ;# \n   620                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   621  0000                     TMR1 equ 0FCEh ;# \n   622                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   623  0000                     TMR1L equ 0FCEh ;# \n   624                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   625  0000                     TMR1H equ 0FCFh ;# \n   626                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   627  0000                     RCON equ 0FD0h ;# \n   628                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   629  0000                     WDTCON equ 0FD1h ;# \n   630                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   631  0000                     HLVDCON equ 0FD2h ;# \n   632                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   633  0000                     LVDCON equ 0FD2h ;# \n   634                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   635  0000                     OSCCON equ 0FD3h ;# \n   636                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   637  0000                     T0CON equ 0FD5h ;# \n   638                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   639  0000                     TMR0 equ 0FD6h ;# \n   640                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   641  0000                     TMR0L equ 0FD6h ;# \n   642                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   643  0000                     TMR0H equ 0FD7h ;# \n   644                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   645  0000                     STATUS equ 0FD8h ;# \n   646                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   647  0000                     FSR2 equ 0FD9h ;# \n   648                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   649  0000                     FSR2L equ 0FD9h ;# \n   650                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   651  0000                     FSR2H equ 0FDAh ;# \n   652                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   653  0000                     PLUSW2 equ 0FDBh ;# \n   654                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   655  0000                     PREINC2 equ 0FDCh ;# \n   656                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   657  0000                     POSTDEC2 equ 0FDDh ;# \n   658                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   659  0000                     POSTINC2 equ 0FDEh ;# \n   660                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   661  0000                     INDF2 equ 0FDFh ;# \n   662                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   663  0000                     BSR equ 0FE0h ;# \n   664                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   665  0000                     FSR1 equ 0FE1h ;# \n   666                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   667  0000                     FSR1L equ 0FE1h ;# \n   668                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   669  0000                     FSR1H equ 0FE2h ;# \n   670                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   671  0000                     PLUSW1 equ 0FE3h ;# \n   672                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   673  0000                     PREINC1 equ 0FE4h ;# \n   674                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   675  0000                     POSTDEC1 equ 0FE5h ;# \n   676                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   677  0000                     POSTINC1 equ 0FE6h ;# \n   678                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   679  0000                     INDF1 equ 0FE7h ;# \n   680                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   681  0000                     WREG equ 0FE8h ;# \n   682                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   683  0000                     FSR0 equ 0FE9h ;# \n   684                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   685  0000                     FSR0L equ 0FE9h ;# \n   686                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   687  0000                     FSR0H equ 0FEAh ;# \n   688                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   689  0000                     PLUSW0 equ 0FEBh ;# \n   690                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   691  0000                     PREINC0 equ 0FECh ;# \n   692                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   693  0000                     POSTDEC0 equ 0FEDh ;# \n   694                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   695  0000                     POSTINC0 equ 0FEEh ;# \n   696                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   697  0000                     INDF0 equ 0FEFh ;# \n   698                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   699  0000                     INTCON3 equ 0FF0h ;# \n   700                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   701  0000                     INTCON2 equ 0FF1h ;# \n   702                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   703  0000                     INTCON equ 0FF2h ;# \n   704                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   705  0000                     PROD equ 0FF3h ;# \n   706                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   707  0000                     PRODL equ 0FF3h ;# \n   708                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   709  0000                     PRODH equ 0FF4h ;# \n   710                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   711  0000                     TABLAT equ 0FF5h ;# \n   712                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   713  0000                     TBLPTR equ 0FF6h ;# \n   714                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   715  0000                     TBLPTRL equ 0FF6h ;# \n   716                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   717  0000                     TBLPTRH equ 0FF7h ;# \n   718                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   719  0000                     TBLPTRU equ 0FF8h ;# \n   720                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   721  0000                     PCLAT equ 0FF9h ;# \n   722                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   723  0000                     PC equ 0FF9h ;# \n   724                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   725  0000                     PCL equ 0FF9h ;# \n   726                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   727  0000                     PCLATH equ 0FFAh ;# \n   728                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   729  0000                     PCLATU equ 0FFBh ;# \n   730                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   731  0000                     STKPTR equ 0FFCh ;# \n   732                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   733  0000                     TOS equ 0FFDh ;# \n   734                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   735  0000                     TOSL equ 0FFDh ;# \n   736                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   737  0000                     TOSH equ 0FFEh ;# \n   738                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   739  0000                     TOSU equ 0FFFh ;# \n   740                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   741  0000                     UFRM equ 0F66h ;# \n   742                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   743  0000                     UFRML equ 0F66h ;# \n   744                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   745  0000                     UFRMH equ 0F67h ;# \n   746                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   747  0000                     UIR equ 0F68h ;# \n   748                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   749  0000                     UIE equ 0F69h ;# \n   750                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   751  0000                     UEIR equ 0F6Ah ;# \n   752                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   753  0000                     UEIE equ 0F6Bh ;# \n   754                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   755  0000                     USTAT equ 0F6Ch ;# \n   756                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   757  0000                     UCON equ 0F6Dh ;# \n   758                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   759  0000                     UADDR equ 0F6Eh ;# \n   760                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   761  0000                     UCFG equ 0F6Fh ;# \n   762                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   763  0000                     UEP0 equ 0F70h ;# \n   764                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   765  0000                     UEP1 equ 0F71h ;# \n   766                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   767  0000                     UEP2 equ 0F72h ;# \n   768                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   769  0000                     UEP3 equ 0F73h ;# \n   770                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   771  0000                     UEP4 equ 0F74h ;# \n   772                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   773  0000                     UEP5 equ 0F75h ;# \n   774                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   775  0000                     UEP6 equ 0F76h ;# \n   776                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   777  0000                     UEP7 equ 0F77h ;# \n   778                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   779  0000                     UEP8 equ 0F78h ;# \n   780                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   781  0000                     UEP9 equ 0F79h ;# \n   782                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   783  0000                     UEP10 equ 0F7Ah ;# \n   784                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   785  0000                     UEP11 equ 0F7Bh ;# \n   786                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   787  0000                     UEP12 equ 0F7Ch ;# \n   788                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   789  0000                     UEP13 equ 0F7Dh ;# \n   790                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   791  0000                     UEP14 equ 0F7Eh ;# \n   792                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   793  0000                     UEP15 equ 0F7Fh ;# \n   794                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   795  0000                     PORTA equ 0F80h ;# \n   796                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   797  0000                     PORTB equ 0F81h ;# \n   798                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   799  0000                     PORTC equ 0F82h ;# \n   800                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   801  0000                     PORTE equ 0F84h ;# \n   802                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   803  0000                     LATA equ 0F89h ;# \n   804                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   805  0000                     LATB equ 0F8Ah ;# \n   806                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   807  0000                     LATC equ 0F8Bh ;# \n   808                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   809  0000                     TRISA equ 0F92h ;# \n   810                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   811  0000                     DDRA equ 0F92h ;# \n   812                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   813  0000                     TRISB equ 0F93h ;# \n   814                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   815  0000                     DDRB equ 0F93h ;# \n   816                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   817  0000                     TRISC equ 0F94h ;# \n   818                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   819  0000                     DDRC equ 0F94h ;# \n   820                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   821  0000                     OSCTUNE equ 0F9Bh ;# \n   822                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   823  0000                     PIE1 equ 0F9Dh ;# \n   824                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   825  0000                     PIR1 equ 0F9Eh ;# \n   826                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   827  0000                     IPR1 equ 0F9Fh ;# \n   828                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   829  0000                     PIE2 equ 0FA0h ;# \n   830                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   831  0000                     PIR2 equ 0FA1h ;# \n   832                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   833  0000                     IPR2 equ 0FA2h ;# \n   834                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   835  0000                     EECON1 equ 0FA6h ;# \n   836                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   837  0000                     EECON2 equ 0FA7h ;# \n   838                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   839  0000                     EEDATA equ 0FA8h ;# \n   840                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   841  0000                     EEADR equ 0FA9h ;# \n   842                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   843  0000                     RCSTA equ 0FABh ;# \n   844                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   845  0000                     RCSTA1 equ 0FABh ;# \n   846                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   847  0000                     TXSTA equ 0FACh ;# \n   848                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   849  0000                     TXSTA1 equ 0FACh ;# \n   850                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   851  0000                     TXREG equ 0FADh ;# \n   852                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   853  0000                     TXREG1 equ 0FADh ;# \n   854                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   855  0000                     RCREG equ 0FAEh ;# \n   856                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   857  0000                     RCREG1 equ 0FAEh ;# \n   858                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   859  0000                     SPBRG equ 0FAFh ;# \n   860                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   861  0000                     SPBRG1 equ 0FAFh ;# \n   862                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   863  0000                     SPBRGH equ 0FB0h ;# \n   864                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   865  0000                     T3CON equ 0FB1h ;# \n   866                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   867  0000                     TMR3 equ 0FB2h ;# \n   868                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   869  0000                     TMR3L equ 0FB2h ;# \n   870                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   871  0000                     TMR3H equ 0FB3h ;# \n   872                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   873  0000                     CMCON equ 0FB4h ;# \n   874                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   875  0000                     CVRCON equ 0FB5h ;# \n   876                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   877  0000                     ECCP1AS equ 0FB6h ;# \n   878                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   879  0000                     CCP1AS equ 0FB6h ;# \n   880                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   881  0000                     ECCP1DEL equ 0FB7h ;# \n   882                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   883  0000                     CCP1DEL equ 0FB7h ;# \n   884                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   885  0000                     BAUDCON equ 0FB8h ;# \n   886                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   887  0000                     BAUDCTL equ 0FB8h ;# \n   888                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   889  0000                     CCP2CON equ 0FBAh ;# \n   890                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   891  0000                     CCPR2 equ 0FBBh ;# \n   892                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   893  0000                     CCPR2L equ 0FBBh ;# \n   894                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   895  0000                     CCPR2H equ 0FBCh ;# \n   896                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   897  0000                     CCP1CON equ 0FBDh ;# \n   898                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   899  0000                     CCPR1 equ 0FBEh ;# \n   900                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   901  0000                     CCPR1L equ 0FBEh ;# \n   902                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   903  0000                     CCPR1H equ 0FBFh ;# \n   904                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   905  0000                     ADCON2 equ 0FC0h ;# \n   906                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   907  0000                     ADCON1 equ 0FC1h ;# \n   908                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   909  0000                     ADCON0 equ 0FC2h ;# \n   910                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   911  0000                     ADRES equ 0FC3h ;# \n   912                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   913  0000                     ADRESL equ 0FC3h ;# \n   914                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   915  0000                     ADRESH equ 0FC4h ;# \n   916                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   917  0000                     SSPCON2 equ 0FC5h ;# \n   918                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   919  0000                     SSPCON1 equ 0FC6h ;# \n   920                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   921  0000                     SSPSTAT equ 0FC7h ;# \n   922                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   923  0000                     SSPADD equ 0FC8h ;# \n   924                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   925  0000                     SSPBUF equ 0FC9h ;# \n   926                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   927  0000                     T2CON equ 0FCAh ;# \n   928                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   929  0000                     PR2 equ 0FCBh ;# \n   930                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   931  0000                     MEMCON equ 0FCBh ;# \n   932                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   933  0000                     TMR2 equ 0FCCh ;# \n   934                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   935  0000                     T1CON equ 0FCDh ;# \n   936                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   937  0000                     TMR1 equ 0FCEh ;# \n   938                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   939  0000                     TMR1L equ 0FCEh ;# \n   940                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   941  0000                     TMR1H equ 0FCFh ;# \n   942                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   943  0000                     RCON equ 0FD0h ;# \n   944                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   945  0000                     WDTCON equ 0FD1h ;# \n   946                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   947  0000                     HLVDCON equ 0FD2h ;# \n   948                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   949  0000                     LVDCON equ 0FD2h ;# \n   950                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   951  0000                     OSCCON equ 0FD3h ;# \n   952                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   953  0000                     T0CON equ 0FD5h ;# \n   954                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   955  0000                     TMR0 equ 0FD6h ;# \n   956                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   957  0000                     TMR0L equ 0FD6h ;# \n   958                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   959  0000                     TMR0H equ 0FD7h ;# \n   960                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   961  0000                     STATUS equ 0FD8h ;# \n   962                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   963  0000                     FSR2 equ 0FD9h ;# \n   964                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   965  0000                     FSR2L equ 0FD9h ;# \n   966                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   967  0000                     FSR2H equ 0FDAh ;# \n   968                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   969  0000                     PLUSW2 equ 0FDBh ;# \n   970                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   971  0000                     PREINC2 equ 0FDCh ;# \n   972                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   973  0000                     POSTDEC2 equ 0FDDh ;# \n   974                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   975  0000                     POSTINC2 equ 0FDEh ;# \n   976                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   977  0000                     INDF2 equ 0FDFh ;# \n   978                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   979  0000                     BSR equ 0FE0h ;# \n   980                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   981  0000                     FSR1 equ 0FE1h ;# \n   982                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   983  0000                     FSR1L equ 0FE1h ;# \n   984                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   985  0000                     FSR1H equ 0FE2h ;# \n   986                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   987  0000                     PLUSW1 equ 0FE3h ;# \n   988                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   989  0000                     PREINC1 equ 0FE4h ;# \n   990                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   991  0000                     POSTDEC1 equ 0FE5h ;# \n   992                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   993  0000                     POSTINC1 equ 0FE6h ;# \n   994                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   995  0000                     INDF1 equ 0FE7h ;# \n   996                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   997  0000                     WREG equ 0FE8h ;# \n   998                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n   999  0000                     FSR0 equ 0FE9h ;# \n  1000                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1001  0000                     FSR0L equ 0FE9h ;# \n  1002                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1003  0000                     FSR0H equ 0FEAh ;# \n  1004                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1005  0000                     PLUSW0 equ 0FEBh ;# \n  1006                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1007  0000                     PREINC0 equ 0FECh ;# \n  1008                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1009  0000                     POSTDEC0 equ 0FEDh ;# \n  1010                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1011  0000                     POSTINC0 equ 0FEEh ;# \n  1012                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1013  0000                     INDF0 equ 0FEFh ;# \n  1014                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1015  0000                     INTCON3 equ 0FF0h ;# \n  1016                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1017  0000                     INTCON2 equ 0FF1h ;# \n  1018                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1019  0000                     INTCON equ 0FF2h ;# \n  1020                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1021  0000                     PROD equ 0FF3h ;# \n  1022                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1023  0000                     PRODL equ 0FF3h ;# \n  1024                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1025  0000                     PRODH equ 0FF4h ;# \n  1026                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1027  0000                     TABLAT equ 0FF5h ;# \n  1028                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1029  0000                     TBLPTR equ 0FF6h ;# \n  1030                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1031  0000                     TBLPTRL equ 0FF6h ;# \n  1032                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1033  0000                     TBLPTRH equ 0FF7h ;# \n  1034                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1035  0000                     TBLPTRU equ 0FF8h ;# \n  1036                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1037  0000                     PCLAT equ 0FF9h ;# \n  1038                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1039  0000                     PC equ 0FF9h ;# \n  1040                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1041  0000                     PCL equ 0FF9h ;# \n  1042                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1043  0000                     PCLATH equ 0FFAh ;# \n  1044                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1045  0000                     PCLATU equ 0FFBh ;# \n  1046                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1047  0000                     STKPTR equ 0FFCh ;# \n  1048                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1049  0000                     TOS equ 0FFDh ;# \n  1050                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1051  0000                     TOSL equ 0FFDh ;# \n  1052                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1053  0000                     TOSH equ 0FFEh ;# \n  1054                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1055  0000                     TOSU equ 0FFFh ;# \n  1056                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1057  0000                     UFRM equ 0F66h ;# \n  1058                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1059  0000                     UFRML equ 0F66h ;# \n  1060                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1061  0000                     UFRMH equ 0F67h ;# \n  1062                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1063  0000                     UIR equ 0F68h ;# \n  1064                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1065  0000                     UIE equ 0F69h ;# \n  1066                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1067  0000                     UEIR equ 0F6Ah ;# \n  1068                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1069  0000                     UEIE equ 0F6Bh ;# \n  1070                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1071  0000                     USTAT equ 0F6Ch ;# \n  1072                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1073  0000                     UCON equ 0F6Dh ;# \n  1074                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1075  0000                     UADDR equ 0F6Eh ;# \n  1076                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1077  0000                     UCFG equ 0F6Fh ;# \n  1078                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1079  0000                     UEP0 equ 0F70h ;# \n  1080                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1081  0000                     UEP1 equ 0F71h ;# \n  1082                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1083  0000                     UEP2 equ 0F72h ;# \n  1084                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1085  0000                     UEP3 equ 0F73h ;# \n  1086                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1087  0000                     UEP4 equ 0F74h ;# \n  1088                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1089  0000                     UEP5 equ 0F75h ;# \n  1090                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1091  0000                     UEP6 equ 0F76h ;# \n  1092                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1093  0000                     UEP7 equ 0F77h ;# \n  1094                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1095  0000                     UEP8 equ 0F78h ;# \n  1096                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1097  0000                     UEP9 equ 0F79h ;# \n  1098                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1099  0000                     UEP10 equ 0F7Ah ;# \n  1100                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1101  0000                     UEP11 equ 0F7Bh ;# \n  1102                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1103  0000                     UEP12 equ 0F7Ch ;# \n  1104                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1105  0000                     UEP13 equ 0F7Dh ;# \n  1106                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1107  0000                     UEP14 equ 0F7Eh ;# \n  1108                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1109  0000                     UEP15 equ 0F7Fh ;# \n  1110                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1111  0000                     PORTA equ 0F80h ;# \n  1112                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1113  0000                     PORTB equ 0F81h ;# \n  1114                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1115  0000                     PORTC equ 0F82h ;# \n  1116                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1117  0000                     PORTE equ 0F84h ;# \n  1118                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1119  0000                     LATA equ 0F89h ;# \n  1120                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1121  0000                     LATB equ 0F8Ah ;# \n  1122                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1123  0000                     LATC equ 0F8Bh ;# \n  1124                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1125  0000                     TRISA equ 0F92h ;# \n  1126                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1127  0000                     DDRA equ 0F92h ;# \n  1128                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1129  0000                     TRISB equ 0F93h ;# \n  1130                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1131  0000                     DDRB equ 0F93h ;# \n  1132                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1133  0000                     TRISC equ 0F94h ;# \n  1134                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1135  0000                     DDRC equ 0F94h ;# \n  1136                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1137  0000                     OSCTUNE equ 0F9Bh ;# \n  1138                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1139  0000                     PIE1 equ 0F9Dh ;# \n  1140                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1141  0000                     PIR1 equ 0F9Eh ;# \n  1142                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1143  0000                     IPR1 equ 0F9Fh ;# \n  1144                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1145  0000                     PIE2 equ 0FA0h ;# \n  1146                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1147  0000                     PIR2 equ 0FA1h ;# \n  1148                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1149  0000                     IPR2 equ 0FA2h ;# \n  1150                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1151  0000                     EECON1 equ 0FA6h ;# \n  1152                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1153  0000                     EECON2 equ 0FA7h ;# \n  1154                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1155  0000                     EEDATA equ 0FA8h ;# \n  1156                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1157  0000                     EEADR equ 0FA9h ;# \n  1158                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1159  0000                     RCSTA equ 0FABh ;# \n  1160                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1161  0000                     RCSTA1 equ 0FABh ;# \n  1162                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1163  0000                     TXSTA equ 0FACh ;# \n  1164                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1165  0000                     TXSTA1 equ 0FACh ;# \n  1166                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1167  0000                     TXREG equ 0FADh ;# \n  1168                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1169  0000                     TXREG1 equ 0FADh ;# \n  1170                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1171  0000                     RCREG equ 0FAEh ;# \n  1172                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1173  0000                     RCREG1 equ 0FAEh ;# \n  1174                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1175  0000                     SPBRG equ 0FAFh ;# \n  1176                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1177  0000                     SPBRG1 equ 0FAFh ;# \n  1178                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1179  0000                     SPBRGH equ 0FB0h ;# \n  1180                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1181  0000                     T3CON equ 0FB1h ;# \n  1182                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1183  0000                     TMR3 equ 0FB2h ;# \n  1184                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1185  0000                     TMR3L equ 0FB2h ;# \n  1186                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1187  0000                     TMR3H equ 0FB3h ;# \n  1188                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1189  0000                     CMCON equ 0FB4h ;# \n  1190                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1191  0000                     CVRCON equ 0FB5h ;# \n  1192                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1193  0000                     ECCP1AS equ 0FB6h ;# \n  1194                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1195  0000                     CCP1AS equ 0FB6h ;# \n  1196                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1197  0000                     ECCP1DEL equ 0FB7h ;# \n  1198                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1199  0000                     CCP1DEL equ 0FB7h ;# \n  1200                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1201  0000                     BAUDCON equ 0FB8h ;# \n  1202                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1203  0000                     BAUDCTL equ 0FB8h ;# \n  1204                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1205  0000                     CCP2CON equ 0FBAh ;# \n  1206                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1207  0000                     CCPR2 equ 0FBBh ;# \n  1208                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1209  0000                     CCPR2L equ 0FBBh ;# \n  1210                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1211  0000                     CCPR2H equ 0FBCh ;# \n  1212                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1213  0000                     CCP1CON equ 0FBDh ;# \n  1214                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1215  0000                     CCPR1 equ 0FBEh ;# \n  1216                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1217  0000                     CCPR1L equ 0FBEh ;# \n  1218                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1219  0000                     CCPR1H equ 0FBFh ;# \n  1220                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1221  0000                     ADCON2 equ 0FC0h ;# \n  1222                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1223  0000                     ADCON1 equ 0FC1h ;# \n  1224                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1225  0000                     ADCON0 equ 0FC2h ;# \n  1226                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1227  0000                     ADRES equ 0FC3h ;# \n  1228                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1229  0000                     ADRESL equ 0FC3h ;# \n  1230                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1231  0000                     ADRESH equ 0FC4h ;# \n  1232                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1233  0000                     SSPCON2 equ 0FC5h ;# \n  1234                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1235  0000                     SSPCON1 equ 0FC6h ;# \n  1236                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1237  0000                     SSPSTAT equ 0FC7h ;# \n  1238                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1239  0000                     SSPADD equ 0FC8h ;# \n  1240                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1241  0000                     SSPBUF equ 0FC9h ;# \n  1242                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1243  0000                     T2CON equ 0FCAh ;# \n  1244                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1245  0000                     PR2 equ 0FCBh ;# \n  1246                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1247  0000                     MEMCON equ 0FCBh ;# \n  1248                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1249  0000                     TMR2 equ 0FCCh ;# \n  1250                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1251  0000                     T1CON equ 0FCDh ;# \n  1252                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1253  0000                     TMR1 equ 0FCEh ;# \n  1254                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1255  0000                     TMR1L equ 0FCEh ;# \n  1256                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1257  0000                     TMR1H equ 0FCFh ;# \n  1258                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1259  0000                     RCON equ 0FD0h ;# \n  1260                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1261  0000                     WDTCON equ 0FD1h ;# \n  1262                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1263  0000                     HLVDCON equ 0FD2h ;# \n  1264                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1265  0000                     LVDCON equ 0FD2h ;# \n  1266                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1267  0000                     OSCCON equ 0FD3h ;# \n  1268                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1269  0000                     T0CON equ 0FD5h ;# \n  1270                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1271  0000                     TMR0 equ 0FD6h ;# \n  1272                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1273  0000                     TMR0L equ 0FD6h ;# \n  1274                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1275  0000                     TMR0H equ 0FD7h ;# \n  1276                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1277  0000                     STATUS equ 0FD8h ;# \n  1278                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1279  0000                     FSR2 equ 0FD9h ;# \n  1280                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1281  0000                     FSR2L equ 0FD9h ;# \n  1282                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1283  0000                     FSR2H equ 0FDAh ;# \n  1284                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1285  0000                     PLUSW2 equ 0FDBh ;# \n  1286                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1287  0000                     PREINC2 equ 0FDCh ;# \n  1288                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1289  0000                     POSTDEC2 equ 0FDDh ;# \n  1290                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1291  0000                     POSTINC2 equ 0FDEh ;# \n  1292                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1293  0000                     INDF2 equ 0FDFh ;# \n  1294                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1295  0000                     BSR equ 0FE0h ;# \n  1296                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1297  0000                     FSR1 equ 0FE1h ;# \n  1298                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1299  0000                     FSR1L equ 0FE1h ;# \n  1300                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1301  0000                     FSR1H equ 0FE2h ;# \n  1302                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1303  0000                     PLUSW1 equ 0FE3h ;# \n  1304                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1305  0000                     PREINC1 equ 0FE4h ;# \n  1306                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1307  0000                     POSTDEC1 equ 0FE5h ;# \n  1308                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1309  0000                     POSTINC1 equ 0FE6h ;# \n  1310                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1311  0000                     INDF1 equ 0FE7h ;# \n  1312                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1313  0000                     WREG equ 0FE8h ;# \n  1314                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1315  0000                     FSR0 equ 0FE9h ;# \n  1316                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1317  0000                     FSR0L equ 0FE9h ;# \n  1318                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1319  0000                     FSR0H equ 0FEAh ;# \n  1320                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1321  0000                     PLUSW0 equ 0FEBh ;# \n  1322                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1323  0000                     PREINC0 equ 0FECh ;# \n  1324                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1325  0000                     POSTDEC0 equ 0FEDh ;# \n  1326                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1327  0000                     POSTINC0 equ 0FEEh ;# \n  1328                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1329  0000                     INDF0 equ 0FEFh ;# \n  1330                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1331  0000                     INTCON3 equ 0FF0h ;# \n  1332                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1333  0000                     INTCON2 equ 0FF1h ;# \n  1334                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1335  0000                     INTCON equ 0FF2h ;# \n  1336                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1337  0000                     PROD equ 0FF3h ;# \n  1338                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1339  0000                     PRODL equ 0FF3h ;# \n  1340                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1341  0000                     PRODH equ 0FF4h ;# \n  1342                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1343  0000                     TABLAT equ 0FF5h ;# \n  1344                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1345  0000                     TBLPTR equ 0FF6h ;# \n  1346                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1347  0000                     TBLPTRL equ 0FF6h ;# \n  1348                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1349  0000                     TBLPTRH equ 0FF7h ;# \n  1350                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1351  0000                     TBLPTRU equ 0FF8h ;# \n  1352                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1353  0000                     PCLAT equ 0FF9h ;# \n  1354                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1355  0000                     PC equ 0FF9h ;# \n  1356                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1357  0000                     PCL equ 0FF9h ;# \n  1358                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1359  0000                     PCLATH equ 0FFAh ;# \n  1360                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1361  0000                     PCLATU equ 0FFBh ;# \n  1362                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1363  0000                     STKPTR equ 0FFCh ;# \n  1364                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1365  0000                     TOS equ 0FFDh ;# \n  1366                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1367  0000                     TOSL equ 0FFDh ;# \n  1368                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1369  0000                     TOSH equ 0FFEh ;# \n  1370                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1371  0000                     TOSU equ 0FFFh ;# \n  1372                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1373  0000                     UFRM equ 0F66h ;# \n  1374                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1375  0000                     UFRML equ 0F66h ;# \n  1376                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1377  0000                     UFRMH equ 0F67h ;# \n  1378                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1379  0000                     UIR equ 0F68h ;# \n  1380                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1381  0000                     UIE equ 0F69h ;# \n  1382                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1383  0000                     UEIR equ 0F6Ah ;# \n  1384                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1385  0000                     UEIE equ 0F6Bh ;# \n  1386                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1387  0000                     USTAT equ 0F6Ch ;# \n  1388                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1389  0000                     UCON equ 0F6Dh ;# \n  1390                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1391  0000                     UADDR equ 0F6Eh ;# \n  1392                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1393  0000                     UCFG equ 0F6Fh ;# \n  1394                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1395  0000                     UEP0 equ 0F70h ;# \n  1396                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1397  0000                     UEP1 equ 0F71h ;# \n  1398                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1399  0000                     UEP2 equ 0F72h ;# \n  1400                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1401  0000                     UEP3 equ 0F73h ;# \n  1402                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1403  0000                     UEP4 equ 0F74h ;# \n  1404                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1405  0000                     UEP5 equ 0F75h ;# \n  1406                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1407  0000                     UEP6 equ 0F76h ;# \n  1408                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1409  0000                     UEP7 equ 0F77h ;# \n  1410                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1411  0000                     UEP8 equ 0F78h ;# \n  1412                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1413  0000                     UEP9 equ 0F79h ;# \n  1414                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1415  0000                     UEP10 equ 0F7Ah ;# \n  1416                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1417  0000                     UEP11 equ 0F7Bh ;# \n  1418                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1419  0000                     UEP12 equ 0F7Ch ;# \n  1420                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1421  0000                     UEP13 equ 0F7Dh ;# \n  1422                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1423  0000                     UEP14 equ 0F7Eh ;# \n  1424                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1425  0000                     UEP15 equ 0F7Fh ;# \n  1426                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1427  0000                     PORTA equ 0F80h ;# \n  1428                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1429  0000                     PORTB equ 0F81h ;# \n  1430                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1431  0000                     PORTC equ 0F82h ;# \n  1432                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1433  0000                     PORTE equ 0F84h ;# \n  1434                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1435  0000                     LATA equ 0F89h ;# \n  1436                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1437  0000                     LATB equ 0F8Ah ;# \n  1438                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1439  0000                     LATC equ 0F8Bh ;# \n  1440                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1441  0000                     TRISA equ 0F92h ;# \n  1442                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1443  0000                     DDRA equ 0F92h ;# \n  1444                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1445  0000                     TRISB equ 0F93h ;# \n  1446                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1447  0000                     DDRB equ 0F93h ;# \n  1448                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1449  0000                     TRISC equ 0F94h ;# \n  1450                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1451  0000                     DDRC equ 0F94h ;# \n  1452                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1453  0000                     OSCTUNE equ 0F9Bh ;# \n  1454                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1455  0000                     PIE1 equ 0F9Dh ;# \n  1456                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1457  0000                     PIR1 equ 0F9Eh ;# \n  1458                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1459  0000                     IPR1 equ 0F9Fh ;# \n  1460                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1461  0000                     PIE2 equ 0FA0h ;# \n  1462                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1463  0000                     PIR2 equ 0FA1h ;# \n  1464                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1465  0000                     IPR2 equ 0FA2h ;# \n  1466                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1467  0000                     EECON1 equ 0FA6h ;# \n  1468                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1469  0000                     EECON2 equ 0FA7h ;# \n  1470                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1471  0000                     EEDATA equ 0FA8h ;# \n  1472                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1473  0000                     EEADR equ 0FA9h ;# \n  1474                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1475  0000                     RCSTA equ 0FABh ;# \n  1476                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1477  0000                     RCSTA1 equ 0FABh ;# \n  1478                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1479  0000                     TXSTA equ 0FACh ;# \n  1480                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1481  0000                     TXSTA1 equ 0FACh ;# \n  1482                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1483  0000                     TXREG equ 0FADh ;# \n  1484                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1485  0000                     TXREG1 equ 0FADh ;# \n  1486                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1487  0000                     RCREG equ 0FAEh ;# \n  1488                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1489  0000                     RCREG1 equ 0FAEh ;# \n  1490                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1491  0000                     SPBRG equ 0FAFh ;# \n  1492                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1493  0000                     SPBRG1 equ 0FAFh ;# \n  1494                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1495  0000                     SPBRGH equ 0FB0h ;# \n  1496                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1497  0000                     T3CON equ 0FB1h ;# \n  1498                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1499  0000                     TMR3 equ 0FB2h ;# \n  1500                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1501  0000                     TMR3L equ 0FB2h ;# \n  1502                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1503  0000                     TMR3H equ 0FB3h ;# \n  1504                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1505  0000                     CMCON equ 0FB4h ;# \n  1506                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1507  0000                     CVRCON equ 0FB5h ;# \n  1508                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1509  0000                     ECCP1AS equ 0FB6h ;# \n  1510                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1511  0000                     CCP1AS equ 0FB6h ;# \n  1512                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1513  0000                     ECCP1DEL equ 0FB7h ;# \n  1514                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1515  0000                     CCP1DEL equ 0FB7h ;# \n  1516                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1517  0000                     BAUDCON equ 0FB8h ;# \n  1518                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1519  0000                     BAUDCTL equ 0FB8h ;# \n  1520                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1521  0000                     CCP2CON equ 0FBAh ;# \n  1522                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1523  0000                     CCPR2 equ 0FBBh ;# \n  1524                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1525  0000                     CCPR2L equ 0FBBh ;# \n  1526                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1527  0000                     CCPR2H equ 0FBCh ;# \n  1528                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1529  0000                     CCP1CON equ 0FBDh ;# \n  1530                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1531  0000                     CCPR1 equ 0FBEh ;# \n  1532                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1533  0000                     CCPR1L equ 0FBEh ;# \n  1534                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1535  0000                     CCPR1H equ 0FBFh ;# \n  1536                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1537  0000                     ADCON2 equ 0FC0h ;# \n  1538                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1539  0000                     ADCON1 equ 0FC1h ;# \n  1540                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1541  0000                     ADCON0 equ 0FC2h ;# \n  1542                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1543  0000                     ADRES equ 0FC3h ;# \n  1544                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1545  0000                     ADRESL equ 0FC3h ;# \n  1546                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1547  0000                     ADRESH equ 0FC4h ;# \n  1548                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1549  0000                     SSPCON2 equ 0FC5h ;# \n  1550                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1551  0000                     SSPCON1 equ 0FC6h ;# \n  1552                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1553  0000                     SSPSTAT equ 0FC7h ;# \n  1554                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1555  0000                     SSPADD equ 0FC8h ;# \n  1556                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1557  0000                     SSPBUF equ 0FC9h ;# \n  1558                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1559  0000                     T2CON equ 0FCAh ;# \n  1560                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1561  0000                     PR2 equ 0FCBh ;# \n  1562                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1563  0000                     MEMCON equ 0FCBh ;# \n  1564                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1565  0000                     TMR2 equ 0FCCh ;# \n  1566                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1567  0000                     T1CON equ 0FCDh ;# \n  1568                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1569  0000                     TMR1 equ 0FCEh ;# \n  1570                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1571  0000                     TMR1L equ 0FCEh ;# \n  1572                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1573  0000                     TMR1H equ 0FCFh ;# \n  1574                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1575  0000                     RCON equ 0FD0h ;# \n  1576                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1577  0000                     WDTCON equ 0FD1h ;# \n  1578                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1579  0000                     HLVDCON equ 0FD2h ;# \n  1580                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1581  0000                     LVDCON equ 0FD2h ;# \n  1582                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1583  0000                     OSCCON equ 0FD3h ;# \n  1584                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1585  0000                     T0CON equ 0FD5h ;# \n  1586                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1587  0000                     TMR0 equ 0FD6h ;# \n  1588                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1589  0000                     TMR0L equ 0FD6h ;# \n  1590                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1591  0000                     TMR0H equ 0FD7h ;# \n  1592                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1593  0000                     STATUS equ 0FD8h ;# \n  1594                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1595  0000                     FSR2 equ 0FD9h ;# \n  1596                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1597  0000                     FSR2L equ 0FD9h ;# \n  1598                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1599  0000                     FSR2H equ 0FDAh ;# \n  1600                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1601  0000                     PLUSW2 equ 0FDBh ;# \n  1602                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1603  0000                     PREINC2 equ 0FDCh ;# \n  1604                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1605  0000                     POSTDEC2 equ 0FDDh ;# \n  1606                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1607  0000                     POSTINC2 equ 0FDEh ;# \n  1608                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1609  0000                     INDF2 equ 0FDFh ;# \n  1610                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1611  0000                     BSR equ 0FE0h ;# \n  1612                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1613  0000                     FSR1 equ 0FE1h ;# \n  1614                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1615  0000                     FSR1L equ 0FE1h ;# \n  1616                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1617  0000                     FSR1H equ 0FE2h ;# \n  1618                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1619  0000                     PLUSW1 equ 0FE3h ;# \n  1620                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1621  0000                     PREINC1 equ 0FE4h ;# \n  1622                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1623  0000                     POSTDEC1 equ 0FE5h ;# \n  1624                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1625  0000                     POSTINC1 equ 0FE6h ;# \n  1626                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1627  0000                     INDF1 equ 0FE7h ;# \n  1628                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1629  0000                     WREG equ 0FE8h ;# \n  1630                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1631  0000                     FSR0 equ 0FE9h ;# \n  1632                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1633  0000                     FSR0L equ 0FE9h ;# \n  1634                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1635  0000                     FSR0H equ 0FEAh ;# \n  1636                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1637  0000                     PLUSW0 equ 0FEBh ;# \n  1638                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1639  0000                     PREINC0 equ 0FECh ;# \n  1640                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1641  0000                     POSTDEC0 equ 0FEDh ;# \n  1642                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1643  0000                     POSTINC0 equ 0FEEh ;# \n  1644                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1645  0000                     INDF0 equ 0FEFh ;# \n  1646                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1647  0000                     INTCON3 equ 0FF0h ;# \n  1648                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1649  0000                     INTCON2 equ 0FF1h ;# \n  1650                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1651  0000                     INTCON equ 0FF2h ;# \n  1652                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1653  0000                     PROD equ 0FF3h ;# \n  1654                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1655  0000                     PRODL equ 0FF3h ;# \n  1656                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1657  0000                     PRODH equ 0FF4h ;# \n  1658                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1659  0000                     TABLAT equ 0FF5h ;# \n  1660                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1661  0000                     TBLPTR equ 0FF6h ;# \n  1662                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1663  0000                     TBLPTRL equ 0FF6h ;# \n  1664                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1665  0000                     TBLPTRH equ 0FF7h ;# \n  1666                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1667  0000                     TBLPTRU equ 0FF8h ;# \n  1668                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1669  0000                     PCLAT equ 0FF9h ;# \n  1670                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1671  0000                     PC equ 0FF9h ;# \n  1672                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1673  0000                     PCL equ 0FF9h ;# \n  1674                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1675  0000                     PCLATH equ 0FFAh ;# \n  1676                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1677  0000                     PCLATU equ 0FFBh ;# \n  1678                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1679  0000                     STKPTR equ 0FFCh ;# \n  1680                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1681  0000                     TOS equ 0FFDh ;# \n  1682                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1683  0000                     TOSL equ 0FFDh ;# \n  1684                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1685  0000                     TOSH equ 0FFEh ;# \n  1686                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1687  0000                     TOSU equ 0FFFh ;# \n  1688                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1689  0000                     UFRM equ 0F66h ;# \n  1690                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1691  0000                     UFRML equ 0F66h ;# \n  1692                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1693  0000                     UFRMH equ 0F67h ;# \n  1694                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1695  0000                     UIR equ 0F68h ;# \n  1696                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1697  0000                     UIE equ 0F69h ;# \n  1698                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1699  0000                     UEIR equ 0F6Ah ;# \n  1700                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1701  0000                     UEIE equ 0F6Bh ;# \n  1702                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1703  0000                     USTAT equ 0F6Ch ;# \n  1704                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1705  0000                     UCON equ 0F6Dh ;# \n  1706                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1707  0000                     UADDR equ 0F6Eh ;# \n  1708                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1709  0000                     UCFG equ 0F6Fh ;# \n  1710                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1711  0000                     UEP0 equ 0F70h ;# \n  1712                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1713  0000                     UEP1 equ 0F71h ;# \n  1714                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1715  0000                     UEP2 equ 0F72h ;# \n  1716                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1717  0000                     UEP3 equ 0F73h ;# \n  1718                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1719  0000                     UEP4 equ 0F74h ;# \n  1720                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1721  0000                     UEP5 equ 0F75h ;# \n  1722                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1723  0000                     UEP6 equ 0F76h ;# \n  1724                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1725  0000                     UEP7 equ 0F77h ;# \n  1726                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1727  0000                     UEP8 equ 0F78h ;# \n  1728                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1729  0000                     UEP9 equ 0F79h ;# \n  1730                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1731  0000                     UEP10 equ 0F7Ah ;# \n  1732                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1733  0000                     UEP11 equ 0F7Bh ;# \n  1734                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1735  0000                     UEP12 equ 0F7Ch ;# \n  1736                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1737  0000                     UEP13 equ 0F7Dh ;# \n  1738                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1739  0000                     UEP14 equ 0F7Eh ;# \n  1740                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1741  0000                     UEP15 equ 0F7Fh ;# \n  1742                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1743  0000                     PORTA equ 0F80h ;# \n  1744                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1745  0000                     PORTB equ 0F81h ;# \n  1746                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1747  0000                     PORTC equ 0F82h ;# \n  1748                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1749  0000                     PORTE equ 0F84h ;# \n  1750                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1751  0000                     LATA equ 0F89h ;# \n  1752                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1753  0000                     LATB equ 0F8Ah ;# \n  1754                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1755  0000                     LATC equ 0F8Bh ;# \n  1756                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1757  0000                     TRISA equ 0F92h ;# \n  1758                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1759  0000                     DDRA equ 0F92h ;# \n  1760                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1761  0000                     TRISB equ 0F93h ;# \n  1762                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1763  0000                     DDRB equ 0F93h ;# \n  1764                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1765  0000                     TRISC equ 0F94h ;# \n  1766                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1767  0000                     DDRC equ 0F94h ;# \n  1768                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1769  0000                     OSCTUNE equ 0F9Bh ;# \n  1770                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1771  0000                     PIE1 equ 0F9Dh ;# \n  1772                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1773  0000                     PIR1 equ 0F9Eh ;# \n  1774                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1775  0000                     IPR1 equ 0F9Fh ;# \n  1776                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1777  0000                     PIE2 equ 0FA0h ;# \n  1778                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1779  0000                     PIR2 equ 0FA1h ;# \n  1780                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1781  0000                     IPR2 equ 0FA2h ;# \n  1782                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1783  0000                     EECON1 equ 0FA6h ;# \n  1784                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1785  0000                     EECON2 equ 0FA7h ;# \n  1786                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1787  0000                     EEDATA equ 0FA8h ;# \n  1788                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1789  0000                     EEADR equ 0FA9h ;# \n  1790                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1791  0000                     RCSTA equ 0FABh ;# \n  1792                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1793  0000                     RCSTA1 equ 0FABh ;# \n  1794                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1795  0000                     TXSTA equ 0FACh ;# \n  1796                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1797  0000                     TXSTA1 equ 0FACh ;# \n  1798                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1799  0000                     TXREG equ 0FADh ;# \n  1800                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1801  0000                     TXREG1 equ 0FADh ;# \n  1802                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1803  0000                     RCREG equ 0FAEh ;# \n  1804                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1805  0000                     RCREG1 equ 0FAEh ;# \n  1806                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1807  0000                     SPBRG equ 0FAFh ;# \n  1808                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1809  0000                     SPBRG1 equ 0FAFh ;# \n  1810                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1811  0000                     SPBRGH equ 0FB0h ;# \n  1812                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1813  0000                     T3CON equ 0FB1h ;# \n  1814                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1815  0000                     TMR3 equ 0FB2h ;# \n  1816                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1817  0000                     TMR3L equ 0FB2h ;# \n  1818                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1819  0000                     TMR3H equ 0FB3h ;# \n  1820                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1821  0000                     CMCON equ 0FB4h ;# \n  1822                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1823  0000                     CVRCON equ 0FB5h ;# \n  1824                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1825  0000                     ECCP1AS equ 0FB6h ;# \n  1826                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1827  0000                     CCP1AS equ 0FB6h ;# \n  1828                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1829  0000                     ECCP1DEL equ 0FB7h ;# \n  1830                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1831  0000                     CCP1DEL equ 0FB7h ;# \n  1832                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1833  0000                     BAUDCON equ 0FB8h ;# \n  1834                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1835  0000                     BAUDCTL equ 0FB8h ;# \n  1836                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1837  0000                     CCP2CON equ 0FBAh ;# \n  1838                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1839  0000                     CCPR2 equ 0FBBh ;# \n  1840                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1841  0000                     CCPR2L equ 0FBBh ;# \n  1842                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1843  0000                     CCPR2H equ 0FBCh ;# \n  1844                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1845  0000                     CCP1CON equ 0FBDh ;# \n  1846                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1847  0000                     CCPR1 equ 0FBEh ;# \n  1848                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1849  0000                     CCPR1L equ 0FBEh ;# \n  1850                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1851  0000                     CCPR1H equ 0FBFh ;# \n  1852                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1853  0000                     ADCON2 equ 0FC0h ;# \n  1854                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1855  0000                     ADCON1 equ 0FC1h ;# \n  1856                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1857  0000                     ADCON0 equ 0FC2h ;# \n  1858                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1859  0000                     ADRES equ 0FC3h ;# \n  1860                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1861  0000                     ADRESL equ 0FC3h ;# \n  1862                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1863  0000                     ADRESH equ 0FC4h ;# \n  1864                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1865  0000                     SSPCON2 equ 0FC5h ;# \n  1866                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1867  0000                     SSPCON1 equ 0FC6h ;# \n  1868                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1869  0000                     SSPSTAT equ 0FC7h ;# \n  1870                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1871  0000                     SSPADD equ 0FC8h ;# \n  1872                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1873  0000                     SSPBUF equ 0FC9h ;# \n  1874                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1875  0000                     T2CON equ 0FCAh ;# \n  1876                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1877  0000                     PR2 equ 0FCBh ;# \n  1878                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1879  0000                     MEMCON equ 0FCBh ;# \n  1880                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1881  0000                     TMR2 equ 0FCCh ;# \n  1882                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1883  0000                     T1CON equ 0FCDh ;# \n  1884                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1885  0000                     TMR1 equ 0FCEh ;# \n  1886                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1887  0000                     TMR1L equ 0FCEh ;# \n  1888                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1889  0000                     TMR1H equ 0FCFh ;# \n  1890                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1891  0000                     RCON equ 0FD0h ;# \n  1892                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1893  0000                     WDTCON equ 0FD1h ;# \n  1894                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1895  0000                     HLVDCON equ 0FD2h ;# \n  1896                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1897  0000                     LVDCON equ 0FD2h ;# \n  1898                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1899  0000                     OSCCON equ 0FD3h ;# \n  1900                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1901  0000                     T0CON equ 0FD5h ;# \n  1902                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1903  0000                     TMR0 equ 0FD6h ;# \n  1904                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1905  0000                     TMR0L equ 0FD6h ;# \n  1906                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1907  0000                     TMR0H equ 0FD7h ;# \n  1908                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1909  0000                     STATUS equ 0FD8h ;# \n  1910                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1911  0000                     FSR2 equ 0FD9h ;# \n  1912                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1913  0000                     FSR2L equ 0FD9h ;# \n  1914                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1915  0000                     FSR2H equ 0FDAh ;# \n  1916                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1917  0000                     PLUSW2 equ 0FDBh ;# \n  1918                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1919  0000                     PREINC2 equ 0FDCh ;# \n  1920                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1921  0000                     POSTDEC2 equ 0FDDh ;# \n  1922                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1923  0000                     POSTINC2 equ 0FDEh ;# \n  1924                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1925  0000                     INDF2 equ 0FDFh ;# \n  1926                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1927  0000                     BSR equ 0FE0h ;# \n  1928                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1929  0000                     FSR1 equ 0FE1h ;# \n  1930                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1931  0000                     FSR1L equ 0FE1h ;# \n  1932                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1933  0000                     FSR1H equ 0FE2h ;# \n  1934                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1935  0000                     PLUSW1 equ 0FE3h ;# \n  1936                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1937  0000                     PREINC1 equ 0FE4h ;# \n  1938                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1939  0000                     POSTDEC1 equ 0FE5h ;# \n  1940                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1941  0000                     POSTINC1 equ 0FE6h ;# \n  1942                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1943  0000                     INDF1 equ 0FE7h ;# \n  1944                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1945  0000                     WREG equ 0FE8h ;# \n  1946                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1947  0000                     FSR0 equ 0FE9h ;# \n  1948                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1949  0000                     FSR0L equ 0FE9h ;# \n  1950                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1951  0000                     FSR0H equ 0FEAh ;# \n  1952                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1953  0000                     PLUSW0 equ 0FEBh ;# \n  1954                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1955  0000                     PREINC0 equ 0FECh ;# \n  1956                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1957  0000                     POSTDEC0 equ 0FEDh ;# \n  1958                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1959  0000                     POSTINC0 equ 0FEEh ;# \n  1960                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1961  0000                     INDF0 equ 0FEFh ;# \n  1962                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1963  0000                     INTCON3 equ 0FF0h ;# \n  1964                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1965  0000                     INTCON2 equ 0FF1h ;# \n  1966                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1967  0000                     INTCON equ 0FF2h ;# \n  1968                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1969  0000                     PROD equ 0FF3h ;# \n  1970                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1971  0000                     PRODL equ 0FF3h ;# \n  1972                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1973  0000                     PRODH equ 0FF4h ;# \n  1974                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1975  0000                     TABLAT equ 0FF5h ;# \n  1976                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1977  0000                     TBLPTR equ 0FF6h ;# \n  1978                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1979  0000                     TBLPTRL equ 0FF6h ;# \n  1980                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1981  0000                     TBLPTRH equ 0FF7h ;# \n  1982                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1983  0000                     TBLPTRU equ 0FF8h ;# \n  1984                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1985  0000                     PCLAT equ 0FF9h ;# \n  1986                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1987  0000                     PC equ 0FF9h ;# \n  1988                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1989  0000                     PCL equ 0FF9h ;# \n  1990                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1991  0000                     PCLATH equ 0FFAh ;# \n  1992                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1993  0000                     PCLATU equ 0FFBh ;# \n  1994                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1995  0000                     STKPTR equ 0FFCh ;# \n  1996                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1997  0000                     TOS equ 0FFDh ;# \n  1998                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  1999  0000                     TOSL equ 0FFDh ;# \n  2000                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2001  0000                     TOSH equ 0FFEh ;# \n  2002                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2003  0000                     TOSU equ 0FFFh ;# \n  2004                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2005                           \n  2006                           opt pagewidth 120\n  2007                           \n  2008                           \topt lm\n  2009                           \n  2010                           \tprocessor\t18F2550\n  2011                           porta\tequ\t0F80h\n  2012                           portb\tequ\t0F81h\n  2013                           portc\tequ\t0F82h\n  2014                           portd\tequ\t0F83h\n  2015                           porte\tequ\t0F84h\n  2016                           lata\tequ\t0F89h\n  2017                           latb\tequ\t0F8Ah\n  2018                           latc\tequ\t0F8Bh\n  2019                           latd\tequ\t0F8Ch\n  2020                           late\tequ\t0F8Dh\n  2021                           trisa\tequ\t0F92h\n  2022                           trisb\tequ\t0F93h\n  2023                           trisc\tequ\t0F94h\n  2024                           trisd\tequ\t0F95h\n  2025                           trise\tequ\t0F96h\n  2026                           pie1\tequ\t0F9Dh\n  2027                           pir1\tequ\t0F9Eh\n  2028                           ipr1\tequ\t0F9Fh\n  2029                           pie2\tequ\t0FA0h\n  2030                           pir2\tequ\t0FA1h\n  2031                           ipr2\tequ\t0FA2h\n  2032                           t3con\tequ\t0FB1h\n  2033                           tmr3l\tequ\t0FB2h\n  2034                           tmr3h\tequ\t0FB3h\n  2035                           ccp1con\tequ\t0FBDh\n  2036                           ccpr1l\tequ\t0FBEh\n  2037                           ccpr1h\tequ\t0FBFh\n  2038                           adcon1\tequ\t0FC1h\n  2039                           adcon0\tequ\t0FC2h\n  2040                           adresl\tequ\t0FC3h\n  2041                           adresh\tequ\t0FC4h\n  2042                           sspcon2\tequ\t0FC5h\n  2043                           sspcon1\tequ\t0FC6h\n  2044                           sspstat\tequ\t0FC7h\n  2045                           sspadd\tequ\t0FC8h\n  2046                           sspbuf\tequ\t0FC9h\n  2047                           t2con\tequ\t0FCAh\n  2048                           pr2\tequ\t0FCBh\n  2049                           tmr2\tequ\t0FCCh\n  2050                           t1con\tequ\t0FCDh\n  2051                           tmr1l\tequ\t0FCEh\n  2052                           tmr1h\tequ\t0FCFh\n  2053                           rcon\tequ\t0FD0h\n  2054                           wdtcon\tequ\t0FD1h\n  2055                           lvdcon\tequ\t0FD2h\n  2056  00226A                     __pidataBANK0:\n  2057                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2058                           \n  2059                           opt pagewidth 120\n  2060                           \n  2061  00226A  0F80               \tdw\t((c:3968))&0ffffh\t;volatile\n  2062  00226C  0F81               \tdw\t((c:3969))&0ffffh\t;volatile\n  2063  00226E  0F82               \tdw\t((c:3970))&0ffffh\t;volatile\n  2064  002270  0F84               \tdw\t((c:3972))&0ffffh\t;volatile\n  2065                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2066                           \n  2067                           opt pagewidth 120\n  2068  002272  0F92               \tdw\t((c:3986))&0ffffh\t;volatile\n  2069  002274  0F93               \tdw\t((c:3987))&0ffffh\t;volatile\n  2070  002276  0F94               \tdw\t((c:3988))&0ffffh\t;volatile\n  2071                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2072                           \n  2073                           opt pagewidth 120\n  2074                           \n  2075  002278  00                 \tdb\tlow(float24(100.00000000000000))\n  2076  002279  C8                 \tdb\thigh(float24(100.00000000000000))\n  2077  00227A  42                 \tdb\tlow highword(float24(100.00000000000000))\n  2078                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2079                           \n  2080                           opt pagewidth 120\n  2081  000800                     __psmallconst:\n  2082                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2083                           \n  2084  000800                     _mask:\n  2085  000800  01                 \tdb\tlow(01h)\n  2086  000801  02                 \tdb\tlow(02h)\n  2087  000802  04                 \tdb\tlow(04h)\n  2088  000803  08                 \tdb\tlow(08h)\n  2089  000804  10                 \tdb\tlow(010h)\n  2090  000805  20                 \tdb\tlow(020h)\n  2091  000806  40                 \tdb\tlow(040h)\n  2092  000807  80                 \tdb\tlow(080h)\n  2093                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2094  000808                     __end_of_mask:\n  2095                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2096                           \n  2097                           opt pagewidth 120\n  2098                           \n  2099                           \topt lm\n  2100                           \n  2101                           \tprocessor\t18F2550\n  2102                           porta\tequ\t0F80h\n  2103                           portb\tequ\t0F81h\n  2104                           portc\tequ\t0F82h\n  2105                           portd\tequ\t0F83h\n  2106                           porte\tequ\t0F84h\n  2107  0000                     _INTCON2bits\tset\t0xFF1\n  2108                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2109  0000                     _INTCONbits\tset\t0xFF2\n  2110                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2111  0000                     _SSPBUF\tset\t0xFC9\n  2112                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2113  0000                     _SSPCON1\tset\t0xFC6\n  2114                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2115  0000                     _SSPCON1bits\tset\t0xFC6\n  2116                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2117  0000                     _SSPSTAT\tset\t0xFC7\n  2118                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2119  0000                     _SSPSTATbits\tset\t0xFC7\n  2120                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2121  0000                     _T0CON\tset\t0xFD5\n  2122                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2123  0000                     _TMR0H\tset\t0xFD7\n  2124                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2125  0000                     _TMR0L\tset\t0xFD6\n  2126                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2127  0000                     _PORTA\tset\t0xF80\n  2128                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2129  0000                     _PORTB\tset\t0xF81\n  2130                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2131  0000                     _PORTC\tset\t0xF82\n  2132                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2133  0000                     _PORTE\tset\t0xF84\n  2134                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2135  0000                     _TRISA\tset\t0xF92\n  2136                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2137  0000                     _TRISB\tset\t0xF93\n  2138                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2139  0000                     _TRISC\tset\t0xF94\n  2140                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2141                           \n  2142                           opt pagewidth 120\n  2143  0000B9                     __pnvBANK0:\n  2144                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2145  0000B9                     _spi:\n  2146  0000B9                            ds      1\n  2147                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2148                           \n  2149  0000                     __CFG_CPUDIV$OSC1_PLL2 equ 0x0\n  2150                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2151  0000                     __CFG_PLLDIV$1 equ 0x0\n  2152                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2153  0000                     __CFG_USBDIV$1 equ 0x0\n  2154                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2155  0000                     __CFG_IESO$OFF equ 0x0\n  2156                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2157  0000                     __CFG_FOSC$EC_EC equ 0x0\n  2158                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2159  0000                     __CFG_FCMEN$OFF equ 0x0\n  2160                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2161  0000                     __CFG_VREGEN$ON equ 0x0\n  2162                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2163  0000                     __CFG_BOR$OFF equ 0x0\n  2164                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2165  0000                     __CFG_BORV$3 equ 0x0\n  2166                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2167  0000                     __CFG_PWRT$OFF equ 0x0\n  2168                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2169  0000                     __CFG_WDTPS$32768 equ 0x0\n  2170                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2171  0000                     __CFG_WDT$OFF equ 0x0\n  2172                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2173  0000                     __CFG_CCP2MX$OFF equ 0x0\n  2174                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2175  0000                     __CFG_PBADEN$OFF equ 0x0\n  2176                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2177  0000                     __CFG_LPT1OSC$OFF equ 0x0\n  2178                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2179  0000                     __CFG_MCLRE$ON equ 0x0\n  2180                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2181  0000                     __CFG_STVREN$ON equ 0x0\n  2182                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2183  0000                     __CFG_XINST$OFF equ 0x0\n  2184                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2185  0000                     __CFG_LVP$OFF equ 0x0\n  2186                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2187  0000                     __CFG_CP0$OFF equ 0x0\n  2188                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2189  0000                     __CFG_CP1$OFF equ 0x0\n  2190                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2191  0000                     __CFG_CP2$OFF equ 0x0\n  2192                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2193  0000                     __CFG_CP3$OFF equ 0x0\n  2194                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2195  0000                     __CFG_CPD$OFF equ 0x0\n  2196                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2197  0000                     __CFG_CPB$OFF equ 0x0\n  2198                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2199  0000                     __CFG_WRT0$OFF equ 0x0\n  2200                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2201  0000                     __CFG_WRT1$OFF equ 0x0\n  2202                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2203  0000                     __CFG_WRT2$OFF equ 0x0\n  2204                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2205  0000                     __CFG_WRT3$OFF equ 0x0\n  2206                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2207  0000                     __CFG_WRTB$OFF equ 0x0\n  2208                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2209  0000                     __CFG_WRTC$OFF equ 0x0\n  2210                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2211  0000                     __CFG_WRTD$OFF equ 0x0\n  2212                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2213  0000                     __CFG_EBTR0$OFF equ 0x0\n  2214                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2215  0000                     __CFG_EBTR1$OFF equ 0x0\n  2216                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2217  0000                     __CFG_EBTR2$OFF equ 0x0\n  2218                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2219  0000                     __CFG_EBTR3$OFF equ 0x0\n  2220                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2221  0000                     __CFG_EBTRB$OFF equ 0x0\n  2222                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2223                           \n  2224                           opt pagewidth 120\n  2225                           \n  2226  0021B6                     __pcinit:\n  2227                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2228  0021B6                     start_initialization:\n  2229                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2230                           \n  2231  0021B6                     __initialization:\n  2232                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2233                           \n  2234  000060                     __pbssBANK0:\n  2235  000060                     _tickbuffer:\n  2236  000060                            ds      6\n  2237                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2238  000066                     _lastrun:\n  2239  000066                            ds      4\n  2240  00006A                     _tickcnt:\n  2241  00006A                            ds      4\n  2242                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2243  00006E                     _pid:\n  2244  00006E                            ds      2\n  2245                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2246  000070                     _sensor2:\n  2247  000070                            ds      2\n  2248  000072                     _inuse:\n  2249  000072                            ds      1\n  2250                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2251  000073                     _pidctrl:\n  2252  000073                            ds      37\n  2253                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2254  000098                     _in:\n  2255  000098                            ds      3\n  2256                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2257  00009B                     _out:\n  2258  00009B                            ds      3\n  2259                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2260  00009E                     _sensor1:\n  2261  00009E                            ds      2\n  2262                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2263                           \n  2264  0000A0                     __pdataBANK0:\n  2265                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2266                           \n  2267                           opt pagewidth 120\n  2268  0000A0                     _portptrs:\n  2269  0000A0                            ds      8\n  2270                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2271                           \n  2272                           opt pagewidth 120\n  2273                           \n  2274  0000A8                     _trisptrs:\n  2275  0000A8                            ds      6\n  2276                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2277                           \n  2278                           opt pagewidth 120\n  2279                           \n  2280  0000AE                     _set:\n  2281  0000AE                            ds      3\n  2282                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2283                           \n  2284                           opt pagewidth 120\n  2285  0021B6  EE00  F060         lfsr\t0,__pbssBANK0\n  2286  0021BA  0E40               movlw\t64\n  2287  0021BC                     clear_0:\n  2288  0021BC  6AEE               clrf\tpostinc0,c\n  2289  0021BE  06E8               decf\twreg\n  2290  0021C0  E1FD               bnz\tclear_0\n  2291                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2292                           \n  2293                           opt pagewidth 120\n  2294  0021C2  0E6A               \tmovlw\tlow (__pidataBANK0)\n  2295  0021C4  6EF6               \tmovwf\ttblptrl\n  2296  0021C6  0E22               \tmovlw\thigh(__pidataBANK0)\n  2297  0021C8  6EF7               \tmovwf\ttblptrh\n  2298  0021CA  0E00               \tmovlw\tlow highword(__pidataBANK0)\n  2299  0021CC  6EF8               \tmovwf\ttblptru\n  2300  0021CE  EE00  F0A0         \tlfsr\t0,__pdataBANK0\n  2301  0021D2  EE10 F011          \tlfsr\t1,17\n  2302  0021D6                     \tcopy_data0:\n  2303  0021D6  0009               \ttblrd\t*+\n  2304  0021D8  CFF5 FFEE          \tmovff\ttablat, postinc0\n  2305  0021DC  50E5               \tmovf\tpostdec1,w\n  2306  0021DE  50E1               \tmovf\tfsr1l,w\n  2307  0021E0  E1FA               \tbnz\tcopy_data0\n  2308                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2309                           \n  2310                           opt pagewidth 120\n  2311                           \n  2312                           \topt lm\n  2313  0021E2                     end_of_initialization:\n  2314  0021E2                     __end_of__initialization:\tGLOBAL\t__Lmediumconst\n  2315  0021E2  0E00               \tmovlw\tlow highword(__Lmediumconst)\n  2316  0021E4  6EF8               \tmovwf\ttblptru\n  2317  0021E6  0100               movlb 0\n  2318  0021E8  EF44  F009         goto _main\t;jump to C main() function\n  2319                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2320                           \n  2321  0000B1                     __pcstackBANK0:\n  2322  0000B1                     ??_main:\t; 0 bytes @ 0x0\n  2323  0000B1                     \tds   8\n  2324                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2325                           \n  2326  000001                     __pcstackCOMRAM:\n  2327  000001                     ?_tick_read_internal:\t; 0 bytes @ 0x0\n  2328  000001                     ??_tick_read_internal:\t; 0 bytes @ 0x0\n  2329                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2330  000001                     ?___ftge:\t; 1 bit \n  2331                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2332  000001                     ?_spi_control:\t; 1 bytes @ 0x0\n  2333                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2334  000001                     ?_spi_open:\t; 1 bytes @ 0x0\n  2335                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2336  000001                     ?_spi_available:\t; 1 bytes @ 0x0\n  2337                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2338  000001                     ?___awdiv:\t; 2 bytes @ 0x0\n  2339                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2340  000001                     ?___ftpack:\t; 3 bytes @ 0x0\n  2341                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2342  000001                     ?_tick_get:\t; 4 bytes @ 0x0\n  2343                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2344  000001                     spi_control@spid:\t; 1 bytes @ 0x0\n  2345  000001                     spi_open@spid:\t; 1 bytes @ 0x0\n  2346  000001                     spi_available@spid:\t; 1 bytes @ 0x0\n  2347                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2348  000001                     ___awdiv@dividend:\t; 2 bytes @ 0x0\n  2349                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2350  000001                     ___ftpack@arg:\t; 3 bytes @ 0x0\n  2351                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2352  000001                     ___ftge@ff1:\t; 3 bytes @ 0x0\n  2353  000001                     \tds   1\n  2354  000002                     ??_spi_open:\t; 0 bytes @ 0x1\n  2355                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2356  000002                     ?_spi_read_array:\t; 0 bytes @ 0x1\n  2357  000002                     ??_spi_available:\t; 0 bytes @ 0x1\n  2358                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2359  000002                     spi_read_array@spid:\t; 1 bytes @ 0x1\n  2360                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2361  000002                     spi_control@ctrl:\t; 4 bytes @ 0x1\n  2362  000002                     \tds   1\n  2363                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2364  000003                     spi_read_array@rxbuf:\t; 2 bytes @ 0x2\n  2365                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2366  000003                     ___awdiv@divisor:\t; 2 bytes @ 0x2\n  2367  000003                     \tds   1\n  2368                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2369  000004                     ___ftpack@exp:\t; 1 bytes @ 0x3\n  2370                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2371  000004                     ___ftge@ff2:\t; 3 bytes @ 0x3\n  2372  000004                     \tds   1\n  2373  000005                     ??_tick_get:\t; 0 bytes @ 0x4\n  2374  000005                     ??___awdiv:\t; 0 bytes @ 0x4\n  2375                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2376  000005                     ___ftpack@sign:\t; 1 bytes @ 0x4\n  2377                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2378  000005                     spi_read_array@len:\t; 2 bytes @ 0x4\n  2379  000005                     \tds   1\n  2380  000006                     ??___ftpack:\t; 0 bytes @ 0x5\n  2381                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2382  000006                     ___awdiv@counter:\t; 1 bytes @ 0x5\n  2383                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2384  000006                     spi_control@arg:\t; 4 bytes @ 0x5\n  2385  000006                     \tds   1\n  2386  000007                     ??_spi_read_array:\t; 0 bytes @ 0x6\n  2387  000007                     ??___ftge:\t; 0 bytes @ 0x6\n  2388                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2389  000007                     ___awdiv@sign:\t; 1 bytes @ 0x6\n  2390  000007                     \tds   1\n  2391                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2392  000008                     ___awdiv@quotient:\t; 2 bytes @ 0x7\n  2393  000008                     \tds   1\n  2394                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2395  000009                     ?___ftneg:\t; 3 bytes @ 0x8\n  2396                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2397  000009                     ?___lltoft:\t; 3 bytes @ 0x8\n  2398                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2399  000009                     ___ftneg@f1:\t; 3 bytes @ 0x8\n  2400                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2401  000009                     ___lltoft@c:\t; 4 bytes @ 0x8\n  2402  000009                     \tds   1\n  2403  00000A                     ??_spi_control:\t; 0 bytes @ 0x9\n  2404                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2405  00000A                     ?_pid_limits:\t; 0 bytes @ 0x9\n  2406                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2407  00000A                     ?_pid_auto:\t; 0 bytes @ 0x9\n  2408                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2409  00000A                     ?_io_write:\t; 0 bytes @ 0x9\n  2410                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2411  00000A                     ?_io_mode:\t; 0 bytes @ 0x9\n  2412                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2413  00000A                     io_mode@pin:\t; 1 bytes @ 0x9\n  2414                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2415  00000A                     io_write@pin:\t; 1 bytes @ 0x9\n  2416                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2417  00000A                     pid_limits@pid:\t; 2 bytes @ 0x9\n  2418                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2419  00000A                     pid_auto@pid:\t; 2 bytes @ 0x9\n  2420  00000A                     \tds   1\n  2421                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2422  00000B                     io_mode@value:\t; 1 bytes @ 0xA\n  2423                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2424  00000B                     io_write@value:\t; 1 bytes @ 0xA\n  2425  00000B                     \tds   1\n  2426  00000C                     ??_pid_auto:\t; 0 bytes @ 0xB\n  2427                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2428  00000C                     ?_pid_direction:\t; 0 bytes @ 0xB\n  2429  00000C                     ??_io_write:\t; 0 bytes @ 0xB\n  2430  00000C                     ??_io_mode:\t; 0 bytes @ 0xB\n  2431  00000C                     ??___ftneg:\t; 0 bytes @ 0xB\n  2432                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2433  00000C                     pid_direction@pid:\t; 2 bytes @ 0xB\n  2434                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2435  00000C                     pid_limits@min:\t; 3 bytes @ 0xB\n  2436  00000C                     \tds   1\n  2437  00000D                     ??___lltoft:\t; 0 bytes @ 0xC\n  2438  00000D                     \tds   1\n  2439                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2440  00000E                     pid_direction@direction:\t; 1 bytes @ 0xD\n  2441                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2442  00000E                     io_mode@now:\t; 1 bytes @ 0xD\n  2443                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2444  00000E                     io_write@now:\t; 1 bytes @ 0xD\n  2445                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2446  00000E                     spi_control@speed:\t; 1 bytes @ 0xD\n  2447  00000E                     \tds   1\n  2448  00000F                     ??_pid_direction:\t; 0 bytes @ 0xE\n  2449                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2450  00000F                     ?_spi_init:\t; 1 bytes @ 0xE\n  2451                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2452  00000F                     io_mode@port:\t; 1 bytes @ 0xE\n  2453                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2454  00000F                     io_write@port:\t; 1 bytes @ 0xE\n  2455                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2456  00000F                     spi_init@eModule:\t; 1 bytes @ 0xE\n  2457                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2458  00000F                     pid_limits@max:\t; 3 bytes @ 0xE\n  2459  00000F                     \tds   1\n  2460  000010                     ??_spi_init:\t; 0 bytes @ 0xF\n  2461                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2462  000010                     io_mode@num:\t; 1 bytes @ 0xF\n  2463                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2464  000010                     io_write@num:\t; 1 bytes @ 0xF\n  2465  000010                     \tds   1\n  2466                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2467  000011                     ?_tc_init:\t; 2 bytes @ 0x10\n  2468                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2469  000011                     ?___awtoft:\t; 3 bytes @ 0x10\n  2470                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2471  000011                     tc_init@spid:\t; 1 bytes @ 0x10\n  2472                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2473  000011                     ___lltoft@exp:\t; 1 bytes @ 0x10\n  2474                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2475  000011                     ___awtoft@c:\t; 2 bytes @ 0x10\n  2476  000011                     \tds   1\n  2477  000012                     ??_pid_limits:\t; 0 bytes @ 0x11\n  2478                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2479  000012                     ?___ftdiv:\t; 3 bytes @ 0x11\n  2480                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2481  000012                     tc_init@cspin:\t; 1 bytes @ 0x11\n  2482                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2483  000012                     ___ftdiv@f1:\t; 3 bytes @ 0x11\n  2484  000012                     \tds   1\n  2485  000013                     ??_tc_init:\t; 0 bytes @ 0x12\n  2486  000013                     \tds   1\n  2487  000014                     ??___awtoft:\t; 0 bytes @ 0x13\n  2488                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2489  000014                     tc_init@tcpl:\t; 2 bytes @ 0x13\n  2490  000014                     \tds   1\n  2491                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2492  000015                     ___awtoft@sign:\t; 1 bytes @ 0x14\n  2493                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2494  000015                     ___ftdiv@f2:\t; 3 bytes @ 0x14\n  2495  000015                     \tds   1\n  2496                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2497  000016                     ?___ftmul:\t; 3 bytes @ 0x15\n  2498                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2499  000016                     ___ftmul@f1:\t; 3 bytes @ 0x15\n  2500  000016                     \tds   2\n  2501  000018                     ??___ftdiv:\t; 0 bytes @ 0x17\n  2502  000018                     \tds   1\n  2503                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2504  000019                     ___ftmul@f2:\t; 3 bytes @ 0x18\n  2505  000019                     \tds   3\n  2506  00001C                     ??___ftmul:\t; 0 bytes @ 0x1B\n  2507  00001C                     \tds   1\n  2508                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2509  00001D                     ___ftdiv@cntr:\t; 1 bytes @ 0x1C\n  2510  00001D                     \tds   1\n  2511                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2512  00001E                     ___ftdiv@f3:\t; 3 bytes @ 0x1D\n  2513  00001E                     \tds   3\n  2514                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2515  000021                     ___ftdiv@exp:\t; 1 bytes @ 0x20\n  2516                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2517  000021                     ___ftmul@exp:\t; 1 bytes @ 0x20\n  2518  000021                     \tds   1\n  2519                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2520  000022                     ___ftdiv@sign:\t; 1 bytes @ 0x21\n  2521                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2522  000022                     ___ftmul@f3_as_product:\t; 3 bytes @ 0x21\n  2523  000022                     \tds   3\n  2524                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2525  000025                     ___ftmul@cntr:\t; 1 bytes @ 0x24\n  2526  000025                     \tds   1\n  2527                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2528  000026                     ___ftmul@sign:\t; 1 bytes @ 0x25\n  2529  000026                     \tds   1\n  2530                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2531  000027                     ?_pid_tune:\t; 0 bytes @ 0x26\n  2532                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2533  000027                     ?_tc_read:\t; 2 bytes @ 0x26\n  2534                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2535  000027                     ?___ftadd:\t; 3 bytes @ 0x26\n  2536                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2537  000027                     pid_tune@pid:\t; 2 bytes @ 0x26\n  2538                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2539  000027                     tc_read@tcpl:\t; 2 bytes @ 0x26\n  2540                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2541  000027                     ___ftadd@f1:\t; 3 bytes @ 0x26\n  2542  000027                     \tds   2\n  2543  000029                     ??_tc_read:\t; 0 bytes @ 0x28\n  2544                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2545  000029                     pid_tune@kp:\t; 3 bytes @ 0x28\n  2546  000029                     \tds   1\n  2547                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2548  00002A                     tc_read@buf:\t; 2 bytes @ 0x29\n  2549                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2550  00002A                     ___ftadd@f2:\t; 3 bytes @ 0x29\n  2551  00002A                     \tds   2\n  2552                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2553  00002C                     ?_tc_read_float:\t; 3 bytes @ 0x2B\n  2554                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2555  00002C                     tc_read_float@tcpl:\t; 2 bytes @ 0x2B\n  2556                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2557  00002C                     pid_tune@ki:\t; 3 bytes @ 0x2B\n  2558  00002C                     \tds   1\n  2559  00002D                     ??___ftadd:\t; 0 bytes @ 0x2C\n  2560  00002D                     \tds   2\n  2561  00002F                     ??_tc_read_float:\t; 0 bytes @ 0x2E\n  2562                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2563  00002F                     pid_tune@kd:\t; 3 bytes @ 0x2E\n  2564  00002F                     \tds   3\n  2565  000032                     ??_pid_tune:\t; 0 bytes @ 0x31\n  2566                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2567  000032                     ___ftadd@sign:\t; 1 bytes @ 0x31\n  2568                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2569  000032                     pid_tune@ssec:\t; 3 bytes @ 0x31\n  2570  000032                     \tds   1\n  2571                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2572  000033                     ___ftadd@exp2:\t; 1 bytes @ 0x32\n  2573  000033                     \tds   1\n  2574                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2575  000034                     ___ftadd@exp1:\t; 1 bytes @ 0x33\n  2576  000034                     \tds   1\n  2577                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2578  000035                     ?_pid_create:\t; 2 bytes @ 0x34\n  2579                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2580  000035                     ?___asftadd:\t; 3 bytes @ 0x34\n  2581                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2582  000035                     pid_create@pid:\t; 2 bytes @ 0x34\n  2583                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2584  000035                     ___asftadd@f1p:\t; 2 bytes @ 0x34\n  2585  000035                     \tds   2\n  2586                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2587  000037                     pid_create@in:\t; 2 bytes @ 0x36\n  2588                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2589  000037                     ___asftadd@f2:\t; 3 bytes @ 0x36\n  2590  000037                     \tds   2\n  2591                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2592  000039                     pid_create@out:\t; 2 bytes @ 0x38\n  2593  000039                     \tds   1\n  2594  00003A                     ??___asftadd:\t; 0 bytes @ 0x39\n  2595                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2596  00003A                     ?_pid_compute:\t; 1 bytes @ 0x39\n  2597                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2598  00003A                     pid_compute@pid:\t; 2 bytes @ 0x39\n  2599  00003A                     \tds   1\n  2600                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2601  00003B                     pid_create@set:\t; 2 bytes @ 0x3A\n  2602  00003B                     \tds   1\n  2603  00003C                     ??_pid_compute:\t; 0 bytes @ 0x3B\n  2604  00003C                     \tds   1\n  2605                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2606  00003D                     pid_create@kp:\t; 3 bytes @ 0x3C\n  2607  00003D                     \tds   3\n  2608                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2609  000040                     pid_create@ki:\t; 3 bytes @ 0x3F\n  2610  000040                     \tds   3\n  2611                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2612  000043                     pid_create@kd:\t; 3 bytes @ 0x42\n  2613  000043                     \tds   3\n  2614  000046                     ??_pid_create:\t; 0 bytes @ 0x45\n  2615  000046                     \tds   2\n  2616                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2617  000048                     pid_compute@dinput:\t; 3 bytes @ 0x47\n  2618  000048                     \tds   3\n  2619                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2620  00004B                     _pid_compute$1330:\t; 3 bytes @ 0x4A\n  2621  00004B                     \tds   3\n  2622                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2623  00004E                     pid_compute@now:\t; 4 bytes @ 0x4D\n  2624  00004E                     \tds   4\n  2625                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2626  000052                     pid_compute@error:\t; 3 bytes @ 0x51\n  2627  000052                     \tds   3\n  2628                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2629  000055                     pid_compute@in:\t; 3 bytes @ 0x54\n  2630  000055                     \tds   3\n  2631                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2632  000058                     pid_compute@out:\t; 3 bytes @ 0x57\n  2633  000058                     \tds   3\n  2634  00005B                     ?_main:\t; 2 bytes @ 0x5A\n  2635  00005B                     main@argc:\t; 2 bytes @ 0x5A\n  2636  00005B                     \tds   2\n  2637  00005D                     main@argv:\t; 3 bytes @ 0x5C\n  2638  00005D                     \tds   3\n  2639                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  2640                           \n  2641                           opt pagewidth 120\n  2642                           \n  2643                           \topt lm\n  2644                           \n  2645                           \tprocessor\t18F2550\n  2646                           porta\tequ\t0F80h\n  2647                           portb\tequ\t0F81h\n  2648                           portc\tequ\t0F82h\n  2649                           portd\tequ\t0F83h\n  2650                           porte\tequ\t0F84h\n  2651                           lata\tequ\t0F89h\n  2652                           latb\tequ\t0F8Ah\n  2653                           latc\tequ\t0F8Bh\n  2654                           latd\tequ\t0F8Ch\n  2655                           late\tequ\t0F8Dh\n  2656                           trisa\tequ\t0F92h\n  2657                           trisb\tequ\t0F93h\n  2658                           trisc\tequ\t0F94h\n  2659                           trisd\tequ\t0F95h\n  2660                           trise\tequ\t0F96h\n  2661                           pie1\tequ\t0F9Dh\n  2662                           pir1\tequ\t0F9Eh\n  2663                           ipr1\tequ\t0F9Fh\n  2664                           pie2\tequ\t0FA0h\n  2665                           pir2\tequ\t0FA1h\n  2666                           ipr2\tequ\t0FA2h\n  2667                           t3con\tequ\t0FB1h\n  2668                           tmr3l\tequ\t0FB2h\n  2669                           tmr3h\tequ\t0FB3h\n  2670                           ccp1con\tequ\t0FBDh\n  2671                           ccpr1l\tequ\t0FBEh\n  2672                           ccpr1h\tequ\t0FBFh\n  2673                           adcon1\tequ\t0FC1h\n  2674                           adcon0\tequ\t0FC2h\n  2675                           adresl\tequ\t0FC3h\n  2676                           adresh\tequ\t0FC4h\n  2677                           sspcon2\tequ\t0FC5h\n  2678                           sspcon1\tequ\t0FC6h\n  2679                           sspstat\tequ\t0FC7h\n  2680                           sspadd\tequ\t0FC8h\n  2681                           sspbuf\tequ\t0FC9h\n  2682                           t2con\tequ\t0FCAh\n  2683                           pr2\tequ\t0FCBh\n  2684                           tmr2\tequ\t0FCCh\n  2685                           t1con\tequ\t0FCDh\n  2686                           tmr1l\tequ\t0FCEh\n  2687                           tmr1h\tequ\t0FCFh\n  2688                           rcon\tequ\t0FD0h\n  2689                           wdtcon\tequ\t0FD1h\n  2690                           lvdcon\tequ\t0FD2h\n  2691                           osccon\tequ\t0FD3h\n  2692                           t0con\tequ\t0FD5h\n  2693                           tmr0l\tequ\t0FD6h\n  2694                           tmr0h\tequ\t0FD7h\n  2695                           status\tequ\t0FD8h\n  2696                           fsr2\tequ\t0FD9h\n  2697                           fsr2l\tequ\t0FD9h\n  2698                           fsr2h\tequ\t0FDAh\n  2699                           plusw2\tequ\t0FDBh\n  2700                           preinc2\tequ\t0FDCh\n  2701                           postdec2\tequ\t0FDDh\n  2702                           postinc2\tequ\t0FDEh\n  2703                           indf2\tequ\t0FDFh\n  2704                           bsr\tequ\t0FE0h\n  2705                           fsr1\tequ\t0FE1h\n  2706                           fsr1l\tequ\t0FE1h\n  2707                           fsr1h\tequ\t0FE2h\n  2708                           plusw1\tequ\t0FE3h\n  2709                           preinc1\tequ\t0FE4h\n  2710                           postdec1\tequ\t0FE5h\n  2711                           postinc1\tequ\t0FE6h\n  2712                           indf1\tequ\t0FE7h\n  2713                           wreg\tequ\t0FE8h\n  2714                           fsr0\tequ\t0FE9h\n  2715                           fsr0l\tequ\t0FE9h\n  2716                           fsr0h\tequ\t0FEAh\n  2717                           plusw0\tequ\t0FEBh\n  2718                           preinc0\tequ\t0FECh\n  2719                           postdec0\tequ\t0FEDh\n  2720                           postinc0\tequ\t0FEEh\n  2721                           indf0\tequ\t0FEFh\n  2722                           intcon3\tequ\t0FF0h\n  2723                           intcon2\tequ\t0FF1h\n  2724                           intcon\tequ\t0FF2h\n  2725                           prod\tequ\t0FF3h\n  2726                           prodl\tequ\t0FF3h\n  2727                           prodh\tequ\t0FF4h\n  2728                           tablat\tequ\t0FF5h\n  2729                           tblptr\tequ\t0FF6h\n  2730                           tblptrl\tequ\t0FF6h\n  2731                           tblptrh\tequ\t0FF7h\n  2732                           tblptru\tequ\t0FF8h\n  2733                           pcl\tequ\t0FF9h\n  2734                           pclat\tequ\t0FFAh\n  2735                           pclath\tequ\t0FFAh\n  2736                           pclatu\tequ\t0FFBh\n  2737                           stkptr\tequ\t0FFCh\n  2738                           tosl\tequ\t0FFDh\n  2739                           tosh\tequ\t0FFEh\n  2740                           tosu\tequ\t0FFFh\n  2741                           skipnz macro\n  2742                           \tbtfsc\tstatus,2\n  2743                           \tendm\n  2744                           \tglobal\t__ramtop\n  2745                           \tglobal\t__accesstop\n  2746                           # 46 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2747                           UFRM equ 0F66h ;# \n  2748                           # 52 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2749                           UFRML equ 0F66h ;# \n  2750                           # 129 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2751                           UFRMH equ 0F67h ;# \n  2752                           # 168 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2753                           UIR equ 0F68h ;# \n  2754                           # 223 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2755                           UIE equ 0F69h ;# \n  2756                           # 278 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2757                           UEIR equ 0F6Ah ;# \n  2758                           # 328 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2759                           UEIE equ 0F6Bh ;# \n  2760                           # 378 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2761                           USTAT equ 0F6Ch ;# \n  2762                           # 437 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2763                           UCON equ 0F6Dh ;# \n  2764                           # 487 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2765                           UADDR equ 0F6Eh ;# \n  2766                           # 550 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2767                           UCFG equ 0F6Fh ;# \n  2768                           # 631 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2769                           UEP0 equ 0F70h ;# \n  2770                           # 762 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2771                           UEP1 equ 0F71h ;# \n  2772                           # 893 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2773                           UEP2 equ 0F72h ;# \n  2774                           # 1024 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2775                           UEP3 equ 0F73h ;# \n  2776                           # 1155 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2777                           UEP4 equ 0F74h ;# \n  2778                           # 1286 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2779                           UEP5 equ 0F75h ;# \n  2780                           # 1417 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2781                           UEP6 equ 0F76h ;# \n  2782                           # 1548 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2783                           UEP7 equ 0F77h ;# \n  2784                           # 1679 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2785                           UEP8 equ 0F78h ;# \n  2786                           # 1766 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2787                           UEP9 equ 0F79h ;# \n  2788                           # 1853 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2789                           UEP10 equ 0F7Ah ;# \n  2790                           # 1940 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2791                           UEP11 equ 0F7Bh ;# \n  2792                           # 2027 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2793                           UEP12 equ 0F7Ch ;# \n  2794                           # 2114 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2795                           UEP13 equ 0F7Dh ;# \n  2796                           # 2201 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2797                           UEP14 equ 0F7Eh ;# \n  2798                           # 2288 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2799                           UEP15 equ 0F7Fh ;# \n  2800                           # 2375 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2801                           PORTA equ 0F80h ;# \n  2802                           # 2531 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2803                           PORTB equ 0F81h ;# \n  2804                           # 2640 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2805                           PORTC equ 0F82h ;# \n  2806                           # 2793 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2807                           PORTE equ 0F84h ;# \n  2808                           # 3026 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2809                           LATA equ 0F89h ;# \n  2810                           # 3161 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2811                           LATB equ 0F8Ah ;# \n  2812                           # 3293 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2813                           LATC equ 0F8Bh ;# \n  2814                           # 3408 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2815                           TRISA equ 0F92h ;# \n  2816                           # 3413 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2817                           DDRA equ 0F92h ;# \n  2818                           # 3605 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2819                           TRISB equ 0F93h ;# \n  2820                           # 3610 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2821                           DDRB equ 0F93h ;# \n  2822                           # 3826 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2823                           TRISC equ 0F94h ;# \n  2824                           # 3831 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2825                           DDRC equ 0F94h ;# \n  2826                           # 3997 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2827                           OSCTUNE equ 0F9Bh ;# \n  2828                           # 4055 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2829                           PIE1 equ 0F9Dh ;# \n  2830                           # 4128 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2831                           PIR1 equ 0F9Eh ;# \n  2832                           # 4201 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2833                           IPR1 equ 0F9Fh ;# \n  2834                           # 4274 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2835                           PIE2 equ 0FA0h ;# \n  2836                           # 4344 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2837                           PIR2 equ 0FA1h ;# \n  2838                           # 4414 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2839                           IPR2 equ 0FA2h ;# \n  2840                           # 4484 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2841                           EECON1 equ 0FA6h ;# \n  2842                           # 4549 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2843                           EECON2 equ 0FA7h ;# \n  2844                           # 4555 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2845                           EEDATA equ 0FA8h ;# \n  2846                           # 4561 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2847                           EEADR equ 0FA9h ;# \n  2848                           # 4567 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2849                           RCSTA equ 0FABh ;# \n  2850                           # 4572 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2851                           RCSTA1 equ 0FABh ;# \n  2852                           # 4724 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2853                           TXSTA equ 0FACh ;# \n  2854                           # 4729 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2855                           TXSTA1 equ 0FACh ;# \n  2856                           # 4987 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2857                           TXREG equ 0FADh ;# \n  2858                           # 4992 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2859                           TXREG1 equ 0FADh ;# \n  2860                           # 4998 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2861                           RCREG equ 0FAEh ;# \n  2862                           # 5003 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2863                           RCREG1 equ 0FAEh ;# \n  2864                           # 5009 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2865                           SPBRG equ 0FAFh ;# \n  2866                           # 5014 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2867                           SPBRG1 equ 0FAFh ;# \n  2868                           # 5020 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2869                           SPBRGH equ 0FB0h ;# \n  2870                           # 5026 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2871                           T3CON equ 0FB1h ;# \n  2872                           # 5148 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2873                           TMR3 equ 0FB2h ;# \n  2874                           # 5154 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2875                           TMR3L equ 0FB2h ;# \n  2876                           # 5160 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2877                           TMR3H equ 0FB3h ;# \n  2878                           # 5166 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2879                           CMCON equ 0FB4h ;# \n  2880                           # 5261 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2881                           CVRCON equ 0FB5h ;# \n  2882                           # 5345 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2883                           ECCP1AS equ 0FB6h ;# \n  2884                           # 5350 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2885                           CCP1AS equ 0FB6h ;# \n  2886                           # 5474 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2887                           ECCP1DEL equ 0FB7h ;# \n  2888                           # 5479 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2889                           CCP1DEL equ 0FB7h ;# \n  2890                           # 5513 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2891                           BAUDCON equ 0FB8h ;# \n  2892                           # 5518 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2893                           BAUDCTL equ 0FB8h ;# \n  2894                           # 5692 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2895                           CCP2CON equ 0FBAh ;# \n  2896                           # 5755 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2897                           CCPR2 equ 0FBBh ;# \n  2898                           # 5761 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2899                           CCPR2L equ 0FBBh ;# \n  2900                           # 5767 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2901                           CCPR2H equ 0FBCh ;# \n  2902                           # 5773 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2903                           CCP1CON equ 0FBDh ;# \n  2904                           # 5836 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2905                           CCPR1 equ 0FBEh ;# \n  2906                           # 5842 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2907                           CCPR1L equ 0FBEh ;# \n  2908                           # 5848 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2909                           CCPR1H equ 0FBFh ;# \n  2910                           # 5854 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2911                           ADCON2 equ 0FC0h ;# \n  2912                           # 5924 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2913                           ADCON1 equ 0FC1h ;# \n  2914                           # 6014 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2915                           ADCON0 equ 0FC2h ;# \n  2916                           # 6136 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2917                           ADRES equ 0FC3h ;# \n  2918                           # 6142 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2919                           ADRESL equ 0FC3h ;# \n  2920                           # 6148 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2921                           ADRESH equ 0FC4h ;# \n  2922                           # 6154 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2923                           SSPCON2 equ 0FC5h ;# \n  2924                           # 6215 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2925                           SSPCON1 equ 0FC6h ;# \n  2926                           # 6284 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2927                           SSPSTAT equ 0FC7h ;# \n  2928                           # 6550 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2929                           SSPADD equ 0FC8h ;# \n  2930                           # 6556 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2931                           SSPBUF equ 0FC9h ;# \n  2932                           # 6562 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2933                           T2CON equ 0FCAh ;# \n  2934                           # 6659 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2935                           PR2 equ 0FCBh ;# \n  2936                           # 6664 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2937                           MEMCON equ 0FCBh ;# \n  2938                           # 6670 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2939                           TMR2 equ 0FCCh ;# \n  2940                           # 6676 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2941                           T1CON equ 0FCDh ;# \n  2942                           # 6780 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2943                           TMR1 equ 0FCEh ;# \n  2944                           # 6786 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2945                           TMR1L equ 0FCEh ;# \n  2946                           # 6792 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2947                           TMR1H equ 0FCFh ;# \n  2948                           # 6798 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2949                           RCON equ 0FD0h ;# \n  2950                           # 6946 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2951                           WDTCON equ 0FD1h ;# \n  2952                           # 6973 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2953                           HLVDCON equ 0FD2h ;# \n  2954                           # 6978 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2955                           LVDCON equ 0FD2h ;# \n  2956                           # 7242 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2957                           OSCCON equ 0FD3h ;# \n  2958                           # 7324 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2959                           T0CON equ 0FD5h ;# \n  2960                           # 7393 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2961                           TMR0 equ 0FD6h ;# \n  2962                           # 7399 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2963                           TMR0L equ 0FD6h ;# \n  2964                           # 7405 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2965                           TMR0H equ 0FD7h ;# \n  2966                           # 7411 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2967                           STATUS equ 0FD8h ;# \n  2968                           # 7489 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2969                           FSR2 equ 0FD9h ;# \n  2970                           # 7495 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2971                           FSR2L equ 0FD9h ;# \n  2972                           # 7501 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2973                           FSR2H equ 0FDAh ;# \n  2974                           # 7507 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2975                           PLUSW2 equ 0FDBh ;# \n  2976                           # 7513 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2977                           PREINC2 equ 0FDCh ;# \n  2978                           # 7519 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2979                           POSTDEC2 equ 0FDDh ;# \n  2980                           # 7525 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2981                           POSTINC2 equ 0FDEh ;# \n  2982                           # 7531 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2983                           INDF2 equ 0FDFh ;# \n  2984                           # 7537 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2985                           BSR equ 0FE0h ;# \n  2986                           # 7543 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2987                           FSR1 equ 0FE1h ;# \n  2988                           # 7549 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2989                           FSR1L equ 0FE1h ;# \n  2990                           # 7555 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2991                           FSR1H equ 0FE2h ;# \n  2992                           # 7561 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2993                           PLUSW1 equ 0FE3h ;# \n  2994                           # 7567 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2995                           PREINC1 equ 0FE4h ;# \n  2996                           # 7573 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2997                           POSTDEC1 equ 0FE5h ;# \n  2998                           # 7579 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  2999                           POSTINC1 equ 0FE6h ;# \n  3000                           # 7585 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3001                           INDF1 equ 0FE7h ;# \n  3002                           # 7591 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3003                           WREG equ 0FE8h ;# \n  3004                           # 7597 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3005                           FSR0 equ 0FE9h ;# \n  3006                           # 7603 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3007                           FSR0L equ 0FE9h ;# \n  3008                           # 7609 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3009                           FSR0H equ 0FEAh ;# \n  3010                           # 7615 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3011                           PLUSW0 equ 0FEBh ;# \n  3012                           # 7621 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3013                           PREINC0 equ 0FECh ;# \n  3014                           # 7627 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3015                           POSTDEC0 equ 0FEDh ;# \n  3016                           # 7633 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3017                           POSTINC0 equ 0FEEh ;# \n  3018                           # 7639 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3019                           INDF0 equ 0FEFh ;# \n  3020                           # 7645 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3021                           INTCON3 equ 0FF0h ;# \n  3022                           # 7736 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3023                           INTCON2 equ 0FF1h ;# \n  3024                           # 7812 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3025                           INTCON equ 0FF2h ;# \n  3026                           # 7948 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3027                           PROD equ 0FF3h ;# \n  3028                           # 7954 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3029                           PRODL equ 0FF3h ;# \n  3030                           # 7960 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3031                           PRODH equ 0FF4h ;# \n  3032                           # 7966 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3033                           TABLAT equ 0FF5h ;# \n  3034                           # 7974 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3035                           TBLPTR equ 0FF6h ;# \n  3036                           # 7980 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3037                           TBLPTRL equ 0FF6h ;# \n  3038                           # 7986 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3039                           TBLPTRH equ 0FF7h ;# \n  3040                           # 7992 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3041                           TBLPTRU equ 0FF8h ;# \n  3042                           # 8000 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3043                           PCLAT equ 0FF9h ;# \n  3044                           # 8007 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3045                           PC equ 0FF9h ;# \n  3046                           # 8013 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3047                           PCL equ 0FF9h ;# \n  3048                           # 8019 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3049                           PCLATH equ 0FFAh ;# \n  3050                           # 8025 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3051                           PCLATU equ 0FFBh ;# \n  3052                           # 8031 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3053                           STKPTR equ 0FFCh ;# \n  3054                           # 8106 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3055                           TOS equ 0FFDh ;# \n  3056                           # 8112 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3057                           TOSL equ 0FFDh ;# \n  3058                           # 8118 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3059                           TOSH equ 0FFEh ;# \n  3060                           # 8124 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3061                           TOSU equ 0FFFh ;# \n  3062                           # 46 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3063                           UFRM equ 0F66h ;# \n  3064                           # 52 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3065                           UFRML equ 0F66h ;# \n  3066                           # 129 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3067                           UFRMH equ 0F67h ;# \n  3068                           # 168 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3069                           UIR equ 0F68h ;# \n  3070                           # 223 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3071                           UIE equ 0F69h ;# \n  3072                           # 278 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3073                           UEIR equ 0F6Ah ;# \n  3074                           # 328 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3075                           UEIE equ 0F6Bh ;# \n  3076                           # 378 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3077                           USTAT equ 0F6Ch ;# \n  3078                           # 437 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3079                           UCON equ 0F6Dh ;# \n  3080                           # 487 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3081                           UADDR equ 0F6Eh ;# \n  3082                           # 550 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3083                           UCFG equ 0F6Fh ;# \n  3084                           # 631 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3085                           UEP0 equ 0F70h ;# \n  3086                           # 762 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3087                           UEP1 equ 0F71h ;# \n  3088                           # 893 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3089                           UEP2 equ 0F72h ;# \n  3090                           # 1024 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3091                           UEP3 equ 0F73h ;# \n  3092                           # 1155 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3093                           UEP4 equ 0F74h ;# \n  3094                           # 1286 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3095                           UEP5 equ 0F75h ;# \n  3096                           # 1417 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3097                           UEP6 equ 0F76h ;# \n  3098                           # 1548 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3099                           UEP7 equ 0F77h ;# \n  3100                           # 1679 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3101                           UEP8 equ 0F78h ;# \n  3102                           # 1766 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3103                           UEP9 equ 0F79h ;# \n  3104                           # 1853 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3105                           UEP10 equ 0F7Ah ;# \n  3106                           # 1940 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3107                           UEP11 equ 0F7Bh ;# \n  3108                           # 2027 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3109                           UEP12 equ 0F7Ch ;# \n  3110                           # 2114 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3111                           UEP13 equ 0F7Dh ;# \n  3112                           # 2201 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3113                           UEP14 equ 0F7Eh ;# \n  3114                           # 2288 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3115                           UEP15 equ 0F7Fh ;# \n  3116                           # 2375 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3117                           PORTA equ 0F80h ;# \n  3118                           # 2531 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3119                           PORTB equ 0F81h ;# \n  3120                           # 2640 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3121                           PORTC equ 0F82h ;# \n  3122                           # 2793 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3123                           PORTE equ 0F84h ;# \n  3124                           # 3026 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3125                           LATA equ 0F89h ;# \n  3126                           # 3161 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3127                           LATB equ 0F8Ah ;# \n  3128                           # 3293 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3129                           LATC equ 0F8Bh ;# \n  3130                           # 3408 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3131                           TRISA equ 0F92h ;# \n  3132                           # 3413 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3133                           DDRA equ 0F92h ;# \n  3134                           # 3605 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3135                           TRISB equ 0F93h ;# \n  3136                           # 3610 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3137                           DDRB equ 0F93h ;# \n  3138                           # 3826 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3139                           TRISC equ 0F94h ;# \n  3140                           # 3831 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3141                           DDRC equ 0F94h ;# \n  3142                           # 3997 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3143                           OSCTUNE equ 0F9Bh ;# \n  3144                           # 4055 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3145                           PIE1 equ 0F9Dh ;# \n  3146                           # 4128 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3147                           PIR1 equ 0F9Eh ;# \n  3148                           # 4201 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3149                           IPR1 equ 0F9Fh ;# \n  3150                           # 4274 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3151                           PIE2 equ 0FA0h ;# \n  3152                           # 4344 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3153                           PIR2 equ 0FA1h ;# \n  3154                           # 4414 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3155                           IPR2 equ 0FA2h ;# \n  3156                           # 4484 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3157                           EECON1 equ 0FA6h ;# \n  3158                           # 4549 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3159                           EECON2 equ 0FA7h ;# \n  3160                           # 4555 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3161                           EEDATA equ 0FA8h ;# \n  3162                           # 4561 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3163                           EEADR equ 0FA9h ;# \n  3164                           # 4567 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3165                           RCSTA equ 0FABh ;# \n  3166                           # 4572 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3167                           RCSTA1 equ 0FABh ;# \n  3168                           # 4724 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3169                           TXSTA equ 0FACh ;# \n  3170                           # 4729 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3171                           TXSTA1 equ 0FACh ;# \n  3172                           # 4987 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3173                           TXREG equ 0FADh ;# \n  3174                           # 4992 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3175                           TXREG1 equ 0FADh ;# \n  3176                           # 4998 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3177                           RCREG equ 0FAEh ;# \n  3178                           # 5003 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3179                           RCREG1 equ 0FAEh ;# \n  3180                           # 5009 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3181                           SPBRG equ 0FAFh ;# \n  3182                           # 5014 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3183                           SPBRG1 equ 0FAFh ;# \n  3184                           # 5020 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3185                           SPBRGH equ 0FB0h ;# \n  3186                           # 5026 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3187                           T3CON equ 0FB1h ;# \n  3188                           # 5148 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3189                           TMR3 equ 0FB2h ;# \n  3190                           # 5154 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3191                           TMR3L equ 0FB2h ;# \n  3192                           # 5160 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3193                           TMR3H equ 0FB3h ;# \n  3194                           # 5166 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3195                           CMCON equ 0FB4h ;# \n  3196                           # 5261 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3197                           CVRCON equ 0FB5h ;# \n  3198                           # 5345 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3199                           ECCP1AS equ 0FB6h ;# \n  3200                           # 5350 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3201                           CCP1AS equ 0FB6h ;# \n  3202                           # 5474 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3203                           ECCP1DEL equ 0FB7h ;# \n  3204                           # 5479 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3205                           CCP1DEL equ 0FB7h ;# \n  3206                           # 5513 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3207                           BAUDCON equ 0FB8h ;# \n  3208                           # 5518 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3209                           BAUDCTL equ 0FB8h ;# \n  3210                           # 5692 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3211                           CCP2CON equ 0FBAh ;# \n  3212                           # 5755 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3213                           CCPR2 equ 0FBBh ;# \n  3214                           # 5761 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3215                           CCPR2L equ 0FBBh ;# \n  3216                           # 5767 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3217                           CCPR2H equ 0FBCh ;# \n  3218                           # 5773 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3219                           CCP1CON equ 0FBDh ;# \n  3220                           # 5836 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3221                           CCPR1 equ 0FBEh ;# \n  3222                           # 5842 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3223                           CCPR1L equ 0FBEh ;# \n  3224                           # 5848 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3225                           CCPR1H equ 0FBFh ;# \n  3226                           # 5854 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3227                           ADCON2 equ 0FC0h ;# \n  3228                           # 5924 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3229                           ADCON1 equ 0FC1h ;# \n  3230                           # 6014 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3231                           ADCON0 equ 0FC2h ;# \n  3232                           # 6136 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3233                           ADRES equ 0FC3h ;# \n  3234                           # 6142 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3235                           ADRESL equ 0FC3h ;# \n  3236                           # 6148 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3237                           ADRESH equ 0FC4h ;# \n  3238                           # 6154 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3239                           SSPCON2 equ 0FC5h ;# \n  3240                           # 6215 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3241                           SSPCON1 equ 0FC6h ;# \n  3242                           # 6284 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3243                           SSPSTAT equ 0FC7h ;# \n  3244                           # 6550 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3245                           SSPADD equ 0FC8h ;# \n  3246                           # 6556 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3247                           SSPBUF equ 0FC9h ;# \n  3248                           # 6562 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3249                           T2CON equ 0FCAh ;# \n  3250                           # 6659 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3251                           PR2 equ 0FCBh ;# \n  3252                           # 6664 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3253                           MEMCON equ 0FCBh ;# \n  3254                           # 6670 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3255                           TMR2 equ 0FCCh ;# \n  3256                           # 6676 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3257                           T1CON equ 0FCDh ;# \n  3258                           # 6780 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3259                           TMR1 equ 0FCEh ;# \n  3260                           # 6786 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3261                           TMR1L equ 0FCEh ;# \n  3262                           # 6792 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3263                           TMR1H equ 0FCFh ;# \n  3264                           # 6798 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3265                           RCON equ 0FD0h ;# \n  3266                           # 6946 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3267                           WDTCON equ 0FD1h ;# \n  3268                           # 6973 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3269                           HLVDCON equ 0FD2h ;# \n  3270                           # 6978 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3271                           LVDCON equ 0FD2h ;# \n  3272                           # 7242 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3273                           OSCCON equ 0FD3h ;# \n  3274                           # 7324 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3275                           T0CON equ 0FD5h ;# \n  3276                           # 7393 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3277                           TMR0 equ 0FD6h ;# \n  3278                           # 7399 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3279                           TMR0L equ 0FD6h ;# \n  3280                           # 7405 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3281                           TMR0H equ 0FD7h ;# \n  3282                           # 7411 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3283                           STATUS equ 0FD8h ;# \n  3284                           # 7489 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3285                           FSR2 equ 0FD9h ;# \n  3286                           # 7495 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3287                           FSR2L equ 0FD9h ;# \n  3288                           # 7501 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3289                           FSR2H equ 0FDAh ;# \n  3290                           # 7507 \"C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\"\n  3291  001288                     __ptext0:\n  3292                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3293                           \n  3294                           opt pagewidth 120\n  3295                           \n  3296  0000                     \t__size_of_main\tequ\t__end_of_main-_main\n  3297                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3298  001288                     _main:; BSR set to: 0\n  3299                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3300                           \n  3301                           opt pagewidth 120\n  3302                           \n  3303  001288                     l2926:\n  3304                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3305  001288  0100               \tmovlb\t0\t; () banked\n  3306  00128A  6FB1               \tmovwf\t(??_main+0+0)&0ffh\n  3307  00128C  0E01               \tmovlw\tlow(01h)\n  3308  00128E  6E0F               \tmovwf\t((c:?_spi_init)),c\n  3309  001290  0100               \tmovlb\t0\t; () banked\n  3310  001292  51B1               \tmovf\t(??_main+0+0)&0ffh,w\n  3311  001294  EC54  F010         \tcall\t_spi_init\t;wreg free\n  3312  001298  0100               \tmovlb\t0\t; () banked\n  3313  00129A  0100               \tmovlb\t0\t; () banked\n  3314  00129C  6FB9               \tmovwf\t((_spi))&0ffh\n  3315                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3316                           \n  3317  00129E  C0B9  F001         \tmovff\t(_spi),(c:?_spi_control)\n  3318  0012A2  0E11               \tmovlw\tlow(011h)\n  3319  0012A4  6E02               \tmovwf\t(0+((c:?_spi_control)+01h)),c\n  3320  0012A6  0E00               \tmovlw\thigh(011h)\n  3321  0012A8  6E03               \tmovwf\t(1+((c:?_spi_control)+01h)),c\n  3322  0012AA  0E00               \tmovlw\tlow highword(011h)\n  3323  0012AC  6E04               \tmovwf\t(2+((c:?_spi_control)+01h)),c\n  3324  0012AE  0E00               \tmovlw\thigh highword(011h)\n  3325  0012B0  6E05               \tmovwf\t(3+((c:?_spi_control)+01h)),c\n  3326  0012B2  0E07               \tmovlw\tlow(07h)\n  3327  0012B4  6E06               \tmovwf\t(0+((c:?_spi_control)+05h)),c\n  3328  0012B6  0E00               \tmovlw\thigh(07h)\n  3329  0012B8  6E07               \tmovwf\t(1+((c:?_spi_control)+05h)),c\n  3330  0012BA  0E00               \tmovlw\tlow highword(07h)\n  3331  0012BC  6E08               \tmovwf\t(2+((c:?_spi_control)+05h)),c\n  3332  0012BE  0E00               \tmovlw\thigh highword(07h)\n  3333  0012C0  6E09               \tmovwf\t(3+((c:?_spi_control)+05h)),c\n  3334  0012C2  EC14  F00C         \tcall\t_spi_control\t;wreg free\n  3335                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3336                           \n  3337  0012C6                     l2928:\n  3338                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3339  0012C6  C0B9  F011         \tmovff\t(_spi),(c:?_tc_init)\n  3340  0012CA  0100               \tmovlb\t0\t; () banked\n  3341  0012CC  6FB1               \tmovwf\t(??_main+0+0)&0ffh\n  3342  0012CE  0E0A               \tmovlw\tlow(0Ah)\n  3343  0012D0  6E12               \tmovwf\t(0+((c:?_tc_init)+01h)),c\n  3344  0012D2  0100               \tmovlb\t0\t; () banked\n  3345  0012D4  51B1               \tmovf\t(??_main+0+0)&0ffh,w\n  3346  0012D6  ECFC  F00F         \tcall\t_tc_init\t;wreg free\n  3347  0012DA  C011  F09E         \tmovff\t0+?_tc_init,(_sensor1)\n  3348  0012DE  C012  F09F         \tmovff\t1+?_tc_init,(_sensor1+1)\n  3349                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3350                           \n  3351  0012E2                     l2930:\n  3352                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3353  0012E2  C0B9  F011         \tmovff\t(_spi),(c:?_tc_init)\n  3354  0012E6  0100               \tmovlb\t0\t; () banked\n  3355  0012E8  6FB1               \tmovwf\t(??_main+0+0)&0ffh\n  3356  0012EA  0E0B               \tmovlw\tlow(0Bh)\n  3357  0012EC  6E12               \tmovwf\t(0+((c:?_tc_init)+01h)),c\n  3358  0012EE  0100               \tmovlb\t0\t; () banked\n  3359  0012F0  51B1               \tmovf\t(??_main+0+0)&0ffh,w\n  3360  0012F2  ECFC  F00F         \tcall\t_tc_init\t;wreg free\n  3361  0012F6  C011  F070         \tmovff\t0+?_tc_init,(_sensor2)\n  3362  0012FA  C012  F071         \tmovff\t1+?_tc_init,(_sensor2+1)\n  3363                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3364                           \n  3365  0012FE                     l2932:\n  3366                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3367  0012FE  0100               \tmovlb\t0\t; () banked\n  3368  001300  0E00               \tmovlw\thigh(_pidctrl)\n  3369  001302  6E36               \tmovwf\t((c:?_pid_create+1)),c\n  3370  001304  0100               \tmovlb\t0\t; () banked\n  3371  001306  0E73               \tmovlw\tlow(_pidctrl)\n  3372  001308  6E35               \tmovwf\t((c:?_pid_create)),c\n  3373  00130A  0100               \tmovlb\t0\t; () banked\n  3374  00130C  0E00               \tmovlw\thigh(_in)\n  3375  00130E  6E38               \tmovwf\t(1+((c:?_pid_create)+02h)),c\n  3376  001310  0100               \tmovlb\t0\t; () banked\n  3377  001312  0E98               \tmovlw\tlow(_in)\n  3378  001314  6E37               \tmovwf\t(0+((c:?_pid_create)+02h)),c\n  3379  001316  0100               \tmovlb\t0\t; () banked\n  3380  001318  0E00               \tmovlw\thigh(_out)\n  3381  00131A  6E3A               \tmovwf\t(1+((c:?_pid_create)+04h)),c\n  3382  00131C  0100               \tmovlb\t0\t; () banked\n  3383  00131E  0E9B               \tmovlw\tlow(_out)\n  3384  001320  6E39               \tmovwf\t(0+((c:?_pid_create)+04h)),c\n  3385  001322  0100               \tmovlb\t0\t; () banked\n  3386  001324  0E00               \tmovlw\thigh(_set)\n  3387  001326  6E3C               \tmovwf\t(1+((c:?_pid_create)+06h)),c\n  3388  001328  0100               \tmovlb\t0\t; () banked\n  3389  00132A  0EAE               \tmovlw\tlow(_set)\n  3390  00132C  6E3B               \tmovwf\t(0+((c:?_pid_create)+06h)),c\n  3391  00132E  0E00               \tmovlw\tlow(float24(5.0000000000000000))\n  3392  001330  6E3D               \tmovwf\t(0+((c:?_pid_create)+08h)),c\n  3393  001332  0EA0               \tmovlw\thigh(float24(5.0000000000000000))\n  3394  001334  6E3E               \tmovwf\t(1+((c:?_pid_create)+08h)),c\n  3395  001336  0E40               \tmovlw\tlow highword(float24(5.0000000000000000))\n  3396  001338  6E3F               \tmovwf\t(2+((c:?_pid_create)+08h)),c\n  3397                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3398  00133A  0E00               \tmovlw\tlow(float24(1.0000000000000000))\n  3399  00133C  6E40               \tmovwf\t(0+((c:?_pid_create)+0Bh)),c\n  3400  00133E  0E80               \tmovlw\thigh(float24(1.0000000000000000))\n  3401  001340  6E41               \tmovwf\t(1+((c:?_pid_create)+0Bh)),c\n  3402  001342  0E3F               \tmovlw\tlow highword(float24(1.0000000000000000))\n  3403  001344  6E42               \tmovwf\t(2+((c:?_pid_create)+0Bh)),c\n  3404                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3405  001346  0E00               \tmovlw\tlow(float24(3.0000000000000000))\n  3406  001348  6E43               \tmovwf\t(0+((c:?_pid_create)+0Eh)),c\n  3407  00134A  0E40               \tmovlw\thigh(float24(3.0000000000000000))\n  3408  00134C  6E44               \tmovwf\t(1+((c:?_pid_create)+0Eh)),c\n  3409  00134E  0E40               \tmovlw\tlow highword(float24(3.0000000000000000))\n  3410  001350  6E45               \tmovwf\t(2+((c:?_pid_create)+0Eh)),c\n  3411                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3412  001352  ECD2  F00A         \tcall\t_pid_create\t;wreg free\n  3413  001356  C035  F06E         \tmovff\t0+?_pid_create,(_pid)\n  3414  00135A  C036  F06F         \tmovff\t1+?_pid_create,(_pid+1)\n  3415                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3416                           \n  3417  00135E                     l2934:\n  3418                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3419  00135E  C06E  F00A         \tmovff\t(_pid),(c:?_pid_limits)\n  3420  001362  C06F  F00B         \tmovff\t(_pid+1),(c:?_pid_limits+1)\n  3421  001366  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  3422  001368  6E0C               \tmovwf\t(0+((c:?_pid_limits)+02h)),c\n  3423  00136A  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  3424  00136C  6E0D               \tmovwf\t(1+((c:?_pid_limits)+02h)),c\n  3425  00136E  0E00               \tmovlw\tlow highword(float24(0.0000000000000000))\n  3426  001370  6E0E               \tmovwf\t(2+((c:?_pid_limits)+02h)),c\n  3427                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3428  001372  0E00               \tmovlw\tlow(float24(255.00000000000000))\n  3429  001374  6E0F               \tmovwf\t(0+((c:?_pid_limits)+05h)),c\n  3430  001376  0E7F               \tmovlw\thigh(float24(255.00000000000000))\n  3431  001378  6E10               \tmovwf\t(1+((c:?_pid_limits)+05h)),c\n  3432  00137A  0E43               \tmovlw\tlow highword(float24(255.00000000000000))\n  3433  00137C  6E11               \tmovwf\t(2+((c:?_pid_limits)+05h)),c\n  3434                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3435  00137E  EC17  F006         \tcall\t_pid_limits\t;wreg free\n  3436                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3437                           \n  3438  001382                     l2936:\n  3439                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3440  001382  C06E  F00A         \tmovff\t(_pid),(c:?_pid_auto)\n  3441  001386  C06F  F00B         \tmovff\t(_pid+1),(c:?_pid_auto+1)\n  3442  00138A  EC24  F00A         \tcall\t_pid_auto\t;wreg free\n  3443  00138E  D000               \tgoto\tl2938\n  3444                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3445                           \n  3446                           opt pagewidth 120\n  3447  001390                     l39:\n  3448                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3449                           \n  3450  001390                     l2938:\n  3451                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3452  001390  0100               \tmovlb\t0\t; () banked\n  3453  001392  C066  F0B1         \tmovff\t(_lastrun),??_main+0+0\n  3454  001396  0100               \tmovlb\t0\t; () banked\n  3455  001398  C067  F0B2         \tmovff\t(_lastrun+1),??_main+0+0+1\n  3456  00139C  0100               \tmovlb\t0\t; () banked\n  3457  00139E  C068  F0B3         \tmovff\t(_lastrun+2),??_main+0+0+2\n  3458  0013A2  0100               \tmovlb\t0\t; () banked\n  3459  0013A4  C069  F0B4         \tmovff\t(_lastrun+3),??_main+0+0+3\n  3460  0013A8  0100               \tmovlb\t0\t; () banked\n  3461  0013AA  1FB1               \tcomf\t(??_main+0+0)&0ffh\n  3462  0013AC  1FB2               \tcomf\t(??_main+0+1)&0ffh\n  3463  0013AE  1FB3               \tcomf\t(??_main+0+2)&0ffh\n  3464  0013B0  1FB4               \tcomf\t(??_main+0+3)&0ffh\n  3465  0013B2  2BB1               \tincf\t(??_main+0+0)&0ffh\n  3466  0013B4  0E00               \tmovlw\t0\n  3467  0013B6  23B2               \taddwfc\t(??_main+0+1)&0ffh\n  3468  0013B8  23B3               \taddwfc\t(??_main+0+2)&0ffh\n  3469  0013BA  23B4               \taddwfc\t(??_main+0+3)&0ffh\n  3470  0013BC  EC20  F011         \tcall\t_tick_get\t;wreg free\n  3471  0013C0  0100               \tmovlb\t0\t; () banked\n  3472  0013C2  51B1               \tmovf\t(??_main+0+0)&0ffh,w\n  3473  0013C4  2401               \taddwf\t(0+?_tick_get),c,w\n  3474  0013C6  0100               \tmovlb\t0\t; () banked\n  3475  0013C8  6FB5               \tmovwf\t(??_main+4+0)&0ffh\n  3476  0013CA  0100               \tmovlb\t0\t; () banked\n  3477  0013CC  51B2               \tmovf\t(??_main+0+1)&0ffh,w\n  3478  0013CE  2002               \taddwfc\t(1+?_tick_get),c,w\n  3479  0013D0  0100               \tmovlb\t0\t; () banked\n  3480  0013D2  6FB6               \tmovwf\t1+(??_main+4+0)&0ffh\n  3481                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3482  0013D4  0100               \tmovlb\t0\t; () banked\n  3483  0013D6  51B3               \tmovf\t(??_main+0+2)&0ffh,w\n  3484  0013D8  2003               \taddwfc\t(2+?_tick_get),c,w\n  3485  0013DA  0100               \tmovlb\t0\t; () banked\n  3486  0013DC  6FB7               \tmovwf\t2+(??_main+4+0)&0ffh\n  3487                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3488  0013DE  0100               \tmovlb\t0\t; () banked\n  3489  0013E0  51B4               \tmovf\t(??_main+0+3)&0ffh,w\n  3490  0013E2  2004               \taddwfc\t(3+?_tick_get),c,w\n  3491  0013E4  0100               \tmovlb\t0\t; () banked\n  3492  0013E6  6FB8               \tmovwf\t3+(??_main+4+0)&0ffh\n  3493  0013E8  0E1B               \tmovlw\tlow(0B71Bh)\n  3494  0013EA  0100               \tmovlb\t0\t; () banked\n  3495  0013EC  5DB5               \tsubwf\t(??_main+4+0)&0ffh,w\n  3496  0013EE  0EB7               \tmovlw\thigh(0B71Bh)\n  3497  0013F0  59B6               \tsubwfb\t(??_main+4+1)&0ffh,w\n  3498  0013F2  0E00               \tmovlw\tlow highword(0B71Bh)\n  3499  0013F4  59B7               \tsubwfb\t(??_main+4+2)&0ffh,w\n  3500  0013F6  0E00               \tmovlw\thigh highword(0B71Bh)\n  3501  0013F8  0100               \tmovlb\t0\t; () banked\n  3502  0013FA  59B8               \tsubwfb\t(??_main+4+3)&0ffh,w\n  3503  0013FC  A0D8               \tbtfss\tstatus,0\n  3504  0013FE  D001               \tgoto\tu1881\n  3505  001400  D001               \tgoto\tu1880\n  3506  001402                     u1881:\n  3507  001402  D7C6               \tgoto\tl2938\n  3508  001404                     u1880:\n  3509                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3510                           \n  3511  001404                     l2940:; BSR set to: 0\n  3512                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3513                           \n  3514  001404  EC20  F011         \tcall\t_tick_get\t;wreg free\n  3515  001408  C001  F066         \tmovff\t0+?_tick_get,(_lastrun)\n  3516  00140C  C002  F067         \tmovff\t1+?_tick_get,(_lastrun+1)\n  3517  001410  C003  F068         \tmovff\t2+?_tick_get,(_lastrun+2)\n  3518  001414  C004  F069         \tmovff\t3+?_tick_get,(_lastrun+3)\n  3519                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3520                           \n  3521  001418                     l2942:\n  3522                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3523  001418  0100               \tmovlb\t0\t; () banked\n  3524  00141A  0E00               \tmovlw\thigh(_sensor1)\n  3525  00141C  6E2D               \tmovwf\t((c:?_tc_read_float+1)),c\n  3526  00141E  0100               \tmovlb\t0\t; () banked\n  3527  001420  0E9E               \tmovlw\tlow(_sensor1)\n  3528  001422  6E2C               \tmovwf\t((c:?_tc_read_float)),c\n  3529  001424  EC9A  F010         \tcall\t_tc_read_float\t;wreg free\n  3530  001428  C02C  F098         \tmovff\t0+?_tc_read_float,(_in)\n  3531  00142C  C02D  F099         \tmovff\t1+?_tc_read_float,(_in+1)\n  3532  001430  C02E  F09A         \tmovff\t2+?_tc_read_float,(_in+2)\n  3533                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3534                           \n  3535  001434                     l2944:\n  3536                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3537  001434  C06E  F03A         \tmovff\t(_pid),(c:?_pid_compute)\n  3538  001438  C06F  F03B         \tmovff\t(_pid+1),(c:?_pid_compute+1)\n  3539  00143C  EC05  F004         \tcall\t_pid_compute\t;wreg free\n  3540  001440  D7A7               \tgoto\tl2938\n  3541                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3542                           \n  3543  001442                     l40:\n  3544                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3545                           \n  3546                           opt pagewidth 120\n  3547  001442  D7A6               \tgoto\tl2938\n  3548                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3549  001444                     l41:\n  3550                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3551                           \n  3552  001444                     l42:\n  3553                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3554  001444  EF00  F000         \tgoto\tstart\n  3555                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3556                           \n  3557  001448                     \t__end_of_main:\n  3558                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3559                           \n  3560                           opt pagewidth 120\n  3561                           \n  3562                           \topt lm\n  3563                           \n  3564                           \tprocessor\t18F2550\n  3565                           porta\tequ\t0F80h\n  3566                           portb\tequ\t0F81h\n  3567                           portc\tequ\t0F82h\n  3568                           portd\tequ\t0F83h\n  3569                           porte\tequ\t0F84h\n  3570                           lata\tequ\t0F89h\n  3571                           latb\tequ\t0F8Ah\n  3572                           latc\tequ\t0F8Bh\n  3573                           latd\tequ\t0F8Ch\n  3574                           late\tequ\t0F8Dh\n  3575                           trisa\tequ\t0F92h\n  3576                           trisb\tequ\t0F93h\n  3577                           trisc\tequ\t0F94h\n  3578                           trisd\tequ\t0F95h\n  3579                           trise\tequ\t0F96h\n  3580                           pie1\tequ\t0F9Dh\n  3581                           pir1\tequ\t0F9Eh\n  3582                           ipr1\tequ\t0F9Fh\n  3583                           pie2\tequ\t0FA0h\n  3584                           pir2\tequ\t0FA1h\n  3585                           ipr2\tequ\t0FA2h\n  3586                           t3con\tequ\t0FB1h\n  3587                           tmr3l\tequ\t0FB2h\n  3588                           tmr3h\tequ\t0FB3h\n  3589                           ccp1con\tequ\t0FBDh\n  3590                           ccpr1l\tequ\t0FBEh\n  3591                           ccpr1h\tequ\t0FBFh\n  3592  0020A8                     __ptext1:\n  3593                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3594                           \n  3595                           opt pagewidth 120\n  3596                           \n  3597  0000                     \t__size_of_spi_init\tequ\t__end_of_spi_init-_spi_init\n  3598                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3599  0020A8                     _spi_init:\n  3600                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3601                           \n  3602                           opt pagewidth 120\n  3603  0020A8                     l2512:\n  3604                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3605  0020A8  040F               \tdecf\t((c:spi_init@eModule)),c,w\n  3606                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3607  0020AA  B4D8               \tbtfsc\tstatus,2\n  3608  0020AC  D001               \tgoto\tu1261\n  3609  0020AE  D001               \tgoto\tu1260\n  3610  0020B0                     u1261:\n  3611  0020B0  D003               \tgoto\tl2518\n  3612  0020B2                     u1260:\n  3613                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3614                           \n  3615  0020B2                     l2514:\n  3616                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3617  0020B2  0E00               \tmovlw\t(0)&0ffh\n  3618  0020B4  D01B               \tgoto\tl203\n  3619                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3620  0020B6                     l2516:\n  3621  0020B6  D01A               \tgoto\tl203\n  3622                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3623  0020B8                     l202:\n  3624                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3625                           \n  3626  0020B8                     l2518:\n  3627                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3628  0020B8  0E00               \tmovlw\tlow(0)\n  3629  0020BA  6EC7               \tmovwf\t((c:4039)),c\t;volatile\n  3630                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3631                           \n  3632  0020BC  0E00               \tmovlw\tlow(0)\n  3633  0020BE  6EC6               \tmovwf\t((c:4038)),c\t;volatile\n  3634                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3635                           \n  3636  0020C0                     l2520:\n  3637                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3638  0020C0  C00F  F001         \tmovff\t(c:spi_init@eModule),(c:?_spi_control)\n  3639  0020C4  0E11               \tmovlw\tlow(011h)\n  3640  0020C6  6E02               \tmovwf\t(0+((c:?_spi_control)+01h)),c\n  3641  0020C8  0E00               \tmovlw\thigh(011h)\n  3642  0020CA  6E03               \tmovwf\t(1+((c:?_spi_control)+01h)),c\n  3643  0020CC  0E00               \tmovlw\tlow highword(011h)\n  3644  0020CE  6E04               \tmovwf\t(2+((c:?_spi_control)+01h)),c\n  3645  0020D0  0E00               \tmovlw\thigh highword(011h)\n  3646  0020D2  6E05               \tmovwf\t(3+((c:?_spi_control)+01h)),c\n  3647  0020D4  0E03               \tmovlw\tlow(03h)\n  3648  0020D6  6E06               \tmovwf\t(0+((c:?_spi_control)+05h)),c\n  3649  0020D8  0E00               \tmovlw\thigh(03h)\n  3650  0020DA  6E07               \tmovwf\t(1+((c:?_spi_control)+05h)),c\n  3651  0020DC  0E00               \tmovlw\tlow highword(03h)\n  3652  0020DE  6E08               \tmovwf\t(2+((c:?_spi_control)+05h)),c\n  3653  0020E0  0E00               \tmovlw\thigh highword(03h)\n  3654  0020E2  6E09               \tmovwf\t(3+((c:?_spi_control)+05h)),c\n  3655  0020E4  EC14  F00C         \tcall\t_spi_control\t;wreg free\n  3656                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3657                           \n  3658  0020E8                     l2522:\n  3659                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3660  0020E8  500F               \tmovf\t((c:spi_init@eModule)),c,w\n  3661  0020EA  D000               \tgoto\tl203\n  3662                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3663  0020EC                     l2524:\n  3664                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3665                           \n  3666  0020EC                     l203:\n  3667  0020EC  0012               \treturn\n  3668                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3669                           \n  3670  0020EE                     \t__end_of_spi_init:\n  3671                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3672                           \n  3673                           opt pagewidth 120\n  3674                           \n  3675                           \topt lm\n  3676                           \n  3677                           \tprocessor\t18F2550\n  3678                           porta\tequ\t0F80h\n  3679                           portb\tequ\t0F81h\n  3680                           portc\tequ\t0F82h\n  3681                           portd\tequ\t0F83h\n  3682                           porte\tequ\t0F84h\n  3683                           lata\tequ\t0F89h\n  3684                           latb\tequ\t0F8Ah\n  3685                           latc\tequ\t0F8Bh\n  3686                           latd\tequ\t0F8Ch\n  3687                           late\tequ\t0F8Dh\n  3688                           trisa\tequ\t0F92h\n  3689                           trisb\tequ\t0F93h\n  3690                           trisc\tequ\t0F94h\n  3691                           trisd\tequ\t0F95h\n  3692                           trise\tequ\t0F96h\n  3693                           pie1\tequ\t0F9Dh\n  3694                           pir1\tequ\t0F9Eh\n  3695                           ipr1\tequ\t0F9Fh\n  3696                           pie2\tequ\t0FA0h\n  3697                           pir2\tequ\t0FA1h\n  3698                           ipr2\tequ\t0FA2h\n  3699                           t3con\tequ\t0FB1h\n  3700                           tmr3l\tequ\t0FB2h\n  3701                           tmr3h\tequ\t0FB3h\n  3702                           ccp1con\tequ\t0FBDh\n  3703                           ccpr1l\tequ\t0FBEh\n  3704                           ccpr1h\tequ\t0FBFh\n  3705                           adcon1\tequ\t0FC1h\n  3706                           adcon0\tequ\t0FC2h\n  3707                           adresl\tequ\t0FC3h\n  3708                           adresh\tequ\t0FC4h\n  3709  001FF8                     __ptext2:\n  3710                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3711                           \n  3712                           opt pagewidth 120\n  3713                           \n  3714  0000                     \t__size_of_tc_init\tequ\t__end_of_tc_init-_tc_init\n  3715                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3716  001FF8                     _tc_init:\n  3717                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3718                           \n  3719                           opt pagewidth 120\n  3720  001FF8                     l2706:\n  3721                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3722                           \n  3723  001FF8  C012  F00A         \tmovff\t(c:tc_init@cspin),(c:?_io_write)\n  3724  001FFC  6E13               \tmovwf\t(??_tc_init+0+0)&0ffh,c\n  3725  001FFE  0E01               \tmovlw\tlow(01h)\n  3726  002000  6E0B               \tmovwf\t(0+((c:?_io_write)+01h)),c\n  3727  002002  5013               \tmovf\t(??_tc_init+0+0)&0ffh,c,w\n  3728  002004  ECD5  F00E         \tcall\t_io_write\t;wreg free\n  3729                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3730                           \n  3731  002008  C012  F00A         \tmovff\t(c:tc_init@cspin),(c:?_io_mode)\n  3732  00200C  6E13               \tmovwf\t(??_tc_init+0+0)&0ffh,c\n  3733  00200E  0E00               \tmovlw\tlow(0)\n  3734  002010  6E0B               \tmovwf\t(0+((c:?_io_mode)+01h)),c\n  3735  002012  5013               \tmovf\t(??_tc_init+0+0)&0ffh,c,w\n  3736  002014  EC81  F00E         \tcall\t_io_mode\t;wreg free\n  3737                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3738                           \n  3739  002018                     l2708:\n  3740                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3741  002018  C011  F001         \tmovff\t(c:tc_init@spid),(c:?_spi_control)\n  3742  00201C  0E21               \tmovlw\tlow(021h)\n  3743  00201E  6E02               \tmovwf\t(0+((c:?_spi_control)+01h)),c\n  3744  002020  0E00               \tmovlw\thigh(021h)\n  3745  002022  6E03               \tmovwf\t(1+((c:?_spi_control)+01h)),c\n  3746  002024  0E00               \tmovlw\tlow highword(021h)\n  3747  002026  6E04               \tmovwf\t(2+((c:?_spi_control)+01h)),c\n  3748  002028  0E00               \tmovlw\thigh highword(021h)\n  3749  00202A  6E05               \tmovwf\t(3+((c:?_spi_control)+01h)),c\n  3750  00202C  0E04               \tmovlw\tlow(04h)\n  3751  00202E  6E06               \tmovwf\t(0+((c:?_spi_control)+05h)),c\n  3752  002030  0E00               \tmovlw\thigh(04h)\n  3753  002032  6E07               \tmovwf\t(1+((c:?_spi_control)+05h)),c\n  3754  002034  0E00               \tmovlw\tlow highword(04h)\n  3755  002036  6E08               \tmovwf\t(2+((c:?_spi_control)+05h)),c\n  3756  002038  0E00               \tmovlw\thigh highword(04h)\n  3757  00203A  6E09               \tmovwf\t(3+((c:?_spi_control)+05h)),c\n  3758  00203C  EC14  F00C         \tcall\t_spi_control\t;wreg free\n  3759                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3760                           \n  3761  002040                     l2710:\n  3762                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3763  002040  C011  F001         \tmovff\t(c:tc_init@spid),(c:?_spi_open)\n  3764  002044  EC2C  F011         \tcall\t_spi_open\t;wreg free\n  3765                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3766                           \n  3767  002048                     l2712:\n  3768                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3769  002048  C011  F014         \tmovff\t(c:tc_init@spid),(c:tc_init@tcpl)\n  3770                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3771                           \n  3772  00204C                     l2714:\n  3773                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3774  00204C  C012  F015         \tmovff\t(c:tc_init@cspin),0+((c:tc_init@tcpl)+01h)\n  3775                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3776                           \n  3777  002050                     l2716:\n  3778                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3779  002050  C014  F011         \tmovff\t(c:tc_init@tcpl),(c:?_tc_init)\n  3780  002054  C015  F012         \tmovff\t(c:tc_init@tcpl+1),(c:?_tc_init+1)\n  3781  002058  D000               \tgoto\tl141\n  3782                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3783  00205A                     l2718:\n  3784                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3785                           \n  3786  00205A                     l141:\n  3787  00205A  0012               \treturn\n  3788                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3789                           \n  3790  00205C                     \t__end_of_tc_init:\n  3791                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3792                           \n  3793                           opt pagewidth 120\n  3794                           \n  3795                           \topt lm\n  3796                           \n  3797                           \tprocessor\t18F2550\n  3798                           porta\tequ\t0F80h\n  3799                           portb\tequ\t0F81h\n  3800                           portc\tequ\t0F82h\n  3801                           portd\tequ\t0F83h\n  3802                           porte\tequ\t0F84h\n  3803                           lata\tequ\t0F89h\n  3804                           latb\tequ\t0F8Ah\n  3805                           latc\tequ\t0F8Bh\n  3806                           latd\tequ\t0F8Ch\n  3807                           late\tequ\t0F8Dh\n  3808                           trisa\tequ\t0F92h\n  3809                           trisb\tequ\t0F93h\n  3810                           trisc\tequ\t0F94h\n  3811                           trisd\tequ\t0F95h\n  3812                           trise\tequ\t0F96h\n  3813                           pie1\tequ\t0F9Dh\n  3814                           pir1\tequ\t0F9Eh\n  3815                           ipr1\tequ\t0F9Fh\n  3816                           pie2\tequ\t0FA0h\n  3817                           pir2\tequ\t0FA1h\n  3818                           ipr2\tequ\t0FA2h\n  3819                           t3con\tequ\t0FB1h\n  3820                           tmr3l\tequ\t0FB2h\n  3821                           tmr3h\tequ\t0FB3h\n  3822                           ccp1con\tequ\t0FBDh\n  3823                           ccpr1l\tequ\t0FBEh\n  3824                           ccpr1h\tequ\t0FBFh\n  3825                           adcon1\tequ\t0FC1h\n  3826                           adcon0\tequ\t0FC2h\n  3827                           adresl\tequ\t0FC3h\n  3828  001828                     __ptext3:\n  3829                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3830                           \n  3831                           opt pagewidth 120\n  3832                           \n  3833  0000                     \t__size_of_spi_control\tequ\t__end_of_spi_control-_spi_control\n  3834                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3835  001828                     _spi_control:\n  3836                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3837                           \n  3838                           opt pagewidth 120\n  3839  001828                     l2292:\n  3840                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3841  001828  0401               \tdecf\t((c:spi_control@spid)),c,w\n  3842                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3843  00182A  B4D8               \tbtfsc\tstatus,2\n  3844  00182C  D001               \tgoto\tu951\n  3845  00182E  D001               \tgoto\tu950\n  3846  001830                     u951:\n  3847  001830  D002               \tgoto\tl2296\n  3848  001832                     u950:\n  3849  001832  D090               \tgoto\tl207\n  3850                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3851                           \n  3852  001834                     l2294:\n  3853                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3854                           \n  3855  001834  D08F               \tgoto\tl207\n  3856                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3857  001836                     l206:\n  3858                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3859                           \n  3860  001836                     l2296:\n  3861                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3862  001836  5006               \tmovf\t((c:spi_control@arg)),c,w\n  3863  001838  0B0F               \tandlw\tlow(0Fh)\n  3864  00183A  6E0E               \tmovwf\t((c:spi_control@speed)),c\n  3865                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3866                           \n  3867  00183C  D030               \tgoto\tl2316\n  3868                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3869                           \n  3870                           opt pagewidth 120\n  3871  00183E                     l209:\n  3872                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3873                           \n  3874  00183E                     l2298:\n  3875                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3876  00183E  500E               \tmovf\t((c:spi_control@speed)),c,w\n  3877  001840  0A03               \txorlw\t3\n  3878                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3879  001842  A4D8               \tbtfss\tstatus,2\n  3880  001844  D001               \tgoto\tu961\n  3881  001846  D001               \tgoto\tu960\n  3882  001848                     u961:\n  3883  001848  D005               \tgoto\tl2302\n  3884  00184A                     u960:\n  3885                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3886                           \n  3887  00184A                     l2300:\n  3888                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3889  00184A  90C6               \t\tbcf\t((c:4038)),c, 0+0\t;volatile\n  3890  00184C  92C6               \tbcf\t((c:4038)),c, 0+1\t;volatile\n  3891  00184E  94C6               \tbcf\t((c:4038)),c, 0+2\t;volatile\n  3892  001850  96C6               \tbcf\t((c:4038)),c, 0+3\t;volatile\n  3893                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3894  001852  D057               \tgoto\tl2320\n  3895                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3896                           \n  3897  001854                     l210:\n  3898                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3899  001854                     l2302:\n  3900                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3901  001854  500E               \tmovf\t((c:spi_control@speed)),c,w\n  3902  001856  0A05               \txorlw\t5\n  3903                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3904  001858  A4D8               \tbtfss\tstatus,2\n  3905  00185A  D001               \tgoto\tu971\n  3906  00185C  D001               \tgoto\tu970\n  3907  00185E                     u971:\n  3908  00185E  D005               \tgoto\tl2306\n  3909  001860                     u970:\n  3910                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3911                           \n  3912  001860                     l2304:\n  3913                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3914  001860  50C6               \tmovf\t((c:4038)),c,w\t;volatile\n  3915  001862  0BF0               \tandlw\tnot (((1<<4)-1)<<0)\n  3916  001864  0901               \tiorlw\t(01h & ((1<<4)-1))<<0\n  3917  001866  6EC6               \tmovwf\t((c:4038)),c\t;volatile\n  3918  001868  D04C               \tgoto\tl2320\n  3919                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3920                           \n  3921  00186A                     l212:\n  3922                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3923  00186A                     l2306:\n  3924                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3925  00186A  500E               \tmovf\t((c:spi_control@speed)),c,w\n  3926  00186C  0A07               \txorlw\t7\n  3927                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3928  00186E  A4D8               \tbtfss\tstatus,2\n  3929  001870  D001               \tgoto\tu981\n  3930  001872  D001               \tgoto\tu980\n  3931  001874                     u981:\n  3932  001874  D005               \tgoto\tl2310\n  3933  001876                     u980:\n  3934                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3935                           \n  3936  001876                     l2308:\n  3937                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3938  001876  50C6               \tmovf\t((c:4038)),c,w\t;volatile\n  3939  001878  0BF0               \tandlw\tnot (((1<<4)-1)<<0)\n  3940  00187A  0902               \tiorlw\t(02h & ((1<<4)-1))<<0\n  3941  00187C  6EC6               \tmovwf\t((c:4038)),c\t;volatile\n  3942  00187E  D041               \tgoto\tl2320\n  3943                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3944                           \n  3945  001880                     l214:\n  3946                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3947                           \n  3948  001880                     l2310:\n  3949                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3950                           \n  3951  001880  50C6               \tmovf\t((c:4038)),c,w\t;volatile\n  3952  001882  0BF0               \tandlw\tnot (((1<<4)-1)<<0)\n  3953  001884  0902               \tiorlw\t(02h & ((1<<4)-1))<<0\n  3954  001886  6EC6               \tmovwf\t((c:4038)),c\t;volatile\n  3955  001888  D03C               \tgoto\tl2320\n  3956                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3957  00188A                     l215:\n  3958  00188A  D03B               \tgoto\tl2320\n  3959                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3960  00188C                     l213:\n  3961  00188C  D03A               \tgoto\tl2320\n  3962                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3963  00188E                     l211:\n  3964                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3965                           \n  3966  00188E  D039               \tgoto\tl2320\n  3967                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3968                           \n  3969                           opt pagewidth 120\n  3970  001890                     l217:\n  3971                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3972                           \n  3973  001890                     l2312:\n  3974                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3975  001890  50C6               \tmovf\t((c:4038)),c,w\t;volatile\n  3976  001892  0BF0               \tandlw\tnot (((1<<4)-1)<<0)\n  3977  001894  0904               \tiorlw\t(04h & ((1<<4)-1))<<0\n  3978  001896  6EC6               \tmovwf\t((c:4038)),c\t;volatile\n  3979                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3980                           \n  3981  001898  D034               \tgoto\tl2320\n  3982                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3983                           \n  3984                           opt pagewidth 120\n  3985  00189A                     l218:\n  3986                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3987                           \n  3988                           opt pagewidth 120\n  3989  00189A  D05C               \tgoto\tl207\n  3990                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3991                           \n  3992  00189C                     l2314:\n  3993                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3994  00189C  D032               \tgoto\tl2320\n  3995                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3996                           \n  3997  00189E                     l208:\n  3998                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  3999  00189E                     l2316:\n  4000  00189E  0E0F               \tmovlw\t0Fh\n  4001  0018A0  1402               \tandwf\t((c:spi_control@ctrl)),c,w\n  4002  0018A2  6E0A               \tmovwf\t(??_spi_control+0+0)&0ffh,c\n  4003  0018A4  0E00               \tmovlw\t0\n  4004  0018A6  1403               \tandwf\t((c:spi_control@ctrl+1)),c,w\n  4005  0018A8  6E0B               \tmovwf\t1+(??_spi_control+0+0)&0ffh,c\n  4006  0018AA  0E00               \tmovlw\t0\n  4007  0018AC  1404               \tandwf\t((c:spi_control@ctrl+2)),c,w\n  4008  0018AE  6E0C               \tmovwf\t2+(??_spi_control+0+0)&0ffh,c\n  4009  0018B0  0E00               \tmovlw\t0\n  4010  0018B2  1405               \tandwf\t((c:spi_control@ctrl+3)),c,w\n  4011  0018B4  6E0D               \tmovwf\t3+(??_spi_control+0+0)&0ffh,c\n  4012                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4013                           \n  4014                           opt pagewidth 120\n  4015                           \n  4016                           \topt lm\n  4017                           \n  4018                           \tprocessor\t18F2550\n  4019                           porta\tequ\t0F80h\n  4020  0018B6  500D               \tmovf ??_spi_control+0+3,c,w\n  4021  0018B8  0A00               \txorlw\t0^0\t; case 0\n  4022  0018BA  B4D8               \tskipnz\n  4023  0018BC  D00E               \tgoto\tl3008\n  4024  0018BE  D04A               \tgoto\tl207\n  4025                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4026  0018C0                     l3006:\n  4027                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4028                           \n  4029                           opt pagewidth 120\n  4030                           \n  4031                           \topt lm\n  4032                           \n  4033                           \tprocessor\t18F2550\n  4034                           porta\tequ\t0F80h\n  4035  0018C0  500B               \tmovf ??_spi_control+0+1,c,w\n  4036  0018C2  0A00               \txorlw\t0^0\t; case 0\n  4037  0018C4  B4D8               \tskipnz\n  4038  0018C6  D001               \tgoto\tl3010\n  4039  0018C8  D045               \tgoto\tl207\n  4040                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4041  0018CA                     l3010:\n  4042                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4043                           \n  4044                           opt pagewidth 120\n  4045                           \n  4046                           \topt lm\n  4047                           \n  4048                           \tprocessor\t18F2550\n  4049  0018CA  500A               \tmovf ??_spi_control+0+0,c,w\n  4050  0018CC  0A01               \txorlw\t1^0\t; case 1\n  4051  0018CE  B4D8               \tskipnz\n  4052  0018D0  D7B6               \tgoto\tl2298\n  4053  0018D2  0A03               \txorlw\t2^1\t; case 2\n  4054  0018D4  B4D8               \tskipnz\n  4055  0018D6  D7DC               \tgoto\tl2312\n  4056  0018D8  D03D               \tgoto\tl207\n  4057                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4058  0018DA                     l3008:\n  4059                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4060                           \n  4061                           opt pagewidth 120\n  4062                           \n  4063                           \topt lm\n  4064                           \n  4065                           \tprocessor\t18F2550\n  4066  0018DA  500C               \tmovf ??_spi_control+0+2,c,w\n  4067  0018DC  0A00               \txorlw\t0^0\t; case 0\n  4068  0018DE  B4D8               \tskipnz\n  4069  0018E0  D7EF               \tgoto\tl3006\n  4070  0018E2  D038               \tgoto\tl207\n  4071                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4072                           \n  4073                           opt pagewidth 120\n  4074  0018E4                     l216:\n  4075                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4076                           \n  4077  0018E4  D00E               \tgoto\tl2320\n  4078                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4079                           \n  4080                           opt pagewidth 120\n  4081  0018E6                     l220:\n  4082                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4083                           \n  4084  0018E6  98C6               \tbcf\t((c:4038)),c,4\t;volatile\n  4085                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4086                           \n  4087  0018E8  9CC7               \tbcf\t((c:4039)),c,6\t;volatile\n  4088                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4089                           \n  4090  0018EA  D034               \tgoto\tl207\n  4091                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4092                           \n  4093                           opt pagewidth 120\n  4094  0018EC                     l222:\n  4095                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4096                           \n  4097  0018EC  98C6               \tbcf\t((c:4038)),c,4\t;volatile\n  4098                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4099                           \n  4100  0018EE  8CC7               \tbsf\t((c:4039)),c,6\t;volatile\n  4101                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4102                           \n  4103  0018F0  D031               \tgoto\tl207\n  4104                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4105                           \n  4106                           opt pagewidth 120\n  4107  0018F2                     l223:\n  4108                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4109                           \n  4110  0018F2  88C6               \tbsf\t((c:4038)),c,4\t;volatile\n  4111                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4112                           \n  4113  0018F4  9CC7               \tbcf\t((c:4039)),c,6\t;volatile\n  4114                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4115                           \n  4116  0018F6  D02E               \tgoto\tl207\n  4117                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4118                           \n  4119                           opt pagewidth 120\n  4120  0018F8                     l224:\n  4121                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4122                           \n  4123  0018F8  88C6               \tbsf\t((c:4038)),c,4\t;volatile\n  4124                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4125                           \n  4126  0018FA  8CC7               \tbsf\t((c:4039)),c,6\t;volatile\n  4127                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4128                           \n  4129  0018FC  D02B               \tgoto\tl207\n  4130                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4131                           \n  4132                           opt pagewidth 120\n  4133  0018FE                     l225:\n  4134                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4135                           \n  4136                           opt pagewidth 120\n  4137  0018FE  D02A               \tgoto\tl207\n  4138                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4139                           \n  4140  001900                     l2318:\n  4141                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4142  001900  D029               \tgoto\tl207\n  4143                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4144                           \n  4145  001902                     l219:\n  4146                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4147  001902                     l2320:\n  4148  001902  0EF0               \tmovlw\t0F0h\n  4149  001904  1402               \tandwf\t((c:spi_control@ctrl)),c,w\n  4150  001906  6E0A               \tmovwf\t(??_spi_control+0+0)&0ffh,c\n  4151  001908  0E00               \tmovlw\t0\n  4152  00190A  1403               \tandwf\t((c:spi_control@ctrl+1)),c,w\n  4153  00190C  6E0B               \tmovwf\t1+(??_spi_control+0+0)&0ffh,c\n  4154  00190E  0E00               \tmovlw\t0\n  4155  001910  1404               \tandwf\t((c:spi_control@ctrl+2)),c,w\n  4156  001912  6E0C               \tmovwf\t2+(??_spi_control+0+0)&0ffh,c\n  4157  001914  0E00               \tmovlw\t0\n  4158  001916  1405               \tandwf\t((c:spi_control@ctrl+3)),c,w\n  4159  001918  6E0D               \tmovwf\t3+(??_spi_control+0+0)&0ffh,c\n  4160                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4161                           \n  4162                           opt pagewidth 120\n  4163                           \n  4164                           \topt lm\n  4165                           \n  4166                           \tprocessor\t18F2550\n  4167                           porta\tequ\t0F80h\n  4168  00191A  500D               \tmovf ??_spi_control+0+3,c,w\n  4169  00191C  0A00               \txorlw\t0^0\t; case 0\n  4170  00191E  B4D8               \tskipnz\n  4171  001920  D014               \tgoto\tl3014\n  4172  001922  D018               \tgoto\tl207\n  4173                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4174  001924                     l3012:\n  4175                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4176                           \n  4177                           opt pagewidth 120\n  4178                           \n  4179                           \topt lm\n  4180                           \n  4181                           \tprocessor\t18F2550\n  4182                           porta\tequ\t0F80h\n  4183  001924  500B               \tmovf ??_spi_control+0+1,c,w\n  4184  001926  0A00               \txorlw\t0^0\t; case 0\n  4185  001928  B4D8               \tskipnz\n  4186  00192A  D001               \tgoto\tl3016\n  4187  00192C  D013               \tgoto\tl207\n  4188                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4189  00192E                     l3016:\n  4190                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4191                           \n  4192                           opt pagewidth 120\n  4193                           \n  4194                           \topt lm\n  4195                           \n  4196                           \tprocessor\t18F2550\n  4197  00192E  500A               \tmovf ??_spi_control+0+0,c,w\n  4198  001930  0A10               \txorlw\t16^0\t; case 16\n  4199  001932  B4D8               \tskipnz\n  4200  001934  D7D8               \tgoto\tl220\n  4201  001936  0A30               \txorlw\t32^16\t; case 32\n  4202  001938  B4D8               \tskipnz\n  4203  00193A  D7D8               \tgoto\tl222\n  4204  00193C  0A10               \txorlw\t48^32\t; case 48\n  4205  00193E  B4D8               \tskipnz\n  4206  001940  D7D8               \tgoto\tl223\n  4207  001942  0A70               \txorlw\t64^48\t; case 64\n  4208  001944  B4D8               \tskipnz\n  4209  001946  D7D8               \tgoto\tl224\n  4210  001948  D005               \tgoto\tl207\n  4211                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4212  00194A                     l3014:\n  4213                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4214                           \n  4215                           opt pagewidth 120\n  4216                           \n  4217                           \topt lm\n  4218                           \n  4219                           \tprocessor\t18F2550\n  4220  00194A  500C               \tmovf ??_spi_control+0+2,c,w\n  4221  00194C  0A00               \txorlw\t0^0\t; case 0\n  4222  00194E  B4D8               \tskipnz\n  4223  001950  D7E9               \tgoto\tl3012\n  4224  001952  D000               \tgoto\tl207\n  4225                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4226                           \n  4227                           opt pagewidth 120\n  4228  001954                     l221:\n  4229                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4230                           \n  4231                           opt pagewidth 120\n  4232                           \n  4233  001954                     l207:\n  4234  001954  0012               \treturn\n  4235                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4236                           \n  4237  001956                     \t__end_of_spi_control:\n  4238                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4239                           \n  4240                           opt pagewidth 120\n  4241                           \n  4242                           \topt lm\n  4243                           \n  4244                           \tprocessor\t18F2550\n  4245                           porta\tequ\t0F80h\n  4246                           portb\tequ\t0F81h\n  4247                           portc\tequ\t0F82h\n  4248                           portd\tequ\t0F83h\n  4249                           porte\tequ\t0F84h\n  4250                           lata\tequ\t0F89h\n  4251                           latb\tequ\t0F8Ah\n  4252                           latc\tequ\t0F8Bh\n  4253                           latd\tequ\t0F8Ch\n  4254                           late\tequ\t0F8Dh\n  4255                           trisa\tequ\t0F92h\n  4256                           trisb\tequ\t0F93h\n  4257                           trisc\tequ\t0F94h\n  4258                           trisd\tequ\t0F95h\n  4259                           trise\tequ\t0F96h\n  4260                           pie1\tequ\t0F9Dh\n  4261                           pir1\tequ\t0F9Eh\n  4262                           ipr1\tequ\t0F9Fh\n  4263                           pie2\tequ\t0FA0h\n  4264                           pir2\tequ\t0FA1h\n  4265                           ipr2\tequ\t0FA2h\n  4266                           t3con\tequ\t0FB1h\n  4267                           tmr3l\tequ\t0FB2h\n  4268                           tmr3h\tequ\t0FB3h\n  4269                           ccp1con\tequ\t0FBDh\n  4270                           ccpr1l\tequ\t0FBEh\n  4271                           ccpr1h\tequ\t0FBFh\n  4272                           adcon1\tequ\t0FC1h\n  4273                           adcon0\tequ\t0FC2h\n  4274                           adresl\tequ\t0FC3h\n  4275                           adresh\tequ\t0FC4h\n  4276                           sspcon2\tequ\t0FC5h\n  4277                           sspcon1\tequ\t0FC6h\n  4278                           sspstat\tequ\t0FC7h\n  4279                           sspadd\tequ\t0FC8h\n  4280                           sspbuf\tequ\t0FC9h\n  4281                           t2con\tequ\t0FCAh\n  4282                           pr2\tequ\t0FCBh\n  4283                           tmr2\tequ\t0FCCh\n  4284                           t1con\tequ\t0FCDh\n  4285  0015A4                     __ptext4:\n  4286                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4287                           \n  4288                           opt pagewidth 120\n  4289                           \n  4290  0000                     \t__size_of_pid_create\tequ\t__end_of_pid_create-_pid_create\n  4291                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4292  0015A4                     _pid_create:\n  4293                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4294                           \n  4295                           opt pagewidth 120\n  4296  0015A4                     l2900:\n  4297                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4298  0015A4  C035  FFD9         \tmovff\t(c:pid_create@pid),fsr2l\n  4299  0015A8  C036  FFDA         \tmovff\t(c:pid_create@pid+1),fsr2h\n  4300  0015AC  C037  FFDE         \tmovff\t(c:pid_create@in),postinc2\n  4301  0015B0  C038  FFDD         \tmovff\t(c:pid_create@in+1),postdec2\n  4302                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4303                           \n  4304  0015B4                     l2902:\n  4305                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4306  0015B4  EE20 F002          \tlfsr\t2,02h\n  4307  0015B8  5035               \tmovf\t((c:pid_create@pid)),c,w\n  4308  0015BA  26D9               \taddwf\tfsr2l\n  4309  0015BC  5036               \tmovf\t((c:pid_create@pid+1)),c,w\n  4310  0015BE  22DA               \taddwfc\tfsr2h\n  4311  0015C0  C039  FFDE         \tmovff\t(c:pid_create@out),postinc2\n  4312  0015C4  C03A  FFDD         \tmovff\t(c:pid_create@out+1),postdec2\n  4313                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4314                           \n  4315  0015C8                     l2904:\n  4316                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4317  0015C8  EE20 F004          \tlfsr\t2,04h\n  4318  0015CC  5035               \tmovf\t((c:pid_create@pid)),c,w\n  4319  0015CE  26D9               \taddwf\tfsr2l\n  4320  0015D0  5036               \tmovf\t((c:pid_create@pid+1)),c,w\n  4321  0015D2  22DA               \taddwfc\tfsr2h\n  4322  0015D4  C03B  FFDE         \tmovff\t(c:pid_create@set),postinc2\n  4323  0015D8  C03C  FFDD         \tmovff\t(c:pid_create@set+1),postdec2\n  4324                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4325                           \n  4326  0015DC                     l2906:\n  4327                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4328  0015DC  EE20 F023          \tlfsr\t2,023h\n  4329  0015E0  5035               \tmovf\t((c:pid_create@pid)),c,w\n  4330  0015E2  26D9               \taddwf\tfsr2l\n  4331  0015E4  5036               \tmovf\t((c:pid_create@pid+1)),c,w\n  4332  0015E6  22DA               \taddwfc\tfsr2h\n  4333  0015E8  0E00               \tmovlw\tlow(0)\n  4334  0015EA  6EDF               \tmovwf\tindf2\n  4335                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4336                           \n  4337  0015EC                     l2908:\n  4338                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4339  0015EC  C035  F00A         \tmovff\t(c:pid_create@pid),(c:?_pid_limits)\n  4340  0015F0  C036  F00B         \tmovff\t(c:pid_create@pid+1),(c:?_pid_limits+1)\n  4341  0015F4  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  4342  0015F6  6E0C               \tmovwf\t(0+((c:?_pid_limits)+02h)),c\n  4343  0015F8  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  4344  0015FA  6E0D               \tmovwf\t(1+((c:?_pid_limits)+02h)),c\n  4345  0015FC  0E00               \tmovlw\tlow highword(float24(0.0000000000000000))\n  4346  0015FE  6E0E               \tmovwf\t(2+((c:?_pid_limits)+02h)),c\n  4347                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4348  001600  0E00               \tmovlw\tlow(float24(255.00000000000000))\n  4349  001602  6E0F               \tmovwf\t(0+((c:?_pid_limits)+05h)),c\n  4350  001604  0E7F               \tmovlw\thigh(float24(255.00000000000000))\n  4351  001606  6E10               \tmovwf\t(1+((c:?_pid_limits)+05h)),c\n  4352  001608  0E43               \tmovlw\tlow highword(float24(255.00000000000000))\n  4353  00160A  6E11               \tmovwf\t(2+((c:?_pid_limits)+05h)),c\n  4354                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4355  00160C  EC17  F006         \tcall\t_pid_limits\t;wreg free\n  4356                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4357                           \n  4358  001610                     l2910:\n  4359                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4360  001610  EE20 F01F          \tlfsr\t2,01Fh\n  4361  001614  5035               \tmovf\t((c:pid_create@pid)),c,w\n  4362  001616  26D9               \taddwf\tfsr2l\n  4363  001618  5036               \tmovf\t((c:pid_create@pid+1)),c,w\n  4364  00161A  22DA               \taddwfc\tfsr2h\n  4365  00161C  0EF8               \tmovlw\tlow(011F8h)\n  4366  00161E  6EDE               \tmovwf\tpostinc2\n  4367  001620  0E11               \tmovlw\thigh(011F8h)\n  4368  001622  6EDE               \tmovwf\tpostinc2\n  4369  001624  0E00               \tmovlw\tlow highword(011F8h)\n  4370  001626  6EDE               \tmovwf\tpostinc2\n  4371  001628  0E00               \tmovlw\thigh highword(011F8h)\n  4372  00162A  6EDD               \tmovwf\tpostdec2\n  4373  00162C  52DD               \tmovf\tpostdec2\n  4374  00162E  52DD               \tmovf\tpostdec2\n  4375                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4376                           \n  4377  001630                     l2912:\n  4378                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4379  001630  C035  F00C         \tmovff\t(c:pid_create@pid),(c:?_pid_direction)\n  4380  001634  C036  F00D         \tmovff\t(c:pid_create@pid+1),(c:?_pid_direction+1)\n  4381  001638  6E46               \tmovwf\t(??_pid_create+0+0)&0ffh,c\n  4382  00163A  0E00               \tmovlw\tlow(0)\n  4383  00163C  6E0E               \tmovwf\t(0+((c:?_pid_direction)+02h)),c\n  4384  00163E  5046               \tmovf\t(??_pid_create+0+0)&0ffh,c,w\n  4385  001640  ECB1  F00D         \tcall\t_pid_direction\t;wreg free\n  4386                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4387                           \n  4388  001644                     l2914:\n  4389                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4390  001644  C035  F027         \tmovff\t(c:pid_create@pid),(c:?_pid_tune)\n  4391  001648  C036  F028         \tmovff\t(c:pid_create@pid+1),(c:?_pid_tune+1)\n  4392  00164C  C03D  F029         \tmovff\t(c:pid_create@kp),0+((c:?_pid_tune)+02h)\n  4393  001650  C03E  F02A         \tmovff\t(c:pid_create@kp+1),1+((c:?_pid_tune)+02h)\n  4394  001654  C03F  F02B         \tmovff\t(c:pid_create@kp+2),2+((c:?_pid_tune)+02h)\n  4395  001658  C040  F02C         \tmovff\t(c:pid_create@ki),0+((c:?_pid_tune)+05h)\n  4396  00165C  C041  F02D         \tmovff\t(c:pid_create@ki+1),1+((c:?_pid_tune)+05h)\n  4397  001660  C042  F02E         \tmovff\t(c:pid_create@ki+2),2+((c:?_pid_tune)+05h)\n  4398  001664  C043  F02F         \tmovff\t(c:pid_create@kd),0+((c:?_pid_tune)+08h)\n  4399  001668  C044  F030         \tmovff\t(c:pid_create@kd+1),1+((c:?_pid_tune)+08h)\n  4400  00166C  C045  F031         \tmovff\t(c:pid_create@kd+2),2+((c:?_pid_tune)+08h)\n  4401  001670  EC57  F008         \tcall\t_pid_tune\t;wreg free\n  4402                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4403                           \n  4404  001674                     l2916:\n  4405                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4406  001674  EE20 F01F          \tlfsr\t2,01Fh\n  4407  001678  5035               \tmovf\t((c:pid_create@pid)),c,w\n  4408  00167A  26D9               \taddwf\tfsr2l\n  4409  00167C  5036               \tmovf\t((c:pid_create@pid+1)),c,w\n  4410  00167E  22DA               \taddwfc\tfsr2h\n  4411  001680  CFDE F046          \tmovff\tpostinc2,??_pid_create+0+0\n  4412  001684  CFDE F047          \tmovff\tpostinc2,??_pid_create+0+0+1\n  4413  001688  CFDE F048          \tmovff\tpostinc2,??_pid_create+0+0+2\n  4414  00168C  CFDE F049          \tmovff\tpostinc2,??_pid_create+0+0+3\n  4415  001690  1E46               \tcomf\t(??_pid_create+0+0),c\n  4416  001692  1E47               \tcomf\t(??_pid_create+0+1),c\n  4417  001694  1E48               \tcomf\t(??_pid_create+0+2),c\n  4418  001696  1E49               \tcomf\t(??_pid_create+0+3),c\n  4419  001698  2A46               \tincf\t(??_pid_create+0+0),c\n  4420  00169A  0E00               \tmovlw\t0\n  4421  00169C  2247               \taddwfc\t(??_pid_create+0+1),c\n  4422  00169E  2248               \taddwfc\t(??_pid_create+0+2),c\n  4423  0016A0  2249               \taddwfc\t(??_pid_create+0+3),c\n  4424  0016A2  EC20  F011         \tcall\t_tick_get\t;wreg free\n  4425  0016A6  5046               \tmovf\t(??_pid_create+0+0),c,w\n  4426  0016A8  2401               \taddwf\t(0+?_tick_get),c,w\n  4427  0016AA  6E4A               \tmovwf\t(??_pid_create+4+0)&0ffh,c\n  4428  0016AC  5047               \tmovf\t(??_pid_create+0+1),c,w\n  4429  0016AE  2002               \taddwfc\t(1+?_tick_get),c,w\n  4430  0016B0  6E4B               \tmovwf\t1+(??_pid_create+4+0)&0ffh,c\n  4431                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4432  0016B2  5048               \tmovf\t(??_pid_create+0+2),c,w\n  4433  0016B4  2003               \taddwfc\t(2+?_tick_get),c,w\n  4434  0016B6  6E4C               \tmovwf\t2+(??_pid_create+4+0)&0ffh,c\n  4435                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4436  0016B8  5049               \tmovf\t(??_pid_create+0+3),c,w\n  4437  0016BA  2004               \taddwfc\t(3+?_tick_get),c,w\n  4438  0016BC  6E4D               \tmovwf\t3+(??_pid_create+4+0)&0ffh,c\n  4439  0016BE  EE20 F01B          \tlfsr\t2,01Bh\n  4440  0016C2  5035               \tmovf\t((c:pid_create@pid)),c,w\n  4441  0016C4  26D9               \taddwf\tfsr2l\n  4442  0016C6  5036               \tmovf\t((c:pid_create@pid+1)),c,w\n  4443  0016C8  22DA               \taddwfc\tfsr2h\n  4444  0016CA  C04A  FFDE         \tmovff\t??_pid_create+4+0,postinc2\n  4445  0016CE  C04B  FFDE         \tmovff\t??_pid_create+4+1,postinc2\n  4446  0016D2  C04C  FFDE         \tmovff\t??_pid_create+4+2,postinc2\n  4447  0016D6  C04D  FFDD         \tmovff\t??_pid_create+4+3,postdec2\n  4448  0016DA  06D9               \tdecf\tfsr2\n  4449  0016DC  06D9               \tdecf\tfsr2\n  4450                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4451                           \n  4452  0016DE                     l2918:\n  4453                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4454  0016DE  C035  F035         \tmovff\t(c:pid_create@pid),(c:?_pid_create)\n  4455  0016E2  C036  F036         \tmovff\t(c:pid_create@pid+1),(c:?_pid_create+1)\n  4456  0016E6  D000               \tgoto\tl84\n  4457                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4458  0016E8                     l2920:\n  4459                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4460                           \n  4461  0016E8                     l84:\n  4462  0016E8  0012               \treturn\n  4463                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4464                           \n  4465  0016EA                     \t__end_of_pid_create:\n  4466                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4467                           \n  4468                           opt pagewidth 120\n  4469                           \n  4470                           \topt lm\n  4471                           \n  4472                           \tprocessor\t18F2550\n  4473                           porta\tequ\t0F80h\n  4474                           portb\tequ\t0F81h\n  4475                           portc\tequ\t0F82h\n  4476                           portd\tequ\t0F83h\n  4477                           porte\tequ\t0F84h\n  4478                           lata\tequ\t0F89h\n  4479                           latb\tequ\t0F8Ah\n  4480                           latc\tequ\t0F8Bh\n  4481                           latd\tequ\t0F8Ch\n  4482                           late\tequ\t0F8Dh\n  4483                           trisa\tequ\t0F92h\n  4484                           trisb\tequ\t0F93h\n  4485                           trisc\tequ\t0F94h\n  4486                           trisd\tequ\t0F95h\n  4487                           trise\tequ\t0F96h\n  4488                           pie1\tequ\t0F9Dh\n  4489                           pir1\tequ\t0F9Eh\n  4490                           ipr1\tequ\t0F9Fh\n  4491                           pie2\tequ\t0FA0h\n  4492                           pir2\tequ\t0FA1h\n  4493                           ipr2\tequ\t0FA2h\n  4494                           t3con\tequ\t0FB1h\n  4495                           tmr3l\tequ\t0FB2h\n  4496                           tmr3h\tequ\t0FB3h\n  4497                           ccp1con\tequ\t0FBDh\n  4498                           ccpr1l\tequ\t0FBEh\n  4499                           ccpr1h\tequ\t0FBFh\n  4500                           adcon1\tequ\t0FC1h\n  4501                           adcon0\tequ\t0FC2h\n  4502                           adresl\tequ\t0FC3h\n  4503                           adresh\tequ\t0FC4h\n  4504  000C2E                     __ptext5:\n  4505                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4506                           \n  4507                           opt pagewidth 120\n  4508                           \n  4509  0000                     \t__size_of_pid_limits\tequ\t__end_of_pid_limits-_pid_limits\n  4510                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4511  000C2E                     _pid_limits:\n  4512                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4513                           \n  4514                           opt pagewidth 120\n  4515  000C2E                     l2526:\n  4516                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4517  000C2E  C00C  F001         \tmovff\t(c:pid_limits@min),(c:?___ftge)\n  4518  000C32  C00D  F002         \tmovff\t(c:pid_limits@min+1),(c:?___ftge+1)\n  4519  000C36  C00E  F003         \tmovff\t(c:pid_limits@min+2),(c:?___ftge+2)\n  4520  000C3A  C00F  F004         \tmovff\t(c:pid_limits@max),0+((c:?___ftge)+03h)\n  4521  000C3E  C010  F005         \tmovff\t(c:pid_limits@max+1),1+((c:?___ftge)+03h)\n  4522  000C42  C011  F006         \tmovff\t(c:pid_limits@max+2),2+((c:?___ftge)+03h)\n  4523  000C46  EC29  F00F         \tcall\t___ftge\t;wreg free\n  4524  000C4A  A0D8               \tbtfss\tstatus,0\n  4525  000C4C  D001               \tgoto\tu1271\n  4526  000C4E  D001               \tgoto\tu1270\n  4527  000C50                     u1271:\n  4528  000C50  D002               \tgoto\tl2530\n  4529  000C52                     u1270:\n  4530  000C52  D10F               \tgoto\tl110\n  4531                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4532  000C54                     l2528:\n  4533  000C54  D10E               \tgoto\tl110\n  4534                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4535  000C56                     l109:\n  4536                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4537                           \n  4538  000C56                     l2530:\n  4539                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4540  000C56  EE20 F00F          \tlfsr\t2,0Fh\n  4541  000C5A  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4542  000C5C  26D9               \taddwf\tfsr2l\n  4543  000C5E  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4544  000C60  22DA               \taddwfc\tfsr2h\n  4545  000C62  C00C  FFDE         \tmovff\t(c:pid_limits@min),postinc2\n  4546  000C66  C00D  FFDE         \tmovff\t(c:pid_limits@min+1),postinc2\n  4547  000C6A  C00E  FFDD         \tmovff\t(c:pid_limits@min+2),postdec2\n  4548                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4549                           \n  4550  000C6E  EE20 F012          \tlfsr\t2,012h\n  4551  000C72  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4552  000C74  26D9               \taddwf\tfsr2l\n  4553  000C76  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4554  000C78  22DA               \taddwfc\tfsr2h\n  4555  000C7A  C00F  FFDE         \tmovff\t(c:pid_limits@max),postinc2\n  4556  000C7E  C010  FFDE         \tmovff\t(c:pid_limits@max+1),postinc2\n  4557  000C82  C011  FFDD         \tmovff\t(c:pid_limits@max+2),postdec2\n  4558                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4559                           \n  4560  000C86  EE20 F023          \tlfsr\t2,023h\n  4561  000C8A  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4562  000C8C  26D9               \taddwf\tfsr2l\n  4563  000C8E  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4564  000C90  22DA               \taddwfc\tfsr2h\n  4565  000C92  50DF               \tmovf\tindf2,w\n  4566  000C94  B4D8               \tbtfsc\tstatus,2\n  4567  000C96  D001               \tgoto\tu1281\n  4568  000C98  D001               \tgoto\tu1280\n  4569  000C9A                     u1281:\n  4570  000C9A  D0EB               \tgoto\tl110\n  4571  000C9C                     u1280:\n  4572                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4573                           \n  4574  000C9C                     l2532:\n  4575                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4576  000C9C  EE20 F012          \tlfsr\t2,012h\n  4577  000CA0  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4578  000CA2  26D9               \taddwf\tfsr2l\n  4579  000CA4  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4580  000CA6  22DA               \taddwfc\tfsr2h\n  4581  000CA8  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  4582  000CAC  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  4583  000CB0  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  4584  000CB4  EE20 F002          \tlfsr\t2,02h\n  4585  000CB8  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4586  000CBA  26D9               \taddwf\tfsr2l\n  4587  000CBC  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4588  000CBE  22DA               \taddwfc\tfsr2h\n  4589  000CC0  CFDE F012          \tmovff\tpostinc2,??_pid_limits+0+0\n  4590  000CC4  CFDD F013          \tmovff\tpostdec2,??_pid_limits+0+0+1\n  4591  000CC8  C012  FFD9         \tmovff\t??_pid_limits+0+0,fsr2l\n  4592  000CCC  C013  FFDA         \tmovff\t??_pid_limits+0+1,fsr2h\n  4593  000CD0  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  4594  000CD4  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  4595  000CD8  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  4596  000CDC  EC29  F00F         \tcall\t___ftge\t;wreg free\n  4597  000CE0  B0D8               \tbtfsc\tstatus,0\n  4598  000CE2  D001               \tgoto\tu1291\n  4599  000CE4  D001               \tgoto\tu1290\n  4600  000CE6                     u1291:\n  4601  000CE6  D01C               \tgoto\tl2536\n  4602  000CE8                     u1290:\n  4603                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4604                           \n  4605  000CE8                     l2534:\n  4606                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4607  000CE8  EE20 F012          \tlfsr\t2,012h\n  4608  000CEC  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4609  000CEE  26D9               \taddwf\tfsr2l\n  4610  000CF0  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4611  000CF2  22DA               \taddwfc\tfsr2h\n  4612  000CF4  EE10 F002          \tlfsr\t1,02h\n  4613  000CF8  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4614  000CFA  26E1               \taddwf\tfsr1l\n  4615  000CFC  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4616  000CFE  22E2               \taddwfc\tfsr1h\n  4617  000D00  CFE6 F012          \tmovff\tpostinc1,??_pid_limits+0+0\n  4618  000D04  CFE5 F013          \tmovff\tpostdec1,??_pid_limits+0+0+1\n  4619  000D08  C012  FFE1         \tmovff\t??_pid_limits+0+0,fsr1l\n  4620  000D0C  C013  FFE2         \tmovff\t??_pid_limits+0+1,fsr1h\n  4621  000D10  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4622  000D14  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4623  000D18  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  4624  000D1C  52E5               \tmovf\tpostdec1\n  4625  000D1E  D043               \tgoto\tl2540\n  4626                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4627                           \n  4628  000D20                     l112:\n  4629                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4630  000D20                     l2536:\n  4631                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4632  000D20  EE20 F002          \tlfsr\t2,02h\n  4633  000D24  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4634  000D26  26D9               \taddwf\tfsr2l\n  4635  000D28  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4636  000D2A  22DA               \taddwfc\tfsr2h\n  4637  000D2C  CFDE F012          \tmovff\tpostinc2,??_pid_limits+0+0\n  4638  000D30  CFDD F013          \tmovff\tpostdec2,??_pid_limits+0+0+1\n  4639  000D34  C012  FFD9         \tmovff\t??_pid_limits+0+0,fsr2l\n  4640  000D38  C013  FFDA         \tmovff\t??_pid_limits+0+1,fsr2h\n  4641  000D3C  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  4642  000D40  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  4643  000D44  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  4644  000D48  EE20 F00F          \tlfsr\t2,0Fh\n  4645  000D4C  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4646  000D4E  26D9               \taddwf\tfsr2l\n  4647  000D50  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4648  000D52  22DA               \taddwfc\tfsr2h\n  4649  000D54  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  4650  000D58  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  4651  000D5C  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  4652  000D60  EC29  F00F         \tcall\t___ftge\t;wreg free\n  4653  000D64  B0D8               \tbtfsc\tstatus,0\n  4654  000D66  D001               \tgoto\tu1301\n  4655  000D68  D001               \tgoto\tu1300\n  4656  000D6A                     u1301:\n  4657  000D6A  D01D               \tgoto\tl2540\n  4658  000D6C                     u1300:\n  4659                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4660                           \n  4661  000D6C                     l2538:\n  4662                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4663  000D6C  EE20 F00F          \tlfsr\t2,0Fh\n  4664  000D70  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4665  000D72  26D9               \taddwf\tfsr2l\n  4666  000D74  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4667  000D76  22DA               \taddwfc\tfsr2h\n  4668  000D78  EE10 F002          \tlfsr\t1,02h\n  4669  000D7C  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4670  000D7E  26E1               \taddwf\tfsr1l\n  4671  000D80  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4672  000D82  22E2               \taddwfc\tfsr1h\n  4673  000D84  CFE6 F012          \tmovff\tpostinc1,??_pid_limits+0+0\n  4674  000D88  CFE5 F013          \tmovff\tpostdec1,??_pid_limits+0+0+1\n  4675  000D8C  C012  FFE1         \tmovff\t??_pid_limits+0+0,fsr1l\n  4676  000D90  C013  FFE2         \tmovff\t??_pid_limits+0+1,fsr1h\n  4677  000D94  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4678  000D98  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4679  000D9C  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  4680  000DA0  52E5               \tmovf\tpostdec1\n  4681  000DA2  D001               \tgoto\tl2540\n  4682                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4683  000DA4                     l114:\n  4684  000DA4  D000               \tgoto\tl2540\n  4685                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4686                           \n  4687  000DA6                     l113:\n  4688                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4689  000DA6                     l2540:\n  4690                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4691  000DA6  EE20 F012          \tlfsr\t2,012h\n  4692  000DAA  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4693  000DAC  26D9               \taddwf\tfsr2l\n  4694  000DAE  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4695  000DB0  22DA               \taddwfc\tfsr2h\n  4696  000DB2  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  4697  000DB6  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  4698  000DBA  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  4699  000DBE  EE20 F015          \tlfsr\t2,015h\n  4700  000DC2  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4701  000DC4  26D9               \taddwf\tfsr2l\n  4702  000DC6  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4703  000DC8  22DA               \taddwfc\tfsr2h\n  4704  000DCA  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  4705  000DCE  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  4706  000DD2  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  4707  000DD6  EC29  F00F         \tcall\t___ftge\t;wreg free\n  4708  000DDA  B0D8               \tbtfsc\tstatus,0\n  4709  000DDC  D001               \tgoto\tu1311\n  4710  000DDE  D001               \tgoto\tu1310\n  4711  000DE0                     u1311:\n  4712  000DE0  D014               \tgoto\tl2544\n  4713  000DE2                     u1310:\n  4714                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4715                           \n  4716  000DE2                     l2542:\n  4717                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4718  000DE2  EE20 F012          \tlfsr\t2,012h\n  4719  000DE6  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4720  000DE8  26D9               \taddwf\tfsr2l\n  4721  000DEA  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4722  000DEC  22DA               \taddwfc\tfsr2h\n  4723  000DEE  EE10 F015          \tlfsr\t1,015h\n  4724  000DF2  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4725  000DF4  26E1               \taddwf\tfsr1l\n  4726  000DF6  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4727  000DF8  22E2               \taddwfc\tfsr1h\n  4728  000DFA  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4729  000DFE  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4730  000E02  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  4731  000E06  52E5               \tmovf\tpostdec1\n  4732  000E08  D034               \tgoto\tl110\n  4733                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4734                           \n  4735  000E0A                     l115:\n  4736                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4737  000E0A                     l2544:\n  4738                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4739  000E0A  EE20 F015          \tlfsr\t2,015h\n  4740  000E0E  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4741  000E10  26D9               \taddwf\tfsr2l\n  4742  000E12  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4743  000E14  22DA               \taddwfc\tfsr2h\n  4744  000E16  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  4745  000E1A  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  4746  000E1E  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  4747  000E22  EE20 F00F          \tlfsr\t2,0Fh\n  4748  000E26  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4749  000E28  26D9               \taddwf\tfsr2l\n  4750  000E2A  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4751  000E2C  22DA               \taddwfc\tfsr2h\n  4752  000E2E  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  4753  000E32  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  4754  000E36  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  4755  000E3A  EC29  F00F         \tcall\t___ftge\t;wreg free\n  4756  000E3E  B0D8               \tbtfsc\tstatus,0\n  4757  000E40  D001               \tgoto\tu1321\n  4758  000E42  D001               \tgoto\tu1320\n  4759  000E44                     u1321:\n  4760  000E44  D016               \tgoto\tl110\n  4761  000E46                     u1320:\n  4762                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4763                           \n  4764  000E46                     l2546:\n  4765                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4766  000E46  EE20 F00F          \tlfsr\t2,0Fh\n  4767  000E4A  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4768  000E4C  26D9               \taddwf\tfsr2l\n  4769  000E4E  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4770  000E50  22DA               \taddwfc\tfsr2h\n  4771  000E52  EE10 F015          \tlfsr\t1,015h\n  4772  000E56  500A               \tmovf\t((c:pid_limits@pid)),c,w\n  4773  000E58  26E1               \taddwf\tfsr1l\n  4774  000E5A  500B               \tmovf\t((c:pid_limits@pid+1)),c,w\n  4775  000E5C  22E2               \taddwfc\tfsr1h\n  4776  000E5E  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4777  000E62  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4778  000E66  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  4779  000E6A  52E5               \tmovf\tpostdec1\n  4780  000E6C  D002               \tgoto\tl110\n  4781                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4782  000E6E                     l117:\n  4783  000E6E  D001               \tgoto\tl110\n  4784                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4785                           \n  4786  000E70                     l116:\n  4787  000E70  D000               \tgoto\tl110\n  4788                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4789  000E72                     l111:\n  4790                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4791                           \n  4792  000E72                     l110:\n  4793  000E72  0012               \treturn\n  4794                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4795                           \n  4796  000E74                     \t__end_of_pid_limits:\n  4797                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4798                           \n  4799                           opt pagewidth 120\n  4800                           \n  4801                           \topt lm\n  4802                           \n  4803                           \tprocessor\t18F2550\n  4804                           porta\tequ\t0F80h\n  4805                           portb\tequ\t0F81h\n  4806                           portc\tequ\t0F82h\n  4807                           portd\tequ\t0F83h\n  4808                           porte\tequ\t0F84h\n  4809                           lata\tequ\t0F89h\n  4810                           latb\tequ\t0F8Ah\n  4811                           latc\tequ\t0F8Bh\n  4812                           latd\tequ\t0F8Ch\n  4813                           late\tequ\t0F8Dh\n  4814                           trisa\tequ\t0F92h\n  4815                           trisb\tequ\t0F93h\n  4816                           trisc\tequ\t0F94h\n  4817                           trisd\tequ\t0F95h\n  4818                           trise\tequ\t0F96h\n  4819                           pie1\tequ\t0F9Dh\n  4820                           pir1\tequ\t0F9Eh\n  4821                           ipr1\tequ\t0F9Fh\n  4822                           pie2\tequ\t0FA0h\n  4823                           pir2\tequ\t0FA1h\n  4824                           ipr2\tequ\t0FA2h\n  4825                           t3con\tequ\t0FB1h\n  4826                           tmr3l\tequ\t0FB2h\n  4827                           tmr3h\tequ\t0FB3h\n  4828                           ccp1con\tequ\t0FBDh\n  4829                           ccpr1l\tequ\t0FBEh\n  4830                           ccpr1h\tequ\t0FBFh\n  4831                           adcon1\tequ\t0FC1h\n  4832  001448                     __ptext6:\n  4833                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4834                           \n  4835                           opt pagewidth 120\n  4836                           \n  4837  0000                     \t__size_of_pid_auto\tequ\t__end_of_pid_auto-_pid_auto\n  4838                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4839  001448                     _pid_auto:\n  4840                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4841                           \n  4842                           opt pagewidth 120\n  4843  001448                     l2548:\n  4844                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4845  001448  EE20 F023          \tlfsr\t2,023h\n  4846  00144C  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4847  00144E  26D9               \taddwf\tfsr2l\n  4848  001450  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4849  001452  22DA               \taddwfc\tfsr2h\n  4850  001454  50DF               \tmovf\tindf2,w\n  4851  001456  A4D8               \tbtfss\tstatus,2\n  4852  001458  D001               \tgoto\tu1331\n  4853  00145A  D001               \tgoto\tu1330\n  4854  00145C                     u1331:\n  4855  00145C  D0A2               \tgoto\tl124\n  4856  00145E                     u1330:\n  4857                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4858                           \n  4859  00145E                     l2550:\n  4860                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4861  00145E  EE20 F002          \tlfsr\t2,02h\n  4862  001462  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4863  001464  26D9               \taddwf\tfsr2l\n  4864  001466  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4865  001468  22DA               \taddwfc\tfsr2h\n  4866  00146A  CFDE F00C          \tmovff\tpostinc2,??_pid_auto+0+0\n  4867  00146E  CFDD F00D          \tmovff\tpostdec2,??_pid_auto+0+0+1\n  4868  001472  C00C  FFD9         \tmovff\t??_pid_auto+0+0,fsr2l\n  4869  001476  C00D  FFDA         \tmovff\t??_pid_auto+0+1,fsr2h\n  4870  00147A  EE10 F018          \tlfsr\t1,018h\n  4871  00147E  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4872  001480  26E1               \taddwf\tfsr1l\n  4873  001482  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4874  001484  22E2               \taddwfc\tfsr1h\n  4875  001486  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4876  00148A  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4877  00148E  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  4878  001492  52E5               \tmovf\tpostdec1\n  4879                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4880                           \n  4881  001494  C00A  FFD9         \tmovff\t(c:pid_auto@pid),fsr2l\n  4882  001498  C00B  FFDA         \tmovff\t(c:pid_auto@pid+1),fsr2h\n  4883  00149C  CFDE F00C          \tmovff\tpostinc2,??_pid_auto+0+0\n  4884  0014A0  CFDD F00D          \tmovff\tpostdec2,??_pid_auto+0+0+1\n  4885  0014A4  C00C  FFD9         \tmovff\t??_pid_auto+0+0,fsr2l\n  4886  0014A8  C00D  FFDA         \tmovff\t??_pid_auto+0+1,fsr2h\n  4887  0014AC  EE10 F018          \tlfsr\t1,018h\n  4888  0014B0  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4889  0014B2  26E1               \taddwf\tfsr1l\n  4890  0014B4  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4891  0014B6  22E2               \taddwfc\tfsr1h\n  4892  0014B8  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4893  0014BC  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4894  0014C0  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  4895  0014C4  52E5               \tmovf\tpostdec1\n  4896                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4897                           \n  4898  0014C6                     l2552:\n  4899                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4900  0014C6  EE20 F012          \tlfsr\t2,012h\n  4901  0014CA  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4902  0014CC  26D9               \taddwf\tfsr2l\n  4903  0014CE  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4904  0014D0  22DA               \taddwfc\tfsr2h\n  4905  0014D2  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  4906  0014D6  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  4907  0014DA  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  4908  0014DE  EE20 F015          \tlfsr\t2,015h\n  4909  0014E2  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4910  0014E4  26D9               \taddwf\tfsr2l\n  4911  0014E6  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4912  0014E8  22DA               \taddwfc\tfsr2h\n  4913  0014EA  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  4914  0014EE  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  4915  0014F2  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  4916  0014F6  EC29  F00F         \tcall\t___ftge\t;wreg free\n  4917  0014FA  B0D8               \tbtfsc\tstatus,0\n  4918  0014FC  D001               \tgoto\tu1341\n  4919  0014FE  D001               \tgoto\tu1340\n  4920  001500                     u1341:\n  4921  001500  D014               \tgoto\tl2556\n  4922  001502                     u1340:\n  4923                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4924                           \n  4925  001502                     l2554:\n  4926                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4927  001502  EE20 F012          \tlfsr\t2,012h\n  4928  001506  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4929  001508  26D9               \taddwf\tfsr2l\n  4930  00150A  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4931  00150C  22DA               \taddwfc\tfsr2h\n  4932  00150E  EE10 F015          \tlfsr\t1,015h\n  4933  001512  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4934  001514  26E1               \taddwf\tfsr1l\n  4935  001516  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4936  001518  22E2               \taddwfc\tfsr1h\n  4937  00151A  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4938  00151E  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4939  001522  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  4940  001526  52E5               \tmovf\tpostdec1\n  4941  001528  D033               \tgoto\tl2560\n  4942                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4943                           \n  4944  00152A                     l121:\n  4945                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4946  00152A                     l2556:\n  4947                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4948  00152A  EE20 F015          \tlfsr\t2,015h\n  4949  00152E  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4950  001530  26D9               \taddwf\tfsr2l\n  4951  001532  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4952  001534  22DA               \taddwfc\tfsr2h\n  4953  001536  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  4954  00153A  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  4955  00153E  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  4956  001542  EE20 F00F          \tlfsr\t2,0Fh\n  4957  001546  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4958  001548  26D9               \taddwf\tfsr2l\n  4959  00154A  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4960  00154C  22DA               \taddwfc\tfsr2h\n  4961  00154E  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  4962  001552  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  4963  001556  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  4964  00155A  EC29  F00F         \tcall\t___ftge\t;wreg free\n  4965  00155E  B0D8               \tbtfsc\tstatus,0\n  4966  001560  D001               \tgoto\tu1351\n  4967  001562  D001               \tgoto\tu1350\n  4968  001564                     u1351:\n  4969  001564  D015               \tgoto\tl2560\n  4970  001566                     u1350:\n  4971                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4972                           \n  4973  001566                     l2558:\n  4974                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4975  001566  EE20 F00F          \tlfsr\t2,0Fh\n  4976  00156A  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4977  00156C  26D9               \taddwf\tfsr2l\n  4978  00156E  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4979  001570  22DA               \taddwfc\tfsr2h\n  4980  001572  EE10 F015          \tlfsr\t1,015h\n  4981  001576  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  4982  001578  26E1               \taddwf\tfsr1l\n  4983  00157A  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  4984  00157C  22E2               \taddwfc\tfsr1h\n  4985  00157E  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4986  001582  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  4987  001586  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  4988  00158A  52E5               \tmovf\tpostdec1\n  4989  00158C  D001               \tgoto\tl2560\n  4990                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4991  00158E                     l123:\n  4992  00158E  D000               \tgoto\tl2560\n  4993                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4994                           \n  4995  001590                     l122:\n  4996                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4997  001590                     l2560:\n  4998                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  4999  001590  EE20 F023          \tlfsr\t2,023h\n  5000  001594  500A               \tmovf\t((c:pid_auto@pid)),c,w\n  5001  001596  26D9               \taddwf\tfsr2l\n  5002  001598  500B               \tmovf\t((c:pid_auto@pid+1)),c,w\n  5003  00159A  22DA               \taddwfc\tfsr2h\n  5004  00159C  0E01               \tmovlw\tlow(01h)\n  5005  00159E  6EDF               \tmovwf\tindf2\n  5006  0015A0  D000               \tgoto\tl124\n  5007                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5008                           \n  5009  0015A2                     l120:\n  5010                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5011                           \n  5012  0015A2                     l124:\n  5013  0015A2  0012               \treturn\n  5014                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5015                           \n  5016  0015A4                     \t__end_of_pid_auto:\n  5017                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5018                           \n  5019                           opt pagewidth 120\n  5020                           \n  5021                           \topt lm\n  5022                           \n  5023                           \tprocessor\t18F2550\n  5024                           porta\tequ\t0F80h\n  5025                           portb\tequ\t0F81h\n  5026                           portc\tequ\t0F82h\n  5027                           portd\tequ\t0F83h\n  5028                           porte\tequ\t0F84h\n  5029                           lata\tequ\t0F89h\n  5030                           latb\tequ\t0F8Ah\n  5031                           latc\tequ\t0F8Bh\n  5032                           latd\tequ\t0F8Ch\n  5033                           late\tequ\t0F8Dh\n  5034                           trisa\tequ\t0F92h\n  5035                           trisb\tequ\t0F93h\n  5036                           trisc\tequ\t0F94h\n  5037                           trisd\tequ\t0F95h\n  5038                           trise\tequ\t0F96h\n  5039                           pie1\tequ\t0F9Dh\n  5040                           pir1\tequ\t0F9Eh\n  5041                           ipr1\tequ\t0F9Fh\n  5042                           pie2\tequ\t0FA0h\n  5043                           pir2\tequ\t0FA1h\n  5044                           ipr2\tequ\t0FA2h\n  5045                           t3con\tequ\t0FB1h\n  5046                           tmr3l\tequ\t0FB2h\n  5047                           tmr3h\tequ\t0FB3h\n  5048                           ccp1con\tequ\t0FBDh\n  5049                           ccpr1l\tequ\t0FBEh\n  5050                           ccpr1h\tequ\t0FBFh\n  5051                           adcon1\tequ\t0FC1h\n  5052                           adcon0\tequ\t0FC2h\n  5053                           adresl\tequ\t0FC3h\n  5054  002134                     __ptext7:\n  5055                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5056                           \n  5057                           opt pagewidth 120\n  5058                           \n  5059  0000                     \t__size_of_tc_read_float\tequ\t__end_of_tc_read_float-_tc_read_float\n  5060                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5061  002134                     _tc_read_float:\n  5062                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5063                           \n  5064                           opt pagewidth 120\n  5065  002134                     l2922:\n  5066                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5067  002134  C02C  F027         \tmovff\t(c:tc_read_float@tcpl),(c:?_tc_read)\n  5068  002138  C02D  F028         \tmovff\t(c:tc_read_float@tcpl+1),(c:?_tc_read+1)\n  5069  00213C  EC7B  F00F         \tcall\t_tc_read\t;wreg free\n  5070  002140  C027  F011         \tmovff\t0+?_tc_read,(c:?___awtoft)\n  5071  002144  C028  F012         \tmovff\t1+?_tc_read,(c:?___awtoft+1)\n  5072  002148  EC2E  F010         \tcall\t___awtoft\t;wreg free\n  5073  00214C  C011  F016         \tmovff\t0+?___awtoft,(c:?___ftmul)\n  5074  002150  C012  F017         \tmovff\t1+?___awtoft,(c:?___ftmul+1)\n  5075  002154  C013  F018         \tmovff\t2+?___awtoft,(c:?___ftmul+2)\n  5076  002158  0E00               \tmovlw\tlow(float24(0.25000000000000000))\n  5077  00215A  6E19               \tmovwf\t(0+((c:?___ftmul)+03h)),c\n  5078  00215C  0E80               \tmovlw\thigh(float24(0.25000000000000000))\n  5079  00215E  6E1A               \tmovwf\t(1+((c:?___ftmul)+03h)),c\n  5080  002160  0E3E               \tmovlw\tlow highword(float24(0.25000000000000000))\n  5081  002162  6E1B               \tmovwf\t(2+((c:?___ftmul)+03h)),c\n  5082                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5083  002164  EC75  F00B         \tcall\t___ftmul\t;wreg free\n  5084  002168  C016  F02C         \tmovff\t0+?___ftmul,(c:?_tc_read_float)\n  5085  00216C  C017  F02D         \tmovff\t1+?___ftmul,(c:?_tc_read_float+1)\n  5086  002170  C018  F02E         \tmovff\t2+?___ftmul,(c:?_tc_read_float+2)\n  5087  002174  D000               \tgoto\tl148\n  5088                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5089  002176                     l2924:\n  5090                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5091                           \n  5092  002176                     l148:\n  5093  002176  0012               \treturn\n  5094                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5095                           \n  5096  002178                     \t__end_of_tc_read_float:\n  5097                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5098                           \n  5099                           opt pagewidth 120\n  5100                           \n  5101                           \topt lm\n  5102                           \n  5103                           \tprocessor\t18F2550\n  5104                           porta\tequ\t0F80h\n  5105                           portb\tequ\t0F81h\n  5106                           portc\tequ\t0F82h\n  5107                           portd\tequ\t0F83h\n  5108                           porte\tequ\t0F84h\n  5109                           lata\tequ\t0F89h\n  5110                           latb\tequ\t0F8Ah\n  5111                           latc\tequ\t0F8Bh\n  5112                           latd\tequ\t0F8Ch\n  5113                           late\tequ\t0F8Dh\n  5114                           trisa\tequ\t0F92h\n  5115                           trisb\tequ\t0F93h\n  5116                           trisc\tequ\t0F94h\n  5117                           trisd\tequ\t0F95h\n  5118                           trise\tequ\t0F96h\n  5119                           pie1\tequ\t0F9Dh\n  5120                           pir1\tequ\t0F9Eh\n  5121                           ipr1\tequ\t0F9Fh\n  5122                           pie2\tequ\t0FA0h\n  5123                           pir2\tequ\t0FA1h\n  5124                           ipr2\tequ\t0FA2h\n  5125                           t3con\tequ\t0FB1h\n  5126                           tmr3l\tequ\t0FB2h\n  5127                           tmr3h\tequ\t0FB3h\n  5128                           ccp1con\tequ\t0FBDh\n  5129                           ccpr1l\tequ\t0FBEh\n  5130                           ccpr1h\tequ\t0FBFh\n  5131                           adcon1\tequ\t0FC1h\n  5132                           adcon0\tequ\t0FC2h\n  5133                           adresl\tequ\t0FC3h\n  5134                           adresh\tequ\t0FC4h\n  5135                           sspcon2\tequ\t0FC5h\n  5136                           sspcon1\tequ\t0FC6h\n  5137                           sspstat\tequ\t0FC7h\n  5138                           sspadd\tequ\t0FC8h\n  5139                           sspbuf\tequ\t0FC9h\n  5140                           t2con\tequ\t0FCAh\n  5141  00080A                     __ptext8:\n  5142                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5143                           \n  5144                           opt pagewidth 120\n  5145                           \n  5146  0000                     \t__size_of_pid_compute\tequ\t__end_of_pid_compute-_pid_compute\n  5147                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5148  00080A                     _pid_compute:\n  5149                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5150                           \n  5151                           opt pagewidth 120\n  5152  00080A                     l2824:\n  5153                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5154                           \n  5155  00080A  EE20 F023          \tlfsr\t2,023h\n  5156  00080E  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5157  000810  26D9               \taddwf\tfsr2l\n  5158  000812  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5159  000814  22DA               \taddwfc\tfsr2h\n  5160  000816  50DF               \tmovf\tindf2,w\n  5161  000818  A4D8               \tbtfss\tstatus,2\n  5162  00081A  D001               \tgoto\tu1771\n  5163  00081C  D001               \tgoto\tu1770\n  5164  00081E                     u1771:\n  5165  00081E  D002               \tgoto\tl2828\n  5166  000820                     u1770:\n  5167  000820  D205               \tgoto\tl88\n  5168                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5169                           \n  5170  000822                     l2826:\n  5171                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5172                           \n  5173  000822  D204               \tgoto\tl88\n  5174                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5175  000824                     l87:\n  5176                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5177                           \n  5178  000824                     l2828:\n  5179                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5180  000824  EC20  F011         \tcall\t_tick_get\t;wreg free\n  5181  000828  C001  F04E         \tmovff\t0+?_tick_get,(c:pid_compute@now)\n  5182  00082C  C002  F04F         \tmovff\t1+?_tick_get,(c:pid_compute@now+1)\n  5183  000830  C003  F050         \tmovff\t2+?_tick_get,(c:pid_compute@now+2)\n  5184  000834  C004  F051         \tmovff\t3+?_tick_get,(c:pid_compute@now+3)\n  5185                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5186                           \n  5187  000838                     l2830:\n  5188                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5189  000838  EE20 F01F          \tlfsr\t2,01Fh\n  5190  00083C  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5191  00083E  26D9               \taddwf\tfsr2l\n  5192  000840  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5193  000842  22DA               \taddwfc\tfsr2h\n  5194  000844  CFDE F03C          \tmovff\tpostinc2,??_pid_compute+0+0\n  5195  000848  CFDE F03D          \tmovff\tpostinc2,??_pid_compute+0+0+1\n  5196  00084C  CFDE F03E          \tmovff\tpostinc2,??_pid_compute+0+0+2\n  5197  000850  CFDE F03F          \tmovff\tpostinc2,??_pid_compute+0+0+3\n  5198  000854  EE20 F01B          \tlfsr\t2,01Bh\n  5199  000858  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5200  00085A  26D9               \taddwf\tfsr2l\n  5201  00085C  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5202  00085E  22DA               \taddwfc\tfsr2h\n  5203  000860  CFDE F040          \tmovff\tpostinc2,??_pid_compute+4+0\n  5204  000864  CFDE F041          \tmovff\tpostinc2,??_pid_compute+4+0+1\n  5205  000868  CFDE F042          \tmovff\tpostinc2,??_pid_compute+4+0+2\n  5206  00086C  CFDE F043          \tmovff\tpostinc2,??_pid_compute+4+0+3\n  5207  000870  1E40               \tcomf\t(??_pid_compute+4+0),c\n  5208  000872  1E41               \tcomf\t(??_pid_compute+4+1),c\n  5209  000874  1E42               \tcomf\t(??_pid_compute+4+2),c\n  5210  000876  1E43               \tcomf\t(??_pid_compute+4+3),c\n  5211  000878  2A40               \tincf\t(??_pid_compute+4+0),c\n  5212  00087A  0E00               \tmovlw\t0\n  5213  00087C  2241               \taddwfc\t(??_pid_compute+4+1),c\n  5214  00087E  2242               \taddwfc\t(??_pid_compute+4+2),c\n  5215  000880  2243               \taddwfc\t(??_pid_compute+4+3),c\n  5216  000882  504E               \tmovf\t((c:pid_compute@now)),c,w\n  5217  000884  2440               \taddwf\t(??_pid_compute+4+0),c,w\n  5218  000886  6E44               \tmovwf\t(??_pid_compute+8+0)&0ffh,c\n  5219  000888  504F               \tmovf\t((c:pid_compute@now+1)),c,w\n  5220  00088A  2041               \taddwfc\t(??_pid_compute+4+1),c,w\n  5221  00088C  6E45               \tmovwf\t1+(??_pid_compute+8+0)&0ffh,c\n  5222                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5223  00088E  5050               \tmovf\t((c:pid_compute@now+2)),c,w\n  5224  000890  2042               \taddwfc\t(??_pid_compute+4+2),c,w\n  5225  000892  6E46               \tmovwf\t2+(??_pid_compute+8+0)&0ffh,c\n  5226                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5227  000894  5051               \tmovf\t((c:pid_compute@now+3)),c,w\n  5228  000896  2043               \taddwfc\t(??_pid_compute+4+3),c,w\n  5229  000898  6E47               \tmovwf\t3+(??_pid_compute+8+0)&0ffh,c\n  5230  00089A  503C               \tmovf\t(??_pid_compute+0+0),c,w\n  5231  00089C  5C44               \tsubwf\t(??_pid_compute+8+0),c,w\n  5232  00089E  503D               \tmovf\t(??_pid_compute+0+1),c,w\n  5233  0008A0  5845               \tsubwfb\t(??_pid_compute+8+1),c,w\n  5234  0008A2  503E               \tmovf\t(??_pid_compute+0+2),c,w\n  5235  0008A4  5846               \tsubwfb\t(??_pid_compute+8+2),c,w\n  5236  0008A6  503F               \tmovf\t(??_pid_compute+0+3),c,w\n  5237  0008A8  5847               \tsubwfb\t(??_pid_compute+8+3),c,w\n  5238  0008AA  A0D8               \tbtfss\tstatus,0\n  5239  0008AC  D001               \tgoto\tu1781\n  5240  0008AE  D001               \tgoto\tu1780\n  5241  0008B0                     u1781:\n  5242  0008B0  D1BD               \tgoto\tl88\n  5243  0008B2                     u1780:\n  5244                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5245                           \n  5246  0008B2                     l2832:\n  5247                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5248  0008B2  C03A  FFD9         \tmovff\t(c:pid_compute@pid),fsr2l\n  5249  0008B6  C03B  FFDA         \tmovff\t(c:pid_compute@pid+1),fsr2h\n  5250  0008BA  CFDE F03C          \tmovff\tpostinc2,??_pid_compute+0+0\n  5251  0008BE  CFDD F03D          \tmovff\tpostdec2,??_pid_compute+0+0+1\n  5252  0008C2  C03C  FFD9         \tmovff\t??_pid_compute+0+0,fsr2l\n  5253  0008C6  C03D  FFDA         \tmovff\t??_pid_compute+0+1,fsr2h\n  5254  0008CA  CFDE F055          \tmovff\tpostinc2,(c:pid_compute@in)\n  5255  0008CE  CFDE F056          \tmovff\tpostinc2,(c:pid_compute@in+1)\n  5256  0008D2  CFDD F057          \tmovff\tpostdec2,(c:pid_compute@in+2)\n  5257                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5258                           \n  5259  0008D6                     l2834:\n  5260                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5261  0008D6  C055  F009         \tmovff\t(c:pid_compute@in),(c:?___ftneg)\n  5262  0008DA  C056  F00A         \tmovff\t(c:pid_compute@in+1),(c:?___ftneg+1)\n  5263  0008DE  C057  F00B         \tmovff\t(c:pid_compute@in+2),(c:?___ftneg+2)\n  5264  0008E2  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  5265  0008E6  C009  F027         \tmovff\t0+?___ftneg,(c:?___ftadd)\n  5266  0008EA  C00A  F028         \tmovff\t1+?___ftneg,(c:?___ftadd+1)\n  5267  0008EE  C00B  F029         \tmovff\t2+?___ftneg,(c:?___ftadd+2)\n  5268  0008F2  EE20 F004          \tlfsr\t2,04h\n  5269  0008F6  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5270  0008F8  26D9               \taddwf\tfsr2l\n  5271  0008FA  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5272  0008FC  22DA               \taddwfc\tfsr2h\n  5273  0008FE  CFDE F03C          \tmovff\tpostinc2,??_pid_compute+0+0\n  5274  000902  CFDD F03D          \tmovff\tpostdec2,??_pid_compute+0+0+1\n  5275  000906  C03C  FFD9         \tmovff\t??_pid_compute+0+0,fsr2l\n  5276  00090A  C03D  FFDA         \tmovff\t??_pid_compute+0+1,fsr2h\n  5277  00090E  CFDE F02A          \tmovff\tpostinc2,0+((c:?___ftadd)+03h)\n  5278  000912  CFDE F02B          \tmovff\tpostinc2,1+((c:?___ftadd)+03h)\n  5279  000916  CFDD F02C          \tmovff\tpostdec2,2+((c:?___ftadd)+03h)\n  5280  00091A  EC3A  F007         \tcall\t___ftadd\t;wreg free\n  5281  00091E  C027  F052         \tmovff\t0+?___ftadd,(c:pid_compute@error)\n  5282  000922  C028  F053         \tmovff\t1+?___ftadd,(c:pid_compute@error+1)\n  5283  000926  C029  F054         \tmovff\t2+?___ftadd,(c:pid_compute@error+2)\n  5284                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5285                           \n  5286  00092A                     l2836:\n  5287                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5288  00092A  0E15               \tmovlw\tlow(015h)\n  5289  00092C  243A               \taddwf\t((c:pid_compute@pid)),c,w\n  5290                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5291  00092E  6E35               \tmovwf\t((c:?___asftadd)),c\n  5292  000930  0E00               \tmovlw\thigh(015h)\n  5293  000932  203B               \taddwfc\t((c:pid_compute@pid+1)),c,w\n  5294  000934  6E36               \tmovwf\t1+((c:?___asftadd)),c\n  5295  000936  C052  F019         \tmovff\t(c:pid_compute@error),0+((c:?___ftmul)+03h)\n  5296  00093A  C053  F01A         \tmovff\t(c:pid_compute@error+1),1+((c:?___ftmul)+03h)\n  5297  00093E  C054  F01B         \tmovff\t(c:pid_compute@error+2),2+((c:?___ftmul)+03h)\n  5298  000942  EE20 F009          \tlfsr\t2,09h\n  5299  000946  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5300  000948  26D9               \taddwf\tfsr2l\n  5301  00094A  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5302  00094C  22DA               \taddwfc\tfsr2h\n  5303  00094E  CFDE F016          \tmovff\tpostinc2,(c:?___ftmul)\n  5304  000952  CFDE F017          \tmovff\tpostinc2,(c:?___ftmul+1)\n  5305  000956  CFDD F018          \tmovff\tpostdec2,(c:?___ftmul+2)\n  5306  00095A  EC75  F00B         \tcall\t___ftmul\t;wreg free\n  5307  00095E  C016  F037         \tmovff\t0+?___ftmul,0+((c:?___asftadd)+02h)\n  5308  000962  C017  F038         \tmovff\t1+?___ftmul,1+((c:?___asftadd)+02h)\n  5309  000966  C018  F039         \tmovff\t2+?___ftmul,2+((c:?___asftadd)+02h)\n  5310  00096A  ECBC  F010         \tcall\t___asftadd\t;wreg free\n  5311                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5312                           \n  5313  00096E                     l2838:\n  5314                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5315  00096E  EE20 F012          \tlfsr\t2,012h\n  5316  000972  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5317  000974  26D9               \taddwf\tfsr2l\n  5318  000976  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5319  000978  22DA               \taddwfc\tfsr2h\n  5320  00097A  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  5321  00097E  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  5322  000982  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  5323  000986  EE20 F015          \tlfsr\t2,015h\n  5324  00098A  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5325  00098C  26D9               \taddwf\tfsr2l\n  5326  00098E  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5327  000990  22DA               \taddwfc\tfsr2h\n  5328  000992  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  5329  000996  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  5330  00099A  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  5331  00099E  EC29  F00F         \tcall\t___ftge\t;wreg free\n  5332  0009A2  B0D8               \tbtfsc\tstatus,0\n  5333  0009A4  D001               \tgoto\tu1791\n  5334  0009A6  D001               \tgoto\tu1790\n  5335  0009A8                     u1791:\n  5336  0009A8  D014               \tgoto\tl2842\n  5337  0009AA                     u1790:\n  5338                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5339                           \n  5340  0009AA                     l2840:\n  5341                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5342  0009AA  EE20 F012          \tlfsr\t2,012h\n  5343  0009AE  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5344  0009B0  26D9               \taddwf\tfsr2l\n  5345  0009B2  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5346  0009B4  22DA               \taddwfc\tfsr2h\n  5347  0009B6  EE10 F015          \tlfsr\t1,015h\n  5348  0009BA  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5349  0009BC  26E1               \taddwf\tfsr1l\n  5350  0009BE  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5351  0009C0  22E2               \taddwfc\tfsr1h\n  5352  0009C2  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  5353  0009C6  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  5354  0009CA  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  5355  0009CE  52E5               \tmovf\tpostdec1\n  5356  0009D0  D033               \tgoto\tl2846\n  5357                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5358                           \n  5359  0009D2                     l90:\n  5360                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5361  0009D2                     l2842:\n  5362                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5363  0009D2  EE20 F015          \tlfsr\t2,015h\n  5364  0009D6  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5365  0009D8  26D9               \taddwf\tfsr2l\n  5366  0009DA  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5367  0009DC  22DA               \taddwfc\tfsr2h\n  5368  0009DE  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  5369  0009E2  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  5370  0009E6  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  5371  0009EA  EE20 F00F          \tlfsr\t2,0Fh\n  5372  0009EE  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5373  0009F0  26D9               \taddwf\tfsr2l\n  5374  0009F2  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5375  0009F4  22DA               \taddwfc\tfsr2h\n  5376  0009F6  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  5377  0009FA  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  5378  0009FE  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  5379  000A02  EC29  F00F         \tcall\t___ftge\t;wreg free\n  5380  000A06  B0D8               \tbtfsc\tstatus,0\n  5381  000A08  D001               \tgoto\tu1801\n  5382  000A0A  D001               \tgoto\tu1800\n  5383  000A0C                     u1801:\n  5384  000A0C  D015               \tgoto\tl2846\n  5385  000A0E                     u1800:\n  5386                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5387                           \n  5388  000A0E                     l2844:\n  5389                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5390  000A0E  EE20 F00F          \tlfsr\t2,0Fh\n  5391  000A12  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5392  000A14  26D9               \taddwf\tfsr2l\n  5393  000A16  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5394  000A18  22DA               \taddwfc\tfsr2h\n  5395  000A1A  EE10 F015          \tlfsr\t1,015h\n  5396  000A1E  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5397  000A20  26E1               \taddwf\tfsr1l\n  5398  000A22  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5399  000A24  22E2               \taddwfc\tfsr1h\n  5400  000A26  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  5401  000A2A  CFDE FFE6          \tmovff\tpostinc2,postinc1\n  5402  000A2E  CFDE FFE5          \tmovff\tpostinc2,postdec1\n  5403  000A32  52E5               \tmovf\tpostdec1\n  5404  000A34  D001               \tgoto\tl2846\n  5405                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5406  000A36                     l92:\n  5407  000A36  D000               \tgoto\tl2846\n  5408                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5409                           \n  5410  000A38                     l91:\n  5411                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5412  000A38                     l2846:\n  5413                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5414  000A38  EE20 F018          \tlfsr\t2,018h\n  5415  000A3C  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5416  000A3E  26D9               \taddwf\tfsr2l\n  5417  000A40  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5418  000A42  22DA               \taddwfc\tfsr2h\n  5419  000A44  CFDE F009          \tmovff\tpostinc2,(c:?___ftneg)\n  5420  000A48  CFDE F00A          \tmovff\tpostinc2,(c:?___ftneg+1)\n  5421  000A4C  CFDD F00B          \tmovff\tpostdec2,(c:?___ftneg+2)\n  5422  000A50  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  5423  000A54  C009  F027         \tmovff\t0+?___ftneg,(c:?___ftadd)\n  5424  000A58  C00A  F028         \tmovff\t1+?___ftneg,(c:?___ftadd+1)\n  5425  000A5C  C00B  F029         \tmovff\t2+?___ftneg,(c:?___ftadd+2)\n  5426  000A60  C055  F02A         \tmovff\t(c:pid_compute@in),0+((c:?___ftadd)+03h)\n  5427  000A64  C056  F02B         \tmovff\t(c:pid_compute@in+1),1+((c:?___ftadd)+03h)\n  5428  000A68  C057  F02C         \tmovff\t(c:pid_compute@in+2),2+((c:?___ftadd)+03h)\n  5429  000A6C  EC3A  F007         \tcall\t___ftadd\t;wreg free\n  5430  000A70  C027  F048         \tmovff\t0+?___ftadd,(c:pid_compute@dinput)\n  5431  000A74  C028  F049         \tmovff\t1+?___ftadd,(c:pid_compute@dinput+1)\n  5432  000A78  C029  F04A         \tmovff\t2+?___ftadd,(c:pid_compute@dinput+2)\n  5433                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5434                           \n  5435  000A7C                     l2848:\n  5436                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5437  000A7C  C048  F019         \tmovff\t(c:pid_compute@dinput),0+((c:?___ftmul)+03h)\n  5438  000A80  C049  F01A         \tmovff\t(c:pid_compute@dinput+1),1+((c:?___ftmul)+03h)\n  5439  000A84  C04A  F01B         \tmovff\t(c:pid_compute@dinput+2),2+((c:?___ftmul)+03h)\n  5440  000A88  EE20 F00C          \tlfsr\t2,0Ch\n  5441  000A8C  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5442  000A8E  26D9               \taddwf\tfsr2l\n  5443  000A90  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5444  000A92  22DA               \taddwfc\tfsr2h\n  5445  000A94  CFDE F016          \tmovff\tpostinc2,(c:?___ftmul)\n  5446  000A98  CFDE F017          \tmovff\tpostinc2,(c:?___ftmul+1)\n  5447  000A9C  CFDD F018          \tmovff\tpostdec2,(c:?___ftmul+2)\n  5448  000AA0  EC75  F00B         \tcall\t___ftmul\t;wreg free\n  5449  000AA4  C016  F009         \tmovff\t0+?___ftmul,(c:?___ftneg)\n  5450  000AA8  C017  F00A         \tmovff\t1+?___ftmul,(c:?___ftneg+1)\n  5451  000AAC  C018  F00B         \tmovff\t2+?___ftmul,(c:?___ftneg+2)\n  5452  000AB0  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  5453  000AB4  C009  F02A         \tmovff\t0+?___ftneg,0+((c:?___ftadd)+03h)\n  5454  000AB8  C00A  F02B         \tmovff\t1+?___ftneg,1+((c:?___ftadd)+03h)\n  5455  000ABC  C00B  F02C         \tmovff\t2+?___ftneg,2+((c:?___ftadd)+03h)\n  5456  000AC0  C052  F019         \tmovff\t(c:pid_compute@error),0+((c:?___ftmul)+03h)\n  5457  000AC4  C053  F01A         \tmovff\t(c:pid_compute@error+1),1+((c:?___ftmul)+03h)\n  5458  000AC8  C054  F01B         \tmovff\t(c:pid_compute@error+2),2+((c:?___ftmul)+03h)\n  5459  000ACC  EE20 F006          \tlfsr\t2,06h\n  5460  000AD0  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5461  000AD2  26D9               \taddwf\tfsr2l\n  5462  000AD4  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5463  000AD6  22DA               \taddwfc\tfsr2h\n  5464  000AD8  CFDE F016          \tmovff\tpostinc2,(c:?___ftmul)\n  5465  000ADC  CFDE F017          \tmovff\tpostinc2,(c:?___ftmul+1)\n  5466  000AE0  CFDD F018          \tmovff\tpostdec2,(c:?___ftmul+2)\n  5467  000AE4  EC75  F00B         \tcall\t___ftmul\t;wreg free\n  5468  000AE8  C016  F027         \tmovff\t0+?___ftmul,(c:?___ftadd)\n  5469  000AEC  C017  F028         \tmovff\t1+?___ftmul,(c:?___ftadd+1)\n  5470  000AF0  C018  F029         \tmovff\t2+?___ftmul,(c:?___ftadd+2)\n  5471  000AF4  EC3A  F007         \tcall\t___ftadd\t;wreg free\n  5472  000AF8  C027  F04B         \tmovff\t0+?___ftadd,(c:_pid_compute$1330)\n  5473  000AFC  C028  F04C         \tmovff\t1+?___ftadd,(c:_pid_compute$1330+1)\n  5474  000B00  C029  F04D         \tmovff\t2+?___ftadd,(c:_pid_compute$1330+2)\n  5475                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5476  000B04                     l2850:\n  5477                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5478  000B04  C04B  F027         \tmovff\t(c:_pid_compute$1330),(c:?___ftadd)\n  5479  000B08  C04C  F028         \tmovff\t(c:_pid_compute$1330+1),(c:?___ftadd+1)\n  5480  000B0C  C04D  F029         \tmovff\t(c:_pid_compute$1330+2),(c:?___ftadd+2)\n  5481  000B10  EE20 F015          \tlfsr\t2,015h\n  5482  000B14  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5483  000B16  26D9               \taddwf\tfsr2l\n  5484  000B18  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5485  000B1A  22DA               \taddwfc\tfsr2h\n  5486  000B1C  CFDE F02A          \tmovff\tpostinc2,0+((c:?___ftadd)+03h)\n  5487  000B20  CFDE F02B          \tmovff\tpostinc2,1+((c:?___ftadd)+03h)\n  5488  000B24  CFDD F02C          \tmovff\tpostdec2,2+((c:?___ftadd)+03h)\n  5489  000B28  EC3A  F007         \tcall\t___ftadd\t;wreg free\n  5490  000B2C  C027  F058         \tmovff\t0+?___ftadd,(c:pid_compute@out)\n  5491  000B30  C028  F059         \tmovff\t1+?___ftadd,(c:pid_compute@out+1)\n  5492  000B34  C029  F05A         \tmovff\t2+?___ftadd,(c:pid_compute@out+2)\n  5493                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5494                           \n  5495  000B38                     l2852:\n  5496                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5497  000B38  EE20 F012          \tlfsr\t2,012h\n  5498  000B3C  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5499  000B3E  26D9               \taddwf\tfsr2l\n  5500  000B40  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5501  000B42  22DA               \taddwfc\tfsr2h\n  5502  000B44  CFDE F001          \tmovff\tpostinc2,(c:?___ftge)\n  5503  000B48  CFDE F002          \tmovff\tpostinc2,(c:?___ftge+1)\n  5504  000B4C  CFDD F003          \tmovff\tpostdec2,(c:?___ftge+2)\n  5505  000B50  C058  F004         \tmovff\t(c:pid_compute@out),0+((c:?___ftge)+03h)\n  5506  000B54  C059  F005         \tmovff\t(c:pid_compute@out+1),1+((c:?___ftge)+03h)\n  5507  000B58  C05A  F006         \tmovff\t(c:pid_compute@out+2),2+((c:?___ftge)+03h)\n  5508  000B5C  EC29  F00F         \tcall\t___ftge\t;wreg free\n  5509  000B60  B0D8               \tbtfsc\tstatus,0\n  5510  000B62  D001               \tgoto\tu1811\n  5511  000B64  D001               \tgoto\tu1810\n  5512  000B66                     u1811:\n  5513  000B66  D00D               \tgoto\tl2856\n  5514  000B68                     u1810:\n  5515                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5516                           \n  5517  000B68                     l2854:\n  5518                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5519  000B68  EE20 F012          \tlfsr\t2,012h\n  5520  000B6C  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5521  000B6E  26D9               \taddwf\tfsr2l\n  5522  000B70  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5523  000B72  22DA               \taddwfc\tfsr2h\n  5524  000B74  CFDE F058          \tmovff\tpostinc2,(c:pid_compute@out)\n  5525  000B78  CFDE F059          \tmovff\tpostinc2,(c:pid_compute@out+1)\n  5526  000B7C  CFDD F05A          \tmovff\tpostdec2,(c:pid_compute@out+2)\n  5527  000B80  D025               \tgoto\tl94\n  5528                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5529                           \n  5530  000B82                     l93:\n  5531                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5532  000B82                     l2856:\n  5533                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5534  000B82  C058  F001         \tmovff\t(c:pid_compute@out),(c:?___ftge)\n  5535  000B86  C059  F002         \tmovff\t(c:pid_compute@out+1),(c:?___ftge+1)\n  5536  000B8A  C05A  F003         \tmovff\t(c:pid_compute@out+2),(c:?___ftge+2)\n  5537  000B8E  EE20 F00F          \tlfsr\t2,0Fh\n  5538  000B92  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5539  000B94  26D9               \taddwf\tfsr2l\n  5540  000B96  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5541  000B98  22DA               \taddwfc\tfsr2h\n  5542  000B9A  CFDE F004          \tmovff\tpostinc2,0+((c:?___ftge)+03h)\n  5543  000B9E  CFDE F005          \tmovff\tpostinc2,1+((c:?___ftge)+03h)\n  5544  000BA2  CFDD F006          \tmovff\tpostdec2,2+((c:?___ftge)+03h)\n  5545  000BA6  EC29  F00F         \tcall\t___ftge\t;wreg free\n  5546  000BAA  B0D8               \tbtfsc\tstatus,0\n  5547  000BAC  D001               \tgoto\tu1821\n  5548  000BAE  D001               \tgoto\tu1820\n  5549  000BB0                     u1821:\n  5550  000BB0  D00D               \tgoto\tl94\n  5551  000BB2                     u1820:\n  5552                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5553                           \n  5554  000BB2                     l2858:\n  5555                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5556  000BB2  EE20 F00F          \tlfsr\t2,0Fh\n  5557  000BB6  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5558  000BB8  26D9               \taddwf\tfsr2l\n  5559  000BBA  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5560  000BBC  22DA               \taddwfc\tfsr2h\n  5561  000BBE  CFDE F058          \tmovff\tpostinc2,(c:pid_compute@out)\n  5562  000BC2  CFDE F059          \tmovff\tpostinc2,(c:pid_compute@out+1)\n  5563  000BC6  CFDD F05A          \tmovff\tpostdec2,(c:pid_compute@out+2)\n  5564  000BCA  D000               \tgoto\tl94\n  5565                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5566  000BCC                     l95:\n  5567                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5568                           \n  5569  000BCC                     l94:\n  5570                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5571  000BCC  EE20 F002          \tlfsr\t2,02h\n  5572  000BD0  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5573  000BD2  26D9               \taddwf\tfsr2l\n  5574  000BD4  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5575  000BD6  22DA               \taddwfc\tfsr2h\n  5576  000BD8  CFDE F03C          \tmovff\tpostinc2,??_pid_compute+0+0\n  5577  000BDC  CFDD F03D          \tmovff\tpostdec2,??_pid_compute+0+0+1\n  5578  000BE0  C03C  FFD9         \tmovff\t??_pid_compute+0+0,fsr2l\n  5579  000BE4  C03D  FFDA         \tmovff\t??_pid_compute+0+1,fsr2h\n  5580  000BE8  C058  FFDE         \tmovff\t(c:pid_compute@out),postinc2\n  5581  000BEC  C059  FFDE         \tmovff\t(c:pid_compute@out+1),postinc2\n  5582  000BF0  C05A  FFDD         \tmovff\t(c:pid_compute@out+2),postdec2\n  5583                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5584                           \n  5585  000BF4  EE20 F018          \tlfsr\t2,018h\n  5586  000BF8  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5587  000BFA  26D9               \taddwf\tfsr2l\n  5588  000BFC  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5589  000BFE  22DA               \taddwfc\tfsr2h\n  5590  000C00  C055  FFDE         \tmovff\t(c:pid_compute@in),postinc2\n  5591  000C04  C056  FFDE         \tmovff\t(c:pid_compute@in+1),postinc2\n  5592  000C08  C057  FFDD         \tmovff\t(c:pid_compute@in+2),postdec2\n  5593                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5594                           \n  5595  000C0C  EE20 F01B          \tlfsr\t2,01Bh\n  5596  000C10  503A               \tmovf\t((c:pid_compute@pid)),c,w\n  5597  000C12  26D9               \taddwf\tfsr2l\n  5598  000C14  503B               \tmovf\t((c:pid_compute@pid+1)),c,w\n  5599  000C16  22DA               \taddwfc\tfsr2h\n  5600  000C18  C04E  FFDE         \tmovff\t(c:pid_compute@now),postinc2\n  5601  000C1C  C04F  FFDE         \tmovff\t(c:pid_compute@now+1),postinc2\n  5602  000C20  C050  FFDE         \tmovff\t(c:pid_compute@now+2),postinc2\n  5603  000C24  C051  FFDE         \tmovff\t(c:pid_compute@now+3),postinc2\n  5604  000C28  D001               \tgoto\tl88\n  5605                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5606                           \n  5607  000C2A                     l2860:\n  5608                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5609                           \n  5610  000C2A  D000               \tgoto\tl88\n  5611                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5612                           \n  5613  000C2C                     l89:\n  5614                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5615                           \n  5616                           opt pagewidth 120\n  5617                           \n  5618                           \topt lm\n  5619  000C2C                     l88:\n  5620  000C2C  0012               \treturn\n  5621                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5622                           \n  5623  000C2E                     \t__end_of_pid_compute:\n  5624                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5625                           \n  5626                           opt pagewidth 120\n  5627                           \n  5628                           \topt lm\n  5629                           \n  5630                           \tprocessor\t18F2550\n  5631                           porta\tequ\t0F80h\n  5632                           portb\tequ\t0F81h\n  5633                           portc\tequ\t0F82h\n  5634                           portd\tequ\t0F83h\n  5635                           porte\tequ\t0F84h\n  5636                           lata\tequ\t0F89h\n  5637                           latb\tequ\t0F8Ah\n  5638                           latc\tequ\t0F8Bh\n  5639                           latd\tequ\t0F8Ch\n  5640                           late\tequ\t0F8Dh\n  5641                           trisa\tequ\t0F92h\n  5642                           trisb\tequ\t0F93h\n  5643                           trisc\tequ\t0F94h\n  5644                           trisd\tequ\t0F95h\n  5645                           trise\tequ\t0F96h\n  5646                           pie1\tequ\t0F9Dh\n  5647                           pir1\tequ\t0F9Eh\n  5648                           ipr1\tequ\t0F9Fh\n  5649                           pie2\tequ\t0FA0h\n  5650                           pir2\tequ\t0FA1h\n  5651                           ipr2\tequ\t0FA2h\n  5652                           t3con\tequ\t0FB1h\n  5653                           tmr3l\tequ\t0FB2h\n  5654                           tmr3h\tequ\t0FB3h\n  5655                           ccp1con\tequ\t0FBDh\n  5656                           ccpr1l\tequ\t0FBEh\n  5657                           ccpr1h\tequ\t0FBFh\n  5658                           adcon1\tequ\t0FC1h\n  5659                           adcon0\tequ\t0FC2h\n  5660  002240                     __ptext9:\n  5661                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5662                           \n  5663                           opt pagewidth 120\n  5664                           \n  5665  0000                     \t__size_of_tick_get\tequ\t__end_of_tick_get-_tick_get\n  5666                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5667  002240                     _tick_get:\n  5668                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5669                           \n  5670                           opt pagewidth 120\n  5671  002240                     l2562:\n  5672                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5673  002240  ECF6  F010         \tcall\t_tick_read_internal\t;wreg free\n  5674                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5675                           \n  5676  002244                     l2564:\n  5677                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5678  002244  C060  F001         \tmovff\t0+(_tickbuffer),(c:?_tick_get)\n  5679  002248  C061  F002         \tmovff\t1+(_tickbuffer),(c:?_tick_get+1)\n  5680  00224C  C062  F003         \tmovff\t2+(_tickbuffer),(c:?_tick_get+2)\n  5681  002250  C063  F004         \tmovff\t3+(_tickbuffer),(c:?_tick_get+3)\n  5682  002254  D000               \tgoto\tl64\n  5683                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5684  002256                     l2566:\n  5685                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5686                           \n  5687  002256                     l64:\n  5688  002256  0012               \treturn\n  5689                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5690                           \n  5691  002258                     \t__end_of_tick_get:\n  5692                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5693                           \n  5694                           opt pagewidth 120\n  5695                           \n  5696                           \topt lm\n  5697                           \n  5698                           \tprocessor\t18F2550\n  5699                           porta\tequ\t0F80h\n  5700                           portb\tequ\t0F81h\n  5701                           portc\tequ\t0F82h\n  5702                           portd\tequ\t0F83h\n  5703                           porte\tequ\t0F84h\n  5704                           lata\tequ\t0F89h\n  5705                           latb\tequ\t0F8Ah\n  5706                           latc\tequ\t0F8Bh\n  5707                           latd\tequ\t0F8Ch\n  5708                           late\tequ\t0F8Dh\n  5709                           trisa\tequ\t0F92h\n  5710                           trisb\tequ\t0F93h\n  5711                           trisc\tequ\t0F94h\n  5712                           trisd\tequ\t0F95h\n  5713                           trise\tequ\t0F96h\n  5714                           pie1\tequ\t0F9Dh\n  5715                           pir1\tequ\t0F9Eh\n  5716                           ipr1\tequ\t0F9Fh\n  5717                           pie2\tequ\t0FA0h\n  5718                           pir2\tequ\t0FA1h\n  5719                           ipr2\tequ\t0FA2h\n  5720                           t3con\tequ\t0FB1h\n  5721                           tmr3l\tequ\t0FB2h\n  5722                           tmr3h\tequ\t0FB3h\n  5723                           ccp1con\tequ\t0FBDh\n  5724                           ccpr1l\tequ\t0FBEh\n  5725  0021EC                     __ptext10:\n  5726                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5727                           \n  5728                           opt pagewidth 120\n  5729                           \n  5730  0000                     \t__size_of_tick_read_internal\tequ\t__end_of_tick_read_internal-_tick_read_internal\n  5731                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5732  0021EC                     _tick_read_internal:\n  5733                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5734                           \n  5735                           opt pagewidth 120\n  5736                           \n  5737  0021EC                     l71:\n  5738                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5739                           \n  5740  0021EC  8AF2               \tbsf\t((c:4082)),c,5\t;volatile\n  5741                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5742                           \n  5743  0021EE  F000               nop ;# \n  5744                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5745                           \n  5746                           opt pagewidth 120\n  5747  0021F0  9AF2               \tbcf\t((c:4082)),c,5\t;volatile\n  5748                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5749                           \n  5750  0021F2  CFD6 F060          \tmovff\t(c:4054),(_tickbuffer)\t;volatile\n  5751                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5752                           \n  5753  0021F6  CFD7 F061          \tmovff\t(c:4055),0+(_tickbuffer+01h)\t;volatile\n  5754                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5755                           \n  5756  0021FA  C06A  F062         \tmovff\t(_tickcnt),0+(_tickbuffer+02h)\t;volatile\n  5757  0021FE  C06B  F063         \tmovff\t(_tickcnt+1),1+(_tickbuffer+02h)\t;volatile\n  5758  002202  C06C  F064         \tmovff\t(_tickcnt+2),2+(_tickbuffer+02h)\t;volatile\n  5759  002206  C06D  F065         \tmovff\t(_tickcnt+3),3+(_tickbuffer+02h)\t;volatile\n  5760                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5761                           \n  5762                           opt pagewidth 120\n  5763  00220A  B4F2               \tbtfsc\t((c:4082)),c,2\t;volatile\n  5764  00220C  D001               \tgoto\tu991\n  5765  00220E  D001               \tgoto\tu990\n  5766  002210                     u991:\n  5767  002210  D7ED               \tgoto\tl71\n  5768  002212                     u990:\n  5769                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5770  002212                     l72:\n  5771                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5772                           \n  5773  002212  8AF2               \tbsf\t((c:4082)),c,5\t;volatile\n  5774                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5775                           \n  5776  002214                     l73:\n  5777  002214  0012               \treturn\n  5778                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5779                           \n  5780  002216                     \t__end_of_tick_read_internal:\n  5781                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5782                           \n  5783                           opt pagewidth 120\n  5784                           \n  5785                           \topt lm\n  5786                           \n  5787                           \tprocessor\t18F2550\n  5788                           porta\tequ\t0F80h\n  5789                           portb\tequ\t0F81h\n  5790                           portc\tequ\t0F82h\n  5791                           portd\tequ\t0F83h\n  5792                           porte\tequ\t0F84h\n  5793                           lata\tequ\t0F89h\n  5794                           latb\tequ\t0F8Ah\n  5795                           latc\tequ\t0F8Bh\n  5796                           latd\tequ\t0F8Ch\n  5797                           late\tequ\t0F8Dh\n  5798                           trisa\tequ\t0F92h\n  5799                           trisb\tequ\t0F93h\n  5800                           trisc\tequ\t0F94h\n  5801                           trisd\tequ\t0F95h\n  5802                           trise\tequ\t0F96h\n  5803                           pie1\tequ\t0F9Dh\n  5804                           pir1\tequ\t0F9Eh\n  5805                           ipr1\tequ\t0F9Fh\n  5806                           pie2\tequ\t0FA0h\n  5807                           pir2\tequ\t0FA1h\n  5808                           ipr2\tequ\t0FA2h\n  5809                           t3con\tequ\t0FB1h\n  5810                           tmr3l\tequ\t0FB2h\n  5811                           tmr3h\tequ\t0FB3h\n  5812                           ccp1con\tequ\t0FBDh\n  5813                           ccpr1l\tequ\t0FBEh\n  5814                           ccpr1h\tequ\t0FBFh\n  5815                           adcon1\tequ\t0FC1h\n  5816                           adcon0\tequ\t0FC2h\n  5817  001B62                     __ptext11:\n  5818                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5819                           \n  5820                           opt pagewidth 120\n  5821                           \n  5822  0000                     \t__size_of_pid_direction\tequ\t__end_of_pid_direction-_pid_direction\n  5823                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5824  001B62                     _pid_direction:\n  5825                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5826                           \n  5827                           opt pagewidth 120\n  5828  001B62                     l2720:\n  5829                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5830  001B62  EE20 F023          \tlfsr\t2,023h\n  5831  001B66  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5832  001B68  26D9               \taddwf\tfsr2l\n  5833  001B6A  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5834  001B6C  22DA               \taddwfc\tfsr2h\n  5835  001B6E  50DF               \tmovf\tindf2,w\n  5836  001B70  B4D8               \tbtfsc\tstatus,2\n  5837  001B72  D001               \tgoto\tu1641\n  5838  001B74  D001               \tgoto\tu1640\n  5839  001B76                     u1641:\n  5840  001B76  D05E               \tgoto\tl2726\n  5841  001B78                     u1640:\n  5842                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5843  001B78                     l2722:\n  5844  001B78  EE20 F024          \tlfsr\t2,024h\n  5845  001B7C  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5846  001B7E  26D9               \taddwf\tfsr2l\n  5847  001B80  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5848  001B82  22DA               \taddwfc\tfsr2h\n  5849  001B84  50DF               \tmovf\tindf2,w\n  5850  001B86  180E               \txorwf\t((c:pid_direction@direction)),c,w\n  5851  001B88  B4D8               \tbtfsc\tstatus,2\n  5852  001B8A  D001               \tgoto\tu1651\n  5853  001B8C  D001               \tgoto\tu1650\n  5854  001B8E                     u1651:\n  5855  001B8E  D052               \tgoto\tl2726\n  5856  001B90                     u1650:\n  5857                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5858                           \n  5859  001B90                     l2724:\n  5860                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5861  001B90  EE20 F006          \tlfsr\t2,06h\n  5862  001B94  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5863  001B96  26D9               \taddwf\tfsr2l\n  5864  001B98  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5865  001B9A  22DA               \taddwfc\tfsr2h\n  5866  001B9C  CFDE F009          \tmovff\tpostinc2,(c:?___ftneg)\n  5867  001BA0  CFDE F00A          \tmovff\tpostinc2,(c:?___ftneg+1)\n  5868  001BA4  CFDD F00B          \tmovff\tpostdec2,(c:?___ftneg+2)\n  5869  001BA8  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  5870  001BAC  EE20 F006          \tlfsr\t2,06h\n  5871  001BB0  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5872  001BB2  26D9               \taddwf\tfsr2l\n  5873  001BB4  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5874  001BB6  22DA               \taddwfc\tfsr2h\n  5875  001BB8  C009  FFDE         \tmovff\t0+?___ftneg,postinc2\n  5876  001BBC  C00A  FFDE         \tmovff\t1+?___ftneg,postinc2\n  5877  001BC0  C00B  FFDD         \tmovff\t2+?___ftneg,postdec2\n  5878  001BC4  52DD               \tmovf\tpostdec2\n  5879                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5880                           \n  5881  001BC6  EE20 F009          \tlfsr\t2,09h\n  5882  001BCA  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5883  001BCC  26D9               \taddwf\tfsr2l\n  5884  001BCE  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5885  001BD0  22DA               \taddwfc\tfsr2h\n  5886  001BD2  CFDE F009          \tmovff\tpostinc2,(c:?___ftneg)\n  5887  001BD6  CFDE F00A          \tmovff\tpostinc2,(c:?___ftneg+1)\n  5888  001BDA  CFDD F00B          \tmovff\tpostdec2,(c:?___ftneg+2)\n  5889  001BDE  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  5890  001BE2  EE20 F009          \tlfsr\t2,09h\n  5891  001BE6  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5892  001BE8  26D9               \taddwf\tfsr2l\n  5893  001BEA  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5894  001BEC  22DA               \taddwfc\tfsr2h\n  5895  001BEE  C009  FFDE         \tmovff\t0+?___ftneg,postinc2\n  5896  001BF2  C00A  FFDE         \tmovff\t1+?___ftneg,postinc2\n  5897  001BF6  C00B  FFDD         \tmovff\t2+?___ftneg,postdec2\n  5898  001BFA  52DD               \tmovf\tpostdec2\n  5899                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5900                           \n  5901  001BFC  EE20 F00C          \tlfsr\t2,0Ch\n  5902  001C00  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5903  001C02  26D9               \taddwf\tfsr2l\n  5904  001C04  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5905  001C06  22DA               \taddwfc\tfsr2h\n  5906  001C08  CFDE F009          \tmovff\tpostinc2,(c:?___ftneg)\n  5907  001C0C  CFDE F00A          \tmovff\tpostinc2,(c:?___ftneg+1)\n  5908  001C10  CFDD F00B          \tmovff\tpostdec2,(c:?___ftneg+2)\n  5909  001C14  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  5910  001C18  EE20 F00C          \tlfsr\t2,0Ch\n  5911  001C1C  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5912  001C1E  26D9               \taddwf\tfsr2l\n  5913  001C20  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5914  001C22  22DA               \taddwfc\tfsr2h\n  5915  001C24  C009  FFDE         \tmovff\t0+?___ftneg,postinc2\n  5916  001C28  C00A  FFDE         \tmovff\t1+?___ftneg,postinc2\n  5917  001C2C  C00B  FFDD         \tmovff\t2+?___ftneg,postdec2\n  5918  001C30  52DD               \tmovf\tpostdec2\n  5919  001C32  D000               \tgoto\tl2726\n  5920                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5921                           \n  5922  001C34                     l127:\n  5923                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5924                           \n  5925  001C34                     l2726:\n  5926                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5927                           \n  5928  001C34  EE20 F024          \tlfsr\t2,024h\n  5929  001C38  500C               \tmovf\t((c:pid_direction@pid)),c,w\n  5930  001C3A  26D9               \taddwf\tfsr2l\n  5931  001C3C  500D               \tmovf\t((c:pid_direction@pid+1)),c,w\n  5932  001C3E  22DA               \taddwfc\tfsr2h\n  5933  001C40  C00E  FFDF         \tmovff\t(c:pid_direction@direction),indf2\n  5934                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5935                           \n  5936                           opt pagewidth 120\n  5937  001C44                     l128:\n  5938  001C44  0012               \treturn\n  5939                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5940                           \n  5941  001C46                     \t__end_of_pid_direction:\n  5942                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5943                           \n  5944                           opt pagewidth 120\n  5945                           \n  5946                           \topt lm\n  5947                           \n  5948                           \tprocessor\t18F2550\n  5949                           porta\tequ\t0F80h\n  5950                           portb\tequ\t0F81h\n  5951                           portc\tequ\t0F82h\n  5952                           portd\tequ\t0F83h\n  5953                           porte\tequ\t0F84h\n  5954                           lata\tequ\t0F89h\n  5955                           latb\tequ\t0F8Ah\n  5956                           latc\tequ\t0F8Bh\n  5957                           latd\tequ\t0F8Ch\n  5958                           late\tequ\t0F8Dh\n  5959                           trisa\tequ\t0F92h\n  5960                           trisb\tequ\t0F93h\n  5961                           trisc\tequ\t0F94h\n  5962                           trisd\tequ\t0F95h\n  5963                           trise\tequ\t0F96h\n  5964                           pie1\tequ\t0F9Dh\n  5965                           pir1\tequ\t0F9Eh\n  5966                           ipr1\tequ\t0F9Fh\n  5967                           pie2\tequ\t0FA0h\n  5968                           pir2\tequ\t0FA1h\n  5969                           ipr2\tequ\t0FA2h\n  5970                           t3con\tequ\t0FB1h\n  5971                           tmr3l\tequ\t0FB2h\n  5972                           tmr3h\tequ\t0FB3h\n  5973                           ccp1con\tequ\t0FBDh\n  5974                           ccpr1l\tequ\t0FBEh\n  5975                           ccpr1h\tequ\t0FBFh\n  5976                           adcon1\tequ\t0FC1h\n  5977                           adcon0\tequ\t0FC2h\n  5978                           adresl\tequ\t0FC3h\n  5979                           adresh\tequ\t0FC4h\n  5980                           sspcon2\tequ\t0FC5h\n  5981                           sspcon1\tequ\t0FC6h\n  5982                           sspstat\tequ\t0FC7h\n  5983  0010AE                     __ptext12:\n  5984                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5985                           \n  5986                           opt pagewidth 120\n  5987                           \n  5988  0000                     \t__size_of_pid_tune\tequ\t__end_of_pid_tune-_pid_tune\n  5989                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5990  0010AE                     _pid_tune:\n  5991                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5992                           \n  5993                           opt pagewidth 120\n  5994  0010AE                     l2862:\n  5995                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  5996  0010AE  502B               \tmovf\t((c:pid_tune@kp+2)),c,w\n  5997  0010B0  0A80               \txorlw\t80h\n  5998  0010B2  0F80               \taddlw\t-(low highword(float24(0.0000000000000000)))^80h\n  5999                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6000  0010B4  E105               \tbnz\tu1835\n  6001  0010B6  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  6002  0010B8  5C2A               \tsubwf\t((c:pid_tune@kp+1)),c,w\n  6003  0010BA  E102               \tbnz\tu1835\n  6004  0010BC  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  6005  0010BE  5C29               \tsubwf\t((c:pid_tune@kp)),c,w\n  6006  0010C0                     u1835:\n  6007  0010C0  A0D8               \tbtfss\tstatus,0\n  6008  0010C2  D001               \tgoto\tu1831\n  6009  0010C4  D001               \tgoto\tu1830\n  6010  0010C6                     u1831:\n  6011  0010C6  D0DF               \tgoto\tl101\n  6012  0010C8                     u1830:\n  6013                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6014  0010C8                     l2864:\n  6015  0010C8  502E               \tmovf\t((c:pid_tune@ki+2)),c,w\n  6016  0010CA  0A80               \txorlw\t80h\n  6017  0010CC  0F80               \taddlw\t-(low highword(float24(0.0000000000000000)))^80h\n  6018                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6019  0010CE  E105               \tbnz\tu1845\n  6020  0010D0  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  6021  0010D2  5C2D               \tsubwf\t((c:pid_tune@ki+1)),c,w\n  6022  0010D4  E102               \tbnz\tu1845\n  6023  0010D6  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  6024  0010D8  5C2C               \tsubwf\t((c:pid_tune@ki)),c,w\n  6025  0010DA                     u1845:\n  6026  0010DA  A0D8               \tbtfss\tstatus,0\n  6027  0010DC  D001               \tgoto\tu1841\n  6028  0010DE  D001               \tgoto\tu1840\n  6029  0010E0                     u1841:\n  6030  0010E0  D0D2               \tgoto\tl101\n  6031  0010E2                     u1840:\n  6032                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6033  0010E2                     l2866:\n  6034  0010E2  5031               \tmovf\t((c:pid_tune@kd+2)),c,w\n  6035  0010E4  0A80               \txorlw\t80h\n  6036  0010E6  0F80               \taddlw\t-(low highword(float24(0.0000000000000000)))^80h\n  6037                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6038  0010E8  E105               \tbnz\tu1855\n  6039  0010EA  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  6040  0010EC  5C30               \tsubwf\t((c:pid_tune@kd+1)),c,w\n  6041  0010EE  E102               \tbnz\tu1855\n  6042  0010F0  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  6043  0010F2  5C2F               \tsubwf\t((c:pid_tune@kd)),c,w\n  6044  0010F4                     u1855:\n  6045  0010F4  B0D8               \tbtfsc\tstatus,0\n  6046  0010F6  D001               \tgoto\tu1851\n  6047  0010F8  D001               \tgoto\tu1850\n  6048  0010FA                     u1851:\n  6049  0010FA  D002               \tgoto\tl2868\n  6050  0010FC                     u1850:\n  6051  0010FC  D0C4               \tgoto\tl101\n  6052                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6053  0010FE                     l100:\n  6054                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6055                           \n  6056  0010FE  D0C3               \tgoto\tl101\n  6057                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6058  001100                     l98:\n  6059                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6060                           \n  6061  001100                     l2868:\n  6062                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6063  001100  EE20 F01F          \tlfsr\t2,01Fh\n  6064  001104  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6065  001106  26D9               \taddwf\tfsr2l\n  6066  001108  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6067  00110A  22DA               \taddwfc\tfsr2h\n  6068  00110C  CFDE F009          \tmovff\tpostinc2,(c:?___lltoft)\n  6069  001110  CFDE F00A          \tmovff\tpostinc2,(c:?___lltoft+1)\n  6070  001114  CFDE F00B          \tmovff\tpostinc2,(c:?___lltoft+2)\n  6071  001118  CFDE F00C          \tmovff\tpostinc2,(c:?___lltoft+3)\n  6072  00111C  ECC5  F00F         \tcall\t___lltoft\t;wreg free\n  6073  001120  C009  F012         \tmovff\t0+?___lltoft,(c:?___ftdiv)\n  6074  001124  C00A  F013         \tmovff\t1+?___lltoft,(c:?___ftdiv+1)\n  6075  001128  C00B  F014         \tmovff\t2+?___lltoft,(c:?___ftdiv+2)\n  6076  00112C  0E1B               \tmovlw\tlow(float24(46875.000000000000))\n  6077  00112E  6E15               \tmovwf\t(0+((c:?___ftdiv)+03h)),c\n  6078  001130  0E37               \tmovlw\thigh(float24(46875.000000000000))\n  6079  001132  6E16               \tmovwf\t(1+((c:?___ftdiv)+03h)),c\n  6080  001134  0E47               \tmovlw\tlow highword(float24(46875.000000000000))\n  6081  001136  6E17               \tmovwf\t(2+((c:?___ftdiv)+03h)),c\n  6082                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6083  001138  ECAB  F00C         \tcall\t___ftdiv\t;wreg free\n  6084  00113C  C012  F032         \tmovff\t0+?___ftdiv,(c:pid_tune@ssec)\n  6085  001140  C013  F033         \tmovff\t1+?___ftdiv,(c:pid_tune@ssec+1)\n  6086  001144  C014  F034         \tmovff\t2+?___ftdiv,(c:pid_tune@ssec+2)\n  6087                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6088                           \n  6089  001148                     l2870:\n  6090                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6091  001148  EE20 F006          \tlfsr\t2,06h\n  6092  00114C  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6093  00114E  26D9               \taddwf\tfsr2l\n  6094  001150  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6095  001152  22DA               \taddwfc\tfsr2h\n  6096  001154  C029  FFDE         \tmovff\t(c:pid_tune@kp),postinc2\n  6097  001158  C02A  FFDE         \tmovff\t(c:pid_tune@kp+1),postinc2\n  6098  00115C  C02B  FFDD         \tmovff\t(c:pid_tune@kp+2),postdec2\n  6099                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6100                           \n  6101  001160                     l2872:\n  6102                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6103  001160  C02C  F016         \tmovff\t(c:pid_tune@ki),(c:?___ftmul)\n  6104  001164  C02D  F017         \tmovff\t(c:pid_tune@ki+1),(c:?___ftmul+1)\n  6105  001168  C02E  F018         \tmovff\t(c:pid_tune@ki+2),(c:?___ftmul+2)\n  6106  00116C  C032  F019         \tmovff\t(c:pid_tune@ssec),0+((c:?___ftmul)+03h)\n  6107  001170  C033  F01A         \tmovff\t(c:pid_tune@ssec+1),1+((c:?___ftmul)+03h)\n  6108  001174  C034  F01B         \tmovff\t(c:pid_tune@ssec+2),2+((c:?___ftmul)+03h)\n  6109  001178  EC75  F00B         \tcall\t___ftmul\t;wreg free\n  6110  00117C  EE20 F009          \tlfsr\t2,09h\n  6111  001180  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6112  001182  26D9               \taddwf\tfsr2l\n  6113  001184  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6114  001186  22DA               \taddwfc\tfsr2h\n  6115  001188  C016  FFDE         \tmovff\t0+?___ftmul,postinc2\n  6116  00118C  C017  FFDE         \tmovff\t1+?___ftmul,postinc2\n  6117  001190  C018  FFDD         \tmovff\t2+?___ftmul,postdec2\n  6118  001194  52DD               \tmovf\tpostdec2\n  6119                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6120                           \n  6121  001196                     l2874:\n  6122                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6123  001196  C02F  F012         \tmovff\t(c:pid_tune@kd),(c:?___ftdiv)\n  6124  00119A  C030  F013         \tmovff\t(c:pid_tune@kd+1),(c:?___ftdiv+1)\n  6125  00119E  C031  F014         \tmovff\t(c:pid_tune@kd+2),(c:?___ftdiv+2)\n  6126  0011A2  C032  F015         \tmovff\t(c:pid_tune@ssec),0+((c:?___ftdiv)+03h)\n  6127  0011A6  C033  F016         \tmovff\t(c:pid_tune@ssec+1),1+((c:?___ftdiv)+03h)\n  6128  0011AA  C034  F017         \tmovff\t(c:pid_tune@ssec+2),2+((c:?___ftdiv)+03h)\n  6129  0011AE  ECAB  F00C         \tcall\t___ftdiv\t;wreg free\n  6130  0011B2  EE20 F00C          \tlfsr\t2,0Ch\n  6131  0011B6  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6132  0011B8  26D9               \taddwf\tfsr2l\n  6133  0011BA  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6134  0011BC  22DA               \taddwfc\tfsr2h\n  6135  0011BE  C012  FFDE         \tmovff\t0+?___ftdiv,postinc2\n  6136  0011C2  C013  FFDE         \tmovff\t1+?___ftdiv,postinc2\n  6137  0011C6  C014  FFDD         \tmovff\t2+?___ftdiv,postdec2\n  6138  0011CA  52DD               \tmovf\tpostdec2\n  6139                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6140                           \n  6141  0011CC                     l2876:\n  6142                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6143  0011CC  EE20 F024          \tlfsr\t2,024h\n  6144  0011D0  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6145  0011D2  26D9               \taddwf\tfsr2l\n  6146  0011D4  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6147  0011D6  22DA               \taddwfc\tfsr2h\n  6148  0011D8  0E01               \tmovlw\t(01h)&0ffh\n  6149  0011DA  62DF               \tcpfseq\tindf2\n  6150  0011DC  D001               \tgoto\tu1861\n  6151  0011DE  D001               \tgoto\tu1860\n  6152  0011E0                     u1861:\n  6153  0011E0  D052               \tgoto\tl101\n  6154  0011E2                     u1860:\n  6155                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6156                           \n  6157  0011E2                     l2878:\n  6158                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6159  0011E2  EE20 F006          \tlfsr\t2,06h\n  6160  0011E6  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6161  0011E8  26D9               \taddwf\tfsr2l\n  6162  0011EA  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6163  0011EC  22DA               \taddwfc\tfsr2h\n  6164  0011EE  CFDE F009          \tmovff\tpostinc2,(c:?___ftneg)\n  6165  0011F2  CFDE F00A          \tmovff\tpostinc2,(c:?___ftneg+1)\n  6166  0011F6  CFDD F00B          \tmovff\tpostdec2,(c:?___ftneg+2)\n  6167  0011FA  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  6168  0011FE  EE20 F006          \tlfsr\t2,06h\n  6169  001202  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6170  001204  26D9               \taddwf\tfsr2l\n  6171  001206  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6172  001208  22DA               \taddwfc\tfsr2h\n  6173  00120A  C009  FFDE         \tmovff\t0+?___ftneg,postinc2\n  6174  00120E  C00A  FFDE         \tmovff\t1+?___ftneg,postinc2\n  6175  001212  C00B  FFDD         \tmovff\t2+?___ftneg,postdec2\n  6176  001216  52DD               \tmovf\tpostdec2\n  6177                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6178                           \n  6179  001218  EE20 F009          \tlfsr\t2,09h\n  6180  00121C  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6181  00121E  26D9               \taddwf\tfsr2l\n  6182  001220  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6183  001222  22DA               \taddwfc\tfsr2h\n  6184  001224  CFDE F009          \tmovff\tpostinc2,(c:?___ftneg)\n  6185  001228  CFDE F00A          \tmovff\tpostinc2,(c:?___ftneg+1)\n  6186  00122C  CFDD F00B          \tmovff\tpostdec2,(c:?___ftneg+2)\n  6187  001230  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  6188  001234  EE20 F009          \tlfsr\t2,09h\n  6189  001238  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6190  00123A  26D9               \taddwf\tfsr2l\n  6191  00123C  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6192  00123E  22DA               \taddwfc\tfsr2h\n  6193  001240  C009  FFDE         \tmovff\t0+?___ftneg,postinc2\n  6194  001244  C00A  FFDE         \tmovff\t1+?___ftneg,postinc2\n  6195  001248  C00B  FFDD         \tmovff\t2+?___ftneg,postdec2\n  6196  00124C  52DD               \tmovf\tpostdec2\n  6197                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6198                           \n  6199  00124E  EE20 F00C          \tlfsr\t2,0Ch\n  6200  001252  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6201  001254  26D9               \taddwf\tfsr2l\n  6202  001256  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6203  001258  22DA               \taddwfc\tfsr2h\n  6204  00125A  CFDE F009          \tmovff\tpostinc2,(c:?___ftneg)\n  6205  00125E  CFDE F00A          \tmovff\tpostinc2,(c:?___ftneg+1)\n  6206  001262  CFDD F00B          \tmovff\tpostdec2,(c:?___ftneg+2)\n  6207  001266  EC0B  F011         \tcall\t___ftneg\t;wreg free\n  6208  00126A  EE20 F00C          \tlfsr\t2,0Ch\n  6209  00126E  5027               \tmovf\t((c:pid_tune@pid)),c,w\n  6210  001270  26D9               \taddwf\tfsr2l\n  6211  001272  5028               \tmovf\t((c:pid_tune@pid+1)),c,w\n  6212  001274  22DA               \taddwfc\tfsr2h\n  6213  001276  C009  FFDE         \tmovff\t0+?___ftneg,postinc2\n  6214  00127A  C00A  FFDE         \tmovff\t1+?___ftneg,postinc2\n  6215  00127E  C00B  FFDD         \tmovff\t2+?___ftneg,postdec2\n  6216  001282  52DD               \tmovf\tpostdec2\n  6217  001284  D000               \tgoto\tl101\n  6218                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6219                           \n  6220  001286                     l102:\n  6221                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6222                           \n  6223  001286                     l101:\n  6224  001286  0012               \treturn\n  6225                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6226                           \n  6227  001288                     \t__end_of_pid_tune:\n  6228                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6229                           \n  6230                           opt pagewidth 120\n  6231                           \n  6232                           \topt lm\n  6233                           \n  6234                           \tprocessor\t18F2550\n  6235                           porta\tequ\t0F80h\n  6236                           portb\tequ\t0F81h\n  6237                           portc\tequ\t0F82h\n  6238                           portd\tequ\t0F83h\n  6239                           porte\tequ\t0F84h\n  6240                           lata\tequ\t0F89h\n  6241                           latb\tequ\t0F8Ah\n  6242                           latc\tequ\t0F8Bh\n  6243                           latd\tequ\t0F8Ch\n  6244                           late\tequ\t0F8Dh\n  6245                           trisa\tequ\t0F92h\n  6246                           trisb\tequ\t0F93h\n  6247                           trisc\tequ\t0F94h\n  6248                           trisd\tequ\t0F95h\n  6249                           trise\tequ\t0F96h\n  6250                           pie1\tequ\t0F9Dh\n  6251                           pir1\tequ\t0F9Eh\n  6252                           ipr1\tequ\t0F9Fh\n  6253                           pie2\tequ\t0FA0h\n  6254                           pir2\tequ\t0FA1h\n  6255                           ipr2\tequ\t0FA2h\n  6256                           t3con\tequ\t0FB1h\n  6257                           tmr3l\tequ\t0FB2h\n  6258                           tmr3h\tequ\t0FB3h\n  6259                           ccp1con\tequ\t0FBDh\n  6260                           ccpr1l\tequ\t0FBEh\n  6261                           ccpr1h\tequ\t0FBFh\n  6262                           adcon1\tequ\t0FC1h\n  6263                           adcon0\tequ\t0FC2h\n  6264                           adresl\tequ\t0FC3h\n  6265  001D02                     __ptext13:\n  6266                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6267                           \n  6268                           opt pagewidth 120\n  6269                           \n  6270  0000                     \t__size_of_io_mode\tequ\t__end_of_io_mode-_io_mode\n  6271                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6272  001D02                     _io_mode:\n  6273                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6274                           \n  6275                           opt pagewidth 120\n  6276  001D02                     l2582:\n  6277                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6278  001D02  C00A  F001         \tmovff\t(c:io_mode@pin),(c:?___awdiv)\n  6279  001D06  6A02               \tclrf\t((c:?___awdiv+1)),c\n  6280  001D08  0E00               \tmovlw\thigh(08h)\n  6281  001D0A  6E04               \tmovwf\t(1+((c:?___awdiv)+02h)),c\n  6282  001D0C  0E08               \tmovlw\tlow(08h)\n  6283  001D0E  6E03               \tmovwf\t(0+((c:?___awdiv)+02h)),c\n  6284  001D10  EC23  F00E         \tcall\t___awdiv\t;wreg free\n  6285  001D14  5001               \tmovf\t(0+?___awdiv),c,w\n  6286  001D16  6E0F               \tmovwf\t((c:io_mode@port)),c\n  6287                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6288                           \n  6289  001D18                     l2584:\n  6290                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6291  001D18  500A               \tmovf\t((c:io_mode@pin)),c,w\n  6292  001D1A  0B07               \tandlw\tlow(07h)\n  6293  001D1C  6E10               \tmovwf\t((c:io_mode@num)),c\n  6294                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6295                           \n  6296  001D1E                     l2586:\n  6297                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6298  001D1E  500F               \tmovf\t((c:io_mode@port)),c,w\n  6299  001D20  0D02               \tmullw\t02h\n  6300  001D22  0100               \tmovlb\t0\t; () banked\n  6301  001D24  0EA8               \tmovlw\tlow(_trisptrs)\n  6302  001D26  24F3               \taddwf\t(prodl),c,w\n  6303  001D28  6ED9               \tmovwf\tc:fsr2l\n  6304  001D2A  0100               \tmovlb\t0\t; () banked\n  6305  001D2C  0E00               \tmovlw\thigh(_trisptrs)\n  6306  001D2E  20F4               \taddwfc\tprod+1,w\n  6307  001D30  6EDA               \tmovwf\t1+c:fsr2l\n  6308  001D32  CFDE F00C          \tmovff\tpostinc2,??_io_mode+0+0\n  6309  001D36  CFDD F00D          \tmovff\tpostdec2,??_io_mode+0+0+1\n  6310  001D3A  C00C  FFD9         \tmovff\t??_io_mode+0+0,fsr2l\n  6311  001D3E  C00D  FFDA         \tmovff\t??_io_mode+0+1,fsr2h\n  6312  001D42  50DF               \tmovf\tindf2,w\n  6313  001D44  6E0E               \tmovwf\t((c:io_mode@now)),c\n  6314                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6315                           \n  6316  001D46                     l2588:; BSR set to: 0\n  6317                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6318                           \n  6319  001D46  660B               \ttstfsz\t((c:io_mode@value)),c\n  6320  001D48  D001               \tgoto\tu1371\n  6321  001D4A  D001               \tgoto\tu1370\n  6322  001D4C                     u1371:\n  6323  001D4C  D00D               \tgoto\tl2592\n  6324  001D4E                     u1370:\n  6325                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6326                           \n  6327  001D4E                     l2590:; BSR set to: 0\n  6328                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6329                           \n  6330  001D4E  5010               \tmovf\t((c:io_mode@num)),c,w\n  6331  001D50  0D01               \tmullw\t01h\n  6332  001D52  0E00               \tmovlw\tlow((_mask))\n  6333  001D54  24F3               \taddwf\t(prodl),c,w\n  6334  001D56  6EF6               \tmovwf\ttblptrl\n  6335  001D58  0E08               \tmovlw\thigh((_mask))\n  6336  001D5A  20F4               \taddwfc\t(prodh),c,w\n  6337  001D5C  6EF7               \tmovwf\ttblptrh\n  6338  001D5E  0008               \ttblrd\t*\n  6339                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6340  001D60  50F5               \tmovf\ttablat,w\n  6341                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6342  001D62  0AFF               \txorlw\t0ffh\n  6343  001D64  160E               \tandwf\t((c:io_mode@now)),c\n  6344  001D66  D00C               \tgoto\tl2594\n  6345                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6346                           \n  6347  001D68                     l171:; BSR set to: 0\n  6348                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6349                           \n  6350                           opt pagewidth 120\n  6351  001D68                     l2592:; BSR set to: 0\n  6352                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6353                           \n  6354                           opt pagewidth 120\n  6355  001D68  5010               \tmovf\t((c:io_mode@num)),c,w\n  6356  001D6A  0D01               \tmullw\t01h\n  6357  001D6C  0E00               \tmovlw\tlow((_mask))\n  6358  001D6E  24F3               \taddwf\t(prodl),c,w\n  6359  001D70  6EF6               \tmovwf\ttblptrl\n  6360  001D72  0E08               \tmovlw\thigh((_mask))\n  6361  001D74  20F4               \taddwfc\t(prodh),c,w\n  6362  001D76  6EF7               \tmovwf\ttblptrh\n  6363  001D78  0008               \ttblrd\t*\n  6364                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6365  001D7A  50F5               \tmovf\ttablat,w\n  6366                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6367  001D7C  120E               \tiorwf\t((c:io_mode@now)),c\n  6368  001D7E  D000               \tgoto\tl2594\n  6369                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6370  001D80                     l172:; BSR set to: 0\n  6371                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6372                           \n  6373                           opt pagewidth 120\n  6374  001D80                     l2594:; BSR set to: 0\n  6375                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6376                           \n  6377  001D80  500F               \tmovf\t((c:io_mode@port)),c,w\n  6378  001D82  0D02               \tmullw\t02h\n  6379  001D84  0100               \tmovlb\t0\t; () banked\n  6380  001D86  0EA8               \tmovlw\tlow(_trisptrs)\n  6381  001D88  24F3               \taddwf\t(prodl),c,w\n  6382  001D8A  6ED9               \tmovwf\tc:fsr2l\n  6383  001D8C  0100               \tmovlb\t0\t; () banked\n  6384  001D8E  0E00               \tmovlw\thigh(_trisptrs)\n  6385  001D90  20F4               \taddwfc\tprod+1,w\n  6386  001D92  6EDA               \tmovwf\t1+c:fsr2l\n  6387  001D94  CFDE F00C          \tmovff\tpostinc2,??_io_mode+0+0\n  6388  001D98  CFDD F00D          \tmovff\tpostdec2,??_io_mode+0+0+1\n  6389  001D9C  C00C  FFD9         \tmovff\t??_io_mode+0+0,fsr2l\n  6390  001DA0  C00D  FFDA         \tmovff\t??_io_mode+0+1,fsr2h\n  6391  001DA4  C00E  FFDF         \tmovff\t(c:io_mode@now),indf2\n  6392                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6393                           \n  6394                           opt pagewidth 120\n  6395  001DA8                     l173:; BSR set to: 0\n  6396                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6397  001DA8  0012               \treturn\n  6398                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6399                           \n  6400  001DAA                     \t__end_of_io_mode:\n  6401                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6402                           \n  6403                           opt pagewidth 120\n  6404                           \n  6405                           \topt lm\n  6406                           \n  6407                           \tprocessor\t18F2550\n  6408                           porta\tequ\t0F80h\n  6409                           portb\tequ\t0F81h\n  6410                           portc\tequ\t0F82h\n  6411                           portd\tequ\t0F83h\n  6412                           porte\tequ\t0F84h\n  6413                           lata\tequ\t0F89h\n  6414                           latb\tequ\t0F8Ah\n  6415                           latc\tequ\t0F8Bh\n  6416                           latd\tequ\t0F8Ch\n  6417                           late\tequ\t0F8Dh\n  6418                           trisa\tequ\t0F92h\n  6419                           trisb\tequ\t0F93h\n  6420                           trisc\tequ\t0F94h\n  6421                           trisd\tequ\t0F95h\n  6422                           trise\tequ\t0F96h\n  6423                           pie1\tequ\t0F9Dh\n  6424                           pir1\tequ\t0F9Eh\n  6425                           ipr1\tequ\t0F9Fh\n  6426                           pie2\tequ\t0FA0h\n  6427                           pir2\tequ\t0FA1h\n  6428                           ipr2\tequ\t0FA2h\n  6429                           t3con\tequ\t0FB1h\n  6430                           tmr3l\tequ\t0FB2h\n  6431                           tmr3h\tequ\t0FB3h\n  6432                           ccp1con\tequ\t0FBDh\n  6433                           ccpr1l\tequ\t0FBEh\n  6434  002258                     __ptext14:\n  6435                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6436                           \n  6437                           opt pagewidth 120\n  6438                           \n  6439  0000                     \t__size_of_spi_open\tequ\t__end_of_spi_open-_spi_open\n  6440                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6441  002258                     _spi_open:; BSR set to: 0\n  6442                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6443                           \n  6444                           opt pagewidth 120\n  6445                           \n  6446  002258                     l2344:\n  6447                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6448  002258  6E02               \tmovwf\t(??_spi_open+0+0)&0ffh,c\n  6449  00225A  0E01               \tmovlw\tlow(01h)\n  6450  00225C  0100               \tmovlb\t0\t; () banked\n  6451  00225E  0100               \tmovlb\t0\t; () banked\n  6452  002260  6F72               \tmovwf\t((_inuse))&0ffh\n  6453  002262  5002               \tmovf\t(??_spi_open+0+0)&0ffh,c,w\n  6454                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6455                           \n  6456  002264                     l2346:; BSR set to: 0\n  6457                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6458                           \n  6459  002264  8AC6               \tbsf\t((c:4038)),c,5\t;volatile\n  6460  002266  D000               \tgoto\tl228\n  6461                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6462                           \n  6463  002268                     l2348:; BSR set to: 0\n  6464                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6465                           \n  6466                           opt pagewidth 120\n  6467                           \n  6468                           \topt lm\n  6469  002268                     l228:; BSR set to: 0\n  6470                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6471  002268  0012               \treturn\n  6472                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6473                           \n  6474  00226A                     \t__end_of_spi_open:\n  6475                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6476                           \n  6477                           opt pagewidth 120\n  6478                           \n  6479                           \topt lm\n  6480                           \n  6481                           \tprocessor\t18F2550\n  6482                           porta\tequ\t0F80h\n  6483                           portb\tequ\t0F81h\n  6484                           portc\tequ\t0F82h\n  6485                           portd\tequ\t0F83h\n  6486                           porte\tequ\t0F84h\n  6487                           lata\tequ\t0F89h\n  6488                           latb\tequ\t0F8Ah\n  6489                           latc\tequ\t0F8Bh\n  6490                           latd\tequ\t0F8Ch\n  6491                           late\tequ\t0F8Dh\n  6492                           trisa\tequ\t0F92h\n  6493                           trisb\tequ\t0F93h\n  6494                           trisc\tequ\t0F94h\n  6495                           trisd\tequ\t0F95h\n  6496                           trise\tequ\t0F96h\n  6497                           pie1\tequ\t0F9Dh\n  6498                           pir1\tequ\t0F9Eh\n  6499                           ipr1\tequ\t0F9Fh\n  6500                           pie2\tequ\t0FA0h\n  6501                           pir2\tequ\t0FA1h\n  6502                           ipr2\tequ\t0FA2h\n  6503                           t3con\tequ\t0FB1h\n  6504                           tmr3l\tequ\t0FB2h\n  6505                           tmr3h\tequ\t0FB3h\n  6506                           ccp1con\tequ\t0FBDh\n  6507                           ccpr1l\tequ\t0FBEh\n  6508                           ccpr1h\tequ\t0FBFh\n  6509                           adcon1\tequ\t0FC1h\n  6510                           adcon0\tequ\t0FC2h\n  6511  001EF6                     __ptext15:\n  6512                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6513                           \n  6514                           opt pagewidth 120\n  6515                           \n  6516  0000                     \t__size_of_tc_read\tequ\t__end_of_tc_read-_tc_read\n  6517                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6518  001EF6                     _tc_read:; BSR set to: 0\n  6519                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6520                           \n  6521                           opt pagewidth 120\n  6522                           \n  6523  001EF6                     l2880:\n  6524                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6525  001EF6  0E00               \tmovlw\thigh(0)\n  6526  001EF8  6E2B               \tmovwf\t((c:tc_read@buf+1)),c\n  6527  001EFA  0E00               \tmovlw\tlow(0)\n  6528  001EFC  6E2A               \tmovwf\t((c:tc_read@buf)),c\n  6529                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6530                           \n  6531  001EFE                     l2882:\n  6532                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6533  001EFE  EE20 F001          \tlfsr\t2,01h\n  6534  001F02  5027               \tmovf\t((c:tc_read@tcpl)),c,w\n  6535  001F04  26D9               \taddwf\tfsr2l\n  6536  001F06  5028               \tmovf\t((c:tc_read@tcpl+1)),c,w\n  6537  001F08  22DA               \taddwfc\tfsr2h\n  6538  001F0A  50DF               \tmovf\tindf2,w\n  6539  001F0C  6E0A               \tmovwf\t((c:?_io_write)),c\n  6540  001F0E  6E29               \tmovwf\t(??_tc_read+0+0)&0ffh,c\n  6541  001F10  0E00               \tmovlw\tlow(0)\n  6542  001F12  6E0B               \tmovwf\t(0+((c:?_io_write)+01h)),c\n  6543  001F14  5029               \tmovf\t(??_tc_read+0+0)&0ffh,c,w\n  6544  001F16  ECD5  F00E         \tcall\t_io_write\t;wreg free\n  6545                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6546                           \n  6547  001F1A                     l2884:\n  6548                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6549  001F1A  C027  FFD9         \tmovff\t(c:tc_read@tcpl),fsr2l\n  6550  001F1E  C028  FFDA         \tmovff\t(c:tc_read@tcpl+1),fsr2h\n  6551  001F22  50DF               \tmovf\tindf2,w\n  6552  001F24  6E02               \tmovwf\t((c:?_spi_read_array)),c\n  6553  001F26  0E00               \tmovlw\thigh((c:tc_read@buf))\n  6554  001F28  6E04               \tmovwf\t(1+((c:?_spi_read_array)+01h)),c\n  6555  001F2A  0E2A               \tmovlw\tlow((c:tc_read@buf))\n  6556  001F2C  6E03               \tmovwf\t(0+((c:?_spi_read_array)+01h)),c\n  6557  001F2E  0E00               \tmovlw\thigh(02h)\n  6558  001F30  6E06               \tmovwf\t(1+((c:?_spi_read_array)+03h)),c\n  6559  001F32  0E02               \tmovlw\tlow(02h)\n  6560  001F34  6E05               \tmovwf\t(0+((c:?_spi_read_array)+03h)),c\n  6561  001F36  EC77  F010         \tcall\t_spi_read_array\t;wreg free\n  6562                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6563                           \n  6564  001F3A                     l2886:\n  6565                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6566  001F3A  EE20 F001          \tlfsr\t2,01h\n  6567  001F3E  5027               \tmovf\t((c:tc_read@tcpl)),c,w\n  6568  001F40  26D9               \taddwf\tfsr2l\n  6569  001F42  5028               \tmovf\t((c:tc_read@tcpl+1)),c,w\n  6570  001F44  22DA               \taddwfc\tfsr2h\n  6571  001F46  50DF               \tmovf\tindf2,w\n  6572  001F48  6E0A               \tmovwf\t((c:?_io_write)),c\n  6573  001F4A  6E29               \tmovwf\t(??_tc_read+0+0)&0ffh,c\n  6574  001F4C  0E01               \tmovlw\tlow(01h)\n  6575  001F4E  6E0B               \tmovwf\t(0+((c:?_io_write)+01h)),c\n  6576  001F50  5029               \tmovf\t(??_tc_read+0+0)&0ffh,c,w\n  6577  001F52  ECD5  F00E         \tcall\t_io_write\t;wreg free\n  6578                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6579                           \n  6580  001F56                     l2888:\n  6581                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6582                           \n  6583  001F56  A42A               \tbtfss\t((c:tc_read@buf)),c,(2)&7\n  6584  001F58  D001               \tgoto\tu1871\n  6585  001F5A  D001               \tgoto\tu1870\n  6586  001F5C                     u1871:\n  6587  001F5C  D003               \tgoto\tl2892\n  6588  001F5E                     u1870:\n  6589                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6590                           \n  6591  001F5E                     l2890:\n  6592                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6593  001F5E  6827               \tsetf\t((c:?_tc_read)),c\n  6594  001F60  6828               \tsetf\t((c:?_tc_read+1)),c\n  6595  001F62  D012               \tgoto\tl145\n  6596                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6597  001F64                     l144:\n  6598                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6599                           \n  6600  001F64                     l2892:\n  6601                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6602  001F64  0EF8               \tmovlw\tlow(07FF8h)\n  6603  001F66  162A               \tandwf\t((c:tc_read@buf)),c\n  6604  001F68  0E7F               \tmovlw\thigh(07FF8h)\n  6605  001F6A  162B               \tandwf\t((c:tc_read@buf+1)),c\n  6606                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6607                           \n  6608  001F6C                     l2894:\n  6609                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6610  001F6C  90D8               \tbcf\tstatus,0\n  6611  001F6E  322B               \trrcf\t((c:tc_read@buf+1)),c\n  6612  001F70  322A               \trrcf\t((c:tc_read@buf)),c\n  6613  001F72  90D8               \tbcf\tstatus,0\n  6614  001F74  322B               \trrcf\t((c:tc_read@buf+1)),c\n  6615  001F76  322A               \trrcf\t((c:tc_read@buf)),c\n  6616  001F78  90D8               \tbcf\tstatus,0\n  6617  001F7A  322B               \trrcf\t((c:tc_read@buf+1)),c\n  6618  001F7C  322A               \trrcf\t((c:tc_read@buf)),c\n  6619                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6620                           \n  6621  001F7E                     l2896:\n  6622                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6623  001F7E  C02A  F027         \tmovff\t(c:tc_read@buf),(c:?_tc_read)\n  6624  001F82  C02B  F028         \tmovff\t(c:tc_read@buf+1),(c:?_tc_read+1)\n  6625  001F86  D000               \tgoto\tl145\n  6626                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6627  001F88                     l2898:\n  6628                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6629                           \n  6630  001F88                     l145:\n  6631  001F88  0012               \treturn\n  6632                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6633                           \n  6634  001F8A                     \t__end_of_tc_read:\n  6635                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6636                           \n  6637                           opt pagewidth 120\n  6638                           \n  6639                           \topt lm\n  6640                           \n  6641                           \tprocessor\t18F2550\n  6642                           porta\tequ\t0F80h\n  6643                           portb\tequ\t0F81h\n  6644                           portc\tequ\t0F82h\n  6645                           portd\tequ\t0F83h\n  6646                           porte\tequ\t0F84h\n  6647                           lata\tequ\t0F89h\n  6648                           latb\tequ\t0F8Ah\n  6649                           latc\tequ\t0F8Bh\n  6650                           latd\tequ\t0F8Ch\n  6651                           late\tequ\t0F8Dh\n  6652                           trisa\tequ\t0F92h\n  6653                           trisb\tequ\t0F93h\n  6654                           trisc\tequ\t0F94h\n  6655                           trisd\tequ\t0F95h\n  6656                           trise\tequ\t0F96h\n  6657                           pie1\tequ\t0F9Dh\n  6658                           pir1\tequ\t0F9Eh\n  6659                           ipr1\tequ\t0F9Fh\n  6660                           pie2\tequ\t0FA0h\n  6661                           pir2\tequ\t0FA1h\n  6662                           ipr2\tequ\t0FA2h\n  6663                           t3con\tequ\t0FB1h\n  6664                           tmr3l\tequ\t0FB2h\n  6665                           tmr3h\tequ\t0FB3h\n  6666                           ccp1con\tequ\t0FBDh\n  6667                           ccpr1l\tequ\t0FBEh\n  6668                           ccpr1h\tequ\t0FBFh\n  6669                           adcon1\tequ\t0FC1h\n  6670                           adcon0\tequ\t0FC2h\n  6671                           adresl\tequ\t0FC3h\n  6672                           adresh\tequ\t0FC4h\n  6673  001DAA                     __ptext16:\n  6674                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6675                           \n  6676                           opt pagewidth 120\n  6677                           \n  6678  0000                     \t__size_of_io_write\tequ\t__end_of_io_write-_io_write\n  6679                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6680  001DAA                     _io_write:\n  6681                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6682                           \n  6683                           opt pagewidth 120\n  6684  001DAA                     l2568:\n  6685                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6686  001DAA  C00A  F001         \tmovff\t(c:io_write@pin),(c:?___awdiv)\n  6687  001DAE  6A02               \tclrf\t((c:?___awdiv+1)),c\n  6688  001DB0  0E00               \tmovlw\thigh(08h)\n  6689  001DB2  6E04               \tmovwf\t(1+((c:?___awdiv)+02h)),c\n  6690  001DB4  0E08               \tmovlw\tlow(08h)\n  6691  001DB6  6E03               \tmovwf\t(0+((c:?___awdiv)+02h)),c\n  6692  001DB8  EC23  F00E         \tcall\t___awdiv\t;wreg free\n  6693  001DBC  5001               \tmovf\t(0+?___awdiv),c,w\n  6694  001DBE  6E0F               \tmovwf\t((c:io_write@port)),c\n  6695                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6696                           \n  6697  001DC0                     l2570:\n  6698                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6699  001DC0  500A               \tmovf\t((c:io_write@pin)),c,w\n  6700  001DC2  0B07               \tandlw\tlow(07h)\n  6701  001DC4  6E10               \tmovwf\t((c:io_write@num)),c\n  6702                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6703                           \n  6704  001DC6                     l2572:\n  6705                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6706  001DC6  500F               \tmovf\t((c:io_write@port)),c,w\n  6707  001DC8  0D02               \tmullw\t02h\n  6708  001DCA  0100               \tmovlb\t0\t; () banked\n  6709  001DCC  0EA0               \tmovlw\tlow(_portptrs)\n  6710  001DCE  24F3               \taddwf\t(prodl),c,w\n  6711  001DD0  6ED9               \tmovwf\tc:fsr2l\n  6712  001DD2  0100               \tmovlb\t0\t; () banked\n  6713  001DD4  0E00               \tmovlw\thigh(_portptrs)\n  6714  001DD6  20F4               \taddwfc\tprod+1,w\n  6715  001DD8  6EDA               \tmovwf\t1+c:fsr2l\n  6716  001DDA  CFDE F00C          \tmovff\tpostinc2,??_io_write+0+0\n  6717  001DDE  CFDD F00D          \tmovff\tpostdec2,??_io_write+0+0+1\n  6718  001DE2  C00C  FFD9         \tmovff\t??_io_write+0+0,fsr2l\n  6719  001DE6  C00D  FFDA         \tmovff\t??_io_write+0+1,fsr2h\n  6720  001DEA  50DF               \tmovf\tindf2,w\n  6721  001DEC  6E0E               \tmovwf\t((c:io_write@now)),c\n  6722                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6723                           \n  6724  001DEE                     l2574:; BSR set to: 0\n  6725                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6726                           \n  6727  001DEE  660B               \ttstfsz\t((c:io_write@value)),c\n  6728  001DF0  D001               \tgoto\tu1361\n  6729  001DF2  D001               \tgoto\tu1360\n  6730  001DF4                     u1361:\n  6731  001DF4  D00D               \tgoto\tl2578\n  6732  001DF6                     u1360:\n  6733                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6734                           \n  6735  001DF6                     l2576:; BSR set to: 0\n  6736                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6737                           \n  6738  001DF6  5010               \tmovf\t((c:io_write@num)),c,w\n  6739  001DF8  0D01               \tmullw\t01h\n  6740  001DFA  0E00               \tmovlw\tlow((_mask))\n  6741  001DFC  24F3               \taddwf\t(prodl),c,w\n  6742  001DFE  6EF6               \tmovwf\ttblptrl\n  6743  001E00  0E08               \tmovlw\thigh((_mask))\n  6744  001E02  20F4               \taddwfc\t(prodh),c,w\n  6745  001E04  6EF7               \tmovwf\ttblptrh\n  6746  001E06  0008               \ttblrd\t*\n  6747                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6748  001E08  50F5               \tmovf\ttablat,w\n  6749                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6750  001E0A  0AFF               \txorlw\t0ffh\n  6751  001E0C  160E               \tandwf\t((c:io_write@now)),c\n  6752  001E0E  D00C               \tgoto\tl2580\n  6753                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6754                           \n  6755  001E10                     l176:; BSR set to: 0\n  6756                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6757                           \n  6758                           opt pagewidth 120\n  6759  001E10                     l2578:; BSR set to: 0\n  6760                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6761                           \n  6762                           opt pagewidth 120\n  6763  001E10  5010               \tmovf\t((c:io_write@num)),c,w\n  6764  001E12  0D01               \tmullw\t01h\n  6765  001E14  0E00               \tmovlw\tlow((_mask))\n  6766  001E16  24F3               \taddwf\t(prodl),c,w\n  6767  001E18  6EF6               \tmovwf\ttblptrl\n  6768  001E1A  0E08               \tmovlw\thigh((_mask))\n  6769  001E1C  20F4               \taddwfc\t(prodh),c,w\n  6770  001E1E  6EF7               \tmovwf\ttblptrh\n  6771  001E20  0008               \ttblrd\t*\n  6772                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6773  001E22  50F5               \tmovf\ttablat,w\n  6774                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6775  001E24  120E               \tiorwf\t((c:io_write@now)),c\n  6776  001E26  D000               \tgoto\tl2580\n  6777                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6778  001E28                     l177:; BSR set to: 0\n  6779                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6780                           \n  6781                           opt pagewidth 120\n  6782  001E28                     l2580:; BSR set to: 0\n  6783                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6784                           \n  6785  001E28  500F               \tmovf\t((c:io_write@port)),c,w\n  6786  001E2A  0D02               \tmullw\t02h\n  6787  001E2C  0100               \tmovlb\t0\t; () banked\n  6788  001E2E  0EA0               \tmovlw\tlow(_portptrs)\n  6789  001E30  24F3               \taddwf\t(prodl),c,w\n  6790  001E32  6ED9               \tmovwf\tc:fsr2l\n  6791  001E34  0100               \tmovlb\t0\t; () banked\n  6792  001E36  0E00               \tmovlw\thigh(_portptrs)\n  6793  001E38  20F4               \taddwfc\tprod+1,w\n  6794  001E3A  6EDA               \tmovwf\t1+c:fsr2l\n  6795  001E3C  CFDE F00C          \tmovff\tpostinc2,??_io_write+0+0\n  6796  001E40  CFDD F00D          \tmovff\tpostdec2,??_io_write+0+0+1\n  6797  001E44  C00C  FFD9         \tmovff\t??_io_write+0+0,fsr2l\n  6798  001E48  C00D  FFDA         \tmovff\t??_io_write+0+1,fsr2h\n  6799  001E4C  C00E  FFDF         \tmovff\t(c:io_write@now),indf2\n  6800                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6801                           \n  6802                           opt pagewidth 120\n  6803  001E50                     l178:; BSR set to: 0\n  6804                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6805  001E50  0012               \treturn\n  6806                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6807                           \n  6808  001E52                     \t__end_of_io_write:\n  6809                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6810                           \n  6811                           opt pagewidth 120\n  6812                           \n  6813                           \topt lm\n  6814                           \n  6815                           \tprocessor\t18F2550\n  6816                           porta\tequ\t0F80h\n  6817                           portb\tequ\t0F81h\n  6818                           portc\tequ\t0F82h\n  6819                           portd\tequ\t0F83h\n  6820                           porte\tequ\t0F84h\n  6821                           lata\tequ\t0F89h\n  6822                           latb\tequ\t0F8Ah\n  6823                           latc\tequ\t0F8Bh\n  6824                           latd\tequ\t0F8Ch\n  6825                           late\tequ\t0F8Dh\n  6826                           trisa\tequ\t0F92h\n  6827                           trisb\tequ\t0F93h\n  6828                           trisc\tequ\t0F94h\n  6829                           trisd\tequ\t0F95h\n  6830                           trise\tequ\t0F96h\n  6831                           pie1\tequ\t0F9Dh\n  6832                           pir1\tequ\t0F9Eh\n  6833                           ipr1\tequ\t0F9Fh\n  6834                           pie2\tequ\t0FA0h\n  6835                           pir2\tequ\t0FA1h\n  6836                           ipr2\tequ\t0FA2h\n  6837                           t3con\tequ\t0FB1h\n  6838                           tmr3l\tequ\t0FB2h\n  6839                           tmr3h\tequ\t0FB3h\n  6840                           ccp1con\tequ\t0FBDh\n  6841                           ccpr1l\tequ\t0FBEh\n  6842                           ccpr1h\tequ\t0FBFh\n  6843                           adcon1\tequ\t0FC1h\n  6844                           adcon0\tequ\t0FC2h\n  6845                           adresl\tequ\t0FC3h\n  6846  0020EE                     __ptext17:\n  6847                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6848                           \n  6849                           opt pagewidth 120\n  6850                           \n  6851  0000                     \t__size_of_spi_read_array\tequ\t__end_of_spi_read_array-_spi_read_array\n  6852                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6853  0020EE                     _spi_read_array:; BSR set to: 0\n  6854                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6855                           \n  6856                           opt pagewidth 120\n  6857                           \n  6858  0020EE                     l2596:\n  6859                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6860  0020EE  D01A               \tgoto\tl2608\n  6861                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6862  0020F0                     l256:\n  6863                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6864                           \n  6865  0020F0                     l2598:\n  6866                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6867  0020F0  0EAA               \tmovlw\tlow(0AAh)\n  6868  0020F2  6EC9               \tmovwf\t((c:4041)),c\t;volatile\n  6869                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6870                           \n  6871  0020F4  D001               \tgoto\tl2600\n  6872                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6873  0020F6                     l258:\n  6874  0020F6  D000               \tgoto\tl2600\n  6875                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6876  0020F8                     l257:\n  6877                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6878  0020F8                     l2600:\n  6879  0020F8  C002  F001         \tmovff\t(c:spi_read_array@spid),(c:?_spi_available)\n  6880  0020FC  EC3E  F011         \tcall\t_spi_available\t;wreg free\n  6881  002100  0900               \tiorlw\t0\n  6882  002102  B4D8               \tbtfsc\tstatus,2\n  6883  002104  D001               \tgoto\tu1381\n  6884  002106  D001               \tgoto\tu1380\n  6885  002108                     u1381:\n  6886  002108  D7F7               \tgoto\tl2600\n  6887  00210A                     u1380:\n  6888  00210A  D000               \tgoto\tl2602\n  6889                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6890  00210C                     l259:\n  6891                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6892                           \n  6893  00210C                     l2602:\n  6894                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6895  00210C  C003  FFD9         \tmovff\t(c:spi_read_array@rxbuf),fsr2l\n  6896  002110  C004  FFDA         \tmovff\t(c:spi_read_array@rxbuf+1),fsr2h\n  6897  002114  CFC9 FFDF          \tmovff\t(c:4041),indf2\t;volatile\n  6898                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6899                           \n  6900  002118                     l2604:\n  6901  002118  4A03               \tinfsnz\t((c:spi_read_array@rxbuf)),c\n  6902  00211A  2A04               \tincf\t((c:spi_read_array@rxbuf+1)),c\n  6903                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6904                           \n  6905  00211C                     l2606:\n  6906                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6907  00211C  0605               \tdecf\t((c:spi_read_array@len)),c\n  6908  00211E  A0D8               \tbtfss\tstatus,0\n  6909  002120  0606               \tdecf\t((c:spi_read_array@len+1)),c\n  6910  002122  D000               \tgoto\tl2608\n  6911                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6912                           \n  6913  002124                     l255:\n  6914                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6915                           \n  6916  002124                     l2608:\n  6917  002124  5006               \tmovf\t((c:spi_read_array@len+1)),c,w\n  6918  002126  1005               \tiorwf ((c:spi_read_array@len)),c,w\n  6919                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6920  002128  A4D8               \tbtfss\tstatus,2\n  6921  00212A  D001               \tgoto\tu1391\n  6922  00212C  D001               \tgoto\tu1390\n  6923  00212E                     u1391:\n  6924  00212E  D7E0               \tgoto\tl2598\n  6925  002130                     u1390:\n  6926  002130  D000               \tgoto\tl261\n  6927                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6928  002132                     l260:\n  6929                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6930                           \n  6931  002132                     l261:\n  6932  002132  0012               \treturn\n  6933                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6934                           \n  6935  002134                     \t__end_of_spi_read_array:\n  6936                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6937                           \n  6938                           opt pagewidth 120\n  6939                           \n  6940                           \topt lm\n  6941                           \n  6942                           \tprocessor\t18F2550\n  6943                           porta\tequ\t0F80h\n  6944                           portb\tequ\t0F81h\n  6945                           portc\tequ\t0F82h\n  6946                           portd\tequ\t0F83h\n  6947                           porte\tequ\t0F84h\n  6948                           lata\tequ\t0F89h\n  6949                           latb\tequ\t0F8Ah\n  6950                           latc\tequ\t0F8Bh\n  6951                           latd\tequ\t0F8Ch\n  6952                           late\tequ\t0F8Dh\n  6953                           trisa\tequ\t0F92h\n  6954                           trisb\tequ\t0F93h\n  6955                           trisc\tequ\t0F94h\n  6956                           trisd\tequ\t0F95h\n  6957                           trise\tequ\t0F96h\n  6958                           pie1\tequ\t0F9Dh\n  6959                           pir1\tequ\t0F9Eh\n  6960                           ipr1\tequ\t0F9Fh\n  6961                           pie2\tequ\t0FA0h\n  6962                           pir2\tequ\t0FA1h\n  6963                           ipr2\tequ\t0FA2h\n  6964                           t3con\tequ\t0FB1h\n  6965                           tmr3l\tequ\t0FB2h\n  6966                           tmr3h\tequ\t0FB3h\n  6967                           ccp1con\tequ\t0FBDh\n  6968                           ccpr1l\tequ\t0FBEh\n  6969                           ccpr1h\tequ\t0FBFh\n  6970                           adcon1\tequ\t0FC1h\n  6971                           adcon0\tequ\t0FC2h\n  6972                           adresl\tequ\t0FC3h\n  6973                           adresh\tequ\t0FC4h\n  6974  00227C                     __ptext18:\n  6975                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6976                           \n  6977                           opt pagewidth 120\n  6978                           \n  6979  0000                     \t__size_of_spi_available\tequ\t__end_of_spi_available-_spi_available\n  6980                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6981  00227C                     _spi_available:\n  6982                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6983                           \n  6984                           opt pagewidth 120\n  6985  00227C                     l2372:\n  6986                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6987                           \n  6988  00227C  B0C7               \tbtfsc\t((c:4039)),c,0\t;volatile\n  6989  00227E  D001               \tgoto\tu1031\n  6990  002280  D002               \tgoto\tu1030\n  6991  002282                     u1031:\n  6992  002282  0E01               \tmovlw\t1\n  6993  002284  D001               \tgoto\tu1036\n  6994  002286                     u1030:\n  6995  002286  0E00               \tmovlw\t0\n  6996  002288                     u1036:\n  6997  002288  D000               \tgoto\tl279\n  6998                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  6999  00228A                     l2374:\n  7000                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7001                           \n  7002  00228A                     l279:\n  7003  00228A  0012               \treturn\n  7004                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7005                           \n  7006  00228C                     \t__end_of_spi_available:\n  7007                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7008                           \n  7009                           opt pagewidth 120\n  7010                           \n  7011                           \topt lm\n  7012                           \n  7013                           \tprocessor\t18F2550\n  7014                           porta\tequ\t0F80h\n  7015                           portb\tequ\t0F81h\n  7016                           portc\tequ\t0F82h\n  7017                           portd\tequ\t0F83h\n  7018                           porte\tequ\t0F84h\n  7019                           lata\tequ\t0F89h\n  7020                           latb\tequ\t0F8Ah\n  7021                           latc\tequ\t0F8Bh\n  7022                           latd\tequ\t0F8Ch\n  7023                           late\tequ\t0F8Dh\n  7024                           trisa\tequ\t0F92h\n  7025                           trisb\tequ\t0F93h\n  7026                           trisc\tequ\t0F94h\n  7027                           trisd\tequ\t0F95h\n  7028                           trise\tequ\t0F96h\n  7029                           pie1\tequ\t0F9Dh\n  7030                           pir1\tequ\t0F9Eh\n  7031                           ipr1\tequ\t0F9Fh\n  7032                           pie2\tequ\t0FA0h\n  7033                           pir2\tequ\t0FA1h\n  7034                           ipr2\tequ\t0FA2h\n  7035                           t3con\tequ\t0FB1h\n  7036                           tmr3l\tequ\t0FB2h\n  7037                           tmr3h\tequ\t0FB3h\n  7038                           ccp1con\tequ\t0FBDh\n  7039                           ccpr1l\tequ\t0FBEh\n  7040                           ccpr1h\tequ\t0FBFh\n  7041                           adcon1\tequ\t0FC1h\n  7042                           adcon0\tequ\t0FC2h\n  7043                           adresl\tequ\t0FC3h\n  7044                           adresh\tequ\t0FC4h\n  7045  001C46                     __ptext19:\n  7046                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7047                           \n  7048                           opt pagewidth 120\n  7049                           \n  7050  0000                     \t__size_of___awdiv\tequ\t__end_of___awdiv-___awdiv\n  7051                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7052  001C46                     ___awdiv:\n  7053                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7054                           \n  7055                           opt pagewidth 120\n  7056  001C46                     l2450:\n  7057  001C46  6E05               \tmovwf\t(??___awdiv+0+0)&0ffh,c\n  7058  001C48  0E00               \tmovlw\tlow(0)\n  7059  001C4A  6E07               \tmovwf\t((c:___awdiv@sign)),c\n  7060  001C4C  5005               \tmovf\t(??___awdiv+0+0)&0ffh,c,w\n  7061                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7062                           \n  7063  001C4E                     l2452:\n  7064  001C4E  AE04               \tbtfss\t((c:___awdiv@divisor+1)),c,7\n  7065  001C50  D001               \tgoto\tu1171\n  7066  001C52  D001               \tgoto\tu1170\n  7067  001C54                     u1171:\n  7068  001C54  D009               \tgoto\tl2458\n  7069  001C56                     u1170:\n  7070                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7071                           \n  7072  001C56                     l2454:\n  7073  001C56  6C03               \tnegf\t((c:___awdiv@divisor)),c\n  7074  001C58  1E04               \tcomf\t((c:___awdiv@divisor+1)),c\n  7075  001C5A  B0D8               \tbtfsc\tstatus,0\n  7076  001C5C  2A04               \tincf\t((c:___awdiv@divisor+1)),c\n  7077                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7078                           \n  7079  001C5E                     l2456:\n  7080  001C5E  6E05               \tmovwf\t(??___awdiv+0+0)&0ffh,c\n  7081  001C60  0E01               \tmovlw\tlow(01h)\n  7082  001C62  6E07               \tmovwf\t((c:___awdiv@sign)),c\n  7083  001C64  5005               \tmovf\t(??___awdiv+0+0)&0ffh,c,w\n  7084  001C66  D000               \tgoto\tl2458\n  7085                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7086                           \n  7087  001C68                     l399:\n  7088                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7089                           \n  7090  001C68                     l2458:\n  7091  001C68  AE02               \tbtfss\t((c:___awdiv@dividend+1)),c,7\n  7092  001C6A  D001               \tgoto\tu1181\n  7093  001C6C  D001               \tgoto\tu1180\n  7094  001C6E                     u1181:\n  7095  001C6E  D007               \tgoto\tl2464\n  7096  001C70                     u1180:\n  7097                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7098                           \n  7099  001C70                     l2460:\n  7100  001C70  6C01               \tnegf\t((c:___awdiv@dividend)),c\n  7101  001C72  1E02               \tcomf\t((c:___awdiv@dividend+1)),c\n  7102  001C74  B0D8               \tbtfsc\tstatus,0\n  7103  001C76  2A02               \tincf\t((c:___awdiv@dividend+1)),c\n  7104                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7105                           \n  7106  001C78                     l2462:\n  7107  001C78  0E01               \tmovlw\t(01h)&0ffh\n  7108  001C7A  1A07               \txorwf\t((c:___awdiv@sign)),c\n  7109  001C7C  D000               \tgoto\tl2464\n  7110                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7111                           \n  7112  001C7E                     l400:\n  7113                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7114                           \n  7115  001C7E                     l2464:\n  7116  001C7E  0E00               \tmovlw\thigh(0)\n  7117  001C80  6E09               \tmovwf\t((c:___awdiv@quotient+1)),c\n  7118  001C82  0E00               \tmovlw\tlow(0)\n  7119  001C84  6E08               \tmovwf\t((c:___awdiv@quotient)),c\n  7120                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7121                           \n  7122  001C86                     l2466:\n  7123  001C86  5004               \tmovf\t((c:___awdiv@divisor+1)),c,w\n  7124  001C88  1003               \tiorwf ((c:___awdiv@divisor)),c,w\n  7125                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7126  001C8A  B4D8               \tbtfsc\tstatus,2\n  7127  001C8C  D001               \tgoto\tu1191\n  7128  001C8E  D001               \tgoto\tu1190\n  7129  001C90                     u1191:\n  7130  001C90  D028               \tgoto\tl2486\n  7131  001C92                     u1190:\n  7132                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7133                           \n  7134  001C92                     l2468:\n  7135  001C92  6E05               \tmovwf\t(??___awdiv+0+0)&0ffh,c\n  7136  001C94  0E01               \tmovlw\tlow(01h)\n  7137  001C96  6E06               \tmovwf\t((c:___awdiv@counter)),c\n  7138  001C98  5005               \tmovf\t(??___awdiv+0+0)&0ffh,c,w\n  7139                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7140  001C9A  D005               \tgoto\tl2472\n  7141                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7142  001C9C                     l403:\n  7143                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7144                           \n  7145  001C9C                     l2470:\n  7146  001C9C  90D8               \tbcf\tstatus,0\n  7147  001C9E  3603               \trlcf\t((c:___awdiv@divisor)),c\n  7148  001CA0  3604               \trlcf\t((c:___awdiv@divisor+1)),c\n  7149                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7150  001CA2  2A06               \tincf\t((c:___awdiv@counter)),c\n  7151  001CA4  D000               \tgoto\tl2472\n  7152                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7153                           \n  7154  001CA6                     l402:\n  7155                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7156                           \n  7157  001CA6                     l2472:\n  7158                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7159  001CA6  AE04               \tbtfss\t((c:___awdiv@divisor+1)),c,(15)&7\n  7160  001CA8  D001               \tgoto\tu1201\n  7161  001CAA  D001               \tgoto\tu1200\n  7162  001CAC                     u1201:\n  7163  001CAC  D7F7               \tgoto\tl2470\n  7164  001CAE                     u1200:\n  7165  001CAE  D001               \tgoto\tl2474\n  7166                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7167  001CB0                     l404:\n  7168  001CB0  D000               \tgoto\tl2474\n  7169                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7170                           \n  7171  001CB2                     l405:\n  7172                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7173                           \n  7174  001CB2                     l2474:\n  7175  001CB2  90D8               \tbcf\tstatus,0\n  7176  001CB4  3608               \trlcf\t((c:___awdiv@quotient)),c\n  7177  001CB6  3609               \trlcf\t((c:___awdiv@quotient+1)),c\n  7178                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7179                           \n  7180  001CB8                     l2476:\n  7181  001CB8  5003               \tmovf\t((c:___awdiv@divisor)),c,w\n  7182  001CBA  5C01               \tsubwf\t((c:___awdiv@dividend)),c,w\n  7183  001CBC  5004               \tmovf\t((c:___awdiv@divisor+1)),c,w\n  7184  001CBE  5802               \tsubwfb\t((c:___awdiv@dividend+1)),c,w\n  7185  001CC0  A0D8               \tbtfss\tstatus,0\n  7186  001CC2  D001               \tgoto\tu1211\n  7187  001CC4  D001               \tgoto\tu1210\n  7188  001CC6                     u1211:\n  7189  001CC6  D006               \tgoto\tl2482\n  7190  001CC8                     u1210:\n  7191                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7192                           \n  7193  001CC8                     l2478:\n  7194  001CC8  5003               \tmovf\t((c:___awdiv@divisor)),c,w\n  7195  001CCA  5E01               \tsubwf\t((c:___awdiv@dividend)),c\n  7196  001CCC  5004               \tmovf\t((c:___awdiv@divisor+1)),c,w\n  7197  001CCE  5A02               \tsubwfb\t((c:___awdiv@dividend+1)),c\n  7198                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7199                           \n  7200                           opt pagewidth 120\n  7201  001CD0                     l2480:\n  7202  001CD0  8008               \tbsf\t(0+(0/8)+(c:___awdiv@quotient)),c,(0)&7\n  7203  001CD2  D000               \tgoto\tl2482\n  7204                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7205                           \n  7206  001CD4                     l406:\n  7207                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7208                           \n  7209  001CD4                     l2482:\n  7210  001CD4  90D8               \tbcf\tstatus,0\n  7211  001CD6  3204               \trrcf\t((c:___awdiv@divisor+1)),c\n  7212  001CD8  3203               \trrcf\t((c:___awdiv@divisor)),c\n  7213                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7214                           \n  7215  001CDA                     l2484:\n  7216  001CDA  2E06               \tdecfsz\t((c:___awdiv@counter)),c\n  7217                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7218  001CDC  D7EA               \tgoto\tl2474\n  7219  001CDE  D001               \tgoto\tl2486\n  7220                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7221  001CE0                     l407:\n  7222  001CE0  D000               \tgoto\tl2486\n  7223                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7224                           \n  7225  001CE2                     l401:\n  7226                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7227                           \n  7228  001CE2                     l2486:\n  7229  001CE2  5007               \tmovf\t((c:___awdiv@sign)),c,w\n  7230  001CE4  B4D8               \tbtfsc\tstatus,2\n  7231  001CE6  D001               \tgoto\tu1221\n  7232  001CE8  D001               \tgoto\tu1220\n  7233  001CEA                     u1221:\n  7234  001CEA  D005               \tgoto\tl2490\n  7235  001CEC                     u1220:\n  7236                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7237                           \n  7238  001CEC                     l2488:\n  7239  001CEC  6C08               \tnegf\t((c:___awdiv@quotient)),c\n  7240  001CEE  1E09               \tcomf\t((c:___awdiv@quotient+1)),c\n  7241  001CF0  B0D8               \tbtfsc\tstatus,0\n  7242  001CF2  2A09               \tincf\t((c:___awdiv@quotient+1)),c\n  7243  001CF4  D000               \tgoto\tl2490\n  7244                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7245  001CF6                     l408:\n  7246                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7247                           \n  7248  001CF6                     l2490:\n  7249  001CF6  C008  F001         \tmovff\t(c:___awdiv@quotient),(c:?___awdiv)\n  7250  001CFA  C009  F002         \tmovff\t(c:___awdiv@quotient+1),(c:?___awdiv+1)\n  7251  001CFE  D000               \tgoto\tl409\n  7252                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7253  001D00                     l2492:\n  7254                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7255                           \n  7256  001D00                     l409:\n  7257  001D00  0012               \treturn\n  7258                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7259                           \n  7260  001D02                     \t__end_of___awdiv:\n  7261                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7262                           \n  7263                           opt pagewidth 120\n  7264                           \n  7265                           \topt lm\n  7266                           \n  7267                           \tprocessor\t18F2550\n  7268                           porta\tequ\t0F80h\n  7269                           portb\tequ\t0F81h\n  7270                           portc\tequ\t0F82h\n  7271                           portd\tequ\t0F83h\n  7272                           porte\tequ\t0F84h\n  7273                           lata\tequ\t0F89h\n  7274                           latb\tequ\t0F8Ah\n  7275                           latc\tequ\t0F8Bh\n  7276                           latd\tequ\t0F8Ch\n  7277                           late\tequ\t0F8Dh\n  7278                           trisa\tequ\t0F92h\n  7279                           trisb\tequ\t0F93h\n  7280                           trisc\tequ\t0F94h\n  7281                           trisd\tequ\t0F95h\n  7282                           trise\tequ\t0F96h\n  7283                           pie1\tequ\t0F9Dh\n  7284                           pir1\tequ\t0F9Eh\n  7285                           ipr1\tequ\t0F9Fh\n  7286                           pie2\tequ\t0FA0h\n  7287                           pir2\tequ\t0FA1h\n  7288                           ipr2\tequ\t0FA2h\n  7289                           t3con\tequ\t0FB1h\n  7290                           tmr3l\tequ\t0FB2h\n  7291                           tmr3h\tequ\t0FB3h\n  7292                           ccp1con\tequ\t0FBDh\n  7293                           ccpr1l\tequ\t0FBEh\n  7294                           ccpr1h\tequ\t0FBFh\n  7295  00205C                     __ptext20:\n  7296                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7297                           \n  7298                           opt pagewidth 120\n  7299                           \n  7300  0000                     \t__size_of___awtoft\tequ\t__end_of___awtoft-___awtoft\n  7301                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7302  00205C                     ___awtoft:\n  7303                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7304                           \n  7305                           opt pagewidth 120\n  7306  00205C                     l2610:\n  7307  00205C  6E14               \tmovwf\t(??___awtoft+0+0)&0ffh,c\n  7308  00205E  0E00               \tmovlw\tlow(0)\n  7309  002060  6E15               \tmovwf\t((c:___awtoft@sign)),c\n  7310  002062  5014               \tmovf\t(??___awtoft+0+0)&0ffh,c,w\n  7311                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7312                           \n  7313  002064                     l2612:\n  7314  002064  AE12               \tbtfss\t((c:___awtoft@c+1)),c,7\n  7315  002066  D001               \tgoto\tu1401\n  7316  002068  D001               \tgoto\tu1400\n  7317  00206A                     u1401:\n  7318  00206A  D009               \tgoto\tl2618\n  7319  00206C                     u1400:\n  7320                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7321                           \n  7322  00206C                     l2614:\n  7323  00206C  6C11               \tnegf\t((c:___awtoft@c)),c\n  7324  00206E  1E12               \tcomf\t((c:___awtoft@c+1)),c\n  7325  002070  B0D8               \tbtfsc\tstatus,0\n  7326  002072  2A12               \tincf\t((c:___awtoft@c+1)),c\n  7327                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7328                           \n  7329  002074                     l2616:\n  7330  002074  6E14               \tmovwf\t(??___awtoft+0+0)&0ffh,c\n  7331  002076  0E01               \tmovlw\tlow(01h)\n  7332  002078  6E15               \tmovwf\t((c:___awtoft@sign)),c\n  7333  00207A  5014               \tmovf\t(??___awtoft+0+0)&0ffh,c,w\n  7334  00207C  D000               \tgoto\tl2618\n  7335                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7336                           \n  7337  00207E                     l433:\n  7338                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7339                           \n  7340  00207E                     l2618:\n  7341  00207E  C011  F001         \tmovff\t(c:___awtoft@c),(c:?___ftpack)\n  7342  002082  C012  F002         \tmovff\t(c:___awtoft@c+1),(c:?___ftpack+1)\n  7343  002086  6A03               \tclrf\t((c:?___ftpack+2)),c\n  7344  002088  6E14               \tmovwf\t(??___awtoft+0+0)&0ffh,c\n  7345  00208A  0E8E               \tmovlw\tlow(08Eh)\n  7346  00208C  6E04               \tmovwf\t(0+((c:?___ftpack)+03h)),c\n  7347  00208E  5014               \tmovf\t(??___awtoft+0+0)&0ffh,c,w\n  7348  002090  C015  F005         \tmovff\t(c:___awtoft@sign),0+((c:?___ftpack)+04h)\n  7349  002094  EC3A  F00D         \tcall\t___ftpack\t;wreg free\n  7350  002098  C001  F011         \tmovff\t0+?___ftpack,(c:?___awtoft)\n  7351  00209C  C002  F012         \tmovff\t1+?___ftpack,(c:?___awtoft+1)\n  7352  0020A0  C003  F013         \tmovff\t2+?___ftpack,(c:?___awtoft+2)\n  7353  0020A4  D000               \tgoto\tl434\n  7354                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7355  0020A6                     l2620:\n  7356                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7357                           \n  7358  0020A6                     l434:\n  7359  0020A6  0012               \treturn\n  7360                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7361                           \n  7362  0020A8                     \t__end_of___awtoft:\n  7363                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7364                           \n  7365                           opt pagewidth 120\n  7366                           \n  7367                           \topt lm\n  7368                           \n  7369                           \tprocessor\t18F2550\n  7370                           porta\tequ\t0F80h\n  7371                           portb\tequ\t0F81h\n  7372                           portc\tequ\t0F82h\n  7373                           portd\tequ\t0F83h\n  7374                           porte\tequ\t0F84h\n  7375                           lata\tequ\t0F89h\n  7376                           latb\tequ\t0F8Ah\n  7377                           latc\tequ\t0F8Bh\n  7378                           latd\tequ\t0F8Ch\n  7379                           late\tequ\t0F8Dh\n  7380                           trisa\tequ\t0F92h\n  7381                           trisb\tequ\t0F93h\n  7382                           trisc\tequ\t0F94h\n  7383                           trisd\tequ\t0F95h\n  7384                           trise\tequ\t0F96h\n  7385                           pie1\tequ\t0F9Dh\n  7386                           pir1\tequ\t0F9Eh\n  7387                           ipr1\tequ\t0F9Fh\n  7388                           pie2\tequ\t0FA0h\n  7389                           pir2\tequ\t0FA1h\n  7390                           ipr2\tequ\t0FA2h\n  7391                           t3con\tequ\t0FB1h\n  7392                           tmr3l\tequ\t0FB2h\n  7393                           tmr3h\tequ\t0FB3h\n  7394                           ccp1con\tequ\t0FBDh\n  7395                           ccpr1l\tequ\t0FBEh\n  7396                           ccpr1h\tequ\t0FBFh\n  7397                           adcon1\tequ\t0FC1h\n  7398                           adcon0\tequ\t0FC2h\n  7399                           adresl\tequ\t0FC3h\n  7400                           adresh\tequ\t0FC4h\n  7401                           sspcon2\tequ\t0FC5h\n  7402  001956                     __ptext21:\n  7403                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7404                           \n  7405                           opt pagewidth 120\n  7406                           \n  7407  0000                     \t__size_of___ftdiv\tequ\t__end_of___ftdiv-___ftdiv\n  7408                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7409  001956                     ___ftdiv:\n  7410                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7411                           \n  7412                           opt pagewidth 120\n  7413  001956                     l2728:\n  7414  001956  0E0F               \tmovlw\t(0Fh)&0ffh\n  7415  001958  6E18               \tmovwf\t(??___ftdiv+0+0)&0ffh,c\n  7416  00195A  C012  F019         \tmovff\t(c:___ftdiv@f1),??___ftdiv+1+0\n  7417  00195E  C013  F01A         \tmovff\t(c:___ftdiv@f1+1),??___ftdiv+1+0+1\n  7418  001962  C014  F01B         \tmovff\t(c:___ftdiv@f1+2),??___ftdiv+1+0+2\n  7419  001966  2818               \tincf\t((??___ftdiv+0+0)),c,w\n  7420  001968  6E1C               \tmovwf\t(??___ftdiv+4+0)&0ffh,c\n  7421  00196A  D004               \tgoto\tu1660\n  7422  00196C                     u1665:\n  7423  00196C  90D8               \tbcf\tstatus,0\n  7424  00196E  321B               \trrcf\t(??___ftdiv+1+2),c\n  7425  001970  321A               \trrcf\t(??___ftdiv+1+1),c\n  7426  001972  3219               \trrcf\t(??___ftdiv+1+0),c\n  7427  001974                     u1660:\n  7428  001974  2E1C               \tdecfsz\t(??___ftdiv+4+0)&0ffh,c\n  7429  001976  D7FA               \tgoto\tu1665\n  7430  001978  5019               \tmovf\t(??___ftdiv+1+0),c,w\n  7431  00197A  6E21               \tmovwf\t((c:___ftdiv@exp)),c\n  7432  00197C  6621               \ttstfsz\t((c:___ftdiv@exp))&0ffh\n  7433  00197E  D001               \tgoto\tu1671\n  7434  001980  D001               \tgoto\tu1670\n  7435  001982                     u1671:\n  7436  001982  D008               \tgoto\tl2734\n  7437  001984                     u1670:\n  7438                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7439                           \n  7440  001984                     l2730:\n  7441  001984  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  7442  001986  6E12               \tmovwf\t((c:?___ftdiv)),c\n  7443  001988  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  7444  00198A  6E13               \tmovwf\t((c:?___ftdiv+1)),c\n  7445  00198C  0E00               \tmovlw\tlow highword(float24(0.0000000000000000))\n  7446  00198E  6E14               \tmovwf\t((c:?___ftdiv+2)),c\n  7447                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7448  001990  D070               \tgoto\tl597\n  7449                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7450  001992                     l2732:\n  7451  001992  D06F               \tgoto\tl597\n  7452                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7453  001994                     l596:\n  7454                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7455                           \n  7456  001994                     l2734:\n  7457  001994  0E0F               \tmovlw\t(0Fh)&0ffh\n  7458  001996  6E18               \tmovwf\t(??___ftdiv+0+0)&0ffh,c\n  7459  001998  C015  F019         \tmovff\t(c:___ftdiv@f2),??___ftdiv+1+0\n  7460  00199C  C016  F01A         \tmovff\t(c:___ftdiv@f2+1),??___ftdiv+1+0+1\n  7461  0019A0  C017  F01B         \tmovff\t(c:___ftdiv@f2+2),??___ftdiv+1+0+2\n  7462  0019A4  2818               \tincf\t((??___ftdiv+0+0)),c,w\n  7463  0019A6  6E1C               \tmovwf\t(??___ftdiv+4+0)&0ffh,c\n  7464  0019A8  D004               \tgoto\tu1680\n  7465  0019AA                     u1685:\n  7466  0019AA  90D8               \tbcf\tstatus,0\n  7467  0019AC  321B               \trrcf\t(??___ftdiv+1+2),c\n  7468  0019AE  321A               \trrcf\t(??___ftdiv+1+1),c\n  7469  0019B0  3219               \trrcf\t(??___ftdiv+1+0),c\n  7470  0019B2                     u1680:\n  7471  0019B2  2E1C               \tdecfsz\t(??___ftdiv+4+0)&0ffh,c\n  7472  0019B4  D7FA               \tgoto\tu1685\n  7473  0019B6  5019               \tmovf\t(??___ftdiv+1+0),c,w\n  7474  0019B8  6E22               \tmovwf\t((c:___ftdiv@sign)),c\n  7475  0019BA  6622               \ttstfsz\t((c:___ftdiv@sign))&0ffh\n  7476  0019BC  D001               \tgoto\tu1691\n  7477  0019BE  D001               \tgoto\tu1690\n  7478  0019C0                     u1691:\n  7479  0019C0  D008               \tgoto\tl2740\n  7480  0019C2                     u1690:\n  7481                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7482                           \n  7483  0019C2                     l2736:\n  7484  0019C2  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  7485  0019C4  6E12               \tmovwf\t((c:?___ftdiv)),c\n  7486  0019C6  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  7487  0019C8  6E13               \tmovwf\t((c:?___ftdiv+1)),c\n  7488  0019CA  0E00               \tmovlw\tlow highword(float24(0.0000000000000000))\n  7489  0019CC  6E14               \tmovwf\t((c:?___ftdiv+2)),c\n  7490                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7491  0019CE  D051               \tgoto\tl597\n  7492                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7493  0019D0                     l2738:\n  7494  0019D0  D050               \tgoto\tl597\n  7495                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7496  0019D2                     l598:\n  7497                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7498                           \n  7499  0019D2                     l2740:\n  7500  0019D2  0E00               \tmovlw\tlow(0)\n  7501  0019D4  6E1E               \tmovwf\t((c:___ftdiv@f3)),c\n  7502  0019D6  0E00               \tmovlw\thigh(0)\n  7503  0019D8  6E1F               \tmovwf\t((c:___ftdiv@f3+1)),c\n  7504  0019DA  0E00               \tmovlw\tlow highword(0)\n  7505  0019DC  6E20               \tmovwf\t((c:___ftdiv@f3+2)),c\n  7506                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7507                           \n  7508                           opt pagewidth 120\n  7509  0019DE                     l2742:\n  7510  0019DE  5022               \tmovf\t((c:___ftdiv@sign)),c,w\n  7511  0019E0  0F89               \taddlw\tlow(089h)\n  7512  0019E2  5E21               \tsubwf\t((c:___ftdiv@exp)),c\n  7513                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7514                           \n  7515  0019E4                     l2744:\n  7516  0019E4  C014  F022         \tmovff\t0+2+(c:___ftdiv@f1),(c:___ftdiv@sign)\n  7517                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7518                           \n  7519  0019E8                     l2746:\n  7520  0019E8  5017               \tmovf\t(0+2+(c:___ftdiv@f2))&0ffh,w\n  7521  0019EA  1A22               \txorwf\t((c:___ftdiv@sign)),c\n  7522                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7523                           \n  7524  0019EC                     l2748:\n  7525  0019EC  0E80               \tmovlw\t(080h)&0ffh\n  7526  0019EE  1622               \tandwf\t((c:___ftdiv@sign)),c\n  7527                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7528                           \n  7529  0019F0                     l2750:\n  7530  0019F0  8E13               \tbsf\t(0+(15/8)+(c:___ftdiv@f1)),c,(15)&7\n  7531                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7532                           \n  7533  0019F2                     l2752:\n  7534  0019F2  0EFF               \tmovlw\tlow(0FFFFh)\n  7535  0019F4  1612               \tandwf\t((c:___ftdiv@f1)),c\n  7536  0019F6  0EFF               \tmovlw\thigh(0FFFFh)\n  7537  0019F8  1613               \tandwf\t((c:___ftdiv@f1+1)),c\n  7538  0019FA  0E00               \tmovlw\tlow highword(0FFFFh)\n  7539  0019FC  1614               \tandwf\t((c:___ftdiv@f1+2)),c\n  7540                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7541                           \n  7542                           opt pagewidth 120\n  7543  0019FE                     l2754:\n  7544  0019FE  8E16               \tbsf\t(0+(15/8)+(c:___ftdiv@f2)),c,(15)&7\n  7545                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7546                           \n  7547  001A00                     l2756:\n  7548  001A00  0EFF               \tmovlw\tlow(0FFFFh)\n  7549  001A02  1615               \tandwf\t((c:___ftdiv@f2)),c\n  7550  001A04  0EFF               \tmovlw\thigh(0FFFFh)\n  7551  001A06  1616               \tandwf\t((c:___ftdiv@f2+1)),c\n  7552  001A08  0E00               \tmovlw\tlow highword(0FFFFh)\n  7553  001A0A  1617               \tandwf\t((c:___ftdiv@f2+2)),c\n  7554                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7555                           \n  7556                           opt pagewidth 120\n  7557  001A0C                     l2758:\n  7558  001A0C  6E18               \tmovwf\t(??___ftdiv+0+0)&0ffh,c\n  7559  001A0E  0E18               \tmovlw\tlow(018h)\n  7560  001A10  6E1D               \tmovwf\t((c:___ftdiv@cntr)),c\n  7561  001A12  5018               \tmovf\t(??___ftdiv+0+0)&0ffh,c,w\n  7562                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7563                           \n  7564  001A14                     l599:\n  7565                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7566  001A14  90D8               \tbcf\tstatus,0\n  7567  001A16  361E               \trlcf\t((c:___ftdiv@f3)),c\n  7568  001A18  361F               \trlcf\t((c:___ftdiv@f3+1)),c\n  7569  001A1A  3620               \trlcf\t((c:___ftdiv@f3+2)),c\n  7570                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7571                           \n  7572  001A1C                     l2760:\n  7573  001A1C  5015               \tmovf\t((c:___ftdiv@f2)),c,w\n  7574  001A1E  5C12               \tsubwf\t((c:___ftdiv@f1)),c,w\n  7575  001A20  5016               \tmovf\t((c:___ftdiv@f2+1)),c,w\n  7576  001A22  5813               \tsubwfb\t((c:___ftdiv@f1+1)),c,w\n  7577  001A24  5017               \tmovf\t((c:___ftdiv@f2+2)),c,w\n  7578  001A26  5814               \tsubwfb\t((c:___ftdiv@f1+2)),c,w\n  7579  001A28  A0D8               \tbtfss\tstatus,0\n  7580  001A2A  D001               \tgoto\tu1701\n  7581  001A2C  D001               \tgoto\tu1700\n  7582  001A2E                     u1701:\n  7583  001A2E  D007               \tgoto\tl600\n  7584  001A30                     u1700:\n  7585                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7586                           \n  7587  001A30                     l2762:\n  7588  001A30  5015               \tmovf\t((c:___ftdiv@f2)),c,w\n  7589  001A32  5E12               \tsubwf\t((c:___ftdiv@f1)),c\n  7590  001A34  5016               \tmovf\t((c:___ftdiv@f2+1)),c,w\n  7591  001A36  5A13               \tsubwfb\t((c:___ftdiv@f1+1)),c\n  7592  001A38  5017               \tmovf\t((c:___ftdiv@f2+2)),c,w\n  7593  001A3A  5A14               \tsubwfb\t((c:___ftdiv@f1+2)),c\n  7594                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7595                           \n  7596                           opt pagewidth 120\n  7597  001A3C                     l2764:\n  7598  001A3C  801E               \tbsf\t(0+(0/8)+(c:___ftdiv@f3)),c,(0)&7\n  7599                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7600                           \n  7601  001A3E                     l600:\n  7602                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7603  001A3E  90D8               \tbcf\tstatus,0\n  7604  001A40  3612               \trlcf\t((c:___ftdiv@f1)),c\n  7605  001A42  3613               \trlcf\t((c:___ftdiv@f1+1)),c\n  7606  001A44  3614               \trlcf\t((c:___ftdiv@f1+2)),c\n  7607                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7608                           \n  7609  001A46                     l2766:\n  7610  001A46  2E1D               \tdecfsz\t((c:___ftdiv@cntr)),c\n  7611                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7612  001A48  D7E5               \tgoto\tl599\n  7613  001A4A  D000               \tgoto\tl2768\n  7614                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7615  001A4C                     l601:\n  7616                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7617                           \n  7618  001A4C                     l2768:\n  7619  001A4C  C01E  F001         \tmovff\t(c:___ftdiv@f3),(c:?___ftpack)\n  7620  001A50  C01F  F002         \tmovff\t(c:___ftdiv@f3+1),(c:?___ftpack+1)\n  7621  001A54  C020  F003         \tmovff\t(c:___ftdiv@f3+2),(c:?___ftpack+2)\n  7622  001A58  C021  F004         \tmovff\t(c:___ftdiv@exp),0+((c:?___ftpack)+03h)\n  7623  001A5C  C022  F005         \tmovff\t(c:___ftdiv@sign),0+((c:?___ftpack)+04h)\n  7624  001A60  EC3A  F00D         \tcall\t___ftpack\t;wreg free\n  7625  001A64  C001  F012         \tmovff\t0+?___ftpack,(c:?___ftdiv)\n  7626  001A68  C002  F013         \tmovff\t1+?___ftpack,(c:?___ftdiv+1)\n  7627  001A6C  C003  F014         \tmovff\t2+?___ftpack,(c:?___ftdiv+2)\n  7628  001A70  D000               \tgoto\tl597\n  7629                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7630  001A72                     l2770:\n  7631                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7632                           \n  7633  001A72                     l597:\n  7634  001A72  0012               \treturn\n  7635                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7636                           \n  7637  001A74                     \t__end_of___ftdiv:\n  7638                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7639                           \n  7640                           opt pagewidth 120\n  7641                           \n  7642                           \topt lm\n  7643                           \n  7644                           \tprocessor\t18F2550\n  7645                           porta\tequ\t0F80h\n  7646                           portb\tequ\t0F81h\n  7647                           portc\tequ\t0F82h\n  7648                           portd\tequ\t0F83h\n  7649                           porte\tequ\t0F84h\n  7650                           lata\tequ\t0F89h\n  7651                           latb\tequ\t0F8Ah\n  7652                           latc\tequ\t0F8Bh\n  7653                           latd\tequ\t0F8Ch\n  7654                           late\tequ\t0F8Dh\n  7655                           trisa\tequ\t0F92h\n  7656                           trisb\tequ\t0F93h\n  7657                           trisc\tequ\t0F94h\n  7658                           trisd\tequ\t0F95h\n  7659                           trise\tequ\t0F96h\n  7660                           pie1\tequ\t0F9Dh\n  7661                           pir1\tequ\t0F9Eh\n  7662                           ipr1\tequ\t0F9Fh\n  7663                           pie2\tequ\t0FA0h\n  7664                           pir2\tequ\t0FA1h\n  7665                           ipr2\tequ\t0FA2h\n  7666                           t3con\tequ\t0FB1h\n  7667                           tmr3l\tequ\t0FB2h\n  7668                           tmr3h\tequ\t0FB3h\n  7669                           ccp1con\tequ\t0FBDh\n  7670                           ccpr1l\tequ\t0FBEh\n  7671                           ccpr1h\tequ\t0FBFh\n  7672                           adcon1\tequ\t0FC1h\n  7673                           adcon0\tequ\t0FC2h\n  7674  001E52                     __ptext22:\n  7675                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7676                           \n  7677                           opt pagewidth 120\n  7678                           \n  7679  0000                     \t__size_of___ftge\tequ\t__end_of___ftge-___ftge\n  7680                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7681  001E52                     ___ftge:\n  7682                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7683                           \n  7684                           opt pagewidth 120\n  7685  001E52                     l2494:\n  7686                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7687  001E52  AE03               \tbtfss\t((c:___ftge@ff1+2)),c,(23)&7\n  7688  001E54  D001               \tgoto\tu1231\n  7689  001E56  D001               \tgoto\tu1230\n  7690  001E58                     u1231:\n  7691  001E58  D017               \tgoto\tl2498\n  7692  001E5A                     u1230:\n  7693                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7694                           \n  7695  001E5A                     l2496:\n  7696  001E5A  C001  F007         \tmovff\t(c:___ftge@ff1),??___ftge+0+0\n  7697  001E5E  C002  F008         \tmovff\t(c:___ftge@ff1+1),??___ftge+0+0+1\n  7698  001E62  C003  F009         \tmovff\t(c:___ftge@ff1+2),??___ftge+0+0+2\n  7699  001E66  1E07               \tcomf\t(??___ftge+0+0),c\n  7700  001E68  1E08               \tcomf\t(??___ftge+0+1),c\n  7701  001E6A  1E09               \tcomf\t(??___ftge+0+2),c\n  7702  001E6C  2A07               \tincf\t(??___ftge+0+0),c\n  7703  001E6E  0E00               \tmovlw\t0\n  7704  001E70  2208               \taddwfc\t(??___ftge+0+1),c\n  7705  001E72  2209               \taddwfc\t(??___ftge+0+2),c\n  7706                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7707  001E74  0E00               \tmovlw\tlow(0800000h)\n  7708  001E76  2407               \taddwf\t(??___ftge+0+0),c,w\n  7709  001E78  6E01               \tmovwf\t((c:___ftge@ff1)),c\n  7710  001E7A  0E00               \tmovlw\t0\n  7711  001E7C  2008               \taddwfc\t(??___ftge+0+1),c,w\n  7712  001E7E  6E02               \tmovwf\t1+((c:___ftge@ff1)),c\n  7713  001E80  0E80               \tmovlw\t080h\n  7714  001E82  2009               \taddwfc\t(??___ftge+0+2),c,w\n  7715  001E84  6E03               \tmovwf\t2+((c:___ftge@ff1)),c\n  7716  001E86  D000               \tgoto\tl2498\n  7717                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7718  001E88                     l604:\n  7719                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7720                           \n  7721  001E88                     l2498:\n  7722                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7723  001E88  AE06               \tbtfss\t((c:___ftge@ff2+2)),c,(23)&7\n  7724  001E8A  D001               \tgoto\tu1241\n  7725  001E8C  D001               \tgoto\tu1240\n  7726  001E8E                     u1241:\n  7727  001E8E  D017               \tgoto\tl2502\n  7728  001E90                     u1240:\n  7729                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7730                           \n  7731  001E90                     l2500:\n  7732  001E90  C004  F007         \tmovff\t(c:___ftge@ff2),??___ftge+0+0\n  7733  001E94  C005  F008         \tmovff\t(c:___ftge@ff2+1),??___ftge+0+0+1\n  7734  001E98  C006  F009         \tmovff\t(c:___ftge@ff2+2),??___ftge+0+0+2\n  7735  001E9C  1E07               \tcomf\t(??___ftge+0+0),c\n  7736  001E9E  1E08               \tcomf\t(??___ftge+0+1),c\n  7737  001EA0  1E09               \tcomf\t(??___ftge+0+2),c\n  7738  001EA2  2A07               \tincf\t(??___ftge+0+0),c\n  7739  001EA4  0E00               \tmovlw\t0\n  7740  001EA6  2208               \taddwfc\t(??___ftge+0+1),c\n  7741  001EA8  2209               \taddwfc\t(??___ftge+0+2),c\n  7742                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7743  001EAA  0E00               \tmovlw\tlow(0800000h)\n  7744  001EAC  2407               \taddwf\t(??___ftge+0+0),c,w\n  7745  001EAE  6E04               \tmovwf\t((c:___ftge@ff2)),c\n  7746  001EB0  0E00               \tmovlw\t0\n  7747  001EB2  2008               \taddwfc\t(??___ftge+0+1),c,w\n  7748  001EB4  6E05               \tmovwf\t1+((c:___ftge@ff2)),c\n  7749  001EB6  0E80               \tmovlw\t080h\n  7750  001EB8  2009               \taddwfc\t(??___ftge+0+2),c,w\n  7751  001EBA  6E06               \tmovwf\t2+((c:___ftge@ff2)),c\n  7752  001EBC  D000               \tgoto\tl2502\n  7753                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7754  001EBE                     l605:\n  7755                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7756                           \n  7757  001EBE                     l2502:\n  7758  001EBE  0E00               \tmovlw\tlow(0800000h)\n  7759  001EC0  1A01               \txorwf\t((c:___ftge@ff1)),c\n  7760  001EC2  0E00               \tmovlw\thigh(0800000h)\n  7761  001EC4  1A02               \txorwf\t((c:___ftge@ff1+1)),c\n  7762  001EC6  0E80               \tmovlw\tlow highword(0800000h)\n  7763  001EC8  1A03               \txorwf\t((c:___ftge@ff1+2)),c\n  7764                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7765                           \n  7766                           opt pagewidth 120\n  7767  001ECA                     l2504:\n  7768  001ECA  0E00               \tmovlw\tlow(0800000h)\n  7769  001ECC  1A04               \txorwf\t((c:___ftge@ff2)),c\n  7770  001ECE  0E00               \tmovlw\thigh(0800000h)\n  7771  001ED0  1A05               \txorwf\t((c:___ftge@ff2+1)),c\n  7772  001ED2  0E80               \tmovlw\tlow highword(0800000h)\n  7773  001ED4  1A06               \txorwf\t((c:___ftge@ff2+2)),c\n  7774                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7775                           \n  7776  001ED6  5004               \tmovf\t((c:___ftge@ff2)),c,w\n  7777  001ED8  5C01               \tsubwf\t((c:___ftge@ff1)),c,w\n  7778  001EDA  5005               \tmovf\t((c:___ftge@ff2+1)),c,w\n  7779  001EDC  5802               \tsubwfb\t((c:___ftge@ff1+1)),c,w\n  7780  001EDE  5006               \tmovf\t((c:___ftge@ff2+2)),c,w\n  7781  001EE0  5803               \tsubwfb\t((c:___ftge@ff1+2)),c,w\n  7782  001EE2  B0D8               \tbtfsc\tstatus,0\n  7783  001EE4  D001               \tgoto\tu1251\n  7784  001EE6  D001               \tgoto\tu1250\n  7785  001EE8                     u1251:\n  7786  001EE8  D002               \tgoto\tl2508\n  7787  001EEA                     u1250:\n  7788                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7789  001EEA                     l2506:\n  7790  001EEA  90D8               \tbcf\tstatus,0\n  7791  001EEC  D003               \tgoto\tl606\n  7792                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7793  001EEE                     l2288:\n  7794                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7795  001EEE                     l2508:\n  7796  001EEE  80D8               \tbsf\tstatus,0\n  7797  001EF0  D001               \tgoto\tl606\n  7798                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7799  001EF2                     l2290:\n  7800  001EF2  D000               \tgoto\tl606\n  7801                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7802  001EF4                     l2510:\n  7803                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7804                           \n  7805  001EF4                     l606:\n  7806  001EF4  0012               \treturn\n  7807                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7808                           \n  7809  001EF6                     \t__end_of___ftge:\n  7810                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7811                           \n  7812                           opt pagewidth 120\n  7813                           \n  7814                           \topt lm\n  7815                           \n  7816                           \tprocessor\t18F2550\n  7817                           porta\tequ\t0F80h\n  7818                           portb\tequ\t0F81h\n  7819                           portc\tequ\t0F82h\n  7820                           portd\tequ\t0F83h\n  7821                           porte\tequ\t0F84h\n  7822                           lata\tequ\t0F89h\n  7823                           latb\tequ\t0F8Ah\n  7824                           latc\tequ\t0F8Bh\n  7825                           latd\tequ\t0F8Ch\n  7826                           late\tequ\t0F8Dh\n  7827                           trisa\tequ\t0F92h\n  7828                           trisb\tequ\t0F93h\n  7829                           trisc\tequ\t0F94h\n  7830                           trisd\tequ\t0F95h\n  7831                           trise\tequ\t0F96h\n  7832                           pie1\tequ\t0F9Dh\n  7833                           pir1\tequ\t0F9Eh\n  7834                           ipr1\tequ\t0F9Fh\n  7835                           pie2\tequ\t0FA0h\n  7836                           pir2\tequ\t0FA1h\n  7837                           ipr2\tequ\t0FA2h\n  7838                           t3con\tequ\t0FB1h\n  7839                           tmr3l\tequ\t0FB2h\n  7840                           tmr3h\tequ\t0FB3h\n  7841                           ccp1con\tequ\t0FBDh\n  7842                           ccpr1l\tequ\t0FBEh\n  7843                           ccpr1h\tequ\t0FBFh\n  7844                           adcon1\tequ\t0FC1h\n  7845                           adcon0\tequ\t0FC2h\n  7846                           adresl\tequ\t0FC3h\n  7847                           adresh\tequ\t0FC4h\n  7848                           sspcon2\tequ\t0FC5h\n  7849                           sspcon1\tequ\t0FC6h\n  7850  0016EA                     __ptext23:\n  7851                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7852                           \n  7853                           opt pagewidth 120\n  7854                           \n  7855  0000                     \t__size_of___ftmul\tequ\t__end_of___ftmul-___ftmul\n  7856                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7857  0016EA                     ___ftmul:\n  7858                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7859                           \n  7860                           opt pagewidth 120\n  7861  0016EA                     l2772:\n  7862  0016EA  0E0F               \tmovlw\t(0Fh)&0ffh\n  7863  0016EC  6E1C               \tmovwf\t(??___ftmul+0+0)&0ffh,c\n  7864  0016EE  C016  F01D         \tmovff\t(c:___ftmul@f1),??___ftmul+1+0\n  7865  0016F2  C017  F01E         \tmovff\t(c:___ftmul@f1+1),??___ftmul+1+0+1\n  7866  0016F6  C018  F01F         \tmovff\t(c:___ftmul@f1+2),??___ftmul+1+0+2\n  7867  0016FA  281C               \tincf\t((??___ftmul+0+0)),c,w\n  7868  0016FC  6E20               \tmovwf\t(??___ftmul+4+0)&0ffh,c\n  7869  0016FE  D004               \tgoto\tu1710\n  7870  001700                     u1715:\n  7871  001700  90D8               \tbcf\tstatus,0\n  7872  001702  321F               \trrcf\t(??___ftmul+1+2),c\n  7873  001704  321E               \trrcf\t(??___ftmul+1+1),c\n  7874  001706  321D               \trrcf\t(??___ftmul+1+0),c\n  7875  001708                     u1710:\n  7876  001708  2E20               \tdecfsz\t(??___ftmul+4+0)&0ffh,c\n  7877  00170A  D7FA               \tgoto\tu1715\n  7878  00170C  501D               \tmovf\t(??___ftmul+1+0),c,w\n  7879  00170E  6E21               \tmovwf\t((c:___ftmul@exp)),c\n  7880  001710  6621               \ttstfsz\t((c:___ftmul@exp))&0ffh\n  7881  001712  D001               \tgoto\tu1721\n  7882  001714  D001               \tgoto\tu1720\n  7883  001716                     u1721:\n  7884  001716  D008               \tgoto\tl2778\n  7885  001718                     u1720:\n  7886                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7887                           \n  7888  001718                     l2774:\n  7889  001718  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  7890  00171A  6E16               \tmovwf\t((c:?___ftmul)),c\n  7891  00171C  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  7892  00171E  6E17               \tmovwf\t((c:?___ftmul+1)),c\n  7893  001720  0E00               \tmovlw\tlow highword(float24(0.0000000000000000))\n  7894  001722  6E18               \tmovwf\t((c:?___ftmul+2)),c\n  7895                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7896  001724  D080               \tgoto\tl612\n  7897                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7898  001726                     l2776:\n  7899  001726  D07F               \tgoto\tl612\n  7900                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7901  001728                     l611:\n  7902                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7903                           \n  7904  001728                     l2778:\n  7905  001728  0E0F               \tmovlw\t(0Fh)&0ffh\n  7906  00172A  6E1C               \tmovwf\t(??___ftmul+0+0)&0ffh,c\n  7907  00172C  C019  F01D         \tmovff\t(c:___ftmul@f2),??___ftmul+1+0\n  7908  001730  C01A  F01E         \tmovff\t(c:___ftmul@f2+1),??___ftmul+1+0+1\n  7909  001734  C01B  F01F         \tmovff\t(c:___ftmul@f2+2),??___ftmul+1+0+2\n  7910  001738  281C               \tincf\t((??___ftmul+0+0)),c,w\n  7911  00173A  6E20               \tmovwf\t(??___ftmul+4+0)&0ffh,c\n  7912  00173C  D004               \tgoto\tu1730\n  7913  00173E                     u1735:\n  7914  00173E  90D8               \tbcf\tstatus,0\n  7915  001740  321F               \trrcf\t(??___ftmul+1+2),c\n  7916  001742  321E               \trrcf\t(??___ftmul+1+1),c\n  7917  001744  321D               \trrcf\t(??___ftmul+1+0),c\n  7918  001746                     u1730:\n  7919  001746  2E20               \tdecfsz\t(??___ftmul+4+0)&0ffh,c\n  7920  001748  D7FA               \tgoto\tu1735\n  7921  00174A  501D               \tmovf\t(??___ftmul+1+0),c,w\n  7922  00174C  6E26               \tmovwf\t((c:___ftmul@sign)),c\n  7923  00174E  6626               \ttstfsz\t((c:___ftmul@sign))&0ffh\n  7924  001750  D001               \tgoto\tu1741\n  7925  001752  D001               \tgoto\tu1740\n  7926  001754                     u1741:\n  7927  001754  D008               \tgoto\tl2784\n  7928  001756                     u1740:\n  7929                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7930                           \n  7931  001756                     l2780:\n  7932  001756  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  7933  001758  6E16               \tmovwf\t((c:?___ftmul)),c\n  7934  00175A  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  7935  00175C  6E17               \tmovwf\t((c:?___ftmul+1)),c\n  7936  00175E  0E00               \tmovlw\tlow highword(float24(0.0000000000000000))\n  7937  001760  6E18               \tmovwf\t((c:?___ftmul+2)),c\n  7938                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7939  001762  D061               \tgoto\tl612\n  7940                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7941  001764                     l2782:\n  7942  001764  D060               \tgoto\tl612\n  7943                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7944  001766                     l613:\n  7945                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7946                           \n  7947  001766                     l2784:\n  7948  001766  5026               \tmovf\t((c:___ftmul@sign)),c,w\n  7949  001768  0F7B               \taddlw\tlow(07Bh)\n  7950  00176A  2621               \taddwf\t((c:___ftmul@exp)),c\n  7951                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7952                           \n  7953  00176C                     l2786:\n  7954  00176C  C018  F026         \tmovff\t0+2+(c:___ftmul@f1),(c:___ftmul@sign)\n  7955                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7956  001770  501B               \tmovf\t(0+2+(c:___ftmul@f2))&0ffh,w\n  7957  001772  1A26               \txorwf\t((c:___ftmul@sign)),c\n  7958                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7959  001774  0E80               \tmovlw\t(080h)&0ffh\n  7960  001776  1626               \tandwf\t((c:___ftmul@sign)),c\n  7961                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7962                           \n  7963  001778                     l2788:\n  7964  001778  8E17               \tbsf\t(0+(15/8)+(c:___ftmul@f1)),c,(15)&7\n  7965                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7966                           \n  7967  00177A                     l2790:\n  7968  00177A  8E1A               \tbsf\t(0+(15/8)+(c:___ftmul@f2)),c,(15)&7\n  7969                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7970                           \n  7971  00177C                     l2792:\n  7972  00177C  0EFF               \tmovlw\tlow(0FFFFh)\n  7973  00177E  1619               \tandwf\t((c:___ftmul@f2)),c\n  7974  001780  0EFF               \tmovlw\thigh(0FFFFh)\n  7975  001782  161A               \tandwf\t((c:___ftmul@f2+1)),c\n  7976  001784  0E00               \tmovlw\tlow highword(0FFFFh)\n  7977  001786  161B               \tandwf\t((c:___ftmul@f2+2)),c\n  7978                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7979                           \n  7980                           opt pagewidth 120\n  7981  001788                     l2794:\n  7982  001788  0E00               \tmovlw\tlow(0)\n  7983  00178A  6E22               \tmovwf\t((c:___ftmul@f3_as_product)),c\n  7984  00178C  0E00               \tmovlw\thigh(0)\n  7985  00178E  6E23               \tmovwf\t((c:___ftmul@f3_as_product+1)),c\n  7986  001790  0E00               \tmovlw\tlow highword(0)\n  7987  001792  6E24               \tmovwf\t((c:___ftmul@f3_as_product+2)),c\n  7988                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7989                           \n  7990                           opt pagewidth 120\n  7991  001794                     l2796:\n  7992  001794  6E1C               \tmovwf\t(??___ftmul+0+0)&0ffh,c\n  7993  001796  0E07               \tmovlw\tlow(07h)\n  7994  001798  6E25               \tmovwf\t((c:___ftmul@cntr)),c\n  7995  00179A  501C               \tmovf\t(??___ftmul+0+0)&0ffh,c,w\n  7996  00179C  D000               \tgoto\tl2798\n  7997                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  7998                           \n  7999  00179E                     l614:\n  8000                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8001                           \n  8002  00179E                     l2798:\n  8003                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8004  00179E  A016               \tbtfss\t((c:___ftmul@f1)),c,(0)&7\n  8005  0017A0  D001               \tgoto\tu1751\n  8006  0017A2  D001               \tgoto\tu1750\n  8007  0017A4                     u1751:\n  8008  0017A4  D007               \tgoto\tl2802\n  8009  0017A6                     u1750:\n  8010                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8011                           \n  8012  0017A6                     l2800:\n  8013  0017A6  5019               \tmovf\t((c:___ftmul@f2)),c,w\n  8014  0017A8  2622               \taddwf\t((c:___ftmul@f3_as_product)),c\n  8015  0017AA  501A               \tmovf\t((c:___ftmul@f2+1)),c,w\n  8016  0017AC  2223               \taddwfc\t((c:___ftmul@f3_as_product+1)),c\n  8017  0017AE  501B               \tmovf\t((c:___ftmul@f2+2)),c,w\n  8018  0017B0  2224               \taddwfc\t((c:___ftmul@f3_as_product+2)),c\n  8019                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8020  0017B2  D000               \tgoto\tl2802\n  8021                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8022  0017B4                     l615:\n  8023                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8024                           \n  8025  0017B4                     l2802:\n  8026  0017B4  90D8               \tbcf\tstatus,0\n  8027  0017B6  3218               \trrcf\t((c:___ftmul@f1+2)),c\n  8028  0017B8  3217               \trrcf\t((c:___ftmul@f1+1)),c\n  8029  0017BA  3216               \trrcf\t((c:___ftmul@f1)),c\n  8030                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8031  0017BC  90D8               \tbcf\tstatus,0\n  8032  0017BE  3619               \trlcf\t((c:___ftmul@f2)),c\n  8033  0017C0  361A               \trlcf\t((c:___ftmul@f2+1)),c\n  8034  0017C2  361B               \trlcf\t((c:___ftmul@f2+2)),c\n  8035                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8036                           \n  8037  0017C4                     l2804:\n  8038  0017C4  2E25               \tdecfsz\t((c:___ftmul@cntr)),c\n  8039                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8040  0017C6  D7EB               \tgoto\tl2798\n  8041  0017C8  D000               \tgoto\tl2806\n  8042                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8043  0017CA                     l616:\n  8044                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8045                           \n  8046  0017CA                     l2806:\n  8047  0017CA  6E1C               \tmovwf\t(??___ftmul+0+0)&0ffh,c\n  8048  0017CC  0E09               \tmovlw\tlow(09h)\n  8049  0017CE  6E25               \tmovwf\t((c:___ftmul@cntr)),c\n  8050  0017D0  501C               \tmovf\t(??___ftmul+0+0)&0ffh,c,w\n  8051  0017D2  D000               \tgoto\tl2808\n  8052                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8053                           \n  8054  0017D4                     l617:\n  8055                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8056                           \n  8057  0017D4                     l2808:\n  8058                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8059  0017D4  A016               \tbtfss\t((c:___ftmul@f1)),c,(0)&7\n  8060  0017D6  D001               \tgoto\tu1761\n  8061  0017D8  D001               \tgoto\tu1760\n  8062  0017DA                     u1761:\n  8063  0017DA  D007               \tgoto\tl2812\n  8064  0017DC                     u1760:\n  8065                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8066                           \n  8067  0017DC                     l2810:\n  8068  0017DC  5019               \tmovf\t((c:___ftmul@f2)),c,w\n  8069  0017DE  2622               \taddwf\t((c:___ftmul@f3_as_product)),c\n  8070  0017E0  501A               \tmovf\t((c:___ftmul@f2+1)),c,w\n  8071  0017E2  2223               \taddwfc\t((c:___ftmul@f3_as_product+1)),c\n  8072  0017E4  501B               \tmovf\t((c:___ftmul@f2+2)),c,w\n  8073  0017E6  2224               \taddwfc\t((c:___ftmul@f3_as_product+2)),c\n  8074                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8075  0017E8  D000               \tgoto\tl2812\n  8076                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8077  0017EA                     l618:\n  8078                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8079                           \n  8080  0017EA                     l2812:\n  8081  0017EA  90D8               \tbcf\tstatus,0\n  8082  0017EC  3218               \trrcf\t((c:___ftmul@f1+2)),c\n  8083  0017EE  3217               \trrcf\t((c:___ftmul@f1+1)),c\n  8084  0017F0  3216               \trrcf\t((c:___ftmul@f1)),c\n  8085                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8086  0017F2  90D8               \tbcf\tstatus,0\n  8087  0017F4  3224               \trrcf\t((c:___ftmul@f3_as_product+2)),c\n  8088  0017F6  3223               \trrcf\t((c:___ftmul@f3_as_product+1)),c\n  8089  0017F8  3222               \trrcf\t((c:___ftmul@f3_as_product)),c\n  8090                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8091                           \n  8092  0017FA                     l2814:\n  8093  0017FA  2E25               \tdecfsz\t((c:___ftmul@cntr)),c\n  8094                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8095  0017FC  D7EB               \tgoto\tl2808\n  8096  0017FE  D000               \tgoto\tl2816\n  8097                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8098  001800                     l619:\n  8099                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8100                           \n  8101  001800                     l2816:\n  8102  001800  C022  F001         \tmovff\t(c:___ftmul@f3_as_product),(c:?___ftpack)\n  8103  001804  C023  F002         \tmovff\t(c:___ftmul@f3_as_product+1),(c:?___ftpack+1)\n  8104  001808  C024  F003         \tmovff\t(c:___ftmul@f3_as_product+2),(c:?___ftpack+2)\n  8105  00180C  C021  F004         \tmovff\t(c:___ftmul@exp),0+((c:?___ftpack)+03h)\n  8106  001810  C026  F005         \tmovff\t(c:___ftmul@sign),0+((c:?___ftpack)+04h)\n  8107  001814  EC3A  F00D         \tcall\t___ftpack\t;wreg free\n  8108  001818  C001  F016         \tmovff\t0+?___ftpack,(c:?___ftmul)\n  8109  00181C  C002  F017         \tmovff\t1+?___ftpack,(c:?___ftmul+1)\n  8110  001820  C003  F018         \tmovff\t2+?___ftpack,(c:?___ftmul+2)\n  8111  001824  D000               \tgoto\tl612\n  8112                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8113  001826                     l2818:\n  8114                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8115                           \n  8116  001826                     l612:\n  8117  001826  0012               \treturn\n  8118                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8119                           \n  8120  001828                     \t__end_of___ftmul:\n  8121                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8122                           \n  8123                           opt pagewidth 120\n  8124                           \n  8125                           \topt lm\n  8126                           \n  8127                           \tprocessor\t18F2550\n  8128                           porta\tequ\t0F80h\n  8129                           portb\tequ\t0F81h\n  8130                           portc\tequ\t0F82h\n  8131                           portd\tequ\t0F83h\n  8132                           porte\tequ\t0F84h\n  8133                           lata\tequ\t0F89h\n  8134                           latb\tequ\t0F8Ah\n  8135                           latc\tequ\t0F8Bh\n  8136                           latd\tequ\t0F8Ch\n  8137                           late\tequ\t0F8Dh\n  8138                           trisa\tequ\t0F92h\n  8139                           trisb\tequ\t0F93h\n  8140                           trisc\tequ\t0F94h\n  8141                           trisd\tequ\t0F95h\n  8142                           trise\tequ\t0F96h\n  8143                           pie1\tequ\t0F9Dh\n  8144                           pir1\tequ\t0F9Eh\n  8145                           ipr1\tequ\t0F9Fh\n  8146                           pie2\tequ\t0FA0h\n  8147                           pir2\tequ\t0FA1h\n  8148                           ipr2\tequ\t0FA2h\n  8149                           t3con\tequ\t0FB1h\n  8150                           tmr3l\tequ\t0FB2h\n  8151                           tmr3h\tequ\t0FB3h\n  8152                           ccp1con\tequ\t0FBDh\n  8153                           ccpr1l\tequ\t0FBEh\n  8154                           ccpr1h\tequ\t0FBFh\n  8155                           adcon1\tequ\t0FC1h\n  8156  002216                     __ptext24:\n  8157                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8158                           \n  8159                           opt pagewidth 120\n  8160                           \n  8161  0000                     \t__size_of___ftneg\tequ\t__end_of___ftneg-___ftneg\n  8162                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8163  002216                     ___ftneg:\n  8164                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8165                           \n  8166                           opt pagewidth 120\n  8167  002216                     l2692:\n  8168  002216  0E7F               \tmovlw\t0x7f\n  8169  002218  140B               \tandwf\t((c:___ftneg@f1+2)),c,w\n  8170  00221A  100A               \tiorwf\t((c:___ftneg@f1+1)),c,w\n  8171  00221C  1009               \tiorwf\t((c:___ftneg@f1)),c,w\n  8172  00221E  B4D8               \tbtfsc\tstatus,2\n  8173  002220  D001               \tgoto\tu1621\n  8174  002222  D001               \tgoto\tu1620\n  8175  002224                     u1621:\n  8176  002224  D006               \tgoto\tl622\n  8177  002226                     u1620:\n  8178                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8179                           \n  8180  002226                     l2694:\n  8181  002226  0E00               \tmovlw\tlow(0800000h)\n  8182  002228  1A09               \txorwf\t((c:___ftneg@f1)),c\n  8183  00222A  0E00               \tmovlw\thigh(0800000h)\n  8184  00222C  1A0A               \txorwf\t((c:___ftneg@f1+1)),c\n  8185  00222E  0E80               \tmovlw\tlow highword(0800000h)\n  8186  002230  1A0B               \txorwf\t((c:___ftneg@f1+2)),c\n  8187                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8188                           \n  8189  002232                     l622:\n  8190                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8191  002232  C009  F009         \tmovff\t(c:___ftneg@f1),(c:?___ftneg)\n  8192  002236  C00A  F00A         \tmovff\t(c:___ftneg@f1+1),(c:?___ftneg+1)\n  8193  00223A  C00B  F00B         \tmovff\t(c:___ftneg@f1+2),(c:?___ftneg+2)\n  8194                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8195                           \n  8196  00223E                     l623:\n  8197  00223E  0012               \treturn\n  8198                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8199                           \n  8200  002240                     \t__end_of___ftneg:\n  8201                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8202                           \n  8203                           opt pagewidth 120\n  8204                           \n  8205                           \topt lm\n  8206                           \n  8207                           \tprocessor\t18F2550\n  8208                           porta\tequ\t0F80h\n  8209                           portb\tequ\t0F81h\n  8210                           portc\tequ\t0F82h\n  8211                           portd\tequ\t0F83h\n  8212                           porte\tequ\t0F84h\n  8213                           lata\tequ\t0F89h\n  8214                           latb\tequ\t0F8Ah\n  8215                           latc\tequ\t0F8Bh\n  8216                           latd\tequ\t0F8Ch\n  8217                           late\tequ\t0F8Dh\n  8218                           trisa\tequ\t0F92h\n  8219                           trisb\tequ\t0F93h\n  8220                           trisc\tequ\t0F94h\n  8221                           trisd\tequ\t0F95h\n  8222                           trise\tequ\t0F96h\n  8223                           pie1\tequ\t0F9Dh\n  8224                           pir1\tequ\t0F9Eh\n  8225                           ipr1\tequ\t0F9Fh\n  8226                           pie2\tequ\t0FA0h\n  8227                           pir2\tequ\t0FA1h\n  8228                           ipr2\tequ\t0FA2h\n  8229                           t3con\tequ\t0FB1h\n  8230                           tmr3l\tequ\t0FB2h\n  8231                           tmr3h\tequ\t0FB3h\n  8232                           ccp1con\tequ\t0FBDh\n  8233                           ccpr1l\tequ\t0FBEh\n  8234                           ccpr1h\tequ\t0FBFh\n  8235                           adcon1\tequ\t0FC1h\n  8236  001F8A                     __ptext25:\n  8237                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8238                           \n  8239                           opt pagewidth 120\n  8240                           \n  8241  0000                     \t__size_of___lltoft\tequ\t__end_of___lltoft-___lltoft\n  8242                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8243  001F8A                     ___lltoft:\n  8244                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8245                           \n  8246                           opt pagewidth 120\n  8247  001F8A                     l2696:\n  8248  001F8A  6E0D               \tmovwf\t(??___lltoft+0+0)&0ffh,c\n  8249  001F8C  0E8E               \tmovlw\tlow(08Eh)\n  8250  001F8E  6E11               \tmovwf\t((c:___lltoft@exp)),c\n  8251  001F90  500D               \tmovf\t(??___lltoft+0+0)&0ffh,c,w\n  8252                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8253  001F92  D007               \tgoto\tl2700\n  8254                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8255  001F94                     l699:\n  8256                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8257                           \n  8258  001F94                     l2698:\n  8259  001F94  90D8               \tbcf\tstatus,0\n  8260  001F96  320C               \trrcf\t((c:___lltoft@c+3)),c\n  8261  001F98  320B               \trrcf\t((c:___lltoft@c+2)),c\n  8262  001F9A  320A               \trrcf\t((c:___lltoft@c+1)),c\n  8263  001F9C  3209               \trrcf\t((c:___lltoft@c)),c\n  8264                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8265  001F9E  2A11               \tincf\t((c:___lltoft@exp)),c\n  8266  001FA0  D000               \tgoto\tl2700\n  8267                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8268                           \n  8269  001FA2                     l698:\n  8270                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8271                           \n  8272  001FA2                     l2700:\n  8273  001FA2  0E00               \tmovlw\t0\n  8274  001FA4  1409               \tandwf\t((c:___lltoft@c)),c,w\n  8275  001FA6  6E0D               \tmovwf\t(??___lltoft+0+0)&0ffh,c\n  8276  001FA8  0E00               \tmovlw\t0\n  8277  001FAA  140A               \tandwf\t((c:___lltoft@c+1)),c,w\n  8278  001FAC  6E0E               \tmovwf\t1+(??___lltoft+0+0)&0ffh,c\n  8279  001FAE  0E00               \tmovlw\t0\n  8280  001FB0  140B               \tandwf\t((c:___lltoft@c+2)),c,w\n  8281  001FB2  6E0F               \tmovwf\t2+(??___lltoft+0+0)&0ffh,c\n  8282  001FB4  0EFF               \tmovlw\t0FFh\n  8283  001FB6  140C               \tandwf\t((c:___lltoft@c+3)),c,w\n  8284  001FB8  6E10               \tmovwf\t3+(??___lltoft+0+0)&0ffh,c\n  8285  001FBA  5010               \tmovf\t(??___lltoft+0+3),c,w\n  8286  001FBC  100D               \tiorwf (??___lltoft+0+0),c,w\n  8287  001FBE  100E               \tiorwf (??___lltoft+0+1),c,w\n  8288  001FC0  100F               \tiorwf (??___lltoft+0+2),c,w\n  8289                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8290  001FC2  A4D8               \tbtfss\tstatus,2\n  8291  001FC4  D001               \tgoto\tu1631\n  8292  001FC6  D001               \tgoto\tu1630\n  8293  001FC8                     u1631:\n  8294  001FC8  D7E5               \tgoto\tl2698\n  8295  001FCA                     u1630:\n  8296  001FCA  D000               \tgoto\tl2702\n  8297                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8298  001FCC                     l700:\n  8299                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8300                           \n  8301  001FCC                     l2702:\n  8302  001FCC  C009  F001         \tmovff\t(c:___lltoft@c),(c:?___ftpack)\n  8303  001FD0  C00A  F002         \tmovff\t(c:___lltoft@c+1),(c:?___ftpack+1)\n  8304  001FD4  C00B  F003         \tmovff\t(c:___lltoft@c+2),(c:?___ftpack+2)\n  8305  001FD8  C011  F004         \tmovff\t(c:___lltoft@exp),0+((c:?___ftpack)+03h)\n  8306  001FDC  6E0D               \tmovwf\t(??___lltoft+0+0)&0ffh,c\n  8307  001FDE  0E00               \tmovlw\tlow(0)\n  8308  001FE0  6E05               \tmovwf\t(0+((c:?___ftpack)+04h)),c\n  8309  001FE2  500D               \tmovf\t(??___lltoft+0+0)&0ffh,c,w\n  8310  001FE4  EC3A  F00D         \tcall\t___ftpack\t;wreg free\n  8311  001FE8  C001  F009         \tmovff\t0+?___ftpack,(c:?___lltoft)\n  8312  001FEC  C002  F00A         \tmovff\t1+?___ftpack,(c:?___lltoft+1)\n  8313  001FF0  C003  F00B         \tmovff\t2+?___ftpack,(c:?___lltoft+2)\n  8314  001FF4  D000               \tgoto\tl701\n  8315                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8316  001FF6                     l2704:\n  8317                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8318                           \n  8319  001FF6                     l701:\n  8320  001FF6  0012               \treturn\n  8321                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8322                           \n  8323  001FF8                     \t__end_of___lltoft:\n  8324                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8325                           \n  8326                           opt pagewidth 120\n  8327                           \n  8328                           \topt lm\n  8329                           \n  8330                           \tprocessor\t18F2550\n  8331                           porta\tequ\t0F80h\n  8332                           portb\tequ\t0F81h\n  8333                           portc\tequ\t0F82h\n  8334                           portd\tequ\t0F83h\n  8335                           porte\tequ\t0F84h\n  8336                           lata\tequ\t0F89h\n  8337                           latb\tequ\t0F8Ah\n  8338                           latc\tequ\t0F8Bh\n  8339                           latd\tequ\t0F8Ch\n  8340                           late\tequ\t0F8Dh\n  8341                           trisa\tequ\t0F92h\n  8342                           trisb\tequ\t0F93h\n  8343                           trisc\tequ\t0F94h\n  8344                           trisd\tequ\t0F95h\n  8345                           trise\tequ\t0F96h\n  8346                           pie1\tequ\t0F9Dh\n  8347                           pir1\tequ\t0F9Eh\n  8348                           ipr1\tequ\t0F9Fh\n  8349                           pie2\tequ\t0FA0h\n  8350                           pir2\tequ\t0FA1h\n  8351                           ipr2\tequ\t0FA2h\n  8352                           t3con\tequ\t0FB1h\n  8353                           tmr3l\tequ\t0FB2h\n  8354                           tmr3h\tequ\t0FB3h\n  8355                           ccp1con\tequ\t0FBDh\n  8356                           ccpr1l\tequ\t0FBEh\n  8357                           ccpr1h\tequ\t0FBFh\n  8358                           adcon1\tequ\t0FC1h\n  8359                           adcon0\tequ\t0FC2h\n  8360                           adresl\tequ\t0FC3h\n  8361                           adresh\tequ\t0FC4h\n  8362                           sspcon2\tequ\t0FC5h\n  8363  001A74                     __ptext26:\n  8364                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8365                           \n  8366                           opt pagewidth 120\n  8367                           \n  8368  0000                     \t__size_of___ftpack\tequ\t__end_of___ftpack-___ftpack\n  8369                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8370  001A74                     ___ftpack:\n  8371                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8372                           \n  8373                           opt pagewidth 120\n  8374  001A74                     l2416:\n  8375  001A74  5004               \tmovf\t((c:___ftpack@exp)),c,w\n  8376  001A76  B4D8               \tbtfsc\tstatus,2\n  8377  001A78  D001               \tgoto\tu1101\n  8378  001A7A  D001               \tgoto\tu1100\n  8379  001A7C                     u1101:\n  8380  001A7C  D008               \tgoto\tl2420\n  8381  001A7E                     u1100:\n  8382                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8383  001A7E                     l2418:\n  8384  001A7E  5001               \tmovf\t((c:___ftpack@arg)),c,w\n  8385  001A80  1002               \tiorwf\t((c:___ftpack@arg+1)),c,w\n  8386  001A82  1003               \tiorwf\t((c:___ftpack@arg+2)),c,w\n  8387  001A84  A4D8               \tbtfss\tstatus,2\n  8388  001A86  D001               \tgoto\tu1111\n  8389  001A88  D001               \tgoto\tu1110\n  8390  001A8A                     u1111:\n  8391  001A8A  D010               \tgoto\tl2426\n  8392  001A8C                     u1110:\n  8393  001A8C  D000               \tgoto\tl2420\n  8394                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8395  001A8E                     l527:\n  8396                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8397                           \n  8398  001A8E                     l2420:\n  8399  001A8E  0E00               \tmovlw\tlow(float24(0.0000000000000000))\n  8400  001A90  6E01               \tmovwf\t((c:?___ftpack)),c\n  8401  001A92  0E00               \tmovlw\thigh(float24(0.0000000000000000))\n  8402  001A94  6E02               \tmovwf\t((c:?___ftpack+1)),c\n  8403  001A96  0E00               \tmovlw\tlow highword(float24(0.0000000000000000))\n  8404  001A98  6E03               \tmovwf\t((c:?___ftpack+2)),c\n  8405                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8406  001A9A  D062               \tgoto\tl528\n  8407                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8408  001A9C                     l2422:\n  8409  001A9C  D061               \tgoto\tl528\n  8410                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8411  001A9E                     l525:\n  8412                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8413  001A9E  D006               \tgoto\tl2426\n  8414                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8415  001AA0                     l530:\n  8416                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8417                           \n  8418  001AA0                     l2424:\n  8419  001AA0  2A04               \tincf\t((c:___ftpack@exp)),c\n  8420                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8421  001AA2  90D8               \tbcf\tstatus,0\n  8422  001AA4  3203               \trrcf\t((c:___ftpack@arg+2)),c\n  8423  001AA6  3202               \trrcf\t((c:___ftpack@arg+1)),c\n  8424  001AA8  3201               \trrcf\t((c:___ftpack@arg)),c\n  8425  001AAA  D000               \tgoto\tl2426\n  8426                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8427                           \n  8428  001AAC                     l529:\n  8429                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8430                           \n  8431  001AAC                     l2426:\n  8432  001AAC  0E00               \tmovlw\tlow(0FE0000h)\n  8433  001AAE  1401               \tandwf\t((c:___ftpack@arg)),c,w\n  8434  001AB0  6E06               \tmovwf\t(??___ftpack+0+0)&0ffh,c\n  8435  001AB2  0E00               \tmovlw\t0\n  8436  001AB4  1402               \tandwf\t((c:___ftpack@arg+1)),c,w\n  8437  001AB6  6E07               \tmovwf\t1+(??___ftpack+0+0)&0ffh,c\n  8438  001AB8  0EFE               \tmovlw\t0FEh\n  8439  001ABA  1403               \tandwf\t((c:___ftpack@arg+2)),c,w\n  8440  001ABC  6E08               \tmovwf\t2+(??___ftpack+0+0)&0ffh,c\n  8441                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8442  001ABE  5006               \tmovf\t(??___ftpack+0+0),c,w\n  8443  001AC0  1007               \tiorwf\t(??___ftpack+0+1),c,w\n  8444  001AC2  1008               \tiorwf\t(??___ftpack+0+2),c,w\n  8445  001AC4  A4D8               \tbtfss\tstatus,2\n  8446  001AC6  D001               \tgoto\tu1121\n  8447  001AC8  D001               \tgoto\tu1120\n  8448  001ACA                     u1121:\n  8449  001ACA  D7EA               \tgoto\tl2424\n  8450  001ACC                     u1120:\n  8451  001ACC  D00D               \tgoto\tl2432\n  8452                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8453  001ACE                     l531:\n  8454                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8455  001ACE  D00C               \tgoto\tl2432\n  8456                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8457  001AD0                     l533:\n  8458                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8459                           \n  8460  001AD0                     l2428:\n  8461  001AD0  2A04               \tincf\t((c:___ftpack@exp)),c\n  8462                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8463                           \n  8464  001AD2                     l2430:\n  8465  001AD2  0E01               \tmovlw\tlow(01h)\n  8466  001AD4  2601               \taddwf\t((c:___ftpack@arg)),c\n  8467  001AD6  0E00               \tmovlw\thigh(01h)\n  8468  001AD8  2202               \taddwfc\t((c:___ftpack@arg+1)),c\n  8469  001ADA  0E00               \tmovlw\tlow highword(01h)\n  8470  001ADC  2203               \taddwfc\t((c:___ftpack@arg+2)),c\n  8471                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8472                           \n  8473  001ADE  90D8               \tbcf\tstatus,0\n  8474  001AE0  3203               \trrcf\t((c:___ftpack@arg+2)),c\n  8475  001AE2  3202               \trrcf\t((c:___ftpack@arg+1)),c\n  8476  001AE4  3201               \trrcf\t((c:___ftpack@arg)),c\n  8477  001AE6  D000               \tgoto\tl2432\n  8478                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8479                           \n  8480  001AE8                     l532:\n  8481                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8482                           \n  8483  001AE8                     l2432:\n  8484  001AE8  0E00               \tmovlw\tlow(0FF0000h)\n  8485  001AEA  1401               \tandwf\t((c:___ftpack@arg)),c,w\n  8486  001AEC  6E06               \tmovwf\t(??___ftpack+0+0)&0ffh,c\n  8487  001AEE  0E00               \tmovlw\t0\n  8488  001AF0  1402               \tandwf\t((c:___ftpack@arg+1)),c,w\n  8489  001AF2  6E07               \tmovwf\t1+(??___ftpack+0+0)&0ffh,c\n  8490  001AF4  0EFF               \tmovlw\t0FFh\n  8491  001AF6  1403               \tandwf\t((c:___ftpack@arg+2)),c,w\n  8492  001AF8  6E08               \tmovwf\t2+(??___ftpack+0+0)&0ffh,c\n  8493                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8494  001AFA  5006               \tmovf\t(??___ftpack+0+0),c,w\n  8495  001AFC  1007               \tiorwf\t(??___ftpack+0+1),c,w\n  8496  001AFE  1008               \tiorwf\t(??___ftpack+0+2),c,w\n  8497  001B00  A4D8               \tbtfss\tstatus,2\n  8498  001B02  D001               \tgoto\tu1131\n  8499  001B04  D001               \tgoto\tu1130\n  8500  001B06                     u1131:\n  8501  001B06  D7E4               \tgoto\tl2428\n  8502  001B08                     u1130:\n  8503  001B08  D007               \tgoto\tl2436\n  8504                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8505  001B0A                     l534:\n  8506                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8507  001B0A  D006               \tgoto\tl2436\n  8508                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8509  001B0C                     l536:\n  8510                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8511                           \n  8512  001B0C                     l2434:\n  8513  001B0C  0604               \tdecf\t((c:___ftpack@exp)),c\n  8514                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8515  001B0E  90D8               \tbcf\tstatus,0\n  8516  001B10  3601               \trlcf\t((c:___ftpack@arg)),c\n  8517  001B12  3602               \trlcf\t((c:___ftpack@arg+1)),c\n  8518  001B14  3603               \trlcf\t((c:___ftpack@arg+2)),c\n  8519  001B16  D000               \tgoto\tl2436\n  8520                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8521                           \n  8522  001B18                     l535:\n  8523                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8524                           \n  8525  001B18                     l2436:\n  8526                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8527  001B18  AE02               \tbtfss\t((c:___ftpack@arg+1)),c,(15)&7\n  8528  001B1A  D001               \tgoto\tu1141\n  8529  001B1C  D001               \tgoto\tu1140\n  8530  001B1E                     u1141:\n  8531  001B1E  D7F6               \tgoto\tl2434\n  8532  001B20                     u1140:\n  8533                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8534  001B20                     l537:\n  8535                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8536                           \n  8537  001B20  B004               \tbtfsc\t((c:___ftpack@exp)),c,(0)&7\n  8538  001B22  D001               \tgoto\tu1151\n  8539  001B24  D001               \tgoto\tu1150\n  8540  001B26                     u1151:\n  8541  001B26  D002               \tgoto\tl2440\n  8542  001B28                     u1150:\n  8543                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8544                           \n  8545  001B28                     l2438:\n  8546  001B28  9E02               \tbcf\t(0+(15/8)+(c:___ftpack@arg)),c,(15)&7\n  8547  001B2A  D000               \tgoto\tl2440\n  8548                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8549  001B2C                     l538:\n  8550                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8551                           \n  8552  001B2C                     l2440:\n  8553  001B2C  90D8               \tbcf status,0\n  8554  001B2E  3204               \trrcf\t((c:___ftpack@exp)),c\n  8555                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8556                           \n  8557  001B30  5004               \tmovf\t((c:___ftpack@exp)),c,w\n  8558  001B32  6E08               \tmovwf\t(??___ftpack+0+0+2)&0ffh,c\n  8559  001B34  6A07               \tclrf\t(??___ftpack+0+0+1)&0ffh,c\n  8560  001B36  6A06               \tclrf\t(??___ftpack+0+0)&0ffh,c\n  8561  001B38  5006               \tmovf\t(??___ftpack+0+0),c,w\n  8562  001B3A  1201               \tiorwf\t((c:___ftpack@arg)),c\n  8563  001B3C  5007               \tmovf\t(??___ftpack+0+1),c,w\n  8564  001B3E  1202               \tiorwf\t((c:___ftpack@arg+1)),c\n  8565  001B40  5008               \tmovf\t(??___ftpack+0+2),c,w\n  8566  001B42  1203               \tiorwf\t((c:___ftpack@arg+2)),c\n  8567                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8568                           \n  8569                           opt pagewidth 120\n  8570  001B44                     l2442:\n  8571  001B44  5005               \tmovf\t((c:___ftpack@sign)),c,w\n  8572  001B46  B4D8               \tbtfsc\tstatus,2\n  8573  001B48  D001               \tgoto\tu1161\n  8574  001B4A  D001               \tgoto\tu1160\n  8575  001B4C                     u1161:\n  8576  001B4C  D002               \tgoto\tl2446\n  8577  001B4E                     u1160:\n  8578                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8579                           \n  8580  001B4E                     l2444:\n  8581  001B4E  8E03               \tbsf\t(0+(23/8)+(c:___ftpack@arg)),c,(23)&7\n  8582  001B50  D000               \tgoto\tl2446\n  8583                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8584  001B52                     l539:\n  8585                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8586                           \n  8587  001B52                     l2446:\n  8588  001B52  C001  F001         \tmovff\t(c:___ftpack@arg),(c:?___ftpack)\n  8589  001B56  C002  F002         \tmovff\t(c:___ftpack@arg+1),(c:?___ftpack+1)\n  8590  001B5A  C003  F003         \tmovff\t(c:___ftpack@arg+2),(c:?___ftpack+2)\n  8591  001B5E  D000               \tgoto\tl528\n  8592                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8593  001B60                     l2448:\n  8594                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8595                           \n  8596  001B60                     l528:\n  8597  001B60  0012               \treturn\n  8598                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8599                           \n  8600  001B62                     \t__end_of___ftpack:\n  8601                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8602                           \n  8603                           opt pagewidth 120\n  8604                           \n  8605                           \topt lm\n  8606                           \n  8607                           \tprocessor\t18F2550\n  8608                           porta\tequ\t0F80h\n  8609                           portb\tequ\t0F81h\n  8610                           portc\tequ\t0F82h\n  8611                           portd\tequ\t0F83h\n  8612                           porte\tequ\t0F84h\n  8613                           lata\tequ\t0F89h\n  8614                           latb\tequ\t0F8Ah\n  8615                           latc\tequ\t0F8Bh\n  8616                           latd\tequ\t0F8Ch\n  8617                           late\tequ\t0F8Dh\n  8618                           trisa\tequ\t0F92h\n  8619                           trisb\tequ\t0F93h\n  8620                           trisc\tequ\t0F94h\n  8621                           trisd\tequ\t0F95h\n  8622                           trise\tequ\t0F96h\n  8623                           pie1\tequ\t0F9Dh\n  8624                           pir1\tequ\t0F9Eh\n  8625                           ipr1\tequ\t0F9Fh\n  8626                           pie2\tequ\t0FA0h\n  8627                           pir2\tequ\t0FA1h\n  8628                           ipr2\tequ\t0FA2h\n  8629                           t3con\tequ\t0FB1h\n  8630                           tmr3l\tequ\t0FB2h\n  8631                           tmr3h\tequ\t0FB3h\n  8632                           ccp1con\tequ\t0FBDh\n  8633                           ccpr1l\tequ\t0FBEh\n  8634                           ccpr1h\tequ\t0FBFh\n  8635                           adcon1\tequ\t0FC1h\n  8636                           adcon0\tequ\t0FC2h\n  8637  002178                     __ptext27:\n  8638                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8639                           \n  8640                           opt pagewidth 120\n  8641                           \n  8642  0000                     \t__size_of___asftadd\tequ\t__end_of___asftadd-___asftadd\n  8643                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8644  002178                     ___asftadd:\n  8645                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8646                           \n  8647                           opt pagewidth 120\n  8648  002178                     l2820:\n  8649                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8650  002178  C035  FFD9         \tmovff\t(c:___asftadd@f1p),fsr2l\n  8651  00217C  C036  FFDA         \tmovff\t(c:___asftadd@f1p+1),fsr2h\n  8652  002180  CFDE F027          \tmovff\tpostinc2,(c:?___ftadd)\n  8653  002184  CFDE F028          \tmovff\tpostinc2,(c:?___ftadd+1)\n  8654  002188  CFDD F029          \tmovff\tpostdec2,(c:?___ftadd+2)\n  8655  00218C  C037  F02A         \tmovff\t(c:___asftadd@f2),0+((c:?___ftadd)+03h)\n  8656  002190  C038  F02B         \tmovff\t(c:___asftadd@f2+1),1+((c:?___ftadd)+03h)\n  8657  002194  C039  F02C         \tmovff\t(c:___asftadd@f2+2),2+((c:?___ftadd)+03h)\n  8658  002198  EC3A  F007         \tcall\t___ftadd\t;wreg free\n  8659  00219C  C035  FFD9         \tmovff\t(c:___asftadd@f1p),fsr2l\n  8660  0021A0  C036  FFDA         \tmovff\t(c:___asftadd@f1p+1),fsr2h\n  8661  0021A4  C027  FFDE         \tmovff\t0+?___ftadd,postinc2\n  8662  0021A8  C028  FFDE         \tmovff\t1+?___ftadd,postinc2\n  8663  0021AC  C029  FFDD         \tmovff\t2+?___ftadd,postdec2\n  8664  0021B0  52DD               \tmovf\tpostdec2\n  8665  0021B2  D000               \tgoto\tl804\n  8666                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8667  0021B4                     l2822:\n  8668                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8669                           \n  8670  0021B4                     l804:\n  8671  0021B4  0012               \treturn\n  8672                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8673                           \n  8674  0021B6                     \t__end_of___asftadd:\n  8675                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8676                           \n  8677                           opt pagewidth 120\n  8678                           \n  8679                           \topt lm\n  8680                           \n  8681                           \tprocessor\t18F2550\n  8682                           porta\tequ\t0F80h\n  8683                           portb\tequ\t0F81h\n  8684                           portc\tequ\t0F82h\n  8685                           portd\tequ\t0F83h\n  8686                           porte\tequ\t0F84h\n  8687                           lata\tequ\t0F89h\n  8688                           latb\tequ\t0F8Ah\n  8689                           latc\tequ\t0F8Bh\n  8690                           latd\tequ\t0F8Ch\n  8691                           late\tequ\t0F8Dh\n  8692                           trisa\tequ\t0F92h\n  8693                           trisb\tequ\t0F93h\n  8694                           trisc\tequ\t0F94h\n  8695                           trisd\tequ\t0F95h\n  8696                           trise\tequ\t0F96h\n  8697                           pie1\tequ\t0F9Dh\n  8698                           pir1\tequ\t0F9Eh\n  8699                           ipr1\tequ\t0F9Fh\n  8700                           pie2\tequ\t0FA0h\n  8701                           pir2\tequ\t0FA1h\n  8702                           ipr2\tequ\t0FA2h\n  8703                           t3con\tequ\t0FB1h\n  8704                           tmr3l\tequ\t0FB2h\n  8705                           tmr3h\tequ\t0FB3h\n  8706                           ccp1con\tequ\t0FBDh\n  8707                           ccpr1l\tequ\t0FBEh\n  8708                           ccpr1h\tequ\t0FBFh\n  8709                           adcon1\tequ\t0FC1h\n  8710                           adcon0\tequ\t0FC2h\n  8711                           adresl\tequ\t0FC3h\n  8712                           adresh\tequ\t0FC4h\n  8713  000E74                     __ptext28:\n  8714                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8715                           \n  8716                           opt pagewidth 120\n  8717                           \n  8718  0000                     \t__size_of___ftadd\tequ\t__end_of___ftadd-___ftadd\n  8719                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8720  000E74                     ___ftadd:\n  8721                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8722                           \n  8723                           opt pagewidth 120\n  8724  000E74                     l2622:\n  8725  000E74  0E0F               \tmovlw\t(0Fh)&0ffh\n  8726  000E76  6E2D               \tmovwf\t(??___ftadd+0+0)&0ffh,c\n  8727  000E78  C027  F02E         \tmovff\t(c:___ftadd@f1),??___ftadd+1+0\n  8728  000E7C  C028  F02F         \tmovff\t(c:___ftadd@f1+1),??___ftadd+1+0+1\n  8729  000E80  C029  F030         \tmovff\t(c:___ftadd@f1+2),??___ftadd+1+0+2\n  8730  000E84  282D               \tincf\t((??___ftadd+0+0)),c,w\n  8731  000E86  6E31               \tmovwf\t(??___ftadd+4+0)&0ffh,c\n  8732  000E88  D004               \tgoto\tu1410\n  8733  000E8A                     u1415:\n  8734  000E8A  90D8               \tbcf\tstatus,0\n  8735  000E8C  3230               \trrcf\t(??___ftadd+1+2),c\n  8736  000E8E  322F               \trrcf\t(??___ftadd+1+1),c\n  8737  000E90  322E               \trrcf\t(??___ftadd+1+0),c\n  8738  000E92                     u1410:\n  8739  000E92  2E31               \tdecfsz\t(??___ftadd+4+0)&0ffh,c\n  8740  000E94  D7FA               \tgoto\tu1415\n  8741  000E96  502E               \tmovf\t(??___ftadd+1+0),c,w\n  8742  000E98  6E34               \tmovwf\t((c:___ftadd@exp1)),c\n  8743                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8744  000E9A  0E0F               \tmovlw\t(0Fh)&0ffh\n  8745  000E9C  6E2D               \tmovwf\t(??___ftadd+0+0)&0ffh,c\n  8746  000E9E  C02A  F02E         \tmovff\t(c:___ftadd@f2),??___ftadd+1+0\n  8747  000EA2  C02B  F02F         \tmovff\t(c:___ftadd@f2+1),??___ftadd+1+0+1\n  8748  000EA6  C02C  F030         \tmovff\t(c:___ftadd@f2+2),??___ftadd+1+0+2\n  8749  000EAA  282D               \tincf\t((??___ftadd+0+0)),c,w\n  8750  000EAC  6E31               \tmovwf\t(??___ftadd+4+0)&0ffh,c\n  8751  000EAE  D004               \tgoto\tu1420\n  8752  000EB0                     u1425:\n  8753  000EB0  90D8               \tbcf\tstatus,0\n  8754  000EB2  3230               \trrcf\t(??___ftadd+1+2),c\n  8755  000EB4  322F               \trrcf\t(??___ftadd+1+1),c\n  8756  000EB6  322E               \trrcf\t(??___ftadd+1+0),c\n  8757  000EB8                     u1420:\n  8758  000EB8  2E31               \tdecfsz\t(??___ftadd+4+0)&0ffh,c\n  8759  000EBA  D7FA               \tgoto\tu1425\n  8760  000EBC  502E               \tmovf\t(??___ftadd+1+0),c,w\n  8761  000EBE  6E33               \tmovwf\t((c:___ftadd@exp2)),c\n  8762                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8763                           \n  8764  000EC0                     l2624:\n  8765  000EC0  5034               \tmovf\t((c:___ftadd@exp1)),c,w\n  8766  000EC2  B4D8               \tbtfsc\tstatus,2\n  8767  000EC4  D001               \tgoto\tu1431\n  8768  000EC6  D001               \tgoto\tu1430\n  8769  000EC8                     u1431:\n  8770  000EC8  D00F               \tgoto\tl565\n  8771  000ECA                     u1430:\n  8772                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8773  000ECA                     l2626:\n  8774  000ECA  5033               \tmovf\t((c:___ftadd@exp2)),c,w\n  8775  000ECC  6034               \tcpfslt\t((c:___ftadd@exp1)),c\n  8776  000ECE  D001               \tgoto\tu1441\n  8777  000ED0  D001               \tgoto\tu1440\n  8778  000ED2                     u1441:\n  8779  000ED2  D011               \tgoto\tl2630\n  8780  000ED4                     u1440:\n  8781                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8782  000ED4                     l2628:\n  8783  000ED4  5034               \tmovf\t((c:___ftadd@exp1)),c,w\n  8784  000ED6  0800               \tsublw\t0\n  8785  000ED8  2433               \taddwf\t((c:___ftadd@exp2)),c,w\n  8786  000EDA  6E2D               \tmovwf\t(??___ftadd+0+0)&0ffh,c\n  8787  000EDC  0E19               \tmovlw\t(019h)&0ffh\n  8788  000EDE  5C2D               \tsubwf\t((??___ftadd+0+0)),c,w\n  8789  000EE0  A0D8               \tbtfss\tstatus,0\n  8790  000EE2  D001               \tgoto\tu1451\n  8791  000EE4  D001               \tgoto\tu1450\n  8792  000EE6                     u1451:\n  8793  000EE6  D007               \tgoto\tl2630\n  8794  000EE8                     u1450:\n  8795                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8796  000EE8                     l565:\n  8797                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8798  000EE8  C02A  F027         \tmovff\t(c:___ftadd@f2),(c:?___ftadd)\n  8799  000EEC  C02B  F028         \tmovff\t(c:___ftadd@f2+1),(c:?___ftadd+1)\n  8800  000EF0  C02C  F029         \tmovff\t(c:___ftadd@f2+2),(c:?___ftadd+2)\n  8801  000EF4  D0DB               \tgoto\tl566\n  8802                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8803  000EF6                     l563:\n  8804                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8805                           \n  8806  000EF6                     l2630:\n  8807  000EF6  5033               \tmovf\t((c:___ftadd@exp2)),c,w\n  8808  000EF8  B4D8               \tbtfsc\tstatus,2\n  8809  000EFA  D001               \tgoto\tu1461\n  8810  000EFC  D001               \tgoto\tu1460\n  8811  000EFE                     u1461:\n  8812  000EFE  D00F               \tgoto\tl569\n  8813  000F00                     u1460:\n  8814                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8815  000F00                     l2632:\n  8816  000F00  5034               \tmovf\t((c:___ftadd@exp1)),c,w\n  8817  000F02  6033               \tcpfslt\t((c:___ftadd@exp2)),c\n  8818  000F04  D001               \tgoto\tu1471\n  8819  000F06  D001               \tgoto\tu1470\n  8820  000F08                     u1471:\n  8821  000F08  D011               \tgoto\tl2636\n  8822  000F0A                     u1470:\n  8823                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8824  000F0A                     l2634:\n  8825  000F0A  5033               \tmovf\t((c:___ftadd@exp2)),c,w\n  8826  000F0C  0800               \tsublw\t0\n  8827  000F0E  2434               \taddwf\t((c:___ftadd@exp1)),c,w\n  8828  000F10  6E2D               \tmovwf\t(??___ftadd+0+0)&0ffh,c\n  8829  000F12  0E19               \tmovlw\t(019h)&0ffh\n  8830  000F14  5C2D               \tsubwf\t((??___ftadd+0+0)),c,w\n  8831  000F16  A0D8               \tbtfss\tstatus,0\n  8832  000F18  D001               \tgoto\tu1481\n  8833  000F1A  D001               \tgoto\tu1480\n  8834  000F1C                     u1481:\n  8835  000F1C  D007               \tgoto\tl2636\n  8836  000F1E                     u1480:\n  8837                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8838  000F1E                     l569:\n  8839                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8840  000F1E  C027  F027         \tmovff\t(c:___ftadd@f1),(c:?___ftadd)\n  8841  000F22  C028  F028         \tmovff\t(c:___ftadd@f1+1),(c:?___ftadd+1)\n  8842  000F26  C029  F029         \tmovff\t(c:___ftadd@f1+2),(c:?___ftadd+2)\n  8843  000F2A  D0C0               \tgoto\tl566\n  8844                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8845  000F2C                     l567:\n  8846                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8847                           \n  8848  000F2C                     l2636:\n  8849  000F2C  6E2D               \tmovwf\t(??___ftadd+0+0)&0ffh,c\n  8850  000F2E  0E06               \tmovlw\tlow(06h)\n  8851  000F30  6E32               \tmovwf\t((c:___ftadd@sign)),c\n  8852  000F32  502D               \tmovf\t(??___ftadd+0+0)&0ffh,c,w\n  8853                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8854                           \n  8855  000F34                     l2638:\n  8856                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8857  000F34  AE29               \tbtfss\t((c:___ftadd@f1+2)),c,(23)&7\n  8858  000F36  D001               \tgoto\tu1491\n  8859  000F38  D001               \tgoto\tu1490\n  8860  000F3A                     u1491:\n  8861  000F3A  D002               \tgoto\tl2642\n  8862  000F3C                     u1490:\n  8863                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8864                           \n  8865  000F3C                     l2640:\n  8866  000F3C  8E32               \tbsf\t(0+(7/8)+(c:___ftadd@sign)),c,(7)&7\n  8867  000F3E  D000               \tgoto\tl2642\n  8868                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8869  000F40                     l570:\n  8870                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8871                           \n  8872  000F40                     l2642:\n  8873                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8874  000F40  AE2C               \tbtfss\t((c:___ftadd@f2+2)),c,(23)&7\n  8875  000F42  D001               \tgoto\tu1501\n  8876  000F44  D001               \tgoto\tu1500\n  8877  000F46                     u1501:\n  8878  000F46  D001               \tgoto\tl571\n  8879  000F48                     u1500:\n  8880                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8881                           \n  8882  000F48                     l2644:\n  8883  000F48  8C32               \tbsf\t(0+(6/8)+(c:___ftadd@sign)),c,(6)&7\n  8884                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8885  000F4A                     l571:\n  8886                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8887  000F4A  8E28               \tbsf\t(0+(15/8)+(c:___ftadd@f1)),c,(15)&7\n  8888                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8889                           \n  8890  000F4C                     l2646:\n  8891  000F4C  0EFF               \tmovlw\tlow(0FFFFh)\n  8892  000F4E  1627               \tandwf\t((c:___ftadd@f1)),c\n  8893  000F50  0EFF               \tmovlw\thigh(0FFFFh)\n  8894  000F52  1628               \tandwf\t((c:___ftadd@f1+1)),c\n  8895  000F54  0E00               \tmovlw\tlow highword(0FFFFh)\n  8896  000F56  1629               \tandwf\t((c:___ftadd@f1+2)),c\n  8897                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8898                           \n  8899  000F58  8E2B               \tbsf\t(0+(15/8)+(c:___ftadd@f2)),c,(15)&7\n  8900                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8901                           \n  8902  000F5A                     l2648:\n  8903  000F5A  0EFF               \tmovlw\tlow(0FFFFh)\n  8904  000F5C  162A               \tandwf\t((c:___ftadd@f2)),c\n  8905  000F5E  0EFF               \tmovlw\thigh(0FFFFh)\n  8906  000F60  162B               \tandwf\t((c:___ftadd@f2+1)),c\n  8907  000F62  0E00               \tmovlw\tlow highword(0FFFFh)\n  8908  000F64  162C               \tandwf\t((c:___ftadd@f2+2)),c\n  8909                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8910                           \n  8911                           opt pagewidth 120\n  8912  000F66                     l2650:\n  8913  000F66  5033               \tmovf\t((c:___ftadd@exp2)),c,w\n  8914  000F68  6034               \tcpfslt\t((c:___ftadd@exp1)),c\n  8915  000F6A  D001               \tgoto\tu1511\n  8916  000F6C  D001               \tgoto\tu1510\n  8917  000F6E                     u1511:\n  8918  000F6E  D023               \tgoto\tl2662\n  8919  000F70                     u1510:\n  8920  000F70  D000               \tgoto\tl2652\n  8921                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8922                           \n  8923  000F72                     l573:\n  8924                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8925                           \n  8926  000F72                     l2652:\n  8927  000F72  90D8               \tbcf\tstatus,0\n  8928  000F74  362A               \trlcf\t((c:___ftadd@f2)),c\n  8929  000F76  362B               \trlcf\t((c:___ftadd@f2+1)),c\n  8930  000F78  362C               \trlcf\t((c:___ftadd@f2+2)),c\n  8931                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8932  000F7A  0633               \tdecf\t((c:___ftadd@exp2)),c\n  8933                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8934                           \n  8935  000F7C                     l2654:\n  8936  000F7C  5033               \tmovf\t((c:___ftadd@exp2)),c,w\n  8937  000F7E  1834               \txorwf\t((c:___ftadd@exp1)),c,w\n  8938  000F80  B4D8               \tbtfsc\tstatus,2\n  8939  000F82  D001               \tgoto\tu1521\n  8940  000F84  D001               \tgoto\tu1520\n  8941  000F86                     u1521:\n  8942  000F86  D010               \tgoto\tl2660\n  8943  000F88                     u1520:\n  8944                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8945  000F88                     l2656:\n  8946  000F88  0632               \tdecf\t((c:___ftadd@sign)),c\n  8947  000F8A  5032               \tmovf\t((c:___ftadd@sign))&0ffh,w\n  8948  000F8C  0B07               \tandlw\tlow(07h)\n  8949  000F8E  A4D8               \tbtfss\tstatus,2\n  8950  000F90  D001               \tgoto\tu1531\n  8951  000F92  D001               \tgoto\tu1530\n  8952  000F94                     u1531:\n  8953  000F94  D7EE               \tgoto\tl2652\n  8954  000F96                     u1530:\n  8955  000F96  D008               \tgoto\tl2660\n  8956                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8957  000F98                     l575:\n  8958  000F98  D007               \tgoto\tl2660\n  8959                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8960  000F9A                     l576:\n  8961                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8962  000F9A  D006               \tgoto\tl2660\n  8963                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8964  000F9C                     l578:\n  8965                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8966                           \n  8967  000F9C                     l2658:\n  8968  000F9C  90D8               \tbcf\tstatus,0\n  8969  000F9E  3229               \trrcf\t((c:___ftadd@f1+2)),c\n  8970  000FA0  3228               \trrcf\t((c:___ftadd@f1+1)),c\n  8971  000FA2  3227               \trrcf\t((c:___ftadd@f1)),c\n  8972                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8973  000FA4  2A34               \tincf\t((c:___ftadd@exp1)),c\n  8974  000FA6  D000               \tgoto\tl2660\n  8975                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8976                           \n  8977  000FA8                     l577:\n  8978                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8979                           \n  8980  000FA8                     l2660:\n  8981  000FA8  5033               \tmovf\t((c:___ftadd@exp2)),c,w\n  8982  000FAA  6234               \tcpfseq\t((c:___ftadd@exp1)),c\n  8983  000FAC  D001               \tgoto\tu1541\n  8984  000FAE  D001               \tgoto\tu1540\n  8985  000FB0                     u1541:\n  8986  000FB0  D7F5               \tgoto\tl2658\n  8987  000FB2                     u1540:\n  8988  000FB2  D029               \tgoto\tl580\n  8989                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8990  000FB4                     l579:\n  8991                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8992  000FB4  D028               \tgoto\tl580\n  8993                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8994  000FB6                     l572:\n  8995                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  8996  000FB6                     l2662:\n  8997  000FB6  5034               \tmovf\t((c:___ftadd@exp1)),c,w\n  8998  000FB8  6033               \tcpfslt\t((c:___ftadd@exp2)),c\n  8999  000FBA  D001               \tgoto\tu1551\n  9000  000FBC  D001               \tgoto\tu1550\n  9001  000FBE                     u1551:\n  9002  000FBE  D023               \tgoto\tl580\n  9003  000FC0                     u1550:\n  9004  000FC0  D000               \tgoto\tl2664\n  9005                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9006                           \n  9007  000FC2                     l582:\n  9008                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9009                           \n  9010  000FC2                     l2664:\n  9011  000FC2  90D8               \tbcf\tstatus,0\n  9012  000FC4  3627               \trlcf\t((c:___ftadd@f1)),c\n  9013  000FC6  3628               \trlcf\t((c:___ftadd@f1+1)),c\n  9014  000FC8  3629               \trlcf\t((c:___ftadd@f1+2)),c\n  9015                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9016  000FCA  0634               \tdecf\t((c:___ftadd@exp1)),c\n  9017                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9018                           \n  9019  000FCC                     l2666:\n  9020  000FCC  5033               \tmovf\t((c:___ftadd@exp2)),c,w\n  9021  000FCE  1834               \txorwf\t((c:___ftadd@exp1)),c,w\n  9022  000FD0  B4D8               \tbtfsc\tstatus,2\n  9023  000FD2  D001               \tgoto\tu1561\n  9024  000FD4  D001               \tgoto\tu1560\n  9025  000FD6                     u1561:\n  9026  000FD6  D010               \tgoto\tl2672\n  9027  000FD8                     u1560:\n  9028                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9029  000FD8                     l2668:\n  9030  000FD8  0632               \tdecf\t((c:___ftadd@sign)),c\n  9031  000FDA  5032               \tmovf\t((c:___ftadd@sign))&0ffh,w\n  9032  000FDC  0B07               \tandlw\tlow(07h)\n  9033  000FDE  A4D8               \tbtfss\tstatus,2\n  9034  000FE0  D001               \tgoto\tu1571\n  9035  000FE2  D001               \tgoto\tu1570\n  9036  000FE4                     u1571:\n  9037  000FE4  D7EE               \tgoto\tl2664\n  9038  000FE6                     u1570:\n  9039  000FE6  D008               \tgoto\tl2672\n  9040                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9041  000FE8                     l584:\n  9042  000FE8  D007               \tgoto\tl2672\n  9043                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9044  000FEA                     l585:\n  9045                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9046  000FEA  D006               \tgoto\tl2672\n  9047                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9048  000FEC                     l587:\n  9049                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9050                           \n  9051  000FEC                     l2670:\n  9052  000FEC  90D8               \tbcf\tstatus,0\n  9053  000FEE  322C               \trrcf\t((c:___ftadd@f2+2)),c\n  9054  000FF0  322B               \trrcf\t((c:___ftadd@f2+1)),c\n  9055  000FF2  322A               \trrcf\t((c:___ftadd@f2)),c\n  9056                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9057  000FF4  2A33               \tincf\t((c:___ftadd@exp2)),c\n  9058  000FF6  D000               \tgoto\tl2672\n  9059                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9060                           \n  9061  000FF8                     l586:\n  9062                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9063                           \n  9064  000FF8                     l2672:\n  9065  000FF8  5033               \tmovf\t((c:___ftadd@exp2)),c,w\n  9066  000FFA  6234               \tcpfseq\t((c:___ftadd@exp1)),c\n  9067  000FFC  D001               \tgoto\tu1581\n  9068  000FFE  D001               \tgoto\tu1580\n  9069  001000                     u1581:\n  9070  001000  D7F5               \tgoto\tl2670\n  9071  001002                     u1580:\n  9072  001002  D001               \tgoto\tl580\n  9073                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9074  001004                     l588:\n  9075  001004  D000               \tgoto\tl580\n  9076                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9077                           \n  9078  001006                     l581:\n  9079                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9080                           \n  9081  001006                     l580:\n  9082                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9083  001006  AE32               \tbtfss\t((c:___ftadd@sign)),c,(7)&7\n  9084  001008  D001               \tgoto\tu1591\n  9085  00100A  D001               \tgoto\tu1590\n  9086  00100C                     u1591:\n  9087  00100C  D00C               \tgoto\tl589\n  9088  00100E                     u1590:\n  9089                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9090                           \n  9091  00100E                     l2674:\n  9092  00100E  0EFF               \tmovlw\tlow(0FFFFFFh)\n  9093  001010  1A27               \txorwf\t((c:___ftadd@f1)),c\n  9094  001012  0EFF               \tmovlw\thigh(0FFFFFFh)\n  9095  001014  1A28               \txorwf\t((c:___ftadd@f1+1)),c\n  9096  001016  0EFF               \tmovlw\tlow highword(0FFFFFFh)\n  9097  001018  1A29               \txorwf\t((c:___ftadd@f1+2)),c\n  9098                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9099                           \n  9100  00101A  0E01               \tmovlw\tlow(01h)\n  9101  00101C  2627               \taddwf\t((c:___ftadd@f1)),c\n  9102  00101E  0E00               \tmovlw\thigh(01h)\n  9103  001020  2228               \taddwfc\t((c:___ftadd@f1+1)),c\n  9104  001022  0E00               \tmovlw\tlow highword(01h)\n  9105  001024  2229               \taddwfc\t((c:___ftadd@f1+2)),c\n  9106                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9107                           \n  9108                           opt pagewidth 120\n  9109  001026                     l589:\n  9110                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9111                           \n  9112  001026  AC32               \tbtfss\t((c:___ftadd@sign)),c,(6)&7\n  9113  001028  D001               \tgoto\tu1601\n  9114  00102A  D001               \tgoto\tu1600\n  9115  00102C                     u1601:\n  9116  00102C  D00D               \tgoto\tl2678\n  9117  00102E                     u1600:\n  9118                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9119                           \n  9120  00102E                     l2676:\n  9121  00102E  0EFF               \tmovlw\tlow(0FFFFFFh)\n  9122  001030  1A2A               \txorwf\t((c:___ftadd@f2)),c\n  9123  001032  0EFF               \tmovlw\thigh(0FFFFFFh)\n  9124  001034  1A2B               \txorwf\t((c:___ftadd@f2+1)),c\n  9125  001036  0EFF               \tmovlw\tlow highword(0FFFFFFh)\n  9126  001038  1A2C               \txorwf\t((c:___ftadd@f2+2)),c\n  9127                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9128                           \n  9129  00103A  0E01               \tmovlw\tlow(01h)\n  9130  00103C  262A               \taddwf\t((c:___ftadd@f2)),c\n  9131  00103E  0E00               \tmovlw\thigh(01h)\n  9132  001040  222B               \taddwfc\t((c:___ftadd@f2+1)),c\n  9133  001042  0E00               \tmovlw\tlow highword(01h)\n  9134  001044  222C               \taddwfc\t((c:___ftadd@f2+2)),c\n  9135                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9136  001046  D000               \tgoto\tl2678\n  9137                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9138                           \n  9139  001048                     l590:\n  9140                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9141                           \n  9142  001048                     l2678:\n  9143  001048  6E2D               \tmovwf\t(??___ftadd+0+0)&0ffh,c\n  9144  00104A  0E00               \tmovlw\tlow(0)\n  9145  00104C  6E32               \tmovwf\t((c:___ftadd@sign)),c\n  9146  00104E  502D               \tmovf\t(??___ftadd+0+0)&0ffh,c,w\n  9147                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9148                           \n  9149  001050                     l2680:\n  9150  001050  5027               \tmovf\t((c:___ftadd@f1)),c,w\n  9151  001052  262A               \taddwf\t((c:___ftadd@f2)),c\n  9152  001054  5028               \tmovf\t((c:___ftadd@f1+1)),c,w\n  9153  001056  222B               \taddwfc\t((c:___ftadd@f2+1)),c\n  9154  001058  5029               \tmovf\t((c:___ftadd@f1+2)),c,w\n  9155  00105A  222C               \taddwfc\t((c:___ftadd@f2+2)),c\n  9156                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9157                           \n  9158                           opt pagewidth 120\n  9159  00105C                     l2682:\n  9160                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9161  00105C  AE2C               \tbtfss\t((c:___ftadd@f2+2)),c,(23)&7\n  9162  00105E  D001               \tgoto\tu1611\n  9163  001060  D001               \tgoto\tu1610\n  9164  001062                     u1611:\n  9165  001062  D011               \tgoto\tl2688\n  9166  001064                     u1610:\n  9167                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9168                           \n  9169  001064                     l2684:\n  9170  001064  0EFF               \tmovlw\tlow(0FFFFFFh)\n  9171  001066  1A2A               \txorwf\t((c:___ftadd@f2)),c\n  9172  001068  0EFF               \tmovlw\thigh(0FFFFFFh)\n  9173  00106A  1A2B               \txorwf\t((c:___ftadd@f2+1)),c\n  9174  00106C  0EFF               \tmovlw\tlow highword(0FFFFFFh)\n  9175  00106E  1A2C               \txorwf\t((c:___ftadd@f2+2)),c\n  9176                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9177                           \n  9178  001070  0E01               \tmovlw\tlow(01h)\n  9179  001072  262A               \taddwf\t((c:___ftadd@f2)),c\n  9180  001074  0E00               \tmovlw\thigh(01h)\n  9181  001076  222B               \taddwfc\t((c:___ftadd@f2+1)),c\n  9182  001078  0E00               \tmovlw\tlow highword(01h)\n  9183  00107A  222C               \taddwfc\t((c:___ftadd@f2+2)),c\n  9184                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9185                           \n  9186                           opt pagewidth 120\n  9187  00107C                     l2686:\n  9188  00107C  6E2D               \tmovwf\t(??___ftadd+0+0)&0ffh,c\n  9189  00107E  0E01               \tmovlw\tlow(01h)\n  9190  001080  6E32               \tmovwf\t((c:___ftadd@sign)),c\n  9191  001082  502D               \tmovf\t(??___ftadd+0+0)&0ffh,c,w\n  9192  001084  D000               \tgoto\tl2688\n  9193                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9194                           \n  9195  001086                     l591:\n  9196                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9197                           \n  9198  001086                     l2688:\n  9199  001086  C02A  F001         \tmovff\t(c:___ftadd@f2),(c:?___ftpack)\n  9200  00108A  C02B  F002         \tmovff\t(c:___ftadd@f2+1),(c:?___ftpack+1)\n  9201  00108E  C02C  F003         \tmovff\t(c:___ftadd@f2+2),(c:?___ftpack+2)\n  9202  001092  C034  F004         \tmovff\t(c:___ftadd@exp1),0+((c:?___ftpack)+03h)\n  9203  001096  C032  F005         \tmovff\t(c:___ftadd@sign),0+((c:?___ftpack)+04h)\n  9204  00109A  EC3A  F00D         \tcall\t___ftpack\t;wreg free\n  9205  00109E  C001  F027         \tmovff\t0+?___ftpack,(c:?___ftadd)\n  9206  0010A2  C002  F028         \tmovff\t1+?___ftpack,(c:?___ftadd+1)\n  9207  0010A6  C003  F029         \tmovff\t2+?___ftpack,(c:?___ftadd+2)\n  9208  0010AA  D000               \tgoto\tl566\n  9209                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9210  0010AC                     l2690:\n  9211                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9212                           \n  9213  0010AC                     l566:\n  9214  0010AC  0012               \treturn\n  9215                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9216                           \n  9217  0010AE                     \t__end_of___ftadd:\n  9218                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9219                           \n  9220  000808  00                 \tdb 0\t; dummy byte at the end\n  9221                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9222                           \n  9223                           opt pagewidth 120\n  9224  0000                     __activetblptr\tEQU\t2\n  9225                           opt subtitle \"HI-TECH Software Omniscient Code Generator (Lite mode) build 49521\"\n  9226                           \n  9227                           opt pagewidth 120\n  9228                           \n  9229                           \topt lm\n  9230                           \n  9231  0000                     __Lparam\tEQU\t__Lrparam\n  9232  0000                     __Hparam\tEQU\t__Hrparam\n\n\nData Sizes:\n    Strings     0\n    Constant    8\n    Data        17\n    BSS         64\n    Persistent  1\n    Stack       0\n\nAuto Spaces:\n    Space          Size  Autos    Used\n    COMRAM           95     95      95\n    BANK0           160      8      90\n    BANK1           256      0       0\n    BANK2           256      0       0\n    BANK3           256      0       0\n    BANK4           256      0       0\n    BANK5           256      0       0\n    BANK6           256      0       0\n    BANK7           256      0       0\n\nPointer List with Targets:\n\n    NULL.setpoint\tPTR float  size(2) Largest target is 0\n\n    NULL.output\tPTR float  size(2) Largest target is 0\n\n    NULL.input\tPTR float  size(2) Largest target is 0\n\n    ?___ftpack\tfloat  size(2) Largest target is 4\n\t\t -> pid_sample@time(COMRAM[4]), \n\n    ?___awdiv\tint  size(2) Largest target is 0\n\n    ?___awtoft\tfloat  size(2) Largest target is 0\n\n    ?_tc_read\tint  size(2) Largest target is 0\n\n    ?___ftdiv\tfloat  size(2) Largest target is 0\n\n    ?___lltoft\tfloat  size(2) Largest target is 0\n\n    ?___asftadd\tfloat  size(2) Largest target is 0\n\n    ?___ftmul\tfloat  size(2) Largest target is 0\n\n    ?___ftadd\tfloat  size(2) Largest target is 0\n\n    ?___ftneg\tfloat  size(2) Largest target is 0\n\n    ?_tick_get\tunsigned long  size(2) Largest target is 0\n\n    ?_tc_read_float\tfloat  size(2) Largest target is 0\n\n    ?_pid_create\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), \n\n    ?_tc_init\tstruct thermocuple_struct size(2) Largest target is 0\n\n    __asftadd@f1p\tPTR float  size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), NULL(NULL[0]), \n\n    spi_read_array@rxbuf\tPTR unsigned char  size(2) Largest target is 2\n\t\t -> tc_read@buf(COMRAM[2]), \n\n    trisptrs\tPTR volatile unsigned char [3] size(2) Largest target is 1\n\t\t -> TRISC(DATA[1]), TRISB(DATA[1]), TRISA(DATA[1]), \n\n    portptrs\tPTR volatile unsigned char [4] size(2) Largest target is 1\n\t\t -> PORTE(DATA[1]), PORTC(DATA[1]), PORTB(DATA[1]), PORTA(DATA[1]), \n\n    tc_read_float@tcpl\tPTR struct thermocuple_struct size(2) Largest target is 2\n\t\t -> sensor1(BANK0[2]), \n\n    tc_read@tcpl\tPTR struct thermocuple_struct size(2) Largest target is 2\n\t\t -> sensor1(BANK0[2]), \n\n    pid_direction@pid.setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pid_direction@pid.output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pid_direction@pid.input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pid_direction@pid\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), \n\n    pid_auto@pid.setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pid_auto@pid.output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pid_auto@pid.input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pid_auto@pid\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), NULL(NULL[0]), \n\n    pid_limits@pid.setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pid_limits@pid.output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pid_limits@pid.input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pid_limits@pid\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), NULL(NULL[0]), \n\n    pid_sample@pid.setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pid_sample@pid.output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pid_sample@pid.input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pid_tune@pid.setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pid_tune@pid.output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pid_tune@pid.input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pid_tune@pid\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), \n\n    pid_compute@pid.setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pid_compute@pid.output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pid_compute@pid.input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pid_compute@pid\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), NULL(NULL[0]), \n\n    pid_create@set\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pid_create@out\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pid_create@pid.setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pid_create@pid.output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pid_create@pid.input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pid_create@in\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pid_create@pid\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), \n\n    sp__pid_create\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), \n\n    pid\tPTR struct pid_controller size(2) Largest target is 40\n\t\t -> pidctrl(BANK0[37]), NULL(NULL[0]), \n\n    S24pid_controller$setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    pidctrl.setpoint\tPTR float  size(2) Largest target is 3\n\t\t -> set(BANK0[3]), \n\n    S24pid_controller$output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    pidctrl.output\tPTR float  size(2) Largest target is 3\n\t\t -> out(BANK0[3]), \n\n    S24pid_controller$input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n    pidctrl.input\tPTR float  size(2) Largest target is 3\n\t\t -> in(BANK0[3]), \n\n\nCritical Paths under _main in COMRAM\n\n    _main->_pid_compute\n    _spi_init->_spi_control\n    _tc_init->_io_write\n    _tc_init->_io_mode\n    _pid_create->_pid_tune\n    _pid_limits->___ftge\n    _pid_auto->___ftge\n    _tc_read_float->_tc_read\n    _pid_compute->___asftadd\n    _pid_direction->___ftneg\n    _pid_tune->___ftmul\n    _io_mode->___awdiv\n    _tc_read->___ftmul\n    _io_write->___awdiv\n    _spi_read_array->_spi_available\n    ___awtoft->_io_write\n    ___ftdiv->___lltoft\n    ___ftmul->___awtoft\n    ___ftneg->___ftpack\n    ___lltoft->___ftpack\n    ___asftadd->___ftadd\n    ___ftadd->___ftmul\n\nCritical Paths under _main in BANK0\n\n    None.\n\nCritical Paths under _main in BANK1\n\n    None.\n\nCritical Paths under _main in BANK2\n\n    None.\n\nCritical Paths under _main in BANK3\n\n    None.\n\nCritical Paths under _main in BANK4\n\n    None.\n\nCritical Paths under _main in BANK5\n\n    None.\n\nCritical Paths under _main in BANK6\n\n    None.\n\nCritical Paths under _main in BANK7\n\n    None.\n\nCall Graph Tables:\n\n ---------------------------------------------------------------------------------\n (Depth) Function   \t        Calls       Base Space   Used Autos Params    Refs\n ---------------------------------------------------------------------------------\n (0) _main                                                13     8      5   11094\n                                             90 COMRAM     5     0      5\n                                              0 BANK0      8     8      0\n                           _spi_init\n                        _spi_control\n                            _tc_init\n                         _pid_create\n                         _pid_limits\n                           _pid_auto\n                           _tick_get\n                      _tc_read_float\n                        _pid_compute\n ---------------------------------------------------------------------------------\n (1) _spi_init                                             1     0      1     221\n                                             14 COMRAM     1     0      1\n                        _spi_control\n ---------------------------------------------------------------------------------\n (1) _tc_init                                              5     3      2    1296\n                                             16 COMRAM     5     3      2\n                           _io_write\n                            _io_mode\n                        _spi_control\n                           _spi_open\n ---------------------------------------------------------------------------------\n (2) _spi_control                                         14     5      9     155\n                                              0 COMRAM    14     5      9\n ---------------------------------------------------------------------------------\n (1) _pid_create                                          25     8     17    3069\n                                             52 COMRAM    25     8     17\n                         _pid_limits\n                      _pid_direction\n                           _pid_tune\n                           _tick_get\n ---------------------------------------------------------------------------------\n (1) _pid_limits                                          10     2      8     642\n                                              9 COMRAM    10     2      8\n                             ___ftge\n ---------------------------------------------------------------------------------\n (1) _pid_auto                                             4     2      2     444\n                                              9 COMRAM     4     2      2\n                             ___ftge\n ---------------------------------------------------------------------------------\n (1) _tc_read_float                                        3     0      3    1543\n                                             43 COMRAM     3     0      3\n                            _tc_read\n                           ___awtoft\n                            ___ftmul\n ---------------------------------------------------------------------------------\n (1) _pid_compute                                         33    31      2    3724\n                                             57 COMRAM    33    31      2\n                           _tick_get\n                            ___ftneg\n                            ___ftadd\n                            ___ftmul\n                          ___asftadd\n                             ___ftge\n ---------------------------------------------------------------------------------\n (2) _tick_get                                             4     0      4       0\n                                              0 COMRAM     4     0      4\n                 _tick_read_internal\n ---------------------------------------------------------------------------------\n (3) _tick_read_internal                                   0     0      0       0\n ---------------------------------------------------------------------------------\n (2) _pid_direction                                        3     0      3     287\n                                             11 COMRAM     3     0      3\n                            ___ftneg\n ---------------------------------------------------------------------------------\n (2) _pid_tune                                            14     3     11    1766\n                                             38 COMRAM    14     3     11\n                           ___lltoft\n                            ___ftdiv\n                            ___ftmul\n                            ___ftneg\n ---------------------------------------------------------------------------------\n (2) _io_mode                                              7     5      2     481\n                                              9 COMRAM     7     5      2\n                            ___awdiv\n ---------------------------------------------------------------------------------\n (2) _spi_open                                             2     1      1       0\n                                              0 COMRAM     2     1      1\n ---------------------------------------------------------------------------------\n (2) _tc_read                                              5     3      2     686\n                                             38 COMRAM     5     3      2\n                           _io_write\n                     _spi_read_array\n                           ___awtoft (ARG)\n                            ___ftmul (ARG)\n ---------------------------------------------------------------------------------\n (3) _io_write                                             7     5      2     481\n                                              9 COMRAM     7     5      2\n                            ___awdiv\n ---------------------------------------------------------------------------------\n (3) _spi_read_array                                       5     0      5      68\n                                              1 COMRAM     5     0      5\n                      _spi_available\n ---------------------------------------------------------------------------------\n (4) _spi_available                                        1     0      1       0\n                                              0 COMRAM     1     0      1\n ---------------------------------------------------------------------------------\n (4) ___awdiv                                              9     5      4     300\n                                              0 COMRAM     9     5      4\n ---------------------------------------------------------------------------------\n (2) ___awtoft                                             5     2      3     300\n                                             16 COMRAM     5     2      3\n                           ___ftpack\n                           _io_write (ARG)\n                     _spi_read_array (ARG)\n ---------------------------------------------------------------------------------\n (3) ___ftdiv                                             17    11      6     489\n                                             17 COMRAM    17    11      6\n                           ___ftpack\n                           ___lltoft (ARG)\n ---------------------------------------------------------------------------------\n (2) ___ftge                                               9     3      6     136\n                                              0 COMRAM     9     3      6\n ---------------------------------------------------------------------------------\n (2) ___ftmul                                             17    11      6     535\n                                             21 COMRAM    17    11      6\n                           ___ftpack\n                           ___awtoft (ARG)\n                           _io_write (ARG)\n                     _spi_read_array (ARG)\n                            ___ftneg (ARG)\n ---------------------------------------------------------------------------------\n (2) ___ftneg                                              3     0      3      45\n                                              8 COMRAM     3     0      3\n                           ___ftpack (ARG)\n ---------------------------------------------------------------------------------\n (3) ___lltoft                                             9     5      4     278\n                                              8 COMRAM     9     5      4\n                           ___ftpack\n ---------------------------------------------------------------------------------\n (4) ___ftpack                                             8     3      5     209\n                                              0 COMRAM     8     3      5\n ---------------------------------------------------------------------------------\n (2) ___asftadd                                            5     0      5    1115\n                                             52 COMRAM     5     0      5\n                            ___ftadd\n                            ___ftmul (ARG)\n ---------------------------------------------------------------------------------\n (3) ___ftadd                                             14     8      6    1049\n                                             38 COMRAM    14     8      6\n                           ___ftpack\n                            ___ftneg (ARG)\n                            ___ftmul (ARG)\n ---------------------------------------------------------------------------------\n Estimated maximum stack depth 4\n ---------------------------------------------------------------------------------\n\n Call Graph Graphs:\n\n _main (ROOT)\n   _spi_init\n     _spi_control\n   _spi_control\n   _tc_init\n     _io_write\n       ___awdiv\n     _io_mode\n       ___awdiv\n     _spi_control\n     _spi_open\n   _pid_create\n     _pid_limits\n       ___ftge\n     _pid_direction\n       ___ftneg\n         ___ftpack (ARG)\n     _pid_tune\n       ___lltoft\n         ___ftpack\n       ___ftdiv\n         ___ftpack\n         ___lltoft (ARG)\n           ___ftpack\n       ___ftmul\n         ___ftpack\n         ___awtoft (ARG)\n           ___ftpack\n           _io_write (ARG)\n             ___awdiv\n           _spi_read_array (ARG)\n             _spi_available\n         _io_write (ARG)\n           ___awdiv\n         _spi_read_array (ARG)\n           _spi_available\n         ___ftneg (ARG)\n           ___ftpack (ARG)\n       ___ftneg\n         ___ftpack (ARG)\n     _tick_get\n       _tick_read_internal\n   _pid_limits\n     ___ftge\n   _pid_auto\n     ___ftge\n   _tick_get\n     _tick_read_internal\n   _tc_read_float\n     _tc_read\n       _io_write\n         ___awdiv\n       _spi_read_array\n         _spi_available\n       ___awtoft (ARG)\n         ___ftpack\n         _io_write (ARG)\n           ___awdiv\n         _spi_read_array (ARG)\n           _spi_available\n       ___ftmul (ARG)\n         ___ftpack\n         ___awtoft (ARG)\n           ___ftpack\n           _io_write (ARG)\n             ___awdiv\n           _spi_read_array (ARG)\n             _spi_available\n         _io_write (ARG)\n           ___awdiv\n         _spi_read_array (ARG)\n           _spi_available\n         ___ftneg (ARG)\n           ___ftpack (ARG)\n     ___awtoft\n       ___ftpack\n       _io_write (ARG)\n         ___awdiv\n       _spi_read_array (ARG)\n         _spi_available\n     ___ftmul\n       ___ftpack\n       ___awtoft (ARG)\n         ___ftpack\n         _io_write (ARG)\n           ___awdiv\n         _spi_read_array (ARG)\n           _spi_available\n       _io_write (ARG)\n         ___awdiv\n       _spi_read_array (ARG)\n         _spi_available\n       ___ftneg (ARG)\n         ___ftpack (ARG)\n   _pid_compute\n     _tick_get\n       _tick_read_internal\n     ___ftneg\n       ___ftpack (ARG)\n     ___ftadd\n       ___ftpack\n       ___ftneg (ARG)\n         ___ftpack (ARG)\n       ___ftmul (ARG)\n         ___ftpack\n         ___awtoft (ARG)\n           ___ftpack\n           _io_write (ARG)\n             ___awdiv\n           _spi_read_array (ARG)\n             _spi_available\n         _io_write (ARG)\n           ___awdiv\n         _spi_read_array (ARG)\n           _spi_available\n         ___ftneg (ARG)\n           ___ftpack (ARG)\n     ___ftmul\n       ___ftpack\n       ___awtoft (ARG)\n         ___ftpack\n         _io_write (ARG)\n           ___awdiv\n         _spi_read_array (ARG)\n           _spi_available\n       _io_write (ARG)\n         ___awdiv\n       _spi_read_array (ARG)\n         _spi_available\n       ___ftneg (ARG)\n         ___ftpack (ARG)\n     ___asftadd\n       ___ftadd\n         ___ftpack\n         ___ftneg (ARG)\n           ___ftpack (ARG)\n         ___ftmul (ARG)\n           ___ftpack\n           ___awtoft (ARG)\n             ___ftpack\n             _io_write (ARG)\n               ___awdiv\n             _spi_read_array (ARG)\n               _spi_available\n           _io_write (ARG)\n             ___awdiv\n           _spi_read_array (ARG)\n             _spi_available\n           ___ftneg (ARG)\n             ___ftpack (ARG)\n       ___ftmul (ARG)\n         ___ftpack\n         ___awtoft (ARG)\n           ___ftpack\n           _io_write (ARG)\n             ___awdiv\n           _spi_read_array (ARG)\n             _spi_available\n         _io_write (ARG)\n           ___awdiv\n         _spi_read_array (ARG)\n           _spi_available\n         ___ftneg (ARG)\n           ___ftpack (ARG)\n     ___ftge\n\n Address spaces:\nName               Size   Autos  Total    Cost      Usage\nBIGRAM             7FF      0       0      21        0.0%\nEEDATA             100      0       0       0        0.0%\nBITBANK7           100      0       0      18        0.0%\nBANK7              100      0       0      19        0.0%\nBITBANK6           100      0       0      16        0.0%\nBANK6              100      0       0      17        0.0%\nBITBANK5           100      0       0      14        0.0%\nBANK5              100      0       0      15        0.0%\nBITBANK4           100      0       0      12        0.0%\nBANK4              100      0       0      13        0.0%\nBITBANK3           100      0       0      10        0.0%\nBANK3              100      0       0      11        0.0%\nBITBANK2           100      0       0       8        0.0%\nBANK2              100      0       0       9        0.0%\nBITBANK1           100      0       0       6        0.0%\nBANK1              100      0       0       7        0.0%\nBITBANK0            A0      0       0       4        0.0%\nBANK0               A0      8      5A       5       56.3%\nBITCOMRAM           5F      0       0       0        0.0%\nCOMRAM              5F     5F      5F       1      100.0%\nBITSFR               0      0       0      40        0.0%\nSFR                  0      0       0      40        0.0%\nSTACK                0      0       4       2        0.0%\nNULL                 0      0       0       0        0.0%\nABS                  0      0      B9      20        0.0%\nDATA                 0      0      BD       3        0.0%\nCODE                 0      0       0       0        0.0%\n\n\nMicrochip Technology PIC18 Macro Assembler V1.12 build 49521 \nSymbol Table                                                                                   Thu Aug 14 17:09:40 2014\n\n               ___asftadd@f2 0037                ___asftadd@f1p 0035                  _SSPSTATbits 000FC7  \n                         l40 1442                           l41 1444                           l42 1444  \n                         l71 21EC                           l39 1390                           l72 2212  \n                         l64 2256                           l73 2214                           l90 09D2  \n                         l91 0A38                           l92 0A36                           l84 16E8  \n                         l93 0B82                           l94 0BCC                           l95 0BCC  \n                         l87 0824                           l88 0C2C                           l89 0C2C  \n                         l98 1100                 ___awdiv@sign 0007                           _in 0098  \n                __CFG_BORV$3 000000        __end_of_tc_read_float 2178                pid_create@pid 0035  \n               __CFG_CP0$OFF 000000                pid_create@set 003B                 __CFG_CP1$OFF 000000  \n              pid_create@out 0039                 __CFG_CP2$OFF 000000                 __CFG_CP3$OFF 000000  \n               ___ftadd@exp1 0034                 ___ftadd@exp2 0033                 ___ftadd@sign 0032  \n                        l100 10FE                          l101 1286                          l102 1286  \n                        l110 0E72                          l111 0E72                          l120 15A2  \n                        l112 0D20                          l121 152A                          l113 0DA6  \n                        l122 1590                          l114 0DA4                          l210 1854  \n                        l202 20B8                          l123 158E                          l115 0E0A  \n                        l211 188E                          l203 20EC                          l124 15A2  \n                        l116 0E70                          l220 18E6                          l212 186A  \n                        l117 0E6E                          l109 0C56                          l221 1954  \n                        l213 188C                          l141 205A                          l222 18EC  \n                        l214 1880                          l206 1836                          l127 1C34  \n                        l223 18F2                          l215 188A                          l207 1954  \n                        l400 1C7E                          l144 1F64                          l128 1C44  \n                        l224 18F8                          l216 18E4                          l208 189E  \n                        l401 1CE2                          l145 1F88                          l225 18FE  \n                        l217 1890                          l209 183E                          l402 1CA6  \n                        l218 189A                          l403 1C9C                          l171 1D68  \n                        l219 1902                          l404 1CB0                          l260 2132  \n                        l228 2268                          l172 1D80                          l148 2176  \n                        l405 1CB2                          l261 2132                          l173 1DA8  \n                        l406 1CD4                          l407 1CE0                          l255 2124  \n                        l600 1A3E                          l408 1CF6                          l256 20F0  \n                        l176 1E10                          l601 1A4C                          l433 207E  \n                        l409 1D00                          l257 20F8                          l177 1E28  \n                        l530 1AA0                          l434 20A6                          l258 20F6  \n                        l178 1E50                          l531 1ACE                          l611 1728  \n                        l259 210C                          l532 1AE8                          l700 1FCC  \n                        l612 1826                          l604 1E88                          l533 1AD0  \n                        l525 1A9E                          l701 1FF6                          l613 1766  \n                        l605 1EBE                          l534 1B0A                          l622 2232  \n                        l614 179E                          l606 1EF4                          l535 1B18  \n                        l527 1A8E                          l623 223E                          l615 17B4  \n                        l279 228A                          l536 1B0C                          l528 1B60  \n                        l616 17CA                          l537 1B20                          l529 1AAC  \n                        l617 17D4                          l570 0F40                          l538 1B2C  \n                        l618 17EA                          l571 0F4A                          l563 0EF6  \n                        l539 1B52                          l619 1800                          l572 0FB6  \n                        l580 1006                          l804 21B4                          l581 1006  \n                        l573 0F72                          l565 0EE8                          l590 1048  \n                        l582 0FC2                          l566 10AC                          l591 1086  \n                        l575 0F98                          l567 0F2C                          l399 1C68  \n                        l584 0FE8                          l576 0F9A                          l585 0FEA  \n                        l577 0FA8                          l569 0F1E                          l586 0FF8  \n                        l578 0F9C                          l587 0FEC                          l579 0FB4  \n                        l588 1004                          l596 1994                          l589 1026  \n                        l597 1A72                          l598 19D2                          l599 1A14  \n                        l698 1FA2                          l699 1F94                 __CFG_CPB$OFF 000000  \n               __CFG_CPD$OFF 000000                          u950 1832                          u951 1830  \n                        u960 184A                          u961 1848                          u970 1860  \n                        u971 185E                          u980 1876                          u981 1874  \n                        u990 2212                          u991 2210                 __CFG_BOR$OFF 000000  \n                        _pid 006E                          _set 00AE                          _spi 00B9  \n                        _out 009B                          fsr2 000FD9                          prod 000FF3  \n                        wreg 000FE8                 __CFG_LVP$OFF 000000                 ___ftdiv@cntr 001D  \n               ___ftdiv@sign 0022                 __CFG_WDT$OFF 000000                         l3010 18CA  \n                       l3012 1924                         l2300 184A                         l3014 194A  \n                       l3006 18C0                         l2310 1880                         l2302 1854  \n                       l3016 192E                         l3008 18DA                         l2312 1890  \n                       l2304 1860                         l2320 1902                         l2314 189C  \n                       l2306 186A                         l2420 1A8E                         l2500 1E90  \n                       l2308 1876                         l2316 189E                         l2430 1AD2  \n                       l2422 1A9C                         l2510 1EF4                         l2502 1EBE  \n                       l2318 1900                         l2440 1B2C                         l2432 1AE8  \n                       l2424 1AA0                         l2416 1A74                         l2504 1ECA  \n                       l2600 20F8                         l2344 2258                         l2520 20C0  \n                       l2512 20A8                         l2442 1B44                         l2434 1B0C  \n                       l2426 1AAC                         l2418 1A7E                         l2290 1EF2  \n                       l2506 1EEA                         l2610 205C                         l2450 1C46  \n                       l2602 210C                         l2346 2264                         l2530 0C56  \n                       l2522 20E8                         l2514 20B2                         l2444 1B4E  \n                       l2436 1B18                         l2428 1AD0                         l2700 1FA2  \n                       l2508 1EEE                         l2620 20A6                         l2612 2064  \n                       l2460 1C70                         l2452 1C4E                         l2372 227C  \n                       l2604 2118                         l2348 2268                         l2540 0DA6  \n                       l2532 0C9C                         l2292 1828                         l2524 20EC  \n                       l2516 20B6                         l2630 0EF6                         l2622 0E74  \n                       l2446 1B52                         l2438 1B28                         l2702 1FCC  \n                       l2614 206C                         l2470 1C9C                         l2462 1C78  \n                       l2454 1C56                         l2374 228A                         l2606 211C  \n                       l2550 145E                         l2542 0DE2                         l2534 0CE8  \n                       l2526 0C2E                         l2294 1834                         l2710 2040  \n                       l2518 20B8                         l2640 0F3C                         l2632 0F00  \n                       l2624 0EC0                         l2448 1B60                         l2704 1FF6  \n                       l2800 17A6                         l2288 1EEE                         l2616 2074  \n                       l2480 1CD0                         l2472 1CA6                         l2464 1C7E  \n                       l2456 1C5E                         l2608 2124                         l2720 1B62  \n                       l2560 1590                         l2552 14C6                         l2544 0E0A  \n                       l2536 0D20                         l2528 0C54                         l2296 1836  \n                       l2712 2048                         l2650 0F66                         l2642 0F40  \n                       l2634 0F0A                         l2626 0ECA                         l2810 17DC  \n                       l2802 17B4                         l2730 1984                         l2618 207E  \n                       l2490 1CF6                         l2482 1CD4                         l2474 1CB2  \n                       l2466 1C86                         l2458 1C68                         l2570 1DC0  \n                       l2722 1B78                         l2562 2240                         l2554 1502  \n                       l2546 0E46                         l2538 0D6C                         l2298 183E  \n                       l2714 204C                         l2706 1FF8                         l2660 0FA8  \n                       l2652 0F72                         l2644 0F48                         l2636 0F2C  \n                       l2628 0ED4                         l2820 2178                         l2812 17EA  \n                       l2804 17C4                         l2740 19D2                         l2732 1992  \n                       l2492 1D00                         l2484 1CDA                         l2476 1CB8  \n                       l2468 1C92                         l2580 1E28                         l2572 1DC6  \n                       l2724 1B90                         l2564 2244                         l2556 152A  \n                       l2548 1448                         l2900 15A4                         l2716 2050  \n                       l2708 2018                         l2670 0FEC                         l2654 0F7C  \n                       l2662 0FB6                         l2646 0F4C                         l2638 0F34  \n                       l2822 21B4                         l2814 17FA                         l2806 17CA  \n                       l2494 1E52                         l2750 19F0                         l2742 19DE  \n                       l2734 1994                         l2478 1CC8                         l2486 1CE2  \n                       l2574 1DEE                         l2590 1D4E                         l2582 1D02  \n                       l2726 1C34                         l2566 2256                         l2830 0838  \n                       l2558 1566                         l2910 1610                         l2902 15B4  \n                       l2718 205A                         l2680 1050                         l2672 0FF8  \n                       l2664 0FC2                         l2656 0F88                         l2648 0F5A  \n                       l2816 1800                         l2808 17D4                         l2496 1E5A  \n                       l2760 1A1C                         l2752 19F2                         l2744 19E4  \n                       l2736 19C2                         l2728 1956                         l2488 1CEC  \n                       l2576 1DF6                         l2568 1DAA                         l2592 1D68  \n                       l2584 1D18                         l2840 09AA                         l2832 08B2  \n                       l2824 080A                         l2920 16E8                         l2912 1630  \n                       l2904 15C8                         l2690 10AC                         l2682 105C  \n                       l2674 100E                         l2666 0FCC                         l2658 0F9C  \n                       l2818 1826                         l2498 1E88                         l2770 1A72  \n                       l2762 1A30                         l2754 19FE                         l2746 19E8  \n                       l2738 19D0                         l2578 1E10                         l2594 1D80  \n                       l2586 1D1E                         l2850 0B04                         l2842 09D2  \n                       l2834 08D6                         l2826 0822                         l2922 2134  \n                       l2914 1644                         l2906 15DC                         l2930 12E2  \n                       l2684 1064                         l2676 102E                         l2668 0FD8  \n                       l2692 2216                         l2780 1756                         l2772 16EA  \n                       l2764 1A3C                         l2756 1A00                         l2748 19EC  \n                       l2596 20EE                         l2588 1D46                         l2860 0C2A  \n                       l2852 0B38                         l2844 0A0E                         l2836 092A  \n                       l2828 0824                         l2924 2176                         l2916 1674  \n                       l2908 15EC                         l2940 1404                         l2932 12FE  \n                       l2686 107C                         l2678 1048                         l2694 2226  \n                       l2790 177A                         l2782 1764                         l2774 1718  \n                       l2766 1A46                         l2758 1A0C                         l2598 20F0  \n                       l2870 1148                         l2862 10AE                         l2854 0B68  \n                       l2846 0A38                         l2838 096E                         l2918 16DE  \n                       l2942 1418                         l2934 135E                         l2926 1288  \n                       l2688 1086                         l2696 1F8A                         l2792 177C  \n                       l2784 1766                         l2776 1726                         l2768 1A4C  \n                       l2880 1EF6                         l2872 1160                         l2864 10C8  \n                       l2856 0B82                         l2848 0A7C                         l2944 1434  \n                       l2936 1382                         l2928 12C6                         l2698 1F94  \n                       l2794 1788                         l2786 176C                         l2778 1728  \n                       l2890 1F5E                         l2882 1EFE                         l2874 1196  \n                       l2866 10E2                         l2858 0BB2                         l2938 1390  \n                       l2796 1794                         l2788 1778                         l2892 1F64  \n                       l2884 1F1A                         l2876 11CC                         l2868 1100  \n                       l2798 179E                         l2894 1F6C                         l2886 1F3A  \n                       l2878 11E2                         l2896 1F7E                         l2888 1F56  \n                       l2898 1F88                pid_compute@in 0055                         u1100 1A7E  \n                       u1101 1A7C                         u1110 1A8C                         u1030 2286  \n                       u1111 1A8A                         u1031 2282                         u1120 1ACC  \n                       u1200 1CAE                         u1121 1ACA                         u1201 1CAC  \n                       u1130 1B08                         u1210 1CC8                         u1131 1B06  \n                       u1211 1CC6                         u1140 1B20                         u1220 1CEC  \n                       u1036 2288                         u1300 0D6C                         u1141 1B1E  \n                       u1221 1CEA                         u1301 0D6A                         u1150 1B28  \n                       u1230 1E5A                         u1310 0DE2                         u1151 1B26  \n                       u1231 1E58                         u1311 0DE0                         u1160 1B4E  \n                       u1240 1E90                         u1400 206C                         u1320 0E46  \n                       u1161 1B4C                         u1241 1E8E                         u1401 206A  \n                       u1321 0E44                         u1410 0E92                         u1250 1EEA  \n                       u1170 1C56                         u1330 145E                         u1251 1EE8  \n                       u1171 1C54                         u1331 145C                         u1500 0F48  \n                       u1420 0EB8                         u1180 1C70                         u1340 1502  \n                       u1260 20B2                         u1501 0F46                         u1181 1C6E  \n                       u1341 1500                         u1261 20B0                         u1510 0F70  \n                       u1430 0ECA                         u1190 1C92                         u1350 1566  \n                       u1270 0C52                         u1511 0F6E                         u1431 0EC8  \n                       u1415 0E8A                         u1191 1C90                         u1351 1564  \n                       u1271 0C50                         u1600 102E                         u1520 0F88  \n                       u1440 0ED4                         u1360 1DF6                         u1280 0C9C  \n                       u1601 102C                         u1521 0F86                         u1441 0ED2  \n                       u1425 0EB0                         u1361 1DF4                         u1281 0C9A  \n                       u1610 1064                         u1530 0F96                         u1450 0EE8  \n                       u1370 1D4E                         u1290 0CE8                         u1611 1062  \n                       u1531 0F94                         u1451 0EE6                         u1371 1D4C  \n                       u1291 0CE6                         u1540 0FB2                         u1460 0F00  \n                       u1620 2226                         u1700 1A30                         u1380 210A  \n                       u1541 0FB0                         u1461 0EFE                         u1621 2224  \n                       u1701 1A2E                         u1381 2108                         u1550 0FC0  \n                       u1470 0F0A                         u1630 1FCA                         u1710 1708  \n                       u1390 2130                         u1551 0FBE                         u1471 0F08  \n                       u1631 1FC8                         u1391 212E                         u1560 0FD8  \n                       u1480 0F1E                         u1720 1718                         u1640 1B78  \n                       u1800 0A0E                         u1561 0FD6                         u1481 0F1C  \n                       u1721 1716                         u1641 1B76                         u1801 0A0C  \n                       u1570 0FE6                         u1490 0F3C                         u1730 1746  \n                       u1650 1B90                         u1810 0B68                         u1571 0FE4  \n                       u1491 0F3A                         u1715 1700                         u1651 1B8E  \n                       u1811 0B66                         u1580 1002                         u1740 1756  \n                       u1660 1974                         u1820 0BB2                         u1581 1000  \n                       u1741 1754                         u1821 0BB0                         u1590 100E  \n                       u1750 17A6                         u1670 1984                         u1830 10C8  \n                       u1591 100C                         u1751 17A4                         u1735 173E  \n                       u1671 1982                         u1831 10C6                         u1760 17DC  \n                       u1680 19B2                         u1840 10E2                         u1761 17DA  \n                       u1665 196C                         u1841 10E0                         u1690 19C2  \n                       u1850 10FC                         u1770 0820                         u1691 19C0  \n                       u1851 10FA                         u1835 10C0                         u1771 081E  \n                       u1860 11E2                         u1780 08B2                         u1685 19AA  \n                       u1861 11E0                         u1845 10DA                         u1781 08B0  \n                       u1870 1F5E                         u1790 09AA                         u1871 1F5C  \n                       u1855 10F4                         u1791 09A8                         u1880 1404  \n                       u1881 1402            spi_available@spid 0001                         _main 1288  \n          spi_read_array@len 0005                         _mask 0800                 ___ftpack@arg 0001  \n               ___ftpack@exp 0004                         fsr1h 000FE2                         fsr2h 000FDA  \n                       fsr1l 000FE1                         indf2 000FDF                         fsr2l 000FD9  \n                       prodh 000FF4                         prodl 000FF3                         start 0000  \n              __CFG_IESO$OFF 000000                __CFG_MCLRE$ON 000000                 ___ftmul@cntr 0025  \n               ___ftmul@sign 0026             _pid_compute$1330 004B                 spi_open@spid 0001  \n              __CFG_PLLDIV$1 000000                pid_limits@max 000F                pid_limits@min 000C  \n              pid_limits@pid 000A                        ?_main 005B              ??_spi_available 0002  \n            __end_of___awdiv 1D02              __end_of___ftadd 10AE              __end_of___ftdiv 1A74  \n            __end_of___ftneg 2240               pid_compute@pid 003A              __end_of___ftmul 1828  \n                      _T0CON 000FD5              ___awdiv@divisor 0003               pid_compute@now 004E  \n             pid_compute@out 0058              ___awdiv@counter 0006                        _TMR0H 000FD7  \n                      _TMR0L 000FD6                        _PORTA 000F80                        _PORTB 000F81  \n                      _PORTC 000F82                        _PORTE 000F84                __CFG_USBDIV$1 000000  \n                      _TRISA 000F92                        _TRISB 000F93                        _TRISC 000F94  \n              __CFG_PWRT$OFF 000000                __CFG_WRT0$OFF 000000                __CFG_WRT1$OFF 000000  \n              __CFG_WRT2$OFF 000000                __CFG_WRT3$OFF 000000                 ___lltoft@exp 0011  \n             __CFG_EBTR0$OFF 000000               __CFG_FCMEN$OFF 000000               __CFG_EBTR1$OFF 000000  \n             __CFG_EBTR2$OFF 000000               __CFG_EBTR3$OFF 000000                __CFG_WRTB$OFF 000000  \n              __CFG_WRTC$OFF 000000                __CFG_WRTD$OFF 000000               __CFG_EBTRB$OFF 000000  \n              ___awtoft@sign 0015              __end_of_io_mode 1DAA           spi_read_array@spid 0002  \n                      _inuse 0072                ___ftpack@sign 0005              __end_of_tc_init 205C  \n            __end_of_tc_read 1F8A  __size_of_tick_read_internal 002A                 ?_pid_compute 003A  \n                      tablat 000FF5                        status 000FD8              __initialization 21B6  \n               __end_of_main 1448                 __end_of_mask 0808                  io_mode@port 000F  \n     pid_direction@direction 000E                       ??_main 00B1                __activetblptr 000002  \n           pid_direction@pid 000C              __CFG_CCP2MX$OFF 000000             ___awdiv@dividend 0001  \n           __end_of___awtoft 20A8             __end_of___ftpack 1B62             __end_of___lltoft 1FF8  \n                     _SSPBUF 000FC9               __CFG_VREGEN$ON 000000               spi_control@arg 0006  \n             __CFG_XINST$OFF 000000                       ___ftge 1E52                  io_write@pin 000A  \n                io_write@now 000E                  io_write@num 0010                    ??___awdiv 0005  \n                  ??___ftadd 002D               __CFG_STVREN$ON 000000                    ??___ftdiv 0018  \n                  ??___ftneg 000C                    ??___ftmul 001C             __end_of_io_write 1E52  \n                     clear_0 21BC             ___awdiv@quotient 0008          spi_read_array@rxbuf 0003  \n           __end_of_pid_auto 15A4             __end_of_pid_tune 1288        ___ftmul@f3_as_product 0022  \n                  ??_io_mode 000C             __end_of_tick_get 2258                    ??_tc_init 0013  \n                  ??_tc_read 0029                 __mediumconst 0000                       tblptrh 000FF7  \n                     tblptrl 000FF6                       tblptru 000FF8             __end_of_spi_init 20EE  \n           __end_of_spi_open 226A             ??_spi_read_array 0007                 ?_spi_control 0001  \n         __size_of___asftadd 003E              __CFG_FOSC$EC_EC 000000                   __accesstop 0060  \n    __end_of__initialization 21E2              __CFG_PBADEN$OFF 000000                   ___ftadd@f1 0027  \n                 ___ftadd@f2 002A                   ___ftge@ff1 0001                   ___ftge@ff2 0004  \n                 ___ftdiv@f1 0012                   ___ftdiv@f2 0015                   ___ftdiv@f3 001E  \n                pid_auto@pid 000A                   ___ftneg@f1 0009                   ___awtoft@c 0011  \n                 ___ftmul@f1 0016                   ___ftmul@f2 0019               __pcstackCOMRAM 0001  \n               __pidataBANK0 226A                   ___lltoft@c 0009       __size_of_pid_direction 00E4  \n               io_mode@value 000B                  pid_tune@pid 0027                  tc_init@tcpl 0014  \n                tc_init@spid 0011                  tc_read@tcpl 0027                   __pbssBANK0 0060  \n       __size_of_pid_compute 0424                      ?___ftge 0001            __end_of___asftadd 21B6  \n                  ?___awtoft 0011                    ?___ftpack 0001                    ?___lltoft 0009  \n           pid_compute@error 0052                      _SSPCON1 000FC6                _pid_direction 1B62  \n                    _SSPSTAT 000FC7                    ?_io_write 000A                    ?_pid_auto 000A  \n     __size_of_tc_read_float 0044                    ?_pid_tune 0027              spi_control@ctrl 0002  \n            spi_control@spid 0001                      __Hparam 0000                      __Lparam 0000  \n                  ?_tick_get 0001                    ?_spi_init 000F              __size_of___ftge 00A4  \n                  ?_spi_open 0001                      ___awdiv 1C46                      ___ftadd 0E74  \n                    ___ftdiv 1956                      ___ftneg 2216                      ___ftmul 16EA  \n               io_write@port 000F                 __psmallconst 0800                      __pcinit 21B6  \n                 ??___awtoft 0014                   ??___ftpack 0006              spi_init@eModule 000F  \n                    __ramtop 0800                   ??___lltoft 000D                      __ptext0 1288  \n                    __ptext1 20A8                      __ptext2 1FF8                      __ptext3 1828  \n                    __ptext4 15A4                      __ptext5 0C2E                      __ptext6 1448  \n                    __ptext7 2134                      __ptext8 080A                      __ptext9 2240  \n                 _pid_create 15A4                      _io_mode 1D02                   _pid_limits 0C2E  \n                    _lastrun 0066        __end_of_spi_available 228C                      _tc_init 1FF8  \n                    _pidctrl 0073                      _tc_read 1EF6                      _tickcnt 006A  \n                    _sensor1 009E                      _sensor2 0070   __end_of_tick_read_internal 2216  \n             ?_pid_direction 000C         end_of_initialization 21E2                   ??_io_write 000C  \n              __Lmediumconst 0000         __size_of_spi_control 012E                   ??_pid_auto 000C  \n                 ??_pid_tune 0032                   ??_tick_get 0005                   _tickbuffer 0060  \n                    postdec1 000FE5                      postdec2 000FDD                   ??_spi_init 0010  \n                    postinc0 000FEE                      postinc1 000FE6                      postinc2 000FDE  \n                 ??_spi_open 0002                _tc_read_float 2134                 pid_create@kd 0043  \n               pid_create@ki 0040                 pid_create@in 0037                 pid_create@kp 003D  \n                ___ftdiv@exp 0021                  ___ftmul@exp 0021               __end_of___ftge 1EF6  \n             ?_tc_read_float 002C                  ?_pid_create 0035                  ?_pid_limits 000A  \n        start_initialization 21B6              ??_pid_direction 000F                   io_mode@pin 000A  \n                 io_mode@now 000E                   io_mode@num 0010                 pid_tune@ssec 0032  \n               tc_init@cspin 0012                     ??___ftge 0007                  __pdataBANK0 00A0  \n           __CFG_LPT1OSC$OFF 000000            __size_of___awtoft 004C            __size_of___ftpack 00EE  \n                  ___asftadd 2178            __size_of___lltoft 006E                __pcstackBANK0 00B1  \n              ??_pid_compute 003C                   pid_tune@kd 002F                   pid_tune@ki 002C  \n                 pid_tune@kp 0029                   tc_read@buf 002A                    __pnvBANK0 00B9  \n        __size_of_pid_create 0146      __size_of_spi_read_array 0046            __size_of_io_write 00A8  \n        __size_of_pid_limits 0246            __size_of_pid_auto 015C            __size_of_pid_tune 01DA  \n                   ?___awdiv 0001                     ?___ftadd 0027                     ?___ftdiv 0012  \n                   ?___ftneg 0009            __size_of_tick_get 0018                     ?___ftmul 0016  \n            ??_tc_read_float 002F            __size_of_spi_init 0046            __size_of_spi_open 0012  \n                   ?_io_mode 000A                  __smallconst 0800                   ?___asftadd 0035  \n                   ?_tc_init 0011                     ?_tc_read 0027            pid_compute@dinput 0048  \n         _tick_read_internal 21EC          __end_of_pid_compute 0C2E             __CFG_WDTPS$32768 000000  \n        ?_tick_read_internal 0001                  _INTCON2bits 000FF1                    copy_data0 21D6  \n              ??_spi_control 000A         ??_tick_read_internal 0001             spi_control@speed 000E  \n                   __Hrparam 0000       __size_of_spi_available 0010                     __Lrparam 0000  \n           __size_of___awdiv 00BC             __size_of___ftadd 023A             __size_of___ftdiv 011E  \n           __size_of___ftneg 002A             __size_of___ftmul 013E                     ___awtoft 205C  \n                   ___ftpack 1A74                     ___lltoft 1F8A                io_write@value 000B  \n               ??_pid_create 0046                 ??_pid_limits 0012                  ??___asftadd 003A  \n           __size_of_io_mode 00A8             __size_of_tc_init 0064             __size_of_tc_read 0094  \n                   __ptext10 21EC                     __ptext11 1B62                     __ptext20 205C  \n                   __ptext12 10AE                     __ptext21 1956                     __ptext13 1D02  \n                   __ptext22 1E52                     __ptext14 2258                     __ptext23 16EA  \n                   __ptext15 1EF6                     __ptext24 2216                     __ptext16 1DAA  \n                   __ptext25 1F8A                     __ptext17 20EE                     __ptext26 1A74  \n                   __ptext18 227C                     __ptext27 2178                     __ptext19 1C46  \n                   __ptext28 0E74                  _pid_compute 080A                     _io_write 1DAA  \n              __size_of_main 01C0                     _pid_auto 1448                     _pid_tune 10AE  \n             _spi_read_array 20EE          __end_of_spi_control 1956           __end_of_pid_create 16EA  \n                   _tick_get 2240           __end_of_pid_limits 0E74                     _spi_init 20A8  \n                   _spi_open 2258                     _portptrs 00A0                     main@argc 005B  \n                   main@argv 005D                     _trisptrs 00A8        __CFG_CPUDIV$OSC1_PLL2 000000  \n                 _INTCONbits 000FF2                _spi_available 227C        __end_of_pid_direction 1C46  \n     __end_of_spi_read_array 2134            tc_read_float@tcpl 002C               ?_spi_available 0001  \n                _SSPCON1bits 000FC6                  _spi_control 1828              ?_spi_read_array 0002  \n"
  },
  {
    "path": "pid-demo-pic18.X/dist/default/production/pid-demo-pic18.X.production.sdb",
    "content": "[p LITE_MODE AUTOSTATIC LFSROK EMI_WORD ]\n[d version 1.1 ]\n[d edition pro ]\n[d chip 18F2550 ]\n[e E4687 enCtrlDirs `uc\nE_PID_DIRECT 0\nE_PID_REVERSE 1\n]\n[s S24 pid_controller 40 `*.Mf 1 input 3 0 `*.Mf 1 output 3 3 `*.Mf 1 setpoint 3 6 `f 1 Kp 3 9 `f 1 Ki 3 12 `f 1 Kd 3 15 `f 1 omin 3 18 `f 1 omax 3 21 `f 1 iterm 3 24 `f 1 lastin 3 27 `ul 1 lasttime 4 30 `ul 1 sampletime 4 34 `uc 1 automode 1 38 `E4687 1 direction 1 39 ]\n[s S39 thermocuple_struct 2 `uc 1 spi 1 0 `uc 1 cspin 1 1 ]\n[e E4736 enSPIModules `uc\nE_SPI_1 1\nE_SPI_2 2\nE_SPI_3 3\nE_SPI_4 4\n]\n\"7403 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[s S135 . 1 `uc 1 . 1 0 :7:0 \n`uc 1 NOT_RBPU 1 0 :1:7 \n]\n[s S138 . 1 `uc 1 RBIP 1 0 :1:0 \n`uc 1 . 1 0 :1:1 \n`uc 1 TMR0IP 1 0 :1:2 \n`uc 1 . 1 0 :1:3 \n`uc 1 INTEDG2 1 0 :1:4 \n`uc 1 INTEDG1 1 0 :1:5 \n`uc 1 INTEDG0 1 0 :1:6 \n`uc 1 nRBPU 1 0 :1:7 \n]\n[s S147 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 T0IP 1 0 :1:2 \n`uc 1 . 1 0 :4:3 \n`uc 1 RBPU 1 0 :1:7 \n]\n[u S152 . 1 `S135 1 . 1 0 `S138 1 . 1 0 `S147 1 . 1 0 ]\n\"7761\n[s S174 . 1 `uc 1 RBIF 1 0 :1:0 \n`uc 1 INT0IF 1 0 :1:1 \n`uc 1 TMR0IF 1 0 :1:2 \n`uc 1 RBIE 1 0 :1:3 \n`uc 1 INT0IE 1 0 :1:4 \n`uc 1 TMR0IE 1 0 :1:5 \n`uc 1 PEIE_GIEL 1 0 :1:6 \n`uc 1 GIE_GIEH 1 0 :1:7 \n]\n[s S183 . 1 `uc 1 RBIF 1 0 :1:0 \n`uc 1 INT0IF 1 0 :1:1 \n`uc 1 TMR0IF 1 0 :1:2 \n`uc 1 RBIE 1 0 :1:3 \n`uc 1 INT0IE 1 0 :1:4 \n`uc 1 TMR0IE 1 0 :1:5 \n`uc 1 PEIE 1 0 :1:6 \n`uc 1 GIE 1 0 :1:7 \n]\n[s S192 . 1 `uc 1 RBIF 1 0 :1:0 \n`uc 1 INT0IF 1 0 :1:1 \n`uc 1 TMR0IF 1 0 :1:2 \n`uc 1 RBIE 1 0 :1:3 \n`uc 1 INT0IE 1 0 :1:4 \n`uc 1 TMR0IE 1 0 :1:5 \n`uc 1 GIEL 1 0 :1:6 \n`uc 1 GIEH 1 0 :1:7 \n]\n[s S201 . 1 `uc 1 . 1 0 :1:0 \n`uc 1 INT0F 1 0 :1:1 \n`uc 1 T0IF 1 0 :1:2 \n`uc 1 . 1 0 :1:3 \n`uc 1 INT0E 1 0 :1:4 \n`uc 1 T0IE 1 0 :1:5 \n`uc 1 PEIE 1 0 :1:6 \n`uc 1 GIE 1 0 :1:7 \n]\n[s S210 . 1 `uc 1 . 1 0 :6:0 \n`uc 1 GIEL 1 0 :1:6 \n`uc 1 GIEH 1 0 :1:7 \n]\n[u S214 . 1 `S174 1 . 1 0 `S183 1 . 1 0 `S192 1 . 1 0 `S201 1 . 1 0 `S210 1 . 1 0 ]\n\"69 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c\n[e E4687 enCtrlDirs `uc\nE_PID_DIRECT 0\nE_PID_REVERSE 1\n]\n[s S291 pid_controller 40 `*.Mf 1 input 3 0 `*.Mf 1 output 3 3 `*.Mf 1 setpoint 3 6 `f 1 Kp 3 9 `f 1 Ki 3 12 `f 1 Kd 3 15 `f 1 omin 3 18 `f 1 omax 3 21 `f 1 iterm 3 24 `f 1 lastin 3 27 `ul 1 lasttime 4 30 `ul 1 sampletime 4 34 `uc 1 automode 1 38 `E4687 1 direction 1 39 ]\n\"145 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c\n[s S454 thermocuple_struct 2 `uc 1 spi 1 0 `uc 1 cspin 1 1 ]\n\"97 io.c\n[e E4685 enSPIModules `uc\nE_SPI_1 1\nE_SPI_2 2\nE_SPI_3 3\nE_SPI_4 4\n]\n\"99 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI.h\n[s S530 . 1 `uc 1 SSPM 1 0 :4:0 \n`uc 1 CKP 1 0 :1:4 \n`uc 1 SSPEN 1 0 :1:5 \n`uc 1 SSPOV 1 0 :1:6 \n`uc 1 WCOL 1 0 :1:7 \n]\n[s S536 . 1 `uc 1 SSPM0 1 0 :1:0 \n`uc 1 SSPM1 1 0 :1:1 \n`uc 1 SSPM2 1 0 :1:2 \n`uc 1 SSPM3 1 0 :1:3 \n]\n[u S541 . 1 `S530 1 . 1 0 `S536 1 . 1 0 ]\n\"6233 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[s S556 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 R_NOT_W 1 0 :1:2 \n]\n[s S559 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 D_NOT_A 1 0 :1:5 \n]\n[s S562 . 1 `uc 1 BF 1 0 :1:0 \n`uc 1 UA 1 0 :1:1 \n`uc 1 R_nW 1 0 :1:2 \n`uc 1 S 1 0 :1:3 \n`uc 1 P 1 0 :1:4 \n`uc 1 D_nA 1 0 :1:5 \n`uc 1 CKE 1 0 :1:6 \n`uc 1 SMP 1 0 :1:7 \n]\n[s S571 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 R_NOT_W 1 0 :1:2 \n]\n[s S574 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 D_NOT_A 1 0 :1:5 \n]\n[s S577 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 R_W 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 D_A 1 0 :1:5 \n]\n[s S582 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 I2C_READ 1 0 :1:2 \n`uc 1 I2C_START 1 0 :1:3 \n`uc 1 I2C_STOP 1 0 :1:4 \n`uc 1 I2C_DAT 1 0 :1:5 \n]\n[s S588 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 nW 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 nA 1 0 :1:5 \n]\n[s S593 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 NOT_WRITE 1 0 :1:2 \n]\n[s S596 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 NOT_ADDRESS 1 0 :1:5 \n]\n[s S599 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 nWRITE 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 nADDRESS 1 0 :1:5 \n]\n[s S604 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 READ_WRITE 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 DATA_ADDRESS 1 0 :1:5 \n]\n[s S609 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 R 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 D 1 0 :1:5 \n]\n[s S614 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 DA 1 0 :1:5 \n]\n[s S617 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 RW 1 0 :1:2 \n]\n[s S620 . 1 `uc 1 . 1 0 :3:0 \n`uc 1 START 1 0 :1:3 \n]\n[s S623 . 1 `uc 1 . 1 0 :4:0 \n`uc 1 STOP 1 0 :1:4 \n]\n[s S626 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 NOT_W 1 0 :1:2 \n]\n[s S629 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 NOT_A 1 0 :1:5 \n]\n[u S632 . 1 `S556 1 . 1 0 `S559 1 . 1 0 `S562 1 . 1 0 `S556 1 . 1 0 `S559 1 . 1 0 `S577 1 . 1 0 `S582 1 . 1 0 `S588 1 . 1 0 `S593 1 . 1 0 `S596 1 . 1 0 `S599 1 . 1 0 `S604 1 . 1 0 `S609 1 . 1 0 `S614 1 . 1 0 `S617 1 . 1 0 `S620 1 . 1 0 `S623 1 . 1 0 `S626 1 . 1 0 `S629 1 . 1 0 ]\n\"5 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\abdiv.c\n[v ___abdiv `(c  1 e 1 0 ]\n\"5 ../common/asfladd.c\n[v ___asfladd `(d  1 e 3 0 ]\n\"5 ../common/asfldiv.c\n[v ___asfldiv `(d  1 e 3 0 ]\n\"5 ../common/asflmul.c\n[v ___asflmul `(d  1 e 3 0 ]\n\"5 ../common/asflsub.c\n[v ___asflsub `(d  1 e 3 0 ]\n\"5 ../common/asftadd.c\n[v ___asftadd `(f  1 e 3 0 ]\n\"5 ../common/asftdiv.c\n[v ___asftdiv `(f  1 e 3 0 ]\n\"5 ../common/asftmul.c\n[v ___asftmul `(f  1 e 3 0 ]\n\"5 ../common/asftsub.c\n[v ___asftsub `(f  1 e 3 0 ]\n\"5 ../common/aslmul.c\n[v ___aslmul `(ul  1 e 4 0 ]\n[s S24 pid_controller 37 `*.0f 1 input 2 0 `*.0f 1 output 2 2 `*.0f 1 setpoint 2 4 `f 1 Kp 3 6 `f 1 Ki 3 9 `f 1 Kd 3 12 `f 1 omin 3 15 `f 1 omax 3 18 `f 1 iterm 3 21 `f 1 lastin 3 24 `ul 1 lasttime 4 27 `ul 1 sampletime 4 31 `uc 1 automode 1 35 `E4687 1 direction 1 36 ]\n\"25 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c\n[v _pid_create `(*.MS24  1 e 2 0 ]\n\"42\n[v _pid_compute `(uc  1 e 1 0 ]\n\"78\n[v _pid_tune `(v  1 e 0 0 ]\n\"96\n[v _pid_sample `(v  1 e 0 0 ]\n\"106\n[v _pid_limits `(v  1 e 0 0 ]\n\"125\n[v _pid_auto `(v  1 e 0 0 ]\n\"138\n[v _pid_direction `(v  1 e 0 0 ]\n\"27 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\n[v _spi_init `(uc  1 e 1 0 ]\n\"42\n[v _spi_control `(uc  1 e 1 0 ]\n\"97\n[v _spi_open `(uc  1 e 1 0 ]\n\"104\n[v _spi_close `(uc  1 e 1 0 ]\n\"111\n[v _spi_write `(v  1 e 0 0 ]\n\"119\n[v _spi_read `(uc  1 e 1 0 ]\n\"126\n[v _spi_write_array `(v  1 e 0 0 ]\n\"137\n[v _spi_read_array `(v  1 e 0 0 ]\n\"147\n[v _spi_trans `(uc  1 e 1 0 ]\n\"156\n[v _spi_trans_array `(v  1 e 0 0 ]\n\"166\n[v _spi_available `(uc  1 s 1 spi_available ]\n\"28 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c\n[v _tick_init `(v  1 e 0 0 ]\n\"43\n[v _tick_get `(ul  1 e 4 0 ]\n\"49\n[v _tick_update `(v  1 e 0 0 ]\n\"57\n[v _tick_read_internal `(v  1 s 0 tick_read_internal ]\n\"5 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\abmod.c\n[v ___abmod `(c  1 e 1 0 ]\n\"32 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\abtofl.c\n[v ___abtofl `(d  1 e 3 0 ]\n\"34 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\abtoft.c\n[v ___abtoft `(f  1 e 3 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\aldiv.c\n[v ___aldiv `(l  1 e 4 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\almod.c\n[v ___almod `(l  1 e 4 0 ]\n\"37 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\altofl.c\n[v ___altofl `(d  1 e 3 0 ]\n\"43 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\altoft.c\n[v ___altoft `(f  1 e 3 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\atdiv.c\n[v ___atdiv `(m  1 e 3 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\atmod.c\n[v ___atmod `(m  1 e 3 0 ]\n\"38 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\attofl.c\n[v ___attofl `(d  1 e 3 0 ]\n\"38 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\attoft.c\n[v ___attoft `(f  1 e 3 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\awdiv.c\n[v ___awdiv `(i  1 e 2 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\awmod.c\n[v ___awmod `(i  1 e 2 0 ]\n\"32 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\awtofl.c\n[v ___awtofl `(d  1 e 3 0 ]\n\"33 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\awtoft.c\n[v ___awtoft `(f  1 e 3 0 ]\n\"3 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\bmul.c\n[v ___bmul `(uc  1 e 1 0 ]\n\"64 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\double.c\n[v ___flpack `(d  1 e 3 0 ]\n\"89 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\fladd.c\n[v ___fladd `(d  1 e 3 0 ]\n\"50 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\fldiv.c\n[v ___fldiv `(d  1 e 3 0 ]\n\"5 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\flge.c\n[v ___flge `(b  1 e 0 0 ]\n\"51 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\flmul.c\n[v ___flmul `(d  1 e 3 0 ]\n\"16 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\flneg.c\n[v ___flneg `(d  1 e 3 0 ]\n\"63 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\float.c\n[v ___ftpack `(f  1 e 3 0 ]\n\"22 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\flsub.c\n[v ___flsub `(d  1 e 3 0 ]\n\"44 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\fltol.c\n[v ___fltol `(l  1 e 4 0 ]\n\"87 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ftadd.c\n[v ___ftadd `(f  1 e 3 0 ]\n\"50 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ftdiv.c\n[v ___ftdiv `(f  1 e 3 0 ]\n\"5 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ftge.c\n[v ___ftge `(b  1 e 0 0 ]\n\"52 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ftmul.c\n[v ___ftmul `(f  1 e 3 0 ]\n\"16 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ftneg.c\n[v ___ftneg `(f  1 e 3 0 ]\n\"22 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ftsub.c\n[v ___ftsub `(f  1 e 3 0 ]\n\"45 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\fttol.c\n[v ___fttol `(l  1 e 4 0 ]\n\"5 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lbdiv.c\n[v ___lbdiv `(uc  1 e 1 0 ]\n\"5 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lbmod.c\n[v ___lbmod `(uc  1 e 1 0 ]\n\"28 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lbtofl.c\n[v ___lbtofl `(d  1 e 3 0 ]\n\"28 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lbtoft.c\n[v ___lbtoft `(f  1 e 3 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lldiv.c\n[v ___lldiv `(ul  1 e 4 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\llmod.c\n[v ___llmod `(ul  1 e 4 0 ]\n\"31 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lltofl.c\n[v ___lltofl `(d  1 e 3 0 ]\n\"36 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lltoft.c\n[v ___lltoft `(f  1 e 3 0 ]\n\"3 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lmul.c\n[v ___lmul `(ul  1 e 4 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ltdiv.c\n[v ___ltdiv `(um  1 e 3 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ltmod.c\n[v ___ltmod `(um  1 e 3 0 ]\n\"31 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lttofl.c\n[v ___lttofl `(d  1 e 3 0 ]\n\"31 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lttoft.c\n[v ___lttoft `(f  1 e 3 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lwdiv.c\n[v ___lwdiv `(ui  1 e 2 0 ]\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lwmod.c\n[v ___lwmod `(ui  1 e 2 0 ]\n\"29 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lwtofl.c\n[v ___lwtofl `(d  1 e 3 0 ]\n\"29 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\lwtoft.c\n[v ___lwtoft `(f  1 e 3 0 ]\n\"3 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\tmul.c\n[v ___tmul `(um  1 e 3 0 ]\n\"3 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\wmul.c\n[v ___wmul `(ui  1 e 2 0 ]\n\"56 io.c\n[v _io_mode `(v  1 e 0 0 ]\n\"71\n[v _io_write `(v  1 e 0 0 ]\n\"87\n[v _io_read `(uc  1 e 1 0 ]\n\"82 main.c\n[v _main `(i  1 e 2 0 ]\n[s S39 thermocuple_struct 2 `uc 1 spi 1 0 `uc 1 cspin 1 1 ]\n\"4 tc.c\n[v _tc_init `(S39  1 e 2 0 ]\n\"21\n[v _tc_read `(i  1 e 2 0 ]\n\"41\n[v _tc_read_float `(f  1 e 3 0 ]\n\"22 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\n[v _inuse `uc  1 s 1 inuse ]\n\"21 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c\n[v _tickcnt `VEul  1 s 4 tickcnt ]\n\"23\n[v _tickbuffer `[6]uc  1 s 6 tickbuffer ]\n\"2373 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\include\\pic18f2550.h\n[v _PORTA `VEuc  1 e 1 @3968 ]\n\"2529\n[v _PORTB `VEuc  1 e 1 @3969 ]\n\"2638\n[v _PORTC `VEuc  1 e 1 @3970 ]\n\"2791\n[v _PORTE `VEuc  1 e 1 @3972 ]\n\"3406\n[v _TRISA `VEuc  1 e 1 @3986 ]\n\"3603\n[v _TRISB `VEuc  1 e 1 @3987 ]\n\"3824\n[v _TRISC `VEuc  1 e 1 @3988 ]\n\"6213\n[v _SSPCON1 `VEuc  1 e 1 @4038 ]\n[s S530 . 1 `uc 1 SSPM 1 0 :4:0 \n`uc 1 CKP 1 0 :1:4 \n`uc 1 SSPEN 1 0 :1:5 \n`uc 1 SSPOV 1 0 :1:6 \n`uc 1 WCOL 1 0 :1:7 \n]\n\"6233\n[s S536 . 1 `uc 1 SSPM0 1 0 :1:0 \n`uc 1 SSPM1 1 0 :1:1 \n`uc 1 SSPM2 1 0 :1:2 \n`uc 1 SSPM3 1 0 :1:3 \n]\n[u S541 . 1 `S530 1 . 1 0 `S536 1 . 1 0 ]\n[v _SSPCON1bits `VES541  1 e 1 @4038 ]\n\"6282\n[v _SSPSTAT `VEuc  1 e 1 @4039 ]\n[s S556 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 R_NOT_W 1 0 :1:2 \n]\n\"6384\n[s S559 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 D_NOT_A 1 0 :1:5 \n]\n[s S562 . 1 `uc 1 BF 1 0 :1:0 \n`uc 1 UA 1 0 :1:1 \n`uc 1 R_nW 1 0 :1:2 \n`uc 1 S 1 0 :1:3 \n`uc 1 P 1 0 :1:4 \n`uc 1 D_nA 1 0 :1:5 \n`uc 1 CKE 1 0 :1:6 \n`uc 1 SMP 1 0 :1:7 \n]\n[s S577 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 R_W 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 D_A 1 0 :1:5 \n]\n[s S582 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 I2C_READ 1 0 :1:2 \n`uc 1 I2C_START 1 0 :1:3 \n`uc 1 I2C_STOP 1 0 :1:4 \n`uc 1 I2C_DAT 1 0 :1:5 \n]\n[s S588 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 nW 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 nA 1 0 :1:5 \n]\n[s S593 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 NOT_WRITE 1 0 :1:2 \n]\n[s S596 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 NOT_ADDRESS 1 0 :1:5 \n]\n[s S599 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 nWRITE 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 nADDRESS 1 0 :1:5 \n]\n[s S604 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 READ_WRITE 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 DATA_ADDRESS 1 0 :1:5 \n]\n[s S609 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 R 1 0 :1:2 \n`uc 1 . 1 0 :2:3 \n`uc 1 D 1 0 :1:5 \n]\n[s S614 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 DA 1 0 :1:5 \n]\n[s S617 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 RW 1 0 :1:2 \n]\n[s S620 . 1 `uc 1 . 1 0 :3:0 \n`uc 1 START 1 0 :1:3 \n]\n[s S623 . 1 `uc 1 . 1 0 :4:0 \n`uc 1 STOP 1 0 :1:4 \n]\n[s S626 . 1 `uc 1 . 1 0 :2:0 \n`uc 1 NOT_W 1 0 :1:2 \n]\n[s S629 . 1 `uc 1 . 1 0 :5:0 \n`uc 1 NOT_A 1 0 :1:5 \n]\n[u S632 . 1 `S556 1 . 1 0 `S559 1 . 1 0 `S562 1 . 1 0 `S556 1 . 1 0 `S559 1 . 1 0 `S577 1 . 1 0 `S582 1 . 1 0 `S588 1 . 1 0 `S593 1 . 1 0 `S596 1 . 1 0 `S599 1 . 1 0 `S604 1 . 1 0 `S609 1 . 1 0 `S614 1 . 1 0 `S617 1 . 1 0 `S620 1 . 1 0 `S623 1 . 1 0 `S626 1 . 1 0 `S629 1 . 1 0 ]\n[v _SSPSTATbits `VES632  1 e 1 @4039 ]\n\"6554\n[v _SSPBUF `VEuc  1 e 1 @4041 ]\n\"7322\n[v _T0CON `VEuc  1 e 1 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main@argc `i  1 p 2 90 ]\n[v main@argv `*.M*.Muc  1 p 3 92 ]\n\"109\n} 0\n\"27 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\n[v _spi_init `(uc  1 e 1 0 ]\n{\n[v spi_init@eModule `E4685  1 p 1 14 ]\n\"39\n} 0\n\"4 tc.c\n[v _tc_init `(S39  1 e 2 0 ]\n{\n\"5\n[v tc_init@tcpl `S39  1 a 2 19 ]\n\"4\n[v tc_init@spid `uc  1 p 1 16 ]\n[v tc_init@cspin `uc  1 p 1 17 ]\n\"18\n} 0\n\"42 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\n[v _spi_control `(uc  1 e 1 0 ]\n{\n\"47\n[v spi_control@speed `uc  1 a 1 13 ]\n\"42\n[v spi_control@spid `uc  1 p 1 0 ]\n[v spi_control@ctrl `ul  1 p 4 1 ]\n[v spi_control@arg `ul  1 p 4 5 ]\n\"94\n} 0\n\"25 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c\n[v _pid_create `(*.MS24  1 e 2 0 ]\n{\n[v pid_create@pid `*.0S24  1 p 2 52 ]\n[v pid_create@in `*.0f  1 p 2 54 ]\n[v pid_create@out `*.0f  1 p 2 56 ]\n[v pid_create@set `*.0f  1 p 2 58 ]\n[v pid_create@kp `f  1 p 3 60 ]\n[v pid_create@ki `f  1 p 3 63 ]\n[v pid_create@kd `f  1 p 3 66 ]\n\"39\n} 0\n\"106\n[v _pid_limits `(v  1 e 0 0 ]\n{\n[v pid_limits@pid `*.0S24  1 p 2 9 ]\n[v pid_limits@min `f  1 p 3 11 ]\n[v pid_limits@max `f  1 p 3 14 ]\n\"122\n} 0\n\"125\n[v _pid_auto `(v  1 e 0 0 ]\n{\n[v pid_auto@pid `*.0S24  1 p 2 9 ]\n\"135\n} 0\n\"41 tc.c\n[v _tc_read_float `(f  1 e 3 0 ]\n{\n[v tc_read_float@tcpl `*.0S39  1 p 2 43 ]\n\"43\n} 0\n\"42 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c\n[v _pid_compute `(uc  1 e 1 0 ]\n{\n\"61\n[v pid_compute@out `f  1 a 3 87 ]\n\"49\n[v pid_compute@in `f  1 a 3 84 ]\n\"51\n[v pid_compute@error `f  1 a 3 81 ]\n\"59\n[v pid_compute@dinput `f  1 a 3 71 ]\n\"43\n[v pid_compute@now `ul  1 a 4 77 ]\n\"42\n[v pid_compute@pid `*.0S24  1 p 2 57 ]\n\"75\n} 0\n\"43 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick-PIC18.c\n[v _tick_get `(ul  1 e 4 0 ]\n{\n\"46\n} 0\n\"57\n[v _tick_read_internal `(v  1 s 0 tick_read_internal ]\n{\n\"69\n} 0\n\"138 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/PID.c\n[v _pid_direction `(v  1 e 0 0 ]\n{\n[v pid_direction@pid `*.0S24  1 p 2 11 ]\n[v pid_direction@direction `E4687  1 p 1 13 ]\n\"145\n} 0\n\"78\n[v _pid_tune `(v  1 e 0 0 ]\n{\n\"82\n[v pid_tune@ssec `f  1 a 3 49 ]\n\"78\n[v pid_tune@pid `*.0S24  1 p 2 38 ]\n[v pid_tune@kp `f  1 p 3 40 ]\n[v pid_tune@ki `f  1 p 3 43 ]\n[v pid_tune@kd `f  1 p 3 46 ]\n\"93\n} 0\n\"56 io.c\n[v _io_mode `(v  1 e 0 0 ]\n{\n\"58\n[v io_mode@num `uc  1 a 1 15 ]\n\"57\n[v io_mode@port `uc  1 a 1 14 ]\n\"60\n[v io_mode@now `uc  1 a 1 13 ]\n\"56\n[v io_mode@pin `uc  1 p 1 9 ]\n[v io_mode@value `uc  1 p 1 10 ]\n\"68\n} 0\n\"97 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\n[v _spi_open `(uc  1 e 1 0 ]\n{\n[v spi_open@spid `uc  1 p 1 0 ]\n\"101\n} 0\n\"21 tc.c\n[v _tc_read `(i  1 e 2 0 ]\n{\n\"22\n[v tc_read@buf `ui  1 a 2 41 ]\n\"21\n[v tc_read@tcpl `*.0S39  1 p 2 38 ]\n\"38\n} 0\n\"71 io.c\n[v _io_write `(v  1 e 0 0 ]\n{\n\"73\n[v io_write@num `uc  1 a 1 15 ]\n\"72\n[v io_write@port `uc  1 a 1 14 ]\n\"75\n[v io_write@now `uc  1 a 1 13 ]\n\"71\n[v io_write@pin `uc  1 p 1 9 ]\n[v io_write@value `uc  1 p 1 10 ]\n\"83\n} 0\n\"137 C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI-PIC16.c\n[v _spi_read_array `(v  1 e 0 0 ]\n{\n[v spi_read_array@spid `uc  1 p 1 1 ]\n[v spi_read_array@rxbuf `*.auc  1 p 2 2 ]\n[v spi_read_array@len `ui  1 p 2 4 ]\n\"144\n} 0\n\"166\n[v _spi_available `(uc  1 s 1 spi_available ]\n{\n[v spi_available@spid `uc  1 p 1 0 ]\n\"168\n} 0\n\"10 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\awdiv.c\n[v ___awdiv `(i  1 e 2 0 ]\n{\n\"11\n[v ___awdiv@quotient `i  1 a 2 7 ]\n\"12\n[v ___awdiv@sign `uc  1 a 1 6 ]\n[v ___awdiv@counter `uc  1 a 1 5 ]\n\"10\n[v ___awdiv@dividend `i  1 p 2 0 ]\n[v ___awdiv@divisor `i  1 p 2 2 ]\n\"42\n} 0\n\"33 C:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\awtoft.c\n[v ___awtoft `(f  1 e 3 0 ]\n{\n\"34\n[v ___awtoft@sign `uc  1 a 1 20 ]\n\"33\n[v ___awtoft@c `i  1 p 2 16 ]\n\"42\n} 0\n\"50 C:\\Program Files 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    "path": "pid-demo-pic18.X/dist/default/production/pid-demo-pic18.X.production.sym",
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0\n72 1AD2 0 CODE 0\n73 1ADE 0 CODE 0\n70 1AE8 0 CODE 0\n75 1B0A 0 CODE 0\n76 1B0C 0 CODE 0\n77 1B0E 0 CODE 0\n75 1B18 0 CODE 0\n79 1B20 0 CODE 0\n80 1B28 0 CODE 0\n81 1B2C 0 CODE 0\n82 1B30 0 CODE 0\n83 1B44 0 CODE 0\n84 1B4E 0 CODE 0\n85 1B52 0 CODE 0\n86 1B60 0 CODE 0\n../common/asftadd.c\n6 2178 0 CODE 0\n7 21B4 0 CODE 0\nC:\\Program Files (x86)\\Microchip\\xc8\\v1.12\\sources\\ftadd.c\n90 E74 0 CODE 0\n91 E9A 0 CODE 0\n92 EC0 0 CODE 0\n93 EE8 0 CODE 0\n94 EF6 0 CODE 0\n95 F1E 0 CODE 0\n96 F2C 0 CODE 0\n97 F34 0 CODE 0\n98 F3C 0 CODE 0\n99 F40 0 CODE 0\n100 F48 0 CODE 0\n101 F4A 0 CODE 0\n102 F4C 0 CODE 0\n103 F58 0 CODE 0\n104 F5A 0 CODE 0\n106 F66 0 CODE 0\n110 F72 0 CODE 0\n111 F7A 0 CODE 0\n112 F7C 0 CODE 0\n113 F9A 0 CODE 0\n114 F9C 0 CODE 0\n115 FA4 0 CODE 0\n113 FA8 0 CODE 0\n117 FB4 0 CODE 0\n121 FC2 0 CODE 0\n122 FCA 0 CODE 0\n123 FCC 0 CODE 0\n124 FEA 0 CODE 0\n125 FEC 0 CODE 0\n126 FF4 0 CODE 0\n124 FF8 0 CODE 0\n129 1006 0 CODE 0\n131 100E 0 CODE 0\n132 101A 0 CODE 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  },
  {
    "path": "pid-demo-pic18.X/funclist",
    "content": "_tc_read_float: CODE, 8500 0 68\n___ftneg: CODE, 8726 0 42\n_io_mode: CODE, 7426 0 168\n___awdiv: CODE, 7238 0 188\n_pid_compute: CODE, 2058 0 1060\n___ftpack: CODE, 6772 0 238\n_tick_get: CODE, 8768 0 24\n_main: CODE, 4744 0 448\n_spi_control: CODE, 6184 0 302\n___ftadd: CODE, 3700 0 570\n___lltoft: CODE, 8074 0 110\n___asftadd: CODE, 8568 0 62\n_tc_init: CODE, 8184 0 100\n_io_write: CODE, 7594 0 168\n_mask: SMALLCONST, 2048 0 8\n__initialization: CODE, 8630 0 44\n_spi_open: CODE, 8792 0 18\n_spi_init: CODE, 8360 0 70\n_spi_available: CODE, 8828 0 16\n_tick_read_internal: CODE, 8684 0 42\n_pid_limits: CODE, 3118 0 582\n_pid_auto: CODE, 5192 0 348\n_pid_create: CODE, 5540 0 326\n_spi_read_array: CODE, 8430 0 70\n___ftmul: CODE, 5866 0 318\n___awtoft: CODE, 8284 0 76\n_tc_read: CODE, 7926 0 148\n_pid_tune: CODE, 4270 0 474\n_pid_direction: CODE, 7010 0 228\n___ftge: CODE, 7762 0 164\n___ftdiv: CODE, 6486 0 286\nTotal: 6766"
  },
  {
    "path": "pid-demo-pic18.X/io.c",
    "content": "#include \"io.h\"\n#include <xc.h>\nvolatile uint8_t * portptrs[] =\n{\n#if defined (_PORTA_RA0_POSN)\n\t&PORTA,\n#endif\n#if defined (_PORTB_RB0_POSN)\n\t&PORTB,\n#endif\n#if defined (_PORTC_RC0_POSN)\n\t&PORTC,\n#endif\n#if defined (_PORTD_RD0_POSN)\n\t&PORTD,\n#endif\n#if defined (_PORTE_RE0_POSN)\n\t&PORTE,\n#endif\n\n};\n\nvolatile uint8_t * trisptrs[] =\n{\n#if defined (_TRISA_RA0_POSN)\n\t&TRISA,\n#endif\n#if defined (_TRISB_RB0_POSN)\n\t&TRISB,\n#endif\n#if defined (_TRISC_RC0_POSN)\n\t&TRISC\n#endif\n#if defined (_TRISD_RD0_POSN)\n\t&TRISD,\n#endif\n#if defined (_TRISE_RE0_POSN)\n\t&TRISE,\n#endif\n};\n\nconst uint8_t mask[] =\n{\n\t0x01,\n\t0x02,\n\t0x04,\n\t0x08,\n\t0x10,\n\t0x20,\n\t0x40,\n\t0x80\n};\n\n\nvoid io_mode( uint8_t pin, uint8_t value )\n{\n\tuint8_t port = pin / 8;\n\tuint8_t num = pin % 8;\n\n\tuint8_t now = *(trisptrs[port]);\n\n\tif( value == OUTPUT )\n\t\tnow &= ~mask[num];\n\telse\n\t\tnow |= mask[num];\n\n\t*(trisptrs[port]) = now;\n}\n\nvoid io_write( uint8_t pin, uint8_t value )\n{\n\tuint8_t port = pin / 8;\n\tuint8_t num = pin % 8;\n\n\tuint8_t now = *(portptrs[port]);\n\n\tif( value == LOW )\n\t\tnow &= ~mask[num];\n\telse\n\t\tnow |= mask[num];\n\n\t*(portptrs[port]) = now;\n}\n\n\nuint8_t io_read( uint8_t pin )\n{\n\tuint8_t port = pin / 8;\n\tuint8_t num = pin % 8;\n\n\tuint8_t now = *(portptrs[port]);\n\n\tif( now & mask[num])\n\t\treturn HIGH;\n\telse\n\t\treturn LOW;\n}\n"
  },
  {
    "path": "pid-demo-pic18.X/io.h",
    "content": "/*\tIO Ports Abstraction Layer for microcontrollers\n\tCopyright (C) 2014 Jesus Ruben Santa Anna Zamudio.\n\n\tThis program is free software: you can redistribute it and/or modify\n\tit under the terms of the GNU General Public License as published by\n\tthe Free Software Foundation, either version 3 of the License, or\n\t(at your option) any later version.\n\n\tThis program is distributed in the hope that it will be useful,\n\tbut WITHOUT ANY WARRANTY; without even the implied warranty of\n\tMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n\tGNU General Public License for more details.\n\n\tYou should have received a copy of the GNU General Public License\n\talong with this program.  If not, see <http://www.gnu.org/licenses/>.\n\n\tAuthor website: http://www.geekfactory.mx\n\tAuthor e-mail: ruben at geekfactory dot mx\n */\n#ifndef IO_H\n#define\tIO_H\n/*-------------------------------------------------------------*/\n/*\t\tIncludes and dependencies\t\t\t*/\n/*-------------------------------------------------------------*/\n#include <stdint.h>\n\n/*-------------------------------------------------------------*/\n/*\t\tMacros and definitions\t\t\t\t*/\n/*-------------------------------------------------------------*/\n#ifndef HIGH\n#define HIGH 1\n#endif\n\n#ifndef LOW\n#define LOW 0\n#endif\n\n#ifndef OUTPUT\n#define OUTPUT 0\n#endif\n\n#ifndef INPUT\n#define INPUT 1\n#endif\n\n/*-------------------------------------------------------------*/\n/*\t\tFunction prototypes\t\t\t\t*/\n/*-------------------------------------------------------------*/\n\n/**\n * @brief Configures the pin mode\n *\n * This function allows the programmer to configure a pin as input or output.\n * The function accepts two parameters: the pin number and the pin mode\n *\n * @param pin The number of the pin to configure\n * @param mode The mode to configure the pin: INPUT or OUTPUT\n */\nvoid io_mode(uint8_t pin, uint8_t mode);\n\n/**\n * @brief Changes the output level of the selected IO pin\n * \n * Writes a new logic value to the selected IO pin. The pin should be configured\n * as output to actualy see the value on the pin.\n * \n * @param pin The number of the pin to write\n * @param value The logic level to write: LOW or HIGH\n */\nvoid io_write(uint8_t pin, uint8_t value);\n\n\n/**\n * @brief Reads the current state on the selected IO pin\n *\n * Reads the present logic level on the IO pin.\n *\n * @param pin The number of the pin to read\n *\n * @return Returns HIGH if a high logic level is present on the pin or LOW if a\n * low level is present.\n */\nuint8_t io_read( uint8_t pin );\n\n\n\n\n\n#endif\n//End of Header file\n"
  },
  {
    "path": "pid-demo-pic18.X/main.c",
    "content": "#include <xc.h>\n#include \"../PID.h\"\n#include \"tc.h\"\n\n// CONFIG1L\n#pragma config PLLDIV = 1       // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))\n#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])\n#pragma config USBDIV = 1       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)\n\n// CONFIG1H\n#pragma config FOSC = EC_EC     // Oscillator Selection bits (EC oscillator, CLKO function on RA6 (EC))\n#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)\n#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)\n\n// CONFIG2L\n#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)\n#pragma config BOR = OFF        // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))\n#pragma config BORV = 3         // Brown-out Reset Voltage bits (Minimum setting)\n#pragma config VREGEN = ON     // USB Voltage Regulator Enable bit (USB voltage regulator disabled)\n\n// CONFIG2H\n#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT enabled)\n#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)\n\n// CONFIG3H\n#pragma config CCP2MX = OFF      // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)\n#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)\n#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)\n#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)\n\n// CONFIG4L\n#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)\n#pragma config LVP = OFF         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)\n#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))\n\n// CONFIG5L\n#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)\n#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)\n#pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)\n#pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)\n\n// CONFIG5H\n#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)\n#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)\n\n// CONFIG6L\n#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)\n#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)\n#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)\n#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)\n\n// CONFIG6H\n#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)\n#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)\n#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)\n\n// CONFIG7L\n#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)\n#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)\n#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)\n#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)\n\n// CONFIG7H\n#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)\n\n#define CONFIG_TIMING_MAIN_CLOCK 12000000\n\n// Tick values\nuint32_t lastrun = 0;\n// PID Variables\nfloat in, out, set = 100;\n// PID controllers\nstruct pid_controller pidctrl;\npid_t pid = 0;\n// SPI Resource\nxSPIHandle spi;\n// Thermocouples\ntc_t sensor1;\ntc_t sensor2;\n\nint main(int argc, char** argv)\n{\n\tspi = spi_init(E_SPI_1);\n\tspi_control(spi, SPI_MASTER | SPI_MODE_0, SPI_DIV_1_64);\n\n\t//Create thermocuples CS pin on RB2 and RB3\n\tsensor1 = tc_init(spi, 10);\n\tsensor2 = tc_init(spi, 11);\n\n\t// Create PID controllers, set gains\n\tpid = pid_create(&pidctrl, &in, &out, &set, 5, 1, 3);\n\t// Set output limits\n\tpid_limits(pid, 0, 255);\n\t// Turn on PID\n\tpid_auto(pid);\n\n\tfor (;;) {\n\t\tif (tick_get() - lastrun >= TICK_SECOND) {\n\t\t\tlastrun = tick_get();\n\t\t\t// Read inputs\n\t\t\tin = tc_read_float(&sensor1);\n\t\t\t// Compute PID controllers\n\t\t\tpid_compute(pid);\n\t\t\t// Adjust actuator\n\t\t\t// set_out(output);\n\t\t}\n\t}\n\n}\n\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/Makefile-default.mk",
    "content": "#\n# Generated Makefile - do not edit!\n#\n# Edit the Makefile in the project folder instead (../Makefile). Each target\n# has a -pre and a -post target defined where you can add customized code.\n#\n# This makefile implements configuration specific macros and targets.\n\n\n# Include project Makefile\nifeq \"${IGNORE_LOCAL}\" \"TRUE\"\n# do not include local makefile. User is passing all local related variables already\nelse\ninclude Makefile\n# Include makefile containing local settings\nifeq \"$(wildcard nbproject/Makefile-local-default.mk)\" \"nbproject/Makefile-local-default.mk\"\ninclude nbproject/Makefile-local-default.mk\nendif\nendif\n\n# Environment\nMKDIR=mkdir -p\nRM=rm -f \nMV=mv \nCP=cp \n\n# Macros\nCND_CONF=default\nifeq ($(TYPE_IMAGE), DEBUG_RUN)\nIMAGE_TYPE=debug\nOUTPUT_SUFFIX=elf\nDEBUGGABLE_SUFFIX=elf\nFINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}\nelse\nIMAGE_TYPE=production\nOUTPUT_SUFFIX=hex\nDEBUGGABLE_SUFFIX=elf\nFINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}\nendif\n\n# Object Directory\nOBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}\n\n# Distribution Directory\nDISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}\n\n# Source Files Quoted if spaced\nSOURCEFILES_QUOTED_IF_SPACED=main.c tc.c io.c ../PID.c\n\n# Object Files Quoted if spaced\nOBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/main.p1 ${OBJECTDIR}/tc.p1 ${OBJECTDIR}/io.p1 ${OBJECTDIR}/_ext/1472/PID.p1\nPOSSIBLE_DEPFILES=${OBJECTDIR}/main.p1.d ${OBJECTDIR}/tc.p1.d ${OBJECTDIR}/io.p1.d ${OBJECTDIR}/_ext/1472/PID.p1.d\n\n# Object Files\nOBJECTFILES=${OBJECTDIR}/main.p1 ${OBJECTDIR}/tc.p1 ${OBJECTDIR}/io.p1 ${OBJECTDIR}/_ext/1472/PID.p1\n\n# Source Files\nSOURCEFILES=main.c tc.c io.c ../PID.c\n\n\nCFLAGS=\nASFLAGS=\nLDLIBSOPTIONS=\n\n############# Tool locations ##########################################\n# If you copy a project from one host to another, the path where the  #\n# compiler is installed may be different.                             #\n# If you open this project with MPLAB X in the new host, this         #\n# makefile will be regenerated and the paths will be corrected.       #\n#######################################################################\n# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build\nFIXDEPS=fixDeps\n\n.build-conf:  ${BUILD_SUBPROJECTS}\n\t${MAKE}  -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}\n\nMP_PROCESSOR_OPTION=18F2550\n# ------------------------------------------------------------------------------------\n# Rules for buildStep: compile\nifeq ($(TYPE_IMAGE), DEBUG_RUN)\n${OBJECTDIR}/main.p1: main.c  nbproject/Makefile-${CND_CONF}.mk\n\t@${MKDIR} ${OBJECTDIR} \n\t@${RM} ${OBJECTDIR}/main.p1.d \n\t@${RM} ${OBJECTDIR}/main.p1 \n\t${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  -D__DEBUG=1 --debugger=pickit3  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"    -o${OBJECTDIR}/main.p1  main.c \n\t@-${MV} ${OBJECTDIR}/main.d ${OBJECTDIR}/main.p1.d \n\t@${FIXDEPS} ${OBJECTDIR}/main.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  \n\t\n${OBJECTDIR}/tc.p1: tc.c  nbproject/Makefile-${CND_CONF}.mk\n\t@${MKDIR} ${OBJECTDIR} \n\t@${RM} ${OBJECTDIR}/tc.p1.d \n\t@${RM} ${OBJECTDIR}/tc.p1 \n\t${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  -D__DEBUG=1 --debugger=pickit3  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"    -o${OBJECTDIR}/tc.p1  tc.c \n\t@-${MV} ${OBJECTDIR}/tc.d ${OBJECTDIR}/tc.p1.d \n\t@${FIXDEPS} ${OBJECTDIR}/tc.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  \n\t\n${OBJECTDIR}/io.p1: io.c  nbproject/Makefile-${CND_CONF}.mk\n\t@${MKDIR} ${OBJECTDIR} \n\t@${RM} ${OBJECTDIR}/io.p1.d \n\t@${RM} ${OBJECTDIR}/io.p1 \n\t${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  -D__DEBUG=1 --debugger=pickit3  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"    -o${OBJECTDIR}/io.p1  io.c \n\t@-${MV} ${OBJECTDIR}/io.d ${OBJECTDIR}/io.p1.d \n\t@${FIXDEPS} ${OBJECTDIR}/io.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  \n\t\n${OBJECTDIR}/_ext/1472/PID.p1: ../PID.c  nbproject/Makefile-${CND_CONF}.mk\n\t@${MKDIR} ${OBJECTDIR}/_ext/1472 \n\t@${RM} ${OBJECTDIR}/_ext/1472/PID.p1.d \n\t@${RM} ${OBJECTDIR}/_ext/1472/PID.p1 \n\t${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  -D__DEBUG=1 --debugger=pickit3  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"    -o${OBJECTDIR}/_ext/1472/PID.p1  ../PID.c \n\t@-${MV} ${OBJECTDIR}/_ext/1472/PID.d ${OBJECTDIR}/_ext/1472/PID.p1.d \n\t@${FIXDEPS} ${OBJECTDIR}/_ext/1472/PID.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  \n\t\nelse\n${OBJECTDIR}/main.p1: main.c  nbproject/Makefile-${CND_CONF}.mk\n\t@${MKDIR} ${OBJECTDIR} \n\t@${RM} ${OBJECTDIR}/main.p1.d \n\t@${RM} ${OBJECTDIR}/main.p1 \n\t${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"    -o${OBJECTDIR}/main.p1  main.c \n\t@-${MV} ${OBJECTDIR}/main.d ${OBJECTDIR}/main.p1.d \n\t@${FIXDEPS} ${OBJECTDIR}/main.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  \n\t\n${OBJECTDIR}/tc.p1: tc.c  nbproject/Makefile-${CND_CONF}.mk\n\t@${MKDIR} ${OBJECTDIR} \n\t@${RM} ${OBJECTDIR}/tc.p1.d \n\t@${RM} ${OBJECTDIR}/tc.p1 \n\t${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"    -o${OBJECTDIR}/tc.p1  tc.c \n\t@-${MV} ${OBJECTDIR}/tc.d ${OBJECTDIR}/tc.p1.d \n\t@${FIXDEPS} ${OBJECTDIR}/tc.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  \n\t\n${OBJECTDIR}/io.p1: io.c  nbproject/Makefile-${CND_CONF}.mk\n\t@${MKDIR} ${OBJECTDIR} \n\t@${RM} ${OBJECTDIR}/io.p1.d \n\t@${RM} ${OBJECTDIR}/io.p1 \n\t${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"    -o${OBJECTDIR}/io.p1  io.c \n\t@-${MV} ${OBJECTDIR}/io.d ${OBJECTDIR}/io.p1.d \n\t@${FIXDEPS} ${OBJECTDIR}/io.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  \n\t\n${OBJECTDIR}/_ext/1472/PID.p1: ../PID.c  nbproject/Makefile-${CND_CONF}.mk\n\t@${MKDIR} ${OBJECTDIR}/_ext/1472 \n\t@${RM} ${OBJECTDIR}/_ext/1472/PID.p1.d \n\t@${RM} ${OBJECTDIR}/_ext/1472/PID.p1 \n\t${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"    -o${OBJECTDIR}/_ext/1472/PID.p1  ../PID.c \n\t@-${MV} ${OBJECTDIR}/_ext/1472/PID.d ${OBJECTDIR}/_ext/1472/PID.p1.d \n\t@${FIXDEPS} ${OBJECTDIR}/_ext/1472/PID.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  \n\t\nendif\n\n# ------------------------------------------------------------------------------------\n# Rules for buildStep: assemble\nifeq ($(TYPE_IMAGE), DEBUG_RUN)\nelse\nendif\n\n# ------------------------------------------------------------------------------------\n# Rules for buildStep: link\nifeq ($(TYPE_IMAGE), DEBUG_RUN)\ndist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    \n\t@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} \n\t${MP_CC} $(MP_EXTRA_LD_PRE) --chip=$(MP_PROCESSOR_OPTION) -G -mdist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.map  -D__DEBUG=1 --debugger=pickit3  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"     --rom=default,-7dc0-7fff --ram=default,-3f4-3ff,-f9c-f9c,-fd4-fd4,-fdb-fdf,-fe3-fe7,-feb-fef,-ffd-fff  -odist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX}  ${OBJECTFILES_QUOTED_IF_SPACED}     \n\t@${RM} dist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.hex \n\t\nelse\ndist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   \n\t@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} \n\t${MP_CC} $(MP_EXTRA_LD_PRE) --chip=$(MP_PROCESSOR_OPTION) -G -mdist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.map  --double=24 --float=24 --emi=wordwrite --opt=default,+asm,-asmfile,+speed,-space,-debug --addrqual=ignore --mode=free -DPLIB_PIC18 -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,-download,+config,+clib,+plib --output=-mcof,+elf \"--errformat=%f:%l: error: (%n) %s\" \"--warnformat=%f:%l: warning: (%n) %s\" \"--msgformat=%f:%l: advisory: (%n) %s\"     -odist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX}  ${OBJECTFILES_QUOTED_IF_SPACED}     \n\t\nendif\n\n\n# Subprojects\n.build-subprojects:\n\n\n# Subprojects\n.clean-subprojects:\n\n# Clean Targets\n.clean-conf: ${CLEAN_SUBPROJECTS}\n\t${RM} -r build/default\n\t${RM} -r dist/default\n\n# Enable dependency checking\n.dep.inc: .depcheck-impl\n\nDEPFILES=$(shell \"${PATH_TO_IDE_BIN}\"mplabwildcard ${POSSIBLE_DEPFILES})\nifneq (${DEPFILES},)\ninclude ${DEPFILES}\nendif\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/Makefile-genesis.properties",
    "content": "#\n#Wed Sep 09 14:35:51 CDT 2015\ndefault.languagetoolchain.dir=/Applications/microchip/xc8/v1.21/bin\ncom-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=0b040d5e5949b59f004c7912367437ce\ndefault.languagetoolchain.version=1.21\nhost.platform=mac\nconf.ids=default\ndefault.com-microchip-mplab-nbide-toolchainXC8-XC8LanguageToolchain.md5=a438870e1ab5a32b9f261a9bd76d1091\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/Makefile-impl.mk",
    "content": "#\n# Generated Makefile - do not edit!\n#\n# Edit the Makefile in the project folder instead (../Makefile). Each target\n# has a pre- and a post- target defined where you can add customization code.\n#\n# This makefile implements macros and targets common to all configurations.\n#\n# NOCDDL\n\n\n# Building and Cleaning subprojects are done by default, but can be controlled with the SUB\n# macro. If SUB=no, subprojects will not be built or cleaned. The following macro\n# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf\n# and .clean-reqprojects-conf unless SUB has the value 'no'\nSUB_no=NO\nSUBPROJECTS=${SUB_${SUB}}\nBUILD_SUBPROJECTS_=.build-subprojects\nBUILD_SUBPROJECTS_NO=\nBUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}\nCLEAN_SUBPROJECTS_=.clean-subprojects\nCLEAN_SUBPROJECTS_NO=\nCLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}\n\n\n# Project Name\nPROJECTNAME=pid-demo-pic18.X\n\n# Active Configuration\nDEFAULTCONF=default\nCONF=${DEFAULTCONF}\n\n# All Configurations\nALLCONFS=default \n\n\n# build\n.build-impl: .build-pre\n\t${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf\n\n\n# clean\n.clean-impl: .clean-pre\n\t${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf\n\n# clobber\n.clobber-impl: .clobber-pre .depcheck-impl\n\t    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean\n\n\n\n# all\n.all-impl: .all-pre .depcheck-impl\n\t    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build\n\n\n\n# dependency checking support\n.depcheck-impl:\n#\t@echo \"# This code depends on make tool being used\" >.dep.inc\n#\t@if [ -n \"${MAKE_VERSION}\" ]; then \\\n#\t    echo \"DEPFILES=\\$$(wildcard \\$$(addsuffix .d, \\$${OBJECTFILES}))\" >>.dep.inc; \\\n#\t    echo \"ifneq (\\$${DEPFILES},)\" >>.dep.inc; \\\n#\t    echo \"include \\$${DEPFILES}\" >>.dep.inc; \\\n#\t    echo \"endif\" >>.dep.inc; \\\n#\telse \\\n#\t    echo \".KEEP_STATE:\" >>.dep.inc; \\\n#\t    echo \".KEEP_STATE_FILE:.make.state.\\$${CONF}\" >>.dep.inc; \\\n#\tfi\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/Makefile-local-default.mk",
    "content": "#\n# Generated Makefile - do not edit!\n#\n#\n# This file contains information about the location of compilers and other tools.\n# If you commmit this file into your revision control server, you will be able to \n# to checkout the project and build it from the command line with make. However,\n# if more than one person works on the same project, then this file might show\n# conflicts since different users are bound to have compilers in different places.\n# In that case you might choose to not commit this file and let MPLAB X recreate this file\n# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at\n# least once so the file gets created and the project can be built. Finally, you can also\n# avoid using this file at all if you are only building from the command line with make.\n# You can invoke make with the values of the macros:\n# $ makeMP_CC=\"/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc\" ...  \n#\nPATH_TO_IDE_BIN=/Applications/microchip/mplabx/mplab_ide.app/Contents/Resources/mplab_ide/mplab_ide/modules/../../bin/\n# Adding MPLAB X bin directory to path.\nPATH:=/Applications/microchip/mplabx/mplab_ide.app/Contents/Resources/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)\n# Path to java used to run MPLAB X when this makefile was created\nMP_JAVA_PATH=\"/System/Library/Java/JavaVirtualMachines/1.6.0.jdk/Contents/Home/bin/\"\nOS_CURRENT=\"$(shell uname -s)\"\nMP_CC=\"/Applications/microchip/xc8/v1.21/bin/xc8\"\n# MP_CPPC is not defined\n# MP_BC is not defined\n# MP_AS is not defined\n# MP_LD is not defined\n# MP_AR is not defined\nDEP_GEN=${MP_JAVA_PATH}java -jar \"/Applications/microchip/mplabx/mplab_ide.app/Contents/Resources/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar\" \nMP_CC_DIR=\"/Applications/microchip/xc8/v1.21/bin\"\n# MP_CPPC_DIR is not defined\n# MP_BC_DIR is not defined\n# MP_AS_DIR is not defined\n# MP_LD_DIR is not defined\n# MP_AR_DIR is not defined\n# MP_BC_DIR is not defined\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/Makefile-variables.mk",
    "content": "#\n# Generated - do not edit!\n#\n# NOCDDL\n#\nCND_BASEDIR=`pwd`\n# default configuration\nCND_ARTIFACT_DIR_default=dist/default/production\nCND_ARTIFACT_NAME_default=pid-demo-pic18.X.production.hex\nCND_ARTIFACT_PATH_default=dist/default/production/pid-demo-pic18.X.production.hex\nCND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package\nCND_PACKAGE_NAME_default=pid-demo-pic18.x.tar\nCND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/pid-demo-pic18.x.tar\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/Package-default.bash",
    "content": "#!/bin/bash -x\n\n#\n# Generated - do not edit!\n#\n\n# Macros\nTOP=`pwd`\nCND_CONF=default\nCND_DISTDIR=dist\nTMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging\nTMPDIRNAME=tmp-packaging\nOUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/pid-demo-pic18.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}\nOUTPUT_BASENAME=pid-demo-pic18.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}\nPACKAGE_TOP_DIR=pid-demo-pic18.x/\n\n# Functions\nfunction checkReturnCode\n{\n    rc=$?\n    if [ $rc != 0 ]\n    then\n        exit $rc\n    fi\n}\nfunction makeDirectory\n# $1 directory path\n# $2 permission (optional)\n{\n    mkdir -p \"$1\"\n    checkReturnCode\n    if [ \"$2\" != \"\" ]\n    then\n      chmod $2 \"$1\"\n      checkReturnCode\n    fi\n}\nfunction copyFileToTmpDir\n# $1 from-file path\n# $2 to-file path\n# $3 permission\n{\n    cp \"$1\" \"$2\"\n    checkReturnCode\n    if [ \"$3\" != \"\" ]\n    then\n        chmod $3 \"$2\"\n        checkReturnCode\n    fi\n}\n\n# Setup\ncd \"${TOP}\"\nmkdir -p ${CND_DISTDIR}/${CND_CONF}/package\nrm -rf ${TMPDIR}\nmkdir -p ${TMPDIR}\n\n# Copy files and create directories and links\ncd \"${TOP}\"\nmakeDirectory ${TMPDIR}/pid-demo-pic18.x/bin\ncopyFileToTmpDir \"${OUTPUT_PATH}\" \"${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}\" 0755\n\n\n# Generate tar file\ncd \"${TOP}\"\nrm -f ${CND_DISTDIR}/${CND_CONF}/package/pid-demo-pic18.x.tar\ncd ${TMPDIR}\ntar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/pid-demo-pic18.x.tar *\ncheckReturnCode\n\n# Cleanup\ncd \"${TOP}\"\nrm -rf ${TMPDIR}\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/configurations.xml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<configurationDescriptor version=\"62\">\n  <logicalFolder name=\"root\" displayName=\"root\" projectFiles=\"true\">\n    <logicalFolder name=\"HeaderFiles\"\n                   displayName=\"Header Files\"\n                   projectFiles=\"true\">\n      <itemPath>C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/Tick.h</itemPath>\n      <itemPath>C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/Tick/TickPort.h</itemPath>\n      <itemPath>tc.h</itemPath>\n      <itemPath>io.h</itemPath>\n      <itemPath>C:/Users/Ruben/Dropbox/Electronics/MCULib/PID/SPI/SPI.h</itemPath>\n      <itemPath>../PID.h</itemPath>\n    </logicalFolder>\n    <logicalFolder name=\"LinkerScript\"\n                   displayName=\"Linker Files\"\n                   projectFiles=\"true\">\n    </logicalFolder>\n    <logicalFolder name=\"SourceFiles\"\n                   displayName=\"Source Files\"\n                   projectFiles=\"true\">\n      <itemPath>main.c</itemPath>\n      <itemPath>tc.c</itemPath>\n      <itemPath>io.c</itemPath>\n      <itemPath>../PID.c</itemPath>\n    </logicalFolder>\n    <logicalFolder name=\"ExternalFiles\"\n                   displayName=\"Important Files\"\n                   projectFiles=\"false\">\n      <itemPath>Makefile</itemPath>\n    </logicalFolder>\n  </logicalFolder>\n  <sourceRootList>\n    <Elem>..</Elem>\n  </sourceRootList>\n  <projectmakefile>Makefile</projectmakefile>\n  <confs>\n    <conf name=\"default\" type=\"2\">\n      <toolsSet>\n        <developmentServer>localhost</developmentServer>\n        <targetDevice>PIC18F2550</targetDevice>\n        <targetHeader></targetHeader>\n        <targetPluginBoard></targetPluginBoard>\n        <platformTool>PICkit3PlatformTool</platformTool>\n        <languageToolchain>XC8</languageToolchain>\n        <languageToolchainVersion>1.21</languageToolchainVersion>\n        <platform>3</platform>\n      </toolsSet>\n      <compileType>\n        <linkerTool>\n          <linkerLibItems>\n          </linkerLibItems>\n        </linkerTool>\n        <loading>\n          <useAlternateLoadableFile>false</useAlternateLoadableFile>\n          <alternateLoadableFile></alternateLoadableFile>\n        </loading>\n      </compileType>\n      <makeCustomizationType>\n        <makeCustomizationPreStepEnabled>false</makeCustomizationPreStepEnabled>\n        <makeCustomizationPreStep></makeCustomizationPreStep>\n        <makeCustomizationPostStepEnabled>false</makeCustomizationPostStepEnabled>\n        <makeCustomizationPostStep></makeCustomizationPostStep>\n        <makeCustomizationPutChecksumInUserID>false</makeCustomizationPutChecksumInUserID>\n        <makeCustomizationEnableLongLines>false</makeCustomizationEnableLongLines>\n        <makeCustomizationNormalizeHexFile>false</makeCustomizationNormalizeHexFile>\n      </makeCustomizationType>\n      <HI-TECH-COMP>\n        <property key=\"define-macros\" value=\"PLIB_PIC18\"/>\n        <property key=\"extra-include-directories\" value=\"\"/>\n        <property key=\"identifier-length\" value=\"255\"/>\n        <property key=\"operation-mode\" value=\"free\"/>\n        <property key=\"opt-xc8-compiler-strict_ansi\" value=\"false\"/>\n        <property key=\"optimization-assembler\" value=\"true\"/>\n        <property key=\"optimization-assembler-files\" value=\"false\"/>\n        <property key=\"optimization-debug\" value=\"false\"/>\n        <property key=\"optimization-global\" value=\"true\"/>\n        <property key=\"optimization-level\" value=\"9\"/>\n        <property key=\"optimization-set\" value=\"default\"/>\n        <property key=\"optimization-speed\" value=\"true\"/>\n        <property key=\"preprocess-assembler\" value=\"true\"/>\n        <property key=\"undefine-macros\" value=\"\"/>\n        <property key=\"use-cci\" value=\"false\"/>\n        <property key=\"verbose\" value=\"false\"/>\n        <property key=\"warning-level\" value=\"0\"/>\n        <property key=\"what-to-do\" value=\"ignore\"/>\n      </HI-TECH-COMP>\n      <HI-TECH-LINK>\n        <property key=\"additional-options-checksum\" value=\"\"/>\n        <property key=\"additional-options-code-offset\" value=\"\"/>\n        <property key=\"additional-options-command-line\" value=\"\"/>\n        <property key=\"additional-options-errata\" value=\"\"/>\n        <property key=\"additional-options-extend-address\" value=\"false\"/>\n        <property key=\"additional-options-trace-type\" value=\"\"/>\n        <property key=\"additional-options-use-response-files\" value=\"false\"/>\n        <property key=\"backup-reset-condition-flags\" value=\"false\"/>\n        <property key=\"calibrate-oscillator\" value=\"true\"/>\n        <property key=\"calibrate-oscillator-value\" value=\"\"/>\n        <property key=\"clear-bss\" value=\"true\"/>\n        <property key=\"code-model-external\" value=\"wordwrite\"/>\n        <property key=\"code-model-rom\" value=\"\"/>\n        <property key=\"create-html-files\" value=\"false\"/>\n        <property key=\"data-model-ram\" value=\"\"/>\n        <property key=\"data-model-size-of-double\" value=\"24\"/>\n        <property key=\"data-model-size-of-float\" value=\"24\"/>\n        <property key=\"display-class-usage\" value=\"false\"/>\n        <property key=\"display-hex-usage\" value=\"false\"/>\n        <property key=\"display-overall-usage\" value=\"true\"/>\n        <property key=\"display-psect-usage\" value=\"false\"/>\n        <property key=\"fill-flash-options-addr\" value=\"\"/>\n        <property key=\"fill-flash-options-const\" value=\"\"/>\n        <property key=\"fill-flash-options-how\" value=\"0\"/>\n        <property key=\"fill-flash-options-inc-const\" value=\"1\"/>\n        <property key=\"fill-flash-options-increment\" value=\"\"/>\n        <property key=\"fill-flash-options-seq\" value=\"\"/>\n        <property key=\"fill-flash-options-what\" value=\"0\"/>\n        <property key=\"format-hex-file-for-download\" value=\"false\"/>\n        <property key=\"initialize-data\" value=\"true\"/>\n        <property key=\"keep-generated-startup.as\" value=\"false\"/>\n        <property key=\"link-in-c-library\" value=\"true\"/>\n        <property key=\"link-in-peripheral-library\" value=\"true\"/>\n        <property key=\"managed-stack\" value=\"false\"/>\n        <property key=\"opt-xc8-linker-file\" value=\"false\"/>\n        <property key=\"opt-xc8-linker-link_startup\" value=\"false\"/>\n        <property key=\"opt-xc8-linker-serial\" value=\"\"/>\n        <property key=\"program-the-device-with-default-config-words\" value=\"true\"/>\n      </HI-TECH-LINK>\n      <PICkit3PlatformTool>\n      </PICkit3PlatformTool>\n      <XC8-config-global>\n        <property key=\"output-file-format\" value=\"-mcof,+elf\"/>\n      </XC8-config-global>\n    </conf>\n  </confs>\n</configurationDescriptor>\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/private/configurations.xml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<configurationDescriptor version=\"62\">\n  <projectmakefile>Makefile</projectmakefile>\n  <defaultConf>0</defaultConf>\n  <confs>\n    <conf name=\"default\" type=\"2\">\n      <platformToolSN></platformToolSN>\n      <languageToolchainDir>/Applications/microchip/xc8/v1.21/bin</languageToolchainDir>\n      <mdbdebugger version=\"1\">\n        <placeholder1>place holder 1</placeholder1>\n        <placeholder2>place holder 2</placeholder2>\n      </mdbdebugger>\n      <runprofile version=\"6\">\n        <args></args>\n        <rundir></rundir>\n        <buildfirst>true</buildfirst>\n        <console-type>0</console-type>\n        <terminal-type>0</terminal-type>\n        <remove-instrumentation>0</remove-instrumentation>\n        <environment>\n        </environment>\n      </runprofile>\n    </conf>\n  </confs>\n</configurationDescriptor>\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/private/private.properties",
    "content": ""
  },
  {
    "path": "pid-demo-pic18.X/nbproject/private/private.xml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<project-private xmlns=\"http://www.netbeans.org/ns/project-private/1\">\n    <editor-bookmarks xmlns=\"http://www.netbeans.org/ns/editor-bookmarks/1\"/>\n    <editor-bookmarks xmlns=\"http://www.netbeans.org/ns/editor-bookmarks/2\" lastBookmarkId=\"0\"/>\n</project-private>\n"
  },
  {
    "path": "pid-demo-pic18.X/nbproject/project.properties",
    "content": ""
  },
  {
    "path": "pid-demo-pic18.X/nbproject/project.xml",
    "content": "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n<project xmlns=\"http://www.netbeans.org/ns/project/1\">\n    <type>com.microchip.mplab.nbide.embedded.makeproject</type>\n    <configuration>\n        <data xmlns=\"http://www.netbeans.org/ns/make-project/1\">\n            <name>pid-demo-pic18</name>\n            <creation-uuid>e14054b6-c620-4f42-9213-f02ddbb70cfa</creation-uuid>\n            <make-project-type>0</make-project-type>\n            <c-extensions>c</c-extensions>\n            <cpp-extensions/>\n            <header-extensions>h</header-extensions>\n            <sourceEncoding>ISO-8859-1</sourceEncoding>\n            <make-dep-projects/>\n        </data>\n    </configuration>\n</project>\n"
  },
  {
    "path": "pid-demo-pic18.X/newfile.c",
    "content": "\n"
  },
  {
    "path": "pid-demo-pic18.X/tc.c",
    "content": "#include \"tc.h\"\n\ntc_t tc_init(xSPIHandle spid, uint8_t cspin)\n{\n\tstruct thermocuple_struct tcpl;\n\n\t// Configure Chip Select as output, Set MAX6675 CS to high level\n\tio_write(cspin, HIGH);\n\tio_mode(cspin, OUTPUT);\n\t// Configure SPI for MAX6675 operation\n\tspi_control(spid, SPI_MASTER | SPI_MODE_1, SPI_DIV_1_8);\n\tspi_open(spid);\n\t// Save operation parameters\n\ttcpl.spi = spid;\n\ttcpl.cspin = cspin;\n\n\treturn tcpl;\n}\n\nint16_t tc_read(tc_t * tcpl)\n{\n\tuint16_t buf = 0;\n\n\t// Pull CS low\n\tio_write(tcpl->cspin, LOW);\n\t// Read data\n\tspi_read_array(tcpl->spi, (uint8_t *) & buf, 2);\n\t// Pull CS high\n\tio_write(tcpl->cspin, HIGH);\n\t// Open or bad connection on thermocuple returns negative value\n\tif (buf & (1 << 2))\n\t\treturn -1;\n\t// Remove dummy bytes\n\tbuf &= 0x7FF8;\n\t// Shift bits\n\tbuf >>= 3;\n\treturn buf;\n}\n\nfloat tc_read_float(tc_t * tcpl)\n{\n\treturn((float) tc_read(tcpl))* 0.25;\n}"
  },
  {
    "path": "pid-demo-pic18.X/tc.h",
    "content": "/*\tThermocuple Interface Using MAX6675 IC\n\tCopyright (C) 2014 Jesus Ruben Santa Anna Zamudio.\n\n\tThis program is free software: you can redistribute it and/or modify\n\tit under the terms of the GNU General Public License as published by\n\tthe Free Software Foundation, either version 3 of the License, or\n\t(at your option) any later version.\n\n\tThis program is distributed in the hope that it will be useful,\n\tbut WITHOUT ANY WARRANTY; without even the implied warranty of\n\tMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n\tGNU General Public License for more details.\n\n\tYou should have received a copy of the GNU General Public License\n\talong with this program.  If not, see <http://www.gnu.org/licenses/>.\n\n\tAuthor website: http://www.geekfactory.mx\n\tAuthor e-mail: ruben at geekfactory dot mx\n */\n#ifndef TC_H\n#define\tTC_H\n/*-------------------------------------------------------------*/\n/*\t\tIncludes and dependencies\t\t\t*/\n/*-------------------------------------------------------------*/\n#include <stdint.h>\n#include \"../SPI/SPI.h\"\n#include \"io.h\"\n\n/*-------------------------------------------------------------*/\n/*\t\tMacros and definitions\t\t\t\t*/\n/*-------------------------------------------------------------*/\n\n\n/*-------------------------------------------------------------*/\n/*\t\tTypedefs enums & structs\t\t\t*/\n/*-------------------------------------------------------------*/\nstruct thermocuple_struct\n{\n\txSPIHandle spi;\n\tuint8_t cspin;\n};\n\ntypedef struct thermocuple_struct tc_t;\n\n\n/*-------------------------------------------------------------*/\n/*\t\tFunction prototypes\t\t\t\t*/\n/*-------------------------------------------------------------*/\n\n/**\n * @brief Prepares to read the thermocouple\n *\n * @param spid SPI Interface handle to communicate with the thermocuple\n * @param cspin Chip select pin to enable communication with the device\n *\n * @return A thermocuple_structure with information to use the thermocouple\n */\ntc_t tc_init(xSPIHandle spid, uint8_t cspin);\n\n/**\n * @brief Read thermocuple probe\n *\n * Returns the thermocuple reading as an integer value. The returnded value\n * is negative if the thermocuple is open or connected incorrectly.\n *\n * @param tcpl A pointer to a thermocuple_struct\n *\n * @return Returns the thermocuple reading as integer\n */\nint16_t tc_read(tc_t * tcpl);\n\n/**\n * @brief Read thermocuple probe\n *\n * Returns the thermocouple value as a float. The returned value is negative\n * if the thermocouple probe is open or connected incorrectly.\n *\n * @param tcpl A pointer to a thermocuple_struct\n *\n * @return Returns the thermocuple reading as float\n */\nfloat tc_read_float(tc_t * tcpl);\n\n\n\n#endif\n// End of Header file\n"
  },
  {
    "path": "pid-demo-pic18.X/unet.c",
    "content": "#include <stdint.h>;\n#include \"io.h\";\n\n// Output services\n#define DOUT_SERVICE\t10\t//!< Digital Output control service\n#define AOUT_SERVICE\t11\t//!< Analog output control service\n#define IRTX_SERVICE\t12\t//!< Infrarred transmission service\n#define CHARLCD_SERVICE\t14\t//!< Serial LCD service\n#define SBRIDGE_SERVICE\t15\t//!< Serial Port bridge service\n\n\n// Storage non IO services\n#define TIME_SERVICE\t50\n#define TIMERS_SERVICE\n\n//Input services\n#define DIN_SERVICE\t100\n#define AIN_SERVICE\t101\n#define IRRX_SERVICE\t102\n#define\n\n\nenum unet_msg_types\n{\n\tMT_WRITESERV_REQ,\n\tMT_WRITESERV_RES,\n\tMT_WRITESERV_ERR,\n\n\tMT_READSERV_REQ,\n\tMT_READSERV_RES,\n\tMT_READSERV_ERR,\n\n\tMT_DISCOVER_REQ,\n\tMT_DISCOVER_RES,\n\tMT_DISCOVER_ERR,\n\n};\n// message types\n\n#define SETDATA_REQ_TYPE 10\n#define SETDATA_RES_TYPE 11\n#define SETDATA_ERR_TYPE 12\n#define GETDATA_REQ_TYPE 20\n#define GETDATA_RES_TYPE 21\n#define GETDATA_ERR_TYPE 22\n\n#define SRVDISC_REQ_TYPE\n#define SRVDISC_RES_TYPE\n#define SRVDISC_ERR_TYPE\n\nstruct unet_msg {\n\tuint8_t mtype;\n\tuint8_t len;\n};\n\nunion unet_header {\n\tstruct unet_msg curmsg;\n\tuint8_t data;\n};\n\n\n\ntypedef uint8_t(*unetwr_t) (char cTxChar);\ntypedef uint8_t(*unetrd_t) (char * rxbuf);\n\nuint8_t buf[10];\nuint8_t buf[10];\n\n// arreglo para definir los servicios implementados por este dispositivo\nuint8_t device_services[] = {DOUT_SERVICE, TIME_SERVICE};\n\n/**\n * Escribe datos a un servicio que utiliza el protocolo unet. El servicio debe\n * implementar los procedimientos necesarios para realizar la accin solicitada\n * o ajustar los valores solicitados y responder a la peticin escribiendo su\n * respuesta en el mismo buffer donde se proporcionaron los datos de entrada\n *\n * @param data Datos de entrada (payload) para la peticin de cambio/escritura\n * @param result Datos del resultado o respuesta de la peticin (payload).\n *\n * @return Debe retornarse el tipo de mensaje, ya sea SETDATA_RES_TYPE o\n * SETDATA_ERR_TYPE segun se haya llevado o no a cabo de manera correcta la\n * peticin solicitada\n */\nuint8_t unet_set(uint8_t * data)\n{\n\tswitch (*((uint16_t *) data)) {\n\t\t// Datos de salidas digitales\n\tcase DOUT_SERVICE:\n\t\tif (data[2] == DOUTHIGH)\n\t\t\tio_write(data[3], HIGH);\n\t\telse if (data[2] == DOUTLOW)\n\t\t\tio_write(data[3], LOW);\n\t\telse if (data[2] == DOUTTOGGLE)\n\t\t\tio_write(data[3], TOGGLE);\n\n\t\tbreak;\n\tcase IRTX_SERVICE:\n\t\tif (data[2] == IRTXSEND)\n\t\t\tir_send(data[3], (uint32_t *) data[4]);\n\t\tbreak;\n\t}\n}\n\nuint8_t unet_get(uint8_t * data, uint8_t * result)\n{\n}\nunetrd_t read_callback;\nunetwr_t write_callback;\n\nBOOL unet_init(unetrd_t reader, unetwr_t writer)\n{\n\tread_callback = reader;\n\twrite_callback = writer;\n}\n\nenum unet_states {\n\tE_RX_HEADER,\n\tE_RX_PAYLOAD,\n};\n\nvoid unet_task()\n{\n\tunion unet_header header;\n\n\tstatic uint8_t i = 0;\n\tstatic enum unet_states unetst = E_RX_HEADER;\n\n\tswitch (unetst) {\n\tcase E_RX_HEADER:\n\t\t// mientras haya datos en el buffer de rx llenar header\n\t\twhile (read_callback(header.data[i])) {\n\t\t\tif (++i >= sizeof(header)) {\n\t\t\t\t// Cuando este hecho avanzar FSM a recibir el payload\n\t\t\t\tunetst = E_RX_PAYLOAD;\n\t\t\t\ti = 0;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t}\n\t\tbreak;\n\tcase E_RX_PAYLOAD:\n\t\tbreak;\n\n\tcase E_PROCESS:\n\t\tswitch (header.curmsg.mtype) {\n\t\tcase SETDATA_REQ_TYPE:\n\t\t\t// Peticion de \"setear\" datos para un servicio SETDATA_REQ\n\t\t\t// Ejecutamos la peticin\n\t\t\theader.curmsg.len = unet_set(buf, header.curmsg.len, &header.curmsg.mtype);\n\t\t\tunet_send(header.curmsg, buf);\n\t\t\tbreak;\n\t\tcase GETDATA_REQ_TYPE:\n\t\t\tbreak;\n\t\t}\n\t\tbreak;\n\n\t}\n\n}\n\n"
  }
]